/*
 * Generated by gen_defines.py
 *
 * DTS input file:
 *   nrf51dongle_nrf51422.dts.pre.tmp
 *
 * Directories with bindings:
 *   C:/ncs/nrf/dts/bindings, C:/ncs/zephyr/dts/bindings
 *
 * Node dependency ordering (ordinal and path):
 *   0   /
 *   1   /aliases
 *   2   /chosen
 *   3   /cpus
 *   4   /cpus/cpu@0
 *   5   /leds
 *   6   /soc
 *   7   /soc/gpio@50000000
 *   8   /leds/led_0
 *   9   /leds/led_1
 *   10  /leds/led_2
 *   11  /pwmleds
 *   12  /soc/interrupt-controller@e000e100
 *   13  /soc/timer@40009000
 *   14  /sw-pwm
 *   15  /pwmleds/pwm_led_0
 *   16  /soc/adc@40007000
 *   17  /soc/clock@40000000
 *   18  /soc/ecb@4000e000
 *   19  /soc/gpiote@40006000
 *   20  /soc/i2c@40003000
 *   21  /soc/i2c@40004000
 *   22  /soc/memory@20000000
 *   23  /soc/qdec@40012000
 *   24  /soc/random@4000d000
 *   25  /soc/rtc@4000b000
 *   26  /soc/rtc@40011000
 *   27  /soc/spi@40003000
 *   28  /soc/spi@40004000
 *   29  /soc/temp@4000c000
 *   30  /soc/timer@40008000
 *   31  /soc/timer@4000a000
 *   32  /soc/uart@40002000
 *   33  /soc/watchdog@40010000
 *   34  /soc/flash-controller@4001e000
 *   35  /soc/flash-controller@4001e000/flash@0
 *   36  /soc/flash-controller@4001e000/flash@0/partitions
 *   37  /soc/flash-controller@4001e000/flash@0/partitions/partition@0
 *   38  /soc/flash-controller@4001e000/flash@0/partitions/partition@8000
 *   39  /soc/flash-controller@4001e000/flash@0/partitions/partition@22000
 *   40  /soc/flash-controller@4001e000/flash@0/partitions/partition@3c000
 *   41  /soc/flash-controller@4001e000/flash@0/partitions/partition@3e000
 *
 * Definitions derived from these nodes in dependency order are next,
 * followed by /chosen nodes.
 */

/*
 * Devicetree node: /
 *
 * Node identifier: DT_N
 */

/* Node's full path: */
#define DT_N_PATH "/"

/* Node's name with unit-address: */
#define DT_N_FULL_NAME "/"
#define DT_N_FOREACH_CHILD(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_cpus) fn(DT_N_S_sw_pwm) fn(DT_N_S_leds) fn(DT_N_S_pwmleds)

/* Node's dependency ordinal: */
#define DT_N_ORD 0

/* Ordinals for what this node depends on directly: */
#define DT_N_REQUIRES_ORDS /* nothing */

/* Ordinals for what depends directly on this node: */
#define DT_N_SUPPORTS_ORDS \
	1, /* /aliases */ \
	2, /* /chosen */ \
	3, /* /cpus */ \
	5, /* /leds */ \
	6, /* /soc */ \
	11, /* /pwmleds */ \
	14, /* /sw-pwm */

/* Existence and alternate IDs: */
#define DT_N_EXISTS 1
#define DT_N_INST_0_nordic_nrf51_dongle_nrf51422 DT_N

/* Special property macros: */
#define DT_N_REG_NUM 0
#define DT_N_IRQ_NUM 0
#define DT_N_COMPAT_MATCHES_nordic_nrf51_dongle_nrf51422 1
#define DT_N_STATUS_okay 1

/* Generic property macros: */
#define DT_N_P_compatible {"nordic,nrf51-dongle-nrf51422"}
#define DT_N_P_compatible_IDX_0 "nordic,nrf51-dongle-nrf51422"
#define DT_N_P_compatible_IDX_0_EXISTS 1
#define DT_N_P_compatible_LEN 1
#define DT_N_P_compatible_EXISTS 1

/*
 * Devicetree node: /aliases
 *
 * Node identifier: DT_N_S_aliases
 */

/* Node's full path: */
#define DT_N_S_aliases_PATH "/aliases"

/* Node's name with unit-address: */
#define DT_N_S_aliases_FULL_NAME "aliases"

/* Node parent (/) identifier: */
#define DT_N_S_aliases_PARENT DT_N
#define DT_N_S_aliases_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_aliases_ORD 1

/* Ordinals for what this node depends on directly: */
#define DT_N_S_aliases_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_aliases_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_aliases_EXISTS 1

/* Special property macros: */
#define DT_N_S_aliases_REG_NUM 0
#define DT_N_S_aliases_IRQ_NUM 0
#define DT_N_S_aliases_STATUS_okay 1

/* (No generic property macros) */

/*
 * Devicetree node: /chosen
 *
 * Node identifier: DT_N_S_chosen
 */

/* Node's full path: */
#define DT_N_S_chosen_PATH "/chosen"

/* Node's name with unit-address: */
#define DT_N_S_chosen_FULL_NAME "chosen"

/* Node parent (/) identifier: */
#define DT_N_S_chosen_PARENT DT_N
#define DT_N_S_chosen_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_chosen_ORD 2

/* Ordinals for what this node depends on directly: */
#define DT_N_S_chosen_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_chosen_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_chosen_EXISTS 1

/* Special property macros: */
#define DT_N_S_chosen_REG_NUM 0
#define DT_N_S_chosen_IRQ_NUM 0
#define DT_N_S_chosen_STATUS_okay 1

/* (No generic property macros) */

/*
 * Devicetree node: /cpus
 *
 * Node identifier: DT_N_S_cpus
 */

/* Node's full path: */
#define DT_N_S_cpus_PATH "/cpus"

/* Node's name with unit-address: */
#define DT_N_S_cpus_FULL_NAME "cpus"

/* Node parent (/) identifier: */
#define DT_N_S_cpus_PARENT DT_N
#define DT_N_S_cpus_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_0)

/* Node's dependency ordinal: */
#define DT_N_S_cpus_ORD 3

/* Ordinals for what this node depends on directly: */
#define DT_N_S_cpus_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_cpus_SUPPORTS_ORDS \
	4, /* /cpus/cpu@0 */

/* Existence and alternate IDs: */
#define DT_N_S_cpus_EXISTS 1

/* Special property macros: */
#define DT_N_S_cpus_REG_NUM 0
#define DT_N_S_cpus_IRQ_NUM 0
#define DT_N_S_cpus_STATUS_okay 1

/* (No generic property macros) */

/*
 * Devicetree node: /cpus/cpu@0
 *
 * Node identifier: DT_N_S_cpus_S_cpu_0
 *
 * Binding (compatible = arm,cortex-m0):
 *   C:/ncs/zephyr/dts/bindings\cpu\arm,cortex-m0.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_cpus_S_cpu_0_PATH "/cpus/cpu@0"

/* Node's name with unit-address: */
#define DT_N_S_cpus_S_cpu_0_FULL_NAME "cpu@0"

/* Node parent (/cpus) identifier: */
#define DT_N_S_cpus_S_cpu_0_PARENT DT_N_S_cpus
#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_cpus_S_cpu_0_ORD 4

/* Ordinals for what this node depends on directly: */
#define DT_N_S_cpus_S_cpu_0_REQUIRES_ORDS \
	3, /* /cpus */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_cpus_S_cpu_0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_cpus_S_cpu_0_EXISTS 1
#define DT_N_INST_0_arm_cortex_m0 DT_N_S_cpus_S_cpu_0

/* Special property macros: */
#define DT_N_S_cpus_S_cpu_0_REG_NUM 1
#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
#define DT_N_S_cpus_S_cpu_0_IRQ_NUM 0
#define DT_N_S_cpus_S_cpu_0_COMPAT_MATCHES_arm_cortex_m0 1
#define DT_N_S_cpus_S_cpu_0_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_cpus_S_cpu_0_P_compatible {"arm,cortex-m0"}
#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0 "arm,cortex-m0"
#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_compatible_LEN 1
#define DT_N_S_cpus_S_cpu_0_P_compatible_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_reg {0 /* 0x0 */}
#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0 0
#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_reg_EXISTS 1

/*
 * Devicetree node: /leds
 *
 * Node identifier: DT_N_S_leds
 *
 * Binding (compatible = gpio-leds):
 *   C:/ncs/zephyr/dts/bindings\gpio\gpio-leds.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_leds_PATH "/leds"

/* Node's name with unit-address: */
#define DT_N_S_leds_FULL_NAME "leds"

/* Node parent (/) identifier: */
#define DT_N_S_leds_PARENT DT_N
#define DT_N_S_leds_FOREACH_CHILD(fn) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2)

/* Node's dependency ordinal: */
#define DT_N_S_leds_ORD 5

/* Ordinals for what this node depends on directly: */
#define DT_N_S_leds_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_leds_SUPPORTS_ORDS \
	8, /* /leds/led_0 */ \
	9, /* /leds/led_1 */ \
	10, /* /leds/led_2 */

/* Existence and alternate IDs: */
#define DT_N_S_leds_EXISTS 1
#define DT_N_INST_0_gpio_leds DT_N_S_leds

/* Special property macros: */
#define DT_N_S_leds_REG_NUM 0
#define DT_N_S_leds_IRQ_NUM 0
#define DT_N_S_leds_COMPAT_MATCHES_gpio_leds 1
#define DT_N_S_leds_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_leds_P_compatible {"gpio-leds"}
#define DT_N_S_leds_P_compatible_IDX_0 "gpio-leds"
#define DT_N_S_leds_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_leds_P_compatible_LEN 1
#define DT_N_S_leds_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc
 *
 * Node identifier: DT_N_S_soc
 */

/* Node's full path: */
#define DT_N_S_soc_PATH "/soc"

/* Node's name with unit-address: */
#define DT_N_S_soc_FULL_NAME "soc"

/* Node parent (/) identifier: */
#define DT_N_S_soc_PARENT DT_N
#define DT_N_S_soc_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_flash_controller_4001e000) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_adc_40007000) fn(DT_N_S_soc_S_clock_40000000) fn(DT_N_S_soc_S_ecb_4000e000) fn(DT_N_S_soc_S_uart_40002000) fn(DT_N_S_soc_S_gpiote_40006000) fn(DT_N_S_soc_S_gpio_50000000) fn(DT_N_S_soc_S_i2c_40003000) fn(DT_N_S_soc_S_i2c_40004000) fn(DT_N_S_soc_S_qdec_40012000) fn(DT_N_S_soc_S_random_4000d000) fn(DT_N_S_soc_S_spi_40003000) fn(DT_N_S_soc_S_spi_40004000) fn(DT_N_S_soc_S_rtc_4000b000) fn(DT_N_S_soc_S_rtc_40011000) fn(DT_N_S_soc_S_timer_40008000) fn(DT_N_S_soc_S_timer_40009000) fn(DT_N_S_soc_S_timer_4000a000) fn(DT_N_S_soc_S_temp_4000c000) fn(DT_N_S_soc_S_watchdog_40010000)

/* Node's dependency ordinal: */
#define DT_N_S_soc_ORD 6

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_SUPPORTS_ORDS \
	7, /* /soc/gpio@50000000 */ \
	12, /* /soc/interrupt-controller@e000e100 */ \
	13, /* /soc/timer@40009000 */ \
	16, /* /soc/adc@40007000 */ \
	17, /* /soc/clock@40000000 */ \
	18, /* /soc/ecb@4000e000 */ \
	19, /* /soc/gpiote@40006000 */ \
	20, /* /soc/i2c@40003000 */ \
	21, /* /soc/i2c@40004000 */ \
	22, /* /soc/memory@20000000 */ \
	23, /* /soc/qdec@40012000 */ \
	24, /* /soc/random@4000d000 */ \
	25, /* /soc/rtc@4000b000 */ \
	26, /* /soc/rtc@40011000 */ \
	27, /* /soc/spi@40003000 */ \
	28, /* /soc/spi@40004000 */ \
	29, /* /soc/temp@4000c000 */ \
	30, /* /soc/timer@40008000 */ \
	31, /* /soc/timer@4000a000 */ \
	32, /* /soc/uart@40002000 */ \
	33, /* /soc/watchdog@40010000 */ \
	34, /* /soc/flash-controller@4001e000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_EXISTS 1
#define DT_N_INST_0_nordic_nrf51822_qfac DT_N_S_soc
#define DT_N_INST_0_nordic_nrf51822      DT_N_S_soc
#define DT_N_INST_0_nordic_nrf51         DT_N_S_soc
#define DT_N_INST_0_simple_bus           DT_N_S_soc

/* Special property macros: */
#define DT_N_S_soc_REG_NUM 0
#define DT_N_S_soc_IRQ_NUM 0
#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf51822_qfac 1
#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf51822 1
#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf51 1
#define DT_N_S_soc_COMPAT_MATCHES_simple_bus 1
#define DT_N_S_soc_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_P_compatible {"nordic,nRF51822-QFAC", "nordic,nRF51822", "nordic,nRF51", "simple-bus"}
#define DT_N_S_soc_P_compatible_IDX_0 "nordic,nRF51822-QFAC"
#define DT_N_S_soc_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_1 "nordic,nRF51822"
#define DT_N_S_soc_P_compatible_IDX_1_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_2 "nordic,nRF51"
#define DT_N_S_soc_P_compatible_IDX_2_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_3 "simple-bus"
#define DT_N_S_soc_P_compatible_IDX_3_EXISTS 1
#define DT_N_S_soc_P_compatible_LEN 4
#define DT_N_S_soc_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/gpio@50000000
 *
 * Node identifier: DT_N_S_soc_S_gpio_50000000
 *
 * Binding (compatible = nordic,nrf-gpio):
 *   C:/ncs/zephyr/dts/bindings\gpio\nordic,nrf-gpio.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_gpio_50000000_PATH "/soc/gpio@50000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_gpio_50000000_FULL_NAME "gpio@50000000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_gpio_50000000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_gpio_50000000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_gpio_50000000_ORD 7

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_gpio_50000000_REQUIRES_ORDS \
	6, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_gpio_50000000_SUPPORTS_ORDS \
	8, /* /leds/led_0 */ \
	9, /* /leds/led_1 */ \
	10, /* /leds/led_2 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_gpio_50000000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_gpio DT_N_S_soc_S_gpio_50000000
#define DT_N_NODELABEL_gpio0        DT_N_S_soc_S_gpio_50000000

/* Special property macros: */
#define DT_N_S_soc_S_gpio_50000000_REG_NUM 1
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_0_VAL_ADDRESS 1342177280 /* 0x50000000 */
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_gpio_50000000_IRQ_NUM 0
#define DT_N_S_soc_S_gpio_50000000_COMPAT_MATCHES_nordic_nrf_gpio 1
#define DT_N_S_soc_S_gpio_50000000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_gpio_50000000_P_reg {1342177280 /* 0x50000000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_0 1342177280
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_label "GPIO_0"
#define DT_N_S_soc_S_gpio_50000000_P_label_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_port 0
#define DT_N_S_soc_S_gpio_50000000_P_port_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_gpio_controller 1
#define DT_N_S_soc_S_gpio_50000000_P_gpio_controller_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_ngpios 32
#define DT_N_S_soc_S_gpio_50000000_P_ngpios_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_status "okay"
#define DT_N_S_soc_S_gpio_50000000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_gpio_50000000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_gpio_50000000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpio_50000000_P_status_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_compatible {"nordic,nrf-gpio"}
#define DT_N_S_soc_S_gpio_50000000_P_compatible_IDX_0 "nordic,nrf-gpio"
#define DT_N_S_soc_S_gpio_50000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_compatible_LEN 1
#define DT_N_S_soc_S_gpio_50000000_P_compatible_EXISTS 1

/*
 * Devicetree node: /leds/led_0
 *
 * Node identifier: DT_N_S_leds_S_led_0
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_leds_S_led_0_PATH "/leds/led_0"

/* Node's name with unit-address: */
#define DT_N_S_leds_S_led_0_FULL_NAME "led_0"

/* Node parent (/leds) identifier: */
#define DT_N_S_leds_S_led_0_PARENT DT_N_S_leds
#define DT_N_S_leds_S_led_0_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_leds_S_led_0_ORD 8

/* Ordinals for what this node depends on directly: */
#define DT_N_S_leds_S_led_0_REQUIRES_ORDS \
	5, /* /leds */ \
	7, /* /soc/gpio@50000000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_leds_S_led_0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_leds_S_led_0_EXISTS 1
#define DT_N_ALIAS_led0         DT_N_S_leds_S_led_0
#define DT_N_NODELABEL_led0_red DT_N_S_leds_S_led_0

/* Special property macros: */
#define DT_N_S_leds_S_led_0_REG_NUM 0
#define DT_N_S_leds_S_led_0_IRQ_NUM 0
#define DT_N_S_leds_S_led_0_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_EXISTS 1
#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000000
#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_pin 21
#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_flags 1
#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_leds_S_led_0_P_gpios_LEN 1
#define DT_N_S_leds_S_led_0_P_gpios_EXISTS 1
#define DT_N_S_leds_S_led_0_P_label "Red LED 0"
#define DT_N_S_leds_S_led_0_P_label_EXISTS 1

/*
 * Devicetree node: /leds/led_1
 *
 * Node identifier: DT_N_S_leds_S_led_1
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_leds_S_led_1_PATH "/leds/led_1"

/* Node's name with unit-address: */
#define DT_N_S_leds_S_led_1_FULL_NAME "led_1"

/* Node parent (/leds) identifier: */
#define DT_N_S_leds_S_led_1_PARENT DT_N_S_leds
#define DT_N_S_leds_S_led_1_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_leds_S_led_1_ORD 9

/* Ordinals for what this node depends on directly: */
#define DT_N_S_leds_S_led_1_REQUIRES_ORDS \
	5, /* /leds */ \
	7, /* /soc/gpio@50000000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_leds_S_led_1_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_leds_S_led_1_EXISTS 1
#define DT_N_ALIAS_led1           DT_N_S_leds_S_led_1
#define DT_N_NODELABEL_led0_green DT_N_S_leds_S_led_1

/* Special property macros: */
#define DT_N_S_leds_S_led_1_REG_NUM 0
#define DT_N_S_leds_S_led_1_IRQ_NUM 0
#define DT_N_S_leds_S_led_1_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_EXISTS 1
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000000
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_pin 22
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_flags 1
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_leds_S_led_1_P_gpios_LEN 1
#define DT_N_S_leds_S_led_1_P_gpios_EXISTS 1
#define DT_N_S_leds_S_led_1_P_label "Green LED 0"
#define DT_N_S_leds_S_led_1_P_label_EXISTS 1

/*
 * Devicetree node: /leds/led_2
 *
 * Node identifier: DT_N_S_leds_S_led_2
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_leds_S_led_2_PATH "/leds/led_2"

/* Node's name with unit-address: */
#define DT_N_S_leds_S_led_2_FULL_NAME "led_2"

/* Node parent (/leds) identifier: */
#define DT_N_S_leds_S_led_2_PARENT DT_N_S_leds
#define DT_N_S_leds_S_led_2_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_leds_S_led_2_ORD 10

/* Ordinals for what this node depends on directly: */
#define DT_N_S_leds_S_led_2_REQUIRES_ORDS \
	5, /* /leds */ \
	7, /* /soc/gpio@50000000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_leds_S_led_2_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_leds_S_led_2_EXISTS 1
#define DT_N_ALIAS_led2          DT_N_S_leds_S_led_2
#define DT_N_NODELABEL_led0_blue DT_N_S_leds_S_led_2

/* Special property macros: */
#define DT_N_S_leds_S_led_2_REG_NUM 0
#define DT_N_S_leds_S_led_2_IRQ_NUM 0
#define DT_N_S_leds_S_led_2_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_EXISTS 1
#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000000
#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_pin 23
#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_flags 1
#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_leds_S_led_2_P_gpios_LEN 1
#define DT_N_S_leds_S_led_2_P_gpios_EXISTS 1
#define DT_N_S_leds_S_led_2_P_label "Blue LED 0"
#define DT_N_S_leds_S_led_2_P_label_EXISTS 1

/*
 * Devicetree node: /pwmleds
 *
 * Node identifier: DT_N_S_pwmleds
 *
 * Binding (compatible = pwm-leds):
 *   C:/ncs/zephyr/dts/bindings\led\pwm-leds.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_pwmleds_PATH "/pwmleds"

/* Node's name with unit-address: */
#define DT_N_S_pwmleds_FULL_NAME "pwmleds"

/* Node parent (/) identifier: */
#define DT_N_S_pwmleds_PARENT DT_N
#define DT_N_S_pwmleds_FOREACH_CHILD(fn) fn(DT_N_S_pwmleds_S_pwm_led_0)

/* Node's dependency ordinal: */
#define DT_N_S_pwmleds_ORD 11

/* Ordinals for what this node depends on directly: */
#define DT_N_S_pwmleds_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_pwmleds_SUPPORTS_ORDS \
	15, /* /pwmleds/pwm_led_0 */

/* Existence and alternate IDs: */
#define DT_N_S_pwmleds_EXISTS 1
#define DT_N_INST_0_pwm_leds DT_N_S_pwmleds

/* Special property macros: */
#define DT_N_S_pwmleds_REG_NUM 0
#define DT_N_S_pwmleds_IRQ_NUM 0
#define DT_N_S_pwmleds_COMPAT_MATCHES_pwm_leds 1
#define DT_N_S_pwmleds_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_pwmleds_P_compatible {"pwm-leds"}
#define DT_N_S_pwmleds_P_compatible_IDX_0 "pwm-leds"
#define DT_N_S_pwmleds_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_pwmleds_P_compatible_LEN 1
#define DT_N_S_pwmleds_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/interrupt-controller@e000e100
 *
 * Node identifier: DT_N_S_soc_S_interrupt_controller_e000e100
 *
 * Binding (compatible = arm,v6m-nvic):
 *   C:/ncs/zephyr/dts/bindings\interrupt-controller\arm,v6m-nvic.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_PATH "/soc/interrupt-controller@e000e100"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_FULL_NAME "interrupt-controller@e000e100"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_PARENT DT_N_S_soc
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_ORD 12

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_REQUIRES_ORDS \
	6, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_SUPPORTS_ORDS \
	13, /* /soc/timer@40009000 */ \
	16, /* /soc/adc@40007000 */ \
	17, /* /soc/clock@40000000 */ \
	18, /* /soc/ecb@4000e000 */ \
	19, /* /soc/gpiote@40006000 */ \
	20, /* /soc/i2c@40003000 */ \
	21, /* /soc/i2c@40004000 */ \
	23, /* /soc/qdec@40012000 */ \
	24, /* /soc/random@4000d000 */ \
	25, /* /soc/rtc@4000b000 */ \
	26, /* /soc/rtc@40011000 */ \
	27, /* /soc/spi@40003000 */ \
	28, /* /soc/spi@40004000 */ \
	29, /* /soc/temp@4000c000 */ \
	30, /* /soc/timer@40008000 */ \
	31, /* /soc/timer@4000a000 */ \
	32, /* /soc/uart@40002000 */ \
	33, /* /soc/watchdog@40010000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_EXISTS 1
#define DT_N_INST_0_arm_v6m_nvic DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_NODELABEL_nvic      DT_N_S_soc_S_interrupt_controller_e000e100

/* Special property macros: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_NUM 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_ADDRESS 3758153984 /* 0xe000e100 */
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_SIZE 3072 /* 0xc00 */
#define DT_N_S_soc_S_interrupt_controller_e000e100_IRQ_NUM 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MATCHES_arm_v6m_nvic 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg {3758153984 /* 0xe000e100 */, 3072 /* 0xc00 */}
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0 3758153984
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1 3072
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits 2
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible {"arm,v6m-nvic"}
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0 "arm,v6m-nvic"
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_LEN 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/timer@40009000
 *
 * Node identifier: DT_N_S_soc_S_timer_40009000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   C:/ncs/zephyr/dts/bindings\timer\nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_40009000_PATH "/soc/timer@40009000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_40009000_FULL_NAME "timer@40009000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_40009000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_timer_40009000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_40009000_ORD 13

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_40009000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_40009000_SUPPORTS_ORDS \
	14, /* /sw-pwm */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_40009000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_timer DT_N_S_soc_S_timer_40009000
#define DT_N_NODELABEL_timer1        DT_N_S_soc_S_timer_40009000

/* Special property macros: */
#define DT_N_S_soc_S_timer_40009000_REG_NUM 1
#define DT_N_S_soc_S_timer_40009000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_REG_IDX_0_VAL_ADDRESS 1073778688 /* 0x40009000 */
#define DT_N_S_soc_S_timer_40009000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_40009000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_irq 9
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_40009000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_timer_40009000_P_reg {1073778688 /* 0x40009000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_0 1073778688
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_cc_num 4
#define DT_N_S_soc_S_timer_40009000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts {9 /* 0x9 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_0 9
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_label "TIMER_1"
#define DT_N_S_soc_S_timer_40009000_P_label_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_prescaler 0
#define DT_N_S_soc_S_timer_40009000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_status "okay"
#define DT_N_S_soc_S_timer_40009000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_timer_40009000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_timer_40009000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_40009000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_40009000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_40009000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_40009000_P_compatible_EXISTS 1

/*
 * Devicetree node: /sw-pwm
 *
 * Node identifier: DT_N_S_sw_pwm
 *
 * Binding (compatible = nordic,nrf-sw-pwm):
 *   C:/ncs/zephyr/dts/bindings\pwm\nordic,nrf-sw-pwm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_sw_pwm_PATH "/sw-pwm"

/* Node's name with unit-address: */
#define DT_N_S_sw_pwm_FULL_NAME "sw-pwm"

/* Node parent (/) identifier: */
#define DT_N_S_sw_pwm_PARENT DT_N
#define DT_N_S_sw_pwm_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_sw_pwm_ORD 14

/* Ordinals for what this node depends on directly: */
#define DT_N_S_sw_pwm_REQUIRES_ORDS \
	0, /* / */ \
	13, /* /soc/timer@40009000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_sw_pwm_SUPPORTS_ORDS \
	15, /* /pwmleds/pwm_led_0 */

/* Existence and alternate IDs: */
#define DT_N_S_sw_pwm_EXISTS 1
#define DT_N_INST_0_nordic_nrf_sw_pwm DT_N_S_sw_pwm
#define DT_N_NODELABEL_sw_pwm         DT_N_S_sw_pwm

/* Special property macros: */
#define DT_N_S_sw_pwm_REG_NUM 0
#define DT_N_S_sw_pwm_IRQ_NUM 0
#define DT_N_S_sw_pwm_COMPAT_MATCHES_nordic_nrf_sw_pwm 1
#define DT_N_S_sw_pwm_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_sw_pwm_P_generator_IDX_0_PH DT_N_S_soc_S_timer_40009000
#define DT_N_S_sw_pwm_P_generator_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_P_generator_LEN 1
#define DT_N_S_sw_pwm_P_generator_EXISTS 1
#define DT_N_S_sw_pwm_P_channel_count 3
#define DT_N_S_sw_pwm_P_channel_count_EXISTS 1
#define DT_N_S_sw_pwm_P_clock_prescaler 0
#define DT_N_S_sw_pwm_P_clock_prescaler_EXISTS 1
#define DT_N_S_sw_pwm_P_ppi_base 0
#define DT_N_S_sw_pwm_P_ppi_base_EXISTS 1
#define DT_N_S_sw_pwm_P_gpiote_base 0
#define DT_N_S_sw_pwm_P_gpiote_base_EXISTS 1
#define DT_N_S_sw_pwm_P_label "SW_PWM"
#define DT_N_S_sw_pwm_P_label_EXISTS 1
#define DT_N_S_sw_pwm_P_status "okay"
#define DT_N_S_sw_pwm_P_status_ENUM_IDX 1
#define DT_N_S_sw_pwm_P_status_ENUM_TOKEN okay
#define DT_N_S_sw_pwm_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_sw_pwm_P_status_EXISTS 1
#define DT_N_S_sw_pwm_P_compatible {"nordic,nrf-sw-pwm"}
#define DT_N_S_sw_pwm_P_compatible_IDX_0 "nordic,nrf-sw-pwm"
#define DT_N_S_sw_pwm_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_P_compatible_LEN 1
#define DT_N_S_sw_pwm_P_compatible_EXISTS 1

/*
 * Devicetree node: /pwmleds/pwm_led_0
 *
 * Node identifier: DT_N_S_pwmleds_S_pwm_led_0
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_pwmleds_S_pwm_led_0_PATH "/pwmleds/pwm_led_0"

/* Node's name with unit-address: */
#define DT_N_S_pwmleds_S_pwm_led_0_FULL_NAME "pwm_led_0"

/* Node parent (/pwmleds) identifier: */
#define DT_N_S_pwmleds_S_pwm_led_0_PARENT DT_N_S_pwmleds
#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_pwmleds_S_pwm_led_0_ORD 15

/* Ordinals for what this node depends on directly: */
#define DT_N_S_pwmleds_S_pwm_led_0_REQUIRES_ORDS \
	11, /* /pwmleds */ \
	14, /* /sw-pwm */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_pwmleds_S_pwm_led_0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_pwmleds_S_pwm_led_0_EXISTS 1
#define DT_N_ALIAS_pwm_led0     DT_N_S_pwmleds_S_pwm_led_0
#define DT_N_NODELABEL_pwm_led0 DT_N_S_pwmleds_S_pwm_led_0

/* Special property macros: */
#define DT_N_S_pwmleds_S_pwm_led_0_REG_NUM 0
#define DT_N_S_pwmleds_S_pwm_led_0_IRQ_NUM 0
#define DT_N_S_pwmleds_S_pwm_led_0_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_EXISTS 1
#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_PH DT_N_S_sw_pwm
#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_channel 21
#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_channel_EXISTS 1
#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_LEN 1
#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_EXISTS 1

/*
 * Devicetree node: /soc/adc@40007000
 *
 * Node identifier: DT_N_S_soc_S_adc_40007000
 *
 * Binding (compatible = nordic,nrf-adc):
 *   C:/ncs/zephyr/dts/bindings\adc\nordic,nrf-adc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_adc_40007000_PATH "/soc/adc@40007000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_adc_40007000_FULL_NAME "adc@40007000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_adc_40007000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_adc_40007000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_adc_40007000_ORD 16

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_adc_40007000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_adc_40007000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_adc_40007000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_adc DT_N_S_soc_S_adc_40007000
#define DT_N_NODELABEL_adc         DT_N_S_soc_S_adc_40007000

/* Special property macros: */
#define DT_N_S_soc_S_adc_40007000_REG_NUM 1
#define DT_N_S_soc_S_adc_40007000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_REG_IDX_0_VAL_ADDRESS 1073770496 /* 0x40007000 */
#define DT_N_S_soc_S_adc_40007000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_adc_40007000_IRQ_NUM 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_irq 7
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_COMPAT_MATCHES_nordic_nrf_adc 1
#define DT_N_S_soc_S_adc_40007000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_adc_40007000_P_reg {1073770496 /* 0x40007000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_0 1073770496
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_reg_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts {7 /* 0x7 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_0 7
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_label "ADC_0"
#define DT_N_S_soc_S_adc_40007000_P_label_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_status "okay"
#define DT_N_S_soc_S_adc_40007000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_adc_40007000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_adc_40007000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_adc_40007000_P_status_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_compatible {"nordic,nrf-adc"}
#define DT_N_S_soc_S_adc_40007000_P_compatible_IDX_0 "nordic,nrf-adc"
#define DT_N_S_soc_S_adc_40007000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_compatible_LEN 1
#define DT_N_S_soc_S_adc_40007000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/clock@40000000
 *
 * Node identifier: DT_N_S_soc_S_clock_40000000
 *
 * Binding (compatible = nordic,nrf-clock):
 *   C:/ncs/zephyr/dts/bindings\clock\nordic,nrf-clock.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_clock_40000000_PATH "/soc/clock@40000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_clock_40000000_FULL_NAME "clock@40000000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_clock_40000000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_clock_40000000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_clock_40000000_ORD 17

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_clock_40000000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_clock_40000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_clock_40000000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_clock DT_N_S_soc_S_clock_40000000
#define DT_N_NODELABEL_clock         DT_N_S_soc_S_clock_40000000

/* Special property macros: */
#define DT_N_S_soc_S_clock_40000000_REG_NUM 1
#define DT_N_S_soc_S_clock_40000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_REG_IDX_0_VAL_ADDRESS 1073741824 /* 0x40000000 */
#define DT_N_S_soc_S_clock_40000000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_clock_40000000_IRQ_NUM 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_irq 0
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_COMPAT_MATCHES_nordic_nrf_clock 1
#define DT_N_S_soc_S_clock_40000000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_clock_40000000_P_label "CLOCK"
#define DT_N_S_soc_S_clock_40000000_P_label_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_reg {1073741824 /* 0x40000000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_0 1073741824
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts {0 /* 0x0 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_0 0
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_status "okay"
#define DT_N_S_soc_S_clock_40000000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_clock_40000000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_clock_40000000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_clock_40000000_P_status_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_compatible {"nordic,nrf-clock"}
#define DT_N_S_soc_S_clock_40000000_P_compatible_IDX_0 "nordic,nrf-clock"
#define DT_N_S_soc_S_clock_40000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_compatible_LEN 1
#define DT_N_S_soc_S_clock_40000000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/ecb@4000e000
 *
 * Node identifier: DT_N_S_soc_S_ecb_4000e000
 *
 * Binding (compatible = nordic,nrf-ecb):
 *   C:/ncs/zephyr/dts/bindings\crypto\nordic,nrf-ecb.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_ecb_4000e000_PATH "/soc/ecb@4000e000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_ecb_4000e000_FULL_NAME "ecb@4000e000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_ecb_4000e000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_ecb_4000e000_ORD 18

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_ecb_4000e000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_ecb_4000e000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_ecb_4000e000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_ecb DT_N_S_soc_S_ecb_4000e000
#define DT_N_NODELABEL_ecb         DT_N_S_soc_S_ecb_4000e000

/* Special property macros: */
#define DT_N_S_soc_S_ecb_4000e000_REG_NUM 1
#define DT_N_S_soc_S_ecb_4000e000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_REG_IDX_0_VAL_ADDRESS 1073799168 /* 0x4000e000 */
#define DT_N_S_soc_S_ecb_4000e000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_ecb_4000e000_IRQ_NUM 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_irq 14
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_COMPAT_MATCHES_nordic_nrf_ecb 1
#define DT_N_S_soc_S_ecb_4000e000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_ecb_4000e000_P_reg {1073799168 /* 0x4000e000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_0 1073799168
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_reg_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts {14 /* 0xe */, 1 /* 0x1 */}
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_0 14
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_status "okay"
#define DT_N_S_soc_S_ecb_4000e000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_ecb_4000e000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_ecb_4000e000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ecb_4000e000_P_status_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_compatible {"nordic,nrf-ecb"}
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_IDX_0 "nordic,nrf-ecb"
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_LEN 1
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_label "ECB"
#define DT_N_S_soc_S_ecb_4000e000_P_label_EXISTS 1

/*
 * Devicetree node: /soc/gpiote@40006000
 *
 * Node identifier: DT_N_S_soc_S_gpiote_40006000
 *
 * Binding (compatible = nordic,nrf-gpiote):
 *   C:/ncs/zephyr/dts/bindings\gpio\nordic,nrf-gpiote.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_gpiote_40006000_PATH "/soc/gpiote@40006000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_gpiote_40006000_FULL_NAME "gpiote@40006000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_gpiote_40006000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_gpiote_40006000_ORD 19

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_gpiote_40006000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_gpiote_40006000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_gpiote_40006000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_gpiote DT_N_S_soc_S_gpiote_40006000
#define DT_N_NODELABEL_gpiote         DT_N_S_soc_S_gpiote_40006000

/* Special property macros: */
#define DT_N_S_soc_S_gpiote_40006000_REG_NUM 1
#define DT_N_S_soc_S_gpiote_40006000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_REG_IDX_0_VAL_ADDRESS 1073766400 /* 0x40006000 */
#define DT_N_S_soc_S_gpiote_40006000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_gpiote_40006000_IRQ_NUM 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_irq 6
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_COMPAT_MATCHES_nordic_nrf_gpiote 1
#define DT_N_S_soc_S_gpiote_40006000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_gpiote_40006000_P_reg {1073766400 /* 0x40006000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_0 1073766400
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_reg_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts {6 /* 0x6 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_0 6
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_label "GPIOTE_0"
#define DT_N_S_soc_S_gpiote_40006000_P_label_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_status "okay"
#define DT_N_S_soc_S_gpiote_40006000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_gpiote_40006000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_gpiote_40006000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpiote_40006000_P_status_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_compatible {"nordic,nrf-gpiote"}
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_IDX_0 "nordic,nrf-gpiote"
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_LEN 1
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/i2c@40003000
 *
 * Node identifier: DT_N_S_soc_S_i2c_40003000
 *
 * Binding (compatible = nordic,nrf-twi):
 *   C:/ncs/zephyr/dts/bindings\i2c\nordic,nrf-twi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_i2c_40003000_PATH "/soc/i2c@40003000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_i2c_40003000_FULL_NAME "i2c@40003000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_i2c_40003000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_i2c_40003000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_i2c_40003000_ORD 20

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_i2c_40003000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_i2c_40003000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_i2c_40003000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_twi DT_N_S_soc_S_i2c_40003000
#define DT_N_NODELABEL_i2c0        DT_N_S_soc_S_i2c_40003000

/* Special property macros: */
#define DT_N_S_soc_S_i2c_40003000_REG_NUM 1
#define DT_N_S_soc_S_i2c_40003000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_REG_IDX_0_VAL_ADDRESS 1073754112 /* 0x40003000 */
#define DT_N_S_soc_S_i2c_40003000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_i2c_40003000_IRQ_NUM 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_irq 3
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_COMPAT_MATCHES_nordic_nrf_twi 1
#define DT_N_S_soc_S_i2c_40003000_STATUS_disabled 1

/* Generic property macros: */
#define DT_N_S_soc_S_i2c_40003000_P_reg {1073754112 /* 0x40003000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_0 1073754112
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_reg_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts {3 /* 0x3 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_0 3
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_clock_frequency 100000
#define DT_N_S_soc_S_i2c_40003000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_label "I2C_0"
#define DT_N_S_soc_S_i2c_40003000_P_label_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_status "disabled"
#define DT_N_S_soc_S_i2c_40003000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_i2c_40003000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_i2c_40003000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_i2c_40003000_P_status_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_compatible {"nordic,nrf-twi"}
#define DT_N_S_soc_S_i2c_40003000_P_compatible_IDX_0 "nordic,nrf-twi"
#define DT_N_S_soc_S_i2c_40003000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_compatible_LEN 1
#define DT_N_S_soc_S_i2c_40003000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/i2c@40004000
 *
 * Node identifier: DT_N_S_soc_S_i2c_40004000
 *
 * Binding (compatible = nordic,nrf-twi):
 *   C:/ncs/zephyr/dts/bindings\i2c\nordic,nrf-twi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_i2c_40004000_PATH "/soc/i2c@40004000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_i2c_40004000_FULL_NAME "i2c@40004000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_i2c_40004000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_i2c_40004000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_i2c_40004000_ORD 21

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_i2c_40004000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_i2c_40004000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_i2c_40004000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_twi DT_N_S_soc_S_i2c_40004000
#define DT_N_NODELABEL_i2c1        DT_N_S_soc_S_i2c_40004000

/* Special property macros: */
#define DT_N_S_soc_S_i2c_40004000_REG_NUM 1
#define DT_N_S_soc_S_i2c_40004000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_REG_IDX_0_VAL_ADDRESS 1073758208 /* 0x40004000 */
#define DT_N_S_soc_S_i2c_40004000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_i2c_40004000_IRQ_NUM 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_VAL_irq 4
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_COMPAT_MATCHES_nordic_nrf_twi 1
#define DT_N_S_soc_S_i2c_40004000_STATUS_disabled 1

/* Generic property macros: */
#define DT_N_S_soc_S_i2c_40004000_P_reg {1073758208 /* 0x40004000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_i2c_40004000_P_reg_IDX_0 1073758208
#define DT_N_S_soc_S_i2c_40004000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_i2c_40004000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_reg_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_interrupts {4 /* 0x4 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_IDX_0 4
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_clock_frequency 100000
#define DT_N_S_soc_S_i2c_40004000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_label "I2C_1"
#define DT_N_S_soc_S_i2c_40004000_P_label_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_status "disabled"
#define DT_N_S_soc_S_i2c_40004000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_i2c_40004000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_i2c_40004000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_i2c_40004000_P_status_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_compatible {"nordic,nrf-twi"}
#define DT_N_S_soc_S_i2c_40004000_P_compatible_IDX_0 "nordic,nrf-twi"
#define DT_N_S_soc_S_i2c_40004000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_compatible_LEN 1
#define DT_N_S_soc_S_i2c_40004000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/memory@20000000
 *
 * Node identifier: DT_N_S_soc_S_memory_20000000
 *
 * Binding (compatible = mmio-sram):
 *   C:/ncs/zephyr/dts/bindings\sram\mmio-sram.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_memory_20000000_PATH "/soc/memory@20000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_memory_20000000_FULL_NAME "memory@20000000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_memory_20000000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_memory_20000000_ORD 22

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_memory_20000000_REQUIRES_ORDS \
	6, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_memory_20000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_memory_20000000_EXISTS 1
#define DT_N_INST_0_mmio_sram DT_N_S_soc_S_memory_20000000
#define DT_N_NODELABEL_sram0  DT_N_S_soc_S_memory_20000000

/* Special property macros: */
#define DT_N_S_soc_S_memory_20000000_REG_NUM 1
#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_VAL_ADDRESS 536870912 /* 0x20000000 */
#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_VAL_SIZE 32768 /* 0x8000 */
#define DT_N_S_soc_S_memory_20000000_IRQ_NUM 0
#define DT_N_S_soc_S_memory_20000000_COMPAT_MATCHES_mmio_sram 1
#define DT_N_S_soc_S_memory_20000000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_memory_20000000_P_reg {536870912 /* 0x20000000 */, 32768 /* 0x8000 */}
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_0 536870912
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_1 32768
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_compatible {"mmio-sram"}
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0 "mmio-sram"
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_compatible_LEN 1
#define DT_N_S_soc_S_memory_20000000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/qdec@40012000
 *
 * Node identifier: DT_N_S_soc_S_qdec_40012000
 *
 * Binding (compatible = nordic,nrf-qdec):
 *   C:/ncs/zephyr/dts/bindings\sensor\nordic,nrf-qdec.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_qdec_40012000_PATH "/soc/qdec@40012000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_qdec_40012000_FULL_NAME "qdec@40012000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_qdec_40012000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_qdec_40012000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_qdec_40012000_ORD 23

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_qdec_40012000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_qdec_40012000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_qdec_40012000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_qdec DT_N_S_soc_S_qdec_40012000
#define DT_N_NODELABEL_qdec         DT_N_S_soc_S_qdec_40012000

/* Special property macros: */
#define DT_N_S_soc_S_qdec_40012000_REG_NUM 1
#define DT_N_S_soc_S_qdec_40012000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_REG_IDX_0_VAL_ADDRESS 1073815552 /* 0x40012000 */
#define DT_N_S_soc_S_qdec_40012000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_qdec_40012000_IRQ_NUM 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_irq 18
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_COMPAT_MATCHES_nordic_nrf_qdec 1
#define DT_N_S_soc_S_qdec_40012000_STATUS_disabled 1

/* Generic property macros: */
#define DT_N_S_soc_S_qdec_40012000_P_reg {1073815552 /* 0x40012000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_0 1073815552
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_reg_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts {18 /* 0x12 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_0 18
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_label "QDEC"
#define DT_N_S_soc_S_qdec_40012000_P_label_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_status "disabled"
#define DT_N_S_soc_S_qdec_40012000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_qdec_40012000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_qdec_40012000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_qdec_40012000_P_status_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_compatible {"nordic,nrf-qdec"}
#define DT_N_S_soc_S_qdec_40012000_P_compatible_IDX_0 "nordic,nrf-qdec"
#define DT_N_S_soc_S_qdec_40012000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_compatible_LEN 1
#define DT_N_S_soc_S_qdec_40012000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/random@4000d000
 *
 * Node identifier: DT_N_S_soc_S_random_4000d000
 *
 * Binding (compatible = nordic,nrf-rng):
 *   C:/ncs/zephyr/dts/bindings\rng\nordic,nrf-rng.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_random_4000d000_PATH "/soc/random@4000d000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_random_4000d000_FULL_NAME "random@4000d000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_random_4000d000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_random_4000d000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_random_4000d000_ORD 24

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_random_4000d000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_random_4000d000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_random_4000d000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_rng DT_N_S_soc_S_random_4000d000
#define DT_N_NODELABEL_rng         DT_N_S_soc_S_random_4000d000

/* Special property macros: */
#define DT_N_S_soc_S_random_4000d000_REG_NUM 1
#define DT_N_S_soc_S_random_4000d000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_REG_IDX_0_VAL_ADDRESS 1073795072 /* 0x4000d000 */
#define DT_N_S_soc_S_random_4000d000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_random_4000d000_IRQ_NUM 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_irq 13
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_COMPAT_MATCHES_nordic_nrf_rng 1
#define DT_N_S_soc_S_random_4000d000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_random_4000d000_P_reg {1073795072 /* 0x4000d000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_0 1073795072
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_reg_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts {13 /* 0xd */, 1 /* 0x1 */}
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_0 13
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_status "okay"
#define DT_N_S_soc_S_random_4000d000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_random_4000d000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_random_4000d000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_random_4000d000_P_status_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_compatible {"nordic,nrf-rng"}
#define DT_N_S_soc_S_random_4000d000_P_compatible_IDX_0 "nordic,nrf-rng"
#define DT_N_S_soc_S_random_4000d000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_compatible_LEN 1
#define DT_N_S_soc_S_random_4000d000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_label "RNG"
#define DT_N_S_soc_S_random_4000d000_P_label_EXISTS 1

/*
 * Devicetree node: /soc/rtc@4000b000
 *
 * Node identifier: DT_N_S_soc_S_rtc_4000b000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   C:/ncs/zephyr/dts/bindings\rtc\nordic,nrf-rtc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_rtc_4000b000_PATH "/soc/rtc@4000b000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_rtc_4000b000_FULL_NAME "rtc@4000b000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_rtc_4000b000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_rtc_4000b000_ORD 25

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_rtc_4000b000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_rtc_4000b000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_rtc_4000b000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_rtc DT_N_S_soc_S_rtc_4000b000
#define DT_N_NODELABEL_rtc0        DT_N_S_soc_S_rtc_4000b000

/* Special property macros: */
#define DT_N_S_soc_S_rtc_4000b000_REG_NUM 1
#define DT_N_S_soc_S_rtc_4000b000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_REG_IDX_0_VAL_ADDRESS 1073786880 /* 0x4000b000 */
#define DT_N_S_soc_S_rtc_4000b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_rtc_4000b000_IRQ_NUM 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_irq 11
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_COMPAT_MATCHES_nordic_nrf_rtc 1
#define DT_N_S_soc_S_rtc_4000b000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_rtc_4000b000_P_reg {1073786880 /* 0x4000b000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_0 1073786880
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_reg_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_cc_num 3
#define DT_N_S_soc_S_rtc_4000b000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_ppi_wrap 0
#define DT_N_S_soc_S_rtc_4000b000_P_ppi_wrap_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_fixed_top 0
#define DT_N_S_soc_S_rtc_4000b000_P_fixed_top_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_clock_frequency 32768
#define DT_N_S_soc_S_rtc_4000b000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_label "RTC_0"
#define DT_N_S_soc_S_rtc_4000b000_P_label_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts {11 /* 0xb */, 1 /* 0x1 */}
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_0 11
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_prescaler 1
#define DT_N_S_soc_S_rtc_4000b000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_status "okay"
#define DT_N_S_soc_S_rtc_4000b000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_rtc_4000b000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_rtc_4000b000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_rtc_4000b000_P_status_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_compatible {"nordic,nrf-rtc"}
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_IDX_0 "nordic,nrf-rtc"
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_LEN 1
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/rtc@40011000
 *
 * Node identifier: DT_N_S_soc_S_rtc_40011000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   C:/ncs/zephyr/dts/bindings\rtc\nordic,nrf-rtc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_rtc_40011000_PATH "/soc/rtc@40011000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_rtc_40011000_FULL_NAME "rtc@40011000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_rtc_40011000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_rtc_40011000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_rtc_40011000_ORD 26

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_rtc_40011000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_rtc_40011000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_rtc_40011000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_rtc DT_N_S_soc_S_rtc_40011000
#define DT_N_NODELABEL_rtc1        DT_N_S_soc_S_rtc_40011000

/* Special property macros: */
#define DT_N_S_soc_S_rtc_40011000_REG_NUM 1
#define DT_N_S_soc_S_rtc_40011000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_REG_IDX_0_VAL_ADDRESS 1073811456 /* 0x40011000 */
#define DT_N_S_soc_S_rtc_40011000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_rtc_40011000_IRQ_NUM 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_irq 17
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_COMPAT_MATCHES_nordic_nrf_rtc 1
#define DT_N_S_soc_S_rtc_40011000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_rtc_40011000_P_reg {1073811456 /* 0x40011000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_0 1073811456
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_reg_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_cc_num 4
#define DT_N_S_soc_S_rtc_40011000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_ppi_wrap 0
#define DT_N_S_soc_S_rtc_40011000_P_ppi_wrap_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_fixed_top 0
#define DT_N_S_soc_S_rtc_40011000_P_fixed_top_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_clock_frequency 32768
#define DT_N_S_soc_S_rtc_40011000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_label "RTC_1"
#define DT_N_S_soc_S_rtc_40011000_P_label_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts {17 /* 0x11 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_0 17
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_prescaler 1
#define DT_N_S_soc_S_rtc_40011000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_status "okay"
#define DT_N_S_soc_S_rtc_40011000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_rtc_40011000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_rtc_40011000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_rtc_40011000_P_status_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_compatible {"nordic,nrf-rtc"}
#define DT_N_S_soc_S_rtc_40011000_P_compatible_IDX_0 "nordic,nrf-rtc"
#define DT_N_S_soc_S_rtc_40011000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_compatible_LEN 1
#define DT_N_S_soc_S_rtc_40011000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/spi@40003000
 *
 * Node identifier: DT_N_S_soc_S_spi_40003000
 *
 * Binding (compatible = nordic,nrf-spi):
 *   C:/ncs/zephyr/dts/bindings\spi\nordic,nrf-spi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_spi_40003000_PATH "/soc/spi@40003000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_spi_40003000_FULL_NAME "spi@40003000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_spi_40003000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_spi_40003000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_spi_40003000_ORD 27

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_spi_40003000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_spi_40003000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_spi_40003000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_spi DT_N_S_soc_S_spi_40003000
#define DT_N_NODELABEL_spi0        DT_N_S_soc_S_spi_40003000

/* Special property macros: */
#define DT_N_S_soc_S_spi_40003000_REG_NUM 1
#define DT_N_S_soc_S_spi_40003000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_REG_IDX_0_VAL_ADDRESS 1073754112 /* 0x40003000 */
#define DT_N_S_soc_S_spi_40003000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_spi_40003000_IRQ_NUM 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_irq 3
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_COMPAT_MATCHES_nordic_nrf_spi 1
#define DT_N_S_soc_S_spi_40003000_STATUS_disabled 1

/* Generic property macros: */
#define DT_N_S_soc_S_spi_40003000_P_miso_pull_up 0
#define DT_N_S_soc_S_spi_40003000_P_miso_pull_up_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_miso_pull_down 0
#define DT_N_S_soc_S_spi_40003000_P_miso_pull_down_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_reg {1073754112 /* 0x40003000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_0 1073754112
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_reg_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts {3 /* 0x3 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_0 3
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_label "SPI_0"
#define DT_N_S_soc_S_spi_40003000_P_label_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_status "disabled"
#define DT_N_S_soc_S_spi_40003000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_spi_40003000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_spi_40003000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_spi_40003000_P_status_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_compatible {"nordic,nrf-spi"}
#define DT_N_S_soc_S_spi_40003000_P_compatible_IDX_0 "nordic,nrf-spi"
#define DT_N_S_soc_S_spi_40003000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_compatible_LEN 1
#define DT_N_S_soc_S_spi_40003000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/spi@40004000
 *
 * Node identifier: DT_N_S_soc_S_spi_40004000
 */

/* Node's full path: */
#define DT_N_S_soc_S_spi_40004000_PATH "/soc/spi@40004000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_spi_40004000_FULL_NAME "spi@40004000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_spi_40004000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_spi_40004000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_spi_40004000_ORD 28

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_spi_40004000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_spi_40004000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_spi_40004000_EXISTS 1
#define DT_N_NODELABEL_spi1 DT_N_S_soc_S_spi_40004000

/* Special property macros: */
#define DT_N_S_soc_S_spi_40004000_REG_NUM 1
#define DT_N_S_soc_S_spi_40004000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_REG_IDX_0_VAL_ADDRESS 1073758208 /* 0x40004000 */
#define DT_N_S_soc_S_spi_40004000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_spi_40004000_IRQ_NUM 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_irq 4
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_STATUS_disabled 1

/* Generic property macros: */
#define DT_N_S_soc_S_spi_40004000_P_reg {1073758208 /* 0x40004000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_0 1073758208
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_reg_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts {4 /* 0x4 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_0 4
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_status "disabled"
#define DT_N_S_soc_S_spi_40004000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_spi_40004000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_spi_40004000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_spi_40004000_P_status_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_label "SPI_1"
#define DT_N_S_soc_S_spi_40004000_P_label_EXISTS 1

/*
 * Devicetree node: /soc/temp@4000c000
 *
 * Node identifier: DT_N_S_soc_S_temp_4000c000
 *
 * Binding (compatible = nordic,nrf-temp):
 *   C:/ncs/zephyr/dts/bindings\sensor\nordic,nrf-temp.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_temp_4000c000_PATH "/soc/temp@4000c000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_temp_4000c000_FULL_NAME "temp@4000c000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_temp_4000c000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_temp_4000c000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_temp_4000c000_ORD 29

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_temp_4000c000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_temp_4000c000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_temp_4000c000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_temp DT_N_S_soc_S_temp_4000c000
#define DT_N_NODELABEL_temp         DT_N_S_soc_S_temp_4000c000

/* Special property macros: */
#define DT_N_S_soc_S_temp_4000c000_REG_NUM 1
#define DT_N_S_soc_S_temp_4000c000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_REG_IDX_0_VAL_ADDRESS 1073790976 /* 0x4000c000 */
#define DT_N_S_soc_S_temp_4000c000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_temp_4000c000_IRQ_NUM 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_irq 12
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_COMPAT_MATCHES_nordic_nrf_temp 1
#define DT_N_S_soc_S_temp_4000c000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_temp_4000c000_P_reg {1073790976 /* 0x4000c000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_0 1073790976
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_reg_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts {12 /* 0xc */, 1 /* 0x1 */}
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_0 12
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_label "TEMP_0"
#define DT_N_S_soc_S_temp_4000c000_P_label_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_status "okay"
#define DT_N_S_soc_S_temp_4000c000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_temp_4000c000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_temp_4000c000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_temp_4000c000_P_status_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_compatible {"nordic,nrf-temp"}
#define DT_N_S_soc_S_temp_4000c000_P_compatible_IDX_0 "nordic,nrf-temp"
#define DT_N_S_soc_S_temp_4000c000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_compatible_LEN 1
#define DT_N_S_soc_S_temp_4000c000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/timer@40008000
 *
 * Node identifier: DT_N_S_soc_S_timer_40008000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   C:/ncs/zephyr/dts/bindings\timer\nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_40008000_PATH "/soc/timer@40008000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_40008000_FULL_NAME "timer@40008000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_40008000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_timer_40008000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_40008000_ORD 30

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_40008000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_40008000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_40008000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_timer DT_N_S_soc_S_timer_40008000
#define DT_N_NODELABEL_timer0        DT_N_S_soc_S_timer_40008000

/* Special property macros: */
#define DT_N_S_soc_S_timer_40008000_REG_NUM 1
#define DT_N_S_soc_S_timer_40008000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_REG_IDX_0_VAL_ADDRESS 1073774592 /* 0x40008000 */
#define DT_N_S_soc_S_timer_40008000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_40008000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_irq 8
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_40008000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_timer_40008000_P_reg {1073774592 /* 0x40008000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_0 1073774592
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_cc_num 4
#define DT_N_S_soc_S_timer_40008000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts {8 /* 0x8 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_0 8
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_label "TIMER_0"
#define DT_N_S_soc_S_timer_40008000_P_label_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_prescaler 0
#define DT_N_S_soc_S_timer_40008000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_status "okay"
#define DT_N_S_soc_S_timer_40008000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_timer_40008000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_timer_40008000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_40008000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_40008000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_40008000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_40008000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/timer@4000a000
 *
 * Node identifier: DT_N_S_soc_S_timer_4000a000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   C:/ncs/zephyr/dts/bindings\timer\nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_4000a000_PATH "/soc/timer@4000a000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_4000a000_FULL_NAME "timer@4000a000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_4000a000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_timer_4000a000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_4000a000_ORD 31

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_4000a000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_4000a000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_4000a000_EXISTS 1
#define DT_N_INST_2_nordic_nrf_timer DT_N_S_soc_S_timer_4000a000
#define DT_N_NODELABEL_timer2        DT_N_S_soc_S_timer_4000a000

/* Special property macros: */
#define DT_N_S_soc_S_timer_4000a000_REG_NUM 1
#define DT_N_S_soc_S_timer_4000a000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_REG_IDX_0_VAL_ADDRESS 1073782784 /* 0x4000a000 */
#define DT_N_S_soc_S_timer_4000a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_4000a000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_irq 10
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_4000a000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_timer_4000a000_P_reg {1073782784 /* 0x4000a000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_0 1073782784
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_cc_num 4
#define DT_N_S_soc_S_timer_4000a000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts {10 /* 0xa */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_0 10
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_label "TIMER_2"
#define DT_N_S_soc_S_timer_4000a000_P_label_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_prescaler 0
#define DT_N_S_soc_S_timer_4000a000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_status "okay"
#define DT_N_S_soc_S_timer_4000a000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_timer_4000a000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_timer_4000a000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_4000a000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_4000a000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_4000a000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_4000a000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/uart@40002000
 *
 * Node identifier: DT_N_S_soc_S_uart_40002000
 *
 * Binding (compatible = nordic,nrf-uart):
 *   C:/ncs/zephyr/dts/bindings\serial\nordic,nrf-uart.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_uart_40002000_PATH "/soc/uart@40002000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_uart_40002000_FULL_NAME "uart@40002000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_uart_40002000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_uart_40002000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_uart_40002000_ORD 32

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_uart_40002000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_uart_40002000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_uart_40002000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_uart DT_N_S_soc_S_uart_40002000
#define DT_N_NODELABEL_uart0        DT_N_S_soc_S_uart_40002000

/* Special property macros: */
#define DT_N_S_soc_S_uart_40002000_REG_NUM 1
#define DT_N_S_soc_S_uart_40002000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_REG_IDX_0_VAL_ADDRESS 1073750016 /* 0x40002000 */
#define DT_N_S_soc_S_uart_40002000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_uart_40002000_IRQ_NUM 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_irq 2
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_COMPAT_MATCHES_nordic_nrf_uart 1
#define DT_N_S_soc_S_uart_40002000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_uart_40002000_P_reg {1073750016 /* 0x40002000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_0 1073750016
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_reg_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts {2 /* 0x2 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_0 2
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_tx_pin 1
#define DT_N_S_soc_S_uart_40002000_P_tx_pin_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_rx_pin 3
#define DT_N_S_soc_S_uart_40002000_P_rx_pin_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_rts_pin 0
#define DT_N_S_soc_S_uart_40002000_P_rts_pin_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_cts_pin 2
#define DT_N_S_soc_S_uart_40002000_P_cts_pin_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_current_speed 115200
#define DT_N_S_soc_S_uart_40002000_P_current_speed_ENUM_IDX 12
#define DT_N_S_soc_S_uart_40002000_P_current_speed_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_label "UART_0"
#define DT_N_S_soc_S_uart_40002000_P_label_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_hw_flow_control 0
#define DT_N_S_soc_S_uart_40002000_P_hw_flow_control_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_status "okay"
#define DT_N_S_soc_S_uart_40002000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_uart_40002000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_uart_40002000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_uart_40002000_P_status_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_compatible {"nordic,nrf-uart"}
#define DT_N_S_soc_S_uart_40002000_P_compatible_IDX_0 "nordic,nrf-uart"
#define DT_N_S_soc_S_uart_40002000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_compatible_LEN 1
#define DT_N_S_soc_S_uart_40002000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/watchdog@40010000
 *
 * Node identifier: DT_N_S_soc_S_watchdog_40010000
 *
 * Binding (compatible = nordic,nrf-watchdog):
 *   C:/ncs/zephyr/dts/bindings\watchdog\nordic,nrf-watchdog.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_watchdog_40010000_PATH "/soc/watchdog@40010000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_watchdog_40010000_FULL_NAME "watchdog@40010000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_watchdog_40010000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_watchdog_40010000_ORD 33

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_watchdog_40010000_REQUIRES_ORDS \
	6, /* /soc */ \
	12, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_watchdog_40010000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_watchdog_40010000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_watchdog DT_N_S_soc_S_watchdog_40010000
#define DT_N_NODELABEL_wdt              DT_N_S_soc_S_watchdog_40010000
#define DT_N_NODELABEL_wdt0             DT_N_S_soc_S_watchdog_40010000

/* Special property macros: */
#define DT_N_S_soc_S_watchdog_40010000_REG_NUM 1
#define DT_N_S_soc_S_watchdog_40010000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_REG_IDX_0_VAL_ADDRESS 1073807360 /* 0x40010000 */
#define DT_N_S_soc_S_watchdog_40010000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_watchdog_40010000_IRQ_NUM 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_irq 16
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_COMPAT_MATCHES_nordic_nrf_watchdog 1
#define DT_N_S_soc_S_watchdog_40010000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_watchdog_40010000_P_reg {1073807360 /* 0x40010000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_0 1073807360
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_reg_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_label "WDT"
#define DT_N_S_soc_S_watchdog_40010000_P_label_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts {16 /* 0x10 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_0 16
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_status "okay"
#define DT_N_S_soc_S_watchdog_40010000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_watchdog_40010000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_watchdog_40010000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_watchdog_40010000_P_status_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_compatible {"nordic,nrf-watchdog"}
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_IDX_0 "nordic,nrf-watchdog"
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_LEN 1
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000
 *
 * Binding (compatible = nordic,nrf51-flash-controller):
 *   C:/ncs/zephyr/dts/bindings\flash_controller\nordic,nrf51-flash-controller.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_PATH "/soc/flash-controller@4001e000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_FULL_NAME "flash-controller@4001e000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0)

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_ORD 34

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_REQUIRES_ORDS \
	6, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_SUPPORTS_ORDS \
	35, /* /soc/flash-controller@4001e000/flash@0 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_EXISTS 1
#define DT_N_INST_0_nordic_nrf51_flash_controller DT_N_S_soc_S_flash_controller_4001e000
#define DT_N_NODELABEL_flash_controller           DT_N_S_soc_S_flash_controller_4001e000

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_REG_IDX_0_VAL_ADDRESS 1073864704 /* 0x4001e000 */
#define DT_N_S_soc_S_flash_controller_4001e000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_flash_controller_4001e000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_COMPAT_MATCHES_nordic_nrf51_flash_controller 1
#define DT_N_S_soc_S_flash_controller_4001e000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_P_label "NRF_FLASH_DRV_NAME"
#define DT_N_S_soc_S_flash_controller_4001e000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg {1073864704 /* 0x4001e000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_0 1073864704
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible {"nordic,nrf51-flash-controller"}
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_IDX_0 "nordic,nrf51-flash-controller"
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_LEN 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0
 *
 * Binding (compatible = soc-nv-flash):
 *   C:/ncs/zephyr/dts/bindings\mtd\soc-nv-flash.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_PATH "/soc/flash-controller@4001e000/flash@0"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FULL_NAME "flash@0"

/* Node parent (/soc/flash-controller@4001e000) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_PARENT DT_N_S_soc_S_flash_controller_4001e000
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions)

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_ORD 35

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REQUIRES_ORDS \
	34, /* /soc/flash-controller@4001e000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_SUPPORTS_ORDS \
	36, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_EXISTS 1
#define DT_N_INST_0_soc_nv_flash DT_N_S_soc_S_flash_controller_4001e000_S_flash_0
#define DT_N_NODELABEL_flash0    DT_N_S_soc_S_flash_controller_4001e000_S_flash_0

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_IDX_0_VAL_SIZE 262144 /* 0x40000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_COMPAT_MATCHES_soc_nv_flash 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_label "NRF_FLASH"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_erase_block_size 1024
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_erase_block_size_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_write_block_size 4
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_write_block_size_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible {"soc-nv-flash"}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_IDX_0 "soc-nv-flash"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_LEN 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg {0 /* 0x0 */, 262144 /* 0x40000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_0 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_1 262144
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
 *
 * Binding (compatible = fixed-partitions):
 *   C:/ncs/zephyr/dts/bindings\mtd\partition.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_PATH "/soc/flash-controller@4001e000/flash@0/partitions"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FULL_NAME "partitions"

/* Node parent (/soc/flash-controller@4001e000/flash@0) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000)

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_ORD 36

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_REQUIRES_ORDS \
	35, /* /soc/flash-controller@4001e000/flash@0 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_SUPPORTS_ORDS \
	37, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@0 */ \
	38, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@8000 */ \
	39, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@22000 */ \
	40, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@3c000 */ \
	41, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@3e000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_EXISTS 1
#define DT_N_INST_0_fixed_partitions DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_REG_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_COMPAT_MATCHES_fixed_partitions 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_STATUS_okay 1

/* (No generic property macros) */

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@0
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@0"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FULL_NAME "partition@0"

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_ORD 37

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REQUIRES_ORDS \
	36, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_EXISTS 1
#define DT_N_NODELABEL_boot_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_VAL_SIZE 32768 /* 0x8000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_STATUS_okay 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_PARTITION_ID 0

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label "mcuboot"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg {0 /* 0x0 */, 32768 /* 0x8000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_0 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_1 32768
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@8000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@8000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_FULL_NAME "partition@8000"

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_ORD 38

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_REQUIRES_ORDS \
	36, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_EXISTS 1
#define DT_N_NODELABEL_slot0_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_REG_IDX_0_VAL_ADDRESS 32768 /* 0x8000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_REG_IDX_0_VAL_SIZE 106496 /* 0x1a000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_STATUS_okay 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_PARTITION_ID 1

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_P_label "image-0"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_P_reg {32768 /* 0x8000 */, 106496 /* 0x1a000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_P_reg_IDX_0 32768
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_P_reg_IDX_1 106496
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@22000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@22000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_FULL_NAME "partition@22000"

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_ORD 39

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_REQUIRES_ORDS \
	36, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_EXISTS 1
#define DT_N_NODELABEL_slot1_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_REG_IDX_0_VAL_ADDRESS 139264 /* 0x22000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_REG_IDX_0_VAL_SIZE 106496 /* 0x1a000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_STATUS_okay 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_PARTITION_ID 2

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_P_label "image-1"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_P_reg {139264 /* 0x22000 */, 106496 /* 0x1a000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_P_reg_IDX_0 139264
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_P_reg_IDX_1 106496
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@3c000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@3c000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_FULL_NAME "partition@3c000"

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_ORD 40

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_REQUIRES_ORDS \
	36, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_EXISTS 1
#define DT_N_NODELABEL_scratch_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_REG_IDX_0_VAL_ADDRESS 245760 /* 0x3c000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_REG_IDX_0_VAL_SIZE 8192 /* 0x2000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_STATUS_okay 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_PARTITION_ID 3

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_P_label "image-scratch"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_P_reg {245760 /* 0x3c000 */, 8192 /* 0x2000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_P_reg_IDX_0 245760
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_P_reg_IDX_1 8192
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@3e000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@3e000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_FULL_NAME "partition@3e000"

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_FOREACH_CHILD(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_ORD 41

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_REQUIRES_ORDS \
	36, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_EXISTS 1
#define DT_N_NODELABEL_storage_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_REG_IDX_0_VAL_ADDRESS 253952 /* 0x3e000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_REG_IDX_0_VAL_SIZE 8192 /* 0x2000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_STATUS_okay 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_PARTITION_ID 4

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_P_label "storage"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_P_reg {253952 /* 0x3e000 */, 8192 /* 0x2000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_P_reg_IDX_0 253952
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_P_reg_IDX_1 8192
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000_P_reg_EXISTS 1

/*
 * Chosen nodes
 */
#define DT_CHOSEN_zephyr_entropy                 DT_N_S_soc_S_random_4000d000
#define DT_CHOSEN_zephyr_entropy_EXISTS          1
#define DT_CHOSEN_zephyr_flash_controller        DT_N_S_soc_S_flash_controller_4001e000
#define DT_CHOSEN_zephyr_flash_controller_EXISTS 1
#define DT_CHOSEN_zephyr_console                 DT_N_S_soc_S_uart_40002000
#define DT_CHOSEN_zephyr_console_EXISTS          1
#define DT_CHOSEN_zephyr_shell_uart              DT_N_S_soc_S_uart_40002000
#define DT_CHOSEN_zephyr_shell_uart_EXISTS       1
#define DT_CHOSEN_zephyr_uart_mcumgr             DT_N_S_soc_S_uart_40002000
#define DT_CHOSEN_zephyr_uart_mcumgr_EXISTS      1
#define DT_CHOSEN_zephyr_bt_mon_uart             DT_N_S_soc_S_uart_40002000
#define DT_CHOSEN_zephyr_bt_mon_uart_EXISTS      1
#define DT_CHOSEN_zephyr_bt_c2h_uart             DT_N_S_soc_S_uart_40002000
#define DT_CHOSEN_zephyr_bt_c2h_uart_EXISTS      1
#define DT_CHOSEN_zephyr_sram                    DT_N_S_soc_S_memory_20000000
#define DT_CHOSEN_zephyr_sram_EXISTS             1
#define DT_CHOSEN_zephyr_flash                   DT_N_S_soc_S_flash_controller_4001e000_S_flash_0
#define DT_CHOSEN_zephyr_flash_EXISTS            1
#define DT_CHOSEN_zephyr_code_partition          DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000
#define DT_CHOSEN_zephyr_code_partition_EXISTS   1
#define DT_COMPAT_fixed_partitions_LABEL_mcuboot DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0
#define DT_COMPAT_fixed_partitions_LABEL_mcuboot_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_image_0 DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_8000
#define DT_COMPAT_fixed_partitions_LABEL_image_0_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_image_1 DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_22000
#define DT_COMPAT_fixed_partitions_LABEL_image_1_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_image_scratch DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3c000
#define DT_COMPAT_fixed_partitions_LABEL_image_scratch_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_storage DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_3e000
#define DT_COMPAT_fixed_partitions_LABEL_storage_EXISTS 1

/*
 * Macros for compatibles with status "okay" nodes
 */
#define DT_COMPAT_HAS_OKAY_nordic_nrf51_dongle_nrf51422 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf51822_qfac 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf51822 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf51 1
#define DT_COMPAT_HAS_OKAY_simple_bus 1
#define DT_COMPAT_HAS_OKAY_arm_v6m_nvic 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf51_flash_controller 1
#define DT_COMPAT_HAS_OKAY_soc_nv_flash 1
#define DT_COMPAT_HAS_OKAY_fixed_partitions 1
#define DT_COMPAT_HAS_OKAY_mmio_sram 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_adc 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_clock 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_ecb 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_uart 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpiote 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpio 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_rng 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_rtc 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_timer 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_temp 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_watchdog 1
#define DT_COMPAT_HAS_OKAY_arm_cortex_m0 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_sw_pwm 1
#define DT_COMPAT_HAS_OKAY_gpio_leds 1
#define DT_COMPAT_HAS_OKAY_pwm_leds 1

/*
 * Macros for status "okay" instances of each compatible
 */
#define DT_N_INST_nordic_nrf51_dongle_nrf51422_NUM_OKAY 1
#define DT_N_INST_nordic_nrf51822_qfac_NUM_OKAY 1
#define DT_N_INST_nordic_nrf51822_NUM_OKAY 1
#define DT_N_INST_nordic_nrf51_NUM_OKAY 1
#define DT_N_INST_simple_bus_NUM_OKAY 1
#define DT_N_INST_arm_v6m_nvic_NUM_OKAY 1
#define DT_N_INST_nordic_nrf51_flash_controller_NUM_OKAY 1
#define DT_N_INST_soc_nv_flash_NUM_OKAY 1
#define DT_N_INST_fixed_partitions_NUM_OKAY 1
#define DT_N_INST_mmio_sram_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_adc_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_clock_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_ecb_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_uart_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_gpiote_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_gpio_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_rng_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_rtc_NUM_OKAY 2
#define DT_N_INST_nordic_nrf_timer_NUM_OKAY 3
#define DT_N_INST_nordic_nrf_temp_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_watchdog_NUM_OKAY 1
#define DT_N_INST_arm_cortex_m0_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_sw_pwm_NUM_OKAY 1
#define DT_N_INST_gpio_leds_NUM_OKAY 1
#define DT_N_INST_pwm_leds_NUM_OKAY 1
#define DT_FOREACH_OKAY_INST_nordic_nrf51_dongle_nrf51422(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf51822_qfac(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf51822(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf51(fn) fn(0)
#define DT_FOREACH_OKAY_INST_simple_bus(fn) fn(0)
#define DT_FOREACH_OKAY_INST_arm_v6m_nvic(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf51_flash_controller(fn) fn(0)
#define DT_FOREACH_OKAY_INST_soc_nv_flash(fn) fn(0)
#define DT_FOREACH_OKAY_INST_fixed_partitions(fn) fn(0)
#define DT_FOREACH_OKAY_INST_mmio_sram(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_adc(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_clock(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_ecb(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_uart(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_gpiote(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_gpio(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_rng(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_rtc(fn) fn(0) fn(1)
#define DT_FOREACH_OKAY_INST_nordic_nrf_timer(fn) fn(0) fn(1) fn(2)
#define DT_FOREACH_OKAY_INST_nordic_nrf_temp(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_watchdog(fn) fn(0)
#define DT_FOREACH_OKAY_INST_arm_cortex_m0(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_sw_pwm(fn) fn(0)
#define DT_FOREACH_OKAY_INST_gpio_leds(fn) fn(0)
#define DT_FOREACH_OKAY_INST_pwm_leds(fn) fn(0)

/*
 * Bus information for status "okay" nodes of each compatible
 */
