/*
 * Generated by gen_legacy_defines.py
 *
 * DTS input file:
 *   nrf9160dk_nrf9160.dts.pre.tmp
 *
 * Directories with bindings:
 *   E:/Nordiac_semi/ncs/nrf/dts/bindings, $ZEPHYR_BASE\dts\bindings
 *
 * Nodes in dependency order (ordinal and path):
 *   0   /
 *   1   /aliases
 *   2   /chosen
 *   3   /buttons
 *   4   /soc
 *   5   /soc/peripheral@50000000
 *   6   /soc/peripheral@50000000/gpio@842500
 *   7   /buttons/button_0
 *   8   /buttons/button_1
 *   9   /buttons/button_2
 *   10  /buttons/button_3
 *   11  /cpus
 *   12  /cpus/cpu@0
 *   13  /cpus/cpu@0/mpu@e000ed90
 *   14  /leds
 *   15  /leds/led_0
 *   16  /leds/led_1
 *   17  /leds/led_2
 *   18  /leds/led_3
 *   19  /pwmleds
 *   20  /soc/interrupt-controller@e000e100
 *   21  /soc/peripheral@50000000/pwm@21000
 *   22  /pwmleds/pwm_led_0
 *   23  /reserved-memory
 *   24  /reserved-memory/image_bsd@20010000
 *   25  /reserved-memory/image_ns@20020000
 *   26  /reserved-memory/image_s@20000000
 *   27  /soc/ficr@ff0000
 *   28  /soc/gpiote@5000d000
 *   29  /soc/memory@20000000
 *   30  /soc/spu@50003000
 *   31  /soc/timer@e000e010
 *   32  /soc/uicr@ff8000
 *   33  /soc/crypto@50840000
 *   34  /soc/crypto@50840000/crypto@50841000
 *   35  /soc/peripheral@50000000/adc@e000
 *   36  /soc/peripheral@50000000/clock@5000
 *   37  /soc/peripheral@50000000/dppic@17000
 *   38  /soc/peripheral@50000000/egu@1b000
 *   39  /soc/peripheral@50000000/egu@1c000
 *   40  /soc/peripheral@50000000/egu@1d000
 *   41  /soc/peripheral@50000000/egu@1e000
 *   42  /soc/peripheral@50000000/egu@1f000
 *   43  /soc/peripheral@50000000/egu@20000
 *   44  /soc/peripheral@50000000/i2c@8000
 *   45  /soc/peripheral@50000000/i2c@9000
 *   46  /soc/peripheral@50000000/i2c@a000
 *   47  /soc/peripheral@50000000/i2c@b000
 *   48  /soc/peripheral@50000000/i2s@28000
 *   49  /soc/peripheral@50000000/kmu@39000
 *   50  /soc/peripheral@50000000/pdm@26000
 *   51  /soc/peripheral@50000000/power@5000
 *   52  /soc/peripheral@50000000/pwm@22000
 *   53  /soc/peripheral@50000000/pwm@23000
 *   54  /soc/peripheral@50000000/pwm@24000
 *   55  /soc/peripheral@50000000/regulator@4000
 *   56  /soc/peripheral@50000000/rtc@14000
 *   57  /soc/peripheral@50000000/rtc@15000
 *   58  /soc/peripheral@50000000/spi@8000
 *   59  /soc/peripheral@50000000/spi@9000
 *   60  /soc/peripheral@50000000/spi@a000
 *   61  /soc/peripheral@50000000/spi@b000
 *   62  /soc/peripheral@50000000/timer@f000
 *   63  /soc/peripheral@50000000/timer@10000
 *   64  /soc/peripheral@50000000/timer@11000
 *   65  /soc/peripheral@50000000/uart@8000
 *   66  /soc/peripheral@50000000/uart@9000
 *   67  /soc/peripheral@50000000/uart@a000
 *   68  /soc/peripheral@50000000/uart@b000
 *   69  /soc/peripheral@50000000/vmc@3a000
 *   70  /soc/peripheral@50000000/watchdog@18000
 *   71  /soc/peripheral@50000000/flash-controller@39000
 *   72  /soc/peripheral@50000000/flash-controller@39000/flash@0
 *   73  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions
 *   74  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0
 *   75  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000
 *   76  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000
 *   77  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@80000
 *   78  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c0000
 *   79  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@f0000
 *   80  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000
 *
 * Definitions derived from these nodes in dependency order are next,
 * followed by tree-wide information (active compatibles, chosen nodes,
 * etc.).
 */

/*
 * Devicetree node:
 *   /
 *
 * No matching binding.
 *
 * Dependency Ordinal: 0
 *
 * Supports:
 *   1   /aliases
 *   3   /buttons
 *   2   /chosen
 *   11  /cpus
 *   14  /leds
 *   19  /pwmleds
 *   23  /reserved-memory
 *   4   /soc
 */

/*
 * Devicetree node:
 *   /aliases
 *
 * No matching binding.
 *
 * Dependency Ordinal: 1
 *
 * Requires:
 *   0   /
 */

/*
 * Devicetree node:
 *   /chosen
 *
 * No matching binding.
 *
 * Dependency Ordinal: 2
 *
 * Requires:
 *   0   /
 */

/*
 * Devicetree node:
 *   /buttons
 *
 * Binding (compatible = gpio-keys):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-keys.yaml
 *
 * Dependency Ordinal: 3
 *
 * Requires:
 *   0   /
 *
 * Supports:
 *   7   /buttons/button_0
 *   8   /buttons/button_1
 *   9   /buttons/button_2
 *   10  /buttons/button_3
 *
 * Description:
 *   GPIO KEYS parent node
 */
#define DT_INST_0_GPIO_KEYS                         1

/*
 * Devicetree node:
 *   /soc
 *
 * No matching binding.
 *
 * Dependency Ordinal: 4
 *
 * Requires:
 *   0   /
 *
 * Supports:
 *   33  /soc/crypto@50840000
 *   27  /soc/ficr@ff0000
 *   28  /soc/gpiote@5000d000
 *   20  /soc/interrupt-controller@e000e100
 *   29  /soc/memory@20000000
 *   5   /soc/peripheral@50000000
 *   30  /soc/spu@50003000
 *   31  /soc/timer@e000e010
 *   32  /soc/uicr@ff8000
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000
 *
 * No matching binding.
 *
 * Dependency Ordinal: 5
 *
 * Requires:
 *   4   /soc
 *
 * Supports:
 *   35  /soc/peripheral@50000000/adc@e000
 *   36  /soc/peripheral@50000000/clock@5000
 *   37  /soc/peripheral@50000000/dppic@17000
 *   38  /soc/peripheral@50000000/egu@1b000
 *   39  /soc/peripheral@50000000/egu@1c000
 *   40  /soc/peripheral@50000000/egu@1d000
 *   41  /soc/peripheral@50000000/egu@1e000
 *   42  /soc/peripheral@50000000/egu@1f000
 *   43  /soc/peripheral@50000000/egu@20000
 *   71  /soc/peripheral@50000000/flash-controller@39000
 *   6   /soc/peripheral@50000000/gpio@842500
 *   44  /soc/peripheral@50000000/i2c@8000
 *   45  /soc/peripheral@50000000/i2c@9000
 *   46  /soc/peripheral@50000000/i2c@a000
 *   47  /soc/peripheral@50000000/i2c@b000
 *   48  /soc/peripheral@50000000/i2s@28000
 *   49  /soc/peripheral@50000000/kmu@39000
 *   50  /soc/peripheral@50000000/pdm@26000
 *   51  /soc/peripheral@50000000/power@5000
 *   21  /soc/peripheral@50000000/pwm@21000
 *   52  /soc/peripheral@50000000/pwm@22000
 *   53  /soc/peripheral@50000000/pwm@23000
 *   54  /soc/peripheral@50000000/pwm@24000
 *   55  /soc/peripheral@50000000/regulator@4000
 *   56  /soc/peripheral@50000000/rtc@14000
 *   57  /soc/peripheral@50000000/rtc@15000
 *   58  /soc/peripheral@50000000/spi@8000
 *   59  /soc/peripheral@50000000/spi@9000
 *   60  /soc/peripheral@50000000/spi@a000
 *   61  /soc/peripheral@50000000/spi@b000
 *   62  /soc/peripheral@50000000/timer@f000
 *   63  /soc/peripheral@50000000/timer@10000
 *   64  /soc/peripheral@50000000/timer@11000
 *   65  /soc/peripheral@50000000/uart@8000
 *   66  /soc/peripheral@50000000/uart@9000
 *   67  /soc/peripheral@50000000/uart@a000
 *   68  /soc/peripheral@50000000/uart@b000
 *   69  /soc/peripheral@50000000/vmc@3a000
 *   70  /soc/peripheral@50000000/watchdog@18000
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/gpio@842500
 *
 * Binding (compatible = nordic,nrf-gpio):
 *   $ZEPHYR_BASE\dts\bindings\gpio\nordic,nrf-gpio.yaml
 *
 * Dependency Ordinal: 6
 *
 * Requires:
 *   5   /soc/peripheral@50000000
 *
 * Supports:
 *   7   /buttons/button_0
 *   8   /buttons/button_1
 *   9   /buttons/button_2
 *   10  /buttons/button_3
 *   15  /leds/led_0
 *   16  /leds/led_1
 *   17  /leds/led_2
 *   18  /leds/led_3
 *
 * Description:
 *   NRF5 GPIO node
 */
#define DT_NORDIC_NRF_GPIO_50842500_BASE_ADDRESS    0x50842500
#define DT_INST_0_NORDIC_NRF_GPIO_BASE_ADDRESS      DT_NORDIC_NRF_GPIO_50842500_BASE_ADDRESS
#define DT_NORDIC_NRF_GPIO_50842500_SIZE            768
#define DT_INST_0_NORDIC_NRF_GPIO_SIZE              DT_NORDIC_NRF_GPIO_50842500_SIZE
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_GPIO_50842500_LABEL           "GPIO_0"
#define DT_INST_0_NORDIC_NRF_GPIO_LABEL             DT_NORDIC_NRF_GPIO_50842500_LABEL
/* Number of gpios supported */
#define DT_NORDIC_NRF_GPIO_50842500_NGPIOS          32
#define DT_INST_0_NORDIC_NRF_GPIO_NGPIOS            DT_NORDIC_NRF_GPIO_50842500_NGPIOS
#define DT_INST_0_NORDIC_NRF_GPIO                   1

/*
 * Devicetree node:
 *   /buttons/button_0
 *
 * Binding (compatible = gpio-keys):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-keys.yaml
 *
 * Dependency Ordinal: 7
 *
 * Requires:
 *   3   /buttons
 *   6   /soc/peripheral@50000000/gpio@842500
 *
 * Description:
 *   GPIO KEYS child node
 */
#define DT_GPIO_KEYS_BUTTON_0_GPIOS_CONTROLLER      "GPIO_0"
#define DT_ALIAS_SW2_GPIOS_CONTROLLER               DT_GPIO_KEYS_BUTTON_0_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_SW2_GPIOS_CONTROLLER           DT_GPIO_KEYS_BUTTON_0_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_BUTTON_0_GPIOS_PIN             8
#define DT_ALIAS_SW2_GPIOS_PIN                      DT_GPIO_KEYS_BUTTON_0_GPIOS_PIN
#define DT_GPIO_KEYS_SW2_GPIOS_PIN                  DT_GPIO_KEYS_BUTTON_0_GPIOS_PIN
#define DT_GPIO_KEYS_BUTTON_0_GPIOS_FLAGS           17
#define DT_ALIAS_SW2_GPIOS_FLAGS                    DT_GPIO_KEYS_BUTTON_0_GPIOS_FLAGS
#define DT_GPIO_KEYS_SW2_GPIOS_FLAGS                DT_GPIO_KEYS_BUTTON_0_GPIOS_FLAGS
#define DT_GPIO_KEYS_BUTTON_0_GPIOS                 {"GPIO_0", 8, 17}
#define DT_ALIAS_SW2_GPIOS                          DT_GPIO_KEYS_BUTTON_0_GPIOS
#define DT_GPIO_KEYS_SW2_GPIOS                      DT_GPIO_KEYS_BUTTON_0_GPIOS
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_GPIO_KEYS_BUTTON_0_LABEL                 "Switch 1"
#define DT_ALIAS_SW2_LABEL                          DT_GPIO_KEYS_BUTTON_0_LABEL
#define DT_GPIO_KEYS_SW2_LABEL                      DT_GPIO_KEYS_BUTTON_0_LABEL

/*
 * Devicetree node:
 *   /buttons/button_1
 *
 * Binding (compatible = gpio-keys):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-keys.yaml
 *
 * Dependency Ordinal: 8
 *
 * Requires:
 *   3   /buttons
 *   6   /soc/peripheral@50000000/gpio@842500
 *
 * Description:
 *   GPIO KEYS child node
 */
#define DT_GPIO_KEYS_BUTTON_1_GPIOS_CONTROLLER      "GPIO_0"
#define DT_ALIAS_SW3_GPIOS_CONTROLLER               DT_GPIO_KEYS_BUTTON_1_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_SW3_GPIOS_CONTROLLER           DT_GPIO_KEYS_BUTTON_1_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_BUTTON_1_GPIOS_PIN             9
#define DT_ALIAS_SW3_GPIOS_PIN                      DT_GPIO_KEYS_BUTTON_1_GPIOS_PIN
#define DT_GPIO_KEYS_SW3_GPIOS_PIN                  DT_GPIO_KEYS_BUTTON_1_GPIOS_PIN
#define DT_GPIO_KEYS_BUTTON_1_GPIOS_FLAGS           17
#define DT_ALIAS_SW3_GPIOS_FLAGS                    DT_GPIO_KEYS_BUTTON_1_GPIOS_FLAGS
#define DT_GPIO_KEYS_SW3_GPIOS_FLAGS                DT_GPIO_KEYS_BUTTON_1_GPIOS_FLAGS
#define DT_GPIO_KEYS_BUTTON_1_GPIOS                 {"GPIO_0", 9, 17}
#define DT_ALIAS_SW3_GPIOS                          DT_GPIO_KEYS_BUTTON_1_GPIOS
#define DT_GPIO_KEYS_SW3_GPIOS                      DT_GPIO_KEYS_BUTTON_1_GPIOS
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_GPIO_KEYS_BUTTON_1_LABEL                 "Switch 2"
#define DT_ALIAS_SW3_LABEL                          DT_GPIO_KEYS_BUTTON_1_LABEL
#define DT_GPIO_KEYS_SW3_LABEL                      DT_GPIO_KEYS_BUTTON_1_LABEL

/*
 * Devicetree node:
 *   /buttons/button_2
 *
 * Binding (compatible = gpio-keys):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-keys.yaml
 *
 * Dependency Ordinal: 9
 *
 * Requires:
 *   3   /buttons
 *   6   /soc/peripheral@50000000/gpio@842500
 *
 * Description:
 *   GPIO KEYS child node
 */
#define DT_GPIO_KEYS_BUTTON_2_GPIOS_CONTROLLER      "GPIO_0"
#define DT_ALIAS_SW0_GPIOS_CONTROLLER               DT_GPIO_KEYS_BUTTON_2_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_SW0_GPIOS_CONTROLLER           DT_GPIO_KEYS_BUTTON_2_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_BUTTON_2_GPIOS_PIN             6
#define DT_ALIAS_SW0_GPIOS_PIN                      DT_GPIO_KEYS_BUTTON_2_GPIOS_PIN
#define DT_GPIO_KEYS_SW0_GPIOS_PIN                  DT_GPIO_KEYS_BUTTON_2_GPIOS_PIN
#define DT_GPIO_KEYS_BUTTON_2_GPIOS_FLAGS           17
#define DT_ALIAS_SW0_GPIOS_FLAGS                    DT_GPIO_KEYS_BUTTON_2_GPIOS_FLAGS
#define DT_GPIO_KEYS_SW0_GPIOS_FLAGS                DT_GPIO_KEYS_BUTTON_2_GPIOS_FLAGS
#define DT_GPIO_KEYS_BUTTON_2_GPIOS                 {"GPIO_0", 6, 17}
#define DT_ALIAS_SW0_GPIOS                          DT_GPIO_KEYS_BUTTON_2_GPIOS
#define DT_GPIO_KEYS_SW0_GPIOS                      DT_GPIO_KEYS_BUTTON_2_GPIOS
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_GPIO_KEYS_BUTTON_2_LABEL                 "Push button 1"
#define DT_ALIAS_SW0_LABEL                          DT_GPIO_KEYS_BUTTON_2_LABEL
#define DT_GPIO_KEYS_SW0_LABEL                      DT_GPIO_KEYS_BUTTON_2_LABEL

/*
 * Devicetree node:
 *   /buttons/button_3
 *
 * Binding (compatible = gpio-keys):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-keys.yaml
 *
 * Dependency Ordinal: 10
 *
 * Requires:
 *   3   /buttons
 *   6   /soc/peripheral@50000000/gpio@842500
 *
 * Description:
 *   GPIO KEYS child node
 */
#define DT_GPIO_KEYS_BUTTON_3_GPIOS_CONTROLLER      "GPIO_0"
#define DT_ALIAS_SW1_GPIOS_CONTROLLER               DT_GPIO_KEYS_BUTTON_3_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_SW1_GPIOS_CONTROLLER           DT_GPIO_KEYS_BUTTON_3_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_BUTTON_3_GPIOS_PIN             7
#define DT_ALIAS_SW1_GPIOS_PIN                      DT_GPIO_KEYS_BUTTON_3_GPIOS_PIN
#define DT_GPIO_KEYS_SW1_GPIOS_PIN                  DT_GPIO_KEYS_BUTTON_3_GPIOS_PIN
#define DT_GPIO_KEYS_BUTTON_3_GPIOS_FLAGS           17
#define DT_ALIAS_SW1_GPIOS_FLAGS                    DT_GPIO_KEYS_BUTTON_3_GPIOS_FLAGS
#define DT_GPIO_KEYS_SW1_GPIOS_FLAGS                DT_GPIO_KEYS_BUTTON_3_GPIOS_FLAGS
#define DT_GPIO_KEYS_BUTTON_3_GPIOS                 {"GPIO_0", 7, 17}
#define DT_ALIAS_SW1_GPIOS                          DT_GPIO_KEYS_BUTTON_3_GPIOS
#define DT_GPIO_KEYS_SW1_GPIOS                      DT_GPIO_KEYS_BUTTON_3_GPIOS
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_GPIO_KEYS_BUTTON_3_LABEL                 "Push button 2"
#define DT_ALIAS_SW1_LABEL                          DT_GPIO_KEYS_BUTTON_3_LABEL
#define DT_GPIO_KEYS_SW1_LABEL                      DT_GPIO_KEYS_BUTTON_3_LABEL

/*
 * Devicetree node:
 *   /cpus
 *
 * No matching binding.
 *
 * Dependency Ordinal: 11
 *
 * Requires:
 *   0   /
 *
 * Supports:
 *   12  /cpus/cpu@0
 */

/*
 * Devicetree node:
 *   /cpus/cpu@0
 *
 * Binding (compatible = arm,cortex-m33f):
 *   $ZEPHYR_BASE\dts\bindings\cpu\arm,cortex-m33f.yaml
 *
 * Dependency Ordinal: 12
 *
 * Requires:
 *   11  /cpus
 *
 * Supports:
 *   13  /cpus/cpu@0/mpu@e000ed90
 *
 * Description:
 *   ARM Cortex-M33F CPU
 */
#define DT_ARM_CORTEX_M33F_0_BASE_ADDRESS           0x0
#define DT_INST_0_ARM_CORTEX_M33F_BASE_ADDRESS      DT_ARM_CORTEX_M33F_0_BASE_ADDRESS
#define DT_INST_0_ARM_CORTEX_M33F                   1

/*
 * Devicetree node:
 *   /cpus/cpu@0/mpu@e000ed90
 *
 * Binding (compatible = arm,armv8m-mpu):
 *   $ZEPHYR_BASE\dts\bindings\mmu_mpu\arm,armv8m-mpu.yaml
 *
 * Dependency Ordinal: 13
 *
 * Requires:
 *   12  /cpus/cpu@0
 *
 * Description:
 *   ARMv8-M MPU (Memory Protection Unit)
 */
#define DT_ARM_ARMV8M_MPU_E000ED90_BASE_ADDRESS     0xe000ed90
#define DT_INST_0_ARM_ARMV8M_MPU_BASE_ADDRESS       DT_ARM_ARMV8M_MPU_E000ED90_BASE_ADDRESS
#define DT_ARM_ARMV8M_MPU_E000ED90_SIZE             64
#define DT_INST_0_ARM_ARMV8M_MPU_SIZE               DT_ARM_ARMV8M_MPU_E000ED90_SIZE
/* number of MPU regions supported by hardware */
#define DT_ARM_ARMV8M_MPU_E000ED90_ARM_NUM_MPU_REGIONS 16
#define DT_INST_0_ARM_ARMV8M_MPU_ARM_NUM_MPU_REGIONS DT_ARM_ARMV8M_MPU_E000ED90_ARM_NUM_MPU_REGIONS
#define DT_INST_0_ARM_ARMV8M_MPU                    1

/*
 * Devicetree node:
 *   /leds
 *
 * Binding (compatible = gpio-leds):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-leds.yaml
 *
 * Dependency Ordinal: 14
 *
 * Requires:
 *   0   /
 *
 * Supports:
 *   15  /leds/led_0
 *   16  /leds/led_1
 *   17  /leds/led_2
 *   18  /leds/led_3
 *
 * Description:
 *   GPIO LEDs parent node
 */
#define DT_INST_0_GPIO_LEDS                         1

/*
 * Devicetree node:
 *   /leds/led_0
 *
 * Binding (compatible = gpio-leds):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-leds.yaml
 *
 * Dependency Ordinal: 15
 *
 * Requires:
 *   14  /leds
 *   6   /soc/peripheral@50000000/gpio@842500
 *
 * Description:
 *   GPIO LED child node
 */
#define DT_GPIO_LEDS_LED_0_GPIOS_CONTROLLER         "GPIO_0"
#define DT_ALIAS_LED0_GPIOS_CONTROLLER              DT_GPIO_LEDS_LED_0_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED0_GPIOS_CONTROLLER          DT_GPIO_LEDS_LED_0_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED_0_GPIOS_PIN                2
#define DT_ALIAS_LED0_GPIOS_PIN                     DT_GPIO_LEDS_LED_0_GPIOS_PIN
#define DT_GPIO_LEDS_LED0_GPIOS_PIN                 DT_GPIO_LEDS_LED_0_GPIOS_PIN
#define DT_GPIO_LEDS_LED_0_GPIOS_FLAGS              0
#define DT_ALIAS_LED0_GPIOS_FLAGS                   DT_GPIO_LEDS_LED_0_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED0_GPIOS_FLAGS               DT_GPIO_LEDS_LED_0_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED_0_GPIOS                    {"GPIO_0", 2, 0}
#define DT_ALIAS_LED0_GPIOS                         DT_GPIO_LEDS_LED_0_GPIOS
#define DT_GPIO_LEDS_LED0_GPIOS                     DT_GPIO_LEDS_LED_0_GPIOS
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_GPIO_LEDS_LED_0_LABEL                    "Green LED 1"
#define DT_ALIAS_LED0_LABEL                         DT_GPIO_LEDS_LED_0_LABEL
#define DT_GPIO_LEDS_LED0_LABEL                     DT_GPIO_LEDS_LED_0_LABEL

/*
 * Devicetree node:
 *   /leds/led_1
 *
 * Binding (compatible = gpio-leds):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-leds.yaml
 *
 * Dependency Ordinal: 16
 *
 * Requires:
 *   14  /leds
 *   6   /soc/peripheral@50000000/gpio@842500
 *
 * Description:
 *   GPIO LED child node
 */
#define DT_GPIO_LEDS_LED_1_GPIOS_CONTROLLER         "GPIO_0"
#define DT_ALIAS_LED1_GPIOS_CONTROLLER              DT_GPIO_LEDS_LED_1_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED1_GPIOS_CONTROLLER          DT_GPIO_LEDS_LED_1_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED_1_GPIOS_PIN                3
#define DT_ALIAS_LED1_GPIOS_PIN                     DT_GPIO_LEDS_LED_1_GPIOS_PIN
#define DT_GPIO_LEDS_LED1_GPIOS_PIN                 DT_GPIO_LEDS_LED_1_GPIOS_PIN
#define DT_GPIO_LEDS_LED_1_GPIOS_FLAGS              0
#define DT_ALIAS_LED1_GPIOS_FLAGS                   DT_GPIO_LEDS_LED_1_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED1_GPIOS_FLAGS               DT_GPIO_LEDS_LED_1_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED_1_GPIOS                    {"GPIO_0", 3, 0}
#define DT_ALIAS_LED1_GPIOS                         DT_GPIO_LEDS_LED_1_GPIOS
#define DT_GPIO_LEDS_LED1_GPIOS                     DT_GPIO_LEDS_LED_1_GPIOS
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_GPIO_LEDS_LED_1_LABEL                    "Green LED 2"
#define DT_ALIAS_LED1_LABEL                         DT_GPIO_LEDS_LED_1_LABEL
#define DT_GPIO_LEDS_LED1_LABEL                     DT_GPIO_LEDS_LED_1_LABEL

/*
 * Devicetree node:
 *   /leds/led_2
 *
 * Binding (compatible = gpio-leds):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-leds.yaml
 *
 * Dependency Ordinal: 17
 *
 * Requires:
 *   14  /leds
 *   6   /soc/peripheral@50000000/gpio@842500
 *
 * Description:
 *   GPIO LED child node
 */
#define DT_GPIO_LEDS_LED_2_GPIOS_CONTROLLER         "GPIO_0"
#define DT_ALIAS_LED2_GPIOS_CONTROLLER              DT_GPIO_LEDS_LED_2_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED2_GPIOS_CONTROLLER          DT_GPIO_LEDS_LED_2_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED_2_GPIOS_PIN                4
#define DT_ALIAS_LED2_GPIOS_PIN                     DT_GPIO_LEDS_LED_2_GPIOS_PIN
#define DT_GPIO_LEDS_LED2_GPIOS_PIN                 DT_GPIO_LEDS_LED_2_GPIOS_PIN
#define DT_GPIO_LEDS_LED_2_GPIOS_FLAGS              0
#define DT_ALIAS_LED2_GPIOS_FLAGS                   DT_GPIO_LEDS_LED_2_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED2_GPIOS_FLAGS               DT_GPIO_LEDS_LED_2_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED_2_GPIOS                    {"GPIO_0", 4, 0}
#define DT_ALIAS_LED2_GPIOS                         DT_GPIO_LEDS_LED_2_GPIOS
#define DT_GPIO_LEDS_LED2_GPIOS                     DT_GPIO_LEDS_LED_2_GPIOS
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_GPIO_LEDS_LED_2_LABEL                    "Green LED 3"
#define DT_ALIAS_LED2_LABEL                         DT_GPIO_LEDS_LED_2_LABEL
#define DT_GPIO_LEDS_LED2_LABEL                     DT_GPIO_LEDS_LED_2_LABEL

/*
 * Devicetree node:
 *   /leds/led_3
 *
 * Binding (compatible = gpio-leds):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-leds.yaml
 *
 * Dependency Ordinal: 18
 *
 * Requires:
 *   14  /leds
 *   6   /soc/peripheral@50000000/gpio@842500
 *
 * Description:
 *   GPIO LED child node
 */
#define DT_GPIO_LEDS_LED_3_GPIOS_CONTROLLER         "GPIO_0"
#define DT_ALIAS_LED3_GPIOS_CONTROLLER              DT_GPIO_LEDS_LED_3_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED3_GPIOS_CONTROLLER          DT_GPIO_LEDS_LED_3_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED_3_GPIOS_PIN                5
#define DT_ALIAS_LED3_GPIOS_PIN                     DT_GPIO_LEDS_LED_3_GPIOS_PIN
#define DT_GPIO_LEDS_LED3_GPIOS_PIN                 DT_GPIO_LEDS_LED_3_GPIOS_PIN
#define DT_GPIO_LEDS_LED_3_GPIOS_FLAGS              0
#define DT_ALIAS_LED3_GPIOS_FLAGS                   DT_GPIO_LEDS_LED_3_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED3_GPIOS_FLAGS               DT_GPIO_LEDS_LED_3_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED_3_GPIOS                    {"GPIO_0", 5, 0}
#define DT_ALIAS_LED3_GPIOS                         DT_GPIO_LEDS_LED_3_GPIOS
#define DT_GPIO_LEDS_LED3_GPIOS                     DT_GPIO_LEDS_LED_3_GPIOS
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_GPIO_LEDS_LED_3_LABEL                    "Green LED 4"
#define DT_ALIAS_LED3_LABEL                         DT_GPIO_LEDS_LED_3_LABEL
#define DT_GPIO_LEDS_LED3_LABEL                     DT_GPIO_LEDS_LED_3_LABEL

/*
 * Devicetree node:
 *   /pwmleds
 *
 * Binding (compatible = pwm-leds):
 *   $ZEPHYR_BASE\dts\bindings\led\pwm-leds.yaml
 *
 * Dependency Ordinal: 19
 *
 * Requires:
 *   0   /
 *
 * Supports:
 *   22  /pwmleds/pwm_led_0
 *
 * Description:
 *   PWM LEDs parent node
 */
#define DT_INST_0_PWM_LEDS                          1

/*
 * Devicetree node:
 *   /soc/interrupt-controller@e000e100
 *
 * Binding (compatible = arm,v8m-nvic):
 *   $ZEPHYR_BASE\dts\bindings\interrupt-controller\arm,v8m-nvic.yaml
 *
 * Dependency Ordinal: 20
 *
 * Requires:
 *   4   /soc
 *
 * Supports:
 *   28  /soc/gpiote@5000d000
 *   30  /soc/spu@50003000
 *   34  /soc/crypto@50840000/crypto@50841000
 *   35  /soc/peripheral@50000000/adc@e000
 *   36  /soc/peripheral@50000000/clock@5000
 *   38  /soc/peripheral@50000000/egu@1b000
 *   39  /soc/peripheral@50000000/egu@1c000
 *   40  /soc/peripheral@50000000/egu@1d000
 *   41  /soc/peripheral@50000000/egu@1e000
 *   42  /soc/peripheral@50000000/egu@1f000
 *   43  /soc/peripheral@50000000/egu@20000
 *   44  /soc/peripheral@50000000/i2c@8000
 *   45  /soc/peripheral@50000000/i2c@9000
 *   46  /soc/peripheral@50000000/i2c@a000
 *   47  /soc/peripheral@50000000/i2c@b000
 *   48  /soc/peripheral@50000000/i2s@28000
 *   49  /soc/peripheral@50000000/kmu@39000
 *   50  /soc/peripheral@50000000/pdm@26000
 *   51  /soc/peripheral@50000000/power@5000
 *   21  /soc/peripheral@50000000/pwm@21000
 *   52  /soc/peripheral@50000000/pwm@22000
 *   53  /soc/peripheral@50000000/pwm@23000
 *   54  /soc/peripheral@50000000/pwm@24000
 *   56  /soc/peripheral@50000000/rtc@14000
 *   57  /soc/peripheral@50000000/rtc@15000
 *   58  /soc/peripheral@50000000/spi@8000
 *   59  /soc/peripheral@50000000/spi@9000
 *   60  /soc/peripheral@50000000/spi@a000
 *   61  /soc/peripheral@50000000/spi@b000
 *   62  /soc/peripheral@50000000/timer@f000
 *   63  /soc/peripheral@50000000/timer@10000
 *   64  /soc/peripheral@50000000/timer@11000
 *   65  /soc/peripheral@50000000/uart@8000
 *   66  /soc/peripheral@50000000/uart@9000
 *   67  /soc/peripheral@50000000/uart@a000
 *   68  /soc/peripheral@50000000/uart@b000
 *   70  /soc/peripheral@50000000/watchdog@18000
 *
 * Description:
 *   ARMv8-M NVIC (Nested Vectored Interrupt Controller)
 */
#define DT_ARM_V8M_NVIC_E000E100_BASE_ADDRESS       0xe000e100
#define DT_INST_0_ARM_V8M_NVIC_BASE_ADDRESS         DT_ARM_V8M_NVIC_E000E100_BASE_ADDRESS
#define DT_ARM_V8M_NVIC_E000E100_SIZE               3072
#define DT_INST_0_ARM_V8M_NVIC_SIZE                 DT_ARM_V8M_NVIC_E000E100_SIZE
/* number of bits of IRQ priorities */
#define DT_ARM_V8M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS 3
#define DT_INST_0_ARM_V8M_NVIC_ARM_NUM_IRQ_PRIORITY_BITS DT_ARM_V8M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define DT_INST_0_ARM_V8M_NVIC                      1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/pwm@21000
 *
 * Binding (compatible = nordic,nrf-pwm):
 *   $ZEPHYR_BASE\dts\bindings\pwm\nordic,nrf-pwm.yaml
 *
 * Dependency Ordinal: 21
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Supports:
 *   22  /pwmleds/pwm_led_0
 *
 * Description:
 *   nRF PWM
 */
#define DT_NORDIC_NRF_PWM_50021000_BASE_ADDRESS     0x50021000
#define DT_INST_0_NORDIC_NRF_PWM_BASE_ADDRESS       DT_NORDIC_NRF_PWM_50021000_BASE_ADDRESS
#define DT_NORDIC_NRF_PWM_50021000_SIZE             4096
#define DT_INST_0_NORDIC_NRF_PWM_SIZE               DT_NORDIC_NRF_PWM_50021000_SIZE
#define DT_NORDIC_NRF_PWM_50021000_IRQ_0            33
#define DT_INST_0_NORDIC_NRF_PWM_IRQ_0              DT_NORDIC_NRF_PWM_50021000_IRQ_0
#define DT_NORDIC_NRF_PWM_50021000_IRQ_0_PRIORITY   1
#define DT_INST_0_NORDIC_NRF_PWM_IRQ_0_PRIORITY     DT_NORDIC_NRF_PWM_50021000_IRQ_0_PRIORITY
/* Use center-aligned (up and down) counter mode */
#define DT_NORDIC_NRF_PWM_50021000_CENTER_ALIGNED   0
#define DT_INST_0_NORDIC_NRF_PWM_CENTER_ALIGNED     DT_NORDIC_NRF_PWM_50021000_CENTER_ALIGNED
/* Channel 0 pin */
#define DT_NORDIC_NRF_PWM_50021000_CH0_PIN          2
#define DT_INST_0_NORDIC_NRF_PWM_CH0_PIN            DT_NORDIC_NRF_PWM_50021000_CH0_PIN
/* Channel 0 inverted */
#define DT_NORDIC_NRF_PWM_50021000_CH0_INVERTED     0
#define DT_INST_0_NORDIC_NRF_PWM_CH0_INVERTED       DT_NORDIC_NRF_PWM_50021000_CH0_INVERTED
/* Channel 1 inverted */
#define DT_NORDIC_NRF_PWM_50021000_CH1_INVERTED     0
#define DT_INST_0_NORDIC_NRF_PWM_CH1_INVERTED       DT_NORDIC_NRF_PWM_50021000_CH1_INVERTED
/* Channel 2 inverted */
#define DT_NORDIC_NRF_PWM_50021000_CH2_INVERTED     0
#define DT_INST_0_NORDIC_NRF_PWM_CH2_INVERTED       DT_NORDIC_NRF_PWM_50021000_CH2_INVERTED
/* Channel 3 inverted */
#define DT_NORDIC_NRF_PWM_50021000_CH3_INVERTED     0
#define DT_INST_0_NORDIC_NRF_PWM_CH3_INVERTED       DT_NORDIC_NRF_PWM_50021000_CH3_INVERTED
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_PWM_50021000_LABEL            "PWM_0"
#define DT_INST_0_NORDIC_NRF_PWM_LABEL              DT_NORDIC_NRF_PWM_50021000_LABEL
#define DT_INST_0_NORDIC_NRF_PWM                    1

/*
 * Devicetree node:
 *   /pwmleds/pwm_led_0
 *
 * Binding (compatible = pwm-leds):
 *   $ZEPHYR_BASE\dts\bindings\led\pwm-leds.yaml
 *
 * Dependency Ordinal: 22
 *
 * Requires:
 *   19  /pwmleds
 *   21  /soc/peripheral@50000000/pwm@21000
 *
 * Description:
 *   PWM LED child node
 */
#define DT_PWM_LEDS_PWM_LED_0_PWMS_CONTROLLER       "PWM_0"
#define DT_ALIAS_PWM_LED0_PWMS_CONTROLLER           DT_PWM_LEDS_PWM_LED_0_PWMS_CONTROLLER
#define DT_PWM_LEDS_PWM_LED0_PWMS_CONTROLLER        DT_PWM_LEDS_PWM_LED_0_PWMS_CONTROLLER
#define DT_PWM_LEDS_PWM_LED_0_PWMS_CHANNEL          2
#define DT_ALIAS_PWM_LED0_PWMS_CHANNEL              DT_PWM_LEDS_PWM_LED_0_PWMS_CHANNEL
#define DT_PWM_LEDS_PWM_LED0_PWMS_CHANNEL           DT_PWM_LEDS_PWM_LED_0_PWMS_CHANNEL
#define DT_PWM_LEDS_PWM_LED_0_PWMS                  {"PWM_0", 2}
#define DT_ALIAS_PWM_LED0_PWMS                      DT_PWM_LEDS_PWM_LED_0_PWMS
#define DT_PWM_LEDS_PWM_LED0_PWMS                   DT_PWM_LEDS_PWM_LED_0_PWMS

/*
 * Devicetree node:
 *   /reserved-memory
 *
 * No matching binding.
 *
 * Dependency Ordinal: 23
 *
 * Requires:
 *   0   /
 *
 * Supports:
 *   24  /reserved-memory/image_bsd@20010000
 *   25  /reserved-memory/image_ns@20020000
 *   26  /reserved-memory/image_s@20000000
 */

/*
 * Devicetree node:
 *   /reserved-memory/image_bsd@20010000
 *
 * No matching binding.
 *
 * Dependency Ordinal: 24
 *
 * Requires:
 *   23  /reserved-memory
 */

/*
 * Devicetree node:
 *   /reserved-memory/image_ns@20020000
 *
 * No matching binding.
 *
 * Dependency Ordinal: 25
 *
 * Requires:
 *   23  /reserved-memory
 */

/*
 * Devicetree node:
 *   /reserved-memory/image_s@20000000
 *
 * No matching binding.
 *
 * Dependency Ordinal: 26
 *
 * Requires:
 *   23  /reserved-memory
 */

/*
 * Devicetree node:
 *   /soc/ficr@ff0000
 *
 * Binding (compatible = nordic,nrf-ficr):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-ficr.yaml
 *
 * Dependency Ordinal: 27
 *
 * Requires:
 *   4   /soc
 *
 * Description:
 *   Nordic FICR (Factory Information Configuration Registers)
 */
#define DT_NORDIC_NRF_FICR_FF0000_BASE_ADDRESS      0xff0000
#define DT_INST_0_NORDIC_NRF_FICR_BASE_ADDRESS      DT_NORDIC_NRF_FICR_FF0000_BASE_ADDRESS
#define DT_NORDIC_NRF_FICR_FF0000_SIZE              4096
#define DT_INST_0_NORDIC_NRF_FICR_SIZE              DT_NORDIC_NRF_FICR_FF0000_SIZE
#define DT_INST_0_NORDIC_NRF_FICR                   1

/*
 * Devicetree node:
 *   /soc/gpiote@5000d000
 *
 * Binding (compatible = nordic,nrf-gpiote):
 *   $ZEPHYR_BASE\dts\bindings\gpio\nordic,nrf-gpiote.yaml
 *
 * Dependency Ordinal: 28
 *
 * Requires:
 *   4   /soc
 *   20  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   NRF5 GPIOTE node
 */
#define DT_NORDIC_NRF_GPIOTE_5000D000_BASE_ADDRESS  0x5000d000
#define DT_INST_0_NORDIC_NRF_GPIOTE_BASE_ADDRESS    DT_NORDIC_NRF_GPIOTE_5000D000_BASE_ADDRESS
#define DT_NORDIC_NRF_GPIOTE_5000D000_SIZE          4096
#define DT_INST_0_NORDIC_NRF_GPIOTE_SIZE            DT_NORDIC_NRF_GPIOTE_5000D000_SIZE
#define DT_NORDIC_NRF_GPIOTE_5000D000_IRQ_0         13
#define DT_INST_0_NORDIC_NRF_GPIOTE_IRQ_0           DT_NORDIC_NRF_GPIOTE_5000D000_IRQ_0
#define DT_NORDIC_NRF_GPIOTE_5000D000_IRQ_0_PRIORITY 5
#define DT_INST_0_NORDIC_NRF_GPIOTE_IRQ_0_PRIORITY  DT_NORDIC_NRF_GPIOTE_5000D000_IRQ_0_PRIORITY
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_GPIOTE_5000D000_LABEL         "GPIOTE_0"
#define DT_INST_0_NORDIC_NRF_GPIOTE_LABEL           DT_NORDIC_NRF_GPIOTE_5000D000_LABEL
#define DT_INST_0_NORDIC_NRF_GPIOTE                 1

/*
 * Devicetree node:
 *   /soc/memory@20000000
 *
 * Binding (compatible = mmio-sram):
 *   $ZEPHYR_BASE\dts\bindings\sram\mmio-sram.yaml
 *
 * Dependency Ordinal: 29
 *
 * Requires:
 *   4   /soc
 *
 * Description:
 *   Generic on-chip SRAM description
 */
#define DT_MMIO_SRAM_20000000_BASE_ADDRESS          0x20000000
#define DT_INST_0_MMIO_SRAM_BASE_ADDRESS            DT_MMIO_SRAM_20000000_BASE_ADDRESS
#define DT_MMIO_SRAM_20000000_SIZE                  262144
#define DT_INST_0_MMIO_SRAM_SIZE                    DT_MMIO_SRAM_20000000_SIZE
#define DT_INST_0_MMIO_SRAM                         1

/*
 * Devicetree node:
 *   /soc/spu@50003000
 *
 * Binding (compatible = nordic,nrf-spu):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-spu.yaml
 *
 * Dependency Ordinal: 30
 *
 * Requires:
 *   4   /soc
 *   20  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic SPU (System Protection Unit)
 */
#define DT_NORDIC_NRF_SPU_50003000_BASE_ADDRESS     0x50003000
#define DT_INST_0_NORDIC_NRF_SPU_BASE_ADDRESS       DT_NORDIC_NRF_SPU_50003000_BASE_ADDRESS
#define DT_NORDIC_NRF_SPU_50003000_SIZE             4096
#define DT_INST_0_NORDIC_NRF_SPU_SIZE               DT_NORDIC_NRF_SPU_50003000_SIZE
#define DT_NORDIC_NRF_SPU_50003000_IRQ_0            3
#define DT_INST_0_NORDIC_NRF_SPU_IRQ_0              DT_NORDIC_NRF_SPU_50003000_IRQ_0
#define DT_NORDIC_NRF_SPU_50003000_IRQ_0_PRIORITY   1
#define DT_INST_0_NORDIC_NRF_SPU_IRQ_0_PRIORITY     DT_NORDIC_NRF_SPU_50003000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_SPU                    1

/*
 * Devicetree node:
 *   /soc/timer@e000e010
 *
 * No matching binding.
 *
 * Dependency Ordinal: 31
 *
 * Requires:
 *   4   /soc
 *
 * Node is disabled.
 */

/*
 * Devicetree node:
 *   /soc/uicr@ff8000
 *
 * Binding (compatible = nordic,nrf-uicr):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-uicr.yaml
 *
 * Dependency Ordinal: 32
 *
 * Requires:
 *   4   /soc
 *
 * Description:
 *   Nordic UICR (User Information Configuration Registers)
 */
#define DT_NORDIC_NRF_UICR_FF8000_BASE_ADDRESS      0xff8000
#define DT_INST_0_NORDIC_NRF_UICR_BASE_ADDRESS      DT_NORDIC_NRF_UICR_FF8000_BASE_ADDRESS
#define DT_NORDIC_NRF_UICR_FF8000_SIZE              4096
#define DT_INST_0_NORDIC_NRF_UICR_SIZE              DT_NORDIC_NRF_UICR_FF8000_SIZE
#define DT_INST_0_NORDIC_NRF_UICR                   1

/*
 * Devicetree node:
 *   /soc/crypto@50840000
 *
 * Binding (compatible = nordic,nrf-cc310):
 *   $ZEPHYR_BASE\dts\bindings\crypto\nordic,nrf-cc310.yaml
 *
 * Dependency Ordinal: 33
 *
 * Requires:
 *   4   /soc
 *
 * Supports:
 *   34  /soc/crypto@50840000/crypto@50841000
 *
 * Description:
 *   Nordic Control Interface for ARM TrustZone CryptoCell 310
 */
#define DT_NORDIC_NRF_CC310_50840000_BASE_ADDRESS   0x50840000
#define DT_INST_0_NORDIC_NRF_CC310_BASE_ADDRESS     DT_NORDIC_NRF_CC310_50840000_BASE_ADDRESS
#define DT_NORDIC_NRF_CC310_50840000_SIZE           4096
#define DT_INST_0_NORDIC_NRF_CC310_SIZE             DT_NORDIC_NRF_CC310_50840000_SIZE
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_CC310_50840000_LABEL          "CRYPTOCELL"
#define DT_INST_0_NORDIC_NRF_CC310_LABEL            DT_NORDIC_NRF_CC310_50840000_LABEL
#define DT_INST_0_NORDIC_NRF_CC310                  1

/*
 * Devicetree node:
 *   /soc/crypto@50840000/crypto@50841000
 *
 * Binding (compatible = arm,cryptocell-310):
 *   $ZEPHYR_BASE\dts\bindings\crypto\arm,cryptocell-310.yaml
 *
 * Dependency Ordinal: 34
 *
 * Requires:
 *   33  /soc/crypto@50840000
 *   20  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   ARM TrustZone CryptoCell 310
 */
#define DT_ARM_CRYPTOCELL_310_50841000_BASE_ADDRESS 0x50841000
#define DT_INST_0_ARM_CRYPTOCELL_310_BASE_ADDRESS   DT_ARM_CRYPTOCELL_310_50841000_BASE_ADDRESS
#define DT_ARM_CRYPTOCELL_310_50841000_SIZE         4096
#define DT_INST_0_ARM_CRYPTOCELL_310_SIZE           DT_ARM_CRYPTOCELL_310_50841000_SIZE
#define DT_ARM_CRYPTOCELL_310_50841000_IRQ_0        64
#define DT_INST_0_ARM_CRYPTOCELL_310_IRQ_0          DT_ARM_CRYPTOCELL_310_50841000_IRQ_0
#define DT_ARM_CRYPTOCELL_310_50841000_IRQ_0_PRIORITY 1
#define DT_INST_0_ARM_CRYPTOCELL_310_IRQ_0_PRIORITY DT_ARM_CRYPTOCELL_310_50841000_IRQ_0_PRIORITY
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_ARM_CRYPTOCELL_310_50841000_LABEL        "CRYPTOCELL310"
#define DT_INST_0_ARM_CRYPTOCELL_310_LABEL          DT_ARM_CRYPTOCELL_310_50841000_LABEL
#define DT_INST_0_ARM_CRYPTOCELL_310                1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/adc@e000
 *
 * Binding (compatible = nordic,nrf-saadc):
 *   $ZEPHYR_BASE\dts\bindings\iio\adc\nordic,nrf-saadc.yaml
 *
 * Dependency Ordinal: 35
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic Semiconductor nRF family SAADC node
 */
#define DT_NORDIC_NRF_SAADC_5000E000_BASE_ADDRESS   0x5000e000
#define DT_INST_0_NORDIC_NRF_SAADC_BASE_ADDRESS     DT_NORDIC_NRF_SAADC_5000E000_BASE_ADDRESS
#define DT_NORDIC_NRF_SAADC_5000E000_SIZE           4096
#define DT_INST_0_NORDIC_NRF_SAADC_SIZE             DT_NORDIC_NRF_SAADC_5000E000_SIZE
#define DT_NORDIC_NRF_SAADC_5000E000_IRQ_0          14
#define DT_INST_0_NORDIC_NRF_SAADC_IRQ_0            DT_NORDIC_NRF_SAADC_5000E000_IRQ_0
#define DT_NORDIC_NRF_SAADC_5000E000_IRQ_0_PRIORITY 1
#define DT_INST_0_NORDIC_NRF_SAADC_IRQ_0_PRIORITY   DT_NORDIC_NRF_SAADC_5000E000_IRQ_0_PRIORITY
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_SAADC_5000E000_LABEL          "ADC_0"
#define DT_INST_0_NORDIC_NRF_SAADC_LABEL            DT_NORDIC_NRF_SAADC_5000E000_LABEL
#define DT_INST_0_NORDIC_NRF_SAADC                  1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/clock@5000
 *
 * Binding (compatible = nordic,nrf-clock):
 *   $ZEPHYR_BASE\dts\bindings\clock\nordic,nrf-clock.yaml
 *
 * Dependency Ordinal: 36
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic nRF clock control node
 */
#define DT_NORDIC_NRF_CLOCK_50005000_BASE_ADDRESS   0x50005000
#define DT_INST_0_NORDIC_NRF_CLOCK_BASE_ADDRESS     DT_NORDIC_NRF_CLOCK_50005000_BASE_ADDRESS
#define DT_NORDIC_NRF_CLOCK_50005000_SIZE           4096
#define DT_INST_0_NORDIC_NRF_CLOCK_SIZE             DT_NORDIC_NRF_CLOCK_50005000_SIZE
#define DT_NORDIC_NRF_CLOCK_50005000_IRQ_0          5
#define DT_INST_0_NORDIC_NRF_CLOCK_IRQ_0            DT_NORDIC_NRF_CLOCK_50005000_IRQ_0
#define DT_NORDIC_NRF_CLOCK_50005000_IRQ_0_PRIORITY 1
#define DT_INST_0_NORDIC_NRF_CLOCK_IRQ_0_PRIORITY   DT_NORDIC_NRF_CLOCK_50005000_IRQ_0_PRIORITY
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_CLOCK_50005000_LABEL          "CLOCK"
#define DT_INST_0_NORDIC_NRF_CLOCK_LABEL            DT_NORDIC_NRF_CLOCK_50005000_LABEL
#define DT_INST_0_NORDIC_NRF_CLOCK                  1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/dppic@17000
 *
 * Binding (compatible = nordic,nrf-dppic):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-dppic.yaml
 *
 * Dependency Ordinal: 37
 *
 * Requires:
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic DPPIC (Distributed Programmable Peripheral Interconnect Controller)
 */
#define DT_NORDIC_NRF_DPPIC_50017000_BASE_ADDRESS   0x50017000
#define DT_INST_0_NORDIC_NRF_DPPIC_BASE_ADDRESS     DT_NORDIC_NRF_DPPIC_50017000_BASE_ADDRESS
#define DT_NORDIC_NRF_DPPIC_50017000_SIZE           4096
#define DT_INST_0_NORDIC_NRF_DPPIC_SIZE             DT_NORDIC_NRF_DPPIC_50017000_SIZE
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_DPPIC_50017000_LABEL          "DPPIC"
#define DT_INST_0_NORDIC_NRF_DPPIC_LABEL            DT_NORDIC_NRF_DPPIC_50017000_LABEL
#define DT_INST_0_NORDIC_NRF_DPPIC                  1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/egu@1b000
 *
 * Binding (compatible = nordic,nrf-egu):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-egu.yaml
 *
 * Dependency Ordinal: 38
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic EGU (Event Generator Unit)
 */
#define DT_NORDIC_NRF_EGU_5001B000_BASE_ADDRESS     0x5001b000
#define DT_INST_0_NORDIC_NRF_EGU_BASE_ADDRESS       DT_NORDIC_NRF_EGU_5001B000_BASE_ADDRESS
#define DT_NORDIC_NRF_EGU_5001B000_SIZE             4096
#define DT_INST_0_NORDIC_NRF_EGU_SIZE               DT_NORDIC_NRF_EGU_5001B000_SIZE
#define DT_NORDIC_NRF_EGU_5001B000_IRQ_0            27
#define DT_INST_0_NORDIC_NRF_EGU_IRQ_0              DT_NORDIC_NRF_EGU_5001B000_IRQ_0
#define DT_NORDIC_NRF_EGU_5001B000_IRQ_0_PRIORITY   1
#define DT_INST_0_NORDIC_NRF_EGU_IRQ_0_PRIORITY     DT_NORDIC_NRF_EGU_5001B000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_EGU                    1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/egu@1c000
 *
 * Binding (compatible = nordic,nrf-egu):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-egu.yaml
 *
 * Dependency Ordinal: 39
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic EGU (Event Generator Unit)
 */
#define DT_NORDIC_NRF_EGU_5001C000_BASE_ADDRESS     0x5001c000
#define DT_INST_1_NORDIC_NRF_EGU_BASE_ADDRESS       DT_NORDIC_NRF_EGU_5001C000_BASE_ADDRESS
#define DT_NORDIC_NRF_EGU_5001C000_SIZE             4096
#define DT_INST_1_NORDIC_NRF_EGU_SIZE               DT_NORDIC_NRF_EGU_5001C000_SIZE
#define DT_NORDIC_NRF_EGU_5001C000_IRQ_0            28
#define DT_INST_1_NORDIC_NRF_EGU_IRQ_0              DT_NORDIC_NRF_EGU_5001C000_IRQ_0
#define DT_NORDIC_NRF_EGU_5001C000_IRQ_0_PRIORITY   1
#define DT_INST_1_NORDIC_NRF_EGU_IRQ_0_PRIORITY     DT_NORDIC_NRF_EGU_5001C000_IRQ_0_PRIORITY
#define DT_INST_1_NORDIC_NRF_EGU                    1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/egu@1d000
 *
 * Binding (compatible = nordic,nrf-egu):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-egu.yaml
 *
 * Dependency Ordinal: 40
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic EGU (Event Generator Unit)
 */
#define DT_NORDIC_NRF_EGU_5001D000_BASE_ADDRESS     0x5001d000
#define DT_INST_2_NORDIC_NRF_EGU_BASE_ADDRESS       DT_NORDIC_NRF_EGU_5001D000_BASE_ADDRESS
#define DT_NORDIC_NRF_EGU_5001D000_SIZE             4096
#define DT_INST_2_NORDIC_NRF_EGU_SIZE               DT_NORDIC_NRF_EGU_5001D000_SIZE
#define DT_NORDIC_NRF_EGU_5001D000_IRQ_0            29
#define DT_INST_2_NORDIC_NRF_EGU_IRQ_0              DT_NORDIC_NRF_EGU_5001D000_IRQ_0
#define DT_NORDIC_NRF_EGU_5001D000_IRQ_0_PRIORITY   1
#define DT_INST_2_NORDIC_NRF_EGU_IRQ_0_PRIORITY     DT_NORDIC_NRF_EGU_5001D000_IRQ_0_PRIORITY
#define DT_INST_2_NORDIC_NRF_EGU                    1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/egu@1e000
 *
 * Binding (compatible = nordic,nrf-egu):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-egu.yaml
 *
 * Dependency Ordinal: 41
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic EGU (Event Generator Unit)
 */
#define DT_NORDIC_NRF_EGU_5001E000_BASE_ADDRESS     0x5001e000
#define DT_INST_3_NORDIC_NRF_EGU_BASE_ADDRESS       DT_NORDIC_NRF_EGU_5001E000_BASE_ADDRESS
#define DT_NORDIC_NRF_EGU_5001E000_SIZE             4096
#define DT_INST_3_NORDIC_NRF_EGU_SIZE               DT_NORDIC_NRF_EGU_5001E000_SIZE
#define DT_NORDIC_NRF_EGU_5001E000_IRQ_0            30
#define DT_INST_3_NORDIC_NRF_EGU_IRQ_0              DT_NORDIC_NRF_EGU_5001E000_IRQ_0
#define DT_NORDIC_NRF_EGU_5001E000_IRQ_0_PRIORITY   1
#define DT_INST_3_NORDIC_NRF_EGU_IRQ_0_PRIORITY     DT_NORDIC_NRF_EGU_5001E000_IRQ_0_PRIORITY
#define DT_INST_3_NORDIC_NRF_EGU                    1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/egu@1f000
 *
 * Binding (compatible = nordic,nrf-egu):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-egu.yaml
 *
 * Dependency Ordinal: 42
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic EGU (Event Generator Unit)
 */
#define DT_NORDIC_NRF_EGU_5001F000_BASE_ADDRESS     0x5001f000
#define DT_INST_4_NORDIC_NRF_EGU_BASE_ADDRESS       DT_NORDIC_NRF_EGU_5001F000_BASE_ADDRESS
#define DT_NORDIC_NRF_EGU_5001F000_SIZE             4096
#define DT_INST_4_NORDIC_NRF_EGU_SIZE               DT_NORDIC_NRF_EGU_5001F000_SIZE
#define DT_NORDIC_NRF_EGU_5001F000_IRQ_0            31
#define DT_INST_4_NORDIC_NRF_EGU_IRQ_0              DT_NORDIC_NRF_EGU_5001F000_IRQ_0
#define DT_NORDIC_NRF_EGU_5001F000_IRQ_0_PRIORITY   1
#define DT_INST_4_NORDIC_NRF_EGU_IRQ_0_PRIORITY     DT_NORDIC_NRF_EGU_5001F000_IRQ_0_PRIORITY
#define DT_INST_4_NORDIC_NRF_EGU                    1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/egu@20000
 *
 * Binding (compatible = nordic,nrf-egu):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-egu.yaml
 *
 * Dependency Ordinal: 43
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic EGU (Event Generator Unit)
 */
#define DT_NORDIC_NRF_EGU_50020000_BASE_ADDRESS     0x50020000
#define DT_INST_5_NORDIC_NRF_EGU_BASE_ADDRESS       DT_NORDIC_NRF_EGU_50020000_BASE_ADDRESS
#define DT_NORDIC_NRF_EGU_50020000_SIZE             4096
#define DT_INST_5_NORDIC_NRF_EGU_SIZE               DT_NORDIC_NRF_EGU_50020000_SIZE
#define DT_NORDIC_NRF_EGU_50020000_IRQ_0            32
#define DT_INST_5_NORDIC_NRF_EGU_IRQ_0              DT_NORDIC_NRF_EGU_50020000_IRQ_0
#define DT_NORDIC_NRF_EGU_50020000_IRQ_0_PRIORITY   1
#define DT_INST_5_NORDIC_NRF_EGU_IRQ_0_PRIORITY     DT_NORDIC_NRF_EGU_50020000_IRQ_0_PRIORITY
#define DT_INST_5_NORDIC_NRF_EGU                    1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/i2c@8000
 *
 * No matching binding.
 *
 * Dependency Ordinal: 44
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Node is disabled.
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/i2c@9000
 *
 * No matching binding.
 *
 * Dependency Ordinal: 45
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Node is disabled.
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/i2c@a000
 *
 * Binding (compatible = nordic,nrf-twim):
 *   $ZEPHYR_BASE\dts\bindings\i2c\nordic,nrf-twim.yaml
 *
 * Dependency Ordinal: 46
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic nRF family TWIM (TWI master with EasyDMA)
 *
 * Node is disabled.
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/i2c@b000
 *
 * No matching binding.
 *
 * Dependency Ordinal: 47
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Node is disabled.
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/i2s@28000
 *
 * Binding (compatible = nordic,nrf-i2s):
 *   $ZEPHYR_BASE\dts\bindings\i2s\nordic,nrf-i2s.yaml
 *
 * Dependency Ordinal: 48
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic I2S (Inter-IC sound interface)
 *
 * Node is disabled.
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/kmu@39000
 *
 * Binding (compatible = nordic,nrf-kmu):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-kmu.yaml
 *
 * Dependency Ordinal: 49
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic KMU (Key Management Unit)
 */
#define DT_NORDIC_NRF_KMU_50039000_BASE_ADDRESS     0x50039000
#define DT_INST_0_NORDIC_NRF_KMU_BASE_ADDRESS       DT_NORDIC_NRF_KMU_50039000_BASE_ADDRESS
#define DT_NORDIC_NRF_KMU_50039000_SIZE             4096
#define DT_INST_0_NORDIC_NRF_KMU_SIZE               DT_NORDIC_NRF_KMU_50039000_SIZE
#define DT_NORDIC_NRF_KMU_50039000_IRQ_0            57
#define DT_INST_0_NORDIC_NRF_KMU_IRQ_0              DT_NORDIC_NRF_KMU_50039000_IRQ_0
#define DT_NORDIC_NRF_KMU_50039000_IRQ_0_PRIORITY   1
#define DT_INST_0_NORDIC_NRF_KMU_IRQ_0_PRIORITY     DT_NORDIC_NRF_KMU_50039000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_KMU                    1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/pdm@26000
 *
 * Binding (compatible = nordic,nrf-pdm):
 *   $ZEPHYR_BASE\dts\bindings\audio\nordic,nrf-pdm.yaml
 *
 * Dependency Ordinal: 50
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic PDM (Pulse Density Modulation interface)
 *
 * Node is disabled.
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/power@5000
 *
 * Binding (compatible = nordic,nrf-power):
 *   $ZEPHYR_BASE\dts\bindings\power\nordic,nrf-power.yaml
 *
 * Dependency Ordinal: 51
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic nRF power control node
 */
#define DT_NORDIC_NRF_POWER_50005000_BASE_ADDRESS   0x50005000
#define DT_INST_0_NORDIC_NRF_POWER_BASE_ADDRESS     DT_NORDIC_NRF_POWER_50005000_BASE_ADDRESS
#define DT_NORDIC_NRF_POWER_50005000_SIZE           4096
#define DT_INST_0_NORDIC_NRF_POWER_SIZE             DT_NORDIC_NRF_POWER_50005000_SIZE
#define DT_NORDIC_NRF_POWER_50005000_IRQ_0          5
#define DT_INST_0_NORDIC_NRF_POWER_IRQ_0            DT_NORDIC_NRF_POWER_50005000_IRQ_0
#define DT_NORDIC_NRF_POWER_50005000_IRQ_0_PRIORITY 1
#define DT_INST_0_NORDIC_NRF_POWER_IRQ_0_PRIORITY   DT_NORDIC_NRF_POWER_50005000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_POWER                  1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/pwm@22000
 *
 * Binding (compatible = nordic,nrf-pwm):
 *   $ZEPHYR_BASE\dts\bindings\pwm\nordic,nrf-pwm.yaml
 *
 * Dependency Ordinal: 52
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   nRF PWM
 *
 * Node is disabled.
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/pwm@23000
 *
 * Binding (compatible = nordic,nrf-pwm):
 *   $ZEPHYR_BASE\dts\bindings\pwm\nordic,nrf-pwm.yaml
 *
 * Dependency Ordinal: 53
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   nRF PWM
 *
 * Node is disabled.
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/pwm@24000
 *
 * Binding (compatible = nordic,nrf-pwm):
 *   $ZEPHYR_BASE\dts\bindings\pwm\nordic,nrf-pwm.yaml
 *
 * Dependency Ordinal: 54
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   nRF PWM
 *
 * Node is disabled.
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/regulator@4000
 *
 * Binding (compatible = nordic,nrf-regulators):
 *   $ZEPHYR_BASE\dts\bindings\power\nordic,nrf-regulators.yaml
 *
 * Dependency Ordinal: 55
 *
 * Requires:
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic REGULATORS (voltage regulators control module)
 */
#define DT_NORDIC_NRF_REGULATORS_50004000_BASE_ADDRESS 0x50004000
#define DT_INST_0_NORDIC_NRF_REGULATORS_BASE_ADDRESS DT_NORDIC_NRF_REGULATORS_50004000_BASE_ADDRESS
#define DT_NORDIC_NRF_REGULATORS_50004000_SIZE      4096
#define DT_INST_0_NORDIC_NRF_REGULATORS_SIZE        DT_NORDIC_NRF_REGULATORS_50004000_SIZE
#define DT_INST_0_NORDIC_NRF_REGULATORS             1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/rtc@14000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   $ZEPHYR_BASE\dts\bindings\rtc\nordic,nrf-rtc.yaml
 *
 * Dependency Ordinal: 56
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic nRF RTC (Real-Time Counter)
 */
#define DT_NORDIC_NRF_RTC_50014000_BASE_ADDRESS     0x50014000
#define DT_INST_0_NORDIC_NRF_RTC_BASE_ADDRESS       DT_NORDIC_NRF_RTC_50014000_BASE_ADDRESS
#define DT_NORDIC_NRF_RTC_50014000_SIZE             4096
#define DT_INST_0_NORDIC_NRF_RTC_SIZE               DT_NORDIC_NRF_RTC_50014000_SIZE
#define DT_NORDIC_NRF_RTC_50014000_IRQ_0            20
#define DT_INST_0_NORDIC_NRF_RTC_IRQ_0              DT_NORDIC_NRF_RTC_50014000_IRQ_0
#define DT_NORDIC_NRF_RTC_50014000_IRQ_0_PRIORITY   1
#define DT_INST_0_NORDIC_NRF_RTC_IRQ_0_PRIORITY     DT_NORDIC_NRF_RTC_50014000_IRQ_0_PRIORITY
/* Enable wrapping with PPI */
#define DT_NORDIC_NRF_RTC_50014000_PPI_WRAP         0
#define DT_INST_0_NORDIC_NRF_RTC_PPI_WRAP           DT_NORDIC_NRF_RTC_50014000_PPI_WRAP
/* Enable fixed top value */
#define DT_NORDIC_NRF_RTC_50014000_FIXED_TOP        0
#define DT_INST_0_NORDIC_NRF_RTC_FIXED_TOP          DT_NORDIC_NRF_RTC_50014000_FIXED_TOP
/* Clock frequency information for RTC operation */
#define DT_NORDIC_NRF_RTC_50014000_CLOCK_FREQUENCY  32768
#define DT_INST_0_NORDIC_NRF_RTC_CLOCK_FREQUENCY    DT_NORDIC_NRF_RTC_50014000_CLOCK_FREQUENCY
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_RTC_50014000_LABEL            "RTC_0"
#define DT_INST_0_NORDIC_NRF_RTC_LABEL              DT_NORDIC_NRF_RTC_50014000_LABEL
/* RTC frequency equals clock-frequency divided by the prescaler value */
#define DT_NORDIC_NRF_RTC_50014000_PRESCALER        1
#define DT_INST_0_NORDIC_NRF_RTC_PRESCALER          DT_NORDIC_NRF_RTC_50014000_PRESCALER
#define DT_INST_0_NORDIC_NRF_RTC                    1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/rtc@15000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   $ZEPHYR_BASE\dts\bindings\rtc\nordic,nrf-rtc.yaml
 *
 * Dependency Ordinal: 57
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic nRF RTC (Real-Time Counter)
 */
#define DT_NORDIC_NRF_RTC_50015000_BASE_ADDRESS     0x50015000
#define DT_INST_1_NORDIC_NRF_RTC_BASE_ADDRESS       DT_NORDIC_NRF_RTC_50015000_BASE_ADDRESS
#define DT_NORDIC_NRF_RTC_50015000_SIZE             4096
#define DT_INST_1_NORDIC_NRF_RTC_SIZE               DT_NORDIC_NRF_RTC_50015000_SIZE
#define DT_NORDIC_NRF_RTC_50015000_IRQ_0            21
#define DT_INST_1_NORDIC_NRF_RTC_IRQ_0              DT_NORDIC_NRF_RTC_50015000_IRQ_0
#define DT_NORDIC_NRF_RTC_50015000_IRQ_0_PRIORITY   1
#define DT_INST_1_NORDIC_NRF_RTC_IRQ_0_PRIORITY     DT_NORDIC_NRF_RTC_50015000_IRQ_0_PRIORITY
/* Enable wrapping with PPI */
#define DT_NORDIC_NRF_RTC_50015000_PPI_WRAP         0
#define DT_INST_1_NORDIC_NRF_RTC_PPI_WRAP           DT_NORDIC_NRF_RTC_50015000_PPI_WRAP
/* Enable fixed top value */
#define DT_NORDIC_NRF_RTC_50015000_FIXED_TOP        0
#define DT_INST_1_NORDIC_NRF_RTC_FIXED_TOP          DT_NORDIC_NRF_RTC_50015000_FIXED_TOP
/* Clock frequency information for RTC operation */
#define DT_NORDIC_NRF_RTC_50015000_CLOCK_FREQUENCY  32768
#define DT_INST_1_NORDIC_NRF_RTC_CLOCK_FREQUENCY    DT_NORDIC_NRF_RTC_50015000_CLOCK_FREQUENCY
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_RTC_50015000_LABEL            "RTC_1"
#define DT_INST_1_NORDIC_NRF_RTC_LABEL              DT_NORDIC_NRF_RTC_50015000_LABEL
/* RTC frequency equals clock-frequency divided by the prescaler value */
#define DT_NORDIC_NRF_RTC_50015000_PRESCALER        1
#define DT_INST_1_NORDIC_NRF_RTC_PRESCALER          DT_NORDIC_NRF_RTC_50015000_PRESCALER
#define DT_INST_1_NORDIC_NRF_RTC                    1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/spi@8000
 *
 * No matching binding.
 *
 * Dependency Ordinal: 58
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Node is disabled.
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/spi@9000
 *
 * No matching binding.
 *
 * Dependency Ordinal: 59
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Node is disabled.
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/spi@a000
 *
 * No matching binding.
 *
 * Dependency Ordinal: 60
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Node is disabled.
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/spi@b000
 *
 * Binding (compatible = nordic,nrf-spim):
 *   $ZEPHYR_BASE\dts\bindings\spi\nordic,nrf-spim.yaml
 *
 * Dependency Ordinal: 61
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic nRF family SPIM (SPI master with EasyDMA)
 */
#define DT_NORDIC_NRF_SPIM_5000B000_BASE_ADDRESS    0x5000b000
#define DT_INST_0_NORDIC_NRF_SPIM_BASE_ADDRESS      DT_NORDIC_NRF_SPIM_5000B000_BASE_ADDRESS
#define DT_NORDIC_NRF_SPIM_5000B000_SIZE            4096
#define DT_INST_0_NORDIC_NRF_SPIM_SIZE              DT_NORDIC_NRF_SPIM_5000B000_SIZE
#define DT_NORDIC_NRF_SPIM_5000B000_IRQ_0           11
#define DT_INST_0_NORDIC_NRF_SPIM_IRQ_0             DT_NORDIC_NRF_SPIM_5000B000_IRQ_0
#define DT_NORDIC_NRF_SPIM_5000B000_IRQ_0_PRIORITY  1
#define DT_INST_0_NORDIC_NRF_SPIM_IRQ_0_PRIORITY    DT_NORDIC_NRF_SPIM_5000B000_IRQ_0_PRIORITY
/* Enable pull-up on MISO line */
#define DT_NORDIC_NRF_SPIM_5000B000_MISO_PULL_UP    0
#define DT_INST_0_NORDIC_NRF_SPIM_MISO_PULL_UP      DT_NORDIC_NRF_SPIM_5000B000_MISO_PULL_UP
/* Enable pull-down on MISO line */
#define DT_NORDIC_NRF_SPIM_5000B000_MISO_PULL_DOWN  0
#define DT_INST_0_NORDIC_NRF_SPIM_MISO_PULL_DOWN    DT_NORDIC_NRF_SPIM_5000B000_MISO_PULL_DOWN
/* SCK pin */
#define DT_NORDIC_NRF_SPIM_5000B000_SCK_PIN         19
#define DT_INST_0_NORDIC_NRF_SPIM_SCK_PIN           DT_NORDIC_NRF_SPIM_5000B000_SCK_PIN
/* MOSI pin */
#define DT_NORDIC_NRF_SPIM_5000B000_MOSI_PIN        18
#define DT_INST_0_NORDIC_NRF_SPIM_MOSI_PIN          DT_NORDIC_NRF_SPIM_5000B000_MOSI_PIN
/* MISO pin */
#define DT_NORDIC_NRF_SPIM_5000B000_MISO_PIN        17
#define DT_INST_0_NORDIC_NRF_SPIM_MISO_PIN          DT_NORDIC_NRF_SPIM_5000B000_MISO_PIN
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_SPIM_5000B000_LABEL           "SPI_3"
#define DT_INST_0_NORDIC_NRF_SPIM_LABEL             DT_NORDIC_NRF_SPIM_5000B000_LABEL
#define DT_INST_0_NORDIC_NRF_SPIM                   1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/timer@f000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * Dependency Ordinal: 62
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic nRF timer node
 */
#define DT_NORDIC_NRF_TIMER_5000F000_BASE_ADDRESS   0x5000f000
#define DT_INST_0_NORDIC_NRF_TIMER_BASE_ADDRESS     DT_NORDIC_NRF_TIMER_5000F000_BASE_ADDRESS
#define DT_NORDIC_NRF_TIMER_5000F000_SIZE           4096
#define DT_INST_0_NORDIC_NRF_TIMER_SIZE             DT_NORDIC_NRF_TIMER_5000F000_SIZE
#define DT_NORDIC_NRF_TIMER_5000F000_IRQ_0          15
#define DT_INST_0_NORDIC_NRF_TIMER_IRQ_0            DT_NORDIC_NRF_TIMER_5000F000_IRQ_0
#define DT_NORDIC_NRF_TIMER_5000F000_IRQ_0_PRIORITY 1
#define DT_INST_0_NORDIC_NRF_TIMER_IRQ_0_PRIORITY   DT_NORDIC_NRF_TIMER_5000F000_IRQ_0_PRIORITY
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_TIMER_5000F000_LABEL          "TIMER_0"
#define DT_INST_0_NORDIC_NRF_TIMER_LABEL            DT_NORDIC_NRF_TIMER_5000F000_LABEL
/* Prescaler value determines frequency (16MHz/2^prescaler) */
#define DT_NORDIC_NRF_TIMER_5000F000_PRESCALER      0
#define DT_INST_0_NORDIC_NRF_TIMER_PRESCALER        DT_NORDIC_NRF_TIMER_5000F000_PRESCALER
#define DT_INST_0_NORDIC_NRF_TIMER                  1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/timer@10000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * Dependency Ordinal: 63
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic nRF timer node
 */
#define DT_NORDIC_NRF_TIMER_50010000_BASE_ADDRESS   0x50010000
#define DT_INST_1_NORDIC_NRF_TIMER_BASE_ADDRESS     DT_NORDIC_NRF_TIMER_50010000_BASE_ADDRESS
#define DT_NORDIC_NRF_TIMER_50010000_SIZE           4096
#define DT_INST_1_NORDIC_NRF_TIMER_SIZE             DT_NORDIC_NRF_TIMER_50010000_SIZE
#define DT_NORDIC_NRF_TIMER_50010000_IRQ_0          16
#define DT_INST_1_NORDIC_NRF_TIMER_IRQ_0            DT_NORDIC_NRF_TIMER_50010000_IRQ_0
#define DT_NORDIC_NRF_TIMER_50010000_IRQ_0_PRIORITY 1
#define DT_INST_1_NORDIC_NRF_TIMER_IRQ_0_PRIORITY   DT_NORDIC_NRF_TIMER_50010000_IRQ_0_PRIORITY
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_TIMER_50010000_LABEL          "TIMER_1"
#define DT_INST_1_NORDIC_NRF_TIMER_LABEL            DT_NORDIC_NRF_TIMER_50010000_LABEL
/* Prescaler value determines frequency (16MHz/2^prescaler) */
#define DT_NORDIC_NRF_TIMER_50010000_PRESCALER      0
#define DT_INST_1_NORDIC_NRF_TIMER_PRESCALER        DT_NORDIC_NRF_TIMER_50010000_PRESCALER
#define DT_INST_1_NORDIC_NRF_TIMER                  1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/timer@11000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * Dependency Ordinal: 64
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic nRF timer node
 */
#define DT_NORDIC_NRF_TIMER_50011000_BASE_ADDRESS   0x50011000
#define DT_INST_2_NORDIC_NRF_TIMER_BASE_ADDRESS     DT_NORDIC_NRF_TIMER_50011000_BASE_ADDRESS
#define DT_NORDIC_NRF_TIMER_50011000_SIZE           4096
#define DT_INST_2_NORDIC_NRF_TIMER_SIZE             DT_NORDIC_NRF_TIMER_50011000_SIZE
#define DT_NORDIC_NRF_TIMER_50011000_IRQ_0          17
#define DT_INST_2_NORDIC_NRF_TIMER_IRQ_0            DT_NORDIC_NRF_TIMER_50011000_IRQ_0
#define DT_NORDIC_NRF_TIMER_50011000_IRQ_0_PRIORITY 1
#define DT_INST_2_NORDIC_NRF_TIMER_IRQ_0_PRIORITY   DT_NORDIC_NRF_TIMER_50011000_IRQ_0_PRIORITY
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_TIMER_50011000_LABEL          "TIMER_2"
#define DT_INST_2_NORDIC_NRF_TIMER_LABEL            DT_NORDIC_NRF_TIMER_50011000_LABEL
/* Prescaler value determines frequency (16MHz/2^prescaler) */
#define DT_NORDIC_NRF_TIMER_50011000_PRESCALER      0
#define DT_INST_2_NORDIC_NRF_TIMER_PRESCALER        DT_NORDIC_NRF_TIMER_50011000_PRESCALER
#define DT_INST_2_NORDIC_NRF_TIMER                  1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/uart@8000
 *
 * Binding (compatible = nordic,nrf-uarte):
 *   $ZEPHYR_BASE\dts\bindings\serial\nordic,nrf-uarte.yaml
 *
 * Dependency Ordinal: 65
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic UARTE
 */
#define DT_NORDIC_NRF_UARTE_50008000_BASE_ADDRESS   0x50008000
#define DT_INST_0_NORDIC_NRF_UARTE_BASE_ADDRESS     DT_NORDIC_NRF_UARTE_50008000_BASE_ADDRESS
#define DT_NORDIC_NRF_UARTE_50008000_SIZE           4096
#define DT_INST_0_NORDIC_NRF_UARTE_SIZE             DT_NORDIC_NRF_UARTE_50008000_SIZE
#define DT_NORDIC_NRF_UARTE_50008000_IRQ_0          8
#define DT_INST_0_NORDIC_NRF_UARTE_IRQ_0            DT_NORDIC_NRF_UARTE_50008000_IRQ_0
#define DT_NORDIC_NRF_UARTE_50008000_IRQ_0_PRIORITY 1
#define DT_INST_0_NORDIC_NRF_UARTE_IRQ_0_PRIORITY   DT_NORDIC_NRF_UARTE_50008000_IRQ_0_PRIORITY
/* TX pin */
#define DT_NORDIC_NRF_UARTE_50008000_TX_PIN         29
#define DT_INST_0_NORDIC_NRF_UARTE_TX_PIN           DT_NORDIC_NRF_UARTE_50008000_TX_PIN
/* RX pin */
#define DT_NORDIC_NRF_UARTE_50008000_RX_PIN         28
#define DT_INST_0_NORDIC_NRF_UARTE_RX_PIN           DT_NORDIC_NRF_UARTE_50008000_RX_PIN
/* RTS pin */
#define DT_NORDIC_NRF_UARTE_50008000_RTS_PIN        27
#define DT_INST_0_NORDIC_NRF_UARTE_RTS_PIN          DT_NORDIC_NRF_UARTE_50008000_RTS_PIN
/* CTS pin */
#define DT_NORDIC_NRF_UARTE_50008000_CTS_PIN        26
#define DT_INST_0_NORDIC_NRF_UARTE_CTS_PIN          DT_NORDIC_NRF_UARTE_50008000_CTS_PIN
/* Initial baud rate setting for UART */
#define DT_NORDIC_NRF_UARTE_50008000_CURRENT_SPEED  115200
#define DT_INST_0_NORDIC_NRF_UARTE_CURRENT_SPEED    DT_NORDIC_NRF_UARTE_50008000_CURRENT_SPEED
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_UARTE_50008000_LABEL          "UART_0"
#define DT_INST_0_NORDIC_NRF_UARTE_LABEL            DT_NORDIC_NRF_UARTE_50008000_LABEL
/* Set to enable RTS/CTS flow control at boot time */
#define DT_NORDIC_NRF_UARTE_50008000_HW_FLOW_CONTROL 0
#define DT_INST_0_NORDIC_NRF_UARTE_HW_FLOW_CONTROL  DT_NORDIC_NRF_UARTE_50008000_HW_FLOW_CONTROL
#define DT_INST_0_NORDIC_NRF_UARTE                  1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/uart@9000
 *
 * Binding (compatible = nordic,nrf-uarte):
 *   $ZEPHYR_BASE\dts\bindings\serial\nordic,nrf-uarte.yaml
 *
 * Dependency Ordinal: 66
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic UARTE
 */
#define DT_NORDIC_NRF_UARTE_50009000_BASE_ADDRESS   0x50009000
#define DT_INST_1_NORDIC_NRF_UARTE_BASE_ADDRESS     DT_NORDIC_NRF_UARTE_50009000_BASE_ADDRESS
#define DT_NORDIC_NRF_UARTE_50009000_SIZE           4096
#define DT_INST_1_NORDIC_NRF_UARTE_SIZE             DT_NORDIC_NRF_UARTE_50009000_SIZE
#define DT_NORDIC_NRF_UARTE_50009000_IRQ_0          9
#define DT_INST_1_NORDIC_NRF_UARTE_IRQ_0            DT_NORDIC_NRF_UARTE_50009000_IRQ_0
#define DT_NORDIC_NRF_UARTE_50009000_IRQ_0_PRIORITY 1
#define DT_INST_1_NORDIC_NRF_UARTE_IRQ_0_PRIORITY   DT_NORDIC_NRF_UARTE_50009000_IRQ_0_PRIORITY
/* TX pin */
#define DT_NORDIC_NRF_UARTE_50009000_TX_PIN         1
#define DT_INST_1_NORDIC_NRF_UARTE_TX_PIN           DT_NORDIC_NRF_UARTE_50009000_TX_PIN
/* RX pin */
#define DT_NORDIC_NRF_UARTE_50009000_RX_PIN         0
#define DT_INST_1_NORDIC_NRF_UARTE_RX_PIN           DT_NORDIC_NRF_UARTE_50009000_RX_PIN
/* RTS pin */
#define DT_NORDIC_NRF_UARTE_50009000_RTS_PIN        14
#define DT_INST_1_NORDIC_NRF_UARTE_RTS_PIN          DT_NORDIC_NRF_UARTE_50009000_RTS_PIN
/* CTS pin */
#define DT_NORDIC_NRF_UARTE_50009000_CTS_PIN        15
#define DT_INST_1_NORDIC_NRF_UARTE_CTS_PIN          DT_NORDIC_NRF_UARTE_50009000_CTS_PIN
/* Initial baud rate setting for UART */
#define DT_NORDIC_NRF_UARTE_50009000_CURRENT_SPEED  115200
#define DT_INST_1_NORDIC_NRF_UARTE_CURRENT_SPEED    DT_NORDIC_NRF_UARTE_50009000_CURRENT_SPEED
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_UARTE_50009000_LABEL          "UART_1"
#define DT_INST_1_NORDIC_NRF_UARTE_LABEL            DT_NORDIC_NRF_UARTE_50009000_LABEL
/* Set to enable RTS/CTS flow control at boot time */
#define DT_NORDIC_NRF_UARTE_50009000_HW_FLOW_CONTROL 0
#define DT_INST_1_NORDIC_NRF_UARTE_HW_FLOW_CONTROL  DT_NORDIC_NRF_UARTE_50009000_HW_FLOW_CONTROL
#define DT_INST_1_NORDIC_NRF_UARTE                  1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/uart@a000
 *
 * Binding (compatible = nordic,nrf-uarte):
 *   $ZEPHYR_BASE\dts\bindings\serial\nordic,nrf-uarte.yaml
 *
 * Dependency Ordinal: 67
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic UARTE
 *
 * Node is disabled.
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/uart@b000
 *
 * Binding (compatible = nordic,nrf-uarte):
 *   $ZEPHYR_BASE\dts\bindings\serial\nordic,nrf-uarte.yaml
 *
 * Dependency Ordinal: 68
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic UARTE
 *
 * Node is disabled.
 */

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/vmc@3a000
 *
 * Binding (compatible = nordic,nrf-vmc):
 *   $ZEPHYR_BASE\dts\bindings\power\nordic,nrf-vmc.yaml
 *
 * Dependency Ordinal: 69
 *
 * Requires:
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic VMC (Volatile Memory Controller)
 */
#define DT_NORDIC_NRF_VMC_5003A000_BASE_ADDRESS     0x5003a000
#define DT_INST_0_NORDIC_NRF_VMC_BASE_ADDRESS       DT_NORDIC_NRF_VMC_5003A000_BASE_ADDRESS
#define DT_NORDIC_NRF_VMC_5003A000_SIZE             4096
#define DT_INST_0_NORDIC_NRF_VMC_SIZE               DT_NORDIC_NRF_VMC_5003A000_SIZE
#define DT_INST_0_NORDIC_NRF_VMC                    1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/watchdog@18000
 *
 * Binding (compatible = nordic,nrf-watchdog):
 *   $ZEPHYR_BASE\dts\bindings\watchdog\nordic,nrf-watchdog.yaml
 *
 * Dependency Ordinal: 70
 *
 * Requires:
 *   20  /soc/interrupt-controller@e000e100
 *   5   /soc/peripheral@50000000
 *
 * Description:
 *   Nordic Semiconductor nRF watchdog
 */
#define DT_NORDIC_NRF_WATCHDOG_50018000_BASE_ADDRESS 0x50018000
#define DT_INST_0_NORDIC_NRF_WATCHDOG_BASE_ADDRESS  DT_NORDIC_NRF_WATCHDOG_50018000_BASE_ADDRESS
#define DT_NORDIC_NRF_WATCHDOG_50018000_SIZE        4096
#define DT_INST_0_NORDIC_NRF_WATCHDOG_SIZE          DT_NORDIC_NRF_WATCHDOG_50018000_SIZE
#define DT_NORDIC_NRF_WATCHDOG_50018000_IRQ_0       24
#define DT_INST_0_NORDIC_NRF_WATCHDOG_IRQ_0         DT_NORDIC_NRF_WATCHDOG_50018000_IRQ_0
#define DT_NORDIC_NRF_WATCHDOG_50018000_IRQ_0_PRIORITY 1
#define DT_INST_0_NORDIC_NRF_WATCHDOG_IRQ_0_PRIORITY DT_NORDIC_NRF_WATCHDOG_50018000_IRQ_0_PRIORITY
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF_WATCHDOG_50018000_LABEL       "WDT"
#define DT_INST_0_NORDIC_NRF_WATCHDOG_LABEL         DT_NORDIC_NRF_WATCHDOG_50018000_LABEL
#define DT_INST_0_NORDIC_NRF_WATCHDOG               1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/flash-controller@39000
 *
 * Binding (compatible = nordic,nrf91-flash-controller):
 *   $ZEPHYR_BASE\dts\bindings\flash_controller\nordic,nrf91-flash-controller.yaml
 *
 * Dependency Ordinal: 71
 *
 * Requires:
 *   5   /soc/peripheral@50000000
 *
 * Supports:
 *   72  /soc/peripheral@50000000/flash-controller@39000/flash@0
 *
 * Description:
 *   Nordic NVMC (Non-Volatile Memory Controller)
 */
#define DT_NORDIC_NRF91_FLASH_CONTROLLER_50039000_BASE_ADDRESS 0x50039000
#define DT_INST_0_NORDIC_NRF91_FLASH_CONTROLLER_BASE_ADDRESS DT_NORDIC_NRF91_FLASH_CONTROLLER_50039000_BASE_ADDRESS
#define DT_NORDIC_NRF91_FLASH_CONTROLLER_50039000_SIZE 4096
#define DT_INST_0_NORDIC_NRF91_FLASH_CONTROLLER_SIZE DT_NORDIC_NRF91_FLASH_CONTROLLER_50039000_SIZE
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_NORDIC_NRF91_FLASH_CONTROLLER_50039000_LABEL "NRF_FLASH_DRV_NAME"
#define DT_INST_0_NORDIC_NRF91_FLASH_CONTROLLER_LABEL DT_NORDIC_NRF91_FLASH_CONTROLLER_50039000_LABEL
#define DT_INST_0_NORDIC_NRF91_FLASH_CONTROLLER     1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/flash-controller@39000/flash@0
 *
 * Binding (compatible = soc-nv-flash):
 *   $ZEPHYR_BASE\dts\bindings\mtd\soc-nv-flash.yaml
 *
 * Dependency Ordinal: 72
 *
 * Requires:
 *   71  /soc/peripheral@50000000/flash-controller@39000
 *
 * Supports:
 *   73  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions
 *
 * Description:
 *   Flash node
 */
#define DT_SOC_NV_FLASH_0_BASE_ADDRESS              0x0
#define DT_INST_0_SOC_NV_FLASH_BASE_ADDRESS         DT_SOC_NV_FLASH_0_BASE_ADDRESS
#define DT_SOC_NV_FLASH_0_SIZE                      1048576
#define DT_INST_0_SOC_NV_FLASH_SIZE                 DT_SOC_NV_FLASH_0_SIZE
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_SOC_NV_FLASH_0_LABEL                     "NRF_FLASH"
#define DT_INST_0_SOC_NV_FLASH_LABEL                DT_SOC_NV_FLASH_0_LABEL
/* address alignment required by flash erase operations */
#define DT_SOC_NV_FLASH_0_ERASE_BLOCK_SIZE          4096
#define DT_INST_0_SOC_NV_FLASH_ERASE_BLOCK_SIZE     DT_SOC_NV_FLASH_0_ERASE_BLOCK_SIZE
/* address alignment required by flash write operations */
#define DT_SOC_NV_FLASH_0_WRITE_BLOCK_SIZE          4
#define DT_INST_0_SOC_NV_FLASH_WRITE_BLOCK_SIZE     DT_SOC_NV_FLASH_0_WRITE_BLOCK_SIZE
#define DT_INST_0_SOC_NV_FLASH                      1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions
 *
 * Binding (compatible = fixed-partitions):
 *   $ZEPHYR_BASE\dts\bindings\mtd\partition.yaml
 *
 * Dependency Ordinal: 73
 *
 * Requires:
 *   72  /soc/peripheral@50000000/flash-controller@39000/flash@0
 *
 * Supports:
 *   74  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0
 *   75  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000
 *   76  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000
 *   77  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@80000
 *   78  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c0000
 *   79  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@f0000
 *   80  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000
 *
 * Description:
 *   Flash partitions parent node
 */
#define DT_INST_0_FIXED_PARTITIONS                  1

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@0
 *
 * Binding (compatible = fixed-partitions):
 *   $ZEPHYR_BASE\dts\bindings\mtd\partition.yaml
 *
 * Dependency Ordinal: 74
 *
 * Requires:
 *   73  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions
 *
 * Description:
 *   Flash partition child node
 */
#define DT_FLASH_AREA_MCUBOOT_ID                    0
#define DT_FLASH_AREA_MCUBOOT_READ_ONLY             0
#define DT_FLASH_AREA_MCUBOOT_OFFSET_0              0
#define DT_FLASH_AREA_MCUBOOT_OFFSET                DT_FLASH_AREA_MCUBOOT_OFFSET_0
#define DT_FLASH_AREA_MCUBOOT_SIZE_0                65536
#define DT_FLASH_AREA_MCUBOOT_SIZE                  DT_FLASH_AREA_MCUBOOT_SIZE_0
#define DT_FLASH_AREA_MCUBOOT_DEV                   "NRF_FLASH_DRV_NAME"
#define DT_FLASH_AREA_0_ID                          0
#define DT_FLASH_AREA_0_READ_ONLY                   0
#define DT_FLASH_AREA_0_OFFSET_0                    0
#define DT_FLASH_AREA_0_OFFSET                      DT_FLASH_AREA_0_OFFSET_0
#define DT_FLASH_AREA_0_SIZE_0                      65536
#define DT_FLASH_AREA_0_SIZE                        DT_FLASH_AREA_0_SIZE_0
#define DT_FLASH_AREA_0_DEV                         "NRF_FLASH_DRV_NAME"
#define DT_FIXED_PARTITIONS_0_BASE_ADDRESS          0x0
#define DT_FIXED_PARTITIONS_0_SIZE                  65536
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_FIXED_PARTITIONS_0_LABEL                 "mcuboot"
/* if the partition is read-only or not */
#define DT_FIXED_PARTITIONS_0_READ_ONLY             0

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000
 *
 * Binding (compatible = fixed-partitions):
 *   $ZEPHYR_BASE\dts\bindings\mtd\partition.yaml
 *
 * Dependency Ordinal: 75
 *
 * Requires:
 *   73  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions
 *
 * Description:
 *   Flash partition child node
 */
#define DT_FLASH_AREA_IMAGE_0_ID                    1
#define DT_FLASH_AREA_IMAGE_0_READ_ONLY             0
#define DT_FLASH_AREA_IMAGE_0_OFFSET_0              65536
#define DT_FLASH_AREA_IMAGE_0_OFFSET                DT_FLASH_AREA_IMAGE_0_OFFSET_0
#define DT_FLASH_AREA_IMAGE_0_SIZE_0                262144
#define DT_FLASH_AREA_IMAGE_0_SIZE                  DT_FLASH_AREA_IMAGE_0_SIZE_0
#define DT_FLASH_AREA_IMAGE_0_DEV                   "NRF_FLASH_DRV_NAME"
#define DT_FLASH_AREA_1_ID                          1
#define DT_FLASH_AREA_1_READ_ONLY                   0
#define DT_FLASH_AREA_1_OFFSET_0                    65536
#define DT_FLASH_AREA_1_OFFSET                      DT_FLASH_AREA_1_OFFSET_0
#define DT_FLASH_AREA_1_SIZE_0                      262144
#define DT_FLASH_AREA_1_SIZE                        DT_FLASH_AREA_1_SIZE_0
#define DT_FLASH_AREA_1_DEV                         "NRF_FLASH_DRV_NAME"
#define DT_FIXED_PARTITIONS_10000_BASE_ADDRESS      0x10000
#define DT_FIXED_PARTITIONS_10000_SIZE              262144
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_FIXED_PARTITIONS_10000_LABEL             "image-0"
/* if the partition is read-only or not */
#define DT_FIXED_PARTITIONS_10000_READ_ONLY         0

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@50000
 *
 * Binding (compatible = fixed-partitions):
 *   $ZEPHYR_BASE\dts\bindings\mtd\partition.yaml
 *
 * Dependency Ordinal: 76
 *
 * Requires:
 *   73  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions
 *
 * Description:
 *   Flash partition child node
 */
#define DT_FLASH_AREA_IMAGE_0_NONSECURE_ID          2
#define DT_FLASH_AREA_IMAGE_0_NONSECURE_READ_ONLY   0
#define DT_FLASH_AREA_IMAGE_0_NONSECURE_OFFSET_0    327680
#define DT_FLASH_AREA_IMAGE_0_NONSECURE_OFFSET      DT_FLASH_AREA_IMAGE_0_NONSECURE_OFFSET_0
#define DT_FLASH_AREA_IMAGE_0_NONSECURE_SIZE_0      196608
#define DT_FLASH_AREA_IMAGE_0_NONSECURE_SIZE        DT_FLASH_AREA_IMAGE_0_NONSECURE_SIZE_0
#define DT_FLASH_AREA_IMAGE_0_NONSECURE_DEV         "NRF_FLASH_DRV_NAME"
#define DT_FLASH_AREA_2_ID                          2
#define DT_FLASH_AREA_2_READ_ONLY                   0
#define DT_FLASH_AREA_2_OFFSET_0                    327680
#define DT_FLASH_AREA_2_OFFSET                      DT_FLASH_AREA_2_OFFSET_0
#define DT_FLASH_AREA_2_SIZE_0                      196608
#define DT_FLASH_AREA_2_SIZE                        DT_FLASH_AREA_2_SIZE_0
#define DT_FLASH_AREA_2_DEV                         "NRF_FLASH_DRV_NAME"
#define DT_FIXED_PARTITIONS_50000_BASE_ADDRESS      0x50000
#define DT_FIXED_PARTITIONS_50000_SIZE              196608
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_FIXED_PARTITIONS_50000_LABEL             "image-0-nonsecure"
/* if the partition is read-only or not */
#define DT_FIXED_PARTITIONS_50000_READ_ONLY         0

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@80000
 *
 * Binding (compatible = fixed-partitions):
 *   $ZEPHYR_BASE\dts\bindings\mtd\partition.yaml
 *
 * Dependency Ordinal: 77
 *
 * Requires:
 *   73  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions
 *
 * Description:
 *   Flash partition child node
 */
#define DT_FLASH_AREA_IMAGE_1_ID                    3
#define DT_FLASH_AREA_IMAGE_1_READ_ONLY             0
#define DT_FLASH_AREA_IMAGE_1_OFFSET_0              524288
#define DT_FLASH_AREA_IMAGE_1_OFFSET                DT_FLASH_AREA_IMAGE_1_OFFSET_0
#define DT_FLASH_AREA_IMAGE_1_SIZE_0                262144
#define DT_FLASH_AREA_IMAGE_1_SIZE                  DT_FLASH_AREA_IMAGE_1_SIZE_0
#define DT_FLASH_AREA_IMAGE_1_DEV                   "NRF_FLASH_DRV_NAME"
#define DT_FLASH_AREA_3_ID                          3
#define DT_FLASH_AREA_3_READ_ONLY                   0
#define DT_FLASH_AREA_3_OFFSET_0                    524288
#define DT_FLASH_AREA_3_OFFSET                      DT_FLASH_AREA_3_OFFSET_0
#define DT_FLASH_AREA_3_SIZE_0                      262144
#define DT_FLASH_AREA_3_SIZE                        DT_FLASH_AREA_3_SIZE_0
#define DT_FLASH_AREA_3_DEV                         "NRF_FLASH_DRV_NAME"
#define DT_FIXED_PARTITIONS_80000_BASE_ADDRESS      0x80000
#define DT_FIXED_PARTITIONS_80000_SIZE              262144
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_FIXED_PARTITIONS_80000_LABEL             "image-1"
/* if the partition is read-only or not */
#define DT_FIXED_PARTITIONS_80000_READ_ONLY         0

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@c0000
 *
 * Binding (compatible = fixed-partitions):
 *   $ZEPHYR_BASE\dts\bindings\mtd\partition.yaml
 *
 * Dependency Ordinal: 78
 *
 * Requires:
 *   73  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions
 *
 * Description:
 *   Flash partition child node
 */
#define DT_FLASH_AREA_IMAGE_1_NONSECURE_ID          4
#define DT_FLASH_AREA_IMAGE_1_NONSECURE_READ_ONLY   0
#define DT_FLASH_AREA_IMAGE_1_NONSECURE_OFFSET_0    786432
#define DT_FLASH_AREA_IMAGE_1_NONSECURE_OFFSET      DT_FLASH_AREA_IMAGE_1_NONSECURE_OFFSET_0
#define DT_FLASH_AREA_IMAGE_1_NONSECURE_SIZE_0      196608
#define DT_FLASH_AREA_IMAGE_1_NONSECURE_SIZE        DT_FLASH_AREA_IMAGE_1_NONSECURE_SIZE_0
#define DT_FLASH_AREA_IMAGE_1_NONSECURE_DEV         "NRF_FLASH_DRV_NAME"
#define DT_FLASH_AREA_4_ID                          4
#define DT_FLASH_AREA_4_READ_ONLY                   0
#define DT_FLASH_AREA_4_OFFSET_0                    786432
#define DT_FLASH_AREA_4_OFFSET                      DT_FLASH_AREA_4_OFFSET_0
#define DT_FLASH_AREA_4_SIZE_0                      196608
#define DT_FLASH_AREA_4_SIZE                        DT_FLASH_AREA_4_SIZE_0
#define DT_FLASH_AREA_4_DEV                         "NRF_FLASH_DRV_NAME"
#define DT_FIXED_PARTITIONS_C0000_BASE_ADDRESS      0xc0000
#define DT_FIXED_PARTITIONS_C0000_SIZE              196608
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_FIXED_PARTITIONS_C0000_LABEL             "image-1-nonsecure"
/* if the partition is read-only or not */
#define DT_FIXED_PARTITIONS_C0000_READ_ONLY         0

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@f0000
 *
 * Binding (compatible = fixed-partitions):
 *   $ZEPHYR_BASE\dts\bindings\mtd\partition.yaml
 *
 * Dependency Ordinal: 79
 *
 * Requires:
 *   73  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions
 *
 * Description:
 *   Flash partition child node
 */
#define DT_FLASH_AREA_IMAGE_SCRATCH_ID              5
#define DT_FLASH_AREA_IMAGE_SCRATCH_READ_ONLY       0
#define DT_FLASH_AREA_IMAGE_SCRATCH_OFFSET_0        983040
#define DT_FLASH_AREA_IMAGE_SCRATCH_OFFSET          DT_FLASH_AREA_IMAGE_SCRATCH_OFFSET_0
#define DT_FLASH_AREA_IMAGE_SCRATCH_SIZE_0          40960
#define DT_FLASH_AREA_IMAGE_SCRATCH_SIZE            DT_FLASH_AREA_IMAGE_SCRATCH_SIZE_0
#define DT_FLASH_AREA_IMAGE_SCRATCH_DEV             "NRF_FLASH_DRV_NAME"
#define DT_FLASH_AREA_5_ID                          5
#define DT_FLASH_AREA_5_READ_ONLY                   0
#define DT_FLASH_AREA_5_OFFSET_0                    983040
#define DT_FLASH_AREA_5_OFFSET                      DT_FLASH_AREA_5_OFFSET_0
#define DT_FLASH_AREA_5_SIZE_0                      40960
#define DT_FLASH_AREA_5_SIZE                        DT_FLASH_AREA_5_SIZE_0
#define DT_FLASH_AREA_5_DEV                         "NRF_FLASH_DRV_NAME"
#define DT_FIXED_PARTITIONS_F0000_BASE_ADDRESS      0xf0000
#define DT_FIXED_PARTITIONS_F0000_SIZE              40960
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_FIXED_PARTITIONS_F0000_LABEL             "image-scratch"
/* if the partition is read-only or not */
#define DT_FIXED_PARTITIONS_F0000_READ_ONLY         0

/*
 * Devicetree node:
 *   /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@fa000
 *
 * Binding (compatible = fixed-partitions):
 *   $ZEPHYR_BASE\dts\bindings\mtd\partition.yaml
 *
 * Dependency Ordinal: 80
 *
 * Requires:
 *   73  /soc/peripheral@50000000/flash-controller@39000/flash@0/partitions
 *
 * Description:
 *   Flash partition child node
 */
#define DT_FLASH_AREA_STORAGE_ID                    6
#define DT_FLASH_AREA_STORAGE_READ_ONLY             0
#define DT_FLASH_AREA_STORAGE_OFFSET_0              1024000
#define DT_FLASH_AREA_STORAGE_OFFSET                DT_FLASH_AREA_STORAGE_OFFSET_0
#define DT_FLASH_AREA_STORAGE_SIZE_0                24576
#define DT_FLASH_AREA_STORAGE_SIZE                  DT_FLASH_AREA_STORAGE_SIZE_0
#define DT_FLASH_AREA_STORAGE_DEV                   "NRF_FLASH_DRV_NAME"
#define DT_FLASH_AREA_6_ID                          6
#define DT_FLASH_AREA_6_READ_ONLY                   0
#define DT_FLASH_AREA_6_OFFSET_0                    1024000
#define DT_FLASH_AREA_6_OFFSET                      DT_FLASH_AREA_6_OFFSET_0
#define DT_FLASH_AREA_6_SIZE_0                      24576
#define DT_FLASH_AREA_6_SIZE                        DT_FLASH_AREA_6_SIZE_0
#define DT_FLASH_AREA_6_DEV                         "NRF_FLASH_DRV_NAME"
#define DT_FIXED_PARTITIONS_FA000_BASE_ADDRESS      0xfa000
#define DT_FIXED_PARTITIONS_FA000_SIZE              24576
/* Human readable string describing the device (used as device_get_binding() argument) */
#define DT_FIXED_PARTITIONS_FA000_LABEL             "storage"
/* if the partition is read-only or not */
#define DT_FIXED_PARTITIONS_FA000_READ_ONLY         0

/* Compatibles appearing on enabled nodes */
#define DT_COMPAT_ARM_ARMV8M_MPU                    1
#define DT_COMPAT_ARM_CORTEX_M33F                   1
#define DT_COMPAT_ARM_CRYPTOCELL_310                1
#define DT_COMPAT_ARM_V8M_NVIC                      1
#define DT_COMPAT_FIXED_PARTITIONS                  1
#define DT_COMPAT_GPIO_KEYS                         1
#define DT_COMPAT_GPIO_LEDS                         1
#define DT_COMPAT_MMIO_SRAM                         1
#define DT_COMPAT_NORDIC_NRF91                      1
#define DT_COMPAT_NORDIC_NRF9160                    1
#define DT_COMPAT_NORDIC_NRF9160_SICA               1
#define DT_COMPAT_NORDIC_NRF_CC310                  1
#define DT_COMPAT_NORDIC_NRF_CLOCK                  1
#define DT_COMPAT_NORDIC_NRF_DPPIC                  1
#define DT_COMPAT_NORDIC_NRF_EGU                    1
#define DT_COMPAT_NORDIC_NRF_FICR                   1
#define DT_COMPAT_NORDIC_NRF_GPIO                   1
#define DT_COMPAT_NORDIC_NRF_GPIOTE                 1
#define DT_COMPAT_NORDIC_NRF_KMU                    1
#define DT_COMPAT_NORDIC_NRF_POWER                  1
#define DT_COMPAT_NORDIC_NRF_PWM                    1
#define DT_COMPAT_NORDIC_NRF_REGULATORS             1
#define DT_COMPAT_NORDIC_NRF_RTC                    1
#define DT_COMPAT_NORDIC_NRF_SAADC                  1
#define DT_COMPAT_NORDIC_NRF_SPIM                   1
#define DT_COMPAT_NORDIC_NRF_SPU                    1
#define DT_COMPAT_NORDIC_NRF_TIMER                  1
#define DT_COMPAT_NORDIC_NRF_UARTE                  1
#define DT_COMPAT_NORDIC_NRF_UICR                   1
#define DT_COMPAT_NORDIC_NRF_VMC                    1
#define DT_COMPAT_NORDIC_NRF_WATCHDOG               1
#define DT_COMPAT_NORDIC_NRF91_FLASH_CONTROLLER     1
#define DT_COMPAT_NORDIC_NRF9160_DK_NRF9160         1
#define DT_COMPAT_PWM_LEDS                          1
#define DT_COMPAT_SIMPLE_BUS                        1
#define DT_COMPAT_SOC_NV_FLASH                      1

/* /chosen/zephyr,flash (/soc/peripheral@50000000/flash-controller@39000/flash@0) */
#define DT_FLASH_BASE_ADDRESS                       0x0
#define DT_FLASH_SIZE                               1024
#define DT_FLASH_ERASE_BLOCK_SIZE                   4096
#define DT_FLASH_WRITE_BLOCK_SIZE                   4

/* /chosen/zephyr,code-partition (/soc/peripheral@50000000/flash-controller@39000/flash@0/partitions/partition@10000) */
#define DT_CODE_PARTITION_OFFSET                    65536
#define DT_CODE_PARTITION_SIZE                      262144

/* Number of flash partitions */
#define DT_FLASH_AREA_NUM                           7
