
zephyr.elf:     file format elf32-littlearm


Disassembly of section rom_start:

00000000 <_vector_table>:
	return cb(str, strl, ctx);
}

int cbvprintf_package(void *packaged, size_t len, uint32_t flags,
		      const char *fmt, va_list ap)
{
   0:	60 32 01 20 65 2f 00 00 2f 65 00 00 39 2f 00 00     `2. e/../e..9/..
	bool rws_pos_en = !!(flags & CBPRINTF_PACKAGE_ADD_RW_STR_POS);
	/* Get number of first read only strings present in the string.
	 * There is always at least 1 (fmt) but flags can indicate more, e.g
	 * fixed prefix appended to all strings.
	 */
	int fros_cnt = 1 + Z_CBPRINTF_PACKAGE_FIRST_RO_STR_CNT_GET(flags);
  10:	39 2f 00 00 39 2f 00 00 39 2f 00 00 39 2f 00 00     9/..9/..9/..9/..
	...

	/*
	 * Otherwise we must ensure we can store at least
	 * the pointer to the format string itself.
	 */
	if (buf0 != NULL && BUF_OFFSET + sizeof(char *) > len) {
  2c:	d9 2a 00 00 39 2f 00 00 00 00 00 00 39 2f 00 00     .*..9/......9/..
		buf += len % CBPRINTF_PACKAGE_ALIGNMENT;
  3c:	39 2f 00 00                                         9/..

00000040 <_irq_vector_table>:
		len = CBPRINTF_PACKAGE_ALIGNMENT - (len % CBPRINTF_PACKAGE_ALIGNMENT);
  40:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
	int arg_idx	      = -1; /* Argument index. Preincremented thus starting from -1.*/
  50:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
		/* copy va_list data over to our buffer */
		if (is_str_arg) {
			s = va_arg(ap, char *);
process_string:
			if (buf0 != NULL) {
				*(const char **)buf = s;
  60:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
#else
	#define RO_START 0
	#define RO_END 0
#endif

	return (((const char *)addr >= (const char *)RO_START) &&
  70:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
			bool do_ro = !!(flags & CBPRINTF_PACKAGE_ADD_RO_STR_POS);

			if (is_ro && !do_ro) {
				/* nothing to do */
			} else {
				uint32_t s_ptr_idx = BUF_OFFSET / sizeof(int);
  80:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
				if (do_ro && s_ptr_idx > STR_POS_MASK) {
					__ASSERT(false, "String with too many arguments");
					return -EINVAL;
				}

				if (s_idx >= ARRAY_SIZE(str_ptr_pos)) {
  90:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
					/*
					 * Remember string pointer location.
					 * We will append non-ro strings later.
					 */
					str_ptr_pos[s_idx] = s_ptr_idx;
					str_ptr_arg[s_idx] = arg_idx;
  a0:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
					if (is_ro) {
						/* flag read-only string. */
						str_ptr_pos[s_idx] |= STR_POS_RO_FLAG;
						s_ro_cnt++;
					} else {
						s_rw_cnt++;
  b0:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
			switch (*fmt) {
  c0:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
  d0:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
  e0:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
  f0:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
 100:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
 110:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
				align = VA_STACK_ALIGN(void *);
 120:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
			switch (*fmt) {
 130:	35 2b 00 00 35 2b 00 00 35 2b 00 00 35 2b 00 00     5+..5+..5+..5+..
 140:	35 2b 00 00                                         5+..

Disassembly of section text:

00000144 <__aeabi_uldivmod>:
		buf = (void *) ROUND_UP(buf, align);
     144:	b953      	cbnz	r3, 15c <__data_size+0xc>
     146:	b94a      	cbnz	r2, 15c <__data_size+0xc>
     148:	2900      	cmp	r1, #0
     14a:	bf08      	it	eq
     14c:	2800      	cmpeq	r0, #0
		if (buf0 != NULL && BUF_OFFSET + size > len) {
     14e:	bf1c      	itt	ne
     150:	f04f 31ff 	movne.w	r1, #4294967295
     154:	f04f 30ff 	movne.w	r0, #4294967295
     158:	f000 b80c 	b.w	174 <__aeabi_idiv0>
     15c:	f1ad 0c08 	sub.w	ip, sp, #8
		if (is_str_arg) {
     160:	e96d ce04 	strd	ip, lr, [sp, #-16]!
				s_idx++;
			}
			buf += sizeof(char *);

			is_str_arg = false;
		} else if (size == sizeof(int)) {
     164:	f000 f808 	bl	178 <__udivmoddi4>
			int v = va_arg(ap, int);
     168:	f8dd e004 	ldr.w	lr, [sp, #4]

			if (buf0 != NULL) {
				*(int *)buf = v;
			}
			buf += sizeof(int);
     16c:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
     170:	b004      	add	sp, #16
				arg_idx--;
     172:	4770      	bx	lr

00000174 <__aeabi_idiv0>:
     174:	4770      	bx	lr
     176:	bf00      	nop

00000178 <__udivmoddi4>:
				parsing = false;
     178:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
				continue;
     17c:	4686      	mov	lr, r0
				if (fmt[-1] == 'l') {
     17e:	468c      	mov	ip, r1
     180:	4608      	mov	r0, r1
     182:	9e08      	ldr	r6, [sp, #32]
     184:	4615      	mov	r5, r2
					if (fmt[-2] == 'l') {
     186:	4674      	mov	r4, lr
     188:	4619      	mov	r1, r3
     18a:	2b00      	cmp	r3, #0
				parsing = false;
     18c:	f040 80c1 	bne.w	312 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x12>
					if (fmt[-2] == 'l') {
     190:	4285      	cmp	r5, r0
						align = VA_STACK_ALIGN(long long);
     192:	fab2 f282 	clz	r2, r2
				size = sizeof(void *);
     196:	d945      	bls.n	224 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x24>
     198:	b14a      	cbz	r2, 1ae <__udivmoddi4+0x36>
					v.ld = va_arg(ap, long double);
     19a:	f1c2 0320 	rsb	r3, r2, #32
     19e:	fa00 fc02 	lsl.w	ip, r0, r2
				buf = (void *) ROUND_UP(buf, align);
     1a2:	4095      	lsls	r5, r2
     1a4:	4094      	lsls	r4, r2
     1a6:	fa2e f303 	lsr.w	r3, lr, r3
					v.ld = va_arg(ap, long double);
     1aa:	ea43 0c0c 	orr.w	ip, r3, ip
					if (BUF_OFFSET + size > len) {
     1ae:	ea4f 4e15 	mov.w	lr, r5, lsr #16
     1b2:	b2a8      	uxth	r0, r5
     1b4:	0c23      	lsrs	r3, r4, #16
     1b6:	fbbc f8fe 	udiv	r8, ip, lr
						*(long double *)buf = v.ld;
     1ba:	fb0e cc18 	mls	ip, lr, r8, ip
				parsing = false;
     1be:	fb08 f900 	mul.w	r9, r8, r0
			switch (*fmt) {
     1c2:	ea43 430c 	orr.w	r3, r3, ip, lsl #16
     1c6:	4599      	cmp	r9, r3
			if (*++fmt == '\0') {
     1c8:	d928      	bls.n	21c <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x1c>
     1ca:	18eb      	adds	r3, r5, r3
     1cc:	f108 37ff 	add.w	r7, r8, #4294967295
			if (!parsing) {
     1d0:	d204      	bcs.n	1dc <__udivmoddi4+0x64>
     1d2:	4599      	cmp	r9, r3
     1d4:	d902      	bls.n	1dc <__udivmoddi4+0x64>
     1d6:	f1a8 0702 	sub.w	r7, r8, #2
				if (*fmt == '%') {
     1da:	442b      	add	r3, r5
					parsing = true;
     1dc:	eba3 0309 	sub.w	r3, r3, r9
					arg_idx++;
     1e0:	b2a4      	uxth	r4, r4
     1e2:	fbb3 fcfe 	udiv	ip, r3, lr
				align = VA_STACK_ALIGN(size_t);
     1e6:	fb0e 331c 	mls	r3, lr, ip, r3
     1ea:	fb0c f000 	mul.w	r0, ip, r0
			switch (*fmt) {
     1ee:	ea44 4403 	orr.w	r4, r4, r3, lsl #16
				parsing = false;
     1f2:	42a0      	cmp	r0, r4
     1f4:	d914      	bls.n	220 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x20>

			if (buf0 != NULL) {
				*(long *)buf = v;
			}
			buf += sizeof(long);
		} else if (size == sizeof(long long)) {
     1f6:	192c      	adds	r4, r5, r4
     1f8:	f10c 33ff 	add.w	r3, ip, #4294967295
					return -EINVAL;
     1fc:	d204      	bcs.n	208 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x8>
     1fe:	42a0      	cmp	r0, r4
			long long v = va_arg(ap, long long);
     200:	d902      	bls.n	208 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x8>
     202:	f1ac 0302 	sub.w	r3, ip, #2
     206:	442c      	add	r4, r5
     208:	1a24      	subs	r4, r4, r0
     20a:	ea43 4007 	orr.w	r0, r3, r7, lsl #16

			if (buf0 != NULL) {
				if (Z_CBPRINTF_VA_STACK_LL_DBL_MEMCPY) {
					memcpy(buf, &v, sizeof(long long));
				} else {
					*(long long *)buf = v;
     20e:	b11e      	cbz	r6, 218 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x18>
				}
			}
			buf += sizeof(long long);
     210:	40d4      	lsrs	r4, r2
     212:	2300      	movs	r3, #0
     214:	6034      	str	r4, [r6, #0]
		if (is_str_arg) {
     216:	6073      	str	r3, [r6, #4]
		} else if (size == sizeof(int)) {
     218:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
			int v = va_arg(ap, int);
     21c:	4647      	mov	r7, r8
     21e:	e7dd      	b.n	1dc <__udivmoddi4+0x64>
			if (buf0 != NULL) {
     220:	4663      	mov	r3, ip
		} else if (size == sizeof(long long)) {
     222:	e7f1      	b.n	208 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x8>
     224:	bb92      	cbnz	r2, 28c <CONFIG_PM_PARTITION_SIZE_PROVISION+0xc>
			long long v = va_arg(ap, long long);
     226:	1b43      	subs	r3, r0, r5
     228:	2101      	movs	r1, #1
     22a:	ea4f 4e15 	mov.w	lr, r5, lsr #16
     22e:	b2af      	uxth	r7, r5
     230:	0c20      	lsrs	r0, r4, #16
			if (buf0 != NULL) {
     232:	fbb3 fcfe 	udiv	ip, r3, lr
			bool is_ro = (fros_cnt-- > 0) ? true : ptr_in_rodata(s);
     236:	fb0e 331c 	mls	r3, lr, ip, r3
			s = va_arg(ap, char *);
     23a:	fb0c f807 	mul.w	r8, ip, r7
     23e:	ea40 4303 	orr.w	r3, r0, r3, lsl #16
			if (is_ro && !do_ro) {
     242:	4598      	cmp	r8, r3
     244:	d961      	bls.n	30a <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xa>
     246:	18eb      	adds	r3, r5, r3
			bool is_ro = (fros_cnt-- > 0) ? true : ptr_in_rodata(s);
     248:	f10c 30ff 	add.w	r0, ip, #4294967295
				uint32_t s_ptr_idx = BUF_OFFSET / sizeof(int);
     24c:	d204      	bcs.n	258 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x58>
     24e:	4598      	cmp	r8, r3
     250:	d902      	bls.n	258 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x58>
     252:	f1ac 0002 	sub.w	r0, ip, #2
				if (do_ro && s_ptr_idx > STR_POS_MASK) {
     256:	442b      	add	r3, r5
     258:	eba3 0308 	sub.w	r3, r3, r8
				if (s_idx >= ARRAY_SIZE(str_ptr_pos)) {
     25c:	b2a4      	uxth	r4, r4
				if (buf0 != NULL) {
     25e:	fbb3 fcfe 	udiv	ip, r3, lr
					str_ptr_pos[s_idx] = s_ptr_idx;
     262:	fb0e 331c 	mls	r3, lr, ip, r3
     266:	fb0c f707 	mul.w	r7, ip, r7
     26a:	ea44 4403 	orr.w	r4, r4, r3, lsl #16
     26e:	42a7      	cmp	r7, r4
					str_ptr_arg[s_idx] = arg_idx;
     270:	d94d      	bls.n	30e <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xe>
     272:	192c      	adds	r4, r5, r4
					if (is_ro) {
     274:	f10c 33ff 	add.w	r3, ip, #4294967295
     278:	d204      	bcs.n	284 <CONFIG_PM_PARTITION_SIZE_PROVISION+0x4>
     27a:	42a7      	cmp	r7, r4
						str_ptr_pos[s_idx] |= STR_POS_RO_FLAG;
     27c:	d902      	bls.n	284 <CONFIG_PM_PARTITION_SIZE_PROVISION+0x4>
     27e:	f1ac 0302 	sub.w	r3, ip, #2
     282:	442c      	add	r4, r5
						s_ro_cnt++;
     284:	1be4      	subs	r4, r4, r7
     286:	ea43 4000 	orr.w	r0, r3, r0, lsl #16
					if (BUF_OFFSET + size > len) {
     28a:	e7c0      	b.n	20e <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0xe>
     28c:	f1c2 0320 	rsb	r3, r2, #32
			switch (*fmt) {
     290:	4095      	lsls	r5, r2
			buf += sizeof(char *);
     292:	4094      	lsls	r4, r2
					if (BUF_OFFSET + size > len) {
     294:	fa20 f103 	lsr.w	r1, r0, r3
			bool is_ro = (fros_cnt-- > 0) ? true : ptr_in_rodata(s);
     298:	fa2e f303 	lsr.w	r3, lr, r3
     29c:	ea4f 4e15 	mov.w	lr, r5, lsr #16
				} else if (is_ro) {
     2a0:	4090      	lsls	r0, r2
     2a2:	b2af      	uxth	r7, r5
					len += 1;
     2a4:	4303      	orrs	r3, r0
     2a6:	fbb1 fcfe 	udiv	ip, r1, lr
					len += 2;
     2aa:	fb0e 101c 	mls	r0, lr, ip, r1
				} else if (rws_pos_en) {
     2ae:	0c19      	lsrs	r1, r3, #16
					len += strlen(s) + 1 + 1;
     2b0:	fb0c f807 	mul.w	r8, ip, r7
     2b4:	ea41 4100 	orr.w	r1, r1, r0, lsl #16
     2b8:	4588      	cmp	r8, r1
     2ba:	d922      	bls.n	302 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x2>
     2bc:	1869      	adds	r1, r5, r1
     2be:	f10c 30ff 	add.w	r0, ip, #4294967295
	 * We remember the size of the argument list as a multiple of
	 * sizeof(int) and limit it to a 8-bit field. That means 1020 bytes
	 * worth of va_list, or about 127 arguments on a 64-bit system
	 * (twice that on 32-bit systems). That ought to be good enough.
	 */
	if (BUF_OFFSET / sizeof(int) > 255) {
     2c2:	d204      	bcs.n	2ce <CONFIG_PM_PARTITION_SIZE_PROVISION+0x4e>
     2c4:	4588      	cmp	r8, r1
     2c6:	d902      	bls.n	2ce <CONFIG_PM_PARTITION_SIZE_PROVISION+0x4e>
     2c8:	f1ac 0002 	sub.w	r0, ip, #2
	/*
	 * If all we wanted was to count required buffer size
	 * then we have it now.
	 */
	if (buf0 == NULL) {
		return BUF_OFFSET + len - CBPRINTF_PACKAGE_ALIGNMENT;
     2cc:	4429      	add	r1, r5
     2ce:	eba1 0108 	sub.w	r1, r1, r8
     2d2:	b29b      	uxth	r3, r3
     2d4:	fbb1 fcfe 	udiv	ip, r1, lr
     2d8:	fb0e 111c 	mls	r1, lr, ip, r1
	*(char **)buf0 = NULL;

	/* Record end of argument list. */
	pkg_hdr->desc.len = BUF_OFFSET / sizeof(int);

	if (rws_pos_en) {
     2dc:	fb0c f707 	mul.w	r7, ip, r7
	*(char **)buf0 = NULL;
     2e0:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
		/* Strings are appended, update location counter. */
		pkg_hdr->desc.str_cnt = 0;
		pkg_hdr->desc.rw_str_cnt = s_rw_cnt;
     2e4:	429f      	cmp	r7, r3
     2e6:	d90e      	bls.n	306 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x6>
	if (rws_pos_en) {
     2e8:	18eb      	adds	r3, r5, r3
		pkg_hdr->desc.rw_str_cnt = s_rw_cnt;
     2ea:	f10c 31ff 	add.w	r1, ip, #4294967295
		/* Strings are appended, update append counter. */
		pkg_hdr->desc.str_cnt = s_rw_cnt;
		pkg_hdr->desc.rw_str_cnt = 0;
	}

	pkg_hdr->desc.ro_str_cnt = s_ro_cnt;
     2ee:	d204      	bcs.n	2fa <CONFIG_PM_PARTITION_SIZE_PROVISION+0x7a>
#ifdef CONFIG_CBPRINTF_PACKAGE_HEADER_STORE_CREATION_FLAGS
	pkg_hdr->desc.pkg_flags = flags;
#endif

	/* Store strings pointer locations of read only strings. */
	if (s_ro_cnt) {
     2f0:	429f      	cmp	r7, r3
     2f2:	d902      	bls.n	2fa <CONFIG_PM_PARTITION_SIZE_PROVISION+0x7a>
     2f4:	f1ac 0102 	sub.w	r1, ip, #2
		for (i = 0; i < s_idx; i++) {
     2f8:	442b      	add	r3, r5
			}

			uint8_t pos = str_ptr_pos[i] & STR_POS_MASK;

			/* make sure it fits */
			if (BUF_OFFSET + 1 > len) {
     2fa:	1bdb      	subs	r3, r3, r7
     2fc:	ea41 4100 	orr.w	r1, r1, r0, lsl #16
		for (i = 0; i < s_idx; i++) {
     300:	e793      	b.n	22a <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x2a>
			continue;
		}

		if (rws_pos_en) {
			size = 0;
			*buf++ = str_ptr_arg[i];
     302:	4660      	mov	r0, ip
     304:	e7e3      	b.n	2ce <CONFIG_PM_PARTITION_SIZE_PROVISION+0x4e>
			/* find the string length including terminating '\0' */
			size = strlen(s) + 1;
		}

		/* make sure it fits */
		if (BUF_OFFSET + 1 + size > len) {
     306:	4661      	mov	r1, ip
     308:	e7f7      	b.n	2fa <CONFIG_PM_PARTITION_SIZE_PROVISION+0x7a>
     30a:	4660      	mov	r0, ip
     30c:	e7a4      	b.n	258 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x58>
     30e:	4663      	mov	r3, ip
			*buf++ = str_ptr_arg[i];
     310:	e7b8      	b.n	284 <CONFIG_PM_PARTITION_SIZE_PROVISION+0x4>
     312:	4283      	cmp	r3, r0
	for (i = 0; i < s_idx; i++) {
     314:	d906      	bls.n	324 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x24>
     316:	b916      	cbnz	r6, 31e <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x1e>
	/*
	 * TODO: remove pointers for appended strings since they're useless.
	 * TODO: explore leveraging same mechanism to remove alignment padding
	 */

	return BUF_OFFSET;
     318:	2100      	movs	r1, #0
     31a:	4608      	mov	r0, r1
		pkg_hdr->desc.str_cnt = s_rw_cnt;
     31c:	e77c      	b.n	218 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x18>
		pkg_hdr->desc.rw_str_cnt = 0;
     31e:	e9c6 e000 	strd	lr, r0, [r6]
			if (!(str_ptr_pos[i] & STR_POS_RO_FLAG)) {
     322:	e7f9      	b.n	318 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x18>
     324:	fab3 f783 	clz	r7, r3
			if (BUF_OFFSET + 1 > len) {
     328:	b98f      	cbnz	r7, 34e <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x4e>
     32a:	4283      	cmp	r3, r0
     32c:	d301      	bcc.n	332 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x32>
			uint8_t pos = str_ptr_pos[i] & STR_POS_MASK;
     32e:	4572      	cmp	r2, lr
     330:	d808      	bhi.n	344 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x44>
			if (BUF_OFFSET + 1 > len) {
     332:	ebbe 0402 	subs.w	r4, lr, r2
			*buf++ = pos;
     336:	eb60 0303 	sbc.w	r3, r0, r3
		for (i = 0; i < s_idx; i++) {
     33a:	2001      	movs	r0, #1
     33c:	469c      	mov	ip, r3
		if (s_ro_cnt && str_ptr_pos[i] & STR_POS_RO_FLAG) {
     33e:	b91e      	cbnz	r6, 348 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x48>
     340:	2100      	movs	r1, #0
     342:	e769      	b.n	218 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x18>
     344:	4638      	mov	r0, r7
     346:	e7fa      	b.n	33e <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x3e>
     348:	e9c6 4c00 	strd	r4, ip, [r6]
		if (rws_pos_en) {
     34c:	e7f8      	b.n	340 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x40>
     34e:	f1c7 0c20 	rsb	ip, r7, #32
			*buf++ = str_ptr_arg[i];
     352:	40bb      	lsls	r3, r7
     354:	fa0e f507 	lsl.w	r5, lr, r7
			size = 0;
     358:	fa22 f40c 	lsr.w	r4, r2, ip
		if (BUF_OFFSET + 1 + size > len) {
     35c:	fa2e f10c 	lsr.w	r1, lr, ip
     360:	40ba      	lsls	r2, r7
     362:	431c      	orrs	r4, r3
     364:	fa20 f30c 	lsr.w	r3, r0, ip
		*buf++ = str_ptr_pos[i];
     368:	40b8      	lsls	r0, r7
		memcpy(buf, s, size);
     36a:	ea4f 4914 	mov.w	r9, r4, lsr #16
		*buf++ = str_ptr_pos[i];
     36e:	4301      	orrs	r1, r0
		memcpy(buf, s, size);
     370:	fa1f fe84 	uxth.w	lr, r4
     374:	fbb3 f8f9 	udiv	r8, r3, r9
		buf += size;
     378:	fb09 3018 	mls	r0, r9, r8, r3
	for (i = 0; i < s_idx; i++) {
     37c:	0c0b      	lsrs	r3, r1, #16
     37e:	fb08 fa0e 	mul.w	sl, r8, lr
     382:	ea43 4300 	orr.w	r3, r3, r0, lsl #16
			s = *(char **)(buf0 + str_ptr_pos[i] * sizeof(int));
     386:	459a      	cmp	sl, r3
     388:	d940      	bls.n	40c <CONFIG_BOOT_SERIAL_MAX_RECEIVE_SIZE+0xc>
     38a:	18e3      	adds	r3, r4, r3
     38c:	f108 30ff 	add.w	r0, r8, #4294967295
			*(char **)(buf0 + str_ptr_pos[i] * sizeof(int)) = NULL;
     390:	d204      	bcs.n	39c <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x9c>
			size = strlen(s) + 1;
     392:	459a      	cmp	sl, r3
			*(char **)(buf0 + str_ptr_pos[i] * sizeof(int)) = NULL;
     394:	d902      	bls.n	39c <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x9c>
     396:	f1a8 0002 	sub.w	r0, r8, #2
			size = strlen(s) + 1;
     39a:	4423      	add	r3, r4
     39c:	eba3 030a 	sub.w	r3, r3, sl
		return -EFAULT;
     3a0:	b289      	uxth	r1, r1
     3a2:	fbb3 f8f9 	udiv	r8, r3, r9
     3a6:	fb09 3318 	mls	r3, r9, r8, r3
     3aa:	fb08 fe0e 	mul.w	lr, r8, lr
     3ae:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
     3b2:	458e      	cmp	lr, r1
     3b4:	d92c      	bls.n	410 <CONFIG_BOOT_SERIAL_MAX_RECEIVE_SIZE+0x10>
     3b6:	1861      	adds	r1, r4, r1
     3b8:	f108 33ff 	add.w	r3, r8, #4294967295
     3bc:	d204      	bcs.n	3c8 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xc8>
     3be:	458e      	cmp	lr, r1
     3c0:	d902      	bls.n	3c8 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xc8>
     3c2:	f1a8 0302 	sub.w	r3, r8, #2
     3c6:	4421      	add	r1, r4
     3c8:	ea43 4000 	orr.w	r0, r3, r0, lsl #16
     3cc:	eba1 010e 	sub.w	r1, r1, lr
     3d0:	fba0 9802 	umull	r9, r8, r0, r2
     3d4:	4541      	cmp	r1, r8
     3d6:	46ce      	mov	lr, r9
     3d8:	4643      	mov	r3, r8
     3da:	d302      	bcc.n	3e2 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xe2>
     3dc:	d106      	bne.n	3ec <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xec>
     3de:	454d      	cmp	r5, r9
     3e0:	d204      	bcs.n	3ec <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xec>
     3e2:	3801      	subs	r0, #1
     3e4:	ebb9 0e02 	subs.w	lr, r9, r2
     3e8:	eb68 0304 	sbc.w	r3, r8, r4
     3ec:	2e00      	cmp	r6, #0
     3ee:	d0a7      	beq.n	340 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x40>
     3f0:	ebb5 020e 	subs.w	r2, r5, lr
     3f4:	eb61 0103 	sbc.w	r1, r1, r3
     3f8:	fa01 fc0c 	lsl.w	ip, r1, ip
     3fc:	fa22 f307 	lsr.w	r3, r2, r7
     400:	40f9      	lsrs	r1, r7
     402:	ea4c 0303 	orr.w	r3, ip, r3
     406:	e9c6 3100 	strd	r3, r1, [r6]
     40a:	e799      	b.n	340 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x40>
     40c:	4640      	mov	r0, r8
     40e:	e7c5      	b.n	39c <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x9c>
     410:	4643      	mov	r3, r8
     412:	e7d9      	b.n	3c8 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xc8>

00000414 <main>:
    return (bool)pin_active;
}
#endif

void main(void)
{
     414:	b57f      	push	{r0, r1, r2, r3, r4, r5, r6, lr}
}

NRF_STATIC_INLINE void nrf_wdt_reload_request_set(NRF_WDT_Type *        p_reg,
                                                  nrf_wdt_rr_register_t rr_register)
{
    p_reg->RR[rr_register] = NRF_WDT_RR_VALUE;
     416:	4b3e      	ldr	r3, [pc, #248]	; (510 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x28>)
     418:	4a3e      	ldr	r2, [pc, #248]	; (514 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x2c>)
    fih_int fih_rc = FIH_FAILURE;

    MCUBOOT_WATCHDOG_FEED();

#if !defined(MCUBOOT_DIRECT_XIP)
    BOOT_LOG_INF("Starting bootloader");
     41a:	2149      	movs	r1, #73	; 0x49
     41c:	f8c3 2600 	str.w	r2, [r3, #1536]	; 0x600
     420:	483d      	ldr	r0, [pc, #244]	; (518 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x30>)
     422:	f8c3 2604 	str.w	r2, [r3, #1540]	; 0x604
     426:	f8c3 2608 	str.w	r2, [r3, #1544]	; 0x608
     42a:	f8c3 260c 	str.w	r2, [r3, #1548]	; 0x60c
     42e:	f8c3 2610 	str.w	r2, [r3, #1552]	; 0x610
     432:	f8c3 2614 	str.w	r2, [r3, #1556]	; 0x614
     436:	f8c3 2618 	str.w	r2, [r3, #1560]	; 0x618
     43a:	f8c3 261c 	str.w	r2, [r3, #1564]	; 0x61c
     43e:	f005 fd3c 	bl	5eba <z_log_minimal_printk>
#ifdef CONFIG_MCUBOOT_INDICATION_LED
    /* LED init */
    led_init();
#endif

    os_heap_init();
     442:	f000 f89d 	bl	580 <os_heap_init>
 */
__syscall bool device_is_ready(const struct device *dev);

static inline bool z_impl_device_is_ready(const struct device *dev)
{
	return z_device_is_ready(dev);
     446:	4c35      	ldr	r4, [pc, #212]	; (51c <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x34>)
     448:	4620      	mov	r0, r4
     44a:	f008 f8f8 	bl	863e <z_device_is_ready>
    if (!device_is_ready(button0.port)) {
     44e:	b320      	cbz	r0, 49a <FIH_LABEL_FIH_CALL_START_496>
{
	const struct gpio_driver_api *api =
		(const struct gpio_driver_api *)port->api;
	__unused const struct gpio_driver_config *const cfg =
		(const struct gpio_driver_config *)port->config;
	struct gpio_driver_data *data =
     450:	6925      	ldr	r5, [r4, #16]
	const struct gpio_driver_api *api =
     452:	68a6      	ldr	r6, [r4, #8]

	__ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
		 "Unsupported pin");

	if ((flags & GPIO_ACTIVE_LOW) != 0) {
		data->invert |= (gpio_port_pins_t)BIT(pin);
     454:	682b      	ldr	r3, [r5, #0]
	} else {
		data->invert &= ~(gpio_port_pins_t)BIT(pin);
	}

	return api->pin_configure(port, pin, flags);
     456:	211a      	movs	r1, #26
		data->invert |= (gpio_port_pins_t)BIT(pin);
     458:	f043 6380 	orr.w	r3, r3, #67108864	; 0x4000000
     45c:	602b      	str	r3, [r5, #0]
	return api->pin_configure(port, pin, flags);
     45e:	4620      	mov	r0, r4
     460:	6833      	ldr	r3, [r6, #0]
     462:	4a2f      	ldr	r2, [pc, #188]	; (520 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x38>)
     464:	4798      	blx	r3
					   gpio_port_value_t *value)
{
	const struct gpio_driver_api *api =
		(const struct gpio_driver_api *)port->api;

	return api->port_get_raw(port, value);
     466:	4620      	mov	r0, r4
     468:	6873      	ldr	r3, [r6, #4]
     46a:	a901      	add	r1, sp, #4
     46c:	4798      	blx	r3
	const struct gpio_driver_data *const data =
			(const struct gpio_driver_data *)port->data;
	int ret;

	ret = gpio_port_get_raw(port, value);
	if (ret == 0) {
     46e:	b920      	cbnz	r0, 47a <main+0x66>
		*value ^= data->invert;
     470:	682a      	ldr	r2, [r5, #0]
     472:	9b01      	ldr	r3, [sp, #4]
     474:	4053      	eors	r3, r2
    (void)rc;

    mcuboot_status_change(MCUBOOT_STATUS_STARTUP);

#ifdef CONFIG_MCUBOOT_SERIAL
    if (detect_pin() &&
     476:	015a      	lsls	r2, r3, #5
     478:	d50f      	bpl.n	49a <FIH_LABEL_FIH_CALL_START_496>
#endif // defined(DPPI_PRESENT)

#if NRF_POWER_HAS_RESETREAS
NRF_STATIC_INLINE uint32_t nrf_power_resetreas_get(NRF_POWER_Type const * p_reg)
{
    return p_reg->RESETREAS;
     47a:	f04f 2350 	mov.w	r3, #1342197760	; 0x50005000
     47e:	f8d3 3400 	ldr.w	r3, [r3, #1024]	; 0x400
    return !(rr == 0 || (rr & NRFX_RESET_REASON_RESETPIN_MASK));
     482:	b10b      	cbz	r3, 488 <main+0x74>
     484:	07db      	lsls	r3, r3, #31
     486:	d508      	bpl.n	49a <FIH_LABEL_FIH_CALL_START_496>
        gpio_pin_set_dt(&led0, 1);
#endif

        mcuboot_status_change(MCUBOOT_STATUS_SERIAL_DFU_ENTERED);

        BOOT_LOG_INF("Enter the serial recovery mode");
     488:	2149      	movs	r1, #73	; 0x49
     48a:	4826      	ldr	r0, [pc, #152]	; (524 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x3c>)
     48c:	f005 fd15 	bl	5eba <z_log_minimal_printk>
        rc = boot_console_init();
     490:	f001 fd98 	bl	1fc4 <boot_console_init>
        __ASSERT(rc == 0, "Error initializing boot console.\n");
        boot_serial_start(&boot_funcs);
     494:	4824      	ldr	r0, [pc, #144]	; (528 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x40>)
     496:	f002 f901 	bl	269c <boot_serial_start>

0000049a <FIH_LABEL_FIH_CALL_START_496>:
    rc = boot_console_init();
    int timeout_in_ms = CONFIG_BOOT_SERIAL_WAIT_FOR_DFU_TIMEOUT;
    uint32_t start = k_uptime_get_32();
#endif

    FIH_CALL(boot_go, fih_rc, &rsp);
     49a:	a801      	add	r0, sp, #4
     49c:	f000 fcd4 	bl	e48 <boot_go>

000004a0 <FIH_LABEL_FIH_CALL_END_508>:
        timeout_in_ms = 1;
    }
    boot_serial_check_start(&boot_funcs,timeout_in_ms);
#endif

    if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
     4a0:	4b22      	ldr	r3, [pc, #136]	; (52c <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x44>)
     4a2:	681b      	ldr	r3, [r3, #0]
     4a4:	4283      	cmp	r3, r0
     4a6:	d004      	beq.n	4b2 <FIH_LABEL_FIH_CALL_END_508+0x12>
        BOOT_LOG_ERR("Unable to find bootable image");
     4a8:	2145      	movs	r1, #69	; 0x45
     4aa:	4821      	ldr	r0, [pc, #132]	; (530 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x48>)
     4ac:	f005 fd05 	bl	5eba <z_log_minimal_printk>

        mcuboot_status_change(MCUBOOT_STATUS_NO_BOOTABLE_IMAGE_FOUND);

        FIH_PANIC;
     4b0:	e7fe      	b.n	4b0 <FIH_LABEL_FIH_CALL_END_508+0x10>
    }

    BOOT_LOG_INF("Bootloader chainload address offset: 0x%x",
     4b2:	9a03      	ldr	r2, [sp, #12]
     4b4:	2149      	movs	r1, #73	; 0x49
     4b6:	481f      	ldr	r0, [pc, #124]	; (534 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x4c>)
     4b8:	f005 fcff 	bl	5eba <z_log_minimal_printk>
                 rsp.br_image_off);

#if defined(MCUBOOT_DIRECT_XIP)
    BOOT_LOG_INF("Jumping to the image slot");
#else
    BOOT_LOG_INF("Jumping to the first image slot");
     4bc:	2149      	movs	r1, #73	; 0x49
     4be:	481e      	ldr	r0, [pc, #120]	; (538 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x50>)
     4c0:	f005 fcfb 	bl	5eba <z_log_minimal_printk>
    rc = flash_device_base(rsp->br_flash_dev_id, &flash_base);
     4c4:	4669      	mov	r1, sp
     4c6:	f89d 0008 	ldrb.w	r0, [sp, #8]
     4ca:	f000 f839 	bl	540 <flash_device_base>
    vt = (struct arm_vector_table *)(flash_base +
     4ce:	9b00      	ldr	r3, [sp, #0]
     4d0:	9c03      	ldr	r4, [sp, #12]
     4d2:	441c      	add	r4, r3
                                     rsp->br_hdr->ih_hdr_size);
     4d4:	9b01      	ldr	r3, [sp, #4]
     4d6:	891d      	ldrh	r5, [r3, #8]
    nrf_cleanup_peripheral();
     4d8:	f000 ff88 	bl	13ec <nrf_cleanup_peripheral>
                                     rsp->br_image_off +
     4dc:	1966      	adds	r6, r4, r5
    cleanup_arm_nvic(); /* cleanup NVIC registers */
     4de:	f000 ff69 	bl	13b4 <cleanup_arm_nvic>
    z_arm_clear_arm_mpu_config();
     4e2:	f002 fd81 	bl	2fe8 <z_arm_clear_arm_mpu_config>
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
  // without main extensions, the non-secure PSPLIM is RAZ/WI
  (void)ProcStackPtrLimit;
#else
  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
     4e6:	2300      	movs	r3, #0
     4e8:	f383 880b 	msr	PSPLIM, r3
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
  // without main extensions, the non-secure MSPLIM is RAZ/WI
  (void)MainStackPtrLimit;
#else
  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
     4ec:	f383 880a 	msr	MSPLIM, r3
  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
     4f0:	5962      	ldr	r2, [r4, r5]
     4f2:	f382 8808 	msr	MSP, r2
  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
     4f6:	f383 8814 	msr	CONTROL, r3
  __ASM volatile ("isb 0xF":::"memory");
     4fa:	f3bf 8f6f 	isb	sy
     4fe:	f3bf 8f6f 	isb	sy
    ((void (*)(void))vt->reset)();
     502:	6873      	ldr	r3, [r6, #4]
     504:	4798      	blx	r3

    do_boot(&rsp);

    mcuboot_status_change(MCUBOOT_STATUS_BOOT_FAILED);

    BOOT_LOG_ERR("Never should get here");
     506:	2145      	movs	r1, #69	; 0x45
     508:	480c      	ldr	r0, [pc, #48]	; (53c <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x54>)
     50a:	f005 fcd6 	bl	5eba <z_log_minimal_printk>
    while (1)
     50e:	e7fe      	b.n	50e <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x26>
     510:	50018000 	.word	0x50018000
     514:	6e524635 	.word	0x6e524635
     518:	00008dc4 	.word	0x00008dc4
     51c:	000086e4 	.word	0x000086e4
     520:	00010011 	.word	0x00010011
     524:	00008ddd 	.word	0x00008ddd
     528:	000089c8 	.word	0x000089c8
     52c:	2000c6f0 	.word	0x2000c6f0
     530:	00008e01 	.word	0x00008e01
     534:	00008e24 	.word	0x00008e24
     538:	00008e53 	.word	0x00008e53
     53c:	00008e78 	.word	0x00008e78

00000540 <flash_device_base>:

static const struct device *flash_dev = DEVICE_DT_GET(FLASH_DEVICE_NODE);

int flash_device_base(uint8_t fd_id, uintptr_t *ret)
{
    if (fd_id != FLASH_DEVICE_ID) {
     540:	4602      	mov	r2, r0
{
     542:	b508      	push	{r3, lr}
    if (fd_id != FLASH_DEVICE_ID) {
     544:	b138      	cbz	r0, 556 <flash_device_base+0x16>
        BOOT_LOG_ERR("invalid flash ID %d; expected %d",
     546:	4805      	ldr	r0, [pc, #20]	; (55c <flash_device_base+0x1c>)
     548:	2300      	movs	r3, #0
     54a:	2145      	movs	r1, #69	; 0x45
     54c:	f005 fcb5 	bl	5eba <z_log_minimal_printk>
                     fd_id, FLASH_DEVICE_ID);
        return -EINVAL;
     550:	f06f 0015 	mvn.w	r0, #21
    }
    *ret = FLASH_DEVICE_BASE;
    return 0;
}
     554:	bd08      	pop	{r3, pc}
    *ret = FLASH_DEVICE_BASE;
     556:	6008      	str	r0, [r1, #0]
    return 0;
     558:	e7fc      	b.n	554 <flash_device_base+0x14>
     55a:	bf00      	nop
     55c:	00008e9b 	.word	0x00008e9b

00000560 <flash_area_sector_from_off>:
    return -EINVAL;
}
#endif

int flash_area_sector_from_off(off_t off, struct flash_sector *sector)
{
     560:	b51f      	push	{r0, r1, r2, r3, r4, lr}
     562:	460c      	mov	r4, r1
		union { uintptr_t x; struct flash_pages_info * val; } parm2 = { .val = info };
		return (int) arch_syscall_invoke3(parm0.x, parm1.x, parm2.x, K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS);
	}
#endif
	compiler_barrier();
	return z_impl_flash_get_page_info_by_offs(dev, offset, info);
     564:	4601      	mov	r1, r0
     566:	aa01      	add	r2, sp, #4
     568:	4804      	ldr	r0, [pc, #16]	; (57c <flash_area_sector_from_off+0x1c>)
     56a:	f006 f954 	bl	6816 <z_impl_flash_get_page_info_by_offs>
    int rc;
    struct flash_pages_info page;

    rc = flash_get_page_info_by_offs(flash_dev, off, &page);
    if (rc) {
     56e:	b918      	cbnz	r0, 578 <flash_area_sector_from_off+0x18>
        return rc;
    }

    sector->fs_off = page.start_offset;
     570:	9b01      	ldr	r3, [sp, #4]
     572:	6023      	str	r3, [r4, #0]
    sector->fs_size = page.size;
     574:	9b02      	ldr	r3, [sp, #8]
     576:	6063      	str	r3, [r4, #4]

    return rc;
}
     578:	b004      	add	sp, #16
     57a:	bd10      	pop	{r4, pc}
     57c:	0000872c 	.word	0x0000872c

00000580 <os_heap_init>:
/*
 * Initialize mbedtls to be able to use the local heap.
 */
void os_heap_init(void)
{
    mbedtls_memory_buffer_alloc_init(mempool, sizeof(mempool));
     580:	f44f 51c0 	mov.w	r1, #6144	; 0x1800
     584:	4801      	ldr	r0, [pc, #4]	; (58c <os_heap_init+0xc>)
     586:	f003 bf0b 	b.w	43a0 <mbedtls_memory_buffer_alloc_init>
     58a:	bf00      	nop
     58c:	2000e092 	.word	0x2000e092

00000590 <bootutil_img_validate>:
fih_int
bootutil_img_validate(struct enc_key_data *enc_state, int image_index,
                      struct image_header *hdr, const struct flash_area *fap,
                      uint8_t *tmp_buf, uint32_t tmp_buf_sz, uint8_t *seed,
                      int seed_len, uint8_t *out_hash)
{
     590:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    uint32_t off;
    uint16_t len;
    uint16_t type;
    int sha256_valid = 0;
#ifdef EXPECTED_SIG_TLV
    fih_int valid_signature = FIH_FAILURE;
     594:	f8df a1e4 	ldr.w	sl, [pc, #484]	; 77c <FIH_LABEL_FIH_CALL_END_814+0x20>
{
     598:	b0f9      	sub	sp, #484	; 0x1e4
#if defined(MCUBOOT_USE_MBED_TLS)
typedef mbedtls_sha256_context bootutil_sha256_context;

static inline void bootutil_sha256_init(bootutil_sha256_context *ctx)
{
    mbedtls_sha256_init(ctx);
     59a:	a838      	add	r0, sp, #224	; 0xe0
     59c:	e9dd 4884 	ldrd	r4, r8, [sp, #528]	; 0x210
     5a0:	4617      	mov	r7, r2
     5a2:	461d      	mov	r5, r3
    fih_int valid_signature = FIH_FAILURE;
     5a4:	f8da 6000 	ldr.w	r6, [sl]
     5a8:	f007 fec3 	bl	8332 <mbedtls_sha256_init>
    (void)mbedtls_sha256_starts_ret(ctx, 0);
     5ac:	2100      	movs	r1, #0
     5ae:	a838      	add	r0, sp, #224	; 0xe0
     5b0:	f004 f80a 	bl	45c8 <mbedtls_sha256_starts>
    if (seed && (seed_len > 0)) {
     5b4:	b13c      	cbz	r4, 5c6 <bootutil_img_validate+0x36>
     5b6:	f1b8 0f00 	cmp.w	r8, #0
     5ba:	dd04      	ble.n	5c6 <bootutil_img_validate+0x36>

static inline int bootutil_sha256_update(bootutil_sha256_context *ctx,
                                         const void *data,
                                         uint32_t data_len)
{
    return mbedtls_sha256_update_ret(ctx, data, data_len);
     5bc:	4642      	mov	r2, r8
     5be:	4621      	mov	r1, r4
     5c0:	a838      	add	r0, sp, #224	; 0xe0
     5c2:	f007 feba 	bl	833a <mbedtls_sha256_update>
    for (off = 0; off < size; off += blk_sz) {
     5c6:	f04f 0900 	mov.w	r9, #0
    size += hdr->ih_protect_tlv_size;
     5ca:	897b      	ldrh	r3, [r7, #10]
    size = hdr_size = hdr->ih_hdr_size;
     5cc:	f8b7 8008 	ldrh.w	r8, [r7, #8]
     5d0:	4498      	add	r8, r3
    size += hdr->ih_protect_tlv_size;
     5d2:	68fb      	ldr	r3, [r7, #12]
     5d4:	4498      	add	r8, r3
    for (off = 0; off < size; off += blk_sz) {
     5d6:	45c8      	cmp	r8, r9
     5d8:	d821      	bhi.n	61e <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x42>
}

static inline int bootutil_sha256_finish(bootutil_sha256_context *ctx,
                                          uint8_t *output)
{
    return mbedtls_sha256_finish_ret(ctx, output);
     5da:	a90d      	add	r1, sp, #52	; 0x34
     5dc:	a838      	add	r0, sp, #224	; 0xe0
     5de:	f007 fee5 	bl	83ac <mbedtls_sha256_finish>
            tmp_buf_sz, hash, seed, seed_len);
    if (rc) {
        goto out;
    }

    if (out_hash) {
     5e2:	9b86      	ldr	r3, [sp, #536]	; 0x218
     5e4:	b123      	cbz	r3, 5f0 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x14>
        memcpy(out_hash, hash, 32);
     5e6:	2220      	movs	r2, #32
     5e8:	4618      	mov	r0, r3
     5ea:	a90d      	add	r1, sp, #52	; 0x34
     5ec:	f005 ffd4 	bl	6598 <memcpy>
    }

    rc = bootutil_tlv_iter_begin(&it, hdr, fap, IMAGE_TLV_ANY, false);
     5f0:	2300      	movs	r3, #0
     5f2:	462a      	mov	r2, r5
     5f4:	9300      	str	r3, [sp, #0]
     5f6:	4639      	mov	r1, r7
     5f8:	f64f 73ff 	movw	r3, #65535	; 0xffff
     5fc:	a807      	add	r0, sp, #28
     5fe:	f005 f8f8 	bl	57f2 <bootutil_tlv_iter_begin>
    if (rc) {
     602:	4604      	mov	r4, r0
     604:	b938      	cbnz	r0, 616 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x3a>
        goto out;
    }

    if (it.tlv_end > bootutil_max_image_size(fap)) {
     606:	4628      	mov	r0, r5
     608:	9f0c      	ldr	r7, [sp, #48]	; 0x30
     60a:	f000 f9dd 	bl	9c8 <bootutil_max_image_size>
     60e:	4287      	cmp	r7, r0
     610:	d91b      	bls.n	64a <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x6e>
        rc = -1;
     612:	f04f 34ff 	mov.w	r4, #4294967295
    if (rc) {
        fih_rc = fih_int_encode(rc);
    }

    FIH_RET(fih_rc);
}
     616:	4620      	mov	r0, r4
     618:	b079      	add	sp, #484	; 0x1e4
     61a:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
        if (blk_sz > tmp_buf_sz) {
     61e:	9b83      	ldr	r3, [sp, #524]	; 0x20c
        blk_sz = size - off;
     620:	eba8 0b09 	sub.w	fp, r8, r9
     624:	459b      	cmp	fp, r3
     626:	bf28      	it	cs
     628:	469b      	movcs	fp, r3
        rc = flash_area_read(fap, off, tmp_buf, blk_sz);
     62a:	4649      	mov	r1, r9
     62c:	465b      	mov	r3, fp
     62e:	4628      	mov	r0, r5
     630:	9a82      	ldr	r2, [sp, #520]	; 0x208
     632:	f005 fc50 	bl	5ed6 <flash_area_read>
        if (rc) {
     636:	4604      	mov	r4, r0
     638:	2800      	cmp	r0, #0
     63a:	d1ec      	bne.n	616 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x3a>
    return mbedtls_sha256_update_ret(ctx, data, data_len);
     63c:	465a      	mov	r2, fp
     63e:	9982      	ldr	r1, [sp, #520]	; 0x208
     640:	a838      	add	r0, sp, #224	; 0xe0
     642:	f007 fe7a 	bl	833a <mbedtls_sha256_update>
    for (off = 0; off < size; off += blk_sz) {
     646:	44d9      	add	r9, fp
     648:	e7c5      	b.n	5d6 <bootutil_img_validate+0x46>
    int key_id = -1;
     64a:	f04f 37ff 	mov.w	r7, #4294967295
            if (key_id < 0 || key_id >= bootutil_key_cnt) {
     64e:	f8df 9130 	ldr.w	r9, [pc, #304]	; 780 <FIH_LABEL_FIH_CALL_END_814+0x24>
        rc = bootutil_tlv_iter_next(&it, &off, &len, &type);
     652:	f10d 0316 	add.w	r3, sp, #22
     656:	aa05      	add	r2, sp, #20
     658:	a906      	add	r1, sp, #24
     65a:	a807      	add	r0, sp, #28
     65c:	f005 f917 	bl	588e <bootutil_tlv_iter_next>
        if (rc < 0) {
     660:	f1b0 0800 	subs.w	r8, r0, #0
     664:	f2c0 8088 	blt.w	778 <FIH_LABEL_FIH_CALL_END_814+0x1c>
        } else if (rc > 0) {
     668:	d17b      	bne.n	762 <FIH_LABEL_FIH_CALL_END_814+0x6>
        if (type == IMAGE_TLV_SHA256) {
     66a:	f8bd b016 	ldrh.w	fp, [sp, #22]
     66e:	f1bb 0f10 	cmp.w	fp, #16
     672:	d118      	bne.n	6a6 <FIH_LABEL_FIH_CALL_END_576+0xc>
            if (len != sizeof(hash)) {
     674:	f8bd 4014 	ldrh.w	r4, [sp, #20]
     678:	2c20      	cmp	r4, #32
     67a:	d1ca      	bne.n	612 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x36>
            rc = LOAD_IMAGE_DATA(hdr, fap, off, buf, sizeof(hash));
     67c:	4623      	mov	r3, r4
     67e:	4628      	mov	r0, r5
     680:	9906      	ldr	r1, [sp, #24]
     682:	aa38      	add	r2, sp, #224	; 0xe0
     684:	f005 fc27 	bl	5ed6 <flash_area_read>
            if (rc) {
     688:	4680      	mov	r8, r0
     68a:	2800      	cmp	r0, #0
     68c:	d174      	bne.n	778 <FIH_LABEL_FIH_CALL_END_814+0x1c>

0000068e <FIH_LABEL_FIH_CALL_START_559>:
            FIH_CALL(boot_fih_memequal, fih_rc, hash, buf, sizeof(hash));
     68e:	4622      	mov	r2, r4
     690:	a938      	add	r1, sp, #224	; 0xe0
     692:	a80d      	add	r0, sp, #52	; 0x34
     694:	f005 f947 	bl	5926 <boot_fih_memequal>
     698:	4604      	mov	r4, r0

0000069a <FIH_LABEL_FIH_CALL_END_576>:
            if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
     69a:	4b3a      	ldr	r3, [pc, #232]	; (784 <FIH_LABEL_FIH_CALL_END_814+0x28>)
     69c:	681b      	ldr	r3, [r3, #0]
     69e:	4283      	cmp	r3, r0
     6a0:	d1b9      	bne.n	616 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x3a>
            sha256_valid = 1;
     6a2:	2401      	movs	r4, #1
     6a4:	e7d5      	b.n	652 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x76>
        } else if (type == IMAGE_TLV_KEYHASH) {
     6a6:	f1bb 0f01 	cmp.w	fp, #1
     6aa:	d137      	bne.n	71c <FIH_LABEL_FIH_CALL_END_576+0x82>
            if (len > 32) {
     6ac:	f8bd 3014 	ldrh.w	r3, [sp, #20]
     6b0:	2b20      	cmp	r3, #32
     6b2:	d8ae      	bhi.n	612 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x36>
            rc = LOAD_IMAGE_DATA(hdr, fap, off, buf, len);
     6b4:	4628      	mov	r0, r5
     6b6:	9906      	ldr	r1, [sp, #24]
     6b8:	aa38      	add	r2, sp, #224	; 0xe0
     6ba:	f005 fc0c 	bl	5ed6 <flash_area_read>
            if (rc) {
     6be:	4680      	mov	r8, r0
     6c0:	2800      	cmp	r0, #0
     6c2:	d159      	bne.n	778 <FIH_LABEL_FIH_CALL_END_814+0x1c>
            key_id = bootutil_find_key(buf, len);
     6c4:	f89d b014 	ldrb.w	fp, [sp, #20]
    if (keyhash_len > 32) {
     6c8:	f1bb 0f20 	cmp.w	fp, #32
     6cc:	d903      	bls.n	6d6 <FIH_LABEL_FIH_CALL_END_576+0x3c>
        return -1;
     6ce:	f04f 38ff 	mov.w	r8, #4294967295
            key_id = bootutil_find_key(buf, len);
     6d2:	4647      	mov	r7, r8
     6d4:	e7bd      	b.n	652 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x76>
    for (i = 0; i < bootutil_key_cnt; i++) {
     6d6:	f8d9 3000 	ldr.w	r3, [r9]
     6da:	4f2b      	ldr	r7, [pc, #172]	; (788 <FIH_LABEL_FIH_CALL_END_814+0x2c>)
     6dc:	9303      	str	r3, [sp, #12]
     6de:	9b03      	ldr	r3, [sp, #12]
     6e0:	4598      	cmp	r8, r3
     6e2:	daf4      	bge.n	6ce <FIH_LABEL_FIH_CALL_END_576+0x34>
    mbedtls_sha256_init(ctx);
     6e4:	a81d      	add	r0, sp, #116	; 0x74
     6e6:	f007 fe24 	bl	8332 <mbedtls_sha256_init>
    (void)mbedtls_sha256_starts_ret(ctx, 0);
     6ea:	2100      	movs	r1, #0
     6ec:	a81d      	add	r0, sp, #116	; 0x74
     6ee:	f003 ff6b 	bl	45c8 <mbedtls_sha256_starts>
        bootutil_sha256_update(&sha256_ctx, key->key, *key->len);
     6f2:	687a      	ldr	r2, [r7, #4]
    return mbedtls_sha256_update_ret(ctx, data, data_len);
     6f4:	a81d      	add	r0, sp, #116	; 0x74
     6f6:	6812      	ldr	r2, [r2, #0]
     6f8:	f857 1b08 	ldr.w	r1, [r7], #8
     6fc:	f007 fe1d 	bl	833a <mbedtls_sha256_update>
    return mbedtls_sha256_finish_ret(ctx, output);
     700:	a915      	add	r1, sp, #84	; 0x54
     702:	a81d      	add	r0, sp, #116	; 0x74
     704:	f007 fe52 	bl	83ac <mbedtls_sha256_finish>
        if (!memcmp(hash, keyhash, keyhash_len)) {
     708:	465a      	mov	r2, fp
     70a:	a938      	add	r1, sp, #224	; 0xe0
     70c:	a815      	add	r0, sp, #84	; 0x54
     70e:	f005 ff1c 	bl	654a <memcmp>
     712:	2800      	cmp	r0, #0
     714:	d0dd      	beq.n	6d2 <FIH_LABEL_FIH_CALL_END_576+0x38>
    for (i = 0; i < bootutil_key_cnt; i++) {
     716:	f108 0801 	add.w	r8, r8, #1
     71a:	e7e0      	b.n	6de <FIH_LABEL_FIH_CALL_END_576+0x44>
        } else if (type == EXPECTED_SIG_TLV) {
     71c:	f1bb 0f20 	cmp.w	fp, #32
     720:	d197      	bne.n	652 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x76>
            if (key_id < 0 || key_id >= bootutil_key_cnt) {
     722:	1c7b      	adds	r3, r7, #1
     724:	d095      	beq.n	652 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x76>
     726:	f8d9 3000 	ldr.w	r3, [r9]
     72a:	42bb      	cmp	r3, r7
     72c:	dd16      	ble.n	75c <FIH_LABEL_FIH_CALL_END_814>
            if (!EXPECTED_SIG_LEN(len) || len > sizeof(buf)) {
     72e:	f8bd 3014 	ldrh.w	r3, [sp, #20]
     732:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
     736:	f47f af6c 	bne.w	612 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x36>
            rc = LOAD_IMAGE_DATA(hdr, fap, off, buf, len);
     73a:	4628      	mov	r0, r5
     73c:	9906      	ldr	r1, [sp, #24]
     73e:	aa38      	add	r2, sp, #224	; 0xe0
     740:	f005 fbc9 	bl	5ed6 <flash_area_read>
            if (rc) {
     744:	4680      	mov	r8, r0
     746:	b9b8      	cbnz	r0, 778 <FIH_LABEL_FIH_CALL_END_814+0x1c>

00000748 <FIH_LABEL_FIH_CALL_START_793>:
            FIH_CALL(bootutil_verify_sig, valid_signature, hash, sizeof(hash),
     748:	b2ff      	uxtb	r7, r7
     74a:	4659      	mov	r1, fp
     74c:	f8bd 3014 	ldrh.w	r3, [sp, #20]
     750:	9700      	str	r7, [sp, #0]
     752:	aa38      	add	r2, sp, #224	; 0xe0
     754:	a80d      	add	r0, sp, #52	; 0x34
     756:	f000 f819 	bl	78c <bootutil_verify_sig>
     75a:	4606      	mov	r6, r0

0000075c <FIH_LABEL_FIH_CALL_END_814>:
            key_id = -1;
     75c:	f04f 37ff 	mov.w	r7, #4294967295
     760:	e777      	b.n	652 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x76>
    if (rc) {
     762:	b13c      	cbz	r4, 774 <FIH_LABEL_FIH_CALL_END_814+0x18>
    fih_rc = fih_int_encode_zero_equality(fih_not_eq(valid_signature,
     764:	4b07      	ldr	r3, [pc, #28]	; (784 <FIH_LABEL_FIH_CALL_END_814+0x28>)
 * value that is not FIH_SUCCESS
 */
__attribute__((always_inline)) inline
fih_int fih_int_encode_zero_equality(int x)
{
    if (x) {
     766:	681b      	ldr	r3, [r3, #0]
     768:	42b3      	cmp	r3, r6
        return FIH_FAILURE;
     76a:	bf18      	it	ne
     76c:	f8da 6000 	ldrne.w	r6, [sl]
        return -1;
     770:	4634      	mov	r4, r6
     772:	e750      	b.n	616 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x3a>
    rc = !sha256_valid;
     774:	f04f 0801 	mov.w	r8, #1
        return -1;
     778:	4644      	mov	r4, r8
     77a:	e74c      	b.n	616 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x3a>
     77c:	2000c4e8 	.word	0x2000c4e8
     780:	000089d0 	.word	0x000089d0
     784:	2000c6f0 	.word	0x2000c6f0
     788:	000089d4 	.word	0x000089d4

0000078c <bootutil_verify_sig>:
}

fih_int
bootutil_verify_sig(uint8_t *hash, uint32_t hlen, uint8_t *sig, size_t slen,
  uint8_t key_id)
{
     78c:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
     790:	461f      	mov	r7, r3
     792:	f5ad 7d4b 	sub.w	sp, sp, #812	; 0x32c
    mbedtls_rsa_context ctx;
    int rc;
    fih_int fih_rc = FIH_FAILURE;
     796:	4b6a      	ldr	r3, [pc, #424]	; (940 <FIH_LABEL_FIH_CALL_END_650+0x2>)
{
     798:	4680      	mov	r8, r0
    uint8_t *cp;
    uint8_t *end;

#if MBEDTLS_VERSION_NUMBER >= 0x03000000
    mbedtls_rsa_init(&ctx);
     79a:	a827      	add	r0, sp, #156	; 0x9c
{
     79c:	f89d 6350 	ldrb.w	r6, [sp, #848]	; 0x350
     7a0:	468a      	mov	sl, r1
     7a2:	4691      	mov	r9, r2
    fih_int fih_rc = FIH_FAILURE;
     7a4:	681d      	ldr	r5, [r3, #0]
    mbedtls_rsa_init(&ctx);
     7a6:	f007 fd81 	bl	82ac <mbedtls_rsa_init>
#else
    mbedtls_rsa_init(&ctx, 0, 0);
#endif

    cp = (uint8_t *)bootutil_keys[key_id].key;
     7aa:	4b66      	ldr	r3, [pc, #408]	; (944 <FIH_LABEL_FIH_CALL_END_650+0x6>)
    if ((rc = mbedtls_asn1_get_tag(p, end, &len,
     7ac:	aa8a      	add	r2, sp, #552	; 0x228
    cp = (uint8_t *)bootutil_keys[key_id].key;
     7ae:	f853 4036 	ldr.w	r4, [r3, r6, lsl #3]
    end = cp + *bootutil_keys[key_id].len;
     7b2:	eb03 03c6 	add.w	r3, r3, r6, lsl #3
     7b6:	685b      	ldr	r3, [r3, #4]
    cp = (uint8_t *)bootutil_keys[key_id].key;
     7b8:	9402      	str	r4, [sp, #8]
    end = cp + *bootutil_keys[key_id].len;
     7ba:	681b      	ldr	r3, [r3, #0]
    if ((rc = mbedtls_asn1_get_tag(p, end, &len,
     7bc:	a802      	add	r0, sp, #8
    end = cp + *bootutil_keys[key_id].len;
     7be:	441c      	add	r4, r3
    if ((rc = mbedtls_asn1_get_tag(p, end, &len,
     7c0:	4621      	mov	r1, r4
     7c2:	2330      	movs	r3, #48	; 0x30
     7c4:	f006 fb06 	bl	6dd4 <mbedtls_asn1_get_tag>
     7c8:	bb68      	cbnz	r0, 826 <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x26>
    if (*p + len != end) {
     7ca:	9b02      	ldr	r3, [sp, #8]
     7cc:	9a8a      	ldr	r2, [sp, #552]	; 0x228
     7ce:	4413      	add	r3, r2
     7d0:	429c      	cmp	r4, r3
     7d2:	d128      	bne.n	826 <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x26>
    if ((rc = mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(N))) != 0 ||
     7d4:	4621      	mov	r1, r4
     7d6:	aa29      	add	r2, sp, #164	; 0xa4
     7d8:	a802      	add	r0, sp, #8
     7da:	f006 fb0f 	bl	6dfc <mbedtls_asn1_get_mpi>
     7de:	bb10      	cbnz	r0, 826 <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x26>
        (rc = mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(E))) != 0) {
     7e0:	f10d 0bb0 	add.w	fp, sp, #176	; 0xb0
     7e4:	465a      	mov	r2, fp
     7e6:	4621      	mov	r1, r4
     7e8:	a802      	add	r0, sp, #8
     7ea:	f006 fb07 	bl	6dfc <mbedtls_asn1_get_mpi>
    if ((rc = mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(N))) != 0 ||
     7ee:	4606      	mov	r6, r0
     7f0:	b9c8      	cbnz	r0, 826 <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x26>
    ctx->MBEDTLS_CONTEXT_MEMBER(len) = mbedtls_mpi_size(&ctx->MBEDTLS_CONTEXT_MEMBER(N));
     7f2:	a829      	add	r0, sp, #164	; 0xa4
     7f4:	f006 fe22 	bl	743c <mbedtls_mpi_size>
    if (*p != end) {
     7f8:	9b02      	ldr	r3, [sp, #8]
    ctx->MBEDTLS_CONTEXT_MEMBER(len) = mbedtls_mpi_size(&ctx->MBEDTLS_CONTEXT_MEMBER(N));
     7fa:	9028      	str	r0, [sp, #160]	; 0xa0
    if (*p != end) {
     7fc:	429c      	cmp	r4, r3
     7fe:	d112      	bne.n	826 <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x26>
    rc = mbedtls_rsa_import(ctx, &ctx->MBEDTLS_CONTEXT_MEMBER(N), NULL,
     800:	4633      	mov	r3, r6
     802:	4632      	mov	r2, r6
     804:	e9cd 6b00 	strd	r6, fp, [sp]
     808:	a929      	add	r1, sp, #164	; 0xa4
     80a:	a827      	add	r0, sp, #156	; 0x9c
     80c:	f007 fd0b 	bl	8226 <mbedtls_rsa_import>
    if (rc != 0) {
     810:	b948      	cbnz	r0, 826 <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x26>
    rc = mbedtls_rsa_check_pubkey(ctx);
     812:	a827      	add	r0, sp, #156	; 0x9c
     814:	f003 fe6a 	bl	44ec <mbedtls_rsa_check_pubkey>
    if (rc != 0) {
     818:	b928      	cbnz	r0, 826 <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x26>
    ctx->MBEDTLS_CONTEXT_MEMBER(len) = mbedtls_mpi_size(&ctx->MBEDTLS_CONTEXT_MEMBER(N));
     81a:	a829      	add	r0, sp, #164	; 0xa4
     81c:	f006 fe0e 	bl	743c <mbedtls_mpi_size>

    rc = bootutil_parse_rsakey(&ctx, &cp, end);
    if (rc || slen != ctx.MBEDTLS_CONTEXT_MEMBER(len)) {
     820:	4287      	cmp	r7, r0
    ctx->MBEDTLS_CONTEXT_MEMBER(len) = mbedtls_mpi_size(&ctx->MBEDTLS_CONTEXT_MEMBER(N));
     822:	9028      	str	r0, [sp, #160]	; 0xa0
    if (rc || slen != ctx.MBEDTLS_CONTEXT_MEMBER(len)) {
     824:	d00a      	beq.n	83c <FIH_LABEL_FIH_CALL_START_229>
        mbedtls_rsa_free(&ctx);
     826:	a827      	add	r0, sp, #156	; 0x9c
     828:	f007 fd4a 	bl	82c0 <mbedtls_rsa_free>
        goto out;
    }
    FIH_CALL(bootutil_cmp_rsasig, fih_rc, &ctx, hash, hlen, sig);

out:
    mbedtls_rsa_free(&ctx);
     82c:	a827      	add	r0, sp, #156	; 0x9c
     82e:	f007 fd47 	bl	82c0 <mbedtls_rsa_free>

    FIH_RET(fih_rc);
}
     832:	4628      	mov	r0, r5
     834:	f50d 7d4b 	add.w	sp, sp, #812	; 0x32c
     838:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

0000083c <FIH_LABEL_FIH_CALL_START_229>:
    if (ctx->MBEDTLS_CONTEXT_MEMBER(len) != PSS_EMLEN ||
     83c:	f5b7 7f80 	cmp.w	r7, #256	; 0x100
     840:	d002      	beq.n	848 <FIH_LABEL_FIH_CALL_END_285+0x2>
    for (i = 0; i < PSS_MASK_LEN; i++) {
     842:	f04f 35ff 	mov.w	r5, #4294967295

00000846 <FIH_LABEL_FIH_CALL_END_285>:
    FIH_CALL(bootutil_cmp_rsasig, fih_rc, &ctx, hash, hlen, sig);
     846:	e7f1      	b.n	82c <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x2c>
    if (hlen != PSS_HLEN) {
     848:	f1ba 0f20 	cmp.w	sl, #32
     84c:	d1f9      	bne.n	842 <FIH_LABEL_FIH_CALL_START_229+0x6>
    if (mbedtls_rsa_public(ctx, sig, em)) {
     84e:	4649      	mov	r1, r9
     850:	aa8a      	add	r2, sp, #552	; 0x228
     852:	a827      	add	r0, sp, #156	; 0x9c
     854:	f003 fe70 	bl	4538 <mbedtls_rsa_public>
     858:	4604      	mov	r4, r0
     85a:	2800      	cmp	r0, #0
     85c:	d1f1      	bne.n	842 <FIH_LABEL_FIH_CALL_START_229+0x6>
    if (em[PSS_EMLEN - 1] != 0xbc) {
     85e:	f89d 3327 	ldrb.w	r3, [sp, #807]	; 0x327
     862:	2bbc      	cmp	r3, #188	; 0xbc
     864:	d1ed      	bne.n	842 <FIH_LABEL_FIH_CALL_START_229+0x6>
    uint8_t counter[4] = { 0, 0, 0, 0 };
     866:	af52      	add	r7, sp, #328	; 0x148
    int count = PSS_MASK_LEN;
     868:	26df      	movs	r6, #223	; 0xdf
     86a:	463d      	mov	r5, r7
    uint8_t counter[4] = { 0, 0, 0, 0 };
     86c:	9003      	str	r0, [sp, #12]
    mbedtls_sha256_init(ctx);
     86e:	a80c      	add	r0, sp, #48	; 0x30
     870:	f007 fd5f 	bl	8332 <mbedtls_sha256_init>
    (void)mbedtls_sha256_starts_ret(ctx, 0);
     874:	2100      	movs	r1, #0
     876:	a80c      	add	r0, sp, #48	; 0x30
     878:	f003 fea6 	bl	45c8 <mbedtls_sha256_starts>
    return mbedtls_sha256_update_ret(ctx, data, data_len);
     87c:	2220      	movs	r2, #32
     87e:	f20d 3107 	addw	r1, sp, #775	; 0x307
     882:	a80c      	add	r0, sp, #48	; 0x30
     884:	f007 fd59 	bl	833a <mbedtls_sha256_update>
     888:	2204      	movs	r2, #4
     88a:	a903      	add	r1, sp, #12
     88c:	a80c      	add	r0, sp, #48	; 0x30
     88e:	f007 fd54 	bl	833a <mbedtls_sha256_update>
    return mbedtls_sha256_finish_ret(ctx, output);
     892:	a904      	add	r1, sp, #16
     894:	a80c      	add	r0, sp, #48	; 0x30
     896:	f007 fd89 	bl	83ac <mbedtls_sha256_finish>
        if (bytes > count)
     89a:	2e20      	cmp	r6, #32
     89c:	46b1      	mov	r9, r6
     89e:	bfa8      	it	ge
     8a0:	f04f 0920 	movge.w	r9, #32
        counter[3]++;
     8a4:	f89d 300f 	ldrb.w	r3, [sp, #15]
        memcpy(mask, htmp, bytes);
     8a8:	4638      	mov	r0, r7
        counter[3]++;
     8aa:	3301      	adds	r3, #1
        memcpy(mask, htmp, bytes);
     8ac:	464a      	mov	r2, r9
     8ae:	a904      	add	r1, sp, #16
        count -= bytes;
     8b0:	eba6 0609 	sub.w	r6, r6, r9
        counter[3]++;
     8b4:	f88d 300f 	strb.w	r3, [sp, #15]
        memcpy(mask, htmp, bytes);
     8b8:	f005 fe6e 	bl	6598 <memcpy>
    while (count > 0) {
     8bc:	2e00      	cmp	r6, #0
        mask += bytes;
     8be:	444f      	add	r7, r9
    while (count > 0) {
     8c0:	dcd5      	bgt.n	86e <FIH_LABEL_FIH_CALL_END_285+0x28>
    for (i = 0; i < PSS_MASK_LEN; i++) {
     8c2:	462f      	mov	r7, r5
     8c4:	4629      	mov	r1, r5
     8c6:	2200      	movs	r2, #0
     8c8:	ab8a      	add	r3, sp, #552	; 0x228
        db_mask[i] ^= em[i];
     8ca:	7808      	ldrb	r0, [r1, #0]
     8cc:	f813 6b01 	ldrb.w	r6, [r3], #1
    for (i = 0; i < PSS_MASK_LEN; i++) {
     8d0:	3201      	adds	r2, #1
        db_mask[i] ^= em[i];
     8d2:	4070      	eors	r0, r6
    for (i = 0; i < PSS_MASK_LEN; i++) {
     8d4:	2adf      	cmp	r2, #223	; 0xdf
        db_mask[i] ^= em[i];
     8d6:	f801 0b01 	strb.w	r0, [r1], #1
    for (i = 0; i < PSS_MASK_LEN; i++) {
     8da:	d1f6      	bne.n	8ca <FIH_LABEL_FIH_CALL_END_285+0x84>
    db_mask[0] &= 0x7F;
     8dc:	782b      	ldrb	r3, [r5, #0]
     8de:	f003 037f 	and.w	r3, r3, #127	; 0x7f
     8e2:	702b      	strb	r3, [r5, #0]
        if (db_mask[i] != 0) {
     8e4:	f817 6b01 	ldrb.w	r6, [r7], #1
     8e8:	2e00      	cmp	r6, #0
     8ea:	d1aa      	bne.n	842 <FIH_LABEL_FIH_CALL_START_229+0x6>
    for (i = 0; i < PSS_MASK_ZERO_COUNT; i++) {
     8ec:	3401      	adds	r4, #1
     8ee:	2cbe      	cmp	r4, #190	; 0xbe
     8f0:	d1f8      	bne.n	8e4 <FIH_LABEL_FIH_CALL_END_285+0x9e>
    if (db_mask[PSS_MASK_ONE_POS] != 1) {
     8f2:	f895 30be 	ldrb.w	r3, [r5, #190]	; 0xbe
     8f6:	2b01      	cmp	r3, #1
     8f8:	d1a3      	bne.n	842 <FIH_LABEL_FIH_CALL_START_229+0x6>
    mbedtls_sha256_init(ctx);
     8fa:	a80c      	add	r0, sp, #48	; 0x30
     8fc:	f007 fd19 	bl	8332 <mbedtls_sha256_init>
    (void)mbedtls_sha256_starts_ret(ctx, 0);
     900:	4631      	mov	r1, r6
     902:	a80c      	add	r0, sp, #48	; 0x30
     904:	f003 fe60 	bl	45c8 <mbedtls_sha256_starts>
    return mbedtls_sha256_update_ret(ctx, data, data_len);
     908:	2208      	movs	r2, #8
     90a:	490f      	ldr	r1, [pc, #60]	; (948 <FIH_LABEL_FIH_CALL_END_650+0xa>)
     90c:	a80c      	add	r0, sp, #48	; 0x30
     90e:	f007 fd14 	bl	833a <mbedtls_sha256_update>
     912:	4641      	mov	r1, r8
     914:	2220      	movs	r2, #32
     916:	a80c      	add	r0, sp, #48	; 0x30
     918:	f007 fd0f 	bl	833a <mbedtls_sha256_update>
     91c:	2220      	movs	r2, #32
     91e:	f20d 2107 	addw	r1, sp, #519	; 0x207
     922:	a80c      	add	r0, sp, #48	; 0x30
     924:	f007 fd09 	bl	833a <mbedtls_sha256_update>
    return mbedtls_sha256_finish_ret(ctx, output);
     928:	a904      	add	r1, sp, #16
     92a:	a80c      	add	r0, sp, #48	; 0x30
     92c:	f007 fd3e 	bl	83ac <mbedtls_sha256_finish>

00000930 <FIH_LABEL_FIH_CALL_START_634>:
    FIH_CALL(boot_fih_memequal, fih_rc, h2, &em[PSS_HASH_OFFSET], PSS_HLEN);
     930:	2220      	movs	r2, #32
     932:	f20d 3107 	addw	r1, sp, #775	; 0x307
     936:	a804      	add	r0, sp, #16
     938:	f004 fff5 	bl	5926 <boot_fih_memequal>
     93c:	4605      	mov	r5, r0

0000093e <FIH_LABEL_FIH_CALL_END_650>:
    if (rc) {
     93e:	e782      	b.n	846 <FIH_LABEL_FIH_CALL_END_285>
     940:	2000c4e8 	.word	0x2000c4e8
     944:	000089d4 	.word	0x000089d4
     948:	00008ec1 	.word	0x00008ec1

0000094c <boot_read_swap_size>:
    return -1;
}

int
boot_read_swap_size(int image_index, uint32_t *swap_size)
{
     94c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    uint8_t areas[2] = {
     950:	2302      	movs	r3, #2
{
     952:	b086      	sub	sp, #24
     954:	460d      	mov	r5, r1
     956:	466f      	mov	r7, sp
    for (i = 0; i < sizeof(areas) / sizeof(areas[0]); i++) {
     958:	2600      	movs	r6, #0
    if (memcmp(magic, BOOT_IMG_MAGIC, BOOT_MAGIC_SZ) == 0) {
     95a:	f8df 8068 	ldr.w	r8, [pc, #104]	; 9c4 <boot_read_swap_size+0x78>
    uint8_t areas[2] = {
     95e:	f8ad 3000 	strh.w	r3, [sp]
        rc = flash_area_open(areas[i], fap);
     962:	f817 0b01 	ldrb.w	r0, [r7], #1
     966:	a901      	add	r1, sp, #4
     968:	f001 fa20 	bl	1dac <flash_area_open>
        if (rc != 0) {
     96c:	4604      	mov	r4, r0
     96e:	b9a0      	cbnz	r0, 99a <boot_read_swap_size+0x4e>
        off = boot_magic_off(*fap);
     970:	9801      	ldr	r0, [sp, #4]
        rc = flash_area_read(*fap, off, magic, BOOT_MAGIC_SZ);
     972:	2310      	movs	r3, #16
    return flash_area_get_size(fap) - BOOT_MAGIC_SZ;
     974:	6881      	ldr	r1, [r0, #8]
        rc = flash_area_read(*fap, off, magic, BOOT_MAGIC_SZ);
     976:	aa02      	add	r2, sp, #8
     978:	3910      	subs	r1, #16
     97a:	f005 faac 	bl	5ed6 <flash_area_read>
     97e:	4604      	mov	r4, r0
        flash_area_close(*fap);
     980:	9801      	ldr	r0, [sp, #4]
     982:	f005 faa7 	bl	5ed4 <flash_area_close>
        if (rc != 0) {
     986:	b944      	cbnz	r4, 99a <boot_read_swap_size+0x4e>
    if (memcmp(magic, BOOT_IMG_MAGIC, BOOT_MAGIC_SZ) == 0) {
     988:	2210      	movs	r2, #16
     98a:	4641      	mov	r1, r8
     98c:	a802      	add	r0, sp, #8
     98e:	f005 fddc 	bl	654a <memcmp>
     992:	b140      	cbz	r0, 9a6 <boot_read_swap_size+0x5a>
    for (i = 0; i < sizeof(areas) / sizeof(areas[0]); i++) {
     994:	b12e      	cbz	r6, 9a2 <boot_read_swap_size+0x56>
    return -1;
     996:	f04f 34ff 	mov.w	r4, #4294967295
        rc = flash_area_read(fap, off, swap_size, sizeof *swap_size);
        flash_area_close(fap);
    }

    return rc;
}
     99a:	4620      	mov	r0, r4
     99c:	b006      	add	sp, #24
     99e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    for (i = 0; i < sizeof(areas) / sizeof(areas[0]); i++) {
     9a2:	2601      	movs	r6, #1
     9a4:	e7dd      	b.n	962 <boot_read_swap_size+0x16>
    return boot_swap_info_off(fap) - BOOT_MAX_ALIGN;
     9a6:	9801      	ldr	r0, [sp, #4]
     9a8:	f006 f91b 	bl	6be2 <boot_swap_info_off>
        rc = flash_area_read(fap, off, swap_size, sizeof *swap_size);
     9ac:	2304      	movs	r3, #4
     9ae:	f1a0 0108 	sub.w	r1, r0, #8
     9b2:	462a      	mov	r2, r5
     9b4:	9801      	ldr	r0, [sp, #4]
     9b6:	f005 fa8e 	bl	5ed6 <flash_area_read>
     9ba:	4604      	mov	r4, r0
        flash_area_close(fap);
     9bc:	9801      	ldr	r0, [sp, #4]
     9be:	f005 fa89 	bl	5ed4 <flash_area_close>
     9c2:	e7ea      	b.n	99a <boot_read_swap_size+0x4e>
     9c4:	00008db4 	.word	0x00008db4

000009c8 <bootutil_max_image_size>:
    return 0;
}
#endif

uint32_t bootutil_max_image_size(const struct flash_area *fap)
{
     9c8:	b507      	push	{r0, r1, r2, lr}
#if defined(MCUBOOT_SWAP_USING_SCRATCH)
    return boot_status_off(fap);
#elif defined(MCUBOOT_SWAP_USING_MOVE)
    struct flash_sector sector;
    /* get the last sector offset */
    int rc = flash_area_sector_from_off(boot_status_off(fap), &sector);
     9ca:	f004 ffc0 	bl	594e <boot_status_off>
     9ce:	4669      	mov	r1, sp
     9d0:	f7ff fdc6 	bl	560 <flash_area_sector_from_off>
    if (rc) {
     9d4:	b138      	cbz	r0, 9e6 <bootutil_max_image_size+0x1e>
        BOOT_LOG_ERR("Unable to determine flash sector of the image trailer");
     9d6:	4805      	ldr	r0, [pc, #20]	; (9ec <bootutil_max_image_size+0x24>)
     9d8:	2145      	movs	r1, #69	; 0x45
     9da:	f005 fa6e 	bl	5eba <z_log_minimal_printk>
        return 0; /* Returning of zero here should cause any check which uses
     9de:	2000      	movs	r0, #0
#elif defined(MCUBOOT_DIRECT_XIP)
    return boot_swap_info_off(fap);
#elif defined(MCUBOOT_RAM_LOAD)
    return boot_swap_info_off(fap);
#endif
}
     9e0:	b003      	add	sp, #12
     9e2:	f85d fb04 	ldr.w	pc, [sp], #4
 */
uint8_t flash_area_erased_val(const struct flash_area *fap);

static inline uint32_t flash_sector_get_off(const struct flash_sector *fs)
{
	return fs->fs_off;
     9e6:	9800      	ldr	r0, [sp, #0]
    return flash_sector_get_off(&sector);
     9e8:	e7fa      	b.n	9e0 <bootutil_max_image_size+0x18>
     9ea:	bf00      	nop
     9ec:	00008ec9 	.word	0x00008ec9

000009f0 <boot_validate_slot.isra.0>:
 *         FIH_SUCCESS                      if image was successfully validated
 *         1 (or its fih_int encoded form)  if no bootloable image was found
 *         FIH_FAILURE                      on any errors
 */
static fih_int
boot_validate_slot(struct boot_loader_state *state, int slot,
     9f0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
                   struct boot_status *bs)
{
    const struct flash_area *fap;
    struct image_header *hdr;
    int area_id;
    fih_int fih_rc = FIH_FAILURE;
     9f4:	4b35      	ldr	r3, [pc, #212]	; (acc <FIH_LABEL_FIH_CALL_END_437+0x76>)
boot_validate_slot(struct boot_loader_state *state, int slot,
     9f6:	b088      	sub	sp, #32
     9f8:	4606      	mov	r6, r0
    int rc;

    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
     9fa:	2000      	movs	r0, #0
boot_validate_slot(struct boot_loader_state *state, int slot,
     9fc:	460c      	mov	r4, r1
    fih_int fih_rc = FIH_FAILURE;
     9fe:	681d      	ldr	r5, [r3, #0]
    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
     a00:	f004 feec 	bl	57dc <flash_area_id_from_multi_image_slot>
    rc = flash_area_open(area_id, &fap);
     a04:	a906      	add	r1, sp, #24
     a06:	b2c0      	uxtb	r0, r0
     a08:	f001 f9d0 	bl	1dac <flash_area_open>
    if (rc != 0) {
     a0c:	2800      	cmp	r0, #0
     a0e:	d157      	bne.n	ac0 <FIH_LABEL_FIH_CALL_END_437+0x6a>
    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
     a10:	4621      	mov	r1, r4
     a12:	f004 fee3 	bl	57dc <flash_area_id_from_multi_image_slot>
     ((swap_type) == BOOT_SWAP_TYPE_PERM))

static inline struct image_header*
boot_img_hdr(struct boot_loader_state *state, size_t slot)
{
    return &BOOT_IMG(state, slot).hdr;
     a16:	252c      	movs	r5, #44	; 0x2c
    rc = flash_area_open(area_id, &fap);
     a18:	a907      	add	r1, sp, #28
     a1a:	b2c0      	uxtb	r0, r0
     a1c:	fb05 6504 	mla	r5, r5, r4, r6
     a20:	f001 f9c4 	bl	1dac <flash_area_open>
    if (rc != 0) {
     a24:	2800      	cmp	r0, #0
     a26:	d033      	beq.n	a90 <FIH_LABEL_FIH_CALL_END_437+0x3a>
        FIH_RET(fih_rc);
    }

    hdr = boot_img_hdr(state, slot);
    if (boot_check_header_erased(state, slot) == 0 ||
        (hdr->ih_flags & IMAGE_F_NON_BOOTABLE)) {
     a28:	272c      	movs	r7, #44	; 0x2c
     a2a:	4367      	muls	r7, r4
     a2c:	eb06 0807 	add.w	r8, r6, r7
     a30:	f8d8 1010 	ldr.w	r1, [r8, #16]
#endif
    BOOT_HOOK_CALL_FIH(boot_image_check_hook, fih_int_encode(BOOT_HOOK_REGULAR),
                       fih_rc, BOOT_CURR_IMG(state), slot);
    if (fih_eq(fih_rc, fih_int_encode(BOOT_HOOK_REGULAR)))
    {
        FIH_CALL(boot_image_check, fih_rc, state, hdr, fap, bs);
     a34:	9b06      	ldr	r3, [sp, #24]
    if (boot_check_header_erased(state, slot) == 0 ||
     a36:	f011 0110 	ands.w	r1, r1, #16
     a3a:	d138      	bne.n	aae <FIH_LABEL_FIH_CALL_END_437+0x58>

00000a3c <FIH_LABEL_FIH_CALL_START_388>:
    FIH_CALL(bootutil_img_validate, fih_rc, BOOT_CURR_ENC(state), image_index,
     a3c:	f44f 7280 	mov.w	r2, #256	; 0x100
     a40:	9201      	str	r2, [sp, #4]
     a42:	4a23      	ldr	r2, [pc, #140]	; (ad0 <FIH_LABEL_FIH_CALL_END_437+0x7a>)
     a44:	4608      	mov	r0, r1
     a46:	9200      	str	r2, [sp, #0]
     a48:	e9cd 1103 	strd	r1, r1, [sp, #12]
     a4c:	462a      	mov	r2, r5
     a4e:	9102      	str	r1, [sp, #8]
     a50:	f7ff fd9e 	bl	590 <bootutil_img_validate>
     a54:	4605      	mov	r5, r0

00000a56 <FIH_LABEL_FIH_CALL_END_437>:
    if (hdr->ih_magic != IMAGE_MAGIC) {
     a56:	4b1f      	ldr	r3, [pc, #124]	; (ad4 <FIH_LABEL_FIH_CALL_END_437+0x7e>)
     a58:	59f2      	ldr	r2, [r6, r7]
    }
    if (!boot_is_header_valid(hdr, fap) || fih_not_eq(fih_rc, FIH_SUCCESS)) {
     a5a:	9806      	ldr	r0, [sp, #24]
    if (hdr->ih_magic != IMAGE_MAGIC) {
     a5c:	429a      	cmp	r2, r3
     a5e:	d10c      	bne.n	a7a <FIH_LABEL_FIH_CALL_END_437+0x24>
    if (!boot_u32_safe_add(&size, hdr->ih_img_size, hdr->ih_hdr_size)) {
     a60:	f8d8 200c 	ldr.w	r2, [r8, #12]
     a64:	f8b8 3008 	ldrh.w	r3, [r8, #8]
    if (a > UINT32_MAX - b) {
     a68:	189b      	adds	r3, r3, r2
     a6a:	d206      	bcs.n	a7a <FIH_LABEL_FIH_CALL_END_437+0x24>
    if (size >= flash_area_get_size(fap)) {
     a6c:	6882      	ldr	r2, [r0, #8]
     a6e:	4293      	cmp	r3, r2
     a70:	d203      	bcs.n	a7a <FIH_LABEL_FIH_CALL_END_437+0x24>
    if (!boot_is_header_valid(hdr, fap) || fih_not_eq(fih_rc, FIH_SUCCESS)) {
     a72:	4b19      	ldr	r3, [pc, #100]	; (ad8 <FIH_LABEL_FIH_CALL_END_437+0x82>)
     a74:	681b      	ldr	r3, [r3, #0]
     a76:	42ab      	cmp	r3, r5
     a78:	d01f      	beq.n	aba <FIH_LABEL_FIH_CALL_END_437+0x64>
        if ((slot != BOOT_PRIMARY_SLOT) || ARE_SLOTS_EQUIVALENT()) {
     a7a:	b32c      	cbz	r4, ac8 <FIH_LABEL_FIH_CALL_END_437+0x72>
            flash_area_erase(fap, 0, flash_area_get_size(fap));
     a7c:	6882      	ldr	r2, [r0, #8]
     a7e:	2100      	movs	r1, #0
     a80:	f005 fa53 	bl	5f2a <flash_area_erase>
            /* Image is invalid, erase it to prevent further unnecessary
             * attempts to validate and boot it.
             */
        }
#if !defined(__BOOTSIM__)
        BOOT_LOG_ERR("Image in the %s slot is not valid!",
     a84:	4a15      	ldr	r2, [pc, #84]	; (adc <FIH_LABEL_FIH_CALL_END_437+0x86>)
     a86:	2145      	movs	r1, #69	; 0x45
     a88:	4815      	ldr	r0, [pc, #84]	; (ae0 <FIH_LABEL_FIH_CALL_END_437+0x8a>)
     a8a:	f005 fa16 	bl	5eba <z_log_minimal_printk>
                     (slot == BOOT_PRIMARY_SLOT) ? "primary" : "secondary");
#endif
        fih_rc = fih_int_encode(1);
        goto out;
     a8e:	e013      	b.n	ab8 <FIH_LABEL_FIH_CALL_END_437+0x62>
    erased_val = flash_area_erased_val(fap);
     a90:	9807      	ldr	r0, [sp, #28]
     a92:	f005 fa65 	bl	5f60 <flash_area_erased_val>
     a96:	4607      	mov	r7, r0
    flash_area_close(fap);
     a98:	9807      	ldr	r0, [sp, #28]
     a9a:	f005 fa1b 	bl	5ed4 <flash_area_close>
    for (i = 0; i < len; i++) {
     a9e:	1e6b      	subs	r3, r5, #1
     aa0:	1cea      	adds	r2, r5, #3
        if (val != p[i]) {
     aa2:	f813 1f01 	ldrb.w	r1, [r3, #1]!
     aa6:	42b9      	cmp	r1, r7
     aa8:	d1be      	bne.n	a28 <boot_validate_slot.isra.0+0x38>
    for (i = 0; i < len; i++) {
     aaa:	4293      	cmp	r3, r2
     aac:	d1f9      	bne.n	aa2 <FIH_LABEL_FIH_CALL_END_437+0x4c>
        if (slot != BOOT_PRIMARY_SLOT) {
     aae:	b11c      	cbz	r4, ab8 <FIH_LABEL_FIH_CALL_END_437+0x62>
            swap_erase_trailer_sectors(state, fap);
     ab0:	4630      	mov	r0, r6
     ab2:	9906      	ldr	r1, [sp, #24]
     ab4:	f005 f830 	bl	5b18 <swap_erase_trailer_sectors>
        fih_rc = fih_int_encode(1);
     ab8:	2501      	movs	r5, #1
        }
    }
#endif

out:
    flash_area_close(fap);
     aba:	9806      	ldr	r0, [sp, #24]
     abc:	f005 fa0a 	bl	5ed4 <flash_area_close>

    FIH_RET(fih_rc);
}
     ac0:	4628      	mov	r0, r5
     ac2:	b008      	add	sp, #32
     ac4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        BOOT_LOG_ERR("Image in the %s slot is not valid!",
     ac8:	4a06      	ldr	r2, [pc, #24]	; (ae4 <FIH_LABEL_FIH_CALL_END_437+0x8e>)
     aca:	e7dc      	b.n	a86 <FIH_LABEL_FIH_CALL_END_437+0x30>
     acc:	2000c4e8 	.word	0x2000c4e8
     ad0:	2000f892 	.word	0x2000f892
     ad4:	96f3b83d 	.word	0x96f3b83d
     ad8:	2000c6f0 	.word	0x2000c6f0
     adc:	00008f0c 	.word	0x00008f0c
     ae0:	00008f16 	.word	0x00008f16
     ae4:	00008f04 	.word	0x00008f04

00000ae8 <boot_swap_image>:
 *
 * @return                      0 on success; nonzero on failure.
 */
static int
boot_swap_image(struct boot_loader_state *state, struct boot_status *bs)
{
     ae8:	b573      	push	{r0, r1, r4, r5, r6, lr}
     aea:	460d      	mov	r5, r1
    uint8_t image_index;
    int rc;

    /* FIXME: just do this if asked by user? */

    size = copy_size = 0;
     aec:	2100      	movs	r1, #0
{
     aee:	4604      	mov	r4, r0
    image_index = BOOT_CURR_IMG(state);

    if (boot_status_is_reset(bs)) {
     af0:	4628      	mov	r0, r5
    size = copy_size = 0;
     af2:	e9cd 1100 	strd	r1, r1, [sp]
    if (boot_status_is_reset(bs)) {
     af6:	f004 ffce 	bl	5a96 <boot_status_is_reset>
     afa:	b330      	cbz	r0, b4a <boot_swap_image+0x62>
        /*
         * No swap ever happened, so need to find the largest image which
         * will be used to determine the amount of sectors to swap.
         */
        hdr = boot_img_hdr(state, BOOT_PRIMARY_SLOT);
        if (hdr->ih_magic == IMAGE_MAGIC) {
     afc:	4e16      	ldr	r6, [pc, #88]	; (b58 <boot_swap_image+0x70>)
     afe:	6823      	ldr	r3, [r4, #0]
     b00:	42b3      	cmp	r3, r6
     b02:	d103      	bne.n	b0c <boot_swap_image+0x24>
            rc = boot_read_image_size(state, BOOT_PRIMARY_SLOT, &copy_size);
     b04:	4620      	mov	r0, r4
     b06:	aa01      	add	r2, sp, #4
     b08:	f004 ff59 	bl	59be <boot_read_image_size.constprop.0.isra.0>
            memset(bs->enckey[0], 0xff, BOOT_ENC_KEY_ALIGN_SIZE);
        }
#endif

        hdr = boot_img_hdr(state, BOOT_SECONDARY_SLOT);
        if (hdr->ih_magic == IMAGE_MAGIC) {
     b0c:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
     b0e:	42b3      	cmp	r3, r6
     b10:	d104      	bne.n	b1c <boot_swap_image+0x34>
            rc = boot_read_image_size(state, BOOT_SECONDARY_SLOT, &size);
     b12:	466a      	mov	r2, sp
     b14:	2101      	movs	r1, #1
     b16:	4620      	mov	r0, r4
     b18:	f004 ff51 	bl	59be <boot_read_image_size.constprop.0.isra.0>
        } else {
            memset(bs->enckey[1], 0xff, BOOT_ENC_KEY_ALIGN_SIZE);
        }
#endif

        if (size > copy_size) {
     b1c:	e9dd 3200 	ldrd	r3, r2, [sp]
     b20:	4293      	cmp	r3, r2
            copy_size = size;
     b22:	bf88      	it	hi
     b24:	9301      	strhi	r3, [sp, #4]
        }

        bs->swap_size = copy_size;
     b26:	9b01      	ldr	r3, [sp, #4]
     b28:	60ab      	str	r3, [r5, #8]
            }
        }
#endif
    }

    swap_run(state, bs, copy_size);
     b2a:	9a01      	ldr	r2, [sp, #4]
     b2c:	4629      	mov	r1, r5
     b2e:	4620      	mov	r0, r4
     b30:	f000 fb36 	bl	11a0 <swap_run>

#ifdef MCUBOOT_VALIDATE_PRIMARY_SLOT
    extern int boot_status_fails;
    if (boot_status_fails > 0) {
     b34:	4b09      	ldr	r3, [pc, #36]	; (b5c <boot_swap_image+0x74>)
     b36:	681a      	ldr	r2, [r3, #0]
     b38:	2a00      	cmp	r2, #0
     b3a:	dd03      	ble.n	b44 <boot_swap_image+0x5c>
        BOOT_LOG_WRN("%d status write fails performing the swap",
     b3c:	2157      	movs	r1, #87	; 0x57
     b3e:	4808      	ldr	r0, [pc, #32]	; (b60 <boot_swap_image+0x78>)
     b40:	f005 f9bb 	bl	5eba <z_log_minimal_printk>
#endif
    rc = BOOT_HOOK_CALL(boot_copy_region_post_hook, 0, BOOT_CURR_IMG(state),
                        BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT), size);

    return 0;
}
     b44:	2000      	movs	r0, #0
     b46:	b002      	add	sp, #8
     b48:	bd70      	pop	{r4, r5, r6, pc}
        rc = boot_read_swap_size(image_index, &bs->swap_size);
     b4a:	f105 0108 	add.w	r1, r5, #8
     b4e:	f7ff fefd 	bl	94c <boot_read_swap_size>
        copy_size = bs->swap_size;
     b52:	68ab      	ldr	r3, [r5, #8]
     b54:	9301      	str	r3, [sp, #4]
     b56:	e7e8      	b.n	b2a <boot_swap_image+0x42>
     b58:	96f3b83d 	.word	0x96f3b83d
     b5c:	2000db54 	.word	0x2000db54
     b60:	00008f3e 	.word	0x00008f3e

00000b64 <boot_copy_region>:
{
     b64:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
     b68:	4688      	mov	r8, r1
     b6a:	4691      	mov	r9, r2
     b6c:	469a      	mov	sl, r3
    bytes_copied = 0;
     b6e:	2600      	movs	r6, #0
        rc = flash_area_read(fap_src, off_src + bytes_copied, buf, chunk_sz);
     b70:	f8df b068 	ldr.w	fp, [pc, #104]	; bdc <boot_copy_region+0x78>
     b74:	4c1a      	ldr	r4, [pc, #104]	; (be0 <boot_copy_region+0x7c>)
     b76:	4d1b      	ldr	r5, [pc, #108]	; (be4 <boot_copy_region+0x80>)
    while (bytes_copied < sz) {
     b78:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
     b7a:	429e      	cmp	r6, r3
     b7c:	d301      	bcc.n	b82 <boot_copy_region+0x1e>
    return 0;
     b7e:	2000      	movs	r0, #0
     b80:	e00f      	b.n	ba2 <boot_copy_region+0x3e>
        if (sz - bytes_copied > sizeof buf) {
     b82:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
        rc = flash_area_read(fap_src, off_src + bytes_copied, buf, chunk_sz);
     b84:	4640      	mov	r0, r8
        if (sz - bytes_copied > sizeof buf) {
     b86:	1b9f      	subs	r7, r3, r6
     b88:	f5b7 6f80 	cmp.w	r7, #1024	; 0x400
     b8c:	bf28      	it	cs
     b8e:	f44f 6780 	movcs.w	r7, #1024	; 0x400
        rc = flash_area_read(fap_src, off_src + bytes_copied, buf, chunk_sz);
     b92:	4a12      	ldr	r2, [pc, #72]	; (bdc <boot_copy_region+0x78>)
     b94:	463b      	mov	r3, r7
     b96:	eb06 010a 	add.w	r1, r6, sl
     b9a:	f005 f99c 	bl	5ed6 <flash_area_read>
        if (rc != 0) {
     b9e:	b110      	cbz	r0, ba6 <boot_copy_region+0x42>
            return BOOT_EFLASH;
     ba0:	2001      	movs	r0, #1
}
     ba2:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
        rc = flash_area_write(fap_dst, off_dst + bytes_copied, buf, chunk_sz);
     ba6:	990a      	ldr	r1, [sp, #40]	; 0x28
     ba8:	463b      	mov	r3, r7
     baa:	465a      	mov	r2, fp
     bac:	4648      	mov	r0, r9
     bae:	1871      	adds	r1, r6, r1
     bb0:	f005 f9a6 	bl	5f00 <flash_area_write>
        if (rc != 0) {
     bb4:	2800      	cmp	r0, #0
     bb6:	d1f3      	bne.n	ba0 <boot_copy_region+0x3c>
     bb8:	f8c4 5600 	str.w	r5, [r4, #1536]	; 0x600
        bytes_copied += chunk_sz;
     bbc:	443e      	add	r6, r7
     bbe:	f8c4 5604 	str.w	r5, [r4, #1540]	; 0x604
     bc2:	f8c4 5608 	str.w	r5, [r4, #1544]	; 0x608
     bc6:	f8c4 560c 	str.w	r5, [r4, #1548]	; 0x60c
     bca:	f8c4 5610 	str.w	r5, [r4, #1552]	; 0x610
     bce:	f8c4 5614 	str.w	r5, [r4, #1556]	; 0x614
     bd2:	f8c4 5618 	str.w	r5, [r4, #1560]	; 0x618
     bd6:	f8c4 561c 	str.w	r5, [r4, #1564]	; 0x61c
        MCUBOOT_WATCHDOG_FEED();
     bda:	e7cd      	b.n	b78 <boot_copy_region+0x14>
     bdc:	2000d6f4 	.word	0x2000d6f4
     be0:	50018000 	.word	0x50018000
     be4:	6e524635 	.word	0x6e524635

00000be8 <context_boot_go>:
#endif
}

fih_int
context_boot_go(struct boot_loader_state *state, struct boot_rsp *rsp)
{
     be8:	e92d 41ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
     bec:	460e      	mov	r6, r1

        /* Open primary and secondary image areas for the duration
         * of this call.
         */
        for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) {
            fa_id = flash_area_id_from_multi_image_slot(image_index, slot);
     bee:	2100      	movs	r1, #0
        BOOT_IMG(state, BOOT_PRIMARY_SLOT).sectors =
     bf0:	4b8e      	ldr	r3, [pc, #568]	; (e2c <FIH_LABEL_FIH_CALL_END_2283+0x40>)
{
     bf2:	4604      	mov	r4, r0
        BOOT_IMG(state, BOOT_PRIMARY_SLOT).sectors =
     bf4:	6243      	str	r3, [r0, #36]	; 0x24
        BOOT_IMG(state, BOOT_SECONDARY_SLOT).sectors =
     bf6:	4b8e      	ldr	r3, [pc, #568]	; (e30 <FIH_LABEL_FIH_CALL_END_2283+0x44>)
     bf8:	6503      	str	r3, [r0, #80]	; 0x50
            fa_id = flash_area_id_from_multi_image_slot(image_index, slot);
     bfa:	4608      	mov	r0, r1
     bfc:	f004 fdee 	bl	57dc <flash_area_id_from_multi_image_slot>
            rc = flash_area_open(fa_id, &BOOT_IMG_AREA(state, slot));
     c00:	f104 0120 	add.w	r1, r4, #32
     c04:	b2c0      	uxtb	r0, r0
     c06:	f001 f8d1 	bl	1dac <flash_area_open>
            fa_id = flash_area_id_from_multi_image_slot(image_index, slot);
     c0a:	2101      	movs	r1, #1
     c0c:	2000      	movs	r0, #0
     c0e:	f004 fde5 	bl	57dc <flash_area_id_from_multi_image_slot>
            rc = flash_area_open(fa_id, &BOOT_IMG_AREA(state, slot));
     c12:	f104 014c 	add.w	r1, r4, #76	; 0x4c
     c16:	b2c0      	uxtb	r0, r0
     c18:	f001 f8c8 	bl	1dac <flash_area_open>
     c1c:	4605      	mov	r5, r0
    rc = boot_read_sectors(state);
     c1e:	4620      	mov	r0, r4
     c20:	f004 ff0e 	bl	5a40 <boot_read_sectors>
    if (rc != 0) {
     c24:	4607      	mov	r7, r0
     c26:	b968      	cbnz	r0, c44 <context_boot_go+0x5c>
    rc = boot_read_image_headers(state, false, NULL);
     c28:	2200      	movs	r2, #0
     c2a:	4620      	mov	r0, r4
     c2c:	4611      	mov	r1, r2
     c2e:	f004 feb0 	bl	5992 <boot_read_image_headers>
    if (rc != 0) {
     c32:	4607      	mov	r7, r0
     c34:	b308      	cbz	r0, c7a <context_boot_go+0x92>
        BOOT_LOG_WRN("Failed reading image headers; Image=%u",
     c36:	2200      	movs	r2, #0
     c38:	2157      	movs	r1, #87	; 0x57
     c3a:	487e      	ldr	r0, [pc, #504]	; (e34 <FIH_LABEL_FIH_CALL_END_2283+0x48>)
            BOOT_LOG_WRN("Failed reading boot status; Image=%u",
     c3c:	f005 f93d 	bl	5eba <z_log_minimal_printk>
        BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE;
     c40:	2301      	movs	r3, #1
     c42:	e090      	b.n	d66 <FIH_LABEL_FIH_CALL_END_2032+0xe>
        BOOT_LOG_WRN("Failed reading sectors; BOOT_MAX_IMG_SECTORS=%d"
     c44:	f44f 7280 	mov.w	r2, #256	; 0x100
     c48:	2157      	movs	r1, #87	; 0x57
     c4a:	487b      	ldr	r0, [pc, #492]	; (e38 <FIH_LABEL_FIH_CALL_END_2283+0x4c>)
     c4c:	f005 f935 	bl	5eba <z_log_minimal_printk>
        BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE;
     c50:	2301      	movs	r3, #1
        if (rc == BOOT_EFLASH)
     c52:	429f      	cmp	r7, r3
        BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE;
     c54:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
        if (rc == BOOT_EFLASH)
     c58:	d1e6      	bne.n	c28 <context_boot_go+0x40>
#endif

        /* Determine swap type and complete swap if it has been aborted. */
        boot_prepare_image_for_update(state, &bs);

        if (BOOT_IS_UPGRADE(BOOT_SWAP_TYPE(state))) {
     c5a:	f894 3058 	ldrb.w	r3, [r4, #88]	; 0x58
#endif /* (BOOT_IMAGE_NUMBER > 1) */

        /* Set the previously determined swap type */
        bs.swap_type = BOOT_SWAP_TYPE(state);

        switch (BOOT_SWAP_TYPE(state)) {
     c5e:	2b04      	cmp	r3, #4
        bs.swap_type = BOOT_SWAP_TYPE(state);
     c60:	f88d 3007 	strb.w	r3, [sp, #7]
        switch (BOOT_SWAP_TYPE(state)) {
     c64:	f200 8082 	bhi.w	d6c <FIH_LABEL_FIH_CALL_END_2032+0x14>
     c68:	2b01      	cmp	r3, #1
     c6a:	f200 8085 	bhi.w	d78 <FIH_LABEL_FIH_CALL_END_2032+0x20>
     c6e:	f000 809c 	beq.w	daa <FIH_LABEL_FIH_CALL_END_2032+0x52>
            }
#endif /* !MCUBOOT_OVERWRITE_ONLY */
            break;

        default:
            BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC;
     c72:	23ff      	movs	r3, #255	; 0xff
     c74:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
     c78:	e097      	b.n	daa <FIH_LABEL_FIH_CALL_END_2032+0x52>
    if (boot_slots_compatible(state)) {
     c7a:	4620      	mov	r0, r4
     c7c:	f000 f9a6 	bl	fcc <boot_slots_compatible>
     c80:	2800      	cmp	r0, #0
     c82:	d0dd      	beq.n	c40 <context_boot_go+0x58>
        boot_status_reset(bs);
     c84:	4668      	mov	r0, sp
     c86:	f004 fefd 	bl	5a84 <boot_status_reset>
        rc = swap_read_status(state, bs);
     c8a:	4669      	mov	r1, sp
     c8c:	4620      	mov	r0, r4
     c8e:	f004 ff98 	bl	5bc2 <swap_read_status>
        if (rc != 0) {
     c92:	b118      	cbz	r0, c9c <context_boot_go+0xb4>
            BOOT_LOG_WRN("Failed reading boot status; Image=%u",
     c94:	463a      	mov	r2, r7
     c96:	2157      	movs	r1, #87	; 0x57
     c98:	4868      	ldr	r0, [pc, #416]	; (e3c <FIH_LABEL_FIH_CALL_END_2283+0x50>)
     c9a:	e7cf      	b.n	c3c <context_boot_go+0x54>
        rc = boot_read_image_headers(state, !boot_status_is_reset(bs), bs);
     c9c:	4668      	mov	r0, sp
     c9e:	f004 fefa 	bl	5a96 <boot_status_is_reset>
     ca2:	f080 0101 	eor.w	r1, r0, #1
     ca6:	466a      	mov	r2, sp
     ca8:	4620      	mov	r0, r4
     caa:	b2c9      	uxtb	r1, r1
     cac:	f004 fe71 	bl	5992 <boot_read_image_headers>
        if (rc != 0) {
     cb0:	4602      	mov	r2, r0
     cb2:	2800      	cmp	r0, #0
     cb4:	d1bf      	bne.n	c36 <context_boot_go+0x4e>
        if (!boot_status_is_reset(bs)) {
     cb6:	4668      	mov	r0, sp
     cb8:	f004 feed 	bl	5a96 <boot_status_is_reset>
     cbc:	4607      	mov	r7, r0
     cbe:	bb60      	cbnz	r0, d1a <context_boot_go+0x132>
    rc = boot_swap_image(state, bs);
     cc0:	4669      	mov	r1, sp
     cc2:	4620      	mov	r0, r4
     cc4:	f7ff ff10 	bl	ae8 <boot_swap_image>
    BOOT_SWAP_TYPE(state) = bs->swap_type;
     cc8:	f89d 3007 	ldrb.w	r3, [sp, #7]
     ccc:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
    if (bs->swap_type == BOOT_SWAP_TYPE_REVERT ||
     cd0:	3b03      	subs	r3, #3
     cd2:	2b01      	cmp	r3, #1
     cd4:	d806      	bhi.n	ce4 <context_boot_go+0xfc>
        rc = swap_set_image_ok(BOOT_CURR_IMG(state));
     cd6:	4638      	mov	r0, r7
     cd8:	f004 ffc1 	bl	5c5e <swap_set_image_ok>
        if (rc != 0) {
     cdc:	b110      	cbz	r0, ce4 <context_boot_go+0xfc>
            BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC;
     cde:	23ff      	movs	r3, #255	; 0xff
     ce0:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
    if (BOOT_IS_UPGRADE(bs->swap_type)) {
     ce4:	f89d 3007 	ldrb.w	r3, [sp, #7]
     ce8:	3b02      	subs	r3, #2
     cea:	2b02      	cmp	r3, #2
     cec:	d80b      	bhi.n	d06 <context_boot_go+0x11e>
        rc = swap_set_copy_done(BOOT_CURR_IMG(state));
     cee:	2000      	movs	r0, #0
     cf0:	f004 ffa3 	bl	5c3a <swap_set_copy_done>
        if (rc != 0) {
     cf4:	b138      	cbz	r0, d06 <context_boot_go+0x11e>
            BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC;
     cf6:	23ff      	movs	r3, #255	; 0xff
     cf8:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
        BOOT_LOG_ERR("panic!");
     cfc:	2145      	movs	r1, #69	; 0x45
     cfe:	4850      	ldr	r0, [pc, #320]	; (e40 <FIH_LABEL_FIH_CALL_END_2283+0x54>)
     d00:	f005 f8db 	bl	5eba <z_log_minimal_printk>
        while (1) {}
     d04:	e7fe      	b.n	d04 <context_boot_go+0x11c>
    if (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_PANIC) {
     d06:	f894 3058 	ldrb.w	r3, [r4, #88]	; 0x58
     d0a:	2bff      	cmp	r3, #255	; 0xff
     d0c:	d0f6      	beq.n	cfc <context_boot_go+0x114>
            rc = boot_read_image_headers(state, false, bs);
     d0e:	466a      	mov	r2, sp
     d10:	2100      	movs	r1, #0
     d12:	4620      	mov	r0, r4
     d14:	f004 fe3d 	bl	5992 <boot_read_image_headers>
            BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE;
     d18:	e792      	b.n	c40 <context_boot_go+0x58>
            if (bs->swap_type == BOOT_SWAP_TYPE_NONE) {
     d1a:	f89d 8007 	ldrb.w	r8, [sp, #7]
     d1e:	f1b8 0f01 	cmp.w	r8, #1
     d22:	d115      	bne.n	d50 <FIH_LABEL_FIH_CALL_START_2017>
    swap_type = boot_swap_type_multi(BOOT_CURR_IMG(state));
     d24:	4610      	mov	r0, r2
     d26:	f003 f96b 	bl	4000 <boot_swap_type_multi>
    if (BOOT_IS_UPGRADE(swap_type)) {
     d2a:	1e83      	subs	r3, r0, #2
     d2c:	2b02      	cmp	r3, #2
    swap_type = boot_swap_type_multi(BOOT_CURR_IMG(state));
     d2e:	4607      	mov	r7, r0
    if (BOOT_IS_UPGRADE(swap_type)) {
     d30:	d80b      	bhi.n	d4a <FIH_LABEL_FIH_CALL_END_1981+0x10>

00000d32 <FIH_LABEL_FIH_CALL_START_1966>:
        FIH_CALL(boot_validate_slot, fih_rc, state, BOOT_SECONDARY_SLOT, bs);
     d32:	4641      	mov	r1, r8
     d34:	4620      	mov	r0, r4
     d36:	f7ff fe5b 	bl	9f0 <boot_validate_slot.isra.0>

00000d3a <FIH_LABEL_FIH_CALL_END_1981>:
        if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
     d3a:	4b42      	ldr	r3, [pc, #264]	; (e44 <FIH_LABEL_FIH_CALL_END_2283+0x58>)
     d3c:	681b      	ldr	r3, [r3, #0]
     d3e:	4298      	cmp	r0, r3
     d40:	d003      	beq.n	d4a <FIH_LABEL_FIH_CALL_END_1981+0x10>
                swap_type = BOOT_SWAP_TYPE_NONE;
     d42:	2801      	cmp	r0, #1
     d44:	bf14      	ite	ne
     d46:	2705      	movne	r7, #5
     d48:	2701      	moveq	r7, #1
                BOOT_SWAP_TYPE(state) = boot_validated_swap_type(state, bs);
     d4a:	f884 7058 	strb.w	r7, [r4, #88]	; 0x58
     d4e:	e784      	b.n	c5a <context_boot_go+0x72>

00000d50 <FIH_LABEL_FIH_CALL_START_2017>:
                FIH_CALL(boot_validate_slot, fih_rc,
     d50:	2101      	movs	r1, #1
     d52:	4620      	mov	r0, r4
     d54:	f7ff fe4c 	bl	9f0 <boot_validate_slot.isra.0>

00000d58 <FIH_LABEL_FIH_CALL_END_2032>:
                if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
     d58:	4b3a      	ldr	r3, [pc, #232]	; (e44 <FIH_LABEL_FIH_CALL_END_2283+0x58>)
     d5a:	681b      	ldr	r3, [r3, #0]
     d5c:	4298      	cmp	r0, r3
                    BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_FAIL;
     d5e:	bf14      	ite	ne
     d60:	2305      	movne	r3, #5
                    BOOT_SWAP_TYPE(state) = bs->swap_type;
     d62:	f89d 3007 	ldrbeq.w	r3, [sp, #7]
        BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE;
     d66:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
     d6a:	e776      	b.n	c5a <context_boot_go+0x72>
        switch (BOOT_SWAP_TYPE(state)) {
     d6c:	2b05      	cmp	r3, #5
     d6e:	d180      	bne.n	c72 <context_boot_go+0x8a>
            rc = swap_set_image_ok(BOOT_CURR_IMG(state));
     d70:	2000      	movs	r0, #0
     d72:	f004 ff74 	bl	5c5e <swap_set_image_ok>
     d76:	e013      	b.n	da0 <FIH_LABEL_FIH_CALL_END_2032+0x48>
        rc = boot_swap_image(state, bs);
     d78:	4669      	mov	r1, sp
     d7a:	4620      	mov	r0, r4
     d7c:	f7ff feb4 	bl	ae8 <boot_swap_image>
    swap_type = BOOT_SWAP_TYPE(state);
     d80:	f894 3058 	ldrb.w	r3, [r4, #88]	; 0x58
        rc = boot_swap_image(state, bs);
     d84:	4605      	mov	r5, r0
    if (swap_type == BOOT_SWAP_TYPE_REVERT ||
     d86:	1eda      	subs	r2, r3, #3
     d88:	2a01      	cmp	r2, #1
     d8a:	d80c      	bhi.n	da6 <FIH_LABEL_FIH_CALL_END_2032+0x4e>
        rc = swap_set_image_ok(BOOT_CURR_IMG(state));
     d8c:	2000      	movs	r0, #0
     d8e:	f004 ff66 	bl	5c5e <swap_set_image_ok>
        if (rc != 0) {
     d92:	4605      	mov	r5, r0
     d94:	2800      	cmp	r0, #0
     d96:	f47f af6c 	bne.w	c72 <context_boot_go+0x8a>
        rc = swap_set_copy_done(BOOT_CURR_IMG(state));
     d9a:	2000      	movs	r0, #0
     d9c:	f004 ff4d 	bl	5c3a <swap_set_copy_done>
            if (rc != 0) {
     da0:	4605      	mov	r5, r0
     da2:	b110      	cbz	r0, daa <FIH_LABEL_FIH_CALL_END_2032+0x52>
     da4:	e765      	b.n	c72 <context_boot_go+0x8a>
    if (BOOT_IS_UPGRADE(swap_type)) {
     da6:	2b02      	cmp	r3, #2
     da8:	d0f7      	beq.n	d9a <FIH_LABEL_FIH_CALL_END_2032+0x42>
        }

        if (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_PANIC) {
     daa:	f894 3058 	ldrb.w	r3, [r4, #88]	; 0x58
     dae:	2bff      	cmp	r3, #255	; 0xff
     db0:	d104      	bne.n	dbc <FIH_LABEL_FIH_CALL_END_2032+0x64>
            BOOT_LOG_ERR("panic!");
     db2:	2145      	movs	r1, #69	; 0x45
     db4:	4822      	ldr	r0, [pc, #136]	; (e40 <FIH_LABEL_FIH_CALL_END_2283+0x54>)
     db6:	f005 f880 	bl	5eba <z_log_minimal_printk>
            assert(0);

            /* Loop forever... */
            FIH_PANIC;
     dba:	e7fe      	b.n	dba <FIH_LABEL_FIH_CALL_END_2032+0x62>
#if BOOT_IMAGE_NUMBER > 1
        if (state->img_mask[BOOT_CURR_IMG(state)]) {
            continue;
        }
#endif
        if (BOOT_SWAP_TYPE(state) != BOOT_SWAP_TYPE_NONE) {
     dbc:	2b01      	cmp	r3, #1
     dbe:	d010      	beq.n	de2 <FIH_LABEL_FIH_CALL_START_2268>
            /* Attempt to read an image header from each slot. Ensure that image
             * headers in slots are aligned with headers in boot_data.
             */
            rc = boot_read_image_headers(state, false, &bs);
     dc0:	466a      	mov	r2, sp
     dc2:	2100      	movs	r1, #0
     dc4:	4620      	mov	r0, r4
     dc6:	f004 fde4 	bl	5992 <boot_read_image_headers>
            if (rc != 0) {
     dca:	4605      	mov	r5, r0
     dcc:	b148      	cbz	r0, de2 <FIH_LABEL_FIH_CALL_START_2268>
            flash_area_close(BOOT_IMG_AREA(state, BOOT_NUM_SLOTS - 1 - slot));
     dce:	6ce0      	ldr	r0, [r4, #76]	; 0x4c
     dd0:	f005 f880 	bl	5ed4 <flash_area_close>
     dd4:	6a20      	ldr	r0, [r4, #32]
     dd6:	f005 f87d 	bl	5ed4 <flash_area_close>
    if (rc) {
        fih_rc = fih_int_encode(rc);
    }

    FIH_RET(fih_rc);
}
     dda:	4628      	mov	r0, r5
     ddc:	b004      	add	sp, #16
     dde:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

00000de2 <FIH_LABEL_FIH_CALL_START_2268>:
            FIH_CALL(boot_validate_slot, fih_rc, state, BOOT_PRIMARY_SLOT, NULL);
     de2:	2100      	movs	r1, #0
     de4:	4620      	mov	r0, r4
     de6:	f7ff fe03 	bl	9f0 <boot_validate_slot.isra.0>
     dea:	4607      	mov	r7, r0

00000dec <FIH_LABEL_FIH_CALL_END_2283>:
            if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
     dec:	f8df 8054 	ldr.w	r8, [pc, #84]	; e44 <FIH_LABEL_FIH_CALL_END_2283+0x58>
     df0:	f8d8 3000 	ldr.w	r3, [r8]
     df4:	4298      	cmp	r0, r3
     df6:	d10f      	bne.n	e18 <FIH_LABEL_FIH_CALL_END_2283+0x2c>
    memset(&bs, 0, sizeof(struct boot_status));
     df8:	2210      	movs	r2, #16
     dfa:	2100      	movs	r1, #0
     dfc:	4668      	mov	r0, sp
     dfe:	f005 fbd6 	bl	65ae <memset>
    rsp->br_flash_dev_id = flash_area_get_device_id(BOOT_IMG_AREA(state, active_slot));
     e02:	6a20      	ldr	r0, [r4, #32]
     e04:	f004 fcf3 	bl	57ee <flash_area_get_device_id>
     e08:	7130      	strb	r0, [r6, #4]
	return (uint32_t)fa->fa_off;
     e0a:	6a23      	ldr	r3, [r4, #32]
    rsp->br_image_off = boot_img_slot_off(state, active_slot);
     e0c:	685b      	ldr	r3, [r3, #4]
    rsp->br_hdr = boot_img_hdr(state, active_slot);
     e0e:	6034      	str	r4, [r6, #0]
    fih_rc = FIH_SUCCESS;
     e10:	f8d8 5000 	ldr.w	r5, [r8]
    rsp->br_image_off = boot_img_slot_off(state, active_slot);
     e14:	60b3      	str	r3, [r6, #8]
    fih_rc = FIH_SUCCESS;
     e16:	e7da      	b.n	dce <FIH_LABEL_FIH_CALL_END_2032+0x76>
            flash_area_close(BOOT_IMG_AREA(state, BOOT_NUM_SLOTS - 1 - slot));
     e18:	6ce0      	ldr	r0, [r4, #76]	; 0x4c
     e1a:	f005 f85b 	bl	5ed4 <flash_area_close>
     e1e:	6a20      	ldr	r0, [r4, #32]
     e20:	f005 f858 	bl	5ed4 <flash_area_close>
    if (rc) {
     e24:	2d00      	cmp	r5, #0
     e26:	bf08      	it	eq
     e28:	463d      	moveq	r5, r7
     e2a:	e7d6      	b.n	dda <FIH_LABEL_FIH_CALL_END_2032+0x82>
     e2c:	2000cef4 	.word	0x2000cef4
     e30:	2000c6f4 	.word	0x2000c6f4
     e34:	00008faf 	.word	0x00008faf
     e38:	00008f6d 	.word	0x00008f6d
     e3c:	00008fdb 	.word	0x00008fdb
     e40:	00009005 	.word	0x00009005
     e44:	2000c6f0 	.word	0x2000c6f0

00000e48 <boot_go>:
 *
 * @return                      FIH_SUCCESS on success; nonzero on failure.
 */
fih_int
boot_go(struct boot_rsp *rsp)
{
     e48:	b538      	push	{r3, r4, r5, lr}
void boot_state_clear(struct boot_loader_state *state)
{
    if (state != NULL) {
        memset(state, 0, sizeof(struct boot_loader_state));
    } else {
        memset(&boot_data, 0, sizeof(struct boot_loader_state));
     e4a:	4d06      	ldr	r5, [pc, #24]	; (e64 <FIH_LABEL_FIH_CALL_END_2906+0x4>)
{
     e4c:	4604      	mov	r4, r0
        memset(&boot_data, 0, sizeof(struct boot_loader_state));
     e4e:	2260      	movs	r2, #96	; 0x60
     e50:	2100      	movs	r1, #0
     e52:	4628      	mov	r0, r5
     e54:	f005 fbab 	bl	65ae <memset>

00000e58 <FIH_LABEL_FIH_CALL_START_2892>:
    FIH_CALL(context_boot_go, fih_rc, &boot_data, rsp);
     e58:	4621      	mov	r1, r4
     e5a:	4628      	mov	r0, r5
     e5c:	f7ff fec4 	bl	be8 <context_boot_go>

00000e60 <FIH_LABEL_FIH_CALL_END_2906>:
}
     e60:	bd38      	pop	{r3, r4, r5, pc}
     e62:	bf00      	nop
     e64:	2000daf4 	.word	0x2000daf4

00000e68 <boot_read_image_header>:
static uint32_t g_last_idx = UINT32_MAX;

int
boot_read_image_header(struct boot_loader_state *state, int slot,
                       struct image_header *out_hdr, struct boot_status *bs)
{
     e68:	b573      	push	{r0, r1, r4, r5, r6, lr}
     e6a:	4616      	mov	r6, r2
#if (BOOT_IMAGE_NUMBER == 1)
    (void)state;
#endif

    off = 0;
    if (bs) {
     e6c:	461d      	mov	r5, r3
     e6e:	b143      	cbz	r3, e82 <boot_read_image_header+0x1a>
        sz = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, 0);
        if (bs->op == BOOT_STATUS_OP_MOVE) {
     e70:	795b      	ldrb	r3, [r3, #5]
     e72:	2b01      	cmp	r3, #1
     e74:	d107      	bne.n	e86 <boot_read_image_header+0x1e>
            if (slot == 0 && bs->idx > g_last_idx) {
     e76:	b921      	cbnz	r1, e82 <boot_read_image_header+0x1a>
     e78:	4b20      	ldr	r3, [pc, #128]	; (efc <boot_read_image_header+0x94>)
     e7a:	682a      	ldr	r2, [r5, #0]
     e7c:	681b      	ldr	r3, [r3, #0]
     e7e:	429a      	cmp	r2, r3
     e80:	d817      	bhi.n	eb2 <boot_read_image_header+0x4a>
    off = 0;
     e82:	2400      	movs	r4, #0
     e84:	e018      	b.n	eb8 <boot_read_image_header+0x50>
                /* second sector */
                off = sz;
            }
        } else if (bs->op == BOOT_STATUS_OP_SWAP) {
     e86:	2b02      	cmp	r3, #2
     e88:	d1fb      	bne.n	e82 <boot_read_image_header+0x1a>
            if (bs->idx > 1 && bs->idx <= g_last_idx) {
     e8a:	682b      	ldr	r3, [r5, #0]
     e8c:	2b01      	cmp	r3, #1
     e8e:	d907      	bls.n	ea0 <boot_read_image_header+0x38>
     e90:	4a1a      	ldr	r2, [pc, #104]	; (efc <boot_read_image_header+0x94>)
     e92:	6812      	ldr	r2, [r2, #0]
     e94:	4293      	cmp	r3, r2
     e96:	d8f4      	bhi.n	e82 <boot_read_image_header+0x1a>
                if (slot == 0) {
     e98:	fab1 f181 	clz	r1, r1
     e9c:	0949      	lsrs	r1, r1, #5
     e9e:	e7f0      	b.n	e82 <boot_read_image_header+0x1a>
                    slot = 1;
                } else {
                    slot = 0;
                }
            } else if (bs->idx == 1) {
     ea0:	d1ef      	bne.n	e82 <boot_read_image_header+0x1a>
                if (slot == 0) {
     ea2:	b131      	cbz	r1, eb2 <boot_read_image_header+0x4a>
                    off = sz;
                }
                if (slot == 1 && bs->state == 2) {
     ea4:	2901      	cmp	r1, #1
     ea6:	d1ec      	bne.n	e82 <boot_read_image_header+0x1a>
     ea8:	7929      	ldrb	r1, [r5, #4]
     eaa:	3902      	subs	r1, #2
     eac:	bf18      	it	ne
     eae:	2101      	movne	r1, #1
     eb0:	e7e7      	b.n	e82 <boot_read_image_header+0x1a>
}

static inline uint32_t flash_sector_get_size(const struct flash_sector *fs)
{
	return fs->fs_size;
     eb2:	2100      	movs	r1, #0
     eb4:	6a43      	ldr	r3, [r0, #36]	; 0x24
     eb6:	685c      	ldr	r4, [r3, #4]
                }
            }
        }
    }

    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
     eb8:	2000      	movs	r0, #0
     eba:	f004 fc8f 	bl	57dc <flash_area_id_from_multi_image_slot>
    rc = flash_area_open(area_id, &fap);
     ebe:	a901      	add	r1, sp, #4
     ec0:	b2c0      	uxtb	r0, r0
     ec2:	f000 ff73 	bl	1dac <flash_area_open>
    if (rc != 0) {
     ec6:	b130      	cbz	r0, ed6 <boot_read_image_header+0x6e>
        rc = BOOT_EFLASH;
     ec8:	2401      	movs	r4, #1
    }

    rc = 0;

done:
    flash_area_close(fap);
     eca:	9801      	ldr	r0, [sp, #4]
     ecc:	f005 f802 	bl	5ed4 <flash_area_close>
    return rc;
}
     ed0:	4620      	mov	r0, r4
     ed2:	b002      	add	sp, #8
     ed4:	bd70      	pop	{r4, r5, r6, pc}
    rc = flash_area_read(fap, off, out_hdr, sizeof *out_hdr);
     ed6:	4621      	mov	r1, r4
     ed8:	2320      	movs	r3, #32
     eda:	4632      	mov	r2, r6
     edc:	9801      	ldr	r0, [sp, #4]
     ede:	f004 fffa 	bl	5ed6 <flash_area_read>
    if (rc != 0) {
     ee2:	4604      	mov	r4, r0
     ee4:	2800      	cmp	r0, #0
     ee6:	d1ef      	bne.n	ec8 <boot_read_image_header+0x60>
    if (bs != NULL && out_hdr->ih_magic != IMAGE_MAGIC) {
     ee8:	2d00      	cmp	r5, #0
     eea:	d0ee      	beq.n	eca <boot_read_image_header+0x62>
     eec:	6834      	ldr	r4, [r6, #0]
     eee:	4b04      	ldr	r3, [pc, #16]	; (f00 <boot_read_image_header+0x98>)
     ef0:	1ae4      	subs	r4, r4, r3
     ef2:	bf18      	it	ne
     ef4:	f04f 34ff 	movne.w	r4, #4294967295
     ef8:	e7e7      	b.n	eca <boot_read_image_header+0x62>
     efa:	bf00      	nop
     efc:	2000c4ec 	.word	0x2000c4ec
     f00:	96f3b83d 	.word	0x96f3b83d

00000f04 <swap_read_status_bytes>:

int
swap_read_status_bytes(const struct flash_area *fap,
        struct boot_loader_state *state, struct boot_status *bs)
{
     f04:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
     f08:	4607      	mov	r7, r0
     f0a:	460c      	mov	r4, r1
     f0c:	b085      	sub	sp, #20
    int rc;
    int last_rc;
    int erased_sections;
    int i;

    max_entries = boot_status_entries(BOOT_CURR_IMG(state), fap);
     f0e:	4601      	mov	r1, r0
     f10:	2000      	movs	r0, #0
{
     f12:	4616      	mov	r6, r2
    max_entries = boot_status_entries(BOOT_CURR_IMG(state), fap);
     f14:	f004 fd0e 	bl	5934 <boot_status_entries>
    if (max_entries < 0) {
     f18:	1e05      	subs	r5, r0, #0
     f1a:	db51      	blt.n	fc0 <swap_read_status_bytes+0xbc>
    erased_sections = 0;
    found_idx = -1;
    /* skip erased sectors at the end */
    last_rc = 1;
    write_sz = BOOT_WRITE_SZ(state);
    off = boot_status_off(fap);
     f1c:	4638      	mov	r0, r7
    write_sz = BOOT_WRITE_SZ(state);
     f1e:	6de4      	ldr	r4, [r4, #92]	; 0x5c
    off = boot_status_off(fap);
     f20:	f004 fd15 	bl	594e <boot_status_off>
    for (i = max_entries; i > 0; i--) {
     f24:	fa5f f984 	uxtb.w	r9, r4
    erased_sections = 0;
     f28:	f04f 0a00 	mov.w	sl, #0
    last_rc = 1;
     f2c:	f04f 0b01 	mov.w	fp, #1
    found_idx = -1;
     f30:	f04f 34ff 	mov.w	r4, #4294967295
     f34:	1e6b      	subs	r3, r5, #1
     f36:	fb09 0803 	mla	r8, r9, r3, r0
    for (i = max_entries; i > 0; i--) {
     f3a:	b99d      	cbnz	r5, f64 <swap_read_status_bytes+0x60>
            }
        }
        last_rc = rc;
    }

    if (erased_sections > 1) {
     f3c:	f1ba 0f01 	cmp.w	sl, #1
     f40:	dd03      	ble.n	f4a <swap_read_status_bytes+0x46>
        /* This means there was an error writing status on the last
         * swap. Tell user and move on to validation!
         */
#if !defined(__BOOTSIM__)
        BOOT_LOG_ERR("Detected inconsistent status!");
     f42:	2145      	movs	r1, #69	; 0x45
     f44:	4820      	ldr	r0, [pc, #128]	; (fc8 <swap_read_status_bytes+0xc4>)
     f46:	f004 ffb8 	bl	5eba <z_log_minimal_printk>
        assert(0);
#endif
    }

    move_entries = BOOT_MAX_IMG_SECTORS * BOOT_STATUS_MOVE_STATE_COUNT;
    if (found_idx == -1) {
     f4a:	1c63      	adds	r3, r4, #1
     f4c:	d006      	beq.n	f5c <swap_read_status_bytes+0x58>
        /* no swap status found; nothing to do */
    } else if (found_idx < move_entries) {
     f4e:	2cff      	cmp	r4, #255	; 0xff
     f50:	dc2a      	bgt.n	fa8 <swap_read_status_bytes+0xa4>
        bs->op = BOOT_STATUS_OP_MOVE;
        bs->idx = (found_idx  / BOOT_STATUS_MOVE_STATE_COUNT) + BOOT_STATUS_IDX_0;
        bs->state = (found_idx % BOOT_STATUS_MOVE_STATE_COUNT) + BOOT_STATUS_STATE_0;;
     f52:	f240 1301 	movw	r3, #257	; 0x101
        bs->idx = (found_idx  / BOOT_STATUS_MOVE_STATE_COUNT) + BOOT_STATUS_IDX_0;
     f56:	3401      	adds	r4, #1
     f58:	6034      	str	r4, [r6, #0]
        bs->state = (found_idx % BOOT_STATUS_MOVE_STATE_COUNT) + BOOT_STATUS_STATE_0;;
     f5a:	80b3      	strh	r3, [r6, #4]
        bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0;
        bs->state = ((found_idx - move_entries) % BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_STATE_0;
    }

    return 0;
}
     f5c:	4628      	mov	r0, r5
     f5e:	b005      	add	sp, #20
     f60:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
        rc = flash_area_read(fap, off + (i - 1) * write_sz, &status, 1);
     f64:	1e6b      	subs	r3, r5, #1
     f66:	9300      	str	r3, [sp, #0]
     f68:	4641      	mov	r1, r8
     f6a:	2301      	movs	r3, #1
     f6c:	4638      	mov	r0, r7
     f6e:	f10d 020f 	add.w	r2, sp, #15
     f72:	f004 ffb0 	bl	5ed6 <flash_area_read>
        if (rc < 0) {
     f76:	1e03      	subs	r3, r0, #0
     f78:	9301      	str	r3, [sp, #4]
     f7a:	db23      	blt.n	fc4 <swap_read_status_bytes+0xc0>
        if (bootutil_buffer_is_erased(fap, &status, 1)) {
     f7c:	2201      	movs	r2, #1
     f7e:	4638      	mov	r0, r7
     f80:	f10d 010f 	add.w	r1, sp, #15
     f84:	f005 fe41 	bl	6c0a <bootutil_buffer_is_erased>
     f88:	9b01      	ldr	r3, [sp, #4]
     f8a:	b140      	cbz	r0, f9e <swap_read_status_bytes+0x9a>
            if (rc != last_rc) {
     f8c:	455b      	cmp	r3, fp
     f8e:	d001      	beq.n	f94 <swap_read_status_bytes+0x90>
                erased_sections++;
     f90:	f10a 0a01 	add.w	sl, sl, #1
            if (found_idx == -1) {
     f94:	469b      	mov	fp, r3
     f96:	9d00      	ldr	r5, [sp, #0]
     f98:	eba8 0809 	sub.w	r8, r8, r9
     f9c:	e7cd      	b.n	f3a <swap_read_status_bytes+0x36>
     f9e:	f1b4 3fff 	cmp.w	r4, #4294967295
     fa2:	bf08      	it	eq
     fa4:	462c      	moveq	r4, r5
     fa6:	e7f5      	b.n	f94 <swap_read_status_bytes+0x90>
        bs->op = BOOT_STATUS_OP_SWAP;
     fa8:	2302      	movs	r3, #2
        bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0;
     faa:	f5a4 7480 	sub.w	r4, r4, #256	; 0x100
        bs->op = BOOT_STATUS_OP_SWAP;
     fae:	7173      	strb	r3, [r6, #5]
        bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0;
     fb0:	1063      	asrs	r3, r4, #1
        bs->state = ((found_idx - move_entries) % BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_STATE_0;
     fb2:	f004 0401 	and.w	r4, r4, #1
        bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0;
     fb6:	3301      	adds	r3, #1
        bs->state = ((found_idx - move_entries) % BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_STATE_0;
     fb8:	3401      	adds	r4, #1
        bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0;
     fba:	6033      	str	r3, [r6, #0]
        bs->state = ((found_idx - move_entries) % BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_STATE_0;
     fbc:	7134      	strb	r4, [r6, #4]
     fbe:	e7cd      	b.n	f5c <swap_read_status_bytes+0x58>
        return BOOT_EBADARGS;
     fc0:	2507      	movs	r5, #7
     fc2:	e7cb      	b.n	f5c <swap_read_status_bytes+0x58>
            return BOOT_EFLASH;
     fc4:	2501      	movs	r5, #1
     fc6:	e7c9      	b.n	f5c <swap_read_status_bytes+0x58>
     fc8:	00009011 	.word	0x00009011

00000fcc <boot_slots_compatible>:
    return off;
}

int
boot_slots_compatible(struct boot_loader_state *state)
{
     fcc:	b538      	push	{r3, r4, r5, lr}
}

static inline size_t
boot_img_num_sectors(const struct boot_loader_state *state, size_t slot)
{
    return BOOT_IMG(state, slot).num_sectors;
     fce:	6a81      	ldr	r1, [r0, #40]	; 0x28
     fd0:	6d42      	ldr	r2, [r0, #84]	; 0x54
    size_t sector_sz_sec = 0;
    size_t i;

    num_sectors_pri = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT);
    num_sectors_sec = boot_img_num_sectors(state, BOOT_SECONDARY_SLOT);
    if ((num_sectors_pri != num_sectors_sec) &&
     fd2:	4291      	cmp	r1, r2
     fd4:	d008      	beq.n	fe8 <boot_slots_compatible+0x1c>
            (num_sectors_pri != (num_sectors_sec + 1))) {
     fd6:	1c53      	adds	r3, r2, #1
    if ((num_sectors_pri != num_sectors_sec) &&
     fd8:	428b      	cmp	r3, r1
     fda:	d005      	beq.n	fe8 <boot_slots_compatible+0x1c>
        BOOT_LOG_WRN("Cannot upgrade: not a compatible amount of sectors");
     fdc:	2157      	movs	r1, #87	; 0x57
     fde:	4814      	ldr	r0, [pc, #80]	; (1030 <CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE+0x30>)
        return 0;
    }

    if (num_sectors_pri > BOOT_MAX_IMG_SECTORS) {
        BOOT_LOG_WRN("Cannot upgrade: more sectors than allowed");
     fe0:	f004 ff6b 	bl	5eba <z_log_minimal_printk>
        return 0;
     fe4:	2000      	movs	r0, #0
        }
    }

    return 1;
#endif /* PM_S1_ADDRESS */
}
     fe6:	bd38      	pop	{r3, r4, r5, pc}
    if (num_sectors_pri > BOOT_MAX_IMG_SECTORS) {
     fe8:	f5b1 7f80 	cmp.w	r1, #256	; 0x100
     fec:	d91c      	bls.n	1028 <CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE+0x28>
        BOOT_LOG_WRN("Cannot upgrade: more sectors than allowed");
     fee:	2157      	movs	r1, #87	; 0x57
     ff0:	4810      	ldr	r0, [pc, #64]	; (1034 <CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE+0x34>)
     ff2:	e7f5      	b.n	fe0 <boot_slots_compatible+0x14>
     ff4:	6a44      	ldr	r4, [r0, #36]	; 0x24
     ff6:	6d05      	ldr	r5, [r0, #80]	; 0x50
     ff8:	eb04 04c3 	add.w	r4, r4, r3, lsl #3
     ffc:	eb05 05c3 	add.w	r5, r5, r3, lsl #3
    1000:	6864      	ldr	r4, [r4, #4]
        if (sector_sz_pri != sector_sz_sec) {
    1002:	686d      	ldr	r5, [r5, #4]
    1004:	42ac      	cmp	r4, r5
    1006:	d002      	beq.n	100e <CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE+0xe>
            BOOT_LOG_WRN("Cannot upgrade: not same sector layout");
    1008:	2157      	movs	r1, #87	; 0x57
    100a:	480b      	ldr	r0, [pc, #44]	; (1038 <CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE+0x38>)
    100c:	e7e8      	b.n	fe0 <boot_slots_compatible+0x14>
    for (i = 0; i < num_sectors_sec; i++) {
    100e:	3301      	adds	r3, #1
    1010:	429a      	cmp	r2, r3
    1012:	d1ef      	bne.n	ff4 <boot_slots_compatible+0x28>
    if (num_sectors_pri > num_sectors_sec) {
    1014:	4291      	cmp	r1, r2
    1016:	d905      	bls.n	1024 <CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE+0x24>
    1018:	6a43      	ldr	r3, [r0, #36]	; 0x24
    101a:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
        if (sector_sz_pri != boot_img_sector_size(state, BOOT_PRIMARY_SLOT, i)) {
    101e:	685b      	ldr	r3, [r3, #4]
    1020:	42a3      	cmp	r3, r4
    1022:	d1f1      	bne.n	1008 <CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE+0x8>
    return 1;
    1024:	2001      	movs	r0, #1
    1026:	e7de      	b.n	fe6 <boot_slots_compatible+0x1a>
    for (i = 0; i < num_sectors_sec; i++) {
    1028:	2300      	movs	r3, #0
    size_t sector_sz_pri = 0;
    102a:	461c      	mov	r4, r3
    102c:	e7f0      	b.n	1010 <CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE+0x10>
    102e:	bf00      	nop
    1030:	00009034 	.word	0x00009034
    1034:	0000906c 	.word	0x0000906c
    1038:	0000909b 	.word	0x0000909b

0000103c <swap_status_source>:
                 (state)->copy_done,                                \
                 (state)->image_ok)

int
swap_status_source(struct boot_loader_state *state)
{
    103c:	b500      	push	{lr}
    103e:	b089      	sub	sp, #36	; 0x24
    (void)state;
#endif

    image_index = BOOT_CURR_IMG(state);

    rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_PRIMARY(image_index),
    1040:	2002      	movs	r0, #2
    1042:	a904      	add	r1, sp, #16
    1044:	f005 fe53 	bl	6cee <boot_read_swap_state_by_id>
            &state_primary_slot);
    assert(rc == 0);

    BOOT_LOG_SWAP_STATE("Primary image", &state_primary_slot);
    1048:	f89d 2010 	ldrb.w	r2, [sp, #16]
    104c:	2a01      	cmp	r2, #1
    104e:	d041      	beq.n	10d4 <swap_status_source+0x98>
    1050:	4b25      	ldr	r3, [pc, #148]	; (10e8 <swap_status_source+0xac>)
    1052:	4926      	ldr	r1, [pc, #152]	; (10ec <swap_status_source+0xb0>)
    1054:	2a03      	cmp	r2, #3
    1056:	bf08      	it	eq
    1058:	460b      	moveq	r3, r1
    105a:	f89d 2013 	ldrb.w	r2, [sp, #19]
    105e:	2149      	movs	r1, #73	; 0x49
    1060:	9202      	str	r2, [sp, #8]
    1062:	f89d 2012 	ldrb.w	r2, [sp, #18]
    1066:	4822      	ldr	r0, [pc, #136]	; (10f0 <swap_status_source+0xb4>)
    1068:	9201      	str	r2, [sp, #4]
    106a:	f89d 2011 	ldrb.w	r2, [sp, #17]
    106e:	9200      	str	r2, [sp, #0]
    1070:	4a20      	ldr	r2, [pc, #128]	; (10f4 <swap_status_source+0xb8>)
    1072:	f004 ff22 	bl	5eba <z_log_minimal_printk>

    rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_SECONDARY(image_index),
    1076:	2008      	movs	r0, #8
    1078:	a906      	add	r1, sp, #24
    107a:	f005 fe38 	bl	6cee <boot_read_swap_state_by_id>
            &state_secondary_slot);
    assert(rc == 0);

    BOOT_LOG_SWAP_STATE("Secondary image", &state_secondary_slot);
    107e:	f89d 2018 	ldrb.w	r2, [sp, #24]
    1082:	2a01      	cmp	r2, #1
    1084:	d028      	beq.n	10d8 <swap_status_source+0x9c>
    1086:	4b18      	ldr	r3, [pc, #96]	; (10e8 <swap_status_source+0xac>)
    1088:	4918      	ldr	r1, [pc, #96]	; (10ec <swap_status_source+0xb0>)
    108a:	2a03      	cmp	r2, #3
    108c:	bf08      	it	eq
    108e:	460b      	moveq	r3, r1
    1090:	f89d 201b 	ldrb.w	r2, [sp, #27]
    1094:	2149      	movs	r1, #73	; 0x49
    1096:	9202      	str	r2, [sp, #8]
    1098:	f89d 201a 	ldrb.w	r2, [sp, #26]
    109c:	4814      	ldr	r0, [pc, #80]	; (10f0 <swap_status_source+0xb4>)
    109e:	9201      	str	r2, [sp, #4]
    10a0:	f89d 2019 	ldrb.w	r2, [sp, #25]
    10a4:	9200      	str	r2, [sp, #0]
    10a6:	4a14      	ldr	r2, [pc, #80]	; (10f8 <swap_status_source+0xbc>)
    10a8:	f004 ff07 	bl	5eba <z_log_minimal_printk>

    if (state_primary_slot.magic == BOOT_MAGIC_GOOD &&
    10ac:	f89d 3010 	ldrb.w	r3, [sp, #16]
    10b0:	2b01      	cmp	r3, #1
    10b2:	d113      	bne.n	10dc <swap_status_source+0xa0>
    10b4:	f89d 3012 	ldrb.w	r3, [sp, #18]
    10b8:	2b03      	cmp	r3, #3
    10ba:	d10f      	bne.n	10dc <swap_status_source+0xa0>
            state_primary_slot.copy_done == BOOT_FLAG_UNSET &&
    10bc:	f89d 3018 	ldrb.w	r3, [sp, #24]
    10c0:	2b01      	cmp	r3, #1
    10c2:	d00b      	beq.n	10dc <swap_status_source+0xa0>
            state_secondary_slot.magic != BOOT_MAGIC_GOOD) {

        source = BOOT_STATUS_SOURCE_PRIMARY_SLOT;

        BOOT_LOG_INF("Boot source: primary slot");
    10c4:	480d      	ldr	r0, [pc, #52]	; (10fc <swap_status_source+0xc0>)
    10c6:	2149      	movs	r1, #73	; 0x49
    10c8:	f004 fef7 	bl	5eba <z_log_minimal_printk>
        return source;
    10cc:	2002      	movs	r0, #2
    }

    BOOT_LOG_INF("Boot source: none");
    return BOOT_STATUS_SOURCE_NONE;
}
    10ce:	b009      	add	sp, #36	; 0x24
    10d0:	f85d fb04 	ldr.w	pc, [sp], #4
    BOOT_LOG_SWAP_STATE("Primary image", &state_primary_slot);
    10d4:	4b0a      	ldr	r3, [pc, #40]	; (1100 <swap_status_source+0xc4>)
    10d6:	e7c0      	b.n	105a <swap_status_source+0x1e>
    BOOT_LOG_SWAP_STATE("Secondary image", &state_secondary_slot);
    10d8:	4b09      	ldr	r3, [pc, #36]	; (1100 <swap_status_source+0xc4>)
    10da:	e7d9      	b.n	1090 <swap_status_source+0x54>
    BOOT_LOG_INF("Boot source: none");
    10dc:	4809      	ldr	r0, [pc, #36]	; (1104 <swap_status_source+0xc8>)
    10de:	2149      	movs	r1, #73	; 0x49
    10e0:	f004 feeb 	bl	5eba <z_log_minimal_printk>
    return BOOT_STATUS_SOURCE_NONE;
    10e4:	2000      	movs	r0, #0
    10e6:	e7f2      	b.n	10ce <swap_status_source+0x92>
    10e8:	000090c7 	.word	0x000090c7
    10ec:	000090d0 	.word	0x000090d0
    10f0:	000090e4 	.word	0x000090e4
    10f4:	000090d6 	.word	0x000090d6
    10f8:	00009125 	.word	0x00009125
    10fc:	00009135 	.word	0x00009135
    1100:	000090cb 	.word	0x000090cb
    1104:	00009154 	.word	0x00009154

00001108 <fixup_revert>:
 * upgrade (by initializing the secondary slot).
 */
void
fixup_revert(const struct boot_loader_state *state, struct boot_status *bs,
        const struct flash_area *fap_sec)
{
    1108:	b570      	push	{r4, r5, r6, lr}
#if (BOOT_IMAGE_NUMBER == 1)
    (void)state;
#endif

    /* No fixup required */
    if (bs->swap_type != BOOT_SWAP_TYPE_REVERT ||
    110a:	684b      	ldr	r3, [r1, #4]
{
    110c:	4614      	mov	r4, r2
    if (bs->swap_type != BOOT_SWAP_TYPE_REVERT ||
    110e:	4a1e      	ldr	r2, [pc, #120]	; (1188 <fixup_revert+0x80>)
    1110:	f003 23ff 	and.w	r3, r3, #4278255360	; 0xff00ff00
    1114:	4293      	cmp	r3, r2
{
    1116:	4606      	mov	r6, r0
    1118:	460d      	mov	r5, r1
    111a:	b086      	sub	sp, #24
    if (bs->swap_type != BOOT_SWAP_TYPE_REVERT ||
    111c:	d12f      	bne.n	117e <fixup_revert+0x76>
        bs->op != BOOT_STATUS_OP_MOVE ||
    111e:	680b      	ldr	r3, [r1, #0]
    1120:	2b01      	cmp	r3, #1
    1122:	d12c      	bne.n	117e <fixup_revert+0x76>
        bs->idx != BOOT_STATUS_IDX_0) {
        return;
    }

    rc = boot_read_swap_state(fap_sec, &swap_state);
    1124:	4620      	mov	r0, r4
    1126:	a904      	add	r1, sp, #16
    1128:	f002 ff14 	bl	3f54 <boot_read_swap_state>
    assert(rc == 0);

    BOOT_LOG_SWAP_STATE("Secondary image", &swap_state);
    112c:	f89d 2010 	ldrb.w	r2, [sp, #16]
    1130:	2a01      	cmp	r2, #1
    1132:	d026      	beq.n	1182 <fixup_revert+0x7a>
    1134:	4b15      	ldr	r3, [pc, #84]	; (118c <fixup_revert+0x84>)
    1136:	4916      	ldr	r1, [pc, #88]	; (1190 <fixup_revert+0x88>)
    1138:	2a03      	cmp	r2, #3
    113a:	bf08      	it	eq
    113c:	460b      	moveq	r3, r1
    113e:	f89d 2013 	ldrb.w	r2, [sp, #19]
    1142:	2149      	movs	r1, #73	; 0x49
    1144:	9202      	str	r2, [sp, #8]
    1146:	f89d 2012 	ldrb.w	r2, [sp, #18]
    114a:	4812      	ldr	r0, [pc, #72]	; (1194 <fixup_revert+0x8c>)
    114c:	9201      	str	r2, [sp, #4]
    114e:	f89d 2011 	ldrb.w	r2, [sp, #17]
    1152:	9200      	str	r2, [sp, #0]
    1154:	4a10      	ldr	r2, [pc, #64]	; (1198 <fixup_revert+0x90>)
    1156:	f004 feb0 	bl	5eba <z_log_minimal_printk>

    if (swap_state.magic == BOOT_MAGIC_UNSET) {
    115a:	f89d 3010 	ldrb.w	r3, [sp, #16]
    115e:	2b03      	cmp	r3, #3
    1160:	d10d      	bne.n	117e <fixup_revert+0x76>
        rc = swap_erase_trailer_sectors(state, fap_sec);
    1162:	4621      	mov	r1, r4
    1164:	4630      	mov	r0, r6
    1166:	f004 fcd7 	bl	5b18 <swap_erase_trailer_sectors>
        assert(rc == 0);

        rc = boot_write_image_ok(fap_sec);
    116a:	4620      	mov	r0, r4
    116c:	f005 fdb2 	bl	6cd4 <boot_write_image_ok>
        assert(rc == 0);

        rc = boot_write_swap_size(fap_sec, bs->swap_size);
    1170:	4620      	mov	r0, r4
    1172:	68a9      	ldr	r1, [r5, #8]
    1174:	f004 fbfe 	bl	5974 <boot_write_swap_size>
        assert(rc == 0);

        rc = boot_write_magic(fap_sec);
    1178:	4620      	mov	r0, r4
    117a:	f002 fecb 	bl	3f14 <boot_write_magic>
        assert(rc == 0);
    }
}
    117e:	b006      	add	sp, #24
    1180:	bd70      	pop	{r4, r5, r6, pc}
    BOOT_LOG_SWAP_STATE("Secondary image", &swap_state);
    1182:	4b06      	ldr	r3, [pc, #24]	; (119c <fixup_revert+0x94>)
    1184:	e7db      	b.n	113e <fixup_revert+0x36>
    1186:	bf00      	nop
    1188:	04000100 	.word	0x04000100
    118c:	000090c7 	.word	0x000090c7
    1190:	000090d0 	.word	0x000090d0
    1194:	000090e4 	.word	0x000090e4
    1198:	00009125 	.word	0x00009125
    119c:	000090cb 	.word	0x000090cb

000011a0 <swap_run>:

void
swap_run(struct boot_loader_state *state, struct boot_status *bs,
         uint32_t copy_size)
{
    11a0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    11a4:	4605      	mov	r5, r0
    11a6:	460c      	mov	r4, r1
    uint8_t image_index;
    const struct flash_area *fap_pri;
    const struct flash_area *fap_sec;
    int rc;

    BOOT_LOG_INF("Starting swap using move algorithm.");
    11a8:	487d      	ldr	r0, [pc, #500]	; (13a0 <swap_run+0x200>)
    11aa:	2149      	movs	r1, #73	; 0x49
{
    11ac:	b089      	sub	sp, #36	; 0x24
    11ae:	4617      	mov	r7, r2
    BOOT_LOG_INF("Starting swap using move algorithm.");
    11b0:	f004 fe83 	bl	5eba <z_log_minimal_printk>
    11b4:	6a6b      	ldr	r3, [r5, #36]	; 0x24
    11b6:	2201      	movs	r2, #1
    11b8:	685e      	ldr	r6, [r3, #4]

    sz = 0;
    11ba:	2300      	movs	r3, #0
    g_last_idx = 0;

    sector_sz = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, 0);
    while (1) {
        sz += sector_sz;
    11bc:	4433      	add	r3, r6
        /* Skip to next sector because all sectors will be moved up. */
        g_last_idx++;
        if (sz >= copy_size) {
    11be:	42bb      	cmp	r3, r7
    11c0:	4611      	mov	r1, r2
    11c2:	f102 0201 	add.w	r2, r2, #1
    11c6:	d3f9      	bcc.n	11bc <swap_run+0x1c>
    11c8:	4f76      	ldr	r7, [pc, #472]	; (13a4 <swap_run+0x204>)
    }

    /*
     * When starting a new swap upgrade, check that there is enough space.
     */
    if (boot_status_is_reset(bs)) {
    11ca:	4620      	mov	r0, r4
    11cc:	6039      	str	r1, [r7, #0]
    11ce:	f004 fc62 	bl	5a96 <boot_status_is_reset>
    11d2:	b308      	cbz	r0, 1218 <swap_run+0x78>
        sz = 0;
        trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state));
    11d4:	6de8      	ldr	r0, [r5, #92]	; 0x5c
    11d6:	f004 fba8 	bl	592a <boot_trailer_sz>
        first_trailer_idx = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT) - 1;
    11da:	6aab      	ldr	r3, [r5, #40]	; 0x28
    11dc:	f103 38ff 	add.w	r8, r3, #4294967295
        sz = 0;
    11e0:	2300      	movs	r3, #0

        while (1) {
            sz += sector_sz;
    11e2:	4433      	add	r3, r6
            if  (sz >= trailer_sz) {
    11e4:	4283      	cmp	r3, r0
    11e6:	d202      	bcs.n	11ee <swap_run+0x4e>
                break;
            }
            first_trailer_idx--;
    11e8:	f108 38ff 	add.w	r8, r8, #4294967295
            sz += sector_sz;
    11ec:	e7f9      	b.n	11e2 <swap_run+0x42>
        }

        if (g_last_idx >= first_trailer_idx) {
    11ee:	683b      	ldr	r3, [r7, #0]
    11f0:	4543      	cmp	r3, r8
    11f2:	d311      	bcc.n	1218 <swap_run+0x78>
            BOOT_LOG_WRN("Not enough free space to run swap upgrade");
    11f4:	2157      	movs	r1, #87	; 0x57
    11f6:	486c      	ldr	r0, [pc, #432]	; (13a8 <swap_run+0x208>)
    11f8:	f004 fe5f 	bl	5eba <z_log_minimal_printk>
            BOOT_LOG_WRN("required %d bytes but only %d are available",
    11fc:	683a      	ldr	r2, [r7, #0]
    11fe:	fb08 f306 	mul.w	r3, r8, r6
    1202:	2157      	movs	r1, #87	; 0x57
    1204:	fb02 6206 	mla	r2, r2, r6, r6
    1208:	4868      	ldr	r0, [pc, #416]	; (13ac <swap_run+0x20c>)
    120a:	f004 fe56 	bl	5eba <z_log_minimal_printk>
                         (g_last_idx + 1) * sector_sz ,
                         first_trailer_idx * sector_sz);
            bs->swap_type = BOOT_SWAP_TYPE_NONE;
    120e:	2301      	movs	r3, #1
    1210:	71e3      	strb	r3, [r4, #7]
        idx++;
    }

    flash_area_close(fap_pri);
    flash_area_close(fap_sec);
}
    1212:	b009      	add	sp, #36	; 0x24
    1214:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(image_index), &fap_pri);
    1218:	a906      	add	r1, sp, #24
    121a:	2002      	movs	r0, #2
    121c:	f000 fdc6 	bl	1dac <flash_area_open>
    rc = flash_area_open(FLASH_AREA_IMAGE_SECONDARY(image_index), &fap_sec);
    1220:	a907      	add	r1, sp, #28
    1222:	2008      	movs	r0, #8
    1224:	f000 fdc2 	bl	1dac <flash_area_open>
    fixup_revert(state, bs, fap_sec);
    1228:	4621      	mov	r1, r4
    122a:	4628      	mov	r0, r5
    122c:	9a07      	ldr	r2, [sp, #28]
    122e:	f7ff ff6b 	bl	1108 <fixup_revert>
    if (bs->op == BOOT_STATUS_OP_MOVE) {
    1232:	7963      	ldrb	r3, [r4, #5]
    1234:	2b01      	cmp	r3, #1
    1236:	d10b      	bne.n	1250 <swap_run+0xb0>
        idx = g_last_idx;
    1238:	f8d7 8000 	ldr.w	r8, [r7]
    BOOT_STATUS_ASSERT(rc == 0);
    123c:	f8df b170 	ldr.w	fp, [pc, #368]	; 13b0 <swap_run+0x210>
            if (idx <= (g_last_idx - bs->idx + 1)) {
    1240:	683b      	ldr	r3, [r7, #0]
                boot_move_sector_up(idx, sector_sz, state, bs, fap_pri, fap_sec);
    1242:	f8dd 9018 	ldr.w	r9, [sp, #24]
        while (idx > 0) {
    1246:	f1b8 0f00 	cmp.w	r8, #0
    124a:	d111      	bne.n	1270 <swap_run+0xd0>
        bs->idx = BOOT_STATUS_IDX_0;
    124c:	2301      	movs	r3, #1
    124e:	6023      	str	r3, [r4, #0]
    bs->op = BOOT_STATUS_OP_SWAP;
    1250:	2302      	movs	r3, #2
    idx = 1;
    1252:	f04f 0801 	mov.w	r8, #1
    bs->op = BOOT_STATUS_OP_SWAP;
    1256:	7163      	strb	r3, [r4, #5]
    while (idx <= g_last_idx) {
    1258:	683b      	ldr	r3, [r7, #0]
            boot_swap_sectors(idx, sector_sz, state, bs, fap_pri, fap_sec);
    125a:	f8dd a018 	ldr.w	sl, [sp, #24]
    while (idx <= g_last_idx) {
    125e:	4598      	cmp	r8, r3
    1260:	d949      	bls.n	12f6 <swap_run+0x156>
    flash_area_close(fap_pri);
    1262:	4650      	mov	r0, sl
    1264:	f004 fe36 	bl	5ed4 <flash_area_close>
    flash_area_close(fap_sec);
    1268:	9807      	ldr	r0, [sp, #28]
    126a:	f004 fe33 	bl	5ed4 <flash_area_close>
    126e:	e7d0      	b.n	1212 <swap_run+0x72>
            if (idx <= (g_last_idx - bs->idx + 1)) {
    1270:	6822      	ldr	r2, [r4, #0]
    1272:	3301      	adds	r3, #1
    1274:	1a9b      	subs	r3, r3, r2
    1276:	4598      	cmp	r8, r3
    1278:	d83a      	bhi.n	12f0 <swap_run+0x150>

static inline uint32_t
boot_img_sector_off(const struct boot_loader_state *state, size_t slot,
                    size_t sector)
{
    return flash_sector_get_off(&BOOT_IMG(state, slot).sectors[sector]) -
    127a:	6a6b      	ldr	r3, [r5, #36]	; 0x24
    if (bs->idx == BOOT_STATUS_IDX_0) {
    127c:	2a01      	cmp	r2, #1
	return fs->fs_off;
    127e:	6819      	ldr	r1, [r3, #0]
    1280:	f853 0038 	ldr.w	r0, [r3, r8, lsl #3]
    1284:	eb03 03c8 	add.w	r3, r3, r8, lsl #3
    1288:	f853 3c08 	ldr.w	r3, [r3, #-8]
    128c:	eba0 0a01 	sub.w	sl, r0, r1
    1290:	eba3 0301 	sub.w	r3, r3, r1
    1294:	9304      	str	r3, [sp, #16]
    1296:	d111      	bne.n	12bc <swap_run+0x11c>
                boot_move_sector_up(idx, sector_sz, state, bs, fap_pri, fap_sec);
    1298:	9b07      	ldr	r3, [sp, #28]
    129a:	9303      	str	r3, [sp, #12]
        if (bs->source != BOOT_STATUS_SOURCE_PRIMARY_SLOT) {
    129c:	68e3      	ldr	r3, [r4, #12]
    129e:	2b02      	cmp	r3, #2
    12a0:	d008      	beq.n	12b4 <swap_run+0x114>
            rc = swap_erase_trailer_sectors(state, fap_pri);
    12a2:	4649      	mov	r1, r9
    12a4:	4628      	mov	r0, r5
    12a6:	f004 fc37 	bl	5b18 <swap_erase_trailer_sectors>
            rc = swap_status_init(state, fap_pri, bs);
    12aa:	4622      	mov	r2, r4
    12ac:	4649      	mov	r1, r9
    12ae:	4628      	mov	r0, r5
    12b0:	f004 fc68 	bl	5b84 <swap_status_init>
        rc = swap_erase_trailer_sectors(state, fap_sec);
    12b4:	4628      	mov	r0, r5
    12b6:	9903      	ldr	r1, [sp, #12]
    12b8:	f004 fc2e 	bl	5b18 <swap_erase_trailer_sectors>
    rc = boot_erase_region(fap_pri, new_off, sz);
    12bc:	4632      	mov	r2, r6
    12be:	4651      	mov	r1, sl
    12c0:	4648      	mov	r0, r9
    12c2:	f004 fc27 	bl	5b14 <boot_erase_region>
    rc = boot_copy_region(state, fap_pri, fap_pri, old_off, new_off, sz);
    12c6:	9b04      	ldr	r3, [sp, #16]
    12c8:	464a      	mov	r2, r9
    12ca:	4649      	mov	r1, r9
    12cc:	4628      	mov	r0, r5
    12ce:	e9cd a600 	strd	sl, r6, [sp]
    12d2:	f7ff fc47 	bl	b64 <boot_copy_region>
    rc = boot_write_status(state, bs);
    12d6:	4621      	mov	r1, r4
    12d8:	4628      	mov	r0, r5
    12da:	f004 fbe9 	bl	5ab0 <boot_write_status>
    bs->idx++;
    12de:	6823      	ldr	r3, [r4, #0]
    12e0:	3301      	adds	r3, #1
    12e2:	6023      	str	r3, [r4, #0]
    BOOT_STATUS_ASSERT(rc == 0);
    12e4:	b120      	cbz	r0, 12f0 <swap_run+0x150>
    12e6:	f8db 3000 	ldr.w	r3, [fp]
    12ea:	3301      	adds	r3, #1
    12ec:	f8cb 3000 	str.w	r3, [fp]
            idx--;
    12f0:	f108 38ff 	add.w	r8, r8, #4294967295
    12f4:	e7a4      	b.n	1240 <swap_run+0xa0>
        if (idx >= bs->idx) {
    12f6:	6823      	ldr	r3, [r4, #0]
    12f8:	4598      	cmp	r8, r3
    12fa:	d34e      	bcc.n	139a <swap_run+0x1fa>
    12fc:	6a6a      	ldr	r2, [r5, #36]	; 0x24
    12fe:	ea4f 03c8 	mov.w	r3, r8, lsl #3
    1302:	f852 1038 	ldr.w	r1, [r2, r8, lsl #3]
    1306:	3b08      	subs	r3, #8
    1308:	9104      	str	r1, [sp, #16]
    130a:	6811      	ldr	r1, [r2, #0]
            boot_swap_sectors(idx, sector_sz, state, bs, fap_pri, fap_sec);
    130c:	f8dd b01c 	ldr.w	fp, [sp, #28]
    1310:	9103      	str	r1, [sp, #12]
    1312:	58d1      	ldr	r1, [r2, r3]
    1314:	6d2a      	ldr	r2, [r5, #80]	; 0x50
    1316:	58d0      	ldr	r0, [r2, r3]
    1318:	6813      	ldr	r3, [r2, #0]
    131a:	eba0 0903 	sub.w	r9, r0, r3
    if (bs->state == BOOT_STATUS_STATE_0) {
    131e:	7923      	ldrb	r3, [r4, #4]
    1320:	2b01      	cmp	r3, #1
    1322:	d138      	bne.n	1396 <swap_run+0x1f6>
    1324:	9b03      	ldr	r3, [sp, #12]
        rc = boot_erase_region(fap_pri, pri_off, sz);
    1326:	4632      	mov	r2, r6
    1328:	1ac9      	subs	r1, r1, r3
    132a:	4650      	mov	r0, sl
    132c:	9105      	str	r1, [sp, #20]
    132e:	f004 fbf1 	bl	5b14 <boot_erase_region>
        rc = boot_copy_region(state, fap_sec, fap_pri, sec_off, pri_off, sz);
    1332:	9905      	ldr	r1, [sp, #20]
    1334:	464b      	mov	r3, r9
    1336:	4652      	mov	r2, sl
    1338:	9100      	str	r1, [sp, #0]
    133a:	4628      	mov	r0, r5
    133c:	4659      	mov	r1, fp
    133e:	9601      	str	r6, [sp, #4]
    1340:	f7ff fc10 	bl	b64 <boot_copy_region>
        rc = boot_write_status(state, bs);
    1344:	4621      	mov	r1, r4
    1346:	4628      	mov	r0, r5
    1348:	f004 fbb2 	bl	5ab0 <boot_write_status>
        bs->state = BOOT_STATUS_STATE_1;
    134c:	2302      	movs	r3, #2
    134e:	7123      	strb	r3, [r4, #4]
        BOOT_STATUS_ASSERT(rc == 0);
    1350:	b118      	cbz	r0, 135a <swap_run+0x1ba>
    1352:	4a17      	ldr	r2, [pc, #92]	; (13b0 <swap_run+0x210>)
    1354:	6813      	ldr	r3, [r2, #0]
    1356:	3301      	adds	r3, #1
    1358:	6013      	str	r3, [r2, #0]
        rc = boot_erase_region(fap_sec, sec_off, sz);
    135a:	4632      	mov	r2, r6
    135c:	4649      	mov	r1, r9
    135e:	4658      	mov	r0, fp
    1360:	f004 fbd8 	bl	5b14 <boot_erase_region>
        rc = boot_copy_region(state, fap_pri, fap_sec, pri_up_off, sec_off, sz);
    1364:	e9dd 2303 	ldrd	r2, r3, [sp, #12]
    1368:	4651      	mov	r1, sl
    136a:	1a9b      	subs	r3, r3, r2
    136c:	4628      	mov	r0, r5
    136e:	465a      	mov	r2, fp
    1370:	e9cd 9600 	strd	r9, r6, [sp]
    1374:	f7ff fbf6 	bl	b64 <boot_copy_region>
        rc = boot_write_status(state, bs);
    1378:	4621      	mov	r1, r4
    137a:	4628      	mov	r0, r5
    137c:	f004 fb98 	bl	5ab0 <boot_write_status>
        bs->idx++;
    1380:	6823      	ldr	r3, [r4, #0]
    1382:	3301      	adds	r3, #1
    1384:	6023      	str	r3, [r4, #0]
        bs->state = BOOT_STATUS_STATE_0;
    1386:	2301      	movs	r3, #1
    1388:	7123      	strb	r3, [r4, #4]
        BOOT_STATUS_ASSERT(rc == 0);
    138a:	b130      	cbz	r0, 139a <swap_run+0x1fa>
    138c:	4a08      	ldr	r2, [pc, #32]	; (13b0 <swap_run+0x210>)
    138e:	6813      	ldr	r3, [r2, #0]
    1390:	3301      	adds	r3, #1
    1392:	6013      	str	r3, [r2, #0]
    1394:	e001      	b.n	139a <swap_run+0x1fa>
    if (bs->state == BOOT_STATUS_STATE_1) {
    1396:	2b02      	cmp	r3, #2
    1398:	d0df      	beq.n	135a <swap_run+0x1ba>
        idx++;
    139a:	f108 0801 	add.w	r8, r8, #1
    139e:	e75b      	b.n	1258 <swap_run+0xb8>
    13a0:	0000916b 	.word	0x0000916b
    13a4:	2000c4ec 	.word	0x2000c4ec
    13a8:	00009194 	.word	0x00009194
    13ac:	000091c3 	.word	0x000091c3
    13b0:	2000db54 	.word	0x2000db54

000013b4 <cleanup_arm_nvic>:
    13b4:	f3bf 8f6f 	isb	sy
  __ASM volatile ("cpsid i" : : : "memory");
    13b8:	b672      	cpsid	i
    13ba:	2300      	movs	r3, #0
	__ISB();
	__disable_irq();

	/* Disable NVIC interrupts */
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {
		NVIC->ICER[i] = 0xFFFFFFFF;
    13bc:	f04f 30ff 	mov.w	r0, #4294967295
    13c0:	4a09      	ldr	r2, [pc, #36]	; (13e8 <cleanup_arm_nvic+0x34>)
    13c2:	f103 0120 	add.w	r1, r3, #32
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {
    13c6:	3301      	adds	r3, #1
    13c8:	2b10      	cmp	r3, #16
		NVIC->ICER[i] = 0xFFFFFFFF;
    13ca:	f842 0021 	str.w	r0, [r2, r1, lsl #2]
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {
    13ce:	d1f8      	bne.n	13c2 <cleanup_arm_nvic+0xe>
    13d0:	2300      	movs	r3, #0
	}
	/* Clear pending NVIC interrupts */
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICPR); i++) {
		NVIC->ICPR[i] = 0xFFFFFFFF;
    13d2:	f04f 30ff 	mov.w	r0, #4294967295
    13d6:	4a04      	ldr	r2, [pc, #16]	; (13e8 <cleanup_arm_nvic+0x34>)
    13d8:	f103 0160 	add.w	r1, r3, #96	; 0x60
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICPR); i++) {
    13dc:	3301      	adds	r3, #1
    13de:	2b10      	cmp	r3, #16
		NVIC->ICPR[i] = 0xFFFFFFFF;
    13e0:	f842 0021 	str.w	r0, [r2, r1, lsl #2]
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICPR); i++) {
    13e4:	d1f8      	bne.n	13d8 <cleanup_arm_nvic+0x24>
	}
}
    13e6:	4770      	bx	lr
    13e8:	e000e100 	.word	0xe000e100

000013ec <nrf_cleanup_peripheral>:
{
    nrf_clock_int_disable(NRF_CLOCK, 0xFFFFFFFF);
}

void nrf_cleanup_peripheral(void)
{
    13ec:	b538      	push	{r3, r4, r5, lr}
    return (uint32_t)p_reg + task;
}

NRF_STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_reg, nrf_rtc_task_t task)
{
    *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
    13ee:	2201      	movs	r2, #1
    p_reg->EVTENSET = mask;
}

NRF_STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_reg, uint32_t mask)
{
    p_reg->EVTENCLR = mask;
    13f0:	f04f 34ff 	mov.w	r4, #4294967295
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
}

NRF_STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg)
{
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
    13f4:	2500      	movs	r5, #0
    *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
    13f6:	4b1a      	ldr	r3, [pc, #104]	; (1460 <nrf_cleanup_peripheral+0x74>)
#if defined(NRF_UARTE0)
    nrf_uarte_disable(NRF_UARTE0);
    nrf_uarte_int_disable(NRF_UARTE0, 0xFFFFFFFF);
#if defined(NRF_DPPIC)
    /* Clear all SUBSCRIBE configurations. */
    memset((uint8_t *)NRF_UARTE0 + NRF_UARTE_SUBSCRIBE_CONF_OFFS, 0, NRF_UARTE_SUBSCRIBE_CONF_SIZE);
    13f8:	4629      	mov	r1, r5
    13fa:	605a      	str	r2, [r3, #4]
    p_reg->EVTENCLR = mask;
    13fc:	f8c3 4348 	str.w	r4, [r3, #840]	; 0x348
    p_reg->INTENCLR = mask;
    1400:	f8c3 4308 	str.w	r4, [r3, #776]	; 0x308
    *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
    1404:	f503 5380 	add.w	r3, r3, #4096	; 0x1000
    1408:	605a      	str	r2, [r3, #4]
    p_reg->EVTENCLR = mask;
    140a:	f8c3 4348 	str.w	r4, [r3, #840]	; 0x348
    p_reg->INTENCLR = mask;
    140e:	f8c3 4308 	str.w	r4, [r3, #776]	; 0x308
    1412:	f5a3 4350 	sub.w	r3, r3, #53248	; 0xd000
    1416:	f8c3 5500 	str.w	r5, [r3, #1280]	; 0x500
    141a:	2280      	movs	r2, #128	; 0x80
    p_reg->INTENCLR = mask;
    141c:	f8c3 4308 	str.w	r4, [r3, #776]	; 0x308
    1420:	4810      	ldr	r0, [pc, #64]	; (1464 <nrf_cleanup_peripheral+0x78>)
    1422:	f005 f8c4 	bl	65ae <memset>
    /* Clear all PUBLISH configurations. */
    memset((uint8_t *)NRF_UARTE0 + NRF_UARTE_PUBLISH_CONF_OFFS, 0, NRF_UARTE_PUBLISH_CONF_SIZE);
    1426:	2280      	movs	r2, #128	; 0x80
    1428:	4629      	mov	r1, r5
    142a:	480f      	ldr	r0, [pc, #60]	; (1468 <nrf_cleanup_peripheral+0x7c>)
    142c:	f005 f8bf 	bl	65ae <memset>
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
    1430:	4b0e      	ldr	r3, [pc, #56]	; (146c <nrf_cleanup_peripheral+0x80>)
#if defined(NRF_UARTE1)
    nrf_uarte_disable(NRF_UARTE1);
    nrf_uarte_int_disable(NRF_UARTE1, 0xFFFFFFFF);
#if defined(NRF_DPPIC)
    /* Clear all SUBSCRIBE configurations. */
    memset((uint8_t *)NRF_UARTE1 + NRF_UARTE_SUBSCRIBE_CONF_OFFS, 0, NRF_UARTE_SUBSCRIBE_CONF_SIZE);
    1432:	2280      	movs	r2, #128	; 0x80
    1434:	f8c3 5500 	str.w	r5, [r3, #1280]	; 0x500
    1438:	4629      	mov	r1, r5
    p_reg->INTENCLR = mask;
    143a:	f8c3 4308 	str.w	r4, [r3, #776]	; 0x308
    143e:	480c      	ldr	r0, [pc, #48]	; (1470 <nrf_cleanup_peripheral+0x84>)
    1440:	f005 f8b5 	bl	65ae <memset>
    /* Clear all PUBLISH configurations. */
    memset((uint8_t *)NRF_UARTE1 + NRF_UARTE_PUBLISH_CONF_OFFS, 0, NRF_UARTE_PUBLISH_CONF_SIZE);
    1444:	2280      	movs	r2, #128	; 0x80
    1446:	4629      	mov	r1, r5
    1448:	480a      	ldr	r0, [pc, #40]	; (1474 <nrf_cleanup_peripheral+0x88>)
    144a:	f005 f8b0 	bl	65ae <memset>
    return ((p_reg->CHEN & (DPPIC_CHEN_CH0_Enabled << (DPPIC_CHEN_CH0_Pos + channel))) != 0);
}

NRF_STATIC_INLINE void nrf_dppi_channels_disable_all(NRF_DPPIC_Type * p_reg)
{
    p_reg->CHENCLR = 0xFFFFFFFFuL;
    144e:	4b0a      	ldr	r3, [pc, #40]	; (1478 <nrf_cleanup_peripheral+0x8c>)
    1450:	f8c3 4508 	str.w	r4, [r3, #1288]	; 0x508
    p_reg->INTENSET = mask;
}

NRF_STATIC_INLINE void nrf_clock_int_disable(NRF_CLOCK_Type * p_reg, uint32_t mask)
{
    p_reg->INTENCLR = mask;
    1454:	f04f 2350 	mov.w	r3, #1342197760	; 0x50005000
    1458:	f8c3 4308 	str.w	r4, [r3, #776]	; 0x308
#endif
#if defined(NRF_DPPIC)
    nrf_dppi_channels_disable_all(NRF_DPPIC);
#endif
    nrf_cleanup_clock();
}
    145c:	bd38      	pop	{r3, r4, r5, pc}
    145e:	bf00      	nop
    1460:	50014000 	.word	0x50014000
    1464:	50008080 	.word	0x50008080
    1468:	50008180 	.word	0x50008180
    146c:	50009000 	.word	0x50009000
    1470:	50009080 	.word	0x50009080
    1474:	50009180 	.word	0x50009180
    1478:	50017000 	.word	0x50017000

0000147c <base64_encode>:
/*
 * Encode a buffer into base64 format
 */
int base64_encode(uint8_t *dst, size_t dlen, size_t *olen, const uint8_t *src,
		  size_t slen)
{
    147c:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
    1480:	9d07      	ldr	r5, [sp, #28]
	size_t i, n;
	int C1, C2, C3;
	uint8_t *p;

	if (slen == 0) {
    1482:	b915      	cbnz	r5, 148a <base64_encode+0xe>
		*olen = 0;
    1484:	6015      	str	r5, [r2, #0]
		return 0;
    1486:	2000      	movs	r0, #0
    1488:	e012      	b.n	14b0 <base64_encode+0x34>
	}

	n = slen / 3 + (slen % 3 != 0);
    148a:	2403      	movs	r4, #3
    148c:	fbb5 f4f4 	udiv	r4, r5, r4
    1490:	eb04 0744 	add.w	r7, r4, r4, lsl #1
    1494:	42bd      	cmp	r5, r7
    1496:	bf18      	it	ne
    1498:	3401      	addne	r4, #1

	if (n > (BASE64_SIZE_T_MAX - 1) / 4) {
    149a:	f1b4 4f80 	cmp.w	r4, #1073741824	; 0x40000000
    149e:	d209      	bcs.n	14b4 <base64_encode+0x38>
		*olen = BASE64_SIZE_T_MAX;
		return -ENOMEM;
	}

	n *= 4;
    14a0:	00a4      	lsls	r4, r4, #2

	if ((dlen < n + 1) || (!dst)) {
    14a2:	3401      	adds	r4, #1
    14a4:	428c      	cmp	r4, r1
    14a6:	d800      	bhi.n	14aa <base64_encode+0x2e>
    14a8:	b938      	cbnz	r0, 14ba <base64_encode+0x3e>
		return -ENOMEM;
    14aa:	f06f 000b 	mvn.w	r0, #11
		*olen = n + 1;
    14ae:	6014      	str	r4, [r2, #0]

	*olen = p - dst;
	*p = 0U;

	return 0;
}
    14b0:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
    14b4:	f04f 34ff 	mov.w	r4, #4294967295
    14b8:	e7f7      	b.n	14aa <base64_encode+0x2e>
	for (i = 0, p = dst; i < n; i += 3) {
    14ba:	4604      	mov	r4, r0
    14bc:	2100      	movs	r1, #0
		*p++ = base64_enc_map[(C1 >> 2) & 0x3F];
    14be:	f8df e0b4 	ldr.w	lr, [pc, #180]	; 1574 <base64_encode+0xf8>
	for (i = 0, p = dst; i < n; i += 3) {
    14c2:	42b9      	cmp	r1, r7
    14c4:	f103 0c03 	add.w	ip, r3, #3
    14c8:	f104 0604 	add.w	r6, r4, #4
    14cc:	d32b      	bcc.n	1526 <base64_encode+0xaa>
	if (i < slen) {
    14ce:	42a9      	cmp	r1, r5
    14d0:	4627      	mov	r7, r4
    14d2:	d223      	bcs.n	151c <base64_encode+0xa0>
		C2 = ((i + 1) < slen) ? *src++ : 0;
    14d4:	f101 0c01 	add.w	ip, r1, #1
    14d8:	45ac      	cmp	ip, r5
		C1 = *src++;
    14da:	781f      	ldrb	r7, [r3, #0]
		C2 = ((i + 1) < slen) ? *src++ : 0;
    14dc:	bf28      	it	cs
    14de:	2300      	movcs	r3, #0
		*p++ = base64_enc_map[(C1 >> 2) & 0x3F];
    14e0:	4924      	ldr	r1, [pc, #144]	; (1574 <base64_encode+0xf8>)
    14e2:	ea4f 0ea7 	mov.w	lr, r7, asr #2
		C2 = ((i + 1) < slen) ? *src++ : 0;
    14e6:	bf38      	it	cc
    14e8:	785b      	ldrbcc	r3, [r3, #1]
		*p++ = base64_enc_map[(C1 >> 2) & 0x3F];
    14ea:	f811 e00e 	ldrb.w	lr, [r1, lr]
		if ((i + 1) < slen) {
    14ee:	45ac      	cmp	ip, r5
		*p++ = base64_enc_map[(C1 >> 2) & 0x3F];
    14f0:	f884 e000 	strb.w	lr, [r4]
		*p++ = base64_enc_map[(((C1 & 3) << 4) + (C2 >> 4)) & 0x3F];
    14f4:	eb01 1e13 	add.w	lr, r1, r3, lsr #4
			*p++ = '=';
    14f8:	bf2e      	itee	cs
    14fa:	233d      	movcs	r3, #61	; 0x3d
			*p++ = base64_enc_map[((C2 & 15) << 2) & 0x3F];
    14fc:	009b      	lslcc	r3, r3, #2
    14fe:	f003 033c 	andcc.w	r3, r3, #60	; 0x3c
		*p++ = base64_enc_map[(((C1 & 3) << 4) + (C2 >> 4)) & 0x3F];
    1502:	ea4f 1707 	mov.w	r7, r7, lsl #4
			*p++ = base64_enc_map[((C2 & 15) << 2) & 0x3F];
    1506:	bf38      	it	cc
    1508:	5ccb      	ldrbcc	r3, [r1, r3]
		*p++ = base64_enc_map[(((C1 & 3) << 4) + (C2 >> 4)) & 0x3F];
    150a:	f007 0730 	and.w	r7, r7, #48	; 0x30
    150e:	f81e 7007 	ldrb.w	r7, [lr, r7]
    1512:	70a3      	strb	r3, [r4, #2]
		*p++ = '=';
    1514:	233d      	movs	r3, #61	; 0x3d
		*p++ = base64_enc_map[(((C1 & 3) << 4) + (C2 >> 4)) & 0x3F];
    1516:	7067      	strb	r7, [r4, #1]
		*p++ = '=';
    1518:	4637      	mov	r7, r6
    151a:	70e3      	strb	r3, [r4, #3]
	*p = 0U;
    151c:	2300      	movs	r3, #0
	*olen = p - dst;
    151e:	1a38      	subs	r0, r7, r0
    1520:	6010      	str	r0, [r2, #0]
	*p = 0U;
    1522:	703b      	strb	r3, [r7, #0]
	return 0;
    1524:	e7af      	b.n	1486 <base64_encode+0xa>
		C1 = *src++;
    1526:	f81c 4c03 	ldrb.w	r4, [ip, #-3]
		C2 = *src++;
    152a:	f81c 3c02 	ldrb.w	r3, [ip, #-2]
		*p++ = base64_enc_map[(C1 >> 2) & 0x3F];
    152e:	ea4f 09a4 	mov.w	r9, r4, asr #2
    1532:	f81e 9009 	ldrb.w	r9, [lr, r9]
		*p++ = base64_enc_map[(((C1 &  3) << 4) + (C2 >> 4)) & 0x3F];
    1536:	0124      	lsls	r4, r4, #4
		C3 = *src++;
    1538:	f81c 8c01 	ldrb.w	r8, [ip, #-1]
		*p++ = base64_enc_map[(((C1 &  3) << 4) + (C2 >> 4)) & 0x3F];
    153c:	f004 0430 	and.w	r4, r4, #48	; 0x30
		*p++ = base64_enc_map[(C1 >> 2) & 0x3F];
    1540:	f806 9c04 	strb.w	r9, [r6, #-4]
		*p++ = base64_enc_map[(((C1 &  3) << 4) + (C2 >> 4)) & 0x3F];
    1544:	eb0e 1913 	add.w	r9, lr, r3, lsr #4
    1548:	f819 4004 	ldrb.w	r4, [r9, r4]
		*p++ = base64_enc_map[(((C2 & 15) << 2) + (C3 >> 6)) & 0x3F];
    154c:	009b      	lsls	r3, r3, #2
		*p++ = base64_enc_map[(((C1 &  3) << 4) + (C2 >> 4)) & 0x3F];
    154e:	f806 4c03 	strb.w	r4, [r6, #-3]
		*p++ = base64_enc_map[(((C2 & 15) << 2) + (C3 >> 6)) & 0x3F];
    1552:	f003 033c 	and.w	r3, r3, #60	; 0x3c
    1556:	eb0e 1498 	add.w	r4, lr, r8, lsr #6
    155a:	5ce3      	ldrb	r3, [r4, r3]
		*p++ = base64_enc_map[C3 & 0x3F];
    155c:	f008 083f 	and.w	r8, r8, #63	; 0x3f
		*p++ = base64_enc_map[(((C2 & 15) << 2) + (C3 >> 6)) & 0x3F];
    1560:	f806 3c02 	strb.w	r3, [r6, #-2]
		*p++ = base64_enc_map[C3 & 0x3F];
    1564:	f81e 3008 	ldrb.w	r3, [lr, r8]
	for (i = 0, p = dst; i < n; i += 3) {
    1568:	4634      	mov	r4, r6
		*p++ = base64_enc_map[C3 & 0x3F];
    156a:	f806 3c01 	strb.w	r3, [r6, #-1]
	for (i = 0, p = dst; i < n; i += 3) {
    156e:	3103      	adds	r1, #3
    1570:	4663      	mov	r3, ip
    1572:	e7a6      	b.n	14c2 <base64_encode+0x46>
    1574:	00009382 	.word	0x00009382

00001578 <base64_decode>:
/*
 * Decode a base64-formatted buffer
 */
int base64_decode(uint8_t *dst, size_t dlen, size_t *olen, const uint8_t *src,
		  size_t slen)
{
    1578:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
	size_t i, n;
	uint32_t j, x;
	uint8_t *p;

	/* First pass: check for validity and get output length */
	for (i = n = j = 0U; i < slen; i++) {
    157c:	2700      	movs	r7, #0
    157e:	463c      	mov	r4, r7
    1580:	463d      	mov	r5, r7
{
    1582:	f8dd e01c 	ldr.w	lr, [sp, #28]

		if (src[i] == '=' && ++j > 2) {
			return -EINVAL;
		}

		if (src[i] > 127 || base64_dec_map[src[i]] == 127U) {
    1586:	f8df 8128 	ldr.w	r8, [pc, #296]	; 16b0 <base64_decode+0x138>
	for (i = n = j = 0U; i < slen; i++) {
    158a:	4575      	cmp	r5, lr
    158c:	d31f      	bcc.n	15ce <base64_decode+0x56>
		}

		n++;
	}

	if (n == 0) {
    158e:	bbe4      	cbnz	r4, 160a <base64_decode+0x92>
		*olen = 0;
		return 0;
    1590:	2000      	movs	r0, #0
		*olen = 0;
    1592:	6014      	str	r4, [r2, #0]
	}

	*olen = p - dst;

	return 0;
}
    1594:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
			++i;
    1598:	3601      	adds	r6, #1
		while (i < slen && src[i] == ' ') {
    159a:	4576      	cmp	r6, lr
    159c:	d033      	beq.n	1606 <base64_decode+0x8e>
    159e:	f813 c006 	ldrb.w	ip, [r3, r6]
    15a2:	f1bc 0f20 	cmp.w	ip, #32
    15a6:	d0f7      	beq.n	1598 <base64_decode+0x20>
		if ((slen - i) >= 2 && src[i] == '\r' && src[i + 1] == '\n') {
    15a8:	ebae 0906 	sub.w	r9, lr, r6
    15ac:	f1b9 0f01 	cmp.w	r9, #1
    15b0:	eba6 0505 	sub.w	r5, r6, r5
    15b4:	d00d      	beq.n	15d2 <base64_decode+0x5a>
    15b6:	f1bc 0f0d 	cmp.w	ip, #13
    15ba:	d10a      	bne.n	15d2 <base64_decode+0x5a>
    15bc:	eb03 0906 	add.w	r9, r3, r6
    15c0:	f899 9001 	ldrb.w	r9, [r9, #1]
    15c4:	f1b9 0f0a 	cmp.w	r9, #10
    15c8:	d16e      	bne.n	16a8 <base64_decode+0x130>
	for (i = n = j = 0U; i < slen; i++) {
    15ca:	1c75      	adds	r5, r6, #1
    15cc:	e7dd      	b.n	158a <base64_decode+0x12>
    15ce:	462e      	mov	r6, r5
    15d0:	e7e3      	b.n	159a <base64_decode+0x22>
		if (src[i] == '\n') {
    15d2:	f1bc 0f0a 	cmp.w	ip, #10
    15d6:	d0f8      	beq.n	15ca <base64_decode+0x52>
		if (x != 0U) {
    15d8:	b92d      	cbnz	r5, 15e6 <base64_decode+0x6e>
		if (src[i] == '=' && ++j > 2) {
    15da:	f1bc 0f3d 	cmp.w	ip, #61	; 0x3d
    15de:	d105      	bne.n	15ec <base64_decode+0x74>
    15e0:	3701      	adds	r7, #1
    15e2:	2f02      	cmp	r7, #2
    15e4:	d90d      	bls.n	1602 <base64_decode+0x8a>
			return -EINVAL;
    15e6:	f06f 0015 	mvn.w	r0, #21
    15ea:	e7d3      	b.n	1594 <base64_decode+0x1c>
		if (src[i] > 127 || base64_dec_map[src[i]] == 127U) {
    15ec:	f01c 0f80 	tst.w	ip, #128	; 0x80
    15f0:	d1f9      	bne.n	15e6 <base64_decode+0x6e>
    15f2:	f818 500c 	ldrb.w	r5, [r8, ip]
    15f6:	2d7f      	cmp	r5, #127	; 0x7f
    15f8:	d0f5      	beq.n	15e6 <base64_decode+0x6e>
		if (base64_dec_map[src[i]] < 64 && j != 0U) {
    15fa:	2d3f      	cmp	r5, #63	; 0x3f
    15fc:	d801      	bhi.n	1602 <base64_decode+0x8a>
    15fe:	2f00      	cmp	r7, #0
    1600:	d1f1      	bne.n	15e6 <base64_decode+0x6e>
		n++;
    1602:	3401      	adds	r4, #1
    1604:	e7e1      	b.n	15ca <base64_decode+0x52>
    1606:	4635      	mov	r5, r6
    1608:	e7c1      	b.n	158e <base64_decode+0x16>
	n = (6 * (n >> 3)) + ((6 * (n & 0x7) + 7) >> 3);
    160a:	f04f 0c06 	mov.w	ip, #6
    160e:	f004 0607 	and.w	r6, r4, #7
    1612:	08e4      	lsrs	r4, r4, #3
    1614:	fb0c f606 	mul.w	r6, ip, r6
    1618:	fb0c f404 	mul.w	r4, ip, r4
    161c:	3607      	adds	r6, #7
	n -= j;
    161e:	1be4      	subs	r4, r4, r7
    1620:	eb04 04d6 	add.w	r4, r4, r6, lsr #3
	if (dst == NULL || dlen < n) {
    1624:	b170      	cbz	r0, 1644 <base64_decode+0xcc>
    1626:	428c      	cmp	r4, r1
    1628:	d80c      	bhi.n	1644 <base64_decode+0xcc>
	for (j = 3U, n = x = 0U, p = dst; i > 0; i--, src++) {
    162a:	2700      	movs	r7, #0
	if (dst == NULL || dlen < n) {
    162c:	4601      	mov	r1, r0
	for (j = 3U, n = x = 0U, p = dst; i > 0; i--, src++) {
    162e:	2603      	movs	r6, #3
    1630:	463c      	mov	r4, r7
		j -= (base64_dec_map[*src] == 64U);
    1632:	f8df e07c 	ldr.w	lr, [pc, #124]	; 16b0 <base64_decode+0x138>
		if (*src == '\r' || *src == '\n' || *src == ' ') {
    1636:	f8df 807c 	ldr.w	r8, [pc, #124]	; 16b4 <base64_decode+0x13c>
    163a:	441d      	add	r5, r3
	for (j = 3U, n = x = 0U, p = dst; i > 0; i--, src++) {
    163c:	429d      	cmp	r5, r3
    163e:	d105      	bne.n	164c <base64_decode+0xd4>
	*olen = p - dst;
    1640:	1a0c      	subs	r4, r1, r0
	return 0;
    1642:	e7a5      	b.n	1590 <base64_decode+0x18>
		return -ENOMEM;
    1644:	f06f 000b 	mvn.w	r0, #11
		*olen = n;
    1648:	6014      	str	r4, [r2, #0]
		return -ENOMEM;
    164a:	e7a3      	b.n	1594 <base64_decode+0x1c>
		if (*src == '\r' || *src == '\n' || *src == ' ') {
    164c:	f813 9b01 	ldrb.w	r9, [r3], #1
    1650:	f1a9 0c0a 	sub.w	ip, r9, #10
    1654:	fa5f fc8c 	uxtb.w	ip, ip
    1658:	f1bc 0f16 	cmp.w	ip, #22
    165c:	d804      	bhi.n	1668 <base64_decode+0xf0>
    165e:	fa48 fc0c 	asr.w	ip, r8, ip
    1662:	f01c 0f01 	tst.w	ip, #1
    1666:	d0e9      	beq.n	163c <base64_decode+0xc4>
		j -= (base64_dec_map[*src] == 64U);
    1668:	f81e c009 	ldrb.w	ip, [lr, r9]
		if (++n == 4) {
    166c:	3401      	adds	r4, #1
		j -= (base64_dec_map[*src] == 64U);
    166e:	f1bc 0f40 	cmp.w	ip, #64	; 0x40
    1672:	bf08      	it	eq
    1674:	3e01      	subeq	r6, #1
		x  = (x << 6) | (base64_dec_map[*src] & 0x3F);
    1676:	f00c 0c3f 	and.w	ip, ip, #63	; 0x3f
		if (++n == 4) {
    167a:	2c04      	cmp	r4, #4
		x  = (x << 6) | (base64_dec_map[*src] & 0x3F);
    167c:	ea4c 1787 	orr.w	r7, ip, r7, lsl #6
		if (++n == 4) {
    1680:	d1dc      	bne.n	163c <base64_decode+0xc4>
			if (j > 0) {
    1682:	b17e      	cbz	r6, 16a4 <base64_decode+0x12c>
				*p++ = (unsigned char)(x >> 16);
    1684:	0c3c      	lsrs	r4, r7, #16
			if (j > 1) {
    1686:	2e01      	cmp	r6, #1
				*p++ = (unsigned char)(x >> 16);
    1688:	700c      	strb	r4, [r1, #0]
			if (j > 1) {
    168a:	d102      	bne.n	1692 <base64_decode+0x11a>
				*p++ = (unsigned char)(x >> 16);
    168c:	3101      	adds	r1, #1
			n = 0;
    168e:	2400      	movs	r4, #0
    1690:	e7d4      	b.n	163c <base64_decode+0xc4>
			if (j > 2) {
    1692:	2e02      	cmp	r6, #2
				*p++ = (unsigned char)(x >> 8);
    1694:	ea4f 2417 	mov.w	r4, r7, lsr #8
    1698:	704c      	strb	r4, [r1, #1]
				*p++ = (unsigned char)(x);
    169a:	bf16      	itet	ne
    169c:	708f      	strbne	r7, [r1, #2]
				*p++ = (unsigned char)(x >> 8);
    169e:	3102      	addeq	r1, #2
				*p++ = (unsigned char)(x);
    16a0:	3103      	addne	r1, #3
    16a2:	e7f4      	b.n	168e <base64_decode+0x116>
			n = 0;
    16a4:	4634      	mov	r4, r6
	for (j = 3U, n = x = 0U, p = dst; i > 0; i--, src++) {
    16a6:	e7c9      	b.n	163c <base64_decode+0xc4>
		if (x != 0U) {
    16a8:	2d00      	cmp	r5, #0
    16aa:	d0a2      	beq.n	15f2 <base64_decode+0x7a>
    16ac:	e79b      	b.n	15e6 <base64_decode+0x6e>
    16ae:	bf00      	nop
    16b0:	00009302 	.word	0x00009302
    16b4:	ffbffff6 	.word	0xffbffff6

000016b8 <char_out>:
}

static int char_out(int c, void *ctx_p)
{
	(void) ctx_p;
	return _char_out(c);
    16b8:	4b01      	ldr	r3, [pc, #4]	; (16c0 <char_out+0x8>)
    16ba:	681b      	ldr	r3, [r3, #0]
    16bc:	4718      	bx	r3
    16be:	bf00      	nop
    16c0:	2000c4f0 	.word	0x2000c4f0

000016c4 <vprintk>:
}

void vprintk(const char *fmt, va_list ap)
{
    16c4:	b507      	push	{r0, r1, r2, lr}
    16c6:	460b      	mov	r3, r1
int cbvprintf(cbprintf_cb out, void *ctx, const char *format, va_list ap);
#else
static inline
int cbvprintf(cbprintf_cb out, void *ctx, const char *format, va_list ap)
{
	return z_cbvprintf_impl(out, ctx, format, ap, 0);
    16c8:	2100      	movs	r1, #0
    16ca:	4602      	mov	r2, r0
    16cc:	9100      	str	r1, [sp, #0]
    16ce:	4803      	ldr	r0, [pc, #12]	; (16dc <vprintk+0x18>)
    16d0:	f000 f914 	bl	18fc <z_cbvprintf_impl>

#ifdef CONFIG_PRINTK_SYNC
		k_spin_unlock(&lock, key);
#endif
	}
}
    16d4:	b003      	add	sp, #12
    16d6:	f85d fb04 	ldr.w	pc, [sp], #4
    16da:	bf00      	nop
    16dc:	000016b9 	.word	0x000016b9

000016e0 <process_event>:
 * regions.
 */
static void process_event(struct onoff_manager *mgr,
			  int evt,
			  k_spinlock_key_t key)
{
    16e0:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
	sys_slist_t clients;
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    16e4:	8b05      	ldrh	r5, [r0, #24]
{
    16e6:	4604      	mov	r4, r0
	__ASSERT_NO_MSG(evt != EVT_NOP);

	/* If this is a nested call record the event for processing in
	 * the top invocation.
	 */
	if (processing) {
    16e8:	0728      	lsls	r0, r5, #28
{
    16ea:	4690      	mov	r8, r2
	if (processing) {
    16ec:	d411      	bmi.n	1712 <process_event+0x32>

	sys_slist_init(&clients);
	do {
		onoff_transition_fn transit = NULL;

		if (evt == EVT_RECHECK) {
    16ee:	2902      	cmp	r1, #2
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    16f0:	f005 0507 	and.w	r5, r5, #7
		if (evt == EVT_RECHECK) {
    16f4:	f040 80cd 	bne.w	1892 <process_event+0x1b2>
			evt = process_recheck(mgr);
    16f8:	4620      	mov	r0, r4
    16fa:	f004 fb04 	bl	5d06 <process_recheck>
		}

		if (evt == EVT_NOP) {
    16fe:	b178      	cbz	r0, 1720 <process_event+0x40>
			break;
		}

		res = 0;
		if (evt == EVT_COMPLETE) {
    1700:	3801      	subs	r0, #1
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    1702:	8b21      	ldrh	r1, [r4, #24]
    1704:	2804      	cmp	r0, #4
    1706:	d811      	bhi.n	172c <process_event+0x4c>
    1708:	e8df f000 	tbb	[pc, r0]
    170c:	856d10c3 	.word	0x856d10c3
    1710:	95          	.byte	0x95
    1711:	00          	.byte	0x00
		if (evt == EVT_COMPLETE) {
    1712:	2901      	cmp	r1, #1
			mgr->flags |= ONOFF_FLAG_COMPLETE;
    1714:	bf0c      	ite	eq
    1716:	f045 0510 	orreq.w	r5, r5, #16
			mgr->flags |= ONOFF_FLAG_RECHECK;
    171a:	f045 0520 	orrne.w	r5, r5, #32
    171e:	8325      	strh	r5, [r4, #24]
	__asm__ volatile(
		"cpsie i;"
		"isb"
		: : : "memory");
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	__asm__ volatile(
    1720:	f388 8811 	msr	BASEPRI, r8
    1724:	f3bf 8f6f 	isb	sy
		state = mgr->flags & ONOFF_STATE_MASK;
	} while (evt != EVT_NOP);

out:
	k_spin_unlock(&mgr->lock, key);
}
    1728:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
		bool do_monitors = (state != (mgr->flags & ONOFF_STATE_MASK))
    172c:	f001 0a07 	and.w	sl, r1, #7
				   && !sys_slist_is_empty(&mgr->monitors);
    1730:	45aa      	cmp	sl, r5
    1732:	f000 80a6 	beq.w	1882 <process_event+0x1a2>
	 * a memory barrier when used like this, and we don't have a
	 * Zephyr framework for that.
	 */
	atomic_clear(&l->locked);
#endif
	arch_irq_unlock(key.key);
    1736:	2700      	movs	r7, #0
    1738:	46b9      	mov	r9, r7
    173a:	463e      	mov	r6, r7
    173c:	68a3      	ldr	r3, [r4, #8]
    173e:	2b00      	cmp	r3, #0
    1740:	f000 80bd 	beq.w	18be <process_event+0x1de>
			uint32_t flags = mgr->flags | ONOFF_FLAG_PROCESSING;
    1744:	f041 0108 	orr.w	r1, r1, #8
			mgr->flags = flags;
    1748:	8321      	strh	r1, [r4, #24]
    174a:	f388 8811 	msr	BASEPRI, r8
    174e:	f3bf 8f6f 	isb	sy
 *
 * @return A pointer on the first node of the list (or NULL if none)
 */
static inline sys_snode_t *sys_slist_peek_head(sys_slist_t *list)
{
	return list->head;
    1752:	68a1      	ldr	r1, [r4, #8]
	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(mlist, mon, tmp, node) {
    1754:	2900      	cmp	r1, #0
    1756:	f000 80bb 	beq.w	18d0 <process_event+0x1f0>
	return node->next;
    175a:	680d      	ldr	r5, [r1, #0]
    175c:	2900      	cmp	r1, #0
    175e:	f000 80b7 	beq.w	18d0 <process_event+0x1f0>
		mon->callback(mgr, mon, state, res);
    1762:	4633      	mov	r3, r6
    1764:	4652      	mov	r2, sl
    1766:	4620      	mov	r0, r4
    1768:	f8d1 8004 	ldr.w	r8, [r1, #4]
    176c:	47c0      	blx	r8
	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(mlist, mon, tmp, node) {
    176e:	2d00      	cmp	r5, #0
    1770:	d076      	beq.n	1860 <process_event+0x180>
    1772:	682b      	ldr	r3, [r5, #0]
    1774:	4629      	mov	r1, r5
    1776:	461d      	mov	r5, r3
    1778:	e7f0      	b.n	175c <process_event+0x7c>
    177a:	f001 0307 	and.w	r3, r1, #7
		   || (state == ONOFF_STATE_RESETTING)) {
    177e:	1f5a      	subs	r2, r3, #5
	} else if ((state == ONOFF_STATE_TO_ON)
    1780:	2a01      	cmp	r2, #1
    1782:	d81b      	bhi.n	17bc <process_event+0xdc>
	list->head = NULL;
    1784:	2200      	movs	r2, #0
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    1786:	f021 0107 	bic.w	r1, r1, #7
		if (state == ONOFF_STATE_TO_ON) {
    178a:	2b06      	cmp	r3, #6
		*clients = mgr->clients;
    178c:	6827      	ldr	r7, [r4, #0]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    178e:	b289      	uxth	r1, r1
	list->tail = NULL;
    1790:	e9c4 2200 	strd	r2, r2, [r4]
		if (state == ONOFF_STATE_TO_ON) {
    1794:	d109      	bne.n	17aa <process_event+0xca>
    1796:	463b      	mov	r3, r7
    1798:	e003      	b.n	17a2 <process_event+0xc2>
				mgr->refs += 1U;
    179a:	8b62      	ldrh	r2, [r4, #26]
    179c:	3201      	adds	r2, #1
    179e:	8362      	strh	r2, [r4, #26]
	return node->next;
    17a0:	681b      	ldr	r3, [r3, #0]
			SYS_SLIST_FOR_EACH_CONTAINER(clients, cp, node) {
    17a2:	2b00      	cmp	r3, #0
    17a4:	d1f9      	bne.n	179a <process_event+0xba>
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    17a6:	f041 0102 	orr.w	r1, r1, #2
		if (process_recheck(mgr) != EVT_NOP) {
    17aa:	4620      	mov	r0, r4
	mgr->flags = (state & ONOFF_STATE_MASK)
    17ac:	8321      	strh	r1, [r4, #24]
		if (process_recheck(mgr) != EVT_NOP) {
    17ae:	f004 faaa 	bl	5d06 <process_recheck>
    17b2:	2800      	cmp	r0, #0
    17b4:	d07b      	beq.n	18ae <process_event+0x1ce>
			mgr->flags |= ONOFF_FLAG_RECHECK;
    17b6:	f041 0120 	orr.w	r1, r1, #32
    17ba:	e077      	b.n	18ac <process_event+0x1cc>
	} else if (state == ONOFF_STATE_TO_OFF) {
    17bc:	2b04      	cmp	r3, #4
    17be:	d10a      	bne.n	17d6 <process_event+0xf6>
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    17c0:	f021 0107 	bic.w	r1, r1, #7
    17c4:	b289      	uxth	r1, r1
		if (process_recheck(mgr) != EVT_NOP) {
    17c6:	4620      	mov	r0, r4
	mgr->flags = (state & ONOFF_STATE_MASK)
    17c8:	8321      	strh	r1, [r4, #24]
		if (process_recheck(mgr) != EVT_NOP) {
    17ca:	f004 fa9c 	bl	5d06 <process_recheck>
    17ce:	b110      	cbz	r0, 17d6 <process_event+0xf6>
			mgr->flags |= ONOFF_FLAG_RECHECK;
    17d0:	f041 0120 	orr.w	r1, r1, #32
    17d4:	8321      	strh	r1, [r4, #24]
		bool do_monitors = (state != (mgr->flags & ONOFF_STATE_MASK))
    17d6:	8b21      	ldrh	r1, [r4, #24]
    17d8:	f001 0a07 	and.w	sl, r1, #7
				   && !sys_slist_is_empty(&mgr->monitors);
    17dc:	45aa      	cmp	sl, r5
    17de:	d050      	beq.n	1882 <process_event+0x1a2>
    17e0:	2700      	movs	r7, #0
		onoff_transition_fn transit = NULL;
    17e2:	46b9      	mov	r9, r7
    17e4:	e7aa      	b.n	173c <process_event+0x5c>
			transit = mgr->transitions->start;
    17e6:	6923      	ldr	r3, [r4, #16]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    17e8:	f021 0107 	bic.w	r1, r1, #7
    17ec:	f041 0106 	orr.w	r1, r1, #6
				   && !sys_slist_is_empty(&mgr->monitors);
    17f0:	2d06      	cmp	r5, #6
			transit = mgr->transitions->start;
    17f2:	f8d3 9000 	ldr.w	r9, [r3]
	mgr->flags = (state & ONOFF_STATE_MASK)
    17f6:	8321      	strh	r1, [r4, #24]
				   && !sys_slist_is_empty(&mgr->monitors);
    17f8:	d12d      	bne.n	1856 <process_event+0x176>
		    || (transit != NULL)) {
    17fa:	f1b9 0f00 	cmp.w	r9, #0
    17fe:	d040      	beq.n	1882 <process_event+0x1a2>
			uint32_t flags = mgr->flags | ONOFF_FLAG_PROCESSING;
    1800:	f041 0108 	orr.w	r1, r1, #8
			mgr->flags = flags;
    1804:	8321      	strh	r1, [r4, #24]
    1806:	f388 8811 	msr	BASEPRI, r8
    180a:	f3bf 8f6f 	isb	sy
				transit(mgr, transition_complete);
    180e:	4620      	mov	r0, r4
    1810:	4939      	ldr	r1, [pc, #228]	; (18f8 <process_event+0x218>)
    1812:	47c8      	blx	r9
    1814:	e029      	b.n	186a <process_event+0x18a>
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    1816:	f021 0107 	bic.w	r1, r1, #7
			transit = mgr->transitions->stop;
    181a:	6923      	ldr	r3, [r4, #16]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    181c:	f041 0104 	orr.w	r1, r1, #4
    1820:	b289      	uxth	r1, r1
				   && !sys_slist_is_empty(&mgr->monitors);
    1822:	2d04      	cmp	r5, #4
			transit = mgr->transitions->stop;
    1824:	f8d3 9004 	ldr.w	r9, [r3, #4]
	mgr->flags = (state & ONOFF_STATE_MASK)
    1828:	8321      	strh	r1, [r4, #24]
				   && !sys_slist_is_empty(&mgr->monitors);
    182a:	d0e6      	beq.n	17fa <process_event+0x11a>
    182c:	2700      	movs	r7, #0
		bool do_monitors = (state != (mgr->flags & ONOFF_STATE_MASK))
    182e:	f04f 0a04 	mov.w	sl, #4
		res = 0;
    1832:	463e      	mov	r6, r7
    1834:	e782      	b.n	173c <process_event+0x5c>
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    1836:	f021 0107 	bic.w	r1, r1, #7
			transit = mgr->transitions->reset;
    183a:	6923      	ldr	r3, [r4, #16]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    183c:	f041 0105 	orr.w	r1, r1, #5
    1840:	b289      	uxth	r1, r1
				   && !sys_slist_is_empty(&mgr->monitors);
    1842:	2d05      	cmp	r5, #5
			transit = mgr->transitions->reset;
    1844:	f8d3 9008 	ldr.w	r9, [r3, #8]
	mgr->flags = (state & ONOFF_STATE_MASK)
    1848:	8321      	strh	r1, [r4, #24]
				   && !sys_slist_is_empty(&mgr->monitors);
    184a:	d0d6      	beq.n	17fa <process_event+0x11a>
    184c:	2700      	movs	r7, #0
		bool do_monitors = (state != (mgr->flags & ONOFF_STATE_MASK))
    184e:	f04f 0a05 	mov.w	sl, #5
		res = 0;
    1852:	463e      	mov	r6, r7
    1854:	e772      	b.n	173c <process_event+0x5c>
				   && !sys_slist_is_empty(&mgr->monitors);
    1856:	2700      	movs	r7, #0
		bool do_monitors = (state != (mgr->flags & ONOFF_STATE_MASK))
    1858:	f04f 0a06 	mov.w	sl, #6
		res = 0;
    185c:	463e      	mov	r6, r7
    185e:	e76d      	b.n	173c <process_event+0x5c>
	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(mlist, mon, tmp, node) {
    1860:	462b      	mov	r3, r5
    1862:	e787      	b.n	1774 <process_event+0x94>
			if (transit != NULL) {
    1864:	f1b9 0f00 	cmp.w	r9, #0
    1868:	d1d1      	bne.n	180e <process_event+0x12e>
	__asm__ volatile(
    186a:	f04f 0320 	mov.w	r3, #32
    186e:	f3ef 8811 	mrs	r8, BASEPRI
    1872:	f383 8812 	msr	BASEPRI_MAX, r3
    1876:	f3bf 8f6f 	isb	sy
			mgr->flags &= ~ONOFF_FLAG_PROCESSING;
    187a:	8b23      	ldrh	r3, [r4, #24]
    187c:	f023 0308 	bic.w	r3, r3, #8
    1880:	8323      	strh	r3, [r4, #24]
		if ((mgr->flags & ONOFF_FLAG_COMPLETE) != 0) {
    1882:	8b25      	ldrh	r5, [r4, #24]
    1884:	06ea      	lsls	r2, r5, #27
    1886:	d52e      	bpl.n	18e6 <process_event+0x206>
			mgr->flags &= ~ONOFF_FLAG_COMPLETE;
    1888:	f025 0310 	bic.w	r3, r5, #16
    188c:	8323      	strh	r3, [r4, #24]
		state = mgr->flags & ONOFF_STATE_MASK;
    188e:	f005 0507 	and.w	r5, r5, #7
			res = mgr->last_res;
    1892:	6966      	ldr	r6, [r4, #20]
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    1894:	8b21      	ldrh	r1, [r4, #24]
	if (res < 0) {
    1896:	2e00      	cmp	r6, #0
    1898:	f6bf af6f 	bge.w	177a <process_event+0x9a>
	list->head = NULL;
    189c:	2300      	movs	r3, #0
		*clients = mgr->clients;
    189e:	6827      	ldr	r7, [r4, #0]
	list->tail = NULL;
    18a0:	e9c4 3300 	strd	r3, r3, [r4]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    18a4:	f021 0107 	bic.w	r1, r1, #7
    18a8:	f041 0101 	orr.w	r1, r1, #1
			mgr->flags |= ONOFF_FLAG_RECHECK;
    18ac:	8321      	strh	r1, [r4, #24]
		bool do_monitors = (state != (mgr->flags & ONOFF_STATE_MASK))
    18ae:	8b21      	ldrh	r1, [r4, #24]
    18b0:	f04f 0900 	mov.w	r9, #0
    18b4:	f001 0a07 	and.w	sl, r1, #7
				   && !sys_slist_is_empty(&mgr->monitors);
    18b8:	45aa      	cmp	sl, r5
    18ba:	f47f af3f 	bne.w	173c <process_event+0x5c>
		    || !sys_slist_is_empty(&clients)
    18be:	2f00      	cmp	r7, #0
    18c0:	d09b      	beq.n	17fa <process_event+0x11a>
			uint32_t flags = mgr->flags | ONOFF_FLAG_PROCESSING;
    18c2:	f041 0108 	orr.w	r1, r1, #8
			mgr->flags = flags;
    18c6:	8321      	strh	r1, [r4, #24]
	__asm__ volatile(
    18c8:	f388 8811 	msr	BASEPRI, r8
    18cc:	f3bf 8f6f 	isb	sy
			if (!sys_slist_is_empty(&clients)) {
    18d0:	2f00      	cmp	r7, #0
    18d2:	d0c7      	beq.n	1864 <process_event+0x184>
	return node->next;
    18d4:	683d      	ldr	r5, [r7, #0]
		notify_one(mgr, cli, state, res);
    18d6:	4639      	mov	r1, r7
    18d8:	4633      	mov	r3, r6
    18da:	4652      	mov	r2, sl
    18dc:	4620      	mov	r0, r4
    18de:	f004 fa3e 	bl	5d5e <notify_one>
	list->head = node;
    18e2:	462f      	mov	r7, r5
	while (!sys_slist_is_empty(list)) {
    18e4:	e7f4      	b.n	18d0 <process_event+0x1f0>
		} else if ((mgr->flags & ONOFF_FLAG_RECHECK) != 0) {
    18e6:	06ab      	lsls	r3, r5, #26
    18e8:	f57f af1a 	bpl.w	1720 <process_event+0x40>
			mgr->flags &= ~ONOFF_FLAG_RECHECK;
    18ec:	f025 0320 	bic.w	r3, r5, #32
			mgr->flags &= ~ONOFF_FLAG_COMPLETE;
    18f0:	8323      	strh	r3, [r4, #24]
		state = mgr->flags & ONOFF_STATE_MASK;
    18f2:	f005 0507 	and.w	r5, r5, #7
		if (evt == EVT_RECHECK) {
    18f6:	e6ff      	b.n	16f8 <process_event+0x18>
    18f8:	00005d8b 	.word	0x00005d8b

000018fc <z_cbvprintf_impl>:
 *
 * @return printed byte count if CONFIG_CBPRINTF_LIBC_SUBSTS is set
 */
int z_cbvprintf_impl(cbprintf_cb out, void *ctx, const char *fmt,
		     va_list ap, uint32_t flags)
{
    18fc:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    1900:	4682      	mov	sl, r0
	size_t count = 0;
    1902:	f04f 0900 	mov.w	r9, #0
{
    1906:	b08d      	sub	sp, #52	; 0x34
    1908:	461d      	mov	r5, r3

	const bool tagged_ap = (flags & Z_CBVPRINTF_PROCESS_FLAG_TAGGED_ARGS)
			       == Z_CBVPRINTF_PROCESS_FLAG_TAGGED_ARGS;

	/* we pre-increment in the loop  afterwards */
	fmt--;
    190a:	1e53      	subs	r3, r2, #1
{
    190c:	9101      	str	r1, [sp, #4]
	fmt--;
    190e:	9303      	str	r3, [sp, #12]

start:
	while (*++fmt != '%') {
    1910:	9b03      	ldr	r3, [sp, #12]
    1912:	7858      	ldrb	r0, [r3, #1]
    1914:	1c5c      	adds	r4, r3, #1
    1916:	2825      	cmp	r0, #37	; 0x25
    1918:	d119      	bne.n	194e <z_cbvprintf_impl+0x52>
	min_width = -1;
	precision = -1;
	prefix = "";
	padding_mode = 0;
	length_mod = 0;
	special = 0;
    191a:	2000      	movs	r0, #0
	precision = -1;
    191c:	f04f 38ff 	mov.w	r8, #4294967295

	for (fmt++ ; ; fmt++) {
    1920:	461e      	mov	r6, r3
	min_width = -1;
    1922:	4644      	mov	r4, r8
	length_mod = 0;
    1924:	4603      	mov	r3, r0
	for (fmt++ ; ; fmt++) {
    1926:	3602      	adds	r6, #2
	padding_mode = 0;
    1928:	9002      	str	r0, [sp, #8]
		switch (*fmt) {
    192a:	7831      	ldrb	r1, [r6, #0]
    192c:	9603      	str	r6, [sp, #12]
    192e:	2939      	cmp	r1, #57	; 0x39
    1930:	d855      	bhi.n	19de <z_cbvprintf_impl+0xe2>
    1932:	291f      	cmp	r1, #31
    1934:	d814      	bhi.n	1960 <z_cbvprintf_impl+0x64>
    1936:	2900      	cmp	r1, #0
    1938:	f000 81f1 	beq.w	1d1e <z_cbvprintf_impl+0x422>
			precision = 0;
			break;
		}

		default:
			OUTC('%');
    193c:	9901      	ldr	r1, [sp, #4]
    193e:	2025      	movs	r0, #37	; 0x25
    1940:	47d0      	blx	sl
			OUTC(*fmt);
    1942:	9901      	ldr	r1, [sp, #4]
    1944:	7830      	ldrb	r0, [r6, #0]
    1946:	47d0      	blx	sl
    1948:	f109 0902 	add.w	r9, r9, #2
			goto start;
    194c:	e7e0      	b.n	1910 <z_cbvprintf_impl+0x14>
		if (*fmt == '\0') {
    194e:	2800      	cmp	r0, #0
    1950:	f000 81e5 	beq.w	1d1e <z_cbvprintf_impl+0x422>
		OUTC(*fmt);
    1954:	9901      	ldr	r1, [sp, #4]
    1956:	47d0      	blx	sl
    1958:	f109 0901 	add.w	r9, r9, #1
	while (*++fmt != '%') {
    195c:	9403      	str	r4, [sp, #12]
    195e:	e7d7      	b.n	1910 <z_cbvprintf_impl+0x14>
		switch (*fmt) {
    1960:	f1a1 0220 	sub.w	r2, r1, #32
    1964:	2a19      	cmp	r2, #25
    1966:	d8e9      	bhi.n	193c <z_cbvprintf_impl+0x40>
    1968:	a701      	add	r7, pc, #4	; (adr r7, 1970 <z_cbvprintf_impl+0x74>)
    196a:	f857 f022 	ldr.w	pc, [r7, r2, lsl #2]
    196e:	bf00      	nop
    1970:	000019d9 	.word	0x000019d9
    1974:	0000193d 	.word	0x0000193d
    1978:	0000193d 	.word	0x0000193d
    197c:	000019d9 	.word	0x000019d9
    1980:	0000193d 	.word	0x0000193d
    1984:	00001a59 	.word	0x00001a59
    1988:	0000193d 	.word	0x0000193d
    198c:	0000193d 	.word	0x0000193d
    1990:	0000193d 	.word	0x0000193d
    1994:	0000193d 	.word	0x0000193d
    1998:	00001aa5 	.word	0x00001aa5
    199c:	000019d9 	.word	0x000019d9
    19a0:	0000193d 	.word	0x0000193d
    19a4:	00001ab9 	.word	0x00001ab9
    19a8:	00001a65 	.word	0x00001a65
    19ac:	0000193d 	.word	0x0000193d
    19b0:	00001a73 	.word	0x00001a73
    19b4:	00001a93 	.word	0x00001a93
    19b8:	00001a93 	.word	0x00001a93
    19bc:	00001a93 	.word	0x00001a93
    19c0:	00001a93 	.word	0x00001a93
    19c4:	00001a93 	.word	0x00001a93
    19c8:	00001a93 	.word	0x00001a93
    19cc:	00001a93 	.word	0x00001a93
    19d0:	00001a93 	.word	0x00001a93
    19d4:	00001a93 	.word	0x00001a93
    19d8:	4608      	mov	r0, r1
    19da:	3601      	adds	r6, #1
    19dc:	e7a5      	b.n	192a <z_cbvprintf_impl+0x2e>
    19de:	2958      	cmp	r1, #88	; 0x58
    19e0:	f000 80ee 	beq.w	1bc0 <z_cbvprintf_impl+0x2c4>
    19e4:	f1a1 0263 	sub.w	r2, r1, #99	; 0x63
    19e8:	b2d7      	uxtb	r7, r2
    19ea:	2f17      	cmp	r7, #23
    19ec:	d8a6      	bhi.n	193c <z_cbvprintf_impl+0x40>
    19ee:	2a17      	cmp	r2, #23
    19f0:	d8a4      	bhi.n	193c <z_cbvprintf_impl+0x40>
    19f2:	a701      	add	r7, pc, #4	; (adr r7, 19f8 <z_cbvprintf_impl+0xfc>)
    19f4:	f857 f022 	ldr.w	pc, [r7, r2, lsl #2]
    19f8:	00001c67 	.word	0x00001c67
    19fc:	00001adf 	.word	0x00001adf
    1a00:	0000193d 	.word	0x0000193d
    1a04:	0000193d 	.word	0x0000193d
    1a08:	0000193d 	.word	0x0000193d
    1a0c:	00001abf 	.word	0x00001abf
    1a10:	00001adf 	.word	0x00001adf
    1a14:	0000193d 	.word	0x0000193d
    1a18:	0000193d 	.word	0x0000193d
    1a1c:	00001abf 	.word	0x00001abf
    1a20:	0000193d 	.word	0x0000193d
    1a24:	0000193d 	.word	0x0000193d
    1a28:	0000193d 	.word	0x0000193d
    1a2c:	00001b9b 	.word	0x00001b9b
    1a30:	0000193d 	.word	0x0000193d
    1a34:	0000193d 	.word	0x0000193d
    1a38:	00001c3b 	.word	0x00001c3b
    1a3c:	0000193d 	.word	0x0000193d
    1a40:	00001adf 	.word	0x00001adf
    1a44:	0000193d 	.word	0x0000193d
    1a48:	0000193d 	.word	0x0000193d
    1a4c:	00001b9b 	.word	0x00001b9b
    1a50:	0000193d 	.word	0x0000193d
    1a54:	00001abf 	.word	0x00001abf
			OUTC('%');
    1a58:	2025      	movs	r0, #37	; 0x25
    1a5a:	9901      	ldr	r1, [sp, #4]
    1a5c:	47d0      	blx	sl
    1a5e:	f109 0901 	add.w	r9, r9, #1
			goto start;
    1a62:	e755      	b.n	1910 <z_cbvprintf_impl+0x14>
			padding_mode &= (char)~PAD_ZERO;
    1a64:	9a02      	ldr	r2, [sp, #8]
			precision = 0;
    1a66:	f04f 0800 	mov.w	r8, #0
			padding_mode &= (char)~PAD_ZERO;
    1a6a:	f002 02fe 	and.w	r2, r2, #254	; 0xfe
    1a6e:	9202      	str	r2, [sp, #8]
			continue;
    1a70:	e7b3      	b.n	19da <z_cbvprintf_impl+0xde>
			if (min_width < 0 && precision < 0 && !padding_mode) {
    1a72:	2c00      	cmp	r4, #0
    1a74:	da0d      	bge.n	1a92 <z_cbvprintf_impl+0x196>
    1a76:	f1b8 0f00 	cmp.w	r8, #0
    1a7a:	da0d      	bge.n	1a98 <z_cbvprintf_impl+0x19c>
    1a7c:	9a02      	ldr	r2, [sp, #8]
    1a7e:	2a00      	cmp	r2, #0
    1a80:	f000 8145 	beq.w	1d0e <z_cbvprintf_impl+0x412>
				min_width = 10 * min_width + *fmt - '0';
    1a84:	220a      	movs	r2, #10
				if (min_width < 0) {
    1a86:	ea24 74e4 	bic.w	r4, r4, r4, asr #31
				min_width = 10 * min_width + *fmt - '0';
    1a8a:	fb02 1404 	mla	r4, r2, r4, r1
    1a8e:	3c30      	subs	r4, #48	; 0x30
    1a90:	e7a3      	b.n	19da <z_cbvprintf_impl+0xde>
			if (precision >= 0) {
    1a92:	f1b8 0f00 	cmp.w	r8, #0
    1a96:	dbf5      	blt.n	1a84 <z_cbvprintf_impl+0x188>
				precision = 10 * precision + *fmt - '0';
    1a98:	220a      	movs	r2, #10
    1a9a:	fb02 1208 	mla	r2, r2, r8, r1
    1a9e:	f1a2 0830 	sub.w	r8, r2, #48	; 0x30
    1aa2:	e79a      	b.n	19da <z_cbvprintf_impl+0xde>
			if (precision >= 0) {
    1aa4:	f1b8 0f00 	cmp.w	r8, #0
				precision = va_arg(ap, int);
    1aa8:	f855 2b04 	ldr.w	r2, [r5], #4
			if (precision >= 0) {
    1aac:	f280 8131 	bge.w	1d12 <z_cbvprintf_impl+0x416>
				if (min_width < 0) {
    1ab0:	2a00      	cmp	r2, #0
    1ab2:	f280 8130 	bge.w	1d16 <z_cbvprintf_impl+0x41a>
					min_width = -min_width;
    1ab6:	4254      	negs	r4, r2
		switch (*fmt) {
    1ab8:	2202      	movs	r2, #2
				padding_mode = PAD_ZERO;
    1aba:	9202      	str	r2, [sp, #8]
    1abc:	e78d      	b.n	19da <z_cbvprintf_impl+0xde>
			if (*fmt == 'h' && length_mod == 'h') {
    1abe:	2968      	cmp	r1, #104	; 0x68
    1ac0:	d103      	bne.n	1aca <z_cbvprintf_impl+0x1ce>
    1ac2:	2b68      	cmp	r3, #104	; 0x68
    1ac4:	d106      	bne.n	1ad4 <z_cbvprintf_impl+0x1d8>
				length_mod = 'H';
    1ac6:	2348      	movs	r3, #72	; 0x48
    1ac8:	e787      	b.n	19da <z_cbvprintf_impl+0xde>
			} else if (*fmt == 'l' && length_mod == 'l') {
    1aca:	296c      	cmp	r1, #108	; 0x6c
    1acc:	d102      	bne.n	1ad4 <z_cbvprintf_impl+0x1d8>
    1ace:	2b6c      	cmp	r3, #108	; 0x6c
    1ad0:	f000 8123 	beq.w	1d1a <z_cbvprintf_impl+0x41e>
			} else if (length_mod == '\0') {
    1ad4:	2b00      	cmp	r3, #0
    1ad6:	f47f af31 	bne.w	193c <z_cbvprintf_impl+0x40>
		switch (*fmt) {
    1ada:	460b      	mov	r3, r1
    1adc:	e77d      	b.n	19da <z_cbvprintf_impl+0xde>
			if (length_mod == 'z') {
    1ade:	2b7a      	cmp	r3, #122	; 0x7a
    1ae0:	d106      	bne.n	1af0 <z_cbvprintf_impl+0x1f4>
			} else if (*fmt == 'u') {
    1ae2:	2975      	cmp	r1, #117	; 0x75
				precision = va_arg(ap, int);
    1ae4:	f855 6b04 	ldr.w	r6, [r5], #4
			} else if (*fmt == 'u') {
    1ae8:	d114      	bne.n	1b14 <z_cbvprintf_impl+0x218>
				d = va_arg(ap, unsigned int);
    1aea:	f04f 0b00 	mov.w	fp, #0
			if (*fmt != 'u' && (int_value_type)d < 0) {
    1aee:	e00c      	b.n	1b0a <z_cbvprintf_impl+0x20e>
			} else if (length_mod == 'l') {
    1af0:	2b6c      	cmp	r3, #108	; 0x6c
    1af2:	d0f6      	beq.n	1ae2 <z_cbvprintf_impl+0x1e6>
			} else if (length_mod == 'L') {
    1af4:	2b4c      	cmp	r3, #76	; 0x4c
    1af6:	d1f4      	bne.n	1ae2 <z_cbvprintf_impl+0x1e6>
					unsigned long long llu =
    1af8:	3507      	adds	r5, #7
    1afa:	f025 0307 	bic.w	r3, r5, #7
				if (*fmt == 'u') {
    1afe:	2975      	cmp	r1, #117	; 0x75
					unsigned long long llu =
    1b00:	f103 0508 	add.w	r5, r3, #8
    1b04:	e9d3 6b00 	ldrd	r6, fp, [r3]
				if (*fmt == 'u') {
    1b08:	d106      	bne.n	1b18 <z_cbvprintf_impl+0x21c>
			} else if (special == ' ') {
    1b0a:	2820      	cmp	r0, #32
    1b0c:	d13e      	bne.n	1b8c <z_cbvprintf_impl+0x290>
				prefix = " ";
    1b0e:	4f86      	ldr	r7, [pc, #536]	; (1d28 <z_cbvprintf_impl+0x42c>)
				min_width--;
    1b10:	3c01      	subs	r4, #1
    1b12:	e009      	b.n	1b28 <z_cbvprintf_impl+0x22c>
				d = va_arg(ap, int);
    1b14:	ea4f 7be6 	mov.w	fp, r6, asr #31
			if (*fmt != 'u' && (int_value_type)d < 0) {
    1b18:	f1bb 0f00 	cmp.w	fp, #0
    1b1c:	daf5      	bge.n	1b0a <z_cbvprintf_impl+0x20e>
				d = -d;
    1b1e:	4276      	negs	r6, r6
				prefix = "-";
    1b20:	4f82      	ldr	r7, [pc, #520]	; (1d2c <z_cbvprintf_impl+0x430>)
				d = -d;
    1b22:	eb6b 0b4b 	sbc.w	fp, fp, fp, lsl #1
				min_width--;
    1b26:	3c01      	subs	r4, #1
	int i = 0;
    1b28:	f10d 032d 	add.w	r3, sp, #45	; 0x2d
    1b2c:	9305      	str	r3, [sp, #20]
    1b2e:	2300      	movs	r3, #0
    1b30:	9304      	str	r3, [sp, #16]
		unsigned int c = num % base;
    1b32:	4630      	mov	r0, r6
    1b34:	4659      	mov	r1, fp
    1b36:	220a      	movs	r2, #10
    1b38:	2300      	movs	r3, #0
    1b3a:	f7fe fb03 	bl	144 <__aeabi_uldivmod>
		buftop[--i] = c + '0';
    1b3e:	9b04      	ldr	r3, [sp, #16]
    1b40:	3230      	adds	r2, #48	; 0x30
    1b42:	f103 3cff 	add.w	ip, r3, #4294967295
    1b46:	f8cd c010 	str.w	ip, [sp, #16]
    1b4a:	f8dd c014 	ldr.w	ip, [sp, #20]
    1b4e:	f80c 2d01 	strb.w	r2, [ip, #-1]!
    1b52:	f8cd c014 	str.w	ip, [sp, #20]
		num /= base;
    1b56:	46b4      	mov	ip, r6
    1b58:	465a      	mov	r2, fp
	} while (num);
    1b5a:	f1bc 0f0a 	cmp.w	ip, #10
    1b5e:	f172 0200 	sbcs.w	r2, r2, #0
		num /= base;
    1b62:	4606      	mov	r6, r0
    1b64:	468b      	mov	fp, r1
	} while (num);
    1b66:	d2e4      	bcs.n	1b32 <z_cbvprintf_impl+0x236>
	return -i;
    1b68:	f1c3 0b01 	rsb	fp, r3, #1
			data = buf + sizeof(buf) - data_len;
    1b6c:	3330      	adds	r3, #48	; 0x30
			data = buf + sizeof(buf) - data_len;
    1b6e:	eb0d 0603 	add.w	r6, sp, r3
		}

		if (precision < 0 && (padding_mode & PAD_ZERO)) {
    1b72:	f1b8 0f00 	cmp.w	r8, #0
			data = buf + sizeof(buf) - data_len;
    1b76:	f1a6 0604 	sub.w	r6, r6, #4
		if (precision < 0 && (padding_mode & PAD_ZERO)) {
    1b7a:	da6d      	bge.n	1c58 <z_cbvprintf_impl+0x35c>
    1b7c:	9b02      	ldr	r3, [sp, #8]
    1b7e:	07d9      	lsls	r1, r3, #31
    1b80:	d47c      	bmi.n	1c7c <z_cbvprintf_impl+0x380>
			precision = min_width;
		}
		min_width -= data_len;
		precision -= data_len;
    1b82:	eba8 030b 	sub.w	r3, r8, fp
		min_width -= data_len;
    1b86:	eba4 040b 	sub.w	r4, r4, fp
    1b8a:	e013      	b.n	1bb4 <z_cbvprintf_impl+0x2b8>
			} else if (special == '+') {
    1b8c:	282b      	cmp	r0, #43	; 0x2b
				prefix = "+";
    1b8e:	bf0a      	itet	eq
    1b90:	4f67      	ldreq	r7, [pc, #412]	; (1d30 <z_cbvprintf_impl+0x434>)
	prefix = "";
    1b92:	4f68      	ldrne	r7, [pc, #416]	; (1d34 <z_cbvprintf_impl+0x438>)
				min_width--;
    1b94:	f104 34ff 	addeq.w	r4, r4, #4294967295
    1b98:	e7c6      	b.n	1b28 <z_cbvprintf_impl+0x22c>
			if (*fmt == 'p') {
    1b9a:	2970      	cmp	r1, #112	; 0x70
    1b9c:	d10f      	bne.n	1bbe <z_cbvprintf_impl+0x2c2>
				x = (uintptr_t)va_arg(ap, void *);
    1b9e:	f855 2b04 	ldr.w	r2, [r5], #4
    1ba2:	2300      	movs	r3, #0
				if (x == (uint_value_type)0) {
    1ba4:	b9fa      	cbnz	r2, 1be6 <z_cbvprintf_impl+0x2ea>
		precision -= data_len;
    1ba6:	f06f 0304 	mvn.w	r3, #4
					data_len = 5;
    1baa:	f04f 0b05 	mov.w	fp, #5
					data = "(nil)";
    1bae:	4e62      	ldr	r6, [pc, #392]	; (1d38 <z_cbvprintf_impl+0x43c>)
		min_width -= data_len;
    1bb0:	3c05      	subs	r4, #5
	prefix = "";
    1bb2:	4f60      	ldr	r7, [pc, #384]	; (1d34 <z_cbvprintf_impl+0x438>)
		if (precision > 0) {
			min_width -= precision;
		}

		if (!(padding_mode & PAD_TAIL)) {
    1bb4:	9a02      	ldr	r2, [sp, #8]
    1bb6:	0792      	lsls	r2, r2, #30
    1bb8:	d46f      	bmi.n	1c9a <z_cbvprintf_impl+0x39e>
    1bba:	46a0      	mov	r8, r4
    1bbc:	e065      	b.n	1c8a <z_cbvprintf_impl+0x38e>
		switch (*fmt) {
    1bbe:	2178      	movs	r1, #120	; 0x78
			} else if (length_mod == 'l') {
    1bc0:	2b6c      	cmp	r3, #108	; 0x6c
    1bc2:	d103      	bne.n	1bcc <z_cbvprintf_impl+0x2d0>
				x = va_arg(ap, unsigned int);
    1bc4:	2300      	movs	r3, #0
    1bc6:	f855 2b04 	ldr.w	r2, [r5], #4
    1bca:	e008      	b.n	1bde <z_cbvprintf_impl+0x2e2>
			} else if (length_mod == 'L') {
    1bcc:	2b4c      	cmp	r3, #76	; 0x4c
    1bce:	d1f9      	bne.n	1bc4 <z_cbvprintf_impl+0x2c8>
				unsigned long long llx =
    1bd0:	3507      	adds	r5, #7
    1bd2:	f025 0307 	bic.w	r3, r5, #7
    1bd6:	461d      	mov	r5, r3
    1bd8:	685b      	ldr	r3, [r3, #4]
    1bda:	f855 2b08 	ldr.w	r2, [r5], #8
			if (special == '#') {
    1bde:	2823      	cmp	r0, #35	; 0x23
    1be0:	d125      	bne.n	1c2e <z_cbvprintf_impl+0x332>
				prefix = (*fmt & 0x20) ? "0x" : "0X";
    1be2:	0688      	lsls	r0, r1, #26
    1be4:	d521      	bpl.n	1c2a <z_cbvprintf_impl+0x32e>
    1be6:	4f55      	ldr	r7, [pc, #340]	; (1d3c <z_cbvprintf_impl+0x440>)
				min_width -= 2;
    1be8:	3c02      	subs	r4, #2
	int i = 0;
    1bea:	2600      	movs	r6, #0
			data_len = convert_value(x, 16, ALPHA(*fmt),
    1bec:	f001 0160 	and.w	r1, r1, #96	; 0x60
    1bf0:	f1a1 0b39 	sub.w	fp, r1, #57	; 0x39
	int i = 0;
    1bf4:	f10d 0e2d 	add.w	lr, sp, #45	; 0x2d
		unsigned int c = num % base;
    1bf8:	f002 010f 	and.w	r1, r2, #15
		if (c >= 10) {
    1bfc:	2909      	cmp	r1, #9
			c += alpha;
    1bfe:	bf88      	it	hi
    1c00:	4459      	addhi	r1, fp
		buftop[--i] = c + '0';
    1c02:	3130      	adds	r1, #48	; 0x30
    1c04:	f80e 1d01 	strb.w	r1, [lr, #-1]!
	} while (num);
    1c08:	2a10      	cmp	r2, #16
		num /= base;
    1c0a:	ea4f 1112 	mov.w	r1, r2, lsr #4
    1c0e:	ea41 7103 	orr.w	r1, r1, r3, lsl #28
    1c12:	ea4f 1013 	mov.w	r0, r3, lsr #4
	} while (num);
    1c16:	f173 0300 	sbcs.w	r3, r3, #0
		buftop[--i] = c + '0';
    1c1a:	f106 3cff 	add.w	ip, r6, #4294967295
	} while (num);
    1c1e:	d208      	bcs.n	1c32 <z_cbvprintf_impl+0x336>
	return -i;
    1c20:	f1c6 0b01 	rsb	fp, r6, #1
			data = buf + sizeof(buf) - data_len;
    1c24:	f106 0330 	add.w	r3, r6, #48	; 0x30
    1c28:	e7a1      	b.n	1b6e <z_cbvprintf_impl+0x272>
				prefix = (*fmt & 0x20) ? "0x" : "0X";
    1c2a:	4f45      	ldr	r7, [pc, #276]	; (1d40 <z_cbvprintf_impl+0x444>)
    1c2c:	e7dc      	b.n	1be8 <z_cbvprintf_impl+0x2ec>
	prefix = "";
    1c2e:	4f41      	ldr	r7, [pc, #260]	; (1d34 <z_cbvprintf_impl+0x438>)
    1c30:	e7db      	b.n	1bea <z_cbvprintf_impl+0x2ee>
		buftop[--i] = c + '0';
    1c32:	4666      	mov	r6, ip
		num /= base;
    1c34:	460a      	mov	r2, r1
    1c36:	4603      	mov	r3, r0
    1c38:	e7de      	b.n	1bf8 <z_cbvprintf_impl+0x2fc>
			data = va_arg(ap, char *);
    1c3a:	f855 6b04 	ldr.w	r6, [r5], #4
			data_len = strlen(data);
    1c3e:	4630      	mov	r0, r6
    1c40:	f004 fc7c 	bl	653c <strlen>
			if (precision >= 0 && data_len > precision) {
    1c44:	f1b8 0f00 	cmp.w	r8, #0
			data_len = strlen(data);
    1c48:	4683      	mov	fp, r0
			if (precision >= 0 && data_len > precision) {
    1c4a:	db02      	blt.n	1c52 <z_cbvprintf_impl+0x356>
    1c4c:	4540      	cmp	r0, r8
    1c4e:	bfa8      	it	ge
    1c50:	46c3      	movge	fp, r8
			precision = 0;
    1c52:	f04f 0800 	mov.w	r8, #0
	prefix = "";
    1c56:	4f37      	ldr	r7, [pc, #220]	; (1d34 <z_cbvprintf_impl+0x438>)
		precision -= data_len;
    1c58:	eba8 030b 	sub.w	r3, r8, fp
		if (precision > 0) {
    1c5c:	2b00      	cmp	r3, #0
    1c5e:	dd92      	ble.n	1b86 <z_cbvprintf_impl+0x28a>
			min_width -= precision;
    1c60:	eba4 0408 	sub.w	r4, r4, r8
    1c64:	e7a6      	b.n	1bb4 <z_cbvprintf_impl+0x2b8>
			buf[0] = c;
    1c66:	f855 3b04 	ldr.w	r3, [r5], #4
			data_len = 1;
    1c6a:	f04f 0b01 	mov.w	fp, #1
			buf[0] = c;
    1c6e:	f88d 3018 	strb.w	r3, [sp, #24]
		min_width -= data_len;
    1c72:	3c01      	subs	r4, #1
		precision -= data_len;
    1c74:	f04f 33ff 	mov.w	r3, #4294967295
			data = buf;
    1c78:	ae06      	add	r6, sp, #24
    1c7a:	e79a      	b.n	1bb2 <z_cbvprintf_impl+0x2b6>
    1c7c:	46a0      	mov	r8, r4
    1c7e:	e7eb      	b.n	1c58 <z_cbvprintf_impl+0x35c>
    1c80:	9302      	str	r3, [sp, #8]
			while (--min_width >= 0) {
				OUTC(' ');
    1c82:	2020      	movs	r0, #32
    1c84:	9901      	ldr	r1, [sp, #4]
    1c86:	47d0      	blx	sl
    1c88:	9b02      	ldr	r3, [sp, #8]
			while (--min_width >= 0) {
    1c8a:	f1b8 0801 	subs.w	r8, r8, #1
    1c8e:	d5f7      	bpl.n	1c80 <z_cbvprintf_impl+0x384>
    1c90:	ea24 72e4 	bic.w	r2, r4, r4, asr #31
    1c94:	3c01      	subs	r4, #1
    1c96:	4491      	add	r9, r2
    1c98:	1aa4      	subs	r4, r4, r2
    1c9a:	46b8      	mov	r8, r7
    1c9c:	e006      	b.n	1cac <z_cbvprintf_impl+0x3b0>
    1c9e:	9304      	str	r3, [sp, #16]
    1ca0:	9202      	str	r2, [sp, #8]
			}
		}
		while (*prefix) {
			OUTC(*prefix++);
    1ca2:	9901      	ldr	r1, [sp, #4]
    1ca4:	47d0      	blx	sl
    1ca6:	9a02      	ldr	r2, [sp, #8]
    1ca8:	9b04      	ldr	r3, [sp, #16]
    1caa:	4690      	mov	r8, r2
		while (*prefix) {
    1cac:	4642      	mov	r2, r8
    1cae:	f812 0b01 	ldrb.w	r0, [r2], #1
    1cb2:	2800      	cmp	r0, #0
    1cb4:	d1f3      	bne.n	1c9e <z_cbvprintf_impl+0x3a2>
    1cb6:	461a      	mov	r2, r3
		}
		while (--precision >= 0) {
    1cb8:	3a01      	subs	r2, #1
    1cba:	d515      	bpl.n	1ce8 <z_cbvprintf_impl+0x3ec>
    1cbc:	2b00      	cmp	r3, #0
    1cbe:	bfac      	ite	ge
    1cc0:	ebc7 0703 	rsbge	r7, r7, r3
    1cc4:	427f      	neglt	r7, r7
    1cc6:	465b      	mov	r3, fp
			OUTC('0');
		}
		while (--data_len >= 0) {
    1cc8:	3b01      	subs	r3, #1
    1cca:	d515      	bpl.n	1cf8 <z_cbvprintf_impl+0x3fc>
    1ccc:	f1bb 0f00 	cmp.w	fp, #0
    1cd0:	bfa8      	it	ge
    1cd2:	445f      	addge	r7, fp
    1cd4:	4626      	mov	r6, r4
    1cd6:	444f      	add	r7, r9
			OUTC(*data++);
		}
		while (--min_width >= 0) {
    1cd8:	3e01      	subs	r6, #1
    1cda:	d514      	bpl.n	1d06 <z_cbvprintf_impl+0x40a>
    1cdc:	2c00      	cmp	r4, #0
    1cde:	bfa8      	it	ge
    1ce0:	193f      	addge	r7, r7, r4
    1ce2:	eb07 0908 	add.w	r9, r7, r8
    1ce6:	e613      	b.n	1910 <z_cbvprintf_impl+0x14>
    1ce8:	9304      	str	r3, [sp, #16]
    1cea:	9202      	str	r2, [sp, #8]
			OUTC('0');
    1cec:	2030      	movs	r0, #48	; 0x30
    1cee:	9901      	ldr	r1, [sp, #4]
    1cf0:	47d0      	blx	sl
    1cf2:	9b04      	ldr	r3, [sp, #16]
    1cf4:	9a02      	ldr	r2, [sp, #8]
    1cf6:	e7df      	b.n	1cb8 <z_cbvprintf_impl+0x3bc>
    1cf8:	9302      	str	r3, [sp, #8]
			OUTC(*data++);
    1cfa:	9901      	ldr	r1, [sp, #4]
    1cfc:	f816 0b01 	ldrb.w	r0, [r6], #1
    1d00:	47d0      	blx	sl
    1d02:	9b02      	ldr	r3, [sp, #8]
    1d04:	e7e0      	b.n	1cc8 <z_cbvprintf_impl+0x3cc>
			OUTC(' ');
    1d06:	9901      	ldr	r1, [sp, #4]
    1d08:	2020      	movs	r0, #32
    1d0a:	47d0      	blx	sl
    1d0c:	e7e4      	b.n	1cd8 <z_cbvprintf_impl+0x3dc>
				padding_mode = PAD_ZERO;
    1d0e:	2201      	movs	r2, #1
    1d10:	e6d3      	b.n	1aba <z_cbvprintf_impl+0x1be>
				precision = va_arg(ap, int);
    1d12:	4690      	mov	r8, r2
    1d14:	e661      	b.n	19da <z_cbvprintf_impl+0xde>
    1d16:	4614      	mov	r4, r2
    1d18:	e65f      	b.n	19da <z_cbvprintf_impl+0xde>
				length_mod = 'L';
    1d1a:	234c      	movs	r3, #76	; 0x4c
    1d1c:	e65d      	b.n	19da <z_cbvprintf_impl+0xde>
		}

		goto start;
	}
}
    1d1e:	4648      	mov	r0, r9
    1d20:	b00d      	add	sp, #52	; 0x34
    1d22:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    1d26:	bf00      	nop
    1d28:	0000989e 	.word	0x0000989e
    1d2c:	000093d3 	.word	0x000093d3
    1d30:	000093d5 	.word	0x000093d5
    1d34:	00009bd8 	.word	0x00009bd8
    1d38:	000093dd 	.word	0x000093dd
    1d3c:	000093d7 	.word	0x000093d7
    1d40:	000093da 	.word	0x000093da

00001d44 <sys_reboot>:
#include <zephyr/sys/printk.h>

extern void sys_arch_reboot(int type);

FUNC_NORETURN void sys_reboot(int type)
{
    1d44:	b508      	push	{r3, lr}
	__asm__ volatile(
    1d46:	f04f 0220 	mov.w	r2, #32
    1d4a:	f3ef 8311 	mrs	r3, BASEPRI
    1d4e:	f382 8812 	msr	BASEPRI_MAX, r2
    1d52:	f3bf 8f6f 	isb	sy
	(void)irq_lock();
	sys_clock_disable();

	sys_arch_reboot(type);
    1d56:	f001 f935 	bl	2fc4 <sys_arch_reboot>

	/* should never get here */
	printk("Failed to reboot: spinning endlessly...\n");
    1d5a:	4803      	ldr	r0, [pc, #12]	; (1d68 <sys_reboot+0x24>)
    1d5c:	f003 ffc6 	bl	5cec <printk>
 * @note In some architectures, before returning, the function unmasks interrupts
 * unconditionally.
 */
static inline void k_cpu_idle(void)
{
	arch_cpu_idle();
    1d60:	f000 fe22 	bl	29a8 <arch_cpu_idle>
    1d64:	e7fc      	b.n	1d60 <sys_reboot+0x1c>
    1d66:	bf00      	nop
    1d68:	000093e3 	.word	0x000093e3

00001d6c <nordicsemi_nrf91_init>:
    1d6c:	f04f 0220 	mov.w	r2, #32
    1d70:	f3ef 8311 	mrs	r3, BASEPRI
    1d74:	f382 8812 	msr	BASEPRI_MAX, r2
    1d78:	f3bf 8f6f 	isb	sy

	key = irq_lock();

#ifdef CONFIG_NRF_ENABLE_ICACHE
	/* Enable the instruction cache */
	NRF_NVMC->ICACHECNF = NVMC_ICACHECNF_CACHEEN_Msk;
    1d7c:	2101      	movs	r1, #1
    1d7e:	4a04      	ldr	r2, [pc, #16]	; (1d90 <nordicsemi_nrf91_init+0x24>)
    1d80:	f8c2 1540 	str.w	r1, [r2, #1344]	; 0x540
	__asm__ volatile(
    1d84:	f383 8811 	msr	BASEPRI, r3
    1d88:	f3bf 8f6f 	isb	sy
	NMI_INIT();

	irq_unlock(key);

	return 0;
}
    1d8c:	2000      	movs	r0, #0
    1d8e:	4770      	bx	lr
    1d90:	50039000 	.word	0x50039000

00001d94 <arch_busy_wait>:

#else // NRFX_CHECK(NRFX_DELAY_DWT_BASED)

NRF_STATIC_INLINE void nrfx_coredep_delay_us(uint32_t time_us)
{
    if (time_us == 0)
    1d94:	b120      	cbz	r0, 1da0 <arch_busy_wait+0xc>
    typedef void (* delay_func_t)(uint32_t);
    const delay_func_t delay_cycles =
        // Set LSB to 1 to execute the code in the Thumb mode.
        (delay_func_t)((((uint32_t)delay_machine_code) | 1));
    uint32_t cycles = time_us * NRFX_DELAY_CPU_FREQ_MHZ;
    delay_cycles(cycles);
    1d96:	4b03      	ldr	r3, [pc, #12]	; (1da4 <arch_busy_wait+0x10>)
    1d98:	0180      	lsls	r0, r0, #6
    1d9a:	f043 0301 	orr.w	r3, r3, #1
    1d9e:	4718      	bx	r3

void arch_busy_wait(uint32_t time_us)
{
	nrfx_coredep_delay_us(time_us);
}
    1da0:	4770      	bx	lr
    1da2:	bf00      	nop
    1da4:	000089c0 	.word	0x000089c0

00001da8 <z_arm_platform_init>:
	 */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
	ldr r0, =SystemInit
	bx r0
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	b SystemInit
    1da8:	f002 bd14 	b.w	47d4 <SystemInit>

00001dac <flash_area_open>:
		user_cb(&flash_map[i], user_data);
	}
}

int flash_area_open(uint8_t id, const struct flash_area **fap)
{
    1dac:	b570      	push	{r4, r5, r6, lr}
	const struct flash_area *area;

	if (flash_map == NULL) {
    1dae:	4b11      	ldr	r3, [pc, #68]	; (1df4 <flash_area_open+0x48>)
{
    1db0:	460d      	mov	r5, r1
	if (flash_map == NULL) {
    1db2:	681c      	ldr	r4, [r3, #0]
    1db4:	b1dc      	cbz	r4, 1dee <flash_area_open+0x42>
extern const struct flash_area *flash_map;
extern const int flash_map_entries;

static inline struct flash_area const *get_flash_area_from_id(int idx)
{
	for (int i = 0; i < flash_map_entries; i++) {
    1db6:	4b10      	ldr	r3, [pc, #64]	; (1df8 <flash_area_open+0x4c>)
    1db8:	6819      	ldr	r1, [r3, #0]
    1dba:	2300      	movs	r3, #0
    1dbc:	428b      	cmp	r3, r1
    1dbe:	db02      	blt.n	1dc6 <flash_area_open+0x1a>
		return -EACCES;
	}

	area = get_flash_area_from_id(id);
	if (area == NULL) {
		return -ENOENT;
    1dc0:	f06f 0001 	mvn.w	r0, #1
	}

	*fap = area;

	return 0;
}
    1dc4:	bd70      	pop	{r4, r5, r6, pc}
		if (flash_map[i].fa_id == idx) {
    1dc6:	4622      	mov	r2, r4
    1dc8:	f812 6b10 	ldrb.w	r6, [r2], #16
    1dcc:	4286      	cmp	r6, r0
    1dce:	d002      	beq.n	1dd6 <flash_area_open+0x2a>
	for (int i = 0; i < flash_map_entries; i++) {
    1dd0:	4614      	mov	r4, r2
    1dd2:	3301      	adds	r3, #1
    1dd4:	e7f2      	b.n	1dbc <flash_area_open+0x10>
	if (!area->fa_dev || !device_is_ready(area->fa_dev)) {
    1dd6:	68e0      	ldr	r0, [r4, #12]
    1dd8:	b910      	cbnz	r0, 1de0 <flash_area_open+0x34>
		return -ENODEV;
    1dda:	f06f 0012 	mvn.w	r0, #18
    1dde:	e7f1      	b.n	1dc4 <flash_area_open+0x18>
    1de0:	f006 fc2d 	bl	863e <z_device_is_ready>
	if (!area->fa_dev || !device_is_ready(area->fa_dev)) {
    1de4:	2800      	cmp	r0, #0
    1de6:	d0f8      	beq.n	1dda <flash_area_open+0x2e>
	return 0;
    1de8:	2000      	movs	r0, #0
	*fap = area;
    1dea:	602c      	str	r4, [r5, #0]
	return 0;
    1dec:	e7ea      	b.n	1dc4 <flash_area_open+0x18>
		return -EACCES;
    1dee:	f06f 000c 	mvn.w	r0, #12
    1df2:	e7e7      	b.n	1dc4 <flash_area_open+0x18>
    1df4:	2000c4f4 	.word	0x2000c4f4
    1df8:	000089e0 	.word	0x000089e0

00001dfc <flash_area_get_sectors>:

	return true;
}

int flash_area_get_sectors(int idx, uint32_t *cnt, struct flash_sector *ret)
{
    1dfc:	b570      	push	{r4, r5, r6, lr}
    1dfe:	b088      	sub	sp, #32
    1e00:	4605      	mov	r5, r0
    1e02:	460c      	mov	r4, r1
	int rc = flash_area_open(idx, &fa);
    1e04:	b2c0      	uxtb	r0, r0
    1e06:	4669      	mov	r1, sp
{
    1e08:	4616      	mov	r6, r2
	int rc = flash_area_open(idx, &fa);
    1e0a:	f7ff ffcf 	bl	1dac <flash_area_open>
	if (rc < 0 || fa == NULL) {
    1e0e:	2800      	cmp	r0, #0
    1e10:	db1b      	blt.n	1e4a <flash_area_get_sectors+0x4e>
    1e12:	9800      	ldr	r0, [sp, #0]
    1e14:	b1c8      	cbz	r0, 1e4a <flash_area_get_sectors+0x4e>
	cb_data->area_off = fa->fa_off;
    1e16:	6843      	ldr	r3, [r0, #4]
	cb_data->ret_len = *cnt;
    1e18:	6822      	ldr	r2, [r4, #0]
	cb_data->area_off = fa->fa_off;
    1e1a:	9302      	str	r3, [sp, #8]
	cb_data->area_len = fa->fa_size;
    1e1c:	6883      	ldr	r3, [r0, #8]
	cb_data->area_idx = idx;
    1e1e:	9501      	str	r5, [sp, #4]
	cb_data->ret = ret;
    1e20:	e9cd 3603 	strd	r3, r6, [sp, #12]
	cb_data->ret_idx = 0U;
    1e24:	2300      	movs	r3, #0
	cb_data->status = 0;
    1e26:	e9cd 2306 	strd	r2, r3, [sp, #24]
	cb_data->ret_idx = 0U;
    1e2a:	9305      	str	r3, [sp, #20]
	flash_dev = fa->fa_dev;
    1e2c:	68c5      	ldr	r5, [r0, #12]
	flash_area_close(fa);
    1e2e:	f004 f851 	bl	5ed4 <flash_area_close>
	if (flash_dev == NULL) {
    1e32:	b16d      	cbz	r5, 1e50 <flash_area_get_sectors+0x54>
	flash_page_foreach(flash_dev, cb, cb_data);
    1e34:	4628      	mov	r0, r5
    1e36:	4908      	ldr	r1, [pc, #32]	; (1e58 <flash_area_get_sectors+0x5c>)
    1e38:	aa01      	add	r2, sp, #4
    1e3a:	f004 fcf0 	bl	681e <flash_page_foreach>
	if (cb_data->status == 0) {
    1e3e:	9807      	ldr	r0, [sp, #28]
    1e40:	b908      	cbnz	r0, 1e46 <flash_area_get_sectors+0x4a>
		*cnt = cb_data->ret_idx;
    1e42:	9b05      	ldr	r3, [sp, #20]
    1e44:	6023      	str	r3, [r4, #0]
	struct layout_data data;

	return flash_area_layout(idx, cnt, ret, get_sectors_cb, &data);
}
    1e46:	b008      	add	sp, #32
    1e48:	bd70      	pop	{r4, r5, r6, pc}
		return -EINVAL;
    1e4a:	f06f 0015 	mvn.w	r0, #21
    1e4e:	e7fa      	b.n	1e46 <flash_area_get_sectors+0x4a>
		return -ENODEV;
    1e50:	f06f 0012 	mvn.w	r0, #18
	return flash_area_layout(idx, cnt, ret, get_sectors_cb, &data);
    1e54:	e7f7      	b.n	1e46 <flash_area_get_sectors+0x4a>
    1e56:	bf00      	nop
    1e58:	00005f6f 	.word	0x00005f6f

00001e5c <nrf_cc3xx_platform_abort_init>:

/** @brief Function to initialize the nrf_cc3xx_platform abort APIs.
 */
void nrf_cc3xx_platform_abort_init(void)
{
	nrf_cc3xx_platform_set_abort(&apis);
    1e5c:	4801      	ldr	r0, [pc, #4]	; (1e64 <nrf_cc3xx_platform_abort_init+0x8>)
    1e5e:	f003 bb45 	b.w	54ec <nrf_cc3xx_platform_set_abort>
    1e62:	bf00      	nop
    1e64:	00008ab4 	.word	0x00008ab4

00001e68 <boot_uart_fifo_callback>:
	return boot_uart_fifo_init();
}

static void
boot_uart_fifo_callback(const struct device *dev, void *user_data)
{
    1e68:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
	static struct line_input *cmd;
	uint8_t byte;
	int rx;

	uart_irq_update(uart_dev);
    1e6a:	4e25      	ldr	r6, [pc, #148]	; (1f00 <boot_uart_fifo_callback+0x98>)
    1e6c:	6830      	ldr	r0, [r6, #0]
{
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
	const struct uart_driver_api *api =
		(const struct uart_driver_api *)dev->api;

	if (api->irq_update == NULL) {
    1e6e:	6883      	ldr	r3, [r0, #8]
    1e70:	6c5b      	ldr	r3, [r3, #68]	; 0x44
    1e72:	b103      	cbz	r3, 1e76 <boot_uart_fifo_callback+0xe>
		return -ENOSYS;
	}
	return api->irq_update(dev);
    1e74:	4798      	blx	r3

	if (!uart_irq_rx_ready(uart_dev)) {
    1e76:	6830      	ldr	r0, [r6, #0]
	if (api->irq_rx_ready == NULL) {
    1e78:	6883      	ldr	r3, [r0, #8]
    1e7a:	6b5b      	ldr	r3, [r3, #52]	; 0x34
    1e7c:	2b00      	cmp	r3, #0
    1e7e:	d132      	bne.n	1ee6 <boot_uart_fifo_callback+0x7e>
		rx = uart_fifo_read(uart_dev, &byte, 1);
		if (rx != 1) {
			break;
		}

		if (!cmd) {
    1e80:	4c20      	ldr	r4, [pc, #128]	; (1f04 <boot_uart_fifo_callback+0x9c>)
	return list->head;
    1e82:	4d21      	ldr	r5, [pc, #132]	; (1f08 <boot_uart_fifo_callback+0xa0>)
		rx = uart_fifo_read(uart_dev, &byte, 1);
    1e84:	6830      	ldr	r0, [r6, #0]
	if (api->fifo_read == NULL) {
    1e86:	6883      	ldr	r3, [r0, #8]
    1e88:	699b      	ldr	r3, [r3, #24]
    1e8a:	2b00      	cmp	r3, #0
    1e8c:	d02e      	beq.n	1eec <boot_uart_fifo_callback+0x84>
	return api->fifo_read(dev, rx_data, size);
    1e8e:	2201      	movs	r2, #1
    1e90:	f10d 0107 	add.w	r1, sp, #7
    1e94:	4798      	blx	r3
		if (rx != 1) {
    1e96:	2801      	cmp	r0, #1
    1e98:	d128      	bne.n	1eec <boot_uart_fifo_callback+0x84>
		if (!cmd) {
    1e9a:	6823      	ldr	r3, [r4, #0]
    1e9c:	b943      	cbnz	r3, 1eb0 <boot_uart_fifo_callback+0x48>
    1e9e:	682b      	ldr	r3, [r5, #0]
 *
 * @return A pointer to the first node of the list (or NULL if empty)
 */
static inline sys_snode_t *sys_slist_get(sys_slist_t *list);

Z_GENLIST_GET(slist, snode)
    1ea0:	b333      	cbz	r3, 1ef0 <boot_uart_fifo_callback+0x88>
Z_GENLIST_GET_NOT_EMPTY(slist, snode)
    1ea2:	6869      	ldr	r1, [r5, #4]
	return node->next;
    1ea4:	681a      	ldr	r2, [r3, #0]
Z_GENLIST_GET_NOT_EMPTY(slist, snode)
    1ea6:	428b      	cmp	r3, r1
	list->head = node;
    1ea8:	602a      	str	r2, [r5, #0]
Z_GENLIST_GET_NOT_EMPTY(slist, snode)
    1eaa:	d100      	bne.n	1eae <boot_uart_fifo_callback+0x46>
	list->tail = node;
    1eac:	606a      	str	r2, [r5, #4]
			if (!node) {
				BOOT_LOG_ERR("Not enough memory to store"
					     " incoming data!");
				return;
			}
			cmd = CONTAINER_OF(node, struct line_input, node);
    1eae:	6023      	str	r3, [r4, #0]
		}

		if (cur < CONFIG_BOOT_MAX_LINE_INPUT_LEN) {
    1eb0:	4a16      	ldr	r2, [pc, #88]	; (1f0c <boot_uart_fifo_callback+0xa4>)
			cmd->line[cur++] = byte;
		}

		if (byte ==  '\n') {
    1eb2:	f89d 0007 	ldrb.w	r0, [sp, #7]
		if (cur < CONFIG_BOOT_MAX_LINE_INPUT_LEN) {
    1eb6:	8811      	ldrh	r1, [r2, #0]
    1eb8:	f5b1 7f00 	cmp.w	r1, #512	; 0x200
    1ebc:	d204      	bcs.n	1ec8 <boot_uart_fifo_callback+0x60>
			cmd->line[cur++] = byte;
    1ebe:	6823      	ldr	r3, [r4, #0]
    1ec0:	1c4f      	adds	r7, r1, #1
    1ec2:	440b      	add	r3, r1
    1ec4:	8017      	strh	r7, [r2, #0]
    1ec6:	7218      	strb	r0, [r3, #8]
		if (byte ==  '\n') {
    1ec8:	280a      	cmp	r0, #10
    1eca:	d1db      	bne.n	1e84 <boot_uart_fifo_callback+0x1c>
	parent->next = child;
    1ecc:	2000      	movs	r0, #0
			cmd->len = cur;
    1ece:	6823      	ldr	r3, [r4, #0]
    1ed0:	8811      	ldrh	r1, [r2, #0]
    1ed2:	6018      	str	r0, [r3, #0]
    1ed4:	6059      	str	r1, [r3, #4]
	return list->tail;
    1ed6:	490e      	ldr	r1, [pc, #56]	; (1f10 <boot_uart_fifo_callback+0xa8>)
    1ed8:	684d      	ldr	r5, [r1, #4]
Z_GENLIST_APPEND(slist, snode)
    1eda:	b975      	cbnz	r5, 1efa <boot_uart_fifo_callback+0x92>
	list->head = node;
    1edc:	e9c1 3300 	strd	r3, r3, [r1]
			sys_slist_append(&lines_queue, &cmd->node);
			cur = 0;
    1ee0:	8010      	strh	r0, [r2, #0]
			cmd = NULL;
    1ee2:	6020      	str	r0, [r4, #0]
    1ee4:	e7cd      	b.n	1e82 <boot_uart_fifo_callback+0x1a>
	return api->irq_rx_ready(dev);
    1ee6:	4798      	blx	r3
	if (!uart_irq_rx_ready(uart_dev)) {
    1ee8:	2800      	cmp	r0, #0
    1eea:	d1c9      	bne.n	1e80 <boot_uart_fifo_callback+0x18>
		}
	}
}
    1eec:	b003      	add	sp, #12
    1eee:	bdf0      	pop	{r4, r5, r6, r7, pc}
				BOOT_LOG_ERR("Not enough memory to store"
    1ef0:	2145      	movs	r1, #69	; 0x45
    1ef2:	4808      	ldr	r0, [pc, #32]	; (1f14 <boot_uart_fifo_callback+0xac>)
    1ef4:	f003 ffe1 	bl	5eba <z_log_minimal_printk>
				return;
    1ef8:	e7f8      	b.n	1eec <boot_uart_fifo_callback+0x84>
	parent->next = child;
    1efa:	602b      	str	r3, [r5, #0]
	list->tail = node;
    1efc:	604b      	str	r3, [r1, #4]
}
    1efe:	e7ef      	b.n	1ee0 <boot_uart_fifo_callback+0x78>
    1f00:	2000df80 	.word	0x2000df80
    1f04:	2000db58 	.word	0x2000db58
    1f08:	2000db68 	.word	0x2000db68
    1f0c:	2000e090 	.word	0x2000e090
    1f10:	2000db60 	.word	0x2000db60
    1f14:	00009410 	.word	0x00009410

00001f18 <console_out>:
{
    1f18:	b510      	push	{r4, lr}
	uart_poll_out(uart_dev, c);
    1f1a:	4b04      	ldr	r3, [pc, #16]	; (1f2c <console_out+0x14>)
{
    1f1c:	4604      	mov	r4, r0
	uart_poll_out(uart_dev, c);
    1f1e:	6818      	ldr	r0, [r3, #0]
	api->poll_out(dev, out_char);
    1f20:	6883      	ldr	r3, [r0, #8]
    1f22:	b2e1      	uxtb	r1, r4
    1f24:	685b      	ldr	r3, [r3, #4]
    1f26:	4798      	blx	r3
}
    1f28:	4620      	mov	r0, r4
    1f2a:	bd10      	pop	{r4, pc}
    1f2c:	2000df80 	.word	0x2000df80

00001f30 <console_read>:
{
    1f30:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    1f32:	4605      	mov	r5, r0
    1f34:	4616      	mov	r6, r2
    1f36:	4608      	mov	r0, r1
	__asm__ volatile(
    1f38:	f04f 0320 	mov.w	r3, #32
    1f3c:	f3ef 8711 	mrs	r7, BASEPRI
    1f40:	f383 8812 	msr	BASEPRI_MAX, r3
    1f44:	f3bf 8f6f 	isb	sy
	sys_snode_t *node;
	int key;

	key = irq_lock();
	/* Recycle cmd buffer returned previous time */
	if (cmd != NULL) {
    1f48:	491b      	ldr	r1, [pc, #108]	; (1fb8 <console_read+0x88>)
    1f4a:	680b      	ldr	r3, [r1, #0]
    1f4c:	b14b      	cbz	r3, 1f62 <console_read+0x32>
	return list->tail;
    1f4e:	4c1b      	ldr	r4, [pc, #108]	; (1fbc <console_read+0x8c>)
		if (sys_slist_peek_tail(&avail_queue) != &cmd->node) {
    1f50:	6862      	ldr	r2, [r4, #4]
    1f52:	429a      	cmp	r2, r3
    1f54:	d005      	beq.n	1f62 <console_read+0x32>
	parent->next = child;
    1f56:	2200      	movs	r2, #0
    1f58:	601a      	str	r2, [r3, #0]
	return list->tail;
    1f5a:	6862      	ldr	r2, [r4, #4]
Z_GENLIST_APPEND(slist, snode)
    1f5c:	b962      	cbnz	r2, 1f78 <console_read+0x48>
	list->head = node;
    1f5e:	e9c4 3300 	strd	r3, r3, [r4]
	return list->head;
    1f62:	4a17      	ldr	r2, [pc, #92]	; (1fc0 <console_read+0x90>)
    1f64:	6813      	ldr	r3, [r2, #0]
Z_GENLIST_GET(slist, snode)
    1f66:	b953      	cbnz	r3, 1f7e <console_read+0x4e>
	__asm__ volatile(
    1f68:	f387 8811 	msr	BASEPRI, r7
    1f6c:	f3bf 8f6f 	isb	sy
		return 0;
    1f70:	4618      	mov	r0, r3

	node = sys_slist_get(&lines_queue);
	irq_unlock(key);

	if (node == NULL) {
		cmd = NULL;
    1f72:	600b      	str	r3, [r1, #0]
		*newline = 0;
    1f74:	6033      	str	r3, [r6, #0]
}
    1f76:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	parent->next = child;
    1f78:	6013      	str	r3, [r2, #0]
	list->tail = node;
    1f7a:	6063      	str	r3, [r4, #4]
}
    1f7c:	e7f1      	b.n	1f62 <console_read+0x32>
Z_GENLIST_GET_NOT_EMPTY(slist, snode)
    1f7e:	f8d2 c004 	ldr.w	ip, [r2, #4]
	return node->next;
    1f82:	681c      	ldr	r4, [r3, #0]
Z_GENLIST_GET_NOT_EMPTY(slist, snode)
    1f84:	4563      	cmp	r3, ip
	list->head = node;
    1f86:	6014      	str	r4, [r2, #0]
	list->tail = node;
    1f88:	bf08      	it	eq
    1f8a:	6054      	streq	r4, [r2, #4]
    1f8c:	f387 8811 	msr	BASEPRI, r7
    1f90:	f3bf 8f6f 	isb	sy
		return 0;
	}

	cmd = CONTAINER_OF(node, struct line_input, node);
	*line = cmd->line;
	return cmd->len;
    1f94:	685c      	ldr	r4, [r3, #4]
	cmd = CONTAINER_OF(node, struct line_input, node);
    1f96:	600b      	str	r3, [r1, #0]
	if (len > str_size - 1) {
    1f98:	42a0      	cmp	r0, r4
		len = str_size - 1;
    1f9a:	bfd8      	it	le
    1f9c:	f100 34ff 	addle.w	r4, r0, #4294967295
	*line = cmd->line;
    1fa0:	f103 0108 	add.w	r1, r3, #8
	memcpy(str, line, len);
    1fa4:	4622      	mov	r2, r4
    1fa6:	4628      	mov	r0, r5
    1fa8:	f004 faf6 	bl	6598 <memcpy>
	str[len] = '\0';
    1fac:	2300      	movs	r3, #0
	return len + 1;
    1fae:	1c60      	adds	r0, r4, #1
	str[len] = '\0';
    1fb0:	552b      	strb	r3, [r5, r4]
	return len + 1;
    1fb2:	2301      	movs	r3, #1
    1fb4:	e7de      	b.n	1f74 <console_read+0x44>
    1fb6:	bf00      	nop
    1fb8:	2000db5c 	.word	0x2000db5c
    1fbc:	2000db68 	.word	0x2000db68
    1fc0:	2000db60 	.word	0x2000db60

00001fc4 <boot_console_init>:
{
    1fc4:	b537      	push	{r0, r1, r2, r4, r5, lr}
	list->head = NULL;
    1fc6:	2500      	movs	r5, #0
    1fc8:	4b1b      	ldr	r3, [pc, #108]	; (2038 <CONFIG_NRF_SPU_RAM_REGION_SIZE+0x38>)
	list->head = node;
    1fca:	4a1c      	ldr	r2, [pc, #112]	; (203c <CONFIG_NRF_SPU_RAM_REGION_SIZE+0x3c>)
	list->tail = NULL;
    1fcc:	e9c3 5500 	strd	r5, r5, [r3]
	list->head = node;
    1fd0:	4b1b      	ldr	r3, [pc, #108]	; (2040 <CONFIG_NRF_SPU_RAM_REGION_SIZE+0x40>)

static int
boot_uart_fifo_init(void)
{
#ifdef CONFIG_BOOT_SERIAL_UART
	uart_dev = DEVICE_DT_GET(DT_CHOSEN(zephyr_console));
    1fd2:	4c1c      	ldr	r4, [pc, #112]	; (2044 <CONFIG_NRF_SPU_RAM_REGION_SIZE+0x44>)
    1fd4:	481c      	ldr	r0, [pc, #112]	; (2048 <CONFIG_NRF_SPU_RAM_REGION_SIZE+0x48>)
	parent->next = child;
    1fd6:	f503 7102 	add.w	r1, r3, #520	; 0x208
	list->head = node;
    1fda:	6013      	str	r3, [r2, #0]
	parent->next = child;
    1fdc:	f8c3 5208 	str.w	r5, [r3, #520]	; 0x208
    1fe0:	6019      	str	r1, [r3, #0]
	list->tail = node;
    1fe2:	6051      	str	r1, [r2, #4]
    1fe4:	6020      	str	r0, [r4, #0]
    1fe6:	f006 fb2a 	bl	863e <z_device_is_ready>
#elif CONFIG_BOOT_SERIAL_CDC_ACM
	uart_dev = DEVICE_DT_GET_ONE(zephyr_cdc_acm_uart);
#endif

	if (!device_is_ready(uart_dev)) {
    1fea:	b310      	cbz	r0, 2032 <CONFIG_NRF_SPU_RAM_REGION_SIZE+0x32>
	if (rc) {
		return (-1);
	}
#endif

	uart_irq_callback_set(uart_dev, boot_uart_fifo_callback);
    1fec:	6820      	ldr	r0, [r4, #0]
static inline void uart_irq_callback_user_data_set(const struct device *dev,
						   uart_irq_callback_user_data_t cb,
						   void *user_data)
{
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
	const struct uart_driver_api *api =
    1fee:	6883      	ldr	r3, [r0, #8]
		(const struct uart_driver_api *)dev->api;

	if ((api != NULL) && (api->irq_callback_set != NULL)) {
    1ff0:	b123      	cbz	r3, 1ffc <boot_console_init+0x38>
    1ff2:	6c9b      	ldr	r3, [r3, #72]	; 0x48
    1ff4:	b113      	cbz	r3, 1ffc <boot_console_init+0x38>
		api->irq_callback_set(dev, cb, user_data);
    1ff6:	462a      	mov	r2, r5
    1ff8:	4914      	ldr	r1, [pc, #80]	; (204c <CONFIG_NRF_SPU_RAM_REGION_SIZE+0x4c>)
    1ffa:	4798      	blx	r3

	/* Drain the fifo */
	if (uart_irq_rx_ready(uart_dev)) {
    1ffc:	6820      	ldr	r0, [r4, #0]
	if (api->irq_rx_ready == NULL) {
    1ffe:	6883      	ldr	r3, [r0, #8]
    2000:	6b5b      	ldr	r3, [r3, #52]	; 0x34
    2002:	b10b      	cbz	r3, 2008 <CONFIG_NRF_SPU_RAM_REGION_SIZE+0x8>
	return api->irq_rx_ready(dev);
    2004:	4798      	blx	r3
    2006:	b148      	cbz	r0, 201c <CONFIG_NRF_SPU_RAM_REGION_SIZE+0x1c>
		uint8_t c;

		while (uart_fifo_read(uart_dev, &c, 1)) {
    2008:	6820      	ldr	r0, [r4, #0]
	if (api->fifo_read == NULL) {
    200a:	6883      	ldr	r3, [r0, #8]
    200c:	699b      	ldr	r3, [r3, #24]
    200e:	2b00      	cmp	r3, #0
    2010:	d0fa      	beq.n	2008 <CONFIG_NRF_SPU_RAM_REGION_SIZE+0x8>
	return api->fifo_read(dev, rx_data, size);
    2012:	2201      	movs	r2, #1
    2014:	f10d 0107 	add.w	r1, sp, #7
    2018:	4798      	blx	r3
    201a:	e7f4      	b.n	2006 <CONFIG_NRF_SPU_RAM_REGION_SIZE+0x6>
			;
		}
	}

	cur = 0;
    201c:	2200      	movs	r2, #0
    201e:	4b0c      	ldr	r3, [pc, #48]	; (2050 <CONFIG_NRF_SPU_RAM_REGION_SIZE+0x50>)

	uart_irq_rx_enable(uart_dev);
    2020:	6820      	ldr	r0, [r4, #0]
	cur = 0;
    2022:	801a      	strh	r2, [r3, #0]
	if (api->irq_rx_enable != NULL) {
    2024:	6883      	ldr	r3, [r0, #8]
    2026:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    2028:	b103      	cbz	r3, 202c <CONFIG_NRF_SPU_RAM_REGION_SIZE+0x2c>
		api->irq_rx_enable(dev);
    202a:	4798      	blx	r3

	return 0;
    202c:	2000      	movs	r0, #0
}
    202e:	b003      	add	sp, #12
    2030:	bd30      	pop	{r4, r5, pc}
		return (-1);
    2032:	f04f 30ff 	mov.w	r0, #4294967295
	return boot_uart_fifo_init();
    2036:	e7fa      	b.n	202e <CONFIG_NRF_SPU_RAM_REGION_SIZE+0x2e>
    2038:	2000db60 	.word	0x2000db60
    203c:	2000db68 	.word	0x2000db68
    2040:	2000db70 	.word	0x2000db70
    2044:	2000df80 	.word	0x2000df80
    2048:	00008714 	.word	0x00008714
    204c:	00001e69 	.word	0x00001e69
    2050:	2000e090 	.word	0x2000e090

00002054 <boot_serial_output>:
{
    char *data;
    int len;
    uint16_t crc;
    uint16_t totlen;
    char pkt_start[2] = { SHELL_NLIP_PKT_START1, SHELL_NLIP_PKT_START2 };
    2054:	f640 1306 	movw	r3, #2310	; 0x906

    data = bs_obuf;
    len = (uint32_t)cbor_state->payload_mut - (uint32_t)bs_obuf;

    bs_hdr->nh_op++;
    bs_hdr->nh_flags = 0;
    2058:	2000      	movs	r0, #0
{
    205a:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
    205e:	b0d9      	sub	sp, #356	; 0x164
    char pkt_start[2] = { SHELL_NLIP_PKT_START1, SHELL_NLIP_PKT_START2 };
    2060:	f8ad 3008 	strh.w	r3, [sp, #8]
    bs_hdr->nh_op++;
    2064:	f8df 90e8 	ldr.w	r9, [pc, #232]	; 2150 <boot_serial_output+0xfc>
    len = (uint32_t)cbor_state->payload_mut - (uint32_t)bs_obuf;
    2068:	4b3a      	ldr	r3, [pc, #232]	; (2154 <boot_serial_output+0x100>)
    bs_hdr->nh_op++;
    206a:	f8d9 1000 	ldr.w	r1, [r9]
    len = (uint32_t)cbor_state->payload_mut - (uint32_t)bs_obuf;
    206e:	681b      	ldr	r3, [r3, #0]
    2070:	4e39      	ldr	r6, [pc, #228]	; (2158 <boot_serial_output+0x104>)
    bs_hdr->nh_len = htons(len);
    bs_hdr->nh_group = htons(bs_hdr->nh_group);

#ifdef __ZEPHYR__
    crc =  crc16_itu_t(CRC16_INITIAL_CRC, (uint8_t *)bs_hdr, sizeof(*bs_hdr));
    2072:	2208      	movs	r2, #8
    len = (uint32_t)cbor_state->payload_mut - (uint32_t)bs_obuf;
    2074:	eba3 0806 	sub.w	r8, r3, r6
    bs_hdr->nh_op++;
    2078:	780b      	ldrb	r3, [r1, #0]
    bs_hdr->nh_flags = 0;
    207a:	7048      	strb	r0, [r1, #1]
    bs_hdr->nh_op++;
    207c:	3301      	adds	r3, #1
    207e:	700b      	strb	r3, [r1, #0]
    bs_hdr->nh_len = htons(len);
    2080:	fa98 f398 	rev16.w	r3, r8
    2084:	804b      	strh	r3, [r1, #2]
    bs_hdr->nh_group = htons(bs_hdr->nh_group);
    2086:	888b      	ldrh	r3, [r1, #4]

    totlen = len + sizeof(*bs_hdr) + sizeof(crc);
    totlen = htons(totlen);

    memcpy(buf, &totlen, sizeof(totlen));
    totlen = sizeof(totlen);
    2088:	2702      	movs	r7, #2
    bs_hdr->nh_group = htons(bs_hdr->nh_group);
    208a:	ba5b      	rev16	r3, r3
    208c:	808b      	strh	r3, [r1, #4]
    crc =  crc16_itu_t(CRC16_INITIAL_CRC, (uint8_t *)bs_hdr, sizeof(*bs_hdr));
    208e:	f003 fe17 	bl	5cc0 <crc16_itu_t>
    crc =  crc16_itu_t(crc, data, len);
    2092:	4642      	mov	r2, r8
    2094:	4631      	mov	r1, r6
    crc =  crc16_itu_t(CRC16_INITIAL_CRC, (uint8_t *)bs_hdr, sizeof(*bs_hdr));
    2096:	f8ad 000c 	strh.w	r0, [sp, #12]
    crc =  crc16_itu_t(crc, data, len);
    209a:	f003 fe11 	bl	5cc0 <crc16_itu_t>
    boot_uf->write(pkt_start, sizeof(pkt_start));
    209e:	4d2f      	ldr	r5, [pc, #188]	; (215c <boot_serial_output+0x108>)
    crc = htons(crc);
    20a0:	ba40      	rev16	r0, r0
    boot_uf->write(pkt_start, sizeof(pkt_start));
    20a2:	682b      	ldr	r3, [r5, #0]
    20a4:	fa1f f488 	uxth.w	r4, r8
    crc = htons(crc);
    20a8:	f8ad 000c 	strh.w	r0, [sp, #12]
    boot_uf->write(pkt_start, sizeof(pkt_start));
    20ac:	2102      	movs	r1, #2
    20ae:	a802      	add	r0, sp, #8
    20b0:	685b      	ldr	r3, [r3, #4]
    20b2:	4798      	blx	r3
    totlen = len + sizeof(*bs_hdr) + sizeof(crc);
    20b4:	f104 030a 	add.w	r3, r4, #10
    totlen = htons(totlen);
    20b8:	ba5b      	rev16	r3, r3
    memcpy(buf, &totlen, sizeof(totlen));
    20ba:	f10d 010e 	add.w	r1, sp, #14
    20be:	2202      	movs	r2, #2
    20c0:	a805      	add	r0, sp, #20
    totlen = htons(totlen);
    20c2:	f8ad 300e 	strh.w	r3, [sp, #14]
    memcpy(buf, &totlen, sizeof(totlen));
    20c6:	f004 fa67 	bl	6598 <memcpy>
    memcpy(&buf[totlen], bs_hdr, sizeof(*bs_hdr));
    20ca:	f8d9 1000 	ldr.w	r1, [r9]
    20ce:	2208      	movs	r2, #8
    20d0:	f10d 0016 	add.w	r0, sp, #22
    totlen = sizeof(totlen);
    20d4:	f8ad 700e 	strh.w	r7, [sp, #14]
    memcpy(&buf[totlen], bs_hdr, sizeof(*bs_hdr));
    20d8:	f004 fa5e 	bl	6598 <memcpy>
    totlen += sizeof(*bs_hdr);
    20dc:	f8bd 000e 	ldrh.w	r0, [sp, #14]
    memcpy(&buf[totlen], data, len);
    20e0:	ab05      	add	r3, sp, #20
    totlen += sizeof(*bs_hdr);
    20e2:	3008      	adds	r0, #8
    20e4:	b280      	uxth	r0, r0
    memcpy(&buf[totlen], data, len);
    20e6:	4642      	mov	r2, r8
    20e8:	4631      	mov	r1, r6
    totlen += sizeof(*bs_hdr);
    20ea:	f8ad 000e 	strh.w	r0, [sp, #14]
    memcpy(&buf[totlen], data, len);
    20ee:	4418      	add	r0, r3
    20f0:	f004 fa52 	bl	6598 <memcpy>
    totlen += len;
    20f4:	f8bd 300e 	ldrh.w	r3, [sp, #14]
    memcpy(&buf[totlen], &crc, sizeof(crc));
    20f8:	463a      	mov	r2, r7
    totlen += len;
    20fa:	18e0      	adds	r0, r4, r3
    20fc:	b280      	uxth	r0, r0
    memcpy(&buf[totlen], &crc, sizeof(crc));
    20fe:	ab05      	add	r3, sp, #20
    totlen += len;
    2100:	f8ad 000e 	strh.w	r0, [sp, #14]
    memcpy(&buf[totlen], &crc, sizeof(crc));
    2104:	a903      	add	r1, sp, #12
    2106:	4418      	add	r0, r3
    2108:	f004 fa46 	bl	6598 <memcpy>
    totlen += sizeof(crc);
    210c:	f8bd 300e 	ldrh.w	r3, [sp, #14]
#ifdef __ZEPHYR__
    size_t enc_len;
    base64_encode(encoded_buf, sizeof(encoded_buf), &enc_len, buf, totlen);
    2110:	aa04      	add	r2, sp, #16
    totlen += sizeof(crc);
    2112:	443b      	add	r3, r7
    2114:	b29b      	uxth	r3, r3
    2116:	f8ad 300e 	strh.w	r3, [sp, #14]
    base64_encode(encoded_buf, sizeof(encoded_buf), &enc_len, buf, totlen);
    211a:	9300      	str	r3, [sp, #0]
    211c:	21bd      	movs	r1, #189	; 0xbd
    211e:	ab05      	add	r3, sp, #20
    2120:	a828      	add	r0, sp, #160	; 0xa0
    2122:	f7ff f9ab 	bl	147c <base64_encode>
    totlen = enc_len;
    2126:	9904      	ldr	r1, [sp, #16]
    base64_encode((unsigned char *)encoded_buf, sizeof(encoded_buf), &enc_len, (unsigned char *)buf, totlen);
    totlen = enc_len;
#else
    totlen = base64_encode(buf, totlen, encoded_buf, 1);
#endif
    boot_uf->write(encoded_buf, totlen);
    2128:	682b      	ldr	r3, [r5, #0]
    totlen = enc_len;
    212a:	f8ad 100e 	strh.w	r1, [sp, #14]
    boot_uf->write(encoded_buf, totlen);
    212e:	a828      	add	r0, sp, #160	; 0xa0
    2130:	685b      	ldr	r3, [r3, #4]
    2132:	b289      	uxth	r1, r1
    2134:	4798      	blx	r3
    boot_uf->write("\n", 1);
    2136:	682b      	ldr	r3, [r5, #0]
    2138:	2101      	movs	r1, #1
    213a:	685b      	ldr	r3, [r3, #4]
    213c:	4808      	ldr	r0, [pc, #32]	; (2160 <boot_serial_output+0x10c>)
    213e:	4798      	blx	r3
    BOOT_LOG_INF("TX");
    2140:	2149      	movs	r1, #73	; 0x49
    2142:	4808      	ldr	r0, [pc, #32]	; (2164 <boot_serial_output+0x110>)
    2144:	f003 feb9 	bl	5eba <z_log_minimal_printk>
}
    2148:	b059      	add	sp, #356	; 0x164
    214a:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
    214e:	bf00      	nop
    2150:	2000dfc8 	.word	0x2000dfc8
    2154:	2000df98 	.word	0x2000df98
    2158:	2000f992 	.word	0x2000f992
    215c:	2000dfcc 	.word	0x2000dfcc
    2160:	00009bd7 	.word	0x00009bd7
    2164:	0000944e 	.word	0x0000944e

00002168 <erase_range>:
{
    2168:	b5f0      	push	{r4, r5, r6, r7, lr}
    216a:	4606      	mov	r6, r0
    if (end >= flash_area_get_size(fap)) {
    216c:	68b3      	ldr	r3, [r6, #8]
{
    216e:	460c      	mov	r4, r1
    if (end >= flash_area_get_size(fap)) {
    2170:	429a      	cmp	r2, r3
{
    2172:	4610      	mov	r0, r2
    2174:	b085      	sub	sp, #20
    if (end >= flash_area_get_size(fap)) {
    2176:	d21d      	bcs.n	21b4 <erase_range+0x4c>
    if (end < start) {
    2178:	4291      	cmp	r1, r2
    217a:	dc1d      	bgt.n	21b8 <erase_range+0x50>
    if (flash_area_sector_from_off(end, &sect)) {
    217c:	a902      	add	r1, sp, #8
    217e:	f7fe f9ef 	bl	560 <flash_area_sector_from_off>
    2182:	b9b8      	cbnz	r0, 21b4 <erase_range+0x4c>
    size = flash_sector_get_off(&sect) + flash_sector_get_size(&sect) - start;
    2184:	e9dd 5302 	ldrd	r5, r3, [sp, #8]
    2188:	441d      	add	r5, r3
    BOOT_LOG_INF("Erasing range 0x%jx:0x%jx", (intmax_t)start,
    218a:	1e6b      	subs	r3, r5, #1
    218c:	e9cd 3000 	strd	r3, r0, [sp]
    2190:	4622      	mov	r2, r4
    2192:	2149      	movs	r1, #73	; 0x49
    2194:	480b      	ldr	r0, [pc, #44]	; (21c4 <erase_range+0x5c>)
    2196:	17e3      	asrs	r3, r4, #31
    size = flash_sector_get_off(&sect) + flash_sector_get_size(&sect) - start;
    2198:	1b2f      	subs	r7, r5, r4
    BOOT_LOG_INF("Erasing range 0x%jx:0x%jx", (intmax_t)start,
    219a:	f003 fe8e 	bl	5eba <z_log_minimal_printk>
    rc = flash_area_erase(fap, start, size);
    219e:	463a      	mov	r2, r7
    21a0:	4621      	mov	r1, r4
    21a2:	4630      	mov	r0, r6
    21a4:	f003 fec1 	bl	5f2a <flash_area_erase>
    if (rc != 0) {
    21a8:	4602      	mov	r2, r0
    21aa:	b140      	cbz	r0, 21be <erase_range+0x56>
        BOOT_LOG_ERR("Error %d while erasing range", rc);
    21ac:	2145      	movs	r1, #69	; 0x45
    21ae:	4806      	ldr	r0, [pc, #24]	; (21c8 <erase_range+0x60>)
    21b0:	f003 fe83 	bl	5eba <z_log_minimal_printk>
        return -EINVAL;
    21b4:	f06f 0415 	mvn.w	r4, #21
}
    21b8:	4620      	mov	r0, r4
    21ba:	b005      	add	sp, #20
    21bc:	bdf0      	pop	{r4, r5, r6, r7, pc}
    return start + size;
    21be:	462c      	mov	r4, r5
    21c0:	e7fa      	b.n	21b8 <erase_range+0x50>
    21c2:	bf00      	nop
    21c4:	00009456 	.word	0x00009456
    21c8:	00009475 	.word	0x00009475

000021cc <boot_serial_in_dec.constprop.0>:

/*
 * Returns 1 if full packet has been received.
 */
static int
boot_serial_in_dec(char *in, int inlen, char *out, int *out_off, int maxout)
    21cc:	b5f0      	push	{r4, r5, r6, r7, lr}
    uint16_t crc;
    uint16_t len;

#ifdef __ZEPHYR__
    int err;
    err = base64_decode( &out[*out_off], maxout - *out_off, &rc, in, inlen - 2);
    21ce:	680c      	ldr	r4, [r1, #0]
    21d0:	4f16      	ldr	r7, [pc, #88]	; (222c <boot_serial_in_dec.constprop.0+0x60>)
boot_serial_in_dec(char *in, int inlen, char *out, int *out_off, int maxout)
    21d2:	b085      	sub	sp, #20
    err = base64_decode( &out[*out_off], maxout - *out_off, &rc, in, inlen - 2);
    21d4:	3802      	subs	r0, #2
boot_serial_in_dec(char *in, int inlen, char *out, int *out_off, int maxout)
    21d6:	460d      	mov	r5, r1
    err = base64_decode( &out[*out_off], maxout - *out_off, &rc, in, inlen - 2);
    21d8:	f5c4 6180 	rsb	r1, r4, #1024	; 0x400
    21dc:	9000      	str	r0, [sp, #0]
    21de:	4b14      	ldr	r3, [pc, #80]	; (2230 <boot_serial_in_dec.constprop.0+0x64>)
    21e0:	1938      	adds	r0, r7, r4
    21e2:	aa03      	add	r2, sp, #12
    21e4:	3101      	adds	r1, #1
    21e6:	f7ff f9c7 	bl	1578 <base64_decode>
    if (err) {
    21ea:	4604      	mov	r4, r0
    21ec:	b9d0      	cbnz	r0, 2224 <boot_serial_in_dec.constprop.0+0x58>
    if (rc < 0) {
        return -1;
    }
#endif

    *out_off += rc;
    21ee:	682b      	ldr	r3, [r5, #0]
    21f0:	9a03      	ldr	r2, [sp, #12]
    21f2:	4413      	add	r3, r2
    if (*out_off <= sizeof(uint16_t)) {
    21f4:	2b02      	cmp	r3, #2
    *out_off += rc;
    21f6:	602b      	str	r3, [r5, #0]
    if (*out_off <= sizeof(uint16_t)) {
    21f8:	d911      	bls.n	221e <boot_serial_in_dec.constprop.0+0x52>
        return 0;
    }

    len = ntohs(*(uint16_t *)out);
    21fa:	883e      	ldrh	r6, [r7, #0]
    if (len != *out_off - sizeof(uint16_t)) {
    21fc:	3b02      	subs	r3, #2
    21fe:	ba76      	rev16	r6, r6
    2200:	b2b6      	uxth	r6, r6
    2202:	429e      	cmp	r6, r3
    2204:	d10b      	bne.n	221e <boot_serial_in_dec.constprop.0+0x52>
        len = *out_off - sizeof(uint16_t);
    }

    out += sizeof(uint16_t);
#ifdef __ZEPHYR__
    crc = crc16_itu_t(CRC16_INITIAL_CRC, out, len);
    2206:	4632      	mov	r2, r6
    2208:	1cb9      	adds	r1, r7, #2
    220a:	f003 fd59 	bl	5cc0 <crc16_itu_t>
#elif __ESPRESSIF__
    crc = ~crc16_be(~CRC16_INITIAL_CRC, (uint8_t *)out, len);
#else
    crc = crc16_ccitt(CRC16_INITIAL_CRC, out, len);
#endif
    if (crc || len <= sizeof(crc)) {
    220e:	b930      	cbnz	r0, 221e <boot_serial_in_dec.constprop.0+0x52>
    2210:	2e02      	cmp	r6, #2
    2212:	d904      	bls.n	221e <boot_serial_in_dec.constprop.0+0x52>
        return 0;
    }
    *out_off -= sizeof(crc);
    2214:	682b      	ldr	r3, [r5, #0]
    2216:	1e9a      	subs	r2, r3, #2
    2218:	602a      	str	r2, [r5, #0]
    out[*out_off] = '\0';
    221a:	54fc      	strb	r4, [r7, r3]

    return 1;
    221c:	2401      	movs	r4, #1
}
    221e:	4620      	mov	r0, r4
    2220:	b005      	add	sp, #20
    2222:	bdf0      	pop	{r4, r5, r6, r7, pc}
        return -1;
    2224:	f04f 34ff 	mov.w	r4, #4294967295
    2228:	e7f9      	b.n	221e <boot_serial_in_dec.constprop.0+0x52>
    222a:	bf00      	nop
    222c:	2000fa13 	.word	0x2000fa13
    2230:	2000fe16 	.word	0x2000fe16

00002234 <zcbor_tstr_encode_ptr.constprop.0.isra.0>:
 */
static inline bool zcbor_bstr_encode_ptr(zcbor_state_t *state, uint8_t *ptr, size_t len)
{
	return zcbor_bstr_encode(state, &(struct zcbor_string){.value = ptr, .len = len});
}
static inline bool zcbor_tstr_encode_ptr(zcbor_state_t *state, uint8_t *ptr, size_t len)
    2234:	b507      	push	{r0, r1, r2, lr}
{
	return zcbor_tstr_encode(state, &(struct zcbor_string){.value = ptr, .len = len});
    2236:	e9cd 0100 	strd	r0, r1, [sp]
    223a:	4669      	mov	r1, sp
    223c:	4802      	ldr	r0, [pc, #8]	; (2248 <zcbor_tstr_encode_ptr.constprop.0.isra.0+0x14>)
    223e:	f004 f8bc 	bl	63ba <zcbor_tstr_encode>
}
    2242:	b003      	add	sp, #12
    2244:	f85d fb04 	ldr.w	pc, [sp], #4
    2248:	2000df98 	.word	0x2000df98

0000224c <bs_rc_rsp>:
{
    224c:	b538      	push	{r3, r4, r5, lr}
    224e:	4605      	mov	r5, r0
    zcbor_map_start_encode(cbor_state, 10);
    2250:	4c0a      	ldr	r4, [pc, #40]	; (227c <bs_rc_rsp+0x30>)
    2252:	210a      	movs	r1, #10
    2254:	4620      	mov	r0, r4
    2256:	f004 f8c2 	bl	63de <zcbor_map_start_encode>
    zcbor_tstr_put_lit_cast(cbor_state, "rc");
    225a:	2102      	movs	r1, #2
    225c:	4808      	ldr	r0, [pc, #32]	; (2280 <bs_rc_rsp+0x34>)
    225e:	f7ff ffe9 	bl	2234 <zcbor_tstr_encode_ptr.constprop.0.isra.0>
    zcbor_int32_put(cbor_state, rc_code);
    2262:	4629      	mov	r1, r5
    2264:	4620      	mov	r0, r4
    2266:	f004 f898 	bl	639a <zcbor_int32_put>
    zcbor_map_end_encode(cbor_state, 10);
    226a:	4620      	mov	r0, r4
    226c:	210a      	movs	r1, #10
    226e:	f004 f8d4 	bl	641a <zcbor_map_end_encode>
}
    2272:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
    boot_serial_output();
    2276:	f7ff beed 	b.w	2054 <boot_serial_output>
    227a:	bf00      	nop
    227c:	2000df98 	.word	0x2000df98
    2280:	00009497 	.word	0x00009497

00002284 <reset_cbor_state>:
    zcbor_new_encode_state(cbor_state, 2, (uint8_t *)bs_obuf,
    2284:	2300      	movs	r3, #0
{
    2286:	b507      	push	{r0, r1, r2, lr}
    zcbor_new_encode_state(cbor_state, 2, (uint8_t *)bs_obuf,
    2288:	4a05      	ldr	r2, [pc, #20]	; (22a0 <reset_cbor_state+0x1c>)
    228a:	9300      	str	r3, [sp, #0]
    228c:	2102      	movs	r1, #2
    228e:	f102 0380 	add.w	r3, r2, #128	; 0x80
    2292:	4804      	ldr	r0, [pc, #16]	; (22a4 <reset_cbor_state+0x20>)
    2294:	f004 f8c3 	bl	641e <zcbor_new_encode_state>
}
    2298:	b003      	add	sp, #12
    229a:	f85d fb04 	ldr.w	pc, [sp], #4
    229e:	bf00      	nop
    22a0:	2000f992 	.word	0x2000f992
    22a4:	2000df98 	.word	0x2000df98

000022a8 <boot_serial_input>:
{
    22a8:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
    if (len < sizeof(*hdr) ||
    22ac:	2907      	cmp	r1, #7
{
    22ae:	4604      	mov	r4, r0
    22b0:	b0a8      	sub	sp, #160	; 0xa0
    if (len < sizeof(*hdr) ||
    22b2:	f240 8094 	bls.w	23de <FIH_LABEL_FIH_CALL_END_798+0x78>
    22b6:	7803      	ldrb	r3, [r0, #0]
    22b8:	f013 06fd 	ands.w	r6, r3, #253	; 0xfd
    22bc:	f040 808f 	bne.w	23de <FIH_LABEL_FIH_CALL_END_798+0x78>
      (ntohs(hdr->nh_len) < len - sizeof(*hdr))) {
    22c0:	8843      	ldrh	r3, [r0, #2]
    22c2:	f1a1 0508 	sub.w	r5, r1, #8
    22c6:	ba5b      	rev16	r3, r3
    22c8:	b29b      	uxth	r3, r3
      (hdr->nh_op != NMGR_OP_READ && hdr->nh_op != NMGR_OP_WRITE) ||
    22ca:	42ab      	cmp	r3, r5
    22cc:	f0c0 8087 	bcc.w	23de <FIH_LABEL_FIH_CALL_END_798+0x78>
    bs_hdr = hdr;
    22d0:	4ba6      	ldr	r3, [pc, #664]	; (256c <FIH_LABEL_FIH_CALL_END_798+0x206>)
    22d2:	6018      	str	r0, [r3, #0]
    hdr->nh_group = ntohs(hdr->nh_group);
    22d4:	8883      	ldrh	r3, [r0, #4]
    22d6:	ba5b      	rev16	r3, r3
    22d8:	8083      	strh	r3, [r0, #4]
    reset_cbor_state();
    22da:	f7ff ffd3 	bl	2284 <reset_cbor_state>
    if (hdr->nh_group == MGMT_GROUP_ID_IMAGE) {
    22de:	88a0      	ldrh	r0, [r4, #4]
    22e0:	2801      	cmp	r0, #1
    22e2:	f040 81c1 	bne.w	2668 <FIH_LABEL_FIH_CALL_END_798+0x302>
        switch (hdr->nh_id) {
    22e6:	79e7      	ldrb	r7, [r4, #7]
    22e8:	b13f      	cbz	r7, 22fa <boot_serial_input+0x52>
    22ea:	2f01      	cmp	r7, #1
    22ec:	d07c      	beq.n	23e8 <FIH_LABEL_FIH_CALL_END_798+0x82>
        bs_rc_rsp(MGMT_ERR_ENOTSUP);
    22ee:	2008      	movs	r0, #8
}
    22f0:	b028      	add	sp, #160	; 0xa0
    22f2:	e8bd 47f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
        bs_rc_rsp(MGMT_ERR_ENOTSUP);
    22f6:	f7ff bfa9 	b.w	224c <bs_rc_rsp>
    zcbor_map_start_encode(cbor_state, 1);
    22fa:	4601      	mov	r1, r0
    22fc:	489c      	ldr	r0, [pc, #624]	; (2570 <FIH_LABEL_FIH_CALL_END_798+0x20a>)
    22fe:	f004 f86e 	bl	63de <zcbor_map_start_encode>
    zcbor_tstr_put_lit_cast(cbor_state, "images");
    2302:	2106      	movs	r1, #6
    2304:	489b      	ldr	r0, [pc, #620]	; (2574 <FIH_LABEL_FIH_CALL_END_798+0x20e>)
    2306:	f7ff ff95 	bl	2234 <zcbor_tstr_encode_ptr.constprop.0.isra.0>
    zcbor_list_start_encode(cbor_state, 5);
    230a:	2105      	movs	r1, #5
    230c:	4898      	ldr	r0, [pc, #608]	; (2570 <FIH_LABEL_FIH_CALL_END_798+0x20a>)
    230e:	f004 f857 	bl	63c0 <zcbor_list_start_encode>
        for (slot = 0; slot < 2; slot++) {
    2312:	463c      	mov	r4, r7
            if (hdr.ih_magic == IMAGE_MAGIC)
    2314:	f8df 8260 	ldr.w	r8, [pc, #608]	; 2578 <FIH_LABEL_FIH_CALL_END_798+0x212>
            fih_int fih_rc = FIH_FAILURE;
    2318:	4f98      	ldr	r7, [pc, #608]	; (257c <FIH_LABEL_FIH_CALL_END_798+0x216>)
            if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
    231a:	f8df 9264 	ldr.w	r9, [pc, #612]	; 2580 <FIH_LABEL_FIH_CALL_END_798+0x21a>
            area_id = flash_area_id_from_multi_image_slot(image_index, slot);
    231e:	4621      	mov	r1, r4
    2320:	2000      	movs	r0, #0
    2322:	f003 fa5b 	bl	57dc <flash_area_id_from_multi_image_slot>
            if (flash_area_open(area_id, &fap)) {
    2326:	a907      	add	r1, sp, #28
    2328:	b2c0      	uxtb	r0, r0
    232a:	f7ff fd3f 	bl	1dac <flash_area_open>
    232e:	4605      	mov	r5, r0
    2330:	2800      	cmp	r0, #0
    2332:	d149      	bne.n	23c8 <FIH_LABEL_FIH_CALL_END_798+0x62>
                flash_area_read(fap, 0, &hdr, sizeof(hdr));
    2334:	2320      	movs	r3, #32
    2336:	4601      	mov	r1, r0
    2338:	eb0d 0203 	add.w	r2, sp, r3
    233c:	9807      	ldr	r0, [sp, #28]
    233e:	f003 fdca 	bl	5ed6 <flash_area_read>
            if (hdr.ih_magic == IMAGE_MAGIC)
    2342:	9b08      	ldr	r3, [sp, #32]
            fih_int fih_rc = FIH_FAILURE;
    2344:	683e      	ldr	r6, [r7, #0]
            if (hdr.ih_magic == IMAGE_MAGIC)
    2346:	4543      	cmp	r3, r8
    2348:	d10d      	bne.n	2366 <FIH_LABEL_FIH_CALL_END_798>

0000234a <FIH_LABEL_FIH_CALL_START_774>:
                    FIH_CALL(bootutil_img_validate, fih_rc, NULL, 0, &hdr, fap, tmpbuf, sizeof(tmpbuf),
    234a:	2340      	movs	r3, #64	; 0x40
    234c:	9301      	str	r3, [sp, #4]
    234e:	ab18      	add	r3, sp, #96	; 0x60
    2350:	9300      	str	r3, [sp, #0]
    2352:	4629      	mov	r1, r5
    2354:	4628      	mov	r0, r5
    2356:	e9cd 5503 	strd	r5, r5, [sp, #12]
    235a:	9b07      	ldr	r3, [sp, #28]
    235c:	9502      	str	r5, [sp, #8]
    235e:	aa08      	add	r2, sp, #32
    2360:	f7fe f916 	bl	590 <bootutil_img_validate>
    2364:	4606      	mov	r6, r0

00002366 <FIH_LABEL_FIH_CALL_END_798>:
            flash_area_close(fap);
    2366:	9807      	ldr	r0, [sp, #28]
    2368:	f003 fdb4 	bl	5ed4 <flash_area_close>
            if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
    236c:	f8d9 3000 	ldr.w	r3, [r9]
    2370:	42b3      	cmp	r3, r6
    2372:	d129      	bne.n	23c8 <FIH_LABEL_FIH_CALL_END_798+0x62>
            zcbor_map_start_encode(cbor_state, 20);
    2374:	2114      	movs	r1, #20
    2376:	487e      	ldr	r0, [pc, #504]	; (2570 <FIH_LABEL_FIH_CALL_END_798+0x20a>)
    2378:	f004 f831 	bl	63de <zcbor_map_start_encode>
            zcbor_tstr_put_lit_cast(cbor_state, "slot");
    237c:	2104      	movs	r1, #4
    237e:	4881      	ldr	r0, [pc, #516]	; (2584 <FIH_LABEL_FIH_CALL_END_798+0x21e>)
    2380:	f7ff ff58 	bl	2234 <zcbor_tstr_encode_ptr.constprop.0.isra.0>
            zcbor_uint32_put(cbor_state, slot);
    2384:	4621      	mov	r1, r4
    2386:	487a      	ldr	r0, [pc, #488]	; (2570 <FIH_LABEL_FIH_CALL_END_798+0x20a>)
    2388:	f004 f80b 	bl	63a2 <zcbor_uint32_put>
            zcbor_tstr_put_lit_cast(cbor_state, "version");
    238c:	2107      	movs	r1, #7
    238e:	487e      	ldr	r0, [pc, #504]	; (2588 <FIH_LABEL_FIH_CALL_END_798+0x222>)
    2390:	f7ff ff50 	bl	2234 <zcbor_tstr_encode_ptr.constprop.0.isra.0>
   snprintf(dst, maxlen, "%hu.%hu.%hu.%u", (uint16_t)ver->iv_major,
    2394:	9b0e      	ldr	r3, [sp, #56]	; 0x38
    2396:	2140      	movs	r1, #64	; 0x40
    2398:	9302      	str	r3, [sp, #8]
    239a:	f8bd 3036 	ldrh.w	r3, [sp, #54]	; 0x36
    239e:	4a7b      	ldr	r2, [pc, #492]	; (258c <FIH_LABEL_FIH_CALL_END_798+0x226>)
    23a0:	9301      	str	r3, [sp, #4]
    23a2:	f89d 3035 	ldrb.w	r3, [sp, #53]	; 0x35
    23a6:	a818      	add	r0, sp, #96	; 0x60
    23a8:	9300      	str	r3, [sp, #0]
    23aa:	f89d 3034 	ldrb.w	r3, [sp, #52]	; 0x34
    23ae:	f000 fe53 	bl	3058 <snprintf>
            zcbor_tstr_encode_ptr(cbor_state, tmpbuf, strlen((char *)tmpbuf));
    23b2:	a818      	add	r0, sp, #96	; 0x60
    23b4:	f004 f8c2 	bl	653c <strlen>
    23b8:	4601      	mov	r1, r0
    23ba:	a818      	add	r0, sp, #96	; 0x60
    23bc:	f7ff ff3a 	bl	2234 <zcbor_tstr_encode_ptr.constprop.0.isra.0>
            zcbor_map_end_encode(cbor_state, 20);
    23c0:	2114      	movs	r1, #20
    23c2:	486b      	ldr	r0, [pc, #428]	; (2570 <FIH_LABEL_FIH_CALL_END_798+0x20a>)
    23c4:	f004 f829 	bl	641a <zcbor_map_end_encode>
        for (slot = 0; slot < 2; slot++) {
    23c8:	b164      	cbz	r4, 23e4 <FIH_LABEL_FIH_CALL_END_798+0x7e>
    zcbor_list_end_encode(cbor_state, 5);
    23ca:	2105      	movs	r1, #5
    23cc:	4868      	ldr	r0, [pc, #416]	; (2570 <FIH_LABEL_FIH_CALL_END_798+0x20a>)
    23ce:	f004 f815 	bl	63fc <zcbor_list_end_encode>
    zcbor_map_end_encode(cbor_state, 1);
    23d2:	2101      	movs	r1, #1
    23d4:	4866      	ldr	r0, [pc, #408]	; (2570 <FIH_LABEL_FIH_CALL_END_798+0x20a>)
    23d6:	f004 f820 	bl	641a <zcbor_map_end_encode>
    boot_serial_output();
    23da:	f7ff fe3b 	bl	2054 <boot_serial_output>
}
    23de:	b028      	add	sp, #160	; 0xa0
    23e0:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
        for (slot = 0; slot < 2; slot++) {
    23e4:	2401      	movs	r4, #1
    23e6:	e79a      	b.n	231e <boot_serial_input+0x76>
    uint_fast8_t result = cbor_decode_Upload((const uint8_t *)buf, len, &upload, &decoded_len);
    23e8:	4629      	mov	r1, r5
    23ea:	ab07      	add	r3, sp, #28
    23ec:	aa08      	add	r2, sp, #32
    23ee:	f104 0008 	add.w	r0, r4, #8
    const struct flash_area *fap = NULL;
    23f2:	9606      	str	r6, [sp, #24]
    uint_fast8_t result = cbor_decode_Upload((const uint8_t *)buf, len, &upload, &decoded_len);
    23f4:	f000 fa30 	bl	2858 <cbor_decode_Upload>
    if ((result != ZCBOR_SUCCESS) || (len != decoded_len)) {
    23f8:	b328      	cbz	r0, 2446 <FIH_LABEL_FIH_CALL_END_798+0xe0>
        rc = MGMT_ERR_EINVAL;
    23fa:	2403      	movs	r4, #3
    BOOT_LOG_INF("RX: 0x%x", rc);
    23fc:	4622      	mov	r2, r4
    23fe:	2149      	movs	r1, #73	; 0x49
    2400:	4863      	ldr	r0, [pc, #396]	; (2590 <FIH_LABEL_FIH_CALL_END_798+0x22a>)
    2402:	f003 fd5a 	bl	5eba <z_log_minimal_printk>
    zcbor_map_start_encode(cbor_state, 10);
    2406:	210a      	movs	r1, #10
    2408:	4859      	ldr	r0, [pc, #356]	; (2570 <FIH_LABEL_FIH_CALL_END_798+0x20a>)
    240a:	f003 ffe8 	bl	63de <zcbor_map_start_encode>
    zcbor_tstr_put_lit_cast(cbor_state, "rc");
    240e:	2102      	movs	r1, #2
    2410:	4860      	ldr	r0, [pc, #384]	; (2594 <FIH_LABEL_FIH_CALL_END_798+0x22e>)
    2412:	f7ff ff0f 	bl	2234 <zcbor_tstr_encode_ptr.constprop.0.isra.0>
    zcbor_int32_put(cbor_state, rc);
    2416:	4621      	mov	r1, r4
    2418:	4855      	ldr	r0, [pc, #340]	; (2570 <FIH_LABEL_FIH_CALL_END_798+0x20a>)
    241a:	f003 ffbe 	bl	639a <zcbor_int32_put>
    if (rc == 0) {
    241e:	b944      	cbnz	r4, 2432 <FIH_LABEL_FIH_CALL_END_798+0xcc>
        zcbor_tstr_put_lit_cast(cbor_state, "off");
    2420:	2103      	movs	r1, #3
    2422:	485d      	ldr	r0, [pc, #372]	; (2598 <FIH_LABEL_FIH_CALL_END_798+0x232>)
    2424:	f7ff ff06 	bl	2234 <zcbor_tstr_encode_ptr.constprop.0.isra.0>
        zcbor_uint32_put(cbor_state, curr_off);
    2428:	4b5c      	ldr	r3, [pc, #368]	; (259c <FIH_LABEL_FIH_CALL_END_798+0x236>)
    242a:	4851      	ldr	r0, [pc, #324]	; (2570 <FIH_LABEL_FIH_CALL_END_798+0x20a>)
    242c:	6819      	ldr	r1, [r3, #0]
    242e:	f003 ffb8 	bl	63a2 <zcbor_uint32_put>
    zcbor_map_end_encode(cbor_state, 10);
    2432:	210a      	movs	r1, #10
    2434:	484e      	ldr	r0, [pc, #312]	; (2570 <FIH_LABEL_FIH_CALL_END_798+0x20a>)
    2436:	f003 fff0 	bl	641a <zcbor_map_end_encode>
    boot_serial_output();
    243a:	f7ff fe0b 	bl	2054 <boot_serial_output>
    flash_area_close(fap);
    243e:	9806      	ldr	r0, [sp, #24]
    2440:	f003 fd48 	bl	5ed4 <flash_area_close>
}
    2444:	e7cb      	b.n	23de <FIH_LABEL_FIH_CALL_END_798+0x78>
    if ((result != ZCBOR_SUCCESS) || (len != decoded_len)) {
    2446:	9b07      	ldr	r3, [sp, #28]
    2448:	429d      	cmp	r5, r3
    244a:	d1d6      	bne.n	23fa <FIH_LABEL_FIH_CALL_END_798+0x94>
    size_t img_size_tmp = SIZE_MAX;     /* Temp variable for image size */
    244c:	f04f 39ff 	mov.w	r9, #4294967295
    for (int i = 0; i < upload._Upload_members_count; i++) {
    2450:	4601      	mov	r1, r0
    size_t img_chunk_off = SIZE_MAX;    /* Offset of image chunk within image  */
    2452:	46c8      	mov	r8, r9
    size_t img_chunk_len = 0;           /* Length of received image chunk */
    2454:	4605      	mov	r5, r0
    const uint8_t *img_chunk = NULL;    /* Pointer to buffer with received image chunk */
    2456:	4607      	mov	r7, r0
    2458:	9c17      	ldr	r4, [sp, #92]	; 0x5c
    245a:	aa08      	add	r2, sp, #32
    for (int i = 0; i < upload._Upload_members_count; i++) {
    245c:	42a1      	cmp	r1, r4
    245e:	d122      	bne.n	24a6 <FIH_LABEL_FIH_CALL_END_798+0x140>
    if (img_chunk_off == SIZE_MAX || img_chunk == NULL) {
    2460:	f1b8 3fff 	cmp.w	r8, #4294967295
    2464:	d0c9      	beq.n	23fa <FIH_LABEL_FIH_CALL_END_798+0x94>
    2466:	2f00      	cmp	r7, #0
    2468:	d0c7      	beq.n	23fa <FIH_LABEL_FIH_CALL_END_798+0x94>
    rc = flash_area_open(flash_area_id_from_multi_image_slot(img_num, 0), &fap);
    246a:	2100      	movs	r1, #0
    246c:	f003 f9b6 	bl	57dc <flash_area_id_from_multi_image_slot>
    2470:	a906      	add	r1, sp, #24
    2472:	b2c0      	uxtb	r0, r0
    2474:	f7ff fc9a 	bl	1dac <flash_area_open>
    if (rc) {
    2478:	4604      	mov	r4, r0
    247a:	2800      	cmp	r0, #0
    247c:	d1bd      	bne.n	23fa <FIH_LABEL_FIH_CALL_END_798+0x94>
    if (img_chunk_off == 0) {
    247e:	4e47      	ldr	r6, [pc, #284]	; (259c <FIH_LABEL_FIH_CALL_END_798+0x236>)
    2480:	f1b8 0f00 	cmp.w	r8, #0
    2484:	d166      	bne.n	2554 <FIH_LABEL_FIH_CALL_END_798+0x1ee>
        const size_t area_size = flash_area_get_size(fap);
    2486:	9806      	ldr	r0, [sp, #24]
        curr_off = 0;
    2488:	6034      	str	r4, [r6, #0]
	return (uint32_t)fa->fa_size;
    248a:	f8d0 8008 	ldr.w	r8, [r0, #8]
        if (flash_area_sector_from_off(boot_status_off(fap), &status_sector)) {
    248e:	f003 fa5e 	bl	594e <boot_status_off>
    2492:	4943      	ldr	r1, [pc, #268]	; (25a0 <FIH_LABEL_FIH_CALL_END_798+0x23a>)
    2494:	f7fe f864 	bl	560 <flash_area_sector_from_off>
    2498:	b1c8      	cbz	r0, 24ce <FIH_LABEL_FIH_CALL_END_798+0x168>
            BOOT_LOG_ERR("Unable to determine flash sector of the image trailer");
    249a:	2145      	movs	r1, #69	; 0x45
    249c:	4841      	ldr	r0, [pc, #260]	; (25a4 <FIH_LABEL_FIH_CALL_END_798+0x23e>)
    249e:	f003 fd0c 	bl	5eba <z_log_minimal_printk>
            rc = MGMT_ERR_EUNKNOWN;
    24a2:	2401      	movs	r4, #1
            goto out;
    24a4:	e7aa      	b.n	23fc <FIH_LABEL_FIH_CALL_END_798+0x96>
        switch(member->_Member_choice) {
    24a6:	7a13      	ldrb	r3, [r2, #8]
    24a8:	2b03      	cmp	r3, #3
    24aa:	d804      	bhi.n	24b6 <FIH_LABEL_FIH_CALL_END_798+0x150>
    24ac:	e8df f003 	tbb	[pc, r3]
    24b0:	0c090602 	.word	0x0c090602
                img_num = member->_Member_image;
    24b4:	6810      	ldr	r0, [r2, #0]
    for (int i = 0; i < upload._Upload_members_count; i++) {
    24b6:	3101      	adds	r1, #1
    24b8:	320c      	adds	r2, #12
    24ba:	e7cf      	b.n	245c <FIH_LABEL_FIH_CALL_END_798+0xf6>
                img_chunk_len = member->_Member_data.len;
    24bc:	e9d2 7500 	ldrd	r7, r5, [r2]
                break;
    24c0:	e7f9      	b.n	24b6 <FIH_LABEL_FIH_CALL_END_798+0x150>
                img_size_tmp = member->_Member_len;
    24c2:	f8d2 9000 	ldr.w	r9, [r2]
                break;
    24c6:	e7f6      	b.n	24b6 <FIH_LABEL_FIH_CALL_END_798+0x150>
                img_chunk_off = member->_Member_off;
    24c8:	f8d2 8000 	ldr.w	r8, [r2]
                break;
    24cc:	e7f3      	b.n	24b6 <FIH_LABEL_FIH_CALL_END_798+0x150>
        if (img_size_tmp > area_size) {
    24ce:	45c8      	cmp	r8, r9
    24d0:	d393      	bcc.n	23fa <FIH_LABEL_FIH_CALL_END_798+0x94>
        not_yet_erased = 0;
    24d2:	4b35      	ldr	r3, [pc, #212]	; (25a8 <FIH_LABEL_FIH_CALL_END_798+0x242>)
    24d4:	601c      	str	r4, [r3, #0]
        img_size = img_size_tmp;
    24d6:	4b35      	ldr	r3, [pc, #212]	; (25ac <FIH_LABEL_FIH_CALL_END_798+0x246>)
    24d8:	f8c3 9000 	str.w	r9, [r3]
                                 curr_off + img_chunk_len - 1);
    24dc:	6832      	ldr	r2, [r6, #0]
    not_yet_erased = erase_range(fap, not_yet_erased,
    24de:	f8df 80c8 	ldr.w	r8, [pc, #200]	; 25a8 <FIH_LABEL_FIH_CALL_END_798+0x242>
                                 curr_off + img_chunk_len - 1);
    24e2:	3a01      	subs	r2, #1
    not_yet_erased = erase_range(fap, not_yet_erased,
    24e4:	f8d8 1000 	ldr.w	r1, [r8]
    24e8:	9806      	ldr	r0, [sp, #24]
    24ea:	442a      	add	r2, r5
    24ec:	f7ff fe3c 	bl	2168 <erase_range>
    if (not_yet_erased < 0) {
    24f0:	2800      	cmp	r0, #0
    not_yet_erased = erase_range(fap, not_yet_erased,
    24f2:	f8c8 0000 	str.w	r0, [r8]
    if (not_yet_erased < 0) {
    24f6:	db80      	blt.n	23fa <FIH_LABEL_FIH_CALL_END_798+0x94>
    rem_bytes = img_chunk_len % flash_area_align(fap);
    24f8:	9806      	ldr	r0, [sp, #24]
    24fa:	f003 fd2a 	bl	5f52 <flash_area_align>
    24fe:	fbb5 f3f0 	udiv	r3, r5, r0
    2502:	fb03 5010 	mls	r0, r3, r0, r5
    if (curr_off + img_chunk_len + rem_bytes < img_size) {
    2506:	6832      	ldr	r2, [r6, #0]
    2508:	b2c1      	uxtb	r1, r0
    250a:	f8df 90a0 	ldr.w	r9, [pc, #160]	; 25ac <FIH_LABEL_FIH_CALL_END_798+0x246>
    img_chunk_len -= rem_bytes;
    250e:	eba5 0801 	sub.w	r8, r5, r1
    if (curr_off + img_chunk_len + rem_bytes < img_size) {
    2512:	eb08 0302 	add.w	r3, r8, r2
    2516:	f8d9 5000 	ldr.w	r5, [r9]
    251a:	4419      	add	r1, r3
    251c:	42a9      	cmp	r1, r5
    251e:	bf38      	it	cc
    2520:	2000      	movcc	r0, #0
    BOOT_LOG_INF("Writing at 0x%x until 0x%x", curr_off, curr_off + img_chunk_len);
    2522:	2149      	movs	r1, #73	; 0x49
    2524:	b2c5      	uxtb	r5, r0
    2526:	4822      	ldr	r0, [pc, #136]	; (25b0 <FIH_LABEL_FIH_CALL_END_798+0x24a>)
    2528:	f003 fcc7 	bl	5eba <z_log_minimal_printk>
    if (flash_area_align(fap) > 1 &&
    252c:	9806      	ldr	r0, [sp, #24]
    252e:	f003 fd10 	bl	5f52 <flash_area_align>
    2532:	2801      	cmp	r0, #1
    2534:	d905      	bls.n	2542 <FIH_LABEL_FIH_CALL_END_798+0x1dc>
        (((size_t)img_chunk) & (flash_area_align(fap) - 1)) != 0) {
    2536:	9806      	ldr	r0, [sp, #24]
    2538:	f003 fd0b 	bl	5f52 <flash_area_align>
    253c:	3801      	subs	r0, #1
    if (flash_area_align(fap) > 1 &&
    253e:	4207      	tst	r7, r0
    2540:	d16f      	bne.n	2622 <FIH_LABEL_FIH_CALL_END_798+0x2bc>
        rc = flash_area_write(fap, curr_off, img_chunk, img_chunk_len);
    2542:	4643      	mov	r3, r8
    2544:	463a      	mov	r2, r7
    2546:	6831      	ldr	r1, [r6, #0]
    2548:	9806      	ldr	r0, [sp, #24]
    254a:	f003 fcd9 	bl	5f00 <flash_area_write>
    if (rc == 0 && rem_bytes) {
    254e:	2800      	cmp	r0, #0
    2550:	d055      	beq.n	25fe <FIH_LABEL_FIH_CALL_END_798+0x298>
    2552:	e752      	b.n	23fa <FIH_LABEL_FIH_CALL_END_798+0x94>
    } else if (img_chunk_off != curr_off) {
    2554:	6833      	ldr	r3, [r6, #0]
    2556:	4543      	cmp	r3, r8
    2558:	f47f af50 	bne.w	23fc <FIH_LABEL_FIH_CALL_END_798+0x96>
    } else if (curr_off + img_chunk_len > img_size) {
    255c:	4a13      	ldr	r2, [pc, #76]	; (25ac <FIH_LABEL_FIH_CALL_END_798+0x246>)
    255e:	eb05 0308 	add.w	r3, r5, r8
    2562:	6812      	ldr	r2, [r2, #0]
    2564:	4293      	cmp	r3, r2
    2566:	d9b9      	bls.n	24dc <FIH_LABEL_FIH_CALL_END_798+0x176>
    2568:	e747      	b.n	23fa <FIH_LABEL_FIH_CALL_END_798+0x94>
    256a:	bf00      	nop
    256c:	2000dfc8 	.word	0x2000dfc8
    2570:	2000df98 	.word	0x2000df98
    2574:	0000949a 	.word	0x0000949a
    2578:	96f3b83d 	.word	0x96f3b83d
    257c:	2000c4e8 	.word	0x2000c4e8
    2580:	2000c6f0 	.word	0x2000c6f0
    2584:	000094a1 	.word	0x000094a1
    2588:	000094a6 	.word	0x000094a6
    258c:	000094ae 	.word	0x000094ae
    2590:	000094dd 	.word	0x000094dd
    2594:	00009497 	.word	0x00009497
    2598:	000094eb 	.word	0x000094eb
    259c:	2000df94 	.word	0x2000df94
    25a0:	2000df8c 	.word	0x2000df8c
    25a4:	00008ec9 	.word	0x00008ec9
    25a8:	2000df88 	.word	0x2000df88
    25ac:	2000df84 	.word	0x2000df84
    25b0:	000094bd 	.word	0x000094bd
            if (write_size > img_chunk_len) {
    25b4:	45c2      	cmp	sl, r8
            memset(wbs_aligned, flash_area_erased_val(fap), sizeof(wbs_aligned));
    25b6:	9806      	ldr	r0, [sp, #24]
                write_size = img_chunk_len;
    25b8:	bf88      	it	hi
    25ba:	fa5f fa88 	uxtbhi.w	sl, r8
            memset(wbs_aligned, flash_area_erased_val(fap), sizeof(wbs_aligned));
    25be:	f003 fccf 	bl	5f60 <flash_area_erased_val>
    25c2:	2240      	movs	r2, #64	; 0x40
    25c4:	4601      	mov	r1, r0
    25c6:	a818      	add	r0, sp, #96	; 0x60
    25c8:	f003 fff1 	bl	65ae <memset>
            memcpy(wbs_aligned, img_chunk, write_size);
    25cc:	4652      	mov	r2, sl
    25ce:	4639      	mov	r1, r7
    25d0:	a818      	add	r0, sp, #96	; 0x60
    25d2:	f003 ffe1 	bl	6598 <memcpy>
            rc = flash_area_write(fap, curr_off, wbs_aligned, write_size);
    25d6:	4653      	mov	r3, sl
    25d8:	6831      	ldr	r1, [r6, #0]
    25da:	9806      	ldr	r0, [sp, #24]
    25dc:	aa18      	add	r2, sp, #96	; 0x60
    25de:	f003 fc8f 	bl	5f00 <flash_area_write>
            if (rc != 0) {
    25e2:	2800      	cmp	r0, #0
    25e4:	f47f af09 	bne.w	23fa <FIH_LABEL_FIH_CALL_END_798+0x94>
            curr_off += write_size;
    25e8:	6833      	ldr	r3, [r6, #0]
            img_chunk += write_size;
    25ea:	4457      	add	r7, sl
            curr_off += write_size;
    25ec:	4453      	add	r3, sl
    25ee:	6033      	str	r3, [r6, #0]
            img_chunk_len -= write_size;
    25f0:	eba8 080a 	sub.w	r8, r8, sl
        while (img_chunk_len >= flash_area_align(fap)) {
    25f4:	9806      	ldr	r0, [sp, #24]
    25f6:	f003 fcac 	bl	5f52 <flash_area_align>
    25fa:	4580      	cmp	r8, r0
    25fc:	d2da      	bcs.n	25b4 <FIH_LABEL_FIH_CALL_END_798+0x24e>
    if (rc == 0 && rem_bytes) {
    25fe:	b99d      	cbnz	r5, 2628 <FIH_LABEL_FIH_CALL_END_798+0x2c2>
        curr_off += img_chunk_len + rem_bytes;
    2600:	6833      	ldr	r3, [r6, #0]
        if (curr_off == img_size) {
    2602:	f8d9 2000 	ldr.w	r2, [r9]
        curr_off += img_chunk_len + rem_bytes;
    2606:	442b      	add	r3, r5
    2608:	4443      	add	r3, r8
        if (curr_off == img_size) {
    260a:	4293      	cmp	r3, r2
        curr_off += img_chunk_len + rem_bytes;
    260c:	6033      	str	r3, [r6, #0]
        if (curr_off == img_size) {
    260e:	f47f aef5 	bne.w	23fc <FIH_LABEL_FIH_CALL_END_798+0x96>
	return fs->fs_off;
    2612:	4b20      	ldr	r3, [pc, #128]	; (2694 <FIH_LABEL_FIH_CALL_END_798+0x32e>)
            if (erase_range(fap, start, start) < 0) {
    2614:	9806      	ldr	r0, [sp, #24]
    2616:	681a      	ldr	r2, [r3, #0]
    2618:	4611      	mov	r1, r2
    261a:	f7ff fda5 	bl	2168 <erase_range>
    261e:	0fc4      	lsrs	r4, r0, #31
    2620:	e6ec      	b.n	23fc <FIH_LABEL_FIH_CALL_END_798+0x96>
        uint8_t write_size = MCUBOOT_SERIAL_UNALIGNED_BUFFER_SIZE;
    2622:	f04f 0a40 	mov.w	sl, #64	; 0x40
    2626:	e7e5      	b.n	25f4 <FIH_LABEL_FIH_CALL_END_798+0x28e>
        memset(wbs_aligned, flash_area_erased_val(fap), sizeof(wbs_aligned));
    2628:	9806      	ldr	r0, [sp, #24]
    262a:	f003 fc99 	bl	5f60 <flash_area_erased_val>
    262e:	2208      	movs	r2, #8
    2630:	4601      	mov	r1, r0
    2632:	a818      	add	r0, sp, #96	; 0x60
    2634:	f003 ffbb 	bl	65ae <memset>
        memcpy(wbs_aligned, img_chunk + img_chunk_len, rem_bytes);
    2638:	462a      	mov	r2, r5
    263a:	eb07 0108 	add.w	r1, r7, r8
    263e:	a818      	add	r0, sp, #96	; 0x60
    2640:	f003 ffaa 	bl	6598 <memcpy>
        rc = flash_area_write(fap, curr_off + img_chunk_len, wbs_aligned,
    2644:	f8dd a018 	ldr.w	sl, [sp, #24]
    2648:	6831      	ldr	r1, [r6, #0]
    264a:	4650      	mov	r0, sl
    264c:	eb08 0701 	add.w	r7, r8, r1
    2650:	f003 fc7f 	bl	5f52 <flash_area_align>
    2654:	4639      	mov	r1, r7
    2656:	4603      	mov	r3, r0
    2658:	aa18      	add	r2, sp, #96	; 0x60
    265a:	4650      	mov	r0, sl
    265c:	f003 fc50 	bl	5f00 <flash_area_write>
    if (rc == 0) {
    2660:	2800      	cmp	r0, #0
    2662:	f47f aeca 	bne.w	23fa <FIH_LABEL_FIH_CALL_END_798+0x94>
    2666:	e7cb      	b.n	2600 <FIH_LABEL_FIH_CALL_END_798+0x29a>
    } else if (hdr->nh_group == MGMT_GROUP_ID_DEFAULT) {
    2668:	2800      	cmp	r0, #0
    266a:	f47f ae40 	bne.w	22ee <boot_serial_input+0x46>
        switch (hdr->nh_id) {
    266e:	79e3      	ldrb	r3, [r4, #7]
    2670:	2b01      	cmp	r3, #1
    2672:	f43f ae3d 	beq.w	22f0 <boot_serial_input+0x48>
    2676:	2b05      	cmp	r3, #5
    2678:	d003      	beq.n	2682 <FIH_LABEL_FIH_CALL_END_798+0x31c>
    267a:	2b00      	cmp	r3, #0
    267c:	f47f ae37 	bne.w	22ee <boot_serial_input+0x46>
    2680:	e6ad      	b.n	23de <FIH_LABEL_FIH_CALL_END_798+0x78>
    bs_rc_rsp(0);
    2682:	f7ff fde3 	bl	224c <bs_rc_rsp>
		(void) arch_syscall_invoke1(parm0.x, K_SYSCALL_K_BUSY_WAIT);
		return;
	}
#endif
	compiler_barrier();
	z_impl_k_busy_wait(usec_to_wait);
    2686:	4804      	ldr	r0, [pc, #16]	; (2698 <FIH_LABEL_FIH_CALL_END_798+0x332>)
    2688:	f005 ffee 	bl	8668 <z_impl_k_busy_wait>
    sys_reboot(SYS_REBOOT_COLD);
    268c:	2001      	movs	r0, #1
    268e:	f7ff fb59 	bl	1d44 <sys_reboot>
    2692:	bf00      	nop
    2694:	2000df8c 	.word	0x2000df8c
    2698:	0003d090 	.word	0x0003d090

0000269c <boot_serial_start>:
 * serial port.
 */
void
boot_serial_start(const struct boot_uart_funcs *f)
{
    bs_entry = true;
    269c:	2301      	movs	r3, #1
{
    269e:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
    int dec_off = 0;
    26a2:	2400      	movs	r4, #0
{
    26a4:	4606      	mov	r6, r0
    bs_entry = true;
    26a6:	f8df 80a0 	ldr.w	r8, [pc, #160]	; 2748 <boot_serial_start+0xac>
    26aa:	4d28      	ldr	r5, [pc, #160]	; (274c <boot_serial_start+0xb0>)
    26ac:	f888 3000 	strb.w	r3, [r8]
    boot_uf = f;
    26b0:	4b27      	ldr	r3, [pc, #156]	; (2750 <boot_serial_start+0xb4>)
        rc = f->read(in_buf + off, sizeof(in_buf) - off, &full_line);
    26b2:	4f28      	ldr	r7, [pc, #160]	; (2754 <boot_serial_start+0xb8>)
    int dec_off = 0;
    26b4:	9400      	str	r4, [sp, #0]
    boot_uf = f;
    26b6:	6018      	str	r0, [r3, #0]
    while (timeout_in_ms > 0 || bs_entry) {
    26b8:	f898 3000 	ldrb.w	r3, [r8]
    26bc:	b913      	cbnz	r3, 26c4 <boot_serial_start+0x28>
    boot_serial_read_console(f,0);
}
    26be:	b002      	add	sp, #8
    26c0:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    26c4:	f000 f970 	bl	29a8 <arch_cpu_idle>
    26c8:	4b23      	ldr	r3, [pc, #140]	; (2758 <boot_serial_start+0xbc>)
        rc = f->read(in_buf + off, sizeof(in_buf) - off, &full_line);
    26ca:	f5c4 6180 	rsb	r1, r4, #1024	; 0x400
    26ce:	f8c3 5600 	str.w	r5, [r3, #1536]	; 0x600
    26d2:	f8c3 5604 	str.w	r5, [r3, #1540]	; 0x604
    26d6:	f8c3 5608 	str.w	r5, [r3, #1544]	; 0x608
    26da:	f8c3 560c 	str.w	r5, [r3, #1548]	; 0x60c
    26de:	f8c3 5610 	str.w	r5, [r3, #1552]	; 0x610
    26e2:	f8c3 5614 	str.w	r5, [r3, #1556]	; 0x614
    26e6:	f8c3 5618 	str.w	r5, [r3, #1560]	; 0x618
    26ea:	f8c3 561c 	str.w	r5, [r3, #1564]	; 0x61c
    26ee:	6833      	ldr	r3, [r6, #0]
    26f0:	aa01      	add	r2, sp, #4
    26f2:	3101      	adds	r1, #1
    26f4:	1938      	adds	r0, r7, r4
    26f6:	4798      	blx	r3
        if (rc <= 0 && !full_line) {
    26f8:	2800      	cmp	r0, #0
    26fa:	9b01      	ldr	r3, [sp, #4]
    26fc:	dc01      	bgt.n	2702 <boot_serial_start+0x66>
    26fe:	2b00      	cmp	r3, #0
    2700:	d0da      	beq.n	26b8 <boot_serial_start+0x1c>
        off += rc;
    2702:	4404      	add	r4, r0
        if (!full_line) {
    2704:	b92b      	cbnz	r3, 2712 <boot_serial_start+0x76>
            if (off == max_input) {
    2706:	f240 4301 	movw	r3, #1025	; 0x401
    270a:	429c      	cmp	r4, r3
    270c:	d1d4      	bne.n	26b8 <boot_serial_start+0x1c>
                off = 0;
    270e:	2400      	movs	r4, #0
    2710:	e7d2      	b.n	26b8 <boot_serial_start+0x1c>
        if (in_buf[0] == SHELL_NLIP_PKT_START1 &&
    2712:	783b      	ldrb	r3, [r7, #0]
    2714:	2b06      	cmp	r3, #6
    2716:	d109      	bne.n	272c <boot_serial_start+0x90>
    2718:	787b      	ldrb	r3, [r7, #1]
    271a:	2b09      	cmp	r3, #9
    271c:	d10b      	bne.n	2736 <boot_serial_start+0x9a>
            dec_off = 0;
    271e:	2300      	movs	r3, #0
    2720:	9300      	str	r3, [sp, #0]
            rc = boot_serial_in_dec(&in_buf[2], off - 2, dec_buf, &dec_off, max_input);
    2722:	4669      	mov	r1, sp
    2724:	1ea0      	subs	r0, r4, #2
    2726:	f7ff fd51 	bl	21cc <boot_serial_in_dec.constprop.0>
    272a:	e004      	b.n	2736 <boot_serial_start+0x9a>
        } else if (in_buf[0] == SHELL_NLIP_DATA_START1 &&
    272c:	2b04      	cmp	r3, #4
    272e:	d102      	bne.n	2736 <boot_serial_start+0x9a>
    2730:	787b      	ldrb	r3, [r7, #1]
    2732:	2b14      	cmp	r3, #20
    2734:	d0f5      	beq.n	2722 <boot_serial_start+0x86>
        if (rc == 1) {
    2736:	2801      	cmp	r0, #1
    2738:	d1e9      	bne.n	270e <boot_serial_start+0x72>
            boot_serial_input(&dec_buf[2], dec_off - 2);
    273a:	9900      	ldr	r1, [sp, #0]
    273c:	4807      	ldr	r0, [pc, #28]	; (275c <boot_serial_start+0xc0>)
    273e:	3902      	subs	r1, #2
    2740:	f7ff fdb2 	bl	22a8 <boot_serial_input>
    2744:	e7e3      	b.n	270e <boot_serial_start+0x72>
    2746:	bf00      	nop
    2748:	2000fa12 	.word	0x2000fa12
    274c:	6e524635 	.word	0x6e524635
    2750:	2000dfcc 	.word	0x2000dfcc
    2754:	2000fe14 	.word	0x2000fe14
    2758:	50018000 	.word	0x50018000
    275c:	2000fa15 	.word	0x2000fa15

00002760 <decode_repeated_Upload_members>:
	return tmp_result;
}

static bool decode_repeated_Upload_members(
		zcbor_state_t *state, struct Upload_members *result)
{
    2760:	b573      	push	{r0, r1, r4, r5, r6, lr}
    2762:	4604      	mov	r4, r0
    2764:	460d      	mov	r5, r1
	bool tmp_result = (((zcbor_union_start_code(state) && (int_res = (((((zcbor_tstr_expect(state, ((tmp_str.value = (uint8_t *)"image", tmp_str.len = sizeof("image") - 1, &tmp_str)))))
    2766:	f003 fead 	bl	64c4 <zcbor_union_start_code>
    276a:	2800      	cmp	r0, #0
    276c:	d068      	beq.n	2840 <CONFIG_MAIN_STACK_SIZE+0x40>
    276e:	4b35      	ldr	r3, [pc, #212]	; (2844 <CONFIG_MAIN_STACK_SIZE+0x44>)
    2770:	4669      	mov	r1, sp
    2772:	9300      	str	r3, [sp, #0]
    2774:	2305      	movs	r3, #5
    2776:	4620      	mov	r0, r4
    2778:	9301      	str	r3, [sp, #4]
    277a:	f003 fd79 	bl	6270 <zcbor_tstr_expect>
	|| (zcbor_union_elem_code(state) && ((((zcbor_tstr_expect(state, ((tmp_str.value = (uint8_t *)"sha", tmp_str.len = sizeof("sha") - 1, &tmp_str)))))
    277e:	b160      	cbz	r0, 279a <decode_repeated_Upload_members+0x3a>
	&& (zcbor_int32_decode(state, (&(*result)._Member_image)))) && (((*result)._Member_choice = _Member_image) || 1))
    2780:	4629      	mov	r1, r5
    2782:	4620      	mov	r0, r4
    2784:	f003 fd55 	bl	6232 <zcbor_int32_decode>
    2788:	b138      	cbz	r0, 279a <decode_repeated_Upload_members+0x3a>
    278a:	2300      	movs	r3, #0
    278c:	722b      	strb	r3, [r5, #8]
	&& (zcbor_bstr_decode(state, (&(*result)._Member_sha)))) && (((*result)._Member_choice = _Member_sha) || 1)))), zcbor_union_end_code(state), int_res))));
    278e:	4620      	mov	r0, r4
    2790:	f003 fe9f 	bl	64d2 <zcbor_union_end_code>
	bool tmp_result = (((zcbor_union_start_code(state) && (int_res = (((((zcbor_tstr_expect(state, ((tmp_str.value = (uint8_t *)"image", tmp_str.len = sizeof("image") - 1, &tmp_str)))))
    2794:	2001      	movs	r0, #1

	if (!tmp_result)
		zcbor_trace();

	return tmp_result;
}
    2796:	b002      	add	sp, #8
    2798:	bd70      	pop	{r4, r5, r6, pc}
	|| (zcbor_union_elem_code(state) && ((((zcbor_tstr_expect(state, ((tmp_str.value = (uint8_t *)"data", tmp_str.len = sizeof("data") - 1, &tmp_str)))))
    279a:	4620      	mov	r0, r4
    279c:	f003 fe95 	bl	64ca <zcbor_union_elem_code>
    27a0:	b178      	cbz	r0, 27c2 <decode_repeated_Upload_members+0x62>
    27a2:	4b29      	ldr	r3, [pc, #164]	; (2848 <CONFIG_MAIN_STACK_SIZE+0x48>)
    27a4:	4669      	mov	r1, sp
    27a6:	9300      	str	r3, [sp, #0]
    27a8:	2304      	movs	r3, #4
    27aa:	4620      	mov	r0, r4
    27ac:	9301      	str	r3, [sp, #4]
    27ae:	f003 fd5f 	bl	6270 <zcbor_tstr_expect>
    27b2:	b130      	cbz	r0, 27c2 <decode_repeated_Upload_members+0x62>
	&& (zcbor_bstr_decode(state, (&(*result)._Member_data)))) && (((*result)._Member_choice = _Member_data) || 1)))
    27b4:	4629      	mov	r1, r5
    27b6:	4620      	mov	r0, r4
    27b8:	f003 fd57 	bl	626a <zcbor_bstr_decode>
    27bc:	b108      	cbz	r0, 27c2 <decode_repeated_Upload_members+0x62>
    27be:	2301      	movs	r3, #1
    27c0:	e7e4      	b.n	278c <decode_repeated_Upload_members+0x2c>
	|| (zcbor_union_elem_code(state) && ((((zcbor_tstr_expect(state, ((tmp_str.value = (uint8_t *)"len", tmp_str.len = sizeof("len") - 1, &tmp_str)))))
    27c2:	4620      	mov	r0, r4
    27c4:	f003 fe81 	bl	64ca <zcbor_union_elem_code>
    27c8:	b178      	cbz	r0, 27ea <decode_repeated_Upload_members+0x8a>
    27ca:	4b20      	ldr	r3, [pc, #128]	; (284c <CONFIG_MAIN_STACK_SIZE+0x4c>)
    27cc:	4669      	mov	r1, sp
    27ce:	9300      	str	r3, [sp, #0]
    27d0:	2303      	movs	r3, #3
    27d2:	4620      	mov	r0, r4
    27d4:	9301      	str	r3, [sp, #4]
    27d6:	f003 fd4b 	bl	6270 <zcbor_tstr_expect>
    27da:	b130      	cbz	r0, 27ea <decode_repeated_Upload_members+0x8a>
	&& (zcbor_int32_decode(state, (&(*result)._Member_len)))) && (((*result)._Member_choice = _Member_len) || 1)))
    27dc:	4629      	mov	r1, r5
    27de:	4620      	mov	r0, r4
    27e0:	f003 fd27 	bl	6232 <zcbor_int32_decode>
    27e4:	b108      	cbz	r0, 27ea <decode_repeated_Upload_members+0x8a>
    27e6:	2302      	movs	r3, #2
    27e8:	e7d0      	b.n	278c <decode_repeated_Upload_members+0x2c>
	|| (zcbor_union_elem_code(state) && ((((zcbor_tstr_expect(state, ((tmp_str.value = (uint8_t *)"off", tmp_str.len = sizeof("off") - 1, &tmp_str)))))
    27ea:	4620      	mov	r0, r4
    27ec:	f003 fe6d 	bl	64ca <zcbor_union_elem_code>
    27f0:	b178      	cbz	r0, 2812 <CONFIG_MAIN_STACK_SIZE+0x12>
    27f2:	2603      	movs	r6, #3
    27f4:	4b16      	ldr	r3, [pc, #88]	; (2850 <CONFIG_MAIN_STACK_SIZE+0x50>)
    27f6:	4669      	mov	r1, sp
    27f8:	4620      	mov	r0, r4
    27fa:	9300      	str	r3, [sp, #0]
    27fc:	9601      	str	r6, [sp, #4]
    27fe:	f003 fd37 	bl	6270 <zcbor_tstr_expect>
    2802:	b130      	cbz	r0, 2812 <CONFIG_MAIN_STACK_SIZE+0x12>
	&& (zcbor_int32_decode(state, (&(*result)._Member_off)))) && (((*result)._Member_choice = _Member_off) || 1)))
    2804:	4629      	mov	r1, r5
    2806:	4620      	mov	r0, r4
    2808:	f003 fd13 	bl	6232 <zcbor_int32_decode>
    280c:	b108      	cbz	r0, 2812 <CONFIG_MAIN_STACK_SIZE+0x12>
    280e:	722e      	strb	r6, [r5, #8]
    2810:	e7bd      	b.n	278e <decode_repeated_Upload_members+0x2e>
	|| (zcbor_union_elem_code(state) && ((((zcbor_tstr_expect(state, ((tmp_str.value = (uint8_t *)"sha", tmp_str.len = sizeof("sha") - 1, &tmp_str)))))
    2812:	4620      	mov	r0, r4
    2814:	f003 fe59 	bl	64ca <zcbor_union_elem_code>
    2818:	b178      	cbz	r0, 283a <CONFIG_MAIN_STACK_SIZE+0x3a>
    281a:	4b0e      	ldr	r3, [pc, #56]	; (2854 <CONFIG_MAIN_STACK_SIZE+0x54>)
    281c:	4669      	mov	r1, sp
    281e:	9300      	str	r3, [sp, #0]
    2820:	2303      	movs	r3, #3
    2822:	4620      	mov	r0, r4
    2824:	9301      	str	r3, [sp, #4]
    2826:	f003 fd23 	bl	6270 <zcbor_tstr_expect>
    282a:	b130      	cbz	r0, 283a <CONFIG_MAIN_STACK_SIZE+0x3a>
	&& (zcbor_bstr_decode(state, (&(*result)._Member_sha)))) && (((*result)._Member_choice = _Member_sha) || 1)))), zcbor_union_end_code(state), int_res))));
    282c:	4629      	mov	r1, r5
    282e:	4620      	mov	r0, r4
    2830:	f003 fd1b 	bl	626a <zcbor_bstr_decode>
    2834:	b108      	cbz	r0, 283a <CONFIG_MAIN_STACK_SIZE+0x3a>
    2836:	2304      	movs	r3, #4
    2838:	e7a8      	b.n	278c <decode_repeated_Upload_members+0x2c>
    283a:	4620      	mov	r0, r4
    283c:	f003 fe49 	bl	64d2 <zcbor_union_end_code>
	bool tmp_result = (((zcbor_union_start_code(state) && (int_res = (((((zcbor_tstr_expect(state, ((tmp_str.value = (uint8_t *)"image", tmp_str.len = sizeof("image") - 1, &tmp_str)))))
    2840:	2000      	movs	r0, #0
    2842:	e7a8      	b.n	2796 <decode_repeated_Upload_members+0x36>
    2844:	0000912f 	.word	0x0000912f
    2848:	000094ef 	.word	0x000094ef
    284c:	000094f4 	.word	0x000094f4
    2850:	000094eb 	.word	0x000094eb
    2854:	000094f8 	.word	0x000094f8

00002858 <cbor_decode_Upload>:

int cbor_decode_Upload(
		const uint8_t *payload, size_t payload_len,
		struct Upload *result,
		size_t *payload_len_out)
{
    2858:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
	zcbor_state_t states[4];

	zcbor_new_state(states, sizeof(states) / sizeof(zcbor_state_t), payload, payload_len, 1);
    285c:	f04f 0901 	mov.w	r9, #1
{
    2860:	b09d      	sub	sp, #116	; 0x74
	zcbor_new_state(states, sizeof(states) / sizeof(zcbor_state_t), payload, payload_len, 1);
    2862:	ac04      	add	r4, sp, #16
{
    2864:	4607      	mov	r7, r0
    2866:	460e      	mov	r6, r1
    2868:	4690      	mov	r8, r2
    286a:	461d      	mov	r5, r3
	zcbor_new_state(states, sizeof(states) / sizeof(zcbor_state_t), payload, payload_len, 1);
    286c:	4602      	mov	r2, r0
    286e:	460b      	mov	r3, r1
    2870:	4620      	mov	r0, r4
    2872:	2104      	movs	r1, #4
    2874:	f8cd 9000 	str.w	r9, [sp]
    2878:	f003 fe2f 	bl	64da <zcbor_new_state>
	bool tmp_result = (((zcbor_map_start_decode(state) && ((zcbor_multi_decode(1, 5, &(*result)._Upload_members_count, (zcbor_decoder_t *)decode_repeated_Upload_members, state, (&(*result)._Upload_members), sizeof(struct Upload_members))) || (zcbor_list_map_end_force_decode(state), false)) && zcbor_map_end_decode(state))));
    287c:	4620      	mov	r0, r4
    287e:	f003 fcfa 	bl	6276 <zcbor_map_start_decode>
    2882:	b170      	cbz	r0, 28a2 <cbor_decode_Upload+0x4a>
    2884:	230c      	movs	r3, #12
    2886:	2105      	movs	r1, #5
    2888:	e9cd 8301 	strd	r8, r3, [sp, #4]
    288c:	4648      	mov	r0, r9
    288e:	4b11      	ldr	r3, [pc, #68]	; (28d4 <cbor_decode_Upload+0x7c>)
    2890:	9400      	str	r4, [sp, #0]
    2892:	f108 023c 	add.w	r2, r8, #60	; 0x3c
    2896:	f003 fd0e 	bl	62b6 <zcbor_multi_decode>
    289a:	b960      	cbnz	r0, 28b6 <cbor_decode_Upload+0x5e>
    289c:	4620      	mov	r0, r4
    289e:	f003 fd05 	bl	62ac <zcbor_list_map_end_force_decode>
/** Return the current error state, replacing it with SUCCESS. */
static inline int zcbor_pop_error(zcbor_state_t *state)
{
	int err = state->constant_state->error;

	state->constant_state->error = ZCBOR_SUCCESS;
    28a2:	2200      	movs	r2, #0
	int err = state->constant_state->error;
    28a4:	9b09      	ldr	r3, [sp, #36]	; 0x24
    28a6:	68d8      	ldr	r0, [r3, #12]
	state->constant_state->error = ZCBOR_SUCCESS;
    28a8:	60da      	str	r2, [r3, #12]
				(size_t)states[0].payload - (size_t)payload);
	}

	if (!ret) {
		int status = zcbor_pop_error(states);
		return (status == ZCBOR_SUCCESS) ? ZCBOR_ERR_UNKNOWN : status;
    28aa:	4290      	cmp	r0, r2
    28ac:	bf08      	it	eq
    28ae:	201f      	moveq	r0, #31
	}
	return ZCBOR_SUCCESS;
}
    28b0:	b01d      	add	sp, #116	; 0x74
    28b2:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
	bool tmp_result = (((zcbor_map_start_decode(state) && ((zcbor_multi_decode(1, 5, &(*result)._Upload_members_count, (zcbor_decoder_t *)decode_repeated_Upload_members, state, (&(*result)._Upload_members), sizeof(struct Upload_members))) || (zcbor_list_map_end_force_decode(state), false)) && zcbor_map_end_decode(state))));
    28b6:	4620      	mov	r0, r4
    28b8:	f003 fcf6 	bl	62a8 <zcbor_map_end_decode>
    28bc:	2800      	cmp	r0, #0
    28be:	d0f0      	beq.n	28a2 <cbor_decode_Upload+0x4a>
	if (ret && (payload_len_out != NULL)) {
    28c0:	b90d      	cbnz	r5, 28c6 <cbor_decode_Upload+0x6e>
	return ZCBOR_SUCCESS;
    28c2:	2000      	movs	r0, #0
    28c4:	e7f4      	b.n	28b0 <cbor_decode_Upload+0x58>
		*payload_len_out = MIN(payload_len,
    28c6:	9b04      	ldr	r3, [sp, #16]
    28c8:	1bdb      	subs	r3, r3, r7
    28ca:	42b3      	cmp	r3, r6
    28cc:	bf94      	ite	ls
    28ce:	602b      	strls	r3, [r5, #0]
    28d0:	602e      	strhi	r6, [r5, #0]
    28d2:	e7f6      	b.n	28c2 <cbor_decode_Upload+0x6a>
    28d4:	00002761 	.word	0x00002761

000028d8 <get_result_len>:
	return true;
}


static uint_fast32_t get_result_len(const void *const input, uint_fast32_t max_result_len)
{
    28d8:	4602      	mov	r2, r0

	for (; len > 0; len--) {
#ifdef CONFIG_BIG_ENDIAN
		if (u8_result[max_result_len - len] != 0) {
#else
		if (u8_result[len - 1] != 0) {
    28da:	1e4b      	subs	r3, r1, #1
{
    28dc:	4608      	mov	r0, r1
		if (u8_result[len - 1] != 0) {
    28de:	5cd1      	ldrb	r1, [r2, r3]
    28e0:	b151      	cbz	r1, 28f8 <get_result_len+0x20>
			break;
		}
	}

	/* Round up to nearest power of 2. */
	return len <= 2 ? len : (uint8_t)(1 << log2ceil(len));
    28e2:	2802      	cmp	r0, #2
    28e4:	d90f      	bls.n	2906 <get_result_len+0x2e>
    28e6:	4b08      	ldr	r3, [pc, #32]	; (2908 <get_result_len+0x30>)
    28e8:	4403      	add	r3, r0
    28ea:	2001      	movs	r0, #1
    28ec:	f813 3c02 	ldrb.w	r3, [r3, #-2]
    28f0:	4098      	lsls	r0, r3
    28f2:	b2c0      	uxtb	r0, r0
    28f4:	4770      	bx	lr
	for (; len > 0; len--) {
    28f6:	b12b      	cbz	r3, 2904 <get_result_len+0x2c>
		if (u8_result[len - 1] != 0) {
    28f8:	4618      	mov	r0, r3
    28fa:	3b01      	subs	r3, #1
    28fc:	5cd1      	ldrb	r1, [r2, r3]
    28fe:	2900      	cmp	r1, #0
    2900:	d0f9      	beq.n	28f6 <get_result_len+0x1e>
    2902:	e7ee      	b.n	28e2 <get_result_len+0xa>
    2904:	4618      	mov	r0, r3
}
    2906:	4770      	bx	lr
    2908:	000094fc 	.word	0x000094fc

0000290c <value_encode>:
}


static bool value_encode(zcbor_state_t *state, zcbor_major_type_t major_type,
		const void *const input, uint_fast32_t max_result_len)
{
    290c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    290e:	4605      	mov	r5, r0
    2910:	460f      	mov	r7, r1
	zcbor_assert(max_result_len != 0, "0-length result not supported.\r\n");

	uint_fast32_t result_len = get_result_len(input, max_result_len);
    2912:	4610      	mov	r0, r2
    2914:	4619      	mov	r1, r3
{
    2916:	4616      	mov	r6, r2
	uint_fast32_t result_len = get_result_len(input, max_result_len);
    2918:	f7ff ffde 	bl	28d8 <get_result_len>
	if ((result_len == 1) && (u8_result[0] <= ZCBOR_VALUE_IN_HEADER)) {
    291c:	2801      	cmp	r0, #1
	uint_fast32_t result_len = get_result_len(input, max_result_len);
    291e:	4604      	mov	r4, r0
	if ((state->payload + 1 + encoded_len) > state->payload_end) {
    2920:	682a      	ldr	r2, [r5, #0]
    2922:	68e9      	ldr	r1, [r5, #12]
	if ((result_len == 1) && (u8_result[0] <= ZCBOR_VALUE_IN_HEADER)) {
    2924:	d11c      	bne.n	2960 <value_encode+0x54>
    2926:	7833      	ldrb	r3, [r6, #0]
    2928:	2b17      	cmp	r3, #23
    292a:	d904      	bls.n	2936 <value_encode+0x2a>
	if ((state->payload + 1 + encoded_len) > state->payload_end) {
    292c:	1c93      	adds	r3, r2, #2
    292e:	4299      	cmp	r1, r3
    2930:	d31a      	bcc.n	2968 <value_encode+0x5c>
	return len == 0 ? value0 : (uint8_t)(24 + log2ceil(len));
    2932:	2300      	movs	r3, #0
    2934:	e025      	b.n	2982 <value_encode+0x76>
	if ((state->payload + 1 + encoded_len) > state->payload_end) {
    2936:	1c50      	adds	r0, r2, #1
    2938:	4281      	cmp	r1, r0
    293a:	d315      	bcc.n	2968 <value_encode+0x5c>
		return 0;
    293c:	2400      	movs	r4, #0
	ZCBOR_CHECK_PAYLOAD();
    293e:	428a      	cmp	r2, r1
    2940:	d212      	bcs.n	2968 <value_encode+0x5c>
	*(state->payload_mut++) = (uint8_t)((major_type << 5) | (additional & 0x1F));
    2942:	1c51      	adds	r1, r2, #1
    2944:	f003 031f 	and.w	r3, r3, #31
    2948:	6029      	str	r1, [r5, #0]
    294a:	ea43 1147 	orr.w	r1, r3, r7, lsl #5
    294e:	7011      	strb	r1, [r2, #0]
	for (; encoded_len > 0; encoded_len--) {
    2950:	4434      	add	r4, r6
    2952:	42b4      	cmp	r4, r6
    2954:	d118      	bne.n	2988 <value_encode+0x7c>
	state->elem_count++;
    2956:	68ab      	ldr	r3, [r5, #8]
	return true;
    2958:	2001      	movs	r0, #1
	state->elem_count++;
    295a:	3301      	adds	r3, #1
    295c:	60ab      	str	r3, [r5, #8]
	return true;
    295e:	e007      	b.n	2970 <value_encode+0x64>
	if ((state->payload + 1 + encoded_len) > state->payload_end) {
    2960:	1c43      	adds	r3, r0, #1
    2962:	4413      	add	r3, r2
    2964:	4299      	cmp	r1, r3
    2966:	d204      	bcs.n	2972 <value_encode+0x66>
{
#ifdef ZCBOR_STOP_ON_ERROR
	if (zcbor_check_error(state))
#endif
	{
		state->constant_state->error = err;
    2968:	2208      	movs	r2, #8
		ZCBOR_ERR(ZCBOR_ERR_NO_PAYLOAD);
    296a:	2000      	movs	r0, #0
    296c:	696b      	ldr	r3, [r5, #20]
    296e:	60da      	str	r2, [r3, #12]
	const void *const result = get_result(input, max_result_len, result_len);

	return value_encode_len(state, major_type, result, result_len);
}
    2970:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	return len == 0 ? value0 : (uint8_t)(24 + log2ceil(len));
    2972:	b908      	cbnz	r0, 2978 <value_encode+0x6c>
	if (!encode_header_byte(state, major_type,
    2974:	7833      	ldrb	r3, [r6, #0]
    2976:	e7e2      	b.n	293e <value_encode+0x32>
	switch(val) {
    2978:	1e83      	subs	r3, r0, #2
    297a:	2b06      	cmp	r3, #6
    297c:	d8d9      	bhi.n	2932 <value_encode+0x26>
    297e:	4806      	ldr	r0, [pc, #24]	; (2998 <value_encode+0x8c>)
    2980:	5cc3      	ldrb	r3, [r0, r3]
	return len == 0 ? value0 : (uint8_t)(24 + log2ceil(len));
    2982:	3318      	adds	r3, #24
    2984:	b2db      	uxtb	r3, r3
    2986:	e7da      	b.n	293e <value_encode+0x32>
		*(state->payload_mut++) = u8_result[encoded_len - 1];
    2988:	682b      	ldr	r3, [r5, #0]
    298a:	1c5a      	adds	r2, r3, #1
    298c:	602a      	str	r2, [r5, #0]
    298e:	f814 2d01 	ldrb.w	r2, [r4, #-1]!
    2992:	701a      	strb	r2, [r3, #0]
	for (; encoded_len > 0; encoded_len--) {
    2994:	e7dd      	b.n	2952 <value_encode+0x46>
    2996:	bf00      	nop
    2998:	000094fc 	.word	0x000094fc

0000299c <z_arm_cpu_idle_init>:
 * void z_arm_cpu_idle_init(void);
 */

SECTION_FUNC(TEXT, z_arm_cpu_idle_init)
#if defined(CONFIG_CPU_CORTEX_M)
	ldr	r1, =_SCB_SCR
    299c:	4901      	ldr	r1, [pc, #4]	; (29a4 <z_arm_cpu_idle_init+0x8>)
	movs.n	r2, #_SCR_INIT_BITS
    299e:	2210      	movs	r2, #16
	str	r2, [r1]
    29a0:	600a      	str	r2, [r1, #0]
#endif
	bx	lr
    29a2:	4770      	bx	lr
	ldr	r1, =_SCB_SCR
    29a4:	e000ed10 	.word	0xe000ed10

000029a8 <arch_cpu_idle>:
	 * before entering low power state.
	 *
	 * Set PRIMASK before configuring BASEPRI to prevent interruption
	 * before wake-up.
	 */
	cpsid	i
    29a8:	b672      	cpsid	i

	/*
	 * Set wake-up interrupt priority to the lowest and synchronise to
	 * ensure that this is visible to the WFI instruction.
	 */
	eors.n	r0, r0
    29aa:	4040      	eors	r0, r0
	msr	BASEPRI, r0
    29ac:	f380 8811 	msr	BASEPRI, r0
	isb
    29b0:	f3bf 8f6f 	isb	sy

	/*
	 * Wait for all memory transactions to complete before entering low
	 * power state.
	 */
	dsb
    29b4:	f3bf 8f4f 	dsb	sy

	/* Enter low power state */
	wfi
    29b8:	bf30      	wfi

	/*
	 * Clear PRIMASK and flush instruction buffer to immediately service
	 * the wake-up interrupt.
	 */
	cpsie	i
    29ba:	b662      	cpsie	i
	isb
    29bc:	f3bf 8f6f 	isb	sy

	bx	lr
    29c0:	4770      	bx	lr
    29c2:	bf00      	nop

000029c4 <arch_cpu_atomic_idle>:

	/*
	 * Lock PRIMASK while sleeping: wfe will still get interrupted by
	 * incoming interrupts but the CPU will not service them right away.
	 */
	cpsid	i
    29c4:	b672      	cpsid	i
	cpsie	i
_irq_disabled:

#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	/* r1: zero, for setting BASEPRI (needs a register) */
	eors.n	r1, r1
    29c6:	4049      	eors	r1, r1

	/* unlock BASEPRI so wfe gets interrupted by incoming interrupts */
	msr	BASEPRI, r1
    29c8:	f381 8811 	msr	BASEPRI, r1

	wfe
    29cc:	bf20      	wfe

	msr	BASEPRI, r0
    29ce:	f380 8811 	msr	BASEPRI, r0
	cpsie	i
    29d2:	b662      	cpsie	i
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
	bx	lr
    29d4:	4770      	bx	lr
    29d6:	bf00      	nop

000029d8 <z_arm_fatal_error>:
	LOG_ERR("Faulting instruction address (r15/pc): 0x%08x",
		esf->basic.pc);
}

void z_arm_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
{
    29d8:	b537      	push	{r0, r1, r2, r4, r5, lr}
    29da:	4605      	mov	r5, r0

	if (esf != NULL) {
    29dc:	460c      	mov	r4, r1
    29de:	b1c9      	cbz	r1, 2a14 <z_arm_fatal_error+0x3c>
	LOG_ERR("r0/a1:  0x%08x  r1/a2:  0x%08x  r2/a3:  0x%08x",
    29e0:	688b      	ldr	r3, [r1, #8]
    29e2:	4810      	ldr	r0, [pc, #64]	; (2a24 <z_arm_fatal_error+0x4c>)
    29e4:	9300      	str	r3, [sp, #0]
    29e6:	e9d1 2300 	ldrd	r2, r3, [r1]
    29ea:	2145      	movs	r1, #69	; 0x45
    29ec:	f003 fa65 	bl	5eba <z_log_minimal_printk>
	LOG_ERR("r3/a4:  0x%08x r12/ip:  0x%08x r14/lr:  0x%08x",
    29f0:	6963      	ldr	r3, [r4, #20]
    29f2:	2145      	movs	r1, #69	; 0x45
    29f4:	9300      	str	r3, [sp, #0]
    29f6:	e9d4 2303 	ldrd	r2, r3, [r4, #12]
    29fa:	480b      	ldr	r0, [pc, #44]	; (2a28 <z_arm_fatal_error+0x50>)
    29fc:	f003 fa5d 	bl	5eba <z_log_minimal_printk>
	LOG_ERR(" xpsr:  0x%08x", esf->basic.xpsr);
    2a00:	2145      	movs	r1, #69	; 0x45
    2a02:	69e2      	ldr	r2, [r4, #28]
    2a04:	4809      	ldr	r0, [pc, #36]	; (2a2c <z_arm_fatal_error+0x54>)
    2a06:	f003 fa58 	bl	5eba <z_log_minimal_printk>
	LOG_ERR("Faulting instruction address (r15/pc): 0x%08x",
    2a0a:	2145      	movs	r1, #69	; 0x45
    2a0c:	69a2      	ldr	r2, [r4, #24]
    2a0e:	4808      	ldr	r0, [pc, #32]	; (2a30 <z_arm_fatal_error+0x58>)
    2a10:	f003 fa53 	bl	5eba <z_log_minimal_printk>
		esf_dump(esf);
	}
	z_fatal_error(reason, esf);
    2a14:	4621      	mov	r1, r4
    2a16:	4628      	mov	r0, r5
}
    2a18:	b003      	add	sp, #12
    2a1a:	e8bd 4030 	ldmia.w	sp!, {r4, r5, lr}
	z_fatal_error(reason, esf);
    2a1e:	f002 bb9f 	b.w	5160 <z_fatal_error>
    2a22:	bf00      	nop
    2a24:	00009503 	.word	0x00009503
    2a28:	00009537 	.word	0x00009537
    2a2c:	0000956b 	.word	0x0000956b
    2a30:	0000957f 	.word	0x0000957f

00002a34 <arch_irq_enable>:
#define REG_FROM_IRQ(irq) (irq / NUM_IRQS_PER_REG)
#define BIT_FROM_IRQ(irq) (irq % NUM_IRQS_PER_REG)

void arch_irq_enable(unsigned int irq)
{
	NVIC_EnableIRQ((IRQn_Type)irq);
    2a34:	b240      	sxtb	r0, r0
  \param [in]      IRQn  Device specific interrupt number.
  \note    IRQn must not be negative.
 */
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
  if ((int32_t)(IRQn) >= 0)
    2a36:	2800      	cmp	r0, #0
    2a38:	db07      	blt.n	2a4a <arch_irq_enable+0x16>
  {
    __COMPILER_BARRIER();
    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    2a3a:	2301      	movs	r3, #1
    2a3c:	0941      	lsrs	r1, r0, #5
    2a3e:	4a03      	ldr	r2, [pc, #12]	; (2a4c <arch_irq_enable+0x18>)
    2a40:	f000 001f 	and.w	r0, r0, #31
    2a44:	4083      	lsls	r3, r0
    2a46:	f842 3021 	str.w	r3, [r2, r1, lsl #2]
}
    2a4a:	4770      	bx	lr
    2a4c:	e000e100 	.word	0xe000e100

00002a50 <arch_irq_is_enabled>:
	NVIC_DisableIRQ((IRQn_Type)irq);
}

int arch_irq_is_enabled(unsigned int irq)
{
	return NVIC->ISER[REG_FROM_IRQ(irq)] & BIT(BIT_FROM_IRQ(irq));
    2a50:	4b05      	ldr	r3, [pc, #20]	; (2a68 <arch_irq_is_enabled+0x18>)
    2a52:	0942      	lsrs	r2, r0, #5
    2a54:	f853 2022 	ldr.w	r2, [r3, r2, lsl #2]
    2a58:	2301      	movs	r3, #1
    2a5a:	f000 001f 	and.w	r0, r0, #31
    2a5e:	fa03 f000 	lsl.w	r0, r3, r0
}
    2a62:	4010      	ands	r0, r2
    2a64:	4770      	bx	lr
    2a66:	bf00      	nop
    2a68:	e000e100 	.word	0xe000e100

00002a6c <z_arm_irq_priority_set>:
	 */
	__ASSERT(prio <= (BIT(NUM_IRQ_PRIO_BITS) - 1),
		 "invalid priority %d for %d irq! values must be less than %lu\n",
		 prio - _IRQ_PRIO_OFFSET, irq,
		 BIT(NUM_IRQ_PRIO_BITS) - (_IRQ_PRIO_OFFSET));
	NVIC_SetPriority((IRQn_Type)irq, prio);
    2a6c:	b240      	sxtb	r0, r0
  \param [in]  priority  Priority to set.
  \note    The priority cannot be set for every processor exception.
 */
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
  if ((int32_t)(IRQn) >= 0)
    2a6e:	2800      	cmp	r0, #0
		prio += _IRQ_PRIO_OFFSET;
    2a70:	f101 0101 	add.w	r1, r1, #1
  {
    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    2a74:	bfac      	ite	ge
    2a76:	f100 4060 	addge.w	r0, r0, #3758096384	; 0xe0000000
  }
  else
  {
    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    2a7a:	4b06      	ldrlt	r3, [pc, #24]	; (2a94 <z_arm_irq_priority_set+0x28>)
    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    2a7c:	ea4f 1141 	mov.w	r1, r1, lsl #5
    2a80:	b2c9      	uxtb	r1, r1
    2a82:	bfab      	itete	ge
    2a84:	f500 4061 	addge.w	r0, r0, #57600	; 0xe100
    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    2a88:	f000 000f 	andlt.w	r0, r0, #15
    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    2a8c:	f880 1300 	strbge.w	r1, [r0, #768]	; 0x300
    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    2a90:	5419      	strblt	r1, [r3, r0]
}
    2a92:	4770      	bx	lr
    2a94:	e000ed14 	.word	0xe000ed14

00002a98 <z_SysNmiOnReset>:
_ASM_FILE_PROLOGUE

GTEXT(z_SysNmiOnReset)

SECTION_FUNC(TEXT, z_SysNmiOnReset)
    wfi
    2a98:	bf30      	wfi
    b z_SysNmiOnReset
    2a9a:	f7ff bffd 	b.w	2a98 <z_SysNmiOnReset>
    2a9e:	bf00      	nop

00002aa0 <z_arm_prep_c>:

#define VECTOR_ADDRESS ((uintptr_t)_vector_start)

static inline void relocate_vector_table(void)
{
	SCB->VTOR = VECTOR_ADDRESS & SCB_VTOR_TBLOFF_Msk;
    2aa0:	4a0b      	ldr	r2, [pc, #44]	; (2ad0 <z_arm_prep_c+0x30>)
 *
 * This routine prepares for the execution of and runs C code.
 *
 */
void z_arm_prep_c(void)
{
    2aa2:	b508      	push	{r3, lr}
	SCB->VTOR = VECTOR_ADDRESS & SCB_VTOR_TBLOFF_Msk;
    2aa4:	4b0b      	ldr	r3, [pc, #44]	; (2ad4 <z_arm_prep_c+0x34>)
    2aa6:	f022 027f 	bic.w	r2, r2, #127	; 0x7f
    2aaa:	609a      	str	r2, [r3, #8]
  __ASM volatile ("dsb 0xF":::"memory");
    2aac:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("isb 0xF":::"memory");
    2ab0:	f3bf 8f6f 	isb	sy
	SCB->CPACR &= (~(CPACR_CP10_Msk | CPACR_CP11_Msk));
    2ab4:	f8d3 2088 	ldr.w	r2, [r3, #136]	; 0x88
    2ab8:	f422 0270 	bic.w	r2, r2, #15728640	; 0xf00000
    2abc:	f8c3 2088 	str.w	r2, [r3, #136]	; 0x88
	relocate_vector_table();
#if defined(CONFIG_CPU_HAS_FPU)
	z_arm_floating_point_init();
#endif
	z_bss_zero();
    2ac0:	f002 fbc6 	bl	5250 <z_bss_zero>
	z_data_copy();
    2ac4:	f002 fc08 	bl	52d8 <z_data_copy>
#if ((defined(CONFIG_ARMV7_R) || defined(CONFIG_ARMV7_A)) && defined(CONFIG_INIT_STACKS))
	z_arm_init_stacks();
#endif
	z_arm_interrupt_init();
    2ac8:	f000 fa40 	bl	2f4c <z_arm_interrupt_init>
	z_cstart();
    2acc:	f002 fbcc 	bl	5268 <z_cstart>
    2ad0:	00000000 	.word	0x00000000
    2ad4:	e000ed00 	.word	0xe000ed00

00002ad8 <z_arm_svc>:
  bne _stack_frame_endif
_stack_frame_msp:
  mrs r0, MSP
_stack_frame_endif:
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    tst lr, #_EXC_RETURN_SPSEL_Msk /* did we come from thread mode ? */
    2ad8:	f01e 0f04 	tst.w	lr, #4
    ite eq  /* if zero (equal), came from handler mode */
    2adc:	bf0c      	ite	eq
        mrseq r0, MSP   /* handler mode, stack frame is on MSP */
    2ade:	f3ef 8008 	mrseq	r0, MSP
        mrsne r0, PSP   /* thread mode, stack frame is on PSP */
    2ae2:	f3ef 8009 	mrsne	r0, PSP
#endif


    /* Figure out what SVC call number was invoked */

    ldr r1, [r0, #24]   /* grab address of PC from stack frame */
    2ae6:	6981      	ldr	r1, [r0, #24]
     */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
    subs r1, r1, #2
    ldrb r1, [r1]
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    ldrb r1, [r1, #-2]
    2ae8:	f811 1c02 	ldrb.w	r1, [r1, #-2]
#endif
    bne _oops

#endif /* CONFIG_USERSPACE */

    cmp r1, #2
    2aec:	2902      	cmp	r1, #2
    beq _oops
    2aee:	d0ff      	beq.n	2af0 <_oops>

00002af0 <_oops>:
    /* exception return is done in z_arm_int_exit() */
    b z_arm_int_exit
#endif

_oops:
    push {r0, lr}
    2af0:	b501      	push	{r0, lr}
    push {r1, r2}
    push {r4-r11}
    mov  r1, sp /* pointer to _callee_saved_t */
#endif /* CONFIG_ARMV7_M_ARMV8_M_MAINLINE */
#endif /* CONFIG_EXTRA_EXCEPTION_INFO */
    bl z_do_kernel_oops
    2af2:	f003 fd14 	bl	651e <z_do_kernel_oops>
     * the MSP to its value prior to entering the function
     */
    add sp, #40
#endif /* CONFIG_ARMV7_M_ARMV8_M_MAINLINE */
#endif /* CONFIG_EXTRA_EXCEPTION_INFO */
    pop {r0, pc}
    2af6:	bd01      	pop	{r0, pc}

00002af8 <z_arm_switch_to_main_no_multithreading>:

#if !defined(CONFIG_MULTITHREADING) && defined(CONFIG_CPU_CORTEX_M)

FUNC_NORETURN void z_arm_switch_to_main_no_multithreading(
	k_thread_entry_t main_entry, void *p1, void *p2, void *p3)
{
    2af8:	4604      	mov	r4, r0
    2afa:	4608      	mov	r0, r1
    2afc:	4611      	mov	r1, r2
    2afe:	461a      	mov	r2, r3
  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
    2b00:	2300      	movs	r3, #0
    2b02:	f383 880b 	msr	PSPLIM, r3
	 */
	register void *p1_inreg __asm__("r0") = p1;
	register void *p2_inreg __asm__("r1") = p2;
	register void *p3_inreg __asm__("r2") = p3;

	__asm__ volatile (
    2b06:	4b0a      	ldr	r3, [pc, #40]	; (2b30 <loop+0x2>)
    2b08:	2520      	movs	r5, #32
    2b0a:	f5a3 5620 	sub.w	r6, r3, #10240	; 0x2800
    2b0e:	f386 880b 	msr	PSPLIM, r6
    2b12:	f383 8809 	msr	PSP, r3
    2b16:	b663      	cpsie	if
    2b18:	f04f 0300 	mov.w	r3, #0
    2b1c:	f383 8811 	msr	BASEPRI, r3
    2b20:	f3bf 8f6f 	isb	sy
    2b24:	47a0      	blx	r4
    2b26:	f385 8811 	msr	BASEPRI, r5
    2b2a:	f3bf 8f6f 	isb	sy

00002b2e <loop>:
    2b2e:	e7fe      	b.n	2b2e <loop>
	, [_psplim]"r" (psplim)
#endif
	:
	);

	CODE_UNREACHABLE; /* LCOV_EXCL_LINE */
    2b30:	20013260 	.word	0x20013260

00002b34 <_isr_wrapper>:
 *
 */
SECTION_FUNC(TEXT, _isr_wrapper)

#if defined(CONFIG_CPU_CORTEX_M)
	push {r0,lr}		/* r0, lr are now the first items on the stack */
    2b34:	b501      	push	{r0, lr}
#endif

#endif /* CONFIG_PM */

#if defined(CONFIG_CPU_CORTEX_M)
	mrs r0, IPSR	/* get exception number */
    2b36:	f3ef 8005 	mrs	r0, IPSR
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
	ldr r1, =16
	subs r0, r1	/* get IRQ number */
	lsls r0, #3	/* table is 8-byte wide */
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	sub r0, r0, #16	/* get IRQ number */
    2b3a:	f1a0 0010 	sub.w	r0, r0, #16
	lsl r0, r0, #3	/* table is 8-byte wide */
    2b3e:	ea4f 00c0 	mov.w	r0, r0, lsl #3
	lsl r1, r1, #3
	cmp r0, r1
	bge spurious_continue
#endif /* !CONFIG_CPU_CORTEX_M */

	ldr r1, =_sw_isr_table
    2b42:	4904      	ldr	r1, [pc, #16]	; (2b54 <_isr_wrapper+0x20>)
	add r1, r1, r0	/* table entry: ISRs must have their MSB set to stay
    2b44:	4401      	add	r1, r0
			 * in thumb mode */

	ldm r1!,{r0,r3}	/* arg in r0, ISR in r3 */
    2b46:	c909      	ldmia	r1!, {r0, r3}
	blx r3		/* call ISR */
    2b48:	4798      	blx	r3

#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
	pop {r0, r3}
	mov lr, r3
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	pop {r0, lr}
    2b4a:	e8bd 4001 	ldmia.w	sp!, {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */

	/* Use 'bx' instead of 'b' because 'bx' can jump further, and use
	 * 'bx' instead of 'blx' because exception return is done in
	 * z_arm_int_exit() */
	ldr r1, =z_arm_int_exit
    2b4e:	4902      	ldr	r1, [pc, #8]	; (2b58 <_isr_wrapper+0x24>)
	bx r1
    2b50:	4708      	bx	r1
    2b52:	0000      	.short	0x0000
	ldr r1, =_sw_isr_table
    2b54:	00008744 	.word	0x00008744
	ldr r1, =z_arm_int_exit
    2b58:	00002b5d 	.word	0x00002b5d

00002b5c <z_arm_exc_exit>:
#else
	pop {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
#endif /* CONFIG_STACK_SENTINEL */

	bx lr
    2b5c:	4770      	bx	lr
    2b5e:	bf00      	nop

00002b60 <usage_fault.constprop.0>:
 *
 * See z_arm_fault_dump() for example.
 *
 * @return error code to identify the fatal error reason
 */
static uint32_t usage_fault(const z_arch_esf_t *esf)
    2b60:	b538      	push	{r3, r4, r5, lr}
	uint32_t reason = K_ERR_CPU_EXCEPTION;

	PR_FAULT_INFO("***** USAGE FAULT *****");

	/* bits are sticky: they stack and must be reset */
	if ((SCB->CFSR & SCB_CFSR_DIVBYZERO_Msk) != 0) {
    2b62:	4c21      	ldr	r4, [pc, #132]	; (2be8 <usage_fault.constprop.0+0x88>)
	PR_FAULT_INFO("***** USAGE FAULT *****");
    2b64:	2145      	movs	r1, #69	; 0x45
    2b66:	4821      	ldr	r0, [pc, #132]	; (2bec <usage_fault.constprop.0+0x8c>)
    2b68:	f003 f9a7 	bl	5eba <z_log_minimal_printk>
	if ((SCB->CFSR & SCB_CFSR_DIVBYZERO_Msk) != 0) {
    2b6c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2b6e:	019d      	lsls	r5, r3, #6
    2b70:	d503      	bpl.n	2b7a <usage_fault.constprop.0+0x1a>
		PR_FAULT_INFO("  Division by zero");
    2b72:	2145      	movs	r1, #69	; 0x45
    2b74:	481e      	ldr	r0, [pc, #120]	; (2bf0 <usage_fault.constprop.0+0x90>)
    2b76:	f003 f9a0 	bl	5eba <z_log_minimal_printk>
	}
	if ((SCB->CFSR & SCB_CFSR_UNALIGNED_Msk) != 0) {
    2b7a:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2b7c:	01dc      	lsls	r4, r3, #7
    2b7e:	d503      	bpl.n	2b88 <usage_fault.constprop.0+0x28>
		PR_FAULT_INFO("  Unaligned memory access");
    2b80:	2145      	movs	r1, #69	; 0x45
    2b82:	481c      	ldr	r0, [pc, #112]	; (2bf4 <usage_fault.constprop.0+0x94>)
    2b84:	f003 f999 	bl	5eba <z_log_minimal_printk>
	}
#if defined(CONFIG_ARMV8_M_MAINLINE)
	if ((SCB->CFSR & SCB_CFSR_STKOF_Msk) != 0) {
    2b88:	4d17      	ldr	r5, [pc, #92]	; (2be8 <usage_fault.constprop.0+0x88>)
    2b8a:	6aac      	ldr	r4, [r5, #40]	; 0x28
    2b8c:	f414 1480 	ands.w	r4, r4, #1048576	; 0x100000
    2b90:	d004      	beq.n	2b9c <usage_fault.constprop.0+0x3c>
		PR_FAULT_INFO("  Stack overflow (context area not valid)");
    2b92:	2145      	movs	r1, #69	; 0x45
    2b94:	4818      	ldr	r0, [pc, #96]	; (2bf8 <usage_fault.constprop.0+0x98>)
    2b96:	f003 f990 	bl	5eba <z_log_minimal_printk>
		 * prevents the context area to be loaded on the stack upon
		 * UsageFault exception entry. As a result, we cannot rely
		 * on the reported faulty instruction address, to determine
		 * the instruction that triggered the stack overflow.
		 */
		reason = K_ERR_STACK_CHK_FAIL;
    2b9a:	2402      	movs	r4, #2
#endif /* CONFIG_BUILTIN_STACK_GUARD */
	}
#endif /* CONFIG_ARMV8_M_MAINLINE */
	if ((SCB->CFSR & SCB_CFSR_NOCP_Msk) != 0) {
    2b9c:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2b9e:	0318      	lsls	r0, r3, #12
    2ba0:	d503      	bpl.n	2baa <usage_fault.constprop.0+0x4a>
		PR_FAULT_INFO("  No coprocessor instructions");
    2ba2:	2145      	movs	r1, #69	; 0x45
    2ba4:	4815      	ldr	r0, [pc, #84]	; (2bfc <usage_fault.constprop.0+0x9c>)
    2ba6:	f003 f988 	bl	5eba <z_log_minimal_printk>
	}
	if ((SCB->CFSR & SCB_CFSR_INVPC_Msk) != 0) {
    2baa:	4d0f      	ldr	r5, [pc, #60]	; (2be8 <usage_fault.constprop.0+0x88>)
    2bac:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2bae:	0359      	lsls	r1, r3, #13
    2bb0:	d503      	bpl.n	2bba <usage_fault.constprop.0+0x5a>
		PR_FAULT_INFO("  Illegal load of EXC_RETURN into PC");
    2bb2:	2145      	movs	r1, #69	; 0x45
    2bb4:	4812      	ldr	r0, [pc, #72]	; (2c00 <usage_fault.constprop.0+0xa0>)
    2bb6:	f003 f980 	bl	5eba <z_log_minimal_printk>
	}
	if ((SCB->CFSR & SCB_CFSR_INVSTATE_Msk) != 0) {
    2bba:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2bbc:	039a      	lsls	r2, r3, #14
    2bbe:	d503      	bpl.n	2bc8 <usage_fault.constprop.0+0x68>
		PR_FAULT_INFO("  Illegal use of the EPSR");
    2bc0:	2145      	movs	r1, #69	; 0x45
    2bc2:	4810      	ldr	r0, [pc, #64]	; (2c04 <usage_fault.constprop.0+0xa4>)
    2bc4:	f003 f979 	bl	5eba <z_log_minimal_printk>
	}
	if ((SCB->CFSR & SCB_CFSR_UNDEFINSTR_Msk) != 0) {
    2bc8:	4d07      	ldr	r5, [pc, #28]	; (2be8 <usage_fault.constprop.0+0x88>)
    2bca:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2bcc:	03db      	lsls	r3, r3, #15
    2bce:	d503      	bpl.n	2bd8 <usage_fault.constprop.0+0x78>
		PR_FAULT_INFO("  Attempt to execute undefined instruction");
    2bd0:	2145      	movs	r1, #69	; 0x45
    2bd2:	480d      	ldr	r0, [pc, #52]	; (2c08 <usage_fault.constprop.0+0xa8>)
    2bd4:	f003 f971 	bl	5eba <z_log_minimal_printk>
	}

	/* clear UFSR sticky bits */
	SCB->CFSR |= SCB_CFSR_USGFAULTSR_Msk;
    2bd8:	6aab      	ldr	r3, [r5, #40]	; 0x28

	return reason;
}
    2bda:	4620      	mov	r0, r4
	SCB->CFSR |= SCB_CFSR_USGFAULTSR_Msk;
    2bdc:	ea6f 4303 	mvn.w	r3, r3, lsl #16
    2be0:	ea6f 4313 	mvn.w	r3, r3, lsr #16
    2be4:	62ab      	str	r3, [r5, #40]	; 0x28
}
    2be6:	bd38      	pop	{r3, r4, r5, pc}
    2be8:	e000ed00 	.word	0xe000ed00
    2bec:	000095b2 	.word	0x000095b2
    2bf0:	000095cf 	.word	0x000095cf
    2bf4:	000095e7 	.word	0x000095e7
    2bf8:	00009606 	.word	0x00009606
    2bfc:	00009635 	.word	0x00009635
    2c00:	00009658 	.word	0x00009658
    2c04:	00009682 	.word	0x00009682
    2c08:	000096a1 	.word	0x000096a1

00002c0c <bus_fault.constprop.0>:
static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable)
    2c0c:	b570      	push	{r4, r5, r6, lr}
	if (SCB->CFSR & SCB_CFSR_STKERR_Msk) {
    2c0e:	4c23      	ldr	r4, [pc, #140]	; (2c9c <bus_fault.constprop.0+0x90>)
static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable)
    2c10:	4606      	mov	r6, r0
    2c12:	460d      	mov	r5, r1
	PR_FAULT_INFO("***** BUS FAULT *****");
    2c14:	4822      	ldr	r0, [pc, #136]	; (2ca0 <bus_fault.constprop.0+0x94>)
    2c16:	2145      	movs	r1, #69	; 0x45
    2c18:	f003 f94f 	bl	5eba <z_log_minimal_printk>
	if (SCB->CFSR & SCB_CFSR_STKERR_Msk) {
    2c1c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2c1e:	04d9      	lsls	r1, r3, #19
    2c20:	d503      	bpl.n	2c2a <bus_fault.constprop.0+0x1e>
		PR_FAULT_INFO("  Stacking error");
    2c22:	2145      	movs	r1, #69	; 0x45
    2c24:	481f      	ldr	r0, [pc, #124]	; (2ca4 <bus_fault.constprop.0+0x98>)
    2c26:	f003 f948 	bl	5eba <z_log_minimal_printk>
	if (SCB->CFSR & SCB_CFSR_UNSTKERR_Msk) {
    2c2a:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2c2c:	051a      	lsls	r2, r3, #20
    2c2e:	d503      	bpl.n	2c38 <bus_fault.constprop.0+0x2c>
		PR_FAULT_INFO("  Unstacking error");
    2c30:	2145      	movs	r1, #69	; 0x45
    2c32:	481d      	ldr	r0, [pc, #116]	; (2ca8 <bus_fault.constprop.0+0x9c>)
    2c34:	f003 f941 	bl	5eba <z_log_minimal_printk>
	if (SCB->CFSR & SCB_CFSR_PRECISERR_Msk) {
    2c38:	4c18      	ldr	r4, [pc, #96]	; (2c9c <bus_fault.constprop.0+0x90>)
    2c3a:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2c3c:	059b      	lsls	r3, r3, #22
    2c3e:	d510      	bpl.n	2c62 <bus_fault.constprop.0+0x56>
		PR_FAULT_INFO("  Precise data bus error");
    2c40:	481a      	ldr	r0, [pc, #104]	; (2cac <bus_fault.constprop.0+0xa0>)
    2c42:	2145      	movs	r1, #69	; 0x45
    2c44:	f003 f939 	bl	5eba <z_log_minimal_printk>
		STORE_xFAR(bfar, SCB->BFAR);
    2c48:	6ba2      	ldr	r2, [r4, #56]	; 0x38
		if ((SCB->CFSR & SCB_CFSR_BFARVALID_Msk) != 0) {
    2c4a:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2c4c:	0418      	lsls	r0, r3, #16
    2c4e:	d508      	bpl.n	2c62 <bus_fault.constprop.0+0x56>
			PR_EXC("  BFAR Address: 0x%x", bfar);
    2c50:	2145      	movs	r1, #69	; 0x45
    2c52:	4817      	ldr	r0, [pc, #92]	; (2cb0 <bus_fault.constprop.0+0xa4>)
    2c54:	f003 f931 	bl	5eba <z_log_minimal_printk>
			if (from_hard_fault != 0) {
    2c58:	b11e      	cbz	r6, 2c62 <bus_fault.constprop.0+0x56>
				SCB->CFSR &= ~SCB_CFSR_BFARVALID_Msk;
    2c5a:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2c5c:	f423 4300 	bic.w	r3, r3, #32768	; 0x8000
    2c60:	62a3      	str	r3, [r4, #40]	; 0x28
	if (SCB->CFSR & SCB_CFSR_IMPRECISERR_Msk) {
    2c62:	4c0e      	ldr	r4, [pc, #56]	; (2c9c <bus_fault.constprop.0+0x90>)
    2c64:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2c66:	0559      	lsls	r1, r3, #21
    2c68:	d503      	bpl.n	2c72 <bus_fault.constprop.0+0x66>
		PR_FAULT_INFO("  Imprecise data bus error");
    2c6a:	2145      	movs	r1, #69	; 0x45
    2c6c:	4811      	ldr	r0, [pc, #68]	; (2cb4 <bus_fault.constprop.0+0xa8>)
    2c6e:	f003 f924 	bl	5eba <z_log_minimal_printk>
	if ((SCB->CFSR & SCB_CFSR_IBUSERR_Msk) != 0) {
    2c72:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2c74:	05da      	lsls	r2, r3, #23
    2c76:	d50b      	bpl.n	2c90 <bus_fault.constprop.0+0x84>
		PR_FAULT_INFO("  Instruction bus error");
    2c78:	2145      	movs	r1, #69	; 0x45
    2c7a:	480f      	ldr	r0, [pc, #60]	; (2cb8 <bus_fault.constprop.0+0xac>)
		PR_FAULT_INFO("  Floating-point lazy state preservation error");
    2c7c:	f003 f91d 	bl	5eba <z_log_minimal_printk>
	*recoverable = memory_fault_recoverable(esf, true);
    2c80:	2000      	movs	r0, #0
	SCB->CFSR |= SCB_CFSR_BUSFAULTSR_Msk;
    2c82:	4a06      	ldr	r2, [pc, #24]	; (2c9c <bus_fault.constprop.0+0x90>)
    2c84:	6a93      	ldr	r3, [r2, #40]	; 0x28
    2c86:	f443 437f 	orr.w	r3, r3, #65280	; 0xff00
    2c8a:	6293      	str	r3, [r2, #40]	; 0x28
	*recoverable = memory_fault_recoverable(esf, true);
    2c8c:	7028      	strb	r0, [r5, #0]
}
    2c8e:	bd70      	pop	{r4, r5, r6, pc}
	} else if (SCB->CFSR & SCB_CFSR_LSPERR_Msk) {
    2c90:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2c92:	049b      	lsls	r3, r3, #18
    2c94:	d5f4      	bpl.n	2c80 <bus_fault.constprop.0+0x74>
		PR_FAULT_INFO("  Floating-point lazy state preservation error");
    2c96:	2145      	movs	r1, #69	; 0x45
    2c98:	4808      	ldr	r0, [pc, #32]	; (2cbc <bus_fault.constprop.0+0xb0>)
    2c9a:	e7ef      	b.n	2c7c <bus_fault.constprop.0+0x70>
    2c9c:	e000ed00 	.word	0xe000ed00
    2ca0:	000096d1 	.word	0x000096d1
    2ca4:	000096ec 	.word	0x000096ec
    2ca8:	00009702 	.word	0x00009702
    2cac:	0000971a 	.word	0x0000971a
    2cb0:	00009738 	.word	0x00009738
    2cb4:	00009752 	.word	0x00009752
    2cb8:	00009772 	.word	0x00009772
    2cbc:	0000978f 	.word	0x0000978f

00002cc0 <mem_manage_fault.constprop.0>:
static uint32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault,
    2cc0:	b570      	push	{r4, r5, r6, lr}
	if ((SCB->CFSR & SCB_CFSR_MSTKERR_Msk) != 0) {
    2cc2:	4c26      	ldr	r4, [pc, #152]	; (2d5c <mem_manage_fault.constprop.0+0x9c>)
static uint32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault,
    2cc4:	4606      	mov	r6, r0
    2cc6:	460d      	mov	r5, r1
	PR_FAULT_INFO("***** MPU FAULT *****");
    2cc8:	4825      	ldr	r0, [pc, #148]	; (2d60 <mem_manage_fault.constprop.0+0xa0>)
    2cca:	2145      	movs	r1, #69	; 0x45
    2ccc:	f003 f8f5 	bl	5eba <z_log_minimal_printk>
	if ((SCB->CFSR & SCB_CFSR_MSTKERR_Msk) != 0) {
    2cd0:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2cd2:	06d8      	lsls	r0, r3, #27
    2cd4:	d503      	bpl.n	2cde <mem_manage_fault.constprop.0+0x1e>
		PR_FAULT_INFO("  Stacking error (context area might be"
    2cd6:	2145      	movs	r1, #69	; 0x45
    2cd8:	4822      	ldr	r0, [pc, #136]	; (2d64 <mem_manage_fault.constprop.0+0xa4>)
    2cda:	f003 f8ee 	bl	5eba <z_log_minimal_printk>
	if ((SCB->CFSR & SCB_CFSR_MUNSTKERR_Msk) != 0) {
    2cde:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2ce0:	0719      	lsls	r1, r3, #28
    2ce2:	d503      	bpl.n	2cec <mem_manage_fault.constprop.0+0x2c>
		PR_FAULT_INFO("  Unstacking error");
    2ce4:	2145      	movs	r1, #69	; 0x45
    2ce6:	4820      	ldr	r0, [pc, #128]	; (2d68 <mem_manage_fault.constprop.0+0xa8>)
    2ce8:	f003 f8e7 	bl	5eba <z_log_minimal_printk>
	if ((SCB->CFSR & SCB_CFSR_DACCVIOL_Msk) != 0) {
    2cec:	4c1b      	ldr	r4, [pc, #108]	; (2d5c <mem_manage_fault.constprop.0+0x9c>)
    2cee:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2cf0:	079a      	lsls	r2, r3, #30
    2cf2:	d510      	bpl.n	2d16 <mem_manage_fault.constprop.0+0x56>
		PR_FAULT_INFO("  Data Access Violation");
    2cf4:	2145      	movs	r1, #69	; 0x45
    2cf6:	481d      	ldr	r0, [pc, #116]	; (2d6c <mem_manage_fault.constprop.0+0xac>)
    2cf8:	f003 f8df 	bl	5eba <z_log_minimal_printk>
		uint32_t temp = SCB->MMFAR;
    2cfc:	6b62      	ldr	r2, [r4, #52]	; 0x34
		if ((SCB->CFSR & SCB_CFSR_MMARVALID_Msk) != 0) {
    2cfe:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2d00:	061b      	lsls	r3, r3, #24
    2d02:	d508      	bpl.n	2d16 <mem_manage_fault.constprop.0+0x56>
			PR_EXC("  MMFAR Address: 0x%x", mmfar);
    2d04:	2145      	movs	r1, #69	; 0x45
    2d06:	481a      	ldr	r0, [pc, #104]	; (2d70 <mem_manage_fault.constprop.0+0xb0>)
    2d08:	f003 f8d7 	bl	5eba <z_log_minimal_printk>
			if (from_hard_fault != 0) {
    2d0c:	b11e      	cbz	r6, 2d16 <mem_manage_fault.constprop.0+0x56>
				SCB->CFSR &= ~SCB_CFSR_MMARVALID_Msk;
    2d0e:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2d10:	f023 0380 	bic.w	r3, r3, #128	; 0x80
    2d14:	62a3      	str	r3, [r4, #40]	; 0x28
	if ((SCB->CFSR & SCB_CFSR_IACCVIOL_Msk) != 0) {
    2d16:	4c11      	ldr	r4, [pc, #68]	; (2d5c <mem_manage_fault.constprop.0+0x9c>)
    2d18:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2d1a:	07de      	lsls	r6, r3, #31
    2d1c:	d503      	bpl.n	2d26 <mem_manage_fault.constprop.0+0x66>
		PR_FAULT_INFO("  Instruction Access Violation");
    2d1e:	2145      	movs	r1, #69	; 0x45
    2d20:	4814      	ldr	r0, [pc, #80]	; (2d74 <mem_manage_fault.constprop.0+0xb4>)
    2d22:	f003 f8ca 	bl	5eba <z_log_minimal_printk>
	if ((SCB->CFSR & SCB_CFSR_MLSPERR_Msk) != 0) {
    2d26:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2d28:	0698      	lsls	r0, r3, #26
    2d2a:	d503      	bpl.n	2d34 <mem_manage_fault.constprop.0+0x74>
		PR_FAULT_INFO(
    2d2c:	2145      	movs	r1, #69	; 0x45
    2d2e:	4812      	ldr	r0, [pc, #72]	; (2d78 <mem_manage_fault.constprop.0+0xb8>)
    2d30:	f003 f8c3 	bl	5eba <z_log_minimal_printk>
	*recoverable = memory_fault_recoverable(esf, true);
    2d34:	2000      	movs	r0, #0
	if ((SCB->CFSR & SCB_CFSR_MSTKERR_Msk) ||
    2d36:	4b09      	ldr	r3, [pc, #36]	; (2d5c <mem_manage_fault.constprop.0+0x9c>)
    2d38:	6a9a      	ldr	r2, [r3, #40]	; 0x28
    2d3a:	06d1      	lsls	r1, r2, #27
		(SCB->CFSR & SCB_CFSR_DACCVIOL_Msk)) {
    2d3c:	bf58      	it	pl
    2d3e:	6a9a      	ldrpl	r2, [r3, #40]	; 0x28
	if ((SCB->CFSR & SCB_CFSR_MLSPERR_Msk) != 0) {
    2d40:	6a9a      	ldr	r2, [r3, #40]	; 0x28
    2d42:	0692      	lsls	r2, r2, #26
		SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTPENDED_Msk;
    2d44:	bf42      	ittt	mi
    2d46:	6a5a      	ldrmi	r2, [r3, #36]	; 0x24
    2d48:	f422 5200 	bicmi.w	r2, r2, #8192	; 0x2000
    2d4c:	625a      	strmi	r2, [r3, #36]	; 0x24
	SCB->CFSR |= SCB_CFSR_MEMFAULTSR_Msk;
    2d4e:	6a9a      	ldr	r2, [r3, #40]	; 0x28
    2d50:	f042 02ff 	orr.w	r2, r2, #255	; 0xff
    2d54:	629a      	str	r2, [r3, #40]	; 0x28
	*recoverable = memory_fault_recoverable(esf, true);
    2d56:	7028      	strb	r0, [r5, #0]
}
    2d58:	bd70      	pop	{r4, r5, r6, pc}
    2d5a:	bf00      	nop
    2d5c:	e000ed00 	.word	0xe000ed00
    2d60:	000097c3 	.word	0x000097c3
    2d64:	000097de 	.word	0x000097de
    2d68:	00009702 	.word	0x00009702
    2d6c:	00009816 	.word	0x00009816
    2d70:	00009833 	.word	0x00009833
    2d74:	0000984e 	.word	0x0000984e
    2d78:	0000978f 	.word	0x0000978f

00002d7c <z_arm_fault>:
 * @param callee_regs Callee-saved registers (R4-R11, PSP)
 *
 */
void z_arm_fault(uint32_t msp, uint32_t psp, uint32_t exc_return,
	_callee_saved_t *callee_regs)
{
    2d7c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
	uint32_t reason = K_ERR_CPU_EXCEPTION;
	int fault = SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk;
    2d80:	4b5c      	ldr	r3, [pc, #368]	; (2ef4 <z_arm_fault+0x178>)
{
    2d82:	4605      	mov	r5, r0
	int fault = SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk;
    2d84:	685f      	ldr	r7, [r3, #4]
    2d86:	2600      	movs	r6, #0
{
    2d88:	b08a      	sub	sp, #40	; 0x28
    2d8a:	f3c7 0408 	ubfx	r4, r7, #0, #9
    2d8e:	f386 8811 	msr	BASEPRI, r6
    2d92:	f3bf 8f6f 	isb	sy
	if ((exc_return & EXC_RETURN_INDICATOR_PREFIX) !=
    2d96:	f002 437f 	and.w	r3, r2, #4278190080	; 0xff000000
    2d9a:	f1b3 4f7f 	cmp.w	r3, #4278190080	; 0xff000000
    2d9e:	d107      	bne.n	2db0 <z_arm_fault+0x34>
	if ((exc_return & EXC_RETURN_MODE_THREAD) &&
    2da0:	f002 030c 	and.w	r3, r2, #12
    2da4:	2b08      	cmp	r3, #8
    2da6:	d114      	bne.n	2dd2 <z_arm_fault+0x56>
		PR_EXC("SPSEL in thread mode does not indicate PSP");
    2da8:	2145      	movs	r1, #69	; 0x45
    2daa:	4853      	ldr	r0, [pc, #332]	; (2ef8 <z_arm_fault+0x17c>)
    2dac:	f003 f885 	bl	5eba <z_log_minimal_printk>
	*nested_exc = false;
    2db0:	2600      	movs	r6, #0
		return NULL;
    2db2:	4635      	mov	r5, r6
	*recoverable = false;
    2db4:	f04f 0800 	mov.w	r8, #0
	switch (fault) {
    2db8:	1ee3      	subs	r3, r4, #3
	*recoverable = false;
    2dba:	f88d 8007 	strb.w	r8, [sp, #7]
	switch (fault) {
    2dbe:	2b09      	cmp	r3, #9
    2dc0:	f200 8086 	bhi.w	2ed0 <z_arm_fault+0x154>
    2dc4:	e8df f003 	tbb	[pc, r3]
    2dc8:	757d790a 	.word	0x757d790a
    2dcc:	84848484 	.word	0x84848484
    2dd0:	8184      	.short	0x8184
		if (exc_return & EXC_RETURN_MODE_THREAD) {
    2dd2:	0710      	lsls	r0, r2, #28
			ptr_esf =  (z_arch_esf_t *)psp;
    2dd4:	bf4c      	ite	mi
    2dd6:	460d      	movmi	r5, r1
			*nested_exc = true;
    2dd8:	2601      	movpl	r6, #1
    2dda:	e7eb      	b.n	2db4 <z_arm_fault+0x38>
	PR_FAULT_INFO("***** HARD FAULT *****");
    2ddc:	2145      	movs	r1, #69	; 0x45
    2dde:	4847      	ldr	r0, [pc, #284]	; (2efc <z_arm_fault+0x180>)
	if ((SCB->HFSR & SCB_HFSR_VECTTBL_Msk) != 0) {
    2de0:	4c44      	ldr	r4, [pc, #272]	; (2ef4 <z_arm_fault+0x178>)
	PR_FAULT_INFO("***** HARD FAULT *****");
    2de2:	f003 f86a 	bl	5eba <z_log_minimal_printk>
	*recoverable = false;
    2de6:	f88d 8007 	strb.w	r8, [sp, #7]
	if ((SCB->HFSR & SCB_HFSR_VECTTBL_Msk) != 0) {
    2dea:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
    2dec:	079a      	lsls	r2, r3, #30
    2dee:	d505      	bpl.n	2dfc <z_arm_fault+0x80>
		PR_EXC("  Bus fault on vector table read");
    2df0:	2145      	movs	r1, #69	; 0x45
    2df2:	4843      	ldr	r0, [pc, #268]	; (2f00 <z_arm_fault+0x184>)
	PR_FAULT_INFO(
    2df4:	f003 f861 	bl	5eba <z_log_minimal_printk>
	uint32_t reason = K_ERR_CPU_EXCEPTION;
    2df8:	2400      	movs	r4, #0
    2dfa:	e032      	b.n	2e62 <z_arm_fault+0xe6>
	} else if ((SCB->HFSR & SCB_HFSR_DEBUGEVT_Msk) != 0) {
    2dfc:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
    2dfe:	2b00      	cmp	r3, #0
    2e00:	da02      	bge.n	2e08 <z_arm_fault+0x8c>
		PR_EXC("  Debug event");
    2e02:	2145      	movs	r1, #69	; 0x45
    2e04:	483f      	ldr	r0, [pc, #252]	; (2f04 <z_arm_fault+0x188>)
    2e06:	e7f5      	b.n	2df4 <z_arm_fault+0x78>
	} else if ((SCB->HFSR & SCB_HFSR_FORCED_Msk) != 0) {
    2e08:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
    2e0a:	005b      	lsls	r3, r3, #1
    2e0c:	d5f4      	bpl.n	2df8 <z_arm_fault+0x7c>
		PR_EXC("  Fault escalation (see below)");
    2e0e:	2145      	movs	r1, #69	; 0x45
    2e10:	483d      	ldr	r0, [pc, #244]	; (2f08 <z_arm_fault+0x18c>)
    2e12:	f003 f852 	bl	5eba <z_log_minimal_printk>
	SCB->CCR |= SCB_CCR_BFHFNMIGN_Msk;
    2e16:	6963      	ldr	r3, [r4, #20]
	uint16_t *ret_addr = (uint16_t *)esf->basic.pc;
    2e18:	69aa      	ldr	r2, [r5, #24]
	SCB->CCR |= SCB_CCR_BFHFNMIGN_Msk;
    2e1a:	f443 7380 	orr.w	r3, r3, #256	; 0x100
    2e1e:	6163      	str	r3, [r4, #20]
  __ASM volatile ("dsb 0xF":::"memory");
    2e20:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("isb 0xF":::"memory");
    2e24:	f3bf 8f6f 	isb	sy
	SCB->CCR &= ~SCB_CCR_BFHFNMIGN_Msk;
    2e28:	6963      	ldr	r3, [r4, #20]
	uint16_t fault_insn = *(ret_addr - 1);
    2e2a:	f832 2c02 	ldrh.w	r2, [r2, #-2]
	SCB->CCR &= ~SCB_CCR_BFHFNMIGN_Msk;
    2e2e:	f423 7380 	bic.w	r3, r3, #256	; 0x100
    2e32:	6163      	str	r3, [r4, #20]
  __ASM volatile ("dsb 0xF":::"memory");
    2e34:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("isb 0xF":::"memory");
    2e38:	f3bf 8f6f 	isb	sy
	if (((fault_insn & 0xff00) == _SVC_OPCODE) &&
    2e3c:	f64d 7302 	movw	r3, #57090	; 0xdf02
    2e40:	429a      	cmp	r2, r3
    2e42:	d008      	beq.n	2e56 <z_arm_fault+0xda>
		} else if ((SCB->CFSR & SCB_CFSR_MEMFAULTSR_Msk) != 0) {
    2e44:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2e46:	b2db      	uxtb	r3, r3
    2e48:	b32b      	cbz	r3, 2e96 <z_arm_fault+0x11a>
			reason = mem_manage_fault(esf, 1, recoverable);
    2e4a:	2001      	movs	r0, #1
    2e4c:	f10d 0107 	add.w	r1, sp, #7
		reason = mem_manage_fault(esf, 0, recoverable);
    2e50:	f7ff ff36 	bl	2cc0 <mem_manage_fault.constprop.0>
    2e54:	e02f      	b.n	2eb6 <z_arm_fault+0x13a>
			PR_EXC("ARCH_EXCEPT with reason %x\n", esf->basic.r0);
    2e56:	2145      	movs	r1, #69	; 0x45
    2e58:	682a      	ldr	r2, [r5, #0]
    2e5a:	482c      	ldr	r0, [pc, #176]	; (2f0c <z_arm_fault+0x190>)
    2e5c:	f003 f82d 	bl	5eba <z_log_minimal_printk>
			reason = esf->basic.r0;
    2e60:	682c      	ldr	r4, [r5, #0]
#ifdef CONFIG_DEBUG_COREDUMP
	z_arm_coredump_fault_sp = POINTER_TO_UINT(esf);
#endif

	reason = fault_handle(esf, fault, &recoverable);
	if (recoverable) {
    2e62:	f89d 3007 	ldrb.w	r3, [sp, #7]
    2e66:	b99b      	cbnz	r3, 2e90 <z_arm_fault+0x114>
		return;
	}

	/* Copy ESF */
#if !defined(CONFIG_EXTRA_EXCEPTION_INFO)
	memcpy(&esf_copy, esf, sizeof(z_arch_esf_t));
    2e68:	2220      	movs	r2, #32
    2e6a:	4629      	mov	r1, r5
    2e6c:	a802      	add	r0, sp, #8
    2e6e:	f003 fb93 	bl	6598 <memcpy>
	/* Overwrite stacked IPSR to mark a nested exception,
	 * or a return to Thread mode. Note that this may be
	 * required, if the retrieved ESF contents are invalid
	 * due to, for instance, a stacking error.
	 */
	if (nested_exc) {
    2e72:	9b09      	ldr	r3, [sp, #36]	; 0x24
    2e74:	2e00      	cmp	r6, #0
    2e76:	d038      	beq.n	2eea <z_arm_fault+0x16e>
		if ((esf_copy.basic.xpsr & IPSR_ISR_Msk) == 0) {
    2e78:	f3c3 0208 	ubfx	r2, r3, #0, #9
    2e7c:	b922      	cbnz	r2, 2e88 <z_arm_fault+0x10c>
			esf_copy.basic.xpsr |= IPSR_ISR_Msk;
    2e7e:	ea6f 2353 	mvn.w	r3, r3, lsr #9
    2e82:	ea6f 2343 	mvn.w	r3, r3, lsl #9
		}
	} else {
		esf_copy.basic.xpsr &= ~(IPSR_ISR_Msk);
    2e86:	9309      	str	r3, [sp, #36]	; 0x24
	}

	z_arm_fatal_error(reason, &esf_copy);
    2e88:	4620      	mov	r0, r4
    2e8a:	a902      	add	r1, sp, #8
    2e8c:	f7ff fda4 	bl	29d8 <z_arm_fatal_error>
}
    2e90:	b00a      	add	sp, #40	; 0x28
    2e92:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
		} else if ((SCB->CFSR & SCB_CFSR_BUSFAULTSR_Msk) != 0) {
    2e96:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2e98:	f413 4f7f 	tst.w	r3, #65280	; 0xff00
    2e9c:	d005      	beq.n	2eaa <z_arm_fault+0x12e>
			reason = bus_fault(esf, 1, recoverable);
    2e9e:	2001      	movs	r0, #1
    2ea0:	f10d 0107 	add.w	r1, sp, #7
		reason = bus_fault(esf, 0, recoverable);
    2ea4:	f7ff feb2 	bl	2c0c <bus_fault.constprop.0>
    2ea8:	e005      	b.n	2eb6 <z_arm_fault+0x13a>
		} else if ((SCB->CFSR & SCB_CFSR_USGFAULTSR_Msk) != 0) {
    2eaa:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2eac:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
    2eb0:	d3a2      	bcc.n	2df8 <z_arm_fault+0x7c>
			reason = usage_fault(esf);
    2eb2:	f7ff fe55 	bl	2b60 <usage_fault.constprop.0>
    2eb6:	4604      	mov	r4, r0
    2eb8:	e7d3      	b.n	2e62 <z_arm_fault+0xe6>
		reason = mem_manage_fault(esf, 0, recoverable);
    2eba:	2000      	movs	r0, #0
    2ebc:	f10d 0107 	add.w	r1, sp, #7
    2ec0:	e7c6      	b.n	2e50 <z_arm_fault+0xd4>
		reason = bus_fault(esf, 0, recoverable);
    2ec2:	2000      	movs	r0, #0
    2ec4:	f10d 0107 	add.w	r1, sp, #7
    2ec8:	e7ec      	b.n	2ea4 <z_arm_fault+0x128>
	PR_FAULT_INFO(
    2eca:	2145      	movs	r1, #69	; 0x45
    2ecc:	4810      	ldr	r0, [pc, #64]	; (2f10 <z_arm_fault+0x194>)
    2ece:	e791      	b.n	2df4 <z_arm_fault+0x78>
	PR_FAULT_INFO("***** %s %d) *****",
    2ed0:	4910      	ldr	r1, [pc, #64]	; (2f14 <z_arm_fault+0x198>)
    2ed2:	f417 7ff8 	tst.w	r7, #496	; 0x1f0
    2ed6:	4a10      	ldr	r2, [pc, #64]	; (2f18 <z_arm_fault+0x19c>)
    2ed8:	4810      	ldr	r0, [pc, #64]	; (2f1c <z_arm_fault+0x1a0>)
    2eda:	bf08      	it	eq
    2edc:	460a      	moveq	r2, r1
    2ede:	f1a4 0310 	sub.w	r3, r4, #16
    2ee2:	2145      	movs	r1, #69	; 0x45
    2ee4:	f002 ffe9 	bl	5eba <z_log_minimal_printk>
}
    2ee8:	e786      	b.n	2df8 <z_arm_fault+0x7c>
		esf_copy.basic.xpsr &= ~(IPSR_ISR_Msk);
    2eea:	f423 73ff 	bic.w	r3, r3, #510	; 0x1fe
    2eee:	f023 0301 	bic.w	r3, r3, #1
    2ef2:	e7c8      	b.n	2e86 <z_arm_fault+0x10a>
    2ef4:	e000ed00 	.word	0xe000ed00
    2ef8:	000098a0 	.word	0x000098a0
    2efc:	000098d0 	.word	0x000098d0
    2f00:	000098ec 	.word	0x000098ec
    2f04:	00009912 	.word	0x00009912
    2f08:	00009925 	.word	0x00009925
    2f0c:	00009949 	.word	0x00009949
    2f10:	0000996a 	.word	0x0000996a
    2f14:	00009872 	.word	0x00009872
    2f18:	00009887 	.word	0x00009887
    2f1c:	00009993 	.word	0x00009993

00002f20 <z_arm_fault_init>:
 */
void z_arm_fault_init(void)
{
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	SCB->CCR |= SCB_CCR_DIV_0_TRP_Msk;
    2f20:	4b04      	ldr	r3, [pc, #16]	; (2f34 <z_arm_fault_init+0x14>)
    2f22:	695a      	ldr	r2, [r3, #20]
    2f24:	f042 0210 	orr.w	r2, r2, #16
    2f28:	615a      	str	r2, [r3, #20]
	 *
	 * For Non-Secure Firmware this could allow the Non-Secure Main
	 * Stack to attempt to descend into secure region, in which case a
	 * Secure Hard Fault will occur and we can track the fault from there.
	 */
	SCB->CCR |= SCB_CCR_STKOFHFNMIGN_Msk;
    2f2a:	695a      	ldr	r2, [r3, #20]
    2f2c:	f442 6280 	orr.w	r2, r2, #1024	; 0x400
    2f30:	615a      	str	r2, [r3, #20]
#endif /* CONFIG_BUILTIN_STACK_GUARD */
#ifdef CONFIG_TRAP_UNALIGNED_ACCESS
	SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
#endif /* CONFIG_TRAP_UNALIGNED_ACCESS */
}
    2f32:	4770      	bx	lr
    2f34:	e000ed00 	.word	0xe000ed00

00002f38 <z_arm_bus_fault>:
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
SECTION_SUBSEC_FUNC(TEXT,__fault,z_arm_exc_spurious)

	mrs r0, MSP
    2f38:	f3ef 8008 	mrs	r0, MSP
	mrs r1, PSP
    2f3c:	f3ef 8109 	mrs	r1, PSP
	push {r0, lr}
    2f40:	b501      	push	{r0, lr}
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	push {r4-r11}
#endif
	mov  r3, sp /* pointer to _callee_saved_t */
#endif /* CONFIG_EXTRA_EXCEPTION_INFO */
	mov r2, lr /* EXC_RETURN */
    2f42:	4672      	mov	r2, lr
	bl z_arm_fault
    2f44:	f7ff ff1a 	bl	2d7c <z_arm_fault>
	 * in this routine. Therefore, we can just reset
	 * the MSP to its value prior to entering the function
	 */
	add sp, #40
#endif
	pop {r0, pc}
    2f48:	bd01      	pop	{r0, pc}
    2f4a:	bf00      	nop

00002f4c <z_arm_interrupt_init>:
 *
 */

void z_arm_interrupt_init(void)
{
	int irq = 0;
    2f4c:	2300      	movs	r3, #0
    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    2f4e:	2120      	movs	r1, #32
    2f50:	4803      	ldr	r0, [pc, #12]	; (2f60 <z_arm_interrupt_init+0x14>)
    2f52:	18c2      	adds	r2, r0, r3

	for (; irq < CONFIG_NUM_IRQS; irq++) {
    2f54:	3301      	adds	r3, #1
    2f56:	2b41      	cmp	r3, #65	; 0x41
    2f58:	f882 1300 	strb.w	r1, [r2, #768]	; 0x300
    2f5c:	d1f9      	bne.n	2f52 <z_arm_interrupt_init+0x6>
		NVIC_SetPriority((IRQn_Type)irq, _IRQ_PRIO_OFFSET);
	}
}
    2f5e:	4770      	bx	lr
    2f60:	e000e100 	.word	0xe000e100

00002f64 <__start>:
    strb r0, [r1]
#endif /* CONFIG_DEBUG_THREAD_INFO */

#if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)
    /* Reset CONTROL register */
    movs.n r0, #0
    2f64:	2000      	movs	r0, #0
    msr CONTROL, r0
    2f66:	f380 8814 	msr	CONTROL, r0
    isb
    2f6a:	f3bf 8f6f 	isb	sy
#if defined(CONFIG_CPU_CORTEX_M_HAS_SPLIM)
    /* Clear SPLIM registers */
    movs.n r0, #0
    2f6e:	2000      	movs	r0, #0
    msr MSPLIM, r0
    2f70:	f380 880a 	msr	MSPLIM, r0
    msr PSPLIM, r0
    2f74:	f380 880b 	msr	PSPLIM, r0
#if defined(CONFIG_PM_S2RAM)
    bl arch_pm_s2ram_resume
#endif /* CONFIG_PM_S2RAM */

#if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
    bl z_arm_platform_init
    2f78:	f7fe ff16 	bl	1da8 <z_arm_platform_init>
#endif

#if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)
#if defined(CONFIG_CPU_HAS_ARM_MPU)
    /* Disable MPU */
    movs.n r0, #0
    2f7c:	2000      	movs	r0, #0
    ldr r1, =_SCS_MPU_CTRL
    2f7e:	490e      	ldr	r1, [pc, #56]	; (2fb8 <__start+0x54>)
    str r0, [r1]
    2f80:	6008      	str	r0, [r1, #0]
    dsb
    2f82:	f3bf 8f4f 	dsb	sy
#endif /* CONFIG_CPU_HAS_ARM_MPU */
    ldr r0, =z_main_stack + CONFIG_MAIN_STACK_SIZE
    2f86:	480d      	ldr	r0, [pc, #52]	; (2fbc <__start+0x58>)
    msr msp, r0
    2f88:	f380 8808 	msr	MSP, r0

    /* Initialize core architecture registers and system blocks */
    bl z_arm_init_arch_hw_at_boot
    2f8c:	f000 f83e 	bl	300c <z_arm_init_arch_hw_at_boot>

    /* lock interrupts: will get unlocked when switch to main task */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
    cpsid i
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    movs.n r0, #_EXC_IRQ_DEFAULT_PRIO
    2f90:	2020      	movs	r0, #32
    msr BASEPRI, r0
    2f92:	f380 8811 	msr	BASEPRI, r0

    /*
     * Set PSP and use it to boot without using MSP, so that it
     * gets set to z_interrupt_stacks during initialization.
     */
    ldr r0, =z_interrupt_stacks
    2f96:	480a      	ldr	r0, [pc, #40]	; (2fc0 <__start+0x5c>)
    ldr r1, =CONFIG_ISR_STACK_SIZE + MPU_GUARD_ALIGN_AND_SIZE
    2f98:	f44f 6100 	mov.w	r1, #2048	; 0x800
    adds r0, r0, r1
    2f9c:	1840      	adds	r0, r0, r1
    msr PSP, r0
    2f9e:	f380 8809 	msr	PSP, r0
    mrs r0, CONTROL
    2fa2:	f3ef 8014 	mrs	r0, CONTROL
    movs r1, #2
    2fa6:	2102      	movs	r1, #2
    orrs r0, r1 /* CONTROL_SPSEL_Msk */
    2fa8:	4308      	orrs	r0, r1
    msr CONTROL, r0
    2faa:	f380 8814 	msr	CONTROL, r0
    /*
     * When changing the stack pointer, software must use an ISB instruction
     * immediately after the MSR instruction. This ensures that instructions
     * after the ISB instruction execute using the new stack pointer.
     */
    isb
    2fae:	f3bf 8f6f 	isb	sy
    /*
     * 'bl' jumps the furthest of the branch instructions that are
     * supported on all platforms. So it is used when jumping to z_arm_prep_c
     * (even though we do not intend to return).
     */
    bl z_arm_prep_c
    2fb2:	f7ff fd75 	bl	2aa0 <z_arm_prep_c>
    2fb6:	0000      	.short	0x0000
    ldr r1, =_SCS_MPU_CTRL
    2fb8:	e000ed94 	.word	0xe000ed94
    ldr r0, =z_main_stack + CONFIG_MAIN_STACK_SIZE
    2fbc:	20013260 	.word	0x20013260
    ldr r0, =z_interrupt_stacks
    2fc0:	20010260 	.word	0x20010260

00002fc4 <sys_arch_reboot>:
  __ASM volatile ("dsb 0xF":::"memory");
    2fc4:	f3bf 8f4f 	dsb	sy
__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
{
  __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                       buffered write are completed before reset */
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
    2fc8:	4905      	ldr	r1, [pc, #20]	; (2fe0 <sys_arch_reboot+0x1c>)
    2fca:	4b06      	ldr	r3, [pc, #24]	; (2fe4 <sys_arch_reboot+0x20>)
    2fcc:	68ca      	ldr	r2, [r1, #12]
    2fce:	f402 62e0 	and.w	r2, r2, #1792	; 0x700
    2fd2:	4313      	orrs	r3, r2
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
    2fd4:	60cb      	str	r3, [r1, #12]
    2fd6:	f3bf 8f4f 	dsb	sy
                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
  __DSB();                                                          /* Ensure completion of memory access */

  for(;;)                                                           /* wait until reset */
  {
    __NOP();
    2fda:	bf00      	nop
  for(;;)                                                           /* wait until reset */
    2fdc:	e7fd      	b.n	2fda <sys_arch_reboot+0x16>
    2fde:	bf00      	nop
    2fe0:	e000ed00 	.word	0xe000ed00
    2fe4:	05fa0004 	.word	0x05fa0004

00002fe8 <z_arm_clear_arm_mpu_config>:
	int i;

	int num_regions =
		((MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos);

	for (i = 0; i < num_regions; i++) {
    2fe8:	2300      	movs	r3, #0
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
{
  mpu->RNR = rnr;
  mpu->RLAR = 0U;
    2fea:	4618      	mov	r0, r3
		((MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos);
    2fec:	4906      	ldr	r1, [pc, #24]	; (3008 <z_arm_clear_arm_mpu_config+0x20>)
    2fee:	f8d1 2090 	ldr.w	r2, [r1, #144]	; 0x90
	int num_regions =
    2ff2:	f3c2 2207 	ubfx	r2, r2, #8, #8
	for (i = 0; i < num_regions; i++) {
    2ff6:	4293      	cmp	r3, r2
    2ff8:	db00      	blt.n	2ffc <z_arm_clear_arm_mpu_config+0x14>
		ARM_MPU_ClrRegion(i);
	}
}
    2ffa:	4770      	bx	lr
  mpu->RNR = rnr;
    2ffc:	f8c1 3098 	str.w	r3, [r1, #152]	; 0x98
  mpu->RLAR = 0U;
    3000:	f8c1 00a0 	str.w	r0, [r1, #160]	; 0xa0
	for (i = 0; i < num_regions; i++) {
    3004:	3301      	adds	r3, #1
    3006:	e7f6      	b.n	2ff6 <z_arm_clear_arm_mpu_config+0xe>
    3008:	e000ed00 	.word	0xe000ed00

0000300c <z_arm_init_arch_hw_at_boot>:
 * This routine resets Cortex-M system control block
 * components and core registers.
 *
 */
void z_arm_init_arch_hw_at_boot(void)
{
    300c:	b510      	push	{r4, lr}
  __ASM volatile ("cpsid i" : : : "memory");
    300e:	b672      	cpsid	i
  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
    3010:	2400      	movs	r4, #0
    3012:	f384 8813 	msr	FAULTMASK, r4

	/* Initialize System Control Block components */

#if defined(CONFIG_CPU_HAS_ARM_MPU) || defined(CONFIG_CPU_HAS_NXP_MPU)
	/* Clear MPU region configuration */
	z_arm_clear_arm_mpu_config();
    3016:	f7ff ffe7 	bl	2fe8 <z_arm_clear_arm_mpu_config>
    301a:	4623      	mov	r3, r4
#endif /* CONFIG_CPU_HAS_ARM_MPU */

	/* Disable NVIC interrupts */
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {
		NVIC->ICER[i] = 0xFFFFFFFF;
    301c:	f04f 30ff 	mov.w	r0, #4294967295
    3020:	4a0c      	ldr	r2, [pc, #48]	; (3054 <z_arm_init_arch_hw_at_boot+0x48>)
    3022:	f103 0120 	add.w	r1, r3, #32
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {
    3026:	3301      	adds	r3, #1
    3028:	2b10      	cmp	r3, #16
		NVIC->ICER[i] = 0xFFFFFFFF;
    302a:	f842 0021 	str.w	r0, [r2, r1, lsl #2]
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {
    302e:	d1f8      	bne.n	3022 <z_arm_init_arch_hw_at_boot+0x16>
    3030:	2300      	movs	r3, #0
	}
	/* Clear pending NVIC interrupts */
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICPR); i++) {
		NVIC->ICPR[i] = 0xFFFFFFFF;
    3032:	f04f 30ff 	mov.w	r0, #4294967295
    3036:	4a07      	ldr	r2, [pc, #28]	; (3054 <z_arm_init_arch_hw_at_boot+0x48>)
    3038:	f103 0160 	add.w	r1, r3, #96	; 0x60
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICPR); i++) {
    303c:	3301      	adds	r3, #1
    303e:	2b10      	cmp	r3, #16
		NVIC->ICPR[i] = 0xFFFFFFFF;
    3040:	f842 0021 	str.w	r0, [r2, r1, lsl #2]
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICPR); i++) {
    3044:	d1f8      	bne.n	3038 <z_arm_init_arch_hw_at_boot+0x2c>
  __ASM volatile ("cpsie i" : : : "memory");
    3046:	b662      	cpsie	i
  __ASM volatile ("dsb 0xF":::"memory");
    3048:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("isb 0xF":::"memory");
    304c:	f3bf 8f6f 	isb	sy
	/* Restore Interrupts */
	__enable_irq();

	__DSB();
	__ISB();
}
    3050:	bd10      	pop	{r4, pc}
    3052:	bf00      	nop
    3054:	e000e100 	.word	0xe000e100

00003058 <snprintf>:
	return 0; /* indicate keep going so we get the total count */
}

int snprintf(char *ZRESTRICT str, size_t len,
	     const char *ZRESTRICT format, ...)
{
    3058:	b40c      	push	{r2, r3}
    305a:	b510      	push	{r4, lr}
    305c:	b086      	sub	sp, #24

	struct emitter p;
	int     r;
	char    dummy;

	if (len == 0) {
    305e:	b909      	cbnz	r1, 3064 <snprintf+0xc>
		str = &dummy; /* write final NUL to dummy, can't change *s */
    3060:	f10d 000b 	add.w	r0, sp, #11
    3064:	2400      	movs	r4, #0
	}

	p.ptr = str;
	p.len = (int) len;
    3066:	e9cd 0104 	strd	r0, r1, [sp, #16]

	va_start(vargs, format);
    306a:	ab09      	add	r3, sp, #36	; 0x24
    306c:	9a08      	ldr	r2, [sp, #32]
    306e:	9400      	str	r4, [sp, #0]
    3070:	a904      	add	r1, sp, #16
    3072:	4805      	ldr	r0, [pc, #20]	; (3088 <snprintf+0x30>)
    3074:	9303      	str	r3, [sp, #12]
    3076:	f7fe fc41 	bl	18fc <z_cbvprintf_impl>
	r = cbvprintf(sprintf_out, (void *) (&p), format, vargs);
	va_end(vargs);

	*(p.ptr) = 0;
    307a:	9b04      	ldr	r3, [sp, #16]
    307c:	701c      	strb	r4, [r3, #0]
	return r;
}
    307e:	b006      	add	sp, #24
    3080:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    3084:	b002      	add	sp, #8
    3086:	4770      	bx	lr
    3088:	000065c1 	.word	0x000065c1

0000308c <onoff_stop>:
}

static clock_control_subsys_t get_subsys(struct onoff_manager *mgr)
{
	struct nrf_clock_control_data *data = CLOCK_DEVICE->data;
	size_t offset = (size_t)(mgr - data->mgr);
    308c:	4b08      	ldr	r3, [pc, #32]	; (30b0 <onoff_stop+0x24>)
	return (clock_control_subsys_t)offset;
}

static void onoff_stop(struct onoff_manager *mgr,
			onoff_notify_fn notify)
{
    308e:	b570      	push	{r4, r5, r6, lr}
	size_t offset = (size_t)(mgr - data->mgr);
    3090:	1ac3      	subs	r3, r0, r3
{
    3092:	460d      	mov	r5, r1
	int res;

	res = stop(CLOCK_DEVICE, get_subsys(mgr), CTX_ONOFF);
    3094:	4907      	ldr	r1, [pc, #28]	; (30b4 <onoff_stop+0x28>)
	size_t offset = (size_t)(mgr - data->mgr);
    3096:	109b      	asrs	r3, r3, #2
{
    3098:	4604      	mov	r4, r0
	res = stop(CLOCK_DEVICE, get_subsys(mgr), CTX_ONOFF);
    309a:	4359      	muls	r1, r3
    309c:	2240      	movs	r2, #64	; 0x40
    309e:	4806      	ldr	r0, [pc, #24]	; (30b8 <onoff_stop+0x2c>)
    30a0:	f003 fab7 	bl	6612 <stop>
	notify(mgr, res);
    30a4:	462b      	mov	r3, r5
	res = stop(CLOCK_DEVICE, get_subsys(mgr), CTX_ONOFF);
    30a6:	4601      	mov	r1, r0
	notify(mgr, res);
    30a8:	4620      	mov	r0, r4
}
    30aa:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
	notify(mgr, res);
    30ae:	4718      	bx	r3
    30b0:	2000dfe4 	.word	0x2000dfe4
    30b4:	b6db6db7 	.word	0xb6db6db7
    30b8:	000086cc 	.word	0x000086cc

000030bc <onoff_start>:
static void onoff_start(struct onoff_manager *mgr,
			onoff_notify_fn notify)
{
	int err;

	err = async_start(CLOCK_DEVICE, get_subsys(mgr),
    30bc:	2340      	movs	r3, #64	; 0x40
{
    30be:	b573      	push	{r0, r1, r4, r5, r6, lr}
	size_t offset = (size_t)(mgr - data->mgr);
    30c0:	4c0b      	ldr	r4, [pc, #44]	; (30f0 <onoff_start+0x34>)
	err = async_start(CLOCK_DEVICE, get_subsys(mgr),
    30c2:	9300      	str	r3, [sp, #0]
	size_t offset = (size_t)(mgr - data->mgr);
    30c4:	1b04      	subs	r4, r0, r4
	err = async_start(CLOCK_DEVICE, get_subsys(mgr),
    30c6:	460b      	mov	r3, r1
{
    30c8:	460d      	mov	r5, r1
	err = async_start(CLOCK_DEVICE, get_subsys(mgr),
    30ca:	490a      	ldr	r1, [pc, #40]	; (30f4 <onoff_start+0x38>)
	size_t offset = (size_t)(mgr - data->mgr);
    30cc:	10a4      	asrs	r4, r4, #2
	err = async_start(CLOCK_DEVICE, get_subsys(mgr),
    30ce:	4361      	muls	r1, r4
{
    30d0:	4606      	mov	r6, r0
	err = async_start(CLOCK_DEVICE, get_subsys(mgr),
    30d2:	4a09      	ldr	r2, [pc, #36]	; (30f8 <onoff_start+0x3c>)
    30d4:	4809      	ldr	r0, [pc, #36]	; (30fc <onoff_start+0x40>)
    30d6:	f003 fac8 	bl	666a <async_start>
			  onoff_started_callback, notify, CTX_ONOFF);
	if (err < 0) {
    30da:	1e01      	subs	r1, r0, #0
    30dc:	da05      	bge.n	30ea <onoff_start+0x2e>
		notify(mgr, err);
    30de:	4630      	mov	r0, r6
    30e0:	462b      	mov	r3, r5
	}
}
    30e2:	b002      	add	sp, #8
    30e4:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
		notify(mgr, err);
    30e8:	4718      	bx	r3
}
    30ea:	b002      	add	sp, #8
    30ec:	bd70      	pop	{r4, r5, r6, pc}
    30ee:	bf00      	nop
    30f0:	2000dfe4 	.word	0x2000dfe4
    30f4:	b6db6db7 	.word	0xb6db6db7
    30f8:	000066db 	.word	0x000066db
    30fc:	000086cc 	.word	0x000086cc

00003100 <clk_init>:
#endif /* NRF_CLOCK_HAS_HFCLKAUDIO */
#endif
}

static int clk_init(const struct device *dev)
{
    3100:	b570      	push	{r4, r5, r6, lr}
	static const struct onoff_transitions transitions = {
		.start = onoff_start,
		.stop = onoff_stop
	};

	IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
    3102:	2200      	movs	r2, #0
    3104:	2101      	movs	r1, #1
{
    3106:	4604      	mov	r4, r0
	IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
    3108:	2005      	movs	r0, #5
    310a:	f7ff fcaf 	bl	2a6c <z_arm_irq_priority_set>
		    nrfx_isr, nrfx_power_clock_irq_handler, 0);

	nrfx_err = nrfx_clock_init(clock_event_handler);
    310e:	480f      	ldr	r0, [pc, #60]	; (314c <clk_init+0x4c>)
    3110:	f001 fc5a 	bl	49c8 <nrfx_clock_init>
	if (nrfx_err != NRFX_SUCCESS) {
    3114:	4b0e      	ldr	r3, [pc, #56]	; (3150 <clk_init+0x50>)
    3116:	4298      	cmp	r0, r3
    3118:	d115      	bne.n	3146 <clk_init+0x46>
		struct nrf_clock_control_data *data = dev->data;

		z_nrf_clock_calibration_init(data->mgr);
	}

	nrfx_clock_enable();
    311a:	f005 fa36 	bl	858a <nrfx_clock_enable>
	struct nrf_clock_control_data *data = dev->data;
    311e:	6926      	ldr	r6, [r4, #16]
	for (enum clock_control_nrf_type i = 0;
		i < CLOCK_CONTROL_NRF_TYPE_COUNT; i++) {
		struct nrf_clock_control_sub_data *subdata =
						get_sub_data(dev, i);

		err = onoff_manager_init(get_onoff_manager(dev, i),
    3120:	490c      	ldr	r1, [pc, #48]	; (3154 <clk_init+0x54>)
    3122:	4630      	mov	r0, r6
    3124:	f002 fe3f 	bl	5da6 <onoff_manager_init>
					 &transitions);
		if (err < 0) {
    3128:	2800      	cmp	r0, #0
    312a:	db0b      	blt.n	3144 <clk_init+0x44>
			return err;
		}

		subdata->flags = CLOCK_CONTROL_STATUS_OFF;
    312c:	2501      	movs	r5, #1
    312e:	6435      	str	r5, [r6, #64]	; 0x40
	struct nrf_clock_control_data *data = dev->data;
    3130:	6924      	ldr	r4, [r4, #16]
		err = onoff_manager_init(get_onoff_manager(dev, i),
    3132:	4908      	ldr	r1, [pc, #32]	; (3154 <clk_init+0x54>)
    3134:	f104 001c 	add.w	r0, r4, #28
    3138:	f002 fe35 	bl	5da6 <onoff_manager_init>
		if (err < 0) {
    313c:	2800      	cmp	r0, #0
    313e:	db01      	blt.n	3144 <clk_init+0x44>
	}

	return 0;
    3140:	2000      	movs	r0, #0
		subdata->flags = CLOCK_CONTROL_STATUS_OFF;
    3142:	64e5      	str	r5, [r4, #76]	; 0x4c
}
    3144:	bd70      	pop	{r4, r5, r6, pc}
		return -EIO;
    3146:	f06f 0004 	mvn.w	r0, #4
    314a:	e7fb      	b.n	3144 <clk_init+0x44>
    314c:	0000318d 	.word	0x0000318d
    3150:	0bad0000 	.word	0x0bad0000
    3154:	00008abc 	.word	0x00008abc

00003158 <clkstarted_handle.constprop.0>:
static void clkstarted_handle(const struct device *dev,
    3158:	4601      	mov	r1, r0
	clock_control_cb_t callback = sub_data->cb;
    315a:	230c      	movs	r3, #12
	sub_data->cb = NULL;
    315c:	2200      	movs	r2, #0
static void clkstarted_handle(const struct device *dev,
    315e:	b570      	push	{r4, r5, r6, lr}
	clock_control_cb_t callback = sub_data->cb;
    3160:	434b      	muls	r3, r1
    3162:	4808      	ldr	r0, [pc, #32]	; (3184 <clkstarted_handle.constprop.0+0x2c>)
    3164:	18c4      	adds	r4, r0, r3
	set_on_state(&sub_data->flags);
    3166:	3340      	adds	r3, #64	; 0x40
	void *user_data = sub_data->user_data;
    3168:	e9d4 560e 	ldrd	r5, r6, [r4, #56]	; 0x38
	set_on_state(&sub_data->flags);
    316c:	4418      	add	r0, r3
	sub_data->cb = NULL;
    316e:	63a2      	str	r2, [r4, #56]	; 0x38
	set_on_state(&sub_data->flags);
    3170:	f003 fa3c 	bl	65ec <set_on_state>
	if (callback) {
    3174:	b12d      	cbz	r5, 3182 <clkstarted_handle.constprop.0+0x2a>
		callback(dev, (clock_control_subsys_t)type, user_data);
    3176:	4632      	mov	r2, r6
    3178:	462b      	mov	r3, r5
}
    317a:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
		callback(dev, (clock_control_subsys_t)type, user_data);
    317e:	4802      	ldr	r0, [pc, #8]	; (3188 <clkstarted_handle.constprop.0+0x30>)
    3180:	4718      	bx	r3
}
    3182:	bd70      	pop	{r4, r5, r6, pc}
    3184:	2000dfe4 	.word	0x2000dfe4
    3188:	000086cc 	.word	0x000086cc

0000318c <clock_event_handler>:
	switch (event) {
    318c:	b110      	cbz	r0, 3194 <clock_event_handler+0x8>
    318e:	2801      	cmp	r0, #1
    3190:	d004      	beq.n	319c <clock_event_handler+0x10>
    3192:	4770      	bx	lr
		if (GET_STATUS(data->flags) == CLOCK_CONTROL_STATUS_STARTING) {
    3194:	4b03      	ldr	r3, [pc, #12]	; (31a4 <clock_event_handler+0x18>)
    3196:	6c1b      	ldr	r3, [r3, #64]	; 0x40
    3198:	075b      	lsls	r3, r3, #29
    319a:	d101      	bne.n	31a0 <clock_event_handler+0x14>
		clkstarted_handle(dev, CLOCK_CONTROL_NRF_TYPE_LFCLK);
    319c:	f7ff bfdc 	b.w	3158 <clkstarted_handle.constprop.0>
}
    31a0:	4770      	bx	lr
    31a2:	bf00      	nop
    31a4:	2000dfe4 	.word	0x2000dfe4

000031a8 <generic_hfclk_start>:
{
    31a8:	b508      	push	{r3, lr}
	__asm__ volatile(
    31aa:	f04f 0320 	mov.w	r3, #32
    31ae:	f3ef 8111 	mrs	r1, BASEPRI
    31b2:	f383 8812 	msr	BASEPRI_MAX, r3
    31b6:	f3bf 8f6f 	isb	sy
	hfclk_users |= HF_USER_GENERIC;
    31ba:	4a12      	ldr	r2, [pc, #72]	; (3204 <generic_hfclk_start+0x5c>)
    31bc:	6813      	ldr	r3, [r2, #0]
    31be:	f043 0002 	orr.w	r0, r3, #2
    31c2:	6010      	str	r0, [r2, #0]
	if (hfclk_users & HF_USER_BT) {
    31c4:	07da      	lsls	r2, r3, #31
    31c6:	d408      	bmi.n	31da <generic_hfclk_start+0x32>
	__asm__ volatile(
    31c8:	f381 8811 	msr	BASEPRI, r1
    31cc:	f3bf 8f6f 	isb	sy
}
    31d0:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
    nrfx_clock_stop(NRF_CLOCK_DOMAIN_LFCLK);
}

NRFX_STATIC_INLINE void nrfx_clock_hfclk_start(void)
{
    nrfx_clock_start(NRF_CLOCK_DOMAIN_HFCLK);
    31d4:	2001      	movs	r0, #1
    31d6:	f005 b9e6 	b.w	85a6 <nrfx_clock_start>
            break;
        case NRF_CLOCK_DOMAIN_HFCLK:
            if (p_clk_src != NULL)
            {
                (*(nrf_clock_hfclk_t *)p_clk_src) =
                    (nrf_clock_hfclk_t)((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_SRC_Msk)
    31da:	f04f 2350 	mov.w	r3, #1342197760	; 0x50005000
    31de:	f8d3 240c 	ldr.w	r2, [r3, #1036]	; 0x40c
                                        >> CLOCK_HFCLKSTAT_SRC_Pos);
            }
            if ((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_STATE_Msk)
    31e2:	f8d3 340c 	ldr.w	r3, [r3, #1036]	; 0x40c
		if (type == NRF_CLOCK_HFCLK_HIGH_ACCURACY) {
    31e6:	07d3      	lsls	r3, r2, #31
    31e8:	d5ee      	bpl.n	31c8 <generic_hfclk_start+0x20>
			set_on_state(get_hf_flags());
    31ea:	4807      	ldr	r0, [pc, #28]	; (3208 <generic_hfclk_start+0x60>)
    31ec:	f003 f9fe 	bl	65ec <set_on_state>
    31f0:	f381 8811 	msr	BASEPRI, r1
    31f4:	f3bf 8f6f 	isb	sy
}
    31f8:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
		clkstarted_handle(CLOCK_DEVICE,
    31fc:	2000      	movs	r0, #0
    31fe:	f7ff bfab 	b.w	3158 <clkstarted_handle.constprop.0>
    3202:	bf00      	nop
    3204:	2000e034 	.word	0x2000e034
    3208:	2000e024 	.word	0x2000e024

0000320c <generic_hfclk_stop>:
 *
 * @return Previous value of @a target.
 */
static inline atomic_val_t atomic_and(atomic_t *target, atomic_val_t value)
{
	return __atomic_fetch_and(target, value, __ATOMIC_SEQ_CST);
    320c:	4b07      	ldr	r3, [pc, #28]	; (322c <generic_hfclk_stop+0x20>)
    320e:	e8d3 2fef 	ldaex	r2, [r3]
    3212:	f022 0102 	bic.w	r1, r2, #2
    3216:	e8c3 1fe0 	stlex	r0, r1, [r3]
    321a:	2800      	cmp	r0, #0
    321c:	d1f7      	bne.n	320e <generic_hfclk_stop+0x2>
	if (atomic_and(&hfclk_users, ~HF_USER_GENERIC) & HF_USER_BT) {
    321e:	07d3      	lsls	r3, r2, #31
    3220:	d402      	bmi.n	3228 <generic_hfclk_stop+0x1c>
}

NRFX_STATIC_INLINE void nrfx_clock_hfclk_stop(void)
{
    nrfx_clock_stop(NRF_CLOCK_DOMAIN_HFCLK);
    3222:	2001      	movs	r0, #1
    3224:	f005 b9ff 	b.w	8626 <nrfx_clock_stop>
}
    3228:	4770      	bx	lr
    322a:	bf00      	nop
    322c:	2000e034 	.word	0x2000e034

00003230 <z_nrf_clock_control_lf_on>:
{
    3230:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
	return __atomic_exchange_n(target, value, __ATOMIC_SEQ_CST);
    3234:	2201      	movs	r2, #1
    3236:	4607      	mov	r7, r0
    3238:	4934      	ldr	r1, [pc, #208]	; (330c <z_nrf_clock_control_lf_on+0xdc>)
    323a:	e8d1 3fef 	ldaex	r3, [r1]
    323e:	e8c1 2fe0 	stlex	r0, r2, [r1]
    3242:	2800      	cmp	r0, #0
    3244:	d1f9      	bne.n	323a <z_nrf_clock_control_lf_on+0xa>
	if (atomic_set(&on, 1) == 0) {
    3246:	b933      	cbnz	r3, 3256 <z_nrf_clock_control_lf_on+0x26>
 */
static inline void sys_notify_init_spinwait(struct sys_notify *notify)
{
	__ASSERT_NO_MSG(notify != NULL);

	*notify = (struct sys_notify){
    3248:	4931      	ldr	r1, [pc, #196]	; (3310 <z_nrf_clock_control_lf_on+0xe0>)
		err = onoff_request(mgr, &cli);
    324a:	4832      	ldr	r0, [pc, #200]	; (3314 <z_nrf_clock_control_lf_on+0xe4>)
    324c:	604b      	str	r3, [r1, #4]
    324e:	60cb      	str	r3, [r1, #12]
    3250:	608a      	str	r2, [r1, #8]
    3252:	f002 fdbb 	bl	5dcc <onoff_request>
	switch (start_mode) {
    3256:	1e7b      	subs	r3, r7, #1
    3258:	2b01      	cmp	r3, #1
    325a:	d82d      	bhi.n	32b8 <z_nrf_clock_control_lf_on+0x88>
	if ((mode == CLOCK_CONTROL_NRF_LF_START_AVAILABLE) &&
    325c:	2f01      	cmp	r7, #1
    325e:	d107      	bne.n	3270 <z_nrf_clock_control_lf_on+0x40>
    return clk_src;
}

NRF_STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(NRF_CLOCK_Type const * p_reg)
{
    return (nrf_clock_lfclk_t)((p_reg->LFCLKSRCCOPY & CLOCK_LFCLKSRCCOPY_SRC_Msk)
    3260:	f04f 2350 	mov.w	r3, #1342197760	; 0x50005000
    3264:	f8d3 341c 	ldr.w	r3, [r3, #1052]	; 0x41c
	    (target_type == NRF_CLOCK_LFCLK_Xtal) &&
    3268:	f003 0303 	and.w	r3, r3, #3
    326c:	2b02      	cmp	r3, #2
    326e:	d023      	beq.n	32b8 <z_nrf_clock_control_lf_on+0x88>
	bool isr_mode = k_is_in_isr() || k_is_pre_kernel();
    3270:	f005 f9f4 	bl	865c <k_is_in_isr>
    3274:	4605      	mov	r5, r0
    3276:	bb08      	cbnz	r0, 32bc <z_nrf_clock_control_lf_on+0x8c>
	return !z_sys_post_kernel;
    3278:	4b27      	ldr	r3, [pc, #156]	; (3318 <z_nrf_clock_control_lf_on+0xe8>)
    327a:	781b      	ldrb	r3, [r3, #0]
    327c:	b1f3      	cbz	r3, 32bc <z_nrf_clock_control_lf_on+0x8c>
    p_reg->INTENCLR = mask;
    327e:	f04f 2350 	mov.w	r3, #1342197760	; 0x50005000
    3282:	2202      	movs	r2, #2
	int key = isr_mode ? irq_lock() : 0;
    3284:	4606      	mov	r6, r0
    3286:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
                    (nrf_clock_lfclk_t)((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_SRC_Msk)
    328a:	f04f 2450 	mov.w	r4, #1342197760	; 0x50005000
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    328e:	f04f 0800 	mov.w	r8, #0
    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    3292:	f8df 9088 	ldr.w	r9, [pc, #136]	; 331c <z_nrf_clock_control_lf_on+0xec>
                    (nrf_clock_lfclk_t)((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_SRC_Msk)
    3296:	f8d4 3418 	ldr.w	r3, [r4, #1048]	; 0x418
            if ((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_STATE_Msk)
    329a:	f8d4 2418 	ldr.w	r2, [r4, #1048]	; 0x418
    329e:	03d2      	lsls	r2, r2, #15
    32a0:	d516      	bpl.n	32d0 <z_nrf_clock_control_lf_on+0xa0>
	while (!(nrfx_clock_is_running(d, (void *)&type)
    32a2:	f003 0303 	and.w	r3, r3, #3
    32a6:	2b02      	cmp	r3, #2
    32a8:	d001      	beq.n	32ae <z_nrf_clock_control_lf_on+0x7e>
		     || (mode == CLOCK_CONTROL_NRF_LF_START_AVAILABLE)))) {
    32aa:	2f01      	cmp	r7, #1
    32ac:	d110      	bne.n	32d0 <z_nrf_clock_control_lf_on+0xa0>
	if (isr_mode) {
    32ae:	b33d      	cbz	r5, 3300 <z_nrf_clock_control_lf_on+0xd0>
    32b0:	f386 8811 	msr	BASEPRI, r6
    32b4:	f3bf 8f6f 	isb	sy
}
    32b8:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
	__asm__ volatile(
    32bc:	f04f 0320 	mov.w	r3, #32
    32c0:	f3ef 8611 	mrs	r6, BASEPRI
    32c4:	f383 8812 	msr	BASEPRI_MAX, r3
    32c8:	f3bf 8f6f 	isb	sy
	bool isr_mode = k_is_in_isr() || k_is_pre_kernel();
    32cc:	2501      	movs	r5, #1
    32ce:	e7dc      	b.n	328a <z_nrf_clock_control_lf_on+0x5a>
 *
 * @param key Interrupt locking key obtained from irq_lock().
 */
static inline void k_cpu_atomic_idle(unsigned int key)
{
	arch_cpu_atomic_idle(key);
    32d0:	4630      	mov	r0, r6
    32d2:	f7ff fb77 	bl	29c4 <arch_cpu_atomic_idle>
    return (nrf_clock_lfclk_t)(p_reg->LFCLKSRC);
    32d6:	f8d4 3518 	ldr.w	r3, [r4, #1304]	; 0x518
		if ((target_type ==  NRF_CLOCK_LFCLK_Xtal)
    32da:	b2db      	uxtb	r3, r3
    32dc:	2b01      	cmp	r3, #1
    32de:	d1da      	bne.n	3296 <z_nrf_clock_control_lf_on+0x66>
    return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + event));
    32e0:	f8d4 2104 	ldr.w	r2, [r4, #260]	; 0x104
		    && nrf_clock_event_check(NRF_CLOCK,
    32e4:	2a00      	cmp	r2, #0
    32e6:	d0d6      	beq.n	3296 <z_nrf_clock_control_lf_on+0x66>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    32e8:	f8c4 8104 	str.w	r8, [r4, #260]	; 0x104
#ifndef NRF_DECLARE_ONLY

NRF_STATIC_INLINE void nrf_event_readback(void * p_event_reg)
{
#if NRFX_CHECK(NRFX_EVENT_READBACK_ENABLED) && !defined(NRF51)
    (void)*((volatile uint32_t *)(p_event_reg));
    32ec:	f8d4 2104 	ldr.w	r2, [r4, #260]	; 0x104
    p_reg->LFCLKSRC = (uint32_t)(source);
    32f0:	2202      	movs	r2, #2
    32f2:	f8c4 2518 	str.w	r2, [r4, #1304]	; 0x518
    32f6:	2220      	movs	r2, #32
    32f8:	f8c9 2180 	str.w	r2, [r9, #384]	; 0x180
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    32fc:	60a3      	str	r3, [r4, #8]
}
    32fe:	e7ca      	b.n	3296 <z_nrf_clock_control_lf_on+0x66>
    p_reg->INTENSET = mask;
    3300:	f04f 2350 	mov.w	r3, #1342197760	; 0x50005000
    3304:	2202      	movs	r2, #2
    3306:	f8c3 2304 	str.w	r2, [r3, #772]	; 0x304
}
    330a:	e7d5      	b.n	32b8 <z_nrf_clock_control_lf_on+0x88>
    330c:	2000dfe0 	.word	0x2000dfe0
    3310:	2000dfd0 	.word	0x2000dfd0
    3314:	2000e000 	.word	0x2000e000
    3318:	20010259 	.word	0x20010259
    331c:	e000e100 	.word	0xe000e100

00003320 <gpio_nrfx_pin_interrupt_configure>:

static int gpio_nrfx_pin_interrupt_configure(const struct device *port,
					     gpio_pin_t pin,
					     enum gpio_int_mode mode,
					     enum gpio_int_trig trig)
{
    3320:	b530      	push	{r4, r5, lr}
	return port->config;
    3322:	6840      	ldr	r0, [r0, #4]
	uint32_t abs_pin = NRF_GPIO_PIN_MAP(get_port_cfg(port)->port_num, pin);
    3324:	f001 041f 	and.w	r4, r1, #31
    3328:	7b05      	ldrb	r5, [r0, #12]
	nrfx_err_t err;
	uint8_t ch;

	if (mode == GPIO_INT_MODE_DISABLED) {
    332a:	f5b2 1f00 	cmp.w	r2, #2097152	; 0x200000
{
    332e:	b085      	sub	sp, #20
	uint32_t abs_pin = NRF_GPIO_PIN_MAP(get_port_cfg(port)->port_num, pin);
    3330:	ea44 1445 	orr.w	r4, r4, r5, lsl #5
	if (mode == GPIO_INT_MODE_DISABLED) {
    3334:	d105      	bne.n	3342 <gpio_nrfx_pin_interrupt_configure+0x22>
		nrfx_gpiote_trigger_disable(abs_pin);
    3336:	4620      	mov	r0, r4
    3338:	f001 fdda 	bl	4ef0 <nrfx_gpiote_trigger_disable>

		return 0;
    333c:	2000      	movs	r0, #0
	}

	nrfx_gpiote_trigger_enable(abs_pin, true);

	return 0;
}
    333e:	b005      	add	sp, #20
    3340:	bd30      	pop	{r4, r5, pc}
	nrfx_gpiote_trigger_config_t trigger_config = {
    3342:	2500      	movs	r5, #0
	if (mode == GPIO_INT_MODE_LEVEL) {
    3344:	f5b2 0f80 	cmp.w	r2, #4194304	; 0x400000
	nrfx_gpiote_trigger_config_t trigger_config = {
    3348:	e9cd 5502 	strd	r5, r5, [sp, #8]
	if (mode == GPIO_INT_MODE_LEVEL) {
    334c:	d114      	bne.n	3378 <gpio_nrfx_pin_interrupt_configure+0x58>
		return trig == GPIO_INT_TRIG_LOW ? NRFX_GPIOTE_TRIGGER_LOW :
    334e:	f1b3 7f00 	cmp.w	r3, #33554432	; 0x2000000
	nrfx_gpiote_trigger_config_t trigger_config = {
    3352:	bf0c      	ite	eq
    3354:	2304      	moveq	r3, #4
    3356:	2305      	movne	r3, #5
    3358:	f88d 3008 	strb.w	r3, [sp, #8]
	err = nrfx_gpiote_input_configure(abs_pin, NULL, &trigger_config, NULL);
    335c:	2300      	movs	r3, #0
    335e:	4620      	mov	r0, r4
    3360:	4619      	mov	r1, r3
    3362:	aa02      	add	r2, sp, #8
    3364:	f001 fbfa 	bl	4b5c <nrfx_gpiote_input_configure>
	if (err != NRFX_SUCCESS) {
    3368:	4b1c      	ldr	r3, [pc, #112]	; (33dc <gpio_nrfx_pin_interrupt_configure+0xbc>)
    336a:	4298      	cmp	r0, r3
    336c:	d133      	bne.n	33d6 <gpio_nrfx_pin_interrupt_configure+0xb6>
	nrfx_gpiote_trigger_enable(abs_pin, true);
    336e:	2101      	movs	r1, #1
    3370:	4620      	mov	r0, r4
    3372:	f001 fd79 	bl	4e68 <nrfx_gpiote_trigger_enable>
	return 0;
    3376:	e7e1      	b.n	333c <gpio_nrfx_pin_interrupt_configure+0x1c>
	return trig == GPIO_INT_TRIG_BOTH ? NRFX_GPIOTE_TRIGGER_TOGGLE :
    3378:	f1b3 6fc0 	cmp.w	r3, #100663296	; 0x6000000
    337c:	d020      	beq.n	33c0 <gpio_nrfx_pin_interrupt_configure+0xa0>
    337e:	f1b3 7f00 	cmp.w	r3, #33554432	; 0x2000000
    3382:	bf14      	ite	ne
    3384:	2301      	movne	r3, #1
    3386:	2302      	moveq	r3, #2
	nrfx_gpiote_trigger_config_t trigger_config = {
    3388:	f88d 3008 	strb.w	r3, [sp, #8]
	if (!(BIT(pin) & get_port_cfg(port)->edge_sense) &&
    338c:	6883      	ldr	r3, [r0, #8]
    338e:	40cb      	lsrs	r3, r1
    3390:	07d9      	lsls	r1, r3, #31
    3392:	d4e3      	bmi.n	335c <gpio_nrfx_pin_interrupt_configure+0x3c>
    3394:	f1b2 7fa0 	cmp.w	r2, #20971520	; 0x1400000
    3398:	d1e0      	bne.n	335c <gpio_nrfx_pin_interrupt_configure+0x3c>

NRF_STATIC_INLINE nrf_gpio_pin_dir_t nrf_gpio_pin_dir_get(uint32_t pin_number)
{
    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);

    return (nrf_gpio_pin_dir_t)((reg->PIN_CNF[pin_number] &
    339a:	4a11      	ldr	r2, [pc, #68]	; (33e0 <gpio_nrfx_pin_interrupt_configure+0xc0>)
}

NRF_STATIC_INLINE uint32_t nrf_gpio_pin_port_number_extract(uint32_t * p_pin)
{
    uint32_t pin_number = *p_pin;
    *p_pin = pin_number & 0x1F;
    339c:	f004 031f 	and.w	r3, r4, #31
    return (nrf_gpio_pin_dir_t)((reg->PIN_CNF[pin_number] &
    33a0:	3380      	adds	r3, #128	; 0x80
    33a2:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
	    (mode == GPIO_INT_MODE_EDGE) &&
    33a6:	07db      	lsls	r3, r3, #31
    33a8:	d4d8      	bmi.n	335c <gpio_nrfx_pin_interrupt_configure+0x3c>
		err = nrfx_gpiote_channel_get(abs_pin, &ch);
    33aa:	f10d 0507 	add.w	r5, sp, #7
    33ae:	4629      	mov	r1, r5
    33b0:	4620      	mov	r0, r4
    33b2:	f001 fd05 	bl	4dc0 <nrfx_gpiote_channel_get>
		if (err == NRFX_ERROR_INVALID_PARAM) {
    33b6:	4b0b      	ldr	r3, [pc, #44]	; (33e4 <gpio_nrfx_pin_interrupt_configure+0xc4>)
    33b8:	4298      	cmp	r0, r3
    33ba:	d003      	beq.n	33c4 <gpio_nrfx_pin_interrupt_configure+0xa4>
		trigger_config.p_in_channel = &ch;
    33bc:	9503      	str	r5, [sp, #12]
    33be:	e7cd      	b.n	335c <gpio_nrfx_pin_interrupt_configure+0x3c>
	return trig == GPIO_INT_TRIG_BOTH ? NRFX_GPIOTE_TRIGGER_TOGGLE :
    33c0:	2303      	movs	r3, #3
    33c2:	e7e1      	b.n	3388 <gpio_nrfx_pin_interrupt_configure+0x68>
			err = nrfx_gpiote_channel_alloc(&ch);
    33c4:	4628      	mov	r0, r5
    33c6:	f001 fd49 	bl	4e5c <nrfx_gpiote_channel_alloc>
			if (err != NRFX_SUCCESS) {
    33ca:	4b04      	ldr	r3, [pc, #16]	; (33dc <gpio_nrfx_pin_interrupt_configure+0xbc>)
    33cc:	4298      	cmp	r0, r3
    33ce:	d0f5      	beq.n	33bc <gpio_nrfx_pin_interrupt_configure+0x9c>
				return -ENOMEM;
    33d0:	f06f 000b 	mvn.w	r0, #11
    33d4:	e7b3      	b.n	333e <gpio_nrfx_pin_interrupt_configure+0x1e>
		return -EINVAL;
    33d6:	f06f 0015 	mvn.w	r0, #21
    33da:	e7b0      	b.n	333e <gpio_nrfx_pin_interrupt_configure+0x1e>
    33dc:	0bad0000 	.word	0x0bad0000
    33e0:	50842500 	.word	0x50842500
    33e4:	0bad0004 	.word	0x0bad0004

000033e8 <gpio_nrfx_init>:
}

#define GPIOTE_NODE DT_INST(0, nordic_nrf_gpiote)

static int gpio_nrfx_init(const struct device *port)
{
    33e8:	b510      	push	{r4, lr}
	nrfx_err_t err;

	if (nrfx_gpiote_is_init()) {
    33ea:	f001 fd27 	bl	4e3c <nrfx_gpiote_is_init>
    33ee:	4604      	mov	r4, r0
    33f0:	b968      	cbnz	r0, 340e <gpio_nrfx_init+0x26>
		return 0;
	}

	err = nrfx_gpiote_init(0/*not used*/);
    33f2:	f001 fcfb 	bl	4dec <nrfx_gpiote_init>
	if (err != NRFX_SUCCESS) {
    33f6:	4b08      	ldr	r3, [pc, #32]	; (3418 <gpio_nrfx_init+0x30>)
    33f8:	4298      	cmp	r0, r3
    33fa:	d10a      	bne.n	3412 <gpio_nrfx_init+0x2a>
		return -EIO;
	}

	nrfx_gpiote_global_callback_set(nrfx_gpio_handler, NULL);
    33fc:	4621      	mov	r1, r4
    33fe:	4807      	ldr	r0, [pc, #28]	; (341c <gpio_nrfx_init+0x34>)
    3400:	f001 fcd8 	bl	4db4 <nrfx_gpiote_global_callback_set>

	IRQ_CONNECT(DT_IRQN(GPIOTE_NODE), DT_IRQ(GPIOTE_NODE, priority),
    3404:	4622      	mov	r2, r4
    3406:	2105      	movs	r1, #5
    3408:	200d      	movs	r0, #13
    340a:	f7ff fb2f 	bl	2a6c <z_arm_irq_priority_set>
		return 0;
    340e:	2000      	movs	r0, #0
		    nrfx_isr, nrfx_gpiote_irq_handler, 0);

	return 0;
}
    3410:	bd10      	pop	{r4, pc}
		return -EIO;
    3412:	f06f 0004 	mvn.w	r0, #4
    3416:	e7fb      	b.n	3410 <gpio_nrfx_init+0x28>
    3418:	0bad0000 	.word	0x0bad0000
    341c:	00003421 	.word	0x00003421

00003420 <nrfx_gpio_handler>:
	DT_INST_FOREACH_STATUS_OKAY(GPIO_NRF_GET_DEV)
    3420:	0943      	lsrs	r3, r0, #5
{
    3422:	b570      	push	{r4, r5, r6, lr}
	DT_INST_FOREACH_STATUS_OKAY(GPIO_NRF_GET_DEV)
    3424:	d107      	bne.n	3436 <nrfx_gpio_handler+0x16>
	return list->head;
    3426:	4b0b      	ldr	r3, [pc, #44]	; (3454 <nrfx_gpio_handler+0x34>)
    3428:	6859      	ldr	r1, [r3, #4]
					const struct device *port,
					uint32_t pins)
{
	struct gpio_callback *cb, *tmp;

	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(list, cb, tmp, node) {
    342a:	b121      	cbz	r1, 3436 <nrfx_gpio_handler+0x16>
	gpio_fire_callbacks(list, port, BIT(pin));
    342c:	2501      	movs	r5, #1
	return node->next;
    342e:	680c      	ldr	r4, [r1, #0]
		if (cb->pin_mask & pins) {
			__ASSERT(cb->handler, "No callback handler!");
			cb->handler(port, cb, cb->pin_mask & pins);
    3430:	4e09      	ldr	r6, [pc, #36]	; (3458 <nrfx_gpio_handler+0x38>)
    3432:	4085      	lsls	r5, r0
	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(list, cb, tmp, node) {
    3434:	b901      	cbnz	r1, 3438 <nrfx_gpio_handler+0x18>
}
    3436:	bd70      	pop	{r4, r5, r6, pc}
		if (cb->pin_mask & pins) {
    3438:	688a      	ldr	r2, [r1, #8]
    343a:	402a      	ands	r2, r5
    343c:	d002      	beq.n	3444 <nrfx_gpio_handler+0x24>
			cb->handler(port, cb, cb->pin_mask & pins);
    343e:	4630      	mov	r0, r6
    3440:	684b      	ldr	r3, [r1, #4]
    3442:	4798      	blx	r3
	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(list, cb, tmp, node) {
    3444:	b11c      	cbz	r4, 344e <nrfx_gpio_handler+0x2e>
    3446:	6823      	ldr	r3, [r4, #0]
    3448:	4621      	mov	r1, r4
    344a:	461c      	mov	r4, r3
    344c:	e7f2      	b.n	3434 <nrfx_gpio_handler+0x14>
    344e:	4623      	mov	r3, r4
    3450:	e7fa      	b.n	3448 <nrfx_gpio_handler+0x28>
    3452:	bf00      	nop
    3454:	2000e038 	.word	0x2000e038
    3458:	000086e4 	.word	0x000086e4

0000345c <gpio_nrfx_pin_configure>:
{
    345c:	e92d 41ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
	return port->config;
    3460:	6847      	ldr	r7, [r0, #4]
	nrfx_gpiote_pin_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
    3462:	f001 051f 	and.w	r5, r1, #31
    3466:	7b3b      	ldrb	r3, [r7, #12]
{
    3468:	4614      	mov	r4, r2
	nrfx_gpiote_pin_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
    346a:	ea45 1543 	orr.w	r5, r5, r3, lsl #5
{
    346e:	460e      	mov	r6, r1
	err = nrfx_gpiote_channel_get(abs_pin, &ch);
    3470:	4628      	mov	r0, r5
    3472:	f10d 0103 	add.w	r1, sp, #3
    3476:	f001 fca3 	bl	4dc0 <nrfx_gpiote_channel_get>
	if ((flags & (GPIO_INPUT | GPIO_OUTPUT)) == GPIO_DISCONNECTED) {
    347a:	f414 3f40 	tst.w	r4, #196608	; 0x30000
	err = nrfx_gpiote_channel_get(abs_pin, &ch);
    347e:	4680      	mov	r8, r0
	if ((flags & (GPIO_INPUT | GPIO_OUTPUT)) == GPIO_DISCONNECTED) {
    3480:	d10b      	bne.n	349a <gpio_nrfx_pin_configure+0x3e>
		(void)nrfx_gpiote_pin_uninit(abs_pin);
    3482:	4628      	mov	r0, r5
    3484:	f001 fd5c 	bl	4f40 <nrfx_gpiote_pin_uninit>
		if (free_ch) {
    3488:	4b3c      	ldr	r3, [pc, #240]	; (357c <gpio_nrfx_pin_configure+0x120>)
    348a:	4598      	cmp	r8, r3
    348c:	d103      	bne.n	3496 <gpio_nrfx_pin_configure+0x3a>
			err = nrfx_gpiote_channel_free(ch);
    348e:	f89d 0003 	ldrb.w	r0, [sp, #3]
    3492:	f001 fcdd 	bl	4e50 <nrfx_gpiote_channel_free>
		return 0;
    3496:	2000      	movs	r0, #0
    3498:	e00c      	b.n	34b4 <gpio_nrfx_pin_configure+0x58>
	nrfx_gpiote_trigger_config_t trigger_config = {
    349a:	2300      	movs	r3, #0
	err = nrfx_gpiote_input_configure(abs_pin, NULL, &trigger_config, NULL);
    349c:	4628      	mov	r0, r5
    349e:	4619      	mov	r1, r3
    34a0:	aa02      	add	r2, sp, #8
	nrfx_gpiote_trigger_config_t trigger_config = {
    34a2:	e9cd 3302 	strd	r3, r3, [sp, #8]
	err = nrfx_gpiote_input_configure(abs_pin, NULL, &trigger_config, NULL);
    34a6:	f001 fb59 	bl	4b5c <nrfx_gpiote_input_configure>
	if (err != NRFX_SUCCESS) {
    34aa:	4b34      	ldr	r3, [pc, #208]	; (357c <gpio_nrfx_pin_configure+0x120>)
    34ac:	4298      	cmp	r0, r3
    34ae:	d004      	beq.n	34ba <gpio_nrfx_pin_configure+0x5e>
		return NRF_GPIO_PIN_PULLUP;
    34b0:	f06f 0015 	mvn.w	r0, #21
}
    34b4:	b004      	add	sp, #16
    34b6:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
	if (free_ch) {
    34ba:	4580      	cmp	r8, r0
    34bc:	d103      	bne.n	34c6 <gpio_nrfx_pin_configure+0x6a>
		err = nrfx_gpiote_channel_free(ch);
    34be:	f89d 0003 	ldrb.w	r0, [sp, #3]
    34c2:	f001 fcc5 	bl	4e50 <nrfx_gpiote_channel_free>
	if (flags & GPIO_OUTPUT) {
    34c6:	03a3      	lsls	r3, r4, #14
    34c8:	d549      	bpl.n	355e <gpio_nrfx_pin_configure+0x102>
	switch (flags & (NRF_GPIO_DRIVE_MSK | GPIO_OPEN_DRAIN)) {
    34ca:	f240 3306 	movw	r3, #774	; 0x306
    34ce:	4023      	ands	r3, r4
    34d0:	f5b3 7f83 	cmp.w	r3, #262	; 0x106
    34d4:	d019      	beq.n	350a <gpio_nrfx_pin_configure+0xae>
    34d6:	d80c      	bhi.n	34f2 <gpio_nrfx_pin_configure+0x96>
    34d8:	2b06      	cmp	r3, #6
    34da:	d017      	beq.n	350c <gpio_nrfx_pin_configure+0xb0>
    34dc:	d804      	bhi.n	34e8 <gpio_nrfx_pin_configure+0x8c>
    34de:	b1ab      	cbz	r3, 350c <gpio_nrfx_pin_configure+0xb0>
    34e0:	2b02      	cmp	r3, #2
    34e2:	d1e5      	bne.n	34b0 <gpio_nrfx_pin_configure+0x54>
		*drive = NRF_GPIO_PIN_D0S1;
    34e4:	2304      	movs	r3, #4
    34e6:	e011      	b.n	350c <gpio_nrfx_pin_configure+0xb0>
	switch (flags & (NRF_GPIO_DRIVE_MSK | GPIO_OPEN_DRAIN)) {
    34e8:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
    34ec:	d1e0      	bne.n	34b0 <gpio_nrfx_pin_configure+0x54>
		*drive = NRF_GPIO_PIN_H0S1;
    34ee:	2301      	movs	r3, #1
    34f0:	e00c      	b.n	350c <gpio_nrfx_pin_configure+0xb0>
	switch (flags & (NRF_GPIO_DRIVE_MSK | GPIO_OPEN_DRAIN)) {
    34f2:	f240 2202 	movw	r2, #514	; 0x202
    34f6:	4293      	cmp	r3, r2
    34f8:	d026      	beq.n	3548 <gpio_nrfx_pin_configure+0xec>
    34fa:	f5b3 7f40 	cmp.w	r3, #768	; 0x300
    34fe:	d025      	beq.n	354c <gpio_nrfx_pin_configure+0xf0>
    3500:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
    3504:	d1d4      	bne.n	34b0 <gpio_nrfx_pin_configure+0x54>
		*drive = NRF_GPIO_PIN_S0H1;
    3506:	2302      	movs	r3, #2
    3508:	e000      	b.n	350c <gpio_nrfx_pin_configure+0xb0>
		*drive = NRF_GPIO_PIN_H0D1;
    350a:	2307      	movs	r3, #7
		nrfx_gpiote_output_config_t output_config = {
    350c:	f88d 3004 	strb.w	r3, [sp, #4]
				NRF_GPIO_PIN_INPUT_CONNECT :
    3510:	f484 3380 	eor.w	r3, r4, #65536	; 0x10000
    3514:	f3c3 4300 	ubfx	r3, r3, #16, #1
	if (flags & GPIO_PULL_UP) {
    3518:	06e0      	lsls	r0, r4, #27
		nrfx_gpiote_output_config_t output_config = {
    351a:	f88d 3005 	strb.w	r3, [sp, #5]
		return NRF_GPIO_PIN_PULLUP;
    351e:	bf4c      	ite	mi
    3520:	2303      	movmi	r3, #3
	} else if (flags & GPIO_PULL_DOWN) {
    3522:	f3c4 1340 	ubfxpl	r3, r4, #5, #1
		if (flags & GPIO_OUTPUT_INIT_HIGH) {
    3526:	0321      	lsls	r1, r4, #12
		nrfx_gpiote_output_config_t output_config = {
    3528:	f88d 3006 	strb.w	r3, [sp, #6]
		if (flags & GPIO_OUTPUT_INIT_HIGH) {
    352c:	d510      	bpl.n	3550 <gpio_nrfx_pin_configure+0xf4>
			nrf_gpio_port_out_set(cfg->port, BIT(pin));
    352e:	2301      	movs	r3, #1
    3530:	687a      	ldr	r2, [r7, #4]
    3532:	40b3      	lsls	r3, r6
    p_reg->OUTSET = set_mask;
    3534:	6093      	str	r3, [r2, #8]
		err = nrfx_gpiote_output_configure(abs_pin, &output_config, NULL);
    3536:	2200      	movs	r2, #0
    3538:	4628      	mov	r0, r5
    353a:	a901      	add	r1, sp, #4
    353c:	f001 fbba 	bl	4cb4 <nrfx_gpiote_output_configure>
	return (err != NRFX_SUCCESS) ? -EINVAL : 0;
    3540:	4b0e      	ldr	r3, [pc, #56]	; (357c <gpio_nrfx_pin_configure+0x120>)
    3542:	4298      	cmp	r0, r3
    3544:	d0a7      	beq.n	3496 <gpio_nrfx_pin_configure+0x3a>
    3546:	e7b3      	b.n	34b0 <gpio_nrfx_pin_configure+0x54>
		*drive = NRF_GPIO_PIN_D0H1;
    3548:	2305      	movs	r3, #5
    354a:	e7df      	b.n	350c <gpio_nrfx_pin_configure+0xb0>
	switch (flags & (NRF_GPIO_DRIVE_MSK | GPIO_OPEN_DRAIN)) {
    354c:	2303      	movs	r3, #3
    354e:	e7dd      	b.n	350c <gpio_nrfx_pin_configure+0xb0>
		} else if (flags & GPIO_OUTPUT_INIT_LOW) {
    3550:	0362      	lsls	r2, r4, #13
			nrf_gpio_port_out_clear(cfg->port, BIT(pin));
    3552:	bf41      	itttt	mi
    3554:	2301      	movmi	r3, #1
    3556:	687a      	ldrmi	r2, [r7, #4]
    3558:	40b3      	lslmi	r3, r6
    p_reg->OUTCLR = clr_mask;
    355a:	60d3      	strmi	r3, [r2, #12]
}
    355c:	e7eb      	b.n	3536 <gpio_nrfx_pin_configure+0xda>
	if (flags & GPIO_PULL_UP) {
    355e:	06e3      	lsls	r3, r4, #27
	err = nrfx_gpiote_input_configure(abs_pin, &input_config, NULL, NULL);
    3560:	f04f 0300 	mov.w	r3, #0
		return NRF_GPIO_PIN_PULLUP;
    3564:	bf4c      	ite	mi
    3566:	2403      	movmi	r4, #3
	} else if (flags & GPIO_PULL_DOWN) {
    3568:	f3c4 1440 	ubfxpl	r4, r4, #5, #1
	err = nrfx_gpiote_input_configure(abs_pin, &input_config, NULL, NULL);
    356c:	461a      	mov	r2, r3
    356e:	4628      	mov	r0, r5
    3570:	a901      	add	r1, sp, #4
	nrfx_gpiote_input_config_t input_config = {
    3572:	f88d 4004 	strb.w	r4, [sp, #4]
	err = nrfx_gpiote_input_configure(abs_pin, &input_config, NULL, NULL);
    3576:	f001 faf1 	bl	4b5c <nrfx_gpiote_input_configure>
    357a:	e7e1      	b.n	3540 <gpio_nrfx_pin_configure+0xe4>
    357c:	0bad0000 	.word	0x0bad0000

00003580 <flash_nrf_pages_layout>:

static void flash_nrf_pages_layout(const struct device *dev,
				     const struct flash_pages_layout **layout,
				     size_t *layout_size)
{
	*layout = &dev_layout;
    3580:	4b02      	ldr	r3, [pc, #8]	; (358c <flash_nrf_pages_layout+0xc>)
    3582:	600b      	str	r3, [r1, #0]
	*layout_size = 1;
    3584:	2301      	movs	r3, #1
    3586:	6013      	str	r3, [r2, #0]
}
    3588:	4770      	bx	lr
    358a:	bf00      	nop
    358c:	2000e044 	.word	0x2000e044

00003590 <flash_nrf_get_parameters>:
flash_nrf_get_parameters(const struct device *dev)
{
	ARG_UNUSED(dev);

	return &flash_nrf_parameters;
}
    3590:	4800      	ldr	r0, [pc, #0]	; (3594 <flash_nrf_get_parameters+0x4>)
    3592:	4770      	bx	lr
    3594:	00008b44 	.word	0x00008b44

00003598 <nrf_flash_init>:
	.page_layout = flash_nrf_pages_layout,
#endif
};

static int nrf_flash_init(const struct device *dev)
{
    3598:	b510      	push	{r4, lr}
#ifndef CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE
	nrf_flash_sync_init();
#endif /* !CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE */

#if defined(CONFIG_FLASH_PAGE_LAYOUT)
	dev_layout.pages_count = nrfx_nvmc_flash_page_count_get();
    359a:	f005 f84c 	bl	8636 <nrfx_nvmc_flash_page_count_get>
    359e:	4c03      	ldr	r4, [pc, #12]	; (35ac <nrf_flash_init+0x14>)
    35a0:	6020      	str	r0, [r4, #0]
	dev_layout.pages_size = nrfx_nvmc_flash_page_size_get();
    35a2:	f005 f845 	bl	8630 <nrfx_nvmc_flash_page_size_get>
    35a6:	6060      	str	r0, [r4, #4]
#endif

	return 0;
}
    35a8:	2000      	movs	r0, #0
    35aa:	bd10      	pop	{r4, pc}
    35ac:	2000e044 	.word	0x2000e044

000035b0 <flash_nrf_erase>:
{
    35b0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    35b2:	460e      	mov	r6, r1
    35b4:	4614      	mov	r4, r2
	uint32_t pg_size = nrfx_nvmc_flash_page_size_get();
    35b6:	f005 f83b 	bl	8630 <nrfx_nvmc_flash_page_size_get>
	if (is_regular_addr_valid(addr, size)) {
    35ba:	4621      	mov	r1, r4
	uint32_t pg_size = nrfx_nvmc_flash_page_size_get();
    35bc:	4605      	mov	r5, r0
	if (is_regular_addr_valid(addr, size)) {
    35be:	4630      	mov	r0, r6
    35c0:	f003 f8e7 	bl	6792 <is_regular_addr_valid>
		if (((addr % pg_size) != 0) || ((size % pg_size) != 0)) {
    35c4:	4637      	mov	r7, r6
	if (is_regular_addr_valid(addr, size)) {
    35c6:	b300      	cbz	r0, 360a <flash_nrf_erase+0x5a>
		if (((addr % pg_size) != 0) || ((size % pg_size) != 0)) {
    35c8:	fbb6 f3f5 	udiv	r3, r6, r5
    35cc:	fb05 6313 	mls	r3, r5, r3, r6
    35d0:	b923      	cbnz	r3, 35dc <flash_nrf_erase+0x2c>
    35d2:	fbb4 f3f5 	udiv	r3, r4, r5
    35d6:	fb05 4313 	mls	r3, r5, r3, r4
    35da:	b143      	cbz	r3, 35ee <flash_nrf_erase+0x3e>
			LOG_ERR("unaligned address: 0x%08lx:%zu",
    35dc:	4623      	mov	r3, r4
    35de:	4632      	mov	r2, r6
    35e0:	2145      	movs	r1, #69	; 0x45
    35e2:	480c      	ldr	r0, [pc, #48]	; (3614 <flash_nrf_erase+0x64>)
		LOG_ERR("invalid address: 0x%08lx:%zu",
    35e4:	f002 fc69 	bl	5eba <z_log_minimal_printk>
			return -EINVAL;
    35e8:	f06f 0015 	mvn.w	r0, #21
    35ec:	e002      	b.n	35f4 <flash_nrf_erase+0x44>
		if (!n_pages) {
    35ee:	42a5      	cmp	r5, r4
    35f0:	d901      	bls.n	35f6 <flash_nrf_erase+0x46>
			return 0;
    35f2:	2000      	movs	r0, #0
}
    35f4:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

#endif /* !CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE */

static int erase_op(void *context)
{
	uint32_t pg_size = nrfx_nvmc_flash_page_size_get();
    35f6:	f005 f81b 	bl	8630 <nrfx_nvmc_flash_page_size_get>
    35fa:	4605      	mov	r5, r0
		if (nrfx_nvmc_page_partial_erase_continue()) {
			e_ctx->len -= pg_size;
			e_ctx->flash_addr += pg_size;
		}
#else
		(void)nrfx_nvmc_page_erase(e_ctx->flash_addr);
    35fc:	4638      	mov	r0, r7
    35fe:	f001 fd81 	bl	5104 <nrfx_nvmc_page_erase>
			}

		}
#endif /* !CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE */

	} while (e_ctx->len > 0);
    3602:	1b64      	subs	r4, r4, r5
    3604:	442f      	add	r7, r5
    3606:	d1f9      	bne.n	35fc <flash_nrf_erase+0x4c>
    3608:	e7f3      	b.n	35f2 <flash_nrf_erase+0x42>
		LOG_ERR("invalid address: 0x%08lx:%zu",
    360a:	4623      	mov	r3, r4
    360c:	4632      	mov	r2, r6
    360e:	2145      	movs	r1, #69	; 0x45
    3610:	4801      	ldr	r0, [pc, #4]	; (3618 <flash_nrf_erase+0x68>)
    3612:	e7e7      	b.n	35e4 <flash_nrf_erase+0x34>
    3614:	000099dc 	.word	0x000099dc
    3618:	00009a00 	.word	0x00009a00

0000361c <flash_nrf_write>:
{
    361c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    361e:	460e      	mov	r6, r1
	if (is_regular_addr_valid(addr, len)) {
    3620:	4619      	mov	r1, r3
    3622:	4630      	mov	r0, r6
{
    3624:	4617      	mov	r7, r2
    3626:	461d      	mov	r5, r3
	if (is_regular_addr_valid(addr, len)) {
    3628:	f003 f8b3 	bl	6792 <is_regular_addr_valid>
    362c:	b940      	cbnz	r0, 3640 <flash_nrf_write+0x24>
		LOG_ERR("invalid address: 0x%08lx:%zu",
    362e:	462b      	mov	r3, r5
    3630:	4632      	mov	r2, r6
    3632:	2145      	movs	r1, #69	; 0x45
    3634:	4811      	ldr	r0, [pc, #68]	; (367c <flash_nrf_write+0x60>)
		LOG_ERR("not word-aligned: 0x%08lx:%zu",
    3636:	f002 fc40 	bl	5eba <z_log_minimal_printk>
		return -EINVAL;
    363a:	f06f 0015 	mvn.w	r0, #21
}
    363e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	if (!is_aligned_32(addr) || (len % sizeof(uint32_t))) {
    3640:	ea46 0405 	orr.w	r4, r6, r5
    3644:	f014 0403 	ands.w	r4, r4, #3
    3648:	d004      	beq.n	3654 <flash_nrf_write+0x38>
		LOG_ERR("not word-aligned: 0x%08lx:%zu",
    364a:	462b      	mov	r3, r5
    364c:	4632      	mov	r2, r6
    364e:	2145      	movs	r1, #69	; 0x45
    3650:	480b      	ldr	r0, [pc, #44]	; (3680 <flash_nrf_write+0x64>)
    3652:	e7f0      	b.n	3636 <flash_nrf_write+0x1a>
	if (!len) {
    3654:	b14d      	cbz	r5, 366a <flash_nrf_write+0x4e>
		}
#endif /* !CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE */
	}
#endif /* CONFIG_SOC_FLASH_NRF_EMULATE_ONE_BYTE_WRITE_ACCESS */
	/* Write all the 4-byte aligned data */
	while (w_ctx->len >= sizeof(uint32_t)) {
    3656:	192b      	adds	r3, r5, r4
    3658:	2b03      	cmp	r3, #3
    365a:	eba6 0004 	sub.w	r0, r6, r4
    365e:	d806      	bhi.n	366e <flash_nrf_write+0x52>

#ifndef NRF_DECLARE_ONLY

NRF_STATIC_INLINE bool nrf_nvmc_ready_check(NRF_NVMC_Type const * p_reg)
{
    return (bool)(p_reg->READY & NVMC_READY_READY_Msk);
    3660:	4a08      	ldr	r2, [pc, #32]	; (3684 <flash_nrf_write+0x68>)
    3662:	f8d2 3400 	ldr.w	r3, [r2, #1024]	; 0x400
	while (!nrfx_nvmc_write_done_check()) {
    3666:	07db      	lsls	r3, r3, #31
    3668:	d5fb      	bpl.n	3662 <flash_nrf_write+0x46>
	return ret;
    366a:	2000      	movs	r0, #0
    366c:	e7e7      	b.n	363e <flash_nrf_write+0x22>
		if (SUSPEND_POFWARN()) {
			return -ECANCELED;
		}

		nrfx_nvmc_word_write(w_ctx->flash_addr,
				     UNALIGNED_GET((uint32_t *)w_ctx->data_addr));
    366e:	1b3b      	subs	r3, r7, r4
		nrfx_nvmc_word_write(w_ctx->flash_addr,
    3670:	6819      	ldr	r1, [r3, #0]
    3672:	f001 fd65 	bl	5140 <nrfx_nvmc_word_write>
	w_ctx->len -= shift;
    3676:	3c04      	subs	r4, #4
}
    3678:	e7ed      	b.n	3656 <flash_nrf_write+0x3a>
    367a:	bf00      	nop
    367c:	00009a00 	.word	0x00009a00
    3680:	00009a22 	.word	0x00009a22
    3684:	50039000 	.word	0x50039000

00003688 <flash_nrf_read>:
{
    3688:	b570      	push	{r4, r5, r6, lr}
    368a:	460d      	mov	r5, r1
	if (is_regular_addr_valid(addr, len)) {
    368c:	4619      	mov	r1, r3
    368e:	4628      	mov	r0, r5
{
    3690:	4616      	mov	r6, r2
    3692:	461c      	mov	r4, r3
	if (is_regular_addr_valid(addr, len)) {
    3694:	f003 f87d 	bl	6792 <is_regular_addr_valid>
    3698:	b940      	cbnz	r0, 36ac <flash_nrf_read+0x24>
		LOG_ERR("invalid address: 0x%08lx:%zu",
    369a:	4808      	ldr	r0, [pc, #32]	; (36bc <flash_nrf_read+0x34>)
    369c:	4623      	mov	r3, r4
    369e:	462a      	mov	r2, r5
    36a0:	2145      	movs	r1, #69	; 0x45
    36a2:	f002 fc0a 	bl	5eba <z_log_minimal_printk>
    36a6:	f06f 0015 	mvn.w	r0, #21
}
    36aa:	bd70      	pop	{r4, r5, r6, pc}
	if (!len) {
    36ac:	b124      	cbz	r4, 36b8 <flash_nrf_read+0x30>
	memcpy(data, (void *)addr, len);
    36ae:	4622      	mov	r2, r4
    36b0:	4629      	mov	r1, r5
    36b2:	4630      	mov	r0, r6
    36b4:	f002 ff70 	bl	6598 <memcpy>
		return 0;
    36b8:	2000      	movs	r0, #0
    36ba:	e7f6      	b.n	36aa <flash_nrf_read+0x22>
    36bc:	00009a00 	.word	0x00009a00

000036c0 <uarte_nrfx_poll_out>:
 *
 * @param dev UARTE device struct
 * @param c Character to send
 */
static void uarte_nrfx_poll_out(const struct device *dev, unsigned char c)
{
    36c0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    36c2:	4604      	mov	r4, r0
    36c4:	460d      	mov	r5, r1
	struct uarte_nrfx_data *data = dev->data;
    36c6:	6907      	ldr	r7, [r0, #16]
	bool isr_mode = k_is_in_isr() || k_is_pre_kernel();
    36c8:	f004 ffc8 	bl	865c <k_is_in_isr>
    36cc:	b990      	cbnz	r0, 36f4 <uarte_nrfx_poll_out+0x34>
	return !z_sys_post_kernel;
    36ce:	4b1f      	ldr	r3, [pc, #124]	; (374c <uarte_nrfx_poll_out+0x8c>)
    36d0:	781b      	ldrb	r3, [r3, #0]
    36d2:	b17b      	cbz	r3, 36f4 <uarte_nrfx_poll_out+0x34>
{
    36d4:	2664      	movs	r6, #100	; 0x64
		NRFX_WAIT_FOR(is_tx_ready(dev), 100, 1, res);
    36d6:	6860      	ldr	r0, [r4, #4]
    36d8:	f003 f99c 	bl	6a14 <is_tx_ready.isra.0>
    36dc:	b9e0      	cbnz	r0, 3718 <uarte_nrfx_poll_out+0x58>
    36de:	2001      	movs	r0, #1
    36e0:	f004 fef7 	bl	84d2 <nrfx_busy_wait>
    36e4:	3e01      	subs	r6, #1
    36e6:	d1f6      	bne.n	36d6 <uarte_nrfx_poll_out+0x16>
    36e8:	e7f4      	b.n	36d4 <uarte_nrfx_poll_out+0x14>
	__asm__ volatile(
    36ea:	f381 8811 	msr	BASEPRI, r1
    36ee:	f3bf 8f6f 	isb	sy
		"cpsie i;"
		: : : "memory", "cc");
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
}
    36f2:	e7ef      	b.n	36d4 <uarte_nrfx_poll_out+0x14>
	__asm__ volatile(
    36f4:	f04f 0320 	mov.w	r3, #32
    36f8:	f3ef 8111 	mrs	r1, BASEPRI
    36fc:	f383 8812 	msr	BASEPRI_MAX, r3
    3700:	f3bf 8f6f 	isb	sy
#endif

	if (isr_mode) {
		while (1) {
			key = irq_lock();
			if (is_tx_ready(dev)) {
    3704:	6860      	ldr	r0, [r4, #4]
    3706:	460e      	mov	r6, r1
    3708:	f003 f984 	bl	6a14 <is_tx_ready.isra.0>
    370c:	b990      	cbnz	r0, 3734 <uarte_nrfx_poll_out+0x74>
	__asm__ volatile(
    370e:	f381 8811 	msr	BASEPRI, r1
    3712:	f3bf 8f6f 	isb	sy
}
    3716:	e7ed      	b.n	36f4 <uarte_nrfx_poll_out+0x34>
	__asm__ volatile(
    3718:	f04f 0320 	mov.w	r3, #32
    371c:	f3ef 8111 	mrs	r1, BASEPRI
    3720:	f383 8812 	msr	BASEPRI_MAX, r3
    3724:	f3bf 8f6f 	isb	sy
			if (is_tx_ready(dev)) {
    3728:	6860      	ldr	r0, [r4, #4]
    372a:	460e      	mov	r6, r1
    372c:	f003 f972 	bl	6a14 <is_tx_ready.isra.0>
    3730:	2800      	cmp	r0, #0
    3732:	d0da      	beq.n	36ea <uarte_nrfx_poll_out+0x2a>
		}
	} else {
		key = wait_tx_ready(dev);
	}

	*data->char_out = c;
    3734:	697b      	ldr	r3, [r7, #20]
	tx_start(dev, data->char_out, 1);
    3736:	2201      	movs	r2, #1
	*data->char_out = c;
    3738:	701d      	strb	r5, [r3, #0]
	tx_start(dev, data->char_out, 1);
    373a:	4620      	mov	r0, r4
    373c:	6979      	ldr	r1, [r7, #20]
    373e:	f003 f8a9 	bl	6894 <tx_start>
	__asm__ volatile(
    3742:	f386 8811 	msr	BASEPRI, r6
    3746:	f3bf 8f6f 	isb	sy

	irq_unlock(key);
}
    374a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    374c:	20010259 	.word	0x20010259

00003750 <uarte_nrfx_configure>:
{
    3750:	b5f0      	push	{r4, r5, r6, r7, lr}
	switch (cfg->stop_bits) {
    3752:	794b      	ldrb	r3, [r1, #5]
    3754:	2b01      	cmp	r3, #1
    3756:	d026      	beq.n	37a6 <uarte_nrfx_configure+0x56>
    3758:	2b03      	cmp	r3, #3
    375a:	d121      	bne.n	37a0 <uarte_nrfx_configure+0x50>
		uarte_cfg.stop = NRF_UARTE_STOP_TWO;
    375c:	2510      	movs	r5, #16
	if (cfg->data_bits != UART_CFG_DATA_BITS_8) {
    375e:	798b      	ldrb	r3, [r1, #6]
    3760:	2b03      	cmp	r3, #3
    3762:	d11d      	bne.n	37a0 <uarte_nrfx_configure+0x50>
	switch (cfg->flow_ctrl) {
    3764:	79ce      	ldrb	r6, [r1, #7]
    3766:	b10e      	cbz	r6, 376c <uarte_nrfx_configure+0x1c>
    3768:	2e01      	cmp	r6, #1
    376a:	d119      	bne.n	37a0 <uarte_nrfx_configure+0x50>
	switch (cfg->parity) {
    376c:	790a      	ldrb	r2, [r1, #4]
    376e:	b112      	cbz	r2, 3776 <uarte_nrfx_configure+0x26>
    3770:	2a02      	cmp	r2, #2
    3772:	d115      	bne.n	37a0 <uarte_nrfx_configure+0x50>
		uarte_cfg.parity = NRF_UARTE_PARITY_INCLUDED;
    3774:	220e      	movs	r2, #14
	if (baudrate_set(dev, cfg->baudrate) != 0) {
    3776:	680b      	ldr	r3, [r1, #0]
	return config->uarte_regs;
    3778:	6844      	ldr	r4, [r0, #4]
	switch (baudrate) {
    377a:	f5b3 4f16 	cmp.w	r3, #38400	; 0x9600
	return config->uarte_regs;
    377e:	6827      	ldr	r7, [r4, #0]
	switch (baudrate) {
    3780:	d067      	beq.n	3852 <uarte_nrfx_configure+0x102>
    3782:	d82d      	bhi.n	37e0 <uarte_nrfx_configure+0x90>
    3784:	f5b3 5f16 	cmp.w	r3, #9600	; 0x2580
    3788:	d066      	beq.n	3858 <uarte_nrfx_configure+0x108>
    378a:	d816      	bhi.n	37ba <uarte_nrfx_configure+0x6a>
    378c:	f5b3 6f96 	cmp.w	r3, #1200	; 0x4b0
    3790:	d064      	beq.n	385c <uarte_nrfx_configure+0x10c>
    3792:	d80a      	bhi.n	37aa <uarte_nrfx_configure+0x5a>
    3794:	f5b3 7f96 	cmp.w	r3, #300	; 0x12c
    3798:	d063      	beq.n	3862 <uarte_nrfx_configure+0x112>
    379a:	f5b3 7f16 	cmp.w	r3, #600	; 0x258
    379e:	d063      	beq.n	3868 <uarte_nrfx_configure+0x118>
		return -ENOTSUP;
    37a0:	f06f 0085 	mvn.w	r0, #133	; 0x85
    37a4:	e054      	b.n	3850 <uarte_nrfx_configure+0x100>
	switch (cfg->stop_bits) {
    37a6:	2500      	movs	r5, #0
    37a8:	e7d9      	b.n	375e <uarte_nrfx_configure+0xe>
	switch (baudrate) {
    37aa:	f5b3 6f16 	cmp.w	r3, #2400	; 0x960
    37ae:	d05e      	beq.n	386e <uarte_nrfx_configure+0x11e>
    37b0:	f5b3 5f96 	cmp.w	r3, #4800	; 0x12c0
    37b4:	d1f4      	bne.n	37a0 <uarte_nrfx_configure+0x50>
		nrf_baudrate = NRF_UARTE_BAUDRATE_4800;
    37b6:	4b38      	ldr	r3, [pc, #224]	; (3898 <uarte_nrfx_configure+0x148>)
    37b8:	e03c      	b.n	3834 <uarte_nrfx_configure+0xe4>
	switch (baudrate) {
    37ba:	f5b3 4fe1 	cmp.w	r3, #28800	; 0x7080
    37be:	d059      	beq.n	3874 <uarte_nrfx_configure+0x124>
    37c0:	d807      	bhi.n	37d2 <uarte_nrfx_configure+0x82>
    37c2:	f5b3 5f61 	cmp.w	r3, #14400	; 0x3840
    37c6:	d057      	beq.n	3878 <uarte_nrfx_configure+0x128>
    37c8:	f5b3 4f96 	cmp.w	r3, #19200	; 0x4b00
    37cc:	d1e8      	bne.n	37a0 <uarte_nrfx_configure+0x50>
		nrf_baudrate = NRF_UARTE_BAUDRATE_19200;
    37ce:	4b33      	ldr	r3, [pc, #204]	; (389c <uarte_nrfx_configure+0x14c>)
    37d0:	e030      	b.n	3834 <uarte_nrfx_configure+0xe4>
	switch (baudrate) {
    37d2:	f647 2412 	movw	r4, #31250	; 0x7a12
    37d6:	42a3      	cmp	r3, r4
    37d8:	d1e2      	bne.n	37a0 <uarte_nrfx_configure+0x50>
		nrf_baudrate = NRF_UARTE_BAUDRATE_31250;
    37da:	f44f 0300 	mov.w	r3, #8388608	; 0x800000
    37de:	e029      	b.n	3834 <uarte_nrfx_configure+0xe4>
	switch (baudrate) {
    37e0:	f5b3 3f61 	cmp.w	r3, #230400	; 0x38400
    37e4:	d04a      	beq.n	387c <uarte_nrfx_configure+0x12c>
    37e6:	d813      	bhi.n	3810 <uarte_nrfx_configure+0xc0>
    37e8:	f5b3 3f96 	cmp.w	r3, #76800	; 0x12c00
    37ec:	d049      	beq.n	3882 <uarte_nrfx_configure+0x132>
    37ee:	d809      	bhi.n	3804 <uarte_nrfx_configure+0xb4>
    37f0:	f64d 24c0 	movw	r4, #56000	; 0xdac0
    37f4:	42a3      	cmp	r3, r4
    37f6:	d046      	beq.n	3886 <uarte_nrfx_configure+0x136>
    37f8:	f5b3 4f61 	cmp.w	r3, #57600	; 0xe100
    37fc:	d1d0      	bne.n	37a0 <uarte_nrfx_configure+0x50>
		nrf_baudrate = NRF_UARTE_BAUDRATE_57600;
    37fe:	f44f 036b 	mov.w	r3, #15400960	; 0xeb0000
    3802:	e017      	b.n	3834 <uarte_nrfx_configure+0xe4>
	switch (baudrate) {
    3804:	f5b3 3fe1 	cmp.w	r3, #115200	; 0x1c200
    3808:	d1ca      	bne.n	37a0 <uarte_nrfx_configure+0x50>
		nrf_baudrate = NRF_UARTE_BAUDRATE_115200;
    380a:	f04f 73eb 	mov.w	r3, #30801920	; 0x1d60000
    380e:	e011      	b.n	3834 <uarte_nrfx_configure+0xe4>
	switch (baudrate) {
    3810:	f5b3 2f61 	cmp.w	r3, #921600	; 0xe1000
    3814:	d03a      	beq.n	388c <uarte_nrfx_configure+0x13c>
    3816:	d808      	bhi.n	382a <uarte_nrfx_configure+0xda>
    3818:	4c21      	ldr	r4, [pc, #132]	; (38a0 <uarte_nrfx_configure+0x150>)
    381a:	42a3      	cmp	r3, r4
    381c:	d039      	beq.n	3892 <uarte_nrfx_configure+0x142>
    381e:	f5b3 2fe1 	cmp.w	r3, #460800	; 0x70800
    3822:	d1bd      	bne.n	37a0 <uarte_nrfx_configure+0x50>
		nrf_baudrate = NRF_UARTE_BAUDRATE_460800;
    3824:	f04f 63e8 	mov.w	r3, #121634816	; 0x7400000
    3828:	e004      	b.n	3834 <uarte_nrfx_configure+0xe4>
	switch (baudrate) {
    382a:	4c1e      	ldr	r4, [pc, #120]	; (38a4 <uarte_nrfx_configure+0x154>)
    382c:	42a3      	cmp	r3, r4
    382e:	d1b7      	bne.n	37a0 <uarte_nrfx_configure+0x50>
		nrf_baudrate = NRF_UARTE_BAUDRATE_1000000;
    3830:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
	struct uarte_nrfx_data *data = dev->data;
    3834:	6904      	ldr	r4, [r0, #16]
                    | (uint32_t)p_cfg->hwfc;
}

NRF_STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate)
{
    p_reg->BAUDRATE = baudrate;
    3836:	f8c7 3524 	str.w	r3, [r7, #1316]	; 0x524
	return config->uarte_regs;
    383a:	6843      	ldr	r3, [r0, #4]
                    | (uint32_t)p_cfg->hwfc;
    383c:	4335      	orrs	r5, r6
    383e:	681b      	ldr	r3, [r3, #0]
    3840:	432a      	orrs	r2, r5
    p_reg->CONFIG = (uint32_t)p_cfg->parity
    3842:	f8c3 256c 	str.w	r2, [r3, #1388]	; 0x56c
	data->uart_config = *cfg;
    3846:	1d23      	adds	r3, r4, #4
    3848:	c903      	ldmia	r1, {r0, r1}
    384a:	e883 0003 	stmia.w	r3, {r0, r1}
	return 0;
    384e:	2000      	movs	r0, #0
}
    3850:	bdf0      	pop	{r4, r5, r6, r7, pc}
		nrf_baudrate = NRF_UARTE_BAUDRATE_38400;
    3852:	f44f 031d 	mov.w	r3, #10289152	; 0x9d0000
    3856:	e7ed      	b.n	3834 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_9600;
    3858:	4b13      	ldr	r3, [pc, #76]	; (38a8 <uarte_nrfx_configure+0x158>)
    385a:	e7eb      	b.n	3834 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_1200;
    385c:	f44f 239e 	mov.w	r3, #323584	; 0x4f000
    3860:	e7e8      	b.n	3834 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = 0x00014000;
    3862:	f44f 33a0 	mov.w	r3, #81920	; 0x14000
    3866:	e7e5      	b.n	3834 <uarte_nrfx_configure+0xe4>
	switch (baudrate) {
    3868:	f44f 331c 	mov.w	r3, #159744	; 0x27000
    386c:	e7e2      	b.n	3834 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_2400;
    386e:	f44f 231d 	mov.w	r3, #643072	; 0x9d000
    3872:	e7df      	b.n	3834 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_28800;
    3874:	4b0d      	ldr	r3, [pc, #52]	; (38ac <uarte_nrfx_configure+0x15c>)
    3876:	e7dd      	b.n	3834 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_14400;
    3878:	4b0d      	ldr	r3, [pc, #52]	; (38b0 <uarte_nrfx_configure+0x160>)
    387a:	e7db      	b.n	3834 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_230400;
    387c:	f04f 736c 	mov.w	r3, #61865984	; 0x3b00000
    3880:	e7d8      	b.n	3834 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_76800;
    3882:	4b0c      	ldr	r3, [pc, #48]	; (38b4 <uarte_nrfx_configure+0x164>)
    3884:	e7d6      	b.n	3834 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_56000;
    3886:	f44f 0365 	mov.w	r3, #15007744	; 0xe50000
    388a:	e7d3      	b.n	3834 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_921600;
    388c:	f04f 6370 	mov.w	r3, #251658240	; 0xf000000
    3890:	e7d0      	b.n	3834 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_250000;
    3892:	f04f 6380 	mov.w	r3, #67108864	; 0x4000000
    3896:	e7cd      	b.n	3834 <uarte_nrfx_configure+0xe4>
    3898:	0013b000 	.word	0x0013b000
    389c:	004ea000 	.word	0x004ea000
    38a0:	0003d090 	.word	0x0003d090
    38a4:	000f4240 	.word	0x000f4240
    38a8:	00275000 	.word	0x00275000
    38ac:	0075c000 	.word	0x0075c000
    38b0:	003af000 	.word	0x003af000
    38b4:	013a9000 	.word	0x013a9000

000038b8 <uarte_instance_init.constprop.0>:
	nrfx_gppi_channels_enable(BIT(data->ppi_ch_endtx));

	return 0;
}

static int uarte_instance_init(const struct device *dev,
    38b8:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
    38bc:	2100      	movs	r1, #0
	const struct uarte_nrfx_config *config = dev->config;
    38be:	6847      	ldr	r7, [r0, #4]
			       uint8_t interrupts_active)
{
	int err;
	NRF_UARTE_Type *uarte = get_uarte_instance(dev);
	struct uarte_nrfx_data *data = dev->data;
    38c0:	6906      	ldr	r6, [r0, #16]
	return config->uarte_regs;
    38c2:	683c      	ldr	r4, [r7, #0]
static int uarte_instance_init(const struct device *dev,
    38c4:	4680      	mov	r8, r0
    38c6:	f8c4 1500 	str.w	r1, [r4, #1280]	; 0x500
	const struct uarte_nrfx_config *cfg = dev->config;

	nrf_uarte_disable(uarte);

	data->dev = dev;
    38ca:	6030      	str	r0, [r6, #0]

#ifdef CONFIG_PINCTRL
	err = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
    38cc:	f8d7 900c 	ldr.w	r9, [r7, #12]
				      uint8_t id)
{
	int ret;
	const struct pinctrl_state *state;

	ret = pinctrl_lookup_state(config, id, &state);
    38d0:	aa01      	add	r2, sp, #4
    38d2:	4648      	mov	r0, r9
    38d4:	f003 f964 	bl	6ba0 <pinctrl_lookup_state>
	if (ret < 0) {
    38d8:	1e05      	subs	r5, r0, #0
    38da:	db1e      	blt.n	391a <uarte_instance_init.constprop.0+0x62>
		return ret;
	}

	return pinctrl_apply_state_direct(config, state);
    38dc:	9b01      	ldr	r3, [sp, #4]
	return pinctrl_configure_pins(state->pins, state->pin_cnt, reg);
    38de:	f8d9 2000 	ldr.w	r2, [r9]
    38e2:	7919      	ldrb	r1, [r3, #4]
    38e4:	6818      	ldr	r0, [r3, #0]
    38e6:	f000 fa87 	bl	3df8 <pinctrl_configure_pins>
	if (err < 0) {
    38ea:	1e05      	subs	r5, r0, #0
    38ec:	db15      	blt.n	391a <uarte_instance_init.constprop.0+0x62>
	}
#else
	uarte_nrfx_pins_configure(dev, false);
#endif /* CONFIG_PINCTRL */

	err = uarte_nrfx_configure(dev, &data->uart_config);
    38ee:	4640      	mov	r0, r8
    38f0:	1d31      	adds	r1, r6, #4
    38f2:	f7ff ff2d 	bl	3750 <uarte_nrfx_configure>
	if (err) {
    38f6:	4605      	mov	r5, r0
    38f8:	b978      	cbnz	r0, 391a <uarte_instance_init.constprop.0+0x62>
		return err;
	}

	if (IS_ENABLED(CONFIG_UART_ENHANCED_POLL_OUT) &&
	    cfg->flags & UARTE_CFG_FLAG_PPI_ENDTX) {
    38fa:	687b      	ldr	r3, [r7, #4]
	if (IS_ENABLED(CONFIG_UART_ENHANCED_POLL_OUT) &&
    38fc:	0799      	lsls	r1, r3, #30
    38fe:	d51d      	bpl.n	393c <uarte_instance_init.constprop.0+0x84>
	ret = gppi_channel_alloc(&data->ppi_ch_endtx);
    3900:	f106 001c 	add.w	r0, r6, #28
    3904:	f001 f8a4 	bl	4a50 <nrfx_dppi_channel_alloc>
	if (ret != NRFX_SUCCESS) {
    3908:	4b20      	ldr	r3, [pc, #128]	; (398c <uarte_instance_init.constprop.0+0xd4>)
    390a:	4298      	cmp	r0, r3
    390c:	d009      	beq.n	3922 <uarte_instance_init.constprop.0+0x6a>
		LOG_ERR("Failed to allocate PPI Channel");
    390e:	2145      	movs	r1, #69	; 0x45
    3910:	481f      	ldr	r0, [pc, #124]	; (3990 <uarte_instance_init.constprop.0+0xd8>)
    3912:	f002 fad2 	bl	5eba <z_log_minimal_printk>
		return -EIO;
    3916:	f06f 0504 	mvn.w	r5, #4

	/* switch off transmitter to save an energy */
	nrf_uarte_task_trigger(uarte, NRF_UARTE_TASK_STOPTX);

	return 0;
}
    391a:	4628      	mov	r0, r5
    391c:	b003      	add	sp, #12
    391e:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
}

__STATIC_INLINE void nrfx_gppi_event_endpoint_setup(uint8_t channel, uint32_t eep)
{
    NRFX_ASSERT(eep);
    *((volatile uint32_t *)(eep + 0x80uL)) = ((uint32_t)channel | DPPIC_SUBSCRIBE_CHG_EN_EN_Msk);
    3922:	7f33      	ldrb	r3, [r6, #28]
    3924:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
    3928:	f8c4 31a0 	str.w	r3, [r4, #416]	; 0x1a0
}

__STATIC_INLINE void nrfx_gppi_task_endpoint_setup(uint8_t channel, uint32_t tep)
{
    NRFX_ASSERT(tep);
    *((volatile uint32_t *)(tep + 0x80uL)) = ((uint32_t)channel | DPPIC_SUBSCRIBE_CHG_EN_EN_Msk);
    392c:	f8c4 308c 	str.w	r3, [r4, #140]	; 0x8c
	nrfx_gppi_channels_enable(BIT(data->ppi_ch_endtx));
    3930:	2301      	movs	r3, #1
    3932:	7f32      	ldrb	r2, [r6, #28]
    3934:	4093      	lsls	r3, r2
}

NRF_STATIC_INLINE void nrf_dppi_channels_enable(NRF_DPPIC_Type * p_reg, uint32_t mask)
{
    p_reg->CHENSET = mask;
    3936:	4a17      	ldr	r2, [pc, #92]	; (3994 <uarte_instance_init.constprop.0+0xdc>)
    3938:	f8c2 3504 	str.w	r3, [r2, #1284]	; 0x504
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
    393c:	2308      	movs	r3, #8
    393e:	f8c4 3500 	str.w	r3, [r4, #1280]	; 0x500
		if (!cfg->disable_rx) {
    3942:	7a3b      	ldrb	r3, [r7, #8]
    3944:	b953      	cbnz	r3, 395c <uarte_instance_init.constprop.0+0xa4>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    3946:	f8c4 3110 	str.w	r3, [r4, #272]	; 0x110
    394a:	f8d4 3110 	ldr.w	r3, [r4, #272]	; 0x110

NRF_STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg,
                                               uint8_t *        p_buffer,
                                               size_t           length)
{
    p_reg->RXD.PTR    = (uint32_t)p_buffer;
    394e:	69b3      	ldr	r3, [r6, #24]
    3950:	f8c4 3534 	str.w	r3, [r4, #1332]	; 0x534
    p_reg->RXD.MAXCNT = length;
    3954:	2301      	movs	r3, #1
    3956:	f8c4 3538 	str.w	r3, [r4, #1336]	; 0x538
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    395a:	6023      	str	r3, [r4, #0]
	if (!(cfg->flags & UARTE_CFG_FLAG_PPI_ENDTX)) {
    395c:	687b      	ldr	r3, [r7, #4]
    395e:	079a      	lsls	r2, r3, #30
    p_reg->INTENSET = mask;
    3960:	bf5c      	itt	pl
    3962:	f44f 7380 	movpl.w	r3, #256	; 0x100
    3966:	f8c4 3304 	strpl.w	r3, [r4, #772]	; 0x304
	if (cfg->flags & UARTE_CFG_FLAG_LOW_POWER) {
    396a:	687b      	ldr	r3, [r7, #4]
    396c:	06db      	lsls	r3, r3, #27
    396e:	bf44      	itt	mi
    3970:	f44f 0380 	movmi.w	r3, #4194304	; 0x400000
    3974:	f8c4 3304 	strmi.w	r3, [r4, #772]	; 0x304
    p_reg->TXD.PTR    = (uint32_t)p_buffer;
    3978:	6973      	ldr	r3, [r6, #20]
    397a:	f8c4 3544 	str.w	r3, [r4, #1348]	; 0x544
    p_reg->TXD.MAXCNT = length;
    397e:	2300      	movs	r3, #0
    3980:	f8c4 3548 	str.w	r3, [r4, #1352]	; 0x548
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    3984:	2301      	movs	r3, #1
    3986:	60a3      	str	r3, [r4, #8]
    3988:	60e3      	str	r3, [r4, #12]
	return 0;
    398a:	e7c6      	b.n	391a <uarte_instance_init.constprop.0+0x62>
    398c:	0bad0000 	.word	0x0bad0000
    3990:	00009a66 	.word	0x00009a66
    3994:	50017000 	.word	0x50017000

00003998 <compare_int_lock>:
#endif
}

static bool compare_int_lock(int32_t chan)
{
	atomic_val_t prev = atomic_and(&int_mask, ~BIT(chan));
    3998:	2301      	movs	r3, #1
    399a:	4083      	lsls	r3, r0
{
    399c:	b570      	push	{r4, r5, r6, lr}
	atomic_val_t prev = atomic_and(&int_mask, ~BIT(chan));
    399e:	43dc      	mvns	r4, r3
	return __atomic_fetch_and(target, value, __ATOMIC_SEQ_CST);
    39a0:	4a0b      	ldr	r2, [pc, #44]	; (39d0 <compare_int_lock+0x38>)
    39a2:	e8d2 1fef 	ldaex	r1, [r2]
    39a6:	ea01 0504 	and.w	r5, r1, r4
    39aa:	e8c2 5fe6 	stlex	r6, r5, [r2]
    39ae:	2e00      	cmp	r6, #0
    39b0:	d1f7      	bne.n	39a2 <compare_int_lock+0xa>

	nrf_rtc_int_disable(RTC, RTC_CHANNEL_INT_MASK(chan));
    39b2:	f44f 3280 	mov.w	r2, #65536	; 0x10000
    39b6:	4082      	lsls	r2, r0
    39b8:	4806      	ldr	r0, [pc, #24]	; (39d4 <compare_int_lock+0x3c>)
    39ba:	f8c0 2308 	str.w	r2, [r0, #776]	; 0x308
  __ASM volatile ("dmb 0xF":::"memory");
    39be:	f3bf 8f5f 	dmb	sy
  __ASM volatile ("isb 0xF":::"memory");
    39c2:	f3bf 8f6f 	isb	sy

	__DMB();
	__ISB();

	return prev & BIT(chan);
    39c6:	420b      	tst	r3, r1
}
    39c8:	bf14      	ite	ne
    39ca:	2001      	movne	r0, #1
    39cc:	2000      	moveq	r0, #0
    39ce:	bd70      	pop	{r4, r5, r6, pc}
    39d0:	2000e050 	.word	0x2000e050
    39d4:	50015000 	.word	0x50015000

000039d8 <sys_clock_timeout_handler>:
}

static void sys_clock_timeout_handler(int32_t chan,
				      uint64_t expire_time,
				      void *user_data)
{
    39d8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
	uint32_t cc_value = absolute_time_to_cc(expire_time);
	uint64_t dticks = (expire_time - last_count) / CYC_PER_TICK;
    39da:	491b      	ldr	r1, [pc, #108]	; (3a48 <sys_clock_timeout_handler+0x70>)
{
    39dc:	4604      	mov	r4, r0
	return absolute_time & COUNTER_MAX;
    39de:	f022 457f 	bic.w	r5, r2, #4278190080	; 0xff000000
	uint64_t dticks = (expire_time - last_count) / CYC_PER_TICK;
    39e2:	6808      	ldr	r0, [r1, #0]

	last_count += dticks * CYC_PER_TICK;
    39e4:	e9c1 2300 	strd	r2, r3, [r1]
	return (cc_value >= ANCHOR_RANGE_START) && (cc_value < ANCHOR_RANGE_END);
    39e8:	f5a5 1300 	sub.w	r3, r5, #2097152	; 0x200000
	uint64_t dticks = (expire_time - last_count) / CYC_PER_TICK;
    39ec:	1a10      	subs	r0, r2, r0
	if (in_anchor_range(cc_value)) {
    39ee:	f5b3 0f40 	cmp.w	r3, #12582912	; 0xc00000
    39f2:	d30f      	bcc.n	3a14 <sys_clock_timeout_handler+0x3c>
		 */
		compare_set(chan, last_count + CYC_PER_TICK,
					  sys_clock_timeout_handler, NULL);
	}

	sys_clock_announce(IS_ENABLED(CONFIG_TICKLESS_KERNEL) ?
    39f4:	f001 fcd0 	bl	5398 <sys_clock_announce>
    return p_reg->CC[ch];
    39f8:	00a3      	lsls	r3, r4, #2
    39fa:	f103 2350 	add.w	r3, r3, #1342197760	; 0x50005000
    39fe:	f503 3380 	add.w	r3, r3, #65536	; 0x10000
    3a02:	f8d3 2540 	ldr.w	r2, [r3, #1344]	; 0x540
			   (int32_t)dticks : (dticks > 0));

	if (cc_value == get_comparator(chan)) {
    3a06:	4295      	cmp	r5, r2
    3a08:	d11d      	bne.n	3a46 <sys_clock_timeout_handler+0x6e>
    p_reg->CC[ch] = cc_val;
    3a0a:	f44f 0200 	mov.w	r2, #8388608	; 0x800000
    3a0e:	f8c3 2540 	str.w	r2, [r3, #1344]	; 0x540
}
    3a12:	e012      	b.n	3a3a <sys_clock_timeout_handler+0x62>
		anchor = (((uint64_t)overflow_cnt) << COUNTER_BIT_WIDTH) + cc_value;
    3a14:	4b0d      	ldr	r3, [pc, #52]	; (3a4c <sys_clock_timeout_handler+0x74>)
    3a16:	681b      	ldr	r3, [r3, #0]
    3a18:	0a1a      	lsrs	r2, r3, #8
    3a1a:	061b      	lsls	r3, r3, #24
    3a1c:	195e      	adds	r6, r3, r5
    3a1e:	4b0c      	ldr	r3, [pc, #48]	; (3a50 <sys_clock_timeout_handler+0x78>)
    3a20:	f142 0700 	adc.w	r7, r2, #0
    3a24:	e9c3 6700 	strd	r6, r7, [r3]
	sys_clock_announce(IS_ENABLED(CONFIG_TICKLESS_KERNEL) ?
    3a28:	f001 fcb6 	bl	5398 <sys_clock_announce>
    return p_reg->CC[ch];
    3a2c:	4a09      	ldr	r2, [pc, #36]	; (3a54 <sys_clock_timeout_handler+0x7c>)
    3a2e:	f504 73a8 	add.w	r3, r4, #336	; 0x150
    3a32:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
	if (cc_value == get_comparator(chan)) {
    3a36:	429d      	cmp	r5, r3
    3a38:	d105      	bne.n	3a46 <sys_clock_timeout_handler+0x6e>
	nrf_rtc_event_enable(RTC, RTC_CHANNEL_INT_MASK(chan));
    3a3a:	f44f 3380 	mov.w	r3, #65536	; 0x10000
    p_reg->EVTENSET = mask;
    3a3e:	4a05      	ldr	r2, [pc, #20]	; (3a54 <sys_clock_timeout_handler+0x7c>)
    3a40:	40a3      	lsls	r3, r4
    3a42:	f8c2 3344 	str.w	r3, [r2, #836]	; 0x344
		if (!anchor_updated) {
			set_comparator(chan, COUNTER_HALF_SPAN);
		}
		event_enable(chan);
	}
}
    3a46:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    3a48:	2000c658 	.word	0x2000c658
    3a4c:	2000e054 	.word	0x2000e054
    3a50:	2000c660 	.word	0x2000c660
    3a54:	50015000 	.word	0x50015000

00003a58 <compare_int_unlock>:
	if (key) {
    3a58:	b1d9      	cbz	r1, 3a92 <compare_int_unlock+0x3a>
		atomic_or(&int_mask, BIT(chan));
    3a5a:	2301      	movs	r3, #1
	return __atomic_fetch_or(target, value, __ATOMIC_SEQ_CST);
    3a5c:	4a0d      	ldr	r2, [pc, #52]	; (3a94 <compare_int_unlock+0x3c>)
    3a5e:	4083      	lsls	r3, r0
    3a60:	e8d2 cfef 	ldaex	ip, [r2]
    3a64:	ea4c 0c03 	orr.w	ip, ip, r3
    3a68:	e8c2 cfe1 	stlex	r1, ip, [r2]
    3a6c:	2900      	cmp	r1, #0
    3a6e:	d1f7      	bne.n	3a60 <compare_int_unlock+0x8>
		nrf_rtc_int_enable(RTC, RTC_CHANNEL_INT_MASK(chan));
    3a70:	f44f 3380 	mov.w	r3, #65536	; 0x10000
    p_reg->INTENSET = mask;
    3a74:	4a08      	ldr	r2, [pc, #32]	; (3a98 <compare_int_unlock+0x40>)
    3a76:	4083      	lsls	r3, r0
    3a78:	f8c2 3304 	str.w	r3, [r2, #772]	; 0x304
	return __atomic_load_n(target, __ATOMIC_SEQ_CST);
    3a7c:	4b07      	ldr	r3, [pc, #28]	; (3a9c <compare_int_unlock+0x44>)
    3a7e:	e8d3 3faf 	lda	r3, [r3]
		if (atomic_get(&force_isr_mask) & BIT(chan)) {
    3a82:	40c3      	lsrs	r3, r0
    3a84:	07db      	lsls	r3, r3, #31
    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    3a86:	bf42      	ittt	mi
    3a88:	f44f 1200 	movmi.w	r2, #2097152	; 0x200000
    3a8c:	4b04      	ldrmi	r3, [pc, #16]	; (3aa0 <compare_int_unlock+0x48>)
    3a8e:	f8c3 2100 	strmi.w	r2, [r3, #256]	; 0x100
}
    3a92:	4770      	bx	lr
    3a94:	2000e050 	.word	0x2000e050
    3a98:	50015000 	.word	0x50015000
    3a9c:	2000e04c 	.word	0x2000e04c
    3aa0:	e000e100 	.word	0xe000e100

00003aa4 <z_nrf_rtc_timer_read>:
	uint64_t val = ((uint64_t)overflow_cnt) << COUNTER_BIT_WIDTH;
    3aa4:	4b0d      	ldr	r3, [pc, #52]	; (3adc <z_nrf_rtc_timer_read+0x38>)
    3aa6:	6818      	ldr	r0, [r3, #0]
    3aa8:	0a01      	lsrs	r1, r0, #8
    3aaa:	0600      	lsls	r0, r0, #24
  __ASM volatile ("dmb 0xF":::"memory");
    3aac:	f3bf 8f5f 	dmb	sy
     return p_reg->COUNTER;
    3ab0:	4b0b      	ldr	r3, [pc, #44]	; (3ae0 <z_nrf_rtc_timer_read+0x3c>)
    3ab2:	f8d3 3504 	ldr.w	r3, [r3, #1284]	; 0x504
	val += cntr;
    3ab6:	1818      	adds	r0, r3, r0
    3ab8:	f141 0100 	adc.w	r1, r1, #0
	if (cntr < OVERFLOW_RISK_RANGE_END) {
    3abc:	f5b3 1f80 	cmp.w	r3, #1048576	; 0x100000
    3ac0:	d20a      	bcs.n	3ad8 <z_nrf_rtc_timer_read+0x34>
		if (val < anchor) {
    3ac2:	4b08      	ldr	r3, [pc, #32]	; (3ae4 <z_nrf_rtc_timer_read+0x40>)
    3ac4:	e9d3 2300 	ldrd	r2, r3, [r3]
    3ac8:	4290      	cmp	r0, r2
    3aca:	eb71 0303 	sbcs.w	r3, r1, r3
    3ace:	d203      	bcs.n	3ad8 <z_nrf_rtc_timer_read+0x34>
			val += COUNTER_SPAN;
    3ad0:	f110 7080 	adds.w	r0, r0, #16777216	; 0x1000000
    3ad4:	f141 0100 	adc.w	r1, r1, #0
}
    3ad8:	4770      	bx	lr
    3ada:	bf00      	nop
    3adc:	2000e054 	.word	0x2000e054
    3ae0:	50015000 	.word	0x50015000
    3ae4:	2000c660 	.word	0x2000c660

00003ae8 <compare_set>:
{
    3ae8:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
    3aec:	4614      	mov	r4, r2
    3aee:	461d      	mov	r5, r3
    3af0:	4607      	mov	r7, r0
	key = compare_int_lock(chan);
    3af2:	f7ff ff51 	bl	3998 <compare_int_lock>
    3af6:	9000      	str	r0, [sp, #0]
	uint64_t curr_time = z_nrf_rtc_timer_read();
    3af8:	f7ff ffd4 	bl	3aa4 <z_nrf_rtc_timer_read>
	if (curr_time < target_time) {
    3afc:	42a0      	cmp	r0, r4
    3afe:	eb71 0305 	sbcs.w	r3, r1, r5
    3b02:	d27a      	bcs.n	3bfa <compare_set+0x112>
		if (target_time - curr_time > COUNTER_SPAN) {
    3b04:	4b44      	ldr	r3, [pc, #272]	; (3c18 <compare_set+0x130>)
    3b06:	1a20      	subs	r0, r4, r0
    3b08:	eb65 0101 	sbc.w	r1, r5, r1
    3b0c:	4298      	cmp	r0, r3
    3b0e:	f171 0100 	sbcs.w	r1, r1, #0
    3b12:	d27d      	bcs.n	3c10 <compare_set+0x128>
		if (target_time != cc_data[chan].target_time) {
    3b14:	4b41      	ldr	r3, [pc, #260]	; (3c1c <compare_set+0x134>)
    3b16:	eb03 1307 	add.w	r3, r3, r7, lsl #4
    3b1a:	e9d3 2302 	ldrd	r2, r3, [r3, #8]
    3b1e:	429d      	cmp	r5, r3
    3b20:	bf08      	it	eq
    3b22:	4294      	cmpeq	r4, r2
    3b24:	d054      	beq.n	3bd0 <compare_set+0xe8>
	nrf_rtc_event_enable(RTC, RTC_CHANNEL_INT_MASK(chan));
    3b26:	f44f 3380 	mov.w	r3, #65536	; 0x10000
	return absolute_time & COUNTER_MAX;
    3b2a:	f024 4b7f 	bic.w	fp, r4, #4278190080	; 0xff000000
	uint32_t cc_val = abs_val & COUNTER_MAX;
    3b2e:	465e      	mov	r6, fp
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    3b30:	2100      	movs	r1, #0
    3b32:	ea4f 0987 	mov.w	r9, r7, lsl #2
	nrf_rtc_event_clear(RTC, RTC_CHANNEL_EVENT_ADDR(chan));
    3b36:	f107 0850 	add.w	r8, r7, #80	; 0x50
    3b3a:	f109 2950 	add.w	r9, r9, #1342197760	; 0x50005000
    3b3e:	ea4f 0888 	mov.w	r8, r8, lsl #2
	nrf_rtc_event_enable(RTC, RTC_CHANNEL_INT_MASK(chan));
    3b42:	40bb      	lsls	r3, r7
    3b44:	f509 3980 	add.w	r9, r9, #65536	; 0x10000
    3b48:	fa1f f888 	uxth.w	r8, r8
    3b4c:	f108 2850 	add.w	r8, r8, #1342197760	; 0x50005000
    3b50:	9301      	str	r3, [sp, #4]
    return p_reg->CC[ch];
    3b52:	f8d9 0540 	ldr.w	r0, [r9, #1344]	; 0x540
     return p_reg->COUNTER;
    3b56:	4b32      	ldr	r3, [pc, #200]	; (3c20 <compare_set+0x138>)
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    3b58:	f508 3880 	add.w	r8, r8, #65536	; 0x10000
     return p_reg->COUNTER;
    3b5c:	f8d3 a504 	ldr.w	sl, [r3, #1284]	; 0x504
	return (a - b) & COUNTER_MAX;
    3b60:	eba0 000a 	sub.w	r0, r0, sl
    3b64:	f020 407f 	bic.w	r0, r0, #4278190080	; 0xff000000
	nrf_rtc_cc_set(RTC, chan, cyc & COUNTER_MAX);
    3b68:	f02a 427f 	bic.w	r2, sl, #4278190080	; 0xff000000
		if (counter_sub(prev_cc, now) == 1) {
    3b6c:	2801      	cmp	r0, #1
    p_reg->CC[ch] = cc_val;
    3b6e:	f8c9 2540 	str.w	r2, [r9, #1344]	; 0x540
    3b72:	d104      	bne.n	3b7e <compare_set+0x96>
    3b74:	2013      	movs	r0, #19
    3b76:	f004 fd77 	bl	8668 <z_impl_k_busy_wait>
    3b7a:	2100      	movs	r1, #0
    3b7c:	4b28      	ldr	r3, [pc, #160]	; (3c20 <compare_set+0x138>)
		if (counter_sub(cc_val, now + 2) > COUNTER_HALF_SPAN) {
    3b7e:	f10a 0c02 	add.w	ip, sl, #2
	return (a - b) & COUNTER_MAX;
    3b82:	eba6 000c 	sub.w	r0, r6, ip
    3b86:	f020 407f 	bic.w	r0, r0, #4278190080	; 0xff000000
			cc_val = now + 2;
    3b8a:	f5b0 0f00 	cmp.w	r0, #8388608	; 0x800000
    3b8e:	bf88      	it	hi
    3b90:	4666      	movhi	r6, ip
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    3b92:	f8c8 1000 	str.w	r1, [r8]
    p_reg->EVTENSET = mask;
    3b96:	9a01      	ldr	r2, [sp, #4]
    3b98:	f8d8 0000 	ldr.w	r0, [r8]
	nrf_rtc_cc_set(RTC, chan, cyc & COUNTER_MAX);
    3b9c:	f026 407f 	bic.w	r0, r6, #4278190080	; 0xff000000
    3ba0:	f8c3 2344 	str.w	r2, [r3, #836]	; 0x344
    p_reg->CC[ch] = cc_val;
    3ba4:	f8c9 0540 	str.w	r0, [r9, #1344]	; 0x540
     return p_reg->COUNTER;
    3ba8:	f8d3 0504 	ldr.w	r0, [r3, #1284]	; 0x504
	} while ((now2 != now) &&
    3bac:	4582      	cmp	sl, r0
    3bae:	d006      	beq.n	3bbe <compare_set+0xd6>
	return (a - b) & COUNTER_MAX;
    3bb0:	1a30      	subs	r0, r6, r0
    3bb2:	3802      	subs	r0, #2
    3bb4:	f020 407f 	bic.w	r0, r0, #4278190080	; 0xff000000
	} while ((now2 != now) &&
    3bb8:	f5b0 0f00 	cmp.w	r0, #8388608	; 0x800000
    3bbc:	d81b      	bhi.n	3bf6 <compare_set+0x10e>
	return (a - b) & COUNTER_MAX;
    3bbe:	eba6 060b 	sub.w	r6, r6, fp
    3bc2:	f026 467f 	bic.w	r6, r6, #4278190080	; 0xff000000
			target_time += counter_sub(cc_set, cc_value);
    3bc6:	1936      	adds	r6, r6, r4
    3bc8:	f145 0300 	adc.w	r3, r5, #0
    3bcc:	4634      	mov	r4, r6
    3bce:	461d      	mov	r5, r3
	cc_data[chan].target_time = target_time;
    3bd0:	4912      	ldr	r1, [pc, #72]	; (3c1c <compare_set+0x134>)
	cc_data[chan].callback = handler;
    3bd2:	980c      	ldr	r0, [sp, #48]	; 0x30
	cc_data[chan].target_time = target_time;
    3bd4:	eb01 1207 	add.w	r2, r1, r7, lsl #4
    3bd8:	e9c2 4502 	strd	r4, r5, [r2, #8]
	return ret;
    3bdc:	2400      	movs	r4, #0
	cc_data[chan].target_time = target_time;
    3bde:	013b      	lsls	r3, r7, #4
	cc_data[chan].callback = handler;
    3be0:	50c8      	str	r0, [r1, r3]
	cc_data[chan].user_context = user_data;
    3be2:	9b0d      	ldr	r3, [sp, #52]	; 0x34
    3be4:	6053      	str	r3, [r2, #4]
	compare_int_unlock(chan, key);
    3be6:	4638      	mov	r0, r7
    3be8:	9900      	ldr	r1, [sp, #0]
    3bea:	f7ff ff35 	bl	3a58 <compare_int_unlock>
}
    3bee:	4620      	mov	r0, r4
    3bf0:	b003      	add	sp, #12
    3bf2:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    3bf6:	4630      	mov	r0, r6
    3bf8:	e7b0      	b.n	3b5c <compare_set+0x74>
		atomic_or(&force_isr_mask, BIT(chan));
    3bfa:	2301      	movs	r3, #1
	return __atomic_fetch_or(target, value, __ATOMIC_SEQ_CST);
    3bfc:	4a09      	ldr	r2, [pc, #36]	; (3c24 <compare_set+0x13c>)
    3bfe:	40bb      	lsls	r3, r7
    3c00:	e8d2 0fef 	ldaex	r0, [r2]
    3c04:	4318      	orrs	r0, r3
    3c06:	e8c2 0fe1 	stlex	r1, r0, [r2]
    3c0a:	2900      	cmp	r1, #0
    3c0c:	d0e0      	beq.n	3bd0 <compare_set+0xe8>
    3c0e:	e7f7      	b.n	3c00 <compare_set+0x118>
			return -EINVAL;
    3c10:	f06f 0415 	mvn.w	r4, #21
    3c14:	e7e7      	b.n	3be6 <compare_set+0xfe>
    3c16:	bf00      	nop
    3c18:	01000001 	.word	0x01000001
    3c1c:	2000c648 	.word	0x2000c648
    3c20:	50015000 	.word	0x50015000
    3c24:	2000e04c 	.word	0x2000e04c

00003c28 <sys_clock_driver_init>:
{
	return (uint32_t)z_nrf_rtc_timer_read();
}

static int sys_clock_driver_init(const struct device *dev)
{
    3c28:	b573      	push	{r0, r1, r4, r5, r6, lr}
    p_reg->PRESCALER = val;
    3c2a:	2400      	movs	r4, #0
			CLOCK_CONTROL_NRF_LF_START_STABLE);

	/* TODO: replace with counter driver to access RTC */
	nrf_rtc_prescaler_set(RTC, 0);
	for (int32_t chan = 0; chan < CHAN_COUNT; chan++) {
		cc_data[chan].target_time = TARGET_TIME_INVALID;
    3c2c:	f04f 30ff 	mov.w	r0, #4294967295
    3c30:	f04f 31ff 	mov.w	r1, #4294967295
    3c34:	4d16      	ldr	r5, [pc, #88]	; (3c90 <sys_clock_driver_init+0x68>)
    3c36:	4b17      	ldr	r3, [pc, #92]	; (3c94 <sys_clock_driver_init+0x6c>)
    3c38:	f8c5 4508 	str.w	r4, [r5, #1288]	; 0x508
    3c3c:	e9c3 0102 	strd	r0, r1, [r3, #8]
    p_reg->INTENSET = mask;
    3c40:	f44f 3380 	mov.w	r3, #65536	; 0x10000
    3c44:	2602      	movs	r6, #2
    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    3c46:	f44f 1200 	mov.w	r2, #2097152	; 0x200000
    3c4a:	f8c5 3304 	str.w	r3, [r5, #772]	; 0x304
    3c4e:	4b12      	ldr	r3, [pc, #72]	; (3c98 <sys_clock_driver_init+0x70>)

	nrf_rtc_int_enable(RTC, NRF_RTC_INT_OVERFLOW_MASK);

	NVIC_ClearPendingIRQ(RTC_IRQn);

	IRQ_CONNECT(RTC_IRQn, DT_IRQ(DT_NODELABEL(RTC_LABEL), priority),
    3c50:	2101      	movs	r1, #1
    3c52:	f8c5 6304 	str.w	r6, [r5, #772]	; 0x304
    3c56:	2015      	movs	r0, #21
    3c58:	f8c3 2180 	str.w	r2, [r3, #384]	; 0x180
    3c5c:	4622      	mov	r2, r4
    3c5e:	f7fe ff05 	bl	2a6c <z_arm_irq_priority_set>
		    rtc_nrf_isr, 0, 0);
	irq_enable(RTC_IRQn);
    3c62:	2015      	movs	r0, #21
    3c64:	f7fe fee6 	bl	2a34 <arch_irq_enable>
    *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
    3c68:	2301      	movs	r3, #1

	nrf_rtc_task_trigger(RTC, NRF_RTC_TASK_CLEAR);
	nrf_rtc_task_trigger(RTC, NRF_RTC_TASK_START);

	int_mask = BIT_MASK(CHAN_COUNT);
    3c6a:	4a0c      	ldr	r2, [pc, #48]	; (3c9c <sys_clock_driver_init+0x74>)
    3c6c:	60ab      	str	r3, [r5, #8]
    3c6e:	602b      	str	r3, [r5, #0]
    3c70:	6013      	str	r3, [r2, #0]

	uint32_t initial_timeout = IS_ENABLED(CONFIG_TICKLESS_KERNEL) ?
		(COUNTER_HALF_SPAN - 1) :
		(counter() + CYC_PER_TICK);

	compare_set(0, initial_timeout, sys_clock_timeout_handler, NULL);
    3c72:	4b0b      	ldr	r3, [pc, #44]	; (3ca0 <sys_clock_driver_init+0x78>)
    3c74:	4a0b      	ldr	r2, [pc, #44]	; (3ca4 <sys_clock_driver_init+0x7c>)
    3c76:	9300      	str	r3, [sp, #0]
    3c78:	4620      	mov	r0, r4
    3c7a:	2300      	movs	r3, #0
    3c7c:	9401      	str	r4, [sp, #4]
    3c7e:	f7ff ff33 	bl	3ae8 <compare_set>

	z_nrf_clock_control_lf_on(mode);
    3c82:	4630      	mov	r0, r6
    3c84:	f7ff fad4 	bl	3230 <z_nrf_clock_control_lf_on>

	return 0;
}
    3c88:	4620      	mov	r0, r4
    3c8a:	b002      	add	sp, #8
    3c8c:	bd70      	pop	{r4, r5, r6, pc}
    3c8e:	bf00      	nop
    3c90:	50015000 	.word	0x50015000
    3c94:	2000c648 	.word	0x2000c648
    3c98:	e000e100 	.word	0xe000e100
    3c9c:	2000e050 	.word	0x2000e050
    3ca0:	000039d9 	.word	0x000039d9
    3ca4:	007fffff 	.word	0x007fffff

00003ca8 <rtc_nrf_isr>:
{
    3ca8:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
    return p_reg->INTENSET & mask;
    3cac:	4b31      	ldr	r3, [pc, #196]	; (3d74 <rtc_nrf_isr+0xcc>)
    3cae:	f8d3 2304 	ldr.w	r2, [r3, #772]	; 0x304
	if (nrf_rtc_int_enable_check(RTC, NRF_RTC_INT_OVERFLOW_MASK) &&
    3cb2:	0792      	lsls	r2, r2, #30
    3cb4:	d50b      	bpl.n	3cce <rtc_nrf_isr+0x26>
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    3cb6:	f8d3 2104 	ldr.w	r2, [r3, #260]	; 0x104
    3cba:	b142      	cbz	r2, 3cce <rtc_nrf_isr+0x26>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    3cbc:	2200      	movs	r2, #0
    3cbe:	f8c3 2104 	str.w	r2, [r3, #260]	; 0x104
		overflow_cnt++;
    3cc2:	4a2d      	ldr	r2, [pc, #180]	; (3d78 <rtc_nrf_isr+0xd0>)
    3cc4:	f8d3 3104 	ldr.w	r3, [r3, #260]	; 0x104
    3cc8:	6813      	ldr	r3, [r2, #0]
    3cca:	3301      	adds	r3, #1
    3ccc:	6013      	str	r3, [r2, #0]
	__asm__ volatile(
    3cce:	f04f 0320 	mov.w	r3, #32
    3cd2:	f3ef 8211 	mrs	r2, BASEPRI
    3cd6:	f383 8812 	msr	BASEPRI_MAX, r3
    3cda:	f3bf 8f6f 	isb	sy
    return p_reg->INTENSET & mask;
    3cde:	4c25      	ldr	r4, [pc, #148]	; (3d74 <rtc_nrf_isr+0xcc>)
    3ce0:	f8d4 3304 	ldr.w	r3, [r4, #772]	; 0x304
	if (nrf_rtc_int_enable_check(RTC, RTC_CHANNEL_INT_MASK(chan))) {
    3ce4:	03db      	lsls	r3, r3, #15
    3ce6:	d525      	bpl.n	3d34 <rtc_nrf_isr+0x8c>
	return __atomic_fetch_and(target, value, __ATOMIC_SEQ_CST);
    3ce8:	4b24      	ldr	r3, [pc, #144]	; (3d7c <rtc_nrf_isr+0xd4>)
    3cea:	e8d3 1fef 	ldaex	r1, [r3]
    3cee:	f021 0001 	bic.w	r0, r1, #1
    3cf2:	e8c3 0fe5 	stlex	r5, r0, [r3]
    3cf6:	2d00      	cmp	r5, #0
    3cf8:	d1f7      	bne.n	3cea <rtc_nrf_isr+0x42>
		result = atomic_and(&force_isr_mask, ~BIT(chan)) ||
    3cfa:	b911      	cbnz	r1, 3d02 <rtc_nrf_isr+0x5a>
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    3cfc:	f8d4 3140 	ldr.w	r3, [r4, #320]	; 0x140
    3d00:	b1c3      	cbz	r3, 3d34 <rtc_nrf_isr+0x8c>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    3d02:	2500      	movs	r5, #0
    3d04:	f8c4 5140 	str.w	r5, [r4, #320]	; 0x140
    3d08:	f8d4 3140 	ldr.w	r3, [r4, #320]	; 0x140
	__asm__ volatile(
    3d0c:	f382 8811 	msr	BASEPRI, r2
    3d10:	f3bf 8f6f 	isb	sy
		curr_time = z_nrf_rtc_timer_read();
    3d14:	f7ff fec6 	bl	3aa4 <z_nrf_rtc_timer_read>
	__asm__ volatile(
    3d18:	f04f 0320 	mov.w	r3, #32
    3d1c:	f3ef 8211 	mrs	r2, BASEPRI
    3d20:	f383 8812 	msr	BASEPRI_MAX, r3
    3d24:	f3bf 8f6f 	isb	sy
		expire_time = cc_data[chan].target_time;
    3d28:	4b15      	ldr	r3, [pc, #84]	; (3d80 <rtc_nrf_isr+0xd8>)
    3d2a:	e9d3 6702 	ldrd	r6, r7, [r3, #8]
		if (curr_time >= expire_time) {
    3d2e:	42b0      	cmp	r0, r6
    3d30:	41b9      	sbcs	r1, r7
    3d32:	d206      	bcs.n	3d42 <rtc_nrf_isr+0x9a>
	__asm__ volatile(
    3d34:	f382 8811 	msr	BASEPRI, r2
    3d38:	f3bf 8f6f 	isb	sy
}
    3d3c:	b003      	add	sp, #12
    3d3e:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
			cc_data[chan].target_time = TARGET_TIME_INVALID;
    3d42:	f04f 38ff 	mov.w	r8, #4294967295
			user_context = cc_data[chan].user_context;
    3d46:	e9d3 1000 	ldrd	r1, r0, [r3]
			cc_data[chan].target_time = TARGET_TIME_INVALID;
    3d4a:	f04f 39ff 	mov.w	r9, #4294967295
			cc_data[chan].callback = NULL;
    3d4e:	601d      	str	r5, [r3, #0]
			cc_data[chan].target_time = TARGET_TIME_INVALID;
    3d50:	e9c3 8902 	strd	r8, r9, [r3, #8]
    p_reg->EVTENCLR = mask;
    3d54:	f44f 3380 	mov.w	r3, #65536	; 0x10000
    3d58:	f8c4 3348 	str.w	r3, [r4, #840]	; 0x348
    3d5c:	f382 8811 	msr	BASEPRI, r2
    3d60:	f3bf 8f6f 	isb	sy
		if (handler) {
    3d64:	2900      	cmp	r1, #0
    3d66:	d0e9      	beq.n	3d3c <rtc_nrf_isr+0x94>
			handler(chan, expire_time, user_context);
    3d68:	9000      	str	r0, [sp, #0]
    3d6a:	4632      	mov	r2, r6
    3d6c:	463b      	mov	r3, r7
    3d6e:	4628      	mov	r0, r5
    3d70:	4788      	blx	r1
}
    3d72:	e7e3      	b.n	3d3c <rtc_nrf_isr+0x94>
    3d74:	50015000 	.word	0x50015000
    3d78:	2000e054 	.word	0x2000e054
    3d7c:	2000e04c 	.word	0x2000e04c
    3d80:	2000c648 	.word	0x2000c648

00003d84 <sys_clock_set_timeout>:
	ticks = (ticks == K_TICKS_FOREVER) ? MAX_TICKS : ticks;
    3d84:	1c43      	adds	r3, r0, #1
{
    3d86:	b513      	push	{r0, r1, r4, lr}
	ticks = (ticks == K_TICKS_FOREVER) ? MAX_TICKS : ticks;
    3d88:	d020      	beq.n	3dcc <sys_clock_set_timeout+0x48>
	ticks = CLAMP(ticks - 1, 0, (int32_t)MAX_TICKS);
    3d8a:	2801      	cmp	r0, #1
    3d8c:	dd20      	ble.n	3dd0 <sys_clock_set_timeout+0x4c>
    3d8e:	f5b0 0f00 	cmp.w	r0, #8388608	; 0x800000
    3d92:	da1f      	bge.n	3dd4 <sys_clock_set_timeout+0x50>
    3d94:	1e44      	subs	r4, r0, #1
	uint32_t unannounced = z_nrf_rtc_timer_read() - last_count;
    3d96:	f7ff fe85 	bl	3aa4 <z_nrf_rtc_timer_read>
    3d9a:	4b0f      	ldr	r3, [pc, #60]	; (3dd8 <sys_clock_set_timeout+0x54>)
    3d9c:	e9d3 1300 	ldrd	r1, r3, [r3]
    3da0:	1a42      	subs	r2, r0, r1
		ticks = 0;
    3da2:	f5b2 0f00 	cmp.w	r2, #8388608	; 0x800000
    3da6:	bf28      	it	cs
    3da8:	2400      	movcs	r4, #0
	if (cyc > MAX_CYCLES) {
    3daa:	480c      	ldr	r0, [pc, #48]	; (3ddc <sys_clock_set_timeout+0x58>)
	cyc = ticks * CYC_PER_TICK + 1 + unannounced;
    3dac:	3201      	adds	r2, #1
    3dae:	4422      	add	r2, r4
	if (cyc > MAX_CYCLES) {
    3db0:	4282      	cmp	r2, r0
    3db2:	bf28      	it	cs
    3db4:	4602      	movcs	r2, r0
	uint64_t target_time = cyc + last_count;
    3db6:	2000      	movs	r0, #0
    3db8:	1852      	adds	r2, r2, r1
	compare_set(0, target_time, sys_clock_timeout_handler, NULL);
    3dba:	4909      	ldr	r1, [pc, #36]	; (3de0 <sys_clock_set_timeout+0x5c>)
    3dbc:	9001      	str	r0, [sp, #4]
    3dbe:	9100      	str	r1, [sp, #0]
    3dc0:	f143 0300 	adc.w	r3, r3, #0
    3dc4:	f7ff fe90 	bl	3ae8 <compare_set>
}
    3dc8:	b002      	add	sp, #8
    3dca:	bd10      	pop	{r4, pc}
	ticks = (ticks == K_TICKS_FOREVER) ? MAX_TICKS : ticks;
    3dcc:	4803      	ldr	r0, [pc, #12]	; (3ddc <sys_clock_set_timeout+0x58>)
    3dce:	e7e1      	b.n	3d94 <sys_clock_set_timeout+0x10>
	ticks = CLAMP(ticks - 1, 0, (int32_t)MAX_TICKS);
    3dd0:	2400      	movs	r4, #0
    3dd2:	e7e0      	b.n	3d96 <sys_clock_set_timeout+0x12>
    3dd4:	4c01      	ldr	r4, [pc, #4]	; (3ddc <sys_clock_set_timeout+0x58>)
    3dd6:	e7de      	b.n	3d96 <sys_clock_set_timeout+0x12>
    3dd8:	2000c658 	.word	0x2000c658
    3ddc:	007fffff 	.word	0x007fffff
    3de0:	000039d9 	.word	0x000039d9

00003de4 <sys_clock_elapsed>:
{
    3de4:	b508      	push	{r3, lr}
	return (z_nrf_rtc_timer_read() - last_count) / CYC_PER_TICK;
    3de6:	f7ff fe5d 	bl	3aa4 <z_nrf_rtc_timer_read>
    3dea:	4b02      	ldr	r3, [pc, #8]	; (3df4 <sys_clock_elapsed+0x10>)
    3dec:	681b      	ldr	r3, [r3, #0]
}
    3dee:	1ac0      	subs	r0, r0, r3
    3df0:	bd08      	pop	{r3, pc}
    3df2:	bf00      	nop
    3df4:	2000c658 	.word	0x2000c658

00003df8 <pinctrl_configure_pins>:
#define NRF_PSEL_QSPI(reg, line) ((NRF_QSPI_Type *)reg)->PSEL.line
#endif

int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
			   uintptr_t reg)
{
    3df8:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    nrf_gpio_port_out_set(reg, 1UL << pin_number);
    3dfc:	2701      	movs	r7, #1
    p_reg->OUTSET = set_mask;
    3dfe:	4e3f      	ldr	r6, [pc, #252]	; (3efc <pinctrl_configure_pins+0x104>)
    3e00:	eb00 0181 	add.w	r1, r0, r1, lsl #2
	for (uint8_t i = 0U; i < pin_cnt; i++) {
    3e04:	4281      	cmp	r1, r0
    3e06:	d102      	bne.n	3e0e <pinctrl_configure_pins+0x16>
			nrf_gpio_cfg(pin, dir, input, NRF_GET_PULL(pins[i]),
				     drive, NRF_GPIO_PIN_NOSENSE);
		}
	}

	return 0;
    3e08:	2000      	movs	r0, #0
}
    3e0a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
		nrf_gpio_pin_drive_t drive = NRF_GET_DRIVE(pins[i]);
    3e0e:	6805      	ldr	r5, [r0, #0]
		uint32_t pin = NRF_GET_PIN(pins[i]);
    3e10:	f005 037f 	and.w	r3, r5, #127	; 0x7f
		nrf_gpio_pin_drive_t drive = NRF_GET_DRIVE(pins[i]);
    3e14:	f3c5 2443 	ubfx	r4, r5, #9, #4
			pin = 0xFFFFFFFFU;
    3e18:	2b7f      	cmp	r3, #127	; 0x7f
		switch (NRF_GET_FUN(pins[i])) {
    3e1a:	ea4f 4515 	mov.w	r5, r5, lsr #16
			pin = 0xFFFFFFFFU;
    3e1e:	bf08      	it	eq
    3e20:	f04f 33ff 	moveq.w	r3, #4294967295
		switch (NRF_GET_FUN(pins[i])) {
    3e24:	2d19      	cmp	r5, #25
    3e26:	d866      	bhi.n	3ef6 <pinctrl_configure_pins+0xfe>
    3e28:	e8df f005 	tbb	[pc, r5]
    3e2c:	1e1b160d 	.word	0x1e1b160d
    3e30:	651e2d21 	.word	0x651e2d21
    3e34:	31656565 	.word	0x31656565
    3e38:	65656551 	.word	0x65656551
    3e3c:	65656565 	.word	0x65656565
    3e40:	5c546565 	.word	0x5c546565
    3e44:	625f      	.short	0x625f
			NRF_PSEL_UART(reg, TXD) = pin;
    3e46:	f8c2 350c 	str.w	r3, [r2, #1292]	; 0x50c
    *p_pin = pin_number & 0x1F;
    3e4a:	f003 051f 	and.w	r5, r3, #31
    nrf_gpio_port_out_set(reg, 1UL << pin_number);
    3e4e:	fa07 f505 	lsl.w	r5, r7, r5
    p_reg->OUTSET = set_mask;
    3e52:	60b5      	str	r5, [r6, #8]
}
    3e54:	2501      	movs	r5, #1
    3e56:	e002      	b.n	3e5e <pinctrl_configure_pins+0x66>
			NRF_PSEL_UART(reg, RXD) = pin;
    3e58:	f8c2 3514 	str.w	r3, [r2, #1300]	; 0x514
			input = NRF_GPIO_PIN_INPUT_CONNECT;
    3e5c:	2500      	movs	r5, #0
    3e5e:	46ac      	mov	ip, r5
    3e60:	e01c      	b.n	3e9c <pinctrl_configure_pins+0xa4>
			NRF_PSEL_UART(reg, RTS) = pin;
    3e62:	f8c2 3508 	str.w	r3, [r2, #1288]	; 0x508
			if (write != NO_WRITE) {
    3e66:	e7f0      	b.n	3e4a <pinctrl_configure_pins+0x52>
			NRF_PSEL_UART(reg, CTS) = pin;
    3e68:	f8c2 3510 	str.w	r3, [r2, #1296]	; 0x510
			if (write != NO_WRITE) {
    3e6c:	e7f6      	b.n	3e5c <pinctrl_configure_pins+0x64>
			input = NRF_GPIO_PIN_INPUT_CONNECT;
    3e6e:	2500      	movs	r5, #0
			NRF_PSEL_SPIM(reg, SCK) = pin;
    3e70:	f8c2 3508 	str.w	r3, [r2, #1288]	; 0x508
    *p_pin = pin_number & 0x1F;
    3e74:	f003 0c1f 	and.w	ip, r3, #31
    nrf_gpio_port_out_clear(reg, 1UL << pin_number);
    3e78:	fa07 fc0c 	lsl.w	ip, r7, ip
    p_reg->OUTCLR = clr_mask;
    3e7c:	f8c6 c00c 	str.w	ip, [r6, #12]
}
    3e80:	f04f 0c01 	mov.w	ip, #1
    3e84:	e00a      	b.n	3e9c <pinctrl_configure_pins+0xa4>
			NRF_PSEL_SPIM(reg, MOSI) = pin;
    3e86:	f8c2 350c 	str.w	r3, [r2, #1292]	; 0x50c
			pin = 0xFFFFFFFFU;
    3e8a:	2501      	movs	r5, #1
    3e8c:	e7f2      	b.n	3e74 <pinctrl_configure_pins+0x7c>
			NRF_PSEL_TWIM(reg, SCL) = pin;
    3e8e:	f8c2 3508 	str.w	r3, [r2, #1288]	; 0x508
			if (drive == NRF_DRIVE_S0S1) {
    3e92:	2c00      	cmp	r4, #0
    3e94:	d1e2      	bne.n	3e5c <pinctrl_configure_pins+0x64>
			input = NRF_GPIO_PIN_INPUT_CONNECT;
    3e96:	2500      	movs	r5, #0
				drive = NRF_DRIVE_S0D1;
    3e98:	2406      	movs	r4, #6
			dir = NRF_GPIO_PIN_DIR_INPUT;
    3e9a:	46ac      	mov	ip, r5
			if (NRF_GET_LP(pins[i]) == NRF_LP_ENABLE) {
    3e9c:	f850 eb04 	ldr.w	lr, [r0], #4
           ((uint32_t)drive << GPIO_PIN_CNF_DRIVE_Pos) |
    3ea0:	0224      	lsls	r4, r4, #8
    3ea2:	f40e 5800 	and.w	r8, lr, #8192	; 0x2000
				input = NRF_GPIO_PIN_INPUT_DISCONNECT;
    3ea6:	f1b8 0f00 	cmp.w	r8, #0
    3eaa:	bf1c      	itt	ne
    3eac:	f04f 0c00 	movne.w	ip, #0
    3eb0:	2501      	movne	r5, #1
           ((uint32_t)pull << GPIO_PIN_CNF_PULL_Pos)   |
    3eb2:	f3ce 1ec1 	ubfx	lr, lr, #7, #2
    3eb6:	ea44 048e 	orr.w	r4, r4, lr, lsl #2
    *p_pin = pin_number & 0x1F;
    3eba:	f003 031f 	and.w	r3, r3, #31
           ((uint32_t)pull << GPIO_PIN_CNF_PULL_Pos)   |
    3ebe:	ea44 040c 	orr.w	r4, r4, ip
    3ec2:	ea44 0445 	orr.w	r4, r4, r5, lsl #1
    reg->PIN_CNF[pin_number] = cnf;
    3ec6:	3380      	adds	r3, #128	; 0x80
    3ec8:	f846 4023 	str.w	r4, [r6, r3, lsl #2]
	for (uint8_t i = 0U; i < pin_cnt; i++) {
    3ecc:	e79a      	b.n	3e04 <pinctrl_configure_pins+0xc>
			NRF_PSEL_TWIM(reg, SDA) = pin;
    3ece:	f8c2 350c 	str.w	r3, [r2, #1292]	; 0x50c
			if (drive == NRF_DRIVE_S0S1) {
    3ed2:	e7de      	b.n	3e92 <pinctrl_configure_pins+0x9a>
			NRF_PSEL_PWM(reg, OUT[0]) = pin;
    3ed4:	f8c2 3560 	str.w	r3, [r2, #1376]	; 0x560
			write = NRF_GET_INVERT(pins[i]);
    3ed8:	6805      	ldr	r5, [r0, #0]
    3eda:	f3c5 3580 	ubfx	r5, r5, #14, #1
    if (value == 0)
    3ede:	2d00      	cmp	r5, #0
    3ee0:	d0d3      	beq.n	3e8a <pinctrl_configure_pins+0x92>
    3ee2:	e7b2      	b.n	3e4a <pinctrl_configure_pins+0x52>
			NRF_PSEL_PWM(reg, OUT[1]) = pin;
    3ee4:	f8c2 3564 	str.w	r3, [r2, #1380]	; 0x564
			write = NRF_GET_INVERT(pins[i]);
    3ee8:	e7f6      	b.n	3ed8 <pinctrl_configure_pins+0xe0>
			NRF_PSEL_PWM(reg, OUT[2]) = pin;
    3eea:	f8c2 3568 	str.w	r3, [r2, #1384]	; 0x568
			write = NRF_GET_INVERT(pins[i]);
    3eee:	e7f3      	b.n	3ed8 <pinctrl_configure_pins+0xe0>
			NRF_PSEL_PWM(reg, OUT[3]) = pin;
    3ef0:	f8c2 356c 	str.w	r3, [r2, #1388]	; 0x56c
    3ef4:	e7f0      	b.n	3ed8 <pinctrl_configure_pins+0xe0>
		switch (NRF_GET_FUN(pins[i])) {
    3ef6:	f06f 0085 	mvn.w	r0, #133	; 0x85
    3efa:	e786      	b.n	3e0a <pinctrl_configure_pins+0x12>
    3efc:	50842500 	.word	0x50842500

00003f00 <k_sys_fatal_error_handler>:
	defined(CONFIG_SPM_SERVICE_NS_HANDLER_FROM_SPM_FAULT)
	z_spm_ns_fatal_error_handler();
#endif

	if (IS_ENABLED(CONFIG_RESET_ON_FATAL_ERROR)) {
		LOG_ERR("Resetting system");
    3f00:	4803      	ldr	r0, [pc, #12]	; (3f10 <k_sys_fatal_error_handler+0x10>)
    3f02:	2145      	movs	r1, #69	; 0x45
{
    3f04:	b508      	push	{r3, lr}
		LOG_ERR("Resetting system");
    3f06:	f001 ffd8 	bl	5eba <z_log_minimal_printk>
		sys_arch_reboot(0);
    3f0a:	2000      	movs	r0, #0
    3f0c:	f7ff f85a 	bl	2fc4 <sys_arch_reboot>
		for (;;) {
			/* Spin endlessly */
		}
	}

	CODE_UNREACHABLE;
    3f10:	00009aae 	.word	0x00009aae

00003f14 <boot_write_magic>:
    return rc;
}

int
boot_write_magic(const struct flash_area *fap)
{
    3f14:	b530      	push	{r4, r5, lr}
    return flash_area_get_size(fap) - BOOT_MAGIC_SZ;
    3f16:	6881      	ldr	r1, [r0, #8]
{
    3f18:	b085      	sub	sp, #20
    return flash_area_get_size(fap) - BOOT_MAGIC_SZ;
    3f1a:	3910      	subs	r1, #16
     * returned by boot_magic_off() is the start of magic which is not the
     * start of the flash write boundary and thus writes to the magic will fail.
     * To account for this change, write to magic is first padded with 0xFF
     * before writing to the trailer.
     */
    pad_off = ALIGN_DOWN(off, BOOT_MAX_ALIGN);
    3f1c:	f021 0407 	bic.w	r4, r1, #7
{
    3f20:	4605      	mov	r5, r0

    erased_val = flash_area_erased_val(fap);
    3f22:	f002 f81d 	bl	5f60 <flash_area_erased_val>

    memset(&magic[0], erased_val, sizeof(magic));
    3f26:	2210      	movs	r2, #16
    erased_val = flash_area_erased_val(fap);
    3f28:	4601      	mov	r1, r0
    memset(&magic[0], erased_val, sizeof(magic));
    3f2a:	4668      	mov	r0, sp
    3f2c:	f002 fb3f 	bl	65ae <memset>
    memcpy(&magic[BOOT_MAGIC_ALIGN_SIZE - BOOT_MAGIC_SZ], BOOT_IMG_MAGIC, BOOT_MAGIC_SZ);
    3f30:	2210      	movs	r2, #16
    3f32:	4668      	mov	r0, sp
    3f34:	4906      	ldr	r1, [pc, #24]	; (3f50 <boot_write_magic+0x3c>)
    3f36:	f002 fb2f 	bl	6598 <memcpy>

    BOOT_LOG_DBG("writing magic; fa_id=%d off=0x%lx (0x%lx)",
                 flash_area_get_id(fap), (unsigned long)off,
                 (unsigned long)(flash_area_get_off(fap) + off));
    rc = flash_area_write(fap, pad_off, &magic[0], BOOT_MAGIC_ALIGN_SIZE);
    3f3a:	2310      	movs	r3, #16
    3f3c:	466a      	mov	r2, sp
    3f3e:	4621      	mov	r1, r4
    3f40:	4628      	mov	r0, r5
    3f42:	f001 ffdd 	bl	5f00 <flash_area_write>
    if (rc != 0) {
        return BOOT_EFLASH;
    }

    return 0;
}
    3f46:	3800      	subs	r0, #0
    3f48:	bf18      	it	ne
    3f4a:	2001      	movne	r0, #1
    3f4c:	b005      	add	sp, #20
    3f4e:	bd30      	pop	{r4, r5, pc}
    3f50:	00008db4 	.word	0x00008db4

00003f54 <boot_read_swap_state>:
{
    3f54:	b530      	push	{r4, r5, lr}
    3f56:	460d      	mov	r5, r1
    return flash_area_get_size(fap) - BOOT_MAGIC_SZ;
    3f58:	6881      	ldr	r1, [r0, #8]
{
    3f5a:	b087      	sub	sp, #28
    rc = flash_area_read(fap, off, magic, BOOT_MAGIC_SZ);
    3f5c:	2310      	movs	r3, #16
    3f5e:	aa02      	add	r2, sp, #8
    3f60:	3910      	subs	r1, #16
{
    3f62:	4604      	mov	r4, r0
    rc = flash_area_read(fap, off, magic, BOOT_MAGIC_SZ);
    3f64:	f001 ffb7 	bl	5ed6 <flash_area_read>
    if (rc < 0) {
    3f68:	2800      	cmp	r0, #0
    3f6a:	da02      	bge.n	3f72 <boot_read_swap_state+0x1e>
        return BOOT_EFLASH;
    3f6c:	2001      	movs	r0, #1
}
    3f6e:	b007      	add	sp, #28
    3f70:	bd30      	pop	{r4, r5, pc}
    if (bootutil_buffer_is_erased(fap, magic, BOOT_MAGIC_SZ)) {
    3f72:	2210      	movs	r2, #16
    3f74:	4620      	mov	r0, r4
    3f76:	a902      	add	r1, sp, #8
    3f78:	f002 fe47 	bl	6c0a <bootutil_buffer_is_erased>
    3f7c:	2800      	cmp	r0, #0
    3f7e:	d13a      	bne.n	3ff6 <boot_read_swap_state+0xa2>
    if (memcmp(magic, BOOT_IMG_MAGIC, BOOT_MAGIC_SZ) == 0) {
    3f80:	2210      	movs	r2, #16
    3f82:	491e      	ldr	r1, [pc, #120]	; (3ffc <boot_read_swap_state+0xa8>)
    3f84:	a802      	add	r0, sp, #8
    3f86:	f002 fae0 	bl	654a <memcmp>
    return BOOT_MAGIC_BAD;
    3f8a:	2800      	cmp	r0, #0
        state->magic = boot_magic_decode(magic);
    3f8c:	bf0c      	ite	eq
    3f8e:	2301      	moveq	r3, #1
    3f90:	2302      	movne	r3, #2
        state->magic = BOOT_MAGIC_UNSET;
    3f92:	702b      	strb	r3, [r5, #0]
    off = boot_swap_info_off(fap);
    3f94:	4620      	mov	r0, r4
    3f96:	f002 fe24 	bl	6be2 <boot_swap_info_off>
    rc = flash_area_read(fap, off, &swap_info, sizeof swap_info);
    3f9a:	2301      	movs	r3, #1
    off = boot_swap_info_off(fap);
    3f9c:	4601      	mov	r1, r0
    rc = flash_area_read(fap, off, &swap_info, sizeof swap_info);
    3f9e:	f10d 0207 	add.w	r2, sp, #7
    3fa2:	4620      	mov	r0, r4
    3fa4:	f001 ff97 	bl	5ed6 <flash_area_read>
    if (rc < 0) {
    3fa8:	2800      	cmp	r0, #0
    3faa:	dbdf      	blt.n	3f6c <boot_read_swap_state+0x18>
    state->swap_type = BOOT_GET_SWAP_TYPE(swap_info);
    3fac:	f89d 3007 	ldrb.w	r3, [sp, #7]
    if (bootutil_buffer_is_erased(fap, &swap_info, sizeof swap_info) ||
    3fb0:	4620      	mov	r0, r4
    state->swap_type = BOOT_GET_SWAP_TYPE(swap_info);
    3fb2:	f003 020f 	and.w	r2, r3, #15
    state->image_num = BOOT_GET_IMAGE_NUM(swap_info);
    3fb6:	091b      	lsrs	r3, r3, #4
    state->swap_type = BOOT_GET_SWAP_TYPE(swap_info);
    3fb8:	706a      	strb	r2, [r5, #1]
    state->image_num = BOOT_GET_IMAGE_NUM(swap_info);
    3fba:	712b      	strb	r3, [r5, #4]
    if (bootutil_buffer_is_erased(fap, &swap_info, sizeof swap_info) ||
    3fbc:	2201      	movs	r2, #1
    3fbe:	f10d 0107 	add.w	r1, sp, #7
    3fc2:	f002 fe22 	bl	6c0a <bootutil_buffer_is_erased>
    3fc6:	b910      	cbnz	r0, 3fce <boot_read_swap_state+0x7a>
    3fc8:	786b      	ldrb	r3, [r5, #1]
    3fca:	2b04      	cmp	r3, #4
    3fcc:	d903      	bls.n	3fd6 <boot_read_swap_state+0x82>
        state->swap_type = BOOT_SWAP_TYPE_NONE;
    3fce:	2301      	movs	r3, #1
    3fd0:	706b      	strb	r3, [r5, #1]
        state->image_num = 0;
    3fd2:	2300      	movs	r3, #0
    3fd4:	712b      	strb	r3, [r5, #4]
    return ALIGN_DOWN(boot_magic_off(fap) - BOOT_MAX_ALIGN, BOOT_MAX_ALIGN);
    3fd6:	68a2      	ldr	r2, [r4, #8]
    return boot_read_flag(fap, copy_done, boot_copy_done_off(fap));
    3fd8:	4620      	mov	r0, r4
    return ALIGN_DOWN(boot_magic_off(fap) - BOOT_MAX_ALIGN, BOOT_MAX_ALIGN);
    3fda:	3a18      	subs	r2, #24
    3fdc:	f022 0207 	bic.w	r2, r2, #7
    return boot_read_flag(fap, copy_done, boot_copy_done_off(fap));
    3fe0:	3a08      	subs	r2, #8
    3fe2:	1ca9      	adds	r1, r5, #2
    3fe4:	f002 fe24 	bl	6c30 <boot_read_flag>
    if (rc) {
    3fe8:	2800      	cmp	r0, #0
    3fea:	d1bf      	bne.n	3f6c <boot_read_swap_state+0x18>
    return boot_read_image_ok(fap, &state->image_ok);
    3fec:	4620      	mov	r0, r4
    3fee:	1ce9      	adds	r1, r5, #3
    3ff0:	f002 fe77 	bl	6ce2 <boot_read_image_ok>
    3ff4:	e7bb      	b.n	3f6e <boot_read_swap_state+0x1a>
    3ff6:	2303      	movs	r3, #3
    3ff8:	e7cb      	b.n	3f92 <boot_read_swap_state+0x3e>
    3ffa:	bf00      	nop
    3ffc:	00008db4 	.word	0x00008db4

00004000 <boot_swap_type_multi>:
    return boot_write_trailer(fap, off, (const uint8_t *) &swap_info, 1);
}

int
boot_swap_type_multi(int image_index)
{
    4000:	b57f      	push	{r0, r1, r2, r3, r4, r5, r6, lr}
    4002:	4605      	mov	r5, r0

    rc = BOOT_HOOK_CALL(boot_read_swap_state_primary_slot_hook,
                        BOOT_HOOK_REGULAR, image_index, &primary_slot);
    if (rc == BOOT_HOOK_REGULAR)
    {
        rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_PRIMARY(image_index),
    4004:	4669      	mov	r1, sp
    4006:	2002      	movs	r0, #2
    4008:	f002 fe71 	bl	6cee <boot_read_swap_state_by_id>
                                        &primary_slot);
    }
    if (rc) {
    400c:	4604      	mov	r4, r0
    400e:	b110      	cbz	r0, 4016 <boot_swap_type_multi+0x16>
        return BOOT_SWAP_TYPE_PANIC;
    4010:	20ff      	movs	r0, #255	; 0xff
        }
    }

    BOOT_LOG_INF("Swap type: none");
    return BOOT_SWAP_TYPE_NONE;
}
    4012:	b004      	add	sp, #16
    4014:	bd70      	pop	{r4, r5, r6, pc}
    rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_SECONDARY(image_index),
    4016:	2008      	movs	r0, #8
    4018:	a902      	add	r1, sp, #8
    401a:	f002 fe68 	bl	6cee <boot_read_swap_state_by_id>
    if (rc == BOOT_EFLASH) {
    401e:	2801      	cmp	r0, #1
    4020:	d136      	bne.n	4090 <boot_swap_type_multi+0x90>
        BOOT_LOG_INF("Secondary image of image pair (%d.) "
    4022:	462a      	mov	r2, r5
    4024:	2149      	movs	r1, #73	; 0x49
    4026:	4828      	ldr	r0, [pc, #160]	; (40c8 <boot_swap_type_multi+0xc8>)
    4028:	f001 ff47 	bl	5eba <z_log_minimal_printk>
        secondary_slot.magic = BOOT_MAGIC_UNSET;
    402c:	4b27      	ldr	r3, [pc, #156]	; (40cc <boot_swap_type_multi+0xcc>)
        secondary_slot.image_num = 0;
    402e:	f88d 400c 	strb.w	r4, [sp, #12]
        secondary_slot.magic = BOOT_MAGIC_UNSET;
    4032:	9302      	str	r3, [sp, #8]
            boot_magic_compatible_check(table->magic_secondary_slot,
    4034:	2200      	movs	r2, #0
        if (boot_magic_compatible_check(table->magic_primary_slot,
    4036:	f89d 5000 	ldrb.w	r5, [sp]
            boot_magic_compatible_check(table->magic_secondary_slot,
    403a:	f89d 6008 	ldrb.w	r6, [sp, #8]
    403e:	4c24      	ldr	r4, [pc, #144]	; (40d0 <boot_swap_type_multi+0xd0>)
        if (boot_magic_compatible_check(table->magic_primary_slot,
    4040:	4629      	mov	r1, r5
    4042:	7820      	ldrb	r0, [r4, #0]
    4044:	f002 fdd3 	bl	6bee <boot_magic_compatible_check>
    4048:	b348      	cbz	r0, 409e <boot_swap_type_multi+0x9e>
            boot_magic_compatible_check(table->magic_secondary_slot,
    404a:	4631      	mov	r1, r6
    404c:	7860      	ldrb	r0, [r4, #1]
    404e:	f002 fdce 	bl	6bee <boot_magic_compatible_check>
                                        primary_slot.magic) &&
    4052:	b320      	cbz	r0, 409e <boot_swap_type_multi+0x9e>
            (table->image_ok_primary_slot == BOOT_FLAG_ANY   ||
    4054:	78a3      	ldrb	r3, [r4, #2]
                                        secondary_slot.magic) &&
    4056:	2b04      	cmp	r3, #4
    4058:	d003      	beq.n	4062 <boot_swap_type_multi+0x62>
            (table->image_ok_primary_slot == BOOT_FLAG_ANY   ||
    405a:	f89d 1003 	ldrb.w	r1, [sp, #3]
    405e:	4299      	cmp	r1, r3
    4060:	d11d      	bne.n	409e <boot_swap_type_multi+0x9e>
            (table->image_ok_secondary_slot == BOOT_FLAG_ANY ||
    4062:	78e3      	ldrb	r3, [r4, #3]
                table->image_ok_primary_slot == primary_slot.image_ok) &&
    4064:	2b04      	cmp	r3, #4
    4066:	d003      	beq.n	4070 <boot_swap_type_multi+0x70>
            (table->image_ok_secondary_slot == BOOT_FLAG_ANY ||
    4068:	f89d 100b 	ldrb.w	r1, [sp, #11]
    406c:	4299      	cmp	r1, r3
    406e:	d116      	bne.n	409e <boot_swap_type_multi+0x9e>
            (table->copy_done_primary_slot == BOOT_FLAG_ANY  ||
    4070:	7923      	ldrb	r3, [r4, #4]
                table->image_ok_secondary_slot == secondary_slot.image_ok) &&
    4072:	2b04      	cmp	r3, #4
    4074:	d10f      	bne.n	4096 <boot_swap_type_multi+0x96>
            BOOT_LOG_INF("Swap type: %s",
    4076:	7963      	ldrb	r3, [r4, #5]
    4078:	2b02      	cmp	r3, #2
    407a:	d11b      	bne.n	40b4 <boot_swap_type_multi+0xb4>
    407c:	4a15      	ldr	r2, [pc, #84]	; (40d4 <boot_swap_type_multi+0xd4>)
    407e:	4816      	ldr	r0, [pc, #88]	; (40d8 <boot_swap_type_multi+0xd8>)
    4080:	2149      	movs	r1, #73	; 0x49
    4082:	f001 ff1a 	bl	5eba <z_log_minimal_printk>
            if (table->swap_type != BOOT_SWAP_TYPE_TEST &&
    4086:	7960      	ldrb	r0, [r4, #5]
    4088:	1e83      	subs	r3, r0, #2
    408a:	2b02      	cmp	r3, #2
    408c:	d9c1      	bls.n	4012 <boot_swap_type_multi+0x12>
    408e:	e7bf      	b.n	4010 <boot_swap_type_multi+0x10>
    } else if (rc) {
    4090:	2800      	cmp	r0, #0
    4092:	d0cf      	beq.n	4034 <boot_swap_type_multi+0x34>
    4094:	e7bc      	b.n	4010 <boot_swap_type_multi+0x10>
            (table->copy_done_primary_slot == BOOT_FLAG_ANY  ||
    4096:	f89d 1002 	ldrb.w	r1, [sp, #2]
    409a:	4299      	cmp	r1, r3
    409c:	d0eb      	beq.n	4076 <boot_swap_type_multi+0x76>
    for (i = 0; i < BOOT_SWAP_TABLES_COUNT; i++) {
    409e:	3201      	adds	r2, #1
    40a0:	2a03      	cmp	r2, #3
    40a2:	f104 0406 	add.w	r4, r4, #6
    40a6:	d1cb      	bne.n	4040 <boot_swap_type_multi+0x40>
    BOOT_LOG_INF("Swap type: none");
    40a8:	480c      	ldr	r0, [pc, #48]	; (40dc <boot_swap_type_multi+0xdc>)
    40aa:	2149      	movs	r1, #73	; 0x49
    40ac:	f001 ff05 	bl	5eba <z_log_minimal_printk>
    return BOOT_SWAP_TYPE_NONE;
    40b0:	2001      	movs	r0, #1
    40b2:	e7ae      	b.n	4012 <boot_swap_type_multi+0x12>
            BOOT_LOG_INF("Swap type: %s",
    40b4:	2b03      	cmp	r3, #3
    40b6:	d005      	beq.n	40c4 <boot_swap_type_multi+0xc4>
    40b8:	4a09      	ldr	r2, [pc, #36]	; (40e0 <boot_swap_type_multi+0xe0>)
    40ba:	490a      	ldr	r1, [pc, #40]	; (40e4 <boot_swap_type_multi+0xe4>)
    40bc:	2b04      	cmp	r3, #4
    40be:	bf08      	it	eq
    40c0:	460a      	moveq	r2, r1
    40c2:	e7dc      	b.n	407e <boot_swap_type_multi+0x7e>
    40c4:	4a08      	ldr	r2, [pc, #32]	; (40e8 <boot_swap_type_multi+0xe8>)
    40c6:	e7da      	b.n	407e <boot_swap_type_multi+0x7e>
    40c8:	00009af3 	.word	0x00009af3
    40cc:	03030103 	.word	0x03030103
    40d0:	00009b66 	.word	0x00009b66
    40d4:	00009ad5 	.word	0x00009ad5
    40d8:	00009b3e 	.word	0x00009b3e
    40dc:	00009b51 	.word	0x00009b51
    40e0:	00009ada 	.word	0x00009ada
    40e4:	00009aec 	.word	0x00009aec
    40e8:	00009ad0 	.word	0x00009ad0

000040ec <verify_header>:
}
#endif /* MBEDTLS_MEMORY_DEBUG */

static int verify_header( memory_header *hdr )
{
    if( hdr->magic1 != MAGIC1 )
    40ec:	6801      	ldr	r1, [r0, #0]
    40ee:	4a0e      	ldr	r2, [pc, #56]	; (4128 <verify_header+0x3c>)
{
    40f0:	4603      	mov	r3, r0
    if( hdr->magic1 != MAGIC1 )
    40f2:	4291      	cmp	r1, r2
    40f4:	d115      	bne.n	4122 <verify_header+0x36>
        mbedtls_fprintf( stderr, "FATAL: MAGIC1 mismatch\n" );
#endif
        return( 1 );
    }

    if( hdr->magic2 != MAGIC2 )
    40f6:	69c1      	ldr	r1, [r0, #28]
    40f8:	f1a2 2210 	sub.w	r2, r2, #268439552	; 0x10001000
    40fc:	f1a2 12ef 	sub.w	r2, r2, #15663343	; 0xef00ef
    4100:	4291      	cmp	r1, r2
    4102:	d10e      	bne.n	4122 <verify_header+0x36>
        mbedtls_fprintf( stderr, "FATAL: MAGIC2 mismatch\n" );
#endif
        return( 1 );
    }

    if( hdr->alloc > 1 )
    4104:	6882      	ldr	r2, [r0, #8]
    4106:	2a01      	cmp	r2, #1
    4108:	d80b      	bhi.n	4122 <verify_header+0x36>
        mbedtls_fprintf( stderr, "FATAL: alloc has illegal value\n" );
#endif
        return( 1 );
    }

    if( hdr->prev != NULL && hdr->prev == hdr->next )
    410a:	68c2      	ldr	r2, [r0, #12]
    410c:	b112      	cbz	r2, 4114 <verify_header+0x28>
    410e:	6901      	ldr	r1, [r0, #16]
    4110:	428a      	cmp	r2, r1
    4112:	d006      	beq.n	4122 <verify_header+0x36>
        mbedtls_fprintf( stderr, "FATAL: prev == next\n" );
#endif
        return( 1 );
    }

    if( hdr->prev_free != NULL && hdr->prev_free == hdr->next_free )
    4114:	6958      	ldr	r0, [r3, #20]
    4116:	b128      	cbz	r0, 4124 <verify_header+0x38>
    4118:	699b      	ldr	r3, [r3, #24]
    411a:	1a1b      	subs	r3, r3, r0
    411c:	4258      	negs	r0, r3
    411e:	4158      	adcs	r0, r3
    4120:	4770      	bx	lr
        return( 1 );
    4122:	2001      	movs	r0, #1
#endif
        return( 1 );
    }

    return( 0 );
}
    4124:	4770      	bx	lr
    4126:	bf00      	nop
    4128:	ff00aa55 	.word	0xff00aa55

0000412c <verify_chain>:

static int verify_chain( void )
{
    412c:	b570      	push	{r4, r5, r6, lr}
    memory_header *prv = heap.first, *cur;
    412e:	4b0d      	ldr	r3, [pc, #52]	; (4164 <verify_chain+0x38>)
    4130:	689e      	ldr	r6, [r3, #8]

    if( prv == NULL || verify_header( prv ) != 0 )
    4132:	b1a6      	cbz	r6, 415e <verify_chain+0x32>
    4134:	4630      	mov	r0, r6
    4136:	f7ff ffd9 	bl	40ec <verify_header>
    413a:	4604      	mov	r4, r0
    413c:	b978      	cbnz	r0, 415e <verify_chain+0x32>
                                  "failed\n" );
#endif
        return( 1 );
    }

    if( heap.first->prev != NULL )
    413e:	68f3      	ldr	r3, [r6, #12]
    4140:	b96b      	cbnz	r3, 415e <verify_chain+0x32>
                                  "first->prev != NULL\n" );
#endif
        return( 1 );
    }

    cur = heap.first->next;
    4142:	6935      	ldr	r5, [r6, #16]

    while( cur != NULL )
    4144:	b90d      	cbnz	r5, 414a <verify_chain+0x1e>
        prv = cur;
        cur = cur->next;
    }

    return( 0 );
}
    4146:	4620      	mov	r0, r4
    4148:	bd70      	pop	{r4, r5, r6, pc}
        if( verify_header( cur ) != 0 )
    414a:	4628      	mov	r0, r5
    414c:	f7ff ffce 	bl	40ec <verify_header>
    4150:	b928      	cbnz	r0, 415e <verify_chain+0x32>
        if( cur->prev != prv )
    4152:	68eb      	ldr	r3, [r5, #12]
    4154:	42b3      	cmp	r3, r6
    4156:	d102      	bne.n	415e <verify_chain+0x32>
        cur = cur->next;
    4158:	462e      	mov	r6, r5
    415a:	692d      	ldr	r5, [r5, #16]
    415c:	e7f2      	b.n	4144 <verify_chain+0x18>
        return( 1 );
    415e:	2401      	movs	r4, #1
    4160:	e7f1      	b.n	4146 <verify_chain+0x1a>
    4162:	bf00      	nop
    4164:	2000e058 	.word	0x2000e058

00004168 <buffer_alloc_calloc>:

static void *buffer_alloc_calloc( size_t n, size_t size )
{
    4168:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
#if defined(MBEDTLS_MEMORY_BACKTRACE)
    void *trace_buffer[MAX_BT];
    size_t trace_cnt;
#endif

    if( heap.buf == NULL || heap.first == NULL )
    416c:	4f3f      	ldr	r7, [pc, #252]	; (426c <buffer_alloc_calloc+0x104>)
    416e:	683c      	ldr	r4, [r7, #0]
    4170:	b1d4      	cbz	r4, 41a8 <buffer_alloc_calloc+0x40>
    4172:	68bc      	ldr	r4, [r7, #8]
    4174:	b1c4      	cbz	r4, 41a8 <buffer_alloc_calloc+0x40>
        return( NULL );

    original_len = len = n * size;

    if( n == 0 || size == 0 || len / n != size )
    4176:	2800      	cmp	r0, #0
    4178:	d04a      	beq.n	4210 <buffer_alloc_calloc+0xa8>
    417a:	2900      	cmp	r1, #0
    417c:	d048      	beq.n	4210 <buffer_alloc_calloc+0xa8>
    original_len = len = n * size;
    417e:	fb01 f500 	mul.w	r5, r1, r0
    if( n == 0 || size == 0 || len / n != size )
    4182:	fbb5 f0f0 	udiv	r0, r5, r0
    4186:	4288      	cmp	r0, r1
    4188:	d142      	bne.n	4210 <buffer_alloc_calloc+0xa8>
        return( NULL );
    else if( len > (size_t)-MBEDTLS_MEMORY_ALIGN_MULTIPLE )
    418a:	1d28      	adds	r0, r5, #4
    418c:	d840      	bhi.n	4210 <buffer_alloc_calloc+0xa8>
        return( NULL );

    if( len % MBEDTLS_MEMORY_ALIGN_MULTIPLE )
    418e:	07a9      	lsls	r1, r5, #30
    4190:	d00d      	beq.n	41ae <buffer_alloc_calloc+0x46>
    {
        len -= len % MBEDTLS_MEMORY_ALIGN_MULTIPLE;
    4192:	f025 0603 	bic.w	r6, r5, #3
        len += MBEDTLS_MEMORY_ALIGN_MULTIPLE;
    4196:	3604      	adds	r6, #4
    memory_header *new, *cur = heap.first_free;
    4198:	68fc      	ldr	r4, [r7, #12]
    419a:	e003      	b.n	41a4 <buffer_alloc_calloc+0x3c>

    // Find block that fits
    //
    while( cur != NULL )
    {
        if( cur->size >= len )
    419c:	6863      	ldr	r3, [r4, #4]
    419e:	42b3      	cmp	r3, r6
    41a0:	d238      	bcs.n	4214 <buffer_alloc_calloc+0xac>
            break;

        cur = cur->next_free;
    41a2:	69a4      	ldr	r4, [r4, #24]
    while( cur != NULL )
    41a4:	2c00      	cmp	r4, #0
    41a6:	d1f9      	bne.n	419c <buffer_alloc_calloc+0x34>

    ret = (unsigned char *) cur + sizeof( memory_header );
    memset( ret, 0, original_len );

    return( ret );
}
    41a8:	4620      	mov	r0, r4
    41aa:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
    41ae:	462e      	mov	r6, r5
    41b0:	e7f2      	b.n	4198 <buffer_alloc_calloc+0x30>
            heap.first_free = cur->next_free;
    41b2:	60fb      	str	r3, [r7, #12]
    41b4:	e041      	b.n	423a <buffer_alloc_calloc+0xd2>
    p = ( (unsigned char *) cur ) + sizeof(memory_header) + len;
    41b6:	f106 0120 	add.w	r1, r6, #32
    41ba:	1863      	adds	r3, r4, r1
    new->size = cur->size - len - sizeof(memory_header);
    41bc:	3a20      	subs	r2, #32
    41be:	605a      	str	r2, [r3, #4]
    new->alloc = 0;
    41c0:	2200      	movs	r2, #0
    new->prev = cur;
    41c2:	e9c3 2402 	strd	r2, r4, [r3, #8]
    new->magic1 = MAGIC1;
    41c6:	482a      	ldr	r0, [pc, #168]	; (4270 <buffer_alloc_calloc+0x108>)
    new->next = cur->next;
    41c8:	6922      	ldr	r2, [r4, #16]
    41ca:	611a      	str	r2, [r3, #16]
    new->magic1 = MAGIC1;
    41cc:	5060      	str	r0, [r4, r1]
    new->magic2 = MAGIC2;
    41ce:	4929      	ldr	r1, [pc, #164]	; (4274 <buffer_alloc_calloc+0x10c>)
    41d0:	61d9      	str	r1, [r3, #28]
    if( new->next != NULL )
    41d2:	b102      	cbz	r2, 41d6 <buffer_alloc_calloc+0x6e>
        new->next->prev = new;
    41d4:	60d3      	str	r3, [r2, #12]
    new->prev_free = cur->prev_free;
    41d6:	6962      	ldr	r2, [r4, #20]
    41d8:	615a      	str	r2, [r3, #20]
    new->next_free = cur->next_free;
    41da:	69a1      	ldr	r1, [r4, #24]
    41dc:	6199      	str	r1, [r3, #24]
    if( new->prev_free != NULL )
    41de:	b1aa      	cbz	r2, 420c <buffer_alloc_calloc+0xa4>
        new->prev_free->next_free = new;
    41e0:	6193      	str	r3, [r2, #24]
    if( new->next_free != NULL )
    41e2:	699a      	ldr	r2, [r3, #24]
    41e4:	b102      	cbz	r2, 41e8 <buffer_alloc_calloc+0x80>
        new->next_free->prev_free = new;
    41e6:	6153      	str	r3, [r2, #20]
    cur->alloc = 1;
    41e8:	f04f 0901 	mov.w	r9, #1
    cur->next = new;
    41ec:	6123      	str	r3, [r4, #16]
    cur->prev_free = NULL;
    41ee:	2300      	movs	r3, #0
    cur->size = len;
    41f0:	e9c4 6901 	strd	r6, r9, [r4, #4]
    cur->next_free = NULL;
    41f4:	e9c4 3305 	strd	r3, r3, [r4, #20]
    if( ( heap.verify & MBEDTLS_MEMORY_VERIFY_ALLOC ) && verify_chain() != 0 )
    41f8:	693b      	ldr	r3, [r7, #16]
    41fa:	07db      	lsls	r3, r3, #31
    41fc:	d52e      	bpl.n	425c <buffer_alloc_calloc+0xf4>
    41fe:	f7ff ff95 	bl	412c <verify_chain>
    4202:	b358      	cbz	r0, 425c <buffer_alloc_calloc+0xf4>
        mbedtls_exit( 1 );
    4204:	4b1c      	ldr	r3, [pc, #112]	; (4278 <buffer_alloc_calloc+0x110>)
    4206:	4648      	mov	r0, r9
    4208:	681b      	ldr	r3, [r3, #0]
    420a:	e026      	b.n	425a <buffer_alloc_calloc+0xf2>
        heap.first_free = new;
    420c:	60fb      	str	r3, [r7, #12]
    420e:	e7e8      	b.n	41e2 <buffer_alloc_calloc+0x7a>
        return( NULL );
    4210:	2400      	movs	r4, #0
    4212:	e7c9      	b.n	41a8 <buffer_alloc_calloc+0x40>
    if( cur->alloc != 0 )
    4214:	68a3      	ldr	r3, [r4, #8]
    4216:	b11b      	cbz	r3, 4220 <buffer_alloc_calloc+0xb8>
        mbedtls_exit( 1 );
    4218:	4b17      	ldr	r3, [pc, #92]	; (4278 <buffer_alloc_calloc+0x110>)
    421a:	2001      	movs	r0, #1
    421c:	681b      	ldr	r3, [r3, #0]
    421e:	4798      	blx	r3
    if( cur->size - len < sizeof(memory_header) +
    4220:	6862      	ldr	r2, [r4, #4]
    4222:	f104 0820 	add.w	r8, r4, #32
    4226:	1b92      	subs	r2, r2, r6
    4228:	2a23      	cmp	r2, #35	; 0x23
    422a:	d8c4      	bhi.n	41b6 <buffer_alloc_calloc+0x4e>
        cur->alloc = 1;
    422c:	2301      	movs	r3, #1
    422e:	60a3      	str	r3, [r4, #8]
            cur->prev_free->next_free = cur->next_free;
    4230:	e9d4 2305 	ldrd	r2, r3, [r4, #20]
        if( cur->prev_free != NULL )
    4234:	2a00      	cmp	r2, #0
    4236:	d0bc      	beq.n	41b2 <buffer_alloc_calloc+0x4a>
            cur->prev_free->next_free = cur->next_free;
    4238:	6193      	str	r3, [r2, #24]
        if( cur->next_free != NULL )
    423a:	69a3      	ldr	r3, [r4, #24]
    423c:	b10b      	cbz	r3, 4242 <buffer_alloc_calloc+0xda>
            cur->next_free->prev_free = cur->prev_free;
    423e:	6962      	ldr	r2, [r4, #20]
    4240:	615a      	str	r2, [r3, #20]
        cur->prev_free = NULL;
    4242:	2300      	movs	r3, #0
        cur->next_free = NULL;
    4244:	e9c4 3305 	strd	r3, r3, [r4, #20]
        if( ( heap.verify & MBEDTLS_MEMORY_VERIFY_ALLOC ) && verify_chain() != 0 )
    4248:	693b      	ldr	r3, [r7, #16]
    424a:	07da      	lsls	r2, r3, #31
    424c:	d506      	bpl.n	425c <buffer_alloc_calloc+0xf4>
    424e:	f7ff ff6d 	bl	412c <verify_chain>
    4252:	b118      	cbz	r0, 425c <buffer_alloc_calloc+0xf4>
            mbedtls_exit( 1 );
    4254:	2001      	movs	r0, #1
    4256:	4b08      	ldr	r3, [pc, #32]	; (4278 <buffer_alloc_calloc+0x110>)
    4258:	681b      	ldr	r3, [r3, #0]
        mbedtls_exit( 1 );
    425a:	4798      	blx	r3
    memset( ret, 0, original_len );
    425c:	462a      	mov	r2, r5
    425e:	2100      	movs	r1, #0
    4260:	4640      	mov	r0, r8
    ret = (unsigned char *) cur + sizeof( memory_header );
    4262:	4644      	mov	r4, r8
    memset( ret, 0, original_len );
    4264:	f002 f9a3 	bl	65ae <memset>
    return( ret );
    4268:	e79e      	b.n	41a8 <buffer_alloc_calloc+0x40>
    426a:	bf00      	nop
    426c:	2000e058 	.word	0x2000e058
    4270:	ff00aa55 	.word	0xff00aa55
    4274:	ee119966 	.word	0xee119966
    4278:	2000c560 	.word	0x2000c560

0000427c <buffer_alloc_free>:

static void buffer_alloc_free( void *ptr )
{
    427c:	b570      	push	{r4, r5, r6, lr}
    memory_header *hdr, *old = NULL;
    unsigned char *p = (unsigned char *) ptr;

    if( ptr == NULL || heap.buf == NULL || heap.first == NULL )
    427e:	4605      	mov	r5, r0
    4280:	2800      	cmp	r0, #0
    4282:	f000 8088 	beq.w	4396 <buffer_alloc_free+0x11a>
    4286:	4e44      	ldr	r6, [pc, #272]	; (4398 <buffer_alloc_free+0x11c>)
    4288:	6833      	ldr	r3, [r6, #0]
    428a:	2b00      	cmp	r3, #0
    428c:	f000 8083 	beq.w	4396 <buffer_alloc_free+0x11a>
    4290:	68b2      	ldr	r2, [r6, #8]
    4292:	2a00      	cmp	r2, #0
    4294:	d07f      	beq.n	4396 <buffer_alloc_free+0x11a>
        return;

    if( p < heap.buf || p >= heap.buf + heap.len )
    4296:	4283      	cmp	r3, r0
    4298:	d803      	bhi.n	42a2 <buffer_alloc_free+0x26>
    429a:	6872      	ldr	r2, [r6, #4]
    429c:	4413      	add	r3, r2
    429e:	4298      	cmp	r0, r3
    42a0:	d303      	bcc.n	42aa <buffer_alloc_free+0x2e>
    {
#if defined(MBEDTLS_MEMORY_DEBUG)
        mbedtls_fprintf( stderr, "FATAL: mbedtls_free() outside of managed "
                                  "space\n" );
#endif
        mbedtls_exit( 1 );
    42a2:	4b3e      	ldr	r3, [pc, #248]	; (439c <buffer_alloc_free+0x120>)
    42a4:	2001      	movs	r0, #1
    42a6:	681b      	ldr	r3, [r3, #0]
    42a8:	4798      	blx	r3
    }

    p -= sizeof(memory_header);
    42aa:	f1a5 0420 	sub.w	r4, r5, #32
    hdr = (memory_header *) p;

    if( verify_header( hdr ) != 0 )
    42ae:	4620      	mov	r0, r4
    42b0:	f7ff ff1c 	bl	40ec <verify_header>
    42b4:	b118      	cbz	r0, 42be <buffer_alloc_free+0x42>
        mbedtls_exit( 1 );
    42b6:	4b39      	ldr	r3, [pc, #228]	; (439c <buffer_alloc_free+0x120>)
    42b8:	2001      	movs	r0, #1
    42ba:	681b      	ldr	r3, [r3, #0]
    42bc:	4798      	blx	r3

    if( hdr->alloc != 1 )
    42be:	f855 3c18 	ldr.w	r3, [r5, #-24]
    42c2:	2b01      	cmp	r3, #1
    42c4:	d003      	beq.n	42ce <buffer_alloc_free+0x52>
    {
#if defined(MBEDTLS_MEMORY_DEBUG)
        mbedtls_fprintf( stderr, "FATAL: mbedtls_free() on unallocated "
                                  "data\n" );
#endif
        mbedtls_exit( 1 );
    42c6:	4b35      	ldr	r3, [pc, #212]	; (439c <buffer_alloc_free+0x120>)
    42c8:	2001      	movs	r0, #1
    42ca:	681b      	ldr	r3, [r3, #0]
    42cc:	4798      	blx	r3
    }

    hdr->alloc = 0;
    42ce:	2300      	movs	r3, #0
    42d0:	f845 3c18 	str.w	r3, [r5, #-24]
    hdr->trace_count = 0;
#endif

    // Regroup with block before
    //
    if( hdr->prev != NULL && hdr->prev->alloc == 0 )
    42d4:	f855 3c14 	ldr.w	r3, [r5, #-20]
    42d8:	b33b      	cbz	r3, 432a <buffer_alloc_free+0xae>
    42da:	689a      	ldr	r2, [r3, #8]
    42dc:	bb2a      	cbnz	r2, 432a <buffer_alloc_free+0xae>
    {
#if defined(MBEDTLS_MEMORY_DEBUG)
        heap.header_count--;
#endif
        hdr->prev->size += sizeof(memory_header) + hdr->size;
    42de:	f855 2c1c 	ldr.w	r2, [r5, #-28]
    42e2:	f102 0120 	add.w	r1, r2, #32
    42e6:	685a      	ldr	r2, [r3, #4]
    42e8:	440a      	add	r2, r1
    42ea:	605a      	str	r2, [r3, #4]
        hdr->prev->next = hdr->next;
    42ec:	e955 3205 	ldrd	r3, r2, [r5, #-20]
    42f0:	611a      	str	r2, [r3, #16]
        old = hdr;
        hdr = hdr->prev;
    42f2:	f855 5c14 	ldr.w	r5, [r5, #-20]

        if( hdr->next != NULL )
    42f6:	692b      	ldr	r3, [r5, #16]
    42f8:	b103      	cbz	r3, 42fc <buffer_alloc_free+0x80>
            hdr->next->prev = hdr;
    42fa:	60dd      	str	r5, [r3, #12]

        memset( old, 0, sizeof(memory_header) );
    42fc:	2220      	movs	r2, #32
    42fe:	2100      	movs	r1, #0
    4300:	4620      	mov	r0, r4
    4302:	f002 f954 	bl	65ae <memset>
    }

    // Regroup with block after
    //
    if( hdr->next != NULL && hdr->next->alloc == 0 )
    4306:	6928      	ldr	r0, [r5, #16]
    4308:	b110      	cbz	r0, 4310 <buffer_alloc_free+0x94>
    430a:	6883      	ldr	r3, [r0, #8]
    430c:	2b00      	cmp	r3, #0
    430e:	d02e      	beq.n	436e <buffer_alloc_free+0xf2>
        if( heap.first_free != NULL )
            heap.first_free->prev_free = hdr;
        heap.first_free = hdr;
    }

    if( ( heap.verify & MBEDTLS_MEMORY_VERIFY_FREE ) && verify_chain() != 0 )
    4310:	6933      	ldr	r3, [r6, #16]
    4312:	079b      	lsls	r3, r3, #30
    4314:	d53f      	bpl.n	4396 <buffer_alloc_free+0x11a>
    4316:	f7ff ff09 	bl	412c <verify_chain>
    431a:	2800      	cmp	r0, #0
    431c:	d03b      	beq.n	4396 <buffer_alloc_free+0x11a>
        mbedtls_exit( 1 );
}
    431e:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
        mbedtls_exit( 1 );
    4322:	4b1e      	ldr	r3, [pc, #120]	; (439c <buffer_alloc_free+0x120>)
    4324:	2001      	movs	r0, #1
    4326:	681b      	ldr	r3, [r3, #0]
    4328:	4718      	bx	r3
    if( hdr->next != NULL && hdr->next->alloc == 0 )
    432a:	f855 0c10 	ldr.w	r0, [r5, #-16]
    432e:	2800      	cmp	r0, #0
    4330:	d02a      	beq.n	4388 <buffer_alloc_free+0x10c>
    4332:	6883      	ldr	r3, [r0, #8]
    4334:	bb43      	cbnz	r3, 4388 <buffer_alloc_free+0x10c>
        hdr->size += sizeof(memory_header) + hdr->next->size;
    4336:	6842      	ldr	r2, [r0, #4]
    4338:	6863      	ldr	r3, [r4, #4]
    433a:	4413      	add	r3, r2
    433c:	3320      	adds	r3, #32
    433e:	6063      	str	r3, [r4, #4]
        hdr->next = hdr->next->next;
    4340:	6903      	ldr	r3, [r0, #16]
    4342:	6123      	str	r3, [r4, #16]
        if( hdr->prev_free != NULL || hdr->next_free != NULL )
    4344:	e9d4 2305 	ldrd	r2, r3, [r4, #20]
    4348:	b99a      	cbnz	r2, 4372 <buffer_alloc_free+0xf6>
    434a:	b9cb      	cbnz	r3, 4380 <buffer_alloc_free+0x104>
        hdr->prev_free = old->prev_free;
    434c:	6943      	ldr	r3, [r0, #20]
    434e:	6163      	str	r3, [r4, #20]
        hdr->next_free = old->next_free;
    4350:	6982      	ldr	r2, [r0, #24]
    4352:	61a2      	str	r2, [r4, #24]
        if( hdr->prev_free != NULL )
    4354:	b1b3      	cbz	r3, 4384 <buffer_alloc_free+0x108>
            hdr->prev_free->next_free = hdr;
    4356:	619c      	str	r4, [r3, #24]
        if( hdr->next_free != NULL )
    4358:	69a3      	ldr	r3, [r4, #24]
    435a:	b103      	cbz	r3, 435e <buffer_alloc_free+0xe2>
            hdr->next_free->prev_free = hdr;
    435c:	615c      	str	r4, [r3, #20]
        if( hdr->next != NULL )
    435e:	6923      	ldr	r3, [r4, #16]
    4360:	b103      	cbz	r3, 4364 <buffer_alloc_free+0xe8>
            hdr->next->prev = hdr;
    4362:	60dc      	str	r4, [r3, #12]
        memset( old, 0, sizeof(memory_header) );
    4364:	2220      	movs	r2, #32
    4366:	2100      	movs	r1, #0
    4368:	f002 f921 	bl	65ae <memset>
    if( old == NULL )
    436c:	e7d0      	b.n	4310 <buffer_alloc_free+0x94>
    if( hdr->next != NULL && hdr->next->alloc == 0 )
    436e:	462c      	mov	r4, r5
    4370:	e7e1      	b.n	4336 <buffer_alloc_free+0xba>
                hdr->prev_free->next_free = hdr->next_free;
    4372:	6193      	str	r3, [r2, #24]
            if( hdr->next_free != NULL )
    4374:	69a3      	ldr	r3, [r4, #24]
    4376:	2b00      	cmp	r3, #0
    4378:	d0e8      	beq.n	434c <buffer_alloc_free+0xd0>
                hdr->next_free->prev_free = hdr->prev_free;
    437a:	6962      	ldr	r2, [r4, #20]
    437c:	615a      	str	r2, [r3, #20]
    437e:	e7e5      	b.n	434c <buffer_alloc_free+0xd0>
                heap.first_free = hdr->next_free;
    4380:	60f3      	str	r3, [r6, #12]
    4382:	e7f7      	b.n	4374 <buffer_alloc_free+0xf8>
            heap.first_free = hdr;
    4384:	60f4      	str	r4, [r6, #12]
    4386:	e7e7      	b.n	4358 <buffer_alloc_free+0xdc>
        hdr->next_free = heap.first_free;
    4388:	68f3      	ldr	r3, [r6, #12]
    438a:	f845 3c08 	str.w	r3, [r5, #-8]
        if( heap.first_free != NULL )
    438e:	b103      	cbz	r3, 4392 <buffer_alloc_free+0x116>
            heap.first_free->prev_free = hdr;
    4390:	615c      	str	r4, [r3, #20]
        heap.first_free = hdr;
    4392:	60f4      	str	r4, [r6, #12]
    4394:	e7bc      	b.n	4310 <buffer_alloc_free+0x94>
}
    4396:	bd70      	pop	{r4, r5, r6, pc}
    4398:	2000e058 	.word	0x2000e058
    439c:	2000c560 	.word	0x2000c560

000043a0 <mbedtls_memory_buffer_alloc_init>:
    (void) mbedtls_mutex_unlock( &heap.mutex );
}
#endif /* MBEDTLS_THREADING_C */

void mbedtls_memory_buffer_alloc_init( unsigned char *buf, size_t len )
{
    43a0:	b538      	push	{r3, r4, r5, lr}
    43a2:	460c      	mov	r4, r1
    memset( &heap, 0, sizeof( buffer_alloc_ctx ) );
    43a4:	2214      	movs	r2, #20
    43a6:	2100      	movs	r1, #0
{
    43a8:	4605      	mov	r5, r0
    memset( &heap, 0, sizeof( buffer_alloc_ctx ) );
    43aa:	4813      	ldr	r0, [pc, #76]	; (43f8 <mbedtls_memory_buffer_alloc_init+0x58>)
    43ac:	f002 f8ff 	bl	65ae <memset>
#if defined(MBEDTLS_THREADING_C)
    mbedtls_mutex_init( &heap.mutex );
    mbedtls_platform_set_calloc_free( buffer_alloc_calloc_mutexed,
                              buffer_alloc_free_mutexed );
#else
    mbedtls_platform_set_calloc_free( buffer_alloc_calloc, buffer_alloc_free );
    43b0:	4912      	ldr	r1, [pc, #72]	; (43fc <mbedtls_memory_buffer_alloc_init+0x5c>)
    43b2:	4813      	ldr	r0, [pc, #76]	; (4400 <mbedtls_memory_buffer_alloc_init+0x60>)
    43b4:	f000 f834 	bl	4420 <mbedtls_platform_set_calloc_free>
#endif

    if( len < sizeof( memory_header ) + MBEDTLS_MEMORY_ALIGN_MULTIPLE )
    43b8:	2c23      	cmp	r4, #35	; 0x23
    43ba:	d91c      	bls.n	43f6 <mbedtls_memory_buffer_alloc_init+0x56>
        return;
    else if( (size_t)buf % MBEDTLS_MEMORY_ALIGN_MULTIPLE )
    43bc:	f015 0303 	ands.w	r3, r5, #3
    {
        /* Adjust len first since buf is used in the computation */
        len -= MBEDTLS_MEMORY_ALIGN_MULTIPLE
    43c0:	bf1f      	itttt	ne
    43c2:	3c04      	subne	r4, #4
    43c4:	18e4      	addne	r4, r4, r3
             - (size_t)buf % MBEDTLS_MEMORY_ALIGN_MULTIPLE;
        buf += MBEDTLS_MEMORY_ALIGN_MULTIPLE
             - (size_t)buf % MBEDTLS_MEMORY_ALIGN_MULTIPLE;
    43c6:	f1c3 0304 	rsbne	r3, r3, #4
        buf += MBEDTLS_MEMORY_ALIGN_MULTIPLE
    43ca:	18ed      	addne	r5, r5, r3
    }

    memset( buf, 0, len );
    43cc:	4622      	mov	r2, r4
    43ce:	2100      	movs	r1, #0
    43d0:	4628      	mov	r0, r5
    43d2:	f002 f8ec 	bl	65ae <memset>

    heap.buf = buf;
    43d6:	4b08      	ldr	r3, [pc, #32]	; (43f8 <mbedtls_memory_buffer_alloc_init+0x58>)
    heap.len = len;

    heap.first = (memory_header *)buf;
    heap.first->size = len - sizeof( memory_header );
    heap.first->magic1 = MAGIC1;
    43d8:	490a      	ldr	r1, [pc, #40]	; (4404 <mbedtls_memory_buffer_alloc_init+0x64>)
    heap.len = len;
    43da:	e9c3 5400 	strd	r5, r4, [r3]
    heap.first->size = len - sizeof( memory_header );
    43de:	3c20      	subs	r4, #32
    heap.first = (memory_header *)buf;
    43e0:	609d      	str	r5, [r3, #8]
    heap.first->size = len - sizeof( memory_header );
    43e2:	606c      	str	r4, [r5, #4]
    heap.first->magic1 = MAGIC1;
    43e4:	689a      	ldr	r2, [r3, #8]
    43e6:	6011      	str	r1, [r2, #0]
    heap.first->magic2 = MAGIC2;
    43e8:	689a      	ldr	r2, [r3, #8]
    43ea:	f1a1 2110 	sub.w	r1, r1, #268439552	; 0x10001000
    43ee:	f1a1 11ef 	sub.w	r1, r1, #15663343	; 0xef00ef
    43f2:	61d1      	str	r1, [r2, #28]
    heap.first_free = heap.first;
    43f4:	60da      	str	r2, [r3, #12]
}
    43f6:	bd38      	pop	{r3, r4, r5, pc}
    43f8:	2000e058 	.word	0x2000e058
    43fc:	0000427d 	.word	0x0000427d
    4400:	00004169 	.word	0x00004169
    4404:	ff00aa55 	.word	0xff00aa55

00004408 <mbedtls_calloc>:
void * (*mbedtls_calloc_func)( size_t, size_t ) = MBEDTLS_PLATFORM_STD_CALLOC;
void (*mbedtls_free_func)( void * ) = MBEDTLS_PLATFORM_STD_FREE;

void * mbedtls_calloc( size_t nmemb, size_t size )
{
    return (*mbedtls_calloc_func)( nmemb, size );
    4408:	4b01      	ldr	r3, [pc, #4]	; (4410 <mbedtls_calloc+0x8>)
    440a:	681b      	ldr	r3, [r3, #0]
    440c:	4718      	bx	r3
    440e:	bf00      	nop
    4410:	2000c568 	.word	0x2000c568

00004414 <mbedtls_free>:
}

void mbedtls_free( void * ptr )
{
    (*mbedtls_free_func)( ptr );
    4414:	4b01      	ldr	r3, [pc, #4]	; (441c <mbedtls_free+0x8>)
    4416:	681b      	ldr	r3, [r3, #0]
    4418:	4718      	bx	r3
    441a:	bf00      	nop
    441c:	2000c564 	.word	0x2000c564

00004420 <mbedtls_platform_set_calloc_free>:
}

int mbedtls_platform_set_calloc_free( void * (*calloc_func)( size_t, size_t ),
                              void (*free_func)( void * ) )
{
    mbedtls_calloc_func = calloc_func;
    4420:	4b02      	ldr	r3, [pc, #8]	; (442c <mbedtls_platform_set_calloc_free+0xc>)
    4422:	6018      	str	r0, [r3, #0]
    mbedtls_free_func = free_func;
    4424:	4b02      	ldr	r3, [pc, #8]	; (4430 <mbedtls_platform_set_calloc_free+0x10>)
    return( 0 );
}
    4426:	2000      	movs	r0, #0
    mbedtls_free_func = free_func;
    4428:	6019      	str	r1, [r3, #0]
}
    442a:	4770      	bx	lr
    442c:	2000c568 	.word	0x2000c568
    4430:	2000c564 	.word	0x2000c564

00004434 <rsa_check_context.constprop.0>:
/*
 * Checks whether the context fields are set in such a way
 * that the RSA primitives will be able to execute without error.
 * It does *not* make guarantees for consistency of the parameters.
 */
static int rsa_check_context( mbedtls_rsa_context const *ctx, int is_priv,
    4434:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    /* blinding_needed is only used for NO_CRT to decide whether
     * P,Q need to be present or not. */
    ((void) blinding_needed);
#endif

    if( ctx->len != mbedtls_mpi_size( &ctx->N ) ||
    4436:	f100 0608 	add.w	r6, r0, #8
    443a:	6847      	ldr	r7, [r0, #4]
static int rsa_check_context( mbedtls_rsa_context const *ctx, int is_priv,
    443c:	4604      	mov	r4, r0
    if( ctx->len != mbedtls_mpi_size( &ctx->N ) ||
    443e:	4630      	mov	r0, r6
static int rsa_check_context( mbedtls_rsa_context const *ctx, int is_priv,
    4440:	460d      	mov	r5, r1
    if( ctx->len != mbedtls_mpi_size( &ctx->N ) ||
    4442:	f002 fffb 	bl	743c <mbedtls_mpi_size>
    4446:	4287      	cmp	r7, r0
    4448:	d14b      	bne.n	44e2 <rsa_check_context.constprop.0+0xae>
    444a:	6863      	ldr	r3, [r4, #4]
    444c:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
    4450:	d847      	bhi.n	44e2 <rsa_check_context.constprop.0+0xae>
     * 1. Modular exponentiation needs positive, odd moduli.
     */

    /* Modular exponentiation wrt. N is always used for
     * RSA public key operations. */
    if( mbedtls_mpi_cmp_int( &ctx->N, 0 ) <= 0 ||
    4452:	2100      	movs	r1, #0
    4454:	4630      	mov	r0, r6
    4456:	f003 f95c 	bl	7712 <mbedtls_mpi_cmp_int>
    445a:	2800      	cmp	r0, #0
    445c:	dd41      	ble.n	44e2 <rsa_check_context.constprop.0+0xae>
        mbedtls_mpi_get_bit( &ctx->N, 0 ) == 0  )
    445e:	2100      	movs	r1, #0
    4460:	4630      	mov	r0, r6
    4462:	f002 ffbd 	bl	73e0 <mbedtls_mpi_get_bit>
    if( mbedtls_mpi_cmp_int( &ctx->N, 0 ) <= 0 ||
    4466:	b3e0      	cbz	r0, 44e2 <rsa_check_context.constprop.0+0xae>

#if !defined(MBEDTLS_RSA_NO_CRT)
    /* Modular exponentiation for P and Q is only
     * used for private key operations and if CRT
     * is used. */
    if( is_priv &&
    4468:	b945      	cbnz	r5, 447c <rsa_check_context.constprop.0+0x48>
    /*
     * 2. Exponents must be positive
     */

    /* Always need E for public key operations */
    if( mbedtls_mpi_cmp_int( &ctx->E, 0 ) <= 0 )
    446a:	4629      	mov	r1, r5
    446c:	f104 0014 	add.w	r0, r4, #20

    /* It wouldn't lead to an error if it wasn't satisfied,
     * but check for QP >= 1 nonetheless. */
#if !defined(MBEDTLS_RSA_NO_CRT)
    if( is_priv &&
        mbedtls_mpi_cmp_int( &ctx->QP, 0 ) <= 0 )
    4470:	f003 f94f 	bl	7712 <mbedtls_mpi_cmp_int>
    if( is_priv &&
    4474:	2800      	cmp	r0, #0
    4476:	dd34      	ble.n	44e2 <rsa_check_context.constprop.0+0xae>
    {
        return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA );
    }
#endif

    return( 0 );
    4478:	2000      	movs	r0, #0
}
    447a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
        ( mbedtls_mpi_cmp_int( &ctx->P, 0 ) <= 0 ||
    447c:	f104 052c 	add.w	r5, r4, #44	; 0x2c
    4480:	2100      	movs	r1, #0
    4482:	4628      	mov	r0, r5
    4484:	f003 f945 	bl	7712 <mbedtls_mpi_cmp_int>
    if( is_priv &&
    4488:	2800      	cmp	r0, #0
    448a:	dd2a      	ble.n	44e2 <rsa_check_context.constprop.0+0xae>
          mbedtls_mpi_get_bit( &ctx->P, 0 ) == 0 ||
    448c:	2100      	movs	r1, #0
    448e:	4628      	mov	r0, r5
    4490:	f002 ffa6 	bl	73e0 <mbedtls_mpi_get_bit>
        ( mbedtls_mpi_cmp_int( &ctx->P, 0 ) <= 0 ||
    4494:	b328      	cbz	r0, 44e2 <rsa_check_context.constprop.0+0xae>
          mbedtls_mpi_cmp_int( &ctx->Q, 0 ) <= 0 ||
    4496:	f104 0538 	add.w	r5, r4, #56	; 0x38
    449a:	2100      	movs	r1, #0
    449c:	4628      	mov	r0, r5
    449e:	f003 f938 	bl	7712 <mbedtls_mpi_cmp_int>
          mbedtls_mpi_get_bit( &ctx->P, 0 ) == 0 ||
    44a2:	2800      	cmp	r0, #0
    44a4:	dd1d      	ble.n	44e2 <rsa_check_context.constprop.0+0xae>
          mbedtls_mpi_get_bit( &ctx->Q, 0 ) == 0  ) )
    44a6:	2100      	movs	r1, #0
    44a8:	4628      	mov	r0, r5
    44aa:	f002 ff99 	bl	73e0 <mbedtls_mpi_get_bit>
          mbedtls_mpi_cmp_int( &ctx->Q, 0 ) <= 0 ||
    44ae:	b1c0      	cbz	r0, 44e2 <rsa_check_context.constprop.0+0xae>
    if( mbedtls_mpi_cmp_int( &ctx->E, 0 ) <= 0 )
    44b0:	2100      	movs	r1, #0
    44b2:	f104 0014 	add.w	r0, r4, #20
    44b6:	f003 f92c 	bl	7712 <mbedtls_mpi_cmp_int>
    44ba:	2800      	cmp	r0, #0
    44bc:	dd11      	ble.n	44e2 <rsa_check_context.constprop.0+0xae>
        ( mbedtls_mpi_cmp_int( &ctx->DP, 0 ) <= 0 ||
    44be:	2100      	movs	r1, #0
    44c0:	f104 0044 	add.w	r0, r4, #68	; 0x44
    44c4:	f003 f925 	bl	7712 <mbedtls_mpi_cmp_int>
    if( is_priv &&
    44c8:	2800      	cmp	r0, #0
    44ca:	dd0a      	ble.n	44e2 <rsa_check_context.constprop.0+0xae>
          mbedtls_mpi_cmp_int( &ctx->DQ, 0 ) <= 0  ) )
    44cc:	2100      	movs	r1, #0
    44ce:	f104 0050 	add.w	r0, r4, #80	; 0x50
    44d2:	f003 f91e 	bl	7712 <mbedtls_mpi_cmp_int>
        ( mbedtls_mpi_cmp_int( &ctx->DP, 0 ) <= 0 ||
    44d6:	2800      	cmp	r0, #0
    44d8:	dd03      	ble.n	44e2 <rsa_check_context.constprop.0+0xae>
        mbedtls_mpi_cmp_int( &ctx->QP, 0 ) <= 0 )
    44da:	2100      	movs	r1, #0
    44dc:	f104 005c 	add.w	r0, r4, #92	; 0x5c
    44e0:	e7c6      	b.n	4470 <rsa_check_context.constprop.0+0x3c>
        return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA );
    44e2:	4801      	ldr	r0, [pc, #4]	; (44e8 <rsa_check_context.constprop.0+0xb4>)
    44e4:	e7c9      	b.n	447a <rsa_check_context.constprop.0+0x46>
    44e6:	bf00      	nop
    44e8:	ffffbf80 	.word	0xffffbf80

000044ec <mbedtls_rsa_check_pubkey>:

/*
 * Check a public RSA key
 */
int mbedtls_rsa_check_pubkey( const mbedtls_rsa_context *ctx )
{
    44ec:	b570      	push	{r4, r5, r6, lr}
    RSA_VALIDATE_RET( ctx != NULL );

    if( rsa_check_context( ctx, 0 /* public */, 0 /* no blinding */ ) != 0 )
    44ee:	2100      	movs	r1, #0
{
    44f0:	4604      	mov	r4, r0
    if( rsa_check_context( ctx, 0 /* public */, 0 /* no blinding */ ) != 0 )
    44f2:	f7ff ff9f 	bl	4434 <rsa_check_context.constprop.0>
    44f6:	4605      	mov	r5, r0
    44f8:	b110      	cbz	r0, 4500 <mbedtls_rsa_check_pubkey+0x14>
        return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED );
    44fa:	4d0e      	ldr	r5, [pc, #56]	; (4534 <mbedtls_rsa_check_pubkey+0x48>)
    {
        return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED );
    }

    return( 0 );
}
    44fc:	4628      	mov	r0, r5
    44fe:	bd70      	pop	{r4, r5, r6, pc}
    if( mbedtls_mpi_bitlen( &ctx->N ) < 128 )
    4500:	f104 0608 	add.w	r6, r4, #8
    4504:	4630      	mov	r0, r6
    4506:	f002 ff7b 	bl	7400 <mbedtls_mpi_bitlen>
    450a:	287f      	cmp	r0, #127	; 0x7f
    450c:	d9f5      	bls.n	44fa <mbedtls_rsa_check_pubkey+0xe>
    if( mbedtls_mpi_get_bit( &ctx->E, 0 ) == 0 ||
    450e:	3414      	adds	r4, #20
    4510:	4629      	mov	r1, r5
    4512:	4620      	mov	r0, r4
    4514:	f002 ff64 	bl	73e0 <mbedtls_mpi_get_bit>
    4518:	2800      	cmp	r0, #0
    451a:	d0ee      	beq.n	44fa <mbedtls_rsa_check_pubkey+0xe>
        mbedtls_mpi_bitlen( &ctx->E )     < 2  ||
    451c:	4620      	mov	r0, r4
    451e:	f002 ff6f 	bl	7400 <mbedtls_mpi_bitlen>
    if( mbedtls_mpi_get_bit( &ctx->E, 0 ) == 0 ||
    4522:	2801      	cmp	r0, #1
    4524:	d9e9      	bls.n	44fa <mbedtls_rsa_check_pubkey+0xe>
        mbedtls_mpi_cmp_mpi( &ctx->E, &ctx->N ) >= 0 )
    4526:	4631      	mov	r1, r6
    4528:	4620      	mov	r0, r4
    452a:	f003 f8b1 	bl	7690 <mbedtls_mpi_cmp_mpi>
        mbedtls_mpi_bitlen( &ctx->E )     < 2  ||
    452e:	2800      	cmp	r0, #0
    4530:	dbe4      	blt.n	44fc <mbedtls_rsa_check_pubkey+0x10>
    4532:	e7e2      	b.n	44fa <mbedtls_rsa_check_pubkey+0xe>
    4534:	ffffbe00 	.word	0xffffbe00

00004538 <mbedtls_rsa_public>:
 * Do an RSA public key operation
 */
int mbedtls_rsa_public( mbedtls_rsa_context *ctx,
                const unsigned char *input,
                unsigned char *output )
{
    4538:	b5f0      	push	{r4, r5, r6, r7, lr}
    453a:	460c      	mov	r4, r1
    453c:	b087      	sub	sp, #28
    mbedtls_mpi T;
    RSA_VALIDATE_RET( ctx != NULL );
    RSA_VALIDATE_RET( input != NULL );
    RSA_VALIDATE_RET( output != NULL );

    if( rsa_check_context( ctx, 0 /* public */, 0 /* no blinding */ ) )
    453e:	2100      	movs	r1, #0
{
    4540:	4605      	mov	r5, r0
    4542:	4616      	mov	r6, r2
    if( rsa_check_context( ctx, 0 /* public */, 0 /* no blinding */ ) )
    4544:	f7ff ff76 	bl	4434 <rsa_check_context.constprop.0>
    4548:	2800      	cmp	r0, #0
    454a:	d139      	bne.n	45c0 <mbedtls_rsa_public+0x88>
        return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA );

    mbedtls_mpi_init( &T );
    454c:	a803      	add	r0, sp, #12
    454e:	f002 fe9d 	bl	728c <mbedtls_mpi_init>
#if defined(MBEDTLS_THREADING_C)
    if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 )
        return( ret );
#endif

    MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &T, input, ctx->len ) );
    4552:	4621      	mov	r1, r4
    4554:	686a      	ldr	r2, [r5, #4]
    4556:	a803      	add	r0, sp, #12
    4558:	f002 ff76 	bl	7448 <mbedtls_mpi_read_binary>
    455c:	4604      	mov	r4, r0
    455e:	b118      	cbz	r0, 4568 <mbedtls_rsa_public+0x30>
#if defined(MBEDTLS_THREADING_C)
    if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 )
        return( MBEDTLS_ERR_THREADING_MUTEX_ERROR );
#endif

    mbedtls_mpi_free( &T );
    4560:	a803      	add	r0, sp, #12
    4562:	f002 fe99 	bl	7298 <mbedtls_mpi_free>

    if( ret != 0 )
    4566:	e00c      	b.n	4582 <mbedtls_rsa_public+0x4a>
    if( mbedtls_mpi_cmp_mpi( &T, &ctx->N ) >= 0 )
    4568:	f105 0408 	add.w	r4, r5, #8
    456c:	4621      	mov	r1, r4
    456e:	a803      	add	r0, sp, #12
    4570:	f003 f88e 	bl	7690 <mbedtls_mpi_cmp_mpi>
    4574:	2800      	cmp	r0, #0
    4576:	db07      	blt.n	4588 <mbedtls_rsa_public+0x50>
    mbedtls_mpi_free( &T );
    4578:	a803      	add	r0, sp, #12
    457a:	f002 fe8d 	bl	7298 <mbedtls_mpi_free>
        ret = MBEDTLS_ERR_MPI_BAD_INPUT_DATA;
    457e:	f06f 0403 	mvn.w	r4, #3
        ( *mbedtls_test_hook_error_add )( high, low, file, line );
#endif
    (void)file;
    (void)line;

    return( high + low );
    4582:	f5a4 4485 	sub.w	r4, r4, #17024	; 0x4280
        return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_RSA_PUBLIC_FAILED, ret ) );
    4586:	e018      	b.n	45ba <mbedtls_rsa_public+0x82>
    MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &T, &T, &ctx->E, &ctx->N, &ctx->RN ) );
    4588:	f105 0368 	add.w	r3, r5, #104	; 0x68
    458c:	a903      	add	r1, sp, #12
    olen = ctx->len;
    458e:	686f      	ldr	r7, [r5, #4]
    MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &T, &T, &ctx->E, &ctx->N, &ctx->RN ) );
    4590:	4608      	mov	r0, r1
    4592:	9300      	str	r3, [sp, #0]
    4594:	f105 0214 	add.w	r2, r5, #20
    4598:	4623      	mov	r3, r4
    459a:	f003 fbd4 	bl	7d46 <mbedtls_mpi_exp_mod>
    459e:	4604      	mov	r4, r0
    45a0:	2800      	cmp	r0, #0
    45a2:	d1dd      	bne.n	4560 <mbedtls_rsa_public+0x28>
    MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &T, output, olen ) );
    45a4:	463a      	mov	r2, r7
    45a6:	4631      	mov	r1, r6
    45a8:	a803      	add	r0, sp, #12
    45aa:	f002 ff6e 	bl	748a <mbedtls_mpi_write_binary>
    45ae:	4604      	mov	r4, r0
    mbedtls_mpi_free( &T );
    45b0:	a803      	add	r0, sp, #12
    45b2:	f002 fe71 	bl	7298 <mbedtls_mpi_free>
    if( ret != 0 )
    45b6:	2c00      	cmp	r4, #0
    45b8:	d1e3      	bne.n	4582 <mbedtls_rsa_public+0x4a>

    return( 0 );
}
    45ba:	4620      	mov	r0, r4
    45bc:	b007      	add	sp, #28
    45be:	bdf0      	pop	{r4, r5, r6, r7, pc}
        return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA );
    45c0:	4c00      	ldr	r4, [pc, #0]	; (45c4 <mbedtls_rsa_public+0x8c>)
    45c2:	e7fa      	b.n	45ba <mbedtls_rsa_public+0x82>
    45c4:	ffffbf80 	.word	0xffffbf80

000045c8 <mbedtls_sha256_starts>:
#endif

    ctx->total[0] = 0;
    ctx->total[1] = 0;

    if( is224 == 0 )
    45c8:	4a23      	ldr	r2, [pc, #140]	; (4658 <mbedtls_sha256_starts+0x90>)
{
    45ca:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    if( is224 == 0 )
    45ce:	f1b1 0800 	subs.w	r8, r1, #0
    45d2:	bf18      	it	ne
    45d4:	4696      	movne	lr, r2
    45d6:	4a21      	ldr	r2, [pc, #132]	; (465c <mbedtls_sha256_starts+0x94>)
    45d8:	4921      	ldr	r1, [pc, #132]	; (4660 <mbedtls_sha256_starts+0x98>)
    45da:	bf18      	it	ne
    45dc:	4694      	movne	ip, r2
    45de:	f102 4279 	add.w	r2, r2, #4177526784	; 0xf9000000
    45e2:	bf08      	it	eq
    45e4:	468e      	moveq	lr, r1
    45e6:	f502 0274 	add.w	r2, r2, #15990784	; 0xf40000
    45ea:	491e      	ldr	r1, [pc, #120]	; (4664 <mbedtls_sha256_starts+0x9c>)
    45ec:	f502 6201 	add.w	r2, r2, #2064	; 0x810
    45f0:	bf08      	it	eq
    45f2:	468c      	moveq	ip, r1
    45f4:	491c      	ldr	r1, [pc, #112]	; (4668 <mbedtls_sha256_starts+0xa0>)
    45f6:	bf18      	it	ne
    45f8:	4611      	movne	r1, r2
    45fa:	4a1c      	ldr	r2, [pc, #112]	; (466c <mbedtls_sha256_starts+0xa4>)
    45fc:	4f1c      	ldr	r7, [pc, #112]	; (4670 <mbedtls_sha256_starts+0xa8>)
    45fe:	bf18      	it	ne
    4600:	4617      	movne	r7, r2
    4602:	4a1c      	ldr	r2, [pc, #112]	; (4674 <mbedtls_sha256_starts+0xac>)
    4604:	4e1c      	ldr	r6, [pc, #112]	; (4678 <mbedtls_sha256_starts+0xb0>)
    4606:	bf18      	it	ne
    4608:	4616      	movne	r6, r2
    460a:	f102 42d1 	add.w	r2, r2, #1753219072	; 0x68800000
    460e:	f502 12c0 	add.w	r2, r2, #1572864	; 0x180000
    4612:	f502 621e 	add.w	r2, r2, #2528	; 0x9e0
    4616:	4d19      	ldr	r5, [pc, #100]	; (467c <mbedtls_sha256_starts+0xb4>)
    4618:	bf18      	it	ne
    461a:	4615      	movne	r5, r2
    461c:	4a18      	ldr	r2, [pc, #96]	; (4680 <mbedtls_sha256_starts+0xb8>)
{
    461e:	4603      	mov	r3, r0
    if( is224 == 0 )
    4620:	4c18      	ldr	r4, [pc, #96]	; (4684 <mbedtls_sha256_starts+0xbc>)
    4622:	4819      	ldr	r0, [pc, #100]	; (4688 <mbedtls_sha256_starts+0xc0>)
    4624:	bf18      	it	ne
    4626:	4614      	movne	r4, r2
    4628:	f1a2 6211 	sub.w	r2, r2, #152043520	; 0x9100000
    462c:	f5a2 220c 	sub.w	r2, r2, #573440	; 0x8c000
    4630:	f2a2 228e 	subw	r2, r2, #654	; 0x28e
    4634:	bf18      	it	ne
    4636:	4602      	movne	r2, r0
    ctx->total[0] = 0;
    4638:	2000      	movs	r0, #0
    {
        /* SHA-256 */
        ctx->state[0] = 0x6A09E667;
        ctx->state[1] = 0xBB67AE85;
    463a:	e9c3 ec02 	strd	lr, ip, [r3, #8]
    ctx->total[1] = 0;
    463e:	e9c3 0000 	strd	r0, r0, [r3]
        ctx->state[2] = 0x3C6EF372;
        ctx->state[3] = 0xA54FF53A;
    4642:	e9c3 1704 	strd	r1, r7, [r3, #16]
        ctx->state[4] = 0x510E527F;
        ctx->state[5] = 0x9B05688C;
    4646:	e9c3 6506 	strd	r6, r5, [r3, #24]
        ctx->state[6] = 0x1F83D9AB;
        ctx->state[7] = 0x5BE0CD19;
    464a:	e9c3 4208 	strd	r4, r2, [r3, #32]
        ctx->state[6] = 0x64F98FA7;
        ctx->state[7] = 0xBEFA4FA4;
#endif
    }

    ctx->is224 = is224;
    464e:	f8c3 8068 	str.w	r8, [r3, #104]	; 0x68

    return( 0 );
}
    4652:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    4656:	bf00      	nop
    4658:	c1059ed8 	.word	0xc1059ed8
    465c:	367cd507 	.word	0x367cd507
    4660:	6a09e667 	.word	0x6a09e667
    4664:	bb67ae85 	.word	0xbb67ae85
    4668:	3c6ef372 	.word	0x3c6ef372
    466c:	f70e5939 	.word	0xf70e5939
    4670:	a54ff53a 	.word	0xa54ff53a
    4674:	ffc00b31 	.word	0xffc00b31
    4678:	510e527f 	.word	0x510e527f
    467c:	9b05688c 	.word	0x9b05688c
    4680:	64f98fa7 	.word	0x64f98fa7
    4684:	1f83d9ab 	.word	0x1f83d9ab
    4688:	befa4fa4 	.word	0xbefa4fa4

0000468c <mbedtls_internal_sha256_process>:
        (d) += local.temp1; (h) = local.temp1 + local.temp2;        \
    } while( 0 )

int mbedtls_internal_sha256_process( mbedtls_sha256_context *ctx,
                                const unsigned char data[64] )
{
    468c:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    4690:	b0d1      	sub	sp, #324	; 0x144
    4692:	f50d 7b8e 	add.w	fp, sp, #284	; 0x11c
    4696:	465a      	mov	r2, fp
    4698:	1d03      	adds	r3, r0, #4
    469a:	9301      	str	r3, [sp, #4]
    469c:	f100 0324 	add.w	r3, r0, #36	; 0x24
    46a0:	9303      	str	r3, [sp, #12]
    46a2:	9b01      	ldr	r3, [sp, #4]

    SHA256_VALIDATE_RET( ctx != NULL );
    SHA256_VALIDATE_RET( (const unsigned char *)data != NULL );

    for( i = 0; i < 8; i++ )
        local.A[i] = ctx->state[i];
    46a4:	f853 0f04 	ldr.w	r0, [r3, #4]!
    46a8:	f842 0f04 	str.w	r0, [r2, #4]!
    for( i = 0; i < 8; i++ )
    46ac:	9803      	ldr	r0, [sp, #12]
    46ae:	4298      	cmp	r0, r3
    46b0:	d1f8      	bne.n	46a4 <mbedtls_internal_sha256_process+0x18>
    46b2:	e9dd 0748 	ldrd	r0, r7, [sp, #288]	; 0x120

#if defined(MBEDTLS_SHA256_SMALLER)
    for( i = 0; i < 64; i++ )
    46b6:	f04f 0900 	mov.w	r9, #0
    46ba:	9b4f      	ldr	r3, [sp, #316]	; 0x13c
    46bc:	ad4c      	add	r5, sp, #304	; 0x130
    46be:	9302      	str	r3, [sp, #8]
    46c0:	e9dd e34a 	ldrd	lr, r3, [sp, #296]	; 0x128
    46c4:	9304      	str	r3, [sp, #16]
    46c6:	4b42      	ldr	r3, [pc, #264]	; (47d0 <mbedtls_internal_sha256_process+0x144>)
    46c8:	aa06      	add	r2, sp, #24
    46ca:	9305      	str	r3, [sp, #20]
    46cc:	e895 1120 	ldmia.w	r5, {r5, r8, ip}
    {
        if( i < 16 )
    46d0:	f1b9 0f0f 	cmp.w	r9, #15
    46d4:	d863      	bhi.n	479e <mbedtls_internal_sha256_process+0x112>
            local.W[i] = MBEDTLS_GET_UINT32_BE( data, 4 * i );
    46d6:	784c      	ldrb	r4, [r1, #1]
    46d8:	780b      	ldrb	r3, [r1, #0]
    46da:	0424      	lsls	r4, r4, #16
    46dc:	ea44 6403 	orr.w	r4, r4, r3, lsl #24
    46e0:	78cb      	ldrb	r3, [r1, #3]
    46e2:	4323      	orrs	r3, r4
    46e4:	788c      	ldrb	r4, [r1, #2]
    46e6:	ea43 2304 	orr.w	r3, r3, r4, lsl #8
        else
            R( i );

        P( local.A[0], local.A[1], local.A[2], local.A[3], local.A[4],
    46ea:	ea4f 2af5 	mov.w	sl, r5, ror #11
    46ee:	ea8c 0408 	eor.w	r4, ip, r8
    46f2:	9e05      	ldr	r6, [sp, #20]
    46f4:	ea8a 1ab5 	eor.w	sl, sl, r5, ror #6
    46f8:	402c      	ands	r4, r5
    46fa:	ea8a 6a75 	eor.w	sl, sl, r5, ror #25
    46fe:	ea84 040c 	eor.w	r4, r4, ip
    4702:	4454      	add	r4, sl
    4704:	f856 ab04 	ldr.w	sl, [r6], #4
    4708:	6093      	str	r3, [r2, #8]
    470a:	4454      	add	r4, sl
    470c:	4423      	add	r3, r4
    470e:	9c02      	ldr	r4, [sp, #8]
    4710:	ea4f 3a70 	mov.w	sl, r0, ror #13
    4714:	4423      	add	r3, r4
    4716:	ea40 0407 	orr.w	r4, r0, r7
    471a:	9605      	str	r6, [sp, #20]
    471c:	ea8a 0ab0 	eor.w	sl, sl, r0, ror #2
    4720:	ea04 040e 	and.w	r4, r4, lr
    4724:	ea00 0607 	and.w	r6, r0, r7
    4728:	ea8a 5ab0 	eor.w	sl, sl, r0, ror #22
    472c:	4334      	orrs	r4, r6
    472e:	4454      	add	r4, sl
    for( i = 0; i < 64; i++ )
    4730:	f109 0901 	add.w	r9, r9, #1
        P( local.A[0], local.A[1], local.A[2], local.A[3], local.A[4],
    4734:	f8dd a010 	ldr.w	sl, [sp, #16]
    for( i = 0; i < 64; i++ )
    4738:	f1b9 0f40 	cmp.w	r9, #64	; 0x40
        P( local.A[0], local.A[1], local.A[2], local.A[3], local.A[4],
    473c:	449a      	add	sl, r3
    for( i = 0; i < 64; i++ )
    473e:	f102 0204 	add.w	r2, r2, #4
        P( local.A[0], local.A[1], local.A[2], local.A[3], local.A[4],
    4742:	4423      	add	r3, r4
    for( i = 0; i < 64; i++ )
    4744:	f101 0104 	add.w	r1, r1, #4
    4748:	f8cd c008 	str.w	ip, [sp, #8]
    474c:	f8cd e010 	str.w	lr, [sp, #16]
    4750:	d11e      	bne.n	4790 <mbedtls_internal_sha256_process+0x104>
    4752:	e9cd 3406 	strd	r3, r4, [sp, #24]
    4756:	e9cd 8c4e 	strd	r8, ip, [sp, #312]	; 0x138
    475a:	e9cd a54c 	strd	sl, r5, [sp, #304]	; 0x130
    475e:	e9cd 7e4a 	strd	r7, lr, [sp, #296]	; 0x128
    4762:	e9cd 3048 	strd	r3, r0, [sp, #288]	; 0x120
           local.A[6], local.A[7], local.A[0], R(i+7), K[i+7] );
    }
#endif /* MBEDTLS_SHA256_SMALLER */

    for( i = 0; i < 8; i++ )
        ctx->state[i] += local.A[i];
    4766:	9a01      	ldr	r2, [sp, #4]
    4768:	f852 3f04 	ldr.w	r3, [r2, #4]!
    476c:	9201      	str	r2, [sp, #4]
    476e:	f85b 2f04 	ldr.w	r2, [fp, #4]!
    4772:	4413      	add	r3, r2
    4774:	9a01      	ldr	r2, [sp, #4]
    4776:	6013      	str	r3, [r2, #0]
    for( i = 0; i < 8; i++ )
    4778:	9b03      	ldr	r3, [sp, #12]
    477a:	4293      	cmp	r3, r2
    477c:	d1f3      	bne.n	4766 <mbedtls_internal_sha256_process+0xda>

    /* Zeroise buffers and variables to clear sensitive data from memory. */
    mbedtls_platform_zeroize( &local, sizeof( local ) );
    477e:	a806      	add	r0, sp, #24
    4780:	f44f 7194 	mov.w	r1, #296	; 0x128
    4784:	f000 feba 	bl	54fc <mbedtls_platform_zeroize>

    return( 0 );
}
    4788:	2000      	movs	r0, #0
    478a:	b051      	add	sp, #324	; 0x144
    478c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    4790:	46be      	mov	lr, r7
    4792:	46c4      	mov	ip, r8
    4794:	4607      	mov	r7, r0
    4796:	46a8      	mov	r8, r5
        P( local.A[0], local.A[1], local.A[2], local.A[3], local.A[4],
    4798:	4618      	mov	r0, r3
    479a:	4655      	mov	r5, sl
    479c:	e798      	b.n	46d0 <mbedtls_internal_sha256_process+0x44>
            R( i );
    479e:	6813      	ldr	r3, [r2, #0]
    47a0:	f852 4c38 	ldr.w	r4, [r2, #-56]
    47a4:	ea4f 4af3 	mov.w	sl, r3, ror #19
    47a8:	ea8a 4a73 	eor.w	sl, sl, r3, ror #17
    47ac:	ea8a 2a93 	eor.w	sl, sl, r3, lsr #10
    47b0:	f852 3c14 	ldr.w	r3, [r2, #-20]
    47b4:	f852 6c34 	ldr.w	r6, [r2, #-52]
    47b8:	4423      	add	r3, r4
    47ba:	f852 4c34 	ldr.w	r4, [r2, #-52]
    47be:	4453      	add	r3, sl
    47c0:	ea4f 44b4 	mov.w	r4, r4, ror #18
    47c4:	ea84 14f6 	eor.w	r4, r4, r6, ror #7
    47c8:	ea84 04d6 	eor.w	r4, r4, r6, lsr #3
    47cc:	4423      	add	r3, r4
    47ce:	e78c      	b.n	46ea <mbedtls_internal_sha256_process+0x5e>
    47d0:	00008c00 	.word	0x00008c00

000047d4 <SystemInit>:
{
    SystemCoreClock = __SYSTEM_CLOCK;
}

void SystemInit(void)
{
    47d4:	b508      	push	{r3, lr}
        #if defined (NRF9160_XXAA) || defined (DEVELOP_IN_NRF9160)
            #if defined(NRF_TRUSTZONE_NONSECURE)
                uint32_t var1 = *((volatile uint32_t *)((uint32_t)NRF_FICR_NS + 0x00000130ul));
                uint32_t var2 = *((volatile uint32_t *)((uint32_t)NRF_FICR_NS + 0x00000134ul));
            #else
                uint32_t var1 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000130ul));
    47d6:	f44f 037f 	mov.w	r3, #16711680	; 0xff0000
    47da:	f8d3 2130 	ldr.w	r2, [r3, #304]	; 0x130
                uint32_t var2 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000134ul));
    47de:	f8d3 3134 	ldr.w	r3, [r3, #308]	; 0x134
  __ASM volatile ("dsb 0xF":::"memory");
    47e2:	f3bf 8f4f 	dsb	sy
            #endif
        #endif
        #if defined (NRF9160_XXAA) || defined (DEVELOP_IN_NRF9160)
            __DSB();
            if (var1 == 0x09)
    47e6:	2a09      	cmp	r2, #9
        #endif
        
        /* Workaround for Errata 6 "POWER: SLEEPENTER and SLEEPEXIT events asserted after pin reset" found at the Errata document
            for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf91_errata_6()){
            NRF_POWER_S->EVENTS_SLEEPENTER = (POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_NotGenerated << POWER_EVENTS_SLEEPENTER_EVENTS_SLEEPENTER_Pos);
    47e8:	bf01      	itttt	eq
    47ea:	f04f 2350 	moveq.w	r3, #1342197760	; 0x50005000
    47ee:	2200      	moveq	r2, #0
    47f0:	f8c3 2114 	streq.w	r2, [r3, #276]	; 0x114
            NRF_POWER_S->EVENTS_SLEEPEXIT = (POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_NotGenerated << POWER_EVENTS_SLEEPEXIT_EVENTS_SLEEPEXIT_Pos);
    47f4:	f8c3 2118 	streq.w	r2, [r3, #280]	; 0x118
        }

        /* Workaround for Errata 14 "REGULATORS: LDO mode at startup" found at the Errata document
            for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf91_errata_14()){
    47f8:	f003 fe5a 	bl	84b0 <nrf91_errata_14>
    47fc:	b128      	cbz	r0, 480a <SystemInit+0x36>
            *((volatile uint32_t *)0x50004A38) = 0x01ul;
    47fe:	2201      	movs	r2, #1
    4800:	4b4d      	ldr	r3, [pc, #308]	; (4938 <SystemInit+0x164>)
    4802:	f8c3 2a38 	str.w	r2, [r3, #2616]	; 0xa38
            NRF_REGULATORS_S->DCDCEN = REGULATORS_DCDCEN_DCDCEN_Enabled << REGULATORS_DCDCEN_DCDCEN_Pos;
    4806:	f8c3 2578 	str.w	r2, [r3, #1400]	; 0x578
        #if defined (NRF9160_XXAA) || defined (DEVELOP_IN_NRF9160)
            #if defined(NRF_TRUSTZONE_NONSECURE)
                uint32_t var1 = *((volatile uint32_t *)((uint32_t)NRF_FICR_NS + 0x00000130ul));
                uint32_t var2 = *((volatile uint32_t *)((uint32_t)NRF_FICR_NS + 0x00000134ul));
            #else
                uint32_t var1 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000130ul));
    480a:	f44f 037f 	mov.w	r3, #16711680	; 0xff0000
    480e:	f8d3 2130 	ldr.w	r2, [r3, #304]	; 0x130
                uint32_t var2 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000134ul));
    4812:	f8d3 3134 	ldr.w	r3, [r3, #308]	; 0x134
    4816:	f3bf 8f4f 	dsb	sy
            #endif
        #endif
        #if defined (NRF9160_XXAA) || defined (DEVELOP_IN_NRF9160)
            __DSB();
            if (var1 == 0x09)
    481a:	2a09      	cmp	r2, #9
    481c:	d105      	bne.n	482a <SystemInit+0x56>
            {
                switch(var2)
    481e:	2b01      	cmp	r3, #1
        }

        /* Workaround for Errata 15 "REGULATORS: LDO mode at startup" found at the Errata document
            for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf91_errata_15()){
            NRF_REGULATORS_S->DCDCEN = REGULATORS_DCDCEN_DCDCEN_Enabled << REGULATORS_DCDCEN_DCDCEN_Pos;
    4820:	bf1e      	ittt	ne
    4822:	2201      	movne	r2, #1
    4824:	4b44      	ldrne	r3, [pc, #272]	; (4938 <SystemInit+0x164>)
    4826:	f8c3 2578 	strne.w	r2, [r3, #1400]	; 0x578
        }

        /* Workaround for Errata 20 "RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
            for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf91_errata_20()){
    482a:	f003 fe41 	bl	84b0 <nrf91_errata_14>
    482e:	b118      	cbz	r0, 4838 <SystemInit+0x64>
            *((volatile uint32_t *)0x5003AEE4) = 0xE;
    4830:	220e      	movs	r2, #14
    4832:	4b42      	ldr	r3, [pc, #264]	; (493c <SystemInit+0x168>)
    4834:	f8c3 2ee4 	str.w	r2, [r3, #3812]	; 0xee4
                uint32_t var1 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000130ul));
    4838:	f44f 037f 	mov.w	r3, #16711680	; 0xff0000
    483c:	f8d3 2130 	ldr.w	r2, [r3, #304]	; 0x130
                uint32_t var2 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000134ul));
    4840:	f8d3 3134 	ldr.w	r3, [r3, #308]	; 0x134
    4844:	f3bf 8f4f 	dsb	sy
            if (var1 == 0x09)
    4848:	2a09      	cmp	r2, #9
    484a:	d106      	bne.n	485a <SystemInit+0x86>
        }

        /* Workaround for Errata 31 "XOSC32k Startup Failure" found at the Errata document
            for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf91_errata_31()){
            *((volatile uint32_t *)0x5000470Cul) = 0x0;
    484c:	2200      	movs	r2, #0
    484e:	4b3a      	ldr	r3, [pc, #232]	; (4938 <SystemInit+0x164>)
    4850:	f8c3 270c 	str.w	r2, [r3, #1804]	; 0x70c
            *((volatile uint32_t *)0x50004710ul) = 0x1;
    4854:	2201      	movs	r2, #1
    4856:	f8c3 2710 	str.w	r2, [r3, #1808]	; 0x710
{
    485a:	2200      	movs	r2, #0
    485c:	00d3      	lsls	r3, r2, #3
        #endif

        /* Trimming of the device. Copy all the trimming values from FICR into the target addresses. Trim
         until one ADDR is not initialized. */
        
        for (uint32_t index = 0; index < 256ul && !is_empty_word(&NRF_FICR_S->TRIMCNF[index].ADDR); index++){
    485e:	f503 037f 	add.w	r3, r3, #16711680	; 0xff0000
        return false;
    }
    
    bool is_empty_word(uint32_t const volatile * word)
    {
        uint32_t val = *word;
    4862:	f8d3 1300 	ldr.w	r1, [r3, #768]	; 0x300
    4866:	f3bf 8f4f 	dsb	sy
        for (uint32_t index = 0; index < 256ul && !is_empty_word(&NRF_FICR_S->TRIMCNF[index].ADDR); index++){
    486a:	3101      	adds	r1, #1
    486c:	d008      	beq.n	4880 <SystemInit+0xac>
          *(volatile uint32_t *)NRF_FICR_S->TRIMCNF[index].ADDR = NRF_FICR_S->TRIMCNF[index].DATA;
    486e:	f8d3 1300 	ldr.w	r1, [r3, #768]	; 0x300
        for (uint32_t index = 0; index < 256ul && !is_empty_word(&NRF_FICR_S->TRIMCNF[index].ADDR); index++){
    4872:	3201      	adds	r2, #1
          *(volatile uint32_t *)NRF_FICR_S->TRIMCNF[index].ADDR = NRF_FICR_S->TRIMCNF[index].DATA;
    4874:	f8d3 3304 	ldr.w	r3, [r3, #772]	; 0x304
        for (uint32_t index = 0; index < 256ul && !is_empty_word(&NRF_FICR_S->TRIMCNF[index].ADDR); index++){
    4878:	f5b2 7f80 	cmp.w	r2, #256	; 0x100
          *(volatile uint32_t *)NRF_FICR_S->TRIMCNF[index].ADDR = NRF_FICR_S->TRIMCNF[index].DATA;
    487c:	600b      	str	r3, [r1, #0]
        for (uint32_t index = 0; index < 256ul && !is_empty_word(&NRF_FICR_S->TRIMCNF[index].ADDR); index++){
    487e:	d1ed      	bne.n	485c <SystemInit+0x88>
        uint32_t HFXOSRC_readout = NRF_UICR_S->HFXOSRC;
    4880:	4b2f      	ldr	r3, [pc, #188]	; (4940 <SystemInit+0x16c>)
    4882:	69da      	ldr	r2, [r3, #28]
    4884:	f3bf 8f4f 	dsb	sy
        if ((HFXOSRC_readout & UICR_HFXOSRC_HFXOSRC_Msk) != UICR_HFXOSRC_HFXOSRC_TCXO) {
    4888:	07d1      	lsls	r1, r2, #31
    488a:	d545      	bpl.n	4918 <SystemInit+0x144>
    488c:	f3bf 8f4f 	dsb	sy
            while (NRF_NVMC_S->READY != NVMC_READY_READY_Ready);
    4890:	4b2c      	ldr	r3, [pc, #176]	; (4944 <SystemInit+0x170>)
    4892:	f8d3 2400 	ldr.w	r2, [r3, #1024]	; 0x400
    4896:	2a01      	cmp	r2, #1
    4898:	d1fb      	bne.n	4892 <SystemInit+0xbe>
            NRF_NVMC_S->CONFIG = NVMC_CONFIG_WEN_Wen;
    489a:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
            while (NRF_NVMC_S->READY != NVMC_READY_READY_Ready);
    489e:	f8d3 2400 	ldr.w	r2, [r3, #1024]	; 0x400
    48a2:	2a01      	cmp	r2, #1
    48a4:	d1fb      	bne.n	489e <SystemInit+0xca>
        uint32_t HFXOSRC_readout = NRF_UICR_S->HFXOSRC;
    48a6:	4b26      	ldr	r3, [pc, #152]	; (4940 <SystemInit+0x16c>)
    48a8:	69da      	ldr	r2, [r3, #28]
    48aa:	f3bf 8f4f 	dsb	sy
        if ((HFXOSRC_readout & UICR_HFXOSRC_HFXOSRC_Msk) != UICR_HFXOSRC_HFXOSRC_TCXO) {
    48ae:	07d2      	lsls	r2, r2, #31
    48b0:	d50a      	bpl.n	48c8 <SystemInit+0xf4>
                  uicr_erased_value = NRF_UICR_S->HFXOSRC;
    48b2:	69da      	ldr	r2, [r3, #28]
                  uicr_new_value = (uicr_erased_value & ~UICR_HFXOSRC_HFXOSRC_Msk) | UICR_HFXOSRC_HFXOSRC_TCXO;
    48b4:	f022 0201 	bic.w	r2, r2, #1
                  NRF_UICR_S->HFXOSRC = uicr_new_value;
    48b8:	61da      	str	r2, [r3, #28]
    48ba:	f3bf 8f4f 	dsb	sy
                  while (NRF_NVMC_S->READY != NVMC_READY_READY_Ready);
    48be:	4a21      	ldr	r2, [pc, #132]	; (4944 <SystemInit+0x170>)
    48c0:	f8d2 3400 	ldr.w	r3, [r2, #1024]	; 0x400
    48c4:	2b01      	cmp	r3, #1
    48c6:	d1fb      	bne.n	48c0 <SystemInit+0xec>
        uint32_t val = *word;
    48c8:	4a1d      	ldr	r2, [pc, #116]	; (4940 <SystemInit+0x16c>)
    48ca:	6a13      	ldr	r3, [r2, #32]
    48cc:	f3bf 8f4f 	dsb	sy
        if (is_empty_word(&NRF_UICR_S->HFXOCNT)) {
    48d0:	3301      	adds	r3, #1
    48d2:	d10c      	bne.n	48ee <SystemInit+0x11a>
                  uicr_erased_value = NRF_UICR_S->HFXOCNT;
    48d4:	6a13      	ldr	r3, [r2, #32]
                  uicr_new_value = (uicr_erased_value & ~UICR_HFXOCNT_HFXOCNT_Msk) | 0x20;
    48d6:	f023 03ff 	bic.w	r3, r3, #255	; 0xff
    48da:	f043 0320 	orr.w	r3, r3, #32
                  NRF_UICR_S->HFXOCNT = uicr_new_value;
    48de:	6213      	str	r3, [r2, #32]
    48e0:	f3bf 8f4f 	dsb	sy
                  while (NRF_NVMC_S->READY != NVMC_READY_READY_Ready);
    48e4:	4a17      	ldr	r2, [pc, #92]	; (4944 <SystemInit+0x170>)
    48e6:	f8d2 3400 	ldr.w	r3, [r2, #1024]	; 0x400
    48ea:	2b01      	cmp	r3, #1
    48ec:	d1fb      	bne.n	48e6 <SystemInit+0x112>
            NRF_NVMC_S->CONFIG = NVMC_CONFIG_WEN_Ren;
    48ee:	2200      	movs	r2, #0
    48f0:	4b14      	ldr	r3, [pc, #80]	; (4944 <SystemInit+0x170>)
    48f2:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
            while (NRF_NVMC_S->READY != NVMC_READY_READY_Ready);
    48f6:	f8d3 2400 	ldr.w	r2, [r3, #1024]	; 0x400
    48fa:	2a01      	cmp	r2, #1
    48fc:	d1fb      	bne.n	48f6 <SystemInit+0x122>
    48fe:	f3bf 8f4f 	dsb	sy
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
    4902:	4911      	ldr	r1, [pc, #68]	; (4948 <SystemInit+0x174>)
    4904:	4b11      	ldr	r3, [pc, #68]	; (494c <SystemInit+0x178>)
    4906:	68ca      	ldr	r2, [r1, #12]
    4908:	f402 62e0 	and.w	r2, r2, #1792	; 0x700
    490c:	4313      	orrs	r3, r2
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
    490e:	60cb      	str	r3, [r1, #12]
    4910:	f3bf 8f4f 	dsb	sy
    __NOP();
    4914:	bf00      	nop
  for(;;)                                                           /* wait until reset */
    4916:	e7fd      	b.n	4914 <SystemInit+0x140>
        uint32_t val = *word;
    4918:	6a1b      	ldr	r3, [r3, #32]
    491a:	f3bf 8f4f 	dsb	sy
        if (is_empty_word(&NRF_UICR_S->HFXOCNT)) {
    491e:	3301      	adds	r3, #1
    4920:	d0b4      	beq.n	488c <SystemInit+0xb8>
        SCB->NSACR |= (3UL << 10);
    4922:	4a09      	ldr	r2, [pc, #36]	; (4948 <SystemInit+0x174>)
    4924:	f8d2 308c 	ldr.w	r3, [r2, #140]	; 0x8c
    4928:	f443 6340 	orr.w	r3, r3, #3072	; 0xc00
    492c:	f8c2 308c 	str.w	r3, [r2, #140]	; 0x8c
    SystemCoreClock = __SYSTEM_CLOCK;
    4930:	4b07      	ldr	r3, [pc, #28]	; (4950 <SystemInit+0x17c>)
    4932:	4a08      	ldr	r2, [pc, #32]	; (4954 <SystemInit+0x180>)
    4934:	601a      	str	r2, [r3, #0]
}
    4936:	bd08      	pop	{r3, pc}
    4938:	50004000 	.word	0x50004000
    493c:	5003a000 	.word	0x5003a000
    4940:	00ff8000 	.word	0x00ff8000
    4944:	50039000 	.word	0x50039000
    4948:	e000ed00 	.word	0xe000ed00
    494c:	05fa0004 	.word	0x05fa0004
    4950:	2000c56c 	.word	0x2000c56c
    4954:	03d09000 	.word	0x03d09000

00004958 <nrfx_flag32_alloc>:
{
    return (mask & NRFX_BIT(bitpos)) ? false : true;
}

nrfx_err_t nrfx_flag32_alloc(nrfx_atomic_t * p_mask, uint8_t *p_flag)
{
    4958:	b570      	push	{r4, r5, r6, lr}
        idx = 31 - NRF_CLZ(prev_mask);
        if (idx < 0) {
            return NRFX_ERROR_NO_MEM;
        }

        new_mask = prev_mask & ~NRFX_BIT(idx);
    495a:	2501      	movs	r5, #1
        prev_mask = *p_mask;
    495c:	6802      	ldr	r2, [r0, #0]
        idx = 31 - NRF_CLZ(prev_mask);
    495e:	fab2 f382 	clz	r3, r2
    4962:	f1c3 031f 	rsb	r3, r3, #31
    4966:	b2db      	uxtb	r3, r3
        new_mask = prev_mask & ~NRFX_BIT(idx);
    4968:	fa05 f403 	lsl.w	r4, r5, r3
    496c:	ea22 0404 	bic.w	r4, r2, r4
	return __atomic_compare_exchange_n(target, &old_value, new_value,
    4970:	e8d0 6fef 	ldaex	r6, [r0]
    4974:	4296      	cmp	r6, r2
    4976:	d104      	bne.n	4982 <nrfx_flag32_alloc+0x2a>
    4978:	e8c0 4fec 	stlex	ip, r4, [r0]
    497c:	f1bc 0f00 	cmp.w	ip, #0
    4980:	d1f6      	bne.n	4970 <nrfx_flag32_alloc+0x18>
    } while (!NRFX_ATOMIC_CAS(p_mask, prev_mask, new_mask));
    4982:	d1eb      	bne.n	495c <nrfx_flag32_alloc+0x4>

    *p_flag = idx;

    return NRFX_SUCCESS;
}
    4984:	4801      	ldr	r0, [pc, #4]	; (498c <nrfx_flag32_alloc+0x34>)
    *p_flag = idx;
    4986:	700b      	strb	r3, [r1, #0]
}
    4988:	bd70      	pop	{r4, r5, r6, pc}
    498a:	bf00      	nop
    498c:	0bad0000 	.word	0x0bad0000

00004990 <nrfx_flag32_free>:

nrfx_err_t nrfx_flag32_free(nrfx_atomic_t * p_mask, uint8_t flag)
{
    4990:	b510      	push	{r4, lr}
    uint32_t new_mask, prev_mask;

    if ((NRFX_BIT(flag) & *p_mask))
    4992:	6803      	ldr	r3, [r0, #0]
    4994:	40cb      	lsrs	r3, r1
    4996:	07db      	lsls	r3, r3, #31
    4998:	d410      	bmi.n	49bc <nrfx_flag32_free+0x2c>
        return NRFX_ERROR_INVALID_PARAM;
    }

    do {
        prev_mask = *p_mask;
        new_mask = prev_mask | NRFX_BIT(flag);
    499a:	2301      	movs	r3, #1
    499c:	408b      	lsls	r3, r1
        prev_mask = *p_mask;
    499e:	6802      	ldr	r2, [r0, #0]
        new_mask = prev_mask | NRFX_BIT(flag);
    49a0:	ea43 0102 	orr.w	r1, r3, r2
    49a4:	e8d0 4fef 	ldaex	r4, [r0]
    49a8:	4294      	cmp	r4, r2
    49aa:	d104      	bne.n	49b6 <nrfx_flag32_free+0x26>
    49ac:	e8c0 1fec 	stlex	ip, r1, [r0]
    49b0:	f1bc 0f00 	cmp.w	ip, #0
    49b4:	d1f6      	bne.n	49a4 <nrfx_flag32_free+0x14>
    } while (!NRFX_ATOMIC_CAS(p_mask, prev_mask, new_mask));
    49b6:	d1f2      	bne.n	499e <nrfx_flag32_free+0xe>

    return NRFX_SUCCESS;
    49b8:	4801      	ldr	r0, [pc, #4]	; (49c0 <nrfx_flag32_free+0x30>)
}
    49ba:	bd10      	pop	{r4, pc}
        return NRFX_ERROR_INVALID_PARAM;
    49bc:	4801      	ldr	r0, [pc, #4]	; (49c4 <nrfx_flag32_free+0x34>)
    49be:	e7fc      	b.n	49ba <nrfx_flag32_free+0x2a>
    49c0:	0bad0000 	.word	0x0bad0000
    49c4:	0bad0004 	.word	0x0bad0004

000049c8 <nrfx_clock_init>:
nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler)
{
    NRFX_ASSERT(event_handler);

    nrfx_err_t err_code = NRFX_SUCCESS;
    if (m_clock_cb.module_initialized)
    49c8:	4b04      	ldr	r3, [pc, #16]	; (49dc <nrfx_clock_init+0x14>)
    49ca:	791a      	ldrb	r2, [r3, #4]
    49cc:	b922      	cbnz	r2, 49d8 <nrfx_clock_init+0x10>
    {
#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
        m_clock_cb.cal_state = CAL_STATE_IDLE;
#endif
        m_clock_cb.event_handler = event_handler;
        m_clock_cb.module_initialized = true;
    49ce:	2201      	movs	r2, #1
        m_clock_cb.event_handler = event_handler;
    49d0:	6018      	str	r0, [r3, #0]
        m_clock_cb.module_initialized = true;
    49d2:	711a      	strb	r2, [r3, #4]
    nrfx_err_t err_code = NRFX_SUCCESS;
    49d4:	4802      	ldr	r0, [pc, #8]	; (49e0 <nrfx_clock_init+0x18>)
    49d6:	4770      	bx	lr
        err_code = NRFX_ERROR_ALREADY_INITIALIZED;
    49d8:	4802      	ldr	r0, [pc, #8]	; (49e4 <nrfx_clock_init+0x1c>)
#endif
    }

    NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
    return err_code;
}
    49da:	4770      	bx	lr
    49dc:	2000e06c 	.word	0x2000e06c
    49e0:	0bad0000 	.word	0x0bad0000
    49e4:	0bad000c 	.word	0x0bad000c

000049e8 <nrfx_power_clock_irq_handler>:
    return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + event));
    49e8:	f04f 2350 	mov.w	r3, #1342197760	; 0x50005000
    }
}
#endif

void nrfx_clock_irq_handler(void)
{
    49ec:	b510      	push	{r4, lr}
    49ee:	f8d3 2100 	ldr.w	r2, [r3, #256]	; 0x100
    if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED))
    49f2:	b152      	cbz	r2, 4a0a <nrfx_power_clock_irq_handler+0x22>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    49f4:	2000      	movs	r0, #0
    49f6:	f8c3 0100 	str.w	r0, [r3, #256]	; 0x100
    49fa:	f8d3 2100 	ldr.w	r2, [r3, #256]	; 0x100
    p_reg->INTENCLR = mask;
    49fe:	2201      	movs	r2, #1
    4a00:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
        {
            m_clock_cb.hfclk_started = true;
            m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK_STARTED);
        }
#else
        m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK_STARTED);
    4a04:	4b11      	ldr	r3, [pc, #68]	; (4a4c <nrfx_power_clock_irq_handler+0x64>)
    4a06:	681b      	ldr	r3, [r3, #0]
    4a08:	4798      	blx	r3
    return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + event));
    4a0a:	f04f 2350 	mov.w	r3, #1342197760	; 0x50005000
    4a0e:	f8d3 2104 	ldr.w	r2, [r3, #260]	; 0x104
#endif
    }
    if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_LFCLKSTARTED))
    4a12:	b18a      	cbz	r2, 4a38 <nrfx_power_clock_irq_handler+0x50>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4a14:	2200      	movs	r2, #0
    4a16:	f8c3 2104 	str.w	r2, [r3, #260]	; 0x104
    4a1a:	f8d3 2104 	ldr.w	r2, [r3, #260]	; 0x104
                    (nrf_clock_lfclk_t)((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_SRC_Msk)
    4a1e:	f8d3 2418 	ldr.w	r2, [r3, #1048]	; 0x418
            if ((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_STATE_Msk)
    4a22:	f8d3 1418 	ldr.w	r1, [r3, #1048]	; 0x418
        NRFX_LOG_DEBUG("Event: NRF_CLOCK_EVENT_LFCLKSTARTED");

#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED)
        nrf_clock_lfclk_t lfclksrc;
        (void)nrf_clock_is_running(NRF_CLOCK, NRF_CLOCK_DOMAIN_LFCLK, &lfclksrc);
        if (lfclksrc == NRF_CLOCK_LFCLK_RC)
    4a26:	f002 0203 	and.w	r2, r2, #3
    4a2a:	2a01      	cmp	r2, #1
    4a2c:	f04f 0102 	mov.w	r1, #2
    4a30:	d103      	bne.n	4a3a <nrfx_power_clock_irq_handler+0x52>
    p_reg->LFCLKSRC = (uint32_t)(source);
    4a32:	f8c3 1518 	str.w	r1, [r3, #1304]	; 0x518
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    4a36:	609a      	str	r2, [r3, #8]
        nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HF192M_STARTED_MASK);

        m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK192M_STARTED);
    }
#endif
}
    4a38:	bd10      	pop	{r4, pc}
    p_reg->INTENCLR = mask;
    4a3a:	f8c3 1308 	str.w	r1, [r3, #776]	; 0x308
            m_clock_cb.event_handler(NRFX_CLOCK_EVT_LFCLK_STARTED);
    4a3e:	4b03      	ldr	r3, [pc, #12]	; (4a4c <nrfx_power_clock_irq_handler+0x64>)
    4a40:	2001      	movs	r0, #1
}
    4a42:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
            m_clock_cb.event_handler(NRFX_CLOCK_EVT_LFCLK_STARTED);
    4a46:	681b      	ldr	r3, [r3, #0]
    4a48:	4718      	bx	r3
    4a4a:	bf00      	nop
    4a4c:	2000e06c 	.word	0x2000e06c

00004a50 <nrfx_dppi_channel_alloc>:
    // Clear all allocated groups.
    m_allocated_groups = DPPI_AVAILABLE_GROUPS_MASK;
}

nrfx_err_t nrfx_dppi_channel_alloc(uint8_t * p_channel)
{
    4a50:	4601      	mov	r1, r0
    return nrfx_flag32_alloc(&m_allocated_channels, p_channel);
    4a52:	4801      	ldr	r0, [pc, #4]	; (4a58 <nrfx_dppi_channel_alloc+0x8>)
    4a54:	f7ff bf80 	b.w	4958 <nrfx_flag32_alloc>
    4a58:	2000c570 	.word	0x2000c570

00004a5c <nrf_gpio_cfg_sense_set>:
    uint32_t cnf = reg->PIN_CNF[pin_number];
    4a5c:	4a06      	ldr	r2, [pc, #24]	; (4a78 <nrf_gpio_cfg_sense_set+0x1c>)
    *p_pin = pin_number & 0x1F;
    4a5e:	f000 001f 	and.w	r0, r0, #31
    4a62:	eb02 0280 	add.w	r2, r2, r0, lsl #2
    uint32_t cnf = reg->PIN_CNF[pin_number];
    4a66:	f8d2 3200 	ldr.w	r3, [r2, #512]	; 0x200
    cnf &= ~to_update;
    4a6a:	f423 3340 	bic.w	r3, r3, #196608	; 0x30000
    cnf |= ((uint32_t)(p_dir   ? *p_dir   : 0) << GPIO_PIN_CNF_DIR_Pos)   |
    4a6e:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
    reg->PIN_CNF[pin_number] = cnf;
    4a72:	f8c2 3200 	str.w	r3, [r2, #512]	; 0x200
}
    4a76:	4770      	bx	lr
    4a78:	50842500 	.word	0x50842500

00004a7c <pin_in_use_by_te>:
 *
 * @return True if pin uses GPIOTE task/event.
 */
static bool pin_in_use_by_te(uint32_t pin)
{
    return m_cb.pin_flags[pin] & PIN_FLAG_TE_USED;
    4a7c:	4b03      	ldr	r3, [pc, #12]	; (4a8c <pin_in_use_by_te+0x10>)
    4a7e:	3008      	adds	r0, #8
    4a80:	f833 0010 	ldrh.w	r0, [r3, r0, lsl #1]
}
    4a84:	f3c0 1040 	ubfx	r0, r0, #5, #1
    4a88:	4770      	bx	lr
    4a8a:	bf00      	nop
    4a8c:	2000c574 	.word	0x2000c574

00004a90 <call_handler>:
    nrf_gpiote_event_t event = nrfx_gpiote_in_event_get(pin);
    return nrf_gpiote_event_address_get(NRF_GPIOTE, event);
}

static void call_handler(nrfx_gpiote_pin_t pin, nrfx_gpiote_trigger_t trigger)
{
    4a90:	b570      	push	{r4, r5, r6, lr}
    int32_t handler_id = PIN_GET_HANDLER_ID(m_cb.pin_flags[pin]);
    4a92:	4c0d      	ldr	r4, [pc, #52]	; (4ac8 <call_handler+0x38>)
    4a94:	f100 0308 	add.w	r3, r0, #8
    4a98:	f834 3013 	ldrh.w	r3, [r4, r3, lsl #1]
{
    4a9c:	4605      	mov	r5, r0
    int32_t handler_id = PIN_GET_HANDLER_ID(m_cb.pin_flags[pin]);
    4a9e:	05da      	lsls	r2, r3, #23
{
    4aa0:	460e      	mov	r6, r1
    int32_t handler_id = PIN_GET_HANDLER_ID(m_cb.pin_flags[pin]);
    4aa2:	d507      	bpl.n	4ab4 <call_handler+0x24>
    4aa4:	f3c3 2343 	ubfx	r3, r3, #9, #4
    nrfx_gpiote_handler_config_t const * handler = channel_handler_get(pin);

    if (handler)
    {
        handler->handler(pin, trigger, handler->p_context);
    4aa8:	eb04 02c3 	add.w	r2, r4, r3, lsl #3
    4aac:	6852      	ldr	r2, [r2, #4]
    4aae:	f854 3033 	ldr.w	r3, [r4, r3, lsl #3]
    4ab2:	4798      	blx	r3
    }
    if (m_cb.global_handler.handler)
    4ab4:	68a3      	ldr	r3, [r4, #8]
    4ab6:	b12b      	cbz	r3, 4ac4 <call_handler+0x34>
    {
        m_cb.global_handler.handler(pin, trigger, m_cb.global_handler.p_context);
    4ab8:	4631      	mov	r1, r6
    4aba:	4628      	mov	r0, r5
    4abc:	68e2      	ldr	r2, [r4, #12]
    }
}
    4abe:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
        m_cb.global_handler.handler(pin, trigger, m_cb.global_handler.p_context);
    4ac2:	4718      	bx	r3
}
    4ac4:	bd70      	pop	{r4, r5, r6, pc}
    4ac6:	bf00      	nop
    4ac8:	2000c574 	.word	0x2000c574

00004acc <release_handler>:
{
    4acc:	b410      	push	{r4}
    int32_t handler_id = PIN_GET_HANDLER_ID(m_cb.pin_flags[pin]);
    4ace:	4a12      	ldr	r2, [pc, #72]	; (4b18 <release_handler+0x4c>)
    4ad0:	3008      	adds	r0, #8
    4ad2:	f832 3010 	ldrh.w	r3, [r2, r0, lsl #1]
    4ad6:	05d9      	lsls	r1, r3, #23
    4ad8:	d51b      	bpl.n	4b12 <release_handler+0x46>
    4ada:	f3c3 2143 	ubfx	r1, r3, #9, #4
    m_cb.pin_flags[pin] &= ~PIN_HANDLER_MASK;
    4ade:	f423 53f8 	bic.w	r3, r3, #7936	; 0x1f00
    4ae2:	f822 3010 	strh.w	r3, [r2, r0, lsl #1]
    for (uint32_t i = 0; i < MAX_PIN_NUMBER; i++)
    4ae6:	2000      	movs	r0, #0
    4ae8:	f102 040e 	add.w	r4, r2, #14
        if (PIN_GET_HANDLER_ID(m_cb.pin_flags[i]) == handler_id)
    4aec:	f834 3f02 	ldrh.w	r3, [r4, #2]!
    4af0:	f413 7f80 	tst.w	r3, #256	; 0x100
    4af4:	d003      	beq.n	4afe <release_handler+0x32>
    4af6:	f3c3 2343 	ubfx	r3, r3, #9, #4
    4afa:	4299      	cmp	r1, r3
    4afc:	d009      	beq.n	4b12 <release_handler+0x46>
    for (uint32_t i = 0; i < MAX_PIN_NUMBER; i++)
    4afe:	3001      	adds	r0, #1
    4b00:	2820      	cmp	r0, #32
    4b02:	d1f3      	bne.n	4aec <release_handler+0x20>
        m_cb.handlers[handler_id].handler = NULL;
    4b04:	2300      	movs	r3, #0
    4b06:	f842 3031 	str.w	r3, [r2, r1, lsl #3]
        nrfx_err_t err = nrfx_flag32_free(&m_cb.available_evt_handlers, handler_id);
    4b0a:	4804      	ldr	r0, [pc, #16]	; (4b1c <release_handler+0x50>)
}
    4b0c:	bc10      	pop	{r4}
        nrfx_err_t err = nrfx_flag32_free(&m_cb.available_evt_handlers, handler_id);
    4b0e:	f7ff bf3f 	b.w	4990 <nrfx_flag32_free>
}
    4b12:	bc10      	pop	{r4}
    4b14:	4770      	bx	lr
    4b16:	bf00      	nop
    4b18:	2000c574 	.word	0x2000c574
    4b1c:	2000c5c8 	.word	0x2000c5c8

00004b20 <pin_handler_trigger_uninit>:
{
    4b20:	b538      	push	{r3, r4, r5, lr}
    4b22:	4602      	mov	r2, r0
    if (pin_in_use_by_te(pin))
    4b24:	f7ff ffaa 	bl	4a7c <pin_in_use_by_te>
    4b28:	4c0b      	ldr	r4, [pc, #44]	; (4b58 <pin_handler_trigger_uninit+0x38>)
    4b2a:	f102 0508 	add.w	r5, r2, #8
    4b2e:	b160      	cbz	r0, 4b4a <pin_handler_trigger_uninit+0x2a>
                         ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk);
}

NRF_STATIC_INLINE void nrf_gpiote_te_default(NRF_GPIOTE_Type * p_reg, uint32_t idx)
{
    p_reg->CONFIG[idx] = 0;
    4b30:	2100      	movs	r1, #0
    return PIN_GET_TE_ID(m_cb.pin_flags[pin]);
    4b32:	f834 3015 	ldrh.w	r3, [r4, r5, lsl #1]
        nrf_gpiote_te_default(NRF_GPIOTE, pin_te_get(pin));
    4b36:	0b5b      	lsrs	r3, r3, #13
    4b38:	009b      	lsls	r3, r3, #2
    4b3a:	f103 43a0 	add.w	r3, r3, #1342177280	; 0x50000000
    4b3e:	f503 4350 	add.w	r3, r3, #53248	; 0xd000
    4b42:	f8c3 1510 	str.w	r1, [r3, #1296]	; 0x510
#if defined(NRF9160_XXAA) || defined(NRF5340_XXAA)
    p_reg->CONFIG[idx] = 0;
    4b46:	f8c3 1510 	str.w	r1, [r3, #1296]	; 0x510
    release_handler(pin);
    4b4a:	4610      	mov	r0, r2
    4b4c:	f7ff ffbe 	bl	4acc <release_handler>
    m_cb.pin_flags[pin] = PIN_FLAG_NOT_USED;
    4b50:	2300      	movs	r3, #0
    4b52:	f824 3015 	strh.w	r3, [r4, r5, lsl #1]
}
    4b56:	bd38      	pop	{r3, r4, r5, pc}
    4b58:	2000c574 	.word	0x2000c574

00004b5c <nrfx_gpiote_input_configure>:
{
    4b5c:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
    4b60:	4604      	mov	r4, r0
    4b62:	461d      	mov	r5, r3
    if (p_input_config)
    4b64:	b309      	cbz	r1, 4baa <nrfx_gpiote_input_configure+0x4e>
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    4b66:	4f4e      	ldr	r7, [pc, #312]	; (4ca0 <nrfx_gpiote_input_configure+0x144>)
    4b68:	f100 0808 	add.w	r8, r0, #8
    4b6c:	f837 6018 	ldrh.w	r6, [r7, r8, lsl #1]
    return pin_is_output(pin) && pin_in_use_by_te(pin);
    4b70:	07b3      	lsls	r3, r6, #30
    4b72:	d506      	bpl.n	4b82 <nrfx_gpiote_input_configure+0x26>
    4b74:	f7ff ff82 	bl	4a7c <pin_in_use_by_te>
    4b78:	b118      	cbz	r0, 4b82 <nrfx_gpiote_input_configure+0x26>
            return NRFX_ERROR_INVALID_PARAM;
    4b7a:	484a      	ldr	r0, [pc, #296]	; (4ca4 <nrfx_gpiote_input_configure+0x148>)
}
    4b7c:	b002      	add	sp, #8
    4b7e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    uint32_t cnf = reg->PIN_CNF[pin_number];
    4b82:	4849      	ldr	r0, [pc, #292]	; (4ca8 <nrfx_gpiote_input_configure+0x14c>)
    *p_pin = pin_number & 0x1F;
    4b84:	f004 031f 	and.w	r3, r4, #31
    4b88:	eb00 0083 	add.w	r0, r0, r3, lsl #2
    uint32_t cnf = reg->PIN_CNF[pin_number];
    4b8c:	f8d0 3200 	ldr.w	r3, [r0, #512]	; 0x200
           ((uint32_t)(p_pull  ? *p_pull  : 0) << GPIO_PIN_CNF_PULL_Pos)  |
    4b90:	7809      	ldrb	r1, [r1, #0]
    cnf &= ~to_update;
    4b92:	f023 030f 	bic.w	r3, r3, #15
        m_cb.pin_flags[pin] &= ~PIN_FLAG_OUTPUT;
    4b96:	f026 0602 	bic.w	r6, r6, #2
    cnf |= ((uint32_t)(p_dir   ? *p_dir   : 0) << GPIO_PIN_CNF_DIR_Pos)   |
    4b9a:	ea43 0381 	orr.w	r3, r3, r1, lsl #2
        m_cb.pin_flags[pin] |= PIN_FLAG_IN_USE;
    4b9e:	f046 0601 	orr.w	r6, r6, #1
    reg->PIN_CNF[pin_number] = cnf;
    4ba2:	f8c0 3200 	str.w	r3, [r0, #512]	; 0x200
    4ba6:	f827 6018 	strh.w	r6, [r7, r8, lsl #1]
    if (p_trigger_config)
    4baa:	b19a      	cbz	r2, 4bd4 <nrfx_gpiote_input_configure+0x78>
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    4bac:	4e3c      	ldr	r6, [pc, #240]	; (4ca0 <nrfx_gpiote_input_configure+0x144>)
    4bae:	f104 0708 	add.w	r7, r4, #8
    4bb2:	f836 1017 	ldrh.w	r1, [r6, r7, lsl #1]
        nrfx_gpiote_trigger_t trigger = p_trigger_config->trigger;
    4bb6:	7813      	ldrb	r3, [r2, #0]
        if (pin_is_output(pin))
    4bb8:	f011 0f02 	tst.w	r1, #2
        bool use_evt = p_trigger_config->p_in_channel ? true : false;
    4bbc:	6850      	ldr	r0, [r2, #4]
        if (pin_is_output(pin))
    4bbe:	d00c      	beq.n	4bda <nrfx_gpiote_input_configure+0x7e>
            if (use_evt)
    4bc0:	2800      	cmp	r0, #0
    4bc2:	d1da      	bne.n	4b7a <nrfx_gpiote_input_configure+0x1e>
        m_cb.pin_flags[pin] &= ~PIN_FLAG_TRIG_MODE_MASK;
    4bc4:	f836 2017 	ldrh.w	r2, [r6, r7, lsl #1]
    4bc8:	f022 021c 	bic.w	r2, r2, #28
        m_cb.pin_flags[pin] |= PIN_FLAG_TRIG_MODE_SET(trigger);
    4bcc:	ea42 0383 	orr.w	r3, r2, r3, lsl #2
    4bd0:	f826 3017 	strh.w	r3, [r6, r7, lsl #1]
    if (p_handler_config)
    4bd4:	bbd5      	cbnz	r5, 4c4c <nrfx_gpiote_input_configure+0xf0>
        err = NRFX_SUCCESS;
    4bd6:	4835      	ldr	r0, [pc, #212]	; (4cac <nrfx_gpiote_input_configure+0x150>)
    4bd8:	e7d0      	b.n	4b7c <nrfx_gpiote_input_configure+0x20>
            m_cb.pin_flags[pin] &= ~(PIN_TE_ID_MASK | PIN_FLAG_TE_USED);
    4bda:	f021 0120 	bic.w	r1, r1, #32
    4bde:	04c9      	lsls	r1, r1, #19
    4be0:	0cc9      	lsrs	r1, r1, #19
    4be2:	f826 1017 	strh.w	r1, [r6, r7, lsl #1]
            if (use_evt)
    4be6:	2800      	cmp	r0, #0
    4be8:	d0ec      	beq.n	4bc4 <nrfx_gpiote_input_configure+0x68>
                if (!edge)
    4bea:	2b03      	cmp	r3, #3
    4bec:	d8c5      	bhi.n	4b7a <nrfx_gpiote_input_configure+0x1e>
                uint8_t ch = *p_trigger_config->p_in_channel;
    4bee:	6852      	ldr	r2, [r2, #4]
    4bf0:	f892 c000 	ldrb.w	ip, [r2]
                if (trigger == NRFX_GPIOTE_TRIGGER_NONE)
    4bf4:	4662      	mov	r2, ip
    4bf6:	0092      	lsls	r2, r2, #2
    4bf8:	f102 42a0 	add.w	r2, r2, #1342177280	; 0x50000000
    4bfc:	f502 4250 	add.w	r2, r2, #53248	; 0xd000
    4c00:	b923      	cbnz	r3, 4c0c <nrfx_gpiote_input_configure+0xb0>
    p_reg->CONFIG[idx] = 0;
    4c02:	f8c2 3510 	str.w	r3, [r2, #1296]	; 0x510
    p_reg->CONFIG[idx] = 0;
    4c06:	f8c2 3510 	str.w	r3, [r2, #1296]	; 0x510
#endif
}
    4c0a:	e7db      	b.n	4bc4 <nrfx_gpiote_input_configure+0x68>
   p_reg->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Msk;
    4c0c:	f8d2 0510 	ldr.w	r0, [r2, #1296]	; 0x510
                    m_cb.pin_flags[pin] |= PIN_FLAG_TE_ID(ch);
    4c10:	ea41 314c 	orr.w	r1, r1, ip, lsl #13
    4c14:	f020 0003 	bic.w	r0, r0, #3
    4c18:	f8c2 0510 	str.w	r0, [r2, #1296]	; 0x510
  p_reg->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk | GPIOTE_CONFIG_POLARITY_Msk);
    4c1c:	f8d2 0510 	ldr.w	r0, [r2, #1296]	; 0x510
    4c20:	f041 0120 	orr.w	r1, r1, #32
    4c24:	f420 3047 	bic.w	r0, r0, #203776	; 0x31c00
    4c28:	f420 7040 	bic.w	r0, r0, #768	; 0x300
    4c2c:	f8c2 0510 	str.w	r0, [r2, #1296]	; 0x510
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    4c30:	0220      	lsls	r0, r4, #8
    4c32:	f8d2 e510 	ldr.w	lr, [r2, #1296]	; 0x510
    4c36:	f400 50f8 	and.w	r0, r0, #7936	; 0x1f00
    4c3a:	ea40 4003 	orr.w	r0, r0, r3, lsl #16
    4c3e:	ea40 000e 	orr.w	r0, r0, lr
    4c42:	f8c2 0510 	str.w	r0, [r2, #1296]	; 0x510
    4c46:	f826 1017 	strh.w	r1, [r6, r7, lsl #1]
    4c4a:	e7bb      	b.n	4bc4 <nrfx_gpiote_input_configure+0x68>
    release_handler(pin);
    4c4c:	4620      	mov	r0, r4
        err = pin_handler_set(pin, p_handler_config->handler, p_handler_config->p_context);
    4c4e:	e9d5 6700 	ldrd	r6, r7, [r5]
    release_handler(pin);
    4c52:	f7ff ff3b 	bl	4acc <release_handler>
    if (!handler)
    4c56:	2e00      	cmp	r6, #0
    4c58:	d0bd      	beq.n	4bd6 <nrfx_gpiote_input_configure+0x7a>
        if ((m_cb.handlers[i].handler == handler) && (m_cb.handlers[i].p_context == p_context))
    4c5a:	4d11      	ldr	r5, [pc, #68]	; (4ca0 <nrfx_gpiote_input_configure+0x144>)
    4c5c:	e9d5 2300 	ldrd	r2, r3, [r5]
    4c60:	4296      	cmp	r6, r2
    4c62:	d101      	bne.n	4c68 <nrfx_gpiote_input_configure+0x10c>
    4c64:	429f      	cmp	r7, r3
    4c66:	d018      	beq.n	4c9a <nrfx_gpiote_input_configure+0x13e>
        err = nrfx_flag32_alloc(&m_cb.available_evt_handlers, &id);
    4c68:	4811      	ldr	r0, [pc, #68]	; (4cb0 <nrfx_gpiote_input_configure+0x154>)
    4c6a:	f10d 0107 	add.w	r1, sp, #7
    4c6e:	f7ff fe73 	bl	4958 <nrfx_flag32_alloc>
        if (err != NRFX_SUCCESS)
    4c72:	4b0e      	ldr	r3, [pc, #56]	; (4cac <nrfx_gpiote_input_configure+0x150>)
    4c74:	4298      	cmp	r0, r3
    4c76:	d181      	bne.n	4b7c <nrfx_gpiote_input_configure+0x20>
        handler_id = (int32_t)id;
    4c78:	f89d 2007 	ldrb.w	r2, [sp, #7]
    m_cb.handlers[handler_id].p_context = p_context;
    4c7c:	eb05 03c2 	add.w	r3, r5, r2, lsl #3
    m_cb.pin_flags[pin] |= PIN_FLAG_HANDLER(handler_id);
    4c80:	3408      	adds	r4, #8
    m_cb.handlers[handler_id].p_context = p_context;
    4c82:	605f      	str	r7, [r3, #4]
    m_cb.pin_flags[pin] |= PIN_FLAG_HANDLER(handler_id);
    4c84:	f835 3014 	ldrh.w	r3, [r5, r4, lsl #1]
    m_cb.handlers[handler_id].handler = handler;
    4c88:	f845 6032 	str.w	r6, [r5, r2, lsl #3]
    m_cb.pin_flags[pin] |= PIN_FLAG_HANDLER(handler_id);
    4c8c:	ea43 2342 	orr.w	r3, r3, r2, lsl #9
    4c90:	f443 7380 	orr.w	r3, r3, #256	; 0x100
    4c94:	f825 3014 	strh.w	r3, [r5, r4, lsl #1]
    return NRFX_SUCCESS;
    4c98:	e79d      	b.n	4bd6 <nrfx_gpiote_input_configure+0x7a>
        if ((m_cb.handlers[i].handler == handler) && (m_cb.handlers[i].p_context == p_context))
    4c9a:	2200      	movs	r2, #0
    4c9c:	e7ee      	b.n	4c7c <nrfx_gpiote_input_configure+0x120>
    4c9e:	bf00      	nop
    4ca0:	2000c574 	.word	0x2000c574
    4ca4:	0bad0004 	.word	0x0bad0004
    4ca8:	50842500 	.word	0x50842500
    4cac:	0bad0000 	.word	0x0bad0000
    4cb0:	2000c5c8 	.word	0x2000c5c8

00004cb4 <nrfx_gpiote_output_configure>:
{
    4cb4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    4cb6:	4604      	mov	r4, r0
    if (p_config)
    4cb8:	b379      	cbz	r1, 4d1a <nrfx_gpiote_output_configure+0x66>
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    4cba:	4e3a      	ldr	r6, [pc, #232]	; (4da4 <nrfx_gpiote_output_configure+0xf0>)
    4cbc:	f100 0708 	add.w	r7, r0, #8
    4cc0:	f836 5017 	ldrh.w	r5, [r6, r7, lsl #1]
        if (pin_is_input(pin) && pin_in_use_by_te(pin))
    4cc4:	07ab      	lsls	r3, r5, #30
    4cc6:	d404      	bmi.n	4cd2 <nrfx_gpiote_output_configure+0x1e>
    4cc8:	f7ff fed8 	bl	4a7c <pin_in_use_by_te>
    4ccc:	b108      	cbz	r0, 4cd2 <nrfx_gpiote_output_configure+0x1e>
{
    4cce:	4836      	ldr	r0, [pc, #216]	; (4da8 <nrfx_gpiote_output_configure+0xf4>)
}
    4cd0:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
        if (pin_has_trigger(pin) && (p_config->input_connect == NRF_GPIO_PIN_INPUT_DISCONNECT))
    4cd2:	f015 0f1c 	tst.w	r5, #28
    4cd6:	784b      	ldrb	r3, [r1, #1]
    4cd8:	d122      	bne.n	4d20 <nrfx_gpiote_output_configure+0x6c>
    *p_pin = pin_number & 0x1F;
    4cda:	f004 001f 	and.w	r0, r4, #31
    uint32_t cnf = reg->PIN_CNF[pin_number];
    4cde:	f8df c0cc 	ldr.w	ip, [pc, #204]	; 4dac <nrfx_gpiote_output_configure+0xf8>
    4ce2:	f100 0e80 	add.w	lr, r0, #128	; 0x80
    4ce6:	f85c c02e 	ldr.w	ip, [ip, lr, lsl #2]
           ((uint32_t)(p_pull  ? *p_pull  : 0) << GPIO_PIN_CNF_PULL_Pos)  |
    4cea:	f891 e002 	ldrb.w	lr, [r1, #2]
           ((uint32_t)(p_input ? *p_input : 0) << GPIO_PIN_CNF_INPUT_Pos) |
    4cee:	005b      	lsls	r3, r3, #1
    cnf &= ~to_update;
    4cf0:	f42c 6ce1 	bic.w	ip, ip, #1800	; 0x708
           ((uint32_t)(p_drive ? *p_drive : 0) << GPIO_PIN_CNF_DRIVE_Pos) |
    4cf4:	7809      	ldrb	r1, [r1, #0]
    4cf6:	ea43 038e 	orr.w	r3, r3, lr, lsl #2
    cnf &= ~to_update;
    4cfa:	f02c 0c07 	bic.w	ip, ip, #7
    4cfe:	ea43 030c 	orr.w	r3, r3, ip
    4d02:	ea43 2301 	orr.w	r3, r3, r1, lsl #8
    reg->PIN_CNF[pin_number] = cnf;
    4d06:	4929      	ldr	r1, [pc, #164]	; (4dac <nrfx_gpiote_output_configure+0xf8>)
    cnf |= ((uint32_t)(p_dir   ? *p_dir   : 0) << GPIO_PIN_CNF_DIR_Pos)   |
    4d08:	f043 0301 	orr.w	r3, r3, #1
    reg->PIN_CNF[pin_number] = cnf;
    4d0c:	3080      	adds	r0, #128	; 0x80
        m_cb.pin_flags[pin] |= PIN_FLAG_IN_USE | PIN_FLAG_OUTPUT;
    4d0e:	f045 0503 	orr.w	r5, r5, #3
    4d12:	f841 3020 	str.w	r3, [r1, r0, lsl #2]
    4d16:	f826 5017 	strh.w	r5, [r6, r7, lsl #1]
    if (p_task_config)
    4d1a:	b922      	cbnz	r2, 4d26 <nrfx_gpiote_output_configure+0x72>
    return NRFX_SUCCESS;
    4d1c:	4824      	ldr	r0, [pc, #144]	; (4db0 <nrfx_gpiote_output_configure+0xfc>)
    4d1e:	e7d7      	b.n	4cd0 <nrfx_gpiote_output_configure+0x1c>
        if (pin_has_trigger(pin) && (p_config->input_connect == NRF_GPIO_PIN_INPUT_DISCONNECT))
    4d20:	2b01      	cmp	r3, #1
    4d22:	d1da      	bne.n	4cda <nrfx_gpiote_output_configure+0x26>
    4d24:	e7d3      	b.n	4cce <nrfx_gpiote_output_configure+0x1a>
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    4d26:	4e1f      	ldr	r6, [pc, #124]	; (4da4 <nrfx_gpiote_output_configure+0xf0>)
    4d28:	f104 0708 	add.w	r7, r4, #8
    4d2c:	f836 0017 	ldrh.w	r0, [r6, r7, lsl #1]
        if (pin_is_input(pin))
    4d30:	0783      	lsls	r3, r0, #30
    4d32:	d5cc      	bpl.n	4cce <nrfx_gpiote_output_configure+0x1a>
        uint32_t ch = p_task_config->task_ch;
    4d34:	f892 c000 	ldrb.w	ip, [r2]
    p_reg->CONFIG[idx] = 0;
    4d38:	2300      	movs	r3, #0
    4d3a:	4661      	mov	r1, ip
        m_cb.pin_flags[pin] &= ~(PIN_FLAG_TE_USED | PIN_TE_ID_MASK);
    4d3c:	f020 0020 	bic.w	r0, r0, #32
    4d40:	0089      	lsls	r1, r1, #2
    4d42:	f101 41a0 	add.w	r1, r1, #1342177280	; 0x50000000
    4d46:	04c0      	lsls	r0, r0, #19
    4d48:	f501 4150 	add.w	r1, r1, #53248	; 0xd000
    4d4c:	0cc0      	lsrs	r0, r0, #19
    4d4e:	f8c1 3510 	str.w	r3, [r1, #1296]	; 0x510
    4d52:	f826 0017 	strh.w	r0, [r6, r7, lsl #1]
    p_reg->CONFIG[idx] = 0;
    4d56:	f8c1 3510 	str.w	r3, [r1, #1296]	; 0x510
        if (p_task_config->polarity != NRF_GPIOTE_POLARITY_NONE)
    4d5a:	7855      	ldrb	r5, [r2, #1]
    4d5c:	2d00      	cmp	r5, #0
    4d5e:	d0dd      	beq.n	4d1c <nrfx_gpiote_output_configure+0x68>
  p_reg->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk |
    4d60:	f8d1 3510 	ldr.w	r3, [r1, #1296]	; 0x510
                                      p_task_config->init_val);
    4d64:	7892      	ldrb	r2, [r2, #2]
    4d66:	f423 1398 	bic.w	r3, r3, #1245184	; 0x130000
    4d6a:	f423 53f8 	bic.w	r3, r3, #7936	; 0x1f00
    4d6e:	f8c1 3510 	str.w	r3, [r1, #1296]	; 0x510
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    4d72:	f8d1 e510 	ldr.w	lr, [r1, #1296]	; 0x510
    4d76:	0223      	lsls	r3, r4, #8
    4d78:	f403 53f8 	and.w	r3, r3, #7936	; 0x1f00
                        ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk) |
    4d7c:	042d      	lsls	r5, r5, #16
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    4d7e:	ea43 030e 	orr.w	r3, r3, lr
                        ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk) |
    4d82:	f405 3540 	and.w	r5, r5, #196608	; 0x30000
                        ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk);
    4d86:	0512      	lsls	r2, r2, #20
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    4d88:	432b      	orrs	r3, r5
                        ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk);
    4d8a:	f402 1280 	and.w	r2, r2, #1048576	; 0x100000
            m_cb.pin_flags[pin] |= PIN_FLAG_TE_ID(ch);
    4d8e:	ea40 304c 	orr.w	r0, r0, ip, lsl #13
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    4d92:	4313      	orrs	r3, r2
    4d94:	f040 0020 	orr.w	r0, r0, #32
    4d98:	f8c1 3510 	str.w	r3, [r1, #1296]	; 0x510
    4d9c:	f826 0017 	strh.w	r0, [r6, r7, lsl #1]
    4da0:	e7bc      	b.n	4d1c <nrfx_gpiote_output_configure+0x68>
    4da2:	bf00      	nop
    4da4:	2000c574 	.word	0x2000c574
    4da8:	0bad0004 	.word	0x0bad0004
    4dac:	50842500 	.word	0x50842500
    4db0:	0bad0000 	.word	0x0bad0000

00004db4 <nrfx_gpiote_global_callback_set>:
    m_cb.global_handler.handler = handler;
    4db4:	4b01      	ldr	r3, [pc, #4]	; (4dbc <nrfx_gpiote_global_callback_set+0x8>)
    m_cb.global_handler.p_context = p_context;
    4db6:	e9c3 0102 	strd	r0, r1, [r3, #8]
}
    4dba:	4770      	bx	lr
    4dbc:	2000c574 	.word	0x2000c574

00004dc0 <nrfx_gpiote_channel_get>:
{
    4dc0:	b508      	push	{r3, lr}
    4dc2:	4602      	mov	r2, r0
    if (pin_in_use_by_te(pin))
    4dc4:	f7ff fe5a 	bl	4a7c <pin_in_use_by_te>
    4dc8:	b138      	cbz	r0, 4dda <nrfx_gpiote_channel_get+0x1a>
        *p_channel = PIN_GET_TE_ID(m_cb.pin_flags[pin]);
    4dca:	4b05      	ldr	r3, [pc, #20]	; (4de0 <nrfx_gpiote_channel_get+0x20>)
    4dcc:	3208      	adds	r2, #8
    4dce:	f833 3012 	ldrh.w	r3, [r3, r2, lsl #1]
        return NRFX_SUCCESS;
    4dd2:	4804      	ldr	r0, [pc, #16]	; (4de4 <nrfx_gpiote_channel_get+0x24>)
        *p_channel = PIN_GET_TE_ID(m_cb.pin_flags[pin]);
    4dd4:	0b5b      	lsrs	r3, r3, #13
    4dd6:	700b      	strb	r3, [r1, #0]
}
    4dd8:	bd08      	pop	{r3, pc}
        return NRFX_ERROR_INVALID_PARAM;
    4dda:	4803      	ldr	r0, [pc, #12]	; (4de8 <nrfx_gpiote_channel_get+0x28>)
    4ddc:	e7fc      	b.n	4dd8 <nrfx_gpiote_channel_get+0x18>
    4dde:	bf00      	nop
    4de0:	2000c574 	.word	0x2000c574
    4de4:	0bad0000 	.word	0x0bad0000
    4de8:	0bad0004 	.word	0x0bad0004

00004dec <nrfx_gpiote_init>:
{
    4dec:	b538      	push	{r3, r4, r5, lr}
    if (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED)
    4dee:	4c0f      	ldr	r4, [pc, #60]	; (4e2c <nrfx_gpiote_init+0x40>)
    4df0:	f894 5058 	ldrb.w	r5, [r4, #88]	; 0x58
    4df4:	b9bd      	cbnz	r5, 4e26 <nrfx_gpiote_init+0x3a>
    memset(m_cb.pin_flags, 0, sizeof(m_cb.pin_flags));
    4df6:	2240      	movs	r2, #64	; 0x40
    4df8:	4629      	mov	r1, r5
    4dfa:	f104 0010 	add.w	r0, r4, #16
    4dfe:	f001 fbd6 	bl	65ae <memset>
    NRFX_IRQ_ENABLE(nrfx_get_irq_number(NRF_GPIOTE));
    4e02:	200d      	movs	r0, #13
    4e04:	f7fd fe16 	bl	2a34 <arch_irq_enable>
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    4e08:	4b09      	ldr	r3, [pc, #36]	; (4e30 <nrfx_gpiote_init+0x44>)
    return err_code;
    4e0a:	480a      	ldr	r0, [pc, #40]	; (4e34 <nrfx_gpiote_init+0x48>)
    4e0c:	f8c3 517c 	str.w	r5, [r3, #380]	; 0x17c
    4e10:	f8d3 217c 	ldr.w	r2, [r3, #380]	; 0x17c
    p_reg->INTENSET = mask;
    4e14:	f04f 4200 	mov.w	r2, #2147483648	; 0x80000000
    4e18:	f8c3 2304 	str.w	r2, [r3, #772]	; 0x304
    m_cb.state = NRFX_DRV_STATE_INITIALIZED;
    4e1c:	2301      	movs	r3, #1
    4e1e:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
    m_cb.available_evt_handlers = NRFX_BIT_MASK(NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS);
    4e22:	6563      	str	r3, [r4, #84]	; 0x54
}
    4e24:	bd38      	pop	{r3, r4, r5, pc}
        return err_code;
    4e26:	4804      	ldr	r0, [pc, #16]	; (4e38 <nrfx_gpiote_init+0x4c>)
    4e28:	e7fc      	b.n	4e24 <nrfx_gpiote_init+0x38>
    4e2a:	bf00      	nop
    4e2c:	2000c574 	.word	0x2000c574
    4e30:	5000d000 	.word	0x5000d000
    4e34:	0bad0000 	.word	0x0bad0000
    4e38:	0bad0005 	.word	0x0bad0005

00004e3c <nrfx_gpiote_is_init>:
    return (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED) ? true : false;
    4e3c:	4b03      	ldr	r3, [pc, #12]	; (4e4c <nrfx_gpiote_is_init+0x10>)
    4e3e:	f893 0058 	ldrb.w	r0, [r3, #88]	; 0x58
}
    4e42:	3800      	subs	r0, #0
    4e44:	bf18      	it	ne
    4e46:	2001      	movne	r0, #1
    4e48:	4770      	bx	lr
    4e4a:	bf00      	nop
    4e4c:	2000c574 	.word	0x2000c574

00004e50 <nrfx_gpiote_channel_free>:
{
    4e50:	4601      	mov	r1, r0
    return nrfx_flag32_free(&m_cb.available_channels_mask, channel);
    4e52:	4801      	ldr	r0, [pc, #4]	; (4e58 <nrfx_gpiote_channel_free+0x8>)
    4e54:	f7ff bd9c 	b.w	4990 <nrfx_flag32_free>
    4e58:	2000c5c4 	.word	0x2000c5c4

00004e5c <nrfx_gpiote_channel_alloc>:
{
    4e5c:	4601      	mov	r1, r0
    return nrfx_flag32_alloc(&m_cb.available_channels_mask, p_channel);
    4e5e:	4801      	ldr	r0, [pc, #4]	; (4e64 <nrfx_gpiote_channel_alloc+0x8>)
    4e60:	f7ff bd7a 	b.w	4958 <nrfx_flag32_alloc>
    4e64:	2000c5c4 	.word	0x2000c5c4

00004e68 <nrfx_gpiote_trigger_enable>:
{
    4e68:	4602      	mov	r2, r0
    4e6a:	b510      	push	{r4, lr}
    if (pin_in_use_by_te(pin) && pin_is_input(pin))
    4e6c:	f7ff fe06 	bl	4a7c <pin_in_use_by_te>
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    4e70:	4b1c      	ldr	r3, [pc, #112]	; (4ee4 <nrfx_gpiote_trigger_enable+0x7c>)
    4e72:	f102 0408 	add.w	r4, r2, #8
    4e76:	f833 3014 	ldrh.w	r3, [r3, r4, lsl #1]
    if (pin_in_use_by_te(pin) && pin_is_input(pin))
    4e7a:	b1e0      	cbz	r0, 4eb6 <nrfx_gpiote_trigger_enable+0x4e>
    4e7c:	f013 0402 	ands.w	r4, r3, #2
    4e80:	d119      	bne.n	4eb6 <nrfx_gpiote_trigger_enable+0x4e>
    return PIN_GET_TE_ID(m_cb.pin_flags[pin]);
    4e82:	0b5b      	lsrs	r3, r3, #13
#endif

NRF_STATIC_INLINE nrf_gpiote_event_t nrf_gpiote_in_event_get(uint8_t index)
{
    NRFX_ASSERT(index < GPIOTE_CH_NUM);
    return (nrf_gpiote_event_t)NRFX_OFFSETOF(NRF_GPIOTE_Type, EVENTS_IN[index]);
    4e84:	009a      	lsls	r2, r3, #2
    return ((uint32_t)p_reg + event);
    4e86:	f102 40a0 	add.w	r0, r2, #1342177280	; 0x50000000
    4e8a:	f500 4051 	add.w	r0, r0, #53504	; 0xd100
    4e8e:	f102 42a0 	add.w	r2, r2, #1342177280	; 0x50000000
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    4e92:	6004      	str	r4, [r0, #0]
    4e94:	f502 4250 	add.w	r2, r2, #53248	; 0xd000
    4e98:	6800      	ldr	r0, [r0, #0]
   p_reg->CONFIG[idx] |= GPIOTE_CONFIG_MODE_Event;
    4e9a:	f8d2 0510 	ldr.w	r0, [r2, #1296]	; 0x510
    4e9e:	f040 0001 	orr.w	r0, r0, #1
    4ea2:	f8c2 0510 	str.w	r0, [r2, #1296]	; 0x510
        if (int_enable)
    4ea6:	b129      	cbz	r1, 4eb4 <nrfx_gpiote_trigger_enable+0x4c>
            nrf_gpiote_int_enable(NRF_GPIOTE, NRFX_BIT(ch));
    4ea8:	2201      	movs	r2, #1
    4eaa:	fa02 f303 	lsl.w	r3, r2, r3
    p_reg->INTENSET = mask;
    4eae:	4a0e      	ldr	r2, [pc, #56]	; (4ee8 <nrfx_gpiote_trigger_enable+0x80>)
    4eb0:	f8c2 3304 	str.w	r3, [r2, #772]	; 0x304
}
    4eb4:	bd10      	pop	{r4, pc}
    nrfx_gpiote_trigger_t trigger = PIN_FLAG_TRIG_MODE_GET(m_cb.pin_flags[pin]);
    4eb6:	f3c3 0382 	ubfx	r3, r3, #2, #3
    if (trigger == NRFX_GPIOTE_TRIGGER_LOW)
    4eba:	2b04      	cmp	r3, #4
    4ebc:	d00e      	beq.n	4edc <nrfx_gpiote_trigger_enable+0x74>
    else if (trigger == NRFX_GPIOTE_TRIGGER_HIGH)
    4ebe:	2b05      	cmp	r3, #5
    4ec0:	d00e      	beq.n	4ee0 <nrfx_gpiote_trigger_enable+0x78>
    return p_reg->IN;
    4ec2:	4b0a      	ldr	r3, [pc, #40]	; (4eec <nrfx_gpiote_trigger_enable+0x84>)
    4ec4:	6919      	ldr	r1, [r3, #16]
    *p_pin = pin_number & 0x1F;
    4ec6:	f002 031f 	and.w	r3, r2, #31
    return ((nrf_gpio_port_in_read(reg) >> pin_number) & 1UL);
    4eca:	40d9      	lsrs	r1, r3
    4ecc:	f001 0101 	and.w	r1, r1, #1
    4ed0:	3102      	adds	r1, #2
        nrf_gpio_cfg_sense_set(pin, get_initial_sense(pin));
    4ed2:	4610      	mov	r0, r2
}
    4ed4:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
        nrf_gpio_cfg_sense_set(pin, get_initial_sense(pin));
    4ed8:	f7ff bdc0 	b.w	4a5c <nrf_gpio_cfg_sense_set>
        sense = NRF_GPIO_PIN_SENSE_LOW;
    4edc:	2103      	movs	r1, #3
    4ede:	e7f8      	b.n	4ed2 <nrfx_gpiote_trigger_enable+0x6a>
        sense = NRF_GPIO_PIN_SENSE_HIGH;
    4ee0:	2102      	movs	r1, #2
    4ee2:	e7f6      	b.n	4ed2 <nrfx_gpiote_trigger_enable+0x6a>
    4ee4:	2000c574 	.word	0x2000c574
    4ee8:	5000d000 	.word	0x5000d000
    4eec:	50842500 	.word	0x50842500

00004ef0 <nrfx_gpiote_trigger_disable>:
{
    4ef0:	b508      	push	{r3, lr}
    4ef2:	4602      	mov	r2, r0
    if (pin_in_use_by_te(pin) && pin_is_input(pin))
    4ef4:	f7ff fdc2 	bl	4a7c <pin_in_use_by_te>
    4ef8:	b1c0      	cbz	r0, 4f2c <nrfx_gpiote_trigger_disable+0x3c>
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    4efa:	4b0f      	ldr	r3, [pc, #60]	; (4f38 <nrfx_gpiote_trigger_disable+0x48>)
    4efc:	f102 0108 	add.w	r1, r2, #8
    4f00:	f833 3011 	ldrh.w	r3, [r3, r1, lsl #1]
    if (pin_in_use_by_te(pin) && pin_is_input(pin))
    4f04:	0799      	lsls	r1, r3, #30
    4f06:	d411      	bmi.n	4f2c <nrfx_gpiote_trigger_disable+0x3c>
        nrf_gpiote_int_disable(NRF_GPIOTE, NRFX_BIT(ch));
    4f08:	2201      	movs	r2, #1
    return PIN_GET_TE_ID(m_cb.pin_flags[pin]);
    4f0a:	0b5b      	lsrs	r3, r3, #13
        nrf_gpiote_int_disable(NRF_GPIOTE, NRFX_BIT(ch));
    4f0c:	409a      	lsls	r2, r3
    p_reg->INTENCLR = mask;
    4f0e:	490b      	ldr	r1, [pc, #44]	; (4f3c <nrfx_gpiote_trigger_disable+0x4c>)
    4f10:	009b      	lsls	r3, r3, #2
    4f12:	f103 43a0 	add.w	r3, r3, #1342177280	; 0x50000000
    4f16:	f8c1 2308 	str.w	r2, [r1, #776]	; 0x308
   p_reg->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Msk;
    4f1a:	f503 4350 	add.w	r3, r3, #53248	; 0xd000
    4f1e:	f8d3 2510 	ldr.w	r2, [r3, #1296]	; 0x510
    4f22:	f022 0203 	bic.w	r2, r2, #3
    4f26:	f8c3 2510 	str.w	r2, [r3, #1296]	; 0x510
}
    4f2a:	bd08      	pop	{r3, pc}
        nrf_gpio_cfg_sense_set(pin, NRF_GPIO_PIN_NOSENSE);
    4f2c:	2100      	movs	r1, #0
}
    4f2e:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
        nrf_gpio_cfg_sense_set(pin, NRF_GPIO_PIN_NOSENSE);
    4f32:	4610      	mov	r0, r2
    4f34:	f7ff bd92 	b.w	4a5c <nrf_gpio_cfg_sense_set>
    4f38:	2000c574 	.word	0x2000c574
    4f3c:	5000d000 	.word	0x5000d000

00004f40 <nrfx_gpiote_pin_uninit>:
{
    4f40:	b510      	push	{r4, lr}
    return m_cb.pin_flags[pin] & PIN_FLAG_IN_USE;
    4f42:	4b0c      	ldr	r3, [pc, #48]	; (4f74 <nrfx_gpiote_pin_uninit+0x34>)
    4f44:	f100 0208 	add.w	r2, r0, #8
    4f48:	f833 3012 	ldrh.w	r3, [r3, r2, lsl #1]
{
    4f4c:	4604      	mov	r4, r0
    if (!pin_in_use(pin))
    4f4e:	07db      	lsls	r3, r3, #31
    4f50:	d50d      	bpl.n	4f6e <nrfx_gpiote_pin_uninit+0x2e>
    nrfx_gpiote_trigger_disable(pin);
    4f52:	f7ff ffcd 	bl	4ef0 <nrfx_gpiote_trigger_disable>
    pin_handler_trigger_uninit(pin);
    4f56:	4620      	mov	r0, r4
    4f58:	f7ff fde2 	bl	4b20 <pin_handler_trigger_uninit>
    reg->PIN_CNF[pin_number] = cnf;
    4f5c:	2202      	movs	r2, #2
    4f5e:	4b06      	ldr	r3, [pc, #24]	; (4f78 <nrfx_gpiote_pin_uninit+0x38>)
    *p_pin = pin_number & 0x1F;
    4f60:	f004 041f 	and.w	r4, r4, #31
    reg->PIN_CNF[pin_number] = cnf;
    4f64:	3480      	adds	r4, #128	; 0x80
    4f66:	4805      	ldr	r0, [pc, #20]	; (4f7c <nrfx_gpiote_pin_uninit+0x3c>)
    4f68:	f843 2024 	str.w	r2, [r3, r4, lsl #2]
}
    4f6c:	bd10      	pop	{r4, pc}
        return NRFX_ERROR_INVALID_PARAM;
    4f6e:	4804      	ldr	r0, [pc, #16]	; (4f80 <nrfx_gpiote_pin_uninit+0x40>)
    4f70:	e7fc      	b.n	4f6c <nrfx_gpiote_pin_uninit+0x2c>
    4f72:	bf00      	nop
    4f74:	2000c574 	.word	0x2000c574
    4f78:	50842500 	.word	0x50842500
    4f7c:	0bad0000 	.word	0x0bad0000
    4f80:	0bad0004 	.word	0x0bad0004

00004f84 <nrfx_gpiote_irq_handler>:
        call_handler(pin, gpiote_polarity_to_trigger(polarity));
    }
}

void nrfx_gpiote_irq_handler(void)
{
    4f84:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    uint32_t status = 0;
    4f88:	2500      	movs	r5, #0
    uint32_t i;
    nrf_gpiote_event_t event = NRF_GPIOTE_EVENT_IN_0;
    uint32_t mask = (uint32_t)NRF_GPIOTE_INT_IN0_MASK;
    4f8a:	2201      	movs	r2, #1
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    4f8c:	462c      	mov	r4, r5
{
    4f8e:	4b4d      	ldr	r3, [pc, #308]	; (50c4 <nrfx_gpiote_irq_handler+0x140>)
    return p_reg->INTENSET & mask;
    4f90:	484d      	ldr	r0, [pc, #308]	; (50c8 <nrfx_gpiote_irq_handler+0x144>)

    /* collect status of all GPIOTE pin events. Processing is done once all are collected and cleared.*/
    for (i = 0; i < GPIOTE_CH_NUM; i++)
    4f92:	494e      	ldr	r1, [pc, #312]	; (50cc <nrfx_gpiote_irq_handler+0x148>)
{
    4f94:	b085      	sub	sp, #20
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    4f96:	681e      	ldr	r6, [r3, #0]
    {
        if (nrf_gpiote_event_check(NRF_GPIOTE, event) &&
    4f98:	b136      	cbz	r6, 4fa8 <nrfx_gpiote_irq_handler+0x24>
    return p_reg->INTENSET & mask;
    4f9a:	f8d0 6304 	ldr.w	r6, [r0, #772]	; 0x304
    4f9e:	4216      	tst	r6, r2
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    4fa0:	bf1e      	ittt	ne
    4fa2:	601c      	strne	r4, [r3, #0]
    4fa4:	681e      	ldrne	r6, [r3, #0]
            nrf_gpiote_int_enable_check(NRF_GPIOTE, mask))
        {
            nrf_gpiote_event_clear(NRF_GPIOTE, event);
            status |= mask;
    4fa6:	4315      	orrne	r5, r2
    for (i = 0; i < GPIOTE_CH_NUM; i++)
    4fa8:	3304      	adds	r3, #4
    4faa:	428b      	cmp	r3, r1
        }
        mask <<= 1;
    4fac:	ea4f 0242 	mov.w	r2, r2, lsl #1
    for (i = 0; i < GPIOTE_CH_NUM; i++)
    4fb0:	d1f1      	bne.n	4f96 <nrfx_gpiote_irq_handler+0x12>
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    4fb2:	4f45      	ldr	r7, [pc, #276]	; (50c8 <nrfx_gpiote_irq_handler+0x144>)
    4fb4:	f8d7 317c 	ldr.w	r3, [r7, #380]	; 0x17c
         * in ascending order. */
        event = (nrf_gpiote_event_t)((uint32_t)event + sizeof(uint32_t));
    }

    /* handle PORT event */
    if (nrf_gpiote_event_check(NRF_GPIOTE, NRF_GPIOTE_EVENT_PORT))
    4fb8:	b193      	cbz	r3, 4fe0 <nrfx_gpiote_irq_handler+0x5c>
        *p_masks = gpio_regs[i]->LATCH;
    4fba:	4e45      	ldr	r6, [pc, #276]	; (50d0 <nrfx_gpiote_irq_handler+0x14c>)
    4fbc:	6a33      	ldr	r3, [r6, #32]
    4fbe:	9303      	str	r3, [sp, #12]
        gpio_regs[i]->LATCH = *p_masks;
    4fc0:	6233      	str	r3, [r6, #32]
__STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask)
{
    uint8_t * p_mask8 = (uint8_t *)p_mask;
    uint32_t byte_idx = BITMASK_BYTE_GET(bit);
    bit = BITMASK_RELBIT_GET(bit);
    p_mask8[byte_idx] &= ~(1 << bit);
    4fc2:	f04f 0a01 	mov.w	sl, #1
    4fc6:	f10d 090c 	add.w	r9, sp, #12
            while (latch[i])
    4fca:	9803      	ldr	r0, [sp, #12]
    4fcc:	b970      	cbnz	r0, 4fec <nrfx_gpiote_irq_handler+0x68>
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    4fce:	f8c7 017c 	str.w	r0, [r7, #380]	; 0x17c
    4fd2:	f8d7 317c 	ldr.w	r3, [r7, #380]	; 0x17c
        *p_masks = gpio_regs[i]->LATCH;
    4fd6:	6a33      	ldr	r3, [r6, #32]
    4fd8:	9303      	str	r3, [sp, #12]
        gpio_regs[i]->LATCH = *p_masks;
    4fda:	6233      	str	r3, [r6, #32]
        if (latch[port_idx])
    4fdc:	2b00      	cmp	r3, #0
    4fde:	d1f0      	bne.n	4fc2 <nrfx_gpiote_irq_handler+0x3e>
        mask &= ~NRFX_BIT(ch);
    4fe0:	2401      	movs	r4, #1
    while (mask)
    4fe2:	2d00      	cmp	r5, #0
    4fe4:	d156      	bne.n	5094 <nrfx_gpiote_irq_handler+0x110>
        port_event_handle();
    }

    /* Process pin events. */
    gpiote_evt_handle(status);
}
    4fe6:	b005      	add	sp, #20
    4fe8:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
                uint32_t pin = NRF_CTZ(latch[i]);
    4fec:	fa90 fba0 	rbit	fp, r0
    4ff0:	fabb fb8b 	clz	fp, fp
                nrfx_gpiote_trigger_t trigger = PIN_FLAG_TRIG_MODE_GET(m_cb.pin_flags[pin]);
    4ff4:	4a37      	ldr	r2, [pc, #220]	; (50d4 <nrfx_gpiote_irq_handler+0x150>)
    4ff6:	f10b 0308 	add.w	r3, fp, #8
    uint32_t byte_idx = BITMASK_BYTE_GET(bit);
    4ffa:	ea4f 0cdb 	mov.w	ip, fp, lsr #3
    4ffe:	f832 1013 	ldrh.w	r1, [r2, r3, lsl #1]
    bit = BITMASK_RELBIT_GET(bit);
    5002:	f00b 0407 	and.w	r4, fp, #7
    p_mask8[byte_idx] &= ~(1 << bit);
    5006:	f819 300c 	ldrb.w	r3, [r9, ip]
    500a:	fa0a f404 	lsl.w	r4, sl, r4
    500e:	ea23 0304 	bic.w	r3, r3, r4
    5012:	f809 300c 	strb.w	r3, [r9, ip]
    5016:	eb06 038b 	add.w	r3, r6, fp, lsl #2
    return (nrf_gpio_pin_sense_t)((reg->PIN_CNF[pin_number] &
    501a:	f8d3 4200 	ldr.w	r4, [r3, #512]	; 0x200
    501e:	f3c1 0282 	ubfx	r2, r1, #2, #3
    if (is_level(trigger))
    5022:	06c9      	lsls	r1, r1, #27
                nrfx_gpiote_trigger_t trigger = PIN_FLAG_TRIG_MODE_GET(m_cb.pin_flags[pin]);
    5024:	4690      	mov	r8, r2
                                   GPIO_PIN_CNF_SENSE_Msk) >> GPIO_PIN_CNF_SENSE_Pos);
    5026:	f3c4 4401 	ubfx	r4, r4, #16, #2
    if (is_level(trigger))
    502a:	d518      	bpl.n	505e <nrfx_gpiote_irq_handler+0xda>
        call_handler(pin, trigger);
    502c:	4611      	mov	r1, r2
    502e:	4658      	mov	r0, fp
    5030:	9301      	str	r3, [sp, #4]
    5032:	f7ff fd2d 	bl	4a90 <call_handler>
    return (nrf_gpio_pin_sense_t)((reg->PIN_CNF[pin_number] &
    5036:	9b01      	ldr	r3, [sp, #4]
    5038:	b2e4      	uxtb	r4, r4
    503a:	f8d3 3200 	ldr.w	r3, [r3, #512]	; 0x200
        if (nrf_gpio_pin_sense_get(pin) == sense)
    503e:	f3c3 4301 	ubfx	r3, r3, #16, #2
    5042:	429c      	cmp	r4, r3
    5044:	d107      	bne.n	5056 <nrfx_gpiote_irq_handler+0xd2>
            nrf_gpio_cfg_sense_set(pin, NRF_GPIO_PIN_NOSENSE);
    5046:	2100      	movs	r1, #0
    5048:	4658      	mov	r0, fp
    504a:	f7ff fd07 	bl	4a5c <nrf_gpio_cfg_sense_set>
            nrf_gpio_cfg_sense_set(pin, sense);
    504e:	4621      	mov	r1, r4
    5050:	4658      	mov	r0, fp
    5052:	f7ff fd03 	bl	4a5c <nrf_gpio_cfg_sense_set>
    reg->LATCH = (1 << pin_number);
    5056:	fa0a f00b 	lsl.w	r0, sl, fp
    505a:	6230      	str	r0, [r6, #32]
}
    505c:	e7b5      	b.n	4fca <nrfx_gpiote_irq_handler+0x46>
                NRF_GPIO_PIN_SENSE_LOW : NRF_GPIO_PIN_SENSE_HIGH;
    505e:	2c02      	cmp	r4, #2
    5060:	d10c      	bne.n	507c <nrfx_gpiote_irq_handler+0xf8>
        nrf_gpio_cfg_sense_set(pin, next_sense);
    5062:	2103      	movs	r1, #3
    5064:	4658      	mov	r0, fp
    5066:	f7ff fcf9 	bl	4a5c <nrf_gpio_cfg_sense_set>
        if ((trigger == NRFX_GPIOTE_TRIGGER_TOGGLE) ||
    506a:	f008 0305 	and.w	r3, r8, #5
    506e:	2b01      	cmp	r3, #1
    5070:	d1f1      	bne.n	5056 <nrfx_gpiote_irq_handler+0xd2>
            call_handler(pin, trigger);
    5072:	4641      	mov	r1, r8
    5074:	4658      	mov	r0, fp
    5076:	f7ff fd0b 	bl	4a90 <call_handler>
    507a:	e7ec      	b.n	5056 <nrfx_gpiote_irq_handler+0xd2>
        nrf_gpio_cfg_sense_set(pin, next_sense);
    507c:	2102      	movs	r1, #2
    507e:	4658      	mov	r0, fp
    5080:	9201      	str	r2, [sp, #4]
    5082:	f7ff fceb 	bl	4a5c <nrf_gpio_cfg_sense_set>
        if ((trigger == NRFX_GPIOTE_TRIGGER_TOGGLE) ||
    5086:	9a01      	ldr	r2, [sp, #4]
    5088:	2a03      	cmp	r2, #3
    508a:	d0f2      	beq.n	5072 <nrfx_gpiote_irq_handler+0xee>
            (sense == NRF_GPIO_PIN_SENSE_HIGH && trigger == NRFX_GPIOTE_TRIGGER_LOTOHI) ||
    508c:	2c03      	cmp	r4, #3
    508e:	d1e2      	bne.n	5056 <nrfx_gpiote_irq_handler+0xd2>
            (sense == NRF_GPIO_PIN_SENSE_LOW && trigger == NRFX_GPIOTE_TRIGGER_HITOLO))
    5090:	428a      	cmp	r2, r1
    5092:	e7ed      	b.n	5070 <nrfx_gpiote_irq_handler+0xec>
        uint32_t ch = NRF_CTZ(mask);
    5094:	fa95 f3a5 	rbit	r3, r5
    5098:	fab3 f383 	clz	r3, r3
        mask &= ~NRFX_BIT(ch);
    509c:	fa04 f203 	lsl.w	r2, r4, r3
    50a0:	009b      	lsls	r3, r3, #2
    50a2:	f103 43a0 	add.w	r3, r3, #1342177280	; 0x50000000
    50a6:	f503 4350 	add.w	r3, r3, #53248	; 0xd000
    return ((p_reg->CONFIG[idx] & GPIOTE_CONFIG_PORT_PIN_Msk) >> GPIOTE_CONFIG_PSEL_Pos);
    50aa:	f8d3 0510 	ldr.w	r0, [r3, #1296]	; 0x510
    return (nrf_gpiote_polarity_t)((p_reg->CONFIG[idx] & GPIOTE_CONFIG_POLARITY_Msk) >>
    50ae:	f8d3 1510 	ldr.w	r1, [r3, #1296]	; 0x510
        call_handler(pin, gpiote_polarity_to_trigger(polarity));
    50b2:	f3c0 2004 	ubfx	r0, r0, #8, #5
    50b6:	f3c1 4101 	ubfx	r1, r1, #16, #2
        mask &= ~NRFX_BIT(ch);
    50ba:	ea25 0502 	bic.w	r5, r5, r2
        call_handler(pin, gpiote_polarity_to_trigger(polarity));
    50be:	f7ff fce7 	bl	4a90 <call_handler>
    50c2:	e78e      	b.n	4fe2 <nrfx_gpiote_irq_handler+0x5e>
    50c4:	5000d100 	.word	0x5000d100
    50c8:	5000d000 	.word	0x5000d000
    50cc:	5000d120 	.word	0x5000d120
    50d0:	50842500 	.word	0x50842500
    50d4:	2000c574 	.word	0x2000c574

000050d8 <nvmc_readonly_mode_set>:

#if defined(NVMC_CONFIGNS_WEN_Msk)
NRF_STATIC_INLINE void nrf_nvmc_nonsecure_mode_set(NRF_NVMC_Type *    p_reg,
                                                   nrf_nvmc_ns_mode_t mode)
{
    p_reg->CONFIGNS = (uint32_t)mode;
    50d8:	2200      	movs	r2, #0
    50da:	4b03      	ldr	r3, [pc, #12]	; (50e8 <nvmc_readonly_mode_set+0x10>)
    50dc:	f8c3 2584 	str.w	r2, [r3, #1412]	; 0x584
    p_reg->CONFIG = (uint32_t)mode;
    50e0:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
    nrf_nvmc_nonsecure_mode_set(NRF_NVMC, NRF_NVMC_NS_MODE_READONLY);
#endif
#if !defined(NRF_TRUSTZONE_NONSECURE)
    nrf_nvmc_mode_set(NRF_NVMC, NRF_NVMC_MODE_READONLY);
#endif
}
    50e4:	4770      	bx	lr
    50e6:	bf00      	nop
    50e8:	50039000 	.word	0x50039000

000050ec <nvmc_word_write>:
    return (bool)(p_reg->READYNEXT & NVMC_READYNEXT_READYNEXT_Msk);
    50ec:	4a04      	ldr	r2, [pc, #16]	; (5100 <nvmc_word_write+0x14>)
    50ee:	f8d2 3408 	ldr.w	r3, [r2, #1032]	; 0x408
}

static void nvmc_word_write(uint32_t addr, uint32_t value)
{
#if defined(NRF9160_XXAA)
    while (!nrf_nvmc_write_ready_check(NRF_NVMC))
    50f2:	07db      	lsls	r3, r3, #31
    50f4:	d5fb      	bpl.n	50ee <nvmc_word_write+0x2>
#else
    while (!nrf_nvmc_ready_check(NRF_NVMC))
    {}
#endif

    *(volatile uint32_t *)addr = value;
    50f6:	6001      	str	r1, [r0, #0]
  __ASM volatile ("dmb 0xF":::"memory");
    50f8:	f3bf 8f5f 	dmb	sy
    __DMB();
}
    50fc:	4770      	bx	lr
    50fe:	bf00      	nop
    5100:	50039000 	.word	0x50039000

00005104 <nrfx_nvmc_page_erase>:
        nvmc_word_write(addr + (NVMC_BYTES_IN_WORD * i), ((uint32_t const *)src)[i]);
    }
}

nrfx_err_t nrfx_nvmc_page_erase(uint32_t addr)
{
    5104:	b508      	push	{r3, lr}
    return !(addr % flash_page_size_get());
    5106:	f3c0 030b 	ubfx	r3, r0, #0, #12
    NRFX_ASSERT(is_valid_address(addr, false));

    if (!is_page_aligned_check(addr))
    510a:	b983      	cbnz	r3, 512e <nrfx_nvmc_page_erase+0x2a>
    p_reg->CONFIGNS = (uint32_t)mode;
    510c:	2202      	movs	r2, #2
    510e:	4b09      	ldr	r3, [pc, #36]	; (5134 <nrfx_nvmc_page_erase+0x30>)
    5110:	f8c3 2584 	str.w	r2, [r3, #1412]	; 0x584
    p_reg->CONFIG = (uint32_t)mode;
    5114:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
        p_reg->ERASEPCR1 = page_addr;
    }
#elif defined(NRF52_SERIES)
    p_reg->ERASEPAGE = page_addr;
#elif defined(NRF9160_XXAA) || defined(NRF5340_XXAA_APPLICATION) || defined(NRF5340_XXAA_NETWORK)
    *(volatile uint32_t *)page_addr = 0xFFFFFFFF;
    5118:	f04f 32ff 	mov.w	r2, #4294967295
    511c:	6002      	str	r2, [r0, #0]
    return (bool)(p_reg->READY & NVMC_READY_READY_Msk);
    511e:	f8d3 2400 	ldr.w	r2, [r3, #1024]	; 0x400
        return NRFX_ERROR_INVALID_ADDR;
    }

    nvmc_erase_mode_set();
    nrf_nvmc_page_erase_start(NRF_NVMC, addr);
    while (!nrf_nvmc_ready_check(NRF_NVMC))
    5122:	07d2      	lsls	r2, r2, #31
    5124:	d5fb      	bpl.n	511e <nrfx_nvmc_page_erase+0x1a>
    {}
    nvmc_readonly_mode_set();
    5126:	f7ff ffd7 	bl	50d8 <nvmc_readonly_mode_set>

    return NRFX_SUCCESS;
    512a:	4803      	ldr	r0, [pc, #12]	; (5138 <nrfx_nvmc_page_erase+0x34>)
}
    512c:	bd08      	pop	{r3, pc}
        return NRFX_ERROR_INVALID_ADDR;
    512e:	4803      	ldr	r0, [pc, #12]	; (513c <nrfx_nvmc_page_erase+0x38>)
    5130:	e7fc      	b.n	512c <nrfx_nvmc_page_erase+0x28>
    5132:	bf00      	nop
    5134:	50039000 	.word	0x50039000
    5138:	0bad0000 	.word	0x0bad0000
    513c:	0bad000a 	.word	0x0bad000a

00005140 <nrfx_nvmc_word_write>:
    p_reg->CONFIGNS = (uint32_t)mode;
    5140:	2201      	movs	r2, #1

    nrfx_nvmc_word_write(aligned_addr, partial_word_create(addr, (const uint8_t *)&value, 2));
}

void nrfx_nvmc_word_write(uint32_t addr, uint32_t value)
{
    5142:	b508      	push	{r3, lr}
    5144:	4b05      	ldr	r3, [pc, #20]	; (515c <nrfx_nvmc_word_write+0x1c>)
    5146:	f8c3 2584 	str.w	r2, [r3, #1412]	; 0x584
    p_reg->CONFIG = (uint32_t)mode;
    514a:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
    NRFX_ASSERT(is_valid_address(addr, true));
    NRFX_ASSERT(nrfx_is_word_aligned((void const *)addr));

    nvmc_write_mode_set();

    nvmc_word_write(addr, value);
    514e:	f7ff ffcd 	bl	50ec <nvmc_word_write>

    nvmc_readonly_mode_set();
}
    5152:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
    nvmc_readonly_mode_set();
    5156:	f7ff bfbf 	b.w	50d8 <nvmc_readonly_mode_set>
    515a:	bf00      	nop
    515c:	50039000 	.word	0x50039000

00005160 <z_fatal_error>:
	return 0;
#endif
}

void z_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
{
    5160:	b573      	push	{r0, r1, r4, r5, r6, lr}
    5162:	4604      	mov	r4, r0
    5164:	460d      	mov	r5, r1
	__asm__ volatile(
    5166:	f04f 0320 	mov.w	r3, #32
    516a:	f3ef 8611 	mrs	r6, BASEPRI
    516e:	f383 8812 	msr	BASEPRI_MAX, r3
    5172:	f3bf 8f6f 	isb	sy
			k_current_get() : NULL;

	/* twister looks for the "ZEPHYR FATAL ERROR" string, don't
	 * change it without also updating twister
	 */
	LOG_ERR(">>> ZEPHYR FATAL ERROR %d: %s on CPU %d", reason,
    5176:	2200      	movs	r2, #0
    5178:	2804      	cmp	r0, #4
    517a:	bf96      	itet	ls
    517c:	4b11      	ldrls	r3, [pc, #68]	; (51c4 <z_fatal_error+0x64>)
    517e:	4b12      	ldrhi	r3, [pc, #72]	; (51c8 <z_fatal_error+0x68>)
    5180:	f853 3020 	ldrls.w	r3, [r3, r0, lsl #2]
    5184:	9200      	str	r2, [sp, #0]
    5186:	2145      	movs	r1, #69	; 0x45
    5188:	4602      	mov	r2, r0
    518a:	4810      	ldr	r0, [pc, #64]	; (51cc <z_fatal_error+0x6c>)
    518c:	f000 fe95 	bl	5eba <z_log_minimal_printk>
	 * an IRQ or exception was being handled, or thread context.
	 *
	 * See #17656
	 */
#if defined(CONFIG_ARCH_HAS_NESTED_EXCEPTION_DETECTION)
	if ((esf != NULL) && arch_is_in_nested_exception(esf)) {
    5190:	b13d      	cbz	r5, 51a2 <z_fatal_error+0x42>
 * @return true if execution state was in handler mode, before
 *              the current exception occurred, otherwise false.
 */
static ALWAYS_INLINE bool arch_is_in_nested_exception(const z_arch_esf_t *esf)
{
	return (esf->basic.xpsr & IPSR_ISR_Msk) ? (true) : (false);
    5192:	69eb      	ldr	r3, [r5, #28]
    5194:	f3c3 0308 	ubfx	r3, r3, #0, #9
    5198:	b11b      	cbz	r3, 51a2 <z_fatal_error+0x42>
		LOG_ERR("Fault during interrupt handling\n");
    519a:	2145      	movs	r1, #69	; 0x45
    519c:	480c      	ldr	r0, [pc, #48]	; (51d0 <z_fatal_error+0x70>)
    519e:	f000 fe8c 	bl	5eba <z_log_minimal_printk>
	}
#endif

	LOG_ERR("Current thread: %p (%s)", thread,
    51a2:	2200      	movs	r2, #0
    51a4:	4b0b      	ldr	r3, [pc, #44]	; (51d4 <z_fatal_error+0x74>)
    51a6:	2145      	movs	r1, #69	; 0x45
    51a8:	480b      	ldr	r0, [pc, #44]	; (51d8 <z_fatal_error+0x78>)
    51aa:	f000 fe86 	bl	5eba <z_log_minimal_printk>

#ifndef CONFIG_XTENSA
	coredump(reason, esf, thread);
#endif

	k_sys_fatal_error_handler(reason, esf);
    51ae:	4629      	mov	r1, r5
    51b0:	4620      	mov	r0, r4
    51b2:	f7fe fea5 	bl	3f00 <k_sys_fatal_error_handler>
	__asm__ volatile(
    51b6:	f386 8811 	msr	BASEPRI, r6
    51ba:	f3bf 8f6f 	isb	sy
	arch_irq_unlock(key);

	if (IS_ENABLED(CONFIG_MULTITHREADING)) {
		k_thread_abort(thread);
	}
}
    51be:	b002      	add	sp, #8
    51c0:	bd70      	pop	{r4, r5, r6, pc}
    51c2:	bf00      	nop
    51c4:	00008d00 	.word	0x00008d00
    51c8:	00009b78 	.word	0x00009b78
    51cc:	00009b86 	.word	0x00009b86
    51d0:	00009bb3 	.word	0x00009bb3
    51d4:	00009bd9 	.word	0x00009bd9
    51d8:	00009be1 	.word	0x00009be1

000051dc <z_sys_init_run_level>:
		/* End marker */
		__init_end,
	};
	const struct init_entry *entry;

	for (entry = levels[level]; entry < levels[level+1]; entry++) {
    51dc:	4b0f      	ldr	r3, [pc, #60]	; (521c <z_sys_init_run_level+0x40>)
{
    51de:	b570      	push	{r4, r5, r6, lr}
	for (entry = levels[level]; entry < levels[level+1]; entry++) {
    51e0:	f853 4020 	ldr.w	r4, [r3, r0, lsl #2]
    51e4:	3001      	adds	r0, #1
    51e6:	f853 6020 	ldr.w	r6, [r3, r0, lsl #2]
    51ea:	42a6      	cmp	r6, r4
    51ec:	d800      	bhi.n	51f0 <z_sys_init_run_level+0x14>
				dev->state->init_res = rc;
			}
			dev->state->initialized = true;
		}
	}
}
    51ee:	bd70      	pop	{r4, r5, r6, pc}
		int rc = entry->init(dev);
    51f0:	e9d4 3500 	ldrd	r3, r5, [r4]
    51f4:	4628      	mov	r0, r5
    51f6:	4798      	blx	r3
		if (dev != NULL) {
    51f8:	b16d      	cbz	r5, 5216 <z_sys_init_run_level+0x3a>
			if (rc != 0) {
    51fa:	b138      	cbz	r0, 520c <z_sys_init_run_level+0x30>
				if (rc < 0) {
    51fc:	2800      	cmp	r0, #0
    51fe:	bfb8      	it	lt
    5200:	4240      	neglt	r0, r0
				if (rc > UINT8_MAX) {
    5202:	28ff      	cmp	r0, #255	; 0xff
    5204:	bfa8      	it	ge
    5206:	20ff      	movge	r0, #255	; 0xff
				dev->state->init_res = rc;
    5208:	68eb      	ldr	r3, [r5, #12]
    520a:	7018      	strb	r0, [r3, #0]
			dev->state->initialized = true;
    520c:	68ea      	ldr	r2, [r5, #12]
    520e:	7853      	ldrb	r3, [r2, #1]
    5210:	f043 0301 	orr.w	r3, r3, #1
    5214:	7053      	strb	r3, [r2, #1]
	for (entry = levels[level]; entry < levels[level+1]; entry++) {
    5216:	3408      	adds	r4, #8
    5218:	e7e7      	b.n	51ea <z_sys_init_run_level+0xe>
    521a:	bf00      	nop
    521c:	00008d14 	.word	0x00008d14

00005220 <bg_thread_main>:
	 * may perform memory management tasks (except for z_phys_map() which
	 * is allowed at any time)
	 */
	z_mem_manage_init();
#endif /* CONFIG_MMU */
	z_sys_post_kernel = true;
    5220:	2201      	movs	r2, #1
{
    5222:	b508      	push	{r3, lr}
	z_sys_post_kernel = true;
    5224:	4b08      	ldr	r3, [pc, #32]	; (5248 <bg_thread_main+0x28>)

	z_sys_init_run_level(INIT_LEVEL_POST_KERNEL);
    5226:	2003      	movs	r0, #3
	z_sys_post_kernel = true;
    5228:	701a      	strb	r2, [r3, #0]
	z_sys_init_run_level(INIT_LEVEL_POST_KERNEL);
    522a:	f7ff ffd7 	bl	51dc <z_sys_init_run_level>
#if CONFIG_STACK_POINTER_RANDOM
	z_stack_adjust_initialized = 1;
#endif
	boot_banner();
    522e:	f000 f90f 	bl	5450 <boot_banner>
	void z_cpp_init_static(void);
	z_cpp_init_static();
#endif

	/* Final init level before app starts */
	z_sys_init_run_level(INIT_LEVEL_APPLICATION);
    5232:	2004      	movs	r0, #4
    5234:	f7ff ffd2 	bl	51dc <z_sys_init_run_level>
	z_mem_manage_boot_finish();
#endif /* CONFIG_MMU */

	extern void main(void);

	main();
    5238:	f7fb f8ec 	bl	414 <main>

	/* Mark nonessential since main() has no more work to do */
	z_main_thread.base.user_options &= ~K_ESSENTIAL;
    523c:	4a03      	ldr	r2, [pc, #12]	; (524c <bg_thread_main+0x2c>)
    523e:	7b13      	ldrb	r3, [r2, #12]
    5240:	f023 0301 	bic.w	r3, r3, #1
    5244:	7313      	strb	r3, [r2, #12]

#ifdef CONFIG_COVERAGE_DUMP
	/* Dump coverage data once the main() has exited. */
	gcov_coverage_dump();
#endif
} /* LCOV_EXCL_LINE ... because we just dumped final coverage data */
    5246:	bd08      	pop	{r3, pc}
    5248:	20010259 	.word	0x20010259
    524c:	2000c668 	.word	0x2000c668

00005250 <z_bss_zero>:
{
    5250:	b508      	push	{r3, lr}
	z_early_memset(__bss_start, 0, __bss_end - __bss_start);
    5252:	4803      	ldr	r0, [pc, #12]	; (5260 <z_bss_zero+0x10>)
    5254:	4a03      	ldr	r2, [pc, #12]	; (5264 <z_bss_zero+0x14>)
    5256:	2100      	movs	r1, #0
    5258:	1a12      	subs	r2, r2, r0
    525a:	f003 f9fb 	bl	8654 <z_early_memset>
}
    525e:	bd08      	pop	{r3, pc}
    5260:	2000c648 	.word	0x2000c648
    5264:	2001025c 	.word	0x2001025c

00005268 <z_cstart>:
 *
 * @return Does not return
 */
__boot_func
FUNC_NORETURN void z_cstart(void)
{
    5268:	b508      	push	{r3, lr}
	/* gcov hook needed to get the coverage report.*/
	gcov_static_init();

	/* initialize early init calls */
	z_sys_init_run_level(INIT_LEVEL_EARLY);
    526a:	2000      	movs	r0, #0
    526c:	f7ff ffb6 	bl	51dc <z_sys_init_run_level>
 *
 */
static ALWAYS_INLINE void z_arm_interrupt_stack_setup(void)
{
	uint32_t msp =
		(uint32_t)(Z_KERNEL_STACK_BUFFER(z_interrupt_stacks[0])) +
    5270:	4b16      	ldr	r3, [pc, #88]	; (52cc <z_cstart+0x64>)
	uint32_t msp =
    5272:	f503 6200 	add.w	r2, r3, #2048	; 0x800
  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
    5276:	f382 8808 	msr	MSP, r2
  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
    527a:	f383 880a 	msr	MSPLIM, r3
    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    527e:	2500      	movs	r5, #0
    5280:	23e0      	movs	r3, #224	; 0xe0
    5282:	4c13      	ldr	r4, [pc, #76]	; (52d0 <z_cstart+0x68>)
    5284:	f884 3022 	strb.w	r3, [r4, #34]	; 0x22
    5288:	77e5      	strb	r5, [r4, #31]
    528a:	7625      	strb	r5, [r4, #24]
    528c:	7665      	strb	r5, [r4, #25]
    528e:	76a5      	strb	r5, [r4, #26]
    5290:	f884 5020 	strb.w	r5, [r4, #32]
#if defined(CONFIG_ARM_SECURE_FIRMWARE)
	NVIC_SetPriority(SecureFault_IRQn, _EXC_FAULT_PRIO);
#endif /* CONFIG_ARM_SECURE_FIRMWARE */

	/* Enable Usage, Mem, & Bus Faults */
	SCB->SHCSR |= SCB_SHCSR_USGFAULTENA_Msk | SCB_SHCSR_MEMFAULTENA_Msk |
    5294:	6a63      	ldr	r3, [r4, #36]	; 0x24
    5296:	f443 23e0 	orr.w	r3, r3, #458752	; 0x70000
    529a:	6263      	str	r3, [r4, #36]	; 0x24
    529c:	f884 5023 	strb.w	r5, [r4, #35]	; 0x23

static ALWAYS_INLINE void arch_kernel_init(void)
{
	z_arm_interrupt_stack_setup();
	z_arm_exc_setup();
	z_arm_fault_init();
    52a0:	f7fd fe3e 	bl	2f20 <z_arm_fault_init>
	z_arm_cpu_idle_init();
    52a4:	f7fd fb7a 	bl	299c <z_arm_cpu_idle_init>
static ALWAYS_INLINE void z_arm_clear_faults(void)
{
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	/* Reset all faults */
	SCB->CFSR = SCB_CFSR_USGFAULTSR_Msk |
    52a8:	f04f 33ff 	mov.w	r3, #4294967295
    52ac:	62a3      	str	r3, [r4, #40]	; 0x28
		    SCB_CFSR_MEMFAULTSR_Msk |
		    SCB_CFSR_BUSFAULTSR_Msk;

	/* Clear all Hard Faults - HFSR is write-one-to-clear */
	SCB->HFSR = 0xffffffff;
    52ae:	62e3      	str	r3, [r4, #44]	; 0x2c
	struct k_thread dummy_thread;

	z_dummy_thread_init(&dummy_thread);
#endif
	/* do any necessary initialization of static devices */
	z_device_state_init();
    52b0:	f003 f9c4 	bl	863c <z_device_state_init>

	/* perform basic hardware initialization */
	z_sys_init_run_level(INIT_LEVEL_PRE_KERNEL_1);
    52b4:	2001      	movs	r0, #1
    52b6:	f7ff ff91 	bl	51dc <z_sys_init_run_level>
	z_sys_init_run_level(INIT_LEVEL_PRE_KERNEL_2);
    52ba:	2002      	movs	r0, #2
    52bc:	f7ff ff8e 	bl	51dc <z_sys_init_run_level>
#else
#ifdef ARCH_SWITCH_TO_MAIN_NO_MULTITHREADING
	/* Custom ARCH-specific routine to switch to main()
	 * in the case of no multi-threading.
	 */
	ARCH_SWITCH_TO_MAIN_NO_MULTITHREADING(bg_thread_main,
    52c0:	462b      	mov	r3, r5
    52c2:	462a      	mov	r2, r5
    52c4:	4629      	mov	r1, r5
    52c6:	4803      	ldr	r0, [pc, #12]	; (52d4 <z_cstart+0x6c>)
    52c8:	f7fd fc16 	bl	2af8 <z_arm_switch_to_main_no_multithreading>
    52cc:	20010260 	.word	0x20010260
    52d0:	e000ed00 	.word	0xe000ed00
    52d4:	00005221 	.word	0x00005221

000052d8 <z_data_copy>:
 * @brief Copy the data section from ROM to RAM
 *
 * This routine copies the data section from ROM to RAM.
 */
void z_data_copy(void)
{
    52d8:	b508      	push	{r3, lr}
	z_early_memcpy(&__data_region_start, &__data_region_load_start,
		       __data_region_end - __data_region_start);
    52da:	4806      	ldr	r0, [pc, #24]	; (52f4 <z_data_copy+0x1c>)
	z_early_memcpy(&__data_region_start, &__data_region_load_start,
    52dc:	4a06      	ldr	r2, [pc, #24]	; (52f8 <z_data_copy+0x20>)
    52de:	4907      	ldr	r1, [pc, #28]	; (52fc <z_data_copy+0x24>)
    52e0:	1a12      	subs	r2, r2, r0
    52e2:	f003 f9b9 	bl	8658 <z_early_memcpy>
#else
	z_early_memcpy(&_app_smem_start, &_app_smem_rom_start,
		       _app_smem_end - _app_smem_start);
#endif /* CONFIG_STACK_CANARIES */
#endif /* CONFIG_USERSPACE */
}
    52e6:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
	z_early_memcpy(&__ramfunc_start, &__ramfunc_load_start,
    52ea:	4a05      	ldr	r2, [pc, #20]	; (5300 <z_data_copy+0x28>)
    52ec:	4905      	ldr	r1, [pc, #20]	; (5304 <z_data_copy+0x2c>)
    52ee:	4806      	ldr	r0, [pc, #24]	; (5308 <z_data_copy+0x30>)
    52f0:	f003 b9b2 	b.w	8658 <z_early_memcpy>
    52f4:	2000c4e8 	.word	0x2000c4e8
    52f8:	2000c642 	.word	0x2000c642
    52fc:	00009c7c 	.word	0x00009c7c
    5300:	00000000 	.word	0x00000000
    5304:	00009c7c 	.word	0x00009c7c
    5308:	2000c4e8 	.word	0x2000c4e8

0000530c <elapsed>:
	sys_dlist_remove(&t->node);
}

static int32_t elapsed(void)
{
	return announce_remaining == 0 ? sys_clock_elapsed() : 0U;
    530c:	4b03      	ldr	r3, [pc, #12]	; (531c <elapsed+0x10>)
    530e:	681b      	ldr	r3, [r3, #0]
    5310:	b90b      	cbnz	r3, 5316 <elapsed+0xa>
    5312:	f7fe bd67 	b.w	3de4 <sys_clock_elapsed>
}
    5316:	2000      	movs	r0, #0
    5318:	4770      	bx	lr
    531a:	bf00      	nop
    531c:	2000e074 	.word	0x2000e074

00005320 <next_timeout>:

static int32_t next_timeout(void)
{
    5320:	b510      	push	{r4, lr}
 * @return true if empty, false otherwise
 */

static inline bool sys_dlist_is_empty(sys_dlist_t *list)
{
	return list->head == list;
    5322:	4b0e      	ldr	r3, [pc, #56]	; (535c <next_timeout+0x3c>)
    5324:	681c      	ldr	r4, [r3, #0]
 * @return a pointer to the head element, NULL if list is empty
 */

static inline sys_dnode_t *sys_dlist_peek_head(sys_dlist_t *list)
{
	return sys_dlist_is_empty(list) ? NULL : list->head;
    5326:	429c      	cmp	r4, r3
    5328:	d104      	bne.n	5334 <next_timeout+0x14>
	struct _timeout *to = first();
	int32_t ticks_elapsed = elapsed();
    532a:	f7ff ffef 	bl	530c <elapsed>
	int32_t ret;

	if ((to == NULL) ||
	    ((int64_t)(to->dticks - ticks_elapsed) > (int64_t)INT_MAX)) {
		ret = MAX_WAIT;
    532e:	f06f 4000 	mvn.w	r0, #2147483648	; 0x80000000
	if (_current_cpu->slice_ticks && _current_cpu->slice_ticks < ret) {
		ret = _current_cpu->slice_ticks;
	}
#endif
	return ret;
}
    5332:	bd10      	pop	{r4, pc}
	int32_t ticks_elapsed = elapsed();
    5334:	f7ff ffea 	bl	530c <elapsed>
	if ((to == NULL) ||
    5338:	2c00      	cmp	r4, #0
    533a:	d0f8      	beq.n	532e <next_timeout+0xe>
	    ((int64_t)(to->dticks - ticks_elapsed) > (int64_t)INT_MAX)) {
    533c:	e9d4 3204 	ldrd	r3, r2, [r4, #16]
    5340:	1a1b      	subs	r3, r3, r0
    5342:	eb62 72e0 	sbc.w	r2, r2, r0, asr #31
	if ((to == NULL) ||
    5346:	f1b3 4f00 	cmp.w	r3, #2147483648	; 0x80000000
    534a:	f172 0100 	sbcs.w	r1, r2, #0
    534e:	daee      	bge.n	532e <next_timeout+0xe>
		ret = MAX(0, to->dticks - ticks_elapsed);
    5350:	2a00      	cmp	r2, #0
    5352:	bfac      	ite	ge
    5354:	4618      	movge	r0, r3
    5356:	2000      	movlt	r0, #0
	return ret;
    5358:	e7eb      	b.n	5332 <next_timeout+0x12>
    535a:	bf00      	nop
    535c:	2000c5d0 	.word	0x2000c5d0

00005360 <remove_timeout>:
{
    5360:	b530      	push	{r4, r5, lr}
 */

static inline sys_dnode_t *sys_dlist_peek_next(sys_dlist_t *list,
					       sys_dnode_t *node)
{
	return (node != NULL) ? sys_dlist_peek_next_no_check(list, node) : NULL;
    5362:	b170      	cbz	r0, 5382 <remove_timeout+0x22>
	return (node == list->tail) ? NULL : node->next;
    5364:	4b0b      	ldr	r3, [pc, #44]	; (5394 <remove_timeout+0x34>)
    5366:	685b      	ldr	r3, [r3, #4]
    5368:	4298      	cmp	r0, r3
    536a:	d00a      	beq.n	5382 <remove_timeout+0x22>
    536c:	6803      	ldr	r3, [r0, #0]
	if (next(t) != NULL) {
    536e:	b143      	cbz	r3, 5382 <remove_timeout+0x22>
		next(t)->dticks += t->dticks;
    5370:	e9d3 2104 	ldrd	r2, r1, [r3, #16]
    5374:	e9d0 4504 	ldrd	r4, r5, [r0, #16]
    5378:	1912      	adds	r2, r2, r4
    537a:	eb41 0105 	adc.w	r1, r1, r5
    537e:	e9c3 2104 	strd	r2, r1, [r3, #16]
 */

static inline void sys_dlist_remove(sys_dnode_t *node)
{
	sys_dnode_t *const prev = node->prev;
	sys_dnode_t *const next = node->next;
    5382:	e9d0 3200 	ldrd	r3, r2, [r0]

	prev->next = next;
    5386:	6013      	str	r3, [r2, #0]
	next->prev = prev;
    5388:	605a      	str	r2, [r3, #4]
	node->next = NULL;
    538a:	2300      	movs	r3, #0
	node->prev = NULL;
    538c:	e9c0 3300 	strd	r3, r3, [r0]
}
    5390:	bd30      	pop	{r4, r5, pc}
    5392:	bf00      	nop
    5394:	2000c5d0 	.word	0x2000c5d0

00005398 <sys_clock_announce>:
		}
	}
}

void sys_clock_announce(int32_t ticks)
{
    5398:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    539c:	4603      	mov	r3, r0
	__asm__ volatile(
    539e:	f04f 0220 	mov.w	r2, #32
    53a2:	f3ef 8411 	mrs	r4, BASEPRI
    53a6:	f382 8812 	msr	BASEPRI_MAX, r2
    53aa:	f3bf 8f6f 	isb	sy
		announce_remaining += ticks;
		k_spin_unlock(&timeout_lock, key);
		return;
	}

	announce_remaining = ticks;
    53ae:	4f25      	ldr	r7, [pc, #148]	; (5444 <sys_clock_announce+0xac>)
	return list->head == list;
    53b0:	f8df 9094 	ldr.w	r9, [pc, #148]	; 5448 <sys_clock_announce+0xb0>
    53b4:	f8d9 0000 	ldr.w	r0, [r9]

	while (first() != NULL && first()->dticks <= announce_remaining) {
		struct _timeout *t = first();
		int dt = t->dticks;

		curr_tick += dt;
    53b8:	f8df c090 	ldr.w	ip, [pc, #144]	; 544c <sys_clock_announce+0xb4>
	return sys_dlist_is_empty(list) ? NULL : list->head;
    53bc:	4548      	cmp	r0, r9
	announce_remaining = ticks;
    53be:	603b      	str	r3, [r7, #0]
	return list->head == list;
    53c0:	ea4f 75e3 	mov.w	r5, r3, asr #31
		curr_tick += dt;
    53c4:	e9dc 1e00 	ldrd	r1, lr, [ip]
	return sys_dlist_is_empty(list) ? NULL : list->head;
    53c8:	d00c      	beq.n	53e4 <sys_clock_announce+0x4c>
	while (first() != NULL && first()->dticks <= announce_remaining) {
    53ca:	b158      	cbz	r0, 53e4 <sys_clock_announce+0x4c>
    53cc:	e9d0 8604 	ldrd	r8, r6, [r0, #16]
    53d0:	4543      	cmp	r3, r8
    53d2:	eb75 0206 	sbcs.w	r2, r5, r6
    53d6:	da17      	bge.n	5408 <sys_clock_announce+0x70>
		key = k_spin_lock(&timeout_lock);
		announce_remaining -= dt;
	}

	if (first() != NULL) {
		first()->dticks -= announce_remaining;
    53d8:	ebb8 0203 	subs.w	r2, r8, r3
    53dc:	eb66 0605 	sbc.w	r6, r6, r5
    53e0:	e9c0 2604 	strd	r2, r6, [r0, #16]
	}

	curr_tick += announce_remaining;
    53e4:	1859      	adds	r1, r3, r1
    53e6:	eb4e 0505 	adc.w	r5, lr, r5
    53ea:	e9cc 1500 	strd	r1, r5, [ip]
	announce_remaining = 0;
    53ee:	2500      	movs	r5, #0
    53f0:	603d      	str	r5, [r7, #0]

	sys_clock_set_timeout(next_timeout(), false);
    53f2:	f7ff ff95 	bl	5320 <next_timeout>
    53f6:	4629      	mov	r1, r5
    53f8:	f7fe fcc4 	bl	3d84 <sys_clock_set_timeout>
	__asm__ volatile(
    53fc:	f384 8811 	msr	BASEPRI, r4
    5400:	f3bf 8f6f 	isb	sy

	k_spin_unlock(&timeout_lock, key);
}
    5404:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
		curr_tick += dt;
    5408:	eb18 0101 	adds.w	r1, r8, r1
    540c:	eb4e 73e8 	adc.w	r3, lr, r8, asr #31
		t->dticks = 0;
    5410:	2200      	movs	r2, #0
		curr_tick += dt;
    5412:	e9cc 1300 	strd	r1, r3, [ip]
		t->dticks = 0;
    5416:	2300      	movs	r3, #0
    5418:	e9c0 2304 	strd	r2, r3, [r0, #16]
		remove_timeout(t);
    541c:	f7ff ffa0 	bl	5360 <remove_timeout>
    5420:	f384 8811 	msr	BASEPRI, r4
    5424:	f3bf 8f6f 	isb	sy
		t->fn(t);
    5428:	6883      	ldr	r3, [r0, #8]
    542a:	4798      	blx	r3
	__asm__ volatile(
    542c:	f04f 0320 	mov.w	r3, #32
    5430:	f3ef 8411 	mrs	r4, BASEPRI
    5434:	f383 8812 	msr	BASEPRI_MAX, r3
    5438:	f3bf 8f6f 	isb	sy
		announce_remaining -= dt;
    543c:	683b      	ldr	r3, [r7, #0]
    543e:	eba3 0308 	sub.w	r3, r3, r8
    5442:	e7b7      	b.n	53b4 <sys_clock_announce+0x1c>
    5444:	2000e074 	.word	0x2000e074
    5448:	2000c5d0 	.word	0x2000c5d0
    544c:	2000c6e8 	.word	0x2000c6e8

00005450 <boot_banner>:
	printk("***** delaying boot " DELAY_STR "ms (per build configuration) *****\n");
	k_busy_wait(CONFIG_BOOT_DELAY * USEC_PER_MSEC);
#endif /* defined(CONFIG_BOOT_DELAY) && (CONFIG_BOOT_DELAY > 0) */

#if CONFIG_BOOT_BANNER
	printk("*** Booting Zephyr OS build " BANNER_VERSION BANNER_POSTFIX " ***\n");
    5450:	4801      	ldr	r0, [pc, #4]	; (5458 <boot_banner+0x8>)
    5452:	f000 bc4b 	b.w	5cec <printk>
    5456:	bf00      	nop
    5458:	00009c4b 	.word	0x00009c4b

0000545c <nrf_cc3xx_platform_init_no_rng>:
    545c:	b510      	push	{r4, lr}
    545e:	4c0a      	ldr	r4, [pc, #40]	; (5488 <nrf_cc3xx_platform_init_no_rng+0x2c>)
    5460:	6823      	ldr	r3, [r4, #0]
    5462:	b11b      	cbz	r3, 546c <nrf_cc3xx_platform_init_no_rng+0x10>
    5464:	2301      	movs	r3, #1
    5466:	2000      	movs	r0, #0
    5468:	6023      	str	r3, [r4, #0]
    546a:	bd10      	pop	{r4, pc}
    546c:	f000 f850 	bl	5510 <CC_LibInitNoRng>
    5470:	2800      	cmp	r0, #0
    5472:	d0f7      	beq.n	5464 <nrf_cc3xx_platform_init_no_rng+0x8>
    5474:	3801      	subs	r0, #1
    5476:	2806      	cmp	r0, #6
    5478:	d803      	bhi.n	5482 <nrf_cc3xx_platform_init_no_rng+0x26>
    547a:	4b04      	ldr	r3, [pc, #16]	; (548c <nrf_cc3xx_platform_init_no_rng+0x30>)
    547c:	f853 0020 	ldr.w	r0, [r3, r0, lsl #2]
    5480:	bd10      	pop	{r4, pc}
    5482:	4803      	ldr	r0, [pc, #12]	; (5490 <nrf_cc3xx_platform_init_no_rng+0x34>)
    5484:	bd10      	pop	{r4, pc}
    5486:	bf00      	nop
    5488:	2000e078 	.word	0x2000e078
    548c:	00008d2c 	.word	0x00008d2c
    5490:	ffff8ffe 	.word	0xffff8ffe

00005494 <nrf_cc3xx_platform_abort>:
    5494:	f3bf 8f4f 	dsb	sy
    5498:	4905      	ldr	r1, [pc, #20]	; (54b0 <nrf_cc3xx_platform_abort+0x1c>)
    549a:	4b06      	ldr	r3, [pc, #24]	; (54b4 <nrf_cc3xx_platform_abort+0x20>)
    549c:	68ca      	ldr	r2, [r1, #12]
    549e:	f402 62e0 	and.w	r2, r2, #1792	; 0x700
    54a2:	4313      	orrs	r3, r2
    54a4:	60cb      	str	r3, [r1, #12]
    54a6:	f3bf 8f4f 	dsb	sy
    54aa:	bf00      	nop
    54ac:	e7fd      	b.n	54aa <nrf_cc3xx_platform_abort+0x16>
    54ae:	bf00      	nop
    54b0:	e000ed00 	.word	0xe000ed00
    54b4:	05fa0004 	.word	0x05fa0004

000054b8 <CC_PalAbort>:
    54b8:	b430      	push	{r4, r5}
    54ba:	f04f 32fe 	mov.w	r2, #4278124286	; 0xfefefefe
    54be:	2500      	movs	r5, #0
    54c0:	4b07      	ldr	r3, [pc, #28]	; (54e0 <CC_PalAbort+0x28>)
    54c2:	4c08      	ldr	r4, [pc, #32]	; (54e4 <CC_PalAbort+0x2c>)
    54c4:	4908      	ldr	r1, [pc, #32]	; (54e8 <CC_PalAbort+0x30>)
    54c6:	6849      	ldr	r1, [r1, #4]
    54c8:	f8c3 2400 	str.w	r2, [r3, #1024]	; 0x400
    54cc:	f8c3 2404 	str.w	r2, [r3, #1028]	; 0x404
    54d0:	f8c3 2408 	str.w	r2, [r3, #1032]	; 0x408
    54d4:	f8c3 240c 	str.w	r2, [r3, #1036]	; 0x40c
    54d8:	f8c4 5500 	str.w	r5, [r4, #1280]	; 0x500
    54dc:	bc30      	pop	{r4, r5}
    54de:	4708      	bx	r1
    54e0:	50841000 	.word	0x50841000
    54e4:	50840000 	.word	0x50840000
    54e8:	2000c5d8 	.word	0x2000c5d8

000054ec <nrf_cc3xx_platform_set_abort>:
    54ec:	4b02      	ldr	r3, [pc, #8]	; (54f8 <nrf_cc3xx_platform_set_abort+0xc>)
    54ee:	e9d0 1200 	ldrd	r1, r2, [r0]
    54f2:	e9c3 1200 	strd	r1, r2, [r3]
    54f6:	4770      	bx	lr
    54f8:	2000c5d8 	.word	0x2000c5d8

000054fc <mbedtls_platform_zeroize>:
    54fc:	b138      	cbz	r0, 550e <mbedtls_platform_zeroize+0x12>
    54fe:	b131      	cbz	r1, 550e <mbedtls_platform_zeroize+0x12>
    5500:	2200      	movs	r2, #0
    5502:	4401      	add	r1, r0
    5504:	4603      	mov	r3, r0
    5506:	3001      	adds	r0, #1
    5508:	4288      	cmp	r0, r1
    550a:	701a      	strb	r2, [r3, #0]
    550c:	d1fa      	bne.n	5504 <mbedtls_platform_zeroize+0x8>
    550e:	4770      	bx	lr

00005510 <CC_LibInitNoRng>:
    5510:	b538      	push	{r3, r4, r5, lr}
    5512:	f000 f82f 	bl	5574 <CC_HalInit>
    5516:	b120      	cbz	r0, 5522 <CC_LibInitNoRng+0x12>
    5518:	2403      	movs	r4, #3
    551a:	f000 f863 	bl	55e4 <CC_PalTerminate>
    551e:	4620      	mov	r0, r4
    5520:	bd38      	pop	{r3, r4, r5, pc}
    5522:	f000 f831 	bl	5588 <CC_PalInit>
    5526:	b998      	cbnz	r0, 5550 <CC_LibInitNoRng+0x40>
    5528:	f000 f8ac 	bl	5684 <CC_PalPowerSaveModeSelect>
    552c:	b998      	cbnz	r0, 5556 <CC_LibInitNoRng+0x46>
    552e:	4d0f      	ldr	r5, [pc, #60]	; (556c <CC_LibInitNoRng+0x5c>)
    5530:	f8d5 3928 	ldr.w	r3, [r5, #2344]	; 0x928
    5534:	0e1b      	lsrs	r3, r3, #24
    5536:	2bf0      	cmp	r3, #240	; 0xf0
    5538:	d108      	bne.n	554c <CC_LibInitNoRng+0x3c>
    553a:	f8d5 2a24 	ldr.w	r2, [r5, #2596]	; 0xa24
    553e:	4b0c      	ldr	r3, [pc, #48]	; (5570 <CC_LibInitNoRng+0x60>)
    5540:	429a      	cmp	r2, r3
    5542:	d00a      	beq.n	555a <CC_LibInitNoRng+0x4a>
    5544:	2407      	movs	r4, #7
    5546:	f000 f817 	bl	5578 <CC_HalTerminate>
    554a:	e7e6      	b.n	551a <CC_LibInitNoRng+0xa>
    554c:	2406      	movs	r4, #6
    554e:	e7fa      	b.n	5546 <CC_LibInitNoRng+0x36>
    5550:	2404      	movs	r4, #4
    5552:	4620      	mov	r0, r4
    5554:	bd38      	pop	{r3, r4, r5, pc}
    5556:	2400      	movs	r4, #0
    5558:	e7f5      	b.n	5546 <CC_LibInitNoRng+0x36>
    555a:	2001      	movs	r0, #1
    555c:	f000 f892 	bl	5684 <CC_PalPowerSaveModeSelect>
    5560:	4604      	mov	r4, r0
    5562:	2800      	cmp	r0, #0
    5564:	d1f7      	bne.n	5556 <CC_LibInitNoRng+0x46>
    5566:	f8c5 0a0c 	str.w	r0, [r5, #2572]	; 0xa0c
    556a:	e7d8      	b.n	551e <CC_LibInitNoRng+0xe>
    556c:	50841000 	.word	0x50841000
    5570:	20e00000 	.word	0x20e00000

00005574 <CC_HalInit>:
    5574:	2000      	movs	r0, #0
    5576:	4770      	bx	lr

00005578 <CC_HalTerminate>:
    5578:	2000      	movs	r0, #0
    557a:	4770      	bx	lr

0000557c <CC_HalMaskInterrupt>:
    557c:	4b01      	ldr	r3, [pc, #4]	; (5584 <CC_HalMaskInterrupt+0x8>)
    557e:	f8c3 0a04 	str.w	r0, [r3, #2564]	; 0xa04
    5582:	4770      	bx	lr
    5584:	50841000 	.word	0x50841000

00005588 <CC_PalInit>:
    5588:	b510      	push	{r4, lr}
    558a:	4811      	ldr	r0, [pc, #68]	; (55d0 <CC_PalInit+0x48>)
    558c:	f000 f848 	bl	5620 <CC_PalMutexCreate>
    5590:	b100      	cbz	r0, 5594 <CC_PalInit+0xc>
    5592:	bd10      	pop	{r4, pc}
    5594:	480f      	ldr	r0, [pc, #60]	; (55d4 <CC_PalInit+0x4c>)
    5596:	f000 f843 	bl	5620 <CC_PalMutexCreate>
    559a:	2800      	cmp	r0, #0
    559c:	d1f9      	bne.n	5592 <CC_PalInit+0xa>
    559e:	4c0e      	ldr	r4, [pc, #56]	; (55d8 <CC_PalInit+0x50>)
    55a0:	4620      	mov	r0, r4
    55a2:	f000 f83d 	bl	5620 <CC_PalMutexCreate>
    55a6:	2800      	cmp	r0, #0
    55a8:	d1f3      	bne.n	5592 <CC_PalInit+0xa>
    55aa:	4b0c      	ldr	r3, [pc, #48]	; (55dc <CC_PalInit+0x54>)
    55ac:	480c      	ldr	r0, [pc, #48]	; (55e0 <CC_PalInit+0x58>)
    55ae:	601c      	str	r4, [r3, #0]
    55b0:	f000 f836 	bl	5620 <CC_PalMutexCreate>
    55b4:	4601      	mov	r1, r0
    55b6:	2800      	cmp	r0, #0
    55b8:	d1eb      	bne.n	5592 <CC_PalInit+0xa>
    55ba:	f000 f82d 	bl	5618 <CC_PalDmaInit>
    55be:	4604      	mov	r4, r0
    55c0:	b108      	cbz	r0, 55c6 <CC_PalInit+0x3e>
    55c2:	4620      	mov	r0, r4
    55c4:	bd10      	pop	{r4, pc}
    55c6:	f000 f83f 	bl	5648 <CC_PalPowerSaveModeInit>
    55ca:	4620      	mov	r0, r4
    55cc:	e7fa      	b.n	55c4 <CC_PalInit+0x3c>
    55ce:	bf00      	nop
    55d0:	2000c5ec 	.word	0x2000c5ec
    55d4:	2000c5e0 	.word	0x2000c5e0
    55d8:	2000c5e8 	.word	0x2000c5e8
    55dc:	2000c5f0 	.word	0x2000c5f0
    55e0:	2000c5e4 	.word	0x2000c5e4

000055e4 <CC_PalTerminate>:
    55e4:	b508      	push	{r3, lr}
    55e6:	4808      	ldr	r0, [pc, #32]	; (5608 <CC_PalTerminate+0x24>)
    55e8:	f000 f824 	bl	5634 <CC_PalMutexDestroy>
    55ec:	4807      	ldr	r0, [pc, #28]	; (560c <CC_PalTerminate+0x28>)
    55ee:	f000 f821 	bl	5634 <CC_PalMutexDestroy>
    55f2:	4807      	ldr	r0, [pc, #28]	; (5610 <CC_PalTerminate+0x2c>)
    55f4:	f000 f81e 	bl	5634 <CC_PalMutexDestroy>
    55f8:	4806      	ldr	r0, [pc, #24]	; (5614 <CC_PalTerminate+0x30>)
    55fa:	f000 f81b 	bl	5634 <CC_PalMutexDestroy>
    55fe:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
    5602:	f000 b80b 	b.w	561c <CC_PalDmaTerminate>
    5606:	bf00      	nop
    5608:	2000c5ec 	.word	0x2000c5ec
    560c:	2000c5e0 	.word	0x2000c5e0
    5610:	2000c5e8 	.word	0x2000c5e8
    5614:	2000c5e4 	.word	0x2000c5e4

00005618 <CC_PalDmaInit>:
    5618:	2000      	movs	r0, #0
    561a:	4770      	bx	lr

0000561c <CC_PalDmaTerminate>:
    561c:	4770      	bx	lr
    561e:	bf00      	nop

00005620 <CC_PalMutexCreate>:
    5620:	b508      	push	{r3, lr}
    5622:	4b03      	ldr	r3, [pc, #12]	; (5630 <CC_PalMutexCreate+0x10>)
    5624:	6802      	ldr	r2, [r0, #0]
    5626:	681b      	ldr	r3, [r3, #0]
    5628:	6810      	ldr	r0, [r2, #0]
    562a:	4798      	blx	r3
    562c:	2000      	movs	r0, #0
    562e:	bd08      	pop	{r3, pc}
    5630:	2000c5fc 	.word	0x2000c5fc

00005634 <CC_PalMutexDestroy>:
    5634:	b508      	push	{r3, lr}
    5636:	4b03      	ldr	r3, [pc, #12]	; (5644 <CC_PalMutexDestroy+0x10>)
    5638:	6802      	ldr	r2, [r0, #0]
    563a:	685b      	ldr	r3, [r3, #4]
    563c:	6810      	ldr	r0, [r2, #0]
    563e:	4798      	blx	r3
    5640:	2000      	movs	r0, #0
    5642:	bd08      	pop	{r3, pc}
    5644:	2000c5fc 	.word	0x2000c5fc

00005648 <CC_PalPowerSaveModeInit>:
    5648:	b570      	push	{r4, r5, r6, lr}
    564a:	4c09      	ldr	r4, [pc, #36]	; (5670 <CC_PalPowerSaveModeInit+0x28>)
    564c:	4d09      	ldr	r5, [pc, #36]	; (5674 <CC_PalPowerSaveModeInit+0x2c>)
    564e:	6920      	ldr	r0, [r4, #16]
    5650:	68ab      	ldr	r3, [r5, #8]
    5652:	4798      	blx	r3
    5654:	b118      	cbz	r0, 565e <CC_PalPowerSaveModeInit+0x16>
    5656:	4b08      	ldr	r3, [pc, #32]	; (5678 <CC_PalPowerSaveModeInit+0x30>)
    5658:	4808      	ldr	r0, [pc, #32]	; (567c <CC_PalPowerSaveModeInit+0x34>)
    565a:	685b      	ldr	r3, [r3, #4]
    565c:	4798      	blx	r3
    565e:	2100      	movs	r1, #0
    5660:	4a07      	ldr	r2, [pc, #28]	; (5680 <CC_PalPowerSaveModeInit+0x38>)
    5662:	68eb      	ldr	r3, [r5, #12]
    5664:	6011      	str	r1, [r2, #0]
    5666:	6920      	ldr	r0, [r4, #16]
    5668:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
    566c:	4718      	bx	r3
    566e:	bf00      	nop
    5670:	2000c60c 	.word	0x2000c60c
    5674:	2000c5fc 	.word	0x2000c5fc
    5678:	2000c5d8 	.word	0x2000c5d8
    567c:	00008d48 	.word	0x00008d48
    5680:	2000e07c 	.word	0x2000e07c

00005684 <CC_PalPowerSaveModeSelect>:
    5684:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    5686:	4d1a      	ldr	r5, [pc, #104]	; (56f0 <CC_PalPowerSaveModeSelect+0x6c>)
    5688:	4e1a      	ldr	r6, [pc, #104]	; (56f4 <CC_PalPowerSaveModeSelect+0x70>)
    568a:	4604      	mov	r4, r0
    568c:	68b2      	ldr	r2, [r6, #8]
    568e:	6928      	ldr	r0, [r5, #16]
    5690:	4790      	blx	r2
    5692:	b9e8      	cbnz	r0, 56d0 <CC_PalPowerSaveModeSelect+0x4c>
    5694:	4f18      	ldr	r7, [pc, #96]	; (56f8 <CC_PalPowerSaveModeSelect+0x74>)
    5696:	683b      	ldr	r3, [r7, #0]
    5698:	b14c      	cbz	r4, 56ae <CC_PalPowerSaveModeSelect+0x2a>
    569a:	b1a3      	cbz	r3, 56c6 <CC_PalPowerSaveModeSelect+0x42>
    569c:	2b01      	cmp	r3, #1
    569e:	d019      	beq.n	56d4 <CC_PalPowerSaveModeSelect+0x50>
    56a0:	3b01      	subs	r3, #1
    56a2:	603b      	str	r3, [r7, #0]
    56a4:	6928      	ldr	r0, [r5, #16]
    56a6:	68f3      	ldr	r3, [r6, #12]
    56a8:	4798      	blx	r3
    56aa:	2000      	movs	r0, #0
    56ac:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    56ae:	b943      	cbnz	r3, 56c2 <CC_PalPowerSaveModeSelect+0x3e>
    56b0:	2101      	movs	r1, #1
    56b2:	4a12      	ldr	r2, [pc, #72]	; (56fc <CC_PalPowerSaveModeSelect+0x78>)
    56b4:	f8c2 1500 	str.w	r1, [r2, #1280]	; 0x500
    56b8:	4911      	ldr	r1, [pc, #68]	; (5700 <CC_PalPowerSaveModeSelect+0x7c>)
    56ba:	f8d1 2910 	ldr.w	r2, [r1, #2320]	; 0x910
    56be:	2a00      	cmp	r2, #0
    56c0:	d1fb      	bne.n	56ba <CC_PalPowerSaveModeSelect+0x36>
    56c2:	3301      	adds	r3, #1
    56c4:	603b      	str	r3, [r7, #0]
    56c6:	68f3      	ldr	r3, [r6, #12]
    56c8:	6928      	ldr	r0, [r5, #16]
    56ca:	4798      	blx	r3
    56cc:	2000      	movs	r0, #0
    56ce:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    56d0:	480c      	ldr	r0, [pc, #48]	; (5704 <CC_PalPowerSaveModeSelect+0x80>)
    56d2:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    56d4:	4a0a      	ldr	r2, [pc, #40]	; (5700 <CC_PalPowerSaveModeSelect+0x7c>)
    56d6:	f8d2 3910 	ldr.w	r3, [r2, #2320]	; 0x910
    56da:	2b00      	cmp	r3, #0
    56dc:	d1fb      	bne.n	56d6 <CC_PalPowerSaveModeSelect+0x52>
    56de:	4a07      	ldr	r2, [pc, #28]	; (56fc <CC_PalPowerSaveModeSelect+0x78>)
    56e0:	f06f 407e 	mvn.w	r0, #4261412864	; 0xfe000000
    56e4:	f8c2 3500 	str.w	r3, [r2, #1280]	; 0x500
    56e8:	f7ff ff48 	bl	557c <CC_HalMaskInterrupt>
    56ec:	683b      	ldr	r3, [r7, #0]
    56ee:	e7d7      	b.n	56a0 <CC_PalPowerSaveModeSelect+0x1c>
    56f0:	2000c60c 	.word	0x2000c60c
    56f4:	2000c5fc 	.word	0x2000c5fc
    56f8:	2000e07c 	.word	0x2000e07c
    56fc:	50840000 	.word	0x50840000
    5700:	50841000 	.word	0x50841000
    5704:	ffff8fe9 	.word	0xffff8fe9

00005708 <mutex_free>:
    5708:	b510      	push	{r4, lr}
    570a:	4604      	mov	r4, r0
    570c:	b150      	cbz	r0, 5724 <mutex_free+0x1c>
    570e:	6863      	ldr	r3, [r4, #4]
    5710:	f013 5f68 	tst.w	r3, #973078528	; 0x3a000000
    5714:	d005      	beq.n	5722 <mutex_free+0x1a>
    5716:	4a06      	ldr	r2, [pc, #24]	; (5730 <mutex_free+0x28>)
    5718:	4293      	cmp	r3, r2
    571a:	d002      	beq.n	5722 <mutex_free+0x1a>
    571c:	2300      	movs	r3, #0
    571e:	6062      	str	r2, [r4, #4]
    5720:	6023      	str	r3, [r4, #0]
    5722:	bd10      	pop	{r4, pc}
    5724:	4b03      	ldr	r3, [pc, #12]	; (5734 <mutex_free+0x2c>)
    5726:	4804      	ldr	r0, [pc, #16]	; (5738 <mutex_free+0x30>)
    5728:	685b      	ldr	r3, [r3, #4]
    572a:	4798      	blx	r3
    572c:	e7ef      	b.n	570e <mutex_free+0x6>
    572e:	bf00      	nop
    5730:	a95c5f2c 	.word	0xa95c5f2c
    5734:	2000c5d8 	.word	0x2000c5d8
    5738:	00008d68 	.word	0x00008d68

0000573c <mutex_lock>:
    573c:	b1c8      	cbz	r0, 5772 <mutex_lock+0x36>
    573e:	6843      	ldr	r3, [r0, #4]
    5740:	4a0d      	ldr	r2, [pc, #52]	; (5778 <mutex_lock+0x3c>)
    5742:	4293      	cmp	r3, r2
    5744:	d013      	beq.n	576e <mutex_lock+0x32>
    5746:	f013 5f68 	tst.w	r3, #973078528	; 0x3a000000
    574a:	d00e      	beq.n	576a <mutex_lock+0x2e>
    574c:	2301      	movs	r3, #1
    574e:	e850 2f00 	ldrex	r2, [r0]
    5752:	4619      	mov	r1, r3
    5754:	e840 1c00 	strex	ip, r1, [r0]
    5758:	f09c 0f00 	teq	ip, #0
    575c:	d1f7      	bne.n	574e <mutex_lock+0x12>
    575e:	2a01      	cmp	r2, #1
    5760:	d0f5      	beq.n	574e <mutex_lock+0x12>
    5762:	f3bf 8f5f 	dmb	sy
    5766:	2000      	movs	r0, #0
    5768:	4770      	bx	lr
    576a:	4804      	ldr	r0, [pc, #16]	; (577c <mutex_lock+0x40>)
    576c:	4770      	bx	lr
    576e:	4804      	ldr	r0, [pc, #16]	; (5780 <mutex_lock+0x44>)
    5770:	4770      	bx	lr
    5772:	f46f 40e0 	mvn.w	r0, #28672	; 0x7000
    5776:	4770      	bx	lr
    5778:	a95c5f2c 	.word	0xa95c5f2c
    577c:	ffff8fe9 	.word	0xffff8fe9
    5780:	ffff8fea 	.word	0xffff8fea

00005784 <mutex_unlock>:
    5784:	4603      	mov	r3, r0
    5786:	b180      	cbz	r0, 57aa <mutex_unlock+0x26>
    5788:	6842      	ldr	r2, [r0, #4]
    578a:	4909      	ldr	r1, [pc, #36]	; (57b0 <mutex_unlock+0x2c>)
    578c:	428a      	cmp	r2, r1
    578e:	d00a      	beq.n	57a6 <mutex_unlock+0x22>
    5790:	f012 5f68 	tst.w	r2, #973078528	; 0x3a000000
    5794:	d005      	beq.n	57a2 <mutex_unlock+0x1e>
    5796:	f3bf 8f5f 	dmb	sy
    579a:	2200      	movs	r2, #0
    579c:	4610      	mov	r0, r2
    579e:	601a      	str	r2, [r3, #0]
    57a0:	4770      	bx	lr
    57a2:	4804      	ldr	r0, [pc, #16]	; (57b4 <mutex_unlock+0x30>)
    57a4:	4770      	bx	lr
    57a6:	4804      	ldr	r0, [pc, #16]	; (57b8 <mutex_unlock+0x34>)
    57a8:	4770      	bx	lr
    57aa:	f46f 40e0 	mvn.w	r0, #28672	; 0x7000
    57ae:	4770      	bx	lr
    57b0:	a95c5f2c 	.word	0xa95c5f2c
    57b4:	ffff8fe9 	.word	0xffff8fe9
    57b8:	ffff8fea 	.word	0xffff8fea

000057bc <mutex_init>:
    57bc:	b510      	push	{r4, lr}
    57be:	4604      	mov	r4, r0
    57c0:	b120      	cbz	r0, 57cc <mutex_init+0x10>
    57c2:	2300      	movs	r3, #0
    57c4:	4a03      	ldr	r2, [pc, #12]	; (57d4 <mutex_init+0x18>)
    57c6:	6023      	str	r3, [r4, #0]
    57c8:	6062      	str	r2, [r4, #4]
    57ca:	bd10      	pop	{r4, pc}
    57cc:	4802      	ldr	r0, [pc, #8]	; (57d8 <mutex_init+0x1c>)
    57ce:	f7ff fe73 	bl	54b8 <CC_PalAbort>
    57d2:	e7f6      	b.n	57c2 <mutex_init+0x6>
    57d4:	3a00003a 	.word	0x3a00003a
    57d8:	00008d90 	.word	0x00008d90

000057dc <flash_area_id_from_multi_image_slot>:
    switch (slot) {
    57dc:	b129      	cbz	r1, 57ea <flash_area_id_from_multi_image_slot+0xe>
    return -EINVAL; /* flash_area_open will fail on that */
    57de:	2901      	cmp	r1, #1
    57e0:	bf0c      	ite	eq
    57e2:	2008      	moveq	r0, #8
    57e4:	f06f 0015 	mvnne.w	r0, #21
    57e8:	4770      	bx	lr
    case 0: return FLASH_AREA_IMAGE_PRIMARY(image_index);
    57ea:	2002      	movs	r0, #2
}
    57ec:	4770      	bx	lr

000057ee <flash_area_get_device_id>:

uint8_t flash_area_get_device_id(const struct flash_area *fa)
{
	(void)fa;
	return FLASH_DEVICE_ID;
}
    57ee:	2000      	movs	r0, #0
    57f0:	4770      	bx	lr

000057f2 <bootutil_tlv_iter_begin>:
 *          -1 on errors
 */
int
bootutil_tlv_iter_begin(struct image_tlv_iter *it, const struct image_header *hdr,
                        const struct flash_area *fap, uint16_t type, bool prot)
{
    57f2:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
    57f6:	460e      	mov	r6, r1
    57f8:	4617      	mov	r7, r2
    57fa:	4699      	mov	r9, r3
    uint32_t off_;
    struct image_tlv_info info;

    if (it == NULL || hdr == NULL || fap == NULL) {
    57fc:	4604      	mov	r4, r0
    57fe:	b928      	cbnz	r0, 580c <bootutil_tlv_iter_begin+0x1a>
        return -1;
    5800:	f04f 38ff 	mov.w	r8, #4294967295
    it->prot_end = off_ + it->hdr->ih_protect_tlv_size;
    it->tlv_end = off_ + it->hdr->ih_protect_tlv_size + info.it_tlv_tot;
    // position on first TLV
    it->tlv_off = off_ + sizeof(info);
    return 0;
}
    5804:	4640      	mov	r0, r8
    5806:	b003      	add	sp, #12
    5808:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
    if (it == NULL || hdr == NULL || fap == NULL) {
    580c:	2900      	cmp	r1, #0
    580e:	d0f7      	beq.n	5800 <bootutil_tlv_iter_begin+0xe>
    5810:	2a00      	cmp	r2, #0
    5812:	d0f5      	beq.n	5800 <bootutil_tlv_iter_begin+0xe>
    off_ = BOOT_TLV_OFF(hdr);
    5814:	68cb      	ldr	r3, [r1, #12]
    5816:	890d      	ldrh	r5, [r1, #8]
    if (LOAD_IMAGE_DATA(hdr, fap, off_, &info, sizeof(info))) {
    5818:	4638      	mov	r0, r7
    off_ = BOOT_TLV_OFF(hdr);
    581a:	441d      	add	r5, r3
    if (LOAD_IMAGE_DATA(hdr, fap, off_, &info, sizeof(info))) {
    581c:	2304      	movs	r3, #4
    581e:	4629      	mov	r1, r5
    5820:	eb0d 0203 	add.w	r2, sp, r3
    5824:	f000 fb57 	bl	5ed6 <flash_area_read>
    5828:	4680      	mov	r8, r0
    582a:	2800      	cmp	r0, #0
    582c:	d1e8      	bne.n	5800 <bootutil_tlv_iter_begin+0xe>
    if (info.it_magic == IMAGE_TLV_PROT_INFO_MAGIC) {
    582e:	f646 1208 	movw	r2, #26888	; 0x6908
    5832:	f8bd 1004 	ldrh.w	r1, [sp, #4]
        if (hdr->ih_protect_tlv_size != info.it_tlv_tot) {
    5836:	8973      	ldrh	r3, [r6, #10]
    if (info.it_magic == IMAGE_TLV_PROT_INFO_MAGIC) {
    5838:	4291      	cmp	r1, r2
    583a:	d125      	bne.n	5888 <bootutil_tlv_iter_begin+0x96>
        if (hdr->ih_protect_tlv_size != info.it_tlv_tot) {
    583c:	f8bd 1006 	ldrh.w	r1, [sp, #6]
    5840:	4299      	cmp	r1, r3
    5842:	d1dd      	bne.n	5800 <bootutil_tlv_iter_begin+0xe>
        if (LOAD_IMAGE_DATA(hdr, fap, off_ + info.it_tlv_tot,
    5844:	2304      	movs	r3, #4
    5846:	4638      	mov	r0, r7
    5848:	eb0d 0203 	add.w	r2, sp, r3
    584c:	4429      	add	r1, r5
    584e:	f000 fb42 	bl	5ed6 <flash_area_read>
    5852:	2800      	cmp	r0, #0
    5854:	d1d4      	bne.n	5800 <bootutil_tlv_iter_begin+0xe>
    if (info.it_magic != IMAGE_TLV_INFO_MAGIC) {
    5856:	f646 1307 	movw	r3, #26887	; 0x6907
    585a:	f8bd 2004 	ldrh.w	r2, [sp, #4]
    585e:	429a      	cmp	r2, r3
    5860:	d1ce      	bne.n	5800 <bootutil_tlv_iter_begin+0xe>
    it->fap = fap;
    5862:	e9c4 6700 	strd	r6, r7, [r4]
    it->prot = prot;
    5866:	f89d 3028 	ldrb.w	r3, [sp, #40]	; 0x28
    it->type = type;
    586a:	f8a4 9008 	strh.w	r9, [r4, #8]
    it->prot = prot;
    586e:	72a3      	strb	r3, [r4, #10]
    it->prot_end = off_ + it->hdr->ih_protect_tlv_size;
    5870:	8973      	ldrh	r3, [r6, #10]
    it->tlv_end = off_ + it->hdr->ih_protect_tlv_size + info.it_tlv_tot;
    5872:	f8bd 2006 	ldrh.w	r2, [sp, #6]
    it->prot_end = off_ + it->hdr->ih_protect_tlv_size;
    5876:	442b      	add	r3, r5
    5878:	60e3      	str	r3, [r4, #12]
    it->tlv_end = off_ + it->hdr->ih_protect_tlv_size + info.it_tlv_tot;
    587a:	8973      	ldrh	r3, [r6, #10]
    587c:	4413      	add	r3, r2
    587e:	442b      	add	r3, r5
    it->tlv_off = off_ + sizeof(info);
    5880:	3504      	adds	r5, #4
    it->tlv_end = off_ + it->hdr->ih_protect_tlv_size + info.it_tlv_tot;
    5882:	6163      	str	r3, [r4, #20]
    it->tlv_off = off_ + sizeof(info);
    5884:	6125      	str	r5, [r4, #16]
    return 0;
    5886:	e7bd      	b.n	5804 <bootutil_tlv_iter_begin+0x12>
    } else if (hdr->ih_protect_tlv_size != 0) {
    5888:	2b00      	cmp	r3, #0
    588a:	d0e4      	beq.n	5856 <bootutil_tlv_iter_begin+0x64>
    588c:	e7b8      	b.n	5800 <bootutil_tlv_iter_begin+0xe>

0000588e <bootutil_tlv_iter_next>:
 *          -1 on errors
 */
int
bootutil_tlv_iter_next(struct image_tlv_iter *it, uint32_t *off, uint16_t *len,
                       uint16_t *type)
{
    588e:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
    5892:	460e      	mov	r6, r1
    5894:	4617      	mov	r7, r2
    5896:	461d      	mov	r5, r3
    struct image_tlv tlv;
    int rc;

    if (it == NULL || it->hdr == NULL || it->fap == NULL) {
    5898:	4604      	mov	r4, r0
    589a:	b920      	cbnz	r0, 58a6 <bootutil_tlv_iter_next+0x18>
        return -1;
    589c:	f04f 30ff 	mov.w	r0, #4294967295

        it->tlv_off += sizeof(tlv) + tlv.it_len;
    }

    return 1;
}
    58a0:	b002      	add	sp, #8
    58a2:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    if (it == NULL || it->hdr == NULL || it->fap == NULL) {
    58a6:	6803      	ldr	r3, [r0, #0]
    58a8:	2b00      	cmp	r3, #0
    58aa:	d0f7      	beq.n	589c <bootutil_tlv_iter_next+0xe>
    58ac:	6843      	ldr	r3, [r0, #4]
    58ae:	2b00      	cmp	r3, #0
    58b0:	d0f4      	beq.n	589c <bootutil_tlv_iter_next+0xe>
        if (it->type == IMAGE_TLV_ANY || tlv.it_type == it->type) {
    58b2:	f64f 78ff 	movw	r8, #65535	; 0xffff
    while (it->tlv_off < it->tlv_end) {
    58b6:	e9d4 2304 	ldrd	r2, r3, [r4, #16]
    58ba:	429a      	cmp	r2, r3
    58bc:	d216      	bcs.n	58ec <bootutil_tlv_iter_next+0x5e>
        if (it->hdr->ih_protect_tlv_size > 0 && it->tlv_off == it->prot_end) {
    58be:	6823      	ldr	r3, [r4, #0]
    58c0:	895b      	ldrh	r3, [r3, #10]
    58c2:	b123      	cbz	r3, 58ce <bootutil_tlv_iter_next+0x40>
    58c4:	68e3      	ldr	r3, [r4, #12]
    58c6:	4293      	cmp	r3, r2
            it->tlv_off += sizeof(struct image_tlv_info);
    58c8:	bf04      	itt	eq
    58ca:	3304      	addeq	r3, #4
    58cc:	6123      	streq	r3, [r4, #16]
        rc = LOAD_IMAGE_DATA(it->hdr, it->fap, it->tlv_off, &tlv, sizeof tlv);
    58ce:	2304      	movs	r3, #4
    58d0:	6921      	ldr	r1, [r4, #16]
    58d2:	6860      	ldr	r0, [r4, #4]
    58d4:	eb0d 0203 	add.w	r2, sp, r3
    58d8:	f000 fafd 	bl	5ed6 <flash_area_read>
        if (rc) {
    58dc:	2800      	cmp	r0, #0
    58de:	d1dd      	bne.n	589c <bootutil_tlv_iter_next+0xe>
        if (it->prot && it->tlv_off >= it->prot_end) {
    58e0:	7aa3      	ldrb	r3, [r4, #10]
    58e2:	b12b      	cbz	r3, 58f0 <bootutil_tlv_iter_next+0x62>
    58e4:	e9d4 3203 	ldrd	r3, r2, [r4, #12]
    58e8:	429a      	cmp	r2, r3
    58ea:	d301      	bcc.n	58f0 <bootutil_tlv_iter_next+0x62>
            return 1;
    58ec:	2001      	movs	r0, #1
    58ee:	e7d7      	b.n	58a0 <bootutil_tlv_iter_next+0x12>
        if (it->type == IMAGE_TLV_ANY || tlv.it_type == it->type) {
    58f0:	8923      	ldrh	r3, [r4, #8]
        it->tlv_off += sizeof(tlv) + tlv.it_len;
    58f2:	f8bd 1006 	ldrh.w	r1, [sp, #6]
        if (it->type == IMAGE_TLV_ANY || tlv.it_type == it->type) {
    58f6:	4543      	cmp	r3, r8
    58f8:	f101 0204 	add.w	r2, r1, #4
    58fc:	d003      	beq.n	5906 <bootutil_tlv_iter_next+0x78>
    58fe:	f8bd c004 	ldrh.w	ip, [sp, #4]
    5902:	459c      	cmp	ip, r3
    5904:	d10b      	bne.n	591e <bootutil_tlv_iter_next+0x90>
            if (type != NULL) {
    5906:	b115      	cbz	r5, 590e <bootutil_tlv_iter_next+0x80>
                *type = tlv.it_type;
    5908:	f8bd 3004 	ldrh.w	r3, [sp, #4]
    590c:	802b      	strh	r3, [r5, #0]
            *off = it->tlv_off + sizeof(tlv);
    590e:	6923      	ldr	r3, [r4, #16]
    5910:	3304      	adds	r3, #4
    5912:	6033      	str	r3, [r6, #0]
            *len = tlv.it_len;
    5914:	8039      	strh	r1, [r7, #0]
            it->tlv_off += sizeof(tlv) + tlv.it_len;
    5916:	6923      	ldr	r3, [r4, #16]
    5918:	4413      	add	r3, r2
    591a:	6123      	str	r3, [r4, #16]
            return 0;
    591c:	e7c0      	b.n	58a0 <bootutil_tlv_iter_next+0x12>
        it->tlv_off += sizeof(tlv) + tlv.it_len;
    591e:	6923      	ldr	r3, [r4, #16]
    5920:	4413      	add	r3, r2
    5922:	6123      	str	r3, [r4, #16]
    5924:	e7c7      	b.n	58b6 <bootutil_tlv_iter_next+0x28>

00005926 <boot_fih_memequal>:
    return memcmp(s1, s2, n);
    5926:	f000 be10 	b.w	654a <memcmp>

0000592a <boot_trailer_sz>:
    return BOOT_STATUS_MAX_ENTRIES * boot_status_entry_sz(min_write_sz);
    592a:	f44f 7340 	mov.w	r3, #768	; 0x300
    592e:	4358      	muls	r0, r3
}
    5930:	3030      	adds	r0, #48	; 0x30
    5932:	4770      	bx	lr

00005934 <boot_status_entries>:
	return fa->fa_id;
    5934:	780b      	ldrb	r3, [r1, #0]
    if (flash_area_get_id(fap) == FLASH_AREA_IMAGE_PRIMARY(image_index) ||
    5936:	2b02      	cmp	r3, #2
    5938:	d006      	beq.n	5948 <boot_status_entries+0x14>
        return BOOT_STATUS_STATE_COUNT * BOOT_STATUS_MAX_ENTRIES;
    593a:	2b08      	cmp	r3, #8
    593c:	bf14      	ite	ne
    593e:	f04f 30ff 	movne.w	r0, #4294967295
    5942:	f44f 7040 	moveq.w	r0, #768	; 0x300
    5946:	4770      	bx	lr
    5948:	f44f 7040 	mov.w	r0, #768	; 0x300
}
    594c:	4770      	bx	lr

0000594e <boot_status_off>:
{
    594e:	b510      	push	{r4, lr}
    5950:	4604      	mov	r4, r0
    elem_sz = flash_area_align(fap);
    5952:	f000 fafe 	bl	5f52 <flash_area_align>
}
    5956:	f44f 7240 	mov.w	r2, #768	; 0x300
    return flash_area_get_size(fap) - off_from_end;
    595a:	68a3      	ldr	r3, [r4, #8]
    595c:	3b30      	subs	r3, #48	; 0x30
}
    595e:	fb02 3010 	mls	r0, r2, r0, r3
    5962:	bd10      	pop	{r4, pc}

00005964 <boot_write_copy_done>:
    return ALIGN_DOWN(boot_magic_off(fap) - BOOT_MAX_ALIGN, BOOT_MAX_ALIGN);
    5964:	6881      	ldr	r1, [r0, #8]
    return boot_write_trailer_flag(fap, off, BOOT_FLAG_SET);
    5966:	2201      	movs	r2, #1
    return ALIGN_DOWN(boot_magic_off(fap) - BOOT_MAX_ALIGN, BOOT_MAX_ALIGN);
    5968:	3918      	subs	r1, #24
    596a:	f021 0107 	bic.w	r1, r1, #7
    return boot_write_trailer_flag(fap, off, BOOT_FLAG_SET);
    596e:	3908      	subs	r1, #8
    5970:	f001 b9a6 	b.w	6cc0 <boot_write_trailer_flag>

00005974 <boot_write_swap_size>:
{
    5974:	b513      	push	{r0, r1, r4, lr}
    5976:	4604      	mov	r4, r0
    5978:	9101      	str	r1, [sp, #4]
    return boot_swap_info_off(fap) - BOOT_MAX_ALIGN;
    597a:	f001 f932 	bl	6be2 <boot_swap_info_off>
    return boot_write_trailer(fap, off, (const uint8_t *) &swap_size, 4);
    597e:	2304      	movs	r3, #4
    5980:	f1a0 0108 	sub.w	r1, r0, #8
    5984:	eb0d 0203 	add.w	r2, sp, r3
    5988:	4620      	mov	r0, r4
    598a:	f001 f96d 	bl	6c68 <boot_write_trailer>
}
    598e:	b002      	add	sp, #8
    5990:	bd10      	pop	{r4, pc}

00005992 <boot_read_image_headers>:
{
    5992:	b570      	push	{r4, r5, r6, lr}
            rc = boot_read_image_header(state, i, boot_img_hdr(state, i), bs);
    5994:	4613      	mov	r3, r2
{
    5996:	460e      	mov	r6, r1
    5998:	4615      	mov	r5, r2
            rc = boot_read_image_header(state, i, boot_img_hdr(state, i), bs);
    599a:	2100      	movs	r1, #0
    599c:	4602      	mov	r2, r0
{
    599e:	4604      	mov	r4, r0
            rc = boot_read_image_header(state, i, boot_img_hdr(state, i), bs);
    59a0:	f7fb fa62 	bl	e68 <boot_read_image_header>
        if (rc != 0) {
    59a4:	b950      	cbnz	r0, 59bc <boot_read_image_headers+0x2a>
            rc = boot_read_image_header(state, i, boot_img_hdr(state, i), bs);
    59a6:	462b      	mov	r3, r5
    59a8:	2101      	movs	r1, #1
    59aa:	4620      	mov	r0, r4
    59ac:	f104 022c 	add.w	r2, r4, #44	; 0x2c
    59b0:	f7fb fa5a 	bl	e68 <boot_read_image_header>
        if (rc != 0) {
    59b4:	b110      	cbz	r0, 59bc <boot_read_image_headers+0x2a>
                return 0;
    59b6:	2e00      	cmp	r6, #0
    59b8:	bf08      	it	eq
    59ba:	2000      	moveq	r0, #0
}
    59bc:	bd70      	pop	{r4, r5, r6, pc}

000059be <boot_read_image_size.constprop.0.isra.0>:
boot_read_image_size(struct boot_loader_state *state, int slot, uint32_t *size)
    59be:	b573      	push	{r0, r1, r4, r5, r6, lr}
    59c0:	4604      	mov	r4, r0
    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
    59c2:	2000      	movs	r0, #0
boot_read_image_size(struct boot_loader_state *state, int slot, uint32_t *size)
    59c4:	460d      	mov	r5, r1
    59c6:	4616      	mov	r6, r2
    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
    59c8:	f7ff ff08 	bl	57dc <flash_area_id_from_multi_image_slot>
    rc = flash_area_open(area_id, &fap);
    59cc:	4669      	mov	r1, sp
    59ce:	b2c0      	uxtb	r0, r0
    59d0:	f7fc f9ec 	bl	1dac <flash_area_open>
    if (rc != 0) {
    59d4:	bb30      	cbnz	r0, 5a24 <boot_read_image_size.constprop.0.isra.0+0x66>
    off = BOOT_TLV_OFF(boot_img_hdr(state, slot));
    59d6:	232c      	movs	r3, #44	; 0x2c
    59d8:	fb03 4405 	mla	r4, r3, r5, r4
    59dc:	68e3      	ldr	r3, [r4, #12]
    59de:	8925      	ldrh	r5, [r4, #8]
    if (flash_area_read(fap, off, &info, sizeof(info))) {
    59e0:	9800      	ldr	r0, [sp, #0]
    off = BOOT_TLV_OFF(boot_img_hdr(state, slot));
    59e2:	441d      	add	r5, r3
    if (flash_area_read(fap, off, &info, sizeof(info))) {
    59e4:	2304      	movs	r3, #4
    59e6:	4629      	mov	r1, r5
    59e8:	eb0d 0203 	add.w	r2, sp, r3
    59ec:	f000 fa73 	bl	5ed6 <flash_area_read>
    59f0:	b9c0      	cbnz	r0, 5a24 <boot_read_image_size.constprop.0.isra.0+0x66>
    if (info.it_magic == IMAGE_TLV_PROT_INFO_MAGIC) {
    59f2:	f646 1308 	movw	r3, #26888	; 0x6908
    59f6:	f8bd 2004 	ldrh.w	r2, [sp, #4]
    protect_tlv_size = boot_img_hdr(state, slot)->ih_protect_tlv_size;
    59fa:	8964      	ldrh	r4, [r4, #10]
    if (info.it_magic == IMAGE_TLV_PROT_INFO_MAGIC) {
    59fc:	429a      	cmp	r2, r3
        if (flash_area_read(fap, off + info.it_tlv_tot, &info, sizeof(info))) {
    59fe:	9800      	ldr	r0, [sp, #0]
    if (info.it_magic == IMAGE_TLV_PROT_INFO_MAGIC) {
    5a00:	d115      	bne.n	5a2e <boot_read_image_size.constprop.0.isra.0+0x70>
        if (protect_tlv_size != info.it_tlv_tot) {
    5a02:	f8bd 3006 	ldrh.w	r3, [sp, #6]
    5a06:	429c      	cmp	r4, r3
    5a08:	d10c      	bne.n	5a24 <boot_read_image_size.constprop.0.isra.0+0x66>
        if (flash_area_read(fap, off + info.it_tlv_tot, &info, sizeof(info))) {
    5a0a:	2304      	movs	r3, #4
    5a0c:	1961      	adds	r1, r4, r5
    5a0e:	eb0d 0203 	add.w	r2, sp, r3
    5a12:	f000 fa60 	bl	5ed6 <flash_area_read>
    5a16:	b928      	cbnz	r0, 5a24 <boot_read_image_size.constprop.0.isra.0+0x66>
    if (info.it_magic != IMAGE_TLV_INFO_MAGIC) {
    5a18:	f646 1307 	movw	r3, #26887	; 0x6907
    5a1c:	f8bd 2004 	ldrh.w	r2, [sp, #4]
    5a20:	429a      	cmp	r2, r3
    5a22:	d007      	beq.n	5a34 <boot_read_image_size.constprop.0.isra.0+0x76>
    flash_area_close(fap);
    5a24:	9800      	ldr	r0, [sp, #0]
    5a26:	f000 fa55 	bl	5ed4 <flash_area_close>
}
    5a2a:	b002      	add	sp, #8
    5a2c:	bd70      	pop	{r4, r5, r6, pc}
    } else if (protect_tlv_size != 0) {
    5a2e:	2c00      	cmp	r4, #0
    5a30:	d0f2      	beq.n	5a18 <boot_read_image_size.constprop.0.isra.0+0x5a>
    5a32:	e7f7      	b.n	5a24 <boot_read_image_size.constprop.0.isra.0+0x66>
    *size = off + protect_tlv_size + info.it_tlv_tot;
    5a34:	f8bd 1006 	ldrh.w	r1, [sp, #6]
    5a38:	4421      	add	r1, r4
    5a3a:	4429      	add	r1, r5
    5a3c:	6031      	str	r1, [r6, #0]
    rc = 0;
    5a3e:	e7f1      	b.n	5a24 <boot_read_image_size.constprop.0.isra.0+0x66>

00005a40 <boot_read_sectors>:
{
    5a40:	b537      	push	{r0, r1, r2, r4, r5, lr}
    uint32_t num_sectors = BOOT_MAX_IMG_SECTORS;
    5a42:	f44f 7580 	mov.w	r5, #256	; 0x100
{
    5a46:	4604      	mov	r4, r0
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    5a48:	6a42      	ldr	r2, [r0, #36]	; 0x24
    5a4a:	a901      	add	r1, sp, #4
    5a4c:	2002      	movs	r0, #2
    uint32_t num_sectors = BOOT_MAX_IMG_SECTORS;
    5a4e:	9501      	str	r5, [sp, #4]
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    5a50:	f7fc f9d4 	bl	1dfc <flash_area_get_sectors>
    if (rc != 0) {
    5a54:	b958      	cbnz	r0, 5a6e <boot_read_sectors+0x2e>
    *out_num_sectors = num_sectors;
    5a56:	9b01      	ldr	r3, [sp, #4]
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    5a58:	2008      	movs	r0, #8
    5a5a:	6d22      	ldr	r2, [r4, #80]	; 0x50
    *out_num_sectors = num_sectors;
    5a5c:	62a3      	str	r3, [r4, #40]	; 0x28
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    5a5e:	a901      	add	r1, sp, #4
    uint32_t num_sectors = BOOT_MAX_IMG_SECTORS;
    5a60:	9501      	str	r5, [sp, #4]
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    5a62:	f7fc f9cb 	bl	1dfc <flash_area_get_sectors>
    if (rc != 0) {
    5a66:	4605      	mov	r5, r0
    5a68:	b128      	cbz	r0, 5a76 <boot_read_sectors+0x36>
        return BOOT_EFLASH_SEC;
    5a6a:	2509      	movs	r5, #9
    5a6c:	e000      	b.n	5a70 <boot_read_sectors+0x30>
        return BOOT_EFLASH;
    5a6e:	2501      	movs	r5, #1
}
    5a70:	4628      	mov	r0, r5
    5a72:	b003      	add	sp, #12
    5a74:	bd30      	pop	{r4, r5, pc}
    *out_num_sectors = num_sectors;
    5a76:	9b01      	ldr	r3, [sp, #4]
    elem_sz = flash_area_align(BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT));
    5a78:	6a20      	ldr	r0, [r4, #32]
    *out_num_sectors = num_sectors;
    5a7a:	6563      	str	r3, [r4, #84]	; 0x54
    elem_sz = flash_area_align(BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT));
    5a7c:	f000 fa69 	bl	5f52 <flash_area_align>
    BOOT_WRITE_SZ(state) = boot_write_sz(state);
    5a80:	65e0      	str	r0, [r4, #92]	; 0x5c
    return 0;
    5a82:	e7f5      	b.n	5a70 <boot_read_sectors+0x30>

00005a84 <boot_status_reset>:
    bs->idx = BOOT_STATUS_IDX_0;
    5a84:	2301      	movs	r3, #1
    5a86:	6003      	str	r3, [r0, #0]
    bs->state = BOOT_STATUS_STATE_0;
    5a88:	f103 2301 	add.w	r3, r3, #16777472	; 0x1000100
    5a8c:	6043      	str	r3, [r0, #4]
    bs->swap_size = 0;
    5a8e:	2300      	movs	r3, #0
    bs->source = 0;
    5a90:	e9c0 3302 	strd	r3, r3, [r0, #8]
}
    5a94:	4770      	bx	lr

00005a96 <boot_status_is_reset>:
            bs->idx == BOOT_STATUS_IDX_0 &&
    5a96:	7943      	ldrb	r3, [r0, #5]
    5a98:	2b01      	cmp	r3, #1
    5a9a:	d107      	bne.n	5aac <boot_status_is_reset+0x16>
    return (bs->op == BOOT_STATUS_OP_MOVE &&
    5a9c:	6803      	ldr	r3, [r0, #0]
    5a9e:	2b01      	cmp	r3, #1
    5aa0:	d104      	bne.n	5aac <boot_status_is_reset+0x16>
            bs->idx == BOOT_STATUS_IDX_0 &&
    5aa2:	7900      	ldrb	r0, [r0, #4]
    5aa4:	1e43      	subs	r3, r0, #1
    5aa6:	4258      	negs	r0, r3
    5aa8:	4158      	adcs	r0, r3
    5aaa:	4770      	bx	lr
    5aac:	2000      	movs	r0, #0
}
    5aae:	4770      	bx	lr

00005ab0 <boot_write_status>:
{
    5ab0:	b57f      	push	{r0, r1, r2, r3, r4, r5, r6, lr}
    5ab2:	4606      	mov	r6, r0
    5ab4:	460d      	mov	r5, r1
    rc = flash_area_open(area_id, &fap);
    5ab6:	2002      	movs	r0, #2
    5ab8:	a901      	add	r1, sp, #4
    5aba:	f7fc f977 	bl	1dac <flash_area_open>
    if (rc != 0) {
    5abe:	bb38      	cbnz	r0, 5b10 <boot_write_status+0x60>
    off = boot_status_off(fap) +
    5ac0:	9801      	ldr	r0, [sp, #4]
    5ac2:	f7ff ff44 	bl	594e <boot_status_off>
          boot_status_internal_off(bs, BOOT_WRITE_SZ(state));
    5ac6:	6df1      	ldr	r1, [r6, #92]	; 0x5c
    off = boot_status_off(fap) +
    5ac8:	4604      	mov	r4, r0
          boot_status_internal_off(bs, BOOT_WRITE_SZ(state));
    5aca:	4628      	mov	r0, r5
    5acc:	f000 f8e5 	bl	5c9a <boot_status_internal_off>
    off = boot_status_off(fap) +
    5ad0:	4404      	add	r4, r0
    align = flash_area_align(fap);
    5ad2:	9801      	ldr	r0, [sp, #4]
    5ad4:	f000 fa3d 	bl	5f52 <flash_area_align>
    5ad8:	4606      	mov	r6, r0
    erased_val = flash_area_erased_val(fap);
    5ada:	9801      	ldr	r0, [sp, #4]
    5adc:	f000 fa40 	bl	5f60 <flash_area_erased_val>
    memset(buf, erased_val, BOOT_MAX_ALIGN);
    5ae0:	2208      	movs	r2, #8
    erased_val = flash_area_erased_val(fap);
    5ae2:	4601      	mov	r1, r0
    memset(buf, erased_val, BOOT_MAX_ALIGN);
    5ae4:	eb0d 0002 	add.w	r0, sp, r2
    5ae8:	f000 fd61 	bl	65ae <memset>
    buf[0] = bs->state;
    5aec:	792b      	ldrb	r3, [r5, #4]
    rc = flash_area_write(fap, off, buf, align);
    5aee:	4621      	mov	r1, r4
    buf[0] = bs->state;
    5af0:	f88d 3008 	strb.w	r3, [sp, #8]
    rc = flash_area_write(fap, off, buf, align);
    5af4:	9801      	ldr	r0, [sp, #4]
    5af6:	4633      	mov	r3, r6
    5af8:	aa02      	add	r2, sp, #8
    5afa:	f000 fa01 	bl	5f00 <flash_area_write>
    if (rc != 0) {
    5afe:	1e04      	subs	r4, r0, #0
    flash_area_close(fap);
    5b00:	9801      	ldr	r0, [sp, #4]
    if (rc != 0) {
    5b02:	bf18      	it	ne
    5b04:	2401      	movne	r4, #1
    flash_area_close(fap);
    5b06:	f000 f9e5 	bl	5ed4 <flash_area_close>
}
    5b0a:	4620      	mov	r0, r4
    5b0c:	b004      	add	sp, #16
    5b0e:	bd70      	pop	{r4, r5, r6, pc}
        return BOOT_EFLASH;
    5b10:	2401      	movs	r4, #1
    5b12:	e7fa      	b.n	5b0a <boot_write_status+0x5a>

00005b14 <boot_erase_region>:
    return flash_area_erase(fap, off, sz);
    5b14:	f000 ba09 	b.w	5f2a <flash_area_erase>

00005b18 <swap_erase_trailer_sectors>:

#if defined(MCUBOOT_SWAP_USING_SCRATCH) || defined(MCUBOOT_SWAP_USING_MOVE)
int
swap_erase_trailer_sectors(const struct boot_loader_state *state,
                           const struct flash_area *fap)
{
    5b18:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    5b1c:	460e      	mov	r6, r1
    int rc;

    BOOT_LOG_DBG("erasing trailer; fa_id=%d", flash_area_get_id(fap));

    image_index = BOOT_CURR_IMG(state);
    fa_id_primary = flash_area_id_from_multi_image_slot(image_index,
    5b1e:	2100      	movs	r1, #0
{
    5b20:	4607      	mov	r7, r0
    fa_id_primary = flash_area_id_from_multi_image_slot(image_index,
    5b22:	4608      	mov	r0, r1
    5b24:	f7ff fe5a 	bl	57dc <flash_area_id_from_multi_image_slot>
    5b28:	4604      	mov	r4, r0
            BOOT_PRIMARY_SLOT);
    fa_id_secondary = flash_area_id_from_multi_image_slot(image_index,
    5b2a:	2101      	movs	r1, #1
    5b2c:	2000      	movs	r0, #0
    5b2e:	f7ff fe55 	bl	57dc <flash_area_id_from_multi_image_slot>
            BOOT_SECONDARY_SLOT);

    if (flash_area_get_id(fap) == fa_id_primary) {
    5b32:	7833      	ldrb	r3, [r6, #0]
    5b34:	429c      	cmp	r4, r3
    5b36:	d021      	beq.n	5b7c <swap_erase_trailer_sectors+0x64>
        slot = BOOT_PRIMARY_SLOT;
    } else if (flash_area_get_id(fap) == fa_id_secondary) {
    5b38:	4298      	cmp	r0, r3
    5b3a:	d121      	bne.n	5b80 <swap_erase_trailer_sectors+0x68>
        slot = BOOT_SECONDARY_SLOT;
    5b3c:	2501      	movs	r5, #1
    return BOOT_IMG(state, slot).num_sectors;
    5b3e:	232c      	movs	r3, #44	; 0x2c
    5b40:	fb03 7505 	mla	r5, r3, r5, r7
        return BOOT_EFLASH;
    }

    /* delete starting from last sector and moving to beginning */
    sector = boot_img_num_sectors(state, slot) - 1;
    trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state));
    5b44:	6df8      	ldr	r0, [r7, #92]	; 0x5c
    sector = boot_img_num_sectors(state, slot) - 1;
    5b46:	6aac      	ldr	r4, [r5, #40]	; 0x28
    trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state));
    5b48:	f7ff feef 	bl	592a <boot_trailer_sz>
    total_sz = 0;
    5b4c:	f04f 0800 	mov.w	r8, #0
    trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state));
    5b50:	4607      	mov	r7, r0
    sector = boot_img_num_sectors(state, slot) - 1;
    5b52:	3c01      	subs	r4, #1
    return flash_sector_get_size(&BOOT_IMG(state, slot).sectors[sector]);
    5b54:	6a6b      	ldr	r3, [r5, #36]	; 0x24
    do {
        sz = boot_img_sector_size(state, slot, sector);
        off = boot_img_sector_off(state, slot, sector);
        rc = boot_erase_region(fap, off, sz);
    5b56:	4630      	mov	r0, r6
    5b58:	eb03 02c4 	add.w	r2, r3, r4, lsl #3
    return flash_sector_get_off(&BOOT_IMG(state, slot).sectors[sector]) -
    5b5c:	f853 1034 	ldr.w	r1, [r3, r4, lsl #3]
	return fs->fs_size;
    5b60:	f8d2 9004 	ldr.w	r9, [r2, #4]
    5b64:	681b      	ldr	r3, [r3, #0]
    5b66:	464a      	mov	r2, r9
    5b68:	1ac9      	subs	r1, r1, r3
        assert(rc == 0);

        sector--;
        total_sz += sz;
    5b6a:	44c8      	add	r8, r9
        rc = boot_erase_region(fap, off, sz);
    5b6c:	f7ff ffd2 	bl	5b14 <boot_erase_region>
    } while (total_sz < trailer_sz);
    5b70:	45b8      	cmp	r8, r7
        sector--;
    5b72:	f104 34ff 	add.w	r4, r4, #4294967295
    } while (total_sz < trailer_sz);
    5b76:	d3ed      	bcc.n	5b54 <swap_erase_trailer_sectors+0x3c>

    return rc;
}
    5b78:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
        slot = BOOT_PRIMARY_SLOT;
    5b7c:	2500      	movs	r5, #0
    5b7e:	e7de      	b.n	5b3e <swap_erase_trailer_sectors+0x26>
        return BOOT_EFLASH;
    5b80:	2001      	movs	r0, #1
    5b82:	e7f9      	b.n	5b78 <swap_erase_trailer_sectors+0x60>

00005b84 <swap_status_init>:

int
swap_status_init(const struct boot_loader_state *state,
                 const struct flash_area *fap,
                 const struct boot_status *bs)
{
    5b84:	b537      	push	{r0, r1, r2, r4, r5, lr}
    5b86:	4615      	mov	r5, r2
    5b88:	460c      	mov	r4, r1

    image_index = BOOT_CURR_IMG(state);

    BOOT_LOG_DBG("initializing status; fa_id=%d", flash_area_get_id(fap));

    rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_SECONDARY(image_index),
    5b8a:	2008      	movs	r0, #8
    5b8c:	4669      	mov	r1, sp
    5b8e:	f001 f8ae 	bl	6cee <boot_read_swap_state_by_id>
            &swap_state);
    assert(rc == 0);

    if (bs->swap_type != BOOT_SWAP_TYPE_NONE) {
    5b92:	79e9      	ldrb	r1, [r5, #7]
    5b94:	2901      	cmp	r1, #1
    5b96:	d003      	beq.n	5ba0 <swap_status_init+0x1c>
        rc = boot_write_swap_info(fap, bs->swap_type, image_index);
    5b98:	2200      	movs	r2, #0
    5b9a:	4620      	mov	r0, r4
    5b9c:	f001 f8bb 	bl	6d16 <boot_write_swap_info>
        assert(rc == 0);
    }

    if (swap_state.image_ok == BOOT_FLAG_SET) {
    5ba0:	f89d 3003 	ldrb.w	r3, [sp, #3]
    5ba4:	2b01      	cmp	r3, #1
    5ba6:	d102      	bne.n	5bae <swap_status_init+0x2a>
        rc = boot_write_image_ok(fap);
    5ba8:	4620      	mov	r0, r4
    5baa:	f001 f893 	bl	6cd4 <boot_write_image_ok>
        assert(rc == 0);
    }

    rc = boot_write_swap_size(fap, bs->swap_size);
    5bae:	68a9      	ldr	r1, [r5, #8]
    5bb0:	4620      	mov	r0, r4
    5bb2:	f7ff fedf 	bl	5974 <boot_write_swap_size>

    rc = boot_write_enc_key(fap, 1, bs);
    assert(rc == 0);
#endif

    rc = boot_write_magic(fap);
    5bb6:	4620      	mov	r0, r4
    5bb8:	f7fe f9ac 	bl	3f14 <boot_write_magic>
    assert(rc == 0);

    return 0;
}
    5bbc:	2000      	movs	r0, #0
    5bbe:	b003      	add	sp, #12
    5bc0:	bd30      	pop	{r4, r5, pc}

00005bc2 <swap_read_status>:

int
swap_read_status(struct boot_loader_state *state, struct boot_status *bs)
{
    5bc2:	b573      	push	{r0, r1, r4, r5, r6, lr}
    5bc4:	460d      	mov	r5, r1
    5bc6:	4606      	mov	r6, r0
    uint32_t off;
    uint8_t swap_info;
    int area_id;
    int rc;

    bs->source = swap_status_source(state);
    5bc8:	f7fb fa38 	bl	103c <swap_status_source>
    5bcc:	4604      	mov	r4, r0
    5bce:	60e8      	str	r0, [r5, #12]
    switch (bs->source) {
    5bd0:	b350      	cbz	r0, 5c28 <swap_read_status+0x66>
    5bd2:	2802      	cmp	r0, #2
    5bd4:	d12d      	bne.n	5c32 <swap_read_status+0x70>
    default:
        assert(0);
        return BOOT_EBADARGS;
    }

    rc = flash_area_open(area_id, &fap);
    5bd6:	a901      	add	r1, sp, #4
    5bd8:	f7fc f8e8 	bl	1dac <flash_area_open>
    if (rc != 0) {
    5bdc:	bb58      	cbnz	r0, 5c36 <swap_read_status+0x74>
        return BOOT_EFLASH;
    }

    rc = swap_read_status_bytes(fap, state, bs);
    5bde:	462a      	mov	r2, r5
    5be0:	4631      	mov	r1, r6
    5be2:	9801      	ldr	r0, [sp, #4]
    5be4:	f7fb f98e 	bl	f04 <swap_read_status_bytes>
    if (rc == 0) {
    5be8:	4604      	mov	r4, r0
    5bea:	b9d0      	cbnz	r0, 5c22 <swap_read_status+0x60>
        off = boot_swap_info_off(fap);
    5bec:	9801      	ldr	r0, [sp, #4]
    5bee:	f000 fff8 	bl	6be2 <boot_swap_info_off>
        rc = flash_area_read(fap, off, &swap_info, sizeof swap_info);
    5bf2:	2301      	movs	r3, #1
        off = boot_swap_info_off(fap);
    5bf4:	4601      	mov	r1, r0
        rc = flash_area_read(fap, off, &swap_info, sizeof swap_info);
    5bf6:	f10d 0203 	add.w	r2, sp, #3
    5bfa:	9801      	ldr	r0, [sp, #4]
    5bfc:	f000 f96b 	bl	5ed6 <flash_area_read>
        if (rc != 0) {
    5c00:	4604      	mov	r4, r0
    5c02:	b9a0      	cbnz	r0, 5c2e <swap_read_status+0x6c>
            rc = BOOT_EFLASH;
            goto done;
        }

        if (bootutil_buffer_is_erased(fap, &swap_info, sizeof swap_info)) {
    5c04:	2201      	movs	r2, #1
    5c06:	9801      	ldr	r0, [sp, #4]
    5c08:	f10d 0103 	add.w	r1, sp, #3
    5c0c:	f000 fffd 	bl	6c0a <bootutil_buffer_is_erased>
    5c10:	b110      	cbz	r0, 5c18 <swap_read_status+0x56>
            BOOT_SET_SWAP_INFO(swap_info, 0, BOOT_SWAP_TYPE_NONE);
    5c12:	2301      	movs	r3, #1
    5c14:	f88d 3003 	strb.w	r3, [sp, #3]
            rc = 0;
        }

        /* Extract the swap type info */
        bs->swap_type = BOOT_GET_SWAP_TYPE(swap_info);
    5c18:	f89d 3003 	ldrb.w	r3, [sp, #3]
    5c1c:	f003 030f 	and.w	r3, r3, #15
    5c20:	71eb      	strb	r3, [r5, #7]
    }

done:
    flash_area_close(fap);
    5c22:	9801      	ldr	r0, [sp, #4]
    5c24:	f000 f956 	bl	5ed4 <flash_area_close>

    return rc;
}
    5c28:	4620      	mov	r0, r4
    5c2a:	b002      	add	sp, #8
    5c2c:	bd70      	pop	{r4, r5, r6, pc}
            rc = BOOT_EFLASH;
    5c2e:	2401      	movs	r4, #1
    5c30:	e7f7      	b.n	5c22 <swap_read_status+0x60>
    switch (bs->source) {
    5c32:	2407      	movs	r4, #7
    5c34:	e7f8      	b.n	5c28 <swap_read_status+0x66>
        return BOOT_EFLASH;
    5c36:	2401      	movs	r4, #1
    5c38:	e7f6      	b.n	5c28 <swap_read_status+0x66>

00005c3a <swap_set_copy_done>:

int
swap_set_copy_done(uint8_t image_index)
{
    5c3a:	b513      	push	{r0, r1, r4, lr}
    const struct flash_area *fap;
    int rc;

    rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(image_index),
    5c3c:	2002      	movs	r0, #2
    5c3e:	a901      	add	r1, sp, #4
    5c40:	f7fc f8b4 	bl	1dac <flash_area_open>
            &fap);
    if (rc != 0) {
    5c44:	b948      	cbnz	r0, 5c5a <swap_set_copy_done+0x20>
        return BOOT_EFLASH;
    }

    rc = boot_write_copy_done(fap);
    5c46:	9801      	ldr	r0, [sp, #4]
    5c48:	f7ff fe8c 	bl	5964 <boot_write_copy_done>
    5c4c:	4604      	mov	r4, r0
    flash_area_close(fap);
    5c4e:	9801      	ldr	r0, [sp, #4]
    5c50:	f000 f940 	bl	5ed4 <flash_area_close>
    return rc;
}
    5c54:	4620      	mov	r0, r4
    5c56:	b002      	add	sp, #8
    5c58:	bd10      	pop	{r4, pc}
        return BOOT_EFLASH;
    5c5a:	2401      	movs	r4, #1
    5c5c:	e7fa      	b.n	5c54 <swap_set_copy_done+0x1a>

00005c5e <swap_set_image_ok>:

int
swap_set_image_ok(uint8_t image_index)
{
    5c5e:	b51f      	push	{r0, r1, r2, r3, r4, lr}
    const struct flash_area *fap;
    struct boot_swap_state state;
    int rc;

    rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(image_index),
    5c60:	2002      	movs	r0, #2
    5c62:	a901      	add	r1, sp, #4
    5c64:	f7fc f8a2 	bl	1dac <flash_area_open>
            &fap);
    if (rc != 0) {
    5c68:	b9a8      	cbnz	r0, 5c96 <swap_set_image_ok+0x38>
        return BOOT_EFLASH;
    }

    rc = boot_read_swap_state(fap, &state);
    5c6a:	9801      	ldr	r0, [sp, #4]
    5c6c:	a902      	add	r1, sp, #8
    5c6e:	f7fe f971 	bl	3f54 <boot_read_swap_state>
    if (rc != 0) {
    5c72:	4604      	mov	r4, r0
    5c74:	b968      	cbnz	r0, 5c92 <swap_set_image_ok+0x34>
        rc = BOOT_EFLASH;
        goto out;
    }

    if (state.image_ok == BOOT_FLAG_UNSET) {
    5c76:	f89d 300b 	ldrb.w	r3, [sp, #11]
    5c7a:	2b03      	cmp	r3, #3
    5c7c:	d103      	bne.n	5c86 <swap_set_image_ok+0x28>
        rc = boot_write_image_ok(fap);
    5c7e:	9801      	ldr	r0, [sp, #4]
    5c80:	f001 f828 	bl	6cd4 <boot_write_image_ok>
    5c84:	4604      	mov	r4, r0
    }

out:
    flash_area_close(fap);
    5c86:	9801      	ldr	r0, [sp, #4]
    5c88:	f000 f924 	bl	5ed4 <flash_area_close>
    return rc;
}
    5c8c:	4620      	mov	r0, r4
    5c8e:	b004      	add	sp, #16
    5c90:	bd10      	pop	{r4, pc}
        rc = BOOT_EFLASH;
    5c92:	2401      	movs	r4, #1
    5c94:	e7f7      	b.n	5c86 <swap_set_image_ok+0x28>
        return BOOT_EFLASH;
    5c96:	2401      	movs	r4, #1
    5c98:	e7f8      	b.n	5c8c <swap_set_image_ok+0x2e>

00005c9a <boot_status_internal_off>:
{
    5c9a:	b510      	push	{r4, lr}
            BOOT_STATUS_MOVE_STATE_COUNT : BOOT_STATUS_SWAP_STATE_COUNT);
    5c9c:	7943      	ldrb	r3, [r0, #5]
           (bs->state - BOOT_STATUS_STATE_0) * elem_sz;
    5c9e:	7902      	ldrb	r2, [r0, #4]
            BOOT_STATUS_MOVE_STATE_COUNT : BOOT_STATUS_SWAP_STATE_COUNT);
    5ca0:	2b01      	cmp	r3, #1
               0 : (BOOT_MAX_IMG_SECTORS * BOOT_STATUS_MOVE_STATE_COUNT * elem_sz)) +
    5ca2:	bf06      	itte	eq
    5ca4:	2300      	moveq	r3, #0
    idx_sz = elem_sz * ((bs->op == BOOT_STATUS_OP_MOVE) ?
    5ca6:	460c      	moveq	r4, r1
               0 : (BOOT_MAX_IMG_SECTORS * BOOT_STATUS_MOVE_STATE_COUNT * elem_sz)) +
    5ca8:	020b      	lslne	r3, r1, #8
           (bs->state - BOOT_STATUS_STATE_0) * elem_sz;
    5caa:	f102 32ff 	add.w	r2, r2, #4294967295
    off = ((bs->op == BOOT_STATUS_OP_MOVE) ?
    5cae:	fb01 3302 	mla	r3, r1, r2, r3
           (bs->idx - BOOT_STATUS_IDX_0) * idx_sz +
    5cb2:	6802      	ldr	r2, [r0, #0]
    idx_sz = elem_sz * ((bs->op == BOOT_STATUS_OP_MOVE) ?
    5cb4:	bf18      	it	ne
    5cb6:	004c      	lslne	r4, r1, #1
           (bs->idx - BOOT_STATUS_IDX_0) * idx_sz +
    5cb8:	3a01      	subs	r2, #1
}
    5cba:	fb04 3002 	mla	r0, r4, r2, r3
    5cbe:	bd10      	pop	{r4, pc}

00005cc0 <crc16_itu_t>:
	return seed;
}

uint16_t crc16_itu_t(uint16_t seed, const uint8_t *src, size_t len)
{
	for (; len > 0; len--) {
    5cc0:	440a      	add	r2, r1
    5cc2:	428a      	cmp	r2, r1
    5cc4:	d100      	bne.n	5cc8 <crc16_itu_t+0x8>
		seed ^= seed << 12U;
		seed ^= (seed & 0xffU) << 5U;
	}

	return seed;
}
    5cc6:	4770      	bx	lr
		seed ^= *src++;
    5cc8:	f811 3b01 	ldrb.w	r3, [r1], #1
    5ccc:	ba40      	rev16	r0, r0
    5cce:	b280      	uxth	r0, r0
    5cd0:	4058      	eors	r0, r3
		seed ^= (seed & 0xffU) >> 4U;
    5cd2:	f3c0 1303 	ubfx	r3, r0, #4, #4
    5cd6:	4043      	eors	r3, r0
		seed ^= seed << 12U;
    5cd8:	0318      	lsls	r0, r3, #12
    5cda:	b280      	uxth	r0, r0
    5cdc:	4043      	eors	r3, r0
		seed ^= (seed & 0xffU) << 5U;
    5cde:	0158      	lsls	r0, r3, #5
    5ce0:	f400 50ff 	and.w	r0, r0, #8160	; 0x1fe0
    5ce4:	4058      	eors	r0, r3
	for (; len > 0; len--) {
    5ce6:	e7ec      	b.n	5cc2 <crc16_itu_t+0x2>

00005ce8 <arch_printk_char_out>:
}
    5ce8:	2000      	movs	r0, #0
    5cea:	4770      	bx	lr

00005cec <printk>:
 *
 * @param fmt formatted string to output
 */

void printk(const char *fmt, ...)
{
    5cec:	b40f      	push	{r0, r1, r2, r3}
    5cee:	b507      	push	{r0, r1, r2, lr}
    5cf0:	a904      	add	r1, sp, #16
    5cf2:	f851 0b04 	ldr.w	r0, [r1], #4
	va_list ap;

	va_start(ap, fmt);
    5cf6:	9101      	str	r1, [sp, #4]

	vprintk(fmt, ap);
    5cf8:	f7fb fce4 	bl	16c4 <vprintk>

	va_end(ap);
}
    5cfc:	b003      	add	sp, #12
    5cfe:	f85d eb04 	ldr.w	lr, [sp], #4
    5d02:	b004      	add	sp, #16
    5d04:	4770      	bx	lr

00005d06 <process_recheck>:
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    5d06:	8b03      	ldrh	r3, [r0, #24]
	if ((state == ONOFF_STATE_OFF)
    5d08:	f013 0307 	ands.w	r3, r3, #7
    5d0c:	d105      	bne.n	5d1a <process_recheck+0x14>
	    && !sys_slist_is_empty(&mgr->clients)) {
    5d0e:	6803      	ldr	r3, [r0, #0]
		evt = EVT_START;
    5d10:	2b00      	cmp	r3, #0
    5d12:	bf0c      	ite	eq
    5d14:	2000      	moveq	r0, #0
    5d16:	2003      	movne	r0, #3
    5d18:	4770      	bx	lr
	} else if ((state == ONOFF_STATE_ON)
    5d1a:	2b02      	cmp	r3, #2
    5d1c:	d105      	bne.n	5d2a <process_recheck+0x24>
		   && (mgr->refs == 0U)) {
    5d1e:	8b40      	ldrh	r0, [r0, #26]
    5d20:	fab0 f080 	clz	r0, r0
    5d24:	0940      	lsrs	r0, r0, #5
    5d26:	0080      	lsls	r0, r0, #2
    5d28:	4770      	bx	lr
	} else if ((state == ONOFF_STATE_ERROR)
    5d2a:	2b01      	cmp	r3, #1
    5d2c:	d105      	bne.n	5d3a <process_recheck+0x34>
		   && !sys_slist_is_empty(&mgr->clients)) {
    5d2e:	6803      	ldr	r3, [r0, #0]
		evt = EVT_RESET;
    5d30:	2b00      	cmp	r3, #0
    5d32:	bf0c      	ite	eq
    5d34:	2000      	moveq	r0, #0
    5d36:	2005      	movne	r0, #5
    5d38:	4770      	bx	lr
	int evt = EVT_NOP;
    5d3a:	2000      	movs	r0, #0
}
    5d3c:	4770      	bx	lr

00005d3e <validate_args>:
{
    5d3e:	b510      	push	{r4, lr}
    5d40:	460c      	mov	r4, r1
	if ((mgr == NULL) || (cli == NULL)) {
    5d42:	b100      	cbz	r0, 5d46 <validate_args+0x8>
    5d44:	b911      	cbnz	r1, 5d4c <validate_args+0xe>
		return -EINVAL;
    5d46:	f06f 0015 	mvn.w	r0, #21
}
    5d4a:	bd10      	pop	{r4, pc}
	int rv = sys_notify_validate(&cli->notify);
    5d4c:	1d08      	adds	r0, r1, #4
    5d4e:	f000 f895 	bl	5e7c <sys_notify_validate>
	if ((rv == 0)
    5d52:	2800      	cmp	r0, #0
    5d54:	d1f9      	bne.n	5d4a <validate_args+0xc>
	    && ((cli->notify.flags
    5d56:	68a3      	ldr	r3, [r4, #8]
    5d58:	2b03      	cmp	r3, #3
    5d5a:	d9f6      	bls.n	5d4a <validate_args+0xc>
    5d5c:	e7f3      	b.n	5d46 <validate_args+0x8>

00005d5e <notify_one>:
{
    5d5e:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    5d62:	460d      	mov	r5, r1
    5d64:	4607      	mov	r7, r0
		(onoff_client_callback)sys_notify_finalize(&cli->notify, res);
    5d66:	4619      	mov	r1, r3
    5d68:	1d28      	adds	r0, r5, #4
{
    5d6a:	4690      	mov	r8, r2
    5d6c:	461e      	mov	r6, r3
		(onoff_client_callback)sys_notify_finalize(&cli->notify, res);
    5d6e:	f000 f896 	bl	5e9e <sys_notify_finalize>
	if (cb) {
    5d72:	4604      	mov	r4, r0
    5d74:	b138      	cbz	r0, 5d86 <notify_one+0x28>
		cb(mgr, cli, state, res);
    5d76:	4633      	mov	r3, r6
    5d78:	4642      	mov	r2, r8
    5d7a:	4629      	mov	r1, r5
    5d7c:	4638      	mov	r0, r7
    5d7e:	46a4      	mov	ip, r4
}
    5d80:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
		cb(mgr, cli, state, res);
    5d84:	4760      	bx	ip
}
    5d86:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

00005d8a <transition_complete>:
{
    5d8a:	b410      	push	{r4}
    5d8c:	f04f 0420 	mov.w	r4, #32
    5d90:	f3ef 8211 	mrs	r2, BASEPRI
    5d94:	f384 8812 	msr	BASEPRI_MAX, r4
    5d98:	f3bf 8f6f 	isb	sy
	mgr->last_res = res;
    5d9c:	6141      	str	r1, [r0, #20]
}
    5d9e:	bc10      	pop	{r4}
	process_event(mgr, EVT_COMPLETE, key);
    5da0:	2101      	movs	r1, #1
    5da2:	f7fb bc9d 	b.w	16e0 <process_event>

00005da6 <onoff_manager_init>:
{
    5da6:	b538      	push	{r3, r4, r5, lr}
    5da8:	460c      	mov	r4, r1
	if ((mgr == NULL)
    5daa:	4605      	mov	r5, r0
    5dac:	b158      	cbz	r0, 5dc6 <onoff_manager_init+0x20>
	    || (transitions == NULL)
    5dae:	b151      	cbz	r1, 5dc6 <onoff_manager_init+0x20>
	    || (transitions->start == NULL)
    5db0:	680b      	ldr	r3, [r1, #0]
    5db2:	b143      	cbz	r3, 5dc6 <onoff_manager_init+0x20>
	    || (transitions->stop == NULL)) {
    5db4:	684b      	ldr	r3, [r1, #4]
    5db6:	b133      	cbz	r3, 5dc6 <onoff_manager_init+0x20>
	*mgr = (struct onoff_manager)ONOFF_MANAGER_INITIALIZER(transitions);
    5db8:	221c      	movs	r2, #28
    5dba:	2100      	movs	r1, #0
    5dbc:	f000 fbf7 	bl	65ae <memset>
	return 0;
    5dc0:	2000      	movs	r0, #0
	*mgr = (struct onoff_manager)ONOFF_MANAGER_INITIALIZER(transitions);
    5dc2:	612c      	str	r4, [r5, #16]
}
    5dc4:	bd38      	pop	{r3, r4, r5, pc}
		return -EINVAL;
    5dc6:	f06f 0015 	mvn.w	r0, #21
    5dca:	e7fb      	b.n	5dc4 <onoff_manager_init+0x1e>

00005dcc <onoff_request>:

int onoff_request(struct onoff_manager *mgr,
		  struct onoff_client *cli)
{
    5dcc:	b570      	push	{r4, r5, r6, lr}
    5dce:	4605      	mov	r5, r0
    5dd0:	460e      	mov	r6, r1
	bool add_client = false;        /* add client to pending list */
	bool start = false;             /* trigger a start transition */
	bool notify = false;            /* do client notification */
	int rv = validate_args(mgr, cli);
    5dd2:	f7ff ffb4 	bl	5d3e <validate_args>

	if (rv < 0) {
    5dd6:	1e04      	subs	r4, r0, #0
    5dd8:	db15      	blt.n	5e06 <onoff_request+0x3a>
    5dda:	f04f 0320 	mov.w	r3, #32
    5dde:	f3ef 8211 	mrs	r2, BASEPRI
    5de2:	f383 8812 	msr	BASEPRI_MAX, r3
    5de6:	f3bf 8f6f 	isb	sy

	k_spinlock_key_t key = k_spin_lock(&mgr->lock);
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;

	/* Reject if this would overflow the reference count. */
	if (mgr->refs == SERVICE_REFS_MAX) {
    5dea:	f64f 71ff 	movw	r1, #65535	; 0xffff
    5dee:	8b6b      	ldrh	r3, [r5, #26]
    5df0:	8b2c      	ldrh	r4, [r5, #24]
    5df2:	428b      	cmp	r3, r1
    5df4:	f004 0407 	and.w	r4, r4, #7
    5df8:	d107      	bne.n	5e0a <onoff_request+0x3e>
	__asm__ volatile(
    5dfa:	f382 8811 	msr	BASEPRI, r2
    5dfe:	f3bf 8f6f 	isb	sy
		rv = -EAGAIN;
    5e02:	f06f 040a 	mvn.w	r4, #10
			notify_one(mgr, cli, state, 0);
		}
	}

	return rv;
}
    5e06:	4620      	mov	r0, r4
    5e08:	bd70      	pop	{r4, r5, r6, pc}
	if (state == ONOFF_STATE_ON) {
    5e0a:	2c02      	cmp	r4, #2
    5e0c:	d10c      	bne.n	5e28 <onoff_request+0x5c>
		mgr->refs += 1U;
    5e0e:	3301      	adds	r3, #1
    5e10:	836b      	strh	r3, [r5, #26]
    5e12:	f382 8811 	msr	BASEPRI, r2
    5e16:	f3bf 8f6f 	isb	sy
			notify_one(mgr, cli, state, 0);
    5e1a:	2300      	movs	r3, #0
    5e1c:	4622      	mov	r2, r4
    5e1e:	4631      	mov	r1, r6
    5e20:	4628      	mov	r0, r5
    5e22:	f7ff ff9c 	bl	5d5e <notify_one>
    5e26:	e7ee      	b.n	5e06 <onoff_request+0x3a>
	} else if ((state == ONOFF_STATE_OFF)
    5e28:	2c06      	cmp	r4, #6
    5e2a:	d814      	bhi.n	5e56 <onoff_request+0x8a>
    5e2c:	e8df f004 	tbb	[pc, r4]
    5e30:	13131304 	.word	0x13131304
    5e34:	1a04      	.short	0x1a04
    5e36:	04          	.byte	0x04
    5e37:	00          	.byte	0x00
	parent->next = child;
    5e38:	2300      	movs	r3, #0
    5e3a:	6033      	str	r3, [r6, #0]
	return list->tail;
    5e3c:	686b      	ldr	r3, [r5, #4]
Z_GENLIST_APPEND(slist, snode)
    5e3e:	b93b      	cbnz	r3, 5e50 <onoff_request+0x84>
	list->head = node;
    5e40:	e9c5 6600 	strd	r6, r6, [r5]
	if (start) {
    5e44:	b9ac      	cbnz	r4, 5e72 <onoff_request+0xa6>
		process_event(mgr, EVT_RECHECK, key);
    5e46:	2102      	movs	r1, #2
    5e48:	4628      	mov	r0, r5
    5e4a:	f7fb fc49 	bl	16e0 <process_event>
    5e4e:	e7da      	b.n	5e06 <onoff_request+0x3a>
	parent->next = child;
    5e50:	601e      	str	r6, [r3, #0]
	list->tail = node;
    5e52:	606e      	str	r6, [r5, #4]
}
    5e54:	e7f6      	b.n	5e44 <onoff_request+0x78>
    5e56:	f382 8811 	msr	BASEPRI, r2
    5e5a:	f3bf 8f6f 	isb	sy
		rv = -EIO;
    5e5e:	f06f 0404 	mvn.w	r4, #4
    5e62:	e7d0      	b.n	5e06 <onoff_request+0x3a>
    5e64:	f382 8811 	msr	BASEPRI, r2
    5e68:	f3bf 8f6f 	isb	sy
    5e6c:	f06f 0485 	mvn.w	r4, #133	; 0x85
    5e70:	e7c9      	b.n	5e06 <onoff_request+0x3a>
    5e72:	f382 8811 	msr	BASEPRI, r2
    5e76:	f3bf 8f6f 	isb	sy
		if (notify) {
    5e7a:	e7c4      	b.n	5e06 <onoff_request+0x3a>

00005e7c <sys_notify_validate>:

int sys_notify_validate(struct sys_notify *notify)
{
	int rv = 0;

	if (notify == NULL) {
    5e7c:	4603      	mov	r3, r0
    5e7e:	b158      	cbz	r0, 5e98 <sys_notify_validate+0x1c>
	uint32_t method = notify->flags >> SYS_NOTIFY_METHOD_POS;
    5e80:	6842      	ldr	r2, [r0, #4]
	return method & SYS_NOTIFY_METHOD_MASK;
    5e82:	f002 0203 	and.w	r2, r2, #3
		return -EINVAL;
	}

	/* Validate configuration based on mode */
	switch (sys_notify_get_method(notify)) {
    5e86:	2a01      	cmp	r2, #1
    5e88:	d003      	beq.n	5e92 <sys_notify_validate+0x16>
    5e8a:	2a03      	cmp	r2, #3
    5e8c:	d104      	bne.n	5e98 <sys_notify_validate+0x1c>
	case SYS_NOTIFY_METHOD_SPINWAIT:
		break;
	case SYS_NOTIFY_METHOD_CALLBACK:
		if (notify->method.callback == NULL) {
    5e8e:	6802      	ldr	r2, [r0, #0]
    5e90:	b112      	cbz	r2, 5e98 <sys_notify_validate+0x1c>
		break;
	}

	/* Clear the result here instead of in all callers. */
	if (rv == 0) {
		notify->result = 0;
    5e92:	2000      	movs	r0, #0
    5e94:	6098      	str	r0, [r3, #8]
    5e96:	4770      	bx	lr
    5e98:	f06f 0015 	mvn.w	r0, #21
	}

	return rv;
}
    5e9c:	4770      	bx	lr

00005e9e <sys_notify_finalize>:
	uint32_t method = notify->flags >> SYS_NOTIFY_METHOD_POS;
    5e9e:	6842      	ldr	r2, [r0, #4]

sys_notify_generic_callback sys_notify_finalize(struct sys_notify *notify,
						    int res)
{
    5ea0:	4603      	mov	r3, r0
	return method & SYS_NOTIFY_METHOD_MASK;
    5ea2:	f002 0203 	and.w	r2, r2, #3

	/* Store the result and capture secondary notification
	 * information.
	 */
	notify->result = res;
	switch (method) {
    5ea6:	2a03      	cmp	r2, #3
    5ea8:	f04f 0200 	mov.w	r2, #0
	notify->result = res;
    5eac:	6081      	str	r1, [r0, #8]
	sys_notify_generic_callback rv = NULL;
    5eae:	bf14      	ite	ne
    5eb0:	4610      	movne	r0, r2
	case SYS_NOTIFY_METHOD_SPINWAIT:
		break;
	case SYS_NOTIFY_METHOD_CALLBACK:
		rv = notify->method.callback;
    5eb2:	6800      	ldreq	r0, [r0, #0]
	/* Mark completion by clearing the flags field to the
	 * completed state, releasing any spin-waiters, then complete
	 * secondary notification.
	 */
	compiler_barrier();
	notify->flags = SYS_NOTIFY_METHOD_COMPLETED;
    5eb4:	605a      	str	r2, [r3, #4]
	if (IS_ENABLED(CONFIG_POLL) && (sig != NULL)) {
		k_poll_signal_raise(sig, res);
	}

	return rv;
}
    5eb6:	4770      	bx	lr

00005eb8 <_ConfigAbsSyms>:
GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BUILD_OUTPUT_META, 1);
GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_WARN_DEPRECATED, 1);
GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_ENFORCE_ZEPHYR_STDINT, 1);
GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMPAT_INCLUDES, 1);

GEN_ABS_SYM_END
    5eb8:	4770      	bx	lr

00005eba <z_log_minimal_printk>:
#include <zephyr/sys/printk.h>

#define HEXDUMP_BYTES_IN_LINE 8U

void z_log_minimal_printk(const char *fmt, ...)
{
    5eba:	b40f      	push	{r0, r1, r2, r3}
    5ebc:	b507      	push	{r0, r1, r2, lr}
    5ebe:	a904      	add	r1, sp, #16
    5ec0:	f851 0b04 	ldr.w	r0, [r1], #4
	va_list ap;

	va_start(ap, fmt);
    5ec4:	9101      	str	r1, [sp, #4]
	vprintk(fmt, ap);
    5ec6:	f7fb fbfd 	bl	16c4 <vprintk>
	va_end(ap);
}
    5eca:	b003      	add	sp, #12
    5ecc:	f85d eb04 	ldr.w	lr, [sp], #4
    5ed0:	b004      	add	sp, #16
    5ed2:	4770      	bx	lr

00005ed4 <flash_area_close>:

void flash_area_close(const struct flash_area *fa)
{
	/* nothing to do for now */
}
    5ed4:	4770      	bx	lr

00005ed6 <flash_area_read>:


static inline bool is_in_flash_area_bounds(const struct flash_area *fa,
					   off_t off, size_t len)
{
	return (off >= 0) && ((off + len) <= fa->fa_size);
    5ed6:	2900      	cmp	r1, #0

int flash_area_read(const struct flash_area *fa, off_t off, void *dst,
		    size_t len)
{
    5ed8:	b430      	push	{r4, r5}
    5eda:	4604      	mov	r4, r0
    5edc:	4618      	mov	r0, r3
    5ede:	db0b      	blt.n	5ef8 <flash_area_read+0x22>
    5ee0:	68a5      	ldr	r5, [r4, #8]
    5ee2:	4408      	add	r0, r1
    5ee4:	42a8      	cmp	r0, r5
    5ee6:	d807      	bhi.n	5ef8 <flash_area_read+0x22>
	if (!is_in_flash_area_bounds(fa, off, len)) {
		return -EINVAL;
	}

	return flash_read(fa->fa_dev, fa->fa_off + off, dst, len);
    5ee8:	68e0      	ldr	r0, [r4, #12]
    5eea:	6864      	ldr	r4, [r4, #4]
    5eec:	4421      	add	r1, r4
				    size_t len)
{
	const struct flash_driver_api *api =
		(const struct flash_driver_api *)dev->api;

	return api->read(dev, offset, data, len);
    5eee:	6884      	ldr	r4, [r0, #8]
    5ef0:	6824      	ldr	r4, [r4, #0]
    5ef2:	46a4      	mov	ip, r4
}
    5ef4:	bc30      	pop	{r4, r5}
    5ef6:	4760      	bx	ip
    5ef8:	f06f 0015 	mvn.w	r0, #21
    5efc:	bc30      	pop	{r4, r5}
    5efe:	4770      	bx	lr

00005f00 <flash_area_write>:
    5f00:	2900      	cmp	r1, #0

int flash_area_write(const struct flash_area *fa, off_t off, const void *src,
		     size_t len)
{
    5f02:	b430      	push	{r4, r5}
    5f04:	4604      	mov	r4, r0
    5f06:	4618      	mov	r0, r3
    5f08:	db0b      	blt.n	5f22 <flash_area_write+0x22>
    5f0a:	68a5      	ldr	r5, [r4, #8]
    5f0c:	4408      	add	r0, r1
    5f0e:	42a8      	cmp	r0, r5
    5f10:	d807      	bhi.n	5f22 <flash_area_write+0x22>
	if (!is_in_flash_area_bounds(fa, off, len)) {
		return -EINVAL;
	}

	return flash_write(fa->fa_dev, fa->fa_off + off, (void *)src, len);
    5f12:	68e0      	ldr	r0, [r4, #12]
    5f14:	6864      	ldr	r4, [r4, #4]
    5f16:	4421      	add	r1, r4
{
	const struct flash_driver_api *api =
		(const struct flash_driver_api *)dev->api;
	int rc;

	rc = api->write(dev, offset, data, len);
    5f18:	6884      	ldr	r4, [r0, #8]
    5f1a:	6864      	ldr	r4, [r4, #4]
    5f1c:	46a4      	mov	ip, r4
}
    5f1e:	bc30      	pop	{r4, r5}
    5f20:	4760      	bx	ip
    5f22:	f06f 0015 	mvn.w	r0, #21
    5f26:	bc30      	pop	{r4, r5}
    5f28:	4770      	bx	lr

00005f2a <flash_area_erase>:
    5f2a:	2900      	cmp	r1, #0

int flash_area_erase(const struct flash_area *fa, off_t off, size_t len)
{
    5f2c:	4603      	mov	r3, r0
    5f2e:	b410      	push	{r4}
    5f30:	4610      	mov	r0, r2
    5f32:	db0a      	blt.n	5f4a <flash_area_erase+0x20>
    5f34:	689c      	ldr	r4, [r3, #8]
    5f36:	4408      	add	r0, r1
    5f38:	42a0      	cmp	r0, r4
    5f3a:	d806      	bhi.n	5f4a <flash_area_erase+0x20>
	if (!is_in_flash_area_bounds(fa, off, len)) {
		return -EINVAL;
	}

	return flash_erase(fa->fa_dev, fa->fa_off + off, len);
    5f3c:	68d8      	ldr	r0, [r3, #12]
    5f3e:	685b      	ldr	r3, [r3, #4]
    5f40:	4419      	add	r1, r3
{
	const struct flash_driver_api *api =
		(const struct flash_driver_api *)dev->api;
	int rc;

	rc = api->erase(dev, offset, size);
    5f42:	6883      	ldr	r3, [r0, #8]
}
    5f44:	bc10      	pop	{r4}
    5f46:	689b      	ldr	r3, [r3, #8]
    5f48:	4718      	bx	r3
    5f4a:	f06f 0015 	mvn.w	r0, #21
    5f4e:	bc10      	pop	{r4}
    5f50:	4770      	bx	lr

00005f52 <flash_area_align>:

uint32_t flash_area_align(const struct flash_area *fa)
{
    5f52:	b508      	push	{r3, lr}
	return flash_get_write_block_size(fa->fa_dev);
    5f54:	68c0      	ldr	r0, [r0, #12]
static inline size_t z_impl_flash_get_write_block_size(const struct device *dev)
{
	const struct flash_driver_api *api =
		(const struct flash_driver_api *)dev->api;

	return api->get_parameters(dev)->write_block_size;
    5f56:	6883      	ldr	r3, [r0, #8]
    5f58:	68db      	ldr	r3, [r3, #12]
    5f5a:	4798      	blx	r3
}
    5f5c:	6800      	ldr	r0, [r0, #0]
    5f5e:	bd08      	pop	{r3, pc}

00005f60 <flash_area_erased_val>:
{
	return fa->fa_dev;
}

uint8_t flash_area_erased_val(const struct flash_area *fa)
{
    5f60:	b508      	push	{r3, lr}
	const struct flash_parameters *param;

	param = flash_get_parameters(fa->fa_dev);
    5f62:	68c0      	ldr	r0, [r0, #12]
static inline const struct flash_parameters *z_impl_flash_get_parameters(const struct device *dev)
{
	const struct flash_driver_api *api =
		(const struct flash_driver_api *)dev->api;

	return api->get_parameters(dev);
    5f64:	6883      	ldr	r3, [r0, #8]
    5f66:	68db      	ldr	r3, [r3, #12]
    5f68:	4798      	blx	r3

	return param->erase_value;
}
    5f6a:	7900      	ldrb	r0, [r0, #4]
    5f6c:	bd08      	pop	{r3, pc}

00005f6e <get_sectors_cb>:
{
    5f6e:	b570      	push	{r4, r5, r6, lr}
	if (info->start_offset < data->area_off) {
    5f70:	684c      	ldr	r4, [r1, #4]
    5f72:	6803      	ldr	r3, [r0, #0]
    5f74:	42a3      	cmp	r3, r4
    5f76:	d201      	bcs.n	5f7c <get_sectors_cb+0xe>
		*bail_value = true;
    5f78:	2001      	movs	r0, #1
}
    5f7a:	bd70      	pop	{r4, r5, r6, pc}
	} else if (info->start_offset >= data->area_off + data->area_len) {
    5f7c:	688a      	ldr	r2, [r1, #8]
    5f7e:	4422      	add	r2, r4
    5f80:	4293      	cmp	r3, r2
    5f82:	d301      	bcc.n	5f88 <get_sectors_cb+0x1a>
		*bail_value = false;
    5f84:	2000      	movs	r0, #0
    5f86:	e7f8      	b.n	5f7a <get_sectors_cb+0xc>
	} else if (data->ret_idx >= data->ret_len) {
    5f88:	694e      	ldr	r6, [r1, #20]
    5f8a:	e9d1 2503 	ldrd	r2, r5, [r1, #12]
    5f8e:	42b5      	cmp	r5, r6
    5f90:	d303      	bcc.n	5f9a <get_sectors_cb+0x2c>
		data->status = -ENOMEM;
    5f92:	f06f 030b 	mvn.w	r3, #11
    5f96:	618b      	str	r3, [r1, #24]
		return true;
    5f98:	e7f4      	b.n	5f84 <get_sectors_cb+0x16>
	ret[data->ret_idx].fs_off = info->start_offset - data->area_off;
    5f9a:	1b1b      	subs	r3, r3, r4
    5f9c:	f842 3035 	str.w	r3, [r2, r5, lsl #3]
	ret[data->ret_idx].fs_size = info->size;
    5fa0:	6843      	ldr	r3, [r0, #4]
    5fa2:	6908      	ldr	r0, [r1, #16]
    5fa4:	eb02 02c0 	add.w	r2, r2, r0, lsl #3
    5fa8:	6053      	str	r3, [r2, #4]
	data->ret_idx++;
    5faa:	690b      	ldr	r3, [r1, #16]
    5fac:	3301      	adds	r3, #1
    5fae:	610b      	str	r3, [r1, #16]
	return true;
    5fb0:	e7e2      	b.n	5f78 <get_sectors_cb+0xa>

00005fb2 <abort_function>:
	sys_reboot(SYS_REBOOT_WARM);
    5fb2:	2000      	movs	r0, #0
{
    5fb4:	b508      	push	{r3, lr}
	sys_reboot(SYS_REBOOT_WARM);
    5fb6:	f7fb fec5 	bl	1d44 <sys_reboot>

00005fba <nrf_cc3xx_platform_mutex_init>:
/** @brief Function to initialize the nrf_cc3xx_platform mutex APIs
 */
void nrf_cc3xx_platform_mutex_init(void)
{
	// No thread-safe mutexes are required
}
    5fba:	4770      	bx	lr

00005fbc <console_write>:
{
    5fbc:	b570      	push	{r4, r5, r6, lr}
    5fbe:	4606      	mov	r6, r0
    5fc0:	460d      	mov	r5, r1
	for (i = 0; i < cnt; i++) {
    5fc2:	2400      	movs	r4, #0
    5fc4:	42ac      	cmp	r4, r5
    5fc6:	db00      	blt.n	5fca <console_write+0xe>
}
    5fc8:	bd70      	pop	{r4, r5, r6, pc}
		if (console_out((int)str[i]) == EOF) {
    5fca:	5d30      	ldrb	r0, [r6, r4]
    5fcc:	f7fb ffa4 	bl	1f18 <console_out>
    5fd0:	3001      	adds	r0, #1
    5fd2:	d0f9      	beq.n	5fc8 <console_write+0xc>
	for (i = 0; i < cnt; i++) {
    5fd4:	3401      	adds	r4, #1
    5fd6:	e7f5      	b.n	5fc4 <console_write+0x8>

00005fd8 <initial_checks>:
} while(0)

static bool initial_checks(zcbor_state_t *state)
{
	ZCBOR_CHECK_ERROR();
	ZCBOR_CHECK_PAYLOAD();
    5fd8:	6802      	ldr	r2, [r0, #0]
    5fda:	68c3      	ldr	r3, [r0, #12]
    5fdc:	429a      	cmp	r2, r3
    5fde:	bf21      	itttt	cs
    5fe0:	2208      	movcs	r2, #8
    5fe2:	6943      	ldrcs	r3, [r0, #20]
    5fe4:	2000      	movcs	r0, #0
    5fe6:	60da      	strcs	r2, [r3, #12]
	return true;
    5fe8:	bf38      	it	cc
    5fea:	2001      	movcc	r0, #1
}
    5fec:	4770      	bx	lr

00005fee <type_check>:

static bool type_check(zcbor_state_t *state, zcbor_major_type_t exp_major_type)
{
    5fee:	b510      	push	{r4, lr}
    5ff0:	4604      	mov	r4, r0
	if (!initial_checks(state)) {
    5ff2:	f7ff fff1 	bl	5fd8 <initial_checks>
    5ff6:	b138      	cbz	r0, 6008 <type_check+0x1a>
		ZCBOR_FAIL();
	}
	zcbor_major_type_t major_type = MAJOR_TYPE(*state->payload);
    5ff8:	6823      	ldr	r3, [r4, #0]
    5ffa:	781b      	ldrb	r3, [r3, #0]

	if (major_type != exp_major_type) {
    5ffc:	ebb1 1f53 	cmp.w	r1, r3, lsr #5
    6000:	d003      	beq.n	600a <type_check+0x1c>
    6002:	220a      	movs	r2, #10
    6004:	6963      	ldr	r3, [r4, #20]
    6006:	60da      	str	r2, [r3, #12]
		ZCBOR_FAIL();
    6008:	2000      	movs	r0, #0
		ZCBOR_ERR(ZCBOR_ERR_WRONG_TYPE);
	}
	return true;
}
    600a:	bd10      	pop	{r4, pc}

0000600c <value_extract>:
 *          CBOR values are always big-endian, so this function converts from
 *          big to little-endian if necessary (@ref CONFIG_BIG_ENDIAN).
 */
static bool value_extract(zcbor_state_t *state,
		void *const result, uint_fast32_t result_len)
{
    600c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    6010:	4604      	mov	r4, r0
    6012:	4617      	mov	r7, r2
	zcbor_trace();
	zcbor_assert(result_len != 0, "0-length result not supported.\r\n");
	zcbor_assert(result != NULL, NULL);

	INITIAL_CHECKS();
    6014:	f7ff ffe0 	bl	5fd8 <initial_checks>
{
    6018:	460d      	mov	r5, r1
	INITIAL_CHECKS();
    601a:	4680      	mov	r8, r0
    601c:	b120      	cbz	r0, 6028 <value_extract+0x1c>
	ZCBOR_ERR_IF((state->elem_count == 0), ZCBOR_ERR_LOW_ELEM_COUNT);
    601e:	68a3      	ldr	r3, [r4, #8]
    6020:	b93b      	cbnz	r3, 6032 <value_extract+0x26>
    6022:	2203      	movs	r2, #3
    6024:	6963      	ldr	r3, [r4, #20]
    6026:	60da      	str	r2, [r3, #12]
	INITIAL_CHECKS();
    6028:	f04f 0800 	mov.w	r8, #0
		(state->payload) += len;
	}

	(state->elem_count)--;
	return true;
}
    602c:	4640      	mov	r0, r8
    602e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
	uint8_t additional = ADDITIONAL(*state->payload);
    6032:	6823      	ldr	r3, [r4, #0]
	memset(result, 0, result_len);
    6034:	463a      	mov	r2, r7
	uint8_t additional = ADDITIONAL(*state->payload);
    6036:	781e      	ldrb	r6, [r3, #0]
	state->payload_bak = state->payload;
    6038:	6063      	str	r3, [r4, #4]
	(state->payload)++;
    603a:	3301      	adds	r3, #1
	memset(result, 0, result_len);
    603c:	2100      	movs	r1, #0
    603e:	4628      	mov	r0, r5
	uint8_t additional = ADDITIONAL(*state->payload);
    6040:	f006 061f 	and.w	r6, r6, #31
	(state->payload)++;
    6044:	6023      	str	r3, [r4, #0]
	memset(result, 0, result_len);
    6046:	f000 fab2 	bl	65ae <memset>
	if (additional <= ZCBOR_VALUE_IN_HEADER) {
    604a:	2e17      	cmp	r6, #23
    604c:	d804      	bhi.n	6058 <value_extract+0x4c>
		u8_result[0] = additional;
    604e:	702e      	strb	r6, [r5, #0]
	(state->elem_count)--;
    6050:	68a3      	ldr	r3, [r4, #8]
    6052:	3b01      	subs	r3, #1
    6054:	60a3      	str	r3, [r4, #8]
	return true;
    6056:	e7e9      	b.n	602c <value_extract+0x20>
	if (ZCBOR_VALUE_IS_1_BYTE <= additional && additional <= ZCBOR_VALUE_IS_8_BYTES) {
    6058:	3e18      	subs	r6, #24
    605a:	b2f2      	uxtb	r2, r6
    605c:	2a03      	cmp	r2, #3
		FAIL_AND_DECR_IF(len > result_len, ZCBOR_ERR_INT_SIZE);
    605e:	6823      	ldr	r3, [r4, #0]
	if (ZCBOR_VALUE_IS_1_BYTE <= additional && additional <= ZCBOR_VALUE_IS_8_BYTES) {
    6060:	d808      	bhi.n	6074 <value_extract+0x68>
		return 1U << (additional - ZCBOR_VALUE_IS_1_BYTE);
    6062:	2101      	movs	r1, #1
    6064:	40b1      	lsls	r1, r6
		FAIL_AND_DECR_IF(len > result_len, ZCBOR_ERR_INT_SIZE);
    6066:	428f      	cmp	r7, r1
    6068:	d209      	bcs.n	607e <value_extract+0x72>
    606a:	3b01      	subs	r3, #1
    606c:	6023      	str	r3, [r4, #0]
    606e:	2205      	movs	r2, #5
    6070:	6963      	ldr	r3, [r4, #20]
    6072:	e7d8      	b.n	6026 <value_extract+0x1a>
		FAIL_AND_DECR_IF(len == 0, ZCBOR_ERR_ADDITIONAL_INVAL); // additional_len() did not recognize the additional value.
    6074:	3b01      	subs	r3, #1
    6076:	6023      	str	r3, [r4, #0]
    6078:	2207      	movs	r2, #7
    607a:	6963      	ldr	r3, [r4, #20]
    607c:	e7d3      	b.n	6026 <value_extract+0x1a>
		FAIL_AND_DECR_IF((state->payload + len) > state->payload_end,
    607e:	68e0      	ldr	r0, [r4, #12]
    6080:	185a      	adds	r2, r3, r1
    6082:	4290      	cmp	r0, r2
    6084:	d204      	bcs.n	6090 <value_extract+0x84>
    6086:	3b01      	subs	r3, #1
    6088:	6023      	str	r3, [r4, #0]
    608a:	2208      	movs	r2, #8
    608c:	6963      	ldr	r3, [r4, #20]
    608e:	e7ca      	b.n	6026 <value_extract+0x1a>
    6090:	1e4b      	subs	r3, r1, #1
    6092:	3d01      	subs	r5, #1
			u8_result[i] = (state->payload)[len - i - 1];
    6094:	6822      	ldr	r2, [r4, #0]
    6096:	5cd2      	ldrb	r2, [r2, r3]
		for (uint_fast32_t i = 0; i < len; i++) {
    6098:	3b01      	subs	r3, #1
			u8_result[i] = (state->payload)[len - i - 1];
    609a:	f805 2f01 	strb.w	r2, [r5, #1]!
		for (uint_fast32_t i = 0; i < len; i++) {
    609e:	d2f9      	bcs.n	6094 <value_extract+0x88>
		(state->payload) += len;
    60a0:	6823      	ldr	r3, [r4, #0]
    60a2:	440b      	add	r3, r1
    60a4:	6023      	str	r3, [r4, #0]
    60a6:	e7d3      	b.n	6050 <value_extract+0x44>

000060a8 <str_start_decode>:
}


static bool str_start_decode(zcbor_state_t *state,
		struct zcbor_string *result, zcbor_major_type_t exp_major_type)
{
    60a8:	b538      	push	{r3, r4, r5, lr}
    60aa:	460c      	mov	r4, r1
	INITIAL_CHECKS_WITH_TYPE(exp_major_type);
    60ac:	4611      	mov	r1, r2
{
    60ae:	4605      	mov	r5, r0
	INITIAL_CHECKS_WITH_TYPE(exp_major_type);
    60b0:	f7ff ff9d 	bl	5fee <type_check>
    60b4:	b908      	cbnz	r0, 60ba <str_start_decode+0x12>
    60b6:	2000      	movs	r0, #0
		ZCBOR_FAIL();
	}

	result->value = state->payload;
	return true;
}
    60b8:	bd38      	pop	{r3, r4, r5, pc}
	if (!value_extract(state, &result->len, sizeof(result->len))) {
    60ba:	2204      	movs	r2, #4
    60bc:	4628      	mov	r0, r5
    60be:	18a1      	adds	r1, r4, r2
    60c0:	f7ff ffa4 	bl	600c <value_extract>
    60c4:	2800      	cmp	r0, #0
    60c6:	d0f6      	beq.n	60b6 <str_start_decode+0xe>
	result->value = state->payload;
    60c8:	682b      	ldr	r3, [r5, #0]
    60ca:	6023      	str	r3, [r4, #0]
	return true;
    60cc:	e7f4      	b.n	60b8 <str_start_decode+0x10>

000060ce <list_map_start_decode>:
}


static bool list_map_start_decode(zcbor_state_t *state,
		zcbor_major_type_t exp_major_type)
{
    60ce:	b537      	push	{r0, r1, r2, r4, r5, lr}
    60d0:	4604      	mov	r4, r0
	uint_fast32_t new_elem_count;
	bool indefinite_length_array = false;

	INITIAL_CHECKS_WITH_TYPE(exp_major_type);
    60d2:	f7ff ff8c 	bl	5fee <type_check>
    60d6:	4605      	mov	r5, r0
    60d8:	b168      	cbz	r0, 60f6 <list_map_start_decode+0x28>

	if (ADDITIONAL(*state->payload) == ZCBOR_VALUE_IS_INDEFINITE_LENGTH) {
    60da:	6822      	ldr	r2, [r4, #0]
    60dc:	7813      	ldrb	r3, [r2, #0]
    60de:	f003 031f 	and.w	r3, r3, #31
    60e2:	2b1f      	cmp	r3, #31
    60e4:	d119      	bne.n	611a <list_map_start_decode+0x4c>
		/* Indefinite length array. */
		new_elem_count = ZCBOR_LARGE_ELEM_COUNT;
    60e6:	f06f 0310 	mvn.w	r3, #16
    60ea:	9301      	str	r3, [sp, #4]
		ZCBOR_ERR_IF(state->elem_count == 0, ZCBOR_ERR_LOW_ELEM_COUNT);
    60ec:	68a3      	ldr	r3, [r4, #8]
    60ee:	b92b      	cbnz	r3, 60fc <list_map_start_decode+0x2e>
    60f0:	2203      	movs	r2, #3
    60f2:	6963      	ldr	r3, [r4, #20]
    60f4:	60da      	str	r2, [r3, #12]
	INITIAL_CHECKS_WITH_TYPE(exp_major_type);
    60f6:	2000      	movs	r0, #0
	}

	state->indefinite_length_array = indefinite_length_array;

	return true;
}
    60f8:	b003      	add	sp, #12
    60fa:	bd30      	pop	{r4, r5, pc}
		state->payload++;
    60fc:	3201      	adds	r2, #1
		state->elem_count--;
    60fe:	3b01      	subs	r3, #1
		state->payload++;
    6100:	6022      	str	r2, [r4, #0]
		state->elem_count--;
    6102:	60a3      	str	r3, [r4, #8]
	if (!zcbor_new_backup(state, new_elem_count)) {
    6104:	4620      	mov	r0, r4
    6106:	9901      	ldr	r1, [sp, #4]
    6108:	f000 f98b 	bl	6422 <zcbor_new_backup>
    610c:	b978      	cbnz	r0, 612e <list_map_start_decode+0x60>
		FAIL_RESTORE();
    610e:	6863      	ldr	r3, [r4, #4]
    6110:	6023      	str	r3, [r4, #0]
    6112:	68a3      	ldr	r3, [r4, #8]
    6114:	3301      	adds	r3, #1
    6116:	60a3      	str	r3, [r4, #8]
    6118:	e7ed      	b.n	60f6 <list_map_start_decode+0x28>
		if (!value_extract(state, &new_elem_count, sizeof(new_elem_count))) {
    611a:	2204      	movs	r2, #4
    611c:	4620      	mov	r0, r4
    611e:	eb0d 0102 	add.w	r1, sp, r2
    6122:	f7ff ff73 	bl	600c <value_extract>
    6126:	2800      	cmp	r0, #0
    6128:	d0e5      	beq.n	60f6 <list_map_start_decode+0x28>
	bool indefinite_length_array = false;
    612a:	2500      	movs	r5, #0
    612c:	e7ea      	b.n	6104 <list_map_start_decode+0x36>
	state->indefinite_length_array = indefinite_length_array;
    612e:	7425      	strb	r5, [r4, #16]
	return true;
    6130:	e7e2      	b.n	60f8 <list_map_start_decode+0x2a>

00006132 <list_map_end_decode>:
	return true;
}


static bool list_map_end_decode(zcbor_state_t *state)
{
    6132:	b510      	push	{r4, lr}
	uint_fast32_t max_elem_count = 0;

	if (state->indefinite_length_array) {
    6134:	7c02      	ldrb	r2, [r0, #16]
{
    6136:	4604      	mov	r4, r0
	if (state->indefinite_length_array) {
    6138:	b18a      	cbz	r2, 615e <list_map_end_decode+0x2c>
	INITIAL_CHECKS();
    613a:	f7ff ff4d 	bl	5fd8 <initial_checks>
    613e:	b130      	cbz	r0, 614e <list_map_end_decode+0x1c>
	ZCBOR_ERR_IF(*state->payload != 0xFF, ZCBOR_ERR_WRONG_TYPE);
    6140:	6823      	ldr	r3, [r4, #0]
    6142:	781a      	ldrb	r2, [r3, #0]
    6144:	2aff      	cmp	r2, #255	; 0xff
    6146:	d004      	beq.n	6152 <list_map_end_decode+0x20>
    6148:	220a      	movs	r2, #10
    614a:	6963      	ldr	r3, [r4, #20]
    614c:	60da      	str	r2, [r3, #12]
			max_elem_count)) {
		ZCBOR_FAIL();
	}

	return true;
}
    614e:	2000      	movs	r0, #0
    6150:	bd10      	pop	{r4, pc}
	state->payload++;
    6152:	3301      	adds	r3, #1
    6154:	6023      	str	r3, [r4, #0]
		state->indefinite_length_array = false;
    6156:	2300      	movs	r3, #0
		max_elem_count = ZCBOR_MAX_ELEM_COUNT;
    6158:	f04f 32ff 	mov.w	r2, #4294967295
		state->indefinite_length_array = false;
    615c:	7423      	strb	r3, [r4, #16]
	if (!zcbor_process_backup(state,
    615e:	4620      	mov	r0, r4
}
    6160:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
	if (!zcbor_process_backup(state,
    6164:	2107      	movs	r1, #7
    6166:	f000 b97a 	b.w	645e <zcbor_process_backup>

0000616a <str_decode>:
{
    616a:	b538      	push	{r3, r4, r5, lr}
    616c:	4604      	mov	r4, r0
    616e:	460d      	mov	r5, r1
	if (!str_start_decode(state, result, exp_major_type)) {
    6170:	f7ff ff9a 	bl	60a8 <str_start_decode>
    6174:	b180      	cbz	r0, 6198 <str_decode+0x2e>
	if (result->len > (state->payload_end - state->payload)) {
    6176:	6823      	ldr	r3, [r4, #0]
    6178:	68e2      	ldr	r2, [r4, #12]
    617a:	6869      	ldr	r1, [r5, #4]
    617c:	1ad2      	subs	r2, r2, r3
    617e:	4291      	cmp	r1, r2
    6180:	d802      	bhi.n	6188 <str_decode+0x1e>
	state->payload += result->len;
    6182:	440b      	add	r3, r1
    6184:	6023      	str	r3, [r4, #0]
}
    6186:	bd38      	pop	{r3, r4, r5, pc}
    6188:	2208      	movs	r2, #8
		ERR_RESTORE(ZCBOR_ERR_NO_PAYLOAD);
    618a:	6863      	ldr	r3, [r4, #4]
    618c:	6023      	str	r3, [r4, #0]
    618e:	68a3      	ldr	r3, [r4, #8]
    6190:	3301      	adds	r3, #1
    6192:	60a3      	str	r3, [r4, #8]
    6194:	6963      	ldr	r3, [r4, #20]
    6196:	60da      	str	r2, [r3, #12]
		ZCBOR_FAIL();
    6198:	2000      	movs	r0, #0
    619a:	e7f4      	b.n	6186 <str_decode+0x1c>

0000619c <str_expect>:
{
    619c:	b573      	push	{r0, r1, r4, r5, r6, lr}
    619e:	460e      	mov	r6, r1
	if (!str_decode(state, &tmp_result, exp_major_type)) {
    61a0:	4669      	mov	r1, sp
{
    61a2:	4604      	mov	r4, r0
	if (!str_decode(state, &tmp_result, exp_major_type)) {
    61a4:	f7ff ffe1 	bl	616a <str_decode>
    61a8:	4605      	mov	r5, r0
    61aa:	b158      	cbz	r0, 61c4 <str_expect+0x28>
	if ((tmp_result.len != result->len)
    61ac:	9a01      	ldr	r2, [sp, #4]
    61ae:	6873      	ldr	r3, [r6, #4]
    61b0:	429a      	cmp	r2, r3
    61b2:	d00b      	beq.n	61cc <str_expect+0x30>
    61b4:	220b      	movs	r2, #11
		ERR_RESTORE(ZCBOR_ERR_WRONG_VALUE);
    61b6:	6863      	ldr	r3, [r4, #4]
    61b8:	6023      	str	r3, [r4, #0]
    61ba:	68a3      	ldr	r3, [r4, #8]
    61bc:	3301      	adds	r3, #1
    61be:	60a3      	str	r3, [r4, #8]
    61c0:	6963      	ldr	r3, [r4, #20]
    61c2:	60da      	str	r2, [r3, #12]
		ZCBOR_FAIL();
    61c4:	2500      	movs	r5, #0
}
    61c6:	4628      	mov	r0, r5
    61c8:	b002      	add	sp, #8
    61ca:	bd70      	pop	{r4, r5, r6, pc}
			|| memcmp(result->value, tmp_result.value, tmp_result.len)) {
    61cc:	9900      	ldr	r1, [sp, #0]
    61ce:	6830      	ldr	r0, [r6, #0]
    61d0:	f000 f9bb 	bl	654a <memcmp>
    61d4:	2800      	cmp	r0, #0
    61d6:	d0f6      	beq.n	61c6 <str_expect+0x2a>
    61d8:	e7ec      	b.n	61b4 <str_expect+0x18>

000061da <zcbor_int64_decode>:
{
    61da:	b573      	push	{r0, r1, r4, r5, r6, lr}
    61dc:	4604      	mov	r4, r0
    61de:	460d      	mov	r5, r1
	INITIAL_CHECKS();
    61e0:	f7ff fefa 	bl	5fd8 <initial_checks>
    61e4:	b140      	cbz	r0, 61f8 <zcbor_int64_decode+0x1e>
	uint8_t major_type = MAJOR_TYPE(*state->payload);
    61e6:	6823      	ldr	r3, [r4, #0]
    61e8:	781b      	ldrb	r3, [r3, #0]
	if (major_type != ZCBOR_MAJOR_TYPE_PINT
    61ea:	2b3f      	cmp	r3, #63	; 0x3f
	uint8_t major_type = MAJOR_TYPE(*state->payload);
    61ec:	ea4f 1653 	mov.w	r6, r3, lsr #5
	if (major_type != ZCBOR_MAJOR_TYPE_PINT
    61f0:	d905      	bls.n	61fe <zcbor_int64_decode+0x24>
    61f2:	220a      	movs	r2, #10
    61f4:	6963      	ldr	r3, [r4, #20]
    61f6:	60da      	str	r2, [r3, #12]
	INITIAL_CHECKS();
    61f8:	2000      	movs	r0, #0
}
    61fa:	b002      	add	sp, #8
    61fc:	bd70      	pop	{r4, r5, r6, pc}
	if (!value_extract(state, &uint_result, sizeof(uint_result))) {
    61fe:	2208      	movs	r2, #8
    6200:	4669      	mov	r1, sp
    6202:	4620      	mov	r0, r4
    6204:	f7ff ff02 	bl	600c <value_extract>
    6208:	2800      	cmp	r0, #0
    620a:	d0f5      	beq.n	61f8 <zcbor_int64_decode+0x1e>
	int_result = (int64_t)uint_result;
    620c:	e9dd 2300 	ldrd	r2, r3, [sp]
	if (int_result < 0) {
    6210:	2b00      	cmp	r3, #0
    6212:	da07      	bge.n	6224 <zcbor_int64_decode+0x4a>
		ERR_RESTORE(ZCBOR_ERR_INT_SIZE);
    6214:	6863      	ldr	r3, [r4, #4]
    6216:	2205      	movs	r2, #5
    6218:	6023      	str	r3, [r4, #0]
    621a:	68a3      	ldr	r3, [r4, #8]
    621c:	3301      	adds	r3, #1
    621e:	60a3      	str	r3, [r4, #8]
    6220:	6963      	ldr	r3, [r4, #20]
    6222:	e7e8      	b.n	61f6 <zcbor_int64_decode+0x1c>
	if (major_type == ZCBOR_MAJOR_TYPE_NINT) {
    6224:	2e01      	cmp	r6, #1
		*result = -1 - int_result;
    6226:	bf04      	itt	eq
    6228:	43d2      	mvneq	r2, r2
    622a:	43db      	mvneq	r3, r3
    622c:	e9c5 2300 	strd	r2, r3, [r5]
    6230:	e7e3      	b.n	61fa <zcbor_int64_decode+0x20>

00006232 <zcbor_int32_decode>:
{
    6232:	b537      	push	{r0, r1, r2, r4, r5, lr}
    6234:	460d      	mov	r5, r1
	if (zcbor_int64_decode(state, &result64)) {
    6236:	4669      	mov	r1, sp
{
    6238:	4604      	mov	r4, r0
	if (zcbor_int64_decode(state, &result64)) {
    623a:	f7ff ffce 	bl	61da <zcbor_int64_decode>
    623e:	b910      	cbnz	r0, 6246 <zcbor_int32_decode+0x14>
			ERR_RESTORE(ZCBOR_ERR_INT_SIZE);
    6240:	2000      	movs	r0, #0
}
    6242:	b003      	add	sp, #12
    6244:	bd30      	pop	{r4, r5, pc}
		if (result64 > INT32_MAX) {
    6246:	9b00      	ldr	r3, [sp, #0]
    6248:	9a01      	ldr	r2, [sp, #4]
    624a:	f1b3 4f00 	cmp.w	r3, #2147483648	; 0x80000000
    624e:	f172 0200 	sbcs.w	r2, r2, #0
    6252:	db08      	blt.n	6266 <zcbor_int32_decode+0x34>
    6254:	2205      	movs	r2, #5
			ERR_RESTORE(ZCBOR_ERR_INT_SIZE);
    6256:	6863      	ldr	r3, [r4, #4]
    6258:	6023      	str	r3, [r4, #0]
    625a:	68a3      	ldr	r3, [r4, #8]
    625c:	3301      	adds	r3, #1
    625e:	60a3      	str	r3, [r4, #8]
    6260:	6963      	ldr	r3, [r4, #20]
    6262:	60da      	str	r2, [r3, #12]
    6264:	e7ec      	b.n	6240 <zcbor_int32_decode+0xe>
		*result = (int32_t)result64;
    6266:	602b      	str	r3, [r5, #0]
		return true;
    6268:	e7eb      	b.n	6242 <zcbor_int32_decode+0x10>

0000626a <zcbor_bstr_decode>:
	return str_decode(state, result, ZCBOR_MAJOR_TYPE_BSTR);
    626a:	2202      	movs	r2, #2
    626c:	f7ff bf7d 	b.w	616a <str_decode>

00006270 <zcbor_tstr_expect>:
	return str_expect(state, result, ZCBOR_MAJOR_TYPE_TSTR);
    6270:	2203      	movs	r2, #3
    6272:	f7ff bf93 	b.w	619c <str_expect>

00006276 <zcbor_map_start_decode>:
{
    6276:	b510      	push	{r4, lr}
	bool ret = list_map_start_decode(state, ZCBOR_MAJOR_TYPE_MAP);
    6278:	2105      	movs	r1, #5
{
    627a:	4604      	mov	r4, r0
	bool ret = list_map_start_decode(state, ZCBOR_MAJOR_TYPE_MAP);
    627c:	f7ff ff27 	bl	60ce <list_map_start_decode>
	if (ret && !state->indefinite_length_array) {
    6280:	b168      	cbz	r0, 629e <zcbor_map_start_decode+0x28>
    6282:	7c23      	ldrb	r3, [r4, #16]
    6284:	b963      	cbnz	r3, 62a0 <zcbor_map_start_decode+0x2a>
		if (state->elem_count >= (ZCBOR_MAX_ELEM_COUNT / 2)) {
    6286:	f06f 4200 	mvn.w	r2, #2147483648	; 0x80000000
    628a:	68a3      	ldr	r3, [r4, #8]
    628c:	4293      	cmp	r3, r2
    628e:	d308      	bcc.n	62a2 <zcbor_map_start_decode+0x2c>
			ERR_RESTORE(ZCBOR_ERR_INT_SIZE);
    6290:	6862      	ldr	r2, [r4, #4]
    6292:	3301      	adds	r3, #1
    6294:	6022      	str	r2, [r4, #0]
    6296:	2205      	movs	r2, #5
    6298:	60a3      	str	r3, [r4, #8]
    629a:	6963      	ldr	r3, [r4, #20]
    629c:	60da      	str	r2, [r3, #12]
    629e:	2000      	movs	r0, #0
}
    62a0:	bd10      	pop	{r4, pc}
		state->elem_count *= 2;
    62a2:	005b      	lsls	r3, r3, #1
    62a4:	60a3      	str	r3, [r4, #8]
    62a6:	e7fb      	b.n	62a0 <zcbor_map_start_decode+0x2a>

000062a8 <zcbor_map_end_decode>:
{
	return list_map_end_decode(state);
}


bool zcbor_map_end_decode(zcbor_state_t *state)
    62a8:	f7ff bf43 	b.w	6132 <list_map_end_decode>

000062ac <zcbor_list_map_end_force_decode>:
}


bool zcbor_list_map_end_force_decode(zcbor_state_t *state)
{
	if (!zcbor_process_backup(state,
    62ac:	f04f 32ff 	mov.w	r2, #4294967295
    62b0:	2107      	movs	r1, #7
    62b2:	f000 b8d4 	b.w	645e <zcbor_process_backup>

000062b6 <zcbor_multi_decode>:
		uint_fast32_t *num_decode,
		zcbor_decoder_t decoder,
		zcbor_state_t *state,
		void *result,
		uint_fast32_t result_len)
{
    62b6:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
    62ba:	4681      	mov	r9, r0
    62bc:	e9dd 560c 	ldrd	r5, r6, [sp, #48]	; 0x30
    62c0:	4688      	mov	r8, r1
    62c2:	4617      	mov	r7, r2
    62c4:	469a      	mov	sl, r3
	ZCBOR_CHECK_ERROR();
	for (uint_fast32_t i = 0; i < max_decode; i++) {
    62c6:	2400      	movs	r4, #0
    62c8:	4544      	cmp	r4, r8
    62ca:	d102      	bne.n	62d2 <zcbor_multi_decode+0x1c>
			zcbor_print("Found %" PRIuFAST32 " elements.\r\n", i);
			return true;
		}
	}
	zcbor_print("Found %" PRIuFAST32 " elements.\r\n", max_decode);
	*num_decode = max_decode;
    62cc:	603c      	str	r4, [r7, #0]
			return true;
    62ce:	2001      	movs	r0, #1
    62d0:	e013      	b.n	62fa <zcbor_multi_decode+0x44>
		uint8_t const *payload_bak = state->payload;
    62d2:	682b      	ldr	r3, [r5, #0]
		if (!decoder(state,
    62d4:	4631      	mov	r1, r6
    62d6:	4628      	mov	r0, r5
		uint8_t const *payload_bak = state->payload;
    62d8:	9301      	str	r3, [sp, #4]
		uint_fast32_t elem_count_bak = state->elem_count;
    62da:	f8d5 b008 	ldr.w	fp, [r5, #8]
		if (!decoder(state,
    62de:	47d0      	blx	sl
    62e0:	9b0e      	ldr	r3, [sp, #56]	; 0x38
    62e2:	441e      	add	r6, r3
    62e4:	9b01      	ldr	r3, [sp, #4]
    62e6:	b958      	cbnz	r0, 6300 <zcbor_multi_decode+0x4a>
			ZCBOR_ERR_IF(i < min_decode, ZCBOR_ERR_ITERATIONS);
    62e8:	454c      	cmp	r4, r9
			*num_decode = i;
    62ea:	603c      	str	r4, [r7, #0]
			state->payload = payload_bak;
    62ec:	602b      	str	r3, [r5, #0]
			state->elem_count = elem_count_bak;
    62ee:	f8c5 b008 	str.w	fp, [r5, #8]
			ZCBOR_ERR_IF(i < min_decode, ZCBOR_ERR_ITERATIONS);
    62f2:	d2ec      	bcs.n	62ce <zcbor_multi_decode+0x18>
    62f4:	220d      	movs	r2, #13
    62f6:	696b      	ldr	r3, [r5, #20]
    62f8:	60da      	str	r2, [r3, #12]
	return true;
}
    62fa:	b003      	add	sp, #12
    62fc:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
	for (uint_fast32_t i = 0; i < max_decode; i++) {
    6300:	3401      	adds	r4, #1
    6302:	e7e1      	b.n	62c8 <zcbor_multi_decode+0x12>

00006304 <str_encode>:
}


static bool str_encode(zcbor_state_t *state,
		const struct zcbor_string *input, zcbor_major_type_t major_type)
{
    6304:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
	if (input->len > (state->payload_end - state->payload)) {
    6308:	f8d0 900c 	ldr.w	r9, [r0, #12]
    630c:	6805      	ldr	r5, [r0, #0]
    630e:	f8d1 a004 	ldr.w	sl, [r1, #4]
    6312:	eba9 0305 	sub.w	r3, r9, r5
    6316:	459a      	cmp	sl, r3
{
    6318:	4604      	mov	r4, r0
    631a:	460e      	mov	r6, r1
    631c:	4690      	mov	r8, r2
	if (input->len > (state->payload_end - state->payload)) {
    631e:	d906      	bls.n	632e <str_encode+0x2a>
    6320:	2208      	movs	r2, #8
    6322:	6963      	ldr	r3, [r4, #20]
    6324:	60da      	str	r2, [r3, #12]
		ZCBOR_ERR(ZCBOR_ERR_NO_PAYLOAD);
    6326:	2500      	movs	r5, #0
		 * because of bstrx_cbor_start_encode/bstrx_cbor_end_encode. */
		memmove(state->payload_mut, input->value, input->len);
	}
	state->payload += input->len;
	return true;
}
    6328:	4628      	mov	r0, r5
    632a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
	if (input->value && ((get_result_len(&input->len, sizeof(input->len))
    632e:	460f      	mov	r7, r1
    6330:	f857 3b04 	ldr.w	r3, [r7], #4
    6334:	b143      	cbz	r3, 6348 <str_encode+0x44>
    6336:	2104      	movs	r1, #4
    6338:	4638      	mov	r0, r7
    633a:	f7fc facd 	bl	28d8 <get_result_len>
			+ 1 + input->len + (size_t)state->payload)
    633e:	4455      	add	r5, sl
    6340:	3501      	adds	r5, #1
    6342:	4405      	add	r5, r0
	if (input->value && ((get_result_len(&input->len, sizeof(input->len))
    6344:	45a9      	cmp	r9, r5
    6346:	d3eb      	bcc.n	6320 <str_encode+0x1c>
	if (!value_encode(state, major_type, &input->len, sizeof(input->len))) {
    6348:	2304      	movs	r3, #4
    634a:	463a      	mov	r2, r7
    634c:	4641      	mov	r1, r8
    634e:	4620      	mov	r0, r4
    6350:	f7fc fadc 	bl	290c <value_encode>
    6354:	4605      	mov	r5, r0
    6356:	2800      	cmp	r0, #0
    6358:	d0e5      	beq.n	6326 <str_encode+0x22>
	if (state->payload_mut != input->value) {
    635a:	6820      	ldr	r0, [r4, #0]
    635c:	6831      	ldr	r1, [r6, #0]
    635e:	4288      	cmp	r0, r1
    6360:	d002      	beq.n	6368 <str_encode+0x64>
		memmove(state->payload_mut, input->value, input->len);
    6362:	6872      	ldr	r2, [r6, #4]
    6364:	f000 f901 	bl	656a <memmove>
	state->payload += input->len;
    6368:	6823      	ldr	r3, [r4, #0]
    636a:	6872      	ldr	r2, [r6, #4]
    636c:	4413      	add	r3, r2
    636e:	6023      	str	r3, [r4, #0]
	return true;
    6370:	e7da      	b.n	6328 <str_encode+0x24>

00006372 <zcbor_int64_put>:
{
    6372:	b507      	push	{r0, r1, r2, lr}
    6374:	e9cd 2300 	strd	r2, r3, [sp]
	if (input < 0) {
    6378:	2b00      	cmp	r3, #0
{
    637a:	4611      	mov	r1, r2
		input = -1 - input;
    637c:	bfbb      	ittet	lt
    637e:	43db      	mvnlt	r3, r3
    6380:	43d1      	mvnlt	r1, r2
		major_type = ZCBOR_MAJOR_TYPE_PINT;
    6382:	2100      	movge	r1, #0
		input = -1 - input;
    6384:	e9cd 1300 	strdlt	r1, r3, [sp]
	if (!value_encode(state, major_type, &input, 8)) {
    6388:	466a      	mov	r2, sp
		major_type = ZCBOR_MAJOR_TYPE_NINT;
    638a:	bfb8      	it	lt
    638c:	2101      	movlt	r1, #1
	if (!value_encode(state, major_type, &input, 8)) {
    638e:	2308      	movs	r3, #8
    6390:	f7fc fabc 	bl	290c <value_encode>
}
    6394:	b003      	add	sp, #12
    6396:	f85d fb04 	ldr.w	pc, [sp], #4

0000639a <zcbor_int32_put>:
{
    639a:	460a      	mov	r2, r1
	return zcbor_int64_put(state, input);
    639c:	17cb      	asrs	r3, r1, #31
    639e:	f7ff bfe8 	b.w	6372 <zcbor_int64_put>

000063a2 <zcbor_uint32_put>:
{
    63a2:	b507      	push	{r0, r1, r2, lr}
    63a4:	460b      	mov	r3, r1
	return zcbor_uint64_put(state, input);
    63a6:	2100      	movs	r1, #0
	if (!value_encode(state, major_type, input, 8)) {
    63a8:	466a      	mov	r2, sp
	return zcbor_uint64_put(state, input);
    63aa:	e9cd 3100 	strd	r3, r1, [sp]
	if (!value_encode(state, major_type, input, 8)) {
    63ae:	2308      	movs	r3, #8
    63b0:	f7fc faac 	bl	290c <value_encode>
}
    63b4:	b003      	add	sp, #12
    63b6:	f85d fb04 	ldr.w	pc, [sp], #4

000063ba <zcbor_tstr_encode>:
}


bool zcbor_tstr_encode(zcbor_state_t *state, const struct zcbor_string *input)
{
	return str_encode(state, input, ZCBOR_MAJOR_TYPE_TSTR);
    63ba:	2203      	movs	r2, #3
    63bc:	f7ff bfa2 	b.w	6304 <str_encode>

000063c0 <zcbor_list_start_encode>:
	ZCBOR_CHECK_PAYLOAD();
    63c0:	6803      	ldr	r3, [r0, #0]
    63c2:	68c2      	ldr	r2, [r0, #12]
    63c4:	4293      	cmp	r3, r2
    63c6:	d304      	bcc.n	63d2 <zcbor_list_start_encode+0x12>
    63c8:	2208      	movs	r2, #8
    63ca:	6943      	ldr	r3, [r0, #20]
    63cc:	2000      	movs	r0, #0
    63ce:	60da      	str	r2, [r3, #12]
    63d0:	4770      	bx	lr
	*(state->payload_mut++) = (uint8_t)((major_type << 5) | (additional & 0x1F));
    63d2:	1c5a      	adds	r2, r3, #1
    63d4:	6002      	str	r2, [r0, #0]
    63d6:	229f      	movs	r2, #159	; 0x9f
	return true;
    63d8:	2001      	movs	r0, #1
	*(state->payload_mut++) = (uint8_t)((major_type << 5) | (additional & 0x1F));
    63da:	701a      	strb	r2, [r3, #0]


bool zcbor_list_start_encode(zcbor_state_t *state, uint_fast32_t max_num)
{
	return list_map_start_encode(state, max_num, ZCBOR_MAJOR_TYPE_LIST);
}
    63dc:	4770      	bx	lr

000063de <zcbor_map_start_encode>:
	ZCBOR_CHECK_PAYLOAD();
    63de:	6803      	ldr	r3, [r0, #0]
    63e0:	68c2      	ldr	r2, [r0, #12]
    63e2:	4293      	cmp	r3, r2
    63e4:	d304      	bcc.n	63f0 <zcbor_map_start_encode+0x12>
    63e6:	2208      	movs	r2, #8
    63e8:	6943      	ldr	r3, [r0, #20]
    63ea:	2000      	movs	r0, #0
    63ec:	60da      	str	r2, [r3, #12]
    63ee:	4770      	bx	lr
	*(state->payload_mut++) = (uint8_t)((major_type << 5) | (additional & 0x1F));
    63f0:	1c5a      	adds	r2, r3, #1
    63f2:	6002      	str	r2, [r0, #0]
    63f4:	22bf      	movs	r2, #191	; 0xbf
	return true;
    63f6:	2001      	movs	r0, #1
	*(state->payload_mut++) = (uint8_t)((major_type << 5) | (additional & 0x1F));
    63f8:	701a      	strb	r2, [r3, #0]


bool zcbor_map_start_encode(zcbor_state_t *state, uint_fast32_t max_num)
{
	return list_map_start_encode(state, max_num, ZCBOR_MAJOR_TYPE_MAP);
}
    63fa:	4770      	bx	lr

000063fc <zcbor_list_end_encode>:
	ZCBOR_CHECK_PAYLOAD();
    63fc:	6803      	ldr	r3, [r0, #0]
    63fe:	68c2      	ldr	r2, [r0, #12]
    6400:	4293      	cmp	r3, r2
    6402:	d304      	bcc.n	640e <zcbor_list_end_encode+0x12>
    6404:	2208      	movs	r2, #8
    6406:	6943      	ldr	r3, [r0, #20]
    6408:	2000      	movs	r0, #0
    640a:	60da      	str	r2, [r3, #12]
    640c:	4770      	bx	lr
	*(state->payload_mut++) = (uint8_t)((major_type << 5) | (additional & 0x1F));
    640e:	1c5a      	adds	r2, r3, #1
    6410:	6002      	str	r2, [r0, #0]
    6412:	22ff      	movs	r2, #255	; 0xff
	return true;
    6414:	2001      	movs	r0, #1
	*(state->payload_mut++) = (uint8_t)((major_type << 5) | (additional & 0x1F));
    6416:	701a      	strb	r2, [r3, #0]


bool zcbor_list_end_encode(zcbor_state_t *state, uint_fast32_t max_num)
{
	return list_map_end_encode(state, max_num, ZCBOR_MAJOR_TYPE_LIST);
}
    6418:	4770      	bx	lr

0000641a <zcbor_map_end_encode>:


bool zcbor_map_end_encode(zcbor_state_t *state, uint_fast32_t max_num)
    641a:	f7ff bfef 	b.w	63fc <zcbor_list_end_encode>

0000641e <zcbor_new_encode_state>:


bool zcbor_new_encode_state(zcbor_state_t *state_array, uint_fast32_t n_states,
		uint8_t *payload, size_t payload_len, uint_fast32_t elem_count)
{
	return zcbor_new_state(state_array, n_states, payload, payload_len, elem_count);
    641e:	f000 b85c 	b.w	64da <zcbor_new_state>

00006422 <zcbor_new_backup>:

_Static_assert((sizeof(zcbor_state_t) >= sizeof(struct zcbor_state_constant)),
	"This code needs zcbor_state_t to be at least as large as zcbor_backups_t.");

bool zcbor_new_backup(zcbor_state_t *state, uint_fast32_t new_elem_count)
{
    6422:	b538      	push	{r3, r4, r5, lr}
	ZCBOR_CHECK_ERROR();

	if ((state->constant_state->current_backup)
    6424:	6943      	ldr	r3, [r0, #20]
{
    6426:	460d      	mov	r5, r1
	if ((state->constant_state->current_backup)
    6428:	e9d3 1201 	ldrd	r1, r2, [r3, #4]
    642c:	4291      	cmp	r1, r2
{
    642e:	4604      	mov	r4, r0
    6430:	f04f 0000 	mov.w	r0, #0
	if ((state->constant_state->current_backup)
    6434:	d302      	bcc.n	643c <zcbor_new_backup+0x1a>
    6436:	2201      	movs	r2, #1
    6438:	60da      	str	r2, [r3, #12]
		sizeof(zcbor_state_t));

	state->elem_count = new_elem_count;

	return true;
}
    643a:	bd38      	pop	{r3, r4, r5, pc}
	state->payload_moved = false;
    643c:	7460      	strb	r0, [r4, #17]
	(state->constant_state->current_backup)++;
    643e:	685a      	ldr	r2, [r3, #4]
	memcpy(&state->constant_state->backup_list[i], state,
    6440:	4621      	mov	r1, r4
	(state->constant_state->current_backup)++;
    6442:	3201      	adds	r2, #1
    6444:	605a      	str	r2, [r3, #4]
	memcpy(&state->constant_state->backup_list[i], state,
    6446:	2218      	movs	r2, #24
	uint_fast32_t i = (state->constant_state->current_backup) - 1;
    6448:	6963      	ldr	r3, [r4, #20]
    644a:	6858      	ldr	r0, [r3, #4]
	memcpy(&state->constant_state->backup_list[i], state,
    644c:	681b      	ldr	r3, [r3, #0]
	uint_fast32_t i = (state->constant_state->current_backup) - 1;
    644e:	3801      	subs	r0, #1
	memcpy(&state->constant_state->backup_list[i], state,
    6450:	fb02 3000 	mla	r0, r2, r0, r3
    6454:	f000 f8a0 	bl	6598 <memcpy>
	return true;
    6458:	2001      	movs	r0, #1
	state->elem_count = new_elem_count;
    645a:	60a5      	str	r5, [r4, #8]
	return true;
    645c:	e7ed      	b.n	643a <zcbor_new_backup+0x18>

0000645e <zcbor_process_backup>:


bool zcbor_process_backup(zcbor_state_t *state, uint32_t flags,
		uint_fast32_t max_elem_count)
{
    645e:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    6462:	4616      	mov	r6, r2
	const uint8_t *payload = state->payload;
	const uint_fast32_t elem_count = state->elem_count;

	ZCBOR_CHECK_ERROR();

	if (state->constant_state->current_backup == 0) {
    6464:	6942      	ldr	r2, [r0, #20]
{
    6466:	4604      	mov	r4, r0
	if (state->constant_state->current_backup == 0) {
    6468:	6853      	ldr	r3, [r2, #4]
{
    646a:	460d      	mov	r5, r1
	const uint8_t *payload = state->payload;
    646c:	6807      	ldr	r7, [r0, #0]
	const uint_fast32_t elem_count = state->elem_count;
    646e:	f8d0 8008 	ldr.w	r8, [r0, #8]
	if (state->constant_state->current_backup == 0) {
    6472:	b923      	cbnz	r3, 647e <zcbor_process_backup+0x20>
    6474:	2302      	movs	r3, #2
    6476:	60d3      	str	r3, [r2, #12]
		zcbor_print("No backups available.\r\n");
		ZCBOR_ERR(ZCBOR_ERR_NO_BACKUP_ACTIVE);
    6478:	2000      	movs	r0, #0
	if (flags & ZCBOR_FLAG_TRANSFER_PAYLOAD) {
		state->payload = payload;
	}

	return true;
}
    647a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
	if (flags & ZCBOR_FLAG_RESTORE) {
    647e:	07e9      	lsls	r1, r5, #31
    6480:	d50d      	bpl.n	649e <zcbor_process_backup+0x40>
			if (state->constant_state->backup_list[i].payload_moved) {
    6482:	6811      	ldr	r1, [r2, #0]
    6484:	2218      	movs	r2, #24
		uint_fast32_t i = state->constant_state->current_backup - 1;
    6486:	3b01      	subs	r3, #1
		if (!(flags & ZCBOR_FLAG_TRANSFER_PAYLOAD)) {
    6488:	0768      	lsls	r0, r5, #29
			if (state->constant_state->backup_list[i].payload_moved) {
    648a:	fb02 1103 	mla	r1, r2, r3, r1
		if (!(flags & ZCBOR_FLAG_TRANSFER_PAYLOAD)) {
    648e:	d402      	bmi.n	6496 <zcbor_process_backup+0x38>
			if (state->constant_state->backup_list[i].payload_moved) {
    6490:	7c4b      	ldrb	r3, [r1, #17]
    6492:	2b00      	cmp	r3, #0
    6494:	d1f0      	bne.n	6478 <zcbor_process_backup+0x1a>
		memcpy(state, &state->constant_state->backup_list[i],
    6496:	2218      	movs	r2, #24
    6498:	4620      	mov	r0, r4
    649a:	f000 f87d 	bl	6598 <memcpy>
	if (flags & ZCBOR_FLAG_CONSUME) {
    649e:	07aa      	lsls	r2, r5, #30
		state->constant_state->current_backup--;
    64a0:	bf41      	itttt	mi
    64a2:	6962      	ldrmi	r2, [r4, #20]
    64a4:	6853      	ldrmi	r3, [r2, #4]
    64a6:	f103 33ff 	addmi.w	r3, r3, #4294967295
    64aa:	6053      	strmi	r3, [r2, #4]
	if (elem_count > max_elem_count) {
    64ac:	45b0      	cmp	r8, r6
    64ae:	d903      	bls.n	64b8 <zcbor_process_backup+0x5a>
    64b0:	2204      	movs	r2, #4
    64b2:	6963      	ldr	r3, [r4, #20]
    64b4:	60da      	str	r2, [r3, #12]
		ZCBOR_ERR(ZCBOR_ERR_HIGH_ELEM_COUNT);
    64b6:	e7df      	b.n	6478 <zcbor_process_backup+0x1a>
	if (flags & ZCBOR_FLAG_TRANSFER_PAYLOAD) {
    64b8:	076b      	lsls	r3, r5, #29
    64ba:	d401      	bmi.n	64c0 <zcbor_process_backup+0x62>
	return true;
    64bc:	2001      	movs	r0, #1
    64be:	e7dc      	b.n	647a <zcbor_process_backup+0x1c>
		state->payload = payload;
    64c0:	6027      	str	r7, [r4, #0]
    64c2:	e7fb      	b.n	64bc <zcbor_process_backup+0x5e>

000064c4 <zcbor_union_start_code>:
}


bool zcbor_union_start_code(zcbor_state_t *state)
{
	if (!zcbor_new_backup(state, state->elem_count)) {
    64c4:	6881      	ldr	r1, [r0, #8]
    64c6:	f7ff bfac 	b.w	6422 <zcbor_new_backup>

000064ca <zcbor_union_elem_code>:
}


bool zcbor_union_elem_code(zcbor_state_t *state)
{
	if (!zcbor_process_backup(state, ZCBOR_FLAG_RESTORE, state->elem_count)) {
    64ca:	2101      	movs	r1, #1
    64cc:	6882      	ldr	r2, [r0, #8]
    64ce:	f7ff bfc6 	b.w	645e <zcbor_process_backup>

000064d2 <zcbor_union_end_code>:
	return true;
}

bool zcbor_union_end_code(zcbor_state_t *state)
{
	if (!zcbor_process_backup(state, ZCBOR_FLAG_CONSUME, state->elem_count)) {
    64d2:	2102      	movs	r1, #2
    64d4:	6882      	ldr	r2, [r0, #8]
    64d6:	f7ff bfc2 	b.w	645e <zcbor_process_backup>

000064da <zcbor_new_state>:
	return true;
}

bool zcbor_new_state(zcbor_state_t *state_array, uint_fast32_t n_states,
		const uint8_t *payload, size_t payload_len, uint_fast32_t elem_count)
{
    64da:	b510      	push	{r4, lr}
	state_array[0].payload = payload;
    64dc:	6002      	str	r2, [r0, #0]
	state_array[0].payload_end = payload + payload_len;
    64de:	441a      	add	r2, r3
	state_array[0].elem_count = elem_count;
    64e0:	9b02      	ldr	r3, [sp, #8]
{
    64e2:	4604      	mov	r4, r0
	state_array[0].payload_end = payload + payload_len;
    64e4:	60c2      	str	r2, [r0, #12]
	state_array[0].elem_count = elem_count;
    64e6:	6083      	str	r3, [r0, #8]
	state_array[0].indefinite_length_array = false;
    64e8:	2000      	movs	r0, #0
	state_array[0].payload_moved = false;
	state_array[0].constant_state = NULL;

	if(n_states < 2) {
    64ea:	2901      	cmp	r1, #1
	state_array[0].indefinite_length_array = false;
    64ec:	8220      	strh	r0, [r4, #16]
	if(n_states < 2) {
    64ee:	d801      	bhi.n	64f4 <zcbor_new_state+0x1a>
	state_array[0].constant_state = NULL;
    64f0:	6160      	str	r0, [r4, #20]
#endif
	if (n_states > 2) {
		state_array[0].constant_state->backup_list = &state_array[1];
	}
	return true;
}
    64f2:	bd10      	pop	{r4, pc}
	state_array[0].constant_state = (struct zcbor_state_constant *)&state_array[n_states - 1];
    64f4:	2318      	movs	r3, #24
    64f6:	434b      	muls	r3, r1
    64f8:	3b18      	subs	r3, #24
    64fa:	18e2      	adds	r2, r4, r3
    64fc:	6162      	str	r2, [r4, #20]
	state_array[0].constant_state->backup_list = NULL;
    64fe:	50e0      	str	r0, [r4, r3]
	state_array[0].constant_state->num_backups = n_states - 2;
    6500:	6963      	ldr	r3, [r4, #20]
    6502:	1e8a      	subs	r2, r1, #2
    6504:	609a      	str	r2, [r3, #8]
	state_array[0].constant_state->current_backup = 0;
    6506:	6963      	ldr	r3, [r4, #20]
	if (n_states > 2) {
    6508:	2902      	cmp	r1, #2
	state_array[0].constant_state->current_backup = 0;
    650a:	6058      	str	r0, [r3, #4]
	state_array[0].constant_state->error = ZCBOR_SUCCESS;
    650c:	6963      	ldr	r3, [r4, #20]
    650e:	60d8      	str	r0, [r3, #12]
	if (n_states > 2) {
    6510:	d101      	bne.n	6516 <zcbor_new_state+0x3c>
	return true;
    6512:	2001      	movs	r0, #1
    6514:	e7ed      	b.n	64f2 <zcbor_new_state+0x18>
		state_array[0].constant_state->backup_list = &state_array[1];
    6516:	6963      	ldr	r3, [r4, #20]
    6518:	3418      	adds	r4, #24
    651a:	601c      	str	r4, [r3, #0]
    651c:	e7f9      	b.n	6512 <zcbor_new_state+0x38>

0000651e <z_do_kernel_oops>:
 *
 * @param esf exception frame
 * @param callee_regs Callee-saved registers (R4-R11)
 */
void z_do_kernel_oops(const z_arch_esf_t *esf, _callee_saved_t *callee_regs)
{
    651e:	4601      	mov	r1, r0
	}

#endif /* CONFIG_USERSPACE */

#if !defined(CONFIG_EXTRA_EXCEPTION_INFO)
	z_arm_fatal_error(reason, esf);
    6520:	6800      	ldr	r0, [r0, #0]
    6522:	f7fc ba59 	b.w	29d8 <z_arm_fatal_error>

00006526 <z_irq_spurious>:
 */
void z_irq_spurious(const void *unused)
{
	ARG_UNUSED(unused);

	z_arm_fatal_error(K_ERR_SPURIOUS_IRQ, NULL);
    6526:	2100      	movs	r1, #0
    6528:	2001      	movs	r0, #1
    652a:	f7fc ba55 	b.w	29d8 <z_arm_fatal_error>

0000652e <z_arm_nmi>:
 * Simply call what is installed in 'static void(*handler)(void)'.
 *
 */

void z_arm_nmi(void)
{
    652e:	b508      	push	{r3, lr}
	handler();
    6530:	f7fc fab2 	bl	2a98 <z_SysNmiOnReset>
	z_arm_int_exit();
}
    6534:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
	z_arm_int_exit();
    6538:	f7fc bb10 	b.w	2b5c <z_arm_exc_exit>

0000653c <strlen>:
 *
 * @return number of bytes in string <s>
 */

size_t strlen(const char *s)
{
    653c:	4603      	mov	r3, r0
	size_t n = 0;
    653e:	2000      	movs	r0, #0

	while (*s != '\0') {
    6540:	5c1a      	ldrb	r2, [r3, r0]
    6542:	b902      	cbnz	r2, 6546 <strlen+0xa>
		s++;
		n++;
	}

	return n;
}
    6544:	4770      	bx	lr
		n++;
    6546:	3001      	adds	r0, #1
    6548:	e7fa      	b.n	6540 <strlen+0x4>

0000654a <memcmp>:
 * @brief Compare two memory areas
 *
 * @return negative # if <m1> < <m2>, 0 if <m1> == <m2>, else positive #
 */
int memcmp(const void *m1, const void *m2, size_t n)
{
    654a:	b510      	push	{r4, lr}
	const char *c1 = m1;
	const char *c2 = m2;

	if (!n) {
    654c:	b15a      	cbz	r2, 6566 <memcmp+0x1c>
    654e:	3901      	subs	r1, #1
    6550:	1884      	adds	r4, r0, r2
		return 0;
	}

	while ((--n > 0) && (*c1 == *c2)) {
    6552:	f810 2b01 	ldrb.w	r2, [r0], #1
    6556:	f811 3f01 	ldrb.w	r3, [r1, #1]!
    655a:	42a0      	cmp	r0, r4
    655c:	d001      	beq.n	6562 <memcmp+0x18>
    655e:	429a      	cmp	r2, r3
    6560:	d0f7      	beq.n	6552 <memcmp+0x8>
		c1++;
		c2++;
	}

	return *c1 - *c2;
    6562:	1ad0      	subs	r0, r2, r3
}
    6564:	bd10      	pop	{r4, pc}
		return 0;
    6566:	4610      	mov	r0, r2
    6568:	e7fc      	b.n	6564 <memcmp+0x1a>

0000656a <memmove>:
void *memmove(void *d, const void *s, size_t n)
{
	char *dest = d;
	const char *src  = s;

	if ((size_t) (dest - src) < n) {
    656a:	1a43      	subs	r3, r0, r1
    656c:	4293      	cmp	r3, r2
{
    656e:	b510      	push	{r4, lr}
    6570:	eb00 0302 	add.w	r3, r0, r2
	if ((size_t) (dest - src) < n) {
    6574:	d308      	bcc.n	6588 <memmove+0x1e>
	char *dest = d;
    6576:	4602      	mov	r2, r0
    6578:	3901      	subs	r1, #1
			n--;
			dest[n] = src[n];
		}
	} else {
		/* It is safe to perform a forward-copy */
		while (n > 0) {
    657a:	429a      	cmp	r2, r3
    657c:	d00b      	beq.n	6596 <memmove+0x2c>
			*dest = *src;
    657e:	f811 4f01 	ldrb.w	r4, [r1, #1]!
    6582:	f802 4b01 	strb.w	r4, [r2], #1
			dest++;
			src++;
			n--;
    6586:	e7f8      	b.n	657a <memmove+0x10>
    6588:	440a      	add	r2, r1
			dest[n] = src[n];
    658a:	f812 4d01 	ldrb.w	r4, [r2, #-1]!
		while (n > 0) {
    658e:	428a      	cmp	r2, r1
			dest[n] = src[n];
    6590:	f803 4d01 	strb.w	r4, [r3, #-1]!
		while (n > 0) {
    6594:	d1f9      	bne.n	658a <memmove+0x20>
		}
	}

	return d;
}
    6596:	bd10      	pop	{r4, pc}

00006598 <memcpy>:
 *
 * @return pointer to start of destination buffer
 */

void *memcpy(void *ZRESTRICT d, const void *ZRESTRICT s, size_t n)
{
    6598:	b510      	push	{r4, lr}
    659a:	1e43      	subs	r3, r0, #1
    659c:	440a      	add	r2, r1
	}
#endif

	/* do byte-sized copying until finished */

	while (n > 0) {
    659e:	4291      	cmp	r1, r2
    65a0:	d100      	bne.n	65a4 <memcpy+0xc>
		*(d_byte++) = *(s_byte++);
		n--;
	}

	return d;
}
    65a2:	bd10      	pop	{r4, pc}
		*(d_byte++) = *(s_byte++);
    65a4:	f811 4b01 	ldrb.w	r4, [r1], #1
    65a8:	f803 4f01 	strb.w	r4, [r3, #1]!
		n--;
    65ac:	e7f7      	b.n	659e <memcpy+0x6>

000065ae <memset>:

void *memset(void *buf, int c, size_t n)
{
	/* do byte-sized initialization until word-aligned or finished */

	unsigned char *d_byte = (unsigned char *)buf;
    65ae:	4603      	mov	r3, r0
	unsigned char c_byte = (unsigned char)c;
    65b0:	b2c9      	uxtb	r1, r1
	/* do byte-sized initialization until finished */

	d_byte = (unsigned char *)d_word;
#endif

	while (n > 0) {
    65b2:	4402      	add	r2, r0
    65b4:	4293      	cmp	r3, r2
    65b6:	d100      	bne.n	65ba <memset+0xc>
		*(d_byte++) = c_byte;
		n--;
	}

	return buf;
}
    65b8:	4770      	bx	lr
		*(d_byte++) = c_byte;
    65ba:	f803 1b01 	strb.w	r1, [r3], #1
		n--;
    65be:	e7f9      	b.n	65b4 <memset+0x6>

000065c0 <sprintf_out>:
	if (p->len > 1) { /* need to reserve a byte for EOS */
    65c0:	684b      	ldr	r3, [r1, #4]
    65c2:	2b01      	cmp	r3, #1
    65c4:	dd07      	ble.n	65d6 <sprintf_out+0x16>
		*(p->ptr) = c;
    65c6:	680b      	ldr	r3, [r1, #0]
    65c8:	7018      	strb	r0, [r3, #0]
		p->ptr += 1;
    65ca:	680b      	ldr	r3, [r1, #0]
    65cc:	3301      	adds	r3, #1
    65ce:	600b      	str	r3, [r1, #0]
		p->len -= 1;
    65d0:	684b      	ldr	r3, [r1, #4]
    65d2:	3b01      	subs	r3, #1
    65d4:	604b      	str	r3, [r1, #4]
}
    65d6:	2000      	movs	r0, #0
    65d8:	4770      	bx	lr

000065da <get_status>:
	return GET_STATUS(get_sub_data(dev, type)->flags);
    65da:	220c      	movs	r2, #12
    65dc:	6903      	ldr	r3, [r0, #16]
    65de:	b2c9      	uxtb	r1, r1
    65e0:	fb01 3302 	mla	r3, r1, r2, r3
    65e4:	6c18      	ldr	r0, [r3, #64]	; 0x40
}
    65e6:	f000 0007 	and.w	r0, r0, #7
    65ea:	4770      	bx	lr

000065ec <set_on_state>:
	__asm__ volatile(
    65ec:	f04f 0320 	mov.w	r3, #32
    65f0:	f3ef 8211 	mrs	r2, BASEPRI
    65f4:	f383 8812 	msr	BASEPRI_MAX, r3
    65f8:	f3bf 8f6f 	isb	sy
	*flags = CLOCK_CONTROL_STATUS_ON | GET_CTX(*flags);
    65fc:	6803      	ldr	r3, [r0, #0]
    65fe:	f003 03c0 	and.w	r3, r3, #192	; 0xc0
    6602:	f043 0302 	orr.w	r3, r3, #2
    6606:	6003      	str	r3, [r0, #0]
	__asm__ volatile(
    6608:	f382 8811 	msr	BASEPRI, r2
    660c:	f3bf 8f6f 	isb	sy
}
    6610:	4770      	bx	lr

00006612 <stop>:
{
    6612:	b570      	push	{r4, r5, r6, lr}
    6614:	b2c9      	uxtb	r1, r1
	struct nrf_clock_control_data *data = dev->data;
    6616:	6903      	ldr	r3, [r0, #16]
	__asm__ volatile(
    6618:	f04f 0420 	mov.w	r4, #32
    661c:	f3ef 8511 	mrs	r5, BASEPRI
    6620:	f384 8812 	msr	BASEPRI_MAX, r4
    6624:	f3bf 8f6f 	isb	sy
	uint32_t current_ctx = GET_CTX(*flags);
    6628:	260c      	movs	r6, #12
    662a:	fb06 3401 	mla	r4, r6, r1, r3
    662e:	6c24      	ldr	r4, [r4, #64]	; 0x40
	if ((current_ctx != 0) && (current_ctx != ctx)) {
    6630:	f014 04c0 	ands.w	r4, r4, #192	; 0xc0
    6634:	d008      	beq.n	6648 <stop+0x36>
    6636:	42a2      	cmp	r2, r4
    6638:	d006      	beq.n	6648 <stop+0x36>
	__asm__ volatile(
    663a:	f385 8811 	msr	BASEPRI, r5
    663e:	f3bf 8f6f 	isb	sy
		err = -EPERM;
    6642:	f04f 30ff 	mov.w	r0, #4294967295
}
    6646:	bd70      	pop	{r4, r5, r6, pc}
		*flags = CLOCK_CONTROL_STATUS_OFF;
    6648:	2201      	movs	r2, #1
    664a:	4371      	muls	r1, r6
    664c:	440b      	add	r3, r1
    664e:	641a      	str	r2, [r3, #64]	; 0x40
    6650:	f385 8811 	msr	BASEPRI, r5
    6654:	f3bf 8f6f 	isb	sy
	get_sub_config(dev, type)->stop();
    6658:	6843      	ldr	r3, [r0, #4]
    665a:	440b      	add	r3, r1
    665c:	685b      	ldr	r3, [r3, #4]
    665e:	4798      	blx	r3
	return 0;
    6660:	2000      	movs	r0, #0
    6662:	e7f0      	b.n	6646 <stop+0x34>

00006664 <api_stop>:
	return stop(dev, subsys, CTX_API);
    6664:	2280      	movs	r2, #128	; 0x80
    6666:	f7ff bfd4 	b.w	6612 <stop>

0000666a <async_start>:
{
    666a:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    666c:	9f06      	ldr	r7, [sp, #24]
	struct nrf_clock_control_data *data = dev->data;
    666e:	6904      	ldr	r4, [r0, #16]
	return &data->subsys[type];
    6670:	b2c9      	uxtb	r1, r1
	__asm__ volatile(
    6672:	f04f 0520 	mov.w	r5, #32
    6676:	f3ef 8611 	mrs	r6, BASEPRI
    667a:	f385 8812 	msr	BASEPRI_MAX, r5
    667e:	f3bf 8f6f 	isb	sy
	uint32_t current_ctx = GET_CTX(*flags);
    6682:	250c      	movs	r5, #12
    6684:	4369      	muls	r1, r5
    6686:	440c      	add	r4, r1
    6688:	6c25      	ldr	r5, [r4, #64]	; 0x40
	if ((*flags & (STATUS_MASK)) == CLOCK_CONTROL_STATUS_OFF) {
    668a:	f005 0c07 	and.w	ip, r5, #7
    668e:	f1bc 0f01 	cmp.w	ip, #1
    6692:	d10b      	bne.n	66ac <async_start+0x42>
		*flags = CLOCK_CONTROL_STATUS_STARTING | ctx;
    6694:	6427      	str	r7, [r4, #64]	; 0x40
	__asm__ volatile(
    6696:	f386 8811 	msr	BASEPRI, r6
    669a:	f3bf 8f6f 	isb	sy
	subdata->user_data = user_data;
    669e:	e9c4 230e 	strd	r2, r3, [r4, #56]	; 0x38
	 get_sub_config(dev, type)->start();
    66a2:	6843      	ldr	r3, [r0, #4]
    66a4:	585b      	ldr	r3, [r3, r1]
    66a6:	4798      	blx	r3
	return 0;
    66a8:	2000      	movs	r0, #0
}
    66aa:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	uint32_t current_ctx = GET_CTX(*flags);
    66ac:	f005 05c0 	and.w	r5, r5, #192	; 0xc0
	} else if (current_ctx != ctx) {
    66b0:	42af      	cmp	r7, r5
    66b2:	f386 8811 	msr	BASEPRI, r6
    66b6:	f3bf 8f6f 	isb	sy
		err = -EALREADY;
    66ba:	bf0c      	ite	eq
    66bc:	f06f 0077 	mvneq.w	r0, #119	; 0x77
		err = -EPERM;
    66c0:	f04f 30ff 	movne.w	r0, #4294967295
    66c4:	e7f1      	b.n	66aa <async_start+0x40>

000066c6 <api_start>:
{
    66c6:	b513      	push	{r0, r1, r4, lr}
	return async_start(dev, subsys, cb, user_data, CTX_API);
    66c8:	2480      	movs	r4, #128	; 0x80
    66ca:	9400      	str	r4, [sp, #0]
    66cc:	f7ff ffcd 	bl	666a <async_start>
}
    66d0:	b002      	add	sp, #8
    66d2:	bd10      	pop	{r4, pc}

000066d4 <api_blocking_start>:
}
    66d4:	f06f 0085 	mvn.w	r0, #133	; 0x85
    66d8:	4770      	bx	lr

000066da <onoff_started_callback>:
{
    66da:	b410      	push	{r4}
	notify(mgr, 0);
    66dc:	241c      	movs	r4, #28
	return &data->mgr[type];
    66de:	6900      	ldr	r0, [r0, #16]
    66e0:	b2cb      	uxtb	r3, r1
	notify(mgr, 0);
    66e2:	fb03 0004 	mla	r0, r3, r4, r0
    66e6:	2100      	movs	r1, #0
}
    66e8:	bc10      	pop	{r4}
	notify(mgr, 0);
    66ea:	4710      	bx	r2

000066ec <lfclk_start>:
    nrfx_clock_start(NRF_CLOCK_DOMAIN_LFCLK);
    66ec:	2000      	movs	r0, #0
    66ee:	f001 bf5a 	b.w	85a6 <nrfx_clock_start>

000066f2 <lfclk_stop>:
    nrfx_clock_stop(NRF_CLOCK_DOMAIN_LFCLK);
    66f2:	2000      	movs	r0, #0
    66f4:	f001 bf97 	b.w	8626 <nrfx_clock_stop>

000066f8 <gpio_nrfx_port_get_raw>:
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    66f8:	6843      	ldr	r3, [r0, #4]
}
    66fa:	2000      	movs	r0, #0
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    66fc:	685b      	ldr	r3, [r3, #4]
    return p_reg->IN;
    66fe:	691b      	ldr	r3, [r3, #16]
	*value = nrf_gpio_port_in_read(reg);
    6700:	600b      	str	r3, [r1, #0]
}
    6702:	4770      	bx	lr

00006704 <gpio_nrfx_port_set_masked_raw>:
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    6704:	6843      	ldr	r3, [r0, #4]
	const uint32_t set_mask = value & mask;
    6706:	ea02 0001 	and.w	r0, r2, r1
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    670a:	685b      	ldr	r3, [r3, #4]
	const uint32_t clear_mask = (~set_mask) & mask;
    670c:	ea21 0102 	bic.w	r1, r1, r2
    p_reg->OUTSET = set_mask;
    6710:	6098      	str	r0, [r3, #8]
}
    6712:	2000      	movs	r0, #0
    p_reg->OUTCLR = clr_mask;
    6714:	60d9      	str	r1, [r3, #12]
    6716:	4770      	bx	lr

00006718 <gpio_nrfx_port_set_bits_raw>:
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    6718:	6843      	ldr	r3, [r0, #4]
}
    671a:	2000      	movs	r0, #0
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    671c:	685b      	ldr	r3, [r3, #4]
    p_reg->OUTSET = set_mask;
    671e:	6099      	str	r1, [r3, #8]
}
    6720:	4770      	bx	lr

00006722 <gpio_nrfx_port_clear_bits_raw>:
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    6722:	6843      	ldr	r3, [r0, #4]
}
    6724:	2000      	movs	r0, #0
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    6726:	685b      	ldr	r3, [r3, #4]
    p_reg->OUTCLR = clr_mask;
    6728:	60d9      	str	r1, [r3, #12]
}
    672a:	4770      	bx	lr

0000672c <gpio_nrfx_port_toggle_bits>:
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    672c:	6843      	ldr	r3, [r0, #4]
    672e:	685a      	ldr	r2, [r3, #4]
    return p_reg->OUT;
    6730:	6853      	ldr	r3, [r2, #4]
	const uint32_t set_mask = value & mask;
    6732:	ea21 0003 	bic.w	r0, r1, r3
	const uint32_t clear_mask = (~value) & mask;
    6736:	400b      	ands	r3, r1
    p_reg->OUTSET = set_mask;
    6738:	6090      	str	r0, [r2, #8]
}
    673a:	2000      	movs	r0, #0
    p_reg->OUTCLR = clr_mask;
    673c:	60d3      	str	r3, [r2, #12]
    673e:	4770      	bx	lr

00006740 <gpio_nrfx_manage_callback>:
{
    6740:	b510      	push	{r4, lr}
	return port->data;
    6742:	6903      	ldr	r3, [r0, #16]
	return list->head;
    6744:	6858      	ldr	r0, [r3, #4]
	if (!sys_slist_is_empty(callbacks)) {
    6746:	b1f8      	cbz	r0, 6788 <gpio_nrfx_manage_callback+0x48>
 */
static inline bool sys_slist_find_and_remove(sys_slist_t *list,
					     sys_snode_t *node);

/** @} */
Z_GENLIST_FIND_AND_REMOVE(slist, snode)
    6748:	4288      	cmp	r0, r1
    674a:	d119      	bne.n	6780 <gpio_nrfx_manage_callback+0x40>
Z_GENLIST_REMOVE(slist, snode)
    674c:	689c      	ldr	r4, [r3, #8]
	return node->next;
    674e:	6808      	ldr	r0, [r1, #0]
Z_GENLIST_REMOVE(slist, snode)
    6750:	42a1      	cmp	r1, r4
	list->head = node;
    6752:	6058      	str	r0, [r3, #4]
Z_GENLIST_REMOVE(slist, snode)
    6754:	d100      	bne.n	6758 <gpio_nrfx_manage_callback+0x18>
	list->tail = node;
    6756:	6098      	str	r0, [r3, #8]
	parent->next = child;
    6758:	2000      	movs	r0, #0
    675a:	6008      	str	r0, [r1, #0]
	if (set) {
    675c:	b12a      	cbz	r2, 676a <gpio_nrfx_manage_callback+0x2a>
	return list->head;
    675e:	685a      	ldr	r2, [r3, #4]
	parent->next = child;
    6760:	600a      	str	r2, [r1, #0]
Z_GENLIST_PREPEND(slist, snode)
    6762:	689a      	ldr	r2, [r3, #8]
	list->head = node;
    6764:	6059      	str	r1, [r3, #4]
Z_GENLIST_PREPEND(slist, snode)
    6766:	b902      	cbnz	r2, 676a <gpio_nrfx_manage_callback+0x2a>
	list->tail = node;
    6768:	6099      	str	r1, [r3, #8]
	return 0;
    676a:	2000      	movs	r0, #0
	return gpio_manage_callback(&get_port_data(port)->callbacks,
    676c:	e010      	b.n	6790 <gpio_nrfx_manage_callback+0x50>
Z_GENLIST_FIND_AND_REMOVE(slist, snode)
    676e:	4281      	cmp	r1, r0
    6770:	d106      	bne.n	6780 <gpio_nrfx_manage_callback+0x40>
	return node->next;
    6772:	6808      	ldr	r0, [r1, #0]
	parent->next = child;
    6774:	6020      	str	r0, [r4, #0]
Z_GENLIST_REMOVE(slist, snode)
    6776:	6898      	ldr	r0, [r3, #8]
    6778:	4281      	cmp	r1, r0
    677a:	d1ed      	bne.n	6758 <gpio_nrfx_manage_callback+0x18>
	list->tail = node;
    677c:	609c      	str	r4, [r3, #8]
}
    677e:	e7eb      	b.n	6758 <gpio_nrfx_manage_callback+0x18>
	return node->next;
    6780:	4604      	mov	r4, r0
    6782:	6800      	ldr	r0, [r0, #0]
Z_GENLIST_FIND_AND_REMOVE(slist, snode)
    6784:	2800      	cmp	r0, #0
    6786:	d1f2      	bne.n	676e <gpio_nrfx_manage_callback+0x2e>
			if (!set) {
    6788:	2a00      	cmp	r2, #0
    678a:	d1e8      	bne.n	675e <gpio_nrfx_manage_callback+0x1e>
				return -EINVAL;
    678c:	f06f 0015 	mvn.w	r0, #21
}
    6790:	bd10      	pop	{r4, pc}

00006792 <is_regular_addr_valid>:
{
    6792:	b538      	push	{r3, r4, r5, lr}
    6794:	4605      	mov	r5, r0
    6796:	460c      	mov	r4, r1
	return is_within_bounds(addr, len, 0, nrfx_nvmc_flash_size_get());
    6798:	f001 ff47 	bl	862a <nrfx_nvmc_flash_size_get>
			(addr < (boundary_start + boundary_size)) &&
    679c:	2d00      	cmp	r5, #0
    679e:	db07      	blt.n	67b0 <is_regular_addr_valid+0x1e>
	return (addr >= boundary_start &&
    67a0:	42a8      	cmp	r0, r5
    67a2:	d905      	bls.n	67b0 <is_regular_addr_valid+0x1e>
			(len <= (boundary_start + boundary_size - addr)));
    67a4:	1b40      	subs	r0, r0, r5
			(addr < (boundary_start + boundary_size)) &&
    67a6:	4284      	cmp	r4, r0
    67a8:	bf8c      	ite	hi
    67aa:	2000      	movhi	r0, #0
    67ac:	2001      	movls	r0, #1
}
    67ae:	bd38      	pop	{r3, r4, r5, pc}
			(addr < (boundary_start + boundary_size)) &&
    67b0:	2000      	movs	r0, #0
    67b2:	e7fc      	b.n	67ae <is_regular_addr_valid+0x1c>

000067b4 <flash_get_page_info>:

#include <zephyr/drivers/flash.h>

static int flash_get_page_info(const struct device *dev, off_t offs,
			       uint32_t index, struct flash_pages_info *info)
{
    67b4:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    67b6:	461c      	mov	r4, r3
	const struct flash_driver_api *api = dev->api;
	const struct flash_pages_layout *layout;
	size_t layout_size;
	uint32_t index_jmp;

	info->start_offset = 0;
    67b8:	2300      	movs	r3, #0
{
    67ba:	4616      	mov	r6, r2
	const struct flash_driver_api *api = dev->api;
    67bc:	6882      	ldr	r2, [r0, #8]
	info->start_offset = 0;
    67be:	6023      	str	r3, [r4, #0]
	info->index = 0U;
    67c0:	60a3      	str	r3, [r4, #8]
{
    67c2:	460d      	mov	r5, r1

	api->page_layout(dev, &layout, &layout_size);
    67c4:	6913      	ldr	r3, [r2, #16]
    67c6:	4669      	mov	r1, sp
    67c8:	aa01      	add	r2, sp, #4
    67ca:	4798      	blx	r3

	while (layout_size--) {
    67cc:	9b01      	ldr	r3, [sp, #4]
    67ce:	1e5a      	subs	r2, r3, #1
    67d0:	9201      	str	r2, [sp, #4]
    67d2:	b91b      	cbnz	r3, 67dc <flash_get_page_info+0x28>
		}

		layout++;
	}

	return -EINVAL; /* page at offs or idx doesn't exist */
    67d4:	f06f 0015 	mvn.w	r0, #21
}
    67d8:	b003      	add	sp, #12
    67da:	bdf0      	pop	{r4, r5, r6, r7, pc}
		info->size = layout->pages_size;
    67dc:	9800      	ldr	r0, [sp, #0]
			index_jmp = index - info->index;
    67de:	68a2      	ldr	r2, [r4, #8]
		info->size = layout->pages_size;
    67e0:	6847      	ldr	r7, [r0, #4]
			index_jmp = (offs - info->start_offset) / info->size;
    67e2:	6821      	ldr	r1, [r4, #0]
		info->size = layout->pages_size;
    67e4:	6067      	str	r7, [r4, #4]
		if (offs == 0) {
    67e6:	b985      	cbnz	r5, 680a <flash_get_page_info+0x56>
			index_jmp = index - info->index;
    67e8:	1ab3      	subs	r3, r6, r2
		index_jmp = MIN(index_jmp, layout->pages_count);
    67ea:	f8d0 c000 	ldr.w	ip, [r0]
    67ee:	4563      	cmp	r3, ip
    67f0:	bf28      	it	cs
    67f2:	4663      	movcs	r3, ip
		info->start_offset += (index_jmp * info->size);
    67f4:	fb03 1107 	mla	r1, r3, r7, r1
		info->index += index_jmp;
    67f8:	441a      	add	r2, r3
		info->start_offset += (index_jmp * info->size);
    67fa:	6021      	str	r1, [r4, #0]
		info->index += index_jmp;
    67fc:	60a2      	str	r2, [r4, #8]
		if (index_jmp < layout->pages_count) {
    67fe:	6802      	ldr	r2, [r0, #0]
    6800:	429a      	cmp	r2, r3
    6802:	d806      	bhi.n	6812 <flash_get_page_info+0x5e>
		layout++;
    6804:	3008      	adds	r0, #8
    6806:	9000      	str	r0, [sp, #0]
    6808:	e7e0      	b.n	67cc <flash_get_page_info+0x18>
			index_jmp = (offs - info->start_offset) / info->size;
    680a:	1a6b      	subs	r3, r5, r1
    680c:	fbb3 f3f7 	udiv	r3, r3, r7
    6810:	e7eb      	b.n	67ea <flash_get_page_info+0x36>
			return 0;
    6812:	2000      	movs	r0, #0
    6814:	e7e0      	b.n	67d8 <flash_get_page_info+0x24>

00006816 <z_impl_flash_get_page_info_by_offs>:

int z_impl_flash_get_page_info_by_offs(const struct device *dev, off_t offs,
				       struct flash_pages_info *info)
{
    6816:	4613      	mov	r3, r2
	return flash_get_page_info(dev, offs, 0U, info);
    6818:	2200      	movs	r2, #0
    681a:	f7ff bfcb 	b.w	67b4 <flash_get_page_info>

0000681e <flash_page_foreach>:
	return count;
}

void flash_page_foreach(const struct device *dev, flash_page_cb cb,
			void *data)
{
    681e:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
	const struct flash_driver_api *api = dev->api;
	const struct flash_pages_layout *layout;
	struct flash_pages_info page_info;
	size_t block, num_blocks, page = 0, i;
	off_t off = 0;
    6822:	2400      	movs	r4, #0

	api->page_layout(dev, &layout, &num_blocks);
    6824:	6883      	ldr	r3, [r0, #8]
{
    6826:	b086      	sub	sp, #24
    6828:	4688      	mov	r8, r1
    682a:	4691      	mov	r9, r2
	api->page_layout(dev, &layout, &num_blocks);
    682c:	691b      	ldr	r3, [r3, #16]
    682e:	aa02      	add	r2, sp, #8
    6830:	a901      	add	r1, sp, #4
    6832:	4798      	blx	r3
	size_t block, num_blocks, page = 0, i;
    6834:	46a2      	mov	sl, r4

	for (block = 0; block < num_blocks; block++) {
    6836:	4625      	mov	r5, r4
    6838:	9b02      	ldr	r3, [sp, #8]
    683a:	42ab      	cmp	r3, r5
    683c:	d802      	bhi.n	6844 <flash_page_foreach+0x26>

			off += page_info.size;
			page++;
		}
	}
}
    683e:	b006      	add	sp, #24
    6840:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
		for (i = 0; i < l->pages_count; i++) {
    6844:	2600      	movs	r6, #0
		const struct flash_pages_layout *l = &layout[block];
    6846:	9f01      	ldr	r7, [sp, #4]
    6848:	eb07 07c5 	add.w	r7, r7, r5, lsl #3
		page_info.size = l->pages_size;
    684c:	687b      	ldr	r3, [r7, #4]
    684e:	9304      	str	r3, [sp, #16]
		for (i = 0; i < l->pages_count; i++) {
    6850:	683a      	ldr	r2, [r7, #0]
    6852:	eb0a 0306 	add.w	r3, sl, r6
    6856:	42b2      	cmp	r2, r6
    6858:	d802      	bhi.n	6860 <flash_page_foreach+0x42>
	for (block = 0; block < num_blocks; block++) {
    685a:	469a      	mov	sl, r3
    685c:	3501      	adds	r5, #1
    685e:	e7eb      	b.n	6838 <flash_page_foreach+0x1a>
			if (!cb(&page_info, data)) {
    6860:	4649      	mov	r1, r9
			page_info.start_offset = off;
    6862:	9403      	str	r4, [sp, #12]
			page_info.index = page;
    6864:	9305      	str	r3, [sp, #20]
			if (!cb(&page_info, data)) {
    6866:	a803      	add	r0, sp, #12
    6868:	47c0      	blx	r8
    686a:	2800      	cmp	r0, #0
    686c:	d0e7      	beq.n	683e <flash_page_foreach+0x20>
			off += page_info.size;
    686e:	9b04      	ldr	r3, [sp, #16]
		for (i = 0; i < l->pages_count; i++) {
    6870:	3601      	adds	r6, #1
			off += page_info.size;
    6872:	441c      	add	r4, r3
		for (i = 0; i < l->pages_count; i++) {
    6874:	e7ec      	b.n	6850 <flash_page_foreach+0x32>

00006876 <uarte_nrfx_config_get>:
{
    6876:	460b      	mov	r3, r1
	struct uarte_nrfx_data *data = dev->data;
    6878:	6902      	ldr	r2, [r0, #16]
	*cfg = data->uart_config;
    687a:	e9d2 0101 	ldrd	r0, r1, [r2, #4]
    687e:	e883 0003 	stmia.w	r3, {r0, r1}
}
    6882:	2000      	movs	r0, #0
    6884:	4770      	bx	lr

00006886 <uarte_nrfx_err_check>:
	return config->uarte_regs;
    6886:	6843      	ldr	r3, [r0, #4]
    6888:	681b      	ldr	r3, [r3, #0]
    uint32_t errsrc_mask = p_reg->ERRORSRC;
    688a:	f8d3 0480 	ldr.w	r0, [r3, #1152]	; 0x480
    p_reg->ERRORSRC = errsrc_mask;
    688e:	f8c3 0480 	str.w	r0, [r3, #1152]	; 0x480
}
    6892:	4770      	bx	lr

00006894 <tx_start>:
{
    6894:	b510      	push	{r4, lr}
	const struct uarte_nrfx_config *config = dev->config;
    6896:	6844      	ldr	r4, [r0, #4]
	return config->uarte_regs;
    6898:	6823      	ldr	r3, [r4, #0]
    p_reg->TXD.PTR    = (uint32_t)p_buffer;
    689a:	f8c3 1544 	str.w	r1, [r3, #1348]	; 0x544
    p_reg->TXD.MAXCNT = length;
    689e:	f8c3 2548 	str.w	r2, [r3, #1352]	; 0x548
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    68a2:	2200      	movs	r2, #0
    68a4:	f8c3 2120 	str.w	r2, [r3, #288]	; 0x120
    68a8:	f8d3 1120 	ldr.w	r1, [r3, #288]	; 0x120
    68ac:	f8c3 2158 	str.w	r2, [r3, #344]	; 0x158
    68b0:	f8d3 2158 	ldr.w	r2, [r3, #344]	; 0x158
	if (config->flags & UARTE_CFG_FLAG_LOW_POWER) {
    68b4:	6862      	ldr	r2, [r4, #4]
    68b6:	06d2      	lsls	r2, r2, #27
    68b8:	d508      	bpl.n	68cc <tx_start+0x38>
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
    68ba:	2108      	movs	r1, #8
	return config->uarte_regs;
    68bc:	6842      	ldr	r2, [r0, #4]
    68be:	6812      	ldr	r2, [r2, #0]
    68c0:	f8c2 1500 	str.w	r1, [r2, #1280]	; 0x500
    p_reg->INTENSET = mask;
    68c4:	f44f 0280 	mov.w	r2, #4194304	; 0x400000
    68c8:	f8c3 2304 	str.w	r2, [r3, #772]	; 0x304
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    68cc:	2201      	movs	r2, #1
    68ce:	609a      	str	r2, [r3, #8]
}
    68d0:	bd10      	pop	{r4, pc}

000068d2 <uarte_nrfx_poll_in>:
	return config->uarte_regs;
    68d2:	6843      	ldr	r3, [r0, #4]
	const struct uarte_nrfx_data *data = dev->data;
    68d4:	6902      	ldr	r2, [r0, #16]
	return config->uarte_regs;
    68d6:	681b      	ldr	r3, [r3, #0]
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    68d8:	f8d3 0110 	ldr.w	r0, [r3, #272]	; 0x110
	if (!nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDRX)) {
    68dc:	b150      	cbz	r0, 68f4 <uarte_nrfx_poll_in+0x22>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    68de:	2000      	movs	r0, #0
	*c = *data->rx_data;
    68e0:	6992      	ldr	r2, [r2, #24]
    68e2:	7812      	ldrb	r2, [r2, #0]
    68e4:	700a      	strb	r2, [r1, #0]
    68e6:	f8c3 0110 	str.w	r0, [r3, #272]	; 0x110
    68ea:	f8d3 2110 	ldr.w	r2, [r3, #272]	; 0x110
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    68ee:	2201      	movs	r2, #1
    68f0:	601a      	str	r2, [r3, #0]
	return 0;
    68f2:	4770      	bx	lr
		return -1;
    68f4:	f04f 30ff 	mov.w	r0, #4294967295
}
    68f8:	4770      	bx	lr

000068fa <uarte_nrfx_fifo_read>:
	if (size > 0 && nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDRX)) {
    68fa:	2a00      	cmp	r2, #0
{
    68fc:	b510      	push	{r4, lr}
    68fe:	4604      	mov	r4, r0
	if (size > 0 && nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDRX)) {
    6900:	dd10      	ble.n	6924 <uarte_nrfx_fifo_read+0x2a>
	return config->uarte_regs;
    6902:	6843      	ldr	r3, [r0, #4]
    6904:	681b      	ldr	r3, [r3, #0]
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    6906:	f8d3 0110 	ldr.w	r0, [r3, #272]	; 0x110
	if (size > 0 && nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDRX)) {
    690a:	b150      	cbz	r0, 6922 <uarte_nrfx_fifo_read+0x28>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    690c:	2000      	movs	r0, #0
	const struct uarte_nrfx_data *data = dev->data;
    690e:	6922      	ldr	r2, [r4, #16]
    6910:	f8c3 0110 	str.w	r0, [r3, #272]	; 0x110
    6914:	f8d3 0110 	ldr.w	r0, [r3, #272]	; 0x110
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    6918:	2001      	movs	r0, #1
		rx_data[num_rx++] = *data->rx_data;
    691a:	6992      	ldr	r2, [r2, #24]
    691c:	7812      	ldrb	r2, [r2, #0]
    691e:	700a      	strb	r2, [r1, #0]
    6920:	6018      	str	r0, [r3, #0]
}
    6922:	bd10      	pop	{r4, pc}
	int num_rx = 0;
    6924:	2000      	movs	r0, #0
    6926:	e7fc      	b.n	6922 <uarte_nrfx_fifo_read+0x28>

00006928 <uarte_nrfx_irq_tx_enable>:
	return config->uarte_regs;
    6928:	6843      	ldr	r3, [r0, #4]
	struct uarte_nrfx_data *data = dev->data;
    692a:	6901      	ldr	r1, [r0, #16]
	return config->uarte_regs;
    692c:	681a      	ldr	r2, [r3, #0]
	__asm__ volatile(
    692e:	f04f 0020 	mov.w	r0, #32
    6932:	f3ef 8311 	mrs	r3, BASEPRI
    6936:	f380 8812 	msr	BASEPRI_MAX, r0
    693a:	f3bf 8f6f 	isb	sy
	data->int_driven->disable_tx_irq = false;
    693e:	2000      	movs	r0, #0
    6940:	68c9      	ldr	r1, [r1, #12]
    6942:	7388      	strb	r0, [r1, #14]
    p_reg->INTENSET = mask;
    6944:	f44f 0180 	mov.w	r1, #4194304	; 0x400000
    6948:	f8c2 1304 	str.w	r1, [r2, #772]	; 0x304
	__asm__ volatile(
    694c:	f383 8811 	msr	BASEPRI, r3
    6950:	f3bf 8f6f 	isb	sy
}
    6954:	4770      	bx	lr

00006956 <uarte_nrfx_irq_tx_disable>:
	data->int_driven->disable_tx_irq = true;
    6956:	2201      	movs	r2, #1
    6958:	6903      	ldr	r3, [r0, #16]
    695a:	68db      	ldr	r3, [r3, #12]
    695c:	739a      	strb	r2, [r3, #14]
}
    695e:	4770      	bx	lr

00006960 <uarte_nrfx_irq_tx_ready_complete>:
	bool ready = !data->int_driven->disable_tx_irq &&
    6960:	6903      	ldr	r3, [r0, #16]
    6962:	68db      	ldr	r3, [r3, #12]
    6964:	7b9a      	ldrb	r2, [r3, #14]
		     nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED) &&
    6966:	f002 01ff 	and.w	r1, r2, #255	; 0xff
    696a:	b962      	cbnz	r2, 6986 <uarte_nrfx_irq_tx_ready_complete+0x26>
	return config->uarte_regs;
    696c:	6842      	ldr	r2, [r0, #4]
    696e:	6812      	ldr	r2, [r2, #0]
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    6970:	f8d2 0158 	ldr.w	r0, [r2, #344]	; 0x158
	bool ready = !data->int_driven->disable_tx_irq &&
    6974:	b140      	cbz	r0, 6988 <uarte_nrfx_irq_tx_ready_complete+0x28>
    return p_reg->INTENSET & mask;
    6976:	f8d2 0304 	ldr.w	r0, [r2, #772]	; 0x304
		     nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED) &&
    697a:	f410 0080 	ands.w	r0, r0, #4194304	; 0x400000
    697e:	d003      	beq.n	6988 <uarte_nrfx_irq_tx_ready_complete+0x28>
    6980:	2001      	movs	r0, #1
		data->int_driven->fifo_fill_lock = 0;
    6982:	6119      	str	r1, [r3, #16]
    6984:	4770      	bx	lr
		     nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED) &&
    6986:	2000      	movs	r0, #0
}
    6988:	4770      	bx	lr

0000698a <uarte_nrfx_irq_rx_ready>:
	return config->uarte_regs;
    698a:	6843      	ldr	r3, [r0, #4]
    698c:	681b      	ldr	r3, [r3, #0]
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    698e:	f8d3 0110 	ldr.w	r0, [r3, #272]	; 0x110
}
    6992:	3800      	subs	r0, #0
    6994:	bf18      	it	ne
    6996:	2001      	movne	r0, #1
    6998:	4770      	bx	lr

0000699a <uarte_nrfx_irq_rx_enable>:
    p_reg->INTENSET = mask;
    699a:	2210      	movs	r2, #16
	return config->uarte_regs;
    699c:	6843      	ldr	r3, [r0, #4]
    699e:	681b      	ldr	r3, [r3, #0]
    69a0:	f8c3 2304 	str.w	r2, [r3, #772]	; 0x304
}
    69a4:	4770      	bx	lr

000069a6 <uarte_nrfx_irq_rx_disable>:
    p_reg->INTENCLR = mask;
    69a6:	2210      	movs	r2, #16
	return config->uarte_regs;
    69a8:	6843      	ldr	r3, [r0, #4]
    69aa:	681b      	ldr	r3, [r3, #0]
    69ac:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
}
    69b0:	4770      	bx	lr

000069b2 <uarte_nrfx_irq_err_enable>:
    p_reg->INTENSET = mask;
    69b2:	f44f 7200 	mov.w	r2, #512	; 0x200
	return config->uarte_regs;
    69b6:	6843      	ldr	r3, [r0, #4]
    69b8:	681b      	ldr	r3, [r3, #0]
    69ba:	f8c3 2304 	str.w	r2, [r3, #772]	; 0x304
}
    69be:	4770      	bx	lr

000069c0 <uarte_nrfx_irq_err_disable>:
    p_reg->INTENCLR = mask;
    69c0:	f44f 7200 	mov.w	r2, #512	; 0x200
	return config->uarte_regs;
    69c4:	6843      	ldr	r3, [r0, #4]
    69c6:	681b      	ldr	r3, [r3, #0]
    69c8:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
}
    69cc:	4770      	bx	lr

000069ce <uarte_nrfx_irq_is_pending>:
{
    69ce:	b538      	push	{r3, r4, r5, lr}
	return config->uarte_regs;
    69d0:	6843      	ldr	r3, [r0, #4]
{
    69d2:	4604      	mov	r4, r0
	return config->uarte_regs;
    69d4:	681d      	ldr	r5, [r3, #0]
    return p_reg->INTENSET & mask;
    69d6:	f8d5 3304 	ldr.w	r3, [r5, #772]	; 0x304
		||
    69da:	025b      	lsls	r3, r3, #9
    69dc:	d405      	bmi.n	69ea <uarte_nrfx_irq_is_pending+0x1c>
    69de:	f8d5 0304 	ldr.w	r0, [r5, #772]	; 0x304
    69e2:	f010 0010 	ands.w	r0, r0, #16
    69e6:	d106      	bne.n	69f6 <uarte_nrfx_irq_is_pending+0x28>
}
    69e8:	bd38      	pop	{r3, r4, r5, pc}
		 uarte_nrfx_irq_tx_ready_complete(dev))
    69ea:	f7ff ffb9 	bl	6960 <uarte_nrfx_irq_tx_ready_complete>
					    NRF_UARTE_INT_TXSTOPPED_MASK) &&
    69ee:	2800      	cmp	r0, #0
    69f0:	d0f5      	beq.n	69de <uarte_nrfx_irq_is_pending+0x10>
		||
    69f2:	2001      	movs	r0, #1
    69f4:	e7f8      	b.n	69e8 <uarte_nrfx_irq_is_pending+0x1a>
		 uarte_nrfx_irq_rx_ready(dev)));
    69f6:	4620      	mov	r0, r4
    69f8:	f7ff ffc7 	bl	698a <uarte_nrfx_irq_rx_ready>
					    NRF_UARTE_INT_ENDRX_MASK) &&
    69fc:	3800      	subs	r0, #0
    69fe:	bf18      	it	ne
    6a00:	2001      	movne	r0, #1
    6a02:	e7f1      	b.n	69e8 <uarte_nrfx_irq_is_pending+0x1a>

00006a04 <uarte_nrfx_irq_update>:
}
    6a04:	2001      	movs	r0, #1
    6a06:	4770      	bx	lr

00006a08 <uarte_nrfx_irq_callback_set>:
	struct uarte_nrfx_data *data = dev->data;
    6a08:	6903      	ldr	r3, [r0, #16]
	data->int_driven->cb = cb;
    6a0a:	68d8      	ldr	r0, [r3, #12]
    6a0c:	6001      	str	r1, [r0, #0]
	data->int_driven->cb_data = cb_data;
    6a0e:	68db      	ldr	r3, [r3, #12]
    6a10:	605a      	str	r2, [r3, #4]
}
    6a12:	4770      	bx	lr

00006a14 <is_tx_ready.isra.0>:
	return config->uarte_regs;
    6a14:	6802      	ldr	r2, [r0, #0]
static bool is_tx_ready(const struct device *dev)
    6a16:	4603      	mov	r3, r0
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    6a18:	f8d2 0158 	ldr.w	r0, [r2, #344]	; 0x158
	return nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED) ||
    6a1c:	b940      	cbnz	r0, 6a30 <is_tx_ready.isra.0+0x1c>
	bool ppi_endtx = config->flags & UARTE_CFG_FLAG_PPI_ENDTX;
    6a1e:	685b      	ldr	r3, [r3, #4]
	return nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED) ||
    6a20:	079b      	lsls	r3, r3, #30
    6a22:	d406      	bmi.n	6a32 <is_tx_ready.isra.0+0x1e>
    6a24:	f8d2 0120 	ldr.w	r0, [r2, #288]	; 0x120
    6a28:	3800      	subs	r0, #0
    6a2a:	bf18      	it	ne
    6a2c:	2001      	movne	r0, #1
    6a2e:	4770      	bx	lr
    6a30:	2001      	movs	r0, #1
}
    6a32:	4770      	bx	lr

00006a34 <uarte_nrfx_fifo_fill>:
{
    6a34:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
	struct uarte_nrfx_data *data = dev->data;
    6a36:	6906      	ldr	r6, [r0, #16]
{
    6a38:	4605      	mov	r5, r0
	len = MIN(len, data->int_driven->tx_buff_size);
    6a3a:	68f3      	ldr	r3, [r6, #12]
    6a3c:	899c      	ldrh	r4, [r3, #12]
    6a3e:	3310      	adds	r3, #16
    6a40:	4294      	cmp	r4, r2
    6a42:	bfa8      	it	ge
    6a44:	4614      	movge	r4, r2
    6a46:	2201      	movs	r2, #1
    6a48:	e8d3 0fef 	ldaex	r0, [r3]
    6a4c:	2800      	cmp	r0, #0
    6a4e:	d103      	bne.n	6a58 <uarte_nrfx_fifo_fill+0x24>
    6a50:	e8c3 2fe7 	stlex	r7, r2, [r3]
    6a54:	2f00      	cmp	r7, #0
    6a56:	d1f7      	bne.n	6a48 <uarte_nrfx_fifo_fill+0x14>
    6a58:	bf0c      	ite	eq
    6a5a:	4613      	moveq	r3, r2
    6a5c:	2300      	movne	r3, #0
	if (!atomic_cas(&data->int_driven->fifo_fill_lock, 0, 1)) {
    6a5e:	d11f      	bne.n	6aa0 <uarte_nrfx_fifo_fill+0x6c>
	memcpy(data->int_driven->tx_buffer, tx_data, len);
    6a60:	68f3      	ldr	r3, [r6, #12]
    6a62:	4622      	mov	r2, r4
    6a64:	6898      	ldr	r0, [r3, #8]
    6a66:	f7ff fd97 	bl	6598 <memcpy>
	__asm__ volatile(
    6a6a:	f04f 0320 	mov.w	r3, #32
    6a6e:	f3ef 8711 	mrs	r7, BASEPRI
    6a72:	f383 8812 	msr	BASEPRI_MAX, r3
    6a76:	f3bf 8f6f 	isb	sy
	if (!is_tx_ready(dev)) {
    6a7a:	6868      	ldr	r0, [r5, #4]
    6a7c:	f7ff ffca 	bl	6a14 <is_tx_ready.isra.0>
    6a80:	68f3      	ldr	r3, [r6, #12]
    6a82:	b938      	cbnz	r0, 6a94 <uarte_nrfx_fifo_fill+0x60>
		len = 0;
    6a84:	4604      	mov	r4, r0
		data->int_driven->fifo_fill_lock = 0;
    6a86:	6118      	str	r0, [r3, #16]
	__asm__ volatile(
    6a88:	f387 8811 	msr	BASEPRI, r7
    6a8c:	f3bf 8f6f 	isb	sy
}
    6a90:	4620      	mov	r0, r4
    6a92:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
		tx_start(dev, data->int_driven->tx_buffer, len);
    6a94:	4622      	mov	r2, r4
    6a96:	4628      	mov	r0, r5
    6a98:	6899      	ldr	r1, [r3, #8]
    6a9a:	f7ff fefb 	bl	6894 <tx_start>
    6a9e:	e7f3      	b.n	6a88 <uarte_nrfx_fifo_fill+0x54>
		return 0;
    6aa0:	461c      	mov	r4, r3
    6aa2:	e7f5      	b.n	6a90 <uarte_nrfx_fifo_fill+0x5c>

00006aa4 <uarte_nrfx_isr_int>:
{
    6aa4:	b410      	push	{r4}
	const struct uarte_nrfx_config *config = dev->config;
    6aa6:	6842      	ldr	r2, [r0, #4]
	return config->uarte_regs;
    6aa8:	6813      	ldr	r3, [r2, #0]
    return p_reg->INTENSET & mask;
    6aaa:	f8d3 1304 	ldr.w	r1, [r3, #772]	; 0x304
	if (nrf_uarte_int_enable_check(uarte, NRF_UARTE_INT_ENDTX_MASK) &&
    6aae:	05c9      	lsls	r1, r1, #23
    6ab0:	d518      	bpl.n	6ae4 <uarte_nrfx_isr_int+0x40>
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    6ab2:	f8d3 1120 	ldr.w	r1, [r3, #288]	; 0x120
    6ab6:	b1a9      	cbz	r1, 6ae4 <uarte_nrfx_isr_int+0x40>
	__asm__ volatile(
    6ab8:	f04f 0420 	mov.w	r4, #32
    6abc:	f3ef 8111 	mrs	r1, BASEPRI
    6ac0:	f384 8812 	msr	BASEPRI_MAX, r4
    6ac4:	f3bf 8f6f 	isb	sy
    6ac8:	f8d3 4120 	ldr.w	r4, [r3, #288]	; 0x120
	if (nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDTX)) {
    6acc:	b134      	cbz	r4, 6adc <uarte_nrfx_isr_int+0x38>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    6ace:	2400      	movs	r4, #0
    6ad0:	f8c3 4120 	str.w	r4, [r3, #288]	; 0x120
    6ad4:	f8d3 4120 	ldr.w	r4, [r3, #288]	; 0x120
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    6ad8:	2401      	movs	r4, #1
    6ada:	60dc      	str	r4, [r3, #12]
	__asm__ volatile(
    6adc:	f381 8811 	msr	BASEPRI, r1
    6ae0:	f3bf 8f6f 	isb	sy
	if (config->flags & UARTE_CFG_FLAG_LOW_POWER) {
    6ae4:	6852      	ldr	r2, [r2, #4]
    6ae6:	06d2      	lsls	r2, r2, #27
    6ae8:	d51a      	bpl.n	6b20 <uarte_nrfx_isr_int+0x7c>
	__asm__ volatile(
    6aea:	f04f 0220 	mov.w	r2, #32
    6aee:	f3ef 8111 	mrs	r1, BASEPRI
    6af2:	f382 8812 	msr	BASEPRI_MAX, r2
    6af6:	f3bf 8f6f 	isb	sy
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    6afa:	f8d3 2158 	ldr.w	r2, [r3, #344]	; 0x158
		if (nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED)) {
    6afe:	b112      	cbz	r2, 6b06 <uarte_nrfx_isr_int+0x62>
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
    6b00:	2200      	movs	r2, #0
    6b02:	f8c3 2500 	str.w	r2, [r3, #1280]	; 0x500
		if (!data->int_driven || data->int_driven->fifo_fill_lock == 0)
    6b06:	6902      	ldr	r2, [r0, #16]
    6b08:	68d2      	ldr	r2, [r2, #12]
    6b0a:	b10a      	cbz	r2, 6b10 <uarte_nrfx_isr_int+0x6c>
    6b0c:	6912      	ldr	r2, [r2, #16]
    6b0e:	b91a      	cbnz	r2, 6b18 <uarte_nrfx_isr_int+0x74>
    p_reg->INTENCLR = mask;
    6b10:	f44f 0280 	mov.w	r2, #4194304	; 0x400000
    6b14:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
	__asm__ volatile(
    6b18:	f381 8811 	msr	BASEPRI, r1
    6b1c:	f3bf 8f6f 	isb	sy
	struct uarte_nrfx_data *data = dev->data;
    6b20:	6902      	ldr	r2, [r0, #16]
	if (!data->int_driven) {
    6b22:	68d4      	ldr	r4, [r2, #12]
    6b24:	b16c      	cbz	r4, 6b42 <uarte_nrfx_isr_int+0x9e>
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    6b26:	f8d3 1158 	ldr.w	r1, [r3, #344]	; 0x158
	if (nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED)) {
    6b2a:	b161      	cbz	r1, 6b46 <uarte_nrfx_isr_int+0xa2>
		data->int_driven->fifo_fill_lock = 0;
    6b2c:	2100      	movs	r1, #0
    6b2e:	6121      	str	r1, [r4, #16]
		if (data->int_driven->disable_tx_irq) {
    6b30:	68d4      	ldr	r4, [r2, #12]
    6b32:	7ba4      	ldrb	r4, [r4, #14]
    6b34:	b13c      	cbz	r4, 6b46 <uarte_nrfx_isr_int+0xa2>
    p_reg->INTENCLR = mask;
    6b36:	f44f 0080 	mov.w	r0, #4194304	; 0x400000
    6b3a:	f8c3 0308 	str.w	r0, [r3, #776]	; 0x308
			data->int_driven->disable_tx_irq = false;
    6b3e:	68d3      	ldr	r3, [r2, #12]
    6b40:	7399      	strb	r1, [r3, #14]
}
    6b42:	bc10      	pop	{r4}
    6b44:	4770      	bx	lr
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    6b46:	f8d3 1124 	ldr.w	r1, [r3, #292]	; 0x124
	if (nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ERROR)) {
    6b4a:	b121      	cbz	r1, 6b56 <uarte_nrfx_isr_int+0xb2>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    6b4c:	2100      	movs	r1, #0
    6b4e:	f8c3 1124 	str.w	r1, [r3, #292]	; 0x124
    6b52:	f8d3 3124 	ldr.w	r3, [r3, #292]	; 0x124
	if (data->int_driven->cb) {
    6b56:	68d2      	ldr	r2, [r2, #12]
    6b58:	6813      	ldr	r3, [r2, #0]
    6b5a:	2b00      	cmp	r3, #0
    6b5c:	d0f1      	beq.n	6b42 <uarte_nrfx_isr_int+0x9e>
		data->int_driven->cb(dev, data->int_driven->cb_data);
    6b5e:	6851      	ldr	r1, [r2, #4]
}
    6b60:	bc10      	pop	{r4}
		data->int_driven->cb(dev, data->int_driven->cb_data);
    6b62:	4718      	bx	r3

00006b64 <uarte_1_init>:
#ifdef CONFIG_UART_0_NRF_UARTE
UART_NRF_UARTE_DEVICE(0);
#endif

#ifdef CONFIG_UART_1_NRF_UARTE
UART_NRF_UARTE_DEVICE(1);
    6b64:	b510      	push	{r4, lr}
    6b66:	4604      	mov	r4, r0
    6b68:	2200      	movs	r2, #0
    6b6a:	2101      	movs	r1, #1
    6b6c:	2009      	movs	r0, #9
    6b6e:	f7fb ff7d 	bl	2a6c <z_arm_irq_priority_set>
    6b72:	2009      	movs	r0, #9
    6b74:	f7fb ff5e 	bl	2a34 <arch_irq_enable>
    6b78:	4620      	mov	r0, r4
    6b7a:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    6b7e:	f7fc be9b 	b.w	38b8 <uarte_instance_init.constprop.0>

00006b82 <uarte_0_init>:
UART_NRF_UARTE_DEVICE(0);
    6b82:	b510      	push	{r4, lr}
    6b84:	4604      	mov	r4, r0
    6b86:	2200      	movs	r2, #0
    6b88:	2101      	movs	r1, #1
    6b8a:	2008      	movs	r0, #8
    6b8c:	f7fb ff6e 	bl	2a6c <z_arm_irq_priority_set>
    6b90:	2008      	movs	r0, #8
    6b92:	f7fb ff4f 	bl	2a34 <arch_irq_enable>
    6b96:	4620      	mov	r0, r4
    6b98:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    6b9c:	f7fc be8c 	b.w	38b8 <uarte_instance_init.constprop.0>

00006ba0 <pinctrl_lookup_state>:

#include <zephyr/drivers/pinctrl.h>

int pinctrl_lookup_state(const struct pinctrl_dev_config *config, uint8_t id,
			 const struct pinctrl_state **state)
{
    6ba0:	b570      	push	{r4, r5, r6, lr}
	*state = &config->states[0];
	while (*state <= &config->states[config->state_cnt - 1U]) {
    6ba2:	f06f 4660 	mvn.w	r6, #3758096384	; 0xe0000000
	*state = &config->states[0];
    6ba6:	6843      	ldr	r3, [r0, #4]
    6ba8:	6013      	str	r3, [r2, #0]
	while (*state <= &config->states[config->state_cnt - 1U]) {
    6baa:	7a05      	ldrb	r5, [r0, #8]
    6bac:	6844      	ldr	r4, [r0, #4]
    6bae:	4435      	add	r5, r6
    6bb0:	eb04 04c5 	add.w	r4, r4, r5, lsl #3
    6bb4:	42a3      	cmp	r3, r4
    6bb6:	d902      	bls.n	6bbe <pinctrl_lookup_state+0x1e>
		}

		(*state)++;
	}

	return -ENOENT;
    6bb8:	f06f 0001 	mvn.w	r0, #1
}
    6bbc:	bd70      	pop	{r4, r5, r6, pc}
		if (id == (*state)->id) {
    6bbe:	795c      	ldrb	r4, [r3, #5]
    6bc0:	428c      	cmp	r4, r1
    6bc2:	d001      	beq.n	6bc8 <pinctrl_lookup_state+0x28>
		(*state)++;
    6bc4:	3308      	adds	r3, #8
    6bc6:	e7ef      	b.n	6ba8 <pinctrl_lookup_state+0x8>
			return 0;
    6bc8:	2000      	movs	r0, #0
    6bca:	e7f7      	b.n	6bbc <pinctrl_lookup_state+0x1c>

00006bcc <hw_cc3xx_init_internal>:

	/* Initialize the cc3xx HW with or without RNG support */
#if CONFIG_ENTROPY_CC3XX
	res = nrf_cc3xx_platform_init();
#else
	res = nrf_cc3xx_platform_init_no_rng();
    6bcc:	f7fe bc46 	b.w	545c <nrf_cc3xx_platform_init_no_rng>

00006bd0 <hw_cc3xx_init>:

	return res;
}

static int hw_cc3xx_init(const struct device *dev)
{
    6bd0:	b508      	push	{r3, lr}
	int res;

	/* Set the RTOS abort APIs */
	nrf_cc3xx_platform_abort_init();
    6bd2:	f7fb f943 	bl	1e5c <nrf_cc3xx_platform_abort_init>

	/* Set the RTOS mutex APIs */
	nrf_cc3xx_platform_mutex_init();
    6bd6:	f7ff f9f0 	bl	5fba <nrf_cc3xx_platform_mutex_init>

	/* Enable the hardware */
	res = hw_cc3xx_init_internal(dev);
	return res;
}
    6bda:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
	res = nrf_cc3xx_platform_init_no_rng();
    6bde:	f7fe bc3d 	b.w	545c <nrf_cc3xx_platform_init_no_rng>

00006be2 <boot_swap_info_off>:
    return ALIGN_DOWN(boot_magic_off(fap) - BOOT_MAX_ALIGN, BOOT_MAX_ALIGN);
    6be2:	6880      	ldr	r0, [r0, #8]
    6be4:	3818      	subs	r0, #24
    6be6:	f020 0007 	bic.w	r0, r0, #7
}
    6bea:	3810      	subs	r0, #16
    6bec:	4770      	bx	lr

00006bee <boot_magic_compatible_check>:
    switch (tbl_val) {
    6bee:	2804      	cmp	r0, #4
    6bf0:	d009      	beq.n	6c06 <boot_magic_compatible_check+0x18>
    6bf2:	2805      	cmp	r0, #5
    6bf4:	d103      	bne.n	6bfe <boot_magic_compatible_check+0x10>
        return val != BOOT_MAGIC_GOOD;
    6bf6:	1e48      	subs	r0, r1, #1
    6bf8:	bf18      	it	ne
    6bfa:	2001      	movne	r0, #1
    6bfc:	4770      	bx	lr
        return tbl_val == val;
    6bfe:	1a43      	subs	r3, r0, r1
    6c00:	4258      	negs	r0, r3
    6c02:	4158      	adcs	r0, r3
    6c04:	4770      	bx	lr
    switch (tbl_val) {
    6c06:	2001      	movs	r0, #1
}
    6c08:	4770      	bx	lr

00006c0a <bootutil_buffer_is_erased>:
{
    6c0a:	b538      	push	{r3, r4, r5, lr}
    6c0c:	4615      	mov	r5, r2
    if (buffer == NULL || len == 0) {
    6c0e:	460c      	mov	r4, r1
    6c10:	b161      	cbz	r1, 6c2c <bootutil_buffer_is_erased+0x22>
    6c12:	b15a      	cbz	r2, 6c2c <bootutil_buffer_is_erased+0x22>
    erased_val = flash_area_erased_val(area);
    6c14:	f7ff f9a4 	bl	5f60 <flash_area_erased_val>
    for (i = 0, u8b = (uint8_t *)buffer; i < len; i++) {
    6c18:	4621      	mov	r1, r4
    6c1a:	4425      	add	r5, r4
        if (u8b[i] != erased_val) {
    6c1c:	f811 3b01 	ldrb.w	r3, [r1], #1
    6c20:	4283      	cmp	r3, r0
    6c22:	d103      	bne.n	6c2c <bootutil_buffer_is_erased+0x22>
    for (i = 0, u8b = (uint8_t *)buffer; i < len; i++) {
    6c24:	42a9      	cmp	r1, r5
    6c26:	d1f9      	bne.n	6c1c <bootutil_buffer_is_erased+0x12>
    return true;
    6c28:	2001      	movs	r0, #1
}
    6c2a:	bd38      	pop	{r3, r4, r5, pc}
        return false;
    6c2c:	2000      	movs	r0, #0
    6c2e:	e7fc      	b.n	6c2a <bootutil_buffer_is_erased+0x20>

00006c30 <boot_read_flag>:
{
    6c30:	b538      	push	{r3, r4, r5, lr}
    6c32:	460c      	mov	r4, r1
    rc = flash_area_read(fap, off, flag, sizeof *flag);
    6c34:	2301      	movs	r3, #1
{
    6c36:	4611      	mov	r1, r2
    rc = flash_area_read(fap, off, flag, sizeof *flag);
    6c38:	4622      	mov	r2, r4
{
    6c3a:	4605      	mov	r5, r0
    rc = flash_area_read(fap, off, flag, sizeof *flag);
    6c3c:	f7ff f94b 	bl	5ed6 <flash_area_read>
    if (rc < 0) {
    6c40:	2800      	cmp	r0, #0
    6c42:	db0f      	blt.n	6c64 <boot_read_flag+0x34>
    if (bootutil_buffer_is_erased(fap, flag, sizeof *flag)) {
    6c44:	2201      	movs	r2, #1
    6c46:	4621      	mov	r1, r4
    6c48:	4628      	mov	r0, r5
    6c4a:	f7ff ffde 	bl	6c0a <bootutil_buffer_is_erased>
    6c4e:	b938      	cbnz	r0, 6c60 <boot_read_flag+0x30>
    if (flag != BOOT_FLAG_SET) {
    6c50:	7823      	ldrb	r3, [r4, #0]
    return BOOT_FLAG_SET;
    6c52:	2b01      	cmp	r3, #1
        *flag = boot_flag_decode(*flag);
    6c54:	bf14      	ite	ne
    6c56:	2302      	movne	r3, #2
    6c58:	2301      	moveq	r3, #1
    6c5a:	2000      	movs	r0, #0
    6c5c:	7023      	strb	r3, [r4, #0]
}
    6c5e:	bd38      	pop	{r3, r4, r5, pc}
    6c60:	2303      	movs	r3, #3
    6c62:	e7fa      	b.n	6c5a <boot_read_flag+0x2a>
        return BOOT_EFLASH;
    6c64:	2001      	movs	r0, #1
    6c66:	e7fa      	b.n	6c5e <boot_read_flag+0x2e>

00006c68 <boot_write_trailer>:
{
    6c68:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
    6c6c:	461d      	mov	r5, r3
    6c6e:	4606      	mov	r6, r0
    6c70:	460f      	mov	r7, r1
    6c72:	4690      	mov	r8, r2
    align = flash_area_align(fap);
    6c74:	f7ff f96d 	bl	5f52 <flash_area_align>
    align = ALIGN_UP(inlen, align);
    6c78:	1e6c      	subs	r4, r5, #1
    6c7a:	4404      	add	r4, r0
    6c7c:	4240      	negs	r0, r0
    6c7e:	4004      	ands	r4, r0
    if (align > BOOT_MAX_ALIGN) {
    6c80:	2c08      	cmp	r4, #8
    6c82:	d81a      	bhi.n	6cba <boot_write_trailer+0x52>
    erased_val = flash_area_erased_val(fap);
    6c84:	4630      	mov	r0, r6
    6c86:	f7ff f96b 	bl	5f60 <flash_area_erased_val>
    6c8a:	4681      	mov	r9, r0
    memcpy(buf, inbuf, inlen);
    6c8c:	462a      	mov	r2, r5
    6c8e:	4641      	mov	r1, r8
    6c90:	4668      	mov	r0, sp
    6c92:	f7ff fc81 	bl	6598 <memcpy>
    memset(&buf[inlen], erased_val, align - inlen);
    6c96:	4649      	mov	r1, r9
    6c98:	1b62      	subs	r2, r4, r5
    6c9a:	eb0d 0005 	add.w	r0, sp, r5
    6c9e:	f7ff fc86 	bl	65ae <memset>
    rc = flash_area_write(fap, off, buf, align);
    6ca2:	4623      	mov	r3, r4
    6ca4:	466a      	mov	r2, sp
    6ca6:	4639      	mov	r1, r7
    6ca8:	4630      	mov	r0, r6
    6caa:	f7ff f929 	bl	5f00 <flash_area_write>
    if (rc != 0) {
    6cae:	3800      	subs	r0, #0
    6cb0:	bf18      	it	ne
    6cb2:	2001      	movne	r0, #1
}
    6cb4:	b003      	add	sp, #12
    6cb6:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
        return -1;
    6cba:	f04f 30ff 	mov.w	r0, #4294967295
    6cbe:	e7f9      	b.n	6cb4 <boot_write_trailer+0x4c>

00006cc0 <boot_write_trailer_flag>:
{
    6cc0:	b507      	push	{r0, r1, r2, lr}
    return boot_write_trailer(fap, off, buf, 1);
    6cc2:	2301      	movs	r3, #1
    const uint8_t buf[1] = { flag_val };
    6cc4:	f88d 2004 	strb.w	r2, [sp, #4]
    return boot_write_trailer(fap, off, buf, 1);
    6cc8:	aa01      	add	r2, sp, #4
    6cca:	f7ff ffcd 	bl	6c68 <boot_write_trailer>
}
    6cce:	b003      	add	sp, #12
    6cd0:	f85d fb04 	ldr.w	pc, [sp], #4

00006cd4 <boot_write_image_ok>:
    return ALIGN_DOWN(boot_magic_off(fap) - BOOT_MAX_ALIGN, BOOT_MAX_ALIGN);
    6cd4:	6881      	ldr	r1, [r0, #8]
    return boot_write_trailer_flag(fap, off, BOOT_FLAG_SET);
    6cd6:	2201      	movs	r2, #1
    return ALIGN_DOWN(boot_magic_off(fap) - BOOT_MAX_ALIGN, BOOT_MAX_ALIGN);
    6cd8:	3918      	subs	r1, #24
    return boot_write_trailer_flag(fap, off, BOOT_FLAG_SET);
    6cda:	f021 0107 	bic.w	r1, r1, #7
    6cde:	f7ff bfef 	b.w	6cc0 <boot_write_trailer_flag>

00006ce2 <boot_read_image_ok>:
    return ALIGN_DOWN(boot_magic_off(fap) - BOOT_MAX_ALIGN, BOOT_MAX_ALIGN);
    6ce2:	6882      	ldr	r2, [r0, #8]
    6ce4:	3a18      	subs	r2, #24
    return boot_read_flag(fap, image_ok, boot_image_ok_off(fap));
    6ce6:	f022 0207 	bic.w	r2, r2, #7
    6cea:	f7ff bfa1 	b.w	6c30 <boot_read_flag>

00006cee <boot_read_swap_state_by_id>:
{
    6cee:	b513      	push	{r0, r1, r4, lr}
    6cf0:	460c      	mov	r4, r1
    rc = flash_area_open(flash_area_id, &fap);
    6cf2:	b2c0      	uxtb	r0, r0
    6cf4:	a901      	add	r1, sp, #4
    6cf6:	f7fb f859 	bl	1dac <flash_area_open>
    if (rc != 0) {
    6cfa:	b950      	cbnz	r0, 6d12 <boot_read_swap_state_by_id+0x24>
    rc = boot_read_swap_state(fap, state);
    6cfc:	4621      	mov	r1, r4
    6cfe:	9801      	ldr	r0, [sp, #4]
    6d00:	f7fd f928 	bl	3f54 <boot_read_swap_state>
    6d04:	4604      	mov	r4, r0
    flash_area_close(fap);
    6d06:	9801      	ldr	r0, [sp, #4]
    6d08:	f7ff f8e4 	bl	5ed4 <flash_area_close>
}
    6d0c:	4620      	mov	r0, r4
    6d0e:	b002      	add	sp, #8
    6d10:	bd10      	pop	{r4, pc}
        return BOOT_EFLASH;
    6d12:	2401      	movs	r4, #1
    6d14:	e7fa      	b.n	6d0c <boot_read_swap_state_by_id+0x1e>

00006d16 <boot_write_swap_info>:
{
    6d16:	b513      	push	{r0, r1, r4, lr}
    BOOT_SET_SWAP_INFO(swap_info, image_num, swap_type);
    6d18:	ea41 1102 	orr.w	r1, r1, r2, lsl #4
{
    6d1c:	4604      	mov	r4, r0
    BOOT_SET_SWAP_INFO(swap_info, image_num, swap_type);
    6d1e:	f88d 1007 	strb.w	r1, [sp, #7]
    off = boot_swap_info_off(fap);
    6d22:	f7ff ff5e 	bl	6be2 <boot_swap_info_off>
    return boot_write_trailer(fap, off, (const uint8_t *) &swap_info, 1);
    6d26:	2301      	movs	r3, #1
    off = boot_swap_info_off(fap);
    6d28:	4601      	mov	r1, r0
    return boot_write_trailer(fap, off, (const uint8_t *) &swap_info, 1);
    6d2a:	f10d 0207 	add.w	r2, sp, #7
    6d2e:	4620      	mov	r0, r4
    6d30:	f7ff ff9a 	bl	6c68 <boot_write_trailer>
}
    6d34:	b002      	add	sp, #8
    6d36:	bd10      	pop	{r4, pc}

00006d38 <_mbedtls_init>:
#if defined(CONFIG_MBEDTLS_DEBUG_LEVEL)
	mbedtls_debug_set_threshold(CONFIG_MBEDTLS_DEBUG_LEVEL);
#endif

	return 0;
}
    6d38:	2000      	movs	r0, #0
    6d3a:	4770      	bx	lr

00006d3c <mbedtls_asn1_get_len>:
 * ASN.1 DER decoding routines
 */
int mbedtls_asn1_get_len( unsigned char **p,
                  const unsigned char *end,
                  size_t *len )
{
    6d3c:	b570      	push	{r4, r5, r6, lr}
    if( ( end - *p ) < 1 )
    6d3e:	6803      	ldr	r3, [r0, #0]
    6d40:	1acd      	subs	r5, r1, r3
    6d42:	2d00      	cmp	r5, #0
    6d44:	dc02      	bgt.n	6d4c <mbedtls_asn1_get_len+0x10>
        return( MBEDTLS_ERR_ASN1_OUT_OF_DATA );
    6d46:	f06f 005f 	mvn.w	r0, #95	; 0x5f

    if( *len > (size_t) ( end - *p ) )
        return( MBEDTLS_ERR_ASN1_OUT_OF_DATA );

    return( 0 );
}
    6d4a:	bd70      	pop	{r4, r5, r6, pc}
    if( ( **p & 0x80 ) == 0 )
    6d4c:	f993 6000 	ldrsb.w	r6, [r3]
    6d50:	781c      	ldrb	r4, [r3, #0]
    6d52:	2e00      	cmp	r6, #0
    6d54:	db0a      	blt.n	6d6c <mbedtls_asn1_get_len+0x30>
        *len = *(*p)++;
    6d56:	1c5c      	adds	r4, r3, #1
    6d58:	6004      	str	r4, [r0, #0]
    6d5a:	781b      	ldrb	r3, [r3, #0]
    6d5c:	6013      	str	r3, [r2, #0]
    if( *len > (size_t) ( end - *p ) )
    6d5e:	6803      	ldr	r3, [r0, #0]
    6d60:	1ac9      	subs	r1, r1, r3
    6d62:	6813      	ldr	r3, [r2, #0]
    6d64:	428b      	cmp	r3, r1
    6d66:	d8ee      	bhi.n	6d46 <mbedtls_asn1_get_len+0xa>
    return( 0 );
    6d68:	2000      	movs	r0, #0
    6d6a:	e7ee      	b.n	6d4a <mbedtls_asn1_get_len+0xe>
        switch( **p & 0x7F )
    6d6c:	f004 047f 	and.w	r4, r4, #127	; 0x7f
    6d70:	3c01      	subs	r4, #1
    6d72:	2c03      	cmp	r4, #3
    6d74:	d82b      	bhi.n	6dce <mbedtls_asn1_get_len+0x92>
    6d76:	e8df f004 	tbb	[pc, r4]
    6d7a:	0a02      	.short	0x0a02
    6d7c:	2114      	.short	0x2114
            if( ( end - *p ) < 2 )
    6d7e:	2d01      	cmp	r5, #1
    6d80:	d0e1      	beq.n	6d46 <mbedtls_asn1_get_len+0xa>
            *len = (*p)[1];
    6d82:	785b      	ldrb	r3, [r3, #1]
    6d84:	6013      	str	r3, [r2, #0]
            (*p) += 2;
    6d86:	6803      	ldr	r3, [r0, #0]
    6d88:	3302      	adds	r3, #2
            (*p) += 5;
    6d8a:	6003      	str	r3, [r0, #0]
            break;
    6d8c:	e7e7      	b.n	6d5e <mbedtls_asn1_get_len+0x22>
            if( ( end - *p ) < 3 )
    6d8e:	2d02      	cmp	r5, #2
    6d90:	ddd9      	ble.n	6d46 <mbedtls_asn1_get_len+0xa>
            *len = ( (size_t)(*p)[1] << 8 ) | (*p)[2];
    6d92:	f8b3 3001 	ldrh.w	r3, [r3, #1]
    6d96:	ba5b      	rev16	r3, r3
    6d98:	b29b      	uxth	r3, r3
    6d9a:	6013      	str	r3, [r2, #0]
            (*p) += 3;
    6d9c:	6803      	ldr	r3, [r0, #0]
    6d9e:	3303      	adds	r3, #3
    6da0:	e7f3      	b.n	6d8a <mbedtls_asn1_get_len+0x4e>
            if( ( end - *p ) < 4 )
    6da2:	2d03      	cmp	r5, #3
    6da4:	ddcf      	ble.n	6d46 <mbedtls_asn1_get_len+0xa>
                   ( (size_t)(*p)[2] << 8  ) | (*p)[3];
    6da6:	789c      	ldrb	r4, [r3, #2]
            *len = ( (size_t)(*p)[1] << 16 ) |
    6da8:	785d      	ldrb	r5, [r3, #1]
                   ( (size_t)(*p)[2] << 8  ) | (*p)[3];
    6daa:	0224      	lsls	r4, r4, #8
    6dac:	78db      	ldrb	r3, [r3, #3]
            *len = ( (size_t)(*p)[1] << 16 ) |
    6dae:	ea44 4405 	orr.w	r4, r4, r5, lsl #16
                   ( (size_t)(*p)[2] << 8  ) | (*p)[3];
    6db2:	4323      	orrs	r3, r4
            *len = ( (size_t)(*p)[1] << 16 ) |
    6db4:	6013      	str	r3, [r2, #0]
            (*p) += 4;
    6db6:	6803      	ldr	r3, [r0, #0]
    6db8:	3304      	adds	r3, #4
    6dba:	e7e6      	b.n	6d8a <mbedtls_asn1_get_len+0x4e>
            if( ( end - *p ) < 5 )
    6dbc:	2d04      	cmp	r5, #4
    6dbe:	ddc2      	ble.n	6d46 <mbedtls_asn1_get_len+0xa>
            *len = ( (size_t)(*p)[1] << 24 ) | ( (size_t)(*p)[2] << 16 ) |
    6dc0:	f8d3 3001 	ldr.w	r3, [r3, #1]
    6dc4:	ba1b      	rev	r3, r3
    6dc6:	6013      	str	r3, [r2, #0]
            (*p) += 5;
    6dc8:	6803      	ldr	r3, [r0, #0]
    6dca:	3305      	adds	r3, #5
    6dcc:	e7dd      	b.n	6d8a <mbedtls_asn1_get_len+0x4e>
        switch( **p & 0x7F )
    6dce:	f06f 0063 	mvn.w	r0, #99	; 0x63
    6dd2:	e7ba      	b.n	6d4a <mbedtls_asn1_get_len+0xe>

00006dd4 <mbedtls_asn1_get_tag>:

int mbedtls_asn1_get_tag( unsigned char **p,
                  const unsigned char *end,
                  size_t *len, int tag )
{
    6dd4:	b470      	push	{r4, r5, r6}
    if( ( end - *p ) < 1 )
    6dd6:	6804      	ldr	r4, [r0, #0]
    6dd8:	1b0e      	subs	r6, r1, r4
    6dda:	2e00      	cmp	r6, #0
    6ddc:	dd07      	ble.n	6dee <mbedtls_asn1_get_tag+0x1a>
        return( MBEDTLS_ERR_ASN1_OUT_OF_DATA );

    if( **p != tag )
    6dde:	7826      	ldrb	r6, [r4, #0]
    6de0:	429e      	cmp	r6, r3
    6de2:	d108      	bne.n	6df6 <mbedtls_asn1_get_tag+0x22>
        return( MBEDTLS_ERR_ASN1_UNEXPECTED_TAG );

    (*p)++;
    6de4:	3401      	adds	r4, #1
    6de6:	6004      	str	r4, [r0, #0]

    return( mbedtls_asn1_get_len( p, end, len ) );
}
    6de8:	bc70      	pop	{r4, r5, r6}
    return( mbedtls_asn1_get_len( p, end, len ) );
    6dea:	f7ff bfa7 	b.w	6d3c <mbedtls_asn1_get_len>
        return( MBEDTLS_ERR_ASN1_OUT_OF_DATA );
    6dee:	f06f 005f 	mvn.w	r0, #95	; 0x5f
}
    6df2:	bc70      	pop	{r4, r5, r6}
    6df4:	4770      	bx	lr
        return( MBEDTLS_ERR_ASN1_UNEXPECTED_TAG );
    6df6:	f06f 0061 	mvn.w	r0, #97	; 0x61
    6dfa:	e7fa      	b.n	6df2 <mbedtls_asn1_get_tag+0x1e>

00006dfc <mbedtls_asn1_get_mpi>:

#if defined(MBEDTLS_BIGNUM_C)
int mbedtls_asn1_get_mpi( unsigned char **p,
                  const unsigned char *end,
                  mbedtls_mpi *X )
{
    6dfc:	b573      	push	{r0, r1, r4, r5, r6, lr}
    int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED;
    size_t len;

    if( ( ret = mbedtls_asn1_get_tag( p, end, &len, MBEDTLS_ASN1_INTEGER ) ) != 0 )
    6dfe:	2302      	movs	r3, #2
{
    6e00:	4615      	mov	r5, r2
    if( ( ret = mbedtls_asn1_get_tag( p, end, &len, MBEDTLS_ASN1_INTEGER ) ) != 0 )
    6e02:	aa01      	add	r2, sp, #4
{
    6e04:	4604      	mov	r4, r0
    if( ( ret = mbedtls_asn1_get_tag( p, end, &len, MBEDTLS_ASN1_INTEGER ) ) != 0 )
    6e06:	f7ff ffe5 	bl	6dd4 <mbedtls_asn1_get_tag>
    6e0a:	b940      	cbnz	r0, 6e1e <mbedtls_asn1_get_mpi+0x22>
        return( ret );

    ret = mbedtls_mpi_read_binary( X, *p, len );
    6e0c:	9e01      	ldr	r6, [sp, #4]
    6e0e:	4628      	mov	r0, r5
    6e10:	4632      	mov	r2, r6
    6e12:	6821      	ldr	r1, [r4, #0]
    6e14:	f000 fb18 	bl	7448 <mbedtls_mpi_read_binary>

    *p += len;
    6e18:	6823      	ldr	r3, [r4, #0]
    6e1a:	4433      	add	r3, r6
    6e1c:	6023      	str	r3, [r4, #0]

    return( ret );
}
    6e1e:	b002      	add	sp, #8
    6e20:	bd70      	pop	{r4, r5, r6, pc}

00006e22 <mpi_mul_hlp>:
#endif
void mpi_mul_hlp( size_t i,
                  const mbedtls_mpi_uint *s,
                  mbedtls_mpi_uint *d,
                  mbedtls_mpi_uint b )
{
    6e22:	b5f0      	push	{r4, r5, r6, r7, lr}
        MULADDC_INIT
        MULADDC_CORE
        MULADDC_STOP
    }
#else /* MULADDC_HUIT */
    for( ; i >= 16; i -= 16 )
    6e24:	4684      	mov	ip, r0
{
    6e26:	4617      	mov	r7, r2
    6e28:	460e      	mov	r6, r1
    6e2a:	4614      	mov	r4, r2
    mbedtls_mpi_uint c = 0, t = 0;
    6e2c:	2500      	movs	r5, #0
    for( ; i >= 16; i -= 16 )
    6e2e:	f1bc 0f0f 	cmp.w	ip, #15
    6e32:	f106 0640 	add.w	r6, r6, #64	; 0x40
    6e36:	f104 0440 	add.w	r4, r4, #64	; 0x40
    6e3a:	d877      	bhi.n	6f2c <mpi_mul_hlp+0x10a>
    6e3c:	f06f 020f 	mvn.w	r2, #15
    6e40:	0904      	lsrs	r4, r0, #4
    6e42:	fb02 0004 	mla	r0, r2, r4, r0
        MULADDC_CORE   MULADDC_CORE
        MULADDC_CORE   MULADDC_CORE
        MULADDC_STOP
    }

    for( ; i >= 8; i -= 8 )
    6e46:	2807      	cmp	r0, #7
    6e48:	ea4f 1c84 	mov.w	ip, r4, lsl #6
    6e4c:	eb01 1684 	add.w	r6, r1, r4, lsl #6
    6e50:	eb07 1484 	add.w	r4, r7, r4, lsl #6
    6e54:	d95d      	bls.n	6f12 <mpi_mul_hlp+0xf0>
    {
        MULADDC_INIT
        MULADDC_CORE   MULADDC_CORE
    6e56:	f851 100c 	ldr.w	r1, [r1, ip]
    for( ; i >= 8; i -= 8 )
    6e5a:	3808      	subs	r0, #8
        MULADDC_CORE   MULADDC_CORE
    6e5c:	fba3 1201 	umull	r1, r2, r3, r1
    6e60:	1869      	adds	r1, r5, r1
    6e62:	f857 500c 	ldr.w	r5, [r7, ip]
    6e66:	f142 0200 	adc.w	r2, r2, #0
    6e6a:	1949      	adds	r1, r1, r5
    6e6c:	f847 100c 	str.w	r1, [r7, ip]
    6e70:	6871      	ldr	r1, [r6, #4]
    6e72:	f142 0200 	adc.w	r2, r2, #0
    6e76:	fba3 5101 	umull	r5, r1, r3, r1
    6e7a:	1952      	adds	r2, r2, r5
    6e7c:	6865      	ldr	r5, [r4, #4]
    6e7e:	f141 0100 	adc.w	r1, r1, #0
    6e82:	1952      	adds	r2, r2, r5
    6e84:	6062      	str	r2, [r4, #4]
        MULADDC_CORE   MULADDC_CORE
    6e86:	68b2      	ldr	r2, [r6, #8]
        MULADDC_CORE   MULADDC_CORE
    6e88:	f141 0100 	adc.w	r1, r1, #0
        MULADDC_CORE   MULADDC_CORE
    6e8c:	fba3 5202 	umull	r5, r2, r3, r2
    6e90:	1949      	adds	r1, r1, r5
    6e92:	68a5      	ldr	r5, [r4, #8]
    6e94:	f142 0200 	adc.w	r2, r2, #0
    6e98:	1949      	adds	r1, r1, r5
    6e9a:	60a1      	str	r1, [r4, #8]
    6e9c:	68f1      	ldr	r1, [r6, #12]
    6e9e:	f142 0200 	adc.w	r2, r2, #0
    6ea2:	fba3 5101 	umull	r5, r1, r3, r1
    6ea6:	1952      	adds	r2, r2, r5
    6ea8:	68e5      	ldr	r5, [r4, #12]
    6eaa:	f141 0100 	adc.w	r1, r1, #0
    6eae:	1952      	adds	r2, r2, r5
    6eb0:	60e2      	str	r2, [r4, #12]

        MULADDC_CORE   MULADDC_CORE
    6eb2:	6932      	ldr	r2, [r6, #16]
        MULADDC_CORE   MULADDC_CORE
    6eb4:	f141 0100 	adc.w	r1, r1, #0
        MULADDC_CORE   MULADDC_CORE
    6eb8:	fba3 5202 	umull	r5, r2, r3, r2
    6ebc:	1949      	adds	r1, r1, r5
    6ebe:	6925      	ldr	r5, [r4, #16]
    6ec0:	f142 0200 	adc.w	r2, r2, #0
    6ec4:	1949      	adds	r1, r1, r5
    6ec6:	6121      	str	r1, [r4, #16]
    6ec8:	6971      	ldr	r1, [r6, #20]
    6eca:	f142 0200 	adc.w	r2, r2, #0
    6ece:	fba3 5101 	umull	r5, r1, r3, r1
    6ed2:	1952      	adds	r2, r2, r5
    6ed4:	6965      	ldr	r5, [r4, #20]
    6ed6:	f141 0100 	adc.w	r1, r1, #0
    6eda:	1952      	adds	r2, r2, r5
    6edc:	6162      	str	r2, [r4, #20]
        MULADDC_CORE   MULADDC_CORE
    6ede:	69b2      	ldr	r2, [r6, #24]
        MULADDC_CORE   MULADDC_CORE
    6ee0:	f141 0100 	adc.w	r1, r1, #0
        MULADDC_CORE   MULADDC_CORE
    6ee4:	fba3 5202 	umull	r5, r2, r3, r2
    6ee8:	1949      	adds	r1, r1, r5
    6eea:	69a5      	ldr	r5, [r4, #24]
    6eec:	f142 0200 	adc.w	r2, r2, #0
    6ef0:	1949      	adds	r1, r1, r5
    6ef2:	61a1      	str	r1, [r4, #24]
    6ef4:	69f1      	ldr	r1, [r6, #28]
    6ef6:	f142 0200 	adc.w	r2, r2, #0
    6efa:	fba3 1501 	umull	r1, r5, r3, r1
    6efe:	1852      	adds	r2, r2, r1
    6f00:	69e1      	ldr	r1, [r4, #28]
    6f02:	f145 0500 	adc.w	r5, r5, #0
    6f06:	1852      	adds	r2, r2, r1
    6f08:	61e2      	str	r2, [r4, #28]
    6f0a:	f145 0500 	adc.w	r5, r5, #0
    6f0e:	3420      	adds	r4, #32
    6f10:	3620      	adds	r6, #32
    6f12:	4627      	mov	r7, r4
    6f14:	ea4f 0c80 	mov.w	ip, r0, lsl #2
    6f18:	eb06 0080 	add.w	r0, r6, r0, lsl #2
        MULADDC_STOP
    }

    for( ; i > 0; i-- )
    6f1c:	42b0      	cmp	r0, r6
    6f1e:	f040 8106 	bne.w	712e <mpi_mul_hlp+0x30c>
    6f22:	4464      	add	r4, ip
    }
#endif /* MULADDC_HUIT */

    t++;

    while( c != 0 )
    6f24:	2d00      	cmp	r5, #0
    6f26:	f040 8110 	bne.w	714a <mpi_mul_hlp+0x328>
    {
        *d += c; c = ( *d < c ); d++;
    }
}
    6f2a:	bdf0      	pop	{r4, r5, r6, r7, pc}
        MULADDC_CORE   MULADDC_CORE
    6f2c:	f856 2c40 	ldr.w	r2, [r6, #-64]
    for( ; i >= 16; i -= 16 )
    6f30:	f1ac 0c10 	sub.w	ip, ip, #16
        MULADDC_CORE   MULADDC_CORE
    6f34:	fba3 e202 	umull	lr, r2, r3, r2
    6f38:	eb15 0e0e 	adds.w	lr, r5, lr
    6f3c:	f854 5c40 	ldr.w	r5, [r4, #-64]
    6f40:	f142 0200 	adc.w	r2, r2, #0
    6f44:	eb15 050e 	adds.w	r5, r5, lr
    6f48:	f844 5c40 	str.w	r5, [r4, #-64]
    6f4c:	f856 5c3c 	ldr.w	r5, [r6, #-60]
    6f50:	f142 0200 	adc.w	r2, r2, #0
    6f54:	fba3 e505 	umull	lr, r5, r3, r5
    6f58:	eb12 0e0e 	adds.w	lr, r2, lr
    6f5c:	f854 2c3c 	ldr.w	r2, [r4, #-60]
    6f60:	f145 0500 	adc.w	r5, r5, #0
    6f64:	eb12 020e 	adds.w	r2, r2, lr
    6f68:	f844 2c3c 	str.w	r2, [r4, #-60]
        MULADDC_CORE   MULADDC_CORE
    6f6c:	f856 2c38 	ldr.w	r2, [r6, #-56]
        MULADDC_CORE   MULADDC_CORE
    6f70:	f145 0500 	adc.w	r5, r5, #0
        MULADDC_CORE   MULADDC_CORE
    6f74:	fba3 e202 	umull	lr, r2, r3, r2
    6f78:	eb15 0e0e 	adds.w	lr, r5, lr
    6f7c:	f854 5c38 	ldr.w	r5, [r4, #-56]
    6f80:	f142 0200 	adc.w	r2, r2, #0
    6f84:	eb15 050e 	adds.w	r5, r5, lr
    6f88:	f844 5c38 	str.w	r5, [r4, #-56]
    6f8c:	f856 5c34 	ldr.w	r5, [r6, #-52]
    6f90:	f142 0200 	adc.w	r2, r2, #0
    6f94:	fba3 e505 	umull	lr, r5, r3, r5
    6f98:	eb12 0e0e 	adds.w	lr, r2, lr
    6f9c:	f854 2c34 	ldr.w	r2, [r4, #-52]
    6fa0:	f145 0500 	adc.w	r5, r5, #0
    6fa4:	eb12 020e 	adds.w	r2, r2, lr
    6fa8:	f844 2c34 	str.w	r2, [r4, #-52]
        MULADDC_CORE   MULADDC_CORE
    6fac:	f856 2c30 	ldr.w	r2, [r6, #-48]
        MULADDC_CORE   MULADDC_CORE
    6fb0:	f145 0500 	adc.w	r5, r5, #0
        MULADDC_CORE   MULADDC_CORE
    6fb4:	fba3 e202 	umull	lr, r2, r3, r2
    6fb8:	eb15 0e0e 	adds.w	lr, r5, lr
    6fbc:	f854 5c30 	ldr.w	r5, [r4, #-48]
    6fc0:	f142 0200 	adc.w	r2, r2, #0
    6fc4:	eb15 050e 	adds.w	r5, r5, lr
    6fc8:	f844 5c30 	str.w	r5, [r4, #-48]
    6fcc:	f856 5c2c 	ldr.w	r5, [r6, #-44]
    6fd0:	f142 0200 	adc.w	r2, r2, #0
    6fd4:	fba3 e505 	umull	lr, r5, r3, r5
    6fd8:	eb12 0e0e 	adds.w	lr, r2, lr
    6fdc:	f854 2c2c 	ldr.w	r2, [r4, #-44]
    6fe0:	f145 0500 	adc.w	r5, r5, #0
    6fe4:	eb12 020e 	adds.w	r2, r2, lr
    6fe8:	f844 2c2c 	str.w	r2, [r4, #-44]
        MULADDC_CORE   MULADDC_CORE
    6fec:	f856 2c28 	ldr.w	r2, [r6, #-40]
        MULADDC_CORE   MULADDC_CORE
    6ff0:	f145 0500 	adc.w	r5, r5, #0
        MULADDC_CORE   MULADDC_CORE
    6ff4:	fba3 e202 	umull	lr, r2, r3, r2
    6ff8:	eb15 0e0e 	adds.w	lr, r5, lr
    6ffc:	f854 5c28 	ldr.w	r5, [r4, #-40]
    7000:	f142 0200 	adc.w	r2, r2, #0
    7004:	eb15 050e 	adds.w	r5, r5, lr
    7008:	f844 5c28 	str.w	r5, [r4, #-40]
    700c:	f856 5c24 	ldr.w	r5, [r6, #-36]
    7010:	f142 0200 	adc.w	r2, r2, #0
    7014:	fba3 e505 	umull	lr, r5, r3, r5
    7018:	eb12 0e0e 	adds.w	lr, r2, lr
    701c:	f854 2c24 	ldr.w	r2, [r4, #-36]
    7020:	f145 0500 	adc.w	r5, r5, #0
    7024:	eb12 020e 	adds.w	r2, r2, lr
    7028:	f844 2c24 	str.w	r2, [r4, #-36]
        MULADDC_CORE   MULADDC_CORE
    702c:	f856 2c20 	ldr.w	r2, [r6, #-32]
        MULADDC_CORE   MULADDC_CORE
    7030:	f145 0500 	adc.w	r5, r5, #0
        MULADDC_CORE   MULADDC_CORE
    7034:	fba3 e202 	umull	lr, r2, r3, r2
    7038:	eb15 0e0e 	adds.w	lr, r5, lr
    703c:	f854 5c20 	ldr.w	r5, [r4, #-32]
    7040:	f142 0200 	adc.w	r2, r2, #0
    7044:	eb15 050e 	adds.w	r5, r5, lr
    7048:	f844 5c20 	str.w	r5, [r4, #-32]
    704c:	f856 5c1c 	ldr.w	r5, [r6, #-28]
    7050:	f142 0200 	adc.w	r2, r2, #0
    7054:	fba3 e505 	umull	lr, r5, r3, r5
    7058:	eb12 0e0e 	adds.w	lr, r2, lr
    705c:	f854 2c1c 	ldr.w	r2, [r4, #-28]
    7060:	f145 0500 	adc.w	r5, r5, #0
    7064:	eb12 020e 	adds.w	r2, r2, lr
    7068:	f844 2c1c 	str.w	r2, [r4, #-28]
        MULADDC_CORE   MULADDC_CORE
    706c:	f856 2c18 	ldr.w	r2, [r6, #-24]
        MULADDC_CORE   MULADDC_CORE
    7070:	f145 0500 	adc.w	r5, r5, #0
        MULADDC_CORE   MULADDC_CORE
    7074:	fba3 e202 	umull	lr, r2, r3, r2
    7078:	eb15 0e0e 	adds.w	lr, r5, lr
    707c:	f854 5c18 	ldr.w	r5, [r4, #-24]
    7080:	f142 0200 	adc.w	r2, r2, #0
    7084:	eb15 050e 	adds.w	r5, r5, lr
    7088:	f844 5c18 	str.w	r5, [r4, #-24]
    708c:	f856 5c14 	ldr.w	r5, [r6, #-20]
    7090:	f142 0200 	adc.w	r2, r2, #0
    7094:	fba3 e505 	umull	lr, r5, r3, r5
    7098:	eb12 0e0e 	adds.w	lr, r2, lr
    709c:	f854 2c14 	ldr.w	r2, [r4, #-20]
    70a0:	f145 0500 	adc.w	r5, r5, #0
    70a4:	eb12 020e 	adds.w	r2, r2, lr
    70a8:	f844 2c14 	str.w	r2, [r4, #-20]
        MULADDC_CORE   MULADDC_CORE
    70ac:	f856 2c10 	ldr.w	r2, [r6, #-16]
        MULADDC_CORE   MULADDC_CORE
    70b0:	f145 0500 	adc.w	r5, r5, #0
        MULADDC_CORE   MULADDC_CORE
    70b4:	fba3 e202 	umull	lr, r2, r3, r2
    70b8:	eb15 0e0e 	adds.w	lr, r5, lr
    70bc:	f854 5c10 	ldr.w	r5, [r4, #-16]
    70c0:	f142 0200 	adc.w	r2, r2, #0
    70c4:	eb15 050e 	adds.w	r5, r5, lr
    70c8:	f844 5c10 	str.w	r5, [r4, #-16]
    70cc:	f856 5c0c 	ldr.w	r5, [r6, #-12]
    70d0:	f142 0200 	adc.w	r2, r2, #0
    70d4:	fba3 e505 	umull	lr, r5, r3, r5
    70d8:	eb12 0e0e 	adds.w	lr, r2, lr
    70dc:	f854 2c0c 	ldr.w	r2, [r4, #-12]
    70e0:	f145 0500 	adc.w	r5, r5, #0
    70e4:	eb12 020e 	adds.w	r2, r2, lr
    70e8:	f844 2c0c 	str.w	r2, [r4, #-12]
        MULADDC_CORE   MULADDC_CORE
    70ec:	f856 2c08 	ldr.w	r2, [r6, #-8]
        MULADDC_CORE   MULADDC_CORE
    70f0:	f145 0500 	adc.w	r5, r5, #0
        MULADDC_CORE   MULADDC_CORE
    70f4:	fba3 e202 	umull	lr, r2, r3, r2
    70f8:	eb15 0e0e 	adds.w	lr, r5, lr
    70fc:	f854 5c08 	ldr.w	r5, [r4, #-8]
    7100:	f142 0200 	adc.w	r2, r2, #0
    7104:	eb15 050e 	adds.w	r5, r5, lr
    7108:	f844 5c08 	str.w	r5, [r4, #-8]
    710c:	f856 5c04 	ldr.w	r5, [r6, #-4]
    7110:	f142 0200 	adc.w	r2, r2, #0
    7114:	fba3 5e05 	umull	r5, lr, r3, r5
    7118:	1952      	adds	r2, r2, r5
    711a:	f854 5c04 	ldr.w	r5, [r4, #-4]
    711e:	f14e 0e00 	adc.w	lr, lr, #0
    7122:	18aa      	adds	r2, r5, r2
    7124:	f14e 0500 	adc.w	r5, lr, #0
    7128:	f844 2c04 	str.w	r2, [r4, #-4]
    for( ; i >= 16; i -= 16 )
    712c:	e67f      	b.n	6e2e <mpi_mul_hlp+0xc>
        MULADDC_CORE
    712e:	f856 2b04 	ldr.w	r2, [r6], #4
    7132:	fba3 2102 	umull	r2, r1, r3, r2
    7136:	18aa      	adds	r2, r5, r2
    7138:	f141 0500 	adc.w	r5, r1, #0
    713c:	6839      	ldr	r1, [r7, #0]
    713e:	1889      	adds	r1, r1, r2
    7140:	f145 0500 	adc.w	r5, r5, #0
    7144:	f847 1b04 	str.w	r1, [r7], #4
    for( ; i > 0; i-- )
    7148:	e6e8      	b.n	6f1c <mpi_mul_hlp+0xfa>
        *d += c; c = ( *d < c ); d++;
    714a:	6823      	ldr	r3, [r4, #0]
    714c:	195b      	adds	r3, r3, r5
    714e:	bf2c      	ite	cs
    7150:	2501      	movcs	r5, #1
    7152:	2500      	movcc	r5, #0
    7154:	f844 3b04 	str.w	r3, [r4], #4
    7158:	e6e4      	b.n	6f24 <mpi_mul_hlp+0x102>

0000715a <mpi_montmul>:
 *                      Note that unlike the usual convention in the library
 *                      for `const mbedtls_mpi*`, the content of T can change.
 */
static void mpi_montmul( mbedtls_mpi *A, const mbedtls_mpi *B, const mbedtls_mpi *N, mbedtls_mpi_uint mm,
                         const mbedtls_mpi *T )
{
    715a:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    715e:	468a      	mov	sl, r1
    7160:	4617      	mov	r7, r2
    7162:	b085      	sub	sp, #20
    7164:	9c0e      	ldr	r4, [sp, #56]	; 0x38
    7166:	9000      	str	r0, [sp, #0]
    size_t i, n, m;
    mbedtls_mpi_uint u0, u1, *d;

    memset( T->p, 0, T->n * ciL );
    7168:	6862      	ldr	r2, [r4, #4]
    716a:	68a0      	ldr	r0, [r4, #8]
    716c:	2100      	movs	r1, #0
    716e:	0092      	lsls	r2, r2, #2
{
    7170:	9303      	str	r3, [sp, #12]
    memset( T->p, 0, T->n * ciL );
    7172:	f7ff fa1c 	bl	65ae <memset>

    d = T->p;
    n = N->n;
    7176:	687e      	ldr	r6, [r7, #4]
    m = ( B->n < n ) ? B->n : n;
    7178:	f8da 3004 	ldr.w	r3, [sl, #4]
    d = T->p;
    717c:	68a5      	ldr	r5, [r4, #8]
    m = ( B->n < n ) ? B->n : n;
    717e:	42b3      	cmp	r3, r6
    7180:	bf28      	it	cs
    7182:	4633      	movcs	r3, r6
    d = T->p;
    7184:	46a9      	mov	r9, r5

    for( i = 0; i < n; i++ )
    7186:	f04f 0800 	mov.w	r8, #0
        u1 = ( d[0] + u0 * B->p[0] ) * mm;

        mpi_mul_hlp( m, B->p, d, u0 );
        mpi_mul_hlp( n, N->p, d, u1 );

        *d++ = u0; d[n + 1] = 0;
    718a:	1c74      	adds	r4, r6, #1
    m = ( B->n < n ) ? B->n : n;
    718c:	9301      	str	r3, [sp, #4]
        *d++ = u0; d[n + 1] = 0;
    718e:	00a4      	lsls	r4, r4, #2
        u0 = A->p[i];
    7190:	9b00      	ldr	r3, [sp, #0]
    for( i = 0; i < n; i++ )
    7192:	45b0      	cmp	r8, r6
        u0 = A->p[i];
    7194:	6898      	ldr	r0, [r3, #8]
    for( i = 0; i < n; i++ )
    7196:	d11c      	bne.n	71d2 <mpi_montmul+0x78>
    7198:	3c04      	subs	r4, #4
    719a:	4425      	add	r5, r4
     * plus N. We now potentially subtract N, avoiding leaking whether the
     * subtraction is performed through side channels. */

    /* Copy the n least significant limbs of d to A, so that
     * A = d if d < N (recall that N has n limbs). */
    memcpy( A->p, d, n * ciL );
    719c:	4622      	mov	r2, r4
    719e:	4629      	mov	r1, r5
    71a0:	f7ff f9fa 	bl	6598 <memcpy>
    mbedtls_mpi_uint c = 0, t, z;
    71a4:	2200      	movs	r2, #0
    /* If d >= N then we want to set A to d - N. To prevent timing attacks,
     * do the calculation without using conditional tests. */
    /* Set d to d0 + (2^biL)^n - N where d0 is the current value of d. */
    d[n] += 1;
    71a6:	592b      	ldr	r3, [r5, r4]
    71a8:	1f28      	subs	r0, r5, #4
    71aa:	3301      	adds	r3, #1
    71ac:	512b      	str	r3, [r5, r4]
    for( i = 0; i < n; i++ )
    71ae:	4613      	mov	r3, r2
    d[n] -= mpi_sub_hlp( n, d, d, N->p );
    71b0:	f8d7 e008 	ldr.w	lr, [r7, #8]
    for( i = 0; i < n; i++ )
    71b4:	429e      	cmp	r6, r3
    71b6:	d12b      	bne.n	7210 <mpi_montmul+0xb6>
    d[n] -= mpi_sub_hlp( n, d, d, N->p );
    71b8:	592b      	ldr	r3, [r5, r4]
     * so d[n] == 0 and we want to keep A as it is.
     * If d0 >= N then d >= (2^biL)^n, and d <= (2^biL)^n + N < 2 * (2^biL)^n
     * so d[n] == 1 and we want to set A to the result of the subtraction
     * which is d - (2^biL)^n, i.e. the n least significant limbs of d.
     * This exactly corresponds to a conditional assignment. */
    mbedtls_ct_mpi_uint_cond_assign( n, A->p, d, (unsigned char) d[n] );
    71ba:	4630      	mov	r0, r6
    d[n] -= mpi_sub_hlp( n, d, d, N->p );
    71bc:	1a9b      	subs	r3, r3, r2
    mbedtls_ct_mpi_uint_cond_assign( n, A->p, d, (unsigned char) d[n] );
    71be:	462a      	mov	r2, r5
    71c0:	9900      	ldr	r1, [sp, #0]
    d[n] -= mpi_sub_hlp( n, d, d, N->p );
    71c2:	512b      	str	r3, [r5, r4]
    mbedtls_ct_mpi_uint_cond_assign( n, A->p, d, (unsigned char) d[n] );
    71c4:	6889      	ldr	r1, [r1, #8]
    71c6:	b2db      	uxtb	r3, r3
}
    71c8:	b005      	add	sp, #20
    71ca:	e8bd 4ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    mbedtls_ct_mpi_uint_cond_assign( n, A->p, d, (unsigned char) d[n] );
    71ce:	f000 bfe5 	b.w	819c <mbedtls_ct_mpi_uint_cond_assign>
        u1 = ( d[0] + u0 * B->p[0] ) * mm;
    71d2:	f8da 1008 	ldr.w	r1, [sl, #8]
        u0 = A->p[i];
    71d6:	f850 b028 	ldr.w	fp, [r0, r8, lsl #2]
        u1 = ( d[0] + u0 * B->p[0] ) * mm;
    71da:	f8d9 3000 	ldr.w	r3, [r9]
    71de:	6808      	ldr	r0, [r1, #0]
    71e0:	9a03      	ldr	r2, [sp, #12]
    71e2:	fb00 330b 	mla	r3, r0, fp, r3
    71e6:	4353      	muls	r3, r2
        mpi_mul_hlp( m, B->p, d, u0 );
    71e8:	9801      	ldr	r0, [sp, #4]
    71ea:	464a      	mov	r2, r9
        u1 = ( d[0] + u0 * B->p[0] ) * mm;
    71ec:	9302      	str	r3, [sp, #8]
        mpi_mul_hlp( m, B->p, d, u0 );
    71ee:	465b      	mov	r3, fp
    71f0:	f7ff fe17 	bl	6e22 <mpi_mul_hlp>
        mpi_mul_hlp( n, N->p, d, u1 );
    71f4:	464a      	mov	r2, r9
    71f6:	9b02      	ldr	r3, [sp, #8]
    71f8:	4630      	mov	r0, r6
    71fa:	68b9      	ldr	r1, [r7, #8]
    71fc:	f7ff fe11 	bl	6e22 <mpi_mul_hlp>
        *d++ = u0; d[n + 1] = 0;
    7200:	2300      	movs	r3, #0
    7202:	f849 bb04 	str.w	fp, [r9], #4
    7206:	f849 3004 	str.w	r3, [r9, r4]
    for( i = 0; i < n; i++ )
    720a:	f108 0801 	add.w	r8, r8, #1
    720e:	e7bf      	b.n	7190 <mpi_montmul+0x36>
        z = ( l[i] <  c );    t = l[i] - c;
    7210:	f850 cf04 	ldr.w	ip, [r0, #4]!
        c = ( t < r[i] ) + z; d[i] = t - r[i];
    7214:	f85e 7023 	ldr.w	r7, [lr, r3, lsl #2]
        z = ( l[i] <  c );    t = l[i] - c;
    7218:	ebac 0102 	sub.w	r1, ip, r2
        c = ( t < r[i] ) + z; d[i] = t - r[i];
    721c:	42b9      	cmp	r1, r7
    721e:	bf2c      	ite	cs
    7220:	f04f 0800 	movcs.w	r8, #0
    7224:	f04f 0801 	movcc.w	r8, #1
    7228:	1bc9      	subs	r1, r1, r7
    722a:	4594      	cmp	ip, r2
    722c:	bf2c      	ite	cs
    722e:	4642      	movcs	r2, r8
    7230:	f108 0201 	addcc.w	r2, r8, #1
    7234:	6001      	str	r1, [r0, #0]
    for( i = 0; i < n; i++ )
    7236:	3301      	adds	r3, #1
    7238:	e7bc      	b.n	71b4 <mpi_montmul+0x5a>

0000723a <mpi_bigendian_to_host.part.0>:
static void mpi_bigendian_to_host( mbedtls_mpi_uint * const p, size_t limbs )
    723a:	b573      	push	{r0, r1, r4, r5, r6, lr}
    for( cur_limb_left = p, cur_limb_right = p + ( limbs - 1 );
    723c:	f101 4280 	add.w	r2, r1, #1073741824	; 0x40000000
    7240:	3a01      	subs	r2, #1
    7242:	eb00 0282 	add.w	r2, r0, r2, lsl #2
         cur_limb_left <= cur_limb_right;
    7246:	4282      	cmp	r2, r0
    7248:	d201      	bcs.n	724e <mpi_bigendian_to_host.part.0+0x14>
}
    724a:	b002      	add	sp, #8
    724c:	bd70      	pop	{r4, r5, r6, pc}
    return( mpi_uint_bigendian_to_host_c( x ) );
    724e:	6803      	ldr	r3, [r0, #0]
    mbedtls_mpi_uint tmp = 0;
    7250:	2400      	movs	r4, #0
    7252:	9301      	str	r3, [sp, #4]
        tmp             = mpi_uint_bigendian_to_host( *cur_limb_left  );
    7254:	2304      	movs	r3, #4
    for( i = 0, x_ptr = (unsigned char*) &x; i < ciL; i++, x_ptr++ )
    7256:	eb0d 0503 	add.w	r5, sp, r3
    725a:	4629      	mov	r1, r5
        tmp |= (mbedtls_mpi_uint) *x_ptr;
    725c:	f815 6b01 	ldrb.w	r6, [r5], #1
    for( i = 0, x_ptr = (unsigned char*) &x; i < ciL; i++, x_ptr++ )
    7260:	3b01      	subs	r3, #1
    7262:	f013 03ff 	ands.w	r3, r3, #255	; 0xff
        tmp |= (mbedtls_mpi_uint) *x_ptr;
    7266:	ea46 2404 	orr.w	r4, r6, r4, lsl #8
    for( i = 0, x_ptr = (unsigned char*) &x; i < ciL; i++, x_ptr++ )
    726a:	d1f7      	bne.n	725c <mpi_bigendian_to_host.part.0+0x22>
    return( mpi_uint_bigendian_to_host_c( x ) );
    726c:	6815      	ldr	r5, [r2, #0]
    726e:	9501      	str	r5, [sp, #4]
    mbedtls_mpi_uint tmp = 0;
    7270:	461d      	mov	r5, r3
    for( i = 0, x_ptr = (unsigned char*) &x; i < ciL; i++, x_ptr++ )
    7272:	3301      	adds	r3, #1
        tmp |= (mbedtls_mpi_uint) *x_ptr;
    7274:	f811 6b01 	ldrb.w	r6, [r1], #1
    for( i = 0, x_ptr = (unsigned char*) &x; i < ciL; i++, x_ptr++ )
    7278:	b2db      	uxtb	r3, r3
    727a:	2b04      	cmp	r3, #4
        tmp |= (mbedtls_mpi_uint) *x_ptr;
    727c:	ea46 2505 	orr.w	r5, r6, r5, lsl #8
    for( i = 0, x_ptr = (unsigned char*) &x; i < ciL; i++, x_ptr++ )
    7280:	d1f7      	bne.n	7272 <mpi_bigendian_to_host.part.0+0x38>
        *cur_limb_left  = mpi_uint_bigendian_to_host( *cur_limb_right );
    7282:	f840 5b04 	str.w	r5, [r0], #4
        *cur_limb_right = tmp;
    7286:	f842 4904 	str.w	r4, [r2], #-4
         cur_limb_left++, cur_limb_right-- )
    728a:	e7dc      	b.n	7246 <mpi_bigendian_to_host.part.0+0xc>

0000728c <mbedtls_mpi_init>:
    X->n = 0;
    728c:	2300      	movs	r3, #0
    728e:	2201      	movs	r2, #1
    X->p = NULL;
    7290:	6083      	str	r3, [r0, #8]
    X->n = 0;
    7292:	e9c0 2300 	strd	r2, r3, [r0]
}
    7296:	4770      	bx	lr

00007298 <mbedtls_mpi_free>:
{
    7298:	b510      	push	{r4, lr}
    if( X == NULL )
    729a:	4604      	mov	r4, r0
    729c:	b168      	cbz	r0, 72ba <mbedtls_mpi_free+0x22>
    if( X->p != NULL )
    729e:	6880      	ldr	r0, [r0, #8]
    72a0:	b130      	cbz	r0, 72b0 <mbedtls_mpi_free+0x18>
    mbedtls_platform_zeroize( v, ciL * n );
    72a2:	6861      	ldr	r1, [r4, #4]
    72a4:	0089      	lsls	r1, r1, #2
    72a6:	f7fe f929 	bl	54fc <mbedtls_platform_zeroize>
        mbedtls_free( X->p );
    72aa:	68a0      	ldr	r0, [r4, #8]
    72ac:	f7fd f8b2 	bl	4414 <mbedtls_free>
    X->n = 0;
    72b0:	2300      	movs	r3, #0
    72b2:	2201      	movs	r2, #1
    72b4:	e9c4 2300 	strd	r2, r3, [r4]
    X->p = NULL;
    72b8:	60a3      	str	r3, [r4, #8]
}
    72ba:	bd10      	pop	{r4, pc}

000072bc <mbedtls_mpi_grow>:
    if( nblimbs > MBEDTLS_MPI_MAX_LIMBS )
    72bc:	f242 7310 	movw	r3, #10000	; 0x2710
    72c0:	4299      	cmp	r1, r3
{
    72c2:	b570      	push	{r4, r5, r6, lr}
    72c4:	4604      	mov	r4, r0
    72c6:	460d      	mov	r5, r1
    if( nblimbs > MBEDTLS_MPI_MAX_LIMBS )
    72c8:	d902      	bls.n	72d0 <mbedtls_mpi_grow+0x14>
        return( MBEDTLS_ERR_MPI_ALLOC_FAILED );
    72ca:	f06f 000f 	mvn.w	r0, #15
}
    72ce:	bd70      	pop	{r4, r5, r6, pc}
    if( X->n < nblimbs )
    72d0:	6843      	ldr	r3, [r0, #4]
    72d2:	428b      	cmp	r3, r1
    72d4:	d301      	bcc.n	72da <mbedtls_mpi_grow+0x1e>
    return( 0 );
    72d6:	2000      	movs	r0, #0
    72d8:	e7f9      	b.n	72ce <mbedtls_mpi_grow+0x12>
        if( ( p = (mbedtls_mpi_uint*)mbedtls_calloc( nblimbs, ciL ) ) == NULL )
    72da:	2104      	movs	r1, #4
    72dc:	4628      	mov	r0, r5
    72de:	f7fd f893 	bl	4408 <mbedtls_calloc>
    72e2:	4606      	mov	r6, r0
    72e4:	2800      	cmp	r0, #0
    72e6:	d0f0      	beq.n	72ca <mbedtls_mpi_grow+0xe>
        if( X->p != NULL )
    72e8:	68a1      	ldr	r1, [r4, #8]
    72ea:	b159      	cbz	r1, 7304 <mbedtls_mpi_grow+0x48>
            memcpy( p, X->p, X->n * ciL );
    72ec:	6862      	ldr	r2, [r4, #4]
    72ee:	0092      	lsls	r2, r2, #2
    72f0:	f7ff f952 	bl	6598 <memcpy>
    mbedtls_platform_zeroize( v, ciL * n );
    72f4:	6861      	ldr	r1, [r4, #4]
    72f6:	68a0      	ldr	r0, [r4, #8]
    72f8:	0089      	lsls	r1, r1, #2
    72fa:	f7fe f8ff 	bl	54fc <mbedtls_platform_zeroize>
            mbedtls_free( X->p );
    72fe:	68a0      	ldr	r0, [r4, #8]
    7300:	f7fd f888 	bl	4414 <mbedtls_free>
        X->p = p;
    7304:	e9c4 5601 	strd	r5, r6, [r4, #4]
    7308:	e7e5      	b.n	72d6 <mbedtls_mpi_grow+0x1a>

0000730a <mbedtls_mpi_resize_clear>:
{
    730a:	b538      	push	{r3, r4, r5, lr}
    730c:	4604      	mov	r4, r0
    if( limbs == 0 )
    730e:	460d      	mov	r5, r1
    7310:	b919      	cbnz	r1, 731a <mbedtls_mpi_resize_clear+0x10>
        mbedtls_mpi_free( X );
    7312:	f7ff ffc1 	bl	7298 <mbedtls_mpi_free>
}
    7316:	2000      	movs	r0, #0
    7318:	bd38      	pop	{r3, r4, r5, pc}
    else if( X->n == limbs )
    731a:	6842      	ldr	r2, [r0, #4]
    731c:	428a      	cmp	r2, r1
    731e:	d107      	bne.n	7330 <mbedtls_mpi_resize_clear+0x26>
        memset( X->p, 0, limbs * ciL );
    7320:	2100      	movs	r1, #0
    7322:	6880      	ldr	r0, [r0, #8]
    7324:	0092      	lsls	r2, r2, #2
    7326:	f7ff f942 	bl	65ae <memset>
        X->s = 1;
    732a:	2301      	movs	r3, #1
    732c:	6023      	str	r3, [r4, #0]
        return( 0 );
    732e:	e7f2      	b.n	7316 <mbedtls_mpi_resize_clear+0xc>
        mbedtls_mpi_free( X );
    7330:	f7ff ffb2 	bl	7298 <mbedtls_mpi_free>
        return( mbedtls_mpi_grow( X, limbs ) );
    7334:	4629      	mov	r1, r5
    7336:	4620      	mov	r0, r4
}
    7338:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
        return( mbedtls_mpi_grow( X, limbs ) );
    733c:	f7ff bfbe 	b.w	72bc <mbedtls_mpi_grow>

00007340 <mbedtls_mpi_copy>:
    if( X == Y )
    7340:	4288      	cmp	r0, r1
{
    7342:	b570      	push	{r4, r5, r6, lr}
    7344:	4605      	mov	r5, r0
    7346:	460e      	mov	r6, r1
    if( X == Y )
    7348:	d009      	beq.n	735e <mbedtls_mpi_copy+0x1e>
    if( Y->n == 0 )
    734a:	6849      	ldr	r1, [r1, #4]
        if( X->n != 0 )
    734c:	6842      	ldr	r2, [r0, #4]
    if( Y->n == 0 )
    734e:	b941      	cbnz	r1, 7362 <mbedtls_mpi_copy+0x22>
        if( X->n != 0 )
    7350:	b12a      	cbz	r2, 735e <mbedtls_mpi_copy+0x1e>
            X->s = 1;
    7352:	2301      	movs	r3, #1
            memset( X->p, 0, X->n * ciL );
    7354:	0092      	lsls	r2, r2, #2
            X->s = 1;
    7356:	6003      	str	r3, [r0, #0]
            memset( X->p, 0, X->n * ciL );
    7358:	6880      	ldr	r0, [r0, #8]
    735a:	f7ff f928 	bl	65ae <memset>
        return( 0 );
    735e:	2000      	movs	r0, #0
}
    7360:	bd70      	pop	{r4, r5, r6, pc}
    for( i = Y->n - 1; i > 0; i-- )
    7362:	1e4c      	subs	r4, r1, #1
    7364:	b984      	cbnz	r4, 7388 <mbedtls_mpi_copy+0x48>
    X->s = Y->s;
    7366:	6833      	ldr	r3, [r6, #0]
    i++;
    7368:	3401      	adds	r4, #1
    if( X->n < i )
    736a:	4294      	cmp	r4, r2
    X->s = Y->s;
    736c:	602b      	str	r3, [r5, #0]
    if( X->n < i )
    736e:	d912      	bls.n	7396 <mbedtls_mpi_copy+0x56>
        MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, i ) );
    7370:	4621      	mov	r1, r4
    7372:	4628      	mov	r0, r5
    7374:	f7ff ffa2 	bl	72bc <mbedtls_mpi_grow>
    7378:	2800      	cmp	r0, #0
    737a:	d1f1      	bne.n	7360 <mbedtls_mpi_copy+0x20>
    memcpy( X->p, Y->p, i * ciL );
    737c:	68b1      	ldr	r1, [r6, #8]
    737e:	68a8      	ldr	r0, [r5, #8]
    7380:	00a2      	lsls	r2, r4, #2
    7382:	f7ff f909 	bl	6598 <memcpy>
    7386:	e7ea      	b.n	735e <mbedtls_mpi_copy+0x1e>
        if( Y->p[i] != 0 )
    7388:	68b3      	ldr	r3, [r6, #8]
    738a:	f853 3024 	ldr.w	r3, [r3, r4, lsl #2]
    738e:	2b00      	cmp	r3, #0
    7390:	d1e9      	bne.n	7366 <mbedtls_mpi_copy+0x26>
    for( i = Y->n - 1; i > 0; i-- )
    7392:	3c01      	subs	r4, #1
    7394:	e7e6      	b.n	7364 <mbedtls_mpi_copy+0x24>
        memset( X->p + i, 0, ( X->n - i ) * ciL );
    7396:	68a8      	ldr	r0, [r5, #8]
    7398:	1b12      	subs	r2, r2, r4
    739a:	2100      	movs	r1, #0
    739c:	0092      	lsls	r2, r2, #2
    739e:	eb00 0084 	add.w	r0, r0, r4, lsl #2
    73a2:	f7ff f904 	bl	65ae <memset>
    73a6:	e7e9      	b.n	737c <mbedtls_mpi_copy+0x3c>

000073a8 <mbedtls_mpi_lset>:
{
    73a8:	b570      	push	{r4, r5, r6, lr}
    73aa:	460e      	mov	r6, r1
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, 1 ) );
    73ac:	2101      	movs	r1, #1
{
    73ae:	4604      	mov	r4, r0
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, 1 ) );
    73b0:	f7ff ff84 	bl	72bc <mbedtls_mpi_grow>
    73b4:	4605      	mov	r5, r0
    73b6:	b988      	cbnz	r0, 73dc <mbedtls_mpi_lset+0x34>
    memset( X->p, 0, X->n * ciL );
    73b8:	6862      	ldr	r2, [r4, #4]
    73ba:	4601      	mov	r1, r0
    73bc:	0092      	lsls	r2, r2, #2
    73be:	68a0      	ldr	r0, [r4, #8]
    73c0:	f7ff f8f5 	bl	65ae <memset>
    X->p[0] = ( z < 0 ) ? -z : z;
    73c4:	68a3      	ldr	r3, [r4, #8]
    73c6:	ea86 72e6 	eor.w	r2, r6, r6, asr #31
    X->s    = ( z < 0 ) ? -1 : 1;
    73ca:	2e00      	cmp	r6, #0
    X->p[0] = ( z < 0 ) ? -z : z;
    73cc:	eba2 72e6 	sub.w	r2, r2, r6, asr #31
    73d0:	601a      	str	r2, [r3, #0]
    X->s    = ( z < 0 ) ? -1 : 1;
    73d2:	bfac      	ite	ge
    73d4:	2301      	movge	r3, #1
    73d6:	f04f 33ff 	movlt.w	r3, #4294967295
    73da:	6023      	str	r3, [r4, #0]
}
    73dc:	4628      	mov	r0, r5
    73de:	bd70      	pop	{r4, r5, r6, pc}

000073e0 <mbedtls_mpi_get_bit>:
    if( X->n * biL <= pos )
    73e0:	6843      	ldr	r3, [r0, #4]
    73e2:	ebb1 1f43 	cmp.w	r1, r3, lsl #5
    return( ( X->p[pos / biL] >> ( pos % biL ) ) & 0x01 );
    73e6:	bf3f      	itttt	cc
    73e8:	6883      	ldrcc	r3, [r0, #8]
    73ea:	094a      	lsrcc	r2, r1, #5
    73ec:	f853 0022 	ldrcc.w	r0, [r3, r2, lsl #2]
    73f0:	f001 011f 	andcc.w	r1, r1, #31
    73f4:	bf3a      	itte	cc
    73f6:	40c8      	lsrcc	r0, r1
    73f8:	f000 0001 	andcc.w	r0, r0, #1
        return( 0 );
    73fc:	2000      	movcs	r0, #0
}
    73fe:	4770      	bx	lr

00007400 <mbedtls_mpi_bitlen>:
{
    7400:	4602      	mov	r2, r0
    if( X->n == 0 )
    7402:	6840      	ldr	r0, [r0, #4]
    7404:	b198      	cbz	r0, 742e <mbedtls_mpi_bitlen+0x2e>
        if( X->p[i] != 0 )
    7406:	6892      	ldr	r2, [r2, #8]
    for( i = X->n - 1; i > 0; i-- )
    7408:	1e43      	subs	r3, r0, #1
    740a:	b98b      	cbnz	r3, 7430 <mbedtls_mpi_bitlen+0x30>
    j = biL - mbedtls_clz( X->p[i] );
    740c:	f852 1023 	ldr.w	r1, [r2, r3, lsl #2]
    for( j = 0; j < biL; j++ )
    7410:	2000      	movs	r0, #0
        if( x & mask ) break;
    7412:	2900      	cmp	r1, #0
    7414:	db08      	blt.n	7428 <mbedtls_mpi_bitlen+0x28>
    mbedtls_mpi_uint mask = (mbedtls_mpi_uint) 1 << (biL - 1);
    7416:	f04f 4200 	mov.w	r2, #2147483648	; 0x80000000
    for( j = 0; j < biL; j++ )
    741a:	3001      	adds	r0, #1
    741c:	2820      	cmp	r0, #32
        mask >>= 1;
    741e:	ea4f 0252 	mov.w	r2, r2, lsr #1
    for( j = 0; j < biL; j++ )
    7422:	d001      	beq.n	7428 <mbedtls_mpi_bitlen+0x28>
        if( x & mask ) break;
    7424:	4211      	tst	r1, r2
    7426:	d0f8      	beq.n	741a <mbedtls_mpi_bitlen+0x1a>
    return( ( i * biL ) + j );
    7428:	3301      	adds	r3, #1
    742a:	ebc0 1043 	rsb	r0, r0, r3, lsl #5
}
    742e:	4770      	bx	lr
        if( X->p[i] != 0 )
    7430:	f852 1023 	ldr.w	r1, [r2, r3, lsl #2]
    7434:	2900      	cmp	r1, #0
    7436:	d1e9      	bne.n	740c <mbedtls_mpi_bitlen+0xc>
    for( i = X->n - 1; i > 0; i-- )
    7438:	3b01      	subs	r3, #1
    743a:	e7e6      	b.n	740a <mbedtls_mpi_bitlen+0xa>

0000743c <mbedtls_mpi_size>:
{
    743c:	b508      	push	{r3, lr}
    return( ( mbedtls_mpi_bitlen( X ) + 7 ) >> 3 );
    743e:	f7ff ffdf 	bl	7400 <mbedtls_mpi_bitlen>
    7442:	3007      	adds	r0, #7
}
    7444:	08c0      	lsrs	r0, r0, #3
    7446:	bd08      	pop	{r3, pc}

00007448 <mbedtls_mpi_read_binary>:
{
    7448:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    size_t const limbs    = CHARS_TO_LIMBS( buflen );
    744c:	f012 0403 	ands.w	r4, r2, #3
    7450:	bf18      	it	ne
    7452:	2401      	movne	r4, #1
    7454:	eb04 0492 	add.w	r4, r4, r2, lsr #2
{
    7458:	4688      	mov	r8, r1
    MBEDTLS_MPI_CHK( mbedtls_mpi_resize_clear( X, limbs ) );
    745a:	4621      	mov	r1, r4
{
    745c:	4607      	mov	r7, r0
    745e:	4615      	mov	r5, r2
    MBEDTLS_MPI_CHK( mbedtls_mpi_resize_clear( X, limbs ) );
    7460:	f7ff ff53 	bl	730a <mbedtls_mpi_resize_clear>
    7464:	4606      	mov	r6, r0
    7466:	b968      	cbnz	r0, 7484 <mbedtls_mpi_read_binary+0x3c>
    if( buflen != 0 )
    7468:	b165      	cbz	r5, 7484 <mbedtls_mpi_read_binary+0x3c>
        memcpy( Xp + overhead, buf, buflen );
    746a:	68bb      	ldr	r3, [r7, #8]
    size_t const overhead = ( limbs * ciL ) - buflen;
    746c:	ebc5 0084 	rsb	r0, r5, r4, lsl #2
        memcpy( Xp + overhead, buf, buflen );
    7470:	462a      	mov	r2, r5
    7472:	4641      	mov	r1, r8
    7474:	4418      	add	r0, r3
    7476:	f7ff f88f 	bl	6598 <memcpy>
        mpi_bigendian_to_host( X->p, limbs );
    747a:	68b8      	ldr	r0, [r7, #8]
    if( limbs == 0 )
    747c:	b114      	cbz	r4, 7484 <mbedtls_mpi_read_binary+0x3c>
    747e:	4621      	mov	r1, r4
    7480:	f7ff fedb 	bl	723a <mpi_bigendian_to_host.part.0>
}
    7484:	4630      	mov	r0, r6
    7486:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

0000748a <mbedtls_mpi_write_binary>:
{
    748a:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    748c:	4604      	mov	r4, r0
    stored_bytes = X->n * ciL;
    748e:	6863      	ldr	r3, [r4, #4]
{
    7490:	4608      	mov	r0, r1
    if( stored_bytes < buflen )
    7492:	ebb2 0f83 	cmp.w	r2, r3, lsl #2
    stored_bytes = X->n * ciL;
    7496:	ea4f 0583 	mov.w	r5, r3, lsl #2
    if( stored_bytes < buflen )
    749a:	d91a      	bls.n	74d2 <mbedtls_mpi_write_binary+0x48>
        p = buf + buflen - stored_bytes;
    749c:	1b52      	subs	r2, r2, r5
    749e:	188e      	adds	r6, r1, r2
        memset( buf, 0, buflen - stored_bytes );
    74a0:	2100      	movs	r1, #0
    74a2:	f7ff f884 	bl	65ae <memset>
        p = buf + buflen - stored_bytes;
    74a6:	4630      	mov	r0, r6
    74a8:	462a      	mov	r2, r5
    for( i = 0; i < bytes_to_copy; i++ )
    74aa:	2100      	movs	r1, #0
    74ac:	1883      	adds	r3, r0, r2
    74ae:	428a      	cmp	r2, r1
    74b0:	d111      	bne.n	74d6 <mbedtls_mpi_write_binary+0x4c>
    return( 0 );
    74b2:	2000      	movs	r0, #0
}
    74b4:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
            if( GET_BYTE( X, i ) != 0 )
    74b6:	68a1      	ldr	r1, [r4, #8]
    74b8:	f023 0703 	bic.w	r7, r3, #3
    74bc:	59c9      	ldr	r1, [r1, r7]
    74be:	f003 0603 	and.w	r6, r3, #3
    74c2:	00f6      	lsls	r6, r6, #3
    74c4:	40f1      	lsrs	r1, r6
    74c6:	b2c9      	uxtb	r1, r1
    74c8:	b989      	cbnz	r1, 74ee <mbedtls_mpi_write_binary+0x64>
        for( i = bytes_to_copy; i < stored_bytes; i++ )
    74ca:	3301      	adds	r3, #1
    74cc:	42ab      	cmp	r3, r5
    74ce:	d1f2      	bne.n	74b6 <mbedtls_mpi_write_binary+0x2c>
    74d0:	e7eb      	b.n	74aa <mbedtls_mpi_write_binary+0x20>
    74d2:	4613      	mov	r3, r2
    74d4:	e7fa      	b.n	74cc <mbedtls_mpi_write_binary+0x42>
        p[bytes_to_copy - i - 1] = GET_BYTE( X, i );
    74d6:	68a6      	ldr	r6, [r4, #8]
    74d8:	f021 0003 	bic.w	r0, r1, #3
    74dc:	5830      	ldr	r0, [r6, r0]
    74de:	f001 0503 	and.w	r5, r1, #3
    74e2:	00ed      	lsls	r5, r5, #3
    74e4:	40e8      	lsrs	r0, r5
    74e6:	f803 0d01 	strb.w	r0, [r3, #-1]!
    for( i = 0; i < bytes_to_copy; i++ )
    74ea:	3101      	adds	r1, #1
    74ec:	e7df      	b.n	74ae <mbedtls_mpi_write_binary+0x24>
                return( MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL );
    74ee:	f06f 0007 	mvn.w	r0, #7
    74f2:	e7df      	b.n	74b4 <mbedtls_mpi_write_binary+0x2a>

000074f4 <mbedtls_mpi_shift_l>:
{
    74f4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    74f6:	4605      	mov	r5, r0
    74f8:	460e      	mov	r6, r1
    v0 = count / (biL    );
    74fa:	094c      	lsrs	r4, r1, #5
    t1 = count & (biL - 1);
    74fc:	f001 071f 	and.w	r7, r1, #31
    i = mbedtls_mpi_bitlen( X ) + count;
    7500:	f7ff ff7e 	bl	7400 <mbedtls_mpi_bitlen>
    if( X->n * biL < i )
    7504:	686b      	ldr	r3, [r5, #4]
    i = mbedtls_mpi_bitlen( X ) + count;
    7506:	4430      	add	r0, r6
    if( X->n * biL < i )
    7508:	ebb0 1f43 	cmp.w	r0, r3, lsl #5
    750c:	d805      	bhi.n	751a <mbedtls_mpi_shift_l+0x26>
    if( v0 > 0 )
    750e:	2e1f      	cmp	r6, #31
    7510:	d80f      	bhi.n	7532 <mbedtls_mpi_shift_l+0x3e>
    if( t1 > 0 )
    7512:	2f00      	cmp	r7, #0
    7514:	d141      	bne.n	759a <mbedtls_mpi_shift_l+0xa6>
    ret = 0;
    7516:	2000      	movs	r0, #0
    7518:	e00a      	b.n	7530 <mbedtls_mpi_shift_l+0x3c>
        MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, BITS_TO_LIMBS( i ) ) );
    751a:	f010 011f 	ands.w	r1, r0, #31
    751e:	bf18      	it	ne
    7520:	2101      	movne	r1, #1
    7522:	eb01 1150 	add.w	r1, r1, r0, lsr #5
    7526:	4628      	mov	r0, r5
    7528:	f7ff fec8 	bl	72bc <mbedtls_mpi_grow>
    752c:	2800      	cmp	r0, #0
    752e:	d0ee      	beq.n	750e <mbedtls_mpi_shift_l+0x1a>
}
    7530:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
        for( i = X->n; i > v0; i-- )
    7532:	f06f 0003 	mvn.w	r0, #3
    7536:	686b      	ldr	r3, [r5, #4]
    7538:	4360      	muls	r0, r4
    753a:	4619      	mov	r1, r3
    753c:	009a      	lsls	r2, r3, #2
    753e:	42a1      	cmp	r1, r4
    7540:	f1a2 0204 	sub.w	r2, r2, #4
    7544:	d80c      	bhi.n	7560 <mbedtls_mpi_shift_l+0x6c>
    7546:	1ae2      	subs	r2, r4, r3
    7548:	429c      	cmp	r4, r3
    754a:	bf88      	it	hi
    754c:	2200      	movhi	r2, #0
    754e:	4413      	add	r3, r2
            X->p[i - 1] = 0;
    7550:	2200      	movs	r2, #0
    7552:	009b      	lsls	r3, r3, #2
        for( ; i > 0; i-- )
    7554:	3b04      	subs	r3, #4
    7556:	1d19      	adds	r1, r3, #4
    7558:	d0db      	beq.n	7512 <mbedtls_mpi_shift_l+0x1e>
            X->p[i - 1] = 0;
    755a:	68a9      	ldr	r1, [r5, #8]
    755c:	50ca      	str	r2, [r1, r3]
        for( ; i > 0; i-- )
    755e:	e7f9      	b.n	7554 <mbedtls_mpi_shift_l+0x60>
            X->p[i - 1] = X->p[i - v0 - 1];
    7560:	68ae      	ldr	r6, [r5, #8]
        for( i = X->n; i > v0; i-- )
    7562:	3901      	subs	r1, #1
            X->p[i - 1] = X->p[i - v0 - 1];
    7564:	eb06 0c02 	add.w	ip, r6, r2
    7568:	f85c c000 	ldr.w	ip, [ip, r0]
    756c:	f846 c002 	str.w	ip, [r6, r2]
        for( i = X->n; i > v0; i-- )
    7570:	e7e5      	b.n	753e <mbedtls_mpi_shift_l+0x4a>
            r1 = X->p[i] >> (biL - t1);
    7572:	68ab      	ldr	r3, [r5, #8]
    7574:	f853 1024 	ldr.w	r1, [r3, r4, lsl #2]
            X->p[i] <<= t1;
    7578:	fa01 f007 	lsl.w	r0, r1, r7
    757c:	f843 0024 	str.w	r0, [r3, r4, lsl #2]
            X->p[i] |= r0;
    7580:	68a8      	ldr	r0, [r5, #8]
    7582:	f850 3024 	ldr.w	r3, [r0, r4, lsl #2]
    7586:	4313      	orrs	r3, r2
    7588:	f840 3024 	str.w	r3, [r0, r4, lsl #2]
            r0 = r1;
    758c:	fa21 f206 	lsr.w	r2, r1, r6
        for( i = v0; i < X->n; i++ )
    7590:	3401      	adds	r4, #1
    7592:	686b      	ldr	r3, [r5, #4]
    7594:	42a3      	cmp	r3, r4
    7596:	d8ec      	bhi.n	7572 <mbedtls_mpi_shift_l+0x7e>
    7598:	e7bd      	b.n	7516 <mbedtls_mpi_shift_l+0x22>
    mbedtls_mpi_uint r0 = 0, r1;
    759a:	2200      	movs	r2, #0
            r1 = X->p[i] >> (biL - t1);
    759c:	f1c7 0620 	rsb	r6, r7, #32
    75a0:	e7f7      	b.n	7592 <mbedtls_mpi_shift_l+0x9e>

000075a2 <mbedtls_mpi_shift_r>:
{
    75a2:	b4f0      	push	{r4, r5, r6, r7}
    if( v0 > X->n || ( v0 == X->n && v1 > 0 ) )
    75a4:	6843      	ldr	r3, [r0, #4]
    v0 = count /  biL;
    75a6:	094c      	lsrs	r4, r1, #5
    if( v0 > X->n || ( v0 == X->n && v1 > 0 ) )
    75a8:	42a3      	cmp	r3, r4
    v1 = count & (biL - 1);
    75aa:	f001 021f 	and.w	r2, r1, #31
    if( v0 > X->n || ( v0 == X->n && v1 > 0 ) )
    75ae:	d301      	bcc.n	75b4 <mbedtls_mpi_shift_r+0x12>
    75b0:	d109      	bne.n	75c6 <mbedtls_mpi_shift_r+0x24>
    75b2:	b11a      	cbz	r2, 75bc <mbedtls_mpi_shift_r+0x1a>
}
    75b4:	bcf0      	pop	{r4, r5, r6, r7}
        return mbedtls_mpi_lset( X, 0 );
    75b6:	2100      	movs	r1, #0
    75b8:	f7ff bef6 	b.w	73a8 <mbedtls_mpi_lset>
    if( v0 > 0 )
    75bc:	291f      	cmp	r1, #31
    75be:	d804      	bhi.n	75ca <mbedtls_mpi_shift_r+0x28>
}
    75c0:	bcf0      	pop	{r4, r5, r6, r7}
    75c2:	2000      	movs	r0, #0
    75c4:	4770      	bx	lr
    if( v0 > 0 )
    75c6:	291f      	cmp	r1, #31
    75c8:	d909      	bls.n	75de <mbedtls_mpi_shift_r+0x3c>
{
    75ca:	2300      	movs	r3, #0
    75cc:	00a5      	lsls	r5, r4, #2
        for( i = 0; i < X->n - v0; i++ )
    75ce:	6841      	ldr	r1, [r0, #4]
    75d0:	1b09      	subs	r1, r1, r4
    75d2:	4299      	cmp	r1, r3
    75d4:	d81b      	bhi.n	760e <mbedtls_mpi_shift_r+0x6c>
            X->p[i] = 0;
    75d6:	2400      	movs	r4, #0
        for( ; i < X->n; i++ )
    75d8:	6841      	ldr	r1, [r0, #4]
    75da:	4299      	cmp	r1, r3
    75dc:	d81e      	bhi.n	761c <mbedtls_mpi_shift_r+0x7a>
    if( v1 > 0 )
    75de:	2a00      	cmp	r2, #0
    75e0:	d0ee      	beq.n	75c0 <mbedtls_mpi_shift_r+0x1e>
    mbedtls_mpi_uint r0 = 0, r1;
    75e2:	2400      	movs	r4, #0
        for( i = X->n; i > 0; i-- )
    75e4:	6843      	ldr	r3, [r0, #4]
            r1 = X->p[i - 1] << (biL - v1);
    75e6:	f1c2 0720 	rsb	r7, r2, #32
        for( i = X->n; i > 0; i-- )
    75ea:	3b01      	subs	r3, #1
    75ec:	d3e8      	bcc.n	75c0 <mbedtls_mpi_shift_r+0x1e>
            r1 = X->p[i - 1] << (biL - v1);
    75ee:	6881      	ldr	r1, [r0, #8]
    75f0:	f851 5023 	ldr.w	r5, [r1, r3, lsl #2]
            X->p[i - 1] >>= v1;
    75f4:	fa25 f602 	lsr.w	r6, r5, r2
    75f8:	f841 6023 	str.w	r6, [r1, r3, lsl #2]
            X->p[i - 1] |= r0;
    75fc:	6886      	ldr	r6, [r0, #8]
    75fe:	f856 1023 	ldr.w	r1, [r6, r3, lsl #2]
    7602:	4321      	orrs	r1, r4
    7604:	f846 1023 	str.w	r1, [r6, r3, lsl #2]
            r0 = r1;
    7608:	fa05 f407 	lsl.w	r4, r5, r7
    760c:	e7ed      	b.n	75ea <mbedtls_mpi_shift_r+0x48>
            X->p[i] = X->p[i + v0];
    760e:	6881      	ldr	r1, [r0, #8]
    7610:	594e      	ldr	r6, [r1, r5]
    7612:	3504      	adds	r5, #4
    7614:	f841 6023 	str.w	r6, [r1, r3, lsl #2]
        for( i = 0; i < X->n - v0; i++ )
    7618:	3301      	adds	r3, #1
    761a:	e7d8      	b.n	75ce <mbedtls_mpi_shift_r+0x2c>
            X->p[i] = 0;
    761c:	6881      	ldr	r1, [r0, #8]
    761e:	f841 4023 	str.w	r4, [r1, r3, lsl #2]
        for( ; i < X->n; i++ )
    7622:	3301      	adds	r3, #1
    7624:	e7d8      	b.n	75d8 <mbedtls_mpi_shift_r+0x36>

00007626 <mbedtls_mpi_cmp_abs>:
{
    7626:	b510      	push	{r4, lr}
    for( i = X->n; i > 0; i-- )
    7628:	6842      	ldr	r2, [r0, #4]
    762a:	b93a      	cbnz	r2, 763c <mbedtls_mpi_cmp_abs+0x16>
    for( j = Y->n; j > 0; j-- )
    762c:	684b      	ldr	r3, [r1, #4]
    762e:	b973      	cbnz	r3, 764e <mbedtls_mpi_cmp_abs+0x28>
    if( i == 0 && j == 0 )
    7630:	b9b2      	cbnz	r2, 7660 <mbedtls_mpi_cmp_abs+0x3a>
    7632:	1e18      	subs	r0, r3, #0
    7634:	bf18      	it	ne
    7636:	2001      	movne	r0, #1
    7638:	4240      	negs	r0, r0
}
    763a:	bd10      	pop	{r4, pc}
        if( X->p[i - 1] != 0 )
    763c:	6883      	ldr	r3, [r0, #8]
    763e:	eb03 0382 	add.w	r3, r3, r2, lsl #2
    7642:	f853 3c04 	ldr.w	r3, [r3, #-4]
    7646:	2b00      	cmp	r3, #0
    7648:	d1f0      	bne.n	762c <mbedtls_mpi_cmp_abs+0x6>
    for( i = X->n; i > 0; i-- )
    764a:	3a01      	subs	r2, #1
    764c:	e7ed      	b.n	762a <mbedtls_mpi_cmp_abs+0x4>
        if( Y->p[j - 1] != 0 )
    764e:	688c      	ldr	r4, [r1, #8]
    7650:	eb04 0483 	add.w	r4, r4, r3, lsl #2
    7654:	f854 4c04 	ldr.w	r4, [r4, #-4]
    7658:	2c00      	cmp	r4, #0
    765a:	d1e9      	bne.n	7630 <mbedtls_mpi_cmp_abs+0xa>
    for( j = Y->n; j > 0; j-- )
    765c:	3b01      	subs	r3, #1
    765e:	e7e6      	b.n	762e <mbedtls_mpi_cmp_abs+0x8>
    if( i > j ) return(  1 );
    7660:	429a      	cmp	r2, r3
    7662:	d810      	bhi.n	7686 <mbedtls_mpi_cmp_abs+0x60>
    if( j > i ) return( -1 );
    7664:	d311      	bcc.n	768a <mbedtls_mpi_cmp_abs+0x64>
    7666:	3a01      	subs	r2, #1
        if( X->p[i - 1] > Y->p[i - 1] ) return(  1 );
    7668:	6883      	ldr	r3, [r0, #8]
    766a:	f853 4022 	ldr.w	r4, [r3, r2, lsl #2]
    766e:	688b      	ldr	r3, [r1, #8]
    7670:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
    7674:	429c      	cmp	r4, r3
    7676:	d806      	bhi.n	7686 <mbedtls_mpi_cmp_abs+0x60>
        if( X->p[i - 1] < Y->p[i - 1] ) return( -1 );
    7678:	f102 32ff 	add.w	r2, r2, #4294967295
    767c:	d305      	bcc.n	768a <mbedtls_mpi_cmp_abs+0x64>
    for( ; i > 0; i-- )
    767e:	1c53      	adds	r3, r2, #1
    7680:	d1f2      	bne.n	7668 <mbedtls_mpi_cmp_abs+0x42>
        return( 0 );
    7682:	2000      	movs	r0, #0
    7684:	e7d9      	b.n	763a <mbedtls_mpi_cmp_abs+0x14>
    if( i > j ) return(  1 );
    7686:	2001      	movs	r0, #1
    7688:	e7d7      	b.n	763a <mbedtls_mpi_cmp_abs+0x14>
    if( j > i ) return( -1 );
    768a:	f04f 30ff 	mov.w	r0, #4294967295
    768e:	e7d4      	b.n	763a <mbedtls_mpi_cmp_abs+0x14>

00007690 <mbedtls_mpi_cmp_mpi>:
{
    7690:	4602      	mov	r2, r0
    7692:	b530      	push	{r4, r5, lr}
    for( i = X->n; i > 0; i-- )
    7694:	6843      	ldr	r3, [r0, #4]
    7696:	b923      	cbnz	r3, 76a2 <mbedtls_mpi_cmp_mpi+0x12>
    for( j = Y->n; j > 0; j-- )
    7698:	6848      	ldr	r0, [r1, #4]
    769a:	b958      	cbnz	r0, 76b4 <mbedtls_mpi_cmp_mpi+0x24>
    if( i == 0 && j == 0 )
    769c:	2b00      	cmp	r3, #0
    769e:	d136      	bne.n	770e <mbedtls_mpi_cmp_mpi+0x7e>
    76a0:	e02f      	b.n	7702 <mbedtls_mpi_cmp_mpi+0x72>
        if( X->p[i - 1] != 0 )
    76a2:	6890      	ldr	r0, [r2, #8]
    76a4:	eb00 0083 	add.w	r0, r0, r3, lsl #2
    76a8:	f850 0c04 	ldr.w	r0, [r0, #-4]
    76ac:	2800      	cmp	r0, #0
    76ae:	d1f3      	bne.n	7698 <mbedtls_mpi_cmp_mpi+0x8>
    for( i = X->n; i > 0; i-- )
    76b0:	3b01      	subs	r3, #1
    76b2:	e7f0      	b.n	7696 <mbedtls_mpi_cmp_mpi+0x6>
        if( Y->p[j - 1] != 0 )
    76b4:	688c      	ldr	r4, [r1, #8]
    76b6:	eb04 0580 	add.w	r5, r4, r0, lsl #2
    76ba:	f855 5c04 	ldr.w	r5, [r5, #-4]
    76be:	bb15      	cbnz	r5, 7706 <mbedtls_mpi_cmp_mpi+0x76>
    for( j = Y->n; j > 0; j-- )
    76c0:	3801      	subs	r0, #1
    76c2:	e7ea      	b.n	769a <mbedtls_mpi_cmp_mpi+0xa>
    if( X->s > 0 && Y->s < 0 ) return(  1 );
    76c4:	680d      	ldr	r5, [r1, #0]
    if( j > i ) return( -Y->s );
    76c6:	d202      	bcs.n	76ce <mbedtls_mpi_cmp_mpi+0x3e>
    76c8:	6808      	ldr	r0, [r1, #0]
        if( X->p[i - 1] < Y->p[i - 1] ) return( -X->s );
    76ca:	4240      	negs	r0, r0
    76cc:	e020      	b.n	7710 <mbedtls_mpi_cmp_mpi+0x80>
    if( X->s > 0 && Y->s < 0 ) return(  1 );
    76ce:	6810      	ldr	r0, [r2, #0]
    76d0:	2800      	cmp	r0, #0
    76d2:	dd03      	ble.n	76dc <mbedtls_mpi_cmp_mpi+0x4c>
    76d4:	2d00      	cmp	r5, #0
    76d6:	da07      	bge.n	76e8 <mbedtls_mpi_cmp_mpi+0x58>
    76d8:	2001      	movs	r0, #1
    76da:	e019      	b.n	7710 <mbedtls_mpi_cmp_mpi+0x80>
    if( Y->s > 0 && X->s < 0 ) return( -1 );
    76dc:	2d00      	cmp	r5, #0
    76de:	dd03      	ble.n	76e8 <mbedtls_mpi_cmp_mpi+0x58>
    76e0:	b110      	cbz	r0, 76e8 <mbedtls_mpi_cmp_mpi+0x58>
    76e2:	f04f 30ff 	mov.w	r0, #4294967295
    76e6:	e013      	b.n	7710 <mbedtls_mpi_cmp_mpi+0x80>
    76e8:	3b01      	subs	r3, #1
        if( X->p[i - 1] > Y->p[i - 1] ) return(  X->s );
    76ea:	6891      	ldr	r1, [r2, #8]
    76ec:	f851 5023 	ldr.w	r5, [r1, r3, lsl #2]
    76f0:	f854 1023 	ldr.w	r1, [r4, r3, lsl #2]
    76f4:	428d      	cmp	r5, r1
    76f6:	d80b      	bhi.n	7710 <mbedtls_mpi_cmp_mpi+0x80>
        if( X->p[i - 1] < Y->p[i - 1] ) return( -X->s );
    76f8:	f103 33ff 	add.w	r3, r3, #4294967295
    76fc:	d3e5      	bcc.n	76ca <mbedtls_mpi_cmp_mpi+0x3a>
    for( ; i > 0; i-- )
    76fe:	1c59      	adds	r1, r3, #1
    7700:	d1f3      	bne.n	76ea <mbedtls_mpi_cmp_mpi+0x5a>
        return( 0 );
    7702:	2000      	movs	r0, #0
    7704:	e004      	b.n	7710 <mbedtls_mpi_cmp_mpi+0x80>
    if( i == 0 && j == 0 )
    7706:	2b00      	cmp	r3, #0
    7708:	d0de      	beq.n	76c8 <mbedtls_mpi_cmp_mpi+0x38>
    if( i > j ) return(  X->s );
    770a:	4283      	cmp	r3, r0
    770c:	d9da      	bls.n	76c4 <mbedtls_mpi_cmp_mpi+0x34>
    770e:	6810      	ldr	r0, [r2, #0]
}
    7710:	bd30      	pop	{r4, r5, pc}

00007712 <mbedtls_mpi_cmp_int>:
{
    7712:	b51f      	push	{r0, r1, r2, r3, r4, lr}
    *p  = ( z < 0 ) ? -z : z;
    7714:	ea81 73e1 	eor.w	r3, r1, r1, asr #31
    7718:	eba3 73e1 	sub.w	r3, r3, r1, asr #31
    Y.s = ( z < 0 ) ? -1 : 1;
    771c:	2900      	cmp	r1, #0
    *p  = ( z < 0 ) ? -z : z;
    771e:	9300      	str	r3, [sp, #0]
    Y.s = ( z < 0 ) ? -1 : 1;
    7720:	bfac      	ite	ge
    7722:	2301      	movge	r3, #1
    7724:	f04f 33ff 	movlt.w	r3, #4294967295
    7728:	9301      	str	r3, [sp, #4]
    Y.n = 1;
    772a:	2301      	movs	r3, #1
    return( mbedtls_mpi_cmp_mpi( X, &Y ) );
    772c:	a901      	add	r1, sp, #4
    Y.n = 1;
    772e:	9302      	str	r3, [sp, #8]
    Y.p = p;
    7730:	f8cd d00c 	str.w	sp, [sp, #12]
    return( mbedtls_mpi_cmp_mpi( X, &Y ) );
    7734:	f7ff ffac 	bl	7690 <mbedtls_mpi_cmp_mpi>
}
    7738:	b005      	add	sp, #20
    773a:	f85d fb04 	ldr.w	pc, [sp], #4

0000773e <mbedtls_mpi_add_abs>:
    if( X == B )
    773e:	4290      	cmp	r0, r2
{
    7740:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    7744:	4606      	mov	r6, r0
    7746:	460f      	mov	r7, r1
    7748:	4615      	mov	r5, r2
    if( X == B )
    774a:	d002      	beq.n	7752 <mbedtls_mpi_add_abs+0x14>
    if( X != A )
    774c:	4288      	cmp	r0, r1
    774e:	d129      	bne.n	77a4 <mbedtls_mpi_add_abs+0x66>
{
    7750:	462f      	mov	r7, r5
    X->s = 1;
    7752:	2301      	movs	r3, #1
    7754:	6033      	str	r3, [r6, #0]
    for( j = B->n; j > 0; j-- )
    7756:	687d      	ldr	r5, [r7, #4]
    7758:	bb65      	cbnz	r5, 77b4 <mbedtls_mpi_add_abs+0x76>
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, j ) );
    775a:	4629      	mov	r1, r5
    775c:	4630      	mov	r0, r6
    775e:	f7ff fdad 	bl	72bc <mbedtls_mpi_grow>
    7762:	4604      	mov	r4, r0
    7764:	bb18      	cbnz	r0, 77ae <mbedtls_mpi_add_abs+0x70>
    o = B->p; p = X->p; c = 0;
    7766:	68b3      	ldr	r3, [r6, #8]
    7768:	68b9      	ldr	r1, [r7, #8]
    776a:	469c      	mov	ip, r3
    776c:	4607      	mov	r7, r0
    for( i = 0; i < j; i++, o++, p++ )
    776e:	4285      	cmp	r5, r0
    7770:	d129      	bne.n	77c6 <mbedtls_mpi_add_abs+0x88>
    7772:	eb03 0385 	add.w	r3, r3, r5, lsl #2
    while( c != 0 )
    7776:	b1d7      	cbz	r7, 77ae <mbedtls_mpi_add_abs+0x70>
        if( i >= X->n )
    7778:	6872      	ldr	r2, [r6, #4]
            MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, i + 1 ) );
    777a:	f105 0801 	add.w	r8, r5, #1
        if( i >= X->n )
    777e:	42aa      	cmp	r2, r5
    7780:	d807      	bhi.n	7792 <mbedtls_mpi_add_abs+0x54>
            MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, i + 1 ) );
    7782:	4641      	mov	r1, r8
    7784:	4630      	mov	r0, r6
    7786:	f7ff fd99 	bl	72bc <mbedtls_mpi_grow>
    778a:	bb68      	cbnz	r0, 77e8 <mbedtls_mpi_add_abs+0xaa>
            p = X->p + i;
    778c:	68b3      	ldr	r3, [r6, #8]
    778e:	eb03 0385 	add.w	r3, r3, r5, lsl #2
        *p += c; c = ( *p < c ); i++; p++;
    7792:	681a      	ldr	r2, [r3, #0]
    7794:	4645      	mov	r5, r8
    7796:	19d2      	adds	r2, r2, r7
    7798:	bf2c      	ite	cs
    779a:	2701      	movcs	r7, #1
    779c:	2700      	movcc	r7, #0
    779e:	f843 2b04 	str.w	r2, [r3], #4
    77a2:	e7e8      	b.n	7776 <mbedtls_mpi_add_abs+0x38>
        MBEDTLS_MPI_CHK( mbedtls_mpi_copy( X, A ) );
    77a4:	f7ff fdcc 	bl	7340 <mbedtls_mpi_copy>
    77a8:	4604      	mov	r4, r0
    77aa:	2800      	cmp	r0, #0
    77ac:	d0d0      	beq.n	7750 <mbedtls_mpi_add_abs+0x12>
}
    77ae:	4620      	mov	r0, r4
    77b0:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        if( B->p[j - 1] != 0 )
    77b4:	68bb      	ldr	r3, [r7, #8]
    77b6:	eb03 0385 	add.w	r3, r3, r5, lsl #2
    77ba:	f853 3c04 	ldr.w	r3, [r3, #-4]
    77be:	2b00      	cmp	r3, #0
    77c0:	d1cb      	bne.n	775a <mbedtls_mpi_add_abs+0x1c>
    for( j = B->n; j > 0; j-- )
    77c2:	3d01      	subs	r5, #1
    77c4:	e7c8      	b.n	7758 <mbedtls_mpi_add_abs+0x1a>
        *p +=  c; c  = ( *p <  c );
    77c6:	f8dc 2000 	ldr.w	r2, [ip]
    77ca:	19d2      	adds	r2, r2, r7
    77cc:	bf2c      	ite	cs
    77ce:	f04f 0e01 	movcs.w	lr, #1
    77d2:	f04f 0e00 	movcc.w	lr, #0
        *p += tmp; c += ( *p < tmp );
    77d6:	f851 7020 	ldr.w	r7, [r1, r0, lsl #2]
    for( i = 0; i < j; i++, o++, p++ )
    77da:	3001      	adds	r0, #1
    77dc:	19d2      	adds	r2, r2, r7
        *p += tmp; c += ( *p < tmp );
    77de:	f84c 2b04 	str.w	r2, [ip], #4
    77e2:	f14e 0700 	adc.w	r7, lr, #0
    for( i = 0; i < j; i++, o++, p++ )
    77e6:	e7c2      	b.n	776e <mbedtls_mpi_add_abs+0x30>
            MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, i + 1 ) );
    77e8:	4604      	mov	r4, r0
    return( ret );
    77ea:	e7e0      	b.n	77ae <mbedtls_mpi_add_abs+0x70>

000077ec <mbedtls_mpi_sub_abs>:
{
    77ec:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    77f0:	4605      	mov	r5, r0
    77f2:	460e      	mov	r6, r1
    77f4:	4690      	mov	r8, r2
    for( n = B->n; n > 0; n-- )
    77f6:	6854      	ldr	r4, [r2, #4]
    77f8:	b93c      	cbnz	r4, 780a <mbedtls_mpi_sub_abs+0x1e>
    if( n > A->n )
    77fa:	6871      	ldr	r1, [r6, #4]
    77fc:	42a1      	cmp	r1, r4
    77fe:	d20e      	bcs.n	781e <mbedtls_mpi_sub_abs+0x32>
        ret = MBEDTLS_ERR_MPI_NEGATIVE_VALUE;
    7800:	f06f 0709 	mvn.w	r7, #9
}
    7804:	4638      	mov	r0, r7
    7806:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
        if( B->p[n - 1] != 0 )
    780a:	f8d8 3008 	ldr.w	r3, [r8, #8]
    780e:	eb03 0384 	add.w	r3, r3, r4, lsl #2
    7812:	f853 3c04 	ldr.w	r3, [r3, #-4]
    7816:	2b00      	cmp	r3, #0
    7818:	d1ef      	bne.n	77fa <mbedtls_mpi_sub_abs+0xe>
    for( n = B->n; n > 0; n-- )
    781a:	3c01      	subs	r4, #1
    781c:	e7ec      	b.n	77f8 <mbedtls_mpi_sub_abs+0xc>
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, A->n ) );
    781e:	4628      	mov	r0, r5
    7820:	f7ff fd4c 	bl	72bc <mbedtls_mpi_grow>
    7824:	4607      	mov	r7, r0
    7826:	2800      	cmp	r0, #0
    7828:	d1ec      	bne.n	7804 <mbedtls_mpi_sub_abs+0x18>
    if( A->n > n )
    782a:	6872      	ldr	r2, [r6, #4]
    782c:	42a2      	cmp	r2, r4
    782e:	d909      	bls.n	7844 <mbedtls_mpi_sub_abs+0x58>
        memcpy( X->p + n, A->p + n, ( A->n - n ) * ciL );
    7830:	68b1      	ldr	r1, [r6, #8]
    7832:	68a8      	ldr	r0, [r5, #8]
    7834:	1b12      	subs	r2, r2, r4
    7836:	0092      	lsls	r2, r2, #2
    7838:	eb01 0184 	add.w	r1, r1, r4, lsl #2
    783c:	eb00 0084 	add.w	r0, r0, r4, lsl #2
    7840:	f7fe feaa 	bl	6598 <memcpy>
    if( X->n > A->n )
    7844:	686a      	ldr	r2, [r5, #4]
    7846:	6870      	ldr	r0, [r6, #4]
    7848:	4282      	cmp	r2, r0
    784a:	d907      	bls.n	785c <mbedtls_mpi_sub_abs+0x70>
        memset( X->p + A->n, 0, ( X->n - A->n ) * ciL );
    784c:	68ab      	ldr	r3, [r5, #8]
    784e:	1a12      	subs	r2, r2, r0
    7850:	2100      	movs	r1, #0
    7852:	0092      	lsls	r2, r2, #2
    7854:	eb03 0080 	add.w	r0, r3, r0, lsl #2
    7858:	f7fe fea9 	bl	65ae <memset>
    mbedtls_mpi_uint c = 0, t, z;
    785c:	2200      	movs	r2, #0
    for( i = 0; i < n; i++ )
    785e:	4613      	mov	r3, r2
    carry = mpi_sub_hlp( n, X->p, A->p, B->p );
    7860:	f8d5 c008 	ldr.w	ip, [r5, #8]
    7864:	f8d6 e008 	ldr.w	lr, [r6, #8]
    7868:	f8d8 8008 	ldr.w	r8, [r8, #8]
    for( i = 0; i < n; i++ )
    786c:	429c      	cmp	r4, r3
    786e:	d112      	bne.n	7896 <mbedtls_mpi_sub_abs+0xaa>
    if( carry != 0 )
    7870:	b172      	cbz	r2, 7890 <mbedtls_mpi_sub_abs+0xa4>
            --X->p[n];
    7872:	f04f 31ff 	mov.w	r1, #4294967295
        for( ; n < X->n && X->p[n] == 0; n++ )
    7876:	686b      	ldr	r3, [r5, #4]
    7878:	42a3      	cmp	r3, r4
    787a:	d925      	bls.n	78c8 <mbedtls_mpi_sub_abs+0xdc>
    787c:	68ab      	ldr	r3, [r5, #8]
    787e:	f853 2024 	ldr.w	r2, [r3, r4, lsl #2]
    7882:	b1ea      	cbz	r2, 78c0 <mbedtls_mpi_sub_abs+0xd4>
        --X->p[n];
    7884:	68aa      	ldr	r2, [r5, #8]
    7886:	f852 3024 	ldr.w	r3, [r2, r4, lsl #2]
    788a:	3b01      	subs	r3, #1
    788c:	f842 3024 	str.w	r3, [r2, r4, lsl #2]
    X->s = 1;
    7890:	2301      	movs	r3, #1
    7892:	602b      	str	r3, [r5, #0]
    return( ret );
    7894:	e7b6      	b.n	7804 <mbedtls_mpi_sub_abs+0x18>
        z = ( l[i] <  c );    t = l[i] - c;
    7896:	f85e 6023 	ldr.w	r6, [lr, r3, lsl #2]
        c = ( t < r[i] ) + z; d[i] = t - r[i];
    789a:	f858 0023 	ldr.w	r0, [r8, r3, lsl #2]
        z = ( l[i] <  c );    t = l[i] - c;
    789e:	1ab1      	subs	r1, r6, r2
        c = ( t < r[i] ) + z; d[i] = t - r[i];
    78a0:	4281      	cmp	r1, r0
    78a2:	bf2c      	ite	cs
    78a4:	f04f 0900 	movcs.w	r9, #0
    78a8:	f04f 0901 	movcc.w	r9, #1
    78ac:	1a09      	subs	r1, r1, r0
    78ae:	f84c 1023 	str.w	r1, [ip, r3, lsl #2]
    78b2:	4296      	cmp	r6, r2
    78b4:	bf2c      	ite	cs
    78b6:	464a      	movcs	r2, r9
    78b8:	f109 0201 	addcc.w	r2, r9, #1
    for( i = 0; i < n; i++ )
    78bc:	3301      	adds	r3, #1
    78be:	e7d5      	b.n	786c <mbedtls_mpi_sub_abs+0x80>
            --X->p[n];
    78c0:	f843 1024 	str.w	r1, [r3, r4, lsl #2]
        for( ; n < X->n && X->p[n] == 0; n++ )
    78c4:	3401      	adds	r4, #1
    78c6:	e7d6      	b.n	7876 <mbedtls_mpi_sub_abs+0x8a>
        if( n == X->n )
    78c8:	d1dc      	bne.n	7884 <mbedtls_mpi_sub_abs+0x98>
    78ca:	e799      	b.n	7800 <mbedtls_mpi_sub_abs+0x14>

000078cc <mbedtls_mpi_add_mpi>:
{
    78cc:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    s = A->s;
    78ce:	680f      	ldr	r7, [r1, #0]
    if( A->s * B->s < 0 )
    78d0:	6813      	ldr	r3, [r2, #0]
{
    78d2:	4605      	mov	r5, r0
    if( A->s * B->s < 0 )
    78d4:	437b      	muls	r3, r7
{
    78d6:	460c      	mov	r4, r1
    78d8:	4616      	mov	r6, r2
    if( A->s * B->s < 0 )
    78da:	d516      	bpl.n	790a <mbedtls_mpi_add_mpi+0x3e>
        if( mbedtls_mpi_cmp_abs( A, B ) >= 0 )
    78dc:	4611      	mov	r1, r2
    78de:	4620      	mov	r0, r4
    78e0:	f7ff fea1 	bl	7626 <mbedtls_mpi_cmp_abs>
    78e4:	2800      	cmp	r0, #0
    78e6:	db06      	blt.n	78f6 <mbedtls_mpi_add_mpi+0x2a>
            MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( X, A, B ) );
    78e8:	4632      	mov	r2, r6
    78ea:	4621      	mov	r1, r4
    78ec:	4628      	mov	r0, r5
    78ee:	f7ff ff7d 	bl	77ec <mbedtls_mpi_sub_abs>
        MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( X, A, B ) );
    78f2:	b138      	cbz	r0, 7904 <mbedtls_mpi_add_mpi+0x38>
}
    78f4:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
            MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( X, B, A ) );
    78f6:	4622      	mov	r2, r4
    78f8:	4628      	mov	r0, r5
    78fa:	f7ff ff77 	bl	77ec <mbedtls_mpi_sub_abs>
    78fe:	2800      	cmp	r0, #0
    7900:	d1f8      	bne.n	78f4 <mbedtls_mpi_add_mpi+0x28>
            X->s = -s;
    7902:	427f      	negs	r7, r7
            MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( X, B, A ) );
    7904:	2000      	movs	r0, #0
        X->s = s;
    7906:	602f      	str	r7, [r5, #0]
    return( ret );
    7908:	e7f4      	b.n	78f4 <mbedtls_mpi_add_mpi+0x28>
        MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( X, A, B ) );
    790a:	f7ff ff18 	bl	773e <mbedtls_mpi_add_abs>
    790e:	e7f0      	b.n	78f2 <mbedtls_mpi_add_mpi+0x26>

00007910 <mbedtls_mpi_sub_mpi>:
{
    7910:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    s = A->s;
    7912:	680f      	ldr	r7, [r1, #0]
    if( A->s * B->s > 0 )
    7914:	6813      	ldr	r3, [r2, #0]
{
    7916:	4605      	mov	r5, r0
    if( A->s * B->s > 0 )
    7918:	437b      	muls	r3, r7
    791a:	2b00      	cmp	r3, #0
{
    791c:	460c      	mov	r4, r1
    791e:	4616      	mov	r6, r2
    if( A->s * B->s > 0 )
    7920:	dd16      	ble.n	7950 <mbedtls_mpi_sub_mpi+0x40>
        if( mbedtls_mpi_cmp_abs( A, B ) >= 0 )
    7922:	4611      	mov	r1, r2
    7924:	4620      	mov	r0, r4
    7926:	f7ff fe7e 	bl	7626 <mbedtls_mpi_cmp_abs>
    792a:	2800      	cmp	r0, #0
    792c:	db06      	blt.n	793c <mbedtls_mpi_sub_mpi+0x2c>
            MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( X, A, B ) );
    792e:	4632      	mov	r2, r6
    7930:	4621      	mov	r1, r4
    7932:	4628      	mov	r0, r5
    7934:	f7ff ff5a 	bl	77ec <mbedtls_mpi_sub_abs>
        MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( X, A, B ) );
    7938:	b138      	cbz	r0, 794a <mbedtls_mpi_sub_mpi+0x3a>
}
    793a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
            MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( X, B, A ) );
    793c:	4622      	mov	r2, r4
    793e:	4628      	mov	r0, r5
    7940:	f7ff ff54 	bl	77ec <mbedtls_mpi_sub_abs>
    7944:	2800      	cmp	r0, #0
    7946:	d1f8      	bne.n	793a <mbedtls_mpi_sub_mpi+0x2a>
            X->s = -s;
    7948:	427f      	negs	r7, r7
            MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( X, B, A ) );
    794a:	2000      	movs	r0, #0
        X->s = s;
    794c:	602f      	str	r7, [r5, #0]
    return( ret );
    794e:	e7f4      	b.n	793a <mbedtls_mpi_sub_mpi+0x2a>
        MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( X, A, B ) );
    7950:	f7ff fef5 	bl	773e <mbedtls_mpi_add_abs>
    7954:	e7f0      	b.n	7938 <mbedtls_mpi_sub_mpi+0x28>

00007956 <mbedtls_mpi_mul_int>:
{
    7956:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    795a:	4605      	mov	r5, r0
    795c:	460f      	mov	r7, r1
    795e:	4690      	mov	r8, r2
    size_t n = A->n;
    7960:	684e      	ldr	r6, [r1, #4]
    while( n > 0 && A->p[n - 1] == 0 )
    7962:	b146      	cbz	r6, 7976 <mbedtls_mpi_mul_int+0x20>
    7964:	68bb      	ldr	r3, [r7, #8]
    7966:	eb03 0386 	add.w	r3, r3, r6, lsl #2
    796a:	f853 3c04 	ldr.w	r3, [r3, #-4]
    796e:	b143      	cbz	r3, 7982 <mbedtls_mpi_mul_int+0x2c>
    if( b == 0 || n == 0 )
    7970:	f1b8 0f00 	cmp.w	r8, #0
    7974:	d107      	bne.n	7986 <mbedtls_mpi_mul_int+0x30>
        return( mbedtls_mpi_lset( X, 0 ) );
    7976:	4628      	mov	r0, r5
}
    7978:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
        return( mbedtls_mpi_lset( X, 0 ) );
    797c:	2100      	movs	r1, #0
    797e:	f7ff bd13 	b.w	73a8 <mbedtls_mpi_lset>
        --n;
    7982:	3e01      	subs	r6, #1
    7984:	e7ed      	b.n	7962 <mbedtls_mpi_mul_int+0xc>
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, n + 1 ) );
    7986:	4628      	mov	r0, r5
    7988:	1c71      	adds	r1, r6, #1
    798a:	f7ff fc97 	bl	72bc <mbedtls_mpi_grow>
    798e:	4604      	mov	r4, r0
    7990:	b960      	cbnz	r0, 79ac <mbedtls_mpi_mul_int+0x56>
    MBEDTLS_MPI_CHK( mbedtls_mpi_copy( X, A ) );
    7992:	4639      	mov	r1, r7
    7994:	4628      	mov	r0, r5
    7996:	f7ff fcd3 	bl	7340 <mbedtls_mpi_copy>
    799a:	4604      	mov	r4, r0
    799c:	b930      	cbnz	r0, 79ac <mbedtls_mpi_mul_int+0x56>
    mpi_mul_hlp( n, A->p, X->p, b - 1 );
    799e:	4630      	mov	r0, r6
    79a0:	68aa      	ldr	r2, [r5, #8]
    79a2:	68b9      	ldr	r1, [r7, #8]
    79a4:	f108 33ff 	add.w	r3, r8, #4294967295
    79a8:	f7ff fa3b 	bl	6e22 <mpi_mul_hlp>
}
    79ac:	4620      	mov	r0, r4
    79ae:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

000079b2 <mbedtls_mpi_div_mpi>:
{
    79b2:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    79b6:	4683      	mov	fp, r0
    79b8:	b09d      	sub	sp, #116	; 0x74
    79ba:	460f      	mov	r7, r1
    if( mbedtls_mpi_cmp_int( B, 0 ) == 0 )
    79bc:	4618      	mov	r0, r3
    79be:	2100      	movs	r1, #0
{
    79c0:	4616      	mov	r6, r2
    79c2:	9303      	str	r3, [sp, #12]
    if( mbedtls_mpi_cmp_int( B, 0 ) == 0 )
    79c4:	f7ff fea5 	bl	7712 <mbedtls_mpi_cmp_int>
    79c8:	2800      	cmp	r0, #0
    79ca:	f000 8187 	beq.w	7cdc <mbedtls_mpi_div_mpi+0x32a>
    T2.n = sizeof( TP2 ) / sizeof( *TP2 );
    79ce:	2303      	movs	r3, #3
    X->n = 0;
    79d0:	2400      	movs	r4, #0
    79d2:	2501      	movs	r5, #1
    T2.n = sizeof( TP2 ) / sizeof( *TP2 );
    79d4:	9317      	str	r3, [sp, #92]	; 0x5c
    if( mbedtls_mpi_cmp_abs( A, B ) < 0 )
    79d6:	4630      	mov	r0, r6
    T2.p = TP2;
    79d8:	ab19      	add	r3, sp, #100	; 0x64
    if( mbedtls_mpi_cmp_abs( A, B ) < 0 )
    79da:	9903      	ldr	r1, [sp, #12]
    X->n = 0;
    79dc:	e9cd 540a 	strd	r5, r4, [sp, #40]	; 0x28
    X->s = 1;
    79e0:	e9cd 450c 	strd	r4, r5, [sp, #48]	; 0x30
    X->p = NULL;
    79e4:	e9cd 440e 	strd	r4, r4, [sp, #56]	; 0x38
    X->n = 0;
    79e8:	e9cd 5410 	strd	r5, r4, [sp, #64]	; 0x40
    X->s = 1;
    79ec:	e9cd 4512 	strd	r4, r5, [sp, #72]	; 0x48
    X->p = NULL;
    79f0:	e9cd 4414 	strd	r4, r4, [sp, #80]	; 0x50
    T2.s = 1;
    79f4:	9516      	str	r5, [sp, #88]	; 0x58
    T2.p = TP2;
    79f6:	9318      	str	r3, [sp, #96]	; 0x60
    if( mbedtls_mpi_cmp_abs( A, B ) < 0 )
    79f8:	f7ff fe15 	bl	7626 <mbedtls_mpi_cmp_abs>
    79fc:	42a0      	cmp	r0, r4
    79fe:	da28      	bge.n	7a52 <mbedtls_mpi_div_mpi+0xa0>
        if( Q != NULL ) MBEDTLS_MPI_CHK( mbedtls_mpi_lset( Q, 0 ) );
    7a00:	f1bb 0f00 	cmp.w	fp, #0
    7a04:	d105      	bne.n	7a12 <mbedtls_mpi_div_mpi+0x60>
        if( R != NULL ) MBEDTLS_MPI_CHK( mbedtls_mpi_copy( R, A ) );
    7a06:	b9e7      	cbnz	r7, 7a42 <mbedtls_mpi_div_mpi+0x90>
        return( 0 );
    7a08:	2400      	movs	r4, #0
}
    7a0a:	4620      	mov	r0, r4
    7a0c:	b01d      	add	sp, #116	; 0x74
    7a0e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
        if( Q != NULL ) MBEDTLS_MPI_CHK( mbedtls_mpi_lset( Q, 0 ) );
    7a12:	4621      	mov	r1, r4
    7a14:	4658      	mov	r0, fp
    7a16:	f7ff fcc7 	bl	73a8 <mbedtls_mpi_lset>
    7a1a:	4604      	mov	r4, r0
    7a1c:	2800      	cmp	r0, #0
    7a1e:	d0f2      	beq.n	7a06 <mbedtls_mpi_div_mpi+0x54>
    mbedtls_mpi_free( &X ); mbedtls_mpi_free( &Y ); mbedtls_mpi_free( &Z );
    7a20:	a80a      	add	r0, sp, #40	; 0x28
    7a22:	f7ff fc39 	bl	7298 <mbedtls_mpi_free>
    7a26:	a80d      	add	r0, sp, #52	; 0x34
    7a28:	f7ff fc36 	bl	7298 <mbedtls_mpi_free>
    7a2c:	a810      	add	r0, sp, #64	; 0x40
    7a2e:	f7ff fc33 	bl	7298 <mbedtls_mpi_free>
    mbedtls_mpi_free( &T1 );
    7a32:	a813      	add	r0, sp, #76	; 0x4c
    7a34:	f7ff fc30 	bl	7298 <mbedtls_mpi_free>
    mbedtls_platform_zeroize( TP2, sizeof( TP2 ) );
    7a38:	210c      	movs	r1, #12
    7a3a:	a819      	add	r0, sp, #100	; 0x64
    7a3c:	f7fd fd5e 	bl	54fc <mbedtls_platform_zeroize>
    return( ret );
    7a40:	e7e3      	b.n	7a0a <mbedtls_mpi_div_mpi+0x58>
        if( R != NULL ) MBEDTLS_MPI_CHK( mbedtls_mpi_copy( R, A ) );
    7a42:	4631      	mov	r1, r6
    7a44:	4638      	mov	r0, r7
    7a46:	f7ff fc7b 	bl	7340 <mbedtls_mpi_copy>
    7a4a:	4604      	mov	r4, r0
    7a4c:	2800      	cmp	r0, #0
    7a4e:	d1e7      	bne.n	7a20 <mbedtls_mpi_div_mpi+0x6e>
    7a50:	e7da      	b.n	7a08 <mbedtls_mpi_div_mpi+0x56>
    MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &X, A ) );
    7a52:	4631      	mov	r1, r6
    7a54:	a80a      	add	r0, sp, #40	; 0x28
    7a56:	f7ff fc73 	bl	7340 <mbedtls_mpi_copy>
    7a5a:	4604      	mov	r4, r0
    7a5c:	2800      	cmp	r0, #0
    7a5e:	d1df      	bne.n	7a20 <mbedtls_mpi_div_mpi+0x6e>
    MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &Y, B ) );
    7a60:	9903      	ldr	r1, [sp, #12]
    7a62:	a80d      	add	r0, sp, #52	; 0x34
    7a64:	f7ff fc6c 	bl	7340 <mbedtls_mpi_copy>
    7a68:	4604      	mov	r4, r0
    7a6a:	2800      	cmp	r0, #0
    7a6c:	d1d8      	bne.n	7a20 <mbedtls_mpi_div_mpi+0x6e>
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &Z, A->n + 2 ) );
    7a6e:	6871      	ldr	r1, [r6, #4]
    7a70:	a810      	add	r0, sp, #64	; 0x40
    7a72:	3102      	adds	r1, #2
    X.s = Y.s = 1;
    7a74:	950d      	str	r5, [sp, #52]	; 0x34
    7a76:	950a      	str	r5, [sp, #40]	; 0x28
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &Z, A->n + 2 ) );
    7a78:	f7ff fc20 	bl	72bc <mbedtls_mpi_grow>
    7a7c:	4604      	mov	r4, r0
    7a7e:	2800      	cmp	r0, #0
    7a80:	d1ce      	bne.n	7a20 <mbedtls_mpi_div_mpi+0x6e>
    MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &Z,  0 ) );
    7a82:	4601      	mov	r1, r0
    7a84:	a810      	add	r0, sp, #64	; 0x40
    7a86:	f7ff fc8f 	bl	73a8 <mbedtls_mpi_lset>
    7a8a:	4604      	mov	r4, r0
    7a8c:	2800      	cmp	r0, #0
    7a8e:	d1c7      	bne.n	7a20 <mbedtls_mpi_div_mpi+0x6e>
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &T1, A->n + 2 ) );
    7a90:	6871      	ldr	r1, [r6, #4]
    7a92:	a813      	add	r0, sp, #76	; 0x4c
    7a94:	3102      	adds	r1, #2
    7a96:	f7ff fc11 	bl	72bc <mbedtls_mpi_grow>
    7a9a:	4604      	mov	r4, r0
    7a9c:	2800      	cmp	r0, #0
    7a9e:	d1bf      	bne.n	7a20 <mbedtls_mpi_div_mpi+0x6e>
    k = mbedtls_mpi_bitlen( &Y ) % biL;
    7aa0:	a80d      	add	r0, sp, #52	; 0x34
    7aa2:	f7ff fcad 	bl	7400 <mbedtls_mpi_bitlen>
    7aa6:	f000 001f 	and.w	r0, r0, #31
    if( k < biL - 1 )
    7aaa:	281f      	cmp	r0, #31
    7aac:	d070      	beq.n	7b90 <mbedtls_mpi_div_mpi+0x1de>
        k = biL - 1 - k;
    7aae:	f1c0 031f 	rsb	r3, r0, #31
        MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &X, k ) );
    7ab2:	4619      	mov	r1, r3
    7ab4:	a80a      	add	r0, sp, #40	; 0x28
        k = biL - 1 - k;
    7ab6:	9301      	str	r3, [sp, #4]
        MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &X, k ) );
    7ab8:	f7ff fd1c 	bl	74f4 <mbedtls_mpi_shift_l>
    7abc:	4604      	mov	r4, r0
    7abe:	2800      	cmp	r0, #0
    7ac0:	d1ae      	bne.n	7a20 <mbedtls_mpi_div_mpi+0x6e>
        MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &Y, k ) );
    7ac2:	9901      	ldr	r1, [sp, #4]
    7ac4:	a80d      	add	r0, sp, #52	; 0x34
    7ac6:	f7ff fd15 	bl	74f4 <mbedtls_mpi_shift_l>
    7aca:	4604      	mov	r4, r0
    7acc:	2800      	cmp	r0, #0
    7ace:	d1a7      	bne.n	7a20 <mbedtls_mpi_div_mpi+0x6e>
    n = X.n - 1;
    7ad0:	9d0b      	ldr	r5, [sp, #44]	; 0x2c
    t = Y.n - 1;
    7ad2:	f8dd 8038 	ldr.w	r8, [sp, #56]	; 0x38
    MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &Y, biL * ( n - t ) ) );
    7ad6:	a80d      	add	r0, sp, #52	; 0x34
    7ad8:	eba5 0a08 	sub.w	sl, r5, r8
    7adc:	ea4f 194a 	mov.w	r9, sl, lsl #5
    7ae0:	4649      	mov	r1, r9
    7ae2:	f7ff fd07 	bl	74f4 <mbedtls_mpi_shift_l>
    7ae6:	4604      	mov	r4, r0
    7ae8:	2800      	cmp	r0, #0
    7aea:	d199      	bne.n	7a20 <mbedtls_mpi_div_mpi+0x6e>
        Z.p[n - t]++;
    7aec:	ea4f 0a8a 	mov.w	sl, sl, lsl #2
    while( mbedtls_mpi_cmp_mpi( &X, &Y ) >= 0 )
    7af0:	a90d      	add	r1, sp, #52	; 0x34
    7af2:	a80a      	add	r0, sp, #40	; 0x28
    7af4:	f7ff fdcc 	bl	7690 <mbedtls_mpi_cmp_mpi>
    7af8:	2800      	cmp	r0, #0
    7afa:	da4b      	bge.n	7b94 <mbedtls_mpi_div_mpi+0x1e2>
    MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &Y, biL * ( n - t ) ) );
    7afc:	4649      	mov	r1, r9
    7afe:	a80d      	add	r0, sp, #52	; 0x34
    7b00:	f7ff fd4f 	bl	75a2 <mbedtls_mpi_shift_r>
    7b04:	4604      	mov	r4, r0
    7b06:	2800      	cmp	r0, #0
    7b08:	d18a      	bne.n	7a20 <mbedtls_mpi_div_mpi+0x6e>
    t = Y.n - 1;
    7b0a:	f108 33ff 	add.w	r3, r8, #4294967295
    7b0e:	9305      	str	r3, [sp, #20]
        if( X.p[i] >= Y.p[t] )
    7b10:	009b      	lsls	r3, r3, #2
    n = X.n - 1;
    7b12:	f105 3aff 	add.w	sl, r5, #4294967295
        if( X.p[i] >= Y.p[t] )
    7b16:	9306      	str	r3, [sp, #24]
    7b18:	f105 4580 	add.w	r5, r5, #1073741824	; 0x40000000
            T1.p[0] = ( t < 1 ) ? 0 : Y.p[t - 1];
    7b1c:	f108 4380 	add.w	r3, r8, #1073741824	; 0x40000000
    7b20:	3b02      	subs	r3, #2
    7b22:	3d01      	subs	r5, #1
    7b24:	009b      	lsls	r3, r3, #2
    7b26:	eba5 0508 	sub.w	r5, r5, r8
    7b2a:	9308      	str	r3, [sp, #32]
    7b2c:	00ab      	lsls	r3, r5, #2
    7b2e:	9302      	str	r3, [sp, #8]
    for( i = n; i > t ; i-- )
    7b30:	9b05      	ldr	r3, [sp, #20]
    7b32:	459a      	cmp	sl, r3
    7b34:	d83d      	bhi.n	7bb2 <mbedtls_mpi_div_mpi+0x200>
    if( Q != NULL )
    7b36:	f1bb 0f00 	cmp.w	fp, #0
    7b3a:	d00c      	beq.n	7b56 <mbedtls_mpi_div_mpi+0x1a4>
        MBEDTLS_MPI_CHK( mbedtls_mpi_copy( Q, &Z ) );
    7b3c:	4658      	mov	r0, fp
    7b3e:	a910      	add	r1, sp, #64	; 0x40
    7b40:	f7ff fbfe 	bl	7340 <mbedtls_mpi_copy>
    7b44:	2800      	cmp	r0, #0
    7b46:	f040 80c5 	bne.w	7cd4 <mbedtls_mpi_div_mpi+0x322>
        Q->s = A->s * B->s;
    7b4a:	9a03      	ldr	r2, [sp, #12]
    7b4c:	6833      	ldr	r3, [r6, #0]
    7b4e:	6812      	ldr	r2, [r2, #0]
    7b50:	4353      	muls	r3, r2
    7b52:	f8cb 3000 	str.w	r3, [fp]
    if( R != NULL )
    7b56:	2f00      	cmp	r7, #0
    7b58:	f43f af62 	beq.w	7a20 <mbedtls_mpi_div_mpi+0x6e>
        MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &X, k ) );
    7b5c:	9901      	ldr	r1, [sp, #4]
    7b5e:	a80a      	add	r0, sp, #40	; 0x28
    7b60:	f7ff fd1f 	bl	75a2 <mbedtls_mpi_shift_r>
    7b64:	2800      	cmp	r0, #0
    7b66:	f040 80b5 	bne.w	7cd4 <mbedtls_mpi_div_mpi+0x322>
        X.s = A->s;
    7b6a:	6833      	ldr	r3, [r6, #0]
        MBEDTLS_MPI_CHK( mbedtls_mpi_copy( R, &X ) );
    7b6c:	a90a      	add	r1, sp, #40	; 0x28
    7b6e:	4638      	mov	r0, r7
        X.s = A->s;
    7b70:	930a      	str	r3, [sp, #40]	; 0x28
        MBEDTLS_MPI_CHK( mbedtls_mpi_copy( R, &X ) );
    7b72:	f7ff fbe5 	bl	7340 <mbedtls_mpi_copy>
    7b76:	4601      	mov	r1, r0
    7b78:	2800      	cmp	r0, #0
    7b7a:	f040 80ad 	bne.w	7cd8 <mbedtls_mpi_div_mpi+0x326>
        if( mbedtls_mpi_cmp_int( R, 0 ) == 0 )
    7b7e:	4638      	mov	r0, r7
    7b80:	f7ff fdc7 	bl	7712 <mbedtls_mpi_cmp_int>
    7b84:	2800      	cmp	r0, #0
    7b86:	f47f af4b 	bne.w	7a20 <mbedtls_mpi_div_mpi+0x6e>
            R->s = 1;
    7b8a:	2301      	movs	r3, #1
    7b8c:	603b      	str	r3, [r7, #0]
    7b8e:	e747      	b.n	7a20 <mbedtls_mpi_div_mpi+0x6e>
    else k = 0;
    7b90:	9401      	str	r4, [sp, #4]
    7b92:	e79d      	b.n	7ad0 <mbedtls_mpi_div_mpi+0x11e>
        Z.p[n - t]++;
    7b94:	9a12      	ldr	r2, [sp, #72]	; 0x48
        MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &X, &X, &Y ) );
    7b96:	a90a      	add	r1, sp, #40	; 0x28
        Z.p[n - t]++;
    7b98:	f852 300a 	ldr.w	r3, [r2, sl]
        MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &X, &X, &Y ) );
    7b9c:	4608      	mov	r0, r1
        Z.p[n - t]++;
    7b9e:	3301      	adds	r3, #1
    7ba0:	f842 300a 	str.w	r3, [r2, sl]
        MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &X, &X, &Y ) );
    7ba4:	aa0d      	add	r2, sp, #52	; 0x34
    7ba6:	f7ff feb3 	bl	7910 <mbedtls_mpi_sub_mpi>
    7baa:	4604      	mov	r4, r0
    7bac:	2800      	cmp	r0, #0
    7bae:	d09f      	beq.n	7af0 <mbedtls_mpi_div_mpi+0x13e>
    7bb0:	e736      	b.n	7a20 <mbedtls_mpi_div_mpi+0x6e>
        if( X.p[i] >= Y.p[t] )
    7bb2:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
    7bb4:	9a06      	ldr	r2, [sp, #24]
    7bb6:	9304      	str	r3, [sp, #16]
    7bb8:	4413      	add	r3, r2
    7bba:	f8dd 9030 	ldr.w	r9, [sp, #48]	; 0x30
    7bbe:	9307      	str	r3, [sp, #28]
    7bc0:	9b04      	ldr	r3, [sp, #16]
    7bc2:	ea4f 088a 	mov.w	r8, sl, lsl #2
    7bc6:	589a      	ldr	r2, [r3, r2]
    7bc8:	f859 102a 	ldr.w	r1, [r9, sl, lsl #2]
            Z.p[i - t - 1] = mbedtls_int_div_int( X.p[i], X.p[i - 1],
    7bcc:	f1a8 0304 	sub.w	r3, r8, #4
            Z.p[i - t - 1] = ~0;
    7bd0:	9d12      	ldr	r5, [sp, #72]	; 0x48
            Z.p[i - t - 1] = mbedtls_int_div_int( X.p[i], X.p[i - 1],
    7bd2:	9309      	str	r3, [sp, #36]	; 0x24
            Z.p[i - t - 1] = ~0;
    7bd4:	9b02      	ldr	r3, [sp, #8]
        if( X.p[i] >= Y.p[t] )
    7bd6:	4291      	cmp	r1, r2
            Z.p[i - t - 1] = ~0;
    7bd8:	441d      	add	r5, r3
        if( X.p[i] >= Y.p[t] )
    7bda:	d276      	bcs.n	7cca <mbedtls_mpi_div_mpi+0x318>
    quotient = dividend / d;
    7bdc:	f1a8 0004 	sub.w	r0, r8, #4
    7be0:	2300      	movs	r3, #0
    7be2:	f859 0000 	ldr.w	r0, [r9, r0]
    7be6:	f7f8 faad 	bl	144 <__aeabi_uldivmod>
    if( quotient > ( (mbedtls_t_udbl) 1 << biL ) - 1 )
    7bea:	2900      	cmp	r1, #0
    7bec:	bf14      	ite	ne
    7bee:	f04f 33ff 	movne.w	r3, #4294967295
    7bf2:	4603      	moveq	r3, r0
        T2.p[0] = ( i < 2 ) ? 0 : X.p[i - 2];
    7bf4:	f1ba 0f01 	cmp.w	sl, #1
            Z.p[i - t - 1] = ~0;
    7bf8:	602b      	str	r3, [r5, #0]
        T2.p[0] = ( i < 2 ) ? 0 : X.p[i - 2];
    7bfa:	bf0e      	itee	eq
    7bfc:	2300      	moveq	r3, #0
    7bfe:	eb09 0308 	addne.w	r3, r9, r8
    7c02:	f853 3c08 	ldrne.w	r3, [r3, #-8]
    7c06:	9319      	str	r3, [sp, #100]	; 0x64
        T2.p[1] = ( i < 1 ) ? 0 : X.p[i - 1];
    7c08:	f1a8 0304 	sub.w	r3, r8, #4
    7c0c:	f859 3003 	ldr.w	r3, [r9, r3]
    7c10:	931a      	str	r3, [sp, #104]	; 0x68
        T2.p[2] = X.p[i];
    7c12:	f859 3008 	ldr.w	r3, [r9, r8]
            T1.p[0] = ( t < 1 ) ? 0 : Y.p[t - 1];
    7c16:	f8dd 8010 	ldr.w	r8, [sp, #16]
        T2.p[2] = X.p[i];
    7c1a:	931b      	str	r3, [sp, #108]	; 0x6c
        Z.p[i - t - 1]++;
    7c1c:	682b      	ldr	r3, [r5, #0]
    7c1e:	3301      	adds	r3, #1
    7c20:	602b      	str	r3, [r5, #0]
            T1.p[0] = ( t < 1 ) ? 0 : Y.p[t - 1];
    7c22:	9b08      	ldr	r3, [sp, #32]
    7c24:	4498      	add	r8, r3
            Z.p[i - t - 1]--;
    7c26:	682b      	ldr	r3, [r5, #0]
            MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &T1, 0 ) );
    7c28:	2100      	movs	r1, #0
            Z.p[i - t - 1]--;
    7c2a:	3b01      	subs	r3, #1
    7c2c:	602b      	str	r3, [r5, #0]
            MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &T1, 0 ) );
    7c2e:	a813      	add	r0, sp, #76	; 0x4c
    7c30:	f7ff fbba 	bl	73a8 <mbedtls_mpi_lset>
    7c34:	2800      	cmp	r0, #0
    7c36:	d14d      	bne.n	7cd4 <mbedtls_mpi_div_mpi+0x322>
            T1.p[0] = ( t < 1 ) ? 0 : Y.p[t - 1];
    7c38:	9b05      	ldr	r3, [sp, #20]
    7c3a:	2b00      	cmp	r3, #0
    7c3c:	d048      	beq.n	7cd0 <mbedtls_mpi_div_mpi+0x31e>
    7c3e:	f8d8 2000 	ldr.w	r2, [r8]
    7c42:	9b15      	ldr	r3, [sp, #84]	; 0x54
            MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &T1, &T1, Z.p[i - t - 1] ) );
    7c44:	a913      	add	r1, sp, #76	; 0x4c
            T1.p[0] = ( t < 1 ) ? 0 : Y.p[t - 1];
    7c46:	601a      	str	r2, [r3, #0]
            T1.p[1] = Y.p[t];
    7c48:	9a07      	ldr	r2, [sp, #28]
            MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &T1, &T1, Z.p[i - t - 1] ) );
    7c4a:	4608      	mov	r0, r1
            T1.p[1] = Y.p[t];
    7c4c:	6812      	ldr	r2, [r2, #0]
    7c4e:	605a      	str	r2, [r3, #4]
            MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &T1, &T1, Z.p[i - t - 1] ) );
    7c50:	682a      	ldr	r2, [r5, #0]
    7c52:	f7ff fe80 	bl	7956 <mbedtls_mpi_mul_int>
    7c56:	2800      	cmp	r0, #0
    7c58:	d13c      	bne.n	7cd4 <mbedtls_mpi_div_mpi+0x322>
        while( mbedtls_mpi_cmp_mpi( &T1, &T2 ) > 0 );
    7c5a:	a916      	add	r1, sp, #88	; 0x58
    7c5c:	a813      	add	r0, sp, #76	; 0x4c
    7c5e:	f7ff fd17 	bl	7690 <mbedtls_mpi_cmp_mpi>
    7c62:	2800      	cmp	r0, #0
    7c64:	dcdf      	bgt.n	7c26 <mbedtls_mpi_div_mpi+0x274>
        MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &T1, &Y, Z.p[i - t - 1] ) );
    7c66:	682a      	ldr	r2, [r5, #0]
    7c68:	a90d      	add	r1, sp, #52	; 0x34
    7c6a:	a813      	add	r0, sp, #76	; 0x4c
    7c6c:	f7ff fe73 	bl	7956 <mbedtls_mpi_mul_int>
    7c70:	bb80      	cbnz	r0, 7cd4 <mbedtls_mpi_div_mpi+0x322>
        MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &T1,  biL * ( i - t - 1 ) ) );
    7c72:	9b02      	ldr	r3, [sp, #8]
    7c74:	a813      	add	r0, sp, #76	; 0x4c
    7c76:	ea4f 08c3 	mov.w	r8, r3, lsl #3
    7c7a:	4641      	mov	r1, r8
    7c7c:	f7ff fc3a 	bl	74f4 <mbedtls_mpi_shift_l>
    7c80:	bb40      	cbnz	r0, 7cd4 <mbedtls_mpi_div_mpi+0x322>
        MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &X, &X, &T1 ) );
    7c82:	a90a      	add	r1, sp, #40	; 0x28
    7c84:	4608      	mov	r0, r1
    7c86:	aa13      	add	r2, sp, #76	; 0x4c
    7c88:	f7ff fe42 	bl	7910 <mbedtls_mpi_sub_mpi>
    7c8c:	4601      	mov	r1, r0
    7c8e:	bb18      	cbnz	r0, 7cd8 <mbedtls_mpi_div_mpi+0x326>
        if( mbedtls_mpi_cmp_int( &X, 0 ) < 0 )
    7c90:	a80a      	add	r0, sp, #40	; 0x28
    7c92:	f7ff fd3e 	bl	7712 <mbedtls_mpi_cmp_int>
    7c96:	2800      	cmp	r0, #0
    7c98:	da12      	bge.n	7cc0 <mbedtls_mpi_div_mpi+0x30e>
            MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &T1, &Y ) );
    7c9a:	a90d      	add	r1, sp, #52	; 0x34
    7c9c:	a813      	add	r0, sp, #76	; 0x4c
    7c9e:	f7ff fb4f 	bl	7340 <mbedtls_mpi_copy>
    7ca2:	b9b8      	cbnz	r0, 7cd4 <mbedtls_mpi_div_mpi+0x322>
            MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &T1, biL * ( i - t - 1 ) ) );
    7ca4:	4641      	mov	r1, r8
    7ca6:	a813      	add	r0, sp, #76	; 0x4c
    7ca8:	f7ff fc24 	bl	74f4 <mbedtls_mpi_shift_l>
    7cac:	b990      	cbnz	r0, 7cd4 <mbedtls_mpi_div_mpi+0x322>
            MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &X, &X, &T1 ) );
    7cae:	a90a      	add	r1, sp, #40	; 0x28
    7cb0:	4608      	mov	r0, r1
    7cb2:	aa13      	add	r2, sp, #76	; 0x4c
    7cb4:	f7ff fe0a 	bl	78cc <mbedtls_mpi_add_mpi>
    7cb8:	b960      	cbnz	r0, 7cd4 <mbedtls_mpi_div_mpi+0x322>
            Z.p[i - t - 1]--;
    7cba:	682b      	ldr	r3, [r5, #0]
    7cbc:	3b01      	subs	r3, #1
    7cbe:	602b      	str	r3, [r5, #0]
    for( i = n; i > t ; i-- )
    7cc0:	9b02      	ldr	r3, [sp, #8]
    7cc2:	f10a 3aff 	add.w	sl, sl, #4294967295
    7cc6:	3b04      	subs	r3, #4
    7cc8:	e731      	b.n	7b2e <mbedtls_mpi_div_mpi+0x17c>
    7cca:	f04f 33ff 	mov.w	r3, #4294967295
    7cce:	e791      	b.n	7bf4 <mbedtls_mpi_div_mpi+0x242>
            T1.p[0] = ( t < 1 ) ? 0 : Y.p[t - 1];
    7cd0:	9a05      	ldr	r2, [sp, #20]
    7cd2:	e7b6      	b.n	7c42 <mbedtls_mpi_div_mpi+0x290>
    7cd4:	4604      	mov	r4, r0
    7cd6:	e6a3      	b.n	7a20 <mbedtls_mpi_div_mpi+0x6e>
    7cd8:	460c      	mov	r4, r1
    7cda:	e6a1      	b.n	7a20 <mbedtls_mpi_div_mpi+0x6e>
        return( MBEDTLS_ERR_MPI_DIVISION_BY_ZERO );
    7cdc:	f06f 040b 	mvn.w	r4, #11
    7ce0:	e693      	b.n	7a0a <mbedtls_mpi_div_mpi+0x58>

00007ce2 <mbedtls_mpi_mod_mpi>:
{
    7ce2:	b570      	push	{r4, r5, r6, lr}
    7ce4:	4604      	mov	r4, r0
    7ce6:	460d      	mov	r5, r1
    if( mbedtls_mpi_cmp_int( B, 0 ) < 0 )
    7ce8:	4610      	mov	r0, r2
    7cea:	2100      	movs	r1, #0
{
    7cec:	4616      	mov	r6, r2
    if( mbedtls_mpi_cmp_int( B, 0 ) < 0 )
    7cee:	f7ff fd10 	bl	7712 <mbedtls_mpi_cmp_int>
    7cf2:	2800      	cmp	r0, #0
    7cf4:	db24      	blt.n	7d40 <mbedtls_mpi_mod_mpi+0x5e>
    MBEDTLS_MPI_CHK( mbedtls_mpi_div_mpi( NULL, R, A, B ) );
    7cf6:	462a      	mov	r2, r5
    7cf8:	4633      	mov	r3, r6
    7cfa:	4621      	mov	r1, r4
    7cfc:	2000      	movs	r0, #0
    7cfe:	f7ff fe58 	bl	79b2 <mbedtls_mpi_div_mpi>
    7d02:	4605      	mov	r5, r0
    7d04:	b138      	cbz	r0, 7d16 <mbedtls_mpi_mod_mpi+0x34>
}
    7d06:	4628      	mov	r0, r5
    7d08:	bd70      	pop	{r4, r5, r6, pc}
      MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( R, R, B ) );
    7d0a:	4632      	mov	r2, r6
    7d0c:	4621      	mov	r1, r4
    7d0e:	4620      	mov	r0, r4
    7d10:	f7ff fddc 	bl	78cc <mbedtls_mpi_add_mpi>
    7d14:	b990      	cbnz	r0, 7d3c <mbedtls_mpi_mod_mpi+0x5a>
    while( mbedtls_mpi_cmp_int( R, 0 ) < 0 )
    7d16:	2100      	movs	r1, #0
    7d18:	4620      	mov	r0, r4
    7d1a:	f7ff fcfa 	bl	7712 <mbedtls_mpi_cmp_int>
    7d1e:	2800      	cmp	r0, #0
    7d20:	dbf3      	blt.n	7d0a <mbedtls_mpi_mod_mpi+0x28>
    while( mbedtls_mpi_cmp_mpi( R, B ) >= 0 )
    7d22:	4631      	mov	r1, r6
    7d24:	4620      	mov	r0, r4
    7d26:	f7ff fcb3 	bl	7690 <mbedtls_mpi_cmp_mpi>
    7d2a:	2800      	cmp	r0, #0
    7d2c:	dbeb      	blt.n	7d06 <mbedtls_mpi_mod_mpi+0x24>
      MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( R, R, B ) );
    7d2e:	4632      	mov	r2, r6
    7d30:	4621      	mov	r1, r4
    7d32:	4620      	mov	r0, r4
    7d34:	f7ff fdec 	bl	7910 <mbedtls_mpi_sub_mpi>
    7d38:	2800      	cmp	r0, #0
    7d3a:	d0f2      	beq.n	7d22 <mbedtls_mpi_mod_mpi+0x40>
    7d3c:	4605      	mov	r5, r0
    7d3e:	e7e2      	b.n	7d06 <mbedtls_mpi_mod_mpi+0x24>
        return( MBEDTLS_ERR_MPI_NEGATIVE_VALUE );
    7d40:	f06f 0509 	mvn.w	r5, #9
    7d44:	e7df      	b.n	7d06 <mbedtls_mpi_mod_mpi+0x24>

00007d46 <mbedtls_mpi_exp_mod>:
 * Sliding-window exponentiation: X = A^E mod N  (HAC 14.85)
 */
int mbedtls_mpi_exp_mod( mbedtls_mpi *X, const mbedtls_mpi *A,
                         const mbedtls_mpi *E, const mbedtls_mpi *N,
                         mbedtls_mpi *prec_RR )
{
    7d46:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    7d4a:	4606      	mov	r6, r0
    7d4c:	f5ad 7d5b 	sub.w	sp, sp, #876	; 0x36c
    7d50:	4689      	mov	r9, r1
    MPI_VALIDATE_RET( X != NULL );
    MPI_VALIDATE_RET( A != NULL );
    MPI_VALIDATE_RET( E != NULL );
    MPI_VALIDATE_RET( N != NULL );

    if( mbedtls_mpi_cmp_int( N, 0 ) <= 0 || ( N->p[0] & 1 ) == 0 )
    7d52:	4618      	mov	r0, r3
    7d54:	2100      	movs	r1, #0
{
    7d56:	461d      	mov	r5, r3
    7d58:	9205      	str	r2, [sp, #20]
    if( mbedtls_mpi_cmp_int( N, 0 ) <= 0 || ( N->p[0] & 1 ) == 0 )
    7d5a:	f7ff fcda 	bl	7712 <mbedtls_mpi_cmp_int>
    7d5e:	2800      	cmp	r0, #0
    7d60:	f340 8213 	ble.w	818a <CONFIG_FPROTECT_BLOCK_SIZE+0x18a>
    7d64:	68ab      	ldr	r3, [r5, #8]
    7d66:	681c      	ldr	r4, [r3, #0]
    7d68:	f014 0301 	ands.w	r3, r4, #1
    7d6c:	9308      	str	r3, [sp, #32]
    7d6e:	f000 820c 	beq.w	818a <CONFIG_FPROTECT_BLOCK_SIZE+0x18a>
        return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA );

    if( mbedtls_mpi_cmp_int( E, 0 ) < 0 )
    7d72:	2100      	movs	r1, #0
    7d74:	9805      	ldr	r0, [sp, #20]
    7d76:	f7ff fccc 	bl	7712 <mbedtls_mpi_cmp_int>
    7d7a:	2800      	cmp	r0, #0
    7d7c:	f2c0 8205 	blt.w	818a <CONFIG_FPROTECT_BLOCK_SIZE+0x18a>
        return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA );

    if( mbedtls_mpi_bitlen( E ) > MBEDTLS_MPI_MAX_BITS ||
    7d80:	9805      	ldr	r0, [sp, #20]
    7d82:	f7ff fb3d 	bl	7400 <mbedtls_mpi_bitlen>
    7d86:	f5b0 6f00 	cmp.w	r0, #2048	; 0x800
    7d8a:	f200 81fe 	bhi.w	818a <CONFIG_FPROTECT_BLOCK_SIZE+0x18a>
        mbedtls_mpi_bitlen( N ) > MBEDTLS_MPI_MAX_BITS )
    7d8e:	4628      	mov	r0, r5
    7d90:	f7ff fb36 	bl	7400 <mbedtls_mpi_bitlen>
    if( mbedtls_mpi_bitlen( E ) > MBEDTLS_MPI_MAX_BITS ||
    7d94:	f5b0 6f00 	cmp.w	r0, #2048	; 0x800
    7d98:	f200 81f7 	bhi.w	818a <CONFIG_FPROTECT_BLOCK_SIZE+0x18a>
    x += ( ( m0 + 2 ) & 4 ) << 1;
    7d9c:	2103      	movs	r1, #3
    7d9e:	f104 0802 	add.w	r8, r4, #2
    7da2:	ea4f 0848 	mov.w	r8, r8, lsl #1
    7da6:	f008 0808 	and.w	r8, r8, #8
    7daa:	44a0      	add	r8, r4
        x *= ( 2 - ( m0 * x ) );
    7dac:	fb08 f304 	mul.w	r3, r8, r4
    for( i = biL; i >= 8; i /= 2 )
    7db0:	3901      	subs	r1, #1
        x *= ( 2 - ( m0 * x ) );
    7db2:	f1c3 0302 	rsb	r3, r3, #2
    7db6:	fb03 f808 	mul.w	r8, r3, r8
    for( i = biL; i >= 8; i /= 2 )
    7dba:	d1f7      	bne.n	7dac <mbedtls_mpi_exp_mod+0x66>
    X->s = 1;
    7dbc:	2301      	movs	r3, #1
     */
    mpi_montg_init( &mm, N );
    mbedtls_mpi_init( &RR ); mbedtls_mpi_init( &T );
    mbedtls_mpi_init( &Apos );
    mbedtls_mpi_init( &WW );
    memset( W, 0, sizeof( W ) );
    7dbe:	f44f 7240 	mov.w	r2, #768	; 0x300
    7dc2:	a81a      	add	r0, sp, #104	; 0x68
    X->n = 0;
    7dc4:	e9cd 310b 	strd	r3, r1, [sp, #44]	; 0x2c
    X->s = 1;
    7dc8:	e9cd 130d 	strd	r1, r3, [sp, #52]	; 0x34
    X->p = NULL;
    7dcc:	e9cd 110f 	strd	r1, r1, [sp, #60]	; 0x3c
    X->n = 0;
    7dd0:	e9cd 3114 	strd	r3, r1, [sp, #80]	; 0x50
    7dd4:	e9cd 3111 	strd	r3, r1, [sp, #68]	; 0x44
    X->p = NULL;
    7dd8:	9116      	str	r1, [sp, #88]	; 0x58
    7dda:	9113      	str	r1, [sp, #76]	; 0x4c
    memset( W, 0, sizeof( W ) );
    7ddc:	f7fe fbe7 	bl	65ae <memset>

    i = mbedtls_mpi_bitlen( E );
    7de0:	9805      	ldr	r0, [sp, #20]
    7de2:	f7ff fb0d 	bl	7400 <mbedtls_mpi_bitlen>

    wsize = ( i > 671 ) ? 6 : ( i > 239 ) ? 5 :
    7de6:	f5b0 7f28 	cmp.w	r0, #672	; 0x2a0
    7dea:	f080 80f5 	bcs.w	7fd8 <mbedtls_mpi_exp_mod+0x292>
    7dee:	28ef      	cmp	r0, #239	; 0xef
    7df0:	f200 80f4 	bhi.w	7fdc <mbedtls_mpi_exp_mod+0x296>
    7df4:	284f      	cmp	r0, #79	; 0x4f
    7df6:	f200 80f3 	bhi.w	7fe0 <mbedtls_mpi_exp_mod+0x29a>
    7dfa:	9b08      	ldr	r3, [sp, #32]
    7dfc:	2818      	cmp	r0, #24
    7dfe:	bf34      	ite	cc
    7e00:	461f      	movcc	r7, r3
    7e02:	2703      	movcs	r7, #3
#if( MBEDTLS_MPI_WINDOW_SIZE < 6 )
    if( wsize > MBEDTLS_MPI_WINDOW_SIZE )
        wsize = MBEDTLS_MPI_WINDOW_SIZE;
#endif

    j = N->n + 1;
    7e04:	686b      	ldr	r3, [r5, #4]
    /* All W[i] and X must have at least N->n limbs for the mpi_montmul()
     * and mpi_montred() calls later. Here we ensure that W[1] and X are
     * large enough, and later we'll grow other W[i] to the same length.
     * They must not be shrunk midway through this function!
     */
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, j ) );
    7e06:	4630      	mov	r0, r6
    j = N->n + 1;
    7e08:	f103 0a01 	add.w	sl, r3, #1
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, j ) );
    7e0c:	4651      	mov	r1, sl
    7e0e:	f7ff fa55 	bl	72bc <mbedtls_mpi_grow>
    7e12:	4604      	mov	r4, r0
    7e14:	2800      	cmp	r0, #0
    7e16:	f040 80bd 	bne.w	7f94 <mbedtls_mpi_exp_mod+0x24e>
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &W[1],  j ) );
    7e1a:	4651      	mov	r1, sl
    7e1c:	a81d      	add	r0, sp, #116	; 0x74
    7e1e:	f7ff fa4d 	bl	72bc <mbedtls_mpi_grow>
    7e22:	4604      	mov	r4, r0
    7e24:	2800      	cmp	r0, #0
    7e26:	f040 80b5 	bne.w	7f94 <mbedtls_mpi_exp_mod+0x24e>
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &T, j * 2 ) );
    7e2a:	ea4f 014a 	mov.w	r1, sl, lsl #1
    7e2e:	a80e      	add	r0, sp, #56	; 0x38
    7e30:	f7ff fa44 	bl	72bc <mbedtls_mpi_grow>
    7e34:	4604      	mov	r4, r0
    7e36:	2800      	cmp	r0, #0
    7e38:	f040 80ac 	bne.w	7f94 <mbedtls_mpi_exp_mod+0x24e>

    /*
     * Compensate for negative A (and correct at the end)
     */
    neg = ( A->s == -1 );
    7e3c:	f8d9 3000 	ldr.w	r3, [r9]
    7e40:	9306      	str	r3, [sp, #24]
    if( neg )
    7e42:	3301      	adds	r3, #1
    7e44:	d10b      	bne.n	7e5e <mbedtls_mpi_exp_mod+0x118>
    {
        MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &Apos, A ) );
    7e46:	4649      	mov	r1, r9
    7e48:	a814      	add	r0, sp, #80	; 0x50
    7e4a:	f7ff fa79 	bl	7340 <mbedtls_mpi_copy>
    7e4e:	4604      	mov	r4, r0
    7e50:	2800      	cmp	r0, #0
    7e52:	f040 809f 	bne.w	7f94 <mbedtls_mpi_exp_mod+0x24e>
        Apos.s = 1;
    7e56:	2301      	movs	r3, #1
        A = &Apos;
    7e58:	f10d 0950 	add.w	r9, sp, #80	; 0x50
        Apos.s = 1;
    7e5c:	9314      	str	r3, [sp, #80]	; 0x50
    }

    /*
     * If 1st call, pre-compute R^2 mod N
     */
    if( prec_RR == NULL || prec_RR->p == NULL )
    7e5e:	9be4      	ldr	r3, [sp, #912]	; 0x390
    7e60:	b11b      	cbz	r3, 7e6a <mbedtls_mpi_exp_mod+0x124>
    7e62:	689b      	ldr	r3, [r3, #8]
    7e64:	2b00      	cmp	r3, #0
    7e66:	f040 80bd 	bne.w	7fe4 <mbedtls_mpi_exp_mod+0x29e>
    {
        MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &RR, 1 ) );
    7e6a:	2101      	movs	r1, #1
    7e6c:	a80b      	add	r0, sp, #44	; 0x2c
    7e6e:	f7ff fa9b 	bl	73a8 <mbedtls_mpi_lset>
    7e72:	4604      	mov	r4, r0
    7e74:	2800      	cmp	r0, #0
    7e76:	f040 808d 	bne.w	7f94 <mbedtls_mpi_exp_mod+0x24e>
        MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &RR, N->n * 2 * biL ) );
    7e7a:	6869      	ldr	r1, [r5, #4]
    7e7c:	a80b      	add	r0, sp, #44	; 0x2c
    7e7e:	0189      	lsls	r1, r1, #6
    7e80:	f7ff fb38 	bl	74f4 <mbedtls_mpi_shift_l>
    7e84:	4604      	mov	r4, r0
    7e86:	2800      	cmp	r0, #0
    7e88:	f040 8084 	bne.w	7f94 <mbedtls_mpi_exp_mod+0x24e>
        MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &RR, &RR, N ) );
    7e8c:	a90b      	add	r1, sp, #44	; 0x2c
    7e8e:	462a      	mov	r2, r5
    7e90:	4608      	mov	r0, r1
    7e92:	f7ff ff26 	bl	7ce2 <mbedtls_mpi_mod_mpi>
    7e96:	4604      	mov	r4, r0
    7e98:	2800      	cmp	r0, #0
    7e9a:	d17b      	bne.n	7f94 <mbedtls_mpi_exp_mod+0x24e>

        if( prec_RR != NULL )
    7e9c:	9be4      	ldr	r3, [sp, #912]	; 0x390
    7e9e:	b123      	cbz	r3, 7eaa <mbedtls_mpi_exp_mod+0x164>
            memcpy( prec_RR, &RR, sizeof( mbedtls_mpi ) );
    7ea0:	220c      	movs	r2, #12
    7ea2:	4618      	mov	r0, r3
    7ea4:	a90b      	add	r1, sp, #44	; 0x2c
    }
    else
        memcpy( &RR, prec_RR, sizeof( mbedtls_mpi ) );
    7ea6:	f7fe fb77 	bl	6598 <memcpy>

    /*
     * W[1] = A * R^2 * R^-1 mod N = A * R mod N
     */
    if( mbedtls_mpi_cmp_mpi( A, N ) >= 0 )
    7eaa:	4629      	mov	r1, r5
    7eac:	4648      	mov	r0, r9
    7eae:	f7ff fbef 	bl	7690 <mbedtls_mpi_cmp_mpi>
    7eb2:	2800      	cmp	r0, #0
    7eb4:	f2c0 809a 	blt.w	7fec <mbedtls_mpi_exp_mod+0x2a6>
    {
        MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &W[1], A, N ) );
    7eb8:	462a      	mov	r2, r5
    7eba:	4649      	mov	r1, r9
    7ebc:	a81d      	add	r0, sp, #116	; 0x74
    7ebe:	f7ff ff10 	bl	7ce2 <mbedtls_mpi_mod_mpi>
    7ec2:	4604      	mov	r4, r0
    7ec4:	2800      	cmp	r0, #0
    7ec6:	d165      	bne.n	7f94 <mbedtls_mpi_exp_mod+0x24e>
        /* This should be a no-op because W[1] is already that large before
         * mbedtls_mpi_mod_mpi(), but it's necessary to avoid an overflow
         * in mpi_montmul() below, so let's make sure. */
        MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &W[1], N->n + 1 ) );
    7ec8:	6869      	ldr	r1, [r5, #4]
    7eca:	a81d      	add	r0, sp, #116	; 0x74
    7ecc:	3101      	adds	r1, #1
    7ece:	f7ff f9f5 	bl	72bc <mbedtls_mpi_grow>
    7ed2:	4604      	mov	r4, r0
    7ed4:	2800      	cmp	r0, #0
    7ed6:	d15d      	bne.n	7f94 <mbedtls_mpi_exp_mod+0x24e>
    else
        MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[1], A ) );

    /* Note that this is safe because W[1] always has at least N->n limbs
     * (it grew above and was preserved by mbedtls_mpi_copy()). */
    mpi_montmul( &W[1], &RR, N, mm, &T );
    7ed8:	f10d 0b38 	add.w	fp, sp, #56	; 0x38
    *mm = ~x + 1;
    7edc:	f1c8 0300 	rsb	r3, r8, #0
    mpi_montmul( &W[1], &RR, N, mm, &T );
    7ee0:	462a      	mov	r2, r5
    7ee2:	a90b      	add	r1, sp, #44	; 0x2c
    7ee4:	a81d      	add	r0, sp, #116	; 0x74
    7ee6:	f8cd b000 	str.w	fp, [sp]
    *mm = ~x + 1;
    7eea:	9303      	str	r3, [sp, #12]
    mpi_montmul( &W[1], &RR, N, mm, &T );
    7eec:	f7ff f935 	bl	715a <mpi_montmul>

    /*
     * X = R^2 * R^-1 mod N = R mod N
     */
    MBEDTLS_MPI_CHK( mbedtls_mpi_copy( X, &RR ) );
    7ef0:	4630      	mov	r0, r6
    7ef2:	a90b      	add	r1, sp, #44	; 0x2c
    7ef4:	f7ff fa24 	bl	7340 <mbedtls_mpi_copy>
    7ef8:	4604      	mov	r4, r0
    7efa:	2800      	cmp	r0, #0
    7efc:	d14a      	bne.n	7f94 <mbedtls_mpi_exp_mod+0x24e>
    mbedtls_mpi_uint z = 1;
    7efe:	2301      	movs	r3, #1
    7f00:	aa0a      	add	r2, sp, #40	; 0x28
    U.n = U.s = (int) z;
    7f02:	e9cd 3317 	strd	r3, r3, [sp, #92]	; 0x5c
    mbedtls_mpi_uint z = 1;
    7f06:	930a      	str	r3, [sp, #40]	; 0x28
    U.p = &z;
    7f08:	9219      	str	r2, [sp, #100]	; 0x64
    mpi_montmul( A, &U, N, mm, T );
    7f0a:	4630      	mov	r0, r6
    7f0c:	462a      	mov	r2, r5
    7f0e:	9b03      	ldr	r3, [sp, #12]
    7f10:	f8cd b000 	str.w	fp, [sp]
    7f14:	a917      	add	r1, sp, #92	; 0x5c
    7f16:	f7ff f920 	bl	715a <mpi_montmul>
    mpi_montred( X, N, mm, &T );

    if( wsize > 1 )
    7f1a:	2f01      	cmp	r7, #1
    7f1c:	d16b      	bne.n	7ff6 <mbedtls_mpi_exp_mod+0x2b0>

    nblimbs = E->n;
    bufsize = 0;
    nbits   = 0;
    wbits   = 0;
    state   = 0;
    7f1e:	f04f 0a00 	mov.w	sl, #0
    nbits   = 0;
    7f22:	46d0      	mov	r8, sl
    bufsize = 0;
    7f24:	46d3      	mov	fp, sl
    wbits   = 0;
    7f26:	46d1      	mov	r9, sl
    nblimbs = E->n;
    7f28:	9b05      	ldr	r3, [sp, #20]
    7f2a:	685b      	ldr	r3, [r3, #4]
    7f2c:	9304      	str	r3, [sp, #16]

    while( 1 )
    {
        if( bufsize == 0 )
    7f2e:	f1bb 0f00 	cmp.w	fp, #0
    7f32:	f040 80af 	bne.w	8094 <CONFIG_FPROTECT_BLOCK_SIZE+0x94>
        {
            if( nblimbs == 0 )
    7f36:	9b04      	ldr	r3, [sp, #16]
    7f38:	2b00      	cmp	r3, #0
    7f3a:	f040 80a6 	bne.w	808a <CONFIG_FPROTECT_BLOCK_SIZE+0x8a>
    {
        mpi_montmul( X, X, N, mm, &T );

        wbits <<= 1;

        if( ( wbits & ( one << wsize ) ) != 0 )
    7f3e:	f04f 0b01 	mov.w	fp, #1
    7f42:	f10d 0a38 	add.w	sl, sp, #56	; 0x38
    7f46:	fa0b fb07 	lsl.w	fp, fp, r7
    for( i = 0; i < nbits; i++ )
    7f4a:	9b04      	ldr	r3, [sp, #16]
    7f4c:	4543      	cmp	r3, r8
    7f4e:	f040 80fa 	bne.w	8146 <CONFIG_FPROTECT_BLOCK_SIZE+0x146>
    mbedtls_mpi_uint z = 1;
    7f52:	2301      	movs	r3, #1
    7f54:	aa0a      	add	r2, sp, #40	; 0x28
    U.n = U.s = (int) z;
    7f56:	e9cd 3317 	strd	r3, r3, [sp, #92]	; 0x5c
    mbedtls_mpi_uint z = 1;
    7f5a:	930a      	str	r3, [sp, #40]	; 0x28
    U.p = &z;
    7f5c:	9219      	str	r2, [sp, #100]	; 0x64
    mpi_montmul( A, &U, N, mm, T );
    7f5e:	9b03      	ldr	r3, [sp, #12]
    7f60:	462a      	mov	r2, r5
    7f62:	4630      	mov	r0, r6
    7f64:	f8cd a000 	str.w	sl, [sp]
    7f68:	a917      	add	r1, sp, #92	; 0x5c
    7f6a:	f7ff f8f6 	bl	715a <mpi_montmul>
    /*
     * X = A^E * R * R^-1 mod N = A^E mod N
     */
    mpi_montred( X, N, mm, &T );

    if( neg && E->n != 0 && ( E->p[0] & 1 ) != 0 )
    7f6e:	9b06      	ldr	r3, [sp, #24]
    7f70:	3301      	adds	r3, #1
    7f72:	d10f      	bne.n	7f94 <mbedtls_mpi_exp_mod+0x24e>
    7f74:	9b05      	ldr	r3, [sp, #20]
    7f76:	685b      	ldr	r3, [r3, #4]
    7f78:	b163      	cbz	r3, 7f94 <mbedtls_mpi_exp_mod+0x24e>
    7f7a:	9b05      	ldr	r3, [sp, #20]
    7f7c:	689b      	ldr	r3, [r3, #8]
    7f7e:	681b      	ldr	r3, [r3, #0]
    7f80:	07db      	lsls	r3, r3, #31
    7f82:	d507      	bpl.n	7f94 <mbedtls_mpi_exp_mod+0x24e>
    {
        X->s = -1;
    7f84:	9b06      	ldr	r3, [sp, #24]
        MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( X, N, X ) );
    7f86:	4632      	mov	r2, r6
    7f88:	4629      	mov	r1, r5
    7f8a:	4630      	mov	r0, r6
        X->s = -1;
    7f8c:	6033      	str	r3, [r6, #0]
        MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( X, N, X ) );
    7f8e:	f7ff fc9d 	bl	78cc <mbedtls_mpi_add_mpi>
            MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[i], &W[i - 1] ) );
    7f92:	4604      	mov	r4, r0
    }

cleanup:

    for( i = ( one << ( wsize - 1 ) ); i < ( one << wsize ); i++ )
    7f94:	2301      	movs	r3, #1
    7f96:	1e7d      	subs	r5, r7, #1
    7f98:	fa03 f607 	lsl.w	r6, r3, r7
        mbedtls_mpi_free( &W[i] );
    7f9c:	270c      	movs	r7, #12
    for( i = ( one << ( wsize - 1 ) ); i < ( one << wsize ); i++ )
    7f9e:	fa03 f505 	lsl.w	r5, r3, r5
    7fa2:	42ae      	cmp	r6, r5
    7fa4:	f200 80ea 	bhi.w	817c <CONFIG_FPROTECT_BLOCK_SIZE+0x17c>

    mbedtls_mpi_free( &W[1] ); mbedtls_mpi_free( &T ); mbedtls_mpi_free( &Apos );
    7fa8:	a81d      	add	r0, sp, #116	; 0x74
    7faa:	f7ff f975 	bl	7298 <mbedtls_mpi_free>
    7fae:	a80e      	add	r0, sp, #56	; 0x38
    7fb0:	f7ff f972 	bl	7298 <mbedtls_mpi_free>
    7fb4:	a814      	add	r0, sp, #80	; 0x50
    7fb6:	f7ff f96f 	bl	7298 <mbedtls_mpi_free>
    mbedtls_mpi_free( &WW );
    7fba:	a811      	add	r0, sp, #68	; 0x44
    7fbc:	f7ff f96c 	bl	7298 <mbedtls_mpi_free>

    if( prec_RR == NULL || prec_RR->p == NULL )
    7fc0:	9be4      	ldr	r3, [sp, #912]	; 0x390
    7fc2:	b10b      	cbz	r3, 7fc8 <mbedtls_mpi_exp_mod+0x282>
    7fc4:	689b      	ldr	r3, [r3, #8]
    7fc6:	b913      	cbnz	r3, 7fce <mbedtls_mpi_exp_mod+0x288>
        mbedtls_mpi_free( &RR );
    7fc8:	a80b      	add	r0, sp, #44	; 0x2c
    7fca:	f7ff f965 	bl	7298 <mbedtls_mpi_free>

    return( ret );
}
    7fce:	4620      	mov	r0, r4
    7fd0:	f50d 7d5b 	add.w	sp, sp, #876	; 0x36c
    7fd4:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    wsize = ( i > 671 ) ? 6 : ( i > 239 ) ? 5 :
    7fd8:	2706      	movs	r7, #6
    7fda:	e713      	b.n	7e04 <mbedtls_mpi_exp_mod+0xbe>
    7fdc:	2705      	movs	r7, #5
    7fde:	e711      	b.n	7e04 <mbedtls_mpi_exp_mod+0xbe>
    7fe0:	2704      	movs	r7, #4
    7fe2:	e70f      	b.n	7e04 <mbedtls_mpi_exp_mod+0xbe>
        memcpy( &RR, prec_RR, sizeof( mbedtls_mpi ) );
    7fe4:	220c      	movs	r2, #12
    7fe6:	99e4      	ldr	r1, [sp, #912]	; 0x390
    7fe8:	a80b      	add	r0, sp, #44	; 0x2c
    7fea:	e75c      	b.n	7ea6 <mbedtls_mpi_exp_mod+0x160>
        MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[1], A ) );
    7fec:	4649      	mov	r1, r9
    7fee:	a81d      	add	r0, sp, #116	; 0x74
    7ff0:	f7ff f9a6 	bl	7340 <mbedtls_mpi_copy>
    7ff4:	e76d      	b.n	7ed2 <mbedtls_mpi_exp_mod+0x18c>
        MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &W[j], N->n + 1 ) );
    7ff6:	230c      	movs	r3, #12
        j =  one << ( wsize - 1 );
    7ff8:	f107 39ff 	add.w	r9, r7, #4294967295
        MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &W[j], N->n + 1 ) );
    7ffc:	6869      	ldr	r1, [r5, #4]
    7ffe:	fa03 f309 	lsl.w	r3, r3, r9
    8002:	aa1a      	add	r2, sp, #104	; 0x68
    8004:	eb02 0803 	add.w	r8, r2, r3
    8008:	4640      	mov	r0, r8
    800a:	3101      	adds	r1, #1
    800c:	f7ff f956 	bl	72bc <mbedtls_mpi_grow>
    8010:	2800      	cmp	r0, #0
    8012:	d1be      	bne.n	7f92 <mbedtls_mpi_exp_mod+0x24c>
        MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[j], &W[1]    ) );
    8014:	4640      	mov	r0, r8
    8016:	a91d      	add	r1, sp, #116	; 0x74
    8018:	f7ff f992 	bl	7340 <mbedtls_mpi_copy>
    801c:	2800      	cmp	r0, #0
    801e:	d1b8      	bne.n	7f92 <mbedtls_mpi_exp_mod+0x24c>
        for( i = 0; i < wsize - 1; i++ )
    8020:	46a2      	mov	sl, r4
            mpi_montmul( &W[j], &W[j], N, mm, &T );
    8022:	462a      	mov	r2, r5
    8024:	4641      	mov	r1, r8
    8026:	4640      	mov	r0, r8
    8028:	9b03      	ldr	r3, [sp, #12]
    802a:	f8cd b000 	str.w	fp, [sp]
        for( i = 0; i < wsize - 1; i++ )
    802e:	f10a 0a01 	add.w	sl, sl, #1
            mpi_montmul( &W[j], &W[j], N, mm, &T );
    8032:	f7ff f892 	bl	715a <mpi_montmul>
        for( i = 0; i < wsize - 1; i++ )
    8036:	45ca      	cmp	sl, r9
    8038:	d3f3      	bcc.n	8022 <CONFIG_FPROTECT_BLOCK_SIZE+0x22>
        j =  one << ( wsize - 1 );
    803a:	f04f 0a01 	mov.w	sl, #1
    803e:	fa0a f909 	lsl.w	r9, sl, r9
        for( i = j + 1; i < ( one << wsize ); i++ )
    8042:	44d1      	add	r9, sl
    8044:	fa0a fa07 	lsl.w	sl, sl, r7
    8048:	45ca      	cmp	sl, r9
    804a:	f67f af68 	bls.w	7f1e <mbedtls_mpi_exp_mod+0x1d8>
            MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &W[i], N->n + 1 ) );
    804e:	6869      	ldr	r1, [r5, #4]
    8050:	f108 0b0c 	add.w	fp, r8, #12
    8054:	4658      	mov	r0, fp
    8056:	3101      	adds	r1, #1
    8058:	f7ff f930 	bl	72bc <mbedtls_mpi_grow>
    805c:	2800      	cmp	r0, #0
    805e:	d198      	bne.n	7f92 <mbedtls_mpi_exp_mod+0x24c>
            MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[i], &W[i - 1] ) );
    8060:	4641      	mov	r1, r8
    8062:	4658      	mov	r0, fp
    8064:	f7ff f96c 	bl	7340 <mbedtls_mpi_copy>
    8068:	2800      	cmp	r0, #0
    806a:	d192      	bne.n	7f92 <mbedtls_mpi_exp_mod+0x24c>
            mpi_montmul( &W[i], &W[1], N, mm, &T );
    806c:	ab0e      	add	r3, sp, #56	; 0x38
    806e:	9300      	str	r3, [sp, #0]
    8070:	462a      	mov	r2, r5
    8072:	4658      	mov	r0, fp
    8074:	9b03      	ldr	r3, [sp, #12]
    8076:	a91d      	add	r1, sp, #116	; 0x74
    8078:	f7ff f86f 	bl	715a <mpi_montmul>
        for( i = j + 1; i < ( one << wsize ); i++ )
    807c:	46d8      	mov	r8, fp
    807e:	f109 0901 	add.w	r9, r9, #1
    8082:	e7e1      	b.n	8048 <CONFIG_FPROTECT_BLOCK_SIZE+0x48>
        state = 2;
    8084:	f04f 0a02 	mov.w	sl, #2
    8088:	e751      	b.n	7f2e <mbedtls_mpi_exp_mod+0x1e8>
            bufsize = sizeof( mbedtls_mpi_uint ) << 3;
    808a:	f04f 0b20 	mov.w	fp, #32
            nblimbs--;
    808e:	9b04      	ldr	r3, [sp, #16]
    8090:	3b01      	subs	r3, #1
    8092:	9304      	str	r3, [sp, #16]
        ei = (E->p[nblimbs] >> bufsize) & 1;
    8094:	9b05      	ldr	r3, [sp, #20]
    8096:	9a04      	ldr	r2, [sp, #16]
    8098:	689b      	ldr	r3, [r3, #8]
        bufsize--;
    809a:	f10b 3bff 	add.w	fp, fp, #4294967295
        ei = (E->p[nblimbs] >> bufsize) & 1;
    809e:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
    80a2:	fa23 f30b 	lsr.w	r3, r3, fp
        if( ei == 0 && state == 0 )
    80a6:	f013 0301 	ands.w	r3, r3, #1
    80aa:	d10f      	bne.n	80cc <CONFIG_FPROTECT_BLOCK_SIZE+0xcc>
    80ac:	f1ba 0f00 	cmp.w	sl, #0
    80b0:	f43f af3d 	beq.w	7f2e <mbedtls_mpi_exp_mod+0x1e8>
        if( ei == 0 && state == 1 )
    80b4:	f1ba 0f01 	cmp.w	sl, #1
    80b8:	d108      	bne.n	80cc <CONFIG_FPROTECT_BLOCK_SIZE+0xcc>
            mpi_montmul( X, X, N, mm, &T );
    80ba:	ab0e      	add	r3, sp, #56	; 0x38
    80bc:	9300      	str	r3, [sp, #0]
    80be:	462a      	mov	r2, r5
    80c0:	4631      	mov	r1, r6
    80c2:	4630      	mov	r0, r6
    80c4:	9b03      	ldr	r3, [sp, #12]
    80c6:	f7ff f848 	bl	715a <mpi_montmul>
            continue;
    80ca:	e730      	b.n	7f2e <mbedtls_mpi_exp_mod+0x1e8>
        nbits++;
    80cc:	f108 0801 	add.w	r8, r8, #1
        wbits |= ( ei << ( wsize - nbits ) );
    80d0:	eba7 0208 	sub.w	r2, r7, r8
    80d4:	4093      	lsls	r3, r2
        if( nbits == wsize )
    80d6:	4547      	cmp	r7, r8
        wbits |= ( ei << ( wsize - nbits ) );
    80d8:	ea49 0903 	orr.w	r9, r9, r3
        if( nbits == wsize )
    80dc:	d1d2      	bne.n	8084 <CONFIG_FPROTECT_BLOCK_SIZE+0x84>
            for( i = 0; i < wsize; i++ )
    80de:	f04f 0a00 	mov.w	sl, #0
                mpi_montmul( X, X, N, mm, &T );
    80e2:	ab0e      	add	r3, sp, #56	; 0x38
    80e4:	9300      	str	r3, [sp, #0]
    80e6:	462a      	mov	r2, r5
    80e8:	4631      	mov	r1, r6
    80ea:	4630      	mov	r0, r6
    80ec:	9b03      	ldr	r3, [sp, #12]
            for( i = 0; i < wsize; i++ )
    80ee:	f10a 0a01 	add.w	sl, sl, #1
                mpi_montmul( X, X, N, mm, &T );
    80f2:	f7ff f832 	bl	715a <mpi_montmul>
            for( i = 0; i < wsize; i++ )
    80f6:	45d0      	cmp	r8, sl
    80f8:	d8f3      	bhi.n	80e2 <CONFIG_FPROTECT_BLOCK_SIZE+0xe2>
            MBEDTLS_MPI_CHK( mpi_select( &WW, W, (size_t) 1 << wsize, wbits ) );
    80fa:	2301      	movs	r3, #1
    for( size_t i = 0; i < T_size; i++ )
    80fc:	f04f 0a00 	mov.w	sl, #0
            MBEDTLS_MPI_CHK( mpi_select( &WW, W, (size_t) 1 << wsize, wbits ) );
    8100:	fa03 f308 	lsl.w	r3, r3, r8
    for( size_t i = 0; i < T_size; i++ )
    8104:	f10d 0868 	add.w	r8, sp, #104	; 0x68
        MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_assign( R, &T[i],
    8108:	4649      	mov	r1, r9
    810a:	4650      	mov	r0, sl
    810c:	9309      	str	r3, [sp, #36]	; 0x24
    810e:	f000 f83f 	bl	8190 <mbedtls_ct_size_bool_eq>
    8112:	4641      	mov	r1, r8
    8114:	b2c2      	uxtb	r2, r0
    8116:	a811      	add	r0, sp, #68	; 0x44
    8118:	f000 f852 	bl	81c0 <mbedtls_mpi_safe_cond_assign>
    811c:	9007      	str	r0, [sp, #28]
    811e:	bb58      	cbnz	r0, 8178 <CONFIG_FPROTECT_BLOCK_SIZE+0x178>
    for( size_t i = 0; i < T_size; i++ )
    8120:	9b09      	ldr	r3, [sp, #36]	; 0x24
    8122:	f10a 0a01 	add.w	sl, sl, #1
    8126:	4553      	cmp	r3, sl
    8128:	f108 080c 	add.w	r8, r8, #12
    812c:	d1ec      	bne.n	8108 <CONFIG_FPROTECT_BLOCK_SIZE+0x108>
            mpi_montmul( X, &WW, N, mm, &T );
    812e:	ab0e      	add	r3, sp, #56	; 0x38
    8130:	9300      	str	r3, [sp, #0]
    8132:	462a      	mov	r2, r5
    8134:	4630      	mov	r0, r6
    8136:	9b03      	ldr	r3, [sp, #12]
    8138:	a911      	add	r1, sp, #68	; 0x44
    813a:	f7ff f80e 	bl	715a <mpi_montmul>
            nbits = 0;
    813e:	e9dd 9a07 	ldrd	r9, sl, [sp, #28]
            wbits = 0;
    8142:	46c8      	mov	r8, r9
    8144:	e6f3      	b.n	7f2e <mbedtls_mpi_exp_mod+0x1e8>
        mpi_montmul( X, X, N, mm, &T );
    8146:	462a      	mov	r2, r5
    8148:	4631      	mov	r1, r6
    814a:	4630      	mov	r0, r6
    814c:	9b03      	ldr	r3, [sp, #12]
    814e:	f8cd a000 	str.w	sl, [sp]
        wbits <<= 1;
    8152:	ea4f 0949 	mov.w	r9, r9, lsl #1
        mpi_montmul( X, X, N, mm, &T );
    8156:	f7ff f800 	bl	715a <mpi_montmul>
        if( ( wbits & ( one << wsize ) ) != 0 )
    815a:	ea1b 0f09 	tst.w	fp, r9
    815e:	d007      	beq.n	8170 <CONFIG_FPROTECT_BLOCK_SIZE+0x170>
            mpi_montmul( X, &W[1], N, mm, &T );
    8160:	462a      	mov	r2, r5
    8162:	4630      	mov	r0, r6
    8164:	9b03      	ldr	r3, [sp, #12]
    8166:	f8cd a000 	str.w	sl, [sp]
    816a:	a91d      	add	r1, sp, #116	; 0x74
    816c:	f7fe fff5 	bl	715a <mpi_montmul>
    for( i = 0; i < nbits; i++ )
    8170:	9b04      	ldr	r3, [sp, #16]
    8172:	3301      	adds	r3, #1
    8174:	9304      	str	r3, [sp, #16]
    8176:	e6e8      	b.n	7f4a <mbedtls_mpi_exp_mod+0x204>
        MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_assign( R, &T[i],
    8178:	9c07      	ldr	r4, [sp, #28]
    817a:	e70b      	b.n	7f94 <mbedtls_mpi_exp_mod+0x24e>
        mbedtls_mpi_free( &W[i] );
    817c:	ab1a      	add	r3, sp, #104	; 0x68
    817e:	fb07 3005 	mla	r0, r7, r5, r3
    8182:	f7ff f889 	bl	7298 <mbedtls_mpi_free>
    for( i = ( one << ( wsize - 1 ) ); i < ( one << wsize ); i++ )
    8186:	3501      	adds	r5, #1
    8188:	e70b      	b.n	7fa2 <mbedtls_mpi_exp_mod+0x25c>
        return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA );
    818a:	f06f 0403 	mvn.w	r4, #3
    818e:	e71e      	b.n	7fce <mbedtls_mpi_exp_mod+0x288>

00008190 <mbedtls_ct_size_bool_eq>:

unsigned mbedtls_ct_size_bool_eq( size_t x,
                                  size_t y )
{
    /* diff = 0 if x == y, non-zero otherwise */
    const size_t diff = x ^ y;
    8190:	4041      	eors	r1, r0
#pragma warning( push )
#pragma warning( disable : 4146 )
#endif

    /* diff_msb's most significant bit is equal to x != y */
    const size_t diff_msb = ( diff | (size_t) -diff );
    8192:	4248      	negs	r0, r1
    8194:	4308      	orrs	r0, r1

    /* diff1 = (x != y) ? 1 : 0 */
    const unsigned diff1 = diff_msb >> ( sizeof( diff_msb ) * 8 - 1 );

    return( 1 ^ diff1 );
}
    8196:	43c0      	mvns	r0, r0
    8198:	0fc0      	lsrs	r0, r0, #31
    819a:	4770      	bx	lr

0000819c <mbedtls_ct_mpi_uint_cond_assign>:

void mbedtls_ct_mpi_uint_cond_assign( size_t n,
                                      mbedtls_mpi_uint *dest,
                                      const mbedtls_mpi_uint *src,
                                      unsigned char condition )
{
    819c:	b5f0      	push	{r4, r5, r6, r7, lr}

#if defined(_MSC_VER)
#pragma warning( pop )
#endif

    for( i = 0; i < n; i++ )
    819e:	2500      	movs	r5, #0
    const mbedtls_mpi_uint mask = -condition;
    81a0:	425f      	negs	r7, r3
    for( i = 0; i < n; i++ )
    81a2:	3904      	subs	r1, #4
        dest[i] = ( src[i] & mask ) | ( dest[i] & ~mask );
    81a4:	3b01      	subs	r3, #1
    for( i = 0; i < n; i++ )
    81a6:	4285      	cmp	r5, r0
    81a8:	d100      	bne.n	81ac <mbedtls_ct_mpi_uint_cond_assign+0x10>
}
    81aa:	bdf0      	pop	{r4, r5, r6, r7, pc}
        dest[i] = ( src[i] & mask ) | ( dest[i] & ~mask );
    81ac:	f852 6025 	ldr.w	r6, [r2, r5, lsl #2]
    81b0:	f851 4f04 	ldr.w	r4, [r1, #4]!
    81b4:	403e      	ands	r6, r7
    81b6:	401c      	ands	r4, r3
    81b8:	4334      	orrs	r4, r6
    81ba:	600c      	str	r4, [r1, #0]
    for( i = 0; i < n; i++ )
    81bc:	3501      	adds	r5, #1
    81be:	e7f2      	b.n	81a6 <mbedtls_ct_mpi_uint_cond_assign+0xa>

000081c0 <mbedtls_mpi_safe_cond_assign>:
 * (Leaking information about the respective sizes of X and Y is ok however.)
 */
int mbedtls_mpi_safe_cond_assign( mbedtls_mpi *X,
                                  const mbedtls_mpi *Y,
                                  unsigned char assign )
{
    81c0:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    81c4:	460f      	mov	r7, r1
    MPI_VALIDATE_RET( Y != NULL );

    /* all-bits 1 if assign is 1, all-bits 0 if assign is 0 */
    limb_mask = mbedtls_ct_mpi_uint_mask( assign );;

    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, Y->n ) );
    81c6:	6849      	ldr	r1, [r1, #4]
{
    81c8:	4605      	mov	r5, r0
    81ca:	4691      	mov	r9, r2
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, Y->n ) );
    81cc:	f7ff f876 	bl	72bc <mbedtls_mpi_grow>
    81d0:	4680      	mov	r8, r0
    81d2:	b9c8      	cbnz	r0, 8208 <mbedtls_mpi_safe_cond_assign+0x48>
    return( - ( ( value | - value ) >> ( sizeof( value ) * 8 - 1 ) ) );
    81d4:	f1c9 0600 	rsb	r6, r9, #0
    81d8:	ea46 0609 	orr.w	r6, r6, r9
    81dc:	17f6      	asrs	r6, r6, #31
    X->s = mbedtls_ct_cond_select_sign( assign, Y->s, X->s );

    mbedtls_ct_mpi_uint_cond_assign( Y->n, X->p, Y->p, assign );

    for( i = Y->n; i < X->n; i++ )
        X->p[i] &= ~limb_mask;
    81de:	43f6      	mvns	r6, r6
    unsigned uif0 = if0 + 1;
    81e0:	682b      	ldr	r3, [r5, #0]
    unsigned uif1 = if1 + 1;
    81e2:	683c      	ldr	r4, [r7, #0]
    unsigned uif0 = if0 + 1;
    81e4:	3301      	adds	r3, #1
    unsigned uif1 = if1 + 1;
    81e6:	3401      	adds	r4, #1
    return( (int) ur - 1 );
    81e8:	405c      	eors	r4, r3
    81ea:	ea04 0449 	and.w	r4, r4, r9, lsl #1
    81ee:	405c      	eors	r4, r3
    81f0:	3c01      	subs	r4, #1
    X->s = mbedtls_ct_cond_select_sign( assign, Y->s, X->s );
    81f2:	602c      	str	r4, [r5, #0]
    mbedtls_ct_mpi_uint_cond_assign( Y->n, X->p, Y->p, assign );
    81f4:	464b      	mov	r3, r9
    81f6:	68ba      	ldr	r2, [r7, #8]
    81f8:	68a9      	ldr	r1, [r5, #8]
    81fa:	6878      	ldr	r0, [r7, #4]
    81fc:	f7ff ffce 	bl	819c <mbedtls_ct_mpi_uint_cond_assign>
    for( i = Y->n; i < X->n; i++ )
    8200:	687b      	ldr	r3, [r7, #4]
    8202:	686a      	ldr	r2, [r5, #4]
    8204:	429a      	cmp	r2, r3
    8206:	d802      	bhi.n	820e <mbedtls_mpi_safe_cond_assign+0x4e>

cleanup:
    return( ret );
}
    8208:	4640      	mov	r0, r8
    820a:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
        X->p[i] &= ~limb_mask;
    820e:	68a9      	ldr	r1, [r5, #8]
    8210:	f851 2023 	ldr.w	r2, [r1, r3, lsl #2]
    8214:	4032      	ands	r2, r6
    8216:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
    for( i = Y->n; i < X->n; i++ )
    821a:	3301      	adds	r3, #1
    821c:	e7f1      	b.n	8202 <mbedtls_mpi_safe_cond_assign+0x42>

0000821e <platform_calloc_uninit>:
}
    821e:	2000      	movs	r0, #0
    8220:	4770      	bx	lr

00008222 <platform_exit_uninit>:
 * Make dummy function to prevent NULL pointer dereferences
 */
static void platform_exit_uninit( int status )
{
    ((void) status);
}
    8222:	4770      	bx	lr

00008224 <platform_free_uninit>:
static void platform_free_uninit( void *ptr )
    8224:	4770      	bx	lr

00008226 <mbedtls_rsa_import>:
{
    8226:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    822a:	4604      	mov	r4, r0
    822c:	e9dd 7608 	ldrd	r7, r6, [sp, #32]
    8230:	4691      	mov	r9, r2
    8232:	4698      	mov	r8, r3
    if( ( N != NULL && ( ret = mbedtls_mpi_copy( &ctx->N, N ) ) != 0 ) ||
    8234:	460d      	mov	r5, r1
    8236:	b951      	cbnz	r1, 824e <mbedtls_rsa_import+0x28>
    8238:	f1b9 0f00 	cmp.w	r9, #0
    823c:	d110      	bne.n	8260 <mbedtls_rsa_import+0x3a>
        ( P != NULL && ( ret = mbedtls_mpi_copy( &ctx->P, P ) ) != 0 ) ||
    823e:	f1b8 0f00 	cmp.w	r8, #0
    8242:	d115      	bne.n	8270 <mbedtls_rsa_import+0x4a>
        ( Q != NULL && ( ret = mbedtls_mpi_copy( &ctx->Q, Q ) ) != 0 ) ||
    8244:	b9e7      	cbnz	r7, 8280 <mbedtls_rsa_import+0x5a>
        ( D != NULL && ( ret = mbedtls_mpi_copy( &ctx->D, D ) ) != 0 ) ||
    8246:	bb1e      	cbnz	r6, 8290 <mbedtls_rsa_import+0x6a>
    if( N != NULL )
    8248:	bb55      	cbnz	r5, 82a0 <mbedtls_rsa_import+0x7a>
    return( 0 );
    824a:	2000      	movs	r0, #0
    824c:	e006      	b.n	825c <mbedtls_rsa_import+0x36>
    if( ( N != NULL && ( ret = mbedtls_mpi_copy( &ctx->N, N ) ) != 0 ) ||
    824e:	3008      	adds	r0, #8
    8250:	f7ff f876 	bl	7340 <mbedtls_mpi_copy>
    8254:	2800      	cmp	r0, #0
    8256:	d0ef      	beq.n	8238 <mbedtls_rsa_import+0x12>
    8258:	f5a0 4081 	sub.w	r0, r0, #16512	; 0x4080
}
    825c:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
        ( P != NULL && ( ret = mbedtls_mpi_copy( &ctx->P, P ) ) != 0 ) ||
    8260:	4649      	mov	r1, r9
    8262:	f104 002c 	add.w	r0, r4, #44	; 0x2c
    8266:	f7ff f86b 	bl	7340 <mbedtls_mpi_copy>
    826a:	2800      	cmp	r0, #0
    826c:	d0e7      	beq.n	823e <mbedtls_rsa_import+0x18>
    826e:	e7f3      	b.n	8258 <mbedtls_rsa_import+0x32>
        ( Q != NULL && ( ret = mbedtls_mpi_copy( &ctx->Q, Q ) ) != 0 ) ||
    8270:	4641      	mov	r1, r8
    8272:	f104 0038 	add.w	r0, r4, #56	; 0x38
    8276:	f7ff f863 	bl	7340 <mbedtls_mpi_copy>
    827a:	2800      	cmp	r0, #0
    827c:	d0e2      	beq.n	8244 <mbedtls_rsa_import+0x1e>
    827e:	e7eb      	b.n	8258 <mbedtls_rsa_import+0x32>
        ( D != NULL && ( ret = mbedtls_mpi_copy( &ctx->D, D ) ) != 0 ) ||
    8280:	4639      	mov	r1, r7
    8282:	f104 0020 	add.w	r0, r4, #32
    8286:	f7ff f85b 	bl	7340 <mbedtls_mpi_copy>
    828a:	2800      	cmp	r0, #0
    828c:	d0db      	beq.n	8246 <mbedtls_rsa_import+0x20>
    828e:	e7e3      	b.n	8258 <mbedtls_rsa_import+0x32>
        ( E != NULL && ( ret = mbedtls_mpi_copy( &ctx->E, E ) ) != 0 ) )
    8290:	4631      	mov	r1, r6
    8292:	f104 0014 	add.w	r0, r4, #20
    8296:	f7ff f853 	bl	7340 <mbedtls_mpi_copy>
    829a:	2800      	cmp	r0, #0
    829c:	d0d4      	beq.n	8248 <mbedtls_rsa_import+0x22>
    829e:	e7db      	b.n	8258 <mbedtls_rsa_import+0x32>
        ctx->len = mbedtls_mpi_size( &ctx->N );
    82a0:	f104 0008 	add.w	r0, r4, #8
    82a4:	f7ff f8ca 	bl	743c <mbedtls_mpi_size>
    82a8:	6060      	str	r0, [r4, #4]
    82aa:	e7ce      	b.n	824a <mbedtls_rsa_import+0x24>

000082ac <mbedtls_rsa_init>:
{
    82ac:	b510      	push	{r4, lr}
    memset( ctx, 0, sizeof( mbedtls_rsa_context ) );
    82ae:	22ac      	movs	r2, #172	; 0xac
    82b0:	2100      	movs	r1, #0
{
    82b2:	4604      	mov	r4, r0
    memset( ctx, 0, sizeof( mbedtls_rsa_context ) );
    82b4:	f7fe f97b 	bl	65ae <memset>
    ctx->padding = MBEDTLS_RSA_PKCS_V15;
    82b8:	2300      	movs	r3, #0
    ctx->hash_id = MBEDTLS_MD_NONE;
    82ba:	e9c4 3329 	strd	r3, r3, [r4, #164]	; 0xa4
}
    82be:	bd10      	pop	{r4, pc}

000082c0 <mbedtls_rsa_free>:

/*
 * Free the components of an RSA key
 */
void mbedtls_rsa_free( mbedtls_rsa_context *ctx )
{
    82c0:	b510      	push	{r4, lr}
    if( ctx == NULL )
    82c2:	4604      	mov	r4, r0
    82c4:	b3a0      	cbz	r0, 8330 <mbedtls_rsa_free+0x70>
        return;

    mbedtls_mpi_free( &ctx->Vi );
    82c6:	308c      	adds	r0, #140	; 0x8c
    82c8:	f7fe ffe6 	bl	7298 <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->Vf );
    82cc:	f104 0098 	add.w	r0, r4, #152	; 0x98
    82d0:	f7fe ffe2 	bl	7298 <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->RN );
    82d4:	f104 0068 	add.w	r0, r4, #104	; 0x68
    82d8:	f7fe ffde 	bl	7298 <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->D  );
    82dc:	f104 0020 	add.w	r0, r4, #32
    82e0:	f7fe ffda 	bl	7298 <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->Q  );
    82e4:	f104 0038 	add.w	r0, r4, #56	; 0x38
    82e8:	f7fe ffd6 	bl	7298 <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->P  );
    82ec:	f104 002c 	add.w	r0, r4, #44	; 0x2c
    82f0:	f7fe ffd2 	bl	7298 <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->E  );
    82f4:	f104 0014 	add.w	r0, r4, #20
    82f8:	f7fe ffce 	bl	7298 <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->N  );
    82fc:	f104 0008 	add.w	r0, r4, #8
    8300:	f7fe ffca 	bl	7298 <mbedtls_mpi_free>

#if !defined(MBEDTLS_RSA_NO_CRT)
    mbedtls_mpi_free( &ctx->RQ );
    8304:	f104 0080 	add.w	r0, r4, #128	; 0x80
    8308:	f7fe ffc6 	bl	7298 <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->RP );
    830c:	f104 0074 	add.w	r0, r4, #116	; 0x74
    8310:	f7fe ffc2 	bl	7298 <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->QP );
    8314:	f104 005c 	add.w	r0, r4, #92	; 0x5c
    8318:	f7fe ffbe 	bl	7298 <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->DQ );
    831c:	f104 0050 	add.w	r0, r4, #80	; 0x50
    8320:	f7fe ffba 	bl	7298 <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->DP );
    8324:	f104 0044 	add.w	r0, r4, #68	; 0x44
    {
        mbedtls_mutex_free( &ctx->mutex );
        ctx->ver = 0;
    }
#endif
}
    8328:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    mbedtls_mpi_free( &ctx->DP );
    832c:	f7fe bfb4 	b.w	7298 <mbedtls_mpi_free>
}
    8330:	bd10      	pop	{r4, pc}

00008332 <mbedtls_sha256_init>:
    memset( ctx, 0, sizeof( mbedtls_sha256_context ) );
    8332:	226c      	movs	r2, #108	; 0x6c
    8334:	2100      	movs	r1, #0
    8336:	f7fe b93a 	b.w	65ae <memset>

0000833a <mbedtls_sha256_update>:
 * SHA-256 process buffer
 */
int mbedtls_sha256_update( mbedtls_sha256_context *ctx,
                               const unsigned char *input,
                               size_t ilen )
{
    833a:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    833e:	4605      	mov	r5, r0
    8340:	460e      	mov	r6, r1
    uint32_t left;

    SHA256_VALIDATE_RET( ctx != NULL );
    SHA256_VALIDATE_RET( ilen == 0 || input != NULL );

    if( ilen == 0 )
    8342:	4614      	mov	r4, r2
    8344:	b37a      	cbz	r2, 83a6 <mbedtls_sha256_update+0x6c>
        return( 0 );

    left = ctx->total[0] & 0x3F;
    8346:	6803      	ldr	r3, [r0, #0]
    8348:	f003 073f 	and.w	r7, r3, #63	; 0x3f
    fill = 64 - left;

    ctx->total[0] += (uint32_t) ilen;
    834c:	189b      	adds	r3, r3, r2
    834e:	6003      	str	r3, [r0, #0]
    ctx->total[0] &= 0xFFFFFFFF;

    if( ctx->total[0] < (uint32_t) ilen )
        ctx->total[1]++;
    8350:	bf22      	ittt	cs
    8352:	6843      	ldrcs	r3, [r0, #4]
    8354:	3301      	addcs	r3, #1
    8356:	6043      	strcs	r3, [r0, #4]

    if( left && ilen >= fill )
    8358:	b19f      	cbz	r7, 8382 <mbedtls_sha256_update+0x48>
    fill = 64 - left;
    835a:	f1c7 0940 	rsb	r9, r7, #64	; 0x40
    if( left && ilen >= fill )
    835e:	454a      	cmp	r2, r9
    8360:	d30f      	bcc.n	8382 <mbedtls_sha256_update+0x48>
    {
        memcpy( (void *) (ctx->buffer + left), input, fill );
    8362:	f100 0828 	add.w	r8, r0, #40	; 0x28
    8366:	464a      	mov	r2, r9
    8368:	eb08 0007 	add.w	r0, r8, r7
    836c:	f7fe f914 	bl	6598 <memcpy>

        if( ( ret = mbedtls_internal_sha256_process( ctx, ctx->buffer ) ) != 0 )
    8370:	4641      	mov	r1, r8
    8372:	4628      	mov	r0, r5
    8374:	f7fc f98a 	bl	468c <mbedtls_internal_sha256_process>
    8378:	b9b0      	cbnz	r0, 83a8 <mbedtls_sha256_update+0x6e>
            return( ret );

        input += fill;
    837a:	443c      	add	r4, r7
        ilen  -= fill;
        left = 0;
    837c:	4607      	mov	r7, r0
        input += fill;
    837e:	444e      	add	r6, r9
        ilen  -= fill;
    8380:	3c40      	subs	r4, #64	; 0x40
        left = 0;
    8382:	4426      	add	r6, r4
    8384:	e004      	b.n	8390 <mbedtls_sha256_update+0x56>
    }

    while( ilen >= 64 )
    {
        if( ( ret = mbedtls_internal_sha256_process( ctx, input ) ) != 0 )
    8386:	4628      	mov	r0, r5
    8388:	f7fc f980 	bl	468c <mbedtls_internal_sha256_process>
    838c:	b960      	cbnz	r0, 83a8 <mbedtls_sha256_update+0x6e>
            return( ret );

        input += 64;
        ilen  -= 64;
    838e:	3c40      	subs	r4, #64	; 0x40
    while( ilen >= 64 )
    8390:	2c3f      	cmp	r4, #63	; 0x3f
    8392:	eba6 0104 	sub.w	r1, r6, r4
    8396:	d8f6      	bhi.n	8386 <mbedtls_sha256_update+0x4c>
    }

    if( ilen > 0 )
    8398:	b12c      	cbz	r4, 83a6 <mbedtls_sha256_update+0x6c>
        memcpy( (void *) (ctx->buffer + left), input, ilen );
    839a:	f105 0028 	add.w	r0, r5, #40	; 0x28
    839e:	4622      	mov	r2, r4
    83a0:	4438      	add	r0, r7
    83a2:	f7fe f8f9 	bl	6598 <memcpy>
        return( 0 );
    83a6:	2000      	movs	r0, #0

    return( 0 );
}
    83a8:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}

000083ac <mbedtls_sha256_finish>:
/*
 * SHA-256 final digest
 */
int mbedtls_sha256_finish( mbedtls_sha256_context *ctx,
                               unsigned char *output )
{
    83ac:	b570      	push	{r4, r5, r6, lr}
    83ae:	460d      	mov	r5, r1
    /*
     * Add padding: 0x80 then 0x00 until 8 bytes remain for the length
     */
    used = ctx->total[0] & 0x3F;

    ctx->buffer[used++] = 0x80;
    83b0:	2180      	movs	r1, #128	; 0x80
    used = ctx->total[0] & 0x3F;
    83b2:	6803      	ldr	r3, [r0, #0]

    if( used <= 56 )
    {
        /* Enough room for padding + length in current block */
        memset( ctx->buffer + used, 0, 56 - used );
    83b4:	f100 0628 	add.w	r6, r0, #40	; 0x28
    used = ctx->total[0] & 0x3F;
    83b8:	f003 033f 	and.w	r3, r3, #63	; 0x3f
    ctx->buffer[used++] = 0x80;
    83bc:	1c5a      	adds	r2, r3, #1
    if( used <= 56 )
    83be:	2a38      	cmp	r2, #56	; 0x38
    ctx->buffer[used++] = 0x80;
    83c0:	4403      	add	r3, r0
{
    83c2:	4604      	mov	r4, r0
    ctx->buffer[used++] = 0x80;
    83c4:	f883 1028 	strb.w	r1, [r3, #40]	; 0x28
        memset( ctx->buffer + used, 0, 56 - used );
    83c8:	eb06 0002 	add.w	r0, r6, r2
    if( used <= 56 )
    83cc:	d861      	bhi.n	8492 <mbedtls_sha256_finish+0xe6>
        memset( ctx->buffer + used, 0, 56 - used );
    83ce:	2100      	movs	r1, #0
    83d0:	f1c2 0238 	rsb	r2, r2, #56	; 0x38
        memset( ctx->buffer + used, 0, 64 - used );

        if( ( ret = mbedtls_internal_sha256_process( ctx, ctx->buffer ) ) != 0 )
            return( ret );

        memset( ctx->buffer, 0, 56 );
    83d4:	f7fe f8eb 	bl	65ae <memset>

    /*
     * Add message length
     */
    high = ( ctx->total[0] >> 29 )
         | ( ctx->total[1] <<  3 );
    83d8:	e9d4 3100 	ldrd	r3, r1, [r4]
    high = ( ctx->total[0] >> 29 )
    83dc:	0f5a      	lsrs	r2, r3, #29
    83de:	ea42 02c1 	orr.w	r2, r2, r1, lsl #3
    low  = ( ctx->total[0] <<  3 );
    83e2:	00db      	lsls	r3, r3, #3
    83e4:	ba12      	rev	r2, r2
    83e6:	ba1b      	rev	r3, r3

    MBEDTLS_PUT_UINT32_BE( high, ctx->buffer, 56 );
    MBEDTLS_PUT_UINT32_BE( low,  ctx->buffer, 60 );

    if( ( ret = mbedtls_internal_sha256_process( ctx, ctx->buffer ) ) != 0 )
    83e8:	4631      	mov	r1, r6
    83ea:	4620      	mov	r0, r4
    MBEDTLS_PUT_UINT32_BE( high, ctx->buffer, 56 );
    83ec:	6622      	str	r2, [r4, #96]	; 0x60
    MBEDTLS_PUT_UINT32_BE( low,  ctx->buffer, 60 );
    83ee:	6663      	str	r3, [r4, #100]	; 0x64
    if( ( ret = mbedtls_internal_sha256_process( ctx, ctx->buffer ) ) != 0 )
    83f0:	f7fc f94c 	bl	468c <mbedtls_internal_sha256_process>
    83f4:	2800      	cmp	r0, #0
    83f6:	d14b      	bne.n	8490 <mbedtls_sha256_finish+0xe4>
        return( ret );

    /*
     * Output final state
     */
    MBEDTLS_PUT_UINT32_BE( ctx->state[0], output,  0 );
    83f8:	7ae3      	ldrb	r3, [r4, #11]
    83fa:	702b      	strb	r3, [r5, #0]
    83fc:	8963      	ldrh	r3, [r4, #10]
    83fe:	706b      	strb	r3, [r5, #1]
    8400:	68a3      	ldr	r3, [r4, #8]
    8402:	0a1b      	lsrs	r3, r3, #8
    8404:	70ab      	strb	r3, [r5, #2]
    8406:	68a3      	ldr	r3, [r4, #8]
    8408:	70eb      	strb	r3, [r5, #3]
    MBEDTLS_PUT_UINT32_BE( ctx->state[1], output,  4 );
    840a:	7be3      	ldrb	r3, [r4, #15]
    840c:	712b      	strb	r3, [r5, #4]
    840e:	89e3      	ldrh	r3, [r4, #14]
    8410:	716b      	strb	r3, [r5, #5]
    8412:	68e3      	ldr	r3, [r4, #12]
    8414:	0a1b      	lsrs	r3, r3, #8
    8416:	71ab      	strb	r3, [r5, #6]
    8418:	68e3      	ldr	r3, [r4, #12]
    841a:	71eb      	strb	r3, [r5, #7]
    MBEDTLS_PUT_UINT32_BE( ctx->state[2], output,  8 );
    841c:	7ce3      	ldrb	r3, [r4, #19]
    841e:	722b      	strb	r3, [r5, #8]
    8420:	8a63      	ldrh	r3, [r4, #18]
    8422:	726b      	strb	r3, [r5, #9]
    8424:	6923      	ldr	r3, [r4, #16]
    8426:	0a1b      	lsrs	r3, r3, #8
    8428:	72ab      	strb	r3, [r5, #10]
    842a:	6923      	ldr	r3, [r4, #16]
    842c:	72eb      	strb	r3, [r5, #11]
    MBEDTLS_PUT_UINT32_BE( ctx->state[3], output, 12 );
    842e:	7de3      	ldrb	r3, [r4, #23]
    8430:	732b      	strb	r3, [r5, #12]
    8432:	8ae3      	ldrh	r3, [r4, #22]
    8434:	736b      	strb	r3, [r5, #13]
    8436:	6963      	ldr	r3, [r4, #20]
    8438:	0a1b      	lsrs	r3, r3, #8
    843a:	73ab      	strb	r3, [r5, #14]
    843c:	6963      	ldr	r3, [r4, #20]
    843e:	73eb      	strb	r3, [r5, #15]
    MBEDTLS_PUT_UINT32_BE( ctx->state[4], output, 16 );
    8440:	7ee3      	ldrb	r3, [r4, #27]
    8442:	742b      	strb	r3, [r5, #16]
    8444:	8b63      	ldrh	r3, [r4, #26]
    8446:	746b      	strb	r3, [r5, #17]
    8448:	69a3      	ldr	r3, [r4, #24]
    844a:	0a1b      	lsrs	r3, r3, #8
    844c:	74ab      	strb	r3, [r5, #18]
    844e:	69a3      	ldr	r3, [r4, #24]
    8450:	74eb      	strb	r3, [r5, #19]
    MBEDTLS_PUT_UINT32_BE( ctx->state[5], output, 20 );
    8452:	7fe3      	ldrb	r3, [r4, #31]
    8454:	752b      	strb	r3, [r5, #20]
    8456:	8be3      	ldrh	r3, [r4, #30]
    8458:	756b      	strb	r3, [r5, #21]
    845a:	69e3      	ldr	r3, [r4, #28]
    845c:	0a1b      	lsrs	r3, r3, #8
    845e:	75ab      	strb	r3, [r5, #22]
    8460:	69e3      	ldr	r3, [r4, #28]
    8462:	75eb      	strb	r3, [r5, #23]
    MBEDTLS_PUT_UINT32_BE( ctx->state[6], output, 24 );
    8464:	f894 3023 	ldrb.w	r3, [r4, #35]	; 0x23
    8468:	762b      	strb	r3, [r5, #24]
    846a:	8c63      	ldrh	r3, [r4, #34]	; 0x22
    846c:	766b      	strb	r3, [r5, #25]
    846e:	6a23      	ldr	r3, [r4, #32]
    8470:	0a1b      	lsrs	r3, r3, #8
    8472:	76ab      	strb	r3, [r5, #26]
    8474:	6a23      	ldr	r3, [r4, #32]
    8476:	76eb      	strb	r3, [r5, #27]

#if defined(MBEDTLS_SHA224_C)
    if( ctx->is224 == 0 )
    8478:	6ea3      	ldr	r3, [r4, #104]	; 0x68
    847a:	b94b      	cbnz	r3, 8490 <mbedtls_sha256_finish+0xe4>
#endif
        MBEDTLS_PUT_UINT32_BE( ctx->state[7], output, 28 );
    847c:	f894 3027 	ldrb.w	r3, [r4, #39]	; 0x27
    8480:	772b      	strb	r3, [r5, #28]
    8482:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
    8484:	776b      	strb	r3, [r5, #29]
    8486:	6a63      	ldr	r3, [r4, #36]	; 0x24
    8488:	0a1b      	lsrs	r3, r3, #8
    848a:	77ab      	strb	r3, [r5, #30]
    848c:	6a63      	ldr	r3, [r4, #36]	; 0x24
    848e:	77eb      	strb	r3, [r5, #31]

    return( 0 );
}
    8490:	bd70      	pop	{r4, r5, r6, pc}
        memset( ctx->buffer + used, 0, 64 - used );
    8492:	2100      	movs	r1, #0
    8494:	f1c2 0240 	rsb	r2, r2, #64	; 0x40
    8498:	f7fe f889 	bl	65ae <memset>
        if( ( ret = mbedtls_internal_sha256_process( ctx, ctx->buffer ) ) != 0 )
    849c:	4631      	mov	r1, r6
    849e:	4620      	mov	r0, r4
    84a0:	f7fc f8f4 	bl	468c <mbedtls_internal_sha256_process>
    84a4:	2800      	cmp	r0, #0
    84a6:	d1f3      	bne.n	8490 <mbedtls_sha256_finish+0xe4>
        memset( ctx->buffer, 0, 56 );
    84a8:	4601      	mov	r1, r0
    84aa:	2238      	movs	r2, #56	; 0x38
    84ac:	4630      	mov	r0, r6
    84ae:	e791      	b.n	83d4 <mbedtls_sha256_finish+0x28>

000084b0 <nrf91_errata_14>:
                uint32_t var1 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000130ul));
    84b0:	f44f 037f 	mov.w	r3, #16711680	; 0xff0000
    84b4:	f8d3 2130 	ldr.w	r2, [r3, #304]	; 0x130
                uint32_t var2 = *((volatile uint32_t *)((uint32_t)NRF_FICR_S + 0x00000134ul));
    84b8:	f8d3 0134 	ldr.w	r0, [r3, #308]	; 0x134
  __ASM volatile ("dsb 0xF":::"memory");
    84bc:	f3bf 8f4f 	dsb	sy
            if (var1 == 0x09)
    84c0:	2a09      	cmp	r2, #9
    84c2:	d103      	bne.n	84cc <nrf91_errata_14+0x1c>
                switch(var2)
    84c4:	1e43      	subs	r3, r0, #1
    84c6:	4258      	negs	r0, r3
    84c8:	4158      	adcs	r0, r3
    84ca:	4770      	bx	lr
                        return false;
    84cc:	2000      	movs	r0, #0
}
    84ce:	4770      	bx	lr

000084d0 <nrfx_isr>:
#include <zephyr/kernel.h>
#include <soc/nrfx_coredep.h>

void nrfx_isr(const void *irq_handler)
{
	((nrfx_irq_handler_t)irq_handler)();
    84d0:	4700      	bx	r0

000084d2 <nrfx_busy_wait>:
    84d2:	f000 b8c9 	b.w	8668 <z_impl_k_busy_wait>

000084d6 <clock_stop>:
{
    84d6:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    switch (domain)
    84d8:	4604      	mov	r4, r0
    84da:	b118      	cbz	r0, 84e4 <clock_stop+0xe>
    84dc:	2801      	cmp	r0, #1
    84de:	d020      	beq.n	8522 <clock_stop+0x4c>
}
    84e0:	b003      	add	sp, #12
    84e2:	bdf0      	pop	{r4, r5, r6, r7, pc}
    84e4:	f04f 2350 	mov.w	r3, #1342197760	; 0x50005000
    84e8:	2202      	movs	r2, #2
    84ea:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    84ee:	f8c3 0104 	str.w	r0, [r3, #260]	; 0x104
    84f2:	f8d3 2104 	ldr.w	r2, [r3, #260]	; 0x104
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    84f6:	2201      	movs	r2, #1
    nrf_clock_hfclk_t *p_clk_src = (domain == NRF_CLOCK_DOMAIN_HFCLK) ? &clk_src : NULL;
    84f8:	4607      	mov	r7, r0
    84fa:	60da      	str	r2, [r3, #12]
    nrf_clock_hfclk_t clk_src = NRF_CLOCK_HFCLK_HIGH_ACCURACY;
    84fc:	2301      	movs	r3, #1
    84fe:	f242 7510 	movw	r5, #10000	; 0x2710
    8502:	f04f 2650 	mov.w	r6, #1342197760	; 0x50005000
    8506:	f88d 3007 	strb.w	r3, [sp, #7]
    switch (domain)
    850a:	b1bc      	cbz	r4, 853c <clock_stop+0x66>
    850c:	2c01      	cmp	r4, #1
    850e:	d1e7      	bne.n	84e0 <clock_stop+0xa>
            if (p_clk_src != NULL)
    8510:	b38f      	cbz	r7, 8576 <clock_stop+0xa0>
                    (nrf_clock_hfclk_t)((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_SRC_Msk)
    8512:	f8d6 340c 	ldr.w	r3, [r6, #1036]	; 0x40c
    8516:	f003 0301 	and.w	r3, r3, #1
                (*(nrf_clock_hfclk_t *)p_clk_src) =
    851a:	703b      	strb	r3, [r7, #0]
            if ((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_STATE_Msk)
    851c:	f8d6 340c 	ldr.w	r3, [r6, #1036]	; 0x40c
    8520:	e014      	b.n	854c <clock_stop+0x76>
    p_reg->INTENCLR = mask;
    8522:	f04f 2350 	mov.w	r3, #1342197760	; 0x50005000
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    8526:	2200      	movs	r2, #0
    p_reg->INTENCLR = mask;
    8528:	f8c3 0308 	str.w	r0, [r3, #776]	; 0x308
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    852c:	f8c3 2100 	str.w	r2, [r3, #256]	; 0x100
    8530:	f8d3 2100 	ldr.w	r2, [r3, #256]	; 0x100
    nrf_clock_hfclk_t *p_clk_src = (domain == NRF_CLOCK_DOMAIN_HFCLK) ? &clk_src : NULL;
    8534:	f10d 0707 	add.w	r7, sp, #7
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    8538:	6058      	str	r0, [r3, #4]
    853a:	e7df      	b.n	84fc <clock_stop+0x26>
            if (p_clk_src != NULL)
    853c:	b18f      	cbz	r7, 8562 <clock_stop+0x8c>
                    (nrf_clock_lfclk_t)((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_SRC_Msk)
    853e:	f8d6 3418 	ldr.w	r3, [r6, #1048]	; 0x418
    8542:	f003 0303 	and.w	r3, r3, #3
                (*(nrf_clock_lfclk_t *)p_clk_src) =
    8546:	703b      	strb	r3, [r7, #0]
            if ((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_STATE_Msk)
    8548:	f8d6 3418 	ldr.w	r3, [r6, #1048]	; 0x418
            if ((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_STATE_Msk)
    854c:	03da      	lsls	r2, r3, #15
    854e:	d5c7      	bpl.n	84e0 <clock_stop+0xa>
    NRFX_WAIT_FOR((!nrfx_clock_is_running(domain, p_clk_src) ||
    8550:	f89d 0007 	ldrb.w	r0, [sp, #7]
    8554:	2801      	cmp	r0, #1
    8556:	d1c3      	bne.n	84e0 <clock_stop+0xa>
    8558:	f7ff ffbb 	bl	84d2 <nrfx_busy_wait>
    855c:	3d01      	subs	r5, #1
    855e:	d1d4      	bne.n	850a <clock_stop+0x34>
    8560:	e7be      	b.n	84e0 <clock_stop+0xa>
            if ((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_STATE_Msk)
    8562:	f8d6 3418 	ldr.w	r3, [r6, #1048]	; 0x418
    8566:	03d9      	lsls	r1, r3, #15
    8568:	d5ba      	bpl.n	84e0 <clock_stop+0xa>
    856a:	2001      	movs	r0, #1
    856c:	f7ff ffb1 	bl	84d2 <nrfx_busy_wait>
    8570:	3d01      	subs	r5, #1
    8572:	d1f6      	bne.n	8562 <clock_stop+0x8c>
    8574:	e7b4      	b.n	84e0 <clock_stop+0xa>
            if ((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_STATE_Msk)
    8576:	f8d6 340c 	ldr.w	r3, [r6, #1036]	; 0x40c
    857a:	03db      	lsls	r3, r3, #15
    857c:	d5b0      	bpl.n	84e0 <clock_stop+0xa>
    857e:	2001      	movs	r0, #1
    8580:	f7ff ffa7 	bl	84d2 <nrfx_busy_wait>
    8584:	3d01      	subs	r5, #1
    8586:	d1f6      	bne.n	8576 <clock_stop+0xa0>
    8588:	e7aa      	b.n	84e0 <clock_stop+0xa>

0000858a <nrfx_clock_enable>:
{
    858a:	b508      	push	{r3, lr}
    priority = NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY;
#else
    #error "This code is not supposed to be compiled when neither POWER nor CLOCK is enabled."
#endif

    if (!NRFX_IRQ_IS_ENABLED(nrfx_get_irq_number(NRF_CLOCK)))
    858c:	2005      	movs	r0, #5
    858e:	f7fa fa5f 	bl	2a50 <arch_irq_is_enabled>
    8592:	b910      	cbnz	r0, 859a <nrfx_clock_enable+0x10>
    {
        NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(NRF_CLOCK), priority);
        NRFX_IRQ_ENABLE(nrfx_get_irq_number(NRF_CLOCK));
    8594:	2005      	movs	r0, #5
    8596:	f7fa fa4d 	bl	2a34 <arch_irq_enable>
    p_reg->LFCLKSRC = (uint32_t)(source);
    859a:	f04f 2350 	mov.w	r3, #1342197760	; 0x50005000
    859e:	2201      	movs	r2, #1
    85a0:	f8c3 2518 	str.w	r2, [r3, #1304]	; 0x518
}
    85a4:	bd08      	pop	{r3, pc}

000085a6 <nrfx_clock_start>:
{
    85a6:	b508      	push	{r3, lr}
    switch (domain)
    85a8:	b110      	cbz	r0, 85b0 <nrfx_clock_start+0xa>
    85aa:	2801      	cmp	r0, #1
    85ac:	d030      	beq.n	8610 <nrfx_clock_start+0x6a>
}
    85ae:	bd08      	pop	{r3, pc}
                    (nrf_clock_lfclk_t)((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_SRC_Msk)
    85b0:	f04f 2250 	mov.w	r2, #1342197760	; 0x50005000
    85b4:	f8d2 3418 	ldr.w	r3, [r2, #1048]	; 0x418
            if ((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_STATE_Msk)
    85b8:	f8d2 1418 	ldr.w	r1, [r2, #1048]	; 0x418
    85bc:	03c9      	lsls	r1, r1, #15
    85be:	d40e      	bmi.n	85de <nrfx_clock_start+0x38>
            return ((p_reg->LFCLKRUN & CLOCK_LFCLKRUN_STATUS_Msk)
    85c0:	f8d2 3414 	ldr.w	r3, [r2, #1044]	; 0x414
                else if (nrf_clock_start_task_check(NRF_CLOCK, NRF_CLOCK_DOMAIN_LFCLK))
    85c4:	07db      	lsls	r3, r3, #31
    85c6:	d513      	bpl.n	85f0 <nrfx_clock_start+0x4a>
    return (nrf_clock_lfclk_t)((p_reg->LFCLKSRCCOPY & CLOCK_LFCLKSRCCOPY_SRC_Msk)
    85c8:	f8d2 341c 	ldr.w	r3, [r2, #1052]	; 0x41c
    85cc:	f003 0303 	and.w	r3, r3, #3
    is_correct_clk = is_correct_clk || (*p_lfclksrc == NRF_CLOCK_LFCLK_RC);
    85d0:	3b01      	subs	r3, #1
    85d2:	2b01      	cmp	r3, #1
    85d4:	d809      	bhi.n	85ea <nrfx_clock_start+0x44>
    p_reg->INTENSET = mask;
    85d6:	2302      	movs	r3, #2
    85d8:	f8c2 3304 	str.w	r3, [r2, #772]	; 0x304
                        break;
    85dc:	e7e7      	b.n	85ae <nrfx_clock_start+0x8>
                    (nrf_clock_lfclk_t)((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_SRC_Msk)
    85de:	f003 0303 	and.w	r3, r3, #3
    is_correct_clk = is_correct_clk || (*p_lfclksrc == NRF_CLOCK_LFCLK_RC);
    85e2:	2b02      	cmp	r3, #2
    85e4:	d005      	beq.n	85f2 <nrfx_clock_start+0x4c>
    85e6:	2b01      	cmp	r3, #1
    85e8:	d002      	beq.n	85f0 <nrfx_clock_start+0x4a>
        clock_stop(NRF_CLOCK_DOMAIN_LFCLK);
    85ea:	2000      	movs	r0, #0
    85ec:	f7ff ff73 	bl	84d6 <clock_stop>
        *p_lfclksrc = clock_initial_lfclksrc_get();
    85f0:	2301      	movs	r3, #1
    p_reg->LFCLKSRC = (uint32_t)(source);
    85f2:	f04f 2250 	mov.w	r2, #1342197760	; 0x50005000
    85f6:	f8c2 3518 	str.w	r3, [r2, #1304]	; 0x518
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    85fa:	2300      	movs	r3, #0
    85fc:	f8c2 3104 	str.w	r3, [r2, #260]	; 0x104
    8600:	f8d2 3104 	ldr.w	r3, [r2, #260]	; 0x104
    p_reg->INTENSET = mask;
    8604:	2302      	movs	r3, #2
    8606:	f8c2 3304 	str.w	r3, [r2, #772]	; 0x304
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    860a:	2301      	movs	r3, #1
    860c:	6093      	str	r3, [r2, #8]
}
    860e:	e7ce      	b.n	85ae <nrfx_clock_start+0x8>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    8610:	f04f 2350 	mov.w	r3, #1342197760	; 0x50005000
    8614:	2200      	movs	r2, #0
    8616:	f8c3 2100 	str.w	r2, [r3, #256]	; 0x100
    861a:	f8d3 2100 	ldr.w	r2, [r3, #256]	; 0x100
    p_reg->INTENSET = mask;
    861e:	f8c3 0304 	str.w	r0, [r3, #772]	; 0x304
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    8622:	6018      	str	r0, [r3, #0]
}
    8624:	e7c3      	b.n	85ae <nrfx_clock_start+0x8>

00008626 <nrfx_clock_stop>:
    clock_stop(domain);
    8626:	f7ff bf56 	b.w	84d6 <clock_stop>

0000862a <nrfx_nvmc_flash_size_get>:
}

uint32_t nrfx_nvmc_flash_size_get(void)
{
    return flash_total_size_get();
}
    862a:	f44f 1080 	mov.w	r0, #1048576	; 0x100000
    862e:	4770      	bx	lr

00008630 <nrfx_nvmc_flash_page_size_get>:

uint32_t nrfx_nvmc_flash_page_size_get(void)
{
    return flash_page_size_get();
}
    8630:	f44f 5080 	mov.w	r0, #4096	; 0x1000
    8634:	4770      	bx	lr

00008636 <nrfx_nvmc_flash_page_count_get>:

uint32_t nrfx_nvmc_flash_page_count_get(void)
{
    return flash_page_count_get();
}
    8636:	f44f 7080 	mov.w	r0, #256	; 0x100
    863a:	4770      	bx	lr

0000863c <z_device_state_init>:

	while (dev < __device_end) {
		z_object_init(dev);
		++dev;
	}
}
    863c:	4770      	bx	lr

0000863e <z_device_is_ready>:
{
	/*
	 * if an invalid device pointer is passed as argument, this call
	 * reports the `device` as not ready for usage.
	 */
	if (dev == NULL) {
    863e:	b140      	cbz	r0, 8652 <z_device_is_ready+0x14>
		return false;
	}

	return dev->state->initialized && (dev->state->init_res == 0U);
    8640:	68c3      	ldr	r3, [r0, #12]
    8642:	7858      	ldrb	r0, [r3, #1]
    8644:	f010 0001 	ands.w	r0, r0, #1
    8648:	bf1e      	ittt	ne
    864a:	7818      	ldrbne	r0, [r3, #0]
    864c:	fab0 f080 	clzne	r0, r0
    8650:	0940      	lsrne	r0, r0, #5
}
    8652:	4770      	bx	lr

00008654 <z_early_memset>:
	(void) memset(dst, c, n);
    8654:	f7fd bfab 	b.w	65ae <memset>

00008658 <z_early_memcpy>:
	(void) memcpy(dst, src, n);
    8658:	f7fd bf9e 	b.w	6598 <memcpy>

0000865c <k_is_in_isr>:
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
    865c:	f3ef 8005 	mrs	r0, IPSR
}

bool k_is_in_isr(void)
{
	return arch_is_in_isr();
}
    8660:	3800      	subs	r0, #0
    8662:	bf18      	it	ne
    8664:	2001      	movne	r0, #1
    8666:	4770      	bx	lr

00008668 <z_impl_k_busy_wait>:
#endif

void z_impl_k_busy_wait(uint32_t usec_to_wait)
{
	SYS_PORT_TRACING_FUNC_ENTER(k_thread, busy_wait, usec_to_wait);
	if (usec_to_wait == 0U) {
    8668:	b108      	cbz	r0, 866e <z_impl_k_busy_wait+0x6>
		if ((current_cycles - start_cycles) >= cycles_to_wait) {
			break;
		}
	}
#else
	arch_busy_wait(usec_to_wait);
    866a:	f7f9 bb93 	b.w	1d94 <arch_busy_wait>
#endif /* CONFIG_ARCH_HAS_CUSTOM_BUSY_WAIT */
	SYS_PORT_TRACING_FUNC_EXIT(k_thread, busy_wait, usec_to_wait);
}
    866e:	4770      	bx	lr

00008670 <_OffsetAbsSyms>:

#include <gen_offset.h>

#include "offsets_aarch32.c"

GEN_ABS_SYM_END
    8670:	4770      	bx	lr
	...
