diff --git a/soc/arm/Kconfig b/soc/arm/Kconfig
index f1435fd48d..5855b844db 100644
--- a/soc/arm/Kconfig
+++ b/soc/arm/Kconfig
@@ -45,6 +45,7 @@ if CPU_HAS_NRF_IDAU
 config NRF_SPU_FLASH_REGION_SIZE
 	hex
 	default 0x8000 if SOC_NRF9160
+	default 0x8000 if SOC_NRF5340_CPUAPP && NRF5340_CPUAPP_ERRATUM19
 	default 0x4000 if SOC_NRF5340_CPUAPP
 	help
 	  FLASH region size for the NRF_SPU peripheral
diff --git a/soc/arm/nordic_nrf/nrf53/Kconfig.defconfig.nrf5340_CPUAPP_QKAA b/soc/arm/nordic_nrf/nrf53/Kconfig.defconfig.nrf5340_CPUAPP_QKAA
index 7d0f6c1b36..1bfbd0af1c 100644
--- a/soc/arm/nordic_nrf/nrf53/Kconfig.defconfig.nrf5340_CPUAPP_QKAA
+++ b/soc/arm/nordic_nrf/nrf53/Kconfig.defconfig.nrf5340_CPUAPP_QKAA
@@ -11,6 +11,9 @@ config SOC
 config NUM_IRQS
 	default 69
 
+config NRF5340_CPUAPP_ERRATUM19
+    bool "Include workarounds for Erratum 19"
+
 config IEEE802154_NRF5
 	default IEEE802154
 
diff --git a/soc/arm/nordic_nrf/nrf53/soc.c b/soc/arm/nordic_nrf/nrf53/soc.c
index 7fd1bc9858..1345da41b1 100644
--- a/soc/arm/nordic_nrf/nrf53/soc.c
+++ b/soc/arm/nordic_nrf/nrf53/soc.c
@@ -126,4 +126,34 @@ void arch_busy_wait(uint32_t time_us)
 	nrfx_coredep_delay_us(time_us);
 }
 
+#if defined(CONFIG_SOC_NRF5340_CPUAPP) && \
+	!defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
+bool nrf53_has_erratum19(void)
+{
+	if (NRF_FICR->INFO.PART == 0x5340) {
+		if (NRF_FICR->INFO.VARIANT == 0x41414142) {
+			return true;
+		}
+	}
+	return false;
+}
+
+#ifndef CONFIG_NRF5340_CPUAPP_ERRATUM19
+static int check_erratum19(const struct device *arg)
+{
+	ARG_UNUSED(arg);
+	if (nrf53_has_erratum19()) {
+		LOG_ERR("This device is affected by nRF53 Erratum 19,");
+		LOG_ERR("but workarounds have not been enabled.");
+		LOG_ERR("See CONFIG_NRF5340_CPUAPP_ERRATUM19.");
+		k_panic();
+	}
+
+	return 0;
+}
+
+SYS_INIT(check_erratum19, POST_KERNEL, CONFIG_APPLICATION_INIT_PRIORITY);
+#endif
+#endif
+
 SYS_INIT(nordicsemi_nrf53_init, PRE_KERNEL_1, 0);