/*
 * Generated by gen_defines.py
 *
 * DTS input file:
 *   C:/Work/nrf-samples/hello_world/app/build/b0n/zephyr/zephyr.dts.pre
 *
 * Directories with bindings:
 *   C:/ncs/v2.9.2/nrf/dts/bindings, $ZEPHYR_BASE\dts\bindings
 *
 * Node dependency ordering (ordinal and path):
 *   0   /
 *   1   /aliases
 *   2   /chosen
 *   3   /entropy_bt_hci
 *   4   /pin-controller
 *   5   /soc
 *   6   /soc/interrupt-controller@e000e100
 *   7   /soc/timer@41018000
 *   8   /sw-pwm
 *   9   /cpus
 *   10  /cpus/cpu@1
 *   11  /cpus/cpu@1/mpu@e000ed90
 *   12  /ipc
 *   13  /reserved-memory
 *   14  /reserved-memory/memory@20078000
 *   15  /soc/mbox@41012000
 *   16  /ipc/ipc0
 *   17  /soc/acl@41080000
 *   18  /soc/ccm@4100e000
 *   19  /soc/clock@41005000
 *   20  /soc/dppic@4100f000
 *   21  /soc/ecb@4100d000
 *   22  /soc/egu@41014000
 *   23  /soc/ficr@1ff0000
 *   24  /soc/gpiote@4100a000
 *   25  /soc/gpio@418c0500
 *   26  /soc/gpio@418c0800
 *   27  /soc/i2c@41013000
 *   28  /soc/memory@20000000
 *   29  /soc/memory@21000000
 *   30  /soc/random@41009000
 *   31  /soc/rtc@41011000
 *   32  /soc/rtc@41016000
 *   33  /soc/spi@41013000
 *   34  /soc/swi@4101a000
 *   35  /soc/swi@4101b000
 *   36  /soc/swi@4101c000
 *   37  /soc/swi@4101d000
 *   38  /soc/temp@41010000
 *   39  /soc/timer@4100c000
 *   40  /soc/timer@41019000
 *   41  /soc/timer@e000e010
 *   42  /soc/uart@41013000
 *   43  /soc/uicr@1ff8000
 *   44  /soc/vmc@41081000
 *   45  /soc/watchdog@4100b000
 *   46  /soc/flash-controller@41080000
 *   47  /soc/flash-controller@41080000/flash@1000000
 *   48  /soc/flash-controller@41080000/flash@1000000/partitions
 *   49  /soc/flash-controller@41080000/flash@1000000/partitions/partition@0
 *   50  /soc/flash-controller@41080000/flash@1000000/partitions/partition@eccc00
 *   51  /soc/flash-controller@41080000/flash@1000000/partitions/partition@ed0000
 *   52  /soc/flash-controller@41080000/flash@1000000/partitions/partition@fc0000
 *   53  /soc/power@41005000
 *   54  /soc/power@41005000/gpregret1@4100551c
 *   55  /soc/power@41005000/gpregret2@41005520
 *   56  /soc/radio@41008000
 *   57  /soc/radio@41008000/bt_hci_controller
 *   58  /soc/radio@41008000/bt_hci_sdc
 *   59  /soc/radio@41008000/ieee802154
 *
 * Definitions derived from these nodes in dependency order are next,
 * followed by /chosen nodes.
 */

/* Used to remove brackets from around a single argument */
#define DT_DEBRACKET_INTERNAL(...) __VA_ARGS__

/*
 * Devicetree node: /
 *
 * Node identifier: DT_N
 */

/* Node's full path: */
#define DT_N_PATH "/"

/* Node's name with unit-address: */
#define DT_N_FULL_NAME "/"

/* Helpers for dealing with node labels: */
#define DT_N_NODELABEL_NUM 0
#define DT_N_FOREACH_NODELABEL(fn) 
#define DT_N_FOREACH_NODELABEL_VARGS(fn, ...) 

/* Helper macros for child nodes of this node. */
#define DT_N_CHILD_NUM 9
#define DT_N_CHILD_NUM_STATUS_OKAY 8
#define DT_N_FOREACH_CHILD(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_pin_controller) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_sw_pwm) fn(DT_N_S_cpus) fn(DT_N_S_ipc) fn(DT_N_S_reserved_memory)
#define DT_N_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_chosen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sw_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_ipc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory)
#define DT_N_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_sw_pwm, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_ipc, __VA_ARGS__) fn(DT_N_S_reserved_memory, __VA_ARGS__)
#define DT_N_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_chosen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sw_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_ipc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory, __VA_ARGS__)
#define DT_N_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_pin_controller) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_cpus) fn(DT_N_S_ipc) fn(DT_N_S_reserved_memory)
#define DT_N_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_chosen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_ipc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory)
#define DT_N_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_ipc, __VA_ARGS__) fn(DT_N_S_reserved_memory, __VA_ARGS__)
#define DT_N_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_chosen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_ipc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_reserved_memory, __VA_ARGS__)

/* Node's dependency ordinal: */
#define DT_N_ORD 0
#define DT_N_ORD_STR_SORTABLE 00000

/* Ordinals for what this node depends on directly: */
#define DT_N_REQUIRES_ORDS /* nothing */

/* Ordinals for what depends directly on this node: */
#define DT_N_SUPPORTS_ORDS \
	1, /* /aliases */ \
	2, /* /chosen */ \
	3, /* /entropy_bt_hci */ \
	4, /* /pin-controller */ \
	5, /* /soc */ \
	8, /* /sw-pwm */ \
	9, /* /cpus */ \
	12, /* /ipc */ \
	13, /* /reserved-memory */

/* Existence and alternate IDs: */
#define DT_N_EXISTS 1
#define DT_N_INST_0_corp_my_nrf5340_nrf5340_cpunet DT_N

/* Macros for properties that are special in the specification: */
#define DT_N_REG_NUM 0
#define DT_N_RANGES_NUM 0
#define DT_N_FOREACH_RANGE(fn) 
#define DT_N_IRQ_NUM 0
#define DT_N_IRQ_LEVEL 0
#define DT_N_COMPAT_MATCHES_corp_my_nrf5340_nrf5340_cpunet 1
#define DT_N_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_P_compatible {"corp,my-nrf5340-nrf5340-cpunet"}
#define DT_N_P_compatible_IDX_0 "corp,my-nrf5340-nrf5340-cpunet"
#define DT_N_P_compatible_IDX_0_STRING_UNQUOTED corp,my-nrf5340-nrf5340-cpunet
#define DT_N_P_compatible_IDX_0_STRING_TOKEN corp_my_nrf5340_nrf5340_cpunet
#define DT_N_P_compatible_IDX_0_STRING_UPPER_TOKEN CORP_MY_NRF5340_NRF5340_CPUNET
#define DT_N_P_compatible_IDX_0_EXISTS 1
#define DT_N_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N, compatible, 0)
#define DT_N_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N, compatible, 0)
#define DT_N_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N, compatible, 0, __VA_ARGS__)
#define DT_N_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N, compatible, 0, __VA_ARGS__)
#define DT_N_P_compatible_LEN 1
#define DT_N_P_compatible_EXISTS 1

/*
 * Devicetree node: /aliases
 *
 * Node identifier: DT_N_S_aliases
 */

/* Node's full path: */
#define DT_N_S_aliases_PATH "/aliases"

/* Node's name with unit-address: */
#define DT_N_S_aliases_FULL_NAME "aliases"

/* Node parent (/) identifier: */
#define DT_N_S_aliases_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_aliases_CHILD_IDX 1

/* Helpers for dealing with node labels: */
#define DT_N_S_aliases_NODELABEL_NUM 0
#define DT_N_S_aliases_FOREACH_NODELABEL(fn) 
#define DT_N_S_aliases_FOREACH_NODELABEL_VARGS(fn, ...) 

/* Helper macros for child nodes of this node. */
#define DT_N_S_aliases_CHILD_NUM 0
#define DT_N_S_aliases_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_aliases_FOREACH_CHILD(fn) 
#define DT_N_S_aliases_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_aliases_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_aliases_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_aliases_ORD 1
#define DT_N_S_aliases_ORD_STR_SORTABLE 00001

/* Ordinals for what this node depends on directly: */
#define DT_N_S_aliases_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_aliases_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_aliases_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_aliases_REG_NUM 0
#define DT_N_S_aliases_RANGES_NUM 0
#define DT_N_S_aliases_FOREACH_RANGE(fn) 
#define DT_N_S_aliases_IRQ_NUM 0
#define DT_N_S_aliases_IRQ_LEVEL 0
#define DT_N_S_aliases_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_aliases_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /chosen
 *
 * Node identifier: DT_N_S_chosen
 */

/* Node's full path: */
#define DT_N_S_chosen_PATH "/chosen"

/* Node's name with unit-address: */
#define DT_N_S_chosen_FULL_NAME "chosen"

/* Node parent (/) identifier: */
#define DT_N_S_chosen_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_chosen_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_chosen_NODELABEL_NUM 0
#define DT_N_S_chosen_FOREACH_NODELABEL(fn) 
#define DT_N_S_chosen_FOREACH_NODELABEL_VARGS(fn, ...) 

/* Helper macros for child nodes of this node. */
#define DT_N_S_chosen_CHILD_NUM 0
#define DT_N_S_chosen_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_chosen_FOREACH_CHILD(fn) 
#define DT_N_S_chosen_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_chosen_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_chosen_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_chosen_ORD 2
#define DT_N_S_chosen_ORD_STR_SORTABLE 00002

/* Ordinals for what this node depends on directly: */
#define DT_N_S_chosen_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_chosen_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_chosen_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_chosen_REG_NUM 0
#define DT_N_S_chosen_RANGES_NUM 0
#define DT_N_S_chosen_FOREACH_RANGE(fn) 
#define DT_N_S_chosen_IRQ_NUM 0
#define DT_N_S_chosen_IRQ_LEVEL 0
#define DT_N_S_chosen_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_chosen_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /entropy_bt_hci
 *
 * Node identifier: DT_N_S_entropy_bt_hci
 *
 * Binding (compatible = zephyr,bt-hci-entropy):
 *   $ZEPHYR_BASE\dts\bindings\bluetooth\zephyr,bt-hci-entropy.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_entropy_bt_hci_PATH "/entropy_bt_hci"

/* Node's name with unit-address: */
#define DT_N_S_entropy_bt_hci_FULL_NAME "entropy_bt_hci"

/* Node parent (/) identifier: */
#define DT_N_S_entropy_bt_hci_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_entropy_bt_hci_CHILD_IDX 4

/* Helpers for dealing with node labels: */
#define DT_N_S_entropy_bt_hci_NODELABEL_NUM 1
#define DT_N_S_entropy_bt_hci_FOREACH_NODELABEL(fn) fn(rng_hci)
#define DT_N_S_entropy_bt_hci_FOREACH_NODELABEL_VARGS(fn, ...) fn(rng_hci, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_entropy_bt_hci_CHILD_NUM 0
#define DT_N_S_entropy_bt_hci_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD(fn) 
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_entropy_bt_hci_ORD 3
#define DT_N_S_entropy_bt_hci_ORD_STR_SORTABLE 00003

/* Ordinals for what this node depends on directly: */
#define DT_N_S_entropy_bt_hci_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_entropy_bt_hci_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_entropy_bt_hci_EXISTS 1
#define DT_N_INST_0_zephyr_bt_hci_entropy DT_N_S_entropy_bt_hci
#define DT_N_NODELABEL_rng_hci            DT_N_S_entropy_bt_hci

/* Macros for properties that are special in the specification: */
#define DT_N_S_entropy_bt_hci_REG_NUM 0
#define DT_N_S_entropy_bt_hci_RANGES_NUM 0
#define DT_N_S_entropy_bt_hci_FOREACH_RANGE(fn) 
#define DT_N_S_entropy_bt_hci_IRQ_NUM 0
#define DT_N_S_entropy_bt_hci_IRQ_LEVEL 0
#define DT_N_S_entropy_bt_hci_COMPAT_MATCHES_zephyr_bt_hci_entropy 1
#define DT_N_S_entropy_bt_hci_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_entropy_bt_hci_COMPAT_VENDOR_IDX_0 "Zephyr-specific binding"
#define DT_N_S_entropy_bt_hci_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_entropy_bt_hci_COMPAT_MODEL_IDX_0 "bt-hci-entropy"
#define DT_N_S_entropy_bt_hci_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_entropy_bt_hci_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_entropy_bt_hci_P_wakeup_source 0
#define DT_N_S_entropy_bt_hci_P_wakeup_source_EXISTS 1
#define DT_N_S_entropy_bt_hci_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_entropy_bt_hci_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_entropy_bt_hci_P_status "okay"
#define DT_N_S_entropy_bt_hci_P_status_STRING_UNQUOTED okay
#define DT_N_S_entropy_bt_hci_P_status_STRING_TOKEN okay
#define DT_N_S_entropy_bt_hci_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_entropy_bt_hci_P_status_IDX_0 "okay"
#define DT_N_S_entropy_bt_hci_P_status_IDX_0_EXISTS 1
#define DT_N_S_entropy_bt_hci_P_status_ENUM_IDX 1
#define DT_N_S_entropy_bt_hci_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_entropy_bt_hci_P_status_ENUM_TOKEN okay
#define DT_N_S_entropy_bt_hci_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_entropy_bt_hci, status, 0)
#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_entropy_bt_hci, status, 0)
#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_entropy_bt_hci, status, 0, __VA_ARGS__)
#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_entropy_bt_hci, status, 0, __VA_ARGS__)
#define DT_N_S_entropy_bt_hci_P_status_LEN 1
#define DT_N_S_entropy_bt_hci_P_status_EXISTS 1
#define DT_N_S_entropy_bt_hci_P_compatible {"zephyr,bt-hci-entropy"}
#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0 "zephyr,bt-hci-entropy"
#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_STRING_UNQUOTED zephyr,bt-hci-entropy
#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_STRING_TOKEN zephyr_bt_hci_entropy
#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_BT_HCI_ENTROPY
#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_entropy_bt_hci, compatible, 0)
#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_entropy_bt_hci, compatible, 0)
#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_entropy_bt_hci, compatible, 0, __VA_ARGS__)
#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_entropy_bt_hci, compatible, 0, __VA_ARGS__)
#define DT_N_S_entropy_bt_hci_P_compatible_LEN 1
#define DT_N_S_entropy_bt_hci_P_compatible_EXISTS 1
#define DT_N_S_entropy_bt_hci_P_zephyr_deferred_init 0
#define DT_N_S_entropy_bt_hci_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /pin-controller
 *
 * Node identifier: DT_N_S_pin_controller
 *
 * Binding (compatible = nordic,nrf-pinctrl):
 *   $ZEPHYR_BASE\dts\bindings\pinctrl\nordic,nrf-pinctrl.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_pin_controller_PATH "/pin-controller"

/* Node's name with unit-address: */
#define DT_N_S_pin_controller_FULL_NAME "pin-controller"

/* Node parent (/) identifier: */
#define DT_N_S_pin_controller_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_pin_controller_CHILD_IDX 3

/* Helpers for dealing with node labels: */
#define DT_N_S_pin_controller_NODELABEL_NUM 1
#define DT_N_S_pin_controller_FOREACH_NODELABEL(fn) fn(pinctrl)
#define DT_N_S_pin_controller_FOREACH_NODELABEL_VARGS(fn, ...) fn(pinctrl, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_pin_controller_CHILD_NUM 0
#define DT_N_S_pin_controller_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_pin_controller_FOREACH_CHILD(fn) 
#define DT_N_S_pin_controller_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_pin_controller_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_pin_controller_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_pin_controller_ORD 4
#define DT_N_S_pin_controller_ORD_STR_SORTABLE 00004

/* Ordinals for what this node depends on directly: */
#define DT_N_S_pin_controller_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_pin_controller_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_pin_controller_EXISTS 1
#define DT_N_INST_0_nordic_nrf_pinctrl DT_N_S_pin_controller
#define DT_N_NODELABEL_pinctrl         DT_N_S_pin_controller

/* Macros for properties that are special in the specification: */
#define DT_N_S_pin_controller_REG_NUM 0
#define DT_N_S_pin_controller_RANGES_NUM 0
#define DT_N_S_pin_controller_FOREACH_RANGE(fn) 
#define DT_N_S_pin_controller_IRQ_NUM 0
#define DT_N_S_pin_controller_IRQ_LEVEL 0
#define DT_N_S_pin_controller_COMPAT_MATCHES_nordic_nrf_pinctrl 1
#define DT_N_S_pin_controller_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_pin_controller_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_pin_controller_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_pin_controller_COMPAT_MODEL_IDX_0 "nrf-pinctrl"
#define DT_N_S_pin_controller_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_pin_controller_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_pin_controller_P_wakeup_source 0
#define DT_N_S_pin_controller_P_wakeup_source_EXISTS 1
#define DT_N_S_pin_controller_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_pin_controller_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_pin_controller_P_compatible {"nordic,nrf-pinctrl"}
#define DT_N_S_pin_controller_P_compatible_IDX_0 "nordic,nrf-pinctrl"
#define DT_N_S_pin_controller_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pinctrl
#define DT_N_S_pin_controller_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pinctrl
#define DT_N_S_pin_controller_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PINCTRL
#define DT_N_S_pin_controller_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller, compatible, 0)
#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller, compatible, 0)
#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller, compatible, 0, __VA_ARGS__)
#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller, compatible, 0, __VA_ARGS__)
#define DT_N_S_pin_controller_P_compatible_LEN 1
#define DT_N_S_pin_controller_P_compatible_EXISTS 1
#define DT_N_S_pin_controller_P_zephyr_deferred_init 0
#define DT_N_S_pin_controller_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc
 *
 * Node identifier: DT_N_S_soc
 */

/* Node's full path: */
#define DT_N_S_soc_PATH "/soc"

/* Node's name with unit-address: */
#define DT_N_S_soc_FULL_NAME "soc"

/* Node parent (/) identifier: */
#define DT_N_S_soc_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_CHILD_IDX 2

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_NODELABEL_NUM 0
#define DT_N_S_soc_FOREACH_NODELABEL(fn) 
#define DT_N_S_soc_FOREACH_NODELABEL_VARGS(fn, ...) 

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_CHILD_NUM 35
#define DT_N_S_soc_CHILD_NUM_STATUS_OKAY 29
#define DT_N_S_soc_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_ficr_1ff0000) fn(DT_N_S_soc_S_uicr_1ff8000) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_memory_21000000) fn(DT_N_S_soc_S_clock_41005000) fn(DT_N_S_soc_S_power_41005000) fn(DT_N_S_soc_S_radio_41008000) fn(DT_N_S_soc_S_random_41009000) fn(DT_N_S_soc_S_gpiote_4100a000) fn(DT_N_S_soc_S_watchdog_4100b000) fn(DT_N_S_soc_S_timer_4100c000) fn(DT_N_S_soc_S_ecb_4100d000) fn(DT_N_S_soc_S_ccm_4100e000) fn(DT_N_S_soc_S_dppic_4100f000) fn(DT_N_S_soc_S_temp_41010000) fn(DT_N_S_soc_S_rtc_41011000) fn(DT_N_S_soc_S_mbox_41012000) fn(DT_N_S_soc_S_i2c_41013000) fn(DT_N_S_soc_S_spi_41013000) fn(DT_N_S_soc_S_uart_41013000) fn(DT_N_S_soc_S_egu_41014000) fn(DT_N_S_soc_S_rtc_41016000) fn(DT_N_S_soc_S_timer_41018000) fn(DT_N_S_soc_S_timer_41019000) fn(DT_N_S_soc_S_swi_4101a000) fn(DT_N_S_soc_S_swi_4101b000) fn(DT_N_S_soc_S_swi_4101c000) fn(DT_N_S_soc_S_swi_4101d000) fn(DT_N_S_soc_S_acl_41080000) fn(DT_N_S_soc_S_flash_controller_41080000) fn(DT_N_S_soc_S_vmc_41081000) fn(DT_N_S_soc_S_gpio_418c0500) fn(DT_N_S_soc_S_gpio_418c0800)
#define DT_N_S_soc_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_1ff0000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_1ff8000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_21000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_clock_41005000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_41005000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_radio_41008000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_random_41009000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_4100a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_4100b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_4100c000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ecb_4100d000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ccm_4100e000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dppic_4100f000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_temp_41010000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_41011000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_mbox_41012000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_41013000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_41013000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uart_41013000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_41014000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_41016000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_41018000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_41019000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101c000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101d000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_acl_41080000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_vmc_41081000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpio_418c0500) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpio_418c0800)
#define DT_N_S_soc_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_1ff0000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_1ff8000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_21000000, __VA_ARGS__) fn(DT_N_S_soc_S_clock_41005000, __VA_ARGS__) fn(DT_N_S_soc_S_power_41005000, __VA_ARGS__) fn(DT_N_S_soc_S_radio_41008000, __VA_ARGS__) fn(DT_N_S_soc_S_random_41009000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_4100a000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_4100b000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_4100c000, __VA_ARGS__) fn(DT_N_S_soc_S_ecb_4100d000, __VA_ARGS__) fn(DT_N_S_soc_S_ccm_4100e000, __VA_ARGS__) fn(DT_N_S_soc_S_dppic_4100f000, __VA_ARGS__) fn(DT_N_S_soc_S_temp_41010000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_41011000, __VA_ARGS__) fn(DT_N_S_soc_S_mbox_41012000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_41013000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_41013000, __VA_ARGS__) fn(DT_N_S_soc_S_uart_41013000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_41014000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_41016000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_41018000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_41019000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101a000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101b000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101c000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101d000, __VA_ARGS__) fn(DT_N_S_soc_S_acl_41080000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000, __VA_ARGS__) fn(DT_N_S_soc_S_vmc_41081000, __VA_ARGS__) fn(DT_N_S_soc_S_gpio_418c0500, __VA_ARGS__) fn(DT_N_S_soc_S_gpio_418c0800, __VA_ARGS__)
#define DT_N_S_soc_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_1ff0000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_1ff8000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_21000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_clock_41005000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_41005000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_radio_41008000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_random_41009000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_4100a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_4100b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_4100c000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ecb_4100d000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ccm_4100e000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dppic_4100f000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_temp_41010000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_41011000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_mbox_41012000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_41013000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_41013000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uart_41013000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_41014000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_41016000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_41018000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_41019000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101c000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101d000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_acl_41080000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_vmc_41081000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpio_418c0500, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpio_418c0800, __VA_ARGS__)
#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_ficr_1ff0000) fn(DT_N_S_soc_S_uicr_1ff8000) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_memory_21000000) fn(DT_N_S_soc_S_clock_41005000) fn(DT_N_S_soc_S_power_41005000) fn(DT_N_S_soc_S_radio_41008000) fn(DT_N_S_soc_S_random_41009000) fn(DT_N_S_soc_S_gpiote_4100a000) fn(DT_N_S_soc_S_watchdog_4100b000) fn(DT_N_S_soc_S_timer_4100c000) fn(DT_N_S_soc_S_ecb_4100d000) fn(DT_N_S_soc_S_ccm_4100e000) fn(DT_N_S_soc_S_dppic_4100f000) fn(DT_N_S_soc_S_temp_41010000) fn(DT_N_S_soc_S_mbox_41012000) fn(DT_N_S_soc_S_egu_41014000) fn(DT_N_S_soc_S_timer_41018000) fn(DT_N_S_soc_S_timer_41019000) fn(DT_N_S_soc_S_swi_4101a000) fn(DT_N_S_soc_S_swi_4101b000) fn(DT_N_S_soc_S_swi_4101c000) fn(DT_N_S_soc_S_swi_4101d000) fn(DT_N_S_soc_S_acl_41080000) fn(DT_N_S_soc_S_flash_controller_41080000) fn(DT_N_S_soc_S_vmc_41081000) fn(DT_N_S_soc_S_gpio_418c0500) fn(DT_N_S_soc_S_gpio_418c0800)
#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_1ff0000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_1ff8000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_21000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_clock_41005000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_41005000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_radio_41008000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_random_41009000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_4100a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_4100b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_4100c000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ecb_4100d000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ccm_4100e000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dppic_4100f000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_temp_41010000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_mbox_41012000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_41014000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_41018000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_41019000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101c000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101d000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_acl_41080000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_vmc_41081000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpio_418c0500) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpio_418c0800)
#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_1ff0000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_1ff8000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_21000000, __VA_ARGS__) fn(DT_N_S_soc_S_clock_41005000, __VA_ARGS__) fn(DT_N_S_soc_S_power_41005000, __VA_ARGS__) fn(DT_N_S_soc_S_radio_41008000, __VA_ARGS__) fn(DT_N_S_soc_S_random_41009000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_4100a000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_4100b000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_4100c000, __VA_ARGS__) fn(DT_N_S_soc_S_ecb_4100d000, __VA_ARGS__) fn(DT_N_S_soc_S_ccm_4100e000, __VA_ARGS__) fn(DT_N_S_soc_S_dppic_4100f000, __VA_ARGS__) fn(DT_N_S_soc_S_temp_41010000, __VA_ARGS__) fn(DT_N_S_soc_S_mbox_41012000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_41014000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_41018000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_41019000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101a000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101b000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101c000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101d000, __VA_ARGS__) fn(DT_N_S_soc_S_acl_41080000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000, __VA_ARGS__) fn(DT_N_S_soc_S_vmc_41081000, __VA_ARGS__) fn(DT_N_S_soc_S_gpio_418c0500, __VA_ARGS__) fn(DT_N_S_soc_S_gpio_418c0800, __VA_ARGS__)
#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_1ff0000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_1ff8000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_21000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_clock_41005000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_41005000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_radio_41008000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_random_41009000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_4100a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_4100b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_4100c000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ecb_4100d000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ccm_4100e000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dppic_4100f000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_temp_41010000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_mbox_41012000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_41014000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_41018000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_41019000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101c000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_swi_4101d000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_acl_41080000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_vmc_41081000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpio_418c0500, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpio_418c0800, __VA_ARGS__)

/* Node's dependency ordinal: */
#define DT_N_S_soc_ORD 5
#define DT_N_S_soc_ORD_STR_SORTABLE 00005

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_SUPPORTS_ORDS \
	6, /* /soc/interrupt-controller@e000e100 */ \
	7, /* /soc/timer@41018000 */ \
	15, /* /soc/mbox@41012000 */ \
	17, /* /soc/acl@41080000 */ \
	18, /* /soc/ccm@4100e000 */ \
	19, /* /soc/clock@41005000 */ \
	20, /* /soc/dppic@4100f000 */ \
	21, /* /soc/ecb@4100d000 */ \
	22, /* /soc/egu@41014000 */ \
	23, /* /soc/ficr@1ff0000 */ \
	24, /* /soc/gpiote@4100a000 */ \
	25, /* /soc/gpio@418c0500 */ \
	26, /* /soc/gpio@418c0800 */ \
	27, /* /soc/i2c@41013000 */ \
	28, /* /soc/memory@20000000 */ \
	29, /* /soc/memory@21000000 */ \
	30, /* /soc/random@41009000 */ \
	31, /* /soc/rtc@41011000 */ \
	32, /* /soc/rtc@41016000 */ \
	33, /* /soc/spi@41013000 */ \
	34, /* /soc/swi@4101a000 */ \
	35, /* /soc/swi@4101b000 */ \
	36, /* /soc/swi@4101c000 */ \
	37, /* /soc/swi@4101d000 */ \
	38, /* /soc/temp@41010000 */ \
	39, /* /soc/timer@4100c000 */ \
	40, /* /soc/timer@41019000 */ \
	41, /* /soc/timer@e000e010 */ \
	42, /* /soc/uart@41013000 */ \
	43, /* /soc/uicr@1ff8000 */ \
	44, /* /soc/vmc@41081000 */ \
	45, /* /soc/watchdog@4100b000 */ \
	46, /* /soc/flash-controller@41080000 */ \
	53, /* /soc/power@41005000 */ \
	56, /* /soc/radio@41008000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_EXISTS 1
#define DT_N_INST_0_nordic_nrf5340_cpunet_qkaa DT_N_S_soc
#define DT_N_INST_0_nordic_nrf5340_cpunet      DT_N_S_soc
#define DT_N_INST_0_nordic_nrf53               DT_N_S_soc
#define DT_N_INST_0_simple_bus                 DT_N_S_soc

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_REG_NUM 0
#define DT_N_S_soc_RANGES_NUM 0
#define DT_N_S_soc_FOREACH_RANGE(fn) 
#define DT_N_S_soc_IRQ_NUM 0
#define DT_N_S_soc_IRQ_LEVEL 0
#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf5340_cpunet_qkaa 1
#define DT_N_S_soc_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_COMPAT_MODEL_IDX_0 "nrf5340-cpunet-qkaa"
#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf5340_cpunet 1
#define DT_N_S_soc_COMPAT_VENDOR_IDX_1_EXISTS 1
#define DT_N_S_soc_COMPAT_VENDOR_IDX_1 "Nordic Semiconductor"
#define DT_N_S_soc_COMPAT_MODEL_IDX_1_EXISTS 1
#define DT_N_S_soc_COMPAT_MODEL_IDX_1 "nrf5340-cpunet"
#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf53 1
#define DT_N_S_soc_COMPAT_VENDOR_IDX_2_EXISTS 1
#define DT_N_S_soc_COMPAT_VENDOR_IDX_2 "Nordic Semiconductor"
#define DT_N_S_soc_COMPAT_MODEL_IDX_2_EXISTS 1
#define DT_N_S_soc_COMPAT_MODEL_IDX_2 "nrf53"
#define DT_N_S_soc_COMPAT_MATCHES_simple_bus 1
#define DT_N_S_soc_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_P_compatible {"nordic,nrf5340-cpunet-qkaa", "nordic,nrf5340-cpunet", "nordic,nrf53", "simple-bus"}
#define DT_N_S_soc_P_compatible_IDX_0 "nordic,nrf5340-cpunet-qkaa"
#define DT_N_S_soc_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf5340-cpunet-qkaa
#define DT_N_S_soc_P_compatible_IDX_0_STRING_TOKEN nordic_nrf5340_cpunet_qkaa
#define DT_N_S_soc_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF5340_CPUNET_QKAA
#define DT_N_S_soc_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_1 "nordic,nrf5340-cpunet"
#define DT_N_S_soc_P_compatible_IDX_1_STRING_UNQUOTED nordic,nrf5340-cpunet
#define DT_N_S_soc_P_compatible_IDX_1_STRING_TOKEN nordic_nrf5340_cpunet
#define DT_N_S_soc_P_compatible_IDX_1_STRING_UPPER_TOKEN NORDIC_NRF5340_CPUNET
#define DT_N_S_soc_P_compatible_IDX_1_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_2 "nordic,nrf53"
#define DT_N_S_soc_P_compatible_IDX_2_STRING_UNQUOTED nordic,nrf53
#define DT_N_S_soc_P_compatible_IDX_2_STRING_TOKEN nordic_nrf53
#define DT_N_S_soc_P_compatible_IDX_2_STRING_UPPER_TOKEN NORDIC_NRF53
#define DT_N_S_soc_P_compatible_IDX_2_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_3 "simple-bus"
#define DT_N_S_soc_P_compatible_IDX_3_STRING_UNQUOTED simple-bus
#define DT_N_S_soc_P_compatible_IDX_3_STRING_TOKEN simple_bus
#define DT_N_S_soc_P_compatible_IDX_3_STRING_UPPER_TOKEN SIMPLE_BUS
#define DT_N_S_soc_P_compatible_IDX_3_EXISTS 1
#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc, compatible, 0) \
	fn(DT_N_S_soc, compatible, 1) \
	fn(DT_N_S_soc, compatible, 2) \
	fn(DT_N_S_soc, compatible, 3)
#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc, compatible, 0) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc, compatible, 1) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc, compatible, 2) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc, compatible, 3)
#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc, compatible, 0, __VA_ARGS__) \
	fn(DT_N_S_soc, compatible, 1, __VA_ARGS__) \
	fn(DT_N_S_soc, compatible, 2, __VA_ARGS__) \
	fn(DT_N_S_soc, compatible, 3, __VA_ARGS__)
#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc, compatible, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc, compatible, 3, __VA_ARGS__)
#define DT_N_S_soc_P_compatible_LEN 4
#define DT_N_S_soc_P_compatible_EXISTS 1
#define DT_N_S_soc_P_ranges_EXISTS 1

/*
 * Devicetree node: /soc/interrupt-controller@e000e100
 *
 * Node identifier: DT_N_S_soc_S_interrupt_controller_e000e100
 *
 * Binding (compatible = arm,v8m-nvic):
 *   $ZEPHYR_BASE\dts\bindings\interrupt-controller\arm,v8m-nvic.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_PATH "/soc/interrupt-controller@e000e100"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_FULL_NAME "interrupt-controller@e000e100"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_NODELABEL_NUM 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_NODELABEL(fn) fn(nvic)
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_NODELABEL_VARGS(fn, ...) fn(nvic, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_interrupt_controller_e000e100_CHILD_NUM 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_ORD 6
#define DT_N_S_soc_S_interrupt_controller_e000e100_ORD_STR_SORTABLE 00006

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_SUPPORTS_ORDS \
	7, /* /soc/timer@41018000 */ \
	15, /* /soc/mbox@41012000 */ \
	18, /* /soc/ccm@4100e000 */ \
	19, /* /soc/clock@41005000 */ \
	21, /* /soc/ecb@4100d000 */ \
	22, /* /soc/egu@41014000 */ \
	24, /* /soc/gpiote@4100a000 */ \
	27, /* /soc/i2c@41013000 */ \
	30, /* /soc/random@41009000 */ \
	31, /* /soc/rtc@41011000 */ \
	32, /* /soc/rtc@41016000 */ \
	33, /* /soc/spi@41013000 */ \
	34, /* /soc/swi@4101a000 */ \
	35, /* /soc/swi@4101b000 */ \
	36, /* /soc/swi@4101c000 */ \
	37, /* /soc/swi@4101d000 */ \
	38, /* /soc/temp@41010000 */ \
	39, /* /soc/timer@4100c000 */ \
	40, /* /soc/timer@41019000 */ \
	42, /* /soc/uart@41013000 */ \
	45, /* /soc/watchdog@4100b000 */ \
	53, /* /soc/power@41005000 */ \
	56, /* /soc/radio@41008000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_EXISTS 1
#define DT_N_INST_0_arm_v8m_nvic DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_NODELABEL_nvic      DT_N_S_soc_S_interrupt_controller_e000e100

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_NUM 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_ADDRESS 3758153984 /* 0xe000e100 */
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_SIZE 3072 /* 0xc00 */
#define DT_N_S_soc_S_interrupt_controller_e000e100_RANGES_NUM 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_IRQ_NUM 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_IRQ_LEVEL 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MATCHES_arm_v8m_nvic 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_VENDOR_IDX_0 "ARM Ltd."
#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MODEL_IDX_0 "v8m-nvic"
#define DT_N_S_soc_S_interrupt_controller_e000e100_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_wakeup_source 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible {"arm,v8m-nvic"}
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0 "arm,v8m-nvic"
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_STRING_UNQUOTED arm,v8m-nvic
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_STRING_TOKEN arm_v8m_nvic
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_V8M_NVIC
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0)
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0)
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_LEN 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg {3758153984 /* 0xe000e100 */, 3072 /* 0xc00 */}
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0 3758153984
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1 3072
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits 3
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits_EXISTS 1

/*
 * Devicetree node: /soc/timer@41018000
 *
 * Node identifier: DT_N_S_soc_S_timer_41018000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_41018000_PATH "/soc/timer@41018000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_41018000_FULL_NAME "timer@41018000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_41018000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_timer_41018000_CHILD_IDX 24

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_timer_41018000_NODELABEL_NUM 1
#define DT_N_S_soc_S_timer_41018000_FOREACH_NODELABEL(fn) fn(timer1)
#define DT_N_S_soc_S_timer_41018000_FOREACH_NODELABEL_VARGS(fn, ...) fn(timer1, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_timer_41018000_CHILD_NUM 0
#define DT_N_S_soc_S_timer_41018000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_timer_41018000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_41018000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_41018000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_41018000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_timer_41018000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_timer_41018000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_41018000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_41018000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_41018000_ORD 7
#define DT_N_S_soc_S_timer_41018000_ORD_STR_SORTABLE 00007

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_41018000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_41018000_SUPPORTS_ORDS \
	8, /* /sw-pwm */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_41018000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_timer DT_N_S_soc_S_timer_41018000
#define DT_N_NODELABEL_timer1        DT_N_S_soc_S_timer_41018000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_timer_41018000_REG_NUM 1
#define DT_N_S_soc_S_timer_41018000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_REG_IDX_0_VAL_ADDRESS 1090617344 /* 0x41018000 */
#define DT_N_S_soc_S_timer_41018000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_41018000_RANGES_NUM 0
#define DT_N_S_soc_S_timer_41018000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_timer_41018000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_41018000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_IRQ_IDX_0_VAL_irq 24
#define DT_N_S_soc_S_timer_41018000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_41018000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_timer_41018000_IRQ_LEVEL 1
#define DT_N_S_soc_S_timer_41018000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_41018000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_timer_41018000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_COMPAT_MODEL_IDX_0 "nrf-timer"
#define DT_N_S_soc_S_timer_41018000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_timer_41018000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_timer_41018000_P_wakeup_source 0
#define DT_N_S_soc_S_timer_41018000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_timer_41018000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_status "okay"
#define DT_N_S_soc_S_timer_41018000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_timer_41018000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_timer_41018000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_41018000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_timer_41018000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_timer_41018000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_timer_41018000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_41018000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_41018000, status, 0)
#define DT_N_S_soc_S_timer_41018000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_41018000, status, 0)
#define DT_N_S_soc_S_timer_41018000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_41018000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_41018000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_41018000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_41018000_P_status_LEN 1
#define DT_N_S_soc_S_timer_41018000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_41018000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_41018000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-timer
#define DT_N_S_soc_S_timer_41018000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_timer
#define DT_N_S_soc_S_timer_41018000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TIMER
#define DT_N_S_soc_S_timer_41018000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_41018000, compatible, 0)
#define DT_N_S_soc_S_timer_41018000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_41018000, compatible, 0)
#define DT_N_S_soc_S_timer_41018000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_41018000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_41018000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_41018000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_41018000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_41018000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_reg {1090617344 /* 0x41018000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_41018000_P_reg_IDX_0 1090617344
#define DT_N_S_soc_S_timer_41018000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_41018000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_interrupts {24 /* 0x18 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_41018000_P_interrupts_IDX_0 24
#define DT_N_S_soc_S_timer_41018000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_41018000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_timer_41018000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_cc_num 8
#define DT_N_S_soc_S_timer_41018000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_max_bit_width 32
#define DT_N_S_soc_S_timer_41018000_P_max_bit_width_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_max_frequency 16000000
#define DT_N_S_soc_S_timer_41018000_P_max_frequency_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_prescaler 0
#define DT_N_S_soc_S_timer_41018000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_41018000_P_zli 0
#define DT_N_S_soc_S_timer_41018000_P_zli_EXISTS 1

/*
 * Devicetree node: /sw-pwm
 *
 * Node identifier: DT_N_S_sw_pwm
 *
 * Binding (compatible = nordic,nrf-sw-pwm):
 *   $ZEPHYR_BASE\dts\bindings\pwm\nordic,nrf-sw-pwm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_sw_pwm_PATH "/sw-pwm"

/* Node's name with unit-address: */
#define DT_N_S_sw_pwm_FULL_NAME "sw-pwm"

/* Node parent (/) identifier: */
#define DT_N_S_sw_pwm_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_sw_pwm_CHILD_IDX 5

/* Helpers for dealing with node labels: */
#define DT_N_S_sw_pwm_NODELABEL_NUM 1
#define DT_N_S_sw_pwm_FOREACH_NODELABEL(fn) fn(sw_pwm)
#define DT_N_S_sw_pwm_FOREACH_NODELABEL_VARGS(fn, ...) fn(sw_pwm, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_sw_pwm_CHILD_NUM 0
#define DT_N_S_sw_pwm_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_sw_pwm_FOREACH_CHILD(fn) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_sw_pwm_ORD 8
#define DT_N_S_sw_pwm_ORD_STR_SORTABLE 00008

/* Ordinals for what this node depends on directly: */
#define DT_N_S_sw_pwm_REQUIRES_ORDS \
	0, /* / */ \
	7, /* /soc/timer@41018000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_sw_pwm_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_sw_pwm_EXISTS 1
#define DT_N_INST_0_nordic_nrf_sw_pwm DT_N_S_sw_pwm
#define DT_N_NODELABEL_sw_pwm         DT_N_S_sw_pwm

/* Macros for properties that are special in the specification: */
#define DT_N_S_sw_pwm_REG_NUM 0
#define DT_N_S_sw_pwm_RANGES_NUM 0
#define DT_N_S_sw_pwm_FOREACH_RANGE(fn) 
#define DT_N_S_sw_pwm_IRQ_NUM 0
#define DT_N_S_sw_pwm_IRQ_LEVEL 0
#define DT_N_S_sw_pwm_COMPAT_MATCHES_nordic_nrf_sw_pwm 1
#define DT_N_S_sw_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_sw_pwm_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_COMPAT_MODEL_IDX_0 "nrf-sw-pwm"
#define DT_N_S_sw_pwm_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_sw_pwm_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_sw_pwm_P_wakeup_source 0
#define DT_N_S_sw_pwm_P_wakeup_source_EXISTS 1
#define DT_N_S_sw_pwm_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_sw_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_sw_pwm_P_status "disabled"
#define DT_N_S_sw_pwm_P_status_STRING_UNQUOTED disabled
#define DT_N_S_sw_pwm_P_status_STRING_TOKEN disabled
#define DT_N_S_sw_pwm_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_sw_pwm_P_status_IDX_0 "disabled"
#define DT_N_S_sw_pwm_P_status_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_P_status_ENUM_IDX 2
#define DT_N_S_sw_pwm_P_status_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_sw_pwm_P_status_ENUM_TOKEN disabled
#define DT_N_S_sw_pwm_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, status, 0)
#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_sw_pwm, status, 0)
#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sw_pwm, status, 0, __VA_ARGS__)
#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_sw_pwm, status, 0, __VA_ARGS__)
#define DT_N_S_sw_pwm_P_status_LEN 1
#define DT_N_S_sw_pwm_P_status_EXISTS 1
#define DT_N_S_sw_pwm_P_compatible {"nordic,nrf-sw-pwm"}
#define DT_N_S_sw_pwm_P_compatible_IDX_0 "nordic,nrf-sw-pwm"
#define DT_N_S_sw_pwm_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-sw-pwm
#define DT_N_S_sw_pwm_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_sw_pwm
#define DT_N_S_sw_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SW_PWM
#define DT_N_S_sw_pwm_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, compatible, 0)
#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_sw_pwm, compatible, 0)
#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sw_pwm, compatible, 0, __VA_ARGS__)
#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_sw_pwm, compatible, 0, __VA_ARGS__)
#define DT_N_S_sw_pwm_P_compatible_LEN 1
#define DT_N_S_sw_pwm_P_compatible_EXISTS 1
#define DT_N_S_sw_pwm_P_zephyr_deferred_init 0
#define DT_N_S_sw_pwm_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_sw_pwm_P_generator DT_N_S_soc_S_timer_41018000
#define DT_N_S_sw_pwm_P_generator_IDX_0 DT_N_S_soc_S_timer_41018000
#define DT_N_S_sw_pwm_P_generator_IDX_0_PH DT_N_S_soc_S_timer_41018000
#define DT_N_S_sw_pwm_P_generator_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, generator, 0)
#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_sw_pwm, generator, 0)
#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sw_pwm, generator, 0, __VA_ARGS__)
#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_sw_pwm, generator, 0, __VA_ARGS__)
#define DT_N_S_sw_pwm_P_generator_LEN 1
#define DT_N_S_sw_pwm_P_generator_EXISTS 1
#define DT_N_S_sw_pwm_P_clock_prescaler 0
#define DT_N_S_sw_pwm_P_clock_prescaler_EXISTS 1

/*
 * Devicetree node: /cpus
 *
 * Node identifier: DT_N_S_cpus
 */

/* Node's full path: */
#define DT_N_S_cpus_PATH "/cpus"

/* Node's name with unit-address: */
#define DT_N_S_cpus_FULL_NAME "cpus"

/* Node parent (/) identifier: */
#define DT_N_S_cpus_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_cpus_CHILD_IDX 6

/* Helpers for dealing with node labels: */
#define DT_N_S_cpus_NODELABEL_NUM 0
#define DT_N_S_cpus_FOREACH_NODELABEL(fn) 
#define DT_N_S_cpus_FOREACH_NODELABEL_VARGS(fn, ...) 

/* Helper macros for child nodes of this node. */
#define DT_N_S_cpus_CHILD_NUM 1
#define DT_N_S_cpus_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_cpus_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_1)
#define DT_N_S_cpus_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_1)
#define DT_N_S_cpus_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_1, __VA_ARGS__)
#define DT_N_S_cpus_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_1, __VA_ARGS__)
#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_cpu_1)
#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_1)
#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_1, __VA_ARGS__)
#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_1, __VA_ARGS__)

/* Node's dependency ordinal: */
#define DT_N_S_cpus_ORD 9
#define DT_N_S_cpus_ORD_STR_SORTABLE 00009

/* Ordinals for what this node depends on directly: */
#define DT_N_S_cpus_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_cpus_SUPPORTS_ORDS \
	10, /* /cpus/cpu@1 */

/* Existence and alternate IDs: */
#define DT_N_S_cpus_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_cpus_REG_NUM 0
#define DT_N_S_cpus_RANGES_NUM 0
#define DT_N_S_cpus_FOREACH_RANGE(fn) 
#define DT_N_S_cpus_IRQ_NUM 0
#define DT_N_S_cpus_IRQ_LEVEL 0
#define DT_N_S_cpus_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_cpus_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /cpus/cpu@1
 *
 * Node identifier: DT_N_S_cpus_S_cpu_1
 *
 * Binding (compatible = arm,cortex-m33):
 *   $ZEPHYR_BASE\dts\bindings\cpu\arm,cortex-m33.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_cpus_S_cpu_1_PATH "/cpus/cpu@1"

/* Node's name with unit-address: */
#define DT_N_S_cpus_S_cpu_1_FULL_NAME "cpu@1"

/* Node parent (/cpus) identifier: */
#define DT_N_S_cpus_S_cpu_1_PARENT DT_N_S_cpus

/* Node's index in its parent's list of children: */
#define DT_N_S_cpus_S_cpu_1_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_cpus_S_cpu_1_NODELABEL_NUM 0
#define DT_N_S_cpus_S_cpu_1_FOREACH_NODELABEL(fn) 
#define DT_N_S_cpus_S_cpu_1_FOREACH_NODELABEL_VARGS(fn, ...) 

/* Helper macros for child nodes of this node. */
#define DT_N_S_cpus_S_cpu_1_CHILD_NUM 1
#define DT_N_S_cpus_S_cpu_1_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_cpus_S_cpu_1_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90)
#define DT_N_S_cpus_S_cpu_1_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90)
#define DT_N_S_cpus_S_cpu_1_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_1_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90)
#define DT_N_S_cpus_S_cpu_1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90)
#define DT_N_S_cpus_S_cpu_1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90, __VA_ARGS__)

/* Node's dependency ordinal: */
#define DT_N_S_cpus_S_cpu_1_ORD 10
#define DT_N_S_cpus_S_cpu_1_ORD_STR_SORTABLE 00010

/* Ordinals for what this node depends on directly: */
#define DT_N_S_cpus_S_cpu_1_REQUIRES_ORDS \
	9, /* /cpus */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_cpus_S_cpu_1_SUPPORTS_ORDS \
	11, /* /cpus/cpu@1/mpu@e000ed90 */

/* Existence and alternate IDs: */
#define DT_N_S_cpus_S_cpu_1_EXISTS 1
#define DT_N_INST_0_arm_cortex_m33 DT_N_S_cpus_S_cpu_1

/* Macros for properties that are special in the specification: */
#define DT_N_S_cpus_S_cpu_1_REG_NUM 1
#define DT_N_S_cpus_S_cpu_1_REG_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_REG_IDX_0_VAL_ADDRESS 1 /* 0x1 */
#define DT_N_S_cpus_S_cpu_1_RANGES_NUM 0
#define DT_N_S_cpus_S_cpu_1_FOREACH_RANGE(fn) 
#define DT_N_S_cpus_S_cpu_1_IRQ_NUM 0
#define DT_N_S_cpus_S_cpu_1_IRQ_LEVEL 0
#define DT_N_S_cpus_S_cpu_1_COMPAT_MATCHES_arm_cortex_m33 1
#define DT_N_S_cpus_S_cpu_1_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_COMPAT_VENDOR_IDX_0 "ARM Ltd."
#define DT_N_S_cpus_S_cpu_1_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_COMPAT_MODEL_IDX_0 "cortex-m33"
#define DT_N_S_cpus_S_cpu_1_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_cpus_S_cpu_1_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_cpus_S_cpu_1_P_wakeup_source 0
#define DT_N_S_cpus_S_cpu_1_P_wakeup_source_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_cpus_S_cpu_1_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_P_compatible {"arm,cortex-m33"}
#define DT_N_S_cpus_S_cpu_1_P_compatible_IDX_0 "arm,cortex-m33"
#define DT_N_S_cpus_S_cpu_1_P_compatible_IDX_0_STRING_UNQUOTED arm,cortex-m33
#define DT_N_S_cpus_S_cpu_1_P_compatible_IDX_0_STRING_TOKEN arm_cortex_m33
#define DT_N_S_cpus_S_cpu_1_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_CORTEX_M33
#define DT_N_S_cpus_S_cpu_1_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_1, compatible, 0)
#define DT_N_S_cpus_S_cpu_1_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_1, compatible, 0)
#define DT_N_S_cpus_S_cpu_1_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_1, compatible, 0, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_1_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_1, compatible, 0, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_1_P_compatible_LEN 1
#define DT_N_S_cpus_S_cpu_1_P_compatible_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_P_reg {1 /* 0x1 */}
#define DT_N_S_cpus_S_cpu_1_P_reg_IDX_0 1
#define DT_N_S_cpus_S_cpu_1_P_reg_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_P_reg_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_P_zephyr_deferred_init 0
#define DT_N_S_cpus_S_cpu_1_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /cpus/cpu@1/mpu@e000ed90
 *
 * Node identifier: DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90
 *
 * Binding (compatible = arm,armv8m-mpu):
 *   $ZEPHYR_BASE\dts\bindings\mmu_mpu\arm,armv8m-mpu.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_PATH "/cpus/cpu@1/mpu@e000ed90"

/* Node's name with unit-address: */
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_FULL_NAME "mpu@e000ed90"

/* Node parent (/cpus/cpu@1) identifier: */
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_PARENT DT_N_S_cpus_S_cpu_1

/* Node's index in its parent's list of children: */
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_NODELABEL_NUM 1
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_FOREACH_NODELABEL(fn) fn(mpu)
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_FOREACH_NODELABEL_VARGS(fn, ...) fn(mpu, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_CHILD_NUM 0
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_FOREACH_CHILD(fn) 
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_ORD 11
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_ORD_STR_SORTABLE 00011

/* Ordinals for what this node depends on directly: */
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_REQUIRES_ORDS \
	10, /* /cpus/cpu@1 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_EXISTS 1
#define DT_N_INST_0_arm_armv8m_mpu DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90
#define DT_N_NODELABEL_mpu         DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90

/* Macros for properties that are special in the specification: */
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_REG_NUM 1
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_REG_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_REG_IDX_0_VAL_ADDRESS 3758157200 /* 0xe000ed90 */
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_REG_IDX_0_VAL_SIZE 64 /* 0x40 */
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_RANGES_NUM 0
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_FOREACH_RANGE(fn) 
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_IRQ_NUM 0
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_IRQ_LEVEL 0
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_COMPAT_MATCHES_arm_armv8m_mpu 1
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_COMPAT_VENDOR_IDX_0 "ARM Ltd."
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_COMPAT_MODEL_IDX_0 "armv8m-mpu"
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_wakeup_source 0
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_wakeup_source_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_compatible {"arm,armv8m-mpu"}
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_compatible_IDX_0 "arm,armv8m-mpu"
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_compatible_IDX_0_STRING_UNQUOTED arm,armv8m-mpu
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_compatible_IDX_0_STRING_TOKEN arm_armv8m_mpu
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_ARMV8M_MPU
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90, compatible, 0)
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90, compatible, 0)
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90, compatible, 0, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90, compatible, 0, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_compatible_LEN 1
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_compatible_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_reg {3758157200 /* 0xe000ed90 */, 64 /* 0x40 */}
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_reg_IDX_0 3758157200
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_reg_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_reg_IDX_1 64
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_reg_IDX_1_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_reg_EXISTS 1
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_zephyr_deferred_init 0
#define DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /ipc
 *
 * Node identifier: DT_N_S_ipc
 */

/* Node's full path: */
#define DT_N_S_ipc_PATH "/ipc"

/* Node's name with unit-address: */
#define DT_N_S_ipc_FULL_NAME "ipc"

/* Node parent (/) identifier: */
#define DT_N_S_ipc_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_ipc_CHILD_IDX 7

/* Helpers for dealing with node labels: */
#define DT_N_S_ipc_NODELABEL_NUM 0
#define DT_N_S_ipc_FOREACH_NODELABEL(fn) 
#define DT_N_S_ipc_FOREACH_NODELABEL_VARGS(fn, ...) 

/* Helper macros for child nodes of this node. */
#define DT_N_S_ipc_CHILD_NUM 1
#define DT_N_S_ipc_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_ipc_FOREACH_CHILD(fn) fn(DT_N_S_ipc_S_ipc0)
#define DT_N_S_ipc_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_ipc_S_ipc0)
#define DT_N_S_ipc_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_ipc_S_ipc0, __VA_ARGS__)
#define DT_N_S_ipc_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_ipc_S_ipc0, __VA_ARGS__)
#define DT_N_S_ipc_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_ipc_S_ipc0)
#define DT_N_S_ipc_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_ipc_S_ipc0)
#define DT_N_S_ipc_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_ipc_S_ipc0, __VA_ARGS__)
#define DT_N_S_ipc_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_ipc_S_ipc0, __VA_ARGS__)

/* Node's dependency ordinal: */
#define DT_N_S_ipc_ORD 12
#define DT_N_S_ipc_ORD_STR_SORTABLE 00012

/* Ordinals for what this node depends on directly: */
#define DT_N_S_ipc_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_ipc_SUPPORTS_ORDS \
	16, /* /ipc/ipc0 */

/* Existence and alternate IDs: */
#define DT_N_S_ipc_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_ipc_REG_NUM 0
#define DT_N_S_ipc_RANGES_NUM 0
#define DT_N_S_ipc_FOREACH_RANGE(fn) 
#define DT_N_S_ipc_IRQ_NUM 0
#define DT_N_S_ipc_IRQ_LEVEL 0
#define DT_N_S_ipc_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_ipc_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /reserved-memory
 *
 * Node identifier: DT_N_S_reserved_memory
 */

/* Node's full path: */
#define DT_N_S_reserved_memory_PATH "/reserved-memory"

/* Node's name with unit-address: */
#define DT_N_S_reserved_memory_FULL_NAME "reserved-memory"

/* Node parent (/) identifier: */
#define DT_N_S_reserved_memory_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_reserved_memory_CHILD_IDX 8

/* Helpers for dealing with node labels: */
#define DT_N_S_reserved_memory_NODELABEL_NUM 0
#define DT_N_S_reserved_memory_FOREACH_NODELABEL(fn) 
#define DT_N_S_reserved_memory_FOREACH_NODELABEL_VARGS(fn, ...) 

/* Helper macros for child nodes of this node. */
#define DT_N_S_reserved_memory_CHILD_NUM 1
#define DT_N_S_reserved_memory_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_reserved_memory_FOREACH_CHILD(fn) fn(DT_N_S_reserved_memory_S_memory_20078000)
#define DT_N_S_reserved_memory_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_reserved_memory_S_memory_20078000)
#define DT_N_S_reserved_memory_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_reserved_memory_S_memory_20078000, __VA_ARGS__)
#define DT_N_S_reserved_memory_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_reserved_memory_S_memory_20078000, __VA_ARGS__)
#define DT_N_S_reserved_memory_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_reserved_memory_S_memory_20078000)
#define DT_N_S_reserved_memory_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_reserved_memory_S_memory_20078000)
#define DT_N_S_reserved_memory_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_reserved_memory_S_memory_20078000, __VA_ARGS__)
#define DT_N_S_reserved_memory_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_reserved_memory_S_memory_20078000, __VA_ARGS__)

/* Node's dependency ordinal: */
#define DT_N_S_reserved_memory_ORD 13
#define DT_N_S_reserved_memory_ORD_STR_SORTABLE 00013

/* Ordinals for what this node depends on directly: */
#define DT_N_S_reserved_memory_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_reserved_memory_SUPPORTS_ORDS \
	14, /* /reserved-memory/memory@20078000 */

/* Existence and alternate IDs: */
#define DT_N_S_reserved_memory_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_reserved_memory_REG_NUM 0
#define DT_N_S_reserved_memory_RANGES_NUM 0
#define DT_N_S_reserved_memory_FOREACH_RANGE(fn) 
#define DT_N_S_reserved_memory_IRQ_NUM 0
#define DT_N_S_reserved_memory_IRQ_LEVEL 0
#define DT_N_S_reserved_memory_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_reserved_memory_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_reserved_memory_P_ranges_EXISTS 1

/*
 * Devicetree node: /reserved-memory/memory@20078000
 *
 * Node identifier: DT_N_S_reserved_memory_S_memory_20078000
 */

/* Node's full path: */
#define DT_N_S_reserved_memory_S_memory_20078000_PATH "/reserved-memory/memory@20078000"

/* Node's name with unit-address: */
#define DT_N_S_reserved_memory_S_memory_20078000_FULL_NAME "memory@20078000"

/* Node parent (/reserved-memory) identifier: */
#define DT_N_S_reserved_memory_S_memory_20078000_PARENT DT_N_S_reserved_memory

/* Node's index in its parent's list of children: */
#define DT_N_S_reserved_memory_S_memory_20078000_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_reserved_memory_S_memory_20078000_NODELABEL_NUM 1
#define DT_N_S_reserved_memory_S_memory_20078000_FOREACH_NODELABEL(fn) fn(sram0_shared)
#define DT_N_S_reserved_memory_S_memory_20078000_FOREACH_NODELABEL_VARGS(fn, ...) fn(sram0_shared, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_reserved_memory_S_memory_20078000_CHILD_NUM 0
#define DT_N_S_reserved_memory_S_memory_20078000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_reserved_memory_S_memory_20078000_FOREACH_CHILD(fn) 
#define DT_N_S_reserved_memory_S_memory_20078000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_reserved_memory_S_memory_20078000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_reserved_memory_S_memory_20078000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_reserved_memory_S_memory_20078000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_reserved_memory_S_memory_20078000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_reserved_memory_S_memory_20078000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_reserved_memory_S_memory_20078000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_reserved_memory_S_memory_20078000_ORD 14
#define DT_N_S_reserved_memory_S_memory_20078000_ORD_STR_SORTABLE 00014

/* Ordinals for what this node depends on directly: */
#define DT_N_S_reserved_memory_S_memory_20078000_REQUIRES_ORDS \
	13, /* /reserved-memory */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_reserved_memory_S_memory_20078000_SUPPORTS_ORDS \
	16, /* /ipc/ipc0 */

/* Existence and alternate IDs: */
#define DT_N_S_reserved_memory_S_memory_20078000_EXISTS 1
#define DT_N_NODELABEL_sram0_shared DT_N_S_reserved_memory_S_memory_20078000

/* Macros for properties that are special in the specification: */
#define DT_N_S_reserved_memory_S_memory_20078000_REG_NUM 1
#define DT_N_S_reserved_memory_S_memory_20078000_REG_IDX_0_EXISTS 1
#define DT_N_S_reserved_memory_S_memory_20078000_REG_IDX_0_VAL_ADDRESS 537362432 /* 0x20078000 */
#define DT_N_S_reserved_memory_S_memory_20078000_REG_IDX_0_VAL_SIZE 32768 /* 0x8000 */
#define DT_N_S_reserved_memory_S_memory_20078000_RANGES_NUM 0
#define DT_N_S_reserved_memory_S_memory_20078000_FOREACH_RANGE(fn) 
#define DT_N_S_reserved_memory_S_memory_20078000_IRQ_NUM 0
#define DT_N_S_reserved_memory_S_memory_20078000_IRQ_LEVEL 0
#define DT_N_S_reserved_memory_S_memory_20078000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_reserved_memory_S_memory_20078000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_reserved_memory_S_memory_20078000_P_reg {537362432 /* 0x20078000 */, 32768 /* 0x8000 */}
#define DT_N_S_reserved_memory_S_memory_20078000_P_reg_IDX_0 537362432
#define DT_N_S_reserved_memory_S_memory_20078000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_reserved_memory_S_memory_20078000_P_reg_IDX_1 32768
#define DT_N_S_reserved_memory_S_memory_20078000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_reserved_memory_S_memory_20078000_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/mbox@41012000
 *
 * Node identifier: DT_N_S_soc_S_mbox_41012000
 *
 * Binding (compatible = nordic,mbox-nrf-ipc):
 *   $ZEPHYR_BASE\dts\bindings\mbox\nordic,mbox-nrf-ipc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_mbox_41012000_PATH "/soc/mbox@41012000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_mbox_41012000_FULL_NAME "mbox@41012000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_mbox_41012000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_mbox_41012000_CHILD_IDX 18

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_mbox_41012000_NODELABEL_NUM 2
#define DT_N_S_soc_S_mbox_41012000_FOREACH_NODELABEL(fn) fn(mbox) fn(ipc)
#define DT_N_S_soc_S_mbox_41012000_FOREACH_NODELABEL_VARGS(fn, ...) fn(mbox, __VA_ARGS__) fn(ipc, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_mbox_41012000_CHILD_NUM 0
#define DT_N_S_soc_S_mbox_41012000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_mbox_41012000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_mbox_41012000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_mbox_41012000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_mbox_41012000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_mbox_41012000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_mbox_41012000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_mbox_41012000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_mbox_41012000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_mbox_41012000_ORD 15
#define DT_N_S_soc_S_mbox_41012000_ORD_STR_SORTABLE 00015

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_mbox_41012000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_mbox_41012000_SUPPORTS_ORDS \
	16, /* /ipc/ipc0 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_mbox_41012000_EXISTS 1
#define DT_N_INST_0_nordic_mbox_nrf_ipc DT_N_S_soc_S_mbox_41012000
#define DT_N_INST_0_nordic_nrf_ipc      DT_N_S_soc_S_mbox_41012000
#define DT_N_NODELABEL_mbox             DT_N_S_soc_S_mbox_41012000
#define DT_N_NODELABEL_ipc              DT_N_S_soc_S_mbox_41012000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_mbox_41012000_REG_NUM 1
#define DT_N_S_soc_S_mbox_41012000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_REG_IDX_0_VAL_ADDRESS 1090592768 /* 0x41012000 */
#define DT_N_S_soc_S_mbox_41012000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_mbox_41012000_RANGES_NUM 0
#define DT_N_S_soc_S_mbox_41012000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_mbox_41012000_IRQ_NUM 1
#define DT_N_S_soc_S_mbox_41012000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_IRQ_IDX_0_VAL_irq 18
#define DT_N_S_soc_S_mbox_41012000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_mbox_41012000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_mbox_41012000_IRQ_LEVEL 1
#define DT_N_S_soc_S_mbox_41012000_COMPAT_MATCHES_nordic_mbox_nrf_ipc 1
#define DT_N_S_soc_S_mbox_41012000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_mbox_41012000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_COMPAT_MODEL_IDX_0 "mbox-nrf-ipc"
#define DT_N_S_soc_S_mbox_41012000_COMPAT_MATCHES_nordic_nrf_ipc 1
#define DT_N_S_soc_S_mbox_41012000_COMPAT_VENDOR_IDX_1_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_COMPAT_VENDOR_IDX_1 "Nordic Semiconductor"
#define DT_N_S_soc_S_mbox_41012000_COMPAT_MODEL_IDX_1_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_COMPAT_MODEL_IDX_1 "nrf-ipc"
#define DT_N_S_soc_S_mbox_41012000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_mbox_41012000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_mbox_41012000_P_wakeup_source 0
#define DT_N_S_soc_S_mbox_41012000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_mbox_41012000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_status "okay"
#define DT_N_S_soc_S_mbox_41012000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_mbox_41012000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_mbox_41012000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_mbox_41012000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_mbox_41012000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_mbox_41012000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_mbox_41012000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_mbox_41012000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_mbox_41012000, status, 0)
#define DT_N_S_soc_S_mbox_41012000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_mbox_41012000, status, 0)
#define DT_N_S_soc_S_mbox_41012000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_mbox_41012000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_mbox_41012000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_mbox_41012000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_mbox_41012000_P_status_LEN 1
#define DT_N_S_soc_S_mbox_41012000_P_status_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_compatible {"nordic,mbox-nrf-ipc", "nordic,nrf-ipc"}
#define DT_N_S_soc_S_mbox_41012000_P_compatible_IDX_0 "nordic,mbox-nrf-ipc"
#define DT_N_S_soc_S_mbox_41012000_P_compatible_IDX_0_STRING_UNQUOTED nordic,mbox-nrf-ipc
#define DT_N_S_soc_S_mbox_41012000_P_compatible_IDX_0_STRING_TOKEN nordic_mbox_nrf_ipc
#define DT_N_S_soc_S_mbox_41012000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_MBOX_NRF_IPC
#define DT_N_S_soc_S_mbox_41012000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_compatible_IDX_1 "nordic,nrf-ipc"
#define DT_N_S_soc_S_mbox_41012000_P_compatible_IDX_1_STRING_UNQUOTED nordic,nrf-ipc
#define DT_N_S_soc_S_mbox_41012000_P_compatible_IDX_1_STRING_TOKEN nordic_nrf_ipc
#define DT_N_S_soc_S_mbox_41012000_P_compatible_IDX_1_STRING_UPPER_TOKEN NORDIC_NRF_IPC
#define DT_N_S_soc_S_mbox_41012000_P_compatible_IDX_1_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_mbox_41012000, compatible, 0) \
	fn(DT_N_S_soc_S_mbox_41012000, compatible, 1)
#define DT_N_S_soc_S_mbox_41012000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_mbox_41012000, compatible, 0) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_mbox_41012000, compatible, 1)
#define DT_N_S_soc_S_mbox_41012000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_mbox_41012000, compatible, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_mbox_41012000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_mbox_41012000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_mbox_41012000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_mbox_41012000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_mbox_41012000_P_compatible_LEN 2
#define DT_N_S_soc_S_mbox_41012000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_reg {1090592768 /* 0x41012000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_mbox_41012000_P_reg_IDX_0 1090592768
#define DT_N_S_soc_S_mbox_41012000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_mbox_41012000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_reg_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_interrupts {18 /* 0x12 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_mbox_41012000_P_interrupts_IDX_0 18
#define DT_N_S_soc_S_mbox_41012000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_mbox_41012000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_mbox_41012000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_tx_mask 65535
#define DT_N_S_soc_S_mbox_41012000_P_tx_mask_EXISTS 1
#define DT_N_S_soc_S_mbox_41012000_P_rx_mask 65535
#define DT_N_S_soc_S_mbox_41012000_P_rx_mask_EXISTS 1

/*
 * Devicetree node: /ipc/ipc0
 *
 * Node identifier: DT_N_S_ipc_S_ipc0
 *
 * Binding (compatible = zephyr,ipc-openamp-static-vrings):
 *   $ZEPHYR_BASE\dts\bindings\ipc\zephyr,ipc-openamp-static-vrings.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_ipc_S_ipc0_PATH "/ipc/ipc0"

/* Node's name with unit-address: */
#define DT_N_S_ipc_S_ipc0_FULL_NAME "ipc0"

/* Node parent (/ipc) identifier: */
#define DT_N_S_ipc_S_ipc0_PARENT DT_N_S_ipc

/* Node's index in its parent's list of children: */
#define DT_N_S_ipc_S_ipc0_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_ipc_S_ipc0_NODELABEL_NUM 1
#define DT_N_S_ipc_S_ipc0_FOREACH_NODELABEL(fn) fn(ipc0)
#define DT_N_S_ipc_S_ipc0_FOREACH_NODELABEL_VARGS(fn, ...) fn(ipc0, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_ipc_S_ipc0_CHILD_NUM 0
#define DT_N_S_ipc_S_ipc0_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_ipc_S_ipc0_FOREACH_CHILD(fn) 
#define DT_N_S_ipc_S_ipc0_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_ipc_S_ipc0_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_ipc_S_ipc0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_ipc_S_ipc0_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_ipc_S_ipc0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_ipc_S_ipc0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_ipc_S_ipc0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_ipc_S_ipc0_ORD 16
#define DT_N_S_ipc_S_ipc0_ORD_STR_SORTABLE 00016

/* Ordinals for what this node depends on directly: */
#define DT_N_S_ipc_S_ipc0_REQUIRES_ORDS \
	12, /* /ipc */ \
	14, /* /reserved-memory/memory@20078000 */ \
	15, /* /soc/mbox@41012000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_ipc_S_ipc0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_ipc_S_ipc0_EXISTS 1
#define DT_N_INST_0_zephyr_ipc_openamp_static_vrings DT_N_S_ipc_S_ipc0
#define DT_N_NODELABEL_ipc0                          DT_N_S_ipc_S_ipc0

/* Macros for properties that are special in the specification: */
#define DT_N_S_ipc_S_ipc0_REG_NUM 0
#define DT_N_S_ipc_S_ipc0_RANGES_NUM 0
#define DT_N_S_ipc_S_ipc0_FOREACH_RANGE(fn) 
#define DT_N_S_ipc_S_ipc0_IRQ_NUM 0
#define DT_N_S_ipc_S_ipc0_IRQ_LEVEL 0
#define DT_N_S_ipc_S_ipc0_COMPAT_MATCHES_zephyr_ipc_openamp_static_vrings 1
#define DT_N_S_ipc_S_ipc0_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_ipc_S_ipc0_COMPAT_VENDOR_IDX_0 "Zephyr-specific binding"
#define DT_N_S_ipc_S_ipc0_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_ipc_S_ipc0_COMPAT_MODEL_IDX_0 "ipc-openamp-static-vrings"
#define DT_N_S_ipc_S_ipc0_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_ipc_S_ipc0_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_ipc_S_ipc0_P_wakeup_source 0
#define DT_N_S_ipc_S_ipc0_P_wakeup_source_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_ipc_S_ipc0_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_status "okay"
#define DT_N_S_ipc_S_ipc0_P_status_STRING_UNQUOTED okay
#define DT_N_S_ipc_S_ipc0_P_status_STRING_TOKEN okay
#define DT_N_S_ipc_S_ipc0_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_ipc_S_ipc0_P_status_IDX_0 "okay"
#define DT_N_S_ipc_S_ipc0_P_status_IDX_0_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_status_ENUM_IDX 1
#define DT_N_S_ipc_S_ipc0_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_status_ENUM_TOKEN okay
#define DT_N_S_ipc_S_ipc0_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_ipc_S_ipc0_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_ipc_S_ipc0, status, 0)
#define DT_N_S_ipc_S_ipc0_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_ipc_S_ipc0, status, 0)
#define DT_N_S_ipc_S_ipc0_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_ipc_S_ipc0, status, 0, __VA_ARGS__)
#define DT_N_S_ipc_S_ipc0_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_ipc_S_ipc0, status, 0, __VA_ARGS__)
#define DT_N_S_ipc_S_ipc0_P_status_LEN 1
#define DT_N_S_ipc_S_ipc0_P_status_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_compatible {"zephyr,ipc-openamp-static-vrings"}
#define DT_N_S_ipc_S_ipc0_P_compatible_IDX_0 "zephyr,ipc-openamp-static-vrings"
#define DT_N_S_ipc_S_ipc0_P_compatible_IDX_0_STRING_UNQUOTED zephyr,ipc-openamp-static-vrings
#define DT_N_S_ipc_S_ipc0_P_compatible_IDX_0_STRING_TOKEN zephyr_ipc_openamp_static_vrings
#define DT_N_S_ipc_S_ipc0_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_IPC_OPENAMP_STATIC_VRINGS
#define DT_N_S_ipc_S_ipc0_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_ipc_S_ipc0, compatible, 0)
#define DT_N_S_ipc_S_ipc0_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_ipc_S_ipc0, compatible, 0)
#define DT_N_S_ipc_S_ipc0_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_ipc_S_ipc0, compatible, 0, __VA_ARGS__)
#define DT_N_S_ipc_S_ipc0_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_ipc_S_ipc0, compatible, 0, __VA_ARGS__)
#define DT_N_S_ipc_S_ipc0_P_compatible_LEN 1
#define DT_N_S_ipc_S_ipc0_P_compatible_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_mboxes_IDX_0_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_mboxes_IDX_0_PH DT_N_S_soc_S_mbox_41012000
#define DT_N_S_ipc_S_ipc0_P_mboxes_IDX_0_VAL_channel 0
#define DT_N_S_ipc_S_ipc0_P_mboxes_IDX_0_VAL_channel_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_mboxes_IDX_0_NAME "rx"
#define DT_N_S_ipc_S_ipc0_P_mboxes_NAME_rx_PH DT_N_S_soc_S_mbox_41012000
#define DT_N_S_ipc_S_ipc0_P_mboxes_NAME_rx_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_mboxes_NAME_rx_VAL_channel DT_N_S_ipc_S_ipc0_P_mboxes_IDX_0_VAL_channel
#define DT_N_S_ipc_S_ipc0_P_mboxes_NAME_rx_VAL_channel_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_mboxes_IDX_1_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_mboxes_IDX_1_PH DT_N_S_soc_S_mbox_41012000
#define DT_N_S_ipc_S_ipc0_P_mboxes_IDX_1_VAL_channel 1
#define DT_N_S_ipc_S_ipc0_P_mboxes_IDX_1_VAL_channel_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_mboxes_IDX_1_NAME "tx"
#define DT_N_S_ipc_S_ipc0_P_mboxes_NAME_tx_PH DT_N_S_soc_S_mbox_41012000
#define DT_N_S_ipc_S_ipc0_P_mboxes_NAME_tx_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_mboxes_NAME_tx_VAL_channel DT_N_S_ipc_S_ipc0_P_mboxes_IDX_1_VAL_channel
#define DT_N_S_ipc_S_ipc0_P_mboxes_NAME_tx_VAL_channel_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_mboxes_FOREACH_PROP_ELEM(fn) fn(DT_N_S_ipc_S_ipc0, mboxes, 0) \
	fn(DT_N_S_ipc_S_ipc0, mboxes, 1)
#define DT_N_S_ipc_S_ipc0_P_mboxes_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_ipc_S_ipc0, mboxes, 0) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_ipc_S_ipc0, mboxes, 1)
#define DT_N_S_ipc_S_ipc0_P_mboxes_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_ipc_S_ipc0, mboxes, 0, __VA_ARGS__) \
	fn(DT_N_S_ipc_S_ipc0, mboxes, 1, __VA_ARGS__)
#define DT_N_S_ipc_S_ipc0_P_mboxes_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_ipc_S_ipc0, mboxes, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_ipc_S_ipc0, mboxes, 1, __VA_ARGS__)
#define DT_N_S_ipc_S_ipc0_P_mboxes_LEN 2
#define DT_N_S_ipc_S_ipc0_P_mboxes_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_mbox_names {"rx", "tx"}
#define DT_N_S_ipc_S_ipc0_P_mbox_names_IDX_0 "rx"
#define DT_N_S_ipc_S_ipc0_P_mbox_names_IDX_0_STRING_UNQUOTED rx
#define DT_N_S_ipc_S_ipc0_P_mbox_names_IDX_0_STRING_TOKEN rx
#define DT_N_S_ipc_S_ipc0_P_mbox_names_IDX_0_STRING_UPPER_TOKEN RX
#define DT_N_S_ipc_S_ipc0_P_mbox_names_IDX_0_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_mbox_names_IDX_1 "tx"
#define DT_N_S_ipc_S_ipc0_P_mbox_names_IDX_1_STRING_UNQUOTED tx
#define DT_N_S_ipc_S_ipc0_P_mbox_names_IDX_1_STRING_TOKEN tx
#define DT_N_S_ipc_S_ipc0_P_mbox_names_IDX_1_STRING_UPPER_TOKEN TX
#define DT_N_S_ipc_S_ipc0_P_mbox_names_IDX_1_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_mbox_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_ipc_S_ipc0, mbox_names, 0) \
	fn(DT_N_S_ipc_S_ipc0, mbox_names, 1)
#define DT_N_S_ipc_S_ipc0_P_mbox_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_ipc_S_ipc0, mbox_names, 0) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_ipc_S_ipc0, mbox_names, 1)
#define DT_N_S_ipc_S_ipc0_P_mbox_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_ipc_S_ipc0, mbox_names, 0, __VA_ARGS__) \
	fn(DT_N_S_ipc_S_ipc0, mbox_names, 1, __VA_ARGS__)
#define DT_N_S_ipc_S_ipc0_P_mbox_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_ipc_S_ipc0, mbox_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_ipc_S_ipc0, mbox_names, 1, __VA_ARGS__)
#define DT_N_S_ipc_S_ipc0_P_mbox_names_LEN 2
#define DT_N_S_ipc_S_ipc0_P_mbox_names_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_zephyr_deferred_init 0
#define DT_N_S_ipc_S_ipc0_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_role "remote"
#define DT_N_S_ipc_S_ipc0_P_role_STRING_UNQUOTED remote
#define DT_N_S_ipc_S_ipc0_P_role_STRING_TOKEN remote
#define DT_N_S_ipc_S_ipc0_P_role_STRING_UPPER_TOKEN REMOTE
#define DT_N_S_ipc_S_ipc0_P_role_IDX_0 "remote"
#define DT_N_S_ipc_S_ipc0_P_role_IDX_0_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_role_ENUM_IDX 1
#define DT_N_S_ipc_S_ipc0_P_role_ENUM_VAL_remote_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_role_ENUM_TOKEN remote
#define DT_N_S_ipc_S_ipc0_P_role_ENUM_UPPER_TOKEN REMOTE
#define DT_N_S_ipc_S_ipc0_P_role_FOREACH_PROP_ELEM(fn) fn(DT_N_S_ipc_S_ipc0, role, 0)
#define DT_N_S_ipc_S_ipc0_P_role_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_ipc_S_ipc0, role, 0)
#define DT_N_S_ipc_S_ipc0_P_role_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_ipc_S_ipc0, role, 0, __VA_ARGS__)
#define DT_N_S_ipc_S_ipc0_P_role_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_ipc_S_ipc0, role, 0, __VA_ARGS__)
#define DT_N_S_ipc_S_ipc0_P_role_LEN 1
#define DT_N_S_ipc_S_ipc0_P_role_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_memory_region DT_N_S_reserved_memory_S_memory_20078000
#define DT_N_S_ipc_S_ipc0_P_memory_region_IDX_0 DT_N_S_reserved_memory_S_memory_20078000
#define DT_N_S_ipc_S_ipc0_P_memory_region_IDX_0_PH DT_N_S_reserved_memory_S_memory_20078000
#define DT_N_S_ipc_S_ipc0_P_memory_region_IDX_0_EXISTS 1
#define DT_N_S_ipc_S_ipc0_P_memory_region_FOREACH_PROP_ELEM(fn) fn(DT_N_S_ipc_S_ipc0, memory_region, 0)
#define DT_N_S_ipc_S_ipc0_P_memory_region_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_ipc_S_ipc0, memory_region, 0)
#define DT_N_S_ipc_S_ipc0_P_memory_region_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_ipc_S_ipc0, memory_region, 0, __VA_ARGS__)
#define DT_N_S_ipc_S_ipc0_P_memory_region_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_ipc_S_ipc0, memory_region, 0, __VA_ARGS__)
#define DT_N_S_ipc_S_ipc0_P_memory_region_LEN 1
#define DT_N_S_ipc_S_ipc0_P_memory_region_EXISTS 1

/*
 * Devicetree node: /soc/acl@41080000
 *
 * Node identifier: DT_N_S_soc_S_acl_41080000
 *
 * Binding (compatible = nordic,nrf-acl):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-acl.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_acl_41080000_PATH "/soc/acl@41080000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_acl_41080000_FULL_NAME "acl@41080000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_acl_41080000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_acl_41080000_CHILD_IDX 30

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_acl_41080000_NODELABEL_NUM 1
#define DT_N_S_soc_S_acl_41080000_FOREACH_NODELABEL(fn) fn(acl)
#define DT_N_S_soc_S_acl_41080000_FOREACH_NODELABEL_VARGS(fn, ...) fn(acl, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_acl_41080000_CHILD_NUM 0
#define DT_N_S_soc_S_acl_41080000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_acl_41080000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_acl_41080000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_acl_41080000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_acl_41080000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_acl_41080000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_acl_41080000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_acl_41080000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_acl_41080000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_acl_41080000_ORD 17
#define DT_N_S_soc_S_acl_41080000_ORD_STR_SORTABLE 00017

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_acl_41080000_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_acl_41080000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_acl_41080000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_acl DT_N_S_soc_S_acl_41080000
#define DT_N_NODELABEL_acl         DT_N_S_soc_S_acl_41080000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_acl_41080000_REG_NUM 1
#define DT_N_S_soc_S_acl_41080000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_acl_41080000_REG_IDX_0_VAL_ADDRESS 1091043328 /* 0x41080000 */
#define DT_N_S_soc_S_acl_41080000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_acl_41080000_RANGES_NUM 0
#define DT_N_S_soc_S_acl_41080000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_acl_41080000_IRQ_NUM 0
#define DT_N_S_soc_S_acl_41080000_IRQ_LEVEL 0
#define DT_N_S_soc_S_acl_41080000_COMPAT_MATCHES_nordic_nrf_acl 1
#define DT_N_S_soc_S_acl_41080000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_acl_41080000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_acl_41080000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_acl_41080000_COMPAT_MODEL_IDX_0 "nrf-acl"
#define DT_N_S_soc_S_acl_41080000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_acl_41080000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_acl_41080000_P_wakeup_source 0
#define DT_N_S_soc_S_acl_41080000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_acl_41080000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_acl_41080000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_acl_41080000_P_status "okay"
#define DT_N_S_soc_S_acl_41080000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_acl_41080000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_acl_41080000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_acl_41080000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_acl_41080000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_acl_41080000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_acl_41080000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_acl_41080000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_acl_41080000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_acl_41080000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_acl_41080000, status, 0)
#define DT_N_S_soc_S_acl_41080000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_acl_41080000, status, 0)
#define DT_N_S_soc_S_acl_41080000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_acl_41080000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_acl_41080000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_acl_41080000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_acl_41080000_P_status_LEN 1
#define DT_N_S_soc_S_acl_41080000_P_status_EXISTS 1
#define DT_N_S_soc_S_acl_41080000_P_compatible {"nordic,nrf-acl"}
#define DT_N_S_soc_S_acl_41080000_P_compatible_IDX_0 "nordic,nrf-acl"
#define DT_N_S_soc_S_acl_41080000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-acl
#define DT_N_S_soc_S_acl_41080000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_acl
#define DT_N_S_soc_S_acl_41080000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_ACL
#define DT_N_S_soc_S_acl_41080000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_acl_41080000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_acl_41080000, compatible, 0)
#define DT_N_S_soc_S_acl_41080000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_acl_41080000, compatible, 0)
#define DT_N_S_soc_S_acl_41080000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_acl_41080000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_acl_41080000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_acl_41080000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_acl_41080000_P_compatible_LEN 1
#define DT_N_S_soc_S_acl_41080000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_acl_41080000_P_reg {1091043328 /* 0x41080000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_acl_41080000_P_reg_IDX_0 1091043328
#define DT_N_S_soc_S_acl_41080000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_acl_41080000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_acl_41080000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_acl_41080000_P_reg_EXISTS 1
#define DT_N_S_soc_S_acl_41080000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_acl_41080000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/ccm@4100e000
 *
 * Node identifier: DT_N_S_soc_S_ccm_4100e000
 *
 * Binding (compatible = nordic,nrf-ccm):
 *   $ZEPHYR_BASE\dts\bindings\crypto\nordic,nrf-ccm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_ccm_4100e000_PATH "/soc/ccm@4100e000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_ccm_4100e000_FULL_NAME "ccm@4100e000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_ccm_4100e000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_ccm_4100e000_CHILD_IDX 14

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_ccm_4100e000_NODELABEL_NUM 1
#define DT_N_S_soc_S_ccm_4100e000_FOREACH_NODELABEL(fn) fn(ccm)
#define DT_N_S_soc_S_ccm_4100e000_FOREACH_NODELABEL_VARGS(fn, ...) fn(ccm, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_ccm_4100e000_CHILD_NUM 0
#define DT_N_S_soc_S_ccm_4100e000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_ccm_4100e000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_ccm_4100e000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_ccm_4100e000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_ccm_4100e000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_ccm_4100e000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_ccm_4100e000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_ccm_4100e000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_ccm_4100e000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_ccm_4100e000_ORD 18
#define DT_N_S_soc_S_ccm_4100e000_ORD_STR_SORTABLE 00018

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_ccm_4100e000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_ccm_4100e000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_ccm_4100e000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_ccm DT_N_S_soc_S_ccm_4100e000
#define DT_N_NODELABEL_ccm         DT_N_S_soc_S_ccm_4100e000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_ccm_4100e000_REG_NUM 1
#define DT_N_S_soc_S_ccm_4100e000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_REG_IDX_0_VAL_ADDRESS 1090576384 /* 0x4100e000 */
#define DT_N_S_soc_S_ccm_4100e000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_ccm_4100e000_RANGES_NUM 0
#define DT_N_S_soc_S_ccm_4100e000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_ccm_4100e000_IRQ_NUM 1
#define DT_N_S_soc_S_ccm_4100e000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_IRQ_IDX_0_VAL_irq 14
#define DT_N_S_soc_S_ccm_4100e000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_ccm_4100e000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_ccm_4100e000_IRQ_LEVEL 1
#define DT_N_S_soc_S_ccm_4100e000_COMPAT_MATCHES_nordic_nrf_ccm 1
#define DT_N_S_soc_S_ccm_4100e000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_ccm_4100e000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_COMPAT_MODEL_IDX_0 "nrf-ccm"
#define DT_N_S_soc_S_ccm_4100e000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_ccm_4100e000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_ccm_4100e000_P_wakeup_source 0
#define DT_N_S_soc_S_ccm_4100e000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_ccm_4100e000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_P_status "okay"
#define DT_N_S_soc_S_ccm_4100e000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_ccm_4100e000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_ccm_4100e000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ccm_4100e000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_ccm_4100e000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_ccm_4100e000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_ccm_4100e000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ccm_4100e000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ccm_4100e000, status, 0)
#define DT_N_S_soc_S_ccm_4100e000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ccm_4100e000, status, 0)
#define DT_N_S_soc_S_ccm_4100e000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ccm_4100e000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ccm_4100e000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ccm_4100e000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ccm_4100e000_P_status_LEN 1
#define DT_N_S_soc_S_ccm_4100e000_P_status_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_P_compatible {"nordic,nrf-ccm"}
#define DT_N_S_soc_S_ccm_4100e000_P_compatible_IDX_0 "nordic,nrf-ccm"
#define DT_N_S_soc_S_ccm_4100e000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-ccm
#define DT_N_S_soc_S_ccm_4100e000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_ccm
#define DT_N_S_soc_S_ccm_4100e000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_CCM
#define DT_N_S_soc_S_ccm_4100e000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ccm_4100e000, compatible, 0)
#define DT_N_S_soc_S_ccm_4100e000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ccm_4100e000, compatible, 0)
#define DT_N_S_soc_S_ccm_4100e000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ccm_4100e000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ccm_4100e000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ccm_4100e000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ccm_4100e000_P_compatible_LEN 1
#define DT_N_S_soc_S_ccm_4100e000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_P_reg {1090576384 /* 0x4100e000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_ccm_4100e000_P_reg_IDX_0 1090576384
#define DT_N_S_soc_S_ccm_4100e000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_ccm_4100e000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_P_reg_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_P_interrupts {14 /* 0xe */, 1 /* 0x1 */}
#define DT_N_S_soc_S_ccm_4100e000_P_interrupts_IDX_0 14
#define DT_N_S_soc_S_ccm_4100e000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_ccm_4100e000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_ccm_4100e000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_P_length_field_length_8_bits 1
#define DT_N_S_soc_S_ccm_4100e000_P_length_field_length_8_bits_EXISTS 1
#define DT_N_S_soc_S_ccm_4100e000_P_headermask_supported 1
#define DT_N_S_soc_S_ccm_4100e000_P_headermask_supported_EXISTS 1

/*
 * Devicetree node: /soc/clock@41005000
 *
 * Node identifier: DT_N_S_soc_S_clock_41005000
 *
 * Binding (compatible = nordic,nrf-clock):
 *   $ZEPHYR_BASE\dts\bindings\clock\nordic,nrf-clock.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_clock_41005000_PATH "/soc/clock@41005000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_clock_41005000_FULL_NAME "clock@41005000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_clock_41005000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_clock_41005000_CHILD_IDX 6

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_clock_41005000_NODELABEL_NUM 1
#define DT_N_S_soc_S_clock_41005000_FOREACH_NODELABEL(fn) fn(clock)
#define DT_N_S_soc_S_clock_41005000_FOREACH_NODELABEL_VARGS(fn, ...) fn(clock, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_clock_41005000_CHILD_NUM 0
#define DT_N_S_soc_S_clock_41005000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_clock_41005000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_clock_41005000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_clock_41005000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_clock_41005000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_clock_41005000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_clock_41005000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_clock_41005000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_clock_41005000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_clock_41005000_ORD 19
#define DT_N_S_soc_S_clock_41005000_ORD_STR_SORTABLE 00019

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_clock_41005000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_clock_41005000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_clock_41005000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_clock DT_N_S_soc_S_clock_41005000
#define DT_N_NODELABEL_clock         DT_N_S_soc_S_clock_41005000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_clock_41005000_REG_NUM 1
#define DT_N_S_soc_S_clock_41005000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_REG_IDX_0_VAL_ADDRESS 1090539520 /* 0x41005000 */
#define DT_N_S_soc_S_clock_41005000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_clock_41005000_RANGES_NUM 0
#define DT_N_S_soc_S_clock_41005000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_clock_41005000_IRQ_NUM 1
#define DT_N_S_soc_S_clock_41005000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_IRQ_IDX_0_VAL_irq 5
#define DT_N_S_soc_S_clock_41005000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_clock_41005000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_clock_41005000_IRQ_LEVEL 1
#define DT_N_S_soc_S_clock_41005000_COMPAT_MATCHES_nordic_nrf_clock 1
#define DT_N_S_soc_S_clock_41005000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_clock_41005000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_COMPAT_MODEL_IDX_0 "nrf-clock"
#define DT_N_S_soc_S_clock_41005000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_clock_41005000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_clock_41005000_P_wakeup_source 0
#define DT_N_S_soc_S_clock_41005000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_clock_41005000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_P_status "okay"
#define DT_N_S_soc_S_clock_41005000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_clock_41005000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_clock_41005000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_clock_41005000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_clock_41005000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_clock_41005000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_clock_41005000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_clock_41005000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_clock_41005000, status, 0)
#define DT_N_S_soc_S_clock_41005000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_clock_41005000, status, 0)
#define DT_N_S_soc_S_clock_41005000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_clock_41005000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_clock_41005000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_clock_41005000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_clock_41005000_P_status_LEN 1
#define DT_N_S_soc_S_clock_41005000_P_status_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_P_compatible {"nordic,nrf-clock"}
#define DT_N_S_soc_S_clock_41005000_P_compatible_IDX_0 "nordic,nrf-clock"
#define DT_N_S_soc_S_clock_41005000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-clock
#define DT_N_S_soc_S_clock_41005000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_clock
#define DT_N_S_soc_S_clock_41005000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_CLOCK
#define DT_N_S_soc_S_clock_41005000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_clock_41005000, compatible, 0)
#define DT_N_S_soc_S_clock_41005000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_clock_41005000, compatible, 0)
#define DT_N_S_soc_S_clock_41005000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_clock_41005000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_clock_41005000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_clock_41005000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_clock_41005000_P_compatible_LEN 1
#define DT_N_S_soc_S_clock_41005000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_P_reg {1090539520 /* 0x41005000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_clock_41005000_P_reg_IDX_0 1090539520
#define DT_N_S_soc_S_clock_41005000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_clock_41005000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_P_reg_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_P_interrupts {5 /* 0x5 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_clock_41005000_P_interrupts_IDX_0 5
#define DT_N_S_soc_S_clock_41005000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_clock_41005000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_clock_41005000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_clock_41005000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/dppic@4100f000
 *
 * Node identifier: DT_N_S_soc_S_dppic_4100f000
 *
 * Binding (compatible = nordic,nrf-dppic):
 *   $ZEPHYR_BASE\dts\bindings\misc\nordic,nrf-dppic.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_dppic_4100f000_PATH "/soc/dppic@4100f000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_dppic_4100f000_FULL_NAME "dppic@4100f000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_dppic_4100f000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_dppic_4100f000_CHILD_IDX 15

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_dppic_4100f000_NODELABEL_NUM 2
#define DT_N_S_soc_S_dppic_4100f000_FOREACH_NODELABEL(fn) fn(dppic0) fn(dppic)
#define DT_N_S_soc_S_dppic_4100f000_FOREACH_NODELABEL_VARGS(fn, ...) fn(dppic0, __VA_ARGS__) fn(dppic, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_dppic_4100f000_CHILD_NUM 0
#define DT_N_S_soc_S_dppic_4100f000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_dppic_4100f000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_dppic_4100f000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_dppic_4100f000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_dppic_4100f000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_dppic_4100f000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_dppic_4100f000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_dppic_4100f000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_dppic_4100f000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_dppic_4100f000_ORD 20
#define DT_N_S_soc_S_dppic_4100f000_ORD_STR_SORTABLE 00020

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_dppic_4100f000_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_dppic_4100f000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_dppic_4100f000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_dppic DT_N_S_soc_S_dppic_4100f000
#define DT_N_NODELABEL_dppic0        DT_N_S_soc_S_dppic_4100f000
#define DT_N_NODELABEL_dppic         DT_N_S_soc_S_dppic_4100f000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_dppic_4100f000_REG_NUM 1
#define DT_N_S_soc_S_dppic_4100f000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_dppic_4100f000_REG_IDX_0_VAL_ADDRESS 1090580480 /* 0x4100f000 */
#define DT_N_S_soc_S_dppic_4100f000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_dppic_4100f000_RANGES_NUM 0
#define DT_N_S_soc_S_dppic_4100f000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_dppic_4100f000_IRQ_NUM 0
#define DT_N_S_soc_S_dppic_4100f000_IRQ_LEVEL 0
#define DT_N_S_soc_S_dppic_4100f000_COMPAT_MATCHES_nordic_nrf_dppic 1
#define DT_N_S_soc_S_dppic_4100f000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_dppic_4100f000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_dppic_4100f000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_dppic_4100f000_COMPAT_MODEL_IDX_0 "nrf-dppic"
#define DT_N_S_soc_S_dppic_4100f000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_dppic_4100f000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_dppic_4100f000_P_wakeup_source 0
#define DT_N_S_soc_S_dppic_4100f000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_dppic_4100f000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_dppic_4100f000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_dppic_4100f000_P_status "okay"
#define DT_N_S_soc_S_dppic_4100f000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_dppic_4100f000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_dppic_4100f000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_dppic_4100f000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_dppic_4100f000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_dppic_4100f000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_dppic_4100f000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_dppic_4100f000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_dppic_4100f000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_dppic_4100f000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dppic_4100f000, status, 0)
#define DT_N_S_soc_S_dppic_4100f000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dppic_4100f000, status, 0)
#define DT_N_S_soc_S_dppic_4100f000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dppic_4100f000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_dppic_4100f000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dppic_4100f000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_dppic_4100f000_P_status_LEN 1
#define DT_N_S_soc_S_dppic_4100f000_P_status_EXISTS 1
#define DT_N_S_soc_S_dppic_4100f000_P_compatible {"nordic,nrf-dppic"}
#define DT_N_S_soc_S_dppic_4100f000_P_compatible_IDX_0 "nordic,nrf-dppic"
#define DT_N_S_soc_S_dppic_4100f000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-dppic
#define DT_N_S_soc_S_dppic_4100f000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_dppic
#define DT_N_S_soc_S_dppic_4100f000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_DPPIC
#define DT_N_S_soc_S_dppic_4100f000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_dppic_4100f000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dppic_4100f000, compatible, 0)
#define DT_N_S_soc_S_dppic_4100f000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dppic_4100f000, compatible, 0)
#define DT_N_S_soc_S_dppic_4100f000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dppic_4100f000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_dppic_4100f000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dppic_4100f000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_dppic_4100f000_P_compatible_LEN 1
#define DT_N_S_soc_S_dppic_4100f000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_dppic_4100f000_P_reg {1090580480 /* 0x4100f000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_dppic_4100f000_P_reg_IDX_0 1090580480
#define DT_N_S_soc_S_dppic_4100f000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_dppic_4100f000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_dppic_4100f000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_dppic_4100f000_P_reg_EXISTS 1
#define DT_N_S_soc_S_dppic_4100f000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_dppic_4100f000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/ecb@4100d000
 *
 * Node identifier: DT_N_S_soc_S_ecb_4100d000
 *
 * Binding (compatible = nordic,nrf-ecb):
 *   $ZEPHYR_BASE\dts\bindings\crypto\nordic,nrf-ecb.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_ecb_4100d000_PATH "/soc/ecb@4100d000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_ecb_4100d000_FULL_NAME "ecb@4100d000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_ecb_4100d000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_ecb_4100d000_CHILD_IDX 13

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_ecb_4100d000_NODELABEL_NUM 1
#define DT_N_S_soc_S_ecb_4100d000_FOREACH_NODELABEL(fn) fn(ecb)
#define DT_N_S_soc_S_ecb_4100d000_FOREACH_NODELABEL_VARGS(fn, ...) fn(ecb, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_ecb_4100d000_CHILD_NUM 0
#define DT_N_S_soc_S_ecb_4100d000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_ecb_4100d000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_ecb_4100d000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_ecb_4100d000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_ecb_4100d000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_ecb_4100d000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_ecb_4100d000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_ecb_4100d000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_ecb_4100d000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_ecb_4100d000_ORD 21
#define DT_N_S_soc_S_ecb_4100d000_ORD_STR_SORTABLE 00021

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_ecb_4100d000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_ecb_4100d000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_ecb_4100d000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_ecb DT_N_S_soc_S_ecb_4100d000
#define DT_N_NODELABEL_ecb         DT_N_S_soc_S_ecb_4100d000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_ecb_4100d000_REG_NUM 1
#define DT_N_S_soc_S_ecb_4100d000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_REG_IDX_0_VAL_ADDRESS 1090572288 /* 0x4100d000 */
#define DT_N_S_soc_S_ecb_4100d000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_ecb_4100d000_RANGES_NUM 0
#define DT_N_S_soc_S_ecb_4100d000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_ecb_4100d000_IRQ_NUM 1
#define DT_N_S_soc_S_ecb_4100d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_IRQ_IDX_0_VAL_irq 13
#define DT_N_S_soc_S_ecb_4100d000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_ecb_4100d000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_ecb_4100d000_IRQ_LEVEL 1
#define DT_N_S_soc_S_ecb_4100d000_COMPAT_MATCHES_nordic_nrf_ecb 1
#define DT_N_S_soc_S_ecb_4100d000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_ecb_4100d000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_COMPAT_MODEL_IDX_0 "nrf-ecb"
#define DT_N_S_soc_S_ecb_4100d000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_ecb_4100d000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_ecb_4100d000_P_wakeup_source 0
#define DT_N_S_soc_S_ecb_4100d000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_ecb_4100d000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_P_status "okay"
#define DT_N_S_soc_S_ecb_4100d000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_ecb_4100d000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_ecb_4100d000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ecb_4100d000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_ecb_4100d000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_ecb_4100d000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_ecb_4100d000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ecb_4100d000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ecb_4100d000, status, 0)
#define DT_N_S_soc_S_ecb_4100d000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ecb_4100d000, status, 0)
#define DT_N_S_soc_S_ecb_4100d000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ecb_4100d000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ecb_4100d000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ecb_4100d000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ecb_4100d000_P_status_LEN 1
#define DT_N_S_soc_S_ecb_4100d000_P_status_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_P_compatible {"nordic,nrf-ecb"}
#define DT_N_S_soc_S_ecb_4100d000_P_compatible_IDX_0 "nordic,nrf-ecb"
#define DT_N_S_soc_S_ecb_4100d000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-ecb
#define DT_N_S_soc_S_ecb_4100d000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_ecb
#define DT_N_S_soc_S_ecb_4100d000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_ECB
#define DT_N_S_soc_S_ecb_4100d000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ecb_4100d000, compatible, 0)
#define DT_N_S_soc_S_ecb_4100d000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ecb_4100d000, compatible, 0)
#define DT_N_S_soc_S_ecb_4100d000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ecb_4100d000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ecb_4100d000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ecb_4100d000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ecb_4100d000_P_compatible_LEN 1
#define DT_N_S_soc_S_ecb_4100d000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_P_reg {1090572288 /* 0x4100d000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_ecb_4100d000_P_reg_IDX_0 1090572288
#define DT_N_S_soc_S_ecb_4100d000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_ecb_4100d000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_P_reg_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_P_interrupts {13 /* 0xd */, 1 /* 0x1 */}
#define DT_N_S_soc_S_ecb_4100d000_P_interrupts_IDX_0 13
#define DT_N_S_soc_S_ecb_4100d000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_ecb_4100d000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_ecb_4100d000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_ecb_4100d000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/egu@41014000
 *
 * Node identifier: DT_N_S_soc_S_egu_41014000
 *
 * Binding (compatible = nordic,nrf-egu):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-egu.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_egu_41014000_PATH "/soc/egu@41014000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_egu_41014000_FULL_NAME "egu@41014000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_egu_41014000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_egu_41014000_CHILD_IDX 22

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_egu_41014000_NODELABEL_NUM 1
#define DT_N_S_soc_S_egu_41014000_FOREACH_NODELABEL(fn) fn(egu0)
#define DT_N_S_soc_S_egu_41014000_FOREACH_NODELABEL_VARGS(fn, ...) fn(egu0, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_egu_41014000_CHILD_NUM 0
#define DT_N_S_soc_S_egu_41014000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_egu_41014000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_egu_41014000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_egu_41014000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_41014000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_egu_41014000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_egu_41014000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_egu_41014000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_41014000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_egu_41014000_ORD 22
#define DT_N_S_soc_S_egu_41014000_ORD_STR_SORTABLE 00022

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_egu_41014000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_egu_41014000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_egu_41014000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_egu DT_N_S_soc_S_egu_41014000
#define DT_N_NODELABEL_egu0        DT_N_S_soc_S_egu_41014000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_egu_41014000_REG_NUM 1
#define DT_N_S_soc_S_egu_41014000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_REG_IDX_0_VAL_ADDRESS 1090600960 /* 0x41014000 */
#define DT_N_S_soc_S_egu_41014000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_egu_41014000_RANGES_NUM 0
#define DT_N_S_soc_S_egu_41014000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_egu_41014000_IRQ_NUM 1
#define DT_N_S_soc_S_egu_41014000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_IRQ_IDX_0_VAL_irq 20
#define DT_N_S_soc_S_egu_41014000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_egu_41014000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_egu_41014000_IRQ_LEVEL 1
#define DT_N_S_soc_S_egu_41014000_COMPAT_MATCHES_nordic_nrf_egu 1
#define DT_N_S_soc_S_egu_41014000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_egu_41014000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_COMPAT_MODEL_IDX_0 "nrf-egu"
#define DT_N_S_soc_S_egu_41014000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_egu_41014000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_egu_41014000_P_wakeup_source 0
#define DT_N_S_soc_S_egu_41014000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_egu_41014000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_P_status "okay"
#define DT_N_S_soc_S_egu_41014000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_egu_41014000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_egu_41014000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_egu_41014000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_egu_41014000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_egu_41014000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_egu_41014000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_egu_41014000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_41014000, status, 0)
#define DT_N_S_soc_S_egu_41014000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_egu_41014000, status, 0)
#define DT_N_S_soc_S_egu_41014000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_41014000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_41014000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_egu_41014000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_41014000_P_status_LEN 1
#define DT_N_S_soc_S_egu_41014000_P_status_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_P_compatible {"nordic,nrf-egu"}
#define DT_N_S_soc_S_egu_41014000_P_compatible_IDX_0 "nordic,nrf-egu"
#define DT_N_S_soc_S_egu_41014000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu
#define DT_N_S_soc_S_egu_41014000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu
#define DT_N_S_soc_S_egu_41014000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU
#define DT_N_S_soc_S_egu_41014000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_41014000, compatible, 0)
#define DT_N_S_soc_S_egu_41014000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_egu_41014000, compatible, 0)
#define DT_N_S_soc_S_egu_41014000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_41014000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_41014000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_egu_41014000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_41014000_P_compatible_LEN 1
#define DT_N_S_soc_S_egu_41014000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_P_reg {1090600960 /* 0x41014000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_egu_41014000_P_reg_IDX_0 1090600960
#define DT_N_S_soc_S_egu_41014000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_egu_41014000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_P_reg_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_P_interrupts {20 /* 0x14 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_egu_41014000_P_interrupts_IDX_0 20
#define DT_N_S_soc_S_egu_41014000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_egu_41014000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_egu_41014000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_egu_41014000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/ficr@1ff0000
 *
 * Node identifier: DT_N_S_soc_S_ficr_1ff0000
 *
 * Binding (compatible = nordic,nrf-ficr):
 *   $ZEPHYR_BASE\dts\bindings\misc\nordic,nrf-ficr.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_ficr_1ff0000_PATH "/soc/ficr@1ff0000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_ficr_1ff0000_FULL_NAME "ficr@1ff0000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_ficr_1ff0000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_ficr_1ff0000_CHILD_IDX 2

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_ficr_1ff0000_NODELABEL_NUM 1
#define DT_N_S_soc_S_ficr_1ff0000_FOREACH_NODELABEL(fn) fn(ficr)
#define DT_N_S_soc_S_ficr_1ff0000_FOREACH_NODELABEL_VARGS(fn, ...) fn(ficr, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_ficr_1ff0000_CHILD_NUM 0
#define DT_N_S_soc_S_ficr_1ff0000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_ficr_1ff0000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_ficr_1ff0000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_ficr_1ff0000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_ficr_1ff0000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_ficr_1ff0000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_ficr_1ff0000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_ficr_1ff0000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_ficr_1ff0000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_ficr_1ff0000_ORD 23
#define DT_N_S_soc_S_ficr_1ff0000_ORD_STR_SORTABLE 00023

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_ficr_1ff0000_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_ficr_1ff0000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_ficr_1ff0000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_ficr DT_N_S_soc_S_ficr_1ff0000
#define DT_N_NODELABEL_ficr         DT_N_S_soc_S_ficr_1ff0000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_ficr_1ff0000_REG_NUM 1
#define DT_N_S_soc_S_ficr_1ff0000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_1ff0000_REG_IDX_0_VAL_ADDRESS 33488896 /* 0x1ff0000 */
#define DT_N_S_soc_S_ficr_1ff0000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_ficr_1ff0000_RANGES_NUM 0
#define DT_N_S_soc_S_ficr_1ff0000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_ficr_1ff0000_IRQ_NUM 0
#define DT_N_S_soc_S_ficr_1ff0000_IRQ_LEVEL 0
#define DT_N_S_soc_S_ficr_1ff0000_COMPAT_MATCHES_nordic_nrf_ficr 1
#define DT_N_S_soc_S_ficr_1ff0000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_1ff0000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_ficr_1ff0000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_1ff0000_COMPAT_MODEL_IDX_0 "nrf-ficr"
#define DT_N_S_soc_S_ficr_1ff0000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_ficr_1ff0000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_ficr_1ff0000_P_wakeup_source 0
#define DT_N_S_soc_S_ficr_1ff0000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_ficr_1ff0000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_ficr_1ff0000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_ficr_1ff0000_P_status "okay"
#define DT_N_S_soc_S_ficr_1ff0000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_ficr_1ff0000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_ficr_1ff0000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ficr_1ff0000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_ficr_1ff0000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_1ff0000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_ficr_1ff0000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_ficr_1ff0000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_ficr_1ff0000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ficr_1ff0000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ficr_1ff0000, status, 0)
#define DT_N_S_soc_S_ficr_1ff0000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ficr_1ff0000, status, 0)
#define DT_N_S_soc_S_ficr_1ff0000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ficr_1ff0000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ficr_1ff0000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ficr_1ff0000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ficr_1ff0000_P_status_LEN 1
#define DT_N_S_soc_S_ficr_1ff0000_P_status_EXISTS 1
#define DT_N_S_soc_S_ficr_1ff0000_P_compatible {"nordic,nrf-ficr"}
#define DT_N_S_soc_S_ficr_1ff0000_P_compatible_IDX_0 "nordic,nrf-ficr"
#define DT_N_S_soc_S_ficr_1ff0000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-ficr
#define DT_N_S_soc_S_ficr_1ff0000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_ficr
#define DT_N_S_soc_S_ficr_1ff0000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_FICR
#define DT_N_S_soc_S_ficr_1ff0000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_1ff0000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ficr_1ff0000, compatible, 0)
#define DT_N_S_soc_S_ficr_1ff0000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ficr_1ff0000, compatible, 0)
#define DT_N_S_soc_S_ficr_1ff0000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ficr_1ff0000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ficr_1ff0000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ficr_1ff0000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ficr_1ff0000_P_compatible_LEN 1
#define DT_N_S_soc_S_ficr_1ff0000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_ficr_1ff0000_P_reg {33488896 /* 0x1ff0000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_ficr_1ff0000_P_reg_IDX_0 33488896
#define DT_N_S_soc_S_ficr_1ff0000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_1ff0000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_ficr_1ff0000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ficr_1ff0000_P_reg_EXISTS 1
#define DT_N_S_soc_S_ficr_1ff0000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_ficr_1ff0000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/gpiote@4100a000
 *
 * Node identifier: DT_N_S_soc_S_gpiote_4100a000
 *
 * Binding (compatible = nordic,nrf-gpiote):
 *   $ZEPHYR_BASE\dts\bindings\gpio\nordic,nrf-gpiote.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_gpiote_4100a000_PATH "/soc/gpiote@4100a000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_gpiote_4100a000_FULL_NAME "gpiote@4100a000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_gpiote_4100a000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_gpiote_4100a000_CHILD_IDX 10

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_gpiote_4100a000_NODELABEL_NUM 2
#define DT_N_S_soc_S_gpiote_4100a000_FOREACH_NODELABEL(fn) fn(gpiote) fn(gpiote0)
#define DT_N_S_soc_S_gpiote_4100a000_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiote, __VA_ARGS__) fn(gpiote0, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_gpiote_4100a000_CHILD_NUM 0
#define DT_N_S_soc_S_gpiote_4100a000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_gpiote_4100a000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_gpiote_4100a000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_gpiote_4100a000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_gpiote_4100a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_gpiote_4100a000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_gpiote_4100a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_gpiote_4100a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_gpiote_4100a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_gpiote_4100a000_ORD 24
#define DT_N_S_soc_S_gpiote_4100a000_ORD_STR_SORTABLE 00024

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_gpiote_4100a000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_gpiote_4100a000_SUPPORTS_ORDS \
	25, /* /soc/gpio@418c0500 */ \
	26, /* /soc/gpio@418c0800 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_gpiote_4100a000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_gpiote DT_N_S_soc_S_gpiote_4100a000
#define DT_N_NODELABEL_gpiote         DT_N_S_soc_S_gpiote_4100a000
#define DT_N_NODELABEL_gpiote0        DT_N_S_soc_S_gpiote_4100a000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_gpiote_4100a000_REG_NUM 1
#define DT_N_S_soc_S_gpiote_4100a000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_REG_IDX_0_VAL_ADDRESS 1090560000 /* 0x4100a000 */
#define DT_N_S_soc_S_gpiote_4100a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_gpiote_4100a000_RANGES_NUM 0
#define DT_N_S_soc_S_gpiote_4100a000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_gpiote_4100a000_IRQ_NUM 1
#define DT_N_S_soc_S_gpiote_4100a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_IRQ_IDX_0_VAL_irq 10
#define DT_N_S_soc_S_gpiote_4100a000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_IRQ_IDX_0_VAL_priority 5
#define DT_N_S_soc_S_gpiote_4100a000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_gpiote_4100a000_IRQ_LEVEL 1
#define DT_N_S_soc_S_gpiote_4100a000_COMPAT_MATCHES_nordic_nrf_gpiote 1
#define DT_N_S_soc_S_gpiote_4100a000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_gpiote_4100a000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_COMPAT_MODEL_IDX_0 "nrf-gpiote"
#define DT_N_S_soc_S_gpiote_4100a000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_gpiote_4100a000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_gpiote_4100a000_P_wakeup_source 0
#define DT_N_S_soc_S_gpiote_4100a000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_gpiote_4100a000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_P_status "okay"
#define DT_N_S_soc_S_gpiote_4100a000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_gpiote_4100a000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_gpiote_4100a000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpiote_4100a000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_gpiote_4100a000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_gpiote_4100a000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_gpiote_4100a000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpiote_4100a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_4100a000, status, 0)
#define DT_N_S_soc_S_gpiote_4100a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpiote_4100a000, status, 0)
#define DT_N_S_soc_S_gpiote_4100a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_4100a000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpiote_4100a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpiote_4100a000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpiote_4100a000_P_status_LEN 1
#define DT_N_S_soc_S_gpiote_4100a000_P_status_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_P_compatible {"nordic,nrf-gpiote"}
#define DT_N_S_soc_S_gpiote_4100a000_P_compatible_IDX_0 "nordic,nrf-gpiote"
#define DT_N_S_soc_S_gpiote_4100a000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpiote
#define DT_N_S_soc_S_gpiote_4100a000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpiote
#define DT_N_S_soc_S_gpiote_4100a000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPIOTE
#define DT_N_S_soc_S_gpiote_4100a000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_4100a000, compatible, 0)
#define DT_N_S_soc_S_gpiote_4100a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpiote_4100a000, compatible, 0)
#define DT_N_S_soc_S_gpiote_4100a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_4100a000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpiote_4100a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpiote_4100a000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpiote_4100a000_P_compatible_LEN 1
#define DT_N_S_soc_S_gpiote_4100a000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_P_reg {1090560000 /* 0x4100a000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_gpiote_4100a000_P_reg_IDX_0 1090560000
#define DT_N_S_soc_S_gpiote_4100a000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_gpiote_4100a000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_P_reg_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_P_interrupts {10 /* 0xa */, 5 /* 0x5 */}
#define DT_N_S_soc_S_gpiote_4100a000_P_interrupts_IDX_0 10
#define DT_N_S_soc_S_gpiote_4100a000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_P_interrupts_IDX_1 5
#define DT_N_S_soc_S_gpiote_4100a000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_gpiote_4100a000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_gpiote_4100a000_P_instance 0
#define DT_N_S_soc_S_gpiote_4100a000_P_instance_EXISTS 1

/*
 * Devicetree node: /soc/gpio@418c0500
 *
 * Node identifier: DT_N_S_soc_S_gpio_418c0500
 *
 * Binding (compatible = nordic,nrf-gpio):
 *   $ZEPHYR_BASE\dts\bindings\gpio\nordic,nrf-gpio.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_gpio_418c0500_PATH "/soc/gpio@418c0500"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_gpio_418c0500_FULL_NAME "gpio@418c0500"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_gpio_418c0500_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_gpio_418c0500_CHILD_IDX 33

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_gpio_418c0500_NODELABEL_NUM 1
#define DT_N_S_soc_S_gpio_418c0500_FOREACH_NODELABEL(fn) fn(gpio0)
#define DT_N_S_soc_S_gpio_418c0500_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpio0, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_gpio_418c0500_CHILD_NUM 0
#define DT_N_S_soc_S_gpio_418c0500_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_gpio_418c0500_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_gpio_418c0500_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_gpio_418c0500_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_gpio_418c0500_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_gpio_418c0500_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_gpio_418c0500_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_gpio_418c0500_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_gpio_418c0500_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_gpio_418c0500_ORD 25
#define DT_N_S_soc_S_gpio_418c0500_ORD_STR_SORTABLE 00025

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_gpio_418c0500_REQUIRES_ORDS \
	5, /* /soc */ \
	24, /* /soc/gpiote@4100a000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_gpio_418c0500_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_gpio_418c0500_EXISTS 1
#define DT_N_INST_0_nordic_nrf_gpio DT_N_S_soc_S_gpio_418c0500
#define DT_N_NODELABEL_gpio0        DT_N_S_soc_S_gpio_418c0500

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_gpio_418c0500_REG_NUM 1
#define DT_N_S_soc_S_gpio_418c0500_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_REG_IDX_0_VAL_ADDRESS 1099695360 /* 0x418c0500 */
#define DT_N_S_soc_S_gpio_418c0500_REG_IDX_0_VAL_SIZE 768 /* 0x300 */
#define DT_N_S_soc_S_gpio_418c0500_RANGES_NUM 0
#define DT_N_S_soc_S_gpio_418c0500_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_gpio_418c0500_IRQ_NUM 0
#define DT_N_S_soc_S_gpio_418c0500_IRQ_LEVEL 0
#define DT_N_S_soc_S_gpio_418c0500_COMPAT_MATCHES_nordic_nrf_gpio 1
#define DT_N_S_soc_S_gpio_418c0500_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_gpio_418c0500_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_COMPAT_MODEL_IDX_0 "nrf-gpio"
#define DT_N_S_soc_S_gpio_418c0500_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_gpio_418c0500_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_gpio_418c0500_P_gpio_controller 1
#define DT_N_S_soc_S_gpio_418c0500_P_gpio_controller_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_P_ngpios 32
#define DT_N_S_soc_S_gpio_418c0500_P_ngpios_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_P_wakeup_source 0
#define DT_N_S_soc_S_gpio_418c0500_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_gpio_418c0500_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_P_status "okay"
#define DT_N_S_soc_S_gpio_418c0500_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_gpio_418c0500_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_gpio_418c0500_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpio_418c0500_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_gpio_418c0500_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_gpio_418c0500_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_gpio_418c0500_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpio_418c0500_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_418c0500, status, 0)
#define DT_N_S_soc_S_gpio_418c0500_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpio_418c0500, status, 0)
#define DT_N_S_soc_S_gpio_418c0500_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpio_418c0500, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_418c0500_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpio_418c0500, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_418c0500_P_status_LEN 1
#define DT_N_S_soc_S_gpio_418c0500_P_status_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_P_compatible {"nordic,nrf-gpio"}
#define DT_N_S_soc_S_gpio_418c0500_P_compatible_IDX_0 "nordic,nrf-gpio"
#define DT_N_S_soc_S_gpio_418c0500_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpio
#define DT_N_S_soc_S_gpio_418c0500_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpio
#define DT_N_S_soc_S_gpio_418c0500_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPIO
#define DT_N_S_soc_S_gpio_418c0500_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_418c0500, compatible, 0)
#define DT_N_S_soc_S_gpio_418c0500_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpio_418c0500, compatible, 0)
#define DT_N_S_soc_S_gpio_418c0500_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpio_418c0500, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_418c0500_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpio_418c0500, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_418c0500_P_compatible_LEN 1
#define DT_N_S_soc_S_gpio_418c0500_P_compatible_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_P_reg {1099695360 /* 0x418c0500 */, 768 /* 0x300 */}
#define DT_N_S_soc_S_gpio_418c0500_P_reg_IDX_0 1099695360
#define DT_N_S_soc_S_gpio_418c0500_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_P_reg_IDX_1 768
#define DT_N_S_soc_S_gpio_418c0500_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_P_reg_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_gpio_418c0500_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_P_gpiote_instance DT_N_S_soc_S_gpiote_4100a000
#define DT_N_S_soc_S_gpio_418c0500_P_gpiote_instance_IDX_0 DT_N_S_soc_S_gpiote_4100a000
#define DT_N_S_soc_S_gpio_418c0500_P_gpiote_instance_IDX_0_PH DT_N_S_soc_S_gpiote_4100a000
#define DT_N_S_soc_S_gpio_418c0500_P_gpiote_instance_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_P_gpiote_instance_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_418c0500, gpiote_instance, 0)
#define DT_N_S_soc_S_gpio_418c0500_P_gpiote_instance_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpio_418c0500, gpiote_instance, 0)
#define DT_N_S_soc_S_gpio_418c0500_P_gpiote_instance_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpio_418c0500, gpiote_instance, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_418c0500_P_gpiote_instance_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpio_418c0500, gpiote_instance, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_418c0500_P_gpiote_instance_LEN 1
#define DT_N_S_soc_S_gpio_418c0500_P_gpiote_instance_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0500_P_port 0
#define DT_N_S_soc_S_gpio_418c0500_P_port_EXISTS 1

/*
 * Devicetree node: /soc/gpio@418c0800
 *
 * Node identifier: DT_N_S_soc_S_gpio_418c0800
 *
 * Binding (compatible = nordic,nrf-gpio):
 *   $ZEPHYR_BASE\dts\bindings\gpio\nordic,nrf-gpio.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_gpio_418c0800_PATH "/soc/gpio@418c0800"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_gpio_418c0800_FULL_NAME "gpio@418c0800"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_gpio_418c0800_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_gpio_418c0800_CHILD_IDX 34

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_gpio_418c0800_NODELABEL_NUM 1
#define DT_N_S_soc_S_gpio_418c0800_FOREACH_NODELABEL(fn) fn(gpio1)
#define DT_N_S_soc_S_gpio_418c0800_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpio1, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_gpio_418c0800_CHILD_NUM 0
#define DT_N_S_soc_S_gpio_418c0800_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_gpio_418c0800_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_gpio_418c0800_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_gpio_418c0800_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_gpio_418c0800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_gpio_418c0800_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_gpio_418c0800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_gpio_418c0800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_gpio_418c0800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_gpio_418c0800_ORD 26
#define DT_N_S_soc_S_gpio_418c0800_ORD_STR_SORTABLE 00026

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_gpio_418c0800_REQUIRES_ORDS \
	5, /* /soc */ \
	24, /* /soc/gpiote@4100a000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_gpio_418c0800_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_gpio_418c0800_EXISTS 1
#define DT_N_INST_1_nordic_nrf_gpio DT_N_S_soc_S_gpio_418c0800
#define DT_N_NODELABEL_gpio1        DT_N_S_soc_S_gpio_418c0800

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_gpio_418c0800_REG_NUM 1
#define DT_N_S_soc_S_gpio_418c0800_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_REG_IDX_0_VAL_ADDRESS 1099696128 /* 0x418c0800 */
#define DT_N_S_soc_S_gpio_418c0800_REG_IDX_0_VAL_SIZE 768 /* 0x300 */
#define DT_N_S_soc_S_gpio_418c0800_RANGES_NUM 0
#define DT_N_S_soc_S_gpio_418c0800_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_gpio_418c0800_IRQ_NUM 0
#define DT_N_S_soc_S_gpio_418c0800_IRQ_LEVEL 0
#define DT_N_S_soc_S_gpio_418c0800_COMPAT_MATCHES_nordic_nrf_gpio 1
#define DT_N_S_soc_S_gpio_418c0800_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_gpio_418c0800_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_COMPAT_MODEL_IDX_0 "nrf-gpio"
#define DT_N_S_soc_S_gpio_418c0800_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_gpio_418c0800_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_gpio_418c0800_P_gpio_controller 1
#define DT_N_S_soc_S_gpio_418c0800_P_gpio_controller_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_P_ngpios 16
#define DT_N_S_soc_S_gpio_418c0800_P_ngpios_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_P_wakeup_source 0
#define DT_N_S_soc_S_gpio_418c0800_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_gpio_418c0800_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_P_status "okay"
#define DT_N_S_soc_S_gpio_418c0800_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_gpio_418c0800_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_gpio_418c0800_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpio_418c0800_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_gpio_418c0800_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_gpio_418c0800_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_gpio_418c0800_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpio_418c0800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_418c0800, status, 0)
#define DT_N_S_soc_S_gpio_418c0800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpio_418c0800, status, 0)
#define DT_N_S_soc_S_gpio_418c0800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpio_418c0800, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_418c0800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpio_418c0800, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_418c0800_P_status_LEN 1
#define DT_N_S_soc_S_gpio_418c0800_P_status_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_P_compatible {"nordic,nrf-gpio"}
#define DT_N_S_soc_S_gpio_418c0800_P_compatible_IDX_0 "nordic,nrf-gpio"
#define DT_N_S_soc_S_gpio_418c0800_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpio
#define DT_N_S_soc_S_gpio_418c0800_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpio
#define DT_N_S_soc_S_gpio_418c0800_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPIO
#define DT_N_S_soc_S_gpio_418c0800_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_418c0800, compatible, 0)
#define DT_N_S_soc_S_gpio_418c0800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpio_418c0800, compatible, 0)
#define DT_N_S_soc_S_gpio_418c0800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpio_418c0800, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_418c0800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpio_418c0800, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_418c0800_P_compatible_LEN 1
#define DT_N_S_soc_S_gpio_418c0800_P_compatible_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_P_reg {1099696128 /* 0x418c0800 */, 768 /* 0x300 */}
#define DT_N_S_soc_S_gpio_418c0800_P_reg_IDX_0 1099696128
#define DT_N_S_soc_S_gpio_418c0800_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_P_reg_IDX_1 768
#define DT_N_S_soc_S_gpio_418c0800_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_P_reg_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_gpio_418c0800_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_P_gpiote_instance DT_N_S_soc_S_gpiote_4100a000
#define DT_N_S_soc_S_gpio_418c0800_P_gpiote_instance_IDX_0 DT_N_S_soc_S_gpiote_4100a000
#define DT_N_S_soc_S_gpio_418c0800_P_gpiote_instance_IDX_0_PH DT_N_S_soc_S_gpiote_4100a000
#define DT_N_S_soc_S_gpio_418c0800_P_gpiote_instance_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_P_gpiote_instance_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_418c0800, gpiote_instance, 0)
#define DT_N_S_soc_S_gpio_418c0800_P_gpiote_instance_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpio_418c0800, gpiote_instance, 0)
#define DT_N_S_soc_S_gpio_418c0800_P_gpiote_instance_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpio_418c0800, gpiote_instance, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_418c0800_P_gpiote_instance_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpio_418c0800, gpiote_instance, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_418c0800_P_gpiote_instance_LEN 1
#define DT_N_S_soc_S_gpio_418c0800_P_gpiote_instance_EXISTS 1
#define DT_N_S_soc_S_gpio_418c0800_P_port 1
#define DT_N_S_soc_S_gpio_418c0800_P_port_EXISTS 1

/*
 * Devicetree node: /soc/i2c@41013000
 *
 * Node identifier: DT_N_S_soc_S_i2c_41013000
 *
 * Binding (compatible = nordic,nrf-twim):
 *   $ZEPHYR_BASE\dts\bindings\i2c\nordic,nrf-twim.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_i2c_41013000_PATH "/soc/i2c@41013000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_i2c_41013000_FULL_NAME "i2c@41013000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_i2c_41013000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_i2c_41013000_CHILD_IDX 19

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_i2c_41013000_NODELABEL_NUM 1
#define DT_N_S_soc_S_i2c_41013000_FOREACH_NODELABEL(fn) fn(i2c0)
#define DT_N_S_soc_S_i2c_41013000_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2c0, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_i2c_41013000_CHILD_NUM 0
#define DT_N_S_soc_S_i2c_41013000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_i2c_41013000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_i2c_41013000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_i2c_41013000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_i2c_41013000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_i2c_41013000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_i2c_41013000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_i2c_41013000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_i2c_41013000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_i2c_41013000_ORD 27
#define DT_N_S_soc_S_i2c_41013000_ORD_STR_SORTABLE 00027

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_i2c_41013000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_i2c_41013000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_i2c_41013000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_twim DT_N_S_soc_S_i2c_41013000
#define DT_N_NODELABEL_i2c0         DT_N_S_soc_S_i2c_41013000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_i2c_41013000_REG_NUM 1
#define DT_N_S_soc_S_i2c_41013000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_REG_IDX_0_VAL_ADDRESS 1090596864 /* 0x41013000 */
#define DT_N_S_soc_S_i2c_41013000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_i2c_41013000_RANGES_NUM 0
#define DT_N_S_soc_S_i2c_41013000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_i2c_41013000_IRQ_NUM 1
#define DT_N_S_soc_S_i2c_41013000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_IRQ_IDX_0_VAL_irq 19
#define DT_N_S_soc_S_i2c_41013000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_i2c_41013000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_i2c_41013000_IRQ_LEVEL 1
#define DT_N_S_soc_S_i2c_41013000_COMPAT_MATCHES_nordic_nrf_twim 1
#define DT_N_S_soc_S_i2c_41013000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_i2c_41013000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_COMPAT_MODEL_IDX_0 "nrf-twim"
#define DT_N_S_soc_S_i2c_41013000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_i2c_41013000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_i2c_41013000_P_wakeup_source 0
#define DT_N_S_soc_S_i2c_41013000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_zephyr_pm_device_runtime_auto 1
#define DT_N_S_soc_S_i2c_41013000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_status "disabled"
#define DT_N_S_soc_S_i2c_41013000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_i2c_41013000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_i2c_41013000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_i2c_41013000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_i2c_41013000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_i2c_41013000_P_status_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_i2c_41013000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_i2c_41013000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_41013000, status, 0)
#define DT_N_S_soc_S_i2c_41013000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_41013000, status, 0)
#define DT_N_S_soc_S_i2c_41013000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_41013000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_41013000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_41013000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_41013000_P_status_LEN 1
#define DT_N_S_soc_S_i2c_41013000_P_status_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_compatible {"nordic,nrf-twim"}
#define DT_N_S_soc_S_i2c_41013000_P_compatible_IDX_0 "nordic,nrf-twim"
#define DT_N_S_soc_S_i2c_41013000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-twim
#define DT_N_S_soc_S_i2c_41013000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_twim
#define DT_N_S_soc_S_i2c_41013000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TWIM
#define DT_N_S_soc_S_i2c_41013000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_41013000, compatible, 0)
#define DT_N_S_soc_S_i2c_41013000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_41013000, compatible, 0)
#define DT_N_S_soc_S_i2c_41013000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_41013000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_41013000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_41013000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_41013000_P_compatible_LEN 1
#define DT_N_S_soc_S_i2c_41013000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_reg {1090596864 /* 0x41013000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_i2c_41013000_P_reg_IDX_0 1090596864
#define DT_N_S_soc_S_i2c_41013000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_i2c_41013000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_reg_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_interrupts {19 /* 0x13 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_i2c_41013000_P_interrupts_IDX_0 19
#define DT_N_S_soc_S_i2c_41013000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_i2c_41013000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_i2c_41013000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_sq_size 4
#define DT_N_S_soc_S_i2c_41013000_P_sq_size_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_cq_size 4
#define DT_N_S_soc_S_i2c_41013000_P_cq_size_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_easydma_maxcnt_bits 16
#define DT_N_S_soc_S_i2c_41013000_P_easydma_maxcnt_bits_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_zephyr_concat_buf_size 16
#define DT_N_S_soc_S_i2c_41013000_P_zephyr_concat_buf_size_EXISTS 1
#define DT_N_S_soc_S_i2c_41013000_P_zephyr_flash_buf_max_size 16
#define DT_N_S_soc_S_i2c_41013000_P_zephyr_flash_buf_max_size_EXISTS 1

/*
 * Devicetree node: /soc/memory@20000000
 *
 * Node identifier: DT_N_S_soc_S_memory_20000000
 *
 * Binding (compatible = mmio-sram):
 *   $ZEPHYR_BASE\dts\bindings\sram\mmio-sram.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_memory_20000000_PATH "/soc/memory@20000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_memory_20000000_FULL_NAME "memory@20000000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_memory_20000000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_memory_20000000_CHILD_IDX 4

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_memory_20000000_NODELABEL_NUM 1
#define DT_N_S_soc_S_memory_20000000_FOREACH_NODELABEL(fn) fn(sram0)
#define DT_N_S_soc_S_memory_20000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(sram0, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_memory_20000000_CHILD_NUM 0
#define DT_N_S_soc_S_memory_20000000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_memory_20000000_ORD 28
#define DT_N_S_soc_S_memory_20000000_ORD_STR_SORTABLE 00028

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_memory_20000000_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_memory_20000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_memory_20000000_EXISTS 1
#define DT_N_INST_0_mmio_sram DT_N_S_soc_S_memory_20000000
#define DT_N_NODELABEL_sram0  DT_N_S_soc_S_memory_20000000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_memory_20000000_REG_NUM 1
#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_VAL_ADDRESS 536870912 /* 0x20000000 */
#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_VAL_SIZE 524288 /* 0x80000 */
#define DT_N_S_soc_S_memory_20000000_RANGES_NUM 0
#define DT_N_S_soc_S_memory_20000000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_memory_20000000_IRQ_NUM 0
#define DT_N_S_soc_S_memory_20000000_IRQ_LEVEL 0
#define DT_N_S_soc_S_memory_20000000_COMPAT_MATCHES_mmio_sram 1
#define DT_N_S_soc_S_memory_20000000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_memory_20000000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_memory_20000000_P_wakeup_source 0
#define DT_N_S_soc_S_memory_20000000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_memory_20000000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_compatible {"mmio-sram"}
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0 "mmio-sram"
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_STRING_UNQUOTED mmio-sram
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_STRING_TOKEN mmio_sram
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_STRING_UPPER_TOKEN MMIO_SRAM
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_20000000, compatible, 0)
#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_20000000, compatible, 0)
#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_20000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_20000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_memory_20000000_P_compatible_LEN 1
#define DT_N_S_soc_S_memory_20000000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_reg {536870912 /* 0x20000000 */, 524288 /* 0x80000 */}
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_0 536870912
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_1 524288
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_memory_20000000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/memory@21000000
 *
 * Node identifier: DT_N_S_soc_S_memory_21000000
 *
 * Binding (compatible = zephyr,memory-region):
 *   $ZEPHYR_BASE\dts\bindings\base\zephyr,memory-region.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_memory_21000000_PATH "/soc/memory@21000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_memory_21000000_FULL_NAME "memory@21000000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_memory_21000000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_memory_21000000_CHILD_IDX 5

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_memory_21000000_NODELABEL_NUM 1
#define DT_N_S_soc_S_memory_21000000_FOREACH_NODELABEL(fn) fn(sram1)
#define DT_N_S_soc_S_memory_21000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(sram1, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_memory_21000000_CHILD_NUM 0
#define DT_N_S_soc_S_memory_21000000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_memory_21000000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_memory_21000000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_memory_21000000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_memory_21000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_memory_21000000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_memory_21000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_memory_21000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_memory_21000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_memory_21000000_ORD 29
#define DT_N_S_soc_S_memory_21000000_ORD_STR_SORTABLE 00029

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_memory_21000000_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_memory_21000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_memory_21000000_EXISTS 1
#define DT_N_INST_0_zephyr_memory_region DT_N_S_soc_S_memory_21000000
#define DT_N_INST_1_mmio_sram            DT_N_S_soc_S_memory_21000000
#define DT_N_NODELABEL_sram1             DT_N_S_soc_S_memory_21000000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_memory_21000000_REG_NUM 1
#define DT_N_S_soc_S_memory_21000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_21000000_REG_IDX_0_VAL_ADDRESS 553648128 /* 0x21000000 */
#define DT_N_S_soc_S_memory_21000000_REG_IDX_0_VAL_SIZE 65536 /* 0x10000 */
#define DT_N_S_soc_S_memory_21000000_RANGES_NUM 0
#define DT_N_S_soc_S_memory_21000000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_memory_21000000_IRQ_NUM 0
#define DT_N_S_soc_S_memory_21000000_IRQ_LEVEL 0
#define DT_N_S_soc_S_memory_21000000_COMPAT_MATCHES_zephyr_memory_region 1
#define DT_N_S_soc_S_memory_21000000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_21000000_COMPAT_VENDOR_IDX_0 "Zephyr-specific binding"
#define DT_N_S_soc_S_memory_21000000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_21000000_COMPAT_MODEL_IDX_0 "memory-region"
#define DT_N_S_soc_S_memory_21000000_COMPAT_MATCHES_mmio_sram 1
#define DT_N_S_soc_S_memory_21000000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_memory_21000000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_memory_21000000_P_wakeup_source 0
#define DT_N_S_soc_S_memory_21000000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_memory_21000000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_memory_21000000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_memory_21000000_P_compatible {"zephyr,memory-region", "mmio-sram"}
#define DT_N_S_soc_S_memory_21000000_P_compatible_IDX_0 "zephyr,memory-region"
#define DT_N_S_soc_S_memory_21000000_P_compatible_IDX_0_STRING_UNQUOTED zephyr,memory-region
#define DT_N_S_soc_S_memory_21000000_P_compatible_IDX_0_STRING_TOKEN zephyr_memory_region
#define DT_N_S_soc_S_memory_21000000_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_MEMORY_REGION
#define DT_N_S_soc_S_memory_21000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_21000000_P_compatible_IDX_1 "mmio-sram"
#define DT_N_S_soc_S_memory_21000000_P_compatible_IDX_1_STRING_UNQUOTED mmio-sram
#define DT_N_S_soc_S_memory_21000000_P_compatible_IDX_1_STRING_TOKEN mmio_sram
#define DT_N_S_soc_S_memory_21000000_P_compatible_IDX_1_STRING_UPPER_TOKEN MMIO_SRAM
#define DT_N_S_soc_S_memory_21000000_P_compatible_IDX_1_EXISTS 1
#define DT_N_S_soc_S_memory_21000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_21000000, compatible, 0) \
	fn(DT_N_S_soc_S_memory_21000000, compatible, 1)
#define DT_N_S_soc_S_memory_21000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_21000000, compatible, 0) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_memory_21000000, compatible, 1)
#define DT_N_S_soc_S_memory_21000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_21000000, compatible, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_memory_21000000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_memory_21000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_21000000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_memory_21000000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_memory_21000000_P_compatible_LEN 2
#define DT_N_S_soc_S_memory_21000000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_memory_21000000_P_reg {553648128 /* 0x21000000 */, 65536 /* 0x10000 */}
#define DT_N_S_soc_S_memory_21000000_P_reg_IDX_0 553648128
#define DT_N_S_soc_S_memory_21000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_21000000_P_reg_IDX_1 65536
#define DT_N_S_soc_S_memory_21000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_memory_21000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_memory_21000000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_memory_21000000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_memory_21000000_P_zephyr_memory_region "SRAM1"
#define DT_N_S_soc_S_memory_21000000_P_zephyr_memory_region_STRING_UNQUOTED SRAM1
#define DT_N_S_soc_S_memory_21000000_P_zephyr_memory_region_STRING_TOKEN SRAM1
#define DT_N_S_soc_S_memory_21000000_P_zephyr_memory_region_STRING_UPPER_TOKEN SRAM1
#define DT_N_S_soc_S_memory_21000000_P_zephyr_memory_region_IDX_0 "SRAM1"
#define DT_N_S_soc_S_memory_21000000_P_zephyr_memory_region_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_21000000_P_zephyr_memory_region_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_21000000, zephyr_memory_region, 0)
#define DT_N_S_soc_S_memory_21000000_P_zephyr_memory_region_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_21000000, zephyr_memory_region, 0)
#define DT_N_S_soc_S_memory_21000000_P_zephyr_memory_region_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_21000000, zephyr_memory_region, 0, __VA_ARGS__)
#define DT_N_S_soc_S_memory_21000000_P_zephyr_memory_region_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_21000000, zephyr_memory_region, 0, __VA_ARGS__)
#define DT_N_S_soc_S_memory_21000000_P_zephyr_memory_region_LEN 1
#define DT_N_S_soc_S_memory_21000000_P_zephyr_memory_region_EXISTS 1

/*
 * Devicetree node: /soc/random@41009000
 *
 * Node identifier: DT_N_S_soc_S_random_41009000
 *
 * Binding (compatible = nordic,nrf-rng):
 *   $ZEPHYR_BASE\dts\bindings\rng\nordic,nrf-rng.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_random_41009000_PATH "/soc/random@41009000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_random_41009000_FULL_NAME "random@41009000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_random_41009000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_random_41009000_CHILD_IDX 9

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_random_41009000_NODELABEL_NUM 1
#define DT_N_S_soc_S_random_41009000_FOREACH_NODELABEL(fn) fn(rng)
#define DT_N_S_soc_S_random_41009000_FOREACH_NODELABEL_VARGS(fn, ...) fn(rng, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_random_41009000_CHILD_NUM 0
#define DT_N_S_soc_S_random_41009000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_random_41009000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_random_41009000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_random_41009000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_random_41009000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_random_41009000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_random_41009000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_random_41009000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_random_41009000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_random_41009000_ORD 30
#define DT_N_S_soc_S_random_41009000_ORD_STR_SORTABLE 00030

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_random_41009000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_random_41009000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_random_41009000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_rng DT_N_S_soc_S_random_41009000
#define DT_N_NODELABEL_rng         DT_N_S_soc_S_random_41009000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_random_41009000_REG_NUM 1
#define DT_N_S_soc_S_random_41009000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_41009000_REG_IDX_0_VAL_ADDRESS 1090555904 /* 0x41009000 */
#define DT_N_S_soc_S_random_41009000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_random_41009000_RANGES_NUM 0
#define DT_N_S_soc_S_random_41009000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_random_41009000_IRQ_NUM 1
#define DT_N_S_soc_S_random_41009000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_41009000_IRQ_IDX_0_VAL_irq 9
#define DT_N_S_soc_S_random_41009000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_random_41009000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_41009000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_random_41009000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_random_41009000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_random_41009000_IRQ_LEVEL 1
#define DT_N_S_soc_S_random_41009000_COMPAT_MATCHES_nordic_nrf_rng 1
#define DT_N_S_soc_S_random_41009000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_41009000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_random_41009000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_41009000_COMPAT_MODEL_IDX_0 "nrf-rng"
#define DT_N_S_soc_S_random_41009000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_random_41009000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_random_41009000_P_wakeup_source 0
#define DT_N_S_soc_S_random_41009000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_random_41009000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_random_41009000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_random_41009000_P_status "okay"
#define DT_N_S_soc_S_random_41009000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_random_41009000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_random_41009000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_random_41009000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_random_41009000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_41009000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_random_41009000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_random_41009000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_random_41009000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_random_41009000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_random_41009000, status, 0)
#define DT_N_S_soc_S_random_41009000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_random_41009000, status, 0)
#define DT_N_S_soc_S_random_41009000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_random_41009000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_random_41009000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_random_41009000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_random_41009000_P_status_LEN 1
#define DT_N_S_soc_S_random_41009000_P_status_EXISTS 1
#define DT_N_S_soc_S_random_41009000_P_compatible {"nordic,nrf-rng"}
#define DT_N_S_soc_S_random_41009000_P_compatible_IDX_0 "nordic,nrf-rng"
#define DT_N_S_soc_S_random_41009000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-rng
#define DT_N_S_soc_S_random_41009000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_rng
#define DT_N_S_soc_S_random_41009000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_RNG
#define DT_N_S_soc_S_random_41009000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_41009000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_random_41009000, compatible, 0)
#define DT_N_S_soc_S_random_41009000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_random_41009000, compatible, 0)
#define DT_N_S_soc_S_random_41009000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_random_41009000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_random_41009000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_random_41009000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_random_41009000_P_compatible_LEN 1
#define DT_N_S_soc_S_random_41009000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_random_41009000_P_reg {1090555904 /* 0x41009000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_random_41009000_P_reg_IDX_0 1090555904
#define DT_N_S_soc_S_random_41009000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_41009000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_random_41009000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_random_41009000_P_reg_EXISTS 1
#define DT_N_S_soc_S_random_41009000_P_interrupts {9 /* 0x9 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_random_41009000_P_interrupts_IDX_0 9
#define DT_N_S_soc_S_random_41009000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_41009000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_random_41009000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_random_41009000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_random_41009000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_random_41009000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/rtc@41011000
 *
 * Node identifier: DT_N_S_soc_S_rtc_41011000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   $ZEPHYR_BASE\dts\bindings\rtc\nordic,nrf-rtc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_rtc_41011000_PATH "/soc/rtc@41011000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_rtc_41011000_FULL_NAME "rtc@41011000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_rtc_41011000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_rtc_41011000_CHILD_IDX 17

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_rtc_41011000_NODELABEL_NUM 1
#define DT_N_S_soc_S_rtc_41011000_FOREACH_NODELABEL(fn) fn(rtc0)
#define DT_N_S_soc_S_rtc_41011000_FOREACH_NODELABEL_VARGS(fn, ...) fn(rtc0, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_rtc_41011000_CHILD_NUM 0
#define DT_N_S_soc_S_rtc_41011000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_rtc_41011000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_rtc_41011000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_rtc_41011000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_rtc_41011000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_rtc_41011000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_rtc_41011000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_rtc_41011000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_rtc_41011000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_rtc_41011000_ORD 31
#define DT_N_S_soc_S_rtc_41011000_ORD_STR_SORTABLE 00031

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_rtc_41011000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_rtc_41011000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_rtc_41011000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_rtc DT_N_S_soc_S_rtc_41011000
#define DT_N_NODELABEL_rtc0        DT_N_S_soc_S_rtc_41011000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_rtc_41011000_REG_NUM 1
#define DT_N_S_soc_S_rtc_41011000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_REG_IDX_0_VAL_ADDRESS 1090588672 /* 0x41011000 */
#define DT_N_S_soc_S_rtc_41011000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_rtc_41011000_RANGES_NUM 0
#define DT_N_S_soc_S_rtc_41011000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_rtc_41011000_IRQ_NUM 1
#define DT_N_S_soc_S_rtc_41011000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_IRQ_IDX_0_VAL_irq 17
#define DT_N_S_soc_S_rtc_41011000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_rtc_41011000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_rtc_41011000_IRQ_LEVEL 1
#define DT_N_S_soc_S_rtc_41011000_COMPAT_MATCHES_nordic_nrf_rtc 1
#define DT_N_S_soc_S_rtc_41011000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_rtc_41011000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_COMPAT_MODEL_IDX_0 "nrf-rtc"
#define DT_N_S_soc_S_rtc_41011000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_rtc_41011000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_rtc_41011000_P_wakeup_source 0
#define DT_N_S_soc_S_rtc_41011000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_rtc_41011000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_status "disabled"
#define DT_N_S_soc_S_rtc_41011000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_rtc_41011000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_rtc_41011000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_rtc_41011000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_rtc_41011000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_rtc_41011000_P_status_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_rtc_41011000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_rtc_41011000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_41011000, status, 0)
#define DT_N_S_soc_S_rtc_41011000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_41011000, status, 0)
#define DT_N_S_soc_S_rtc_41011000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_41011000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_41011000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rtc_41011000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_41011000_P_status_LEN 1
#define DT_N_S_soc_S_rtc_41011000_P_status_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_compatible {"nordic,nrf-rtc"}
#define DT_N_S_soc_S_rtc_41011000_P_compatible_IDX_0 "nordic,nrf-rtc"
#define DT_N_S_soc_S_rtc_41011000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-rtc
#define DT_N_S_soc_S_rtc_41011000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_rtc
#define DT_N_S_soc_S_rtc_41011000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_RTC
#define DT_N_S_soc_S_rtc_41011000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_41011000, compatible, 0)
#define DT_N_S_soc_S_rtc_41011000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_41011000, compatible, 0)
#define DT_N_S_soc_S_rtc_41011000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_41011000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_41011000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rtc_41011000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_41011000_P_compatible_LEN 1
#define DT_N_S_soc_S_rtc_41011000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_reg {1090588672 /* 0x41011000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_rtc_41011000_P_reg_IDX_0 1090588672
#define DT_N_S_soc_S_rtc_41011000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_rtc_41011000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_reg_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_interrupts {17 /* 0x11 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_rtc_41011000_P_interrupts_IDX_0 17
#define DT_N_S_soc_S_rtc_41011000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_rtc_41011000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_rtc_41011000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_cc_num 4
#define DT_N_S_soc_S_rtc_41011000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_ppi_wrap 0
#define DT_N_S_soc_S_rtc_41011000_P_ppi_wrap_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_fixed_top 0
#define DT_N_S_soc_S_rtc_41011000_P_fixed_top_EXISTS 1
#define DT_N_S_soc_S_rtc_41011000_P_zli 0
#define DT_N_S_soc_S_rtc_41011000_P_zli_EXISTS 1

/*
 * Devicetree node: /soc/rtc@41016000
 *
 * Node identifier: DT_N_S_soc_S_rtc_41016000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   $ZEPHYR_BASE\dts\bindings\rtc\nordic,nrf-rtc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_rtc_41016000_PATH "/soc/rtc@41016000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_rtc_41016000_FULL_NAME "rtc@41016000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_rtc_41016000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_rtc_41016000_CHILD_IDX 23

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_rtc_41016000_NODELABEL_NUM 1
#define DT_N_S_soc_S_rtc_41016000_FOREACH_NODELABEL(fn) fn(rtc1)
#define DT_N_S_soc_S_rtc_41016000_FOREACH_NODELABEL_VARGS(fn, ...) fn(rtc1, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_rtc_41016000_CHILD_NUM 0
#define DT_N_S_soc_S_rtc_41016000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_rtc_41016000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_rtc_41016000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_rtc_41016000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_rtc_41016000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_rtc_41016000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_rtc_41016000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_rtc_41016000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_rtc_41016000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_rtc_41016000_ORD 32
#define DT_N_S_soc_S_rtc_41016000_ORD_STR_SORTABLE 00032

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_rtc_41016000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_rtc_41016000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_rtc_41016000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_rtc DT_N_S_soc_S_rtc_41016000
#define DT_N_NODELABEL_rtc1        DT_N_S_soc_S_rtc_41016000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_rtc_41016000_REG_NUM 1
#define DT_N_S_soc_S_rtc_41016000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_REG_IDX_0_VAL_ADDRESS 1090609152 /* 0x41016000 */
#define DT_N_S_soc_S_rtc_41016000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_rtc_41016000_RANGES_NUM 0
#define DT_N_S_soc_S_rtc_41016000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_rtc_41016000_IRQ_NUM 1
#define DT_N_S_soc_S_rtc_41016000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_IRQ_IDX_0_VAL_irq 22
#define DT_N_S_soc_S_rtc_41016000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_rtc_41016000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_rtc_41016000_IRQ_LEVEL 1
#define DT_N_S_soc_S_rtc_41016000_COMPAT_MATCHES_nordic_nrf_rtc 1
#define DT_N_S_soc_S_rtc_41016000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_rtc_41016000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_COMPAT_MODEL_IDX_0 "nrf-rtc"
#define DT_N_S_soc_S_rtc_41016000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_rtc_41016000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_rtc_41016000_P_wakeup_source 0
#define DT_N_S_soc_S_rtc_41016000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_rtc_41016000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_status "disabled"
#define DT_N_S_soc_S_rtc_41016000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_rtc_41016000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_rtc_41016000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_rtc_41016000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_rtc_41016000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_rtc_41016000_P_status_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_rtc_41016000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_rtc_41016000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_41016000, status, 0)
#define DT_N_S_soc_S_rtc_41016000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_41016000, status, 0)
#define DT_N_S_soc_S_rtc_41016000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_41016000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_41016000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rtc_41016000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_41016000_P_status_LEN 1
#define DT_N_S_soc_S_rtc_41016000_P_status_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_compatible {"nordic,nrf-rtc"}
#define DT_N_S_soc_S_rtc_41016000_P_compatible_IDX_0 "nordic,nrf-rtc"
#define DT_N_S_soc_S_rtc_41016000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-rtc
#define DT_N_S_soc_S_rtc_41016000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_rtc
#define DT_N_S_soc_S_rtc_41016000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_RTC
#define DT_N_S_soc_S_rtc_41016000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_41016000, compatible, 0)
#define DT_N_S_soc_S_rtc_41016000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_41016000, compatible, 0)
#define DT_N_S_soc_S_rtc_41016000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_41016000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_41016000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rtc_41016000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_41016000_P_compatible_LEN 1
#define DT_N_S_soc_S_rtc_41016000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_reg {1090609152 /* 0x41016000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_rtc_41016000_P_reg_IDX_0 1090609152
#define DT_N_S_soc_S_rtc_41016000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_rtc_41016000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_reg_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_interrupts {22 /* 0x16 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_rtc_41016000_P_interrupts_IDX_0 22
#define DT_N_S_soc_S_rtc_41016000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_rtc_41016000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_rtc_41016000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_cc_num 4
#define DT_N_S_soc_S_rtc_41016000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_ppi_wrap 0
#define DT_N_S_soc_S_rtc_41016000_P_ppi_wrap_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_fixed_top 0
#define DT_N_S_soc_S_rtc_41016000_P_fixed_top_EXISTS 1
#define DT_N_S_soc_S_rtc_41016000_P_zli 0
#define DT_N_S_soc_S_rtc_41016000_P_zli_EXISTS 1

/*
 * Devicetree node: /soc/spi@41013000
 *
 * Node identifier: DT_N_S_soc_S_spi_41013000
 *
 * Binding (compatible = nordic,nrf-spim):
 *   $ZEPHYR_BASE\dts\bindings\spi\nordic,nrf-spim.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_spi_41013000_PATH "/soc/spi@41013000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_spi_41013000_FULL_NAME "spi@41013000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_spi_41013000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_spi_41013000_CHILD_IDX 20

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_spi_41013000_NODELABEL_NUM 1
#define DT_N_S_soc_S_spi_41013000_FOREACH_NODELABEL(fn) fn(spi0)
#define DT_N_S_soc_S_spi_41013000_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi0, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_spi_41013000_CHILD_NUM 0
#define DT_N_S_soc_S_spi_41013000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_spi_41013000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_spi_41013000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_spi_41013000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_spi_41013000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_spi_41013000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_spi_41013000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_spi_41013000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_spi_41013000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_spi_41013000_ORD 33
#define DT_N_S_soc_S_spi_41013000_ORD_STR_SORTABLE 00033

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_spi_41013000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_spi_41013000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_spi_41013000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_spim DT_N_S_soc_S_spi_41013000
#define DT_N_NODELABEL_spi0         DT_N_S_soc_S_spi_41013000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_spi_41013000_REG_NUM 1
#define DT_N_S_soc_S_spi_41013000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_REG_IDX_0_VAL_ADDRESS 1090596864 /* 0x41013000 */
#define DT_N_S_soc_S_spi_41013000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_spi_41013000_RANGES_NUM 0
#define DT_N_S_soc_S_spi_41013000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_spi_41013000_IRQ_NUM 1
#define DT_N_S_soc_S_spi_41013000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_IRQ_IDX_0_VAL_irq 19
#define DT_N_S_soc_S_spi_41013000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_spi_41013000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_spi_41013000_IRQ_LEVEL 1
#define DT_N_S_soc_S_spi_41013000_COMPAT_MATCHES_nordic_nrf_spim 1
#define DT_N_S_soc_S_spi_41013000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_spi_41013000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_COMPAT_MODEL_IDX_0 "nrf-spim"
#define DT_N_S_soc_S_spi_41013000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_spi_41013000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_spi_41013000_P_wakeup_source 0
#define DT_N_S_soc_S_spi_41013000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_spi_41013000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_status "disabled"
#define DT_N_S_soc_S_spi_41013000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_spi_41013000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_spi_41013000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_spi_41013000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_spi_41013000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_spi_41013000_P_status_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_spi_41013000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_spi_41013000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_41013000, status, 0)
#define DT_N_S_soc_S_spi_41013000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_41013000, status, 0)
#define DT_N_S_soc_S_spi_41013000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_41013000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_41013000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_41013000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_41013000_P_status_LEN 1
#define DT_N_S_soc_S_spi_41013000_P_status_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_compatible {"nordic,nrf-spim"}
#define DT_N_S_soc_S_spi_41013000_P_compatible_IDX_0 "nordic,nrf-spim"
#define DT_N_S_soc_S_spi_41013000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-spim
#define DT_N_S_soc_S_spi_41013000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_spim
#define DT_N_S_soc_S_spi_41013000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SPIM
#define DT_N_S_soc_S_spi_41013000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_41013000, compatible, 0)
#define DT_N_S_soc_S_spi_41013000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_41013000, compatible, 0)
#define DT_N_S_soc_S_spi_41013000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_41013000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_41013000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_41013000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_41013000_P_compatible_LEN 1
#define DT_N_S_soc_S_spi_41013000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_reg {1090596864 /* 0x41013000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_spi_41013000_P_reg_IDX_0 1090596864
#define DT_N_S_soc_S_spi_41013000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_spi_41013000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_reg_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_interrupts {19 /* 0x13 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_spi_41013000_P_interrupts_IDX_0 19
#define DT_N_S_soc_S_spi_41013000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_spi_41013000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_spi_41013000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_overrun_character 255
#define DT_N_S_soc_S_spi_41013000_P_overrun_character_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_max_frequency 8000000
#define DT_N_S_soc_S_spi_41013000_P_max_frequency_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_easydma_maxcnt_bits 16
#define DT_N_S_soc_S_spi_41013000_P_easydma_maxcnt_bits_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_anomaly_58_workaround 0
#define DT_N_S_soc_S_spi_41013000_P_anomaly_58_workaround_EXISTS 1
#define DT_N_S_soc_S_spi_41013000_P_rx_delay_supported 0
#define DT_N_S_soc_S_spi_41013000_P_rx_delay_supported_EXISTS 1

/*
 * Devicetree node: /soc/swi@4101a000
 *
 * Node identifier: DT_N_S_soc_S_swi_4101a000
 *
 * Binding (compatible = nordic,nrf-swi):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-swi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_swi_4101a000_PATH "/soc/swi@4101a000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_swi_4101a000_FULL_NAME "swi@4101a000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_swi_4101a000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_swi_4101a000_CHILD_IDX 26

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_swi_4101a000_NODELABEL_NUM 1
#define DT_N_S_soc_S_swi_4101a000_FOREACH_NODELABEL(fn) fn(swi0)
#define DT_N_S_soc_S_swi_4101a000_FOREACH_NODELABEL_VARGS(fn, ...) fn(swi0, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_swi_4101a000_CHILD_NUM 0
#define DT_N_S_soc_S_swi_4101a000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_swi_4101a000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_swi_4101a000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_swi_4101a000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_swi_4101a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_swi_4101a000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_swi_4101a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_swi_4101a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_swi_4101a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_swi_4101a000_ORD 34
#define DT_N_S_soc_S_swi_4101a000_ORD_STR_SORTABLE 00034

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_swi_4101a000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_swi_4101a000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_swi_4101a000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_swi DT_N_S_soc_S_swi_4101a000
#define DT_N_NODELABEL_swi0        DT_N_S_soc_S_swi_4101a000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_swi_4101a000_REG_NUM 1
#define DT_N_S_soc_S_swi_4101a000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_REG_IDX_0_VAL_ADDRESS 1090625536 /* 0x4101a000 */
#define DT_N_S_soc_S_swi_4101a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_swi_4101a000_RANGES_NUM 0
#define DT_N_S_soc_S_swi_4101a000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_swi_4101a000_IRQ_NUM 1
#define DT_N_S_soc_S_swi_4101a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_IRQ_IDX_0_VAL_irq 26
#define DT_N_S_soc_S_swi_4101a000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_swi_4101a000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_swi_4101a000_IRQ_LEVEL 1
#define DT_N_S_soc_S_swi_4101a000_COMPAT_MATCHES_nordic_nrf_swi 1
#define DT_N_S_soc_S_swi_4101a000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_swi_4101a000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_COMPAT_MODEL_IDX_0 "nrf-swi"
#define DT_N_S_soc_S_swi_4101a000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_swi_4101a000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_swi_4101a000_P_wakeup_source 0
#define DT_N_S_soc_S_swi_4101a000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_swi_4101a000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_P_status "okay"
#define DT_N_S_soc_S_swi_4101a000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_swi_4101a000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_swi_4101a000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_swi_4101a000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_swi_4101a000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_swi_4101a000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_swi_4101a000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_swi_4101a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_swi_4101a000, status, 0)
#define DT_N_S_soc_S_swi_4101a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_swi_4101a000, status, 0)
#define DT_N_S_soc_S_swi_4101a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_swi_4101a000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_swi_4101a000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101a000_P_status_LEN 1
#define DT_N_S_soc_S_swi_4101a000_P_status_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_P_compatible {"nordic,nrf-swi"}
#define DT_N_S_soc_S_swi_4101a000_P_compatible_IDX_0 "nordic,nrf-swi"
#define DT_N_S_soc_S_swi_4101a000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-swi
#define DT_N_S_soc_S_swi_4101a000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_swi
#define DT_N_S_soc_S_swi_4101a000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SWI
#define DT_N_S_soc_S_swi_4101a000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_swi_4101a000, compatible, 0)
#define DT_N_S_soc_S_swi_4101a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_swi_4101a000, compatible, 0)
#define DT_N_S_soc_S_swi_4101a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_swi_4101a000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_swi_4101a000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101a000_P_compatible_LEN 1
#define DT_N_S_soc_S_swi_4101a000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_P_reg {1090625536 /* 0x4101a000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_swi_4101a000_P_reg_IDX_0 1090625536
#define DT_N_S_soc_S_swi_4101a000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_swi_4101a000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_P_reg_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_P_interrupts {26 /* 0x1a */, 1 /* 0x1 */}
#define DT_N_S_soc_S_swi_4101a000_P_interrupts_IDX_0 26
#define DT_N_S_soc_S_swi_4101a000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_swi_4101a000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_swi_4101a000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_swi_4101a000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/swi@4101b000
 *
 * Node identifier: DT_N_S_soc_S_swi_4101b000
 *
 * Binding (compatible = nordic,nrf-swi):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-swi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_swi_4101b000_PATH "/soc/swi@4101b000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_swi_4101b000_FULL_NAME "swi@4101b000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_swi_4101b000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_swi_4101b000_CHILD_IDX 27

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_swi_4101b000_NODELABEL_NUM 1
#define DT_N_S_soc_S_swi_4101b000_FOREACH_NODELABEL(fn) fn(swi1)
#define DT_N_S_soc_S_swi_4101b000_FOREACH_NODELABEL_VARGS(fn, ...) fn(swi1, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_swi_4101b000_CHILD_NUM 0
#define DT_N_S_soc_S_swi_4101b000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_swi_4101b000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_swi_4101b000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_swi_4101b000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_swi_4101b000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_swi_4101b000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_swi_4101b000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_swi_4101b000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_swi_4101b000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_swi_4101b000_ORD 35
#define DT_N_S_soc_S_swi_4101b000_ORD_STR_SORTABLE 00035

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_swi_4101b000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_swi_4101b000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_swi_4101b000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_swi DT_N_S_soc_S_swi_4101b000
#define DT_N_NODELABEL_swi1        DT_N_S_soc_S_swi_4101b000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_swi_4101b000_REG_NUM 1
#define DT_N_S_soc_S_swi_4101b000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_REG_IDX_0_VAL_ADDRESS 1090629632 /* 0x4101b000 */
#define DT_N_S_soc_S_swi_4101b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_swi_4101b000_RANGES_NUM 0
#define DT_N_S_soc_S_swi_4101b000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_swi_4101b000_IRQ_NUM 1
#define DT_N_S_soc_S_swi_4101b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_IRQ_IDX_0_VAL_irq 27
#define DT_N_S_soc_S_swi_4101b000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_swi_4101b000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_swi_4101b000_IRQ_LEVEL 1
#define DT_N_S_soc_S_swi_4101b000_COMPAT_MATCHES_nordic_nrf_swi 1
#define DT_N_S_soc_S_swi_4101b000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_swi_4101b000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_COMPAT_MODEL_IDX_0 "nrf-swi"
#define DT_N_S_soc_S_swi_4101b000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_swi_4101b000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_swi_4101b000_P_wakeup_source 0
#define DT_N_S_soc_S_swi_4101b000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_swi_4101b000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_P_status "okay"
#define DT_N_S_soc_S_swi_4101b000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_swi_4101b000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_swi_4101b000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_swi_4101b000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_swi_4101b000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_swi_4101b000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_swi_4101b000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_swi_4101b000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_swi_4101b000, status, 0)
#define DT_N_S_soc_S_swi_4101b000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_swi_4101b000, status, 0)
#define DT_N_S_soc_S_swi_4101b000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_swi_4101b000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101b000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_swi_4101b000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101b000_P_status_LEN 1
#define DT_N_S_soc_S_swi_4101b000_P_status_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_P_compatible {"nordic,nrf-swi"}
#define DT_N_S_soc_S_swi_4101b000_P_compatible_IDX_0 "nordic,nrf-swi"
#define DT_N_S_soc_S_swi_4101b000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-swi
#define DT_N_S_soc_S_swi_4101b000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_swi
#define DT_N_S_soc_S_swi_4101b000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SWI
#define DT_N_S_soc_S_swi_4101b000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_swi_4101b000, compatible, 0)
#define DT_N_S_soc_S_swi_4101b000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_swi_4101b000, compatible, 0)
#define DT_N_S_soc_S_swi_4101b000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_swi_4101b000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101b000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_swi_4101b000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101b000_P_compatible_LEN 1
#define DT_N_S_soc_S_swi_4101b000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_P_reg {1090629632 /* 0x4101b000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_swi_4101b000_P_reg_IDX_0 1090629632
#define DT_N_S_soc_S_swi_4101b000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_swi_4101b000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_P_reg_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_P_interrupts {27 /* 0x1b */, 1 /* 0x1 */}
#define DT_N_S_soc_S_swi_4101b000_P_interrupts_IDX_0 27
#define DT_N_S_soc_S_swi_4101b000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_swi_4101b000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_swi_4101b000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_swi_4101b000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/swi@4101c000
 *
 * Node identifier: DT_N_S_soc_S_swi_4101c000
 *
 * Binding (compatible = nordic,nrf-swi):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-swi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_swi_4101c000_PATH "/soc/swi@4101c000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_swi_4101c000_FULL_NAME "swi@4101c000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_swi_4101c000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_swi_4101c000_CHILD_IDX 28

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_swi_4101c000_NODELABEL_NUM 1
#define DT_N_S_soc_S_swi_4101c000_FOREACH_NODELABEL(fn) fn(swi2)
#define DT_N_S_soc_S_swi_4101c000_FOREACH_NODELABEL_VARGS(fn, ...) fn(swi2, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_swi_4101c000_CHILD_NUM 0
#define DT_N_S_soc_S_swi_4101c000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_swi_4101c000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_swi_4101c000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_swi_4101c000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_swi_4101c000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_swi_4101c000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_swi_4101c000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_swi_4101c000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_swi_4101c000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_swi_4101c000_ORD 36
#define DT_N_S_soc_S_swi_4101c000_ORD_STR_SORTABLE 00036

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_swi_4101c000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_swi_4101c000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_swi_4101c000_EXISTS 1
#define DT_N_INST_2_nordic_nrf_swi DT_N_S_soc_S_swi_4101c000
#define DT_N_NODELABEL_swi2        DT_N_S_soc_S_swi_4101c000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_swi_4101c000_REG_NUM 1
#define DT_N_S_soc_S_swi_4101c000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_REG_IDX_0_VAL_ADDRESS 1090633728 /* 0x4101c000 */
#define DT_N_S_soc_S_swi_4101c000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_swi_4101c000_RANGES_NUM 0
#define DT_N_S_soc_S_swi_4101c000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_swi_4101c000_IRQ_NUM 1
#define DT_N_S_soc_S_swi_4101c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_IRQ_IDX_0_VAL_irq 28
#define DT_N_S_soc_S_swi_4101c000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_swi_4101c000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_swi_4101c000_IRQ_LEVEL 1
#define DT_N_S_soc_S_swi_4101c000_COMPAT_MATCHES_nordic_nrf_swi 1
#define DT_N_S_soc_S_swi_4101c000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_swi_4101c000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_COMPAT_MODEL_IDX_0 "nrf-swi"
#define DT_N_S_soc_S_swi_4101c000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_swi_4101c000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_swi_4101c000_P_wakeup_source 0
#define DT_N_S_soc_S_swi_4101c000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_swi_4101c000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_P_status "okay"
#define DT_N_S_soc_S_swi_4101c000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_swi_4101c000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_swi_4101c000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_swi_4101c000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_swi_4101c000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_swi_4101c000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_swi_4101c000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_swi_4101c000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_swi_4101c000, status, 0)
#define DT_N_S_soc_S_swi_4101c000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_swi_4101c000, status, 0)
#define DT_N_S_soc_S_swi_4101c000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_swi_4101c000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101c000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_swi_4101c000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101c000_P_status_LEN 1
#define DT_N_S_soc_S_swi_4101c000_P_status_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_P_compatible {"nordic,nrf-swi"}
#define DT_N_S_soc_S_swi_4101c000_P_compatible_IDX_0 "nordic,nrf-swi"
#define DT_N_S_soc_S_swi_4101c000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-swi
#define DT_N_S_soc_S_swi_4101c000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_swi
#define DT_N_S_soc_S_swi_4101c000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SWI
#define DT_N_S_soc_S_swi_4101c000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_swi_4101c000, compatible, 0)
#define DT_N_S_soc_S_swi_4101c000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_swi_4101c000, compatible, 0)
#define DT_N_S_soc_S_swi_4101c000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_swi_4101c000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101c000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_swi_4101c000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101c000_P_compatible_LEN 1
#define DT_N_S_soc_S_swi_4101c000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_P_reg {1090633728 /* 0x4101c000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_swi_4101c000_P_reg_IDX_0 1090633728
#define DT_N_S_soc_S_swi_4101c000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_swi_4101c000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_P_reg_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_P_interrupts {28 /* 0x1c */, 1 /* 0x1 */}
#define DT_N_S_soc_S_swi_4101c000_P_interrupts_IDX_0 28
#define DT_N_S_soc_S_swi_4101c000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_swi_4101c000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_swi_4101c000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_swi_4101c000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/swi@4101d000
 *
 * Node identifier: DT_N_S_soc_S_swi_4101d000
 *
 * Binding (compatible = nordic,nrf-swi):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-swi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_swi_4101d000_PATH "/soc/swi@4101d000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_swi_4101d000_FULL_NAME "swi@4101d000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_swi_4101d000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_swi_4101d000_CHILD_IDX 29

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_swi_4101d000_NODELABEL_NUM 1
#define DT_N_S_soc_S_swi_4101d000_FOREACH_NODELABEL(fn) fn(swi3)
#define DT_N_S_soc_S_swi_4101d000_FOREACH_NODELABEL_VARGS(fn, ...) fn(swi3, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_swi_4101d000_CHILD_NUM 0
#define DT_N_S_soc_S_swi_4101d000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_swi_4101d000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_swi_4101d000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_swi_4101d000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_swi_4101d000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_swi_4101d000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_swi_4101d000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_swi_4101d000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_swi_4101d000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_swi_4101d000_ORD 37
#define DT_N_S_soc_S_swi_4101d000_ORD_STR_SORTABLE 00037

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_swi_4101d000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_swi_4101d000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_swi_4101d000_EXISTS 1
#define DT_N_INST_3_nordic_nrf_swi DT_N_S_soc_S_swi_4101d000
#define DT_N_NODELABEL_swi3        DT_N_S_soc_S_swi_4101d000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_swi_4101d000_REG_NUM 1
#define DT_N_S_soc_S_swi_4101d000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_REG_IDX_0_VAL_ADDRESS 1090637824 /* 0x4101d000 */
#define DT_N_S_soc_S_swi_4101d000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_swi_4101d000_RANGES_NUM 0
#define DT_N_S_soc_S_swi_4101d000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_swi_4101d000_IRQ_NUM 1
#define DT_N_S_soc_S_swi_4101d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_IRQ_IDX_0_VAL_irq 29
#define DT_N_S_soc_S_swi_4101d000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_swi_4101d000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_swi_4101d000_IRQ_LEVEL 1
#define DT_N_S_soc_S_swi_4101d000_COMPAT_MATCHES_nordic_nrf_swi 1
#define DT_N_S_soc_S_swi_4101d000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_swi_4101d000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_COMPAT_MODEL_IDX_0 "nrf-swi"
#define DT_N_S_soc_S_swi_4101d000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_swi_4101d000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_swi_4101d000_P_wakeup_source 0
#define DT_N_S_soc_S_swi_4101d000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_swi_4101d000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_P_status "okay"
#define DT_N_S_soc_S_swi_4101d000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_swi_4101d000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_swi_4101d000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_swi_4101d000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_swi_4101d000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_swi_4101d000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_swi_4101d000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_swi_4101d000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_swi_4101d000, status, 0)
#define DT_N_S_soc_S_swi_4101d000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_swi_4101d000, status, 0)
#define DT_N_S_soc_S_swi_4101d000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_swi_4101d000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101d000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_swi_4101d000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101d000_P_status_LEN 1
#define DT_N_S_soc_S_swi_4101d000_P_status_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_P_compatible {"nordic,nrf-swi"}
#define DT_N_S_soc_S_swi_4101d000_P_compatible_IDX_0 "nordic,nrf-swi"
#define DT_N_S_soc_S_swi_4101d000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-swi
#define DT_N_S_soc_S_swi_4101d000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_swi
#define DT_N_S_soc_S_swi_4101d000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SWI
#define DT_N_S_soc_S_swi_4101d000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_swi_4101d000, compatible, 0)
#define DT_N_S_soc_S_swi_4101d000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_swi_4101d000, compatible, 0)
#define DT_N_S_soc_S_swi_4101d000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_swi_4101d000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101d000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_swi_4101d000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_swi_4101d000_P_compatible_LEN 1
#define DT_N_S_soc_S_swi_4101d000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_P_reg {1090637824 /* 0x4101d000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_swi_4101d000_P_reg_IDX_0 1090637824
#define DT_N_S_soc_S_swi_4101d000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_swi_4101d000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_P_reg_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_P_interrupts {29 /* 0x1d */, 1 /* 0x1 */}
#define DT_N_S_soc_S_swi_4101d000_P_interrupts_IDX_0 29
#define DT_N_S_soc_S_swi_4101d000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_swi_4101d000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_swi_4101d000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_swi_4101d000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/temp@41010000
 *
 * Node identifier: DT_N_S_soc_S_temp_41010000
 *
 * Binding (compatible = nordic,nrf-temp):
 *   $ZEPHYR_BASE\dts\bindings\sensor\nordic,nrf-temp.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_temp_41010000_PATH "/soc/temp@41010000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_temp_41010000_FULL_NAME "temp@41010000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_temp_41010000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_temp_41010000_CHILD_IDX 16

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_temp_41010000_NODELABEL_NUM 1
#define DT_N_S_soc_S_temp_41010000_FOREACH_NODELABEL(fn) fn(temp)
#define DT_N_S_soc_S_temp_41010000_FOREACH_NODELABEL_VARGS(fn, ...) fn(temp, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_temp_41010000_CHILD_NUM 0
#define DT_N_S_soc_S_temp_41010000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_temp_41010000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_temp_41010000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_temp_41010000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_temp_41010000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_temp_41010000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_temp_41010000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_temp_41010000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_temp_41010000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_temp_41010000_ORD 38
#define DT_N_S_soc_S_temp_41010000_ORD_STR_SORTABLE 00038

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_temp_41010000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_temp_41010000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_temp_41010000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_temp DT_N_S_soc_S_temp_41010000
#define DT_N_NODELABEL_temp         DT_N_S_soc_S_temp_41010000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_temp_41010000_REG_NUM 1
#define DT_N_S_soc_S_temp_41010000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_REG_IDX_0_VAL_ADDRESS 1090584576 /* 0x41010000 */
#define DT_N_S_soc_S_temp_41010000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_temp_41010000_RANGES_NUM 0
#define DT_N_S_soc_S_temp_41010000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_temp_41010000_IRQ_NUM 1
#define DT_N_S_soc_S_temp_41010000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_IRQ_IDX_0_VAL_irq 16
#define DT_N_S_soc_S_temp_41010000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_temp_41010000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_temp_41010000_IRQ_LEVEL 1
#define DT_N_S_soc_S_temp_41010000_COMPAT_MATCHES_nordic_nrf_temp 1
#define DT_N_S_soc_S_temp_41010000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_temp_41010000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_COMPAT_MODEL_IDX_0 "nrf-temp"
#define DT_N_S_soc_S_temp_41010000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_temp_41010000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_temp_41010000_P_wakeup_source 0
#define DT_N_S_soc_S_temp_41010000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_temp_41010000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_P_status "okay"
#define DT_N_S_soc_S_temp_41010000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_temp_41010000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_temp_41010000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_temp_41010000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_temp_41010000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_temp_41010000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_temp_41010000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_temp_41010000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_temp_41010000, status, 0)
#define DT_N_S_soc_S_temp_41010000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_temp_41010000, status, 0)
#define DT_N_S_soc_S_temp_41010000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_temp_41010000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_temp_41010000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_temp_41010000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_temp_41010000_P_status_LEN 1
#define DT_N_S_soc_S_temp_41010000_P_status_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_P_compatible {"nordic,nrf-temp"}
#define DT_N_S_soc_S_temp_41010000_P_compatible_IDX_0 "nordic,nrf-temp"
#define DT_N_S_soc_S_temp_41010000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-temp
#define DT_N_S_soc_S_temp_41010000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_temp
#define DT_N_S_soc_S_temp_41010000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TEMP
#define DT_N_S_soc_S_temp_41010000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_temp_41010000, compatible, 0)
#define DT_N_S_soc_S_temp_41010000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_temp_41010000, compatible, 0)
#define DT_N_S_soc_S_temp_41010000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_temp_41010000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_temp_41010000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_temp_41010000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_temp_41010000_P_compatible_LEN 1
#define DT_N_S_soc_S_temp_41010000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_P_reg {1090584576 /* 0x41010000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_temp_41010000_P_reg_IDX_0 1090584576
#define DT_N_S_soc_S_temp_41010000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_temp_41010000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_P_reg_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_P_interrupts {16 /* 0x10 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_temp_41010000_P_interrupts_IDX_0 16
#define DT_N_S_soc_S_temp_41010000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_temp_41010000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_temp_41010000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_temp_41010000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/timer@4100c000
 *
 * Node identifier: DT_N_S_soc_S_timer_4100c000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_4100c000_PATH "/soc/timer@4100c000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_4100c000_FULL_NAME "timer@4100c000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_4100c000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_timer_4100c000_CHILD_IDX 12

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_timer_4100c000_NODELABEL_NUM 1
#define DT_N_S_soc_S_timer_4100c000_FOREACH_NODELABEL(fn) fn(timer0)
#define DT_N_S_soc_S_timer_4100c000_FOREACH_NODELABEL_VARGS(fn, ...) fn(timer0, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_timer_4100c000_CHILD_NUM 0
#define DT_N_S_soc_S_timer_4100c000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_timer_4100c000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_4100c000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_4100c000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_4100c000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_timer_4100c000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_timer_4100c000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_4100c000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_4100c000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_4100c000_ORD 39
#define DT_N_S_soc_S_timer_4100c000_ORD_STR_SORTABLE 00039

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_4100c000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_4100c000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_4100c000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_timer DT_N_S_soc_S_timer_4100c000
#define DT_N_NODELABEL_timer0        DT_N_S_soc_S_timer_4100c000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_timer_4100c000_REG_NUM 1
#define DT_N_S_soc_S_timer_4100c000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_REG_IDX_0_VAL_ADDRESS 1090568192 /* 0x4100c000 */
#define DT_N_S_soc_S_timer_4100c000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_4100c000_RANGES_NUM 0
#define DT_N_S_soc_S_timer_4100c000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_timer_4100c000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_4100c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_IRQ_IDX_0_VAL_irq 12
#define DT_N_S_soc_S_timer_4100c000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_4100c000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_timer_4100c000_IRQ_LEVEL 1
#define DT_N_S_soc_S_timer_4100c000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_4100c000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_timer_4100c000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_COMPAT_MODEL_IDX_0 "nrf-timer"
#define DT_N_S_soc_S_timer_4100c000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_timer_4100c000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_timer_4100c000_P_wakeup_source 0
#define DT_N_S_soc_S_timer_4100c000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_timer_4100c000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_status "okay"
#define DT_N_S_soc_S_timer_4100c000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_timer_4100c000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_timer_4100c000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_4100c000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_timer_4100c000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_timer_4100c000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_timer_4100c000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_4100c000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4100c000, status, 0)
#define DT_N_S_soc_S_timer_4100c000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_4100c000, status, 0)
#define DT_N_S_soc_S_timer_4100c000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_4100c000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4100c000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_4100c000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4100c000_P_status_LEN 1
#define DT_N_S_soc_S_timer_4100c000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_4100c000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_4100c000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-timer
#define DT_N_S_soc_S_timer_4100c000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_timer
#define DT_N_S_soc_S_timer_4100c000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TIMER
#define DT_N_S_soc_S_timer_4100c000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4100c000, compatible, 0)
#define DT_N_S_soc_S_timer_4100c000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_4100c000, compatible, 0)
#define DT_N_S_soc_S_timer_4100c000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_4100c000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4100c000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_4100c000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4100c000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_4100c000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_reg {1090568192 /* 0x4100c000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_4100c000_P_reg_IDX_0 1090568192
#define DT_N_S_soc_S_timer_4100c000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_4100c000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_interrupts {12 /* 0xc */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_4100c000_P_interrupts_IDX_0 12
#define DT_N_S_soc_S_timer_4100c000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_4100c000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_timer_4100c000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_cc_num 8
#define DT_N_S_soc_S_timer_4100c000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_max_bit_width 32
#define DT_N_S_soc_S_timer_4100c000_P_max_bit_width_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_max_frequency 16000000
#define DT_N_S_soc_S_timer_4100c000_P_max_frequency_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_prescaler 0
#define DT_N_S_soc_S_timer_4100c000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_4100c000_P_zli 0
#define DT_N_S_soc_S_timer_4100c000_P_zli_EXISTS 1

/*
 * Devicetree node: /soc/timer@41019000
 *
 * Node identifier: DT_N_S_soc_S_timer_41019000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_41019000_PATH "/soc/timer@41019000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_41019000_FULL_NAME "timer@41019000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_41019000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_timer_41019000_CHILD_IDX 25

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_timer_41019000_NODELABEL_NUM 1
#define DT_N_S_soc_S_timer_41019000_FOREACH_NODELABEL(fn) fn(timer2)
#define DT_N_S_soc_S_timer_41019000_FOREACH_NODELABEL_VARGS(fn, ...) fn(timer2, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_timer_41019000_CHILD_NUM 0
#define DT_N_S_soc_S_timer_41019000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_timer_41019000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_41019000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_41019000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_41019000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_timer_41019000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_timer_41019000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_41019000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_41019000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_41019000_ORD 40
#define DT_N_S_soc_S_timer_41019000_ORD_STR_SORTABLE 00040

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_41019000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_41019000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_41019000_EXISTS 1
#define DT_N_INST_2_nordic_nrf_timer DT_N_S_soc_S_timer_41019000
#define DT_N_NODELABEL_timer2        DT_N_S_soc_S_timer_41019000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_timer_41019000_REG_NUM 1
#define DT_N_S_soc_S_timer_41019000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_REG_IDX_0_VAL_ADDRESS 1090621440 /* 0x41019000 */
#define DT_N_S_soc_S_timer_41019000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_41019000_RANGES_NUM 0
#define DT_N_S_soc_S_timer_41019000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_timer_41019000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_41019000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_IRQ_IDX_0_VAL_irq 25
#define DT_N_S_soc_S_timer_41019000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_41019000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_timer_41019000_IRQ_LEVEL 1
#define DT_N_S_soc_S_timer_41019000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_41019000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_timer_41019000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_COMPAT_MODEL_IDX_0 "nrf-timer"
#define DT_N_S_soc_S_timer_41019000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_timer_41019000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_timer_41019000_P_wakeup_source 0
#define DT_N_S_soc_S_timer_41019000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_timer_41019000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_status "okay"
#define DT_N_S_soc_S_timer_41019000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_timer_41019000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_timer_41019000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_41019000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_timer_41019000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_timer_41019000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_timer_41019000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_41019000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_41019000, status, 0)
#define DT_N_S_soc_S_timer_41019000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_41019000, status, 0)
#define DT_N_S_soc_S_timer_41019000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_41019000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_41019000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_41019000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_41019000_P_status_LEN 1
#define DT_N_S_soc_S_timer_41019000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_41019000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_41019000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-timer
#define DT_N_S_soc_S_timer_41019000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_timer
#define DT_N_S_soc_S_timer_41019000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TIMER
#define DT_N_S_soc_S_timer_41019000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_41019000, compatible, 0)
#define DT_N_S_soc_S_timer_41019000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_41019000, compatible, 0)
#define DT_N_S_soc_S_timer_41019000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_41019000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_41019000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_41019000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_41019000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_41019000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_reg {1090621440 /* 0x41019000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_41019000_P_reg_IDX_0 1090621440
#define DT_N_S_soc_S_timer_41019000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_41019000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_interrupts {25 /* 0x19 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_41019000_P_interrupts_IDX_0 25
#define DT_N_S_soc_S_timer_41019000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_41019000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_timer_41019000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_cc_num 8
#define DT_N_S_soc_S_timer_41019000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_max_bit_width 32
#define DT_N_S_soc_S_timer_41019000_P_max_bit_width_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_max_frequency 16000000
#define DT_N_S_soc_S_timer_41019000_P_max_frequency_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_prescaler 0
#define DT_N_S_soc_S_timer_41019000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_41019000_P_zli 0
#define DT_N_S_soc_S_timer_41019000_P_zli_EXISTS 1

/*
 * Devicetree node: /soc/timer@e000e010
 *
 * Node identifier: DT_N_S_soc_S_timer_e000e010
 *
 * Binding (compatible = arm,armv8m-systick):
 *   $ZEPHYR_BASE\dts\bindings\timer\arm,armv8m-systick.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_e000e010_PATH "/soc/timer@e000e010"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_e000e010_FULL_NAME "timer@e000e010"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_e000e010_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_timer_e000e010_CHILD_IDX 1

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_timer_e000e010_NODELABEL_NUM 1
#define DT_N_S_soc_S_timer_e000e010_FOREACH_NODELABEL(fn) fn(systick)
#define DT_N_S_soc_S_timer_e000e010_FOREACH_NODELABEL_VARGS(fn, ...) fn(systick, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_timer_e000e010_CHILD_NUM 0
#define DT_N_S_soc_S_timer_e000e010_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_e000e010_ORD 41
#define DT_N_S_soc_S_timer_e000e010_ORD_STR_SORTABLE 00041

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_e000e010_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_e000e010_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_e000e010_EXISTS 1
#define DT_N_INST_0_arm_armv8m_systick DT_N_S_soc_S_timer_e000e010
#define DT_N_NODELABEL_systick         DT_N_S_soc_S_timer_e000e010

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_timer_e000e010_REG_NUM 1
#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_ADDRESS 3758153744 /* 0xe000e010 */
#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_SIZE 16 /* 0x10 */
#define DT_N_S_soc_S_timer_e000e010_RANGES_NUM 0
#define DT_N_S_soc_S_timer_e000e010_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_timer_e000e010_IRQ_NUM 0
#define DT_N_S_soc_S_timer_e000e010_IRQ_LEVEL 0
#define DT_N_S_soc_S_timer_e000e010_COMPAT_MATCHES_arm_armv8m_systick 1
#define DT_N_S_soc_S_timer_e000e010_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_COMPAT_VENDOR_IDX_0 "ARM Ltd."
#define DT_N_S_soc_S_timer_e000e010_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_COMPAT_MODEL_IDX_0 "armv8m-systick"
#define DT_N_S_soc_S_timer_e000e010_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_timer_e000e010_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_timer_e000e010_P_wakeup_source 0
#define DT_N_S_soc_S_timer_e000e010_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_timer_e000e010_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_status "disabled"
#define DT_N_S_soc_S_timer_e000e010_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_timer_e000e010_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_timer_e000e010_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_timer_e000e010_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_timer_e000e010_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, status, 0)
#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_e000e010, status, 0)
#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_e000e010, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_e000e010_P_status_LEN 1
#define DT_N_S_soc_S_timer_e000e010_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_compatible {"arm,armv8m-systick"}
#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0 "arm,armv8m-systick"
#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_UNQUOTED arm,armv8m-systick
#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_TOKEN arm_armv8m_systick
#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_ARMV8M_SYSTICK
#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0)
#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0)
#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_e000e010_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_e000e010_P_compatible_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_reg {3758153744 /* 0xe000e010 */, 16 /* 0x10 */}
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0 3758153744
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1 16
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_timer_e000e010_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/uart@41013000
 *
 * Node identifier: DT_N_S_soc_S_uart_41013000
 *
 * Binding (compatible = nordic,nrf-uarte):
 *   $ZEPHYR_BASE\dts\bindings\serial\nordic,nrf-uarte.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_uart_41013000_PATH "/soc/uart@41013000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_uart_41013000_FULL_NAME "uart@41013000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_uart_41013000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_uart_41013000_CHILD_IDX 21

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_uart_41013000_NODELABEL_NUM 1
#define DT_N_S_soc_S_uart_41013000_FOREACH_NODELABEL(fn) fn(uart0)
#define DT_N_S_soc_S_uart_41013000_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart0, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_uart_41013000_CHILD_NUM 0
#define DT_N_S_soc_S_uart_41013000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_uart_41013000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_uart_41013000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_uart_41013000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_uart_41013000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_uart_41013000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_uart_41013000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_uart_41013000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_uart_41013000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_uart_41013000_ORD 42
#define DT_N_S_soc_S_uart_41013000_ORD_STR_SORTABLE 00042

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_uart_41013000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_uart_41013000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_uart_41013000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_uarte DT_N_S_soc_S_uart_41013000
#define DT_N_NODELABEL_uart0         DT_N_S_soc_S_uart_41013000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_uart_41013000_REG_NUM 1
#define DT_N_S_soc_S_uart_41013000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_REG_IDX_0_VAL_ADDRESS 1090596864 /* 0x41013000 */
#define DT_N_S_soc_S_uart_41013000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_uart_41013000_RANGES_NUM 0
#define DT_N_S_soc_S_uart_41013000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_uart_41013000_IRQ_NUM 1
#define DT_N_S_soc_S_uart_41013000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_IRQ_IDX_0_VAL_irq 19
#define DT_N_S_soc_S_uart_41013000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_uart_41013000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_uart_41013000_IRQ_LEVEL 1
#define DT_N_S_soc_S_uart_41013000_COMPAT_MATCHES_nordic_nrf_uarte 1
#define DT_N_S_soc_S_uart_41013000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_uart_41013000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_COMPAT_MODEL_IDX_0 "nrf-uarte"
#define DT_N_S_soc_S_uart_41013000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_uart_41013000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_uart_41013000_P_wakeup_source 0
#define DT_N_S_soc_S_uart_41013000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_uart_41013000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_status "disabled"
#define DT_N_S_soc_S_uart_41013000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_uart_41013000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_uart_41013000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_uart_41013000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_uart_41013000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_uart_41013000_P_status_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_uart_41013000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_uart_41013000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_41013000, status, 0)
#define DT_N_S_soc_S_uart_41013000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_uart_41013000, status, 0)
#define DT_N_S_soc_S_uart_41013000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uart_41013000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uart_41013000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_uart_41013000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uart_41013000_P_status_LEN 1
#define DT_N_S_soc_S_uart_41013000_P_status_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_compatible {"nordic,nrf-uarte"}
#define DT_N_S_soc_S_uart_41013000_P_compatible_IDX_0 "nordic,nrf-uarte"
#define DT_N_S_soc_S_uart_41013000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-uarte
#define DT_N_S_soc_S_uart_41013000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_uarte
#define DT_N_S_soc_S_uart_41013000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_UARTE
#define DT_N_S_soc_S_uart_41013000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_41013000, compatible, 0)
#define DT_N_S_soc_S_uart_41013000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_uart_41013000, compatible, 0)
#define DT_N_S_soc_S_uart_41013000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uart_41013000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uart_41013000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_uart_41013000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uart_41013000_P_compatible_LEN 1
#define DT_N_S_soc_S_uart_41013000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_reg {1090596864 /* 0x41013000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_uart_41013000_P_reg_IDX_0 1090596864
#define DT_N_S_soc_S_uart_41013000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_uart_41013000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_reg_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_interrupts {19 /* 0x13 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_uart_41013000_P_interrupts_IDX_0 19
#define DT_N_S_soc_S_uart_41013000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_uart_41013000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_uart_41013000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_hw_flow_control 0
#define DT_N_S_soc_S_uart_41013000_P_hw_flow_control_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_disable_rx 0
#define DT_N_S_soc_S_uart_41013000_P_disable_rx_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_endtx_stoptx_supported 0
#define DT_N_S_soc_S_uart_41013000_P_endtx_stoptx_supported_EXISTS 1
#define DT_N_S_soc_S_uart_41013000_P_frame_timeout_supported 0
#define DT_N_S_soc_S_uart_41013000_P_frame_timeout_supported_EXISTS 1

/*
 * Devicetree node: /soc/uicr@1ff8000
 *
 * Node identifier: DT_N_S_soc_S_uicr_1ff8000
 *
 * Binding (compatible = nordic,nrf-uicr):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-uicr.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_uicr_1ff8000_PATH "/soc/uicr@1ff8000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_uicr_1ff8000_FULL_NAME "uicr@1ff8000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_uicr_1ff8000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_uicr_1ff8000_CHILD_IDX 3

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_uicr_1ff8000_NODELABEL_NUM 1
#define DT_N_S_soc_S_uicr_1ff8000_FOREACH_NODELABEL(fn) fn(uicr)
#define DT_N_S_soc_S_uicr_1ff8000_FOREACH_NODELABEL_VARGS(fn, ...) fn(uicr, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_uicr_1ff8000_CHILD_NUM 0
#define DT_N_S_soc_S_uicr_1ff8000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_uicr_1ff8000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_uicr_1ff8000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_uicr_1ff8000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_uicr_1ff8000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_uicr_1ff8000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_uicr_1ff8000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_uicr_1ff8000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_uicr_1ff8000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_uicr_1ff8000_ORD 43
#define DT_N_S_soc_S_uicr_1ff8000_ORD_STR_SORTABLE 00043

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_uicr_1ff8000_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_uicr_1ff8000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_uicr_1ff8000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_uicr DT_N_S_soc_S_uicr_1ff8000
#define DT_N_NODELABEL_uicr         DT_N_S_soc_S_uicr_1ff8000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_uicr_1ff8000_REG_NUM 1
#define DT_N_S_soc_S_uicr_1ff8000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_1ff8000_REG_IDX_0_VAL_ADDRESS 33521664 /* 0x1ff8000 */
#define DT_N_S_soc_S_uicr_1ff8000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_uicr_1ff8000_RANGES_NUM 0
#define DT_N_S_soc_S_uicr_1ff8000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_uicr_1ff8000_IRQ_NUM 0
#define DT_N_S_soc_S_uicr_1ff8000_IRQ_LEVEL 0
#define DT_N_S_soc_S_uicr_1ff8000_COMPAT_MATCHES_nordic_nrf_uicr 1
#define DT_N_S_soc_S_uicr_1ff8000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_1ff8000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_uicr_1ff8000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_1ff8000_COMPAT_MODEL_IDX_0 "nrf-uicr"
#define DT_N_S_soc_S_uicr_1ff8000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_uicr_1ff8000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_uicr_1ff8000_P_wakeup_source 0
#define DT_N_S_soc_S_uicr_1ff8000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_uicr_1ff8000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_uicr_1ff8000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_uicr_1ff8000_P_status "okay"
#define DT_N_S_soc_S_uicr_1ff8000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_uicr_1ff8000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_uicr_1ff8000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_uicr_1ff8000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_uicr_1ff8000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_1ff8000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_uicr_1ff8000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_uicr_1ff8000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_uicr_1ff8000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_uicr_1ff8000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uicr_1ff8000, status, 0)
#define DT_N_S_soc_S_uicr_1ff8000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_uicr_1ff8000, status, 0)
#define DT_N_S_soc_S_uicr_1ff8000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uicr_1ff8000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uicr_1ff8000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_uicr_1ff8000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uicr_1ff8000_P_status_LEN 1
#define DT_N_S_soc_S_uicr_1ff8000_P_status_EXISTS 1
#define DT_N_S_soc_S_uicr_1ff8000_P_compatible {"nordic,nrf-uicr"}
#define DT_N_S_soc_S_uicr_1ff8000_P_compatible_IDX_0 "nordic,nrf-uicr"
#define DT_N_S_soc_S_uicr_1ff8000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-uicr
#define DT_N_S_soc_S_uicr_1ff8000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_uicr
#define DT_N_S_soc_S_uicr_1ff8000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_UICR
#define DT_N_S_soc_S_uicr_1ff8000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_1ff8000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uicr_1ff8000, compatible, 0)
#define DT_N_S_soc_S_uicr_1ff8000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_uicr_1ff8000, compatible, 0)
#define DT_N_S_soc_S_uicr_1ff8000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uicr_1ff8000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uicr_1ff8000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_uicr_1ff8000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uicr_1ff8000_P_compatible_LEN 1
#define DT_N_S_soc_S_uicr_1ff8000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_uicr_1ff8000_P_reg {33521664 /* 0x1ff8000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_uicr_1ff8000_P_reg_IDX_0 33521664
#define DT_N_S_soc_S_uicr_1ff8000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_1ff8000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_uicr_1ff8000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uicr_1ff8000_P_reg_EXISTS 1
#define DT_N_S_soc_S_uicr_1ff8000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_uicr_1ff8000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_uicr_1ff8000_P_nfct_pins_as_gpios 0
#define DT_N_S_soc_S_uicr_1ff8000_P_nfct_pins_as_gpios_EXISTS 1
#define DT_N_S_soc_S_uicr_1ff8000_P_gpio_as_nreset 0
#define DT_N_S_soc_S_uicr_1ff8000_P_gpio_as_nreset_EXISTS 1

/*
 * Devicetree node: /soc/vmc@41081000
 *
 * Node identifier: DT_N_S_soc_S_vmc_41081000
 *
 * Binding (compatible = nordic,nrf-vmc):
 *   $ZEPHYR_BASE\dts\bindings\power\nordic,nrf-vmc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_vmc_41081000_PATH "/soc/vmc@41081000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_vmc_41081000_FULL_NAME "vmc@41081000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_vmc_41081000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_vmc_41081000_CHILD_IDX 32

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_vmc_41081000_NODELABEL_NUM 1
#define DT_N_S_soc_S_vmc_41081000_FOREACH_NODELABEL(fn) fn(vmc)
#define DT_N_S_soc_S_vmc_41081000_FOREACH_NODELABEL_VARGS(fn, ...) fn(vmc, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_vmc_41081000_CHILD_NUM 0
#define DT_N_S_soc_S_vmc_41081000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_vmc_41081000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_vmc_41081000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_vmc_41081000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_vmc_41081000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_vmc_41081000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_vmc_41081000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_vmc_41081000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_vmc_41081000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_vmc_41081000_ORD 44
#define DT_N_S_soc_S_vmc_41081000_ORD_STR_SORTABLE 00044

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_vmc_41081000_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_vmc_41081000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_vmc_41081000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_vmc DT_N_S_soc_S_vmc_41081000
#define DT_N_NODELABEL_vmc         DT_N_S_soc_S_vmc_41081000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_vmc_41081000_REG_NUM 1
#define DT_N_S_soc_S_vmc_41081000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_vmc_41081000_REG_IDX_0_VAL_ADDRESS 1091047424 /* 0x41081000 */
#define DT_N_S_soc_S_vmc_41081000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_vmc_41081000_RANGES_NUM 0
#define DT_N_S_soc_S_vmc_41081000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_vmc_41081000_IRQ_NUM 0
#define DT_N_S_soc_S_vmc_41081000_IRQ_LEVEL 0
#define DT_N_S_soc_S_vmc_41081000_COMPAT_MATCHES_nordic_nrf_vmc 1
#define DT_N_S_soc_S_vmc_41081000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_vmc_41081000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_vmc_41081000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_vmc_41081000_COMPAT_MODEL_IDX_0 "nrf-vmc"
#define DT_N_S_soc_S_vmc_41081000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_vmc_41081000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_vmc_41081000_P_wakeup_source 0
#define DT_N_S_soc_S_vmc_41081000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_vmc_41081000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_vmc_41081000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_vmc_41081000_P_status "okay"
#define DT_N_S_soc_S_vmc_41081000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_vmc_41081000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_vmc_41081000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_vmc_41081000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_vmc_41081000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_vmc_41081000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_vmc_41081000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_vmc_41081000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_vmc_41081000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_vmc_41081000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_vmc_41081000, status, 0)
#define DT_N_S_soc_S_vmc_41081000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_vmc_41081000, status, 0)
#define DT_N_S_soc_S_vmc_41081000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_vmc_41081000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_vmc_41081000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_vmc_41081000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_vmc_41081000_P_status_LEN 1
#define DT_N_S_soc_S_vmc_41081000_P_status_EXISTS 1
#define DT_N_S_soc_S_vmc_41081000_P_compatible {"nordic,nrf-vmc"}
#define DT_N_S_soc_S_vmc_41081000_P_compatible_IDX_0 "nordic,nrf-vmc"
#define DT_N_S_soc_S_vmc_41081000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-vmc
#define DT_N_S_soc_S_vmc_41081000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_vmc
#define DT_N_S_soc_S_vmc_41081000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_VMC
#define DT_N_S_soc_S_vmc_41081000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_vmc_41081000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_vmc_41081000, compatible, 0)
#define DT_N_S_soc_S_vmc_41081000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_vmc_41081000, compatible, 0)
#define DT_N_S_soc_S_vmc_41081000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_vmc_41081000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_vmc_41081000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_vmc_41081000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_vmc_41081000_P_compatible_LEN 1
#define DT_N_S_soc_S_vmc_41081000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_vmc_41081000_P_reg {1091047424 /* 0x41081000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_vmc_41081000_P_reg_IDX_0 1091047424
#define DT_N_S_soc_S_vmc_41081000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_vmc_41081000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_vmc_41081000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_vmc_41081000_P_reg_EXISTS 1
#define DT_N_S_soc_S_vmc_41081000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_vmc_41081000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/watchdog@4100b000
 *
 * Node identifier: DT_N_S_soc_S_watchdog_4100b000
 *
 * Binding (compatible = nordic,nrf-wdt):
 *   $ZEPHYR_BASE\dts\bindings\watchdog\nordic,nrf-wdt.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_watchdog_4100b000_PATH "/soc/watchdog@4100b000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_watchdog_4100b000_FULL_NAME "watchdog@4100b000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_watchdog_4100b000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_watchdog_4100b000_CHILD_IDX 11

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_watchdog_4100b000_NODELABEL_NUM 2
#define DT_N_S_soc_S_watchdog_4100b000_FOREACH_NODELABEL(fn) fn(wdt) fn(wdt0)
#define DT_N_S_soc_S_watchdog_4100b000_FOREACH_NODELABEL_VARGS(fn, ...) fn(wdt, __VA_ARGS__) fn(wdt0, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_watchdog_4100b000_CHILD_NUM 0
#define DT_N_S_soc_S_watchdog_4100b000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_watchdog_4100b000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_watchdog_4100b000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_watchdog_4100b000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_watchdog_4100b000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_watchdog_4100b000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_watchdog_4100b000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_watchdog_4100b000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_watchdog_4100b000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_watchdog_4100b000_ORD 45
#define DT_N_S_soc_S_watchdog_4100b000_ORD_STR_SORTABLE 00045

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_watchdog_4100b000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_watchdog_4100b000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_watchdog_4100b000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_wdt DT_N_S_soc_S_watchdog_4100b000
#define DT_N_NODELABEL_wdt         DT_N_S_soc_S_watchdog_4100b000
#define DT_N_NODELABEL_wdt0        DT_N_S_soc_S_watchdog_4100b000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_watchdog_4100b000_REG_NUM 1
#define DT_N_S_soc_S_watchdog_4100b000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_REG_IDX_0_VAL_ADDRESS 1090564096 /* 0x4100b000 */
#define DT_N_S_soc_S_watchdog_4100b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_watchdog_4100b000_RANGES_NUM 0
#define DT_N_S_soc_S_watchdog_4100b000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_watchdog_4100b000_IRQ_NUM 1
#define DT_N_S_soc_S_watchdog_4100b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_IRQ_IDX_0_VAL_irq 11
#define DT_N_S_soc_S_watchdog_4100b000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_watchdog_4100b000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_watchdog_4100b000_IRQ_LEVEL 1
#define DT_N_S_soc_S_watchdog_4100b000_COMPAT_MATCHES_nordic_nrf_wdt 1
#define DT_N_S_soc_S_watchdog_4100b000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_watchdog_4100b000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_COMPAT_MODEL_IDX_0 "nrf-wdt"
#define DT_N_S_soc_S_watchdog_4100b000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_watchdog_4100b000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_watchdog_4100b000_P_wakeup_source 0
#define DT_N_S_soc_S_watchdog_4100b000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_watchdog_4100b000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_P_status "okay"
#define DT_N_S_soc_S_watchdog_4100b000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_watchdog_4100b000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_watchdog_4100b000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_watchdog_4100b000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_watchdog_4100b000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_watchdog_4100b000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_watchdog_4100b000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_watchdog_4100b000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_4100b000, status, 0)
#define DT_N_S_soc_S_watchdog_4100b000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_4100b000, status, 0)
#define DT_N_S_soc_S_watchdog_4100b000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_4100b000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_watchdog_4100b000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_4100b000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_watchdog_4100b000_P_status_LEN 1
#define DT_N_S_soc_S_watchdog_4100b000_P_status_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_P_compatible {"nordic,nrf-wdt"}
#define DT_N_S_soc_S_watchdog_4100b000_P_compatible_IDX_0 "nordic,nrf-wdt"
#define DT_N_S_soc_S_watchdog_4100b000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-wdt
#define DT_N_S_soc_S_watchdog_4100b000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_wdt
#define DT_N_S_soc_S_watchdog_4100b000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_WDT
#define DT_N_S_soc_S_watchdog_4100b000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_4100b000, compatible, 0)
#define DT_N_S_soc_S_watchdog_4100b000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_4100b000, compatible, 0)
#define DT_N_S_soc_S_watchdog_4100b000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_4100b000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_watchdog_4100b000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_4100b000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_watchdog_4100b000_P_compatible_LEN 1
#define DT_N_S_soc_S_watchdog_4100b000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_P_reg {1090564096 /* 0x4100b000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_watchdog_4100b000_P_reg_IDX_0 1090564096
#define DT_N_S_soc_S_watchdog_4100b000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_watchdog_4100b000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_P_reg_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_P_interrupts {11 /* 0xb */, 1 /* 0x1 */}
#define DT_N_S_soc_S_watchdog_4100b000_P_interrupts_IDX_0 11
#define DT_N_S_soc_S_watchdog_4100b000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_watchdog_4100b000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_watchdog_4100b000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_watchdog_4100b000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@41080000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_41080000
 *
 * Binding (compatible = nordic,nrf53-flash-controller):
 *   $ZEPHYR_BASE\dts\bindings\flash_controller\nordic,nrf53-flash-controller.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_41080000_PATH "/soc/flash-controller@41080000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_41080000_FULL_NAME "flash-controller@41080000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_flash_controller_41080000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_flash_controller_41080000_CHILD_IDX 31

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_flash_controller_41080000_NODELABEL_NUM 1
#define DT_N_S_soc_S_flash_controller_41080000_FOREACH_NODELABEL(fn) fn(flash_controller)
#define DT_N_S_soc_S_flash_controller_41080000_FOREACH_NODELABEL_VARGS(fn, ...) fn(flash_controller, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_flash_controller_41080000_CHILD_NUM 1
#define DT_N_S_soc_S_flash_controller_41080000_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_soc_S_flash_controller_41080000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000)
#define DT_N_S_soc_S_flash_controller_41080000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000)
#define DT_N_S_soc_S_flash_controller_41080000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000)
#define DT_N_S_soc_S_flash_controller_41080000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000)
#define DT_N_S_soc_S_flash_controller_41080000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000, __VA_ARGS__)

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_41080000_ORD 46
#define DT_N_S_soc_S_flash_controller_41080000_ORD_STR_SORTABLE 00046

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_41080000_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_41080000_SUPPORTS_ORDS \
	47, /* /soc/flash-controller@41080000/flash@1000000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_41080000_EXISTS 1
#define DT_N_INST_0_nordic_nrf53_flash_controller DT_N_S_soc_S_flash_controller_41080000
#define DT_N_NODELABEL_flash_controller           DT_N_S_soc_S_flash_controller_41080000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_41080000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_41080000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_REG_IDX_0_VAL_ADDRESS 1091043328 /* 0x41080000 */
#define DT_N_S_soc_S_flash_controller_41080000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_flash_controller_41080000_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_IRQ_LEVEL 0
#define DT_N_S_soc_S_flash_controller_41080000_COMPAT_MATCHES_nordic_nrf53_flash_controller 1
#define DT_N_S_soc_S_flash_controller_41080000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_flash_controller_41080000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_COMPAT_MODEL_IDX_0 "nrf53-flash-controller"
#define DT_N_S_soc_S_flash_controller_41080000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_41080000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_41080000_P_wakeup_source 0
#define DT_N_S_soc_S_flash_controller_41080000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_flash_controller_41080000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_P_compatible {"nordic,nrf53-flash-controller"}
#define DT_N_S_soc_S_flash_controller_41080000_P_compatible_IDX_0 "nordic,nrf53-flash-controller"
#define DT_N_S_soc_S_flash_controller_41080000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf53-flash-controller
#define DT_N_S_soc_S_flash_controller_41080000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf53_flash_controller
#define DT_N_S_soc_S_flash_controller_41080000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF53_FLASH_CONTROLLER
#define DT_N_S_soc_S_flash_controller_41080000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_41080000, compatible, 0)
#define DT_N_S_soc_S_flash_controller_41080000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_41080000, compatible, 0)
#define DT_N_S_soc_S_flash_controller_41080000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_41080000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_41080000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_P_compatible_LEN 1
#define DT_N_S_soc_S_flash_controller_41080000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_P_reg {1091043328 /* 0x41080000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_flash_controller_41080000_P_reg_IDX_0 1091043328
#define DT_N_S_soc_S_flash_controller_41080000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_flash_controller_41080000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_P_reg_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_flash_controller_41080000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_P_partial_erase 1
#define DT_N_S_soc_S_flash_controller_41080000_P_partial_erase_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@41080000/flash@1000000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000
 *
 * Binding (compatible = soc-nv-flash):
 *   $ZEPHYR_BASE\dts\bindings\mtd\soc-nv-flash.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_PATH "/soc/flash-controller@41080000/flash@1000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_FULL_NAME "flash@1000000"

/* Node parent (/soc/flash-controller@41080000) identifier: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_PARENT DT_N_S_soc_S_flash_controller_41080000

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_NODELABEL_NUM 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_FOREACH_NODELABEL(fn) fn(flash1)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(flash1, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_CHILD_NUM 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions, __VA_ARGS__)

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_ORD 47
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_ORD_STR_SORTABLE 00047

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_REQUIRES_ORDS \
	46, /* /soc/flash-controller@41080000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_SUPPORTS_ORDS \
	48, /* /soc/flash-controller@41080000/flash@1000000/partitions */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_EXISTS 1
#define DT_N_INST_0_soc_nv_flash DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000
#define DT_N_NODELABEL_flash1    DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_REG_IDX_0_VAL_ADDRESS 16777216 /* 0x1000000 */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_REG_IDX_0_VAL_SIZE 262144 /* 0x40000 */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_IRQ_LEVEL 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_COMPAT_MATCHES_soc_nv_flash 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_wakeup_source 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_compatible {"soc-nv-flash"}
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_compatible_IDX_0 "soc-nv-flash"
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_compatible_IDX_0_STRING_UNQUOTED soc-nv-flash
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_compatible_IDX_0_STRING_TOKEN soc_nv_flash
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_compatible_IDX_0_STRING_UPPER_TOKEN SOC_NV_FLASH
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000, compatible, 0)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000, compatible, 0)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_compatible_LEN 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_reg {16777216 /* 0x1000000 */, 262144 /* 0x40000 */}
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_reg_IDX_0 16777216
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_reg_IDX_1 262144
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_erase_block_size 2048
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_erase_block_size_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_write_block_size 4
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_P_write_block_size_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@41080000/flash@1000000/partitions
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions
 *
 * Binding (compatible = fixed-partitions):
 *   $ZEPHYR_BASE\dts\bindings\mtd\fixed-partitions.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_PATH "/soc/flash-controller@41080000/flash@1000000/partitions"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_FULL_NAME "partitions"

/* Node parent (/soc/flash-controller@41080000/flash@1000000) identifier: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_PARENT DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_NODELABEL_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_FOREACH_NODELABEL(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_FOREACH_NODELABEL_VARGS(fn, ...) 

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_CHILD_NUM 4
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_CHILD_NUM_STATUS_OKAY 4
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000, __VA_ARGS__)

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_ORD 48
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_ORD_STR_SORTABLE 00048

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_REQUIRES_ORDS \
	47, /* /soc/flash-controller@41080000/flash@1000000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_SUPPORTS_ORDS \
	49, /* /soc/flash-controller@41080000/flash@1000000/partitions/partition@0 */ \
	50, /* /soc/flash-controller@41080000/flash@1000000/partitions/partition@eccc00 */ \
	51, /* /soc/flash-controller@41080000/flash@1000000/partitions/partition@ed0000 */ \
	52, /* /soc/flash-controller@41080000/flash@1000000/partitions/partition@fc0000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_EXISTS 1
#define DT_N_INST_0_fixed_partitions DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_REG_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_IRQ_LEVEL 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_COMPAT_MATCHES_fixed_partitions 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /soc/flash-controller@41080000/flash@1000000/partitions/partition@0
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_PATH "/soc/flash-controller@41080000/flash@1000000/partitions/partition@0"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_FULL_NAME "partition@0"

/* Node parent (/soc/flash-controller@41080000/flash@1000000/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_PARENT DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_NODELABEL_NUM 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_FOREACH_NODELABEL(fn) fn(boot_partition)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_FOREACH_NODELABEL_VARGS(fn, ...) fn(boot_partition, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_CHILD_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_ORD 49
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_ORD_STR_SORTABLE 00049

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_REQUIRES_ORDS \
	48, /* /soc/flash-controller@41080000/flash@1000000/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_EXISTS 1
#define DT_N_NODELABEL_boot_partition DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_REG_IDX_0_VAL_SIZE 15518720 /* 0xeccc00 */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_IRQ_LEVEL 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_PINCTRL_NUM 0

/* fixed-partitions identifier: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_PARTITION_ID 0

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_label "external_flash"
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_label_STRING_UNQUOTED external_flash
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_label_STRING_TOKEN external_flash
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_label_STRING_UPPER_TOKEN EXTERNAL_FLASH
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_label_IDX_0 "external_flash"
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_label_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0, label, 0)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0, label, 0)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_label_LEN 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_read_only 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_reg {0 /* 0x0 */, 15518720 /* 0xeccc00 */}
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_reg_IDX_0 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_reg_IDX_1 15518720
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@41080000/flash@1000000/partitions/partition@eccc00
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_PATH "/soc/flash-controller@41080000/flash@1000000/partitions/partition@eccc00"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_FULL_NAME "partition@eccc00"

/* Node parent (/soc/flash-controller@41080000/flash@1000000/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_PARENT DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_CHILD_IDX 1

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_NODELABEL_NUM 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_FOREACH_NODELABEL(fn) fn(slot0_partition)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_FOREACH_NODELABEL_VARGS(fn, ...) fn(slot0_partition, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_CHILD_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_ORD 50
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_ORD_STR_SORTABLE 00050

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_REQUIRES_ORDS \
	48, /* /soc/flash-controller@41080000/flash@1000000/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_EXISTS 1
#define DT_N_NODELABEL_slot0_partition DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_REG_IDX_0_VAL_ADDRESS 15518720 /* 0xeccc00 */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_REG_IDX_0_VAL_SIZE 16384 /* 0x4000 */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_IRQ_LEVEL 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_PINCTRL_NUM 0

/* fixed-partitions identifier: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_PARTITION_ID 1

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_label "settings_storage"
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_label_STRING_UNQUOTED settings_storage
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_label_STRING_TOKEN settings_storage
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_label_STRING_UPPER_TOKEN SETTINGS_STORAGE
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_label_IDX_0 "settings_storage"
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_label_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00, label, 0)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00, label, 0)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_label_LEN 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_read_only 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_reg {15518720 /* 0xeccc00 */, 16384 /* 0x4000 */}
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_reg_IDX_0 15518720
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_reg_IDX_1 16384
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@41080000/flash@1000000/partitions/partition@ed0000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_PATH "/soc/flash-controller@41080000/flash@1000000/partitions/partition@ed0000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_FULL_NAME "partition@ed0000"

/* Node parent (/soc/flash-controller@41080000/flash@1000000/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_PARENT DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_CHILD_IDX 2

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_NODELABEL_NUM 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_FOREACH_NODELABEL(fn) fn(slot1_partition)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_FOREACH_NODELABEL_VARGS(fn, ...) fn(slot1_partition, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_CHILD_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_ORD 51
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_ORD_STR_SORTABLE 00051

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_REQUIRES_ORDS \
	48, /* /soc/flash-controller@41080000/flash@1000000/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_EXISTS 1
#define DT_N_NODELABEL_slot1_partition DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_REG_IDX_0_VAL_ADDRESS 15532032 /* 0xed0000 */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_REG_IDX_0_VAL_SIZE 983040 /* 0xf0000 */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_IRQ_LEVEL 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_PINCTRL_NUM 0

/* fixed-partitions identifier: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_PARTITION_ID 2

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_label "mcuboot_secondary"
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_label_STRING_UNQUOTED mcuboot_secondary
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_label_STRING_TOKEN mcuboot_secondary
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_label_STRING_UPPER_TOKEN MCUBOOT_SECONDARY
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_label_IDX_0 "mcuboot_secondary"
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_label_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000, label, 0)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000, label, 0)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_label_LEN 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_reg {15532032 /* 0xed0000 */, 983040 /* 0xf0000 */}
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_reg_IDX_0 15532032
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_reg_IDX_1 983040
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@41080000/flash@1000000/partitions/partition@fc0000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_PATH "/soc/flash-controller@41080000/flash@1000000/partitions/partition@fc0000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_FULL_NAME "partition@fc0000"

/* Node parent (/soc/flash-controller@41080000/flash@1000000/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_PARENT DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_CHILD_IDX 3

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_NODELABEL_NUM 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_FOREACH_NODELABEL(fn) fn(scratch_partition)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_FOREACH_NODELABEL_VARGS(fn, ...) fn(scratch_partition, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_CHILD_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_ORD 52
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_ORD_STR_SORTABLE 00052

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_REQUIRES_ORDS \
	48, /* /soc/flash-controller@41080000/flash@1000000/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_EXISTS 1
#define DT_N_NODELABEL_scratch_partition DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_REG_IDX_0_VAL_ADDRESS 16515072 /* 0xfc0000 */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_REG_IDX_0_VAL_SIZE 262144 /* 0x40000 */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_IRQ_LEVEL 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_PINCTRL_NUM 0

/* fixed-partitions identifier: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_PARTITION_ID 3

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_label "mcuboot_secondary_1"
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_label_STRING_UNQUOTED mcuboot_secondary_1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_label_STRING_TOKEN mcuboot_secondary_1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_label_STRING_UPPER_TOKEN MCUBOOT_SECONDARY_1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_label_IDX_0 "mcuboot_secondary_1"
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_label_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000, label, 0)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000, label, 0)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_label_LEN 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_reg {16515072 /* 0xfc0000 */, 262144 /* 0x40000 */}
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_reg_IDX_0 16515072
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_reg_IDX_1 262144
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/power@41005000
 *
 * Node identifier: DT_N_S_soc_S_power_41005000
 *
 * Binding (compatible = nordic,nrf-power):
 *   $ZEPHYR_BASE\dts\bindings\power\nordic,nrf-power.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_power_41005000_PATH "/soc/power@41005000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_power_41005000_FULL_NAME "power@41005000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_power_41005000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_power_41005000_CHILD_IDX 7

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_power_41005000_NODELABEL_NUM 1
#define DT_N_S_soc_S_power_41005000_FOREACH_NODELABEL(fn) fn(power)
#define DT_N_S_soc_S_power_41005000_FOREACH_NODELABEL_VARGS(fn, ...) fn(power, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_power_41005000_CHILD_NUM 2
#define DT_N_S_soc_S_power_41005000_CHILD_NUM_STATUS_OKAY 2
#define DT_N_S_soc_S_power_41005000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520)
#define DT_N_S_soc_S_power_41005000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520)
#define DT_N_S_soc_S_power_41005000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c, __VA_ARGS__) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520, __VA_ARGS__)
#define DT_N_S_soc_S_power_41005000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520, __VA_ARGS__)
#define DT_N_S_soc_S_power_41005000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520)
#define DT_N_S_soc_S_power_41005000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520)
#define DT_N_S_soc_S_power_41005000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c, __VA_ARGS__) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520, __VA_ARGS__)
#define DT_N_S_soc_S_power_41005000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520, __VA_ARGS__)

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_power_41005000_ORD 53
#define DT_N_S_soc_S_power_41005000_ORD_STR_SORTABLE 00053

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_power_41005000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_power_41005000_SUPPORTS_ORDS \
	54, /* /soc/power@41005000/gpregret1@4100551c */ \
	55, /* /soc/power@41005000/gpregret2@41005520 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_power_41005000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_power DT_N_S_soc_S_power_41005000
#define DT_N_NODELABEL_power         DT_N_S_soc_S_power_41005000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_power_41005000_REG_NUM 1
#define DT_N_S_soc_S_power_41005000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_REG_IDX_0_VAL_ADDRESS 1090539520 /* 0x41005000 */
#define DT_N_S_soc_S_power_41005000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_power_41005000_RANGES_NUM 0
#define DT_N_S_soc_S_power_41005000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_power_41005000_IRQ_NUM 1
#define DT_N_S_soc_S_power_41005000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_IRQ_IDX_0_VAL_irq 5
#define DT_N_S_soc_S_power_41005000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_power_41005000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_power_41005000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_power_41005000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_power_41005000_IRQ_LEVEL 1
#define DT_N_S_soc_S_power_41005000_COMPAT_MATCHES_nordic_nrf_power 1
#define DT_N_S_soc_S_power_41005000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_power_41005000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_COMPAT_MODEL_IDX_0 "nrf-power"
#define DT_N_S_soc_S_power_41005000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_power_41005000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_power_41005000_P_wakeup_source 0
#define DT_N_S_soc_S_power_41005000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_power_41005000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_power_41005000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_power_41005000_P_status "okay"
#define DT_N_S_soc_S_power_41005000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_power_41005000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_power_41005000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_power_41005000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_power_41005000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_power_41005000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_power_41005000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_power_41005000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_power_41005000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_power_41005000, status, 0)
#define DT_N_S_soc_S_power_41005000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_power_41005000, status, 0)
#define DT_N_S_soc_S_power_41005000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_power_41005000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_41005000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_41005000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_41005000_P_status_LEN 1
#define DT_N_S_soc_S_power_41005000_P_status_EXISTS 1
#define DT_N_S_soc_S_power_41005000_P_compatible {"nordic,nrf-power"}
#define DT_N_S_soc_S_power_41005000_P_compatible_IDX_0 "nordic,nrf-power"
#define DT_N_S_soc_S_power_41005000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-power
#define DT_N_S_soc_S_power_41005000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_power
#define DT_N_S_soc_S_power_41005000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_POWER
#define DT_N_S_soc_S_power_41005000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_power_41005000, compatible, 0)
#define DT_N_S_soc_S_power_41005000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_power_41005000, compatible, 0)
#define DT_N_S_soc_S_power_41005000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_power_41005000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_41005000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_41005000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_41005000_P_compatible_LEN 1
#define DT_N_S_soc_S_power_41005000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_power_41005000_P_reg {1090539520 /* 0x41005000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_power_41005000_P_reg_IDX_0 1090539520
#define DT_N_S_soc_S_power_41005000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_power_41005000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_power_41005000_P_reg_EXISTS 1
#define DT_N_S_soc_S_power_41005000_P_interrupts {5 /* 0x5 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_power_41005000_P_interrupts_IDX_0 5
#define DT_N_S_soc_S_power_41005000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_power_41005000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_power_41005000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_power_41005000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_power_41005000_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/power@41005000/gpregret1@4100551c
 *
 * Node identifier: DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c
 *
 * Binding (compatible = nordic,nrf-gpregret):
 *   $ZEPHYR_BASE\dts\bindings\retained_mem\nordic,nrf-gpreget.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_PATH "/soc/power@41005000/gpregret1@4100551c"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_FULL_NAME "gpregret1@4100551c"

/* Node parent (/soc/power@41005000) identifier: */
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_PARENT DT_N_S_soc_S_power_41005000

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_NODELABEL_NUM 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_FOREACH_NODELABEL(fn) fn(gpregret1)
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpregret1, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_CHILD_NUM 0
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_ORD 54
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_ORD_STR_SORTABLE 00054

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_REQUIRES_ORDS \
	53, /* /soc/power@41005000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_EXISTS 1
#define DT_N_INST_0_nordic_nrf_gpregret DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c
#define DT_N_NODELABEL_gpregret1        DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_REG_NUM 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_REG_IDX_0_VAL_ADDRESS 1090540828 /* 0x4100551c */
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_REG_IDX_0_VAL_SIZE 1 /* 0x1 */
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_RANGES_NUM 0
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_IRQ_NUM 0
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_IRQ_LEVEL 0
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_COMPAT_MATCHES_nordic_nrf_gpregret 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_COMPAT_MODEL_IDX_0 "nrf-gpregret"
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_wakeup_source 0
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status "okay"
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c, status, 0)
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c, status, 0)
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status_LEN 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_status_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_compatible {"nordic,nrf-gpregret"}
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_compatible_IDX_0 "nordic,nrf-gpregret"
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpregret
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpregret
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPREGRET
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c, compatible, 0)
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c, compatible, 0)
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_compatible_LEN 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_compatible_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_reg {1090540828 /* 0x4100551c */, 1 /* 0x1 */}
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_reg_IDX_0 1090540828
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_reg_IDX_1 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_reg_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/power@41005000/gpregret2@41005520
 *
 * Node identifier: DT_N_S_soc_S_power_41005000_S_gpregret2_41005520
 *
 * Binding (compatible = nordic,nrf-gpregret):
 *   $ZEPHYR_BASE\dts\bindings\retained_mem\nordic,nrf-gpreget.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_PATH "/soc/power@41005000/gpregret2@41005520"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_FULL_NAME "gpregret2@41005520"

/* Node parent (/soc/power@41005000) identifier: */
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_PARENT DT_N_S_soc_S_power_41005000

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_CHILD_IDX 1

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_NODELABEL_NUM 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_FOREACH_NODELABEL(fn) fn(gpregret2)
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpregret2, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_CHILD_NUM 0
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_ORD 55
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_ORD_STR_SORTABLE 00055

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_REQUIRES_ORDS \
	53, /* /soc/power@41005000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_EXISTS 1
#define DT_N_INST_1_nordic_nrf_gpregret DT_N_S_soc_S_power_41005000_S_gpregret2_41005520
#define DT_N_NODELABEL_gpregret2        DT_N_S_soc_S_power_41005000_S_gpregret2_41005520

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_REG_NUM 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_REG_IDX_0_VAL_ADDRESS 1090540832 /* 0x41005520 */
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_REG_IDX_0_VAL_SIZE 1 /* 0x1 */
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_RANGES_NUM 0
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_IRQ_NUM 0
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_IRQ_LEVEL 0
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_COMPAT_MATCHES_nordic_nrf_gpregret 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_COMPAT_MODEL_IDX_0 "nrf-gpregret"
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_wakeup_source 0
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status "okay"
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520, status, 0)
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520, status, 0)
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status_LEN 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_status_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_compatible {"nordic,nrf-gpregret"}
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_compatible_IDX_0 "nordic,nrf-gpregret"
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpregret
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpregret
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPREGRET
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520, compatible, 0)
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520, compatible, 0)
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_compatible_LEN 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_compatible_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_reg {1090540832 /* 0x41005520 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_reg_IDX_0 1090540832
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_reg_IDX_1 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_reg_EXISTS 1
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_power_41005000_S_gpregret2_41005520_P_zephyr_deferred_init_EXISTS 1

/*
 * Devicetree node: /soc/radio@41008000
 *
 * Node identifier: DT_N_S_soc_S_radio_41008000
 *
 * Binding (compatible = nordic,nrf-radio):
 *   $ZEPHYR_BASE\dts\bindings\net\wireless\nordic,nrf-radio.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_radio_41008000_PATH "/soc/radio@41008000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_radio_41008000_FULL_NAME "radio@41008000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_radio_41008000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_radio_41008000_CHILD_IDX 8

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_radio_41008000_NODELABEL_NUM 1
#define DT_N_S_soc_S_radio_41008000_FOREACH_NODELABEL(fn) fn(radio)
#define DT_N_S_soc_S_radio_41008000_FOREACH_NODELABEL_VARGS(fn, ...) fn(radio, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_radio_41008000_CHILD_NUM 3
#define DT_N_S_soc_S_radio_41008000_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_soc_S_radio_41008000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_radio_41008000_S_ieee802154) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller)
#define DT_N_S_soc_S_radio_41008000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_radio_41008000_S_ieee802154) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller)
#define DT_N_S_soc_S_radio_41008000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_41008000_S_ieee802154, __VA_ARGS__) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, __VA_ARGS__) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_41008000_S_ieee802154, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc)
#define DT_N_S_soc_S_radio_41008000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc)
#define DT_N_S_soc_S_radio_41008000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, __VA_ARGS__)

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_radio_41008000_ORD 56
#define DT_N_S_soc_S_radio_41008000_ORD_STR_SORTABLE 00056

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_radio_41008000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_radio_41008000_SUPPORTS_ORDS \
	57, /* /soc/radio@41008000/bt_hci_controller */ \
	58, /* /soc/radio@41008000/bt_hci_sdc */ \
	59, /* /soc/radio@41008000/ieee802154 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_radio_41008000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_radio DT_N_S_soc_S_radio_41008000
#define DT_N_NODELABEL_radio         DT_N_S_soc_S_radio_41008000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_radio_41008000_REG_NUM 1
#define DT_N_S_soc_S_radio_41008000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_REG_IDX_0_VAL_ADDRESS 1090551808 /* 0x41008000 */
#define DT_N_S_soc_S_radio_41008000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_radio_41008000_RANGES_NUM 0
#define DT_N_S_soc_S_radio_41008000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_radio_41008000_IRQ_NUM 1
#define DT_N_S_soc_S_radio_41008000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_IRQ_IDX_0_VAL_irq 8
#define DT_N_S_soc_S_radio_41008000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_radio_41008000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_radio_41008000_IRQ_LEVEL 1
#define DT_N_S_soc_S_radio_41008000_COMPAT_MATCHES_nordic_nrf_radio 1
#define DT_N_S_soc_S_radio_41008000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_radio_41008000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_COMPAT_MODEL_IDX_0 "nrf-radio"
#define DT_N_S_soc_S_radio_41008000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_radio_41008000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_radio_41008000_P_wakeup_source 0
#define DT_N_S_soc_S_radio_41008000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_radio_41008000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_status "okay"
#define DT_N_S_soc_S_radio_41008000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_radio_41008000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_radio_41008000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_radio_41008000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_radio_41008000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_radio_41008000_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_radio_41008000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_radio_41008000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_41008000, status, 0)
#define DT_N_S_soc_S_radio_41008000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_41008000, status, 0)
#define DT_N_S_soc_S_radio_41008000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_41008000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_41008000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_P_status_LEN 1
#define DT_N_S_soc_S_radio_41008000_P_status_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_compatible {"nordic,nrf-radio"}
#define DT_N_S_soc_S_radio_41008000_P_compatible_IDX_0 "nordic,nrf-radio"
#define DT_N_S_soc_S_radio_41008000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-radio
#define DT_N_S_soc_S_radio_41008000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_radio
#define DT_N_S_soc_S_radio_41008000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_RADIO
#define DT_N_S_soc_S_radio_41008000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_41008000, compatible, 0)
#define DT_N_S_soc_S_radio_41008000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_41008000, compatible, 0)
#define DT_N_S_soc_S_radio_41008000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_41008000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_41008000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_P_compatible_LEN 1
#define DT_N_S_soc_S_radio_41008000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_reg {1090551808 /* 0x41008000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_radio_41008000_P_reg_IDX_0 1090551808
#define DT_N_S_soc_S_radio_41008000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_radio_41008000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_reg_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_interrupts {8 /* 0x8 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_radio_41008000_P_interrupts_IDX_0 8
#define DT_N_S_soc_S_radio_41008000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_radio_41008000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_radio_41008000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_dfe_supported 1
#define DT_N_S_soc_S_radio_41008000_P_dfe_supported_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_ieee802154_supported 1
#define DT_N_S_soc_S_radio_41008000_P_ieee802154_supported_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_ble_2mbps_supported 1
#define DT_N_S_soc_S_radio_41008000_P_ble_2mbps_supported_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_ble_coded_phy_supported 1
#define DT_N_S_soc_S_radio_41008000_P_ble_coded_phy_supported_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_tx_high_power_supported 0
#define DT_N_S_soc_S_radio_41008000_P_tx_high_power_supported_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_P_cs_supported 0
#define DT_N_S_soc_S_radio_41008000_P_cs_supported_EXISTS 1

/*
 * Devicetree node: /soc/radio@41008000/bt_hci_controller
 *
 * Node identifier: DT_N_S_soc_S_radio_41008000_S_bt_hci_controller
 *
 * Binding (compatible = zephyr,bt-hci-ll-sw-split):
 *   $ZEPHYR_BASE\dts\bindings\bluetooth\zephyr,bt-hci-ll-sw-split.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_PATH "/soc/radio@41008000/bt_hci_controller"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_FULL_NAME "bt_hci_controller"

/* Node parent (/soc/radio@41008000) identifier: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_PARENT DT_N_S_soc_S_radio_41008000

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_CHILD_IDX 2

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_NODELABEL_NUM 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_FOREACH_NODELABEL(fn) fn(bt_hci_controller)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_FOREACH_NODELABEL_VARGS(fn, ...) fn(bt_hci_controller, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_CHILD_NUM 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_ORD 57
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_ORD_STR_SORTABLE 00057

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_REQUIRES_ORDS \
	56, /* /soc/radio@41008000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_EXISTS 1
#define DT_N_INST_0_zephyr_bt_hci_ll_sw_split DT_N_S_soc_S_radio_41008000_S_bt_hci_controller
#define DT_N_NODELABEL_bt_hci_controller      DT_N_S_soc_S_radio_41008000_S_bt_hci_controller

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_REG_NUM 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_RANGES_NUM 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_IRQ_NUM 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_IRQ_LEVEL 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_COMPAT_MATCHES_zephyr_bt_hci_ll_sw_split 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_COMPAT_VENDOR_IDX_0 "Zephyr-specific binding"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_COMPAT_MODEL_IDX_0 "bt-hci-ll-sw-split"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_wakeup_source 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status "disabled"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, status, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, status, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status_LEN 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_status_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_compatible {"zephyr,bt-hci-ll-sw-split"}
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_compatible_IDX_0 "zephyr,bt-hci-ll-sw-split"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_compatible_IDX_0_STRING_UNQUOTED zephyr,bt-hci-ll-sw-split
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_compatible_IDX_0_STRING_TOKEN zephyr_bt_hci_ll_sw_split
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_BT_HCI_LL_SW_SPLIT
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, compatible, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, compatible, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_compatible_LEN 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_compatible_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_name "Controller"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_name_STRING_UNQUOTED Controller
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_name_STRING_TOKEN Controller
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_name_STRING_UPPER_TOKEN CONTROLLER
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_name_IDX_0 "Controller"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_name_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_name_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, bt_hci_name, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_name_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, bt_hci_name, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_name_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, bt_hci_name, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_name_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, bt_hci_name, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_name_LEN 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_name_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus "BT_HCI_BUS_VIRTUAL"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus_STRING_UNQUOTED BT_HCI_BUS_VIRTUAL
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus_STRING_TOKEN BT_HCI_BUS_VIRTUAL
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus_STRING_UPPER_TOKEN BT_HCI_BUS_VIRTUAL
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus_IDX_0 "BT_HCI_BUS_VIRTUAL"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus_ENUM_IDX 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus_ENUM_VAL_BT_HCI_BUS_VIRTUAL_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus_ENUM_TOKEN BT_HCI_BUS_VIRTUAL
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus_ENUM_UPPER_TOKEN BT_HCI_BUS_VIRTUAL
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, bt_hci_bus, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, bt_hci_bus, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, bt_hci_bus, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, bt_hci_bus, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus_LEN 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_bus_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_quirks {"BT_HCI_QUIRK_NO_AUTO_DLE"}
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_quirks_IDX_0 "BT_HCI_QUIRK_NO_AUTO_DLE"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_quirks_IDX_0_STRING_UNQUOTED BT_HCI_QUIRK_NO_AUTO_DLE
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_quirks_IDX_0_STRING_TOKEN BT_HCI_QUIRK_NO_AUTO_DLE
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_quirks_IDX_0_STRING_UPPER_TOKEN BT_HCI_QUIRK_NO_AUTO_DLE
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_quirks_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_quirks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, bt_hci_quirks, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_quirks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, bt_hci_quirks, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_quirks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, bt_hci_quirks, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_quirks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, bt_hci_quirks, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_quirks_LEN 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_quirks_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_vs_ext 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_controller_P_bt_hci_vs_ext_EXISTS 1

/*
 * Devicetree node: /soc/radio@41008000/bt_hci_sdc
 *
 * Node identifier: DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc
 *
 * Binding (compatible = nordic,bt-hci-sdc):
 *   C:/ncs/v2.9.2/nrf/dts/bindings\bluetooth\nordic,bt-hci-sdc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_PATH "/soc/radio@41008000/bt_hci_sdc"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_FULL_NAME "bt_hci_sdc"

/* Node parent (/soc/radio@41008000) identifier: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_PARENT DT_N_S_soc_S_radio_41008000

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_CHILD_IDX 1

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_NODELABEL_NUM 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_FOREACH_NODELABEL(fn) fn(bt_hci_sdc)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_FOREACH_NODELABEL_VARGS(fn, ...) fn(bt_hci_sdc, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_CHILD_NUM 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_ORD 58
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_ORD_STR_SORTABLE 00058

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_REQUIRES_ORDS \
	56, /* /soc/radio@41008000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_EXISTS 1
#define DT_N_INST_0_nordic_bt_hci_sdc DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc
#define DT_N_NODELABEL_bt_hci_sdc     DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_REG_NUM 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_RANGES_NUM 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_IRQ_NUM 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_IRQ_LEVEL 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_COMPAT_MATCHES_nordic_bt_hci_sdc 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_COMPAT_MODEL_IDX_0 "bt-hci-sdc"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_wakeup_source 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status "okay"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, status, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, status, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status_LEN 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_status_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_compatible {"nordic,bt-hci-sdc"}
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_compatible_IDX_0 "nordic,bt-hci-sdc"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_compatible_IDX_0_STRING_UNQUOTED nordic,bt-hci-sdc
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_compatible_IDX_0_STRING_TOKEN nordic_bt_hci_sdc
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_BT_HCI_SDC
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, compatible, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, compatible, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_compatible_LEN 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_compatible_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_name "SDC"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_name_STRING_UNQUOTED SDC
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_name_STRING_TOKEN SDC
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_name_STRING_UPPER_TOKEN SDC
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_name_IDX_0 "SDC"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_name_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_name_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, bt_hci_name, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_name_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, bt_hci_name, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_name_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, bt_hci_name, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_name_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, bt_hci_name, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_name_LEN 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_name_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus "BT_HCI_BUS_VIRTUAL"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus_STRING_UNQUOTED BT_HCI_BUS_VIRTUAL
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus_STRING_TOKEN BT_HCI_BUS_VIRTUAL
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus_STRING_UPPER_TOKEN BT_HCI_BUS_VIRTUAL
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus_IDX_0 "BT_HCI_BUS_VIRTUAL"
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus_ENUM_IDX 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus_ENUM_VAL_BT_HCI_BUS_VIRTUAL_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus_ENUM_TOKEN BT_HCI_BUS_VIRTUAL
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus_ENUM_UPPER_TOKEN BT_HCI_BUS_VIRTUAL
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, bt_hci_bus, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, bt_hci_bus, 0)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, bt_hci_bus, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, bt_hci_bus, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus_LEN 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_bus_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_vs_ext 0
#define DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc_P_bt_hci_vs_ext_EXISTS 1

/*
 * Devicetree node: /soc/radio@41008000/ieee802154
 *
 * Node identifier: DT_N_S_soc_S_radio_41008000_S_ieee802154
 *
 * Binding (compatible = nordic,nrf-ieee802154):
 *   $ZEPHYR_BASE\dts\bindings\ieee802154\nordic,nrf-ieee802154.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_PATH "/soc/radio@41008000/ieee802154"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_FULL_NAME "ieee802154"

/* Node parent (/soc/radio@41008000) identifier: */
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_PARENT DT_N_S_soc_S_radio_41008000

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_NODELABEL_NUM 1
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_FOREACH_NODELABEL(fn) fn(ieee802154)
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_FOREACH_NODELABEL_VARGS(fn, ...) fn(ieee802154, __VA_ARGS__)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_CHILD_NUM 0
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_ORD 59
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_ORD_STR_SORTABLE 00059

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_REQUIRES_ORDS \
	56, /* /soc/radio@41008000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_EXISTS 1
#define DT_N_INST_0_nordic_nrf_ieee802154 DT_N_S_soc_S_radio_41008000_S_ieee802154
#define DT_N_NODELABEL_ieee802154         DT_N_S_soc_S_radio_41008000_S_ieee802154

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_REG_NUM 0
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_RANGES_NUM 0
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_IRQ_NUM 0
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_IRQ_LEVEL 0
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_COMPAT_MATCHES_nordic_nrf_ieee802154 1
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_COMPAT_MODEL_IDX_0 "nrf-ieee802154"
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_wakeup_source 0
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status "disabled"
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_41008000_S_ieee802154, status, 0)
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_41008000_S_ieee802154, status, 0)
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_41008000_S_ieee802154, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_41008000_S_ieee802154, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status_LEN 1
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_status_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_compatible {"nordic,nrf-ieee802154"}
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_compatible_IDX_0 "nordic,nrf-ieee802154"
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-ieee802154
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_ieee802154
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_IEEE802154
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_41008000_S_ieee802154, compatible, 0)
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_41008000_S_ieee802154, compatible, 0)
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_41008000_S_ieee802154, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_41008000_S_ieee802154, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_compatible_LEN 1
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_compatible_EXISTS 1
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_radio_41008000_S_ieee802154_P_zephyr_deferred_init_EXISTS 1

/*
 * Chosen nodes
 */
#define DT_CHOSEN_zephyr_bt_hci                  DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc
#define DT_CHOSEN_zephyr_bt_hci_EXISTS           1
#define DT_CHOSEN_zephyr_entropy                 DT_N_S_soc_S_random_41009000
#define DT_CHOSEN_zephyr_entropy_EXISTS          1
#define DT_CHOSEN_zephyr_flash_controller        DT_N_S_soc_S_flash_controller_41080000
#define DT_CHOSEN_zephyr_flash_controller_EXISTS 1
#define DT_CHOSEN_zephyr_sram                    DT_N_S_soc_S_memory_21000000
#define DT_CHOSEN_zephyr_sram_EXISTS             1
#define DT_CHOSEN_zephyr_flash                   DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000
#define DT_CHOSEN_zephyr_flash_EXISTS            1
#define DT_CHOSEN_zephyr_bt_hci_ipc              DT_N_S_ipc_S_ipc0
#define DT_CHOSEN_zephyr_bt_hci_ipc_EXISTS       1
#define DT_CHOSEN_zephyr_ipc_shm                 DT_N_S_reserved_memory_S_memory_20078000
#define DT_CHOSEN_zephyr_ipc_shm_EXISTS          1

/* Macros for iterating over all nodes and enabled nodes */
#define DT_FOREACH_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_ficr_1ff0000) fn(DT_N_S_soc_S_uicr_1ff8000) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_memory_21000000) fn(DT_N_S_soc_S_clock_41005000) fn(DT_N_S_soc_S_power_41005000) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520) fn(DT_N_S_soc_S_radio_41008000) fn(DT_N_S_soc_S_radio_41008000_S_ieee802154) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller) fn(DT_N_S_soc_S_random_41009000) fn(DT_N_S_soc_S_gpiote_4100a000) fn(DT_N_S_soc_S_watchdog_4100b000) fn(DT_N_S_soc_S_timer_4100c000) fn(DT_N_S_soc_S_ecb_4100d000) fn(DT_N_S_soc_S_ccm_4100e000) fn(DT_N_S_soc_S_dppic_4100f000) fn(DT_N_S_soc_S_temp_41010000) fn(DT_N_S_soc_S_rtc_41011000) fn(DT_N_S_soc_S_mbox_41012000) fn(DT_N_S_soc_S_i2c_41013000) fn(DT_N_S_soc_S_spi_41013000) fn(DT_N_S_soc_S_uart_41013000) fn(DT_N_S_soc_S_egu_41014000) fn(DT_N_S_soc_S_rtc_41016000) fn(DT_N_S_soc_S_timer_41018000) fn(DT_N_S_soc_S_timer_41019000) fn(DT_N_S_soc_S_swi_4101a000) fn(DT_N_S_soc_S_swi_4101b000) fn(DT_N_S_soc_S_swi_4101c000) fn(DT_N_S_soc_S_swi_4101d000) fn(DT_N_S_soc_S_acl_41080000) fn(DT_N_S_soc_S_flash_controller_41080000) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000) fn(DT_N_S_soc_S_vmc_41081000) fn(DT_N_S_soc_S_gpio_418c0500) fn(DT_N_S_soc_S_gpio_418c0800) fn(DT_N_S_pin_controller) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_sw_pwm) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_1) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90) fn(DT_N_S_ipc) fn(DT_N_S_ipc_S_ipc0) fn(DT_N_S_reserved_memory) fn(DT_N_S_reserved_memory_S_memory_20078000)
#define DT_FOREACH_OKAY_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_ficr_1ff0000) fn(DT_N_S_soc_S_uicr_1ff8000) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_memory_21000000) fn(DT_N_S_soc_S_clock_41005000) fn(DT_N_S_soc_S_power_41005000) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520) fn(DT_N_S_soc_S_radio_41008000) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc) fn(DT_N_S_soc_S_random_41009000) fn(DT_N_S_soc_S_gpiote_4100a000) fn(DT_N_S_soc_S_watchdog_4100b000) fn(DT_N_S_soc_S_timer_4100c000) fn(DT_N_S_soc_S_ecb_4100d000) fn(DT_N_S_soc_S_ccm_4100e000) fn(DT_N_S_soc_S_dppic_4100f000) fn(DT_N_S_soc_S_temp_41010000) fn(DT_N_S_soc_S_mbox_41012000) fn(DT_N_S_soc_S_egu_41014000) fn(DT_N_S_soc_S_timer_41018000) fn(DT_N_S_soc_S_timer_41019000) fn(DT_N_S_soc_S_swi_4101a000) fn(DT_N_S_soc_S_swi_4101b000) fn(DT_N_S_soc_S_swi_4101c000) fn(DT_N_S_soc_S_swi_4101d000) fn(DT_N_S_soc_S_acl_41080000) fn(DT_N_S_soc_S_flash_controller_41080000) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000) fn(DT_N_S_soc_S_vmc_41081000) fn(DT_N_S_soc_S_gpio_418c0500) fn(DT_N_S_soc_S_gpio_418c0800) fn(DT_N_S_pin_controller) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_1) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90) fn(DT_N_S_ipc) fn(DT_N_S_ipc_S_ipc0) fn(DT_N_S_reserved_memory) fn(DT_N_S_reserved_memory_S_memory_20078000)
#define DT_FOREACH_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_1ff0000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_1ff8000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_21000000, __VA_ARGS__) fn(DT_N_S_soc_S_clock_41005000, __VA_ARGS__) fn(DT_N_S_soc_S_power_41005000, __VA_ARGS__) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c, __VA_ARGS__) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520, __VA_ARGS__) fn(DT_N_S_soc_S_radio_41008000, __VA_ARGS__) fn(DT_N_S_soc_S_radio_41008000_S_ieee802154, __VA_ARGS__) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, __VA_ARGS__) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_controller, __VA_ARGS__) fn(DT_N_S_soc_S_random_41009000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_4100a000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_4100b000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_4100c000, __VA_ARGS__) fn(DT_N_S_soc_S_ecb_4100d000, __VA_ARGS__) fn(DT_N_S_soc_S_ccm_4100e000, __VA_ARGS__) fn(DT_N_S_soc_S_dppic_4100f000, __VA_ARGS__) fn(DT_N_S_soc_S_temp_41010000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_41011000, __VA_ARGS__) fn(DT_N_S_soc_S_mbox_41012000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_41013000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_41013000, __VA_ARGS__) fn(DT_N_S_soc_S_uart_41013000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_41014000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_41016000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_41018000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_41019000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101a000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101b000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101c000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101d000, __VA_ARGS__) fn(DT_N_S_soc_S_acl_41080000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000, __VA_ARGS__) fn(DT_N_S_soc_S_vmc_41081000, __VA_ARGS__) fn(DT_N_S_soc_S_gpio_418c0500, __VA_ARGS__) fn(DT_N_S_soc_S_gpio_418c0800, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_sw_pwm, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_1, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90, __VA_ARGS__) fn(DT_N_S_ipc, __VA_ARGS__) fn(DT_N_S_ipc_S_ipc0, __VA_ARGS__) fn(DT_N_S_reserved_memory, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_memory_20078000, __VA_ARGS__)
#define DT_FOREACH_OKAY_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_1ff0000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_1ff8000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_21000000, __VA_ARGS__) fn(DT_N_S_soc_S_clock_41005000, __VA_ARGS__) fn(DT_N_S_soc_S_power_41005000, __VA_ARGS__) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c, __VA_ARGS__) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520, __VA_ARGS__) fn(DT_N_S_soc_S_radio_41008000, __VA_ARGS__) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, __VA_ARGS__) fn(DT_N_S_soc_S_random_41009000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_4100a000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_4100b000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_4100c000, __VA_ARGS__) fn(DT_N_S_soc_S_ecb_4100d000, __VA_ARGS__) fn(DT_N_S_soc_S_ccm_4100e000, __VA_ARGS__) fn(DT_N_S_soc_S_dppic_4100f000, __VA_ARGS__) fn(DT_N_S_soc_S_temp_41010000, __VA_ARGS__) fn(DT_N_S_soc_S_mbox_41012000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_41014000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_41018000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_41019000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101a000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101b000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101c000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101d000, __VA_ARGS__) fn(DT_N_S_soc_S_acl_41080000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000, __VA_ARGS__) fn(DT_N_S_soc_S_vmc_41081000, __VA_ARGS__) fn(DT_N_S_soc_S_gpio_418c0500, __VA_ARGS__) fn(DT_N_S_soc_S_gpio_418c0800, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_1, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90, __VA_ARGS__) fn(DT_N_S_ipc, __VA_ARGS__) fn(DT_N_S_ipc_S_ipc0, __VA_ARGS__) fn(DT_N_S_reserved_memory, __VA_ARGS__) fn(DT_N_S_reserved_memory_S_memory_20078000, __VA_ARGS__)
#define DT_COMPAT_fixed_partitions_LABEL_external_flash DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_0
#define DT_COMPAT_fixed_partitions_LABEL_external_flash_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_settings_storage DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_eccc00
#define DT_COMPAT_fixed_partitions_LABEL_settings_storage_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_mcuboot_secondary DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_ed0000
#define DT_COMPAT_fixed_partitions_LABEL_mcuboot_secondary_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_mcuboot_secondary_1 DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions_S_partition_fc0000
#define DT_COMPAT_fixed_partitions_LABEL_mcuboot_secondary_1_EXISTS 1

/*
 * Macros for compatibles with status "okay" nodes
 */
#define DT_COMPAT_HAS_OKAY_corp_my_nrf5340_nrf5340_cpunet 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf5340_cpunet_qkaa 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf5340_cpunet 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf53 1
#define DT_COMPAT_HAS_OKAY_simple_bus 1
#define DT_COMPAT_HAS_OKAY_arm_v8m_nvic 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_ficr 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_uicr 1
#define DT_COMPAT_HAS_OKAY_mmio_sram 1
#define DT_COMPAT_HAS_OKAY_zephyr_memory_region 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_clock 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_power 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpregret 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_radio 1
#define DT_COMPAT_HAS_OKAY_nordic_bt_hci_sdc 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_rng 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpiote 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_wdt 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_timer 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_ecb 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_ccm 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_dppic 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_temp 1
#define DT_COMPAT_HAS_OKAY_nordic_mbox_nrf_ipc 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_ipc 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_egu 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_swi 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_acl 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf53_flash_controller 1
#define DT_COMPAT_HAS_OKAY_soc_nv_flash 1
#define DT_COMPAT_HAS_OKAY_fixed_partitions 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_vmc 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpio 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_pinctrl 1
#define DT_COMPAT_HAS_OKAY_zephyr_bt_hci_entropy 1
#define DT_COMPAT_HAS_OKAY_arm_cortex_m33 1
#define DT_COMPAT_HAS_OKAY_arm_armv8m_mpu 1
#define DT_COMPAT_HAS_OKAY_zephyr_ipc_openamp_static_vrings 1

/*
 * Macros for status "okay" instances of each compatible
 */
#define DT_N_INST_corp_my_nrf5340_nrf5340_cpunet_NUM_OKAY 1
#define DT_N_INST_nordic_nrf5340_cpunet_qkaa_NUM_OKAY 1
#define DT_N_INST_nordic_nrf5340_cpunet_NUM_OKAY 1
#define DT_N_INST_nordic_nrf53_NUM_OKAY 1
#define DT_N_INST_simple_bus_NUM_OKAY 1
#define DT_N_INST_arm_v8m_nvic_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_ficr_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_uicr_NUM_OKAY 1
#define DT_N_INST_mmio_sram_NUM_OKAY 2
#define DT_N_INST_zephyr_memory_region_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_clock_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_power_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_gpregret_NUM_OKAY 2
#define DT_N_INST_nordic_nrf_radio_NUM_OKAY 1
#define DT_N_INST_nordic_bt_hci_sdc_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_rng_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_gpiote_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_wdt_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_timer_NUM_OKAY 3
#define DT_N_INST_nordic_nrf_ecb_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_ccm_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_dppic_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_temp_NUM_OKAY 1
#define DT_N_INST_nordic_mbox_nrf_ipc_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_ipc_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_egu_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_swi_NUM_OKAY 4
#define DT_N_INST_nordic_nrf_acl_NUM_OKAY 1
#define DT_N_INST_nordic_nrf53_flash_controller_NUM_OKAY 1
#define DT_N_INST_soc_nv_flash_NUM_OKAY 1
#define DT_N_INST_fixed_partitions_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_vmc_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_gpio_NUM_OKAY 2
#define DT_N_INST_nordic_nrf_pinctrl_NUM_OKAY 1
#define DT_N_INST_zephyr_bt_hci_entropy_NUM_OKAY 1
#define DT_N_INST_arm_cortex_m33_NUM_OKAY 1
#define DT_N_INST_arm_armv8m_mpu_NUM_OKAY 1
#define DT_N_INST_zephyr_ipc_openamp_static_vrings_NUM_OKAY 1
#define DT_FOREACH_OKAY_corp_my_nrf5340_nrf5340_cpunet(fn) fn(DT_N)
#define DT_FOREACH_OKAY_VARGS_corp_my_nrf5340_nrf5340_cpunet(fn, ...) fn(DT_N, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_corp_my_nrf5340_nrf5340_cpunet(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_corp_my_nrf5340_nrf5340_cpunet(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf5340_cpunet_qkaa(fn) fn(DT_N_S_soc)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf5340_cpunet_qkaa(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf5340_cpunet_qkaa(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf5340_cpunet_qkaa(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf5340_cpunet(fn) fn(DT_N_S_soc)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf5340_cpunet(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf5340_cpunet(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf5340_cpunet(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf53(fn) fn(DT_N_S_soc)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf53(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf53(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf53(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_simple_bus(fn) fn(DT_N_S_soc)
#define DT_FOREACH_OKAY_VARGS_simple_bus(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_simple_bus(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_simple_bus(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_arm_v8m_nvic(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100)
#define DT_FOREACH_OKAY_VARGS_arm_v8m_nvic(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_arm_v8m_nvic(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_arm_v8m_nvic(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_ficr(fn) fn(DT_N_S_soc_S_ficr_1ff0000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ficr(fn, ...) fn(DT_N_S_soc_S_ficr_1ff0000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_ficr(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ficr(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_uicr(fn) fn(DT_N_S_soc_S_uicr_1ff8000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_uicr(fn, ...) fn(DT_N_S_soc_S_uicr_1ff8000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_uicr(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_uicr(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_mmio_sram(fn) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_memory_21000000)
#define DT_FOREACH_OKAY_VARGS_mmio_sram(fn, ...) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_21000000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_mmio_sram(fn) fn(0) fn(1)
#define DT_FOREACH_OKAY_INST_VARGS_mmio_sram(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__)
#define DT_FOREACH_OKAY_zephyr_memory_region(fn) fn(DT_N_S_soc_S_memory_21000000)
#define DT_FOREACH_OKAY_VARGS_zephyr_memory_region(fn, ...) fn(DT_N_S_soc_S_memory_21000000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_zephyr_memory_region(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_zephyr_memory_region(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_clock(fn) fn(DT_N_S_soc_S_clock_41005000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_clock(fn, ...) fn(DT_N_S_soc_S_clock_41005000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_clock(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_clock(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_power(fn) fn(DT_N_S_soc_S_power_41005000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_power(fn, ...) fn(DT_N_S_soc_S_power_41005000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_power(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_power(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_gpregret(fn) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_gpregret(fn, ...) fn(DT_N_S_soc_S_power_41005000_S_gpregret1_4100551c, __VA_ARGS__) fn(DT_N_S_soc_S_power_41005000_S_gpregret2_41005520, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_gpregret(fn) fn(0) fn(1)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_gpregret(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_radio(fn) fn(DT_N_S_soc_S_radio_41008000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_radio(fn, ...) fn(DT_N_S_soc_S_radio_41008000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_radio(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_radio(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_bt_hci_sdc(fn) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc)
#define DT_FOREACH_OKAY_VARGS_nordic_bt_hci_sdc(fn, ...) fn(DT_N_S_soc_S_radio_41008000_S_bt_hci_sdc, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_bt_hci_sdc(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_bt_hci_sdc(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_rng(fn) fn(DT_N_S_soc_S_random_41009000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_rng(fn, ...) fn(DT_N_S_soc_S_random_41009000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_rng(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_rng(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_gpiote(fn) fn(DT_N_S_soc_S_gpiote_4100a000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_gpiote(fn, ...) fn(DT_N_S_soc_S_gpiote_4100a000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_gpiote(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_gpiote(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_wdt(fn) fn(DT_N_S_soc_S_watchdog_4100b000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_wdt(fn, ...) fn(DT_N_S_soc_S_watchdog_4100b000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_wdt(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_wdt(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_timer(fn) fn(DT_N_S_soc_S_timer_4100c000) fn(DT_N_S_soc_S_timer_41018000) fn(DT_N_S_soc_S_timer_41019000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_timer(fn, ...) fn(DT_N_S_soc_S_timer_4100c000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_41018000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_41019000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_timer(fn) fn(0) fn(1) fn(2)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_timer(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_ecb(fn) fn(DT_N_S_soc_S_ecb_4100d000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ecb(fn, ...) fn(DT_N_S_soc_S_ecb_4100d000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_ecb(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ecb(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_ccm(fn) fn(DT_N_S_soc_S_ccm_4100e000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ccm(fn, ...) fn(DT_N_S_soc_S_ccm_4100e000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_ccm(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ccm(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_dppic(fn) fn(DT_N_S_soc_S_dppic_4100f000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_dppic(fn, ...) fn(DT_N_S_soc_S_dppic_4100f000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_dppic(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_dppic(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_temp(fn) fn(DT_N_S_soc_S_temp_41010000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_temp(fn, ...) fn(DT_N_S_soc_S_temp_41010000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_temp(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_temp(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_mbox_nrf_ipc(fn) fn(DT_N_S_soc_S_mbox_41012000)
#define DT_FOREACH_OKAY_VARGS_nordic_mbox_nrf_ipc(fn, ...) fn(DT_N_S_soc_S_mbox_41012000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_mbox_nrf_ipc(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_mbox_nrf_ipc(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_ipc(fn) fn(DT_N_S_soc_S_mbox_41012000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ipc(fn, ...) fn(DT_N_S_soc_S_mbox_41012000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_ipc(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ipc(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_egu(fn) fn(DT_N_S_soc_S_egu_41014000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_egu(fn, ...) fn(DT_N_S_soc_S_egu_41014000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_egu(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_egu(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_swi(fn) fn(DT_N_S_soc_S_swi_4101a000) fn(DT_N_S_soc_S_swi_4101b000) fn(DT_N_S_soc_S_swi_4101c000) fn(DT_N_S_soc_S_swi_4101d000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_swi(fn, ...) fn(DT_N_S_soc_S_swi_4101a000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101b000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101c000, __VA_ARGS__) fn(DT_N_S_soc_S_swi_4101d000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_swi(fn) fn(0) fn(1) fn(2) fn(3)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_swi(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) fn(3, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_acl(fn) fn(DT_N_S_soc_S_acl_41080000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_acl(fn, ...) fn(DT_N_S_soc_S_acl_41080000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_acl(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_acl(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf53_flash_controller(fn) fn(DT_N_S_soc_S_flash_controller_41080000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf53_flash_controller(fn, ...) fn(DT_N_S_soc_S_flash_controller_41080000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf53_flash_controller(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf53_flash_controller(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_soc_nv_flash(fn) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000)
#define DT_FOREACH_OKAY_VARGS_soc_nv_flash(fn, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_soc_nv_flash(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_soc_nv_flash(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_fixed_partitions(fn) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions)
#define DT_FOREACH_OKAY_VARGS_fixed_partitions(fn, ...) fn(DT_N_S_soc_S_flash_controller_41080000_S_flash_1000000_S_partitions, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_fixed_partitions(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_fixed_partitions(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_vmc(fn) fn(DT_N_S_soc_S_vmc_41081000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_vmc(fn, ...) fn(DT_N_S_soc_S_vmc_41081000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_vmc(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_vmc(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_gpio(fn) fn(DT_N_S_soc_S_gpio_418c0500) fn(DT_N_S_soc_S_gpio_418c0800)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_gpio(fn, ...) fn(DT_N_S_soc_S_gpio_418c0500, __VA_ARGS__) fn(DT_N_S_soc_S_gpio_418c0800, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_gpio(fn) fn(0) fn(1)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_gpio(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_pinctrl(fn) fn(DT_N_S_pin_controller)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_pinctrl(fn, ...) fn(DT_N_S_pin_controller, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_pinctrl(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_pinctrl(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_zephyr_bt_hci_entropy(fn) fn(DT_N_S_entropy_bt_hci)
#define DT_FOREACH_OKAY_VARGS_zephyr_bt_hci_entropy(fn, ...) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_zephyr_bt_hci_entropy(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_zephyr_bt_hci_entropy(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_arm_cortex_m33(fn) fn(DT_N_S_cpus_S_cpu_1)
#define DT_FOREACH_OKAY_VARGS_arm_cortex_m33(fn, ...) fn(DT_N_S_cpus_S_cpu_1, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_arm_cortex_m33(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_arm_cortex_m33(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_arm_armv8m_mpu(fn) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90)
#define DT_FOREACH_OKAY_VARGS_arm_armv8m_mpu(fn, ...) fn(DT_N_S_cpus_S_cpu_1_S_mpu_e000ed90, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_arm_armv8m_mpu(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_arm_armv8m_mpu(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_zephyr_ipc_openamp_static_vrings(fn) fn(DT_N_S_ipc_S_ipc0)
#define DT_FOREACH_OKAY_VARGS_zephyr_ipc_openamp_static_vrings(fn, ...) fn(DT_N_S_ipc_S_ipc0, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_zephyr_ipc_openamp_static_vrings(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_zephyr_ipc_openamp_static_vrings(fn, ...) fn(0, __VA_ARGS__)

/*
 * Bus information for status "okay" nodes of each compatible
 */
