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fixed_armv4.h
1 /* Copyright (C) 2013 Xiph.Org Foundation and contributors */
2 /*
3  Redistribution and use in source and binary forms, with or without
4  modification, are permitted provided that the following conditions
5  are met:
6 
7  - Redistributions of source code must retain the above copyright
8  notice, this list of conditions and the following disclaimer.
9 
10  - Redistributions in binary form must reproduce the above copyright
11  notice, this list of conditions and the following disclaimer in the
12  documentation and/or other materials provided with the distribution.
13 
14  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
15  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
16  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
17  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
18  OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
21  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
22  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
23  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
24  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26 
27 #ifndef FIXED_ARMv4_H
28 #define FIXED_ARMv4_H
29 
31 #undef MULT16_32_Q16
32 static OPUS_INLINE opus_val32 MULT16_32_Q16_armv4(opus_val16 a, opus_val32 b)
33 {
34  unsigned rd_lo;
35  int rd_hi;
36 
37 #if defined( __CC_ARM )
38  __asm{ SMULL rd_lo, rd_hi, b, (SHL32(a,16)) }
39 #elif defined( __ICCARM__ )
40  __asm(
41  "smull %0, %1, %2, %3\n\t"
42  : "=&r"(rd_lo), "=&r"(rd_hi)
43  : "r"(b),"r"(SHL32(a,16))
44  );
45  (void)(rd_lo);
46 #else
47  __asm__(
48  "#MULT16_32_Q16\n\t"
49  "smull %0, %1, %2, %3\n\t"
50  : "=&r"(rd_lo), "=&r"(rd_hi)
51  : "%r"(b),"r"(SHL32(a,16))
52  );
53 #endif
54 
55  return rd_hi;
56 }
57 #define MULT16_32_Q16(a, b) (MULT16_32_Q16_armv4(a, b))
58 
59 
61 #undef MULT16_32_Q15
62 static OPUS_INLINE opus_val32 MULT16_32_Q15_armv4(opus_val16 a, opus_val32 b)
63 {
64  unsigned rd_lo;
65  int rd_hi;
66 
67 #if defined( __CC_ARM )
68  __asm{ SMULL rd_lo, rd_hi, b, (SHL32(a,16)) }
69 #elif defined( __ICCARM__ )
70  __asm(
71  "smull %0, %1, %2, %3\n\t"
72  : "=&r"(rd_lo), "=&r"(rd_hi)
73  : "r"(b), "r"(SHL32(a,16))
74  );
75  (void)(rd_lo);
76 #else
77  __asm__(
78  "#MULT16_32_Q15\n\t"
79  "smull %0, %1, %2, %3\n\t"
80  : "=&r"(rd_lo), "=&r"(rd_hi)
81  : "%r"(b), "r"(SHL32(a,16))
82  );
83 #endif
84 
85  /*We intentionally don't OR in the high bit of rd_lo for speed.*/
86  return SHL32(rd_hi,1);
87 }
88 #define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv4(a, b))
89 
90 
94 #undef MAC16_32_Q15
95 #define MAC16_32_Q15(c, a, b) ADD32(c, MULT16_32_Q15(a, b))
96 
99 #undef MAC16_32_Q16
100 #define MAC16_32_Q16(c, a, b) ADD32(c, MULT16_32_Q16(a, b))
101 
103 #undef MULT32_32_Q31
104 #define MULT32_32_Q31(a,b) (opus_val32)((((opus_int64)(a)) * ((opus_int64)(b)))>>31)
105 
106 #endif