30 #ifndef FIXED_ARMv5E_H
31 #define FIXED_ARMv5E_H
33 #include "fixed_armv4.h"
37 static OPUS_INLINE opus_val32 MULT16_32_Q16_armv5e(opus_val16 a, opus_val32 b)
41 #if defined( __CC_ARM )
42 __asm{ SMULWB res, b, a }
43 #elif defined( __ICCARM__ )
45 "smulwb %0, %1, %2\n\t"
52 "smulwb %0, %1, %2\n\t"
60 #define MULT16_32_Q16(a, b) (MULT16_32_Q16_armv5e(a, b))
65 static OPUS_INLINE opus_val32 MULT16_32_Q15_armv5e(opus_val16 a, opus_val32 b)
69 #if defined( __CC_ARM )
70 __asm{ SMULWB res, b, a }
71 #elif defined( __ICCARM__ )
73 "smulwb %0, %1, %2\n\t"
80 "smulwb %0, %1, %2\n\t"
88 #define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv5e(a, b))
95 static OPUS_INLINE opus_val32 MAC16_32_Q15_armv5e(opus_val32 c, opus_val16 a,
100 #if defined( __CC_ARM )
101 __asm{ SMLAWB res, (SHL32(b,1)), a, c }
102 #elif defined( __ICCARM__ )
104 "smlawb %0, %1, %2, %3;\n"
106 :
"r"(SHL32(b,1)),
"r"(a),
"r"(c)
111 "smlawb %0, %1, %2, %3;\n"
113 :
"r"(SHL32(b,1)),
"r"(a),
"r"(c)
119 #define MAC16_32_Q15(c, a, b) (MAC16_32_Q15_armv5e(c, a, b))
124 static OPUS_INLINE opus_val32 MAC16_32_Q16_armv5e(opus_val32 c, opus_val16 a,
129 #if defined( __CC_ARM )
130 __asm{ SMLAWB res, b, a, c }
131 #elif defined( __ICCARM__ )
133 "smlawb %0, %1, %2, %3;\n"
135 :
"r"(b),
"r"(a),
"r"(c)
140 "smlawb %0, %1, %2, %3;\n"
142 :
"r"(b),
"r"(a),
"r"(c)
148 #define MAC16_32_Q16(c, a, b) (MAC16_32_Q16_armv5e(c, a, b))
152 static OPUS_INLINE opus_val32 MAC16_16_armv5e(opus_val32 c, opus_val16 a,
157 #if defined( __CC_ARM )
158 __asm{ SMLABB res, a, b, c }
159 #elif defined( __ICCARM__ )
161 "smlabb %0, %1, %2, %3;\n"
163 :
"r"(a),
"r"(b),
"r"(c)
168 "smlabb %0, %1, %2, %3;\n"
170 :
"r"(a),
"r"(b),
"r"(c)
176 #define MAC16_16(c, a, b) (MAC16_16_armv5e(c, a, b))
180 static OPUS_INLINE opus_val32 MULT16_16_armv5e(opus_val16 a, opus_val16 b)
183 #if defined( __CC_ARM )
184 __asm{ SMULBB res, a, b }
185 #elif defined( __ICCARM__ )
187 "smulbb %0, %1, %2;\n"
194 "smulbb %0, %1, %2;\n"
202 #define MULT16_16(a, b) (MULT16_16_armv5e(a, b))
204 #ifdef OPUS_ARM_INLINE_MEDIA
207 static OPUS_INLINE opus_val16 SIG2WORD16_armv6(opus_val32 x)
211 #if defined( __CC_ARM )
212 __asm{ SSAT res, 16, (x+2048), ASR 12 }
213 #elif defined( __ICCARM__ )
215 "ssat %0, #16, %1, ASR #12\n\t"
222 "ssat %0, #16, %1, ASR #12\n\t"
228 return EXTRACT16(res);
230 #define SIG2WORD16(x) (SIG2WORD16_armv6(x))