# 0 "C:/ncs/v2.6.1/zephyr/misc/empty_file.c"
# 0 "<built-in>"
# 0 "<command-line>"
# 1 "C:/ncs/v2.6.1/zephyr/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_cpunet.dts" 1






/dts-v1/;
# 1 "C:/ncs/v2.6.1/zephyr/dts/arm/nordic/nrf5340_cpunet_qkaa.dtsi" 1 3 4






# 1 "C:/ncs/v2.6.1/zephyr/dts/common/mem.h" 1 3 4
# 8 "C:/ncs/v2.6.1/zephyr/dts/arm/nordic/nrf5340_cpunet_qkaa.dtsi" 2 3 4
# 1 "C:/ncs/v2.6.1/zephyr/dts/arm/nordic/nrf5340_cpunet.dtsi" 1 3 4






# 1 "C:/ncs/v2.6.1/zephyr/dts/arm/armv8-m.dtsi" 1 3 4


# 1 "C:/ncs/v2.6.1/zephyr/dts/common/skeleton.dtsi" 1 3 4
# 9 "C:/ncs/v2.6.1/zephyr/dts/common/skeleton.dtsi" 3 4
/ {
 #address-cells = <1>;
 #size-cells = <1>;
 chosen { };
 aliases { };
};
# 4 "C:/ncs/v2.6.1/zephyr/dts/arm/armv8-m.dtsi" 2 3 4

/ {
 soc {
  #address-cells = <1>;
  #size-cells = <1>;
  compatible = "simple-bus";
  interrupt-parent = <&nvic>;
  ranges;

  nvic: interrupt-controller@e000e100 {
   #address-cells = <1>;
   compatible = "arm,v8m-nvic";
   reg = <0xe000e100 0xc00>;
   interrupt-controller;
   #interrupt-cells = <2>;
  };

  systick: timer@e000e010 {
   compatible = "arm,armv8m-systick";
   reg = <0xe000e010 0x10>;
  };
 };
};
# 8 "C:/ncs/v2.6.1/zephyr/dts/arm/nordic/nrf5340_cpunet.dtsi" 2 3 4
# 1 "C:/ncs/v2.6.1/zephyr/dts/common/nordic/nrf_common.dtsi" 1 3 4






# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/dt-bindings/adc/adc.h" 1 3 4
# 8 "C:/ncs/v2.6.1/zephyr/dts/common/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/dt-bindings/adc/nrf-adc.h" 1 3 4
# 10 "C:/ncs/v2.6.1/zephyr/include/zephyr/dt-bindings/adc/nrf-adc.h" 3 4
# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/dt-bindings/dt-util.h" 1 3 4
# 19 "C:/ncs/v2.6.1/zephyr/include/zephyr/dt-bindings/dt-util.h" 3 4
# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_macro.h" 1 3 4
# 34 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_macro.h" 3 4
# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_internal.h" 1 3 4
# 18 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_internal.h" 3 4
# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_loops.h" 1 3 4
# 1083 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_loops.h" 3 4
# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_listify.h" 1 3 4
# 1084 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_loops.h" 2 3 4
# 19 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_internal.h" 2 3 4
# 153 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_internal.h" 3 4
# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_internal_is_eq.h" 1 3 4
# 154 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_internal.h" 2 3 4
# 184 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_internal.h" 3 4
# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_internal_util_inc.h" 1 3 4
# 185 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_internal.h" 2 3 4


# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_internal_util_dec.h" 1 3 4
# 188 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_internal.h" 2 3 4


# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_internal_util_x2.h" 1 3 4
# 191 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_internal.h" 2 3 4
# 35 "C:/ncs/v2.6.1/zephyr/include/zephyr/sys/util_macro.h" 2 3 4
# 20 "C:/ncs/v2.6.1/zephyr/include/zephyr/dt-bindings/dt-util.h" 2 3 4
# 11 "C:/ncs/v2.6.1/zephyr/include/zephyr/dt-bindings/adc/nrf-adc.h" 2 3 4
# 9 "C:/ncs/v2.6.1/zephyr/dts/common/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/dt-bindings/gpio/gpio.h" 1 3 4
# 10 "C:/ncs/v2.6.1/zephyr/dts/common/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/dt-bindings/i2c/i2c.h" 1 3 4
# 11 "C:/ncs/v2.6.1/zephyr/dts/common/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/dt-bindings/input/input-event-codes.h" 1 3 4
# 12 "C:/ncs/v2.6.1/zephyr/dts/common/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/dt-bindings/pinctrl/nrf-pinctrl.h" 1 3 4
# 13 "C:/ncs/v2.6.1/zephyr/dts/common/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.6.1/zephyr/include/zephyr/dt-bindings/pwm/pwm.h" 1 3 4
# 14 "C:/ncs/v2.6.1/zephyr/dts/common/nordic/nrf_common.dtsi" 2 3 4

# 1 "C:/ncs/v2.6.1/zephyr/dts/common/freq.h" 1 3 4
# 16 "C:/ncs/v2.6.1/zephyr/dts/common/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.6.1/zephyr/dts/arm/nordic/override.dtsi" 1 3 4
# 17 "C:/ncs/v2.6.1/zephyr/dts/common/nordic/nrf_common.dtsi" 2 3 4
# 25 "C:/ncs/v2.6.1/zephyr/dts/common/nordic/nrf_common.dtsi" 3 4
/ {
 pinctrl: pin-controller {




  compatible = "nordic,nrf-pinctrl";
 };

 rng_hci: entropy_bt_hci {
  compatible = "zephyr,bt-hci-entropy";
  status = "okay";
 };

 sw_pwm: sw-pwm {
  compatible = "nordic,nrf-sw-pwm";
  status = "disabled";
  generator = <&timer1>;
  clock-prescaler = <0>;
  #pwm-cells = <3>;
 };
};
# 9 "C:/ncs/v2.6.1/zephyr/dts/arm/nordic/nrf5340_cpunet.dtsi" 2 3 4

/ {
 chosen {
  zephyr,entropy = &rng;
  zephyr,flash-controller = &flash_controller;
 };

 cpus {
  #address-cells = <1>;
  #size-cells = <0>;

  cpu@1 {
   device_type = "cpu";
   compatible = "arm,cortex-m33";
   reg = <1>;
   #address-cells = <1>;
   #size-cells = <1>;

   mpu: mpu@e000ed90 {
    compatible = "arm,armv8m-mpu";
    reg = <0xe000ed90 0x40>;
   };
  };
 };

 soc {
  ficr: ficr@1ff0000 {
   compatible = "nordic,nrf-ficr";
   reg = <0x01ff0000 0x1000>;
   #nordic,ficr-cells = <1>;
   status = "okay";
  };

  uicr: uicr@1ff8000 {
   compatible = "nordic,nrf-uicr";
   reg = <0x01ff8000 0x1000>;
   status = "okay";
  };

  sram0: memory@20000000 {
   compatible = "mmio-sram";
  };

  sram1: memory@21000000 {
   compatible = "zephyr,memory-region", "mmio-sram";
   zephyr,memory-region = "SRAM1";
  };

  clock: clock@41005000 {
   compatible = "nordic,nrf-clock";
   reg = <0x41005000 0x1000>;
   interrupts = <5 1>;
   status = "okay";
  };

  power: power@41005000 {
   compatible = "nordic,nrf-power";
   reg = <0x41005000 0x1000>;
   interrupts = <5 1>;
   status = "okay";
   #address-cells = <1>;
   #size-cells = <1>;

   gpregret1: gpregret1@4100551c {
    #address-cells = <1>;
    #size-cells = <1>;
    compatible = "nordic,nrf-gpregret";
    reg = <0x4100551c 0x1>;
    status = "okay";
   };

   gpregret2: gpregret2@41005520 {
    #address-cells = <1>;
    #size-cells = <1>;
    compatible = "nordic,nrf-gpregret";
    reg = <0x41005520 0x1>;
    status = "okay";
   };
  };

  radio: radio@41008000 {
   compatible = "nordic,nrf-radio";
   reg = <0x41008000 0x1000>;
   interrupts = <8 1>;
   status = "okay";
   dfe-supported;
   ieee802154-supported;
   ble-2mbps-supported;
   ble-coded-phy-supported;

   ieee802154: ieee802154 {
    compatible = "nordic,nrf-ieee802154";
    status = "disabled";
   };
  };

  rng: random@41009000 {
   compatible = "nordic,nrf-rng";
   reg = <0x41009000 0x1000>;
   interrupts = <9 1>;
   status = "okay";
  };

  gpiote: gpiote0: gpiote@4100a000 {
   compatible = "nordic,nrf-gpiote";
   reg = <0x4100a000 0x1000>;
   interrupts = <10 5>;
   status = "disabled";
   instance = <0>;
  };

  wdt: wdt0: watchdog@4100b000 {
   compatible = "nordic,nrf-wdt";
   reg = <0x4100b000 0x1000>;
   interrupts = <11 1>;
   status = "okay";
  };

  timer0: timer@4100c000 {
   compatible = "nordic,nrf-timer";
   status = "disabled";
   reg = <0x4100c000 0x1000>;
   cc-num = <8>;
   max-bit-width = <32>;
   interrupts = <12 1>;
   prescaler = <0>;
  };

  ecb: ecb@4100d000 {
   compatible = "nordic,nrf-ecb";
   reg = <0x4100d000 0x1000>;
   interrupts = <13 1>;
   status = "okay";
  };

  ccm: ccm@4100e000 {
   compatible = "nordic,nrf-ccm";
   reg = <0x4100e000 0x1000>;
   interrupts = <14 1>;
   length-field-length-8-bits;
   headermask-supported;
   status = "okay";
  };

  dppic: dppic@4100f000 {
   compatible = "nordic,nrf-dppic";
   reg = <0x4100f000 0x1000>;
   status = "okay";
  };

  temp: temp@41010000 {
   compatible = "nordic,nrf-temp";
   reg = <0x41010000 0x1000>;
   interrupts = <16 1>;
   status = "okay";
  };

  rtc0: rtc@41011000 {
   compatible = "nordic,nrf-rtc";
   reg = <0x41011000 0x1000>;
   cc-num = <4>;
   interrupts = <17 1>;
   status = "disabled";
  };

  mbox: ipc: mbox@41012000 {
   compatible = "nordic,mbox-nrf-ipc", "nordic,nrf-ipc";
   reg = <0x41012000 0x1000>;
   tx-mask = <0x0000ffff>;
   rx-mask = <0x0000ffff>;
   interrupts = <18 1>;
   #mbox-cells = <1>;
   status = "okay";
  };

  i2c0: i2c@41013000 {






   compatible = "nordic,nrf-twim";
   #address-cells = <1>;
   #size-cells = <0>;
   reg = <0x41013000 0x1000>;
   clock-frequency = <100000>;
   interrupts = <19 1>;
   easydma-maxcnt-bits = <16>;
   status = "disabled";
  };

  spi0: spi@41013000 {






   compatible = "nordic,nrf-spim";
   #address-cells = <1>;
   #size-cells = <0>;
   reg = <0x41013000 0x1000>;
   interrupts = <19 1>;
   max-frequency = <((8) * 1000 * 1000)>;
   easydma-maxcnt-bits = <16>;
   status = "disabled";
  };

  uart0: uart@41013000 {
   compatible = "nordic,nrf-uarte";
   reg = <0x41013000 0x1000>;
   interrupts = <19 1>;
   status = "disabled";
  };

  egu0: egu@41014000 {
   compatible = "nordic,nrf-egu";
   reg = <0x41014000 0x1000>;
   interrupts = <20 1>;
   status = "okay";
  };

  rtc1: rtc@41016000 {
   compatible = "nordic,nrf-rtc";
   reg = <0x41016000 0x1000>;
   cc-num = <4>;
   interrupts = <22 1>;
   status = "disabled";
  };

  timer1: timer@41018000 {
   compatible = "nordic,nrf-timer";
   status = "disabled";
   reg = <0x41018000 0x1000>;
   cc-num = <8>;
   max-bit-width = <32>;
   interrupts = <24 1>;
   prescaler = <0>;
  };

  timer2: timer@41019000 {
   compatible = "nordic,nrf-timer";
   status = "disabled";
   reg = <0x41019000 0x1000>;
   cc-num = <8>;
   max-bit-width = <32>;
   interrupts = <25 1>;
   prescaler = <0>;
  };

  swi0: swi@4101a000 {
   compatible = "nordic,nrf-swi";
   reg = <0x4101a000 0x1000>;
   interrupts = <26 1>;
   status = "okay";
  };

  swi1: swi@4101b000 {
   compatible = "nordic,nrf-swi";
   reg = <0x4101b000 0x1000>;
   interrupts = <27 1>;
   status = "okay";
  };

  swi2: swi@4101c000 {
   compatible = "nordic,nrf-swi";
   reg = <0x4101c000 0x1000>;
   interrupts = <28 1>;
   status = "okay";
  };

  swi3: swi@4101d000 {
   compatible = "nordic,nrf-swi";
   reg = <0x4101d000 0x1000>;
   interrupts = <29 1>;
   status = "okay";
  };

  acl: acl@41080000 {
   compatible = "nordic,nrf-acl";
   reg = <0x41080000 0x1000>;
   status = "okay";
  };

  flash_controller: flash-controller@41080000 {
   compatible = "nordic,nrf53-flash-controller";
   reg = <0x41080000 0x1000>;
   partial-erase;

   #address-cells = <1>;
   #size-cells = <1>;


   flash1: flash@1000000 {
    compatible = "soc-nv-flash";
    erase-block-size = <2048>;
    write-block-size = <4>;
   };
  };

  vmc: vmc@41081000 {
   compatible = "nordic,nrf-vmc";
   reg = <0x41081000 0x1000>;
   status = "okay";
  };

  gpio0: gpio@418c0500 {
   compatible = "nordic,nrf-gpio";
   gpio-controller;
   reg = <0x418c0500 0x300>;
   #gpio-cells = <2>;
   status = "disabled";
   port = <0>;
   gpiote-instance = <&gpiote>;
  };

  gpio1: gpio@418c0800 {
   compatible = "nordic,nrf-gpio";
   gpio-controller;
   reg = <0x418c0800 0x300>;
   #gpio-cells = <2>;
   ngpios = <16>;
   status = "disabled";
   port = <1>;
   gpiote-instance = <&gpiote>;
  };
 };


 ipc {
  ipc0: ipc0 {
   compatible = "zephyr,ipc-openamp-static-vrings";
   memory-region = <&sram0_shared>;
   mboxes = <&mbox 0>, <&mbox 1>;
   mbox-names = "rx", "tx";
   role = "remote";
   status = "okay";
  };
 };
};

&nvic {
 arm,num-irq-priority-bits = <3>;
};

&systick {

 status = "disabled";
};
# 9 "C:/ncs/v2.6.1/zephyr/dts/arm/nordic/nrf5340_cpunet_qkaa.dtsi" 2 3 4

&flash1 {
 reg = <0x01000000 ((256) * 1024)>;
};

&sram0 {
 reg = <0x20000000 ((512) * 1024)>;
};

&sram1 {
 reg = <0x21000000 ((64) * 1024)>;
};

&mpu {
 arm,num-mpu-regions = <8>;
};

/ {
 soc {
  compatible = "nordic,nrf5340-cpunet-qkaa", "nordic,nrf5340-cpunet",
        "nordic,nrf53", "simple-bus";
 };
};
# 9 "C:/ncs/v2.6.1/zephyr/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_cpunet.dts" 2
# 1 "C:/ncs/v2.6.1/zephyr/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_cpunet-pinctrl.dtsi" 1





&pinctrl {
 uart0_default: uart0_default {
  group1 {
   psels = <((((((1) * 32U) + (9)) & 0x7FU) << 0U) | ((0U & 0xFFFFU) << 16U))>,
    <((((((1) * 32U) + (10)) & 0x7FU) << 0U) | ((2U & 0xFFFFU) << 16U))>;
  };
  group2 {
   psels = <((((((1) * 32U) + (8)) & 0x7FU) << 0U) | ((1U & 0xFFFFU) << 16U))>,
    <((((((1) * 32U) + (11)) & 0x7FU) << 0U) | ((3U & 0xFFFFU) << 16U))>;
   bias-pull-up;
  };
 };

 uart0_sleep: uart0_sleep {
  group1 {
   psels = <((((((1) * 32U) + (9)) & 0x7FU) << 0U) | ((0U & 0xFFFFU) << 16U))>,
    <((((((1) * 32U) + (8)) & 0x7FU) << 0U) | ((1U & 0xFFFFU) << 16U))>,
    <((((((1) * 32U) + (10)) & 0x7FU) << 0U) | ((2U & 0xFFFFU) << 16U))>,
    <((((((1) * 32U) + (11)) & 0x7FU) << 0U) | ((3U & 0xFFFFU) << 16U))>;
   low-power-enable;
  };
 };

 spi0_default: spi0_default {
  group1 {
   psels = <((((((0) * 32U) + (8)) & 0x7FU) << 0U) | ((4U & 0xFFFFU) << 16U))>,
    <((((((0) * 32U) + (10)) & 0x7FU) << 0U) | ((6U & 0xFFFFU) << 16U))>,
    <((((((0) * 32U) + (9)) & 0x7FU) << 0U) | ((5U & 0xFFFFU) << 16U))>;
  };
 };

 spi0_sleep: spi0_sleep {
  group1 {
   psels = <((((((0) * 32U) + (8)) & 0x7FU) << 0U) | ((4U & 0xFFFFU) << 16U))>,
    <((((((0) * 32U) + (10)) & 0x7FU) << 0U) | ((6U & 0xFFFFU) << 16U))>,
    <((((((0) * 32U) + (9)) & 0x7FU) << 0U) | ((5U & 0xFFFFU) << 16U))>;
   low-power-enable;
  };
 };

};
# 10 "C:/ncs/v2.6.1/zephyr/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_cpunet.dts" 2

/ {
 model = "Nordic nRF5340 Audio DK NRF5340 Network";
 compatible = "nordic,nrf5340-audio-dk-nrf5340-cpunet";

 chosen {
  zephyr,console = &uart0;
  zephyr,shell-uart = &uart0;
  zephyr,uart-mcumgr = &uart0;
  zephyr,bt-mon-uart = &uart0;
  zephyr,bt-c2h-uart = &uart0;
  zephyr,bt-hci-ipc = &ipc0;
  zephyr,sram = &sram1;
  zephyr,flash = &flash1;
  zephyr,code-partition = &slot0_partition;
  watchdog0 = &wdt0;
 };

 arduino_header: connector {
  compatible = "arduino-header-r3";
  #gpio-cells = <2>;
  gpio-map-mask = <0xffffffff 0xffffffc0>;
  gpio-map-pass-thru = <0 0x3f>;
  gpio-map = <0 0 &gpio0 4 0>,
      <1 0 &gpio0 5 0>,
      <2 0 &gpio0 6 0>,
      <3 0 &gpio0 7 0>,
      <4 0 &gpio0 25 0>,
      <5 0 &gpio0 26 0>,
      <6 0 &gpio1 9 0>,
      <7 0 &gpio1 8 0>,
      <8 0 &gpio0 31 0>,
      <9 0 &gpio1 0 0>,
      <10 0 &gpio1 1 0>,
      <11 0 &gpio1 14 0>,
      <12 0 &gpio1 7 0>,
      <13 0 &gpio1 11 0>,
      <14 0 &gpio1 10 0>,
      <15 0 &gpio1 13 0>,
      <16 0 &gpio1 12 0>,
      <17 0 &gpio0 9 0>,
      <18 0 &gpio0 10 0>,
      <19 0 &gpio0 8 0>,
      <20 0 &gpio1 2 0>,
      <21 0 &gpio1 3 0>;
 };

};

arduino_spi: &spi0 {
 compatible = "nordic,nrf-spim";


 cs-gpios = <&arduino_header 16 (1 << 0)>;
 pinctrl-0 = <&spi0_default>;
 pinctrl-1 = <&spi0_sleep>;
 pinctrl-names = "default", "sleep";
};

&gpiote {
 status = "okay";
};

&gpio0 {
 status = "okay";
};

&gpio1 {
 status = "okay";
};

&uart0 {
 status = "okay";
 current-speed = <115200>;
 pinctrl-0 = <&uart0_default>;
 pinctrl-1 = <&uart0_sleep>;
 pinctrl-names = "default", "sleep";
};

&flash1 {

 partitions {
  compatible = "fixed-partitions";
  #address-cells = <1>;
  #size-cells = <1>;

  boot_partition: partition@0 {
   label = "mcuboot";
   reg = <0x00000000 0xc000>;
  };
  slot0_partition: partition@c000 {
   label = "image-0";
   reg = <0x0000C000 0x12000>;
  };
  slot1_partition: partition@1e000 {
   label = "image-1";
   reg = <0x0001E000 0x12000>;
  };
  storage_partition: partition@3a000 {
   label = "storage";
   reg = <0x0003a000 0x6000>;
  };
 };
};


# 1 "C:/ncs/v2.6.1/zephyr/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_shared_sram_planning_conf.dtsi" 1
# 14 "C:/ncs/v2.6.1/zephyr/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_shared_sram_planning_conf.dtsi"
/ {
 chosen {

  zephyr,ipc_shm = &sram0_shared;
 };

 reserved-memory {
  #address-cells = <1>;
  #size-cells = <1>;
  ranges;

  sram0_shared: memory@20070000 {

   reg = <0x20070000 0x10000>;
  };
 };
};
# 117 "C:/ncs/v2.6.1/zephyr/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_cpunet.dts" 2
# 1 "C:/ncs/v2.6.1/zephyr/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_shared.dtsi" 1


/ {
 leds: leds {
  compatible = "gpio-leds";
  rgb1_red: led_0 {
   gpios = <&gpio0 7 (0 << 0)>;
   label = "0 LED_RGB_RED";
  };
  rgb1_green: led_1 {
   gpios = <&gpio0 25 (0 << 0)>;
   label = "0 LED_RGB_GREEN";
  };
  rgb1_blue: led_2 {
   gpios = <&gpio0 26 (0 << 0)>;
   label = "0 LED_RGB_BLUE";
  };
  rgb2_red: led_3 {
   gpios = <&gpio0 28 (0 << 0)>;
   label = "1 LED_RGB_RED";
  };
  rgb2_green: led_4 {
   gpios = <&gpio0 29 (0 << 0)>;
   label = "1 LED_RGB_GREEN";
  };
  rgb2_blue: led_5 {
   gpios = <&gpio0 30 (0 << 0)>;
   label = "1 LED_RGB_BLUE";
  };
  led1_blue: led_6 {
   gpios = <&gpio0 31 (0 << 0)>;
   label = "2 LED_MONO_BLUE";
  };
  led2_green: led_7 {
   gpios = <&gpio1 0 (0 << 0)>;
   label = "3 LED_MONO_GREEN";
  };
  led3_green: led_8 {
   gpios = <&gpio1 1 (0 << 0)>;
   label = "4 LED_MONO_GREEN";
  };
 };

 buttons {
  compatible = "gpio-keys";
  button_1_vol_dn: button_1_vol_dn {
   gpios = <&gpio0 2 ((1 << 4) | (1 << 0))>;
   label = "Push button 1";
   zephyr,code = <114>;
  };
  button_2_vol_up: button_2_vol_up {
   gpios = <&gpio0 3 ((1 << 4) | (1 << 0))>;
   label = "Push button 2";
   zephyr,code = <115>;
  };
  button3: button_3 {
   gpios = <&gpio0 4 ((1 << 4) | (1 << 0))>;
   label = "Push button 3";
   zephyr,code = <4>;
  };
  button4: button_4 {
   gpios = <&gpio0 6 ((1 << 4) | (1 << 0))>;
   label = "Push button 4";
   zephyr,code = <5>;
  };
  button5: button_5 {
   gpios = <&gpio0 5 ((1 << 4) | (1 << 0))>;
   label = "Push button 5";
   zephyr,code = <6>;
  };
 };

 aliases {
  led0 = &rgb1_red;
  led1 = &rgb1_green;
  led2 = &rgb1_blue;
  led3 = &rgb2_red;
  led4 = &rgb2_green;
  led5 = &rgb2_blue;
  led6 = &led1_blue;
  led7 = &led2_green;
  led8 = &led3_green;
  sw0 = &button_1_vol_dn;
  sw1 = &button_2_vol_up;
  sw2 = &button3;
  sw3 = &button4;
  sw4 = &button5;
  mcuboot-led0 = &led1_blue;
  mcuboot-button0 = &button3;
  watchdog0 = &wdt0;
 };
};
# 118 "C:/ncs/v2.6.1/zephyr/boards/arm/nrf5340_audio_dk_nrf5340/nrf5340_audio_dk_nrf5340_cpunet.dts" 2
# 0 "<command-line>" 2
# 1 "C:/ncs/v2.6.1/zephyr/misc/empty_file.c"
