/*
 * Generated by gen_defines.py
 *
 * DTS input file:
 *   /home/jeremy/Desktop/hello_world_test/build/zephyr/zephyr.dts.pre
 *
 * Directories with bindings:
 *   /home/jeremy/ncs/nrf/dts/bindings, $ZEPHYR_BASE/dts/bindings
 *
 * Node dependency ordering (ordinal and path):
 *   0   /
 *   1   /aliases
 *   2   /chosen
 *   3   /pin-controller
 *   4   /soc
 *   5   /soc/interrupt-controller@e000e100
 *   6   /soc/timer@4000a000
 *   7   /sw-pwm
 *   8   /cpus
 *   9   /cpus/cpu@0
 *   10  /soc/adc@40007000
 *   11  /soc/clock@40000000
 *   12  /soc/ecb@4000e000
 *   13  /soc/egu@40014000
 *   14  /soc/egu@40015000
 *   15  /soc/ficr@10000000
 *   16  /soc/gpio@50000000
 *   17  /soc/gpiote@40006000
 *   18  /soc/i2c@40003000
 *   19  /soc/memory@20000000
 *   20  /soc/pdm@4001d000
 *   21  /soc/pwm@4001c000
 *   22  /soc/qdec@40012000
 *   23  /soc/radio@40001000
 *   24  /soc/random@4000d000
 *   25  /soc/rtc@4000b000
 *   26  /soc/rtc@40011000
 *   27  /soc/spi@40003000
 *   28  /soc/spi@40004000
 *   29  /soc/temp@4000c000
 *   30  /soc/timer@40008000
 *   31  /soc/timer@40009000
 *   32  /soc/timer@e000e010
 *   33  /soc/uart@40002000
 *   34  /soc/uicr@10001000
 *   35  /soc/watchdog@40010000
 *   36  /soc/flash-controller@4001e000
 *   37  /soc/flash-controller@4001e000/flash@0
 *   38  /soc/flash-controller@4001e000/flash@0/partitions
 *   39  /soc/flash-controller@4001e000/flash@0/partitions/partition@0
 *   40  /soc/flash-controller@4001e000/flash@0/partitions/partition@c000
 *   41  /soc/flash-controller@4001e000/flash@0/partitions/partition@19000
 *   42  /soc/flash-controller@4001e000/flash@0/partitions/partition@26000
 *   43  /soc/flash-controller@4001e000/flash@0/partitions/partition@29000
 *
 * Definitions derived from these nodes in dependency order are next,
 * followed by /chosen nodes.
 */

/*
 * Devicetree node: /
 *
 * Node identifier: DT_N
 */

/* Node's full path: */
#define DT_N_PATH "/"

/* Node's name with unit-address: */
#define DT_N_FULL_NAME "/"
#define DT_N_FOREACH_CHILD(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_pin_controller) fn(DT_N_S_cpus) fn(DT_N_S_sw_pwm)
#define DT_N_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_sw_pwm, __VA_ARGS__)
#define DT_N_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_pin_controller) fn(DT_N_S_cpus) 
#define DT_N_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) 

/* Node's dependency ordinal: */
#define DT_N_ORD 0

/* Ordinals for what this node depends on directly: */
#define DT_N_REQUIRES_ORDS /* nothing */

/* Ordinals for what depends directly on this node: */
#define DT_N_SUPPORTS_ORDS \
	1, /* /aliases */ \
	2, /* /chosen */ \
	3, /* /pin-controller */ \
	4, /* /soc */ \
	7, /* /sw-pwm */ \
	8, /* /cpus */

/* Existence and alternate IDs: */
#define DT_N_EXISTS 1
#define DT_N_INST_0_generic_test_nrf52811 DT_N

/* Macros for properties that are special in the specification: */
#define DT_N_REG_NUM 0
#define DT_N_RANGES_NUM 0
#define DT_N_FOREACH_RANGE(fn) 
#define DT_N_IRQ_NUM 0
#define DT_N_COMPAT_MATCHES_generic_test_nrf52811 1
#define DT_N_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_P_compatible {"generic,test-nrf52811"}
#define DT_N_P_compatible_IDX_0 "generic,test-nrf52811"
#define DT_N_P_compatible_IDX_0_EXISTS 1
#define DT_N_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N, compatible, 0)
#define DT_N_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N, compatible, 0, __VA_ARGS__)
#define DT_N_P_compatible_LEN 1
#define DT_N_P_compatible_EXISTS 1

/*
 * Devicetree node: /aliases
 *
 * Node identifier: DT_N_S_aliases
 */

/* Node's full path: */
#define DT_N_S_aliases_PATH "/aliases"

/* Node's name with unit-address: */
#define DT_N_S_aliases_FULL_NAME "aliases"

/* Node parent (/) identifier: */
#define DT_N_S_aliases_PARENT DT_N
#define DT_N_S_aliases_FOREACH_CHILD(fn) 
#define DT_N_S_aliases_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_aliases_ORD 1

/* Ordinals for what this node depends on directly: */
#define DT_N_S_aliases_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_aliases_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_aliases_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_aliases_REG_NUM 0
#define DT_N_S_aliases_RANGES_NUM 0
#define DT_N_S_aliases_FOREACH_RANGE(fn) 
#define DT_N_S_aliases_IRQ_NUM 0
#define DT_N_S_aliases_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_aliases_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /chosen
 *
 * Node identifier: DT_N_S_chosen
 */

/* Node's full path: */
#define DT_N_S_chosen_PATH "/chosen"

/* Node's name with unit-address: */
#define DT_N_S_chosen_FULL_NAME "chosen"

/* Node parent (/) identifier: */
#define DT_N_S_chosen_PARENT DT_N
#define DT_N_S_chosen_FOREACH_CHILD(fn) 
#define DT_N_S_chosen_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_chosen_ORD 2

/* Ordinals for what this node depends on directly: */
#define DT_N_S_chosen_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_chosen_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_chosen_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_chosen_REG_NUM 0
#define DT_N_S_chosen_RANGES_NUM 0
#define DT_N_S_chosen_FOREACH_RANGE(fn) 
#define DT_N_S_chosen_IRQ_NUM 0
#define DT_N_S_chosen_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_chosen_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /pin-controller
 *
 * Node identifier: DT_N_S_pin_controller
 *
 * Binding (compatible = nordic,nrf-pinctrl):
 *   $ZEPHYR_BASE/dts/bindings/pinctrl/nordic,nrf-pinctrl.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_pin_controller_PATH "/pin-controller"

/* Node's name with unit-address: */
#define DT_N_S_pin_controller_FULL_NAME "pin-controller"

/* Node parent (/) identifier: */
#define DT_N_S_pin_controller_PARENT DT_N
#define DT_N_S_pin_controller_FOREACH_CHILD(fn) 
#define DT_N_S_pin_controller_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_pin_controller_ORD 3

/* Ordinals for what this node depends on directly: */
#define DT_N_S_pin_controller_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_pin_controller_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_pin_controller_EXISTS 1
#define DT_N_INST_0_nordic_nrf_pinctrl DT_N_S_pin_controller
#define DT_N_NODELABEL_pinctrl         DT_N_S_pin_controller

/* Macros for properties that are special in the specification: */
#define DT_N_S_pin_controller_REG_NUM 0
#define DT_N_S_pin_controller_RANGES_NUM 0
#define DT_N_S_pin_controller_FOREACH_RANGE(fn) 
#define DT_N_S_pin_controller_IRQ_NUM 0
#define DT_N_S_pin_controller_COMPAT_MATCHES_nordic_nrf_pinctrl 1
#define DT_N_S_pin_controller_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_pin_controller_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_pin_controller_P_compatible {"nordic,nrf-pinctrl"}
#define DT_N_S_pin_controller_P_compatible_IDX_0 "nordic,nrf-pinctrl"
#define DT_N_S_pin_controller_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller, compatible, 0)
#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller, compatible, 0, __VA_ARGS__)
#define DT_N_S_pin_controller_P_compatible_LEN 1
#define DT_N_S_pin_controller_P_compatible_EXISTS 1
#define DT_N_S_pin_controller_P_wakeup_source 0
#define DT_N_S_pin_controller_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc
 *
 * Node identifier: DT_N_S_soc
 */

/* Node's full path: */
#define DT_N_S_soc_PATH "/soc"

/* Node's name with unit-address: */
#define DT_N_S_soc_FULL_NAME "soc"

/* Node parent (/) identifier: */
#define DT_N_S_soc_PARENT DT_N
#define DT_N_S_soc_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_ficr_10000000) fn(DT_N_S_soc_S_uicr_10001000) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_clock_40000000) fn(DT_N_S_soc_S_radio_40001000) fn(DT_N_S_soc_S_uart_40002000) fn(DT_N_S_soc_S_i2c_40003000) fn(DT_N_S_soc_S_spi_40003000) fn(DT_N_S_soc_S_spi_40004000) fn(DT_N_S_soc_S_gpiote_40006000) fn(DT_N_S_soc_S_adc_40007000) fn(DT_N_S_soc_S_timer_40008000) fn(DT_N_S_soc_S_timer_40009000) fn(DT_N_S_soc_S_timer_4000a000) fn(DT_N_S_soc_S_rtc_4000b000) fn(DT_N_S_soc_S_temp_4000c000) fn(DT_N_S_soc_S_random_4000d000) fn(DT_N_S_soc_S_ecb_4000e000) fn(DT_N_S_soc_S_watchdog_40010000) fn(DT_N_S_soc_S_rtc_40011000) fn(DT_N_S_soc_S_qdec_40012000) fn(DT_N_S_soc_S_egu_40014000) fn(DT_N_S_soc_S_egu_40015000) fn(DT_N_S_soc_S_pwm_4001c000) fn(DT_N_S_soc_S_pdm_4001d000) fn(DT_N_S_soc_S_flash_controller_4001e000) fn(DT_N_S_soc_S_gpio_50000000)
#define DT_N_S_soc_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_10000000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_10001000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_clock_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_radio_40001000, __VA_ARGS__) fn(DT_N_S_soc_S_uart_40002000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40003000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40004000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_40006000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40007000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_40008000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_40009000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_4000a000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_4000b000, __VA_ARGS__) fn(DT_N_S_soc_S_temp_4000c000, __VA_ARGS__) fn(DT_N_S_soc_S_random_4000d000, __VA_ARGS__) fn(DT_N_S_soc_S_ecb_4000e000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_qdec_40012000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40015000, __VA_ARGS__) fn(DT_N_S_soc_S_pwm_4001c000, __VA_ARGS__) fn(DT_N_S_soc_S_pdm_4001d000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000, __VA_ARGS__) fn(DT_N_S_soc_S_gpio_50000000, __VA_ARGS__)
#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_ficr_10000000) fn(DT_N_S_soc_S_uicr_10001000) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_clock_40000000) fn(DT_N_S_soc_S_radio_40001000) fn(DT_N_S_soc_S_gpiote_40006000) fn(DT_N_S_soc_S_adc_40007000) fn(DT_N_S_soc_S_timer_40008000) fn(DT_N_S_soc_S_timer_40009000) fn(DT_N_S_soc_S_timer_4000a000) fn(DT_N_S_soc_S_rtc_4000b000) fn(DT_N_S_soc_S_temp_4000c000) fn(DT_N_S_soc_S_random_4000d000) fn(DT_N_S_soc_S_ecb_4000e000) fn(DT_N_S_soc_S_watchdog_40010000) fn(DT_N_S_soc_S_rtc_40011000) fn(DT_N_S_soc_S_egu_40014000) fn(DT_N_S_soc_S_egu_40015000) fn(DT_N_S_soc_S_flash_controller_4001e000) fn(DT_N_S_soc_S_gpio_50000000) 
#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_10000000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_10001000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_clock_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_radio_40001000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_40006000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40007000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_40008000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_40009000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_4000a000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_4000b000, __VA_ARGS__) fn(DT_N_S_soc_S_temp_4000c000, __VA_ARGS__) fn(DT_N_S_soc_S_random_4000d000, __VA_ARGS__) fn(DT_N_S_soc_S_ecb_4000e000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40015000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000, __VA_ARGS__) fn(DT_N_S_soc_S_gpio_50000000, __VA_ARGS__) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_ORD 4

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_SUPPORTS_ORDS \
	5, /* /soc/interrupt-controller@e000e100 */ \
	6, /* /soc/timer@4000a000 */ \
	10, /* /soc/adc@40007000 */ \
	11, /* /soc/clock@40000000 */ \
	12, /* /soc/ecb@4000e000 */ \
	13, /* /soc/egu@40014000 */ \
	14, /* /soc/egu@40015000 */ \
	15, /* /soc/ficr@10000000 */ \
	16, /* /soc/gpio@50000000 */ \
	17, /* /soc/gpiote@40006000 */ \
	18, /* /soc/i2c@40003000 */ \
	19, /* /soc/memory@20000000 */ \
	20, /* /soc/pdm@4001d000 */ \
	21, /* /soc/pwm@4001c000 */ \
	22, /* /soc/qdec@40012000 */ \
	23, /* /soc/radio@40001000 */ \
	24, /* /soc/random@4000d000 */ \
	25, /* /soc/rtc@4000b000 */ \
	26, /* /soc/rtc@40011000 */ \
	27, /* /soc/spi@40003000 */ \
	28, /* /soc/spi@40004000 */ \
	29, /* /soc/temp@4000c000 */ \
	30, /* /soc/timer@40008000 */ \
	31, /* /soc/timer@40009000 */ \
	32, /* /soc/timer@e000e010 */ \
	33, /* /soc/uart@40002000 */ \
	34, /* /soc/uicr@10001000 */ \
	35, /* /soc/watchdog@40010000 */ \
	36, /* /soc/flash-controller@4001e000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_EXISTS 1
#define DT_N_INST_0_nordic_nrf52811_qfaa DT_N_S_soc
#define DT_N_INST_0_nordic_nrf52811      DT_N_S_soc
#define DT_N_INST_0_nordic_nrf52         DT_N_S_soc
#define DT_N_INST_0_simple_bus           DT_N_S_soc

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_REG_NUM 0
#define DT_N_S_soc_RANGES_NUM 0
#define DT_N_S_soc_FOREACH_RANGE(fn) 
#define DT_N_S_soc_IRQ_NUM 0
#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf52811_qfaa 1
#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf52811 1
#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf52 1
#define DT_N_S_soc_COMPAT_MATCHES_simple_bus 1
#define DT_N_S_soc_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_P_compatible {"nordic,nRF52811-QFAA", "nordic,nRF52811", "nordic,nRF52", "simple-bus"}
#define DT_N_S_soc_P_compatible_IDX_0 "nordic,nRF52811-QFAA"
#define DT_N_S_soc_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_1 "nordic,nRF52811"
#define DT_N_S_soc_P_compatible_IDX_1_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_2 "nordic,nRF52"
#define DT_N_S_soc_P_compatible_IDX_2_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_3 "simple-bus"
#define DT_N_S_soc_P_compatible_IDX_3_EXISTS 1
#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc, compatible, 0) \
	fn(DT_N_S_soc, compatible, 1) \
	fn(DT_N_S_soc, compatible, 2) \
	fn(DT_N_S_soc, compatible, 3)
#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc, compatible, 0, __VA_ARGS__) \
	fn(DT_N_S_soc, compatible, 1, __VA_ARGS__) \
	fn(DT_N_S_soc, compatible, 2, __VA_ARGS__) \
	fn(DT_N_S_soc, compatible, 3, __VA_ARGS__)
#define DT_N_S_soc_P_compatible_LEN 4
#define DT_N_S_soc_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/interrupt-controller@e000e100
 *
 * Node identifier: DT_N_S_soc_S_interrupt_controller_e000e100
 *
 * Binding (compatible = arm,v7m-nvic):
 *   $ZEPHYR_BASE/dts/bindings/interrupt-controller/arm,v7m-nvic.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_PATH "/soc/interrupt-controller@e000e100"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_FULL_NAME "interrupt-controller@e000e100"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_PARENT DT_N_S_soc
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_ORD 5

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_SUPPORTS_ORDS \
	6, /* /soc/timer@4000a000 */ \
	10, /* /soc/adc@40007000 */ \
	11, /* /soc/clock@40000000 */ \
	12, /* /soc/ecb@4000e000 */ \
	13, /* /soc/egu@40014000 */ \
	14, /* /soc/egu@40015000 */ \
	17, /* /soc/gpiote@40006000 */ \
	18, /* /soc/i2c@40003000 */ \
	20, /* /soc/pdm@4001d000 */ \
	21, /* /soc/pwm@4001c000 */ \
	22, /* /soc/qdec@40012000 */ \
	23, /* /soc/radio@40001000 */ \
	24, /* /soc/random@4000d000 */ \
	25, /* /soc/rtc@4000b000 */ \
	26, /* /soc/rtc@40011000 */ \
	27, /* /soc/spi@40003000 */ \
	28, /* /soc/spi@40004000 */ \
	29, /* /soc/temp@4000c000 */ \
	30, /* /soc/timer@40008000 */ \
	31, /* /soc/timer@40009000 */ \
	33, /* /soc/uart@40002000 */ \
	35, /* /soc/watchdog@40010000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_EXISTS 1
#define DT_N_INST_0_arm_v7m_nvic DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_NODELABEL_nvic      DT_N_S_soc_S_interrupt_controller_e000e100

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_NUM 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_ADDRESS 3758153984 /* 0xe000e100 */
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_SIZE 3072 /* 0xc00 */
#define DT_N_S_soc_S_interrupt_controller_e000e100_RANGES_NUM 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_IRQ_NUM 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MATCHES_arm_v7m_nvic 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg {3758153984 /* 0xe000e100 */, 3072 /* 0xc00 */}
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0 3758153984
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1 3072
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100, reg, 0) \
	fn(DT_N_S_soc_S_interrupt_controller_e000e100, reg, 1)
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_interrupt_controller_e000e100, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits 3
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible {"arm,v7m-nvic"}
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0 "arm,v7m-nvic"
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0)
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_LEN 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_wakeup_source 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/timer@4000a000
 *
 * Node identifier: DT_N_S_soc_S_timer_4000a000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE/dts/bindings/timer/nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_4000a000_PATH "/soc/timer@4000a000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_4000a000_FULL_NAME "timer@4000a000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_4000a000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_timer_4000a000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_4000a000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_4000a000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_timer_4000a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_4000a000_ORD 6

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_4000a000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_4000a000_SUPPORTS_ORDS \
	7, /* /sw-pwm */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_4000a000_EXISTS 1
#define DT_N_INST_2_nordic_nrf_timer DT_N_S_soc_S_timer_4000a000
#define DT_N_NODELABEL_timer2        DT_N_S_soc_S_timer_4000a000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_timer_4000a000_REG_NUM 1
#define DT_N_S_soc_S_timer_4000a000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_REG_IDX_0_VAL_ADDRESS 1073782784 /* 0x4000a000 */
#define DT_N_S_soc_S_timer_4000a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_4000a000_RANGES_NUM 0
#define DT_N_S_soc_S_timer_4000a000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_timer_4000a000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_irq 10
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_4000a000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_timer_4000a000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_timer_4000a000_P_reg {1073782784 /* 0x4000a000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_0 1073782784
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4000a000, reg, 0) \
	fn(DT_N_S_soc_S_timer_4000a000, reg, 1)
#define DT_N_S_soc_S_timer_4000a000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_4000a000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_4000a000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4000a000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_cc_num 4
#define DT_N_S_soc_S_timer_4000a000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts {10 /* 0xa */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_0 10
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4000a000, interrupts, 0) \
	fn(DT_N_S_soc_S_timer_4000a000, interrupts, 1)
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_4000a000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_4000a000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_label "TIMER_2"
#define DT_N_S_soc_S_timer_4000a000_P_label_STRING_TOKEN TIMER_2
#define DT_N_S_soc_S_timer_4000a000_P_label_STRING_UPPER_TOKEN TIMER_2
#define DT_N_S_soc_S_timer_4000a000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4000a000, label, 0) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 1) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 2) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 3) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 4) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 5) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 6)
#define DT_N_S_soc_S_timer_4000a000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_4000a000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 6, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4000a000_P_label_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_prescaler 0
#define DT_N_S_soc_S_timer_4000a000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_status "okay"
#define DT_N_S_soc_S_timer_4000a000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_timer_4000a000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_4000a000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_timer_4000a000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_timer_4000a000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_4000a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4000a000, status, 0) \
	fn(DT_N_S_soc_S_timer_4000a000, status, 1) \
	fn(DT_N_S_soc_S_timer_4000a000, status, 2) \
	fn(DT_N_S_soc_S_timer_4000a000, status, 3)
#define DT_N_S_soc_S_timer_4000a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_4000a000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_4000a000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_4000a000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_4000a000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4000a000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_4000a000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_4000a000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4000a000, compatible, 0)
#define DT_N_S_soc_S_timer_4000a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_4000a000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4000a000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_4000a000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_wakeup_source 0
#define DT_N_S_soc_S_timer_4000a000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /sw-pwm
 *
 * Node identifier: DT_N_S_sw_pwm
 *
 * Binding (compatible = nordic,nrf-sw-pwm):
 *   $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-sw-pwm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_sw_pwm_PATH "/sw-pwm"

/* Node's name with unit-address: */
#define DT_N_S_sw_pwm_FULL_NAME "sw-pwm"

/* Node parent (/) identifier: */
#define DT_N_S_sw_pwm_PARENT DT_N
#define DT_N_S_sw_pwm_FOREACH_CHILD(fn) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_sw_pwm_ORD 7

/* Ordinals for what this node depends on directly: */
#define DT_N_S_sw_pwm_REQUIRES_ORDS \
	0, /* / */ \
	6, /* /soc/timer@4000a000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_sw_pwm_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_sw_pwm_EXISTS 1
#define DT_N_INST_0_nordic_nrf_sw_pwm DT_N_S_sw_pwm
#define DT_N_NODELABEL_sw_pwm         DT_N_S_sw_pwm

/* Macros for properties that are special in the specification: */
#define DT_N_S_sw_pwm_REG_NUM 0
#define DT_N_S_sw_pwm_RANGES_NUM 0
#define DT_N_S_sw_pwm_FOREACH_RANGE(fn) 
#define DT_N_S_sw_pwm_IRQ_NUM 0
#define DT_N_S_sw_pwm_COMPAT_MATCHES_nordic_nrf_sw_pwm 1
#define DT_N_S_sw_pwm_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_sw_pwm_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_sw_pwm_P_generator DT_N_S_soc_S_timer_4000a000
#define DT_N_S_sw_pwm_P_generator_IDX_0 DT_N_S_soc_S_timer_4000a000
#define DT_N_S_sw_pwm_P_generator_IDX_0_PH DT_N_S_soc_S_timer_4000a000
#define DT_N_S_sw_pwm_P_generator_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_P_generator_LEN 1
#define DT_N_S_sw_pwm_P_generator_EXISTS 1
#define DT_N_S_sw_pwm_P_channel_count 3
#define DT_N_S_sw_pwm_P_channel_count_EXISTS 1
#define DT_N_S_sw_pwm_P_clock_prescaler 0
#define DT_N_S_sw_pwm_P_clock_prescaler_EXISTS 1
#define DT_N_S_sw_pwm_P_label "SW_PWM"
#define DT_N_S_sw_pwm_P_label_STRING_TOKEN SW_PWM
#define DT_N_S_sw_pwm_P_label_STRING_UPPER_TOKEN SW_PWM
#define DT_N_S_sw_pwm_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, label, 0) \
	fn(DT_N_S_sw_pwm, label, 1) \
	fn(DT_N_S_sw_pwm, label, 2) \
	fn(DT_N_S_sw_pwm, label, 3) \
	fn(DT_N_S_sw_pwm, label, 4) \
	fn(DT_N_S_sw_pwm, label, 5)
#define DT_N_S_sw_pwm_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sw_pwm, label, 0, __VA_ARGS__) \
	fn(DT_N_S_sw_pwm, label, 1, __VA_ARGS__) \
	fn(DT_N_S_sw_pwm, label, 2, __VA_ARGS__) \
	fn(DT_N_S_sw_pwm, label, 3, __VA_ARGS__) \
	fn(DT_N_S_sw_pwm, label, 4, __VA_ARGS__) \
	fn(DT_N_S_sw_pwm, label, 5, __VA_ARGS__)
#define DT_N_S_sw_pwm_P_label_EXISTS 1
#define DT_N_S_sw_pwm_P_status "disabled"
#define DT_N_S_sw_pwm_P_status_STRING_TOKEN disabled
#define DT_N_S_sw_pwm_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_sw_pwm_P_status_ENUM_IDX 2
#define DT_N_S_sw_pwm_P_status_ENUM_TOKEN disabled
#define DT_N_S_sw_pwm_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, status, 0) \
	fn(DT_N_S_sw_pwm, status, 1) \
	fn(DT_N_S_sw_pwm, status, 2) \
	fn(DT_N_S_sw_pwm, status, 3) \
	fn(DT_N_S_sw_pwm, status, 4) \
	fn(DT_N_S_sw_pwm, status, 5) \
	fn(DT_N_S_sw_pwm, status, 6) \
	fn(DT_N_S_sw_pwm, status, 7)
#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sw_pwm, status, 0, __VA_ARGS__) \
	fn(DT_N_S_sw_pwm, status, 1, __VA_ARGS__) \
	fn(DT_N_S_sw_pwm, status, 2, __VA_ARGS__) \
	fn(DT_N_S_sw_pwm, status, 3, __VA_ARGS__) \
	fn(DT_N_S_sw_pwm, status, 4, __VA_ARGS__) \
	fn(DT_N_S_sw_pwm, status, 5, __VA_ARGS__) \
	fn(DT_N_S_sw_pwm, status, 6, __VA_ARGS__) \
	fn(DT_N_S_sw_pwm, status, 7, __VA_ARGS__)
#define DT_N_S_sw_pwm_P_status_EXISTS 1
#define DT_N_S_sw_pwm_P_compatible {"nordic,nrf-sw-pwm"}
#define DT_N_S_sw_pwm_P_compatible_IDX_0 "nordic,nrf-sw-pwm"
#define DT_N_S_sw_pwm_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, compatible, 0)
#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sw_pwm, compatible, 0, __VA_ARGS__)
#define DT_N_S_sw_pwm_P_compatible_LEN 1
#define DT_N_S_sw_pwm_P_compatible_EXISTS 1
#define DT_N_S_sw_pwm_P_wakeup_source 0
#define DT_N_S_sw_pwm_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /cpus
 *
 * Node identifier: DT_N_S_cpus
 */

/* Node's full path: */
#define DT_N_S_cpus_PATH "/cpus"

/* Node's name with unit-address: */
#define DT_N_S_cpus_FULL_NAME "cpus"

/* Node parent (/) identifier: */
#define DT_N_S_cpus_PARENT DT_N
#define DT_N_S_cpus_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_0)
#define DT_N_S_cpus_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__)
#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_cpu_0) 
#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) 

/* Node's dependency ordinal: */
#define DT_N_S_cpus_ORD 8

/* Ordinals for what this node depends on directly: */
#define DT_N_S_cpus_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_cpus_SUPPORTS_ORDS \
	9, /* /cpus/cpu@0 */

/* Existence and alternate IDs: */
#define DT_N_S_cpus_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_cpus_REG_NUM 0
#define DT_N_S_cpus_RANGES_NUM 0
#define DT_N_S_cpus_FOREACH_RANGE(fn) 
#define DT_N_S_cpus_IRQ_NUM 0
#define DT_N_S_cpus_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_cpus_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /cpus/cpu@0
 *
 * Node identifier: DT_N_S_cpus_S_cpu_0
 *
 * Binding (compatible = arm,cortex-m4):
 *   $ZEPHYR_BASE/dts/bindings/cpu/arm,cortex-m4.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_cpus_S_cpu_0_PATH "/cpus/cpu@0"

/* Node's name with unit-address: */
#define DT_N_S_cpus_S_cpu_0_FULL_NAME "cpu@0"

/* Node parent (/cpus) identifier: */
#define DT_N_S_cpus_S_cpu_0_PARENT DT_N_S_cpus
#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD(fn) 
#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_cpus_S_cpu_0_ORD 9

/* Ordinals for what this node depends on directly: */
#define DT_N_S_cpus_S_cpu_0_REQUIRES_ORDS \
	8, /* /cpus */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_cpus_S_cpu_0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_cpus_S_cpu_0_EXISTS 1
#define DT_N_INST_0_arm_cortex_m4 DT_N_S_cpus_S_cpu_0

/* Macros for properties that are special in the specification: */
#define DT_N_S_cpus_S_cpu_0_REG_NUM 1
#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
#define DT_N_S_cpus_S_cpu_0_RANGES_NUM 0
#define DT_N_S_cpus_S_cpu_0_FOREACH_RANGE(fn) 
#define DT_N_S_cpus_S_cpu_0_IRQ_NUM 0
#define DT_N_S_cpus_S_cpu_0_COMPAT_MATCHES_arm_cortex_m4 1
#define DT_N_S_cpus_S_cpu_0_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_cpus_S_cpu_0_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_cpus_S_cpu_0_P_swo_ref_frequency 32000000
#define DT_N_S_cpus_S_cpu_0_P_swo_ref_frequency_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_compatible {"arm,cortex-m4"}
#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0 "arm,cortex-m4"
#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0, compatible, 0)
#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, compatible, 0, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_0_P_compatible_LEN 1
#define DT_N_S_cpus_S_cpu_0_P_compatible_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_reg {0 /* 0x0 */}
#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0 0
#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0, reg, 0)
#define DT_N_S_cpus_S_cpu_0_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, reg, 0, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_0_P_reg_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_wakeup_source 0
#define DT_N_S_cpus_S_cpu_0_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/adc@40007000
 *
 * Node identifier: DT_N_S_soc_S_adc_40007000
 *
 * Binding (compatible = nordic,nrf-saadc):
 *   $ZEPHYR_BASE/dts/bindings/adc/nordic,nrf-saadc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_adc_40007000_PATH "/soc/adc@40007000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_adc_40007000_FULL_NAME "adc@40007000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_adc_40007000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_adc_40007000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_adc_40007000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_adc_40007000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_adc_40007000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_adc_40007000_ORD 10

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_adc_40007000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_adc_40007000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_adc_40007000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_saadc DT_N_S_soc_S_adc_40007000
#define DT_N_NODELABEL_adc           DT_N_S_soc_S_adc_40007000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_adc_40007000_REG_NUM 1
#define DT_N_S_soc_S_adc_40007000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_REG_IDX_0_VAL_ADDRESS 1073770496 /* 0x40007000 */
#define DT_N_S_soc_S_adc_40007000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_adc_40007000_RANGES_NUM 0
#define DT_N_S_soc_S_adc_40007000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_adc_40007000_IRQ_NUM 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_irq 7
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_COMPAT_MATCHES_nordic_nrf_saadc 1
#define DT_N_S_soc_S_adc_40007000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_adc_40007000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_adc_40007000_P_reg {1073770496 /* 0x40007000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_0 1073770496
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40007000, reg, 0) \
	fn(DT_N_S_soc_S_adc_40007000, reg, 1)
#define DT_N_S_soc_S_adc_40007000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40007000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_adc_40007000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_P_reg_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts {7 /* 0x7 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_0 7
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40007000, interrupts, 0) \
	fn(DT_N_S_soc_S_adc_40007000, interrupts, 1)
#define DT_N_S_soc_S_adc_40007000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40007000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_adc_40007000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_label "ADC_0"
#define DT_N_S_soc_S_adc_40007000_P_label_STRING_TOKEN ADC_0
#define DT_N_S_soc_S_adc_40007000_P_label_STRING_UPPER_TOKEN ADC_0
#define DT_N_S_soc_S_adc_40007000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40007000, label, 0) \
	fn(DT_N_S_soc_S_adc_40007000, label, 1) \
	fn(DT_N_S_soc_S_adc_40007000, label, 2) \
	fn(DT_N_S_soc_S_adc_40007000, label, 3) \
	fn(DT_N_S_soc_S_adc_40007000, label, 4)
#define DT_N_S_soc_S_adc_40007000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40007000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_adc_40007000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_adc_40007000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_adc_40007000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_adc_40007000, label, 4, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_P_label_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_status "okay"
#define DT_N_S_soc_S_adc_40007000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_adc_40007000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_adc_40007000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_adc_40007000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_adc_40007000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_adc_40007000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40007000, status, 0) \
	fn(DT_N_S_soc_S_adc_40007000, status, 1) \
	fn(DT_N_S_soc_S_adc_40007000, status, 2) \
	fn(DT_N_S_soc_S_adc_40007000, status, 3)
#define DT_N_S_soc_S_adc_40007000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40007000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_adc_40007000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_adc_40007000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_adc_40007000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_P_status_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_compatible {"nordic,nrf-saadc"}
#define DT_N_S_soc_S_adc_40007000_P_compatible_IDX_0 "nordic,nrf-saadc"
#define DT_N_S_soc_S_adc_40007000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40007000, compatible, 0)
#define DT_N_S_soc_S_adc_40007000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40007000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_P_compatible_LEN 1
#define DT_N_S_soc_S_adc_40007000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_wakeup_source 0
#define DT_N_S_soc_S_adc_40007000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/clock@40000000
 *
 * Node identifier: DT_N_S_soc_S_clock_40000000
 *
 * Binding (compatible = nordic,nrf-clock):
 *   $ZEPHYR_BASE/dts/bindings/clock/nordic,nrf-clock.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_clock_40000000_PATH "/soc/clock@40000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_clock_40000000_FULL_NAME "clock@40000000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_clock_40000000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_clock_40000000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_clock_40000000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_clock_40000000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_clock_40000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_clock_40000000_ORD 11

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_clock_40000000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_clock_40000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_clock_40000000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_clock DT_N_S_soc_S_clock_40000000
#define DT_N_NODELABEL_clock         DT_N_S_soc_S_clock_40000000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_clock_40000000_REG_NUM 1
#define DT_N_S_soc_S_clock_40000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_REG_IDX_0_VAL_ADDRESS 1073741824 /* 0x40000000 */
#define DT_N_S_soc_S_clock_40000000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_clock_40000000_RANGES_NUM 0
#define DT_N_S_soc_S_clock_40000000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_clock_40000000_IRQ_NUM 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_irq 0
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_COMPAT_MATCHES_nordic_nrf_clock 1
#define DT_N_S_soc_S_clock_40000000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_clock_40000000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_clock_40000000_P_label "CLOCK"
#define DT_N_S_soc_S_clock_40000000_P_label_STRING_TOKEN CLOCK
#define DT_N_S_soc_S_clock_40000000_P_label_STRING_UPPER_TOKEN CLOCK
#define DT_N_S_soc_S_clock_40000000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_clock_40000000, label, 0) \
	fn(DT_N_S_soc_S_clock_40000000, label, 1) \
	fn(DT_N_S_soc_S_clock_40000000, label, 2) \
	fn(DT_N_S_soc_S_clock_40000000, label, 3) \
	fn(DT_N_S_soc_S_clock_40000000, label, 4)
#define DT_N_S_soc_S_clock_40000000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_clock_40000000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_clock_40000000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_clock_40000000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_clock_40000000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_clock_40000000, label, 4, __VA_ARGS__)
#define DT_N_S_soc_S_clock_40000000_P_label_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_reg {1073741824 /* 0x40000000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_0 1073741824
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_clock_40000000, reg, 0) \
	fn(DT_N_S_soc_S_clock_40000000, reg, 1)
#define DT_N_S_soc_S_clock_40000000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_clock_40000000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_clock_40000000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_clock_40000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts {0 /* 0x0 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_0 0
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_clock_40000000, interrupts, 0) \
	fn(DT_N_S_soc_S_clock_40000000, interrupts, 1)
#define DT_N_S_soc_S_clock_40000000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_clock_40000000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_clock_40000000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_clock_40000000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_status "okay"
#define DT_N_S_soc_S_clock_40000000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_clock_40000000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_clock_40000000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_clock_40000000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_clock_40000000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_clock_40000000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_clock_40000000, status, 0) \
	fn(DT_N_S_soc_S_clock_40000000, status, 1) \
	fn(DT_N_S_soc_S_clock_40000000, status, 2) \
	fn(DT_N_S_soc_S_clock_40000000, status, 3)
#define DT_N_S_soc_S_clock_40000000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_clock_40000000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_clock_40000000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_clock_40000000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_clock_40000000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_clock_40000000_P_status_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_compatible {"nordic,nrf-clock"}
#define DT_N_S_soc_S_clock_40000000_P_compatible_IDX_0 "nordic,nrf-clock"
#define DT_N_S_soc_S_clock_40000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_clock_40000000, compatible, 0)
#define DT_N_S_soc_S_clock_40000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_clock_40000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_clock_40000000_P_compatible_LEN 1
#define DT_N_S_soc_S_clock_40000000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_wakeup_source 0
#define DT_N_S_soc_S_clock_40000000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/ecb@4000e000
 *
 * Node identifier: DT_N_S_soc_S_ecb_4000e000
 *
 * Binding (compatible = nordic,nrf-ecb):
 *   $ZEPHYR_BASE/dts/bindings/crypto/nordic,nrf-ecb.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_ecb_4000e000_PATH "/soc/ecb@4000e000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_ecb_4000e000_FULL_NAME "ecb@4000e000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_ecb_4000e000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_ecb_4000e000_ORD 12

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_ecb_4000e000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_ecb_4000e000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_ecb_4000e000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_ecb DT_N_S_soc_S_ecb_4000e000
#define DT_N_NODELABEL_ecb         DT_N_S_soc_S_ecb_4000e000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_ecb_4000e000_REG_NUM 1
#define DT_N_S_soc_S_ecb_4000e000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_REG_IDX_0_VAL_ADDRESS 1073799168 /* 0x4000e000 */
#define DT_N_S_soc_S_ecb_4000e000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_ecb_4000e000_RANGES_NUM 0
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_ecb_4000e000_IRQ_NUM 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_irq 14
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_COMPAT_MATCHES_nordic_nrf_ecb 1
#define DT_N_S_soc_S_ecb_4000e000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_ecb_4000e000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_ecb_4000e000_P_reg {1073799168 /* 0x4000e000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_0 1073799168
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ecb_4000e000, reg, 0) \
	fn(DT_N_S_soc_S_ecb_4000e000, reg, 1)
#define DT_N_S_soc_S_ecb_4000e000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ecb_4000e000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_ecb_4000e000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_ecb_4000e000_P_reg_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts {14 /* 0xe */, 1 /* 0x1 */}
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_0 14
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ecb_4000e000, interrupts, 0) \
	fn(DT_N_S_soc_S_ecb_4000e000, interrupts, 1)
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ecb_4000e000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_ecb_4000e000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_status "okay"
#define DT_N_S_soc_S_ecb_4000e000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_ecb_4000e000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ecb_4000e000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_ecb_4000e000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_ecb_4000e000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ecb_4000e000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ecb_4000e000, status, 0) \
	fn(DT_N_S_soc_S_ecb_4000e000, status, 1) \
	fn(DT_N_S_soc_S_ecb_4000e000, status, 2) \
	fn(DT_N_S_soc_S_ecb_4000e000, status, 3)
#define DT_N_S_soc_S_ecb_4000e000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ecb_4000e000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_ecb_4000e000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_ecb_4000e000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_ecb_4000e000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_ecb_4000e000_P_status_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_compatible {"nordic,nrf-ecb"}
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_IDX_0 "nordic,nrf-ecb"
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ecb_4000e000, compatible, 0)
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ecb_4000e000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_LEN 1
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_label "ECB"
#define DT_N_S_soc_S_ecb_4000e000_P_label_STRING_TOKEN ECB
#define DT_N_S_soc_S_ecb_4000e000_P_label_STRING_UPPER_TOKEN ECB
#define DT_N_S_soc_S_ecb_4000e000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ecb_4000e000, label, 0) \
	fn(DT_N_S_soc_S_ecb_4000e000, label, 1) \
	fn(DT_N_S_soc_S_ecb_4000e000, label, 2)
#define DT_N_S_soc_S_ecb_4000e000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ecb_4000e000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_ecb_4000e000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_ecb_4000e000, label, 2, __VA_ARGS__)
#define DT_N_S_soc_S_ecb_4000e000_P_label_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_wakeup_source 0
#define DT_N_S_soc_S_ecb_4000e000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/egu@40014000
 *
 * Node identifier: DT_N_S_soc_S_egu_40014000
 *
 * Binding (compatible = nordic,nrf-egu):
 *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_egu_40014000_PATH "/soc/egu@40014000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_egu_40014000_FULL_NAME "egu@40014000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_egu_40014000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_egu_40014000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_egu_40014000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_40014000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_egu_40014000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_egu_40014000_ORD 13

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_egu_40014000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_egu_40014000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_egu_40014000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_egu DT_N_S_soc_S_egu_40014000
#define DT_N_NODELABEL_egu0        DT_N_S_soc_S_egu_40014000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_egu_40014000_REG_NUM 1
#define DT_N_S_soc_S_egu_40014000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_REG_IDX_0_VAL_ADDRESS 1073823744 /* 0x40014000 */
#define DT_N_S_soc_S_egu_40014000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_egu_40014000_RANGES_NUM 0
#define DT_N_S_soc_S_egu_40014000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_egu_40014000_IRQ_NUM 1
#define DT_N_S_soc_S_egu_40014000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_IRQ_IDX_0_VAL_irq 20
#define DT_N_S_soc_S_egu_40014000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_egu_40014000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_COMPAT_MATCHES_nordic_nrf_egu 1
#define DT_N_S_soc_S_egu_40014000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_egu_40014000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_egu_40014000_P_reg {1073823744 /* 0x40014000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_egu_40014000_P_reg_IDX_0 1073823744
#define DT_N_S_soc_S_egu_40014000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_egu_40014000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40014000, reg, 0) \
	fn(DT_N_S_soc_S_egu_40014000, reg, 1)
#define DT_N_S_soc_S_egu_40014000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40014000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40014000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40014000_P_reg_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_interrupts {20 /* 0x14 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_egu_40014000_P_interrupts_IDX_0 20
#define DT_N_S_soc_S_egu_40014000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_egu_40014000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40014000, interrupts, 0) \
	fn(DT_N_S_soc_S_egu_40014000, interrupts, 1)
#define DT_N_S_soc_S_egu_40014000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40014000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40014000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40014000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_status "okay"
#define DT_N_S_soc_S_egu_40014000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_egu_40014000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_egu_40014000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_egu_40014000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_egu_40014000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_egu_40014000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40014000, status, 0) \
	fn(DT_N_S_soc_S_egu_40014000, status, 1) \
	fn(DT_N_S_soc_S_egu_40014000, status, 2) \
	fn(DT_N_S_soc_S_egu_40014000, status, 3)
#define DT_N_S_soc_S_egu_40014000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40014000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40014000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40014000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40014000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40014000_P_status_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_compatible {"nordic,nrf-egu"}
#define DT_N_S_soc_S_egu_40014000_P_compatible_IDX_0 "nordic,nrf-egu"
#define DT_N_S_soc_S_egu_40014000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40014000, compatible, 0)
#define DT_N_S_soc_S_egu_40014000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40014000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40014000_P_compatible_LEN 1
#define DT_N_S_soc_S_egu_40014000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_wakeup_source 0
#define DT_N_S_soc_S_egu_40014000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/egu@40015000
 *
 * Node identifier: DT_N_S_soc_S_egu_40015000
 *
 * Binding (compatible = nordic,nrf-egu):
 *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_egu_40015000_PATH "/soc/egu@40015000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_egu_40015000_FULL_NAME "egu@40015000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_egu_40015000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_egu_40015000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_egu_40015000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_40015000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_egu_40015000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_egu_40015000_ORD 14

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_egu_40015000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_egu_40015000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_egu_40015000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_egu DT_N_S_soc_S_egu_40015000
#define DT_N_NODELABEL_egu1        DT_N_S_soc_S_egu_40015000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_egu_40015000_REG_NUM 1
#define DT_N_S_soc_S_egu_40015000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_REG_IDX_0_VAL_ADDRESS 1073827840 /* 0x40015000 */
#define DT_N_S_soc_S_egu_40015000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_egu_40015000_RANGES_NUM 0
#define DT_N_S_soc_S_egu_40015000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_egu_40015000_IRQ_NUM 1
#define DT_N_S_soc_S_egu_40015000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_IRQ_IDX_0_VAL_irq 21
#define DT_N_S_soc_S_egu_40015000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_egu_40015000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_COMPAT_MATCHES_nordic_nrf_egu 1
#define DT_N_S_soc_S_egu_40015000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_egu_40015000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_egu_40015000_P_reg {1073827840 /* 0x40015000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_egu_40015000_P_reg_IDX_0 1073827840
#define DT_N_S_soc_S_egu_40015000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_egu_40015000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40015000, reg, 0) \
	fn(DT_N_S_soc_S_egu_40015000, reg, 1)
#define DT_N_S_soc_S_egu_40015000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40015000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40015000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40015000_P_reg_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_interrupts {21 /* 0x15 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_egu_40015000_P_interrupts_IDX_0 21
#define DT_N_S_soc_S_egu_40015000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_egu_40015000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40015000, interrupts, 0) \
	fn(DT_N_S_soc_S_egu_40015000, interrupts, 1)
#define DT_N_S_soc_S_egu_40015000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40015000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40015000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40015000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_status "okay"
#define DT_N_S_soc_S_egu_40015000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_egu_40015000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_egu_40015000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_egu_40015000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_egu_40015000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_egu_40015000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40015000, status, 0) \
	fn(DT_N_S_soc_S_egu_40015000, status, 1) \
	fn(DT_N_S_soc_S_egu_40015000, status, 2) \
	fn(DT_N_S_soc_S_egu_40015000, status, 3)
#define DT_N_S_soc_S_egu_40015000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40015000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40015000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40015000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40015000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40015000_P_status_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_compatible {"nordic,nrf-egu"}
#define DT_N_S_soc_S_egu_40015000_P_compatible_IDX_0 "nordic,nrf-egu"
#define DT_N_S_soc_S_egu_40015000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40015000, compatible, 0)
#define DT_N_S_soc_S_egu_40015000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40015000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40015000_P_compatible_LEN 1
#define DT_N_S_soc_S_egu_40015000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_wakeup_source 0
#define DT_N_S_soc_S_egu_40015000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/ficr@10000000
 *
 * Node identifier: DT_N_S_soc_S_ficr_10000000
 *
 * Binding (compatible = nordic,nrf-ficr):
 *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-ficr.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_ficr_10000000_PATH "/soc/ficr@10000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_ficr_10000000_FULL_NAME "ficr@10000000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_ficr_10000000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_ficr_10000000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_ficr_10000000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_ficr_10000000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_ficr_10000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_ficr_10000000_ORD 15

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_ficr_10000000_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_ficr_10000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_ficr_10000000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_ficr DT_N_S_soc_S_ficr_10000000
#define DT_N_NODELABEL_ficr         DT_N_S_soc_S_ficr_10000000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_ficr_10000000_REG_NUM 1
#define DT_N_S_soc_S_ficr_10000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_REG_IDX_0_VAL_ADDRESS 268435456 /* 0x10000000 */
#define DT_N_S_soc_S_ficr_10000000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_ficr_10000000_RANGES_NUM 0
#define DT_N_S_soc_S_ficr_10000000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_ficr_10000000_IRQ_NUM 0
#define DT_N_S_soc_S_ficr_10000000_COMPAT_MATCHES_nordic_nrf_ficr 1
#define DT_N_S_soc_S_ficr_10000000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_ficr_10000000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_ficr_10000000_P_reg {268435456 /* 0x10000000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_ficr_10000000_P_reg_IDX_0 268435456
#define DT_N_S_soc_S_ficr_10000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_ficr_10000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ficr_10000000, reg, 0) \
	fn(DT_N_S_soc_S_ficr_10000000, reg, 1)
#define DT_N_S_soc_S_ficr_10000000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ficr_10000000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_ficr_10000000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_ficr_10000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_status "okay"
#define DT_N_S_soc_S_ficr_10000000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_ficr_10000000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ficr_10000000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_ficr_10000000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_ficr_10000000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ficr_10000000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ficr_10000000, status, 0) \
	fn(DT_N_S_soc_S_ficr_10000000, status, 1) \
	fn(DT_N_S_soc_S_ficr_10000000, status, 2) \
	fn(DT_N_S_soc_S_ficr_10000000, status, 3)
#define DT_N_S_soc_S_ficr_10000000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ficr_10000000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_ficr_10000000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_ficr_10000000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_ficr_10000000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_ficr_10000000_P_status_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_compatible {"nordic,nrf-ficr"}
#define DT_N_S_soc_S_ficr_10000000_P_compatible_IDX_0 "nordic,nrf-ficr"
#define DT_N_S_soc_S_ficr_10000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ficr_10000000, compatible, 0)
#define DT_N_S_soc_S_ficr_10000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ficr_10000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ficr_10000000_P_compatible_LEN 1
#define DT_N_S_soc_S_ficr_10000000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_wakeup_source 0
#define DT_N_S_soc_S_ficr_10000000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/gpio@50000000
 *
 * Node identifier: DT_N_S_soc_S_gpio_50000000
 *
 * Binding (compatible = nordic,nrf-gpio):
 *   $ZEPHYR_BASE/dts/bindings/gpio/nordic,nrf-gpio.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_gpio_50000000_PATH "/soc/gpio@50000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_gpio_50000000_FULL_NAME "gpio@50000000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_gpio_50000000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_gpio_50000000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_gpio_50000000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_gpio_50000000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_gpio_50000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_gpio_50000000_ORD 16

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_gpio_50000000_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_gpio_50000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_gpio_50000000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_gpio DT_N_S_soc_S_gpio_50000000
#define DT_N_NODELABEL_gpio0        DT_N_S_soc_S_gpio_50000000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_gpio_50000000_REG_NUM 2
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_0_VAL_ADDRESS 1342177280 /* 0x50000000 */
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_0_VAL_SIZE 512 /* 0x200 */
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_1_VAL_ADDRESS 1342178560 /* 0x50000500 */
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_1_VAL_SIZE 768 /* 0x300 */
#define DT_N_S_soc_S_gpio_50000000_RANGES_NUM 0
#define DT_N_S_soc_S_gpio_50000000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_gpio_50000000_IRQ_NUM 0
#define DT_N_S_soc_S_gpio_50000000_COMPAT_MATCHES_nordic_nrf_gpio 1
#define DT_N_S_soc_S_gpio_50000000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_gpio_50000000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_gpio_50000000_P_reg {1342177280 /* 0x50000000 */, 512 /* 0x200 */, 1342178560 /* 0x50000500 */, 768 /* 0x300 */}
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_0 1342177280
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_1 512
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_2 1342178560
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_2_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_3 768
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_3_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_50000000, reg, 0) \
	fn(DT_N_S_soc_S_gpio_50000000, reg, 1) \
	fn(DT_N_S_soc_S_gpio_50000000, reg, 2) \
	fn(DT_N_S_soc_S_gpio_50000000, reg, 3)
#define DT_N_S_soc_S_gpio_50000000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpio_50000000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpio_50000000, reg, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpio_50000000, reg, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpio_50000000, reg, 3, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_50000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_label "GPIO_0"
#define DT_N_S_soc_S_gpio_50000000_P_label_STRING_TOKEN GPIO_0
#define DT_N_S_soc_S_gpio_50000000_P_label_STRING_UPPER_TOKEN GPIO_0
#define DT_N_S_soc_S_gpio_50000000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_50000000, label, 0) \
	fn(DT_N_S_soc_S_gpio_50000000, label, 1) \
	fn(DT_N_S_soc_S_gpio_50000000, label, 2) \
	fn(DT_N_S_soc_S_gpio_50000000, label, 3) \
	fn(DT_N_S_soc_S_gpio_50000000, label, 4) \
	fn(DT_N_S_soc_S_gpio_50000000, label, 5)
#define DT_N_S_soc_S_gpio_50000000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpio_50000000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpio_50000000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpio_50000000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpio_50000000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpio_50000000, label, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpio_50000000, label, 5, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_50000000_P_label_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_port 0
#define DT_N_S_soc_S_gpio_50000000_P_port_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_gpio_controller 1
#define DT_N_S_soc_S_gpio_50000000_P_gpio_controller_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_ngpios 32
#define DT_N_S_soc_S_gpio_50000000_P_ngpios_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_status "okay"
#define DT_N_S_soc_S_gpio_50000000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_gpio_50000000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpio_50000000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_gpio_50000000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_gpio_50000000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpio_50000000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_50000000, status, 0) \
	fn(DT_N_S_soc_S_gpio_50000000, status, 1) \
	fn(DT_N_S_soc_S_gpio_50000000, status, 2) \
	fn(DT_N_S_soc_S_gpio_50000000, status, 3)
#define DT_N_S_soc_S_gpio_50000000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpio_50000000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpio_50000000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpio_50000000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpio_50000000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_50000000_P_status_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_compatible {"nordic,nrf-gpio"}
#define DT_N_S_soc_S_gpio_50000000_P_compatible_IDX_0 "nordic,nrf-gpio"
#define DT_N_S_soc_S_gpio_50000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_50000000, compatible, 0)
#define DT_N_S_soc_S_gpio_50000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpio_50000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_50000000_P_compatible_LEN 1
#define DT_N_S_soc_S_gpio_50000000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_wakeup_source 0
#define DT_N_S_soc_S_gpio_50000000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/gpiote@40006000
 *
 * Node identifier: DT_N_S_soc_S_gpiote_40006000
 *
 * Binding (compatible = nordic,nrf-gpiote):
 *   $ZEPHYR_BASE/dts/bindings/gpio/nordic,nrf-gpiote.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_gpiote_40006000_PATH "/soc/gpiote@40006000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_gpiote_40006000_FULL_NAME "gpiote@40006000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_gpiote_40006000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_gpiote_40006000_ORD 17

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_gpiote_40006000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_gpiote_40006000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_gpiote_40006000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_gpiote DT_N_S_soc_S_gpiote_40006000
#define DT_N_NODELABEL_gpiote         DT_N_S_soc_S_gpiote_40006000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_gpiote_40006000_REG_NUM 1
#define DT_N_S_soc_S_gpiote_40006000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_REG_IDX_0_VAL_ADDRESS 1073766400 /* 0x40006000 */
#define DT_N_S_soc_S_gpiote_40006000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_gpiote_40006000_RANGES_NUM 0
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_gpiote_40006000_IRQ_NUM 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_irq 6
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_priority 5
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_COMPAT_MATCHES_nordic_nrf_gpiote 1
#define DT_N_S_soc_S_gpiote_40006000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_gpiote_40006000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_gpiote_40006000_P_reg {1073766400 /* 0x40006000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_0 1073766400
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40006000, reg, 0) \
	fn(DT_N_S_soc_S_gpiote_40006000, reg, 1)
#define DT_N_S_soc_S_gpiote_40006000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_40006000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpiote_40006000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_gpiote_40006000_P_reg_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts {6 /* 0x6 */, 5 /* 0x5 */}
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_0 6
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_1 5
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40006000, interrupts, 0) \
	fn(DT_N_S_soc_S_gpiote_40006000, interrupts, 1)
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_40006000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpiote_40006000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_label "GPIOTE_0"
#define DT_N_S_soc_S_gpiote_40006000_P_label_STRING_TOKEN GPIOTE_0
#define DT_N_S_soc_S_gpiote_40006000_P_label_STRING_UPPER_TOKEN GPIOTE_0
#define DT_N_S_soc_S_gpiote_40006000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40006000, label, 0) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 1) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 2) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 3) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 4) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 5) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 6) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 7)
#define DT_N_S_soc_S_gpiote_40006000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_40006000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 6, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 7, __VA_ARGS__)
#define DT_N_S_soc_S_gpiote_40006000_P_label_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_status "okay"
#define DT_N_S_soc_S_gpiote_40006000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_gpiote_40006000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpiote_40006000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_gpiote_40006000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_gpiote_40006000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpiote_40006000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40006000, status, 0) \
	fn(DT_N_S_soc_S_gpiote_40006000, status, 1) \
	fn(DT_N_S_soc_S_gpiote_40006000, status, 2) \
	fn(DT_N_S_soc_S_gpiote_40006000, status, 3)
#define DT_N_S_soc_S_gpiote_40006000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_40006000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpiote_40006000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpiote_40006000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_gpiote_40006000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_gpiote_40006000_P_status_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_compatible {"nordic,nrf-gpiote"}
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_IDX_0 "nordic,nrf-gpiote"
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40006000, compatible, 0)
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_40006000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_LEN 1
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_wakeup_source 0
#define DT_N_S_soc_S_gpiote_40006000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/i2c@40003000
 *
 * Node identifier: DT_N_S_soc_S_i2c_40003000
 *
 * Binding (compatible = nordic,nrf-twim):
 *   $ZEPHYR_BASE/dts/bindings/i2c/nordic,nrf-twim.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_i2c_40003000_PATH "/soc/i2c@40003000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_i2c_40003000_FULL_NAME "i2c@40003000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_i2c_40003000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_i2c_40003000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_i2c_40003000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_i2c_40003000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_i2c_40003000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_i2c_40003000_ORD 18

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_i2c_40003000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_i2c_40003000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_i2c_40003000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_twim DT_N_S_soc_S_i2c_40003000
#define DT_N_NODELABEL_i2c0         DT_N_S_soc_S_i2c_40003000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_i2c_40003000_REG_NUM 1
#define DT_N_S_soc_S_i2c_40003000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_REG_IDX_0_VAL_ADDRESS 1073754112 /* 0x40003000 */
#define DT_N_S_soc_S_i2c_40003000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_i2c_40003000_RANGES_NUM 0
#define DT_N_S_soc_S_i2c_40003000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_i2c_40003000_IRQ_NUM 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_irq 3
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_COMPAT_MATCHES_nordic_nrf_twim 1
#define DT_N_S_soc_S_i2c_40003000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_i2c_40003000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_i2c_40003000_P_zephyr_concat_buf_size 16
#define DT_N_S_soc_S_i2c_40003000_P_zephyr_concat_buf_size_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_zephyr_flash_buf_max_size 16
#define DT_N_S_soc_S_i2c_40003000_P_zephyr_flash_buf_max_size_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_reg {1073754112 /* 0x40003000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_0 1073754112
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000, reg, 0) \
	fn(DT_N_S_soc_S_i2c_40003000, reg, 1)
#define DT_N_S_soc_S_i2c_40003000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_i2c_40003000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_P_reg_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts {3 /* 0x3 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_0 3
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000, interrupts, 0) \
	fn(DT_N_S_soc_S_i2c_40003000, interrupts, 1)
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_i2c_40003000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_clock_frequency 100000
#define DT_N_S_soc_S_i2c_40003000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_label "I2C_0"
#define DT_N_S_soc_S_i2c_40003000_P_label_STRING_TOKEN I2C_0
#define DT_N_S_soc_S_i2c_40003000_P_label_STRING_UPPER_TOKEN I2C_0
#define DT_N_S_soc_S_i2c_40003000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000, label, 0) \
	fn(DT_N_S_soc_S_i2c_40003000, label, 1) \
	fn(DT_N_S_soc_S_i2c_40003000, label, 2) \
	fn(DT_N_S_soc_S_i2c_40003000, label, 3) \
	fn(DT_N_S_soc_S_i2c_40003000, label, 4)
#define DT_N_S_soc_S_i2c_40003000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_i2c_40003000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_i2c_40003000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_i2c_40003000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_i2c_40003000, label, 4, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_P_label_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_status "disabled"
#define DT_N_S_soc_S_i2c_40003000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_i2c_40003000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_i2c_40003000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_i2c_40003000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_i2c_40003000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_i2c_40003000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000, status, 0) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 1) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 2) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 3) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 4) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 5) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 6) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 7)
#define DT_N_S_soc_S_i2c_40003000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 6, __VA_ARGS__) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 7, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_P_status_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_compatible {"nordic,nrf-twim"}
#define DT_N_S_soc_S_i2c_40003000_P_compatible_IDX_0 "nordic,nrf-twim"
#define DT_N_S_soc_S_i2c_40003000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000, compatible, 0)
#define DT_N_S_soc_S_i2c_40003000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_P_compatible_LEN 1
#define DT_N_S_soc_S_i2c_40003000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_wakeup_source 0
#define DT_N_S_soc_S_i2c_40003000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/memory@20000000
 *
 * Node identifier: DT_N_S_soc_S_memory_20000000
 *
 * Binding (compatible = mmio-sram):
 *   $ZEPHYR_BASE/dts/bindings/sram/mmio-sram.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_memory_20000000_PATH "/soc/memory@20000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_memory_20000000_FULL_NAME "memory@20000000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_memory_20000000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_memory_20000000_ORD 19

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_memory_20000000_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_memory_20000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_memory_20000000_EXISTS 1
#define DT_N_INST_0_mmio_sram DT_N_S_soc_S_memory_20000000
#define DT_N_NODELABEL_sram0  DT_N_S_soc_S_memory_20000000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_memory_20000000_REG_NUM 1
#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_VAL_ADDRESS 536870912 /* 0x20000000 */
#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_VAL_SIZE 24576 /* 0x6000 */
#define DT_N_S_soc_S_memory_20000000_RANGES_NUM 0
#define DT_N_S_soc_S_memory_20000000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_memory_20000000_IRQ_NUM 0
#define DT_N_S_soc_S_memory_20000000_COMPAT_MATCHES_mmio_sram 1
#define DT_N_S_soc_S_memory_20000000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_memory_20000000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_memory_20000000_P_reg {536870912 /* 0x20000000 */, 24576 /* 0x6000 */}
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_0 536870912
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_1 24576
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_20000000, reg, 0) \
	fn(DT_N_S_soc_S_memory_20000000, reg, 1)
#define DT_N_S_soc_S_memory_20000000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_20000000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_memory_20000000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_memory_20000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_compatible {"mmio-sram"}
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0 "mmio-sram"
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_20000000, compatible, 0)
#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_20000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_memory_20000000_P_compatible_LEN 1
#define DT_N_S_soc_S_memory_20000000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_wakeup_source 0
#define DT_N_S_soc_S_memory_20000000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/pdm@4001d000
 *
 * Node identifier: DT_N_S_soc_S_pdm_4001d000
 *
 * Binding (compatible = nordic,nrf-pdm):
 *   $ZEPHYR_BASE/dts/bindings/audio/nordic,nrf-pdm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_pdm_4001d000_PATH "/soc/pdm@4001d000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_pdm_4001d000_FULL_NAME "pdm@4001d000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_pdm_4001d000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_pdm_4001d000_ORD 20

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_pdm_4001d000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_pdm_4001d000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_pdm_4001d000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_pdm DT_N_S_soc_S_pdm_4001d000
#define DT_N_NODELABEL_pdm0        DT_N_S_soc_S_pdm_4001d000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_pdm_4001d000_REG_NUM 1
#define DT_N_S_soc_S_pdm_4001d000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_REG_IDX_0_VAL_ADDRESS 1073860608 /* 0x4001d000 */
#define DT_N_S_soc_S_pdm_4001d000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_pdm_4001d000_RANGES_NUM 0
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_pdm_4001d000_IRQ_NUM 1
#define DT_N_S_soc_S_pdm_4001d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_IRQ_IDX_0_VAL_irq 29
#define DT_N_S_soc_S_pdm_4001d000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_pdm_4001d000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_COMPAT_MATCHES_nordic_nrf_pdm 1
#define DT_N_S_soc_S_pdm_4001d000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_pdm_4001d000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_pdm_4001d000_P_reg {1073860608 /* 0x4001d000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_pdm_4001d000_P_reg_IDX_0 1073860608
#define DT_N_S_soc_S_pdm_4001d000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_pdm_4001d000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pdm_4001d000, reg, 0) \
	fn(DT_N_S_soc_S_pdm_4001d000, reg, 1)
#define DT_N_S_soc_S_pdm_4001d000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pdm_4001d000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_pdm_4001d000_P_reg_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_interrupts {29 /* 0x1d */, 1 /* 0x1 */}
#define DT_N_S_soc_S_pdm_4001d000_P_interrupts_IDX_0 29
#define DT_N_S_soc_S_pdm_4001d000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_pdm_4001d000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pdm_4001d000, interrupts, 0) \
	fn(DT_N_S_soc_S_pdm_4001d000, interrupts, 1)
#define DT_N_S_soc_S_pdm_4001d000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pdm_4001d000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_pdm_4001d000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source "PCLK32M_HFXO"
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_STRING_TOKEN PCLK32M_HFXO
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_STRING_UPPER_TOKEN PCLK32M_HFXO
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_ENUM_IDX 1
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_ENUM_TOKEN PCLK32M_HFXO
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_ENUM_UPPER_TOKEN PCLK32M_HFXO
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 0) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 1) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 2) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 3) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 4) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 5) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 6) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 7) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 8) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 9) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 10) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 11)
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 6, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 7, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 8, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 9, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 10, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 11, __VA_ARGS__)
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_queue_size 4
#define DT_N_S_soc_S_pdm_4001d000_P_queue_size_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_status "disabled"
#define DT_N_S_soc_S_pdm_4001d000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_pdm_4001d000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_pdm_4001d000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_pdm_4001d000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_pdm_4001d000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_pdm_4001d000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pdm_4001d000, status, 0) \
	fn(DT_N_S_soc_S_pdm_4001d000, status, 1) \
	fn(DT_N_S_soc_S_pdm_4001d000, status, 2) \
	fn(DT_N_S_soc_S_pdm_4001d000, status, 3) \
	fn(DT_N_S_soc_S_pdm_4001d000, status, 4) \
	fn(DT_N_S_soc_S_pdm_4001d000, status, 5) \
	fn(DT_N_S_soc_S_pdm_4001d000, status, 6) \
	fn(DT_N_S_soc_S_pdm_4001d000, status, 7)
#define DT_N_S_soc_S_pdm_4001d000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pdm_4001d000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, status, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, status, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, status, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, status, 6, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, status, 7, __VA_ARGS__)
#define DT_N_S_soc_S_pdm_4001d000_P_status_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_compatible {"nordic,nrf-pdm"}
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_IDX_0 "nordic,nrf-pdm"
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pdm_4001d000, compatible, 0)
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pdm_4001d000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_LEN 1
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_label "PDM_0"
#define DT_N_S_soc_S_pdm_4001d000_P_label_STRING_TOKEN PDM_0
#define DT_N_S_soc_S_pdm_4001d000_P_label_STRING_UPPER_TOKEN PDM_0
#define DT_N_S_soc_S_pdm_4001d000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pdm_4001d000, label, 0) \
	fn(DT_N_S_soc_S_pdm_4001d000, label, 1) \
	fn(DT_N_S_soc_S_pdm_4001d000, label, 2) \
	fn(DT_N_S_soc_S_pdm_4001d000, label, 3) \
	fn(DT_N_S_soc_S_pdm_4001d000, label, 4)
#define DT_N_S_soc_S_pdm_4001d000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pdm_4001d000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pdm_4001d000, label, 4, __VA_ARGS__)
#define DT_N_S_soc_S_pdm_4001d000_P_label_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_wakeup_source 0
#define DT_N_S_soc_S_pdm_4001d000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/pwm@4001c000
 *
 * Node identifier: DT_N_S_soc_S_pwm_4001c000
 *
 * Binding (compatible = nordic,nrf-pwm):
 *   $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-pwm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_pwm_4001c000_PATH "/soc/pwm@4001c000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_pwm_4001c000_FULL_NAME "pwm@4001c000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_pwm_4001c000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_pwm_4001c000_ORD 21

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_pwm_4001c000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_pwm_4001c000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_pwm_4001c000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_pwm DT_N_S_soc_S_pwm_4001c000
#define DT_N_NODELABEL_pwm0        DT_N_S_soc_S_pwm_4001c000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_pwm_4001c000_REG_NUM 1
#define DT_N_S_soc_S_pwm_4001c000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_REG_IDX_0_VAL_ADDRESS 1073856512 /* 0x4001c000 */
#define DT_N_S_soc_S_pwm_4001c000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_pwm_4001c000_RANGES_NUM 0
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_pwm_4001c000_IRQ_NUM 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_VAL_irq 28
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_COMPAT_MATCHES_nordic_nrf_pwm 1
#define DT_N_S_soc_S_pwm_4001c000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_pwm_4001c000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_pwm_4001c000_P_reg {1073856512 /* 0x4001c000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_pwm_4001c000_P_reg_IDX_0 1073856512
#define DT_N_S_soc_S_pwm_4001c000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_pwm_4001c000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4001c000, reg, 0) \
	fn(DT_N_S_soc_S_pwm_4001c000, reg, 1)
#define DT_N_S_soc_S_pwm_4001c000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pwm_4001c000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pwm_4001c000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_4001c000_P_reg_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_center_aligned 0
#define DT_N_S_soc_S_pwm_4001c000_P_center_aligned_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_ch0_inverted 0
#define DT_N_S_soc_S_pwm_4001c000_P_ch0_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_ch1_inverted 0
#define DT_N_S_soc_S_pwm_4001c000_P_ch1_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_ch2_inverted 0
#define DT_N_S_soc_S_pwm_4001c000_P_ch2_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_ch3_inverted 0
#define DT_N_S_soc_S_pwm_4001c000_P_ch3_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_label "PWM_0"
#define DT_N_S_soc_S_pwm_4001c000_P_label_STRING_TOKEN PWM_0
#define DT_N_S_soc_S_pwm_4001c000_P_label_STRING_UPPER_TOKEN PWM_0
#define DT_N_S_soc_S_pwm_4001c000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4001c000, label, 0) \
	fn(DT_N_S_soc_S_pwm_4001c000, label, 1) \
	fn(DT_N_S_soc_S_pwm_4001c000, label, 2) \
	fn(DT_N_S_soc_S_pwm_4001c000, label, 3) \
	fn(DT_N_S_soc_S_pwm_4001c000, label, 4)
#define DT_N_S_soc_S_pwm_4001c000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pwm_4001c000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pwm_4001c000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pwm_4001c000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pwm_4001c000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pwm_4001c000, label, 4, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_4001c000_P_label_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_status "disabled"
#define DT_N_S_soc_S_pwm_4001c000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_pwm_4001c000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_pwm_4001c000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_pwm_4001c000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_pwm_4001c000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_pwm_4001c000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4001c000, status, 0) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 1) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 2) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 3) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 4) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 5) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 6) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 7)
#define DT_N_S_soc_S_pwm_4001c000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pwm_4001c000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 6, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 7, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_4001c000_P_status_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_compatible {"nordic,nrf-pwm"}
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_IDX_0 "nordic,nrf-pwm"
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4001c000, compatible, 0)
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pwm_4001c000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_LEN 1
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts {28 /* 0x1c */, 1 /* 0x1 */}
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_IDX_0 28
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4001c000, interrupts, 0) \
	fn(DT_N_S_soc_S_pwm_4001c000, interrupts, 1)
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pwm_4001c000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_pwm_4001c000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_wakeup_source 0
#define DT_N_S_soc_S_pwm_4001c000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/qdec@40012000
 *
 * Node identifier: DT_N_S_soc_S_qdec_40012000
 *
 * Binding (compatible = nordic,nrf-qdec):
 *   $ZEPHYR_BASE/dts/bindings/sensor/nordic,nrf-qdec.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_qdec_40012000_PATH "/soc/qdec@40012000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_qdec_40012000_FULL_NAME "qdec@40012000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_qdec_40012000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_qdec_40012000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_qdec_40012000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_qdec_40012000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_qdec_40012000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_qdec_40012000_ORD 22

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_qdec_40012000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_qdec_40012000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_qdec_40012000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_qdec DT_N_S_soc_S_qdec_40012000
#define DT_N_NODELABEL_qdec         DT_N_S_soc_S_qdec_40012000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_qdec_40012000_REG_NUM 1
#define DT_N_S_soc_S_qdec_40012000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_REG_IDX_0_VAL_ADDRESS 1073815552 /* 0x40012000 */
#define DT_N_S_soc_S_qdec_40012000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_qdec_40012000_RANGES_NUM 0
#define DT_N_S_soc_S_qdec_40012000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_qdec_40012000_IRQ_NUM 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_irq 18
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_COMPAT_MATCHES_nordic_nrf_qdec 1
#define DT_N_S_soc_S_qdec_40012000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_qdec_40012000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_qdec_40012000_P_reg {1073815552 /* 0x40012000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_0 1073815552
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qdec_40012000, reg, 0) \
	fn(DT_N_S_soc_S_qdec_40012000, reg, 1)
#define DT_N_S_soc_S_qdec_40012000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_qdec_40012000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_qdec_40012000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_qdec_40012000_P_reg_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts {18 /* 0x12 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_0 18
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qdec_40012000, interrupts, 0) \
	fn(DT_N_S_soc_S_qdec_40012000, interrupts, 1)
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_qdec_40012000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_qdec_40012000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_label "QDEC"
#define DT_N_S_soc_S_qdec_40012000_P_label_STRING_TOKEN QDEC
#define DT_N_S_soc_S_qdec_40012000_P_label_STRING_UPPER_TOKEN QDEC
#define DT_N_S_soc_S_qdec_40012000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qdec_40012000, label, 0) \
	fn(DT_N_S_soc_S_qdec_40012000, label, 1) \
	fn(DT_N_S_soc_S_qdec_40012000, label, 2) \
	fn(DT_N_S_soc_S_qdec_40012000, label, 3)
#define DT_N_S_soc_S_qdec_40012000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_qdec_40012000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_qdec_40012000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_qdec_40012000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_qdec_40012000, label, 3, __VA_ARGS__)
#define DT_N_S_soc_S_qdec_40012000_P_label_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_status "disabled"
#define DT_N_S_soc_S_qdec_40012000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_qdec_40012000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_qdec_40012000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_qdec_40012000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_qdec_40012000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_qdec_40012000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qdec_40012000, status, 0) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 1) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 2) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 3) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 4) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 5) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 6) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 7)
#define DT_N_S_soc_S_qdec_40012000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_qdec_40012000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 6, __VA_ARGS__) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 7, __VA_ARGS__)
#define DT_N_S_soc_S_qdec_40012000_P_status_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_compatible {"nordic,nrf-qdec"}
#define DT_N_S_soc_S_qdec_40012000_P_compatible_IDX_0 "nordic,nrf-qdec"
#define DT_N_S_soc_S_qdec_40012000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qdec_40012000, compatible, 0)
#define DT_N_S_soc_S_qdec_40012000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_qdec_40012000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_qdec_40012000_P_compatible_LEN 1
#define DT_N_S_soc_S_qdec_40012000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_wakeup_source 0
#define DT_N_S_soc_S_qdec_40012000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/radio@40001000
 *
 * Node identifier: DT_N_S_soc_S_radio_40001000
 *
 * Binding (compatible = nordic,nrf-radio):
 *   $ZEPHYR_BASE/dts/bindings/net/wireless/nordic,nrf-radio.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_radio_40001000_PATH "/soc/radio@40001000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_radio_40001000_FULL_NAME "radio@40001000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_radio_40001000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_radio_40001000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_radio_40001000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_radio_40001000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_radio_40001000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_radio_40001000_ORD 23

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_radio_40001000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_radio_40001000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_radio_40001000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_radio DT_N_S_soc_S_radio_40001000
#define DT_N_NODELABEL_radio         DT_N_S_soc_S_radio_40001000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_radio_40001000_REG_NUM 1
#define DT_N_S_soc_S_radio_40001000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_REG_IDX_0_VAL_ADDRESS 1073745920 /* 0x40001000 */
#define DT_N_S_soc_S_radio_40001000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_radio_40001000_RANGES_NUM 0
#define DT_N_S_soc_S_radio_40001000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_radio_40001000_IRQ_NUM 1
#define DT_N_S_soc_S_radio_40001000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_IRQ_IDX_0_VAL_irq 1
#define DT_N_S_soc_S_radio_40001000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_radio_40001000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_COMPAT_MATCHES_nordic_nrf_radio 1
#define DT_N_S_soc_S_radio_40001000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_radio_40001000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_radio_40001000_P_reg {1073745920 /* 0x40001000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_radio_40001000_P_reg_IDX_0 1073745920
#define DT_N_S_soc_S_radio_40001000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_radio_40001000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_40001000, reg, 0) \
	fn(DT_N_S_soc_S_radio_40001000, reg, 1)
#define DT_N_S_soc_S_radio_40001000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_radio_40001000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_P_reg_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_interrupts {1 /* 0x1 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_radio_40001000_P_interrupts_IDX_0 1
#define DT_N_S_soc_S_radio_40001000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_radio_40001000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_40001000, interrupts, 0) \
	fn(DT_N_S_soc_S_radio_40001000, interrupts, 1)
#define DT_N_S_soc_S_radio_40001000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_radio_40001000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_dfe_supported 1
#define DT_N_S_soc_S_radio_40001000_P_dfe_supported_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_status "okay"
#define DT_N_S_soc_S_radio_40001000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_radio_40001000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_radio_40001000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_radio_40001000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_radio_40001000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_radio_40001000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_40001000, status, 0) \
	fn(DT_N_S_soc_S_radio_40001000, status, 1) \
	fn(DT_N_S_soc_S_radio_40001000, status, 2) \
	fn(DT_N_S_soc_S_radio_40001000, status, 3)
#define DT_N_S_soc_S_radio_40001000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_radio_40001000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_radio_40001000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_radio_40001000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_P_status_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_compatible {"nordic,nrf-radio"}
#define DT_N_S_soc_S_radio_40001000_P_compatible_IDX_0 "nordic,nrf-radio"
#define DT_N_S_soc_S_radio_40001000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_40001000, compatible, 0)
#define DT_N_S_soc_S_radio_40001000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_P_compatible_LEN 1
#define DT_N_S_soc_S_radio_40001000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_wakeup_source 0
#define DT_N_S_soc_S_radio_40001000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/random@4000d000
 *
 * Node identifier: DT_N_S_soc_S_random_4000d000
 *
 * Binding (compatible = nordic,nrf-rng):
 *   $ZEPHYR_BASE/dts/bindings/rng/nordic,nrf-rng.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_random_4000d000_PATH "/soc/random@4000d000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_random_4000d000_FULL_NAME "random@4000d000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_random_4000d000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_random_4000d000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_random_4000d000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_random_4000d000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_random_4000d000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_random_4000d000_ORD 24

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_random_4000d000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_random_4000d000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_random_4000d000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_rng DT_N_S_soc_S_random_4000d000
#define DT_N_NODELABEL_rng         DT_N_S_soc_S_random_4000d000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_random_4000d000_REG_NUM 1
#define DT_N_S_soc_S_random_4000d000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_REG_IDX_0_VAL_ADDRESS 1073795072 /* 0x4000d000 */
#define DT_N_S_soc_S_random_4000d000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_random_4000d000_RANGES_NUM 0
#define DT_N_S_soc_S_random_4000d000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_random_4000d000_IRQ_NUM 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_irq 13
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_COMPAT_MATCHES_nordic_nrf_rng 1
#define DT_N_S_soc_S_random_4000d000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_random_4000d000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_random_4000d000_P_reg {1073795072 /* 0x4000d000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_0 1073795072
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_random_4000d000, reg, 0) \
	fn(DT_N_S_soc_S_random_4000d000, reg, 1)
#define DT_N_S_soc_S_random_4000d000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_random_4000d000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_random_4000d000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_random_4000d000_P_reg_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts {13 /* 0xd */, 1 /* 0x1 */}
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_0 13
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_random_4000d000, interrupts, 0) \
	fn(DT_N_S_soc_S_random_4000d000, interrupts, 1)
#define DT_N_S_soc_S_random_4000d000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_random_4000d000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_random_4000d000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_random_4000d000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_status "okay"
#define DT_N_S_soc_S_random_4000d000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_random_4000d000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_random_4000d000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_random_4000d000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_random_4000d000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_random_4000d000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_random_4000d000, status, 0) \
	fn(DT_N_S_soc_S_random_4000d000, status, 1) \
	fn(DT_N_S_soc_S_random_4000d000, status, 2) \
	fn(DT_N_S_soc_S_random_4000d000, status, 3)
#define DT_N_S_soc_S_random_4000d000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_random_4000d000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_random_4000d000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_random_4000d000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_random_4000d000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_random_4000d000_P_status_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_compatible {"nordic,nrf-rng"}
#define DT_N_S_soc_S_random_4000d000_P_compatible_IDX_0 "nordic,nrf-rng"
#define DT_N_S_soc_S_random_4000d000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_random_4000d000, compatible, 0)
#define DT_N_S_soc_S_random_4000d000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_random_4000d000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_random_4000d000_P_compatible_LEN 1
#define DT_N_S_soc_S_random_4000d000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_label "RNG"
#define DT_N_S_soc_S_random_4000d000_P_label_STRING_TOKEN RNG
#define DT_N_S_soc_S_random_4000d000_P_label_STRING_UPPER_TOKEN RNG
#define DT_N_S_soc_S_random_4000d000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_random_4000d000, label, 0) \
	fn(DT_N_S_soc_S_random_4000d000, label, 1) \
	fn(DT_N_S_soc_S_random_4000d000, label, 2)
#define DT_N_S_soc_S_random_4000d000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_random_4000d000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_random_4000d000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_random_4000d000, label, 2, __VA_ARGS__)
#define DT_N_S_soc_S_random_4000d000_P_label_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_wakeup_source 0
#define DT_N_S_soc_S_random_4000d000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/rtc@4000b000
 *
 * Node identifier: DT_N_S_soc_S_rtc_4000b000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   $ZEPHYR_BASE/dts/bindings/rtc/nordic,nrf-rtc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_rtc_4000b000_PATH "/soc/rtc@4000b000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_rtc_4000b000_FULL_NAME "rtc@4000b000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_rtc_4000b000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_rtc_4000b000_ORD 25

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_rtc_4000b000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_rtc_4000b000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_rtc_4000b000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_rtc DT_N_S_soc_S_rtc_4000b000
#define DT_N_NODELABEL_rtc0        DT_N_S_soc_S_rtc_4000b000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_rtc_4000b000_REG_NUM 1
#define DT_N_S_soc_S_rtc_4000b000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_REG_IDX_0_VAL_ADDRESS 1073786880 /* 0x4000b000 */
#define DT_N_S_soc_S_rtc_4000b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_rtc_4000b000_RANGES_NUM 0
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_rtc_4000b000_IRQ_NUM 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_irq 11
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_COMPAT_MATCHES_nordic_nrf_rtc 1
#define DT_N_S_soc_S_rtc_4000b000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_rtc_4000b000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_rtc_4000b000_P_reg {1073786880 /* 0x4000b000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_0 1073786880
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_4000b000, reg, 0) \
	fn(DT_N_S_soc_S_rtc_4000b000, reg, 1)
#define DT_N_S_soc_S_rtc_4000b000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_4000b000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_4000b000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_4000b000_P_reg_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_cc_num 3
#define DT_N_S_soc_S_rtc_4000b000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_ppi_wrap 0
#define DT_N_S_soc_S_rtc_4000b000_P_ppi_wrap_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_fixed_top 0
#define DT_N_S_soc_S_rtc_4000b000_P_fixed_top_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_clock_frequency 32768
#define DT_N_S_soc_S_rtc_4000b000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_label "RTC_0"
#define DT_N_S_soc_S_rtc_4000b000_P_label_STRING_TOKEN RTC_0
#define DT_N_S_soc_S_rtc_4000b000_P_label_STRING_UPPER_TOKEN RTC_0
#define DT_N_S_soc_S_rtc_4000b000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_4000b000, label, 0) \
	fn(DT_N_S_soc_S_rtc_4000b000, label, 1) \
	fn(DT_N_S_soc_S_rtc_4000b000, label, 2) \
	fn(DT_N_S_soc_S_rtc_4000b000, label, 3) \
	fn(DT_N_S_soc_S_rtc_4000b000, label, 4)
#define DT_N_S_soc_S_rtc_4000b000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_4000b000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_4000b000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_4000b000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_4000b000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_4000b000, label, 4, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_4000b000_P_label_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts {11 /* 0xb */, 1 /* 0x1 */}
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_0 11
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_4000b000, interrupts, 0) \
	fn(DT_N_S_soc_S_rtc_4000b000, interrupts, 1)
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_4000b000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_4000b000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_prescaler 1
#define DT_N_S_soc_S_rtc_4000b000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_status "okay"
#define DT_N_S_soc_S_rtc_4000b000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_rtc_4000b000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_rtc_4000b000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_rtc_4000b000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_rtc_4000b000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_rtc_4000b000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_4000b000, status, 0) \
	fn(DT_N_S_soc_S_rtc_4000b000, status, 1) \
	fn(DT_N_S_soc_S_rtc_4000b000, status, 2) \
	fn(DT_N_S_soc_S_rtc_4000b000, status, 3)
#define DT_N_S_soc_S_rtc_4000b000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_4000b000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_4000b000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_4000b000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_4000b000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_4000b000_P_status_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_compatible {"nordic,nrf-rtc"}
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_IDX_0 "nordic,nrf-rtc"
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_4000b000, compatible, 0)
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_4000b000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_LEN 1
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_wakeup_source 0
#define DT_N_S_soc_S_rtc_4000b000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/rtc@40011000
 *
 * Node identifier: DT_N_S_soc_S_rtc_40011000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   $ZEPHYR_BASE/dts/bindings/rtc/nordic,nrf-rtc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_rtc_40011000_PATH "/soc/rtc@40011000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_rtc_40011000_FULL_NAME "rtc@40011000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_rtc_40011000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_rtc_40011000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_rtc_40011000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_rtc_40011000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_rtc_40011000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_rtc_40011000_ORD 26

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_rtc_40011000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_rtc_40011000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_rtc_40011000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_rtc DT_N_S_soc_S_rtc_40011000
#define DT_N_NODELABEL_rtc1        DT_N_S_soc_S_rtc_40011000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_rtc_40011000_REG_NUM 1
#define DT_N_S_soc_S_rtc_40011000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_REG_IDX_0_VAL_ADDRESS 1073811456 /* 0x40011000 */
#define DT_N_S_soc_S_rtc_40011000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_rtc_40011000_RANGES_NUM 0
#define DT_N_S_soc_S_rtc_40011000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_rtc_40011000_IRQ_NUM 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_irq 17
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_COMPAT_MATCHES_nordic_nrf_rtc 1
#define DT_N_S_soc_S_rtc_40011000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_rtc_40011000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_rtc_40011000_P_reg {1073811456 /* 0x40011000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_0 1073811456
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40011000, reg, 0) \
	fn(DT_N_S_soc_S_rtc_40011000, reg, 1)
#define DT_N_S_soc_S_rtc_40011000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_40011000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_40011000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_40011000_P_reg_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_cc_num 4
#define DT_N_S_soc_S_rtc_40011000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_ppi_wrap 0
#define DT_N_S_soc_S_rtc_40011000_P_ppi_wrap_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_fixed_top 0
#define DT_N_S_soc_S_rtc_40011000_P_fixed_top_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_clock_frequency 32768
#define DT_N_S_soc_S_rtc_40011000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_label "RTC_1"
#define DT_N_S_soc_S_rtc_40011000_P_label_STRING_TOKEN RTC_1
#define DT_N_S_soc_S_rtc_40011000_P_label_STRING_UPPER_TOKEN RTC_1
#define DT_N_S_soc_S_rtc_40011000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40011000, label, 0) \
	fn(DT_N_S_soc_S_rtc_40011000, label, 1) \
	fn(DT_N_S_soc_S_rtc_40011000, label, 2) \
	fn(DT_N_S_soc_S_rtc_40011000, label, 3) \
	fn(DT_N_S_soc_S_rtc_40011000, label, 4)
#define DT_N_S_soc_S_rtc_40011000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_40011000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_40011000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_40011000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_40011000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_40011000, label, 4, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_40011000_P_label_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts {17 /* 0x11 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_0 17
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40011000, interrupts, 0) \
	fn(DT_N_S_soc_S_rtc_40011000, interrupts, 1)
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_40011000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_40011000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_prescaler 1
#define DT_N_S_soc_S_rtc_40011000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_status "okay"
#define DT_N_S_soc_S_rtc_40011000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_rtc_40011000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_rtc_40011000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_rtc_40011000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_rtc_40011000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_rtc_40011000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40011000, status, 0) \
	fn(DT_N_S_soc_S_rtc_40011000, status, 1) \
	fn(DT_N_S_soc_S_rtc_40011000, status, 2) \
	fn(DT_N_S_soc_S_rtc_40011000, status, 3)
#define DT_N_S_soc_S_rtc_40011000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_40011000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_40011000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_40011000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_rtc_40011000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_40011000_P_status_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_compatible {"nordic,nrf-rtc"}
#define DT_N_S_soc_S_rtc_40011000_P_compatible_IDX_0 "nordic,nrf-rtc"
#define DT_N_S_soc_S_rtc_40011000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40011000, compatible, 0)
#define DT_N_S_soc_S_rtc_40011000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_40011000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_40011000_P_compatible_LEN 1
#define DT_N_S_soc_S_rtc_40011000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_wakeup_source 0
#define DT_N_S_soc_S_rtc_40011000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/spi@40003000
 *
 * Node identifier: DT_N_S_soc_S_spi_40003000
 *
 * Binding (compatible = nordic,nrf-spim):
 *   $ZEPHYR_BASE/dts/bindings/spi/nordic,nrf-spim.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_spi_40003000_PATH "/soc/spi@40003000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_spi_40003000_FULL_NAME "spi@40003000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_spi_40003000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_spi_40003000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_spi_40003000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_spi_40003000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_spi_40003000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_spi_40003000_ORD 27

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_spi_40003000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_spi_40003000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_spi_40003000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_spim DT_N_S_soc_S_spi_40003000
#define DT_N_NODELABEL_spi1         DT_N_S_soc_S_spi_40003000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_spi_40003000_REG_NUM 1
#define DT_N_S_soc_S_spi_40003000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_REG_IDX_0_VAL_ADDRESS 1073754112 /* 0x40003000 */
#define DT_N_S_soc_S_spi_40003000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_spi_40003000_RANGES_NUM 0
#define DT_N_S_soc_S_spi_40003000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_spi_40003000_IRQ_NUM 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_irq 3
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_COMPAT_MATCHES_nordic_nrf_spim 1
#define DT_N_S_soc_S_spi_40003000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_spi_40003000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_spi_40003000_P_miso_pull_up 0
#define DT_N_S_soc_S_spi_40003000_P_miso_pull_up_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_miso_pull_down 0
#define DT_N_S_soc_S_spi_40003000_P_miso_pull_down_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_anomaly_58_workaround 0
#define DT_N_S_soc_S_spi_40003000_P_anomaly_58_workaround_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_reg {1073754112 /* 0x40003000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_0 1073754112
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003000, reg, 0) \
	fn(DT_N_S_soc_S_spi_40003000, reg, 1)
#define DT_N_S_soc_S_spi_40003000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40003000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40003000_P_reg_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts {3 /* 0x3 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_0 3
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003000, interrupts, 0) \
	fn(DT_N_S_soc_S_spi_40003000, interrupts, 1)
#define DT_N_S_soc_S_spi_40003000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40003000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40003000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_label "SPI_1"
#define DT_N_S_soc_S_spi_40003000_P_label_STRING_TOKEN SPI_1
#define DT_N_S_soc_S_spi_40003000_P_label_STRING_UPPER_TOKEN SPI_1
#define DT_N_S_soc_S_spi_40003000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003000, label, 0) \
	fn(DT_N_S_soc_S_spi_40003000, label, 1) \
	fn(DT_N_S_soc_S_spi_40003000, label, 2) \
	fn(DT_N_S_soc_S_spi_40003000, label, 3) \
	fn(DT_N_S_soc_S_spi_40003000, label, 4)
#define DT_N_S_soc_S_spi_40003000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40003000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40003000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40003000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40003000, label, 4, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40003000_P_label_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_status "disabled"
#define DT_N_S_soc_S_spi_40003000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_spi_40003000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_spi_40003000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_spi_40003000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_spi_40003000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_spi_40003000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003000, status, 0) \
	fn(DT_N_S_soc_S_spi_40003000, status, 1) \
	fn(DT_N_S_soc_S_spi_40003000, status, 2) \
	fn(DT_N_S_soc_S_spi_40003000, status, 3) \
	fn(DT_N_S_soc_S_spi_40003000, status, 4) \
	fn(DT_N_S_soc_S_spi_40003000, status, 5) \
	fn(DT_N_S_soc_S_spi_40003000, status, 6) \
	fn(DT_N_S_soc_S_spi_40003000, status, 7)
#define DT_N_S_soc_S_spi_40003000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40003000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40003000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40003000, status, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40003000, status, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40003000, status, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40003000, status, 6, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40003000, status, 7, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40003000_P_status_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_compatible {"nordic,nrf-spim"}
#define DT_N_S_soc_S_spi_40003000_P_compatible_IDX_0 "nordic,nrf-spim"
#define DT_N_S_soc_S_spi_40003000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003000, compatible, 0)
#define DT_N_S_soc_S_spi_40003000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40003000_P_compatible_LEN 1
#define DT_N_S_soc_S_spi_40003000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_wakeup_source 0
#define DT_N_S_soc_S_spi_40003000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/spi@40004000
 *
 * Node identifier: DT_N_S_soc_S_spi_40004000
 *
 * Binding (compatible = nordic,nrf-spim):
 *   $ZEPHYR_BASE/dts/bindings/spi/nordic,nrf-spim.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_spi_40004000_PATH "/soc/spi@40004000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_spi_40004000_FULL_NAME "spi@40004000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_spi_40004000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_spi_40004000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_spi_40004000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_spi_40004000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_spi_40004000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_spi_40004000_ORD 28

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_spi_40004000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_spi_40004000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_spi_40004000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_spim DT_N_S_soc_S_spi_40004000
#define DT_N_NODELABEL_spi0         DT_N_S_soc_S_spi_40004000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_spi_40004000_REG_NUM 1
#define DT_N_S_soc_S_spi_40004000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_REG_IDX_0_VAL_ADDRESS 1073758208 /* 0x40004000 */
#define DT_N_S_soc_S_spi_40004000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_spi_40004000_RANGES_NUM 0
#define DT_N_S_soc_S_spi_40004000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_spi_40004000_IRQ_NUM 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_irq 4
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_COMPAT_MATCHES_nordic_nrf_spim 1
#define DT_N_S_soc_S_spi_40004000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_spi_40004000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_spi_40004000_P_miso_pull_up 0
#define DT_N_S_soc_S_spi_40004000_P_miso_pull_up_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_miso_pull_down 0
#define DT_N_S_soc_S_spi_40004000_P_miso_pull_down_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_anomaly_58_workaround 0
#define DT_N_S_soc_S_spi_40004000_P_anomaly_58_workaround_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_reg {1073758208 /* 0x40004000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_0 1073758208
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40004000, reg, 0) \
	fn(DT_N_S_soc_S_spi_40004000, reg, 1)
#define DT_N_S_soc_S_spi_40004000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40004000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40004000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40004000_P_reg_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts {4 /* 0x4 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_0 4
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40004000, interrupts, 0) \
	fn(DT_N_S_soc_S_spi_40004000, interrupts, 1)
#define DT_N_S_soc_S_spi_40004000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40004000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40004000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40004000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_label "SPI_0"
#define DT_N_S_soc_S_spi_40004000_P_label_STRING_TOKEN SPI_0
#define DT_N_S_soc_S_spi_40004000_P_label_STRING_UPPER_TOKEN SPI_0
#define DT_N_S_soc_S_spi_40004000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40004000, label, 0) \
	fn(DT_N_S_soc_S_spi_40004000, label, 1) \
	fn(DT_N_S_soc_S_spi_40004000, label, 2) \
	fn(DT_N_S_soc_S_spi_40004000, label, 3) \
	fn(DT_N_S_soc_S_spi_40004000, label, 4)
#define DT_N_S_soc_S_spi_40004000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40004000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40004000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40004000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40004000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40004000, label, 4, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40004000_P_label_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_status "disabled"
#define DT_N_S_soc_S_spi_40004000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_spi_40004000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_spi_40004000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_spi_40004000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_spi_40004000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_spi_40004000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40004000, status, 0) \
	fn(DT_N_S_soc_S_spi_40004000, status, 1) \
	fn(DT_N_S_soc_S_spi_40004000, status, 2) \
	fn(DT_N_S_soc_S_spi_40004000, status, 3) \
	fn(DT_N_S_soc_S_spi_40004000, status, 4) \
	fn(DT_N_S_soc_S_spi_40004000, status, 5) \
	fn(DT_N_S_soc_S_spi_40004000, status, 6) \
	fn(DT_N_S_soc_S_spi_40004000, status, 7)
#define DT_N_S_soc_S_spi_40004000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40004000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40004000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40004000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40004000, status, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40004000, status, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40004000, status, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40004000, status, 6, __VA_ARGS__) \
	fn(DT_N_S_soc_S_spi_40004000, status, 7, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40004000_P_status_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_compatible {"nordic,nrf-spim"}
#define DT_N_S_soc_S_spi_40004000_P_compatible_IDX_0 "nordic,nrf-spim"
#define DT_N_S_soc_S_spi_40004000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40004000, compatible, 0)
#define DT_N_S_soc_S_spi_40004000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40004000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40004000_P_compatible_LEN 1
#define DT_N_S_soc_S_spi_40004000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_wakeup_source 0
#define DT_N_S_soc_S_spi_40004000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/temp@4000c000
 *
 * Node identifier: DT_N_S_soc_S_temp_4000c000
 *
 * Binding (compatible = nordic,nrf-temp):
 *   $ZEPHYR_BASE/dts/bindings/sensor/nordic,nrf-temp.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_temp_4000c000_PATH "/soc/temp@4000c000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_temp_4000c000_FULL_NAME "temp@4000c000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_temp_4000c000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_temp_4000c000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_temp_4000c000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_temp_4000c000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_temp_4000c000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_temp_4000c000_ORD 29

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_temp_4000c000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_temp_4000c000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_temp_4000c000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_temp DT_N_S_soc_S_temp_4000c000
#define DT_N_NODELABEL_temp         DT_N_S_soc_S_temp_4000c000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_temp_4000c000_REG_NUM 1
#define DT_N_S_soc_S_temp_4000c000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_REG_IDX_0_VAL_ADDRESS 1073790976 /* 0x4000c000 */
#define DT_N_S_soc_S_temp_4000c000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_temp_4000c000_RANGES_NUM 0
#define DT_N_S_soc_S_temp_4000c000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_temp_4000c000_IRQ_NUM 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_irq 12
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_COMPAT_MATCHES_nordic_nrf_temp 1
#define DT_N_S_soc_S_temp_4000c000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_temp_4000c000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_temp_4000c000_P_reg {1073790976 /* 0x4000c000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_0 1073790976
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_temp_4000c000, reg, 0) \
	fn(DT_N_S_soc_S_temp_4000c000, reg, 1)
#define DT_N_S_soc_S_temp_4000c000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_temp_4000c000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_temp_4000c000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_temp_4000c000_P_reg_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts {12 /* 0xc */, 1 /* 0x1 */}
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_0 12
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_temp_4000c000, interrupts, 0) \
	fn(DT_N_S_soc_S_temp_4000c000, interrupts, 1)
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_temp_4000c000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_temp_4000c000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_label "TEMP_0"
#define DT_N_S_soc_S_temp_4000c000_P_label_STRING_TOKEN TEMP_0
#define DT_N_S_soc_S_temp_4000c000_P_label_STRING_UPPER_TOKEN TEMP_0
#define DT_N_S_soc_S_temp_4000c000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_temp_4000c000, label, 0) \
	fn(DT_N_S_soc_S_temp_4000c000, label, 1) \
	fn(DT_N_S_soc_S_temp_4000c000, label, 2) \
	fn(DT_N_S_soc_S_temp_4000c000, label, 3) \
	fn(DT_N_S_soc_S_temp_4000c000, label, 4) \
	fn(DT_N_S_soc_S_temp_4000c000, label, 5)
#define DT_N_S_soc_S_temp_4000c000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_temp_4000c000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_temp_4000c000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_temp_4000c000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_temp_4000c000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_temp_4000c000, label, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_temp_4000c000, label, 5, __VA_ARGS__)
#define DT_N_S_soc_S_temp_4000c000_P_label_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_status "okay"
#define DT_N_S_soc_S_temp_4000c000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_temp_4000c000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_temp_4000c000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_temp_4000c000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_temp_4000c000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_temp_4000c000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_temp_4000c000, status, 0) \
	fn(DT_N_S_soc_S_temp_4000c000, status, 1) \
	fn(DT_N_S_soc_S_temp_4000c000, status, 2) \
	fn(DT_N_S_soc_S_temp_4000c000, status, 3)
#define DT_N_S_soc_S_temp_4000c000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_temp_4000c000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_temp_4000c000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_temp_4000c000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_temp_4000c000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_temp_4000c000_P_status_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_compatible {"nordic,nrf-temp"}
#define DT_N_S_soc_S_temp_4000c000_P_compatible_IDX_0 "nordic,nrf-temp"
#define DT_N_S_soc_S_temp_4000c000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_temp_4000c000, compatible, 0)
#define DT_N_S_soc_S_temp_4000c000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_temp_4000c000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_temp_4000c000_P_compatible_LEN 1
#define DT_N_S_soc_S_temp_4000c000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_wakeup_source 0
#define DT_N_S_soc_S_temp_4000c000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/timer@40008000
 *
 * Node identifier: DT_N_S_soc_S_timer_40008000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE/dts/bindings/timer/nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_40008000_PATH "/soc/timer@40008000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_40008000_FULL_NAME "timer@40008000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_40008000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_timer_40008000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_40008000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_40008000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_timer_40008000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_40008000_ORD 30

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_40008000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_40008000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_40008000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_timer DT_N_S_soc_S_timer_40008000
#define DT_N_NODELABEL_timer0        DT_N_S_soc_S_timer_40008000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_timer_40008000_REG_NUM 1
#define DT_N_S_soc_S_timer_40008000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_REG_IDX_0_VAL_ADDRESS 1073774592 /* 0x40008000 */
#define DT_N_S_soc_S_timer_40008000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_40008000_RANGES_NUM 0
#define DT_N_S_soc_S_timer_40008000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_timer_40008000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_irq 8
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_40008000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_timer_40008000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_timer_40008000_P_reg {1073774592 /* 0x40008000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_0 1073774592
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40008000, reg, 0) \
	fn(DT_N_S_soc_S_timer_40008000, reg, 1)
#define DT_N_S_soc_S_timer_40008000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_40008000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40008000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40008000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_cc_num 4
#define DT_N_S_soc_S_timer_40008000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts {8 /* 0x8 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_0 8
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40008000, interrupts, 0) \
	fn(DT_N_S_soc_S_timer_40008000, interrupts, 1)
#define DT_N_S_soc_S_timer_40008000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_40008000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40008000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40008000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_label "TIMER_0"
#define DT_N_S_soc_S_timer_40008000_P_label_STRING_TOKEN TIMER_0
#define DT_N_S_soc_S_timer_40008000_P_label_STRING_UPPER_TOKEN TIMER_0
#define DT_N_S_soc_S_timer_40008000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40008000, label, 0) \
	fn(DT_N_S_soc_S_timer_40008000, label, 1) \
	fn(DT_N_S_soc_S_timer_40008000, label, 2) \
	fn(DT_N_S_soc_S_timer_40008000, label, 3) \
	fn(DT_N_S_soc_S_timer_40008000, label, 4) \
	fn(DT_N_S_soc_S_timer_40008000, label, 5) \
	fn(DT_N_S_soc_S_timer_40008000, label, 6)
#define DT_N_S_soc_S_timer_40008000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_40008000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40008000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40008000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40008000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40008000, label, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40008000, label, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40008000, label, 6, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40008000_P_label_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_prescaler 0
#define DT_N_S_soc_S_timer_40008000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_status "okay"
#define DT_N_S_soc_S_timer_40008000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_timer_40008000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_40008000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_timer_40008000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_timer_40008000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_40008000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40008000, status, 0) \
	fn(DT_N_S_soc_S_timer_40008000, status, 1) \
	fn(DT_N_S_soc_S_timer_40008000, status, 2) \
	fn(DT_N_S_soc_S_timer_40008000, status, 3)
#define DT_N_S_soc_S_timer_40008000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_40008000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40008000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40008000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40008000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40008000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_40008000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_40008000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40008000, compatible, 0)
#define DT_N_S_soc_S_timer_40008000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_40008000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40008000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_40008000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_wakeup_source 0
#define DT_N_S_soc_S_timer_40008000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/timer@40009000
 *
 * Node identifier: DT_N_S_soc_S_timer_40009000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE/dts/bindings/timer/nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_40009000_PATH "/soc/timer@40009000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_40009000_FULL_NAME "timer@40009000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_40009000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_timer_40009000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_40009000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_40009000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_timer_40009000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_40009000_ORD 31

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_40009000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_40009000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_40009000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_timer DT_N_S_soc_S_timer_40009000
#define DT_N_NODELABEL_timer1        DT_N_S_soc_S_timer_40009000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_timer_40009000_REG_NUM 1
#define DT_N_S_soc_S_timer_40009000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_REG_IDX_0_VAL_ADDRESS 1073778688 /* 0x40009000 */
#define DT_N_S_soc_S_timer_40009000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_40009000_RANGES_NUM 0
#define DT_N_S_soc_S_timer_40009000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_timer_40009000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_irq 9
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_40009000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_timer_40009000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_timer_40009000_P_reg {1073778688 /* 0x40009000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_0 1073778688
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40009000, reg, 0) \
	fn(DT_N_S_soc_S_timer_40009000, reg, 1)
#define DT_N_S_soc_S_timer_40009000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_40009000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40009000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40009000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_cc_num 4
#define DT_N_S_soc_S_timer_40009000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts {9 /* 0x9 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_0 9
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40009000, interrupts, 0) \
	fn(DT_N_S_soc_S_timer_40009000, interrupts, 1)
#define DT_N_S_soc_S_timer_40009000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_40009000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40009000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40009000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_label "TIMER_1"
#define DT_N_S_soc_S_timer_40009000_P_label_STRING_TOKEN TIMER_1
#define DT_N_S_soc_S_timer_40009000_P_label_STRING_UPPER_TOKEN TIMER_1
#define DT_N_S_soc_S_timer_40009000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40009000, label, 0) \
	fn(DT_N_S_soc_S_timer_40009000, label, 1) \
	fn(DT_N_S_soc_S_timer_40009000, label, 2) \
	fn(DT_N_S_soc_S_timer_40009000, label, 3) \
	fn(DT_N_S_soc_S_timer_40009000, label, 4) \
	fn(DT_N_S_soc_S_timer_40009000, label, 5) \
	fn(DT_N_S_soc_S_timer_40009000, label, 6)
#define DT_N_S_soc_S_timer_40009000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_40009000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40009000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40009000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40009000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40009000, label, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40009000, label, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40009000, label, 6, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40009000_P_label_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_prescaler 0
#define DT_N_S_soc_S_timer_40009000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_status "okay"
#define DT_N_S_soc_S_timer_40009000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_timer_40009000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_40009000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_timer_40009000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_timer_40009000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_40009000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40009000, status, 0) \
	fn(DT_N_S_soc_S_timer_40009000, status, 1) \
	fn(DT_N_S_soc_S_timer_40009000, status, 2) \
	fn(DT_N_S_soc_S_timer_40009000, status, 3)
#define DT_N_S_soc_S_timer_40009000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_40009000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40009000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40009000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_40009000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40009000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_40009000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_40009000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40009000, compatible, 0)
#define DT_N_S_soc_S_timer_40009000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_40009000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40009000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_40009000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_wakeup_source 0
#define DT_N_S_soc_S_timer_40009000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/timer@e000e010
 *
 * Node identifier: DT_N_S_soc_S_timer_e000e010
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_e000e010_PATH "/soc/timer@e000e010"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_e000e010_FULL_NAME "timer@e000e010"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_e000e010_PARENT DT_N_S_soc
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_e000e010_ORD 32

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_e000e010_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_e000e010_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_e000e010_EXISTS 1
#define DT_N_INST_0_arm_armv7m_systick DT_N_S_soc_S_timer_e000e010
#define DT_N_NODELABEL_systick         DT_N_S_soc_S_timer_e000e010

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_timer_e000e010_REG_NUM 1
#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_ADDRESS 3758153744 /* 0xe000e010 */
#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_SIZE 16 /* 0x10 */
#define DT_N_S_soc_S_timer_e000e010_RANGES_NUM 0
#define DT_N_S_soc_S_timer_e000e010_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_timer_e000e010_IRQ_NUM 0
#define DT_N_S_soc_S_timer_e000e010_COMPAT_MATCHES_arm_armv7m_systick 1
#define DT_N_S_soc_S_timer_e000e010_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_timer_e000e010_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_timer_e000e010_P_compatible {"arm,armv7m-systick"}
#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0 "arm,armv7m-systick"
#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0)
#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_e000e010_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_e000e010_P_compatible_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_reg {3758153744 /* 0xe000e010 */, 16 /* 0x10 */}
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0 3758153744
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1 16
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, reg, 0) \
	fn(DT_N_S_soc_S_timer_e000e010, reg, 1)
#define DT_N_S_soc_S_timer_e000e010_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_e000e010, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_timer_e000e010_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_status "disabled"
#define DT_N_S_soc_S_timer_e000e010_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_timer_e000e010_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, status, 0) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 1) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 2) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 3) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 4) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 5) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 6) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 7)
#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 6, __VA_ARGS__) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 7, __VA_ARGS__)
#define DT_N_S_soc_S_timer_e000e010_P_status_EXISTS 1

/*
 * Devicetree node: /soc/uart@40002000
 *
 * Node identifier: DT_N_S_soc_S_uart_40002000
 *
 * Binding (compatible = nordic,nrf-uarte):
 *   $ZEPHYR_BASE/dts/bindings/serial/nordic,nrf-uarte.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_uart_40002000_PATH "/soc/uart@40002000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_uart_40002000_FULL_NAME "uart@40002000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_uart_40002000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_uart_40002000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_uart_40002000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_uart_40002000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_uart_40002000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_uart_40002000_ORD 33

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_uart_40002000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_uart_40002000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_uart_40002000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_uarte DT_N_S_soc_S_uart_40002000
#define DT_N_NODELABEL_uart0         DT_N_S_soc_S_uart_40002000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_uart_40002000_REG_NUM 1
#define DT_N_S_soc_S_uart_40002000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_REG_IDX_0_VAL_ADDRESS 1073750016 /* 0x40002000 */
#define DT_N_S_soc_S_uart_40002000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_uart_40002000_RANGES_NUM 0
#define DT_N_S_soc_S_uart_40002000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_uart_40002000_IRQ_NUM 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_irq 2
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_COMPAT_MATCHES_nordic_nrf_uarte 1
#define DT_N_S_soc_S_uart_40002000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_uart_40002000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_uart_40002000_P_reg {1073750016 /* 0x40002000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_0 1073750016
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40002000, reg, 0) \
	fn(DT_N_S_soc_S_uart_40002000, reg, 1)
#define DT_N_S_soc_S_uart_40002000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uart_40002000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uart_40002000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_uart_40002000_P_reg_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts {2 /* 0x2 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_0 2
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40002000, interrupts, 0) \
	fn(DT_N_S_soc_S_uart_40002000, interrupts, 1)
#define DT_N_S_soc_S_uart_40002000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uart_40002000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uart_40002000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_uart_40002000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_disable_rx 0
#define DT_N_S_soc_S_uart_40002000_P_disable_rx_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_rx_pull_up 0
#define DT_N_S_soc_S_uart_40002000_P_rx_pull_up_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_cts_pull_up 0
#define DT_N_S_soc_S_uart_40002000_P_cts_pull_up_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_label "UART_0"
#define DT_N_S_soc_S_uart_40002000_P_label_STRING_TOKEN UART_0
#define DT_N_S_soc_S_uart_40002000_P_label_STRING_UPPER_TOKEN UART_0
#define DT_N_S_soc_S_uart_40002000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40002000, label, 0) \
	fn(DT_N_S_soc_S_uart_40002000, label, 1) \
	fn(DT_N_S_soc_S_uart_40002000, label, 2) \
	fn(DT_N_S_soc_S_uart_40002000, label, 3) \
	fn(DT_N_S_soc_S_uart_40002000, label, 4) \
	fn(DT_N_S_soc_S_uart_40002000, label, 5)
#define DT_N_S_soc_S_uart_40002000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uart_40002000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uart_40002000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uart_40002000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uart_40002000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uart_40002000, label, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uart_40002000, label, 5, __VA_ARGS__)
#define DT_N_S_soc_S_uart_40002000_P_label_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_hw_flow_control 0
#define DT_N_S_soc_S_uart_40002000_P_hw_flow_control_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_status "disabled"
#define DT_N_S_soc_S_uart_40002000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_uart_40002000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_uart_40002000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_uart_40002000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_uart_40002000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_uart_40002000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40002000, status, 0) \
	fn(DT_N_S_soc_S_uart_40002000, status, 1) \
	fn(DT_N_S_soc_S_uart_40002000, status, 2) \
	fn(DT_N_S_soc_S_uart_40002000, status, 3) \
	fn(DT_N_S_soc_S_uart_40002000, status, 4) \
	fn(DT_N_S_soc_S_uart_40002000, status, 5) \
	fn(DT_N_S_soc_S_uart_40002000, status, 6) \
	fn(DT_N_S_soc_S_uart_40002000, status, 7)
#define DT_N_S_soc_S_uart_40002000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uart_40002000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uart_40002000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uart_40002000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uart_40002000, status, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uart_40002000, status, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uart_40002000, status, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uart_40002000, status, 6, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uart_40002000, status, 7, __VA_ARGS__)
#define DT_N_S_soc_S_uart_40002000_P_status_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_compatible {"nordic,nrf-uarte"}
#define DT_N_S_soc_S_uart_40002000_P_compatible_IDX_0 "nordic,nrf-uarte"
#define DT_N_S_soc_S_uart_40002000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40002000, compatible, 0)
#define DT_N_S_soc_S_uart_40002000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uart_40002000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uart_40002000_P_compatible_LEN 1
#define DT_N_S_soc_S_uart_40002000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_wakeup_source 0
#define DT_N_S_soc_S_uart_40002000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/uicr@10001000
 *
 * Node identifier: DT_N_S_soc_S_uicr_10001000
 *
 * Binding (compatible = nordic,nrf-uicr):
 *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-uicr.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_uicr_10001000_PATH "/soc/uicr@10001000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_uicr_10001000_FULL_NAME "uicr@10001000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_uicr_10001000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_uicr_10001000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_uicr_10001000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_uicr_10001000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_uicr_10001000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_uicr_10001000_ORD 34

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_uicr_10001000_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_uicr_10001000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_uicr_10001000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_uicr DT_N_S_soc_S_uicr_10001000
#define DT_N_NODELABEL_uicr         DT_N_S_soc_S_uicr_10001000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_uicr_10001000_REG_NUM 1
#define DT_N_S_soc_S_uicr_10001000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_REG_IDX_0_VAL_ADDRESS 268439552 /* 0x10001000 */
#define DT_N_S_soc_S_uicr_10001000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_uicr_10001000_RANGES_NUM 0
#define DT_N_S_soc_S_uicr_10001000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_uicr_10001000_IRQ_NUM 0
#define DT_N_S_soc_S_uicr_10001000_COMPAT_MATCHES_nordic_nrf_uicr 1
#define DT_N_S_soc_S_uicr_10001000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_uicr_10001000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_uicr_10001000_P_reg {268439552 /* 0x10001000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_uicr_10001000_P_reg_IDX_0 268439552
#define DT_N_S_soc_S_uicr_10001000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_uicr_10001000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uicr_10001000, reg, 0) \
	fn(DT_N_S_soc_S_uicr_10001000, reg, 1)
#define DT_N_S_soc_S_uicr_10001000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uicr_10001000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uicr_10001000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_uicr_10001000_P_reg_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_status "okay"
#define DT_N_S_soc_S_uicr_10001000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_uicr_10001000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_uicr_10001000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_uicr_10001000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_uicr_10001000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_uicr_10001000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uicr_10001000, status, 0) \
	fn(DT_N_S_soc_S_uicr_10001000, status, 1) \
	fn(DT_N_S_soc_S_uicr_10001000, status, 2) \
	fn(DT_N_S_soc_S_uicr_10001000, status, 3)
#define DT_N_S_soc_S_uicr_10001000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uicr_10001000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uicr_10001000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uicr_10001000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_uicr_10001000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_uicr_10001000_P_status_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_compatible {"nordic,nrf-uicr"}
#define DT_N_S_soc_S_uicr_10001000_P_compatible_IDX_0 "nordic,nrf-uicr"
#define DT_N_S_soc_S_uicr_10001000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uicr_10001000, compatible, 0)
#define DT_N_S_soc_S_uicr_10001000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uicr_10001000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uicr_10001000_P_compatible_LEN 1
#define DT_N_S_soc_S_uicr_10001000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_wakeup_source 0
#define DT_N_S_soc_S_uicr_10001000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/watchdog@40010000
 *
 * Node identifier: DT_N_S_soc_S_watchdog_40010000
 *
 * Binding (compatible = nordic,nrf-watchdog):
 *   $ZEPHYR_BASE/dts/bindings/watchdog/nordic,nrf-watchdog.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_watchdog_40010000_PATH "/soc/watchdog@40010000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_watchdog_40010000_FULL_NAME "watchdog@40010000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_watchdog_40010000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_watchdog_40010000_ORD 35

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_watchdog_40010000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_watchdog_40010000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_watchdog_40010000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_watchdog DT_N_S_soc_S_watchdog_40010000
#define DT_N_NODELABEL_wdt              DT_N_S_soc_S_watchdog_40010000
#define DT_N_NODELABEL_wdt0             DT_N_S_soc_S_watchdog_40010000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_watchdog_40010000_REG_NUM 1
#define DT_N_S_soc_S_watchdog_40010000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_REG_IDX_0_VAL_ADDRESS 1073807360 /* 0x40010000 */
#define DT_N_S_soc_S_watchdog_40010000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_watchdog_40010000_RANGES_NUM 0
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_watchdog_40010000_IRQ_NUM 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_irq 16
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_COMPAT_MATCHES_nordic_nrf_watchdog 1
#define DT_N_S_soc_S_watchdog_40010000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_watchdog_40010000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_watchdog_40010000_P_reg {1073807360 /* 0x40010000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_0 1073807360
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40010000, reg, 0) \
	fn(DT_N_S_soc_S_watchdog_40010000, reg, 1)
#define DT_N_S_soc_S_watchdog_40010000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_40010000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_watchdog_40010000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_watchdog_40010000_P_reg_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_label "WDT"
#define DT_N_S_soc_S_watchdog_40010000_P_label_STRING_TOKEN WDT
#define DT_N_S_soc_S_watchdog_40010000_P_label_STRING_UPPER_TOKEN WDT
#define DT_N_S_soc_S_watchdog_40010000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40010000, label, 0) \
	fn(DT_N_S_soc_S_watchdog_40010000, label, 1) \
	fn(DT_N_S_soc_S_watchdog_40010000, label, 2)
#define DT_N_S_soc_S_watchdog_40010000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_40010000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_watchdog_40010000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_watchdog_40010000, label, 2, __VA_ARGS__)
#define DT_N_S_soc_S_watchdog_40010000_P_label_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts {16 /* 0x10 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_0 16
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40010000, interrupts, 0) \
	fn(DT_N_S_soc_S_watchdog_40010000, interrupts, 1)
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_40010000, interrupts, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_watchdog_40010000, interrupts, 1, __VA_ARGS__)
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_status "okay"
#define DT_N_S_soc_S_watchdog_40010000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_watchdog_40010000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_watchdog_40010000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_watchdog_40010000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_watchdog_40010000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_watchdog_40010000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40010000, status, 0) \
	fn(DT_N_S_soc_S_watchdog_40010000, status, 1) \
	fn(DT_N_S_soc_S_watchdog_40010000, status, 2) \
	fn(DT_N_S_soc_S_watchdog_40010000, status, 3)
#define DT_N_S_soc_S_watchdog_40010000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_40010000, status, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_watchdog_40010000, status, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_watchdog_40010000, status, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_watchdog_40010000, status, 3, __VA_ARGS__)
#define DT_N_S_soc_S_watchdog_40010000_P_status_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_compatible {"nordic,nrf-watchdog"}
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_IDX_0 "nordic,nrf-watchdog"
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40010000, compatible, 0)
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_40010000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_LEN 1
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_wakeup_source 0
#define DT_N_S_soc_S_watchdog_40010000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000
 *
 * Binding (compatible = nordic,nrf52-flash-controller):
 *   $ZEPHYR_BASE/dts/bindings/flash_controller/nordic,nrf52-flash-controller.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_PATH "/soc/flash-controller@4001e000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_FULL_NAME "flash-controller@4001e000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0)
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0) 
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, __VA_ARGS__) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_ORD 36

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_SUPPORTS_ORDS \
	37, /* /soc/flash-controller@4001e000/flash@0 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_EXISTS 1
#define DT_N_INST_0_nordic_nrf52_flash_controller DT_N_S_soc_S_flash_controller_4001e000
#define DT_N_NODELABEL_flash_controller           DT_N_S_soc_S_flash_controller_4001e000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_4001e000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_REG_IDX_0_VAL_ADDRESS 1073864704 /* 0x4001e000 */
#define DT_N_S_soc_S_flash_controller_4001e000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_flash_controller_4001e000_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_COMPAT_MATCHES_nordic_nrf52_flash_controller 1
#define DT_N_S_soc_S_flash_controller_4001e000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_4001e000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_P_label "NRF_FLASH_DRV_NAME"
#define DT_N_S_soc_S_flash_controller_4001e000_P_label_STRING_TOKEN NRF_FLASH_DRV_NAME
#define DT_N_S_soc_S_flash_controller_4001e000_P_label_STRING_UPPER_TOKEN NRF_FLASH_DRV_NAME
#define DT_N_S_soc_S_flash_controller_4001e000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000, label, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 1) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 2) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 3) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 4) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 5) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 6) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 7) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 8) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 9) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 10) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 11) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 12) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 13) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 14) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 15) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 16) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 17)
#define DT_N_S_soc_S_flash_controller_4001e000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 6, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 7, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 8, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 9, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 10, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 11, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 12, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 13, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 14, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 15, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 16, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 17, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg {1073864704 /* 0x4001e000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_0 1073864704
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000, reg, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, reg, 1)
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible {"nordic,nrf52-flash-controller"}
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_IDX_0 "nordic,nrf52-flash-controller"
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000, compatible, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_LEN 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_wakeup_source 0
#define DT_N_S_soc_S_flash_controller_4001e000_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0
 *
 * Binding (compatible = soc-nv-flash):
 *   $ZEPHYR_BASE/dts/bindings/mtd/soc-nv-flash.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_PATH "/soc/flash-controller@4001e000/flash@0"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FULL_NAME "flash@0"

/* Node parent (/soc/flash-controller@4001e000) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_PARENT DT_N_S_soc_S_flash_controller_4001e000
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions, __VA_ARGS__) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_ORD 37

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REQUIRES_ORDS \
	36, /* /soc/flash-controller@4001e000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_SUPPORTS_ORDS \
	38, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_EXISTS 1
#define DT_N_INST_0_soc_nv_flash DT_N_S_soc_S_flash_controller_4001e000_S_flash_0
#define DT_N_NODELABEL_flash0    DT_N_S_soc_S_flash_controller_4001e000_S_flash_0

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_IDX_0_VAL_SIZE 196608 /* 0x30000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_COMPAT_MATCHES_soc_nv_flash 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_label "NRF_FLASH"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_label_STRING_TOKEN NRF_FLASH
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_label_STRING_UPPER_TOKEN NRF_FLASH
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 1) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 2) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 3) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 4) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 5) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 6) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 7) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 8)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 6, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 7, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 8, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_erase_block_size 4096
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_erase_block_size_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_write_block_size 4
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_write_block_size_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible {"soc-nv-flash"}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_IDX_0 "soc-nv-flash"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, compatible, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_LEN 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg {0 /* 0x0 */, 196608 /* 0x30000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_0 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_1 196608
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, reg, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, reg, 1)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_wakeup_source 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_wakeup_source_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
 *
 * Binding (compatible = fixed-partitions):
 *   $ZEPHYR_BASE/dts/bindings/mtd/fixed-partitions.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_PATH "/soc/flash-controller@4001e000/flash@0/partitions"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FULL_NAME "partitions"

/* Node parent (/soc/flash-controller@4001e000/flash@0) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, __VA_ARGS__) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_ORD 38

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_REQUIRES_ORDS \
	37, /* /soc/flash-controller@4001e000/flash@0 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_SUPPORTS_ORDS \
	39, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@0 */ \
	40, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@c000 */ \
	41, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@19000 */ \
	42, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@26000 */ \
	43, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@29000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_EXISTS 1
#define DT_N_INST_0_fixed_partitions DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_REG_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_COMPAT_MATCHES_fixed_partitions 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@0
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@0"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FULL_NAME "partition@0"

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_ORD 39

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REQUIRES_ORDS \
	38, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_EXISTS 1
#define DT_N_NODELABEL_boot_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_VAL_SIZE 49152 /* 0xc000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_PINCTRL_NUM 0

/* fixed-partitions identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_PARTITION_ID 0

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label "mcuboot"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_STRING_TOKEN mcuboot
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_STRING_UPPER_TOKEN MCUBOOT
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 1) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 2) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 3) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 4) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 5) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 6)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 6, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg {0 /* 0x0 */, 49152 /* 0xc000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_0 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_1 49152
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, reg, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, reg, 1)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@c000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@c000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FULL_NAME "partition@c000"

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_ORD 40

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_REQUIRES_ORDS \
	38, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_EXISTS 1
#define DT_N_NODELABEL_slot0_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_REG_IDX_0_VAL_ADDRESS 49152 /* 0xc000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_REG_IDX_0_VAL_SIZE 53248 /* 0xd000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_PINCTRL_NUM 0

/* fixed-partitions identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_PARTITION_ID 1

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label "image-0"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_STRING_TOKEN image_0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_STRING_UPPER_TOKEN IMAGE_0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 1) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 2) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 3) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 4) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 5) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 6)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 6, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg {49152 /* 0xc000 */, 53248 /* 0xd000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_IDX_0 49152
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_IDX_1 53248
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, reg, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, reg, 1)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@19000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@19000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_FULL_NAME "partition@19000"

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_ORD 41

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_REQUIRES_ORDS \
	38, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_EXISTS 1
#define DT_N_NODELABEL_slot1_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_REG_IDX_0_VAL_ADDRESS 102400 /* 0x19000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_REG_IDX_0_VAL_SIZE 53248 /* 0xd000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_PINCTRL_NUM 0

/* fixed-partitions identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_PARTITION_ID 2

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_label "image-1"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_label_STRING_TOKEN image_1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_label_STRING_UPPER_TOKEN IMAGE_1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, label, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, label, 1) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, label, 2) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, label, 3) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, label, 4) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, label, 5) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, label, 6)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, label, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, label, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, label, 6, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_reg {102400 /* 0x19000 */, 53248 /* 0xd000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_reg_IDX_0 102400
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_reg_IDX_1 53248
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, reg, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, reg, 1)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@26000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@26000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_FULL_NAME "partition@26000"

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_ORD 42

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_REQUIRES_ORDS \
	38, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_EXISTS 1
#define DT_N_NODELABEL_scratch_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_REG_IDX_0_VAL_ADDRESS 155648 /* 0x26000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_REG_IDX_0_VAL_SIZE 12288 /* 0x3000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_PINCTRL_NUM 0

/* fixed-partitions identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_PARTITION_ID 3

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_label "image-scratch"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_label_STRING_TOKEN image_scratch
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_label_STRING_UPPER_TOKEN IMAGE_SCRATCH
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 1) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 2) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 3) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 4) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 5) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 6) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 7) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 8) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 9) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 10) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 11) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 12)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 6, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 7, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 8, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 9, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 10, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 11, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, label, 12, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_reg {155648 /* 0x26000 */, 12288 /* 0x3000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_reg_IDX_0 155648
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_reg_IDX_1 12288
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, reg, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, reg, 1)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@29000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@29000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_FULL_NAME "partition@29000"

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_ORD 43

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_REQUIRES_ORDS \
	38, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_EXISTS 1
#define DT_N_NODELABEL_storage_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_REG_IDX_0_VAL_ADDRESS 167936 /* 0x29000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_REG_IDX_0_VAL_SIZE 28672 /* 0x7000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_PINCTRL_NUM 0

/* fixed-partitions identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_PARTITION_ID 4

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_label "storage"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_label_STRING_TOKEN storage
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_label_STRING_UPPER_TOKEN STORAGE
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, label, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, label, 1) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, label, 2) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, label, 3) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, label, 4) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, label, 5) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, label, 6)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, label, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, label, 1, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, label, 2, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, label, 3, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, label, 4, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, label, 5, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, label, 6, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_reg {167936 /* 0x29000 */, 28672 /* 0x7000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_reg_IDX_0 167936
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_reg_IDX_1 28672
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, reg, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, reg, 1)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_reg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, reg, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000, reg, 1, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000_P_reg_EXISTS 1

/*
 * Chosen nodes
 */
#define DT_CHOSEN_zephyr_entropy                 DT_N_S_soc_S_random_4000d000
#define DT_CHOSEN_zephyr_entropy_EXISTS          1
#define DT_CHOSEN_zephyr_flash_controller        DT_N_S_soc_S_flash_controller_4001e000
#define DT_CHOSEN_zephyr_flash_controller_EXISTS 1
#define DT_CHOSEN_zephyr_console                 DT_N_S_soc_S_uart_40002000
#define DT_CHOSEN_zephyr_console_EXISTS          1
#define DT_CHOSEN_zephyr_shell_uart              DT_N_S_soc_S_uart_40002000
#define DT_CHOSEN_zephyr_shell_uart_EXISTS       1
#define DT_CHOSEN_zephyr_uart_mcumgr             DT_N_S_soc_S_uart_40002000
#define DT_CHOSEN_zephyr_uart_mcumgr_EXISTS      1
#define DT_CHOSEN_zephyr_bt_mon_uart             DT_N_S_soc_S_uart_40002000
#define DT_CHOSEN_zephyr_bt_mon_uart_EXISTS      1
#define DT_CHOSEN_zephyr_bt_c2h_uart             DT_N_S_soc_S_uart_40002000
#define DT_CHOSEN_zephyr_bt_c2h_uart_EXISTS      1
#define DT_CHOSEN_zephyr_sram                    DT_N_S_soc_S_memory_20000000
#define DT_CHOSEN_zephyr_sram_EXISTS             1
#define DT_CHOSEN_zephyr_flash                   DT_N_S_soc_S_flash_controller_4001e000_S_flash_0
#define DT_CHOSEN_zephyr_flash_EXISTS            1
#define DT_CHOSEN_zephyr_code_partition          DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000
#define DT_CHOSEN_zephyr_code_partition_EXISTS   1
#define DT_COMPAT_fixed_partitions_LABEL_mcuboot DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0
#define DT_COMPAT_fixed_partitions_LABEL_mcuboot_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_image_0 DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000
#define DT_COMPAT_fixed_partitions_LABEL_image_0_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_image_1 DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_19000
#define DT_COMPAT_fixed_partitions_LABEL_image_1_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_image_scratch DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_26000
#define DT_COMPAT_fixed_partitions_LABEL_image_scratch_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_storage DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_29000
#define DT_COMPAT_fixed_partitions_LABEL_storage_EXISTS 1

/*
 * Macros for compatibles with status "okay" nodes
 */
#define DT_COMPAT_HAS_OKAY_generic_test_nrf52811 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf52811_qfaa 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf52811 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf52 1
#define DT_COMPAT_HAS_OKAY_simple_bus 1
#define DT_COMPAT_HAS_OKAY_arm_v7m_nvic 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_ficr 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_uicr 1
#define DT_COMPAT_HAS_OKAY_mmio_sram 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_clock 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_radio 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpiote 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_saadc 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_timer 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_rtc 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_temp 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_rng 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_ecb 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_watchdog 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_egu 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf52_flash_controller 1
#define DT_COMPAT_HAS_OKAY_soc_nv_flash 1
#define DT_COMPAT_HAS_OKAY_fixed_partitions 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpio 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_pinctrl 1
#define DT_COMPAT_HAS_OKAY_arm_cortex_m4 1

/*
 * Macros for status "okay" instances of each compatible
 */
#define DT_N_INST_generic_test_nrf52811_NUM_OKAY 1
#define DT_N_INST_nordic_nrf52811_qfaa_NUM_OKAY 1
#define DT_N_INST_nordic_nrf52811_NUM_OKAY 1
#define DT_N_INST_nordic_nrf52_NUM_OKAY 1
#define DT_N_INST_simple_bus_NUM_OKAY 1
#define DT_N_INST_arm_v7m_nvic_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_ficr_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_uicr_NUM_OKAY 1
#define DT_N_INST_mmio_sram_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_clock_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_radio_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_gpiote_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_saadc_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_timer_NUM_OKAY 3
#define DT_N_INST_nordic_nrf_rtc_NUM_OKAY 2
#define DT_N_INST_nordic_nrf_temp_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_rng_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_ecb_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_watchdog_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_egu_NUM_OKAY 2
#define DT_N_INST_nordic_nrf52_flash_controller_NUM_OKAY 1
#define DT_N_INST_soc_nv_flash_NUM_OKAY 1
#define DT_N_INST_fixed_partitions_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_gpio_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_pinctrl_NUM_OKAY 1
#define DT_N_INST_arm_cortex_m4_NUM_OKAY 1
#define DT_FOREACH_OKAY_generic_test_nrf52811(fn) fn(DT_N)
#define DT_FOREACH_OKAY_VARGS_generic_test_nrf52811(fn, ...) fn(DT_N, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_generic_test_nrf52811(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_generic_test_nrf52811(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf52811_qfaa(fn) fn(DT_N_S_soc)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf52811_qfaa(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf52811_qfaa(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf52811_qfaa(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf52811(fn) fn(DT_N_S_soc)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf52811(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf52811(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf52811(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf52(fn) fn(DT_N_S_soc)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf52(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf52(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf52(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_simple_bus(fn) fn(DT_N_S_soc)
#define DT_FOREACH_OKAY_VARGS_simple_bus(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_simple_bus(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_simple_bus(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_arm_v7m_nvic(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100)
#define DT_FOREACH_OKAY_VARGS_arm_v7m_nvic(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_arm_v7m_nvic(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_arm_v7m_nvic(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_ficr(fn) fn(DT_N_S_soc_S_ficr_10000000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ficr(fn, ...) fn(DT_N_S_soc_S_ficr_10000000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_ficr(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ficr(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_uicr(fn) fn(DT_N_S_soc_S_uicr_10001000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_uicr(fn, ...) fn(DT_N_S_soc_S_uicr_10001000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_uicr(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_uicr(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_mmio_sram(fn) fn(DT_N_S_soc_S_memory_20000000)
#define DT_FOREACH_OKAY_VARGS_mmio_sram(fn, ...) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_mmio_sram(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_mmio_sram(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_clock(fn) fn(DT_N_S_soc_S_clock_40000000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_clock(fn, ...) fn(DT_N_S_soc_S_clock_40000000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_clock(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_clock(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_radio(fn) fn(DT_N_S_soc_S_radio_40001000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_radio(fn, ...) fn(DT_N_S_soc_S_radio_40001000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_radio(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_radio(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_gpiote(fn) fn(DT_N_S_soc_S_gpiote_40006000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_gpiote(fn, ...) fn(DT_N_S_soc_S_gpiote_40006000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_gpiote(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_gpiote(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_saadc(fn) fn(DT_N_S_soc_S_adc_40007000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_saadc(fn, ...) fn(DT_N_S_soc_S_adc_40007000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_saadc(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_saadc(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_timer(fn) fn(DT_N_S_soc_S_timer_40008000) fn(DT_N_S_soc_S_timer_40009000) fn(DT_N_S_soc_S_timer_4000a000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_timer(fn, ...) fn(DT_N_S_soc_S_timer_40008000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_40009000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_4000a000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_timer(fn) fn(0) fn(1) fn(2)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_timer(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_rtc(fn) fn(DT_N_S_soc_S_rtc_4000b000) fn(DT_N_S_soc_S_rtc_40011000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_rtc(fn, ...) fn(DT_N_S_soc_S_rtc_4000b000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_40011000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_rtc(fn) fn(0) fn(1)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_rtc(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_temp(fn) fn(DT_N_S_soc_S_temp_4000c000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_temp(fn, ...) fn(DT_N_S_soc_S_temp_4000c000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_temp(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_temp(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_rng(fn) fn(DT_N_S_soc_S_random_4000d000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_rng(fn, ...) fn(DT_N_S_soc_S_random_4000d000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_rng(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_rng(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_ecb(fn) fn(DT_N_S_soc_S_ecb_4000e000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ecb(fn, ...) fn(DT_N_S_soc_S_ecb_4000e000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_ecb(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ecb(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_watchdog(fn) fn(DT_N_S_soc_S_watchdog_40010000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_watchdog(fn, ...) fn(DT_N_S_soc_S_watchdog_40010000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_watchdog(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_watchdog(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_egu(fn) fn(DT_N_S_soc_S_egu_40014000) fn(DT_N_S_soc_S_egu_40015000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_egu(fn, ...) fn(DT_N_S_soc_S_egu_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40015000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_egu(fn) fn(0) fn(1)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_egu(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf52_flash_controller(fn) fn(DT_N_S_soc_S_flash_controller_4001e000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf52_flash_controller(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf52_flash_controller(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf52_flash_controller(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_soc_nv_flash(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0)
#define DT_FOREACH_OKAY_VARGS_soc_nv_flash(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_soc_nv_flash(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_soc_nv_flash(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_fixed_partitions(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions)
#define DT_FOREACH_OKAY_VARGS_fixed_partitions(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_fixed_partitions(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_fixed_partitions(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_gpio(fn) fn(DT_N_S_soc_S_gpio_50000000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_gpio(fn, ...) fn(DT_N_S_soc_S_gpio_50000000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_gpio(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_gpio(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_pinctrl(fn) fn(DT_N_S_pin_controller)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_pinctrl(fn, ...) fn(DT_N_S_pin_controller, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_pinctrl(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_pinctrl(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_arm_cortex_m4(fn) fn(DT_N_S_cpus_S_cpu_0)
#define DT_FOREACH_OKAY_VARGS_arm_cortex_m4(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_arm_cortex_m4(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_arm_cortex_m4(fn, ...) fn(0, __VA_ARGS__)

/*
 * Bus information for status "okay" nodes of each compatible
 */
