/*
 * Generated by gen_defines.py
 *
 * DTS input file:
 *   /Users/caio/Documents/Projects/prj3/Kleinigkeit_fw_prj/app/build_debug/app/zephyr/zephyr.dts.pre
 *
 * Directories with bindings:
 *   /opt/nordic/ncs/v3.1.1/nrf/dts/bindings, /Users/caio/Documents/Projects/prj3/Kleinigkeit_fw_prj/bma530_module/dts/bindings, $ZEPHYR_BASE/dts/bindings
 *
 * Node dependency ordering (ordinal and path):
 *   0   /
 *   1   /aliases
 *   2   /chosen
 *   3   /entropy_bt_hci
 *   4   /soc
 *   5   /soc/interrupt-controller@e000e100
 *   6   /soc/timer@40009000
 *   7   /sw-pwm
 *   8   /soc/gpiote@40006000
 *   9   /soc/gpio@50000000
 *   10  /vcc_enable
 *   11  /soc/adc@40007000
 *   12  /zephyr,user
 *   13  /clocks
 *   14  /clocks/hfxo
 *   15  /cpus
 *   16  /cpus/cpu@0
 *   17  /cpus/cpu@0/itm@e0000000
 *   18  /leds
 *   19  /leds/led_1
 *   20  /pin-controller
 *   21  /pin-controller/i2c0_default_1
 *   22  /pin-controller/i2c0_default_1/group1
 *   23  /pin-controller/i2c0_sleep_1
 *   24  /pin-controller/i2c0_sleep_1/group1
 *   25  /soc/bprot@40000000
 *   26  /soc/ccm@4000f000
 *   27  /soc/clock@40000000
 *   28  /soc/comparator@40013000
 *   29  /soc/ecb@4000e000
 *   30  /soc/egu@40014000
 *   31  /soc/egu@40015000
 *   32  /soc/egu@40016000
 *   33  /soc/egu@40017000
 *   34  /soc/egu@40018000
 *   35  /soc/egu@40019000
 *   36  /soc/ficr@10000000
 *   37  /soc/i2c@40004000
 *   38  /soc/i2s@40025000
 *   39  /soc/memory@20000000
 *   40  /soc/mwu@40020000
 *   41  /soc/nfct@40005000
 *   42  /soc/pdm@4001d000
 *   43  /soc/ppi@4001f000
 *   44  /soc/pwm@4001c000
 *   45  /soc/pwm@40021000
 *   46  /soc/pwm@40022000
 *   47  /soc/qdec@40012000
 *   48  /soc/random@4000d000
 *   49  /soc/rtc@4000b000
 *   50  /soc/rtc@40011000
 *   51  /soc/rtc@40024000
 *   52  /soc/spi@40003000
 *   53  /soc/spi@40004000
 *   54  /soc/spi@40023000
 *   55  /soc/temp@4000c000
 *   56  /soc/timer@40008000
 *   57  /soc/timer@4000a000
 *   58  /soc/timer@4001a000
 *   59  /soc/timer@4001b000
 *   60  /soc/timer@e000e010
 *   61  /soc/uart@40002000
 *   62  /soc/uicr@10001000
 *   63  /soc/watchdog@40010000
 *   64  /soc/adc@40007000/channel@0
 *   65  /soc/flash-controller@4001e000
 *   66  /soc/flash-controller@4001e000/flash@0
 *   67  /soc/flash-controller@4001e000/flash@0/partitions
 *   68  /soc/flash-controller@4001e000/flash@0/partitions/partition@0
 *   69  /soc/flash-controller@4001e000/flash@0/partitions/partition@c000
 *   70  /soc/flash-controller@4001e000/flash@0/partitions/partition@31800
 *   71  /soc/flash-controller@4001e000/flash@0/partitions/partition@57000
 *   72  /soc/i2c@40003000
 *   73  /soc/i2c@40003000/bma530@18
 *   74  /soc/power@40000000
 *   75  /soc/power@40000000/gpregret1@4000051c
 *   76  /soc/power@40000000/gpregret2@40000520
 *   77  /soc/power@40000000/regulator@40000578
 *   78  /soc/radio@40001000
 *   79  /soc/radio@40001000/bt_hci_controller
 *   80  /soc/radio@40001000/bt_hci_sdc
 *
 * Definitions derived from these nodes in dependency order are next,
 * followed by /chosen nodes.
 */

/* Used to remove brackets from around a single argument */
#define DT_DEBRACKET_INTERNAL(...) __VA_ARGS__

/*
 * Devicetree node: /
 *
 * Node identifier: DT_N
 */

/* Node's full path: */
#define DT_N_PATH "/"

/* Node's name with unit-address: */
#define DT_N_FULL_NAME "/"
#define DT_N_FULL_NAME_UNQUOTED /
#define DT_N_FULL_NAME_TOKEN _
#define DT_N_FULL_NAME_UPPER_TOKEN _

/* Helpers for dealing with node labels: */
#define DT_N_NODELABEL_NUM 0
#define DT_N_FOREACH_NODELABEL(fn) 
#define DT_N_FOREACH_NODELABEL_VARGS(fn, ...) 
#define DT_N_FOREACH_ANCESTOR(fn) 

/* Helper macros for child nodes of this node. */
#define DT_N_CHILD_NUM 11
#define DT_N_CHILD_NUM_STATUS_OKAY 10
#define DT_N_FOREACH_CHILD(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_pin_controller) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_sw_pwm) fn(DT_N_S_cpus) fn(DT_N_S_clocks) fn(DT_N_S_zephyr_user) fn(DT_N_S_leds) fn(DT_N_S_vcc_enable)
#define DT_N_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_chosen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sw_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_zephyr_user) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vcc_enable)
#define DT_N_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_sw_pwm, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_vcc_enable, __VA_ARGS__)
#define DT_N_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_chosen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sw_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_zephyr_user, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vcc_enable, __VA_ARGS__)
#define DT_N_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_pin_controller) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_cpus) fn(DT_N_S_clocks) fn(DT_N_S_zephyr_user) fn(DT_N_S_leds) fn(DT_N_S_vcc_enable)
#define DT_N_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_chosen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_zephyr_user) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vcc_enable)
#define DT_N_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_vcc_enable, __VA_ARGS__)
#define DT_N_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_chosen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_zephyr_user, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vcc_enable, __VA_ARGS__)

/* Node's hash: */
#define DT_N_HASH il7asoJjJEMhngUeSt4tHVu8Zxx4EFG_FDeJfL3_oPE

/* Node's dependency ordinal: */
#define DT_N_ORD 0
#define DT_N_ORD_STR_SORTABLE 00000

/* Ordinals for what this node depends on directly: */
#define DT_N_REQUIRES_ORDS /* nothing */

/* Ordinals for what depends directly on this node: */
#define DT_N_SUPPORTS_ORDS \
	1, /* /aliases */ \
	2, /* /chosen */ \
	3, /* /entropy_bt_hci */ \
	4, /* /soc */ \
	7, /* /sw-pwm */ \
	10, /* /vcc_enable */ \
	12, /* /zephyr,user */ \
	13, /* /clocks */ \
	15, /* /cpus */ \
	18, /* /leds */ \
	20, /* /pin-controller */

/* Existence and alternate IDs: */
#define DT_N_EXISTS 1
#define DT_N_INST_0_kleinigkeit_kleinigkeit_es2832aa2 DT_N

/* Macros for properties that are special in the specification: */
#define DT_N_REG_NUM 0
#define DT_N_RANGES_NUM 0
#define DT_N_FOREACH_RANGE(fn) 
#define DT_N_IRQ_NUM 0
#define DT_N_IRQ_LEVEL 0
#define DT_N_COMPAT_MATCHES_kleinigkeit_kleinigkeit_es2832aa2 1
#define DT_N_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_P_compatible {"kleinigkeit,kleinigkeit-ES2832AA2"}
#define DT_N_P_compatible_IDX_0_EXISTS 1
#define DT_N_P_compatible_IDX_0 "kleinigkeit,kleinigkeit-ES2832AA2"
#define DT_N_P_compatible_IDX_0_STRING_UNQUOTED kleinigkeit,kleinigkeit-ES2832AA2
#define DT_N_P_compatible_IDX_0_STRING_TOKEN kleinigkeit_kleinigkeit_ES2832AA2
#define DT_N_P_compatible_IDX_0_STRING_UPPER_TOKEN KLEINIGKEIT_KLEINIGKEIT_ES2832AA2
#define DT_N_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N, compatible, 0)
#define DT_N_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N, compatible, 0)
#define DT_N_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N, compatible, 0, __VA_ARGS__)
#define DT_N_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N, compatible, 0, __VA_ARGS__)
#define DT_N_P_compatible_LEN 1
#define DT_N_P_compatible_EXISTS 1

/*
 * Devicetree node: /aliases
 *
 * Node identifier: DT_N_S_aliases
 */

/* Node's full path: */
#define DT_N_S_aliases_PATH "/aliases"

/* Node's name with unit-address: */
#define DT_N_S_aliases_FULL_NAME "aliases"
#define DT_N_S_aliases_FULL_NAME_UNQUOTED aliases
#define DT_N_S_aliases_FULL_NAME_TOKEN aliases
#define DT_N_S_aliases_FULL_NAME_UPPER_TOKEN ALIASES

/* Node parent (/) identifier: */
#define DT_N_S_aliases_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_aliases_CHILD_IDX 1

/* Helpers for dealing with node labels: */
#define DT_N_S_aliases_NODELABEL_NUM 0
#define DT_N_S_aliases_FOREACH_NODELABEL(fn) 
#define DT_N_S_aliases_FOREACH_NODELABEL_VARGS(fn, ...) 
#define DT_N_S_aliases_FOREACH_ANCESTOR(fn) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_aliases_CHILD_NUM 0
#define DT_N_S_aliases_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_aliases_FOREACH_CHILD(fn) 
#define DT_N_S_aliases_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_aliases_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_aliases_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_aliases_HASH QavYY6yplHKhLPRKsRzaLCGlR0CWZ0JUNJakcBCfDXA

/* Node's dependency ordinal: */
#define DT_N_S_aliases_ORD 1
#define DT_N_S_aliases_ORD_STR_SORTABLE 00001

/* Ordinals for what this node depends on directly: */
#define DT_N_S_aliases_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_aliases_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_aliases_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_aliases_REG_NUM 0
#define DT_N_S_aliases_RANGES_NUM 0
#define DT_N_S_aliases_FOREACH_RANGE(fn) 
#define DT_N_S_aliases_IRQ_NUM 0
#define DT_N_S_aliases_IRQ_LEVEL 0
#define DT_N_S_aliases_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_aliases_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /chosen
 *
 * Node identifier: DT_N_S_chosen
 */

/* Node's full path: */
#define DT_N_S_chosen_PATH "/chosen"

/* Node's name with unit-address: */
#define DT_N_S_chosen_FULL_NAME "chosen"
#define DT_N_S_chosen_FULL_NAME_UNQUOTED chosen
#define DT_N_S_chosen_FULL_NAME_TOKEN chosen
#define DT_N_S_chosen_FULL_NAME_UPPER_TOKEN CHOSEN

/* Node parent (/) identifier: */
#define DT_N_S_chosen_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_chosen_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_chosen_NODELABEL_NUM 0
#define DT_N_S_chosen_FOREACH_NODELABEL(fn) 
#define DT_N_S_chosen_FOREACH_NODELABEL_VARGS(fn, ...) 
#define DT_N_S_chosen_FOREACH_ANCESTOR(fn) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_chosen_CHILD_NUM 0
#define DT_N_S_chosen_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_chosen_FOREACH_CHILD(fn) 
#define DT_N_S_chosen_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_chosen_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_chosen_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_chosen_HASH qNExeeLInzqaWpm1KroyYDk4lRIxVO2ig78mq_hOnA8

/* Node's dependency ordinal: */
#define DT_N_S_chosen_ORD 2
#define DT_N_S_chosen_ORD_STR_SORTABLE 00002

/* Ordinals for what this node depends on directly: */
#define DT_N_S_chosen_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_chosen_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_chosen_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_chosen_REG_NUM 0
#define DT_N_S_chosen_RANGES_NUM 0
#define DT_N_S_chosen_FOREACH_RANGE(fn) 
#define DT_N_S_chosen_IRQ_NUM 0
#define DT_N_S_chosen_IRQ_LEVEL 0
#define DT_N_S_chosen_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_chosen_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /entropy_bt_hci
 *
 * Node identifier: DT_N_S_entropy_bt_hci
 *
 * Binding (compatible = zephyr,bt-hci-entropy):
 *   $ZEPHYR_BASE/dts/bindings/bluetooth/zephyr,bt-hci-entropy.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_entropy_bt_hci_PATH "/entropy_bt_hci"

/* Node's name with unit-address: */
#define DT_N_S_entropy_bt_hci_FULL_NAME "entropy_bt_hci"
#define DT_N_S_entropy_bt_hci_FULL_NAME_UNQUOTED entropy_bt_hci
#define DT_N_S_entropy_bt_hci_FULL_NAME_TOKEN entropy_bt_hci
#define DT_N_S_entropy_bt_hci_FULL_NAME_UPPER_TOKEN ENTROPY_BT_HCI

/* Node parent (/) identifier: */
#define DT_N_S_entropy_bt_hci_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_entropy_bt_hci_CHILD_IDX 4

/* Helpers for dealing with node labels: */
#define DT_N_S_entropy_bt_hci_NODELABEL_NUM 1
#define DT_N_S_entropy_bt_hci_FOREACH_NODELABEL(fn) fn(rng_hci)
#define DT_N_S_entropy_bt_hci_FOREACH_NODELABEL_VARGS(fn, ...) fn(rng_hci, __VA_ARGS__)
#define DT_N_S_entropy_bt_hci_FOREACH_ANCESTOR(fn) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_entropy_bt_hci_CHILD_NUM 0
#define DT_N_S_entropy_bt_hci_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD(fn) 
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_entropy_bt_hci_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_entropy_bt_hci_HASH SgcLB264LeTM7CzHuqx7oNBkdCC244OwlY5UEgw5yZk

/* Node's dependency ordinal: */
#define DT_N_S_entropy_bt_hci_ORD 3
#define DT_N_S_entropy_bt_hci_ORD_STR_SORTABLE 00003

/* Ordinals for what this node depends on directly: */
#define DT_N_S_entropy_bt_hci_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_entropy_bt_hci_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_entropy_bt_hci_EXISTS 1
#define DT_N_INST_0_zephyr_bt_hci_entropy DT_N_S_entropy_bt_hci
#define DT_N_NODELABEL_rng_hci            DT_N_S_entropy_bt_hci

/* Macros for properties that are special in the specification: */
#define DT_N_S_entropy_bt_hci_REG_NUM 0
#define DT_N_S_entropy_bt_hci_RANGES_NUM 0
#define DT_N_S_entropy_bt_hci_FOREACH_RANGE(fn) 
#define DT_N_S_entropy_bt_hci_IRQ_NUM 0
#define DT_N_S_entropy_bt_hci_IRQ_LEVEL 0
#define DT_N_S_entropy_bt_hci_COMPAT_MATCHES_zephyr_bt_hci_entropy 1
#define DT_N_S_entropy_bt_hci_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_entropy_bt_hci_COMPAT_VENDOR_IDX_0 "The Zephyr Project"
#define DT_N_S_entropy_bt_hci_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_entropy_bt_hci_COMPAT_MODEL_IDX_0 "bt-hci-entropy"
#define DT_N_S_entropy_bt_hci_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_entropy_bt_hci_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_entropy_bt_hci_P_status "okay"
#define DT_N_S_entropy_bt_hci_P_status_STRING_UNQUOTED okay
#define DT_N_S_entropy_bt_hci_P_status_STRING_TOKEN okay
#define DT_N_S_entropy_bt_hci_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_entropy_bt_hci_P_status_IDX_0 "okay"
#define DT_N_S_entropy_bt_hci_P_status_IDX_0_EXISTS 1
#define DT_N_S_entropy_bt_hci_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_entropy_bt_hci_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_entropy_bt_hci, status, 0)
#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_entropy_bt_hci, status, 0)
#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_entropy_bt_hci, status, 0, __VA_ARGS__)
#define DT_N_S_entropy_bt_hci_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_entropy_bt_hci, status, 0, __VA_ARGS__)
#define DT_N_S_entropy_bt_hci_P_status_LEN 1
#define DT_N_S_entropy_bt_hci_P_status_EXISTS 1
#define DT_N_S_entropy_bt_hci_P_compatible {"zephyr,bt-hci-entropy"}
#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0 "zephyr,bt-hci-entropy"
#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_STRING_UNQUOTED zephyr,bt-hci-entropy
#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_STRING_TOKEN zephyr_bt_hci_entropy
#define DT_N_S_entropy_bt_hci_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_BT_HCI_ENTROPY
#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_entropy_bt_hci, compatible, 0)
#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_entropy_bt_hci, compatible, 0)
#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_entropy_bt_hci, compatible, 0, __VA_ARGS__)
#define DT_N_S_entropy_bt_hci_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_entropy_bt_hci, compatible, 0, __VA_ARGS__)
#define DT_N_S_entropy_bt_hci_P_compatible_LEN 1
#define DT_N_S_entropy_bt_hci_P_compatible_EXISTS 1
#define DT_N_S_entropy_bt_hci_P_zephyr_deferred_init 0
#define DT_N_S_entropy_bt_hci_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_entropy_bt_hci_P_wakeup_source 0
#define DT_N_S_entropy_bt_hci_P_wakeup_source_EXISTS 1
#define DT_N_S_entropy_bt_hci_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_entropy_bt_hci_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc
 *
 * Node identifier: DT_N_S_soc
 */

/* Node's full path: */
#define DT_N_S_soc_PATH "/soc"

/* Node's name with unit-address: */
#define DT_N_S_soc_FULL_NAME "soc"
#define DT_N_S_soc_FULL_NAME_UNQUOTED soc
#define DT_N_S_soc_FULL_NAME_TOKEN soc
#define DT_N_S_soc_FULL_NAME_UPPER_TOKEN SOC

/* Node parent (/) identifier: */
#define DT_N_S_soc_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_CHILD_IDX 2

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_NODELABEL_NUM 0
#define DT_N_S_soc_FOREACH_NODELABEL(fn) 
#define DT_N_S_soc_FOREACH_NODELABEL_VARGS(fn, ...) 
#define DT_N_S_soc_FOREACH_ANCESTOR(fn) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_CHILD_NUM 48
#define DT_N_S_soc_CHILD_NUM_STATUS_OKAY 25
#define DT_N_S_soc_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_ficr_10000000) fn(DT_N_S_soc_S_uicr_10001000) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_clock_40000000) fn(DT_N_S_soc_S_power_40000000) fn(DT_N_S_soc_S_bprot_40000000) fn(DT_N_S_soc_S_radio_40001000) fn(DT_N_S_soc_S_uart_40002000) fn(DT_N_S_soc_S_i2c_40003000) fn(DT_N_S_soc_S_spi_40003000) fn(DT_N_S_soc_S_i2c_40004000) fn(DT_N_S_soc_S_spi_40004000) fn(DT_N_S_soc_S_nfct_40005000) fn(DT_N_S_soc_S_gpiote_40006000) fn(DT_N_S_soc_S_adc_40007000) fn(DT_N_S_soc_S_timer_40008000) fn(DT_N_S_soc_S_timer_40009000) fn(DT_N_S_soc_S_timer_4000a000) fn(DT_N_S_soc_S_rtc_4000b000) fn(DT_N_S_soc_S_temp_4000c000) fn(DT_N_S_soc_S_random_4000d000) fn(DT_N_S_soc_S_ecb_4000e000) fn(DT_N_S_soc_S_ccm_4000f000) fn(DT_N_S_soc_S_watchdog_40010000) fn(DT_N_S_soc_S_rtc_40011000) fn(DT_N_S_soc_S_qdec_40012000) fn(DT_N_S_soc_S_comparator_40013000) fn(DT_N_S_soc_S_egu_40014000) fn(DT_N_S_soc_S_egu_40015000) fn(DT_N_S_soc_S_egu_40016000) fn(DT_N_S_soc_S_egu_40017000) fn(DT_N_S_soc_S_egu_40018000) fn(DT_N_S_soc_S_egu_40019000) fn(DT_N_S_soc_S_timer_4001a000) fn(DT_N_S_soc_S_timer_4001b000) fn(DT_N_S_soc_S_pwm_4001c000) fn(DT_N_S_soc_S_pdm_4001d000) fn(DT_N_S_soc_S_flash_controller_4001e000) fn(DT_N_S_soc_S_ppi_4001f000) fn(DT_N_S_soc_S_mwu_40020000) fn(DT_N_S_soc_S_pwm_40021000) fn(DT_N_S_soc_S_pwm_40022000) fn(DT_N_S_soc_S_spi_40023000) fn(DT_N_S_soc_S_rtc_40024000) fn(DT_N_S_soc_S_i2s_40025000) fn(DT_N_S_soc_S_gpio_50000000)
#define DT_N_S_soc_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_10000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_10001000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_clock_40000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_40000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_bprot_40000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_radio_40001000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uart_40002000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40003000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40004000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40004000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_nfct_40005000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_40006000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40007000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_40008000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_40009000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_4000a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_4000b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_temp_4000c000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_random_4000d000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ecb_4000e000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ccm_4000f000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_40010000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_40011000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_qdec_40012000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_comparator_40013000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40014000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40015000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40016000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40017000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40018000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40019000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_4001a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_4001b000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pwm_4001c000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pdm_4001d000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ppi_4001f000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_mwu_40020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pwm_40021000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pwm_40022000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40023000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_40024000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2s_40025000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpio_50000000)
#define DT_N_S_soc_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_10000000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_10001000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_clock_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_power_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_bprot_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_radio_40001000, __VA_ARGS__) fn(DT_N_S_soc_S_uart_40002000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40003000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40004000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40004000, __VA_ARGS__) fn(DT_N_S_soc_S_nfct_40005000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_40006000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40007000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_40008000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_40009000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_4000a000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_4000b000, __VA_ARGS__) fn(DT_N_S_soc_S_temp_4000c000, __VA_ARGS__) fn(DT_N_S_soc_S_random_4000d000, __VA_ARGS__) fn(DT_N_S_soc_S_ecb_4000e000, __VA_ARGS__) fn(DT_N_S_soc_S_ccm_4000f000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_qdec_40012000, __VA_ARGS__) fn(DT_N_S_soc_S_comparator_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40015000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40016000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40017000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40018000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40019000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_4001a000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_4001b000, __VA_ARGS__) fn(DT_N_S_soc_S_pwm_4001c000, __VA_ARGS__) fn(DT_N_S_soc_S_pdm_4001d000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000, __VA_ARGS__) fn(DT_N_S_soc_S_ppi_4001f000, __VA_ARGS__) fn(DT_N_S_soc_S_mwu_40020000, __VA_ARGS__) fn(DT_N_S_soc_S_pwm_40021000, __VA_ARGS__) fn(DT_N_S_soc_S_pwm_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40023000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_40024000, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40025000, __VA_ARGS__) fn(DT_N_S_soc_S_gpio_50000000, __VA_ARGS__)
#define DT_N_S_soc_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_10000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_10001000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_clock_40000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_40000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_bprot_40000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_radio_40001000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uart_40002000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40003000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40004000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40004000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_nfct_40005000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_40006000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40007000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_40008000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_40009000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_4000a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_4000b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_temp_4000c000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_random_4000d000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ecb_4000e000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ccm_4000f000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_40010000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_40011000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_qdec_40012000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_comparator_40013000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40014000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40015000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40016000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40017000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40018000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40019000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_4001a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_4001b000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pwm_4001c000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pdm_4001d000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ppi_4001f000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_mwu_40020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pwm_40021000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pwm_40022000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40023000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_40024000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2s_40025000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpio_50000000, __VA_ARGS__)
#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_ficr_10000000) fn(DT_N_S_soc_S_uicr_10001000) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_clock_40000000) fn(DT_N_S_soc_S_power_40000000) fn(DT_N_S_soc_S_bprot_40000000) fn(DT_N_S_soc_S_radio_40001000) fn(DT_N_S_soc_S_i2c_40003000) fn(DT_N_S_soc_S_gpiote_40006000) fn(DT_N_S_soc_S_adc_40007000) fn(DT_N_S_soc_S_random_4000d000) fn(DT_N_S_soc_S_ecb_4000e000) fn(DT_N_S_soc_S_ccm_4000f000) fn(DT_N_S_soc_S_watchdog_40010000) fn(DT_N_S_soc_S_egu_40014000) fn(DT_N_S_soc_S_egu_40015000) fn(DT_N_S_soc_S_egu_40016000) fn(DT_N_S_soc_S_egu_40017000) fn(DT_N_S_soc_S_egu_40018000) fn(DT_N_S_soc_S_egu_40019000) fn(DT_N_S_soc_S_flash_controller_4001e000) fn(DT_N_S_soc_S_ppi_4001f000) fn(DT_N_S_soc_S_mwu_40020000) fn(DT_N_S_soc_S_gpio_50000000)
#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_10000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_10001000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_clock_40000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_40000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_bprot_40000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_radio_40001000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40003000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_40006000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40007000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_random_4000d000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ecb_4000e000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ccm_4000f000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_40010000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40014000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40015000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40016000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40017000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40018000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40019000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ppi_4001f000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_mwu_40020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpio_50000000)
#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_10000000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_10001000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_clock_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_power_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_bprot_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_radio_40001000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40003000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_40006000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40007000, __VA_ARGS__) fn(DT_N_S_soc_S_random_4000d000, __VA_ARGS__) fn(DT_N_S_soc_S_ecb_4000e000, __VA_ARGS__) fn(DT_N_S_soc_S_ccm_4000f000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40015000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40016000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40017000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40018000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40019000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000, __VA_ARGS__) fn(DT_N_S_soc_S_ppi_4001f000, __VA_ARGS__) fn(DT_N_S_soc_S_mwu_40020000, __VA_ARGS__) fn(DT_N_S_soc_S_gpio_50000000, __VA_ARGS__)
#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ficr_10000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_uicr_10001000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_clock_40000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_40000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_bprot_40000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_radio_40001000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40003000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpiote_40006000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40007000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_random_4000d000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ecb_4000e000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ccm_4000f000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_40010000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40014000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40015000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40016000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40017000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40018000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_egu_40019000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ppi_4001f000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_mwu_40020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_gpio_50000000, __VA_ARGS__)

/* Node's hash: */
#define DT_N_S_soc_HASH DcVqqq9YzG86l3_Hk7pNncUh2rnHG8USjbVY6wBdFts

/* Node's dependency ordinal: */
#define DT_N_S_soc_ORD 4
#define DT_N_S_soc_ORD_STR_SORTABLE 00004

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_SUPPORTS_ORDS \
	5, /* /soc/interrupt-controller@e000e100 */ \
	6, /* /soc/timer@40009000 */ \
	8, /* /soc/gpiote@40006000 */ \
	9, /* /soc/gpio@50000000 */ \
	11, /* /soc/adc@40007000 */ \
	25, /* /soc/bprot@40000000 */ \
	26, /* /soc/ccm@4000f000 */ \
	27, /* /soc/clock@40000000 */ \
	28, /* /soc/comparator@40013000 */ \
	29, /* /soc/ecb@4000e000 */ \
	30, /* /soc/egu@40014000 */ \
	31, /* /soc/egu@40015000 */ \
	32, /* /soc/egu@40016000 */ \
	33, /* /soc/egu@40017000 */ \
	34, /* /soc/egu@40018000 */ \
	35, /* /soc/egu@40019000 */ \
	36, /* /soc/ficr@10000000 */ \
	37, /* /soc/i2c@40004000 */ \
	38, /* /soc/i2s@40025000 */ \
	39, /* /soc/memory@20000000 */ \
	40, /* /soc/mwu@40020000 */ \
	41, /* /soc/nfct@40005000 */ \
	42, /* /soc/pdm@4001d000 */ \
	43, /* /soc/ppi@4001f000 */ \
	44, /* /soc/pwm@4001c000 */ \
	45, /* /soc/pwm@40021000 */ \
	46, /* /soc/pwm@40022000 */ \
	47, /* /soc/qdec@40012000 */ \
	48, /* /soc/random@4000d000 */ \
	49, /* /soc/rtc@4000b000 */ \
	50, /* /soc/rtc@40011000 */ \
	51, /* /soc/rtc@40024000 */ \
	52, /* /soc/spi@40003000 */ \
	53, /* /soc/spi@40004000 */ \
	54, /* /soc/spi@40023000 */ \
	55, /* /soc/temp@4000c000 */ \
	56, /* /soc/timer@40008000 */ \
	57, /* /soc/timer@4000a000 */ \
	58, /* /soc/timer@4001a000 */ \
	59, /* /soc/timer@4001b000 */ \
	60, /* /soc/timer@e000e010 */ \
	61, /* /soc/uart@40002000 */ \
	62, /* /soc/uicr@10001000 */ \
	63, /* /soc/watchdog@40010000 */ \
	65, /* /soc/flash-controller@4001e000 */ \
	72, /* /soc/i2c@40003000 */ \
	74, /* /soc/power@40000000 */ \
	78, /* /soc/radio@40001000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_EXISTS 1
#define DT_N_INST_0_nordic_nrf52832_qfaa DT_N_S_soc
#define DT_N_INST_0_nordic_nrf52832      DT_N_S_soc
#define DT_N_INST_0_nordic_nrf52         DT_N_S_soc
#define DT_N_INST_0_simple_bus           DT_N_S_soc

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_REG_NUM 0
#define DT_N_S_soc_RANGES_NUM 0
#define DT_N_S_soc_FOREACH_RANGE(fn) 
#define DT_N_S_soc_IRQ_NUM 0
#define DT_N_S_soc_IRQ_LEVEL 0
#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf52832_qfaa 1
#define DT_N_S_soc_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_COMPAT_MODEL_IDX_0 "nrf52832-qfaa"
#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf52832 1
#define DT_N_S_soc_COMPAT_VENDOR_IDX_1_EXISTS 1
#define DT_N_S_soc_COMPAT_VENDOR_IDX_1 "Nordic Semiconductor"
#define DT_N_S_soc_COMPAT_MODEL_IDX_1_EXISTS 1
#define DT_N_S_soc_COMPAT_MODEL_IDX_1 "nrf52832"
#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf52 1
#define DT_N_S_soc_COMPAT_VENDOR_IDX_2_EXISTS 1
#define DT_N_S_soc_COMPAT_VENDOR_IDX_2 "Nordic Semiconductor"
#define DT_N_S_soc_COMPAT_MODEL_IDX_2_EXISTS 1
#define DT_N_S_soc_COMPAT_MODEL_IDX_2 "nrf52"
#define DT_N_S_soc_COMPAT_MATCHES_simple_bus 1
#define DT_N_S_soc_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_P_compatible {"nordic,nrf52832-qfaa", "nordic,nrf52832", "nordic,nrf52", "simple-bus"}
#define DT_N_S_soc_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_0 "nordic,nrf52832-qfaa"
#define DT_N_S_soc_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf52832-qfaa
#define DT_N_S_soc_P_compatible_IDX_0_STRING_TOKEN nordic_nrf52832_qfaa
#define DT_N_S_soc_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF52832_QFAA
#define DT_N_S_soc_P_compatible_IDX_1_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_1 "nordic,nrf52832"
#define DT_N_S_soc_P_compatible_IDX_1_STRING_UNQUOTED nordic,nrf52832
#define DT_N_S_soc_P_compatible_IDX_1_STRING_TOKEN nordic_nrf52832
#define DT_N_S_soc_P_compatible_IDX_1_STRING_UPPER_TOKEN NORDIC_NRF52832
#define DT_N_S_soc_P_compatible_IDX_2_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_2 "nordic,nrf52"
#define DT_N_S_soc_P_compatible_IDX_2_STRING_UNQUOTED nordic,nrf52
#define DT_N_S_soc_P_compatible_IDX_2_STRING_TOKEN nordic_nrf52
#define DT_N_S_soc_P_compatible_IDX_2_STRING_UPPER_TOKEN NORDIC_NRF52
#define DT_N_S_soc_P_compatible_IDX_3_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_3 "simple-bus"
#define DT_N_S_soc_P_compatible_IDX_3_STRING_UNQUOTED simple-bus
#define DT_N_S_soc_P_compatible_IDX_3_STRING_TOKEN simple_bus
#define DT_N_S_soc_P_compatible_IDX_3_STRING_UPPER_TOKEN SIMPLE_BUS
#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc, compatible, 0) \
	fn(DT_N_S_soc, compatible, 1) \
	fn(DT_N_S_soc, compatible, 2) \
	fn(DT_N_S_soc, compatible, 3)
#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc, compatible, 0) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc, compatible, 1) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc, compatible, 2) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc, compatible, 3)
#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc, compatible, 0, __VA_ARGS__) \
	fn(DT_N_S_soc, compatible, 1, __VA_ARGS__) \
	fn(DT_N_S_soc, compatible, 2, __VA_ARGS__) \
	fn(DT_N_S_soc, compatible, 3, __VA_ARGS__)
#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc, compatible, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc, compatible, 3, __VA_ARGS__)
#define DT_N_S_soc_P_compatible_LEN 4
#define DT_N_S_soc_P_compatible_EXISTS 1
#define DT_N_S_soc_P_ranges_EXISTS 1

/*
 * Devicetree node: /soc/interrupt-controller@e000e100
 *
 * Node identifier: DT_N_S_soc_S_interrupt_controller_e000e100
 *
 * Binding (compatible = arm,v7m-nvic):
 *   $ZEPHYR_BASE/dts/bindings/interrupt-controller/arm,v7m-nvic.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_PATH "/soc/interrupt-controller@e000e100"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_FULL_NAME "interrupt-controller@e000e100"
#define DT_N_S_soc_S_interrupt_controller_e000e100_FULL_NAME_UNQUOTED interrupt-controller@e000e100
#define DT_N_S_soc_S_interrupt_controller_e000e100_FULL_NAME_TOKEN interrupt_controller_e000e100
#define DT_N_S_soc_S_interrupt_controller_e000e100_FULL_NAME_UPPER_TOKEN INTERRUPT_CONTROLLER_E000E100

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_NODELABEL_NUM 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_NODELABEL(fn) fn(nvic)
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_NODELABEL_VARGS(fn, ...) fn(nvic, __VA_ARGS__)
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_interrupt_controller_e000e100_CHILD_NUM 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_HASH MNKByYDCdVxyLwiy4A_bv2jZfVhfDT01mZ2_1uEhUYQ

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_ORD 5
#define DT_N_S_soc_S_interrupt_controller_e000e100_ORD_STR_SORTABLE 00005

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_SUPPORTS_ORDS \
	6, /* /soc/timer@40009000 */ \
	8, /* /soc/gpiote@40006000 */ \
	11, /* /soc/adc@40007000 */ \
	26, /* /soc/ccm@4000f000 */ \
	27, /* /soc/clock@40000000 */ \
	28, /* /soc/comparator@40013000 */ \
	29, /* /soc/ecb@4000e000 */ \
	30, /* /soc/egu@40014000 */ \
	31, /* /soc/egu@40015000 */ \
	32, /* /soc/egu@40016000 */ \
	33, /* /soc/egu@40017000 */ \
	34, /* /soc/egu@40018000 */ \
	35, /* /soc/egu@40019000 */ \
	37, /* /soc/i2c@40004000 */ \
	38, /* /soc/i2s@40025000 */ \
	41, /* /soc/nfct@40005000 */ \
	42, /* /soc/pdm@4001d000 */ \
	44, /* /soc/pwm@4001c000 */ \
	45, /* /soc/pwm@40021000 */ \
	46, /* /soc/pwm@40022000 */ \
	47, /* /soc/qdec@40012000 */ \
	48, /* /soc/random@4000d000 */ \
	49, /* /soc/rtc@4000b000 */ \
	50, /* /soc/rtc@40011000 */ \
	51, /* /soc/rtc@40024000 */ \
	52, /* /soc/spi@40003000 */ \
	53, /* /soc/spi@40004000 */ \
	54, /* /soc/spi@40023000 */ \
	55, /* /soc/temp@4000c000 */ \
	56, /* /soc/timer@40008000 */ \
	57, /* /soc/timer@4000a000 */ \
	58, /* /soc/timer@4001a000 */ \
	59, /* /soc/timer@4001b000 */ \
	61, /* /soc/uart@40002000 */ \
	63, /* /soc/watchdog@40010000 */ \
	72, /* /soc/i2c@40003000 */ \
	74, /* /soc/power@40000000 */ \
	78, /* /soc/radio@40001000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_EXISTS 1
#define DT_N_INST_0_arm_v7m_nvic DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_NODELABEL_nvic      DT_N_S_soc_S_interrupt_controller_e000e100

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_NUM 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_ADDRESS 3758153984 /* 0xe000e100 */
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_SIZE 3072 /* 0xc00 */
#define DT_N_S_soc_S_interrupt_controller_e000e100_RANGES_NUM 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_IRQ_NUM 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_IRQ_LEVEL 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MATCHES_arm_v7m_nvic 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_VENDOR_IDX_0 "ARM Ltd."
#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MODEL_IDX_0 "v7m-nvic"
#define DT_N_S_soc_S_interrupt_controller_e000e100_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg {3758153984 /* 0xe000e100 */, 3072 /* 0xc00 */}
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0 3758153984
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1 3072
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits 3
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible {"arm,v7m-nvic"}
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0 "arm,v7m-nvic"
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_STRING_UNQUOTED arm,v7m-nvic
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_STRING_TOKEN arm_v7m_nvic
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_V7M_NVIC
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0)
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0)
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_LEN 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_wakeup_source 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/timer@40009000
 *
 * Node identifier: DT_N_S_soc_S_timer_40009000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE/dts/bindings/counter/nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_40009000_PATH "/soc/timer@40009000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_40009000_FULL_NAME "timer@40009000"
#define DT_N_S_soc_S_timer_40009000_FULL_NAME_UNQUOTED timer@40009000
#define DT_N_S_soc_S_timer_40009000_FULL_NAME_TOKEN timer_40009000
#define DT_N_S_soc_S_timer_40009000_FULL_NAME_UPPER_TOKEN TIMER_40009000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_40009000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_timer_40009000_CHILD_IDX 18

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_timer_40009000_NODELABEL_NUM 1
#define DT_N_S_soc_S_timer_40009000_FOREACH_NODELABEL(fn) fn(timer1)
#define DT_N_S_soc_S_timer_40009000_FOREACH_NODELABEL_VARGS(fn, ...) fn(timer1, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40009000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_timer_40009000_CHILD_NUM 0
#define DT_N_S_soc_S_timer_40009000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_timer_40009000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_40009000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_40009000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_40009000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_timer_40009000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_timer_40009000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_40009000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_40009000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_timer_40009000_HASH dvKc7YKRnCeYnuLQBswmfsoUp9o4yRxlSa8Bp0_wngU

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_40009000_ORD 6
#define DT_N_S_soc_S_timer_40009000_ORD_STR_SORTABLE 00006

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_40009000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_40009000_SUPPORTS_ORDS \
	7, /* /sw-pwm */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_40009000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_timer DT_N_S_soc_S_timer_40009000
#define DT_N_NODELABEL_timer1        DT_N_S_soc_S_timer_40009000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_timer_40009000_REG_NUM 1
#define DT_N_S_soc_S_timer_40009000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_REG_IDX_0_VAL_ADDRESS 1073778688 /* 0x40009000 */
#define DT_N_S_soc_S_timer_40009000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_40009000_RANGES_NUM 0
#define DT_N_S_soc_S_timer_40009000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_timer_40009000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_irq 9
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_timer_40009000_IRQ_LEVEL 1
#define DT_N_S_soc_S_timer_40009000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_40009000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_timer_40009000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_COMPAT_MODEL_IDX_0 "nrf-timer"
#define DT_N_S_soc_S_timer_40009000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_timer_40009000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_timer_40009000_P_reg {1073778688 /* 0x40009000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_0 1073778688
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_40009000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_cc_num 4
#define DT_N_S_soc_S_timer_40009000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_max_bit_width 32
#define DT_N_S_soc_S_timer_40009000_P_max_bit_width_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts {9 /* 0x9 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_0 9
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_prescaler 0
#define DT_N_S_soc_S_timer_40009000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_zli 0
#define DT_N_S_soc_S_timer_40009000_P_zli_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_status "disabled"
#define DT_N_S_soc_S_timer_40009000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_timer_40009000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_timer_40009000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_timer_40009000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_timer_40009000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_timer_40009000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40009000, status, 0)
#define DT_N_S_soc_S_timer_40009000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_40009000, status, 0)
#define DT_N_S_soc_S_timer_40009000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_40009000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40009000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_40009000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40009000_P_status_LEN 1
#define DT_N_S_soc_S_timer_40009000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_40009000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_40009000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-timer
#define DT_N_S_soc_S_timer_40009000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_timer
#define DT_N_S_soc_S_timer_40009000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TIMER
#define DT_N_S_soc_S_timer_40009000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40009000, compatible, 0)
#define DT_N_S_soc_S_timer_40009000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_40009000, compatible, 0)
#define DT_N_S_soc_S_timer_40009000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_40009000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40009000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_40009000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40009000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_40009000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_timer_40009000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_wakeup_source 0
#define DT_N_S_soc_S_timer_40009000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_timer_40009000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /sw-pwm
 *
 * Node identifier: DT_N_S_sw_pwm
 *
 * Binding (compatible = nordic,nrf-sw-pwm):
 *   $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-sw-pwm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_sw_pwm_PATH "/sw-pwm"

/* Node's name with unit-address: */
#define DT_N_S_sw_pwm_FULL_NAME "sw-pwm"
#define DT_N_S_sw_pwm_FULL_NAME_UNQUOTED sw-pwm
#define DT_N_S_sw_pwm_FULL_NAME_TOKEN sw_pwm
#define DT_N_S_sw_pwm_FULL_NAME_UPPER_TOKEN SW_PWM

/* Node parent (/) identifier: */
#define DT_N_S_sw_pwm_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_sw_pwm_CHILD_IDX 5

/* Helpers for dealing with node labels: */
#define DT_N_S_sw_pwm_NODELABEL_NUM 1
#define DT_N_S_sw_pwm_FOREACH_NODELABEL(fn) fn(sw_pwm)
#define DT_N_S_sw_pwm_FOREACH_NODELABEL_VARGS(fn, ...) fn(sw_pwm, __VA_ARGS__)
#define DT_N_S_sw_pwm_FOREACH_ANCESTOR(fn) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_sw_pwm_CHILD_NUM 0
#define DT_N_S_sw_pwm_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_sw_pwm_FOREACH_CHILD(fn) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_sw_pwm_HASH JNm3Tbl_p6_ln0HamgYZw_0vVGqAfhUnZXbZIAU6T3w

/* Node's dependency ordinal: */
#define DT_N_S_sw_pwm_ORD 7
#define DT_N_S_sw_pwm_ORD_STR_SORTABLE 00007

/* Ordinals for what this node depends on directly: */
#define DT_N_S_sw_pwm_REQUIRES_ORDS \
	0, /* / */ \
	6, /* /soc/timer@40009000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_sw_pwm_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_sw_pwm_EXISTS 1
#define DT_N_INST_0_nordic_nrf_sw_pwm DT_N_S_sw_pwm
#define DT_N_NODELABEL_sw_pwm         DT_N_S_sw_pwm

/* Macros for properties that are special in the specification: */
#define DT_N_S_sw_pwm_REG_NUM 0
#define DT_N_S_sw_pwm_RANGES_NUM 0
#define DT_N_S_sw_pwm_FOREACH_RANGE(fn) 
#define DT_N_S_sw_pwm_IRQ_NUM 0
#define DT_N_S_sw_pwm_IRQ_LEVEL 0
#define DT_N_S_sw_pwm_COMPAT_MATCHES_nordic_nrf_sw_pwm 1
#define DT_N_S_sw_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_sw_pwm_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_COMPAT_MODEL_IDX_0 "nrf-sw-pwm"
#define DT_N_S_sw_pwm_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_sw_pwm_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_sw_pwm_P_generator DT_N_S_soc_S_timer_40009000
#define DT_N_S_sw_pwm_P_generator_IDX_0 DT_N_S_soc_S_timer_40009000
#define DT_N_S_sw_pwm_P_generator_IDX_0_PH DT_N_S_soc_S_timer_40009000
#define DT_N_S_sw_pwm_P_generator_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, generator, 0)
#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_sw_pwm, generator, 0)
#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sw_pwm, generator, 0, __VA_ARGS__)
#define DT_N_S_sw_pwm_P_generator_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_sw_pwm, generator, 0, __VA_ARGS__)
#define DT_N_S_sw_pwm_P_generator_LEN 1
#define DT_N_S_sw_pwm_P_generator_EXISTS 1
#define DT_N_S_sw_pwm_P_clock_prescaler 0
#define DT_N_S_sw_pwm_P_clock_prescaler_EXISTS 1
#define DT_N_S_sw_pwm_P_status "disabled"
#define DT_N_S_sw_pwm_P_status_STRING_UNQUOTED disabled
#define DT_N_S_sw_pwm_P_status_STRING_TOKEN disabled
#define DT_N_S_sw_pwm_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_sw_pwm_P_status_IDX_0 "disabled"
#define DT_N_S_sw_pwm_P_status_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_sw_pwm_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, status, 0)
#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_sw_pwm, status, 0)
#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sw_pwm, status, 0, __VA_ARGS__)
#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_sw_pwm, status, 0, __VA_ARGS__)
#define DT_N_S_sw_pwm_P_status_LEN 1
#define DT_N_S_sw_pwm_P_status_EXISTS 1
#define DT_N_S_sw_pwm_P_compatible {"nordic,nrf-sw-pwm"}
#define DT_N_S_sw_pwm_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_P_compatible_IDX_0 "nordic,nrf-sw-pwm"
#define DT_N_S_sw_pwm_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-sw-pwm
#define DT_N_S_sw_pwm_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_sw_pwm
#define DT_N_S_sw_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SW_PWM
#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, compatible, 0)
#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_sw_pwm, compatible, 0)
#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_sw_pwm, compatible, 0, __VA_ARGS__)
#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_sw_pwm, compatible, 0, __VA_ARGS__)
#define DT_N_S_sw_pwm_P_compatible_LEN 1
#define DT_N_S_sw_pwm_P_compatible_EXISTS 1
#define DT_N_S_sw_pwm_P_zephyr_deferred_init 0
#define DT_N_S_sw_pwm_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_sw_pwm_P_wakeup_source 0
#define DT_N_S_sw_pwm_P_wakeup_source_EXISTS 1
#define DT_N_S_sw_pwm_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_sw_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/gpiote@40006000
 *
 * Node identifier: DT_N_S_soc_S_gpiote_40006000
 *
 * Binding (compatible = nordic,nrf-gpiote):
 *   $ZEPHYR_BASE/dts/bindings/gpio/nordic,nrf-gpiote.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_gpiote_40006000_PATH "/soc/gpiote@40006000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_gpiote_40006000_FULL_NAME "gpiote@40006000"
#define DT_N_S_soc_S_gpiote_40006000_FULL_NAME_UNQUOTED gpiote@40006000
#define DT_N_S_soc_S_gpiote_40006000_FULL_NAME_TOKEN gpiote_40006000
#define DT_N_S_soc_S_gpiote_40006000_FULL_NAME_UPPER_TOKEN GPIOTE_40006000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_gpiote_40006000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_gpiote_40006000_CHILD_IDX 15

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_gpiote_40006000_NODELABEL_NUM 2
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_NODELABEL(fn) fn(gpiote) fn(gpiote0)
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiote, __VA_ARGS__) fn(gpiote0, __VA_ARGS__)
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_gpiote_40006000_CHILD_NUM 0
#define DT_N_S_soc_S_gpiote_40006000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_gpiote_40006000_HASH ArrKPdZhyqqBftoentmUeJNRDWGOoFaogCW6b89xook

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_gpiote_40006000_ORD 8
#define DT_N_S_soc_S_gpiote_40006000_ORD_STR_SORTABLE 00008

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_gpiote_40006000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_gpiote_40006000_SUPPORTS_ORDS \
	9, /* /soc/gpio@50000000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_gpiote_40006000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_gpiote DT_N_S_soc_S_gpiote_40006000
#define DT_N_NODELABEL_gpiote         DT_N_S_soc_S_gpiote_40006000
#define DT_N_NODELABEL_gpiote0        DT_N_S_soc_S_gpiote_40006000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_gpiote_40006000_REG_NUM 1
#define DT_N_S_soc_S_gpiote_40006000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_REG_IDX_0_VAL_ADDRESS 1073766400 /* 0x40006000 */
#define DT_N_S_soc_S_gpiote_40006000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_gpiote_40006000_RANGES_NUM 0
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_gpiote_40006000_IRQ_NUM 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_irq 6
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_priority 5
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_gpiote_40006000_IRQ_LEVEL 1
#define DT_N_S_soc_S_gpiote_40006000_COMPAT_MATCHES_nordic_nrf_gpiote 1
#define DT_N_S_soc_S_gpiote_40006000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_gpiote_40006000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_COMPAT_MODEL_IDX_0 "nrf-gpiote"
#define DT_N_S_soc_S_gpiote_40006000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_gpiote_40006000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_gpiote_40006000_P_reg {1073766400 /* 0x40006000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_0 1073766400
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_gpiote_40006000_P_reg_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts {6 /* 0x6 */, 5 /* 0x5 */}
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_0 6
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_1 5
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_no_port_event 0
#define DT_N_S_soc_S_gpiote_40006000_P_no_port_event_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_fixed_channels_supported 0
#define DT_N_S_soc_S_gpiote_40006000_P_fixed_channels_supported_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_instance 0
#define DT_N_S_soc_S_gpiote_40006000_P_instance_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_status "okay"
#define DT_N_S_soc_S_gpiote_40006000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_gpiote_40006000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_gpiote_40006000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpiote_40006000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_gpiote_40006000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_gpiote_40006000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40006000, status, 0)
#define DT_N_S_soc_S_gpiote_40006000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpiote_40006000, status, 0)
#define DT_N_S_soc_S_gpiote_40006000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_40006000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpiote_40006000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpiote_40006000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpiote_40006000_P_status_LEN 1
#define DT_N_S_soc_S_gpiote_40006000_P_status_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_compatible {"nordic,nrf-gpiote"}
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_IDX_0 "nordic,nrf-gpiote"
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpiote
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpiote
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPIOTE
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40006000, compatible, 0)
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpiote_40006000, compatible, 0)
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpiote_40006000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpiote_40006000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_LEN 1
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_gpiote_40006000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_wakeup_source 0
#define DT_N_S_soc_S_gpiote_40006000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_gpiote_40006000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/gpio@50000000
 *
 * Node identifier: DT_N_S_soc_S_gpio_50000000
 *
 * Binding (compatible = nordic,nrf-gpio):
 *   $ZEPHYR_BASE/dts/bindings/gpio/nordic,nrf-gpio.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_gpio_50000000_PATH "/soc/gpio@50000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_gpio_50000000_FULL_NAME "gpio@50000000"
#define DT_N_S_soc_S_gpio_50000000_FULL_NAME_UNQUOTED gpio@50000000
#define DT_N_S_soc_S_gpio_50000000_FULL_NAME_TOKEN gpio_50000000
#define DT_N_S_soc_S_gpio_50000000_FULL_NAME_UPPER_TOKEN GPIO_50000000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_gpio_50000000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_gpio_50000000_CHILD_IDX 47

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_gpio_50000000_NODELABEL_NUM 1
#define DT_N_S_soc_S_gpio_50000000_FOREACH_NODELABEL(fn) fn(gpio0)
#define DT_N_S_soc_S_gpio_50000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpio0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_50000000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_gpio_50000000_CHILD_NUM 0
#define DT_N_S_soc_S_gpio_50000000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_gpio_50000000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_gpio_50000000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_gpio_50000000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_gpio_50000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_gpio_50000000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_gpio_50000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_gpio_50000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_gpio_50000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_gpio_50000000_HASH jlnraCkF0yOFxip3sHhNp4RLOKVpNgOI6a8LqwOtfpo

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_gpio_50000000_ORD 9
#define DT_N_S_soc_S_gpio_50000000_ORD_STR_SORTABLE 00009

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_gpio_50000000_REQUIRES_ORDS \
	4, /* /soc */ \
	8, /* /soc/gpiote@40006000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_gpio_50000000_SUPPORTS_ORDS \
	10, /* /vcc_enable */ \
	18, /* /leds */ \
	19, /* /leds/led_1 */ \
	73, /* /soc/i2c@40003000/bma530@18 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_gpio_50000000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_gpio DT_N_S_soc_S_gpio_50000000
#define DT_N_NODELABEL_gpio0        DT_N_S_soc_S_gpio_50000000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_gpio_50000000_REG_NUM 1
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_0_VAL_ADDRESS 1342177280 /* 0x50000000 */
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_gpio_50000000_RANGES_NUM 0
#define DT_N_S_soc_S_gpio_50000000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_gpio_50000000_IRQ_NUM 0
#define DT_N_S_soc_S_gpio_50000000_IRQ_LEVEL 0
#define DT_N_S_soc_S_gpio_50000000_COMPAT_MATCHES_nordic_nrf_gpio 1
#define DT_N_S_soc_S_gpio_50000000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_gpio_50000000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_COMPAT_MODEL_IDX_0 "nrf-gpio"
#define DT_N_S_soc_S_gpio_50000000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_gpio_50000000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_gpio_50000000_P_reg {1342177280 /* 0x50000000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_0 1342177280
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_gpio_50000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_gpiote_instance DT_N_S_soc_S_gpiote_40006000
#define DT_N_S_soc_S_gpio_50000000_P_gpiote_instance_IDX_0 DT_N_S_soc_S_gpiote_40006000
#define DT_N_S_soc_S_gpio_50000000_P_gpiote_instance_IDX_0_PH DT_N_S_soc_S_gpiote_40006000
#define DT_N_S_soc_S_gpio_50000000_P_gpiote_instance_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_gpiote_instance_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_50000000, gpiote_instance, 0)
#define DT_N_S_soc_S_gpio_50000000_P_gpiote_instance_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpio_50000000, gpiote_instance, 0)
#define DT_N_S_soc_S_gpio_50000000_P_gpiote_instance_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpio_50000000, gpiote_instance, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_50000000_P_gpiote_instance_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpio_50000000, gpiote_instance, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_50000000_P_gpiote_instance_LEN 1
#define DT_N_S_soc_S_gpio_50000000_P_gpiote_instance_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_port 0
#define DT_N_S_soc_S_gpio_50000000_P_port_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_gpio_controller 1
#define DT_N_S_soc_S_gpio_50000000_P_gpio_controller_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_ngpios 32
#define DT_N_S_soc_S_gpio_50000000_P_ngpios_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_status "okay"
#define DT_N_S_soc_S_gpio_50000000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_gpio_50000000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_gpio_50000000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpio_50000000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_gpio_50000000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_gpio_50000000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_50000000, status, 0)
#define DT_N_S_soc_S_gpio_50000000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpio_50000000, status, 0)
#define DT_N_S_soc_S_gpio_50000000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpio_50000000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_50000000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpio_50000000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_50000000_P_status_LEN 1
#define DT_N_S_soc_S_gpio_50000000_P_status_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_compatible {"nordic,nrf-gpio"}
#define DT_N_S_soc_S_gpio_50000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_compatible_IDX_0 "nordic,nrf-gpio"
#define DT_N_S_soc_S_gpio_50000000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpio
#define DT_N_S_soc_S_gpio_50000000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpio
#define DT_N_S_soc_S_gpio_50000000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPIO
#define DT_N_S_soc_S_gpio_50000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_50000000, compatible, 0)
#define DT_N_S_soc_S_gpio_50000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_gpio_50000000, compatible, 0)
#define DT_N_S_soc_S_gpio_50000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_gpio_50000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_50000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_gpio_50000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_gpio_50000000_P_compatible_LEN 1
#define DT_N_S_soc_S_gpio_50000000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_gpio_50000000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_wakeup_source 0
#define DT_N_S_soc_S_gpio_50000000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_gpio_50000000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /vcc_enable
 *
 * Node identifier: DT_N_S_vcc_enable
 *
 * Binding (compatible = nordic,gpio-pins):
 *   /opt/nordic/ncs/v3.1.1/nrf/dts/bindings/gpio/nordic,gpio-pins.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_vcc_enable_PATH "/vcc_enable"

/* Node's name with unit-address: */
#define DT_N_S_vcc_enable_FULL_NAME "vcc_enable"
#define DT_N_S_vcc_enable_FULL_NAME_UNQUOTED vcc_enable
#define DT_N_S_vcc_enable_FULL_NAME_TOKEN vcc_enable
#define DT_N_S_vcc_enable_FULL_NAME_UPPER_TOKEN VCC_ENABLE

/* Node parent (/) identifier: */
#define DT_N_S_vcc_enable_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_vcc_enable_CHILD_IDX 10

/* Helpers for dealing with node labels: */
#define DT_N_S_vcc_enable_NODELABEL_NUM 1
#define DT_N_S_vcc_enable_FOREACH_NODELABEL(fn) fn(vcc_enable)
#define DT_N_S_vcc_enable_FOREACH_NODELABEL_VARGS(fn, ...) fn(vcc_enable, __VA_ARGS__)
#define DT_N_S_vcc_enable_FOREACH_ANCESTOR(fn) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_vcc_enable_CHILD_NUM 0
#define DT_N_S_vcc_enable_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_vcc_enable_FOREACH_CHILD(fn) 
#define DT_N_S_vcc_enable_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_vcc_enable_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_vcc_enable_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_vcc_enable_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_vcc_enable_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_vcc_enable_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_vcc_enable_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_vcc_enable_HASH _IqmYDbzkMuQlKEdzQMNiGCucGQkmpQ8kFDnL0xZr0Q

/* Node's dependency ordinal: */
#define DT_N_S_vcc_enable_ORD 10
#define DT_N_S_vcc_enable_ORD_STR_SORTABLE 00010

/* Ordinals for what this node depends on directly: */
#define DT_N_S_vcc_enable_REQUIRES_ORDS \
	0, /* / */ \
	9, /* /soc/gpio@50000000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_vcc_enable_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_vcc_enable_EXISTS 1
#define DT_N_INST_0_nordic_gpio_pins DT_N_S_vcc_enable
#define DT_N_NODELABEL_vcc_enable    DT_N_S_vcc_enable

/* Macros for properties that are special in the specification: */
#define DT_N_S_vcc_enable_REG_NUM 0
#define DT_N_S_vcc_enable_RANGES_NUM 0
#define DT_N_S_vcc_enable_FOREACH_RANGE(fn) 
#define DT_N_S_vcc_enable_IRQ_NUM 0
#define DT_N_S_vcc_enable_IRQ_LEVEL 0
#define DT_N_S_vcc_enable_COMPAT_MATCHES_nordic_gpio_pins 1
#define DT_N_S_vcc_enable_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_vcc_enable_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_vcc_enable_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_vcc_enable_COMPAT_MODEL_IDX_0 "gpio-pins"
#define DT_N_S_vcc_enable_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_vcc_enable_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_vcc_enable_P_gpios_IDX_0_EXISTS 1
#define DT_N_S_vcc_enable_P_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000000
#define DT_N_S_vcc_enable_P_gpios_IDX_0_VAL_pin 7
#define DT_N_S_vcc_enable_P_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_vcc_enable_P_gpios_IDX_0_VAL_flags 0
#define DT_N_S_vcc_enable_P_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_vcc_enable_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_vcc_enable, gpios, 0)
#define DT_N_S_vcc_enable_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_vcc_enable, gpios, 0)
#define DT_N_S_vcc_enable_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_vcc_enable, gpios, 0, __VA_ARGS__)
#define DT_N_S_vcc_enable_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_vcc_enable, gpios, 0, __VA_ARGS__)
#define DT_N_S_vcc_enable_P_gpios_LEN 1
#define DT_N_S_vcc_enable_P_gpios_EXISTS 1

/*
 * Devicetree node: /soc/adc@40007000
 *
 * Node identifier: DT_N_S_soc_S_adc_40007000
 *
 * Binding (compatible = nordic,nrf-saadc):
 *   $ZEPHYR_BASE/dts/bindings/adc/nordic,nrf-saadc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_adc_40007000_PATH "/soc/adc@40007000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_adc_40007000_FULL_NAME "adc@40007000"
#define DT_N_S_soc_S_adc_40007000_FULL_NAME_UNQUOTED adc@40007000
#define DT_N_S_soc_S_adc_40007000_FULL_NAME_TOKEN adc_40007000
#define DT_N_S_soc_S_adc_40007000_FULL_NAME_UPPER_TOKEN ADC_40007000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_adc_40007000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_adc_40007000_CHILD_IDX 16

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_adc_40007000_NODELABEL_NUM 1
#define DT_N_S_soc_S_adc_40007000_FOREACH_NODELABEL(fn) fn(adc)
#define DT_N_S_soc_S_adc_40007000_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_adc_40007000_CHILD_NUM 1
#define DT_N_S_soc_S_adc_40007000_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_soc_S_adc_40007000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_adc_40007000_S_channel_0)
#define DT_N_S_soc_S_adc_40007000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40007000_S_channel_0)
#define DT_N_S_soc_S_adc_40007000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40007000_S_channel_0, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40007000_S_channel_0, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_adc_40007000_S_channel_0)
#define DT_N_S_soc_S_adc_40007000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40007000_S_channel_0)
#define DT_N_S_soc_S_adc_40007000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40007000_S_channel_0, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40007000_S_channel_0, __VA_ARGS__)

/* Node's hash: */
#define DT_N_S_soc_S_adc_40007000_HASH tXynCvE4WGk6sXMVYrs4uEl6i0QBQkUoHsTb5OtXf8o

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_adc_40007000_ORD 11
#define DT_N_S_soc_S_adc_40007000_ORD_STR_SORTABLE 00011

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_adc_40007000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_adc_40007000_SUPPORTS_ORDS \
	12, /* /zephyr,user */ \
	64, /* /soc/adc@40007000/channel@0 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_adc_40007000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_saadc DT_N_S_soc_S_adc_40007000
#define DT_N_NODELABEL_adc           DT_N_S_soc_S_adc_40007000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_adc_40007000_REG_NUM 1
#define DT_N_S_soc_S_adc_40007000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_REG_IDX_0_VAL_ADDRESS 1073770496 /* 0x40007000 */
#define DT_N_S_soc_S_adc_40007000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_adc_40007000_RANGES_NUM 0
#define DT_N_S_soc_S_adc_40007000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_adc_40007000_IRQ_NUM 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_irq 7
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_adc_40007000_IRQ_LEVEL 1
#define DT_N_S_soc_S_adc_40007000_COMPAT_MATCHES_nordic_nrf_saadc 1
#define DT_N_S_soc_S_adc_40007000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_adc_40007000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_COMPAT_MODEL_IDX_0 "nrf-saadc"
#define DT_N_S_soc_S_adc_40007000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_adc_40007000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_adc_40007000_P_reg {1073770496 /* 0x40007000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_0 1073770496
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_adc_40007000_P_reg_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts {7 /* 0x7 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_0 7
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_status "okay"
#define DT_N_S_soc_S_adc_40007000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_adc_40007000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_adc_40007000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_adc_40007000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_adc_40007000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_adc_40007000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40007000, status, 0)
#define DT_N_S_soc_S_adc_40007000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40007000, status, 0)
#define DT_N_S_soc_S_adc_40007000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40007000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40007000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_P_status_LEN 1
#define DT_N_S_soc_S_adc_40007000_P_status_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_compatible {"nordic,nrf-saadc"}
#define DT_N_S_soc_S_adc_40007000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_compatible_IDX_0 "nordic,nrf-saadc"
#define DT_N_S_soc_S_adc_40007000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-saadc
#define DT_N_S_soc_S_adc_40007000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_saadc
#define DT_N_S_soc_S_adc_40007000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SAADC
#define DT_N_S_soc_S_adc_40007000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40007000, compatible, 0)
#define DT_N_S_soc_S_adc_40007000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40007000, compatible, 0)
#define DT_N_S_soc_S_adc_40007000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40007000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40007000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_P_compatible_LEN 1
#define DT_N_S_soc_S_adc_40007000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_adc_40007000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_wakeup_source 0
#define DT_N_S_soc_S_adc_40007000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_zephyr_pm_device_runtime_auto 1
#define DT_N_S_soc_S_adc_40007000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /zephyr,user
 *
 * Node identifier: DT_N_S_zephyr_user
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_zephyr_user_PATH "/zephyr,user"

/* Node's name with unit-address: */
#define DT_N_S_zephyr_user_FULL_NAME "zephyr,user"
#define DT_N_S_zephyr_user_FULL_NAME_UNQUOTED zephyr,user
#define DT_N_S_zephyr_user_FULL_NAME_TOKEN zephyr_user
#define DT_N_S_zephyr_user_FULL_NAME_UPPER_TOKEN ZEPHYR_USER

/* Node parent (/) identifier: */
#define DT_N_S_zephyr_user_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_zephyr_user_CHILD_IDX 8

/* Helpers for dealing with node labels: */
#define DT_N_S_zephyr_user_NODELABEL_NUM 0
#define DT_N_S_zephyr_user_FOREACH_NODELABEL(fn) 
#define DT_N_S_zephyr_user_FOREACH_NODELABEL_VARGS(fn, ...) 
#define DT_N_S_zephyr_user_FOREACH_ANCESTOR(fn) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_zephyr_user_CHILD_NUM 0
#define DT_N_S_zephyr_user_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_zephyr_user_FOREACH_CHILD(fn) 
#define DT_N_S_zephyr_user_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_zephyr_user_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_zephyr_user_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_zephyr_user_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_zephyr_user_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_zephyr_user_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_zephyr_user_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_zephyr_user_HASH yvQw9UuQMLRblNbUC3yeUHnjbtsQjI3bWwAx_c_vELI

/* Node's dependency ordinal: */
#define DT_N_S_zephyr_user_ORD 12
#define DT_N_S_zephyr_user_ORD_STR_SORTABLE 00012

/* Ordinals for what this node depends on directly: */
#define DT_N_S_zephyr_user_REQUIRES_ORDS \
	0, /* / */ \
	11, /* /soc/adc@40007000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_zephyr_user_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_zephyr_user_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_zephyr_user_REG_NUM 0
#define DT_N_S_zephyr_user_RANGES_NUM 0
#define DT_N_S_zephyr_user_FOREACH_RANGE(fn) 
#define DT_N_S_zephyr_user_IRQ_NUM 0
#define DT_N_S_zephyr_user_IRQ_LEVEL 0
#define DT_N_S_zephyr_user_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_zephyr_user_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_zephyr_user_P_io_channels_IDX_0_EXISTS 1
#define DT_N_S_zephyr_user_P_io_channels_IDX_0_PH DT_N_S_soc_S_adc_40007000
#define DT_N_S_zephyr_user_P_io_channels_IDX_0_VAL_input 0
#define DT_N_S_zephyr_user_P_io_channels_IDX_0_VAL_input_EXISTS 1
#define DT_N_S_zephyr_user_P_io_channels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, io_channels, 0)
#define DT_N_S_zephyr_user_P_io_channels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, io_channels, 0)
#define DT_N_S_zephyr_user_P_io_channels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, io_channels, 0, __VA_ARGS__)
#define DT_N_S_zephyr_user_P_io_channels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, io_channels, 0, __VA_ARGS__)
#define DT_N_S_zephyr_user_P_io_channels_LEN 1
#define DT_N_S_zephyr_user_P_io_channels_EXISTS 1

/*
 * Devicetree node: /clocks
 *
 * Node identifier: DT_N_S_clocks
 */

/* Node's full path: */
#define DT_N_S_clocks_PATH "/clocks"

/* Node's name with unit-address: */
#define DT_N_S_clocks_FULL_NAME "clocks"
#define DT_N_S_clocks_FULL_NAME_UNQUOTED clocks
#define DT_N_S_clocks_FULL_NAME_TOKEN clocks
#define DT_N_S_clocks_FULL_NAME_UPPER_TOKEN CLOCKS

/* Node parent (/) identifier: */
#define DT_N_S_clocks_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_clocks_CHILD_IDX 7

/* Helpers for dealing with node labels: */
#define DT_N_S_clocks_NODELABEL_NUM 0
#define DT_N_S_clocks_FOREACH_NODELABEL(fn) 
#define DT_N_S_clocks_FOREACH_NODELABEL_VARGS(fn, ...) 
#define DT_N_S_clocks_FOREACH_ANCESTOR(fn) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_clocks_CHILD_NUM 1
#define DT_N_S_clocks_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_clocks_FOREACH_CHILD(fn) fn(DT_N_S_clocks_S_hfxo)
#define DT_N_S_clocks_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_clocks_S_hfxo)
#define DT_N_S_clocks_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_clocks_S_hfxo, __VA_ARGS__)
#define DT_N_S_clocks_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_hfxo, __VA_ARGS__)
#define DT_N_S_clocks_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_clocks_S_hfxo)
#define DT_N_S_clocks_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_clocks_S_hfxo)
#define DT_N_S_clocks_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_clocks_S_hfxo, __VA_ARGS__)
#define DT_N_S_clocks_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_hfxo, __VA_ARGS__)

/* Node's hash: */
#define DT_N_S_clocks_HASH 3P3fmk_q5wPvaymGA6NeomHHBb_cCfQX2PaKw_k1t_w

/* Node's dependency ordinal: */
#define DT_N_S_clocks_ORD 13
#define DT_N_S_clocks_ORD_STR_SORTABLE 00013

/* Ordinals for what this node depends on directly: */
#define DT_N_S_clocks_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_clocks_SUPPORTS_ORDS \
	14, /* /clocks/hfxo */

/* Existence and alternate IDs: */
#define DT_N_S_clocks_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_clocks_REG_NUM 0
#define DT_N_S_clocks_RANGES_NUM 0
#define DT_N_S_clocks_FOREACH_RANGE(fn) 
#define DT_N_S_clocks_IRQ_NUM 0
#define DT_N_S_clocks_IRQ_LEVEL 0
#define DT_N_S_clocks_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_clocks_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /clocks/hfxo
 *
 * Node identifier: DT_N_S_clocks_S_hfxo
 *
 * Binding (compatible = nordic,nrf52-hfxo):
 *   $ZEPHYR_BASE/dts/bindings/clock/nordic,nrf52-hfxo.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_clocks_S_hfxo_PATH "/clocks/hfxo"

/* Node's name with unit-address: */
#define DT_N_S_clocks_S_hfxo_FULL_NAME "hfxo"
#define DT_N_S_clocks_S_hfxo_FULL_NAME_UNQUOTED hfxo
#define DT_N_S_clocks_S_hfxo_FULL_NAME_TOKEN hfxo
#define DT_N_S_clocks_S_hfxo_FULL_NAME_UPPER_TOKEN HFXO

/* Node parent (/clocks) identifier: */
#define DT_N_S_clocks_S_hfxo_PARENT DT_N_S_clocks

/* Node's index in its parent's list of children: */
#define DT_N_S_clocks_S_hfxo_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_clocks_S_hfxo_NODELABEL_NUM 1
#define DT_N_S_clocks_S_hfxo_FOREACH_NODELABEL(fn) fn(hfxo)
#define DT_N_S_clocks_S_hfxo_FOREACH_NODELABEL_VARGS(fn, ...) fn(hfxo, __VA_ARGS__)
#define DT_N_S_clocks_S_hfxo_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_clocks_S_hfxo_CHILD_NUM 0
#define DT_N_S_clocks_S_hfxo_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_clocks_S_hfxo_FOREACH_CHILD(fn) 
#define DT_N_S_clocks_S_hfxo_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_clocks_S_hfxo_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_clocks_S_hfxo_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_clocks_S_hfxo_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_clocks_S_hfxo_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_clocks_S_hfxo_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_clocks_S_hfxo_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_clocks_S_hfxo_HASH MLbpSb2CV3oUhgJfvSk3Ru7ErR1iy5U9W61jxNr_noo

/* Node's dependency ordinal: */
#define DT_N_S_clocks_S_hfxo_ORD 14
#define DT_N_S_clocks_S_hfxo_ORD_STR_SORTABLE 00014

/* Ordinals for what this node depends on directly: */
#define DT_N_S_clocks_S_hfxo_REQUIRES_ORDS \
	13, /* /clocks */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_clocks_S_hfxo_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_clocks_S_hfxo_EXISTS 1
#define DT_N_INST_0_nordic_nrf52_hfxo DT_N_S_clocks_S_hfxo
#define DT_N_NODELABEL_hfxo           DT_N_S_clocks_S_hfxo

/* Macros for properties that are special in the specification: */
#define DT_N_S_clocks_S_hfxo_REG_NUM 0
#define DT_N_S_clocks_S_hfxo_RANGES_NUM 0
#define DT_N_S_clocks_S_hfxo_FOREACH_RANGE(fn) 
#define DT_N_S_clocks_S_hfxo_IRQ_NUM 0
#define DT_N_S_clocks_S_hfxo_IRQ_LEVEL 0
#define DT_N_S_clocks_S_hfxo_COMPAT_MATCHES_nordic_nrf52_hfxo 1
#define DT_N_S_clocks_S_hfxo_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_clocks_S_hfxo_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_clocks_S_hfxo_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_clocks_S_hfxo_COMPAT_MODEL_IDX_0 "nrf52-hfxo"
#define DT_N_S_clocks_S_hfxo_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_clocks_S_hfxo_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_clocks_S_hfxo_P_clock_frequency 64000000
#define DT_N_S_clocks_S_hfxo_P_clock_frequency_EXISTS 1
#define DT_N_S_clocks_S_hfxo_P_startup_time_us 1400
#define DT_N_S_clocks_S_hfxo_P_startup_time_us_EXISTS 1
#define DT_N_S_clocks_S_hfxo_P_compatible {"nordic,nrf52-hfxo"}
#define DT_N_S_clocks_S_hfxo_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_clocks_S_hfxo_P_compatible_IDX_0 "nordic,nrf52-hfxo"
#define DT_N_S_clocks_S_hfxo_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf52-hfxo
#define DT_N_S_clocks_S_hfxo_P_compatible_IDX_0_STRING_TOKEN nordic_nrf52_hfxo
#define DT_N_S_clocks_S_hfxo_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF52_HFXO
#define DT_N_S_clocks_S_hfxo_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_hfxo, compatible, 0)
#define DT_N_S_clocks_S_hfxo_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_hfxo, compatible, 0)
#define DT_N_S_clocks_S_hfxo_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_hfxo, compatible, 0, __VA_ARGS__)
#define DT_N_S_clocks_S_hfxo_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_hfxo, compatible, 0, __VA_ARGS__)
#define DT_N_S_clocks_S_hfxo_P_compatible_LEN 1
#define DT_N_S_clocks_S_hfxo_P_compatible_EXISTS 1
#define DT_N_S_clocks_S_hfxo_P_zephyr_deferred_init 0
#define DT_N_S_clocks_S_hfxo_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_clocks_S_hfxo_P_wakeup_source 0
#define DT_N_S_clocks_S_hfxo_P_wakeup_source_EXISTS 1
#define DT_N_S_clocks_S_hfxo_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_clocks_S_hfxo_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /cpus
 *
 * Node identifier: DT_N_S_cpus
 */

/* Node's full path: */
#define DT_N_S_cpus_PATH "/cpus"

/* Node's name with unit-address: */
#define DT_N_S_cpus_FULL_NAME "cpus"
#define DT_N_S_cpus_FULL_NAME_UNQUOTED cpus
#define DT_N_S_cpus_FULL_NAME_TOKEN cpus
#define DT_N_S_cpus_FULL_NAME_UPPER_TOKEN CPUS

/* Node parent (/) identifier: */
#define DT_N_S_cpus_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_cpus_CHILD_IDX 6

/* Helpers for dealing with node labels: */
#define DT_N_S_cpus_NODELABEL_NUM 0
#define DT_N_S_cpus_FOREACH_NODELABEL(fn) 
#define DT_N_S_cpus_FOREACH_NODELABEL_VARGS(fn, ...) 
#define DT_N_S_cpus_FOREACH_ANCESTOR(fn) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_cpus_CHILD_NUM 1
#define DT_N_S_cpus_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_cpus_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_0)
#define DT_N_S_cpus_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0)
#define DT_N_S_cpus_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__)
#define DT_N_S_cpus_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__)
#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_cpu_0)
#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0)
#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__)
#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__)

/* Node's hash: */
#define DT_N_S_cpus_HASH iL3XRGZVvvtpNJqKV0_jvtuXF7m6kgky4nI2ifizwdg

/* Node's dependency ordinal: */
#define DT_N_S_cpus_ORD 15
#define DT_N_S_cpus_ORD_STR_SORTABLE 00015

/* Ordinals for what this node depends on directly: */
#define DT_N_S_cpus_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_cpus_SUPPORTS_ORDS \
	16, /* /cpus/cpu@0 */

/* Existence and alternate IDs: */
#define DT_N_S_cpus_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_cpus_REG_NUM 0
#define DT_N_S_cpus_RANGES_NUM 0
#define DT_N_S_cpus_FOREACH_RANGE(fn) 
#define DT_N_S_cpus_IRQ_NUM 0
#define DT_N_S_cpus_IRQ_LEVEL 0
#define DT_N_S_cpus_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_cpus_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /cpus/cpu@0
 *
 * Node identifier: DT_N_S_cpus_S_cpu_0
 *
 * Binding (compatible = arm,cortex-m4f):
 *   $ZEPHYR_BASE/dts/bindings/cpu/arm,cortex-m4f.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_cpus_S_cpu_0_PATH "/cpus/cpu@0"

/* Node's name with unit-address: */
#define DT_N_S_cpus_S_cpu_0_FULL_NAME "cpu@0"
#define DT_N_S_cpus_S_cpu_0_FULL_NAME_UNQUOTED cpu@0
#define DT_N_S_cpus_S_cpu_0_FULL_NAME_TOKEN cpu_0
#define DT_N_S_cpus_S_cpu_0_FULL_NAME_UPPER_TOKEN CPU_0

/* Node parent (/cpus) identifier: */
#define DT_N_S_cpus_S_cpu_0_PARENT DT_N_S_cpus

/* Node's index in its parent's list of children: */
#define DT_N_S_cpus_S_cpu_0_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_cpus_S_cpu_0_NODELABEL_NUM 0
#define DT_N_S_cpus_S_cpu_0_FOREACH_NODELABEL(fn) 
#define DT_N_S_cpus_S_cpu_0_FOREACH_NODELABEL_VARGS(fn, ...) 
#define DT_N_S_cpus_S_cpu_0_FOREACH_ANCESTOR(fn) fn(DT_N_S_cpus) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_cpus_S_cpu_0_CHILD_NUM 1
#define DT_N_S_cpus_S_cpu_0_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000)
#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000)
#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000)
#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000)
#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000, __VA_ARGS__)

/* Node's hash: */
#define DT_N_S_cpus_S_cpu_0_HASH Su0JBbOtM0QIxe_1ka2Xvgw4rk1QaIlMIj8Rp_v4yVQ

/* Node's dependency ordinal: */
#define DT_N_S_cpus_S_cpu_0_ORD 16
#define DT_N_S_cpus_S_cpu_0_ORD_STR_SORTABLE 00016

/* Ordinals for what this node depends on directly: */
#define DT_N_S_cpus_S_cpu_0_REQUIRES_ORDS \
	15, /* /cpus */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_cpus_S_cpu_0_SUPPORTS_ORDS \
	17, /* /cpus/cpu@0/itm@e0000000 */

/* Existence and alternate IDs: */
#define DT_N_S_cpus_S_cpu_0_EXISTS 1
#define DT_N_INST_0_arm_cortex_m4f DT_N_S_cpus_S_cpu_0

/* Macros for properties that are special in the specification: */
#define DT_N_S_cpus_S_cpu_0_REG_NUM 1
#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
#define DT_N_S_cpus_S_cpu_0_RANGES_NUM 0
#define DT_N_S_cpus_S_cpu_0_FOREACH_RANGE(fn) 
#define DT_N_S_cpus_S_cpu_0_IRQ_NUM 0
#define DT_N_S_cpus_S_cpu_0_IRQ_LEVEL 0
#define DT_N_S_cpus_S_cpu_0_COMPAT_MATCHES_arm_cortex_m4f 1
#define DT_N_S_cpus_S_cpu_0_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_COMPAT_VENDOR_IDX_0 "ARM Ltd."
#define DT_N_S_cpus_S_cpu_0_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_COMPAT_MODEL_IDX_0 "cortex-m4f"
#define DT_N_S_cpus_S_cpu_0_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_cpus_S_cpu_0_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_cpus_S_cpu_0_P_compatible {"arm,cortex-m4f"}
#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0 "arm,cortex-m4f"
#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_UNQUOTED arm,cortex-m4f
#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_TOKEN arm_cortex_m4f
#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_CORTEX_M4F
#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0, compatible, 0)
#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0, compatible, 0)
#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, compatible, 0, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, compatible, 0, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_0_P_compatible_LEN 1
#define DT_N_S_cpus_S_cpu_0_P_compatible_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_reg {0 /* 0x0 */}
#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0 0
#define DT_N_S_cpus_S_cpu_0_P_reg_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_zephyr_deferred_init 0
#define DT_N_S_cpus_S_cpu_0_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_wakeup_source 0
#define DT_N_S_cpus_S_cpu_0_P_wakeup_source_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_cpus_S_cpu_0_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /cpus/cpu@0/itm@e0000000
 *
 * Node identifier: DT_N_S_cpus_S_cpu_0_S_itm_e0000000
 *
 * Binding (compatible = arm,armv7m-itm):
 *   $ZEPHYR_BASE/dts/bindings/debug/arm,armv7m-itm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_PATH "/cpus/cpu@0/itm@e0000000"

/* Node's name with unit-address: */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FULL_NAME "itm@e0000000"
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FULL_NAME_UNQUOTED itm@e0000000
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FULL_NAME_TOKEN itm_e0000000
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FULL_NAME_UPPER_TOKEN ITM_E0000000

/* Node parent (/cpus/cpu@0) identifier: */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_PARENT DT_N_S_cpus_S_cpu_0

/* Node's index in its parent's list of children: */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_NODELABEL_NUM 1
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FOREACH_NODELABEL(fn) fn(itm)
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(itm, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FOREACH_ANCESTOR(fn) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_CHILD_NUM 0
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FOREACH_CHILD(fn) 
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_HASH JjHt_nEP3F3Wi8OjOG2PGbmFaf8jabMmf3FNGE28Zfc

/* Node's dependency ordinal: */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_ORD 17
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_ORD_STR_SORTABLE 00017

/* Ordinals for what this node depends on directly: */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_REQUIRES_ORDS \
	16, /* /cpus/cpu@0 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_EXISTS 1
#define DT_N_INST_0_arm_armv7m_itm DT_N_S_cpus_S_cpu_0_S_itm_e0000000
#define DT_N_NODELABEL_itm         DT_N_S_cpus_S_cpu_0_S_itm_e0000000

/* Macros for properties that are special in the specification: */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_REG_NUM 1
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_REG_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_REG_IDX_0_VAL_ADDRESS 3758096384 /* 0xe0000000 */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_RANGES_NUM 0
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_FOREACH_RANGE(fn) 
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_IRQ_NUM 0
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_IRQ_LEVEL 0
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_COMPAT_MATCHES_arm_armv7m_itm 1
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_COMPAT_VENDOR_IDX_0 "ARM Ltd."
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_COMPAT_MODEL_IDX_0 "armv7m-itm"
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_swo_ref_frequency 32000000
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_swo_ref_frequency_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_compatible {"arm,armv7m-itm"}
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_compatible_IDX_0 "arm,armv7m-itm"
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_compatible_IDX_0_STRING_UNQUOTED arm,armv7m-itm
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_compatible_IDX_0_STRING_TOKEN arm_armv7m_itm
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_ARMV7M_ITM
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000, compatible, 0)
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000, compatible, 0)
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_compatible_LEN 1
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_compatible_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_reg {3758096384 /* 0xe0000000 */, 4096 /* 0x1000 */}
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_reg_IDX_0 3758096384
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_reg_IDX_1 4096
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_reg_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_zephyr_deferred_init 0
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_wakeup_source 0
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_wakeup_source_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_cpus_S_cpu_0_S_itm_e0000000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /leds
 *
 * Node identifier: DT_N_S_leds
 *
 * Binding (compatible = gpio-leds):
 *   $ZEPHYR_BASE/dts/bindings/led/gpio-leds.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_leds_PATH "/leds"

/* Node's name with unit-address: */
#define DT_N_S_leds_FULL_NAME "leds"
#define DT_N_S_leds_FULL_NAME_UNQUOTED leds
#define DT_N_S_leds_FULL_NAME_TOKEN leds
#define DT_N_S_leds_FULL_NAME_UPPER_TOKEN LEDS

/* Node parent (/) identifier: */
#define DT_N_S_leds_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_leds_CHILD_IDX 9

/* Helpers for dealing with node labels: */
#define DT_N_S_leds_NODELABEL_NUM 0
#define DT_N_S_leds_FOREACH_NODELABEL(fn) 
#define DT_N_S_leds_FOREACH_NODELABEL_VARGS(fn, ...) 
#define DT_N_S_leds_FOREACH_ANCESTOR(fn) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_leds_CHILD_NUM 1
#define DT_N_S_leds_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_leds_FOREACH_CHILD(fn) fn(DT_N_S_leds_S_led_1)
#define DT_N_S_leds_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_leds_S_led_1)
#define DT_N_S_leds_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_leds_S_led_1, __VA_ARGS__)
#define DT_N_S_leds_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_1, __VA_ARGS__)
#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_leds_S_led_1)
#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_leds_S_led_1)
#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_leds_S_led_1, __VA_ARGS__)
#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_1, __VA_ARGS__)

/* Node's hash: */
#define DT_N_S_leds_HASH bMroFUocDdjE3kJ38dK18mDvlCOPoyya5kIIs76irj8

/* Node's dependency ordinal: */
#define DT_N_S_leds_ORD 18
#define DT_N_S_leds_ORD_STR_SORTABLE 00018

/* Ordinals for what this node depends on directly: */
#define DT_N_S_leds_REQUIRES_ORDS \
	0, /* / */ \
	9, /* /soc/gpio@50000000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_leds_SUPPORTS_ORDS \
	19, /* /leds/led_1 */

/* Existence and alternate IDs: */
#define DT_N_S_leds_EXISTS 1
#define DT_N_INST_0_gpio_leds DT_N_S_leds

/* Macros for properties that are special in the specification: */
#define DT_N_S_leds_REG_NUM 0
#define DT_N_S_leds_RANGES_NUM 0
#define DT_N_S_leds_FOREACH_RANGE(fn) 
#define DT_N_S_leds_IRQ_NUM 0
#define DT_N_S_leds_IRQ_LEVEL 0
#define DT_N_S_leds_COMPAT_MATCHES_gpio_leds 1
#define DT_N_S_leds_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_leds_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_leds_P_compatible {"gpio-leds"}
#define DT_N_S_leds_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_leds_P_compatible_IDX_0 "gpio-leds"
#define DT_N_S_leds_P_compatible_IDX_0_STRING_UNQUOTED gpio-leds
#define DT_N_S_leds_P_compatible_IDX_0_STRING_TOKEN gpio_leds
#define DT_N_S_leds_P_compatible_IDX_0_STRING_UPPER_TOKEN GPIO_LEDS
#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds, compatible, 0)
#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds, compatible, 0)
#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds, compatible, 0, __VA_ARGS__)
#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds, compatible, 0, __VA_ARGS__)
#define DT_N_S_leds_P_compatible_LEN 1
#define DT_N_S_leds_P_compatible_EXISTS 1

/*
 * Devicetree node: /leds/led_1
 *
 * Node identifier: DT_N_S_leds_S_led_1
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_leds_S_led_1_PATH "/leds/led_1"

/* Node's name with unit-address: */
#define DT_N_S_leds_S_led_1_FULL_NAME "led_1"
#define DT_N_S_leds_S_led_1_FULL_NAME_UNQUOTED led_1
#define DT_N_S_leds_S_led_1_FULL_NAME_TOKEN led_1
#define DT_N_S_leds_S_led_1_FULL_NAME_UPPER_TOKEN LED_1

/* Node parent (/leds) identifier: */
#define DT_N_S_leds_S_led_1_PARENT DT_N_S_leds

/* Node's index in its parent's list of children: */
#define DT_N_S_leds_S_led_1_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_leds_S_led_1_NODELABEL_NUM 1
#define DT_N_S_leds_S_led_1_FOREACH_NODELABEL(fn) fn(led1)
#define DT_N_S_leds_S_led_1_FOREACH_NODELABEL_VARGS(fn, ...) fn(led1, __VA_ARGS__)
#define DT_N_S_leds_S_led_1_FOREACH_ANCESTOR(fn) fn(DT_N_S_leds) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_leds_S_led_1_CHILD_NUM 0
#define DT_N_S_leds_S_led_1_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_leds_S_led_1_FOREACH_CHILD(fn) 
#define DT_N_S_leds_S_led_1_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_leds_S_led_1_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_leds_S_led_1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_leds_S_led_1_HASH iXGpSU4KdWdLNkNXyuDlz5Q9aavHPvjTPItAJ_Q0T5c

/* Node's dependency ordinal: */
#define DT_N_S_leds_S_led_1_ORD 19
#define DT_N_S_leds_S_led_1_ORD_STR_SORTABLE 00019

/* Ordinals for what this node depends on directly: */
#define DT_N_S_leds_S_led_1_REQUIRES_ORDS \
	9, /* /soc/gpio@50000000 */ \
	18, /* /leds */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_leds_S_led_1_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_leds_S_led_1_EXISTS 1
#define DT_N_ALIAS_led1     DT_N_S_leds_S_led_1
#define DT_N_NODELABEL_led1 DT_N_S_leds_S_led_1

/* Macros for properties that are special in the specification: */
#define DT_N_S_leds_S_led_1_REG_NUM 0
#define DT_N_S_leds_S_led_1_RANGES_NUM 0
#define DT_N_S_leds_S_led_1_FOREACH_RANGE(fn) 
#define DT_N_S_leds_S_led_1_IRQ_NUM 0
#define DT_N_S_leds_S_led_1_IRQ_LEVEL 0
#define DT_N_S_leds_S_led_1_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_leds_S_led_1_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_EXISTS 1
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000000
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_pin 4
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_flags 1
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_1, gpios, 0)
#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_1, gpios, 0)
#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_1, gpios, 0, __VA_ARGS__)
#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_1, gpios, 0, __VA_ARGS__)
#define DT_N_S_leds_S_led_1_P_gpios_LEN 1
#define DT_N_S_leds_S_led_1_P_gpios_EXISTS 1
#define DT_N_S_leds_S_led_1_P_label "LED GPIO"
#define DT_N_S_leds_S_led_1_P_label_STRING_UNQUOTED LED GPIO
#define DT_N_S_leds_S_led_1_P_label_STRING_TOKEN LED_GPIO
#define DT_N_S_leds_S_led_1_P_label_STRING_UPPER_TOKEN LED_GPIO
#define DT_N_S_leds_S_led_1_P_label_IDX_0 "LED GPIO"
#define DT_N_S_leds_S_led_1_P_label_IDX_0_EXISTS 1
#define DT_N_S_leds_S_led_1_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_1, label, 0)
#define DT_N_S_leds_S_led_1_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_1, label, 0)
#define DT_N_S_leds_S_led_1_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_1, label, 0, __VA_ARGS__)
#define DT_N_S_leds_S_led_1_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_1, label, 0, __VA_ARGS__)
#define DT_N_S_leds_S_led_1_P_label_LEN 1
#define DT_N_S_leds_S_led_1_P_label_EXISTS 1

/*
 * Devicetree node: /pin-controller
 *
 * Node identifier: DT_N_S_pin_controller
 *
 * Binding (compatible = nordic,nrf-pinctrl):
 *   $ZEPHYR_BASE/dts/bindings/pinctrl/nordic,nrf-pinctrl.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_pin_controller_PATH "/pin-controller"

/* Node's name with unit-address: */
#define DT_N_S_pin_controller_FULL_NAME "pin-controller"
#define DT_N_S_pin_controller_FULL_NAME_UNQUOTED pin-controller
#define DT_N_S_pin_controller_FULL_NAME_TOKEN pin_controller
#define DT_N_S_pin_controller_FULL_NAME_UPPER_TOKEN PIN_CONTROLLER

/* Node parent (/) identifier: */
#define DT_N_S_pin_controller_PARENT DT_N

/* Node's index in its parent's list of children: */
#define DT_N_S_pin_controller_CHILD_IDX 3

/* Helpers for dealing with node labels: */
#define DT_N_S_pin_controller_NODELABEL_NUM 1
#define DT_N_S_pin_controller_FOREACH_NODELABEL(fn) fn(pinctrl)
#define DT_N_S_pin_controller_FOREACH_NODELABEL_VARGS(fn, ...) fn(pinctrl, __VA_ARGS__)
#define DT_N_S_pin_controller_FOREACH_ANCESTOR(fn) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_pin_controller_CHILD_NUM 2
#define DT_N_S_pin_controller_CHILD_NUM_STATUS_OKAY 2
#define DT_N_S_pin_controller_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_i2c0_default_1) fn(DT_N_S_pin_controller_S_i2c0_sleep_1)
#define DT_N_S_pin_controller_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c0_default_1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c0_sleep_1)
#define DT_N_S_pin_controller_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c0_default_1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c0_sleep_1, __VA_ARGS__)
#define DT_N_S_pin_controller_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c0_default_1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c0_sleep_1, __VA_ARGS__)
#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_i2c0_default_1) fn(DT_N_S_pin_controller_S_i2c0_sleep_1)
#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c0_default_1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c0_sleep_1)
#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c0_default_1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c0_sleep_1, __VA_ARGS__)
#define DT_N_S_pin_controller_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c0_default_1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_pin_controller_S_i2c0_sleep_1, __VA_ARGS__)

/* Node's hash: */
#define DT_N_S_pin_controller_HASH bWf59uCG_pY5hQAcoRx7FSfuctl8KNxAtmdgsI6QClA

/* Node's dependency ordinal: */
#define DT_N_S_pin_controller_ORD 20
#define DT_N_S_pin_controller_ORD_STR_SORTABLE 00020

/* Ordinals for what this node depends on directly: */
#define DT_N_S_pin_controller_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_pin_controller_SUPPORTS_ORDS \
	21, /* /pin-controller/i2c0_default_1 */ \
	23, /* /pin-controller/i2c0_sleep_1 */

/* Existence and alternate IDs: */
#define DT_N_S_pin_controller_EXISTS 1
#define DT_N_INST_0_nordic_nrf_pinctrl DT_N_S_pin_controller
#define DT_N_NODELABEL_pinctrl         DT_N_S_pin_controller

/* Macros for properties that are special in the specification: */
#define DT_N_S_pin_controller_REG_NUM 0
#define DT_N_S_pin_controller_RANGES_NUM 0
#define DT_N_S_pin_controller_FOREACH_RANGE(fn) 
#define DT_N_S_pin_controller_IRQ_NUM 0
#define DT_N_S_pin_controller_IRQ_LEVEL 0
#define DT_N_S_pin_controller_COMPAT_MATCHES_nordic_nrf_pinctrl 1
#define DT_N_S_pin_controller_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_pin_controller_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_pin_controller_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_pin_controller_COMPAT_MODEL_IDX_0 "nrf-pinctrl"
#define DT_N_S_pin_controller_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_pin_controller_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_pin_controller_P_compatible {"nordic,nrf-pinctrl"}
#define DT_N_S_pin_controller_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_pin_controller_P_compatible_IDX_0 "nordic,nrf-pinctrl"
#define DT_N_S_pin_controller_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pinctrl
#define DT_N_S_pin_controller_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pinctrl
#define DT_N_S_pin_controller_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PINCTRL
#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller, compatible, 0)
#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller, compatible, 0)
#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller, compatible, 0, __VA_ARGS__)
#define DT_N_S_pin_controller_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller, compatible, 0, __VA_ARGS__)
#define DT_N_S_pin_controller_P_compatible_LEN 1
#define DT_N_S_pin_controller_P_compatible_EXISTS 1
#define DT_N_S_pin_controller_P_zephyr_deferred_init 0
#define DT_N_S_pin_controller_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_pin_controller_P_wakeup_source 0
#define DT_N_S_pin_controller_P_wakeup_source_EXISTS 1
#define DT_N_S_pin_controller_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_pin_controller_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /pin-controller/i2c0_default_1
 *
 * Node identifier: DT_N_S_pin_controller_S_i2c0_default_1
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_pin_controller_S_i2c0_default_1_PATH "/pin-controller/i2c0_default_1"

/* Node's name with unit-address: */
#define DT_N_S_pin_controller_S_i2c0_default_1_FULL_NAME "i2c0_default_1"
#define DT_N_S_pin_controller_S_i2c0_default_1_FULL_NAME_UNQUOTED i2c0_default_1
#define DT_N_S_pin_controller_S_i2c0_default_1_FULL_NAME_TOKEN i2c0_default_1
#define DT_N_S_pin_controller_S_i2c0_default_1_FULL_NAME_UPPER_TOKEN I2C0_DEFAULT_1

/* Node parent (/pin-controller) identifier: */
#define DT_N_S_pin_controller_S_i2c0_default_1_PARENT DT_N_S_pin_controller

/* Node's index in its parent's list of children: */
#define DT_N_S_pin_controller_S_i2c0_default_1_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_pin_controller_S_i2c0_default_1_NODELABEL_NUM 1
#define DT_N_S_pin_controller_S_i2c0_default_1_FOREACH_NODELABEL(fn) fn(i2c0_default_1)
#define DT_N_S_pin_controller_S_i2c0_default_1_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2c0_default_1, __VA_ARGS__)
#define DT_N_S_pin_controller_S_i2c0_default_1_FOREACH_ANCESTOR(fn) fn(DT_N_S_pin_controller) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_pin_controller_S_i2c0_default_1_CHILD_NUM 1
#define DT_N_S_pin_controller_S_i2c0_default_1_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_pin_controller_S_i2c0_default_1_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1)
#define DT_N_S_pin_controller_S_i2c0_default_1_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1)
#define DT_N_S_pin_controller_S_i2c0_default_1_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1, __VA_ARGS__)
#define DT_N_S_pin_controller_S_i2c0_default_1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1, __VA_ARGS__)
#define DT_N_S_pin_controller_S_i2c0_default_1_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1)
#define DT_N_S_pin_controller_S_i2c0_default_1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1)
#define DT_N_S_pin_controller_S_i2c0_default_1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1, __VA_ARGS__)
#define DT_N_S_pin_controller_S_i2c0_default_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1, __VA_ARGS__)

/* Node's hash: */
#define DT_N_S_pin_controller_S_i2c0_default_1_HASH WFcT3fnQUMaCAP9PT2_orBmPCJ7Fptbjo6ZF2D3rDm0

/* Node's dependency ordinal: */
#define DT_N_S_pin_controller_S_i2c0_default_1_ORD 21
#define DT_N_S_pin_controller_S_i2c0_default_1_ORD_STR_SORTABLE 00021

/* Ordinals for what this node depends on directly: */
#define DT_N_S_pin_controller_S_i2c0_default_1_REQUIRES_ORDS \
	20, /* /pin-controller */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_pin_controller_S_i2c0_default_1_SUPPORTS_ORDS \
	22, /* /pin-controller/i2c0_default_1/group1 */ \
	72, /* /soc/i2c@40003000 */

/* Existence and alternate IDs: */
#define DT_N_S_pin_controller_S_i2c0_default_1_EXISTS 1
#define DT_N_NODELABEL_i2c0_default_1 DT_N_S_pin_controller_S_i2c0_default_1

/* Macros for properties that are special in the specification: */
#define DT_N_S_pin_controller_S_i2c0_default_1_REG_NUM 0
#define DT_N_S_pin_controller_S_i2c0_default_1_RANGES_NUM 0
#define DT_N_S_pin_controller_S_i2c0_default_1_FOREACH_RANGE(fn) 
#define DT_N_S_pin_controller_S_i2c0_default_1_IRQ_NUM 0
#define DT_N_S_pin_controller_S_i2c0_default_1_IRQ_LEVEL 0
#define DT_N_S_pin_controller_S_i2c0_default_1_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_pin_controller_S_i2c0_default_1_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /pin-controller/i2c0_default_1/group1
 *
 * Node identifier: DT_N_S_pin_controller_S_i2c0_default_1_S_group1
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_PATH "/pin-controller/i2c0_default_1/group1"

/* Node's name with unit-address: */
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FULL_NAME "group1"
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FULL_NAME_UNQUOTED group1
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FULL_NAME_TOKEN group1
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FULL_NAME_UPPER_TOKEN GROUP1

/* Node parent (/pin-controller/i2c0_default_1) identifier: */
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_PARENT DT_N_S_pin_controller_S_i2c0_default_1

/* Node's index in its parent's list of children: */
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_NODELABEL_NUM 0
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FOREACH_NODELABEL(fn) 
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FOREACH_NODELABEL_VARGS(fn, ...) 
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FOREACH_ANCESTOR(fn) fn(DT_N_S_pin_controller_S_i2c0_default_1) fn(DT_N_S_pin_controller) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_CHILD_NUM 0
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FOREACH_CHILD(fn) 
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_HASH F1QvPMbMQJoSvSnxWriBB7fTKGjS_AytOM6_UCathas

/* Node's dependency ordinal: */
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_ORD 22
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_ORD_STR_SORTABLE 00022

/* Ordinals for what this node depends on directly: */
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_REQUIRES_ORDS \
	21, /* /pin-controller/i2c0_default_1 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_REG_NUM 0
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_RANGES_NUM 0
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_FOREACH_RANGE(fn) 
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_IRQ_NUM 0
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_IRQ_LEVEL 0
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_psels {201326594 /* 0xc000002 */, 184549404 /* 0xb00001c */}
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_psels_IDX_0_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_psels_IDX_0 201326594
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_psels_IDX_1_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_psels_IDX_1 184549404
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1, psels, 0) \
	fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1, psels, 1)
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1, psels, 1)
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1, psels, 0, __VA_ARGS__) \
	fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1, psels, 1, __VA_ARGS__)
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1, psels, 1, __VA_ARGS__)
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_psels_LEN 2
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_psels_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_nordic_drive_mode 0
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_nordic_drive_mode_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_nordic_invert 0
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_nordic_invert_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_bias_disable 0
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_bias_disable_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_bias_pull_up 0
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_bias_pull_up_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_bias_pull_down 0
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_bias_pull_down_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_low_power_enable 0
#define DT_N_S_pin_controller_S_i2c0_default_1_S_group1_P_low_power_enable_EXISTS 1

/*
 * Devicetree node: /pin-controller/i2c0_sleep_1
 *
 * Node identifier: DT_N_S_pin_controller_S_i2c0_sleep_1
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_PATH "/pin-controller/i2c0_sleep_1"

/* Node's name with unit-address: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FULL_NAME "i2c0_sleep_1"
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FULL_NAME_UNQUOTED i2c0_sleep_1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FULL_NAME_TOKEN i2c0_sleep_1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FULL_NAME_UPPER_TOKEN I2C0_SLEEP_1

/* Node parent (/pin-controller) identifier: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_PARENT DT_N_S_pin_controller

/* Node's index in its parent's list of children: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_CHILD_IDX 1

/* Helpers for dealing with node labels: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_NODELABEL_NUM 1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FOREACH_NODELABEL(fn) fn(i2c0_sleep_1)
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2c0_sleep_1, __VA_ARGS__)
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FOREACH_ANCESTOR(fn) fn(DT_N_S_pin_controller) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_CHILD_NUM 1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FOREACH_CHILD(fn) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1)
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1)
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1, __VA_ARGS__)
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1, __VA_ARGS__)
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1)
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1)
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1, __VA_ARGS__)
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1, __VA_ARGS__)

/* Node's hash: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_HASH 0sfINWtyHFZYgt8htXJih45IT4i8QJ_3iEykdm0AOVQ

/* Node's dependency ordinal: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_ORD 23
#define DT_N_S_pin_controller_S_i2c0_sleep_1_ORD_STR_SORTABLE 00023

/* Ordinals for what this node depends on directly: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_REQUIRES_ORDS \
	20, /* /pin-controller */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_SUPPORTS_ORDS \
	24, /* /pin-controller/i2c0_sleep_1/group1 */ \
	72, /* /soc/i2c@40003000 */

/* Existence and alternate IDs: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_EXISTS 1
#define DT_N_NODELABEL_i2c0_sleep_1 DT_N_S_pin_controller_S_i2c0_sleep_1

/* Macros for properties that are special in the specification: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_REG_NUM 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_RANGES_NUM 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_FOREACH_RANGE(fn) 
#define DT_N_S_pin_controller_S_i2c0_sleep_1_IRQ_NUM 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_IRQ_LEVEL 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /pin-controller/i2c0_sleep_1/group1
 *
 * Node identifier: DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_PATH "/pin-controller/i2c0_sleep_1/group1"

/* Node's name with unit-address: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FULL_NAME "group1"
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FULL_NAME_UNQUOTED group1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FULL_NAME_TOKEN group1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FULL_NAME_UPPER_TOKEN GROUP1

/* Node parent (/pin-controller/i2c0_sleep_1) identifier: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_PARENT DT_N_S_pin_controller_S_i2c0_sleep_1

/* Node's index in its parent's list of children: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_NODELABEL_NUM 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FOREACH_NODELABEL(fn) 
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FOREACH_NODELABEL_VARGS(fn, ...) 
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FOREACH_ANCESTOR(fn) fn(DT_N_S_pin_controller_S_i2c0_sleep_1) fn(DT_N_S_pin_controller) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_CHILD_NUM 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FOREACH_CHILD(fn) 
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_HASH iC_Pzlgu0_FvnQkDyRNQ2rOh6r9X45hJO0FIBzu6K_A

/* Node's dependency ordinal: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_ORD 24
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_ORD_STR_SORTABLE 00024

/* Ordinals for what this node depends on directly: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_REQUIRES_ORDS \
	23, /* /pin-controller/i2c0_sleep_1 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_REG_NUM 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_RANGES_NUM 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_FOREACH_RANGE(fn) 
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_IRQ_NUM 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_IRQ_LEVEL 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_psels {201326594 /* 0xc000002 */, 184549404 /* 0xb00001c */}
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_psels_IDX_0_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_psels_IDX_0 201326594
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_psels_IDX_1_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_psels_IDX_1 184549404
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_psels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1, psels, 0) \
	fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1, psels, 1)
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_psels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1, psels, 0) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1, psels, 1)
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_psels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1, psels, 0, __VA_ARGS__) \
	fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1, psels, 1, __VA_ARGS__)
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_psels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1, psels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1, psels, 1, __VA_ARGS__)
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_psels_LEN 2
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_psels_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_nordic_drive_mode 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_nordic_drive_mode_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_nordic_invert 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_nordic_invert_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_bias_disable 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_bias_disable_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_bias_pull_up 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_bias_pull_up_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_bias_pull_down 0
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_bias_pull_down_EXISTS 1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_low_power_enable 1
#define DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1_P_low_power_enable_EXISTS 1

/*
 * Devicetree node: /soc/bprot@40000000
 *
 * Node identifier: DT_N_S_soc_S_bprot_40000000
 *
 * Binding (compatible = nordic,nrf-bprot):
 *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-bprot.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_bprot_40000000_PATH "/soc/bprot@40000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_bprot_40000000_FULL_NAME "bprot@40000000"
#define DT_N_S_soc_S_bprot_40000000_FULL_NAME_UNQUOTED bprot@40000000
#define DT_N_S_soc_S_bprot_40000000_FULL_NAME_TOKEN bprot_40000000
#define DT_N_S_soc_S_bprot_40000000_FULL_NAME_UPPER_TOKEN BPROT_40000000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_bprot_40000000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_bprot_40000000_CHILD_IDX 7

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_bprot_40000000_NODELABEL_NUM 1
#define DT_N_S_soc_S_bprot_40000000_FOREACH_NODELABEL(fn) fn(bprot)
#define DT_N_S_soc_S_bprot_40000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(bprot, __VA_ARGS__)
#define DT_N_S_soc_S_bprot_40000000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_bprot_40000000_CHILD_NUM 0
#define DT_N_S_soc_S_bprot_40000000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_bprot_40000000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_bprot_40000000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_bprot_40000000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_bprot_40000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_bprot_40000000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_bprot_40000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_bprot_40000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_bprot_40000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_bprot_40000000_HASH euNhs6byX74p2xs4_d_YrqV6aIjutfmA3mEfP5lGACQ

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_bprot_40000000_ORD 25
#define DT_N_S_soc_S_bprot_40000000_ORD_STR_SORTABLE 00025

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_bprot_40000000_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_bprot_40000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_bprot_40000000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_bprot DT_N_S_soc_S_bprot_40000000
#define DT_N_NODELABEL_bprot         DT_N_S_soc_S_bprot_40000000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_bprot_40000000_REG_NUM 1
#define DT_N_S_soc_S_bprot_40000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_bprot_40000000_REG_IDX_0_VAL_ADDRESS 1073741824 /* 0x40000000 */
#define DT_N_S_soc_S_bprot_40000000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_bprot_40000000_RANGES_NUM 0
#define DT_N_S_soc_S_bprot_40000000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_bprot_40000000_IRQ_NUM 0
#define DT_N_S_soc_S_bprot_40000000_IRQ_LEVEL 0
#define DT_N_S_soc_S_bprot_40000000_COMPAT_MATCHES_nordic_nrf_bprot 1
#define DT_N_S_soc_S_bprot_40000000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_bprot_40000000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_bprot_40000000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_bprot_40000000_COMPAT_MODEL_IDX_0 "nrf-bprot"
#define DT_N_S_soc_S_bprot_40000000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_bprot_40000000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_bprot_40000000_P_reg {1073741824 /* 0x40000000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_bprot_40000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_bprot_40000000_P_reg_IDX_0 1073741824
#define DT_N_S_soc_S_bprot_40000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_bprot_40000000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_bprot_40000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_bprot_40000000_P_status "okay"
#define DT_N_S_soc_S_bprot_40000000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_bprot_40000000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_bprot_40000000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_bprot_40000000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_bprot_40000000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_bprot_40000000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_bprot_40000000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_bprot_40000000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_bprot_40000000, status, 0)
#define DT_N_S_soc_S_bprot_40000000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_bprot_40000000, status, 0)
#define DT_N_S_soc_S_bprot_40000000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_bprot_40000000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_bprot_40000000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_bprot_40000000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_bprot_40000000_P_status_LEN 1
#define DT_N_S_soc_S_bprot_40000000_P_status_EXISTS 1
#define DT_N_S_soc_S_bprot_40000000_P_compatible {"nordic,nrf-bprot"}
#define DT_N_S_soc_S_bprot_40000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_bprot_40000000_P_compatible_IDX_0 "nordic,nrf-bprot"
#define DT_N_S_soc_S_bprot_40000000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-bprot
#define DT_N_S_soc_S_bprot_40000000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_bprot
#define DT_N_S_soc_S_bprot_40000000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_BPROT
#define DT_N_S_soc_S_bprot_40000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_bprot_40000000, compatible, 0)
#define DT_N_S_soc_S_bprot_40000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_bprot_40000000, compatible, 0)
#define DT_N_S_soc_S_bprot_40000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_bprot_40000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_bprot_40000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_bprot_40000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_bprot_40000000_P_compatible_LEN 1
#define DT_N_S_soc_S_bprot_40000000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_bprot_40000000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_bprot_40000000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_bprot_40000000_P_wakeup_source 0
#define DT_N_S_soc_S_bprot_40000000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_bprot_40000000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_bprot_40000000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/ccm@4000f000
 *
 * Node identifier: DT_N_S_soc_S_ccm_4000f000
 *
 * Binding (compatible = nordic,nrf-ccm):
 *   $ZEPHYR_BASE/dts/bindings/crypto/nordic,nrf-ccm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_ccm_4000f000_PATH "/soc/ccm@4000f000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_ccm_4000f000_FULL_NAME "ccm@4000f000"
#define DT_N_S_soc_S_ccm_4000f000_FULL_NAME_UNQUOTED ccm@4000f000
#define DT_N_S_soc_S_ccm_4000f000_FULL_NAME_TOKEN ccm_4000f000
#define DT_N_S_soc_S_ccm_4000f000_FULL_NAME_UPPER_TOKEN CCM_4000F000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_ccm_4000f000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_ccm_4000f000_CHILD_IDX 24

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_ccm_4000f000_NODELABEL_NUM 1
#define DT_N_S_soc_S_ccm_4000f000_FOREACH_NODELABEL(fn) fn(ccm)
#define DT_N_S_soc_S_ccm_4000f000_FOREACH_NODELABEL_VARGS(fn, ...) fn(ccm, __VA_ARGS__)
#define DT_N_S_soc_S_ccm_4000f000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_ccm_4000f000_CHILD_NUM 0
#define DT_N_S_soc_S_ccm_4000f000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_ccm_4000f000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_ccm_4000f000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_ccm_4000f000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_ccm_4000f000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_ccm_4000f000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_ccm_4000f000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_ccm_4000f000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_ccm_4000f000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_ccm_4000f000_HASH Vzk9T7ZFLw2MXfn57CMWBCLzvvWpjuWMyA53U6t_A3E

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_ccm_4000f000_ORD 26
#define DT_N_S_soc_S_ccm_4000f000_ORD_STR_SORTABLE 00026

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_ccm_4000f000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_ccm_4000f000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_ccm_4000f000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_ccm DT_N_S_soc_S_ccm_4000f000
#define DT_N_NODELABEL_ccm         DT_N_S_soc_S_ccm_4000f000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_ccm_4000f000_REG_NUM 1
#define DT_N_S_soc_S_ccm_4000f000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_REG_IDX_0_VAL_ADDRESS 1073803264 /* 0x4000f000 */
#define DT_N_S_soc_S_ccm_4000f000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_ccm_4000f000_RANGES_NUM 0
#define DT_N_S_soc_S_ccm_4000f000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_ccm_4000f000_IRQ_NUM 1
#define DT_N_S_soc_S_ccm_4000f000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_IRQ_IDX_0_VAL_irq 15
#define DT_N_S_soc_S_ccm_4000f000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_ccm_4000f000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_ccm_4000f000_IRQ_LEVEL 1
#define DT_N_S_soc_S_ccm_4000f000_COMPAT_MATCHES_nordic_nrf_ccm 1
#define DT_N_S_soc_S_ccm_4000f000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_ccm_4000f000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_COMPAT_MODEL_IDX_0 "nrf-ccm"
#define DT_N_S_soc_S_ccm_4000f000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_ccm_4000f000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_ccm_4000f000_P_reg {1073803264 /* 0x4000f000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_ccm_4000f000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_P_reg_IDX_0 1073803264
#define DT_N_S_soc_S_ccm_4000f000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_ccm_4000f000_P_reg_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_P_interrupts {15 /* 0xf */, 1 /* 0x1 */}
#define DT_N_S_soc_S_ccm_4000f000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_P_interrupts_IDX_0 15
#define DT_N_S_soc_S_ccm_4000f000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_ccm_4000f000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_P_length_field_length_8_bits 1
#define DT_N_S_soc_S_ccm_4000f000_P_length_field_length_8_bits_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_P_headermask_supported 0
#define DT_N_S_soc_S_ccm_4000f000_P_headermask_supported_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_P_status "okay"
#define DT_N_S_soc_S_ccm_4000f000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_ccm_4000f000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_ccm_4000f000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ccm_4000f000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_ccm_4000f000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_ccm_4000f000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ccm_4000f000, status, 0)
#define DT_N_S_soc_S_ccm_4000f000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ccm_4000f000, status, 0)
#define DT_N_S_soc_S_ccm_4000f000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ccm_4000f000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ccm_4000f000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ccm_4000f000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ccm_4000f000_P_status_LEN 1
#define DT_N_S_soc_S_ccm_4000f000_P_status_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_P_compatible {"nordic,nrf-ccm"}
#define DT_N_S_soc_S_ccm_4000f000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_P_compatible_IDX_0 "nordic,nrf-ccm"
#define DT_N_S_soc_S_ccm_4000f000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-ccm
#define DT_N_S_soc_S_ccm_4000f000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_ccm
#define DT_N_S_soc_S_ccm_4000f000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_CCM
#define DT_N_S_soc_S_ccm_4000f000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ccm_4000f000, compatible, 0)
#define DT_N_S_soc_S_ccm_4000f000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ccm_4000f000, compatible, 0)
#define DT_N_S_soc_S_ccm_4000f000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ccm_4000f000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ccm_4000f000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ccm_4000f000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ccm_4000f000_P_compatible_LEN 1
#define DT_N_S_soc_S_ccm_4000f000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_ccm_4000f000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_P_wakeup_source 0
#define DT_N_S_soc_S_ccm_4000f000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_ccm_4000f000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_ccm_4000f000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/clock@40000000
 *
 * Node identifier: DT_N_S_soc_S_clock_40000000
 *
 * Binding (compatible = nordic,nrf-clock):
 *   $ZEPHYR_BASE/dts/bindings/clock/nordic,nrf-clock.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_clock_40000000_PATH "/soc/clock@40000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_clock_40000000_FULL_NAME "clock@40000000"
#define DT_N_S_soc_S_clock_40000000_FULL_NAME_UNQUOTED clock@40000000
#define DT_N_S_soc_S_clock_40000000_FULL_NAME_TOKEN clock_40000000
#define DT_N_S_soc_S_clock_40000000_FULL_NAME_UPPER_TOKEN CLOCK_40000000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_clock_40000000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_clock_40000000_CHILD_IDX 5

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_clock_40000000_NODELABEL_NUM 1
#define DT_N_S_soc_S_clock_40000000_FOREACH_NODELABEL(fn) fn(clock)
#define DT_N_S_soc_S_clock_40000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(clock, __VA_ARGS__)
#define DT_N_S_soc_S_clock_40000000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_clock_40000000_CHILD_NUM 0
#define DT_N_S_soc_S_clock_40000000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_clock_40000000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_clock_40000000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_clock_40000000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_clock_40000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_clock_40000000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_clock_40000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_clock_40000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_clock_40000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_clock_40000000_HASH FtzHLpvIlIqbTh_VAtsOUvV6tZ5OnWg6O_NoQQAIirw

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_clock_40000000_ORD 27
#define DT_N_S_soc_S_clock_40000000_ORD_STR_SORTABLE 00027

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_clock_40000000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_clock_40000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_clock_40000000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_clock DT_N_S_soc_S_clock_40000000
#define DT_N_NODELABEL_clock         DT_N_S_soc_S_clock_40000000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_clock_40000000_REG_NUM 1
#define DT_N_S_soc_S_clock_40000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_REG_IDX_0_VAL_ADDRESS 1073741824 /* 0x40000000 */
#define DT_N_S_soc_S_clock_40000000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_clock_40000000_RANGES_NUM 0
#define DT_N_S_soc_S_clock_40000000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_clock_40000000_IRQ_NUM 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_irq 0
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_clock_40000000_IRQ_LEVEL 1
#define DT_N_S_soc_S_clock_40000000_COMPAT_MATCHES_nordic_nrf_clock 1
#define DT_N_S_soc_S_clock_40000000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_clock_40000000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_COMPAT_MODEL_IDX_0 "nrf-clock"
#define DT_N_S_soc_S_clock_40000000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_clock_40000000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_clock_40000000_P_reg {1073741824 /* 0x40000000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_0 1073741824
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_clock_40000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts {0 /* 0x0 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_0 0
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_status "okay"
#define DT_N_S_soc_S_clock_40000000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_clock_40000000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_clock_40000000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_clock_40000000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_clock_40000000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_clock_40000000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_clock_40000000, status, 0)
#define DT_N_S_soc_S_clock_40000000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_clock_40000000, status, 0)
#define DT_N_S_soc_S_clock_40000000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_clock_40000000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_clock_40000000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_clock_40000000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_clock_40000000_P_status_LEN 1
#define DT_N_S_soc_S_clock_40000000_P_status_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_compatible {"nordic,nrf-clock"}
#define DT_N_S_soc_S_clock_40000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_compatible_IDX_0 "nordic,nrf-clock"
#define DT_N_S_soc_S_clock_40000000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-clock
#define DT_N_S_soc_S_clock_40000000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_clock
#define DT_N_S_soc_S_clock_40000000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_CLOCK
#define DT_N_S_soc_S_clock_40000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_clock_40000000, compatible, 0)
#define DT_N_S_soc_S_clock_40000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_clock_40000000, compatible, 0)
#define DT_N_S_soc_S_clock_40000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_clock_40000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_clock_40000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_clock_40000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_clock_40000000_P_compatible_LEN 1
#define DT_N_S_soc_S_clock_40000000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_clock_40000000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_wakeup_source 0
#define DT_N_S_soc_S_clock_40000000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_clock_40000000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/comparator@40013000
 *
 * Node identifier: DT_N_S_soc_S_comparator_40013000
 *
 * Binding (compatible = nordic,nrf-comp):
 *   $ZEPHYR_BASE/dts/bindings/comparator/nordic,nrf-comp.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_comparator_40013000_PATH "/soc/comparator@40013000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_comparator_40013000_FULL_NAME "comparator@40013000"
#define DT_N_S_soc_S_comparator_40013000_FULL_NAME_UNQUOTED comparator@40013000
#define DT_N_S_soc_S_comparator_40013000_FULL_NAME_TOKEN comparator_40013000
#define DT_N_S_soc_S_comparator_40013000_FULL_NAME_UPPER_TOKEN COMPARATOR_40013000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_comparator_40013000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_comparator_40013000_CHILD_IDX 28

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_comparator_40013000_NODELABEL_NUM 1
#define DT_N_S_soc_S_comparator_40013000_FOREACH_NODELABEL(fn) fn(comp)
#define DT_N_S_soc_S_comparator_40013000_FOREACH_NODELABEL_VARGS(fn, ...) fn(comp, __VA_ARGS__)
#define DT_N_S_soc_S_comparator_40013000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_comparator_40013000_CHILD_NUM 0
#define DT_N_S_soc_S_comparator_40013000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_comparator_40013000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_comparator_40013000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_comparator_40013000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_comparator_40013000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_comparator_40013000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_comparator_40013000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_comparator_40013000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_comparator_40013000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_comparator_40013000_HASH QKRd3UKZRPhKcK_wBdoTlOrkaiF7AsHHjXPougEqA4U

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_comparator_40013000_ORD 28
#define DT_N_S_soc_S_comparator_40013000_ORD_STR_SORTABLE 00028

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_comparator_40013000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_comparator_40013000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_comparator_40013000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_comp DT_N_S_soc_S_comparator_40013000
#define DT_N_NODELABEL_comp         DT_N_S_soc_S_comparator_40013000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_comparator_40013000_REG_NUM 1
#define DT_N_S_soc_S_comparator_40013000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_REG_IDX_0_VAL_ADDRESS 1073819648 /* 0x40013000 */
#define DT_N_S_soc_S_comparator_40013000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_comparator_40013000_RANGES_NUM 0
#define DT_N_S_soc_S_comparator_40013000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_comparator_40013000_IRQ_NUM 1
#define DT_N_S_soc_S_comparator_40013000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_IRQ_IDX_0_VAL_irq 19
#define DT_N_S_soc_S_comparator_40013000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_comparator_40013000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_comparator_40013000_IRQ_LEVEL 1
#define DT_N_S_soc_S_comparator_40013000_COMPAT_MATCHES_nordic_nrf_comp 1
#define DT_N_S_soc_S_comparator_40013000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_comparator_40013000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_COMPAT_MODEL_IDX_0 "nrf-comp"
#define DT_N_S_soc_S_comparator_40013000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_comparator_40013000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_comparator_40013000_P_enable_hyst 0
#define DT_N_S_soc_S_comparator_40013000_P_enable_hyst_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_P_status "disabled"
#define DT_N_S_soc_S_comparator_40013000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_comparator_40013000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_comparator_40013000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_comparator_40013000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_comparator_40013000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_comparator_40013000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_comparator_40013000, status, 0)
#define DT_N_S_soc_S_comparator_40013000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40013000, status, 0)
#define DT_N_S_soc_S_comparator_40013000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40013000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_comparator_40013000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40013000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_comparator_40013000_P_status_LEN 1
#define DT_N_S_soc_S_comparator_40013000_P_status_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_P_compatible {"nordic,nrf-comp"}
#define DT_N_S_soc_S_comparator_40013000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_P_compatible_IDX_0 "nordic,nrf-comp"
#define DT_N_S_soc_S_comparator_40013000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-comp
#define DT_N_S_soc_S_comparator_40013000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_comp
#define DT_N_S_soc_S_comparator_40013000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_COMP
#define DT_N_S_soc_S_comparator_40013000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_comparator_40013000, compatible, 0)
#define DT_N_S_soc_S_comparator_40013000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_comparator_40013000, compatible, 0)
#define DT_N_S_soc_S_comparator_40013000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_comparator_40013000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_comparator_40013000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_comparator_40013000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_comparator_40013000_P_compatible_LEN 1
#define DT_N_S_soc_S_comparator_40013000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_P_reg {1073819648 /* 0x40013000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_comparator_40013000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_P_reg_IDX_0 1073819648
#define DT_N_S_soc_S_comparator_40013000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_comparator_40013000_P_reg_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_P_interrupts {19 /* 0x13 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_comparator_40013000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_P_interrupts_IDX_0 19
#define DT_N_S_soc_S_comparator_40013000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_comparator_40013000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_comparator_40013000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_P_wakeup_source 0
#define DT_N_S_soc_S_comparator_40013000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_comparator_40013000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_comparator_40013000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/ecb@4000e000
 *
 * Node identifier: DT_N_S_soc_S_ecb_4000e000
 *
 * Binding (compatible = nordic,nrf-ecb):
 *   $ZEPHYR_BASE/dts/bindings/crypto/nordic,nrf-ecb.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_ecb_4000e000_PATH "/soc/ecb@4000e000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_ecb_4000e000_FULL_NAME "ecb@4000e000"
#define DT_N_S_soc_S_ecb_4000e000_FULL_NAME_UNQUOTED ecb@4000e000
#define DT_N_S_soc_S_ecb_4000e000_FULL_NAME_TOKEN ecb_4000e000
#define DT_N_S_soc_S_ecb_4000e000_FULL_NAME_UPPER_TOKEN ECB_4000E000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_ecb_4000e000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_ecb_4000e000_CHILD_IDX 23

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_ecb_4000e000_NODELABEL_NUM 1
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_NODELABEL(fn) fn(ecb)
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_NODELABEL_VARGS(fn, ...) fn(ecb, __VA_ARGS__)
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_ecb_4000e000_CHILD_NUM 0
#define DT_N_S_soc_S_ecb_4000e000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_ecb_4000e000_HASH xqVkwa7kgG6PDi6YaZsGPdpNqP3KZHbhIoSe48AwlEA

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_ecb_4000e000_ORD 29
#define DT_N_S_soc_S_ecb_4000e000_ORD_STR_SORTABLE 00029

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_ecb_4000e000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_ecb_4000e000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_ecb_4000e000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_ecb DT_N_S_soc_S_ecb_4000e000
#define DT_N_NODELABEL_ecb         DT_N_S_soc_S_ecb_4000e000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_ecb_4000e000_REG_NUM 1
#define DT_N_S_soc_S_ecb_4000e000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_REG_IDX_0_VAL_ADDRESS 1073799168 /* 0x4000e000 */
#define DT_N_S_soc_S_ecb_4000e000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_ecb_4000e000_RANGES_NUM 0
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_ecb_4000e000_IRQ_NUM 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_irq 14
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_ecb_4000e000_IRQ_LEVEL 1
#define DT_N_S_soc_S_ecb_4000e000_COMPAT_MATCHES_nordic_nrf_ecb 1
#define DT_N_S_soc_S_ecb_4000e000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_ecb_4000e000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_COMPAT_MODEL_IDX_0 "nrf-ecb"
#define DT_N_S_soc_S_ecb_4000e000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_ecb_4000e000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_ecb_4000e000_P_reg {1073799168 /* 0x4000e000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_0 1073799168
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_ecb_4000e000_P_reg_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts {14 /* 0xe */, 1 /* 0x1 */}
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_0 14
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_status "okay"
#define DT_N_S_soc_S_ecb_4000e000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_ecb_4000e000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_ecb_4000e000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ecb_4000e000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_ecb_4000e000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_ecb_4000e000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ecb_4000e000, status, 0)
#define DT_N_S_soc_S_ecb_4000e000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ecb_4000e000, status, 0)
#define DT_N_S_soc_S_ecb_4000e000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ecb_4000e000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ecb_4000e000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ecb_4000e000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ecb_4000e000_P_status_LEN 1
#define DT_N_S_soc_S_ecb_4000e000_P_status_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_compatible {"nordic,nrf-ecb"}
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_IDX_0 "nordic,nrf-ecb"
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-ecb
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_ecb
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_ECB
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ecb_4000e000, compatible, 0)
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ecb_4000e000, compatible, 0)
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ecb_4000e000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ecb_4000e000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_LEN 1
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_ecb_4000e000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_wakeup_source 0
#define DT_N_S_soc_S_ecb_4000e000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_ecb_4000e000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/egu@40014000
 *
 * Node identifier: DT_N_S_soc_S_egu_40014000
 *
 * Binding (compatible = nordic,nrf-egu):
 *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_egu_40014000_PATH "/soc/egu@40014000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_egu_40014000_FULL_NAME "egu@40014000"
#define DT_N_S_soc_S_egu_40014000_FULL_NAME_UNQUOTED egu@40014000
#define DT_N_S_soc_S_egu_40014000_FULL_NAME_TOKEN egu_40014000
#define DT_N_S_soc_S_egu_40014000_FULL_NAME_UPPER_TOKEN EGU_40014000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_egu_40014000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_egu_40014000_CHILD_IDX 29

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_egu_40014000_NODELABEL_NUM 2
#define DT_N_S_soc_S_egu_40014000_FOREACH_NODELABEL(fn) fn(egu0) fn(swi0)
#define DT_N_S_soc_S_egu_40014000_FOREACH_NODELABEL_VARGS(fn, ...) fn(egu0, __VA_ARGS__) fn(swi0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40014000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_egu_40014000_CHILD_NUM 0
#define DT_N_S_soc_S_egu_40014000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_egu_40014000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_egu_40014000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_egu_40014000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_40014000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_egu_40014000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_egu_40014000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_egu_40014000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_40014000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_egu_40014000_HASH 8JnAL23NeK__MmQq5wuuE3nVUXkt3w4TGIDbEq8ozak

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_egu_40014000_ORD 30
#define DT_N_S_soc_S_egu_40014000_ORD_STR_SORTABLE 00030

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_egu_40014000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_egu_40014000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_egu_40014000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_egu DT_N_S_soc_S_egu_40014000
#define DT_N_INST_0_nordic_nrf_swi DT_N_S_soc_S_egu_40014000
#define DT_N_NODELABEL_egu0        DT_N_S_soc_S_egu_40014000
#define DT_N_NODELABEL_swi0        DT_N_S_soc_S_egu_40014000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_egu_40014000_REG_NUM 1
#define DT_N_S_soc_S_egu_40014000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_REG_IDX_0_VAL_ADDRESS 1073823744 /* 0x40014000 */
#define DT_N_S_soc_S_egu_40014000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_egu_40014000_RANGES_NUM 0
#define DT_N_S_soc_S_egu_40014000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_egu_40014000_IRQ_NUM 1
#define DT_N_S_soc_S_egu_40014000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_IRQ_IDX_0_VAL_irq 20
#define DT_N_S_soc_S_egu_40014000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_egu_40014000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_egu_40014000_IRQ_LEVEL 1
#define DT_N_S_soc_S_egu_40014000_COMPAT_MATCHES_nordic_nrf_egu 1
#define DT_N_S_soc_S_egu_40014000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_egu_40014000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_COMPAT_MODEL_IDX_0 "nrf-egu"
#define DT_N_S_soc_S_egu_40014000_COMPAT_MATCHES_nordic_nrf_swi 1
#define DT_N_S_soc_S_egu_40014000_COMPAT_VENDOR_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_COMPAT_VENDOR_IDX_1 "Nordic Semiconductor"
#define DT_N_S_soc_S_egu_40014000_COMPAT_MODEL_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_COMPAT_MODEL_IDX_1 "nrf-swi"
#define DT_N_S_soc_S_egu_40014000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_egu_40014000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_egu_40014000_P_reg {1073823744 /* 0x40014000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_egu_40014000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_reg_IDX_0 1073823744
#define DT_N_S_soc_S_egu_40014000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_egu_40014000_P_reg_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_interrupts {20 /* 0x14 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_egu_40014000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_interrupts_IDX_0 20
#define DT_N_S_soc_S_egu_40014000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_egu_40014000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_status "okay"
#define DT_N_S_soc_S_egu_40014000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_egu_40014000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_egu_40014000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_egu_40014000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_egu_40014000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_egu_40014000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40014000, status, 0)
#define DT_N_S_soc_S_egu_40014000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_egu_40014000, status, 0)
#define DT_N_S_soc_S_egu_40014000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40014000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40014000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_egu_40014000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40014000_P_status_LEN 1
#define DT_N_S_soc_S_egu_40014000_P_status_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_compatible {"nordic,nrf-egu", "nordic,nrf-swi"}
#define DT_N_S_soc_S_egu_40014000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_compatible_IDX_0 "nordic,nrf-egu"
#define DT_N_S_soc_S_egu_40014000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu
#define DT_N_S_soc_S_egu_40014000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu
#define DT_N_S_soc_S_egu_40014000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU
#define DT_N_S_soc_S_egu_40014000_P_compatible_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_compatible_IDX_1 "nordic,nrf-swi"
#define DT_N_S_soc_S_egu_40014000_P_compatible_IDX_1_STRING_UNQUOTED nordic,nrf-swi
#define DT_N_S_soc_S_egu_40014000_P_compatible_IDX_1_STRING_TOKEN nordic_nrf_swi
#define DT_N_S_soc_S_egu_40014000_P_compatible_IDX_1_STRING_UPPER_TOKEN NORDIC_NRF_SWI
#define DT_N_S_soc_S_egu_40014000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40014000, compatible, 0) \
	fn(DT_N_S_soc_S_egu_40014000, compatible, 1)
#define DT_N_S_soc_S_egu_40014000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_egu_40014000, compatible, 0) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_egu_40014000, compatible, 1)
#define DT_N_S_soc_S_egu_40014000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40014000, compatible, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40014000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40014000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_egu_40014000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_egu_40014000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40014000_P_compatible_LEN 2
#define DT_N_S_soc_S_egu_40014000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_egu_40014000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_wakeup_source 0
#define DT_N_S_soc_S_egu_40014000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_egu_40014000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_egu_40014000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/egu@40015000
 *
 * Node identifier: DT_N_S_soc_S_egu_40015000
 *
 * Binding (compatible = nordic,nrf-egu):
 *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_egu_40015000_PATH "/soc/egu@40015000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_egu_40015000_FULL_NAME "egu@40015000"
#define DT_N_S_soc_S_egu_40015000_FULL_NAME_UNQUOTED egu@40015000
#define DT_N_S_soc_S_egu_40015000_FULL_NAME_TOKEN egu_40015000
#define DT_N_S_soc_S_egu_40015000_FULL_NAME_UPPER_TOKEN EGU_40015000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_egu_40015000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_egu_40015000_CHILD_IDX 30

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_egu_40015000_NODELABEL_NUM 2
#define DT_N_S_soc_S_egu_40015000_FOREACH_NODELABEL(fn) fn(egu1) fn(swi1)
#define DT_N_S_soc_S_egu_40015000_FOREACH_NODELABEL_VARGS(fn, ...) fn(egu1, __VA_ARGS__) fn(swi1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40015000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_egu_40015000_CHILD_NUM 0
#define DT_N_S_soc_S_egu_40015000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_egu_40015000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_egu_40015000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_egu_40015000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_40015000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_egu_40015000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_egu_40015000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_egu_40015000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_40015000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_egu_40015000_HASH CrLVDn2RM1XQqrUwJKYHv1izpsIqmdrAnZq6NGYyd7I

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_egu_40015000_ORD 31
#define DT_N_S_soc_S_egu_40015000_ORD_STR_SORTABLE 00031

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_egu_40015000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_egu_40015000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_egu_40015000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_egu DT_N_S_soc_S_egu_40015000
#define DT_N_INST_1_nordic_nrf_swi DT_N_S_soc_S_egu_40015000
#define DT_N_NODELABEL_egu1        DT_N_S_soc_S_egu_40015000
#define DT_N_NODELABEL_swi1        DT_N_S_soc_S_egu_40015000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_egu_40015000_REG_NUM 1
#define DT_N_S_soc_S_egu_40015000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_REG_IDX_0_VAL_ADDRESS 1073827840 /* 0x40015000 */
#define DT_N_S_soc_S_egu_40015000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_egu_40015000_RANGES_NUM 0
#define DT_N_S_soc_S_egu_40015000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_egu_40015000_IRQ_NUM 1
#define DT_N_S_soc_S_egu_40015000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_IRQ_IDX_0_VAL_irq 21
#define DT_N_S_soc_S_egu_40015000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_egu_40015000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_egu_40015000_IRQ_LEVEL 1
#define DT_N_S_soc_S_egu_40015000_COMPAT_MATCHES_nordic_nrf_egu 1
#define DT_N_S_soc_S_egu_40015000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_egu_40015000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_COMPAT_MODEL_IDX_0 "nrf-egu"
#define DT_N_S_soc_S_egu_40015000_COMPAT_MATCHES_nordic_nrf_swi 1
#define DT_N_S_soc_S_egu_40015000_COMPAT_VENDOR_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_COMPAT_VENDOR_IDX_1 "Nordic Semiconductor"
#define DT_N_S_soc_S_egu_40015000_COMPAT_MODEL_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_COMPAT_MODEL_IDX_1 "nrf-swi"
#define DT_N_S_soc_S_egu_40015000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_egu_40015000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_egu_40015000_P_reg {1073827840 /* 0x40015000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_egu_40015000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_reg_IDX_0 1073827840
#define DT_N_S_soc_S_egu_40015000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_egu_40015000_P_reg_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_interrupts {21 /* 0x15 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_egu_40015000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_interrupts_IDX_0 21
#define DT_N_S_soc_S_egu_40015000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_egu_40015000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_status "okay"
#define DT_N_S_soc_S_egu_40015000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_egu_40015000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_egu_40015000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_egu_40015000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_egu_40015000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_egu_40015000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40015000, status, 0)
#define DT_N_S_soc_S_egu_40015000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_egu_40015000, status, 0)
#define DT_N_S_soc_S_egu_40015000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40015000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40015000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_egu_40015000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40015000_P_status_LEN 1
#define DT_N_S_soc_S_egu_40015000_P_status_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_compatible {"nordic,nrf-egu", "nordic,nrf-swi"}
#define DT_N_S_soc_S_egu_40015000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_compatible_IDX_0 "nordic,nrf-egu"
#define DT_N_S_soc_S_egu_40015000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu
#define DT_N_S_soc_S_egu_40015000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu
#define DT_N_S_soc_S_egu_40015000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU
#define DT_N_S_soc_S_egu_40015000_P_compatible_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_compatible_IDX_1 "nordic,nrf-swi"
#define DT_N_S_soc_S_egu_40015000_P_compatible_IDX_1_STRING_UNQUOTED nordic,nrf-swi
#define DT_N_S_soc_S_egu_40015000_P_compatible_IDX_1_STRING_TOKEN nordic_nrf_swi
#define DT_N_S_soc_S_egu_40015000_P_compatible_IDX_1_STRING_UPPER_TOKEN NORDIC_NRF_SWI
#define DT_N_S_soc_S_egu_40015000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40015000, compatible, 0) \
	fn(DT_N_S_soc_S_egu_40015000, compatible, 1)
#define DT_N_S_soc_S_egu_40015000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_egu_40015000, compatible, 0) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_egu_40015000, compatible, 1)
#define DT_N_S_soc_S_egu_40015000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40015000, compatible, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40015000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40015000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_egu_40015000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_egu_40015000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40015000_P_compatible_LEN 2
#define DT_N_S_soc_S_egu_40015000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_egu_40015000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_wakeup_source 0
#define DT_N_S_soc_S_egu_40015000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_egu_40015000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_egu_40015000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/egu@40016000
 *
 * Node identifier: DT_N_S_soc_S_egu_40016000
 *
 * Binding (compatible = nordic,nrf-egu):
 *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_egu_40016000_PATH "/soc/egu@40016000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_egu_40016000_FULL_NAME "egu@40016000"
#define DT_N_S_soc_S_egu_40016000_FULL_NAME_UNQUOTED egu@40016000
#define DT_N_S_soc_S_egu_40016000_FULL_NAME_TOKEN egu_40016000
#define DT_N_S_soc_S_egu_40016000_FULL_NAME_UPPER_TOKEN EGU_40016000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_egu_40016000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_egu_40016000_CHILD_IDX 31

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_egu_40016000_NODELABEL_NUM 2
#define DT_N_S_soc_S_egu_40016000_FOREACH_NODELABEL(fn) fn(egu2) fn(swi2)
#define DT_N_S_soc_S_egu_40016000_FOREACH_NODELABEL_VARGS(fn, ...) fn(egu2, __VA_ARGS__) fn(swi2, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40016000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_egu_40016000_CHILD_NUM 0
#define DT_N_S_soc_S_egu_40016000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_egu_40016000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_egu_40016000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_egu_40016000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_40016000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_egu_40016000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_egu_40016000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_egu_40016000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_40016000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_egu_40016000_HASH _ZuarMQLwSEhvK6MjL9e0BFF0XosIArtttXkrOyzNbc

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_egu_40016000_ORD 32
#define DT_N_S_soc_S_egu_40016000_ORD_STR_SORTABLE 00032

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_egu_40016000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_egu_40016000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_egu_40016000_EXISTS 1
#define DT_N_INST_2_nordic_nrf_egu DT_N_S_soc_S_egu_40016000
#define DT_N_INST_2_nordic_nrf_swi DT_N_S_soc_S_egu_40016000
#define DT_N_NODELABEL_egu2        DT_N_S_soc_S_egu_40016000
#define DT_N_NODELABEL_swi2        DT_N_S_soc_S_egu_40016000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_egu_40016000_REG_NUM 1
#define DT_N_S_soc_S_egu_40016000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_REG_IDX_0_VAL_ADDRESS 1073831936 /* 0x40016000 */
#define DT_N_S_soc_S_egu_40016000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_egu_40016000_RANGES_NUM 0
#define DT_N_S_soc_S_egu_40016000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_egu_40016000_IRQ_NUM 1
#define DT_N_S_soc_S_egu_40016000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_IRQ_IDX_0_VAL_irq 22
#define DT_N_S_soc_S_egu_40016000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_egu_40016000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_egu_40016000_IRQ_LEVEL 1
#define DT_N_S_soc_S_egu_40016000_COMPAT_MATCHES_nordic_nrf_egu 1
#define DT_N_S_soc_S_egu_40016000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_egu_40016000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_COMPAT_MODEL_IDX_0 "nrf-egu"
#define DT_N_S_soc_S_egu_40016000_COMPAT_MATCHES_nordic_nrf_swi 1
#define DT_N_S_soc_S_egu_40016000_COMPAT_VENDOR_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_COMPAT_VENDOR_IDX_1 "Nordic Semiconductor"
#define DT_N_S_soc_S_egu_40016000_COMPAT_MODEL_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_COMPAT_MODEL_IDX_1 "nrf-swi"
#define DT_N_S_soc_S_egu_40016000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_egu_40016000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_egu_40016000_P_reg {1073831936 /* 0x40016000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_egu_40016000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_P_reg_IDX_0 1073831936
#define DT_N_S_soc_S_egu_40016000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_egu_40016000_P_reg_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_P_interrupts {22 /* 0x16 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_egu_40016000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_P_interrupts_IDX_0 22
#define DT_N_S_soc_S_egu_40016000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_egu_40016000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_P_status "okay"
#define DT_N_S_soc_S_egu_40016000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_egu_40016000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_egu_40016000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_egu_40016000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_egu_40016000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_egu_40016000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40016000, status, 0)
#define DT_N_S_soc_S_egu_40016000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_egu_40016000, status, 0)
#define DT_N_S_soc_S_egu_40016000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40016000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40016000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_egu_40016000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40016000_P_status_LEN 1
#define DT_N_S_soc_S_egu_40016000_P_status_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_P_compatible {"nordic,nrf-egu", "nordic,nrf-swi"}
#define DT_N_S_soc_S_egu_40016000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_P_compatible_IDX_0 "nordic,nrf-egu"
#define DT_N_S_soc_S_egu_40016000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu
#define DT_N_S_soc_S_egu_40016000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu
#define DT_N_S_soc_S_egu_40016000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU
#define DT_N_S_soc_S_egu_40016000_P_compatible_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_P_compatible_IDX_1 "nordic,nrf-swi"
#define DT_N_S_soc_S_egu_40016000_P_compatible_IDX_1_STRING_UNQUOTED nordic,nrf-swi
#define DT_N_S_soc_S_egu_40016000_P_compatible_IDX_1_STRING_TOKEN nordic_nrf_swi
#define DT_N_S_soc_S_egu_40016000_P_compatible_IDX_1_STRING_UPPER_TOKEN NORDIC_NRF_SWI
#define DT_N_S_soc_S_egu_40016000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40016000, compatible, 0) \
	fn(DT_N_S_soc_S_egu_40016000, compatible, 1)
#define DT_N_S_soc_S_egu_40016000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_egu_40016000, compatible, 0) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_egu_40016000, compatible, 1)
#define DT_N_S_soc_S_egu_40016000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40016000, compatible, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40016000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40016000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_egu_40016000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_egu_40016000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40016000_P_compatible_LEN 2
#define DT_N_S_soc_S_egu_40016000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_egu_40016000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_P_wakeup_source 0
#define DT_N_S_soc_S_egu_40016000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_egu_40016000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_egu_40016000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/egu@40017000
 *
 * Node identifier: DT_N_S_soc_S_egu_40017000
 *
 * Binding (compatible = nordic,nrf-egu):
 *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_egu_40017000_PATH "/soc/egu@40017000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_egu_40017000_FULL_NAME "egu@40017000"
#define DT_N_S_soc_S_egu_40017000_FULL_NAME_UNQUOTED egu@40017000
#define DT_N_S_soc_S_egu_40017000_FULL_NAME_TOKEN egu_40017000
#define DT_N_S_soc_S_egu_40017000_FULL_NAME_UPPER_TOKEN EGU_40017000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_egu_40017000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_egu_40017000_CHILD_IDX 32

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_egu_40017000_NODELABEL_NUM 2
#define DT_N_S_soc_S_egu_40017000_FOREACH_NODELABEL(fn) fn(egu3) fn(swi3)
#define DT_N_S_soc_S_egu_40017000_FOREACH_NODELABEL_VARGS(fn, ...) fn(egu3, __VA_ARGS__) fn(swi3, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40017000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_egu_40017000_CHILD_NUM 0
#define DT_N_S_soc_S_egu_40017000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_egu_40017000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_egu_40017000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_egu_40017000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_40017000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_egu_40017000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_egu_40017000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_egu_40017000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_40017000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_egu_40017000_HASH _wYJC_iDIOQYxOhDlhYQ6jA0tklgkm0yJ3RlYehdYxI

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_egu_40017000_ORD 33
#define DT_N_S_soc_S_egu_40017000_ORD_STR_SORTABLE 00033

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_egu_40017000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_egu_40017000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_egu_40017000_EXISTS 1
#define DT_N_INST_3_nordic_nrf_egu DT_N_S_soc_S_egu_40017000
#define DT_N_INST_3_nordic_nrf_swi DT_N_S_soc_S_egu_40017000
#define DT_N_NODELABEL_egu3        DT_N_S_soc_S_egu_40017000
#define DT_N_NODELABEL_swi3        DT_N_S_soc_S_egu_40017000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_egu_40017000_REG_NUM 1
#define DT_N_S_soc_S_egu_40017000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_REG_IDX_0_VAL_ADDRESS 1073836032 /* 0x40017000 */
#define DT_N_S_soc_S_egu_40017000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_egu_40017000_RANGES_NUM 0
#define DT_N_S_soc_S_egu_40017000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_egu_40017000_IRQ_NUM 1
#define DT_N_S_soc_S_egu_40017000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_IRQ_IDX_0_VAL_irq 23
#define DT_N_S_soc_S_egu_40017000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_egu_40017000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_egu_40017000_IRQ_LEVEL 1
#define DT_N_S_soc_S_egu_40017000_COMPAT_MATCHES_nordic_nrf_egu 1
#define DT_N_S_soc_S_egu_40017000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_egu_40017000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_COMPAT_MODEL_IDX_0 "nrf-egu"
#define DT_N_S_soc_S_egu_40017000_COMPAT_MATCHES_nordic_nrf_swi 1
#define DT_N_S_soc_S_egu_40017000_COMPAT_VENDOR_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_COMPAT_VENDOR_IDX_1 "Nordic Semiconductor"
#define DT_N_S_soc_S_egu_40017000_COMPAT_MODEL_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_COMPAT_MODEL_IDX_1 "nrf-swi"
#define DT_N_S_soc_S_egu_40017000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_egu_40017000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_egu_40017000_P_reg {1073836032 /* 0x40017000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_egu_40017000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_P_reg_IDX_0 1073836032
#define DT_N_S_soc_S_egu_40017000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_egu_40017000_P_reg_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_P_interrupts {23 /* 0x17 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_egu_40017000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_P_interrupts_IDX_0 23
#define DT_N_S_soc_S_egu_40017000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_egu_40017000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_P_status "okay"
#define DT_N_S_soc_S_egu_40017000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_egu_40017000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_egu_40017000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_egu_40017000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_egu_40017000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_egu_40017000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40017000, status, 0)
#define DT_N_S_soc_S_egu_40017000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_egu_40017000, status, 0)
#define DT_N_S_soc_S_egu_40017000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40017000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40017000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_egu_40017000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40017000_P_status_LEN 1
#define DT_N_S_soc_S_egu_40017000_P_status_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_P_compatible {"nordic,nrf-egu", "nordic,nrf-swi"}
#define DT_N_S_soc_S_egu_40017000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_P_compatible_IDX_0 "nordic,nrf-egu"
#define DT_N_S_soc_S_egu_40017000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu
#define DT_N_S_soc_S_egu_40017000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu
#define DT_N_S_soc_S_egu_40017000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU
#define DT_N_S_soc_S_egu_40017000_P_compatible_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_P_compatible_IDX_1 "nordic,nrf-swi"
#define DT_N_S_soc_S_egu_40017000_P_compatible_IDX_1_STRING_UNQUOTED nordic,nrf-swi
#define DT_N_S_soc_S_egu_40017000_P_compatible_IDX_1_STRING_TOKEN nordic_nrf_swi
#define DT_N_S_soc_S_egu_40017000_P_compatible_IDX_1_STRING_UPPER_TOKEN NORDIC_NRF_SWI
#define DT_N_S_soc_S_egu_40017000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40017000, compatible, 0) \
	fn(DT_N_S_soc_S_egu_40017000, compatible, 1)
#define DT_N_S_soc_S_egu_40017000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_egu_40017000, compatible, 0) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_egu_40017000, compatible, 1)
#define DT_N_S_soc_S_egu_40017000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40017000, compatible, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40017000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40017000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_egu_40017000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_egu_40017000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40017000_P_compatible_LEN 2
#define DT_N_S_soc_S_egu_40017000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_egu_40017000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_P_wakeup_source 0
#define DT_N_S_soc_S_egu_40017000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_egu_40017000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_egu_40017000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/egu@40018000
 *
 * Node identifier: DT_N_S_soc_S_egu_40018000
 *
 * Binding (compatible = nordic,nrf-egu):
 *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_egu_40018000_PATH "/soc/egu@40018000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_egu_40018000_FULL_NAME "egu@40018000"
#define DT_N_S_soc_S_egu_40018000_FULL_NAME_UNQUOTED egu@40018000
#define DT_N_S_soc_S_egu_40018000_FULL_NAME_TOKEN egu_40018000
#define DT_N_S_soc_S_egu_40018000_FULL_NAME_UPPER_TOKEN EGU_40018000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_egu_40018000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_egu_40018000_CHILD_IDX 33

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_egu_40018000_NODELABEL_NUM 2
#define DT_N_S_soc_S_egu_40018000_FOREACH_NODELABEL(fn) fn(egu4) fn(swi4)
#define DT_N_S_soc_S_egu_40018000_FOREACH_NODELABEL_VARGS(fn, ...) fn(egu4, __VA_ARGS__) fn(swi4, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40018000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_egu_40018000_CHILD_NUM 0
#define DT_N_S_soc_S_egu_40018000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_egu_40018000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_egu_40018000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_egu_40018000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_40018000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_egu_40018000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_egu_40018000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_egu_40018000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_40018000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_egu_40018000_HASH 3ebg0I5QeYYkJi0ru3QDaCZeM7Yp8s4mvp0_bDx35ZE

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_egu_40018000_ORD 34
#define DT_N_S_soc_S_egu_40018000_ORD_STR_SORTABLE 00034

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_egu_40018000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_egu_40018000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_egu_40018000_EXISTS 1
#define DT_N_INST_4_nordic_nrf_egu DT_N_S_soc_S_egu_40018000
#define DT_N_INST_4_nordic_nrf_swi DT_N_S_soc_S_egu_40018000
#define DT_N_NODELABEL_egu4        DT_N_S_soc_S_egu_40018000
#define DT_N_NODELABEL_swi4        DT_N_S_soc_S_egu_40018000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_egu_40018000_REG_NUM 1
#define DT_N_S_soc_S_egu_40018000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_REG_IDX_0_VAL_ADDRESS 1073840128 /* 0x40018000 */
#define DT_N_S_soc_S_egu_40018000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_egu_40018000_RANGES_NUM 0
#define DT_N_S_soc_S_egu_40018000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_egu_40018000_IRQ_NUM 1
#define DT_N_S_soc_S_egu_40018000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_IRQ_IDX_0_VAL_irq 24
#define DT_N_S_soc_S_egu_40018000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_egu_40018000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_egu_40018000_IRQ_LEVEL 1
#define DT_N_S_soc_S_egu_40018000_COMPAT_MATCHES_nordic_nrf_egu 1
#define DT_N_S_soc_S_egu_40018000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_egu_40018000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_COMPAT_MODEL_IDX_0 "nrf-egu"
#define DT_N_S_soc_S_egu_40018000_COMPAT_MATCHES_nordic_nrf_swi 1
#define DT_N_S_soc_S_egu_40018000_COMPAT_VENDOR_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_COMPAT_VENDOR_IDX_1 "Nordic Semiconductor"
#define DT_N_S_soc_S_egu_40018000_COMPAT_MODEL_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_COMPAT_MODEL_IDX_1 "nrf-swi"
#define DT_N_S_soc_S_egu_40018000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_egu_40018000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_egu_40018000_P_reg {1073840128 /* 0x40018000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_egu_40018000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_P_reg_IDX_0 1073840128
#define DT_N_S_soc_S_egu_40018000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_egu_40018000_P_reg_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_P_interrupts {24 /* 0x18 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_egu_40018000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_P_interrupts_IDX_0 24
#define DT_N_S_soc_S_egu_40018000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_egu_40018000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_P_status "okay"
#define DT_N_S_soc_S_egu_40018000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_egu_40018000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_egu_40018000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_egu_40018000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_egu_40018000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_egu_40018000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40018000, status, 0)
#define DT_N_S_soc_S_egu_40018000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_egu_40018000, status, 0)
#define DT_N_S_soc_S_egu_40018000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40018000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40018000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_egu_40018000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40018000_P_status_LEN 1
#define DT_N_S_soc_S_egu_40018000_P_status_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_P_compatible {"nordic,nrf-egu", "nordic,nrf-swi"}
#define DT_N_S_soc_S_egu_40018000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_P_compatible_IDX_0 "nordic,nrf-egu"
#define DT_N_S_soc_S_egu_40018000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu
#define DT_N_S_soc_S_egu_40018000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu
#define DT_N_S_soc_S_egu_40018000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU
#define DT_N_S_soc_S_egu_40018000_P_compatible_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_P_compatible_IDX_1 "nordic,nrf-swi"
#define DT_N_S_soc_S_egu_40018000_P_compatible_IDX_1_STRING_UNQUOTED nordic,nrf-swi
#define DT_N_S_soc_S_egu_40018000_P_compatible_IDX_1_STRING_TOKEN nordic_nrf_swi
#define DT_N_S_soc_S_egu_40018000_P_compatible_IDX_1_STRING_UPPER_TOKEN NORDIC_NRF_SWI
#define DT_N_S_soc_S_egu_40018000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40018000, compatible, 0) \
	fn(DT_N_S_soc_S_egu_40018000, compatible, 1)
#define DT_N_S_soc_S_egu_40018000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_egu_40018000, compatible, 0) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_egu_40018000, compatible, 1)
#define DT_N_S_soc_S_egu_40018000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40018000, compatible, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40018000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40018000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_egu_40018000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_egu_40018000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40018000_P_compatible_LEN 2
#define DT_N_S_soc_S_egu_40018000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_egu_40018000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_P_wakeup_source 0
#define DT_N_S_soc_S_egu_40018000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_egu_40018000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_egu_40018000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/egu@40019000
 *
 * Node identifier: DT_N_S_soc_S_egu_40019000
 *
 * Binding (compatible = nordic,nrf-egu):
 *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-egu.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_egu_40019000_PATH "/soc/egu@40019000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_egu_40019000_FULL_NAME "egu@40019000"
#define DT_N_S_soc_S_egu_40019000_FULL_NAME_UNQUOTED egu@40019000
#define DT_N_S_soc_S_egu_40019000_FULL_NAME_TOKEN egu_40019000
#define DT_N_S_soc_S_egu_40019000_FULL_NAME_UPPER_TOKEN EGU_40019000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_egu_40019000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_egu_40019000_CHILD_IDX 34

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_egu_40019000_NODELABEL_NUM 2
#define DT_N_S_soc_S_egu_40019000_FOREACH_NODELABEL(fn) fn(egu5) fn(swi5)
#define DT_N_S_soc_S_egu_40019000_FOREACH_NODELABEL_VARGS(fn, ...) fn(egu5, __VA_ARGS__) fn(swi5, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40019000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_egu_40019000_CHILD_NUM 0
#define DT_N_S_soc_S_egu_40019000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_egu_40019000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_egu_40019000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_egu_40019000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_40019000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_egu_40019000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_egu_40019000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_egu_40019000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_egu_40019000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_egu_40019000_HASH dGyp8E3WOHsobUnrWEZ6yXdU_dH9KORvFW6J0BHdhBE

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_egu_40019000_ORD 35
#define DT_N_S_soc_S_egu_40019000_ORD_STR_SORTABLE 00035

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_egu_40019000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_egu_40019000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_egu_40019000_EXISTS 1
#define DT_N_INST_5_nordic_nrf_egu DT_N_S_soc_S_egu_40019000
#define DT_N_INST_5_nordic_nrf_swi DT_N_S_soc_S_egu_40019000
#define DT_N_NODELABEL_egu5        DT_N_S_soc_S_egu_40019000
#define DT_N_NODELABEL_swi5        DT_N_S_soc_S_egu_40019000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_egu_40019000_REG_NUM 1
#define DT_N_S_soc_S_egu_40019000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_REG_IDX_0_VAL_ADDRESS 1073844224 /* 0x40019000 */
#define DT_N_S_soc_S_egu_40019000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_egu_40019000_RANGES_NUM 0
#define DT_N_S_soc_S_egu_40019000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_egu_40019000_IRQ_NUM 1
#define DT_N_S_soc_S_egu_40019000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_IRQ_IDX_0_VAL_irq 25
#define DT_N_S_soc_S_egu_40019000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_egu_40019000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_egu_40019000_IRQ_LEVEL 1
#define DT_N_S_soc_S_egu_40019000_COMPAT_MATCHES_nordic_nrf_egu 1
#define DT_N_S_soc_S_egu_40019000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_egu_40019000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_COMPAT_MODEL_IDX_0 "nrf-egu"
#define DT_N_S_soc_S_egu_40019000_COMPAT_MATCHES_nordic_nrf_swi 1
#define DT_N_S_soc_S_egu_40019000_COMPAT_VENDOR_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_COMPAT_VENDOR_IDX_1 "Nordic Semiconductor"
#define DT_N_S_soc_S_egu_40019000_COMPAT_MODEL_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_COMPAT_MODEL_IDX_1 "nrf-swi"
#define DT_N_S_soc_S_egu_40019000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_egu_40019000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_egu_40019000_P_reg {1073844224 /* 0x40019000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_egu_40019000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_P_reg_IDX_0 1073844224
#define DT_N_S_soc_S_egu_40019000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_egu_40019000_P_reg_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_P_interrupts {25 /* 0x19 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_egu_40019000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_P_interrupts_IDX_0 25
#define DT_N_S_soc_S_egu_40019000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_egu_40019000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_P_status "okay"
#define DT_N_S_soc_S_egu_40019000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_egu_40019000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_egu_40019000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_egu_40019000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_egu_40019000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_egu_40019000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40019000, status, 0)
#define DT_N_S_soc_S_egu_40019000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_egu_40019000, status, 0)
#define DT_N_S_soc_S_egu_40019000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40019000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40019000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_egu_40019000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40019000_P_status_LEN 1
#define DT_N_S_soc_S_egu_40019000_P_status_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_P_compatible {"nordic,nrf-egu", "nordic,nrf-swi"}
#define DT_N_S_soc_S_egu_40019000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_P_compatible_IDX_0 "nordic,nrf-egu"
#define DT_N_S_soc_S_egu_40019000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-egu
#define DT_N_S_soc_S_egu_40019000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_egu
#define DT_N_S_soc_S_egu_40019000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_EGU
#define DT_N_S_soc_S_egu_40019000_P_compatible_IDX_1_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_P_compatible_IDX_1 "nordic,nrf-swi"
#define DT_N_S_soc_S_egu_40019000_P_compatible_IDX_1_STRING_UNQUOTED nordic,nrf-swi
#define DT_N_S_soc_S_egu_40019000_P_compatible_IDX_1_STRING_TOKEN nordic_nrf_swi
#define DT_N_S_soc_S_egu_40019000_P_compatible_IDX_1_STRING_UPPER_TOKEN NORDIC_NRF_SWI
#define DT_N_S_soc_S_egu_40019000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_egu_40019000, compatible, 0) \
	fn(DT_N_S_soc_S_egu_40019000, compatible, 1)
#define DT_N_S_soc_S_egu_40019000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_egu_40019000, compatible, 0) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_egu_40019000, compatible, 1)
#define DT_N_S_soc_S_egu_40019000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_egu_40019000, compatible, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_egu_40019000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40019000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_egu_40019000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_egu_40019000, compatible, 1, __VA_ARGS__)
#define DT_N_S_soc_S_egu_40019000_P_compatible_LEN 2
#define DT_N_S_soc_S_egu_40019000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_egu_40019000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_P_wakeup_source 0
#define DT_N_S_soc_S_egu_40019000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_egu_40019000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_egu_40019000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/ficr@10000000
 *
 * Node identifier: DT_N_S_soc_S_ficr_10000000
 *
 * Binding (compatible = nordic,nrf-ficr):
 *   $ZEPHYR_BASE/dts/bindings/misc/nordic,nrf-ficr.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_ficr_10000000_PATH "/soc/ficr@10000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_ficr_10000000_FULL_NAME "ficr@10000000"
#define DT_N_S_soc_S_ficr_10000000_FULL_NAME_UNQUOTED ficr@10000000
#define DT_N_S_soc_S_ficr_10000000_FULL_NAME_TOKEN ficr_10000000
#define DT_N_S_soc_S_ficr_10000000_FULL_NAME_UPPER_TOKEN FICR_10000000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_ficr_10000000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_ficr_10000000_CHILD_IDX 2

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_ficr_10000000_NODELABEL_NUM 1
#define DT_N_S_soc_S_ficr_10000000_FOREACH_NODELABEL(fn) fn(ficr)
#define DT_N_S_soc_S_ficr_10000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(ficr, __VA_ARGS__)
#define DT_N_S_soc_S_ficr_10000000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_ficr_10000000_CHILD_NUM 0
#define DT_N_S_soc_S_ficr_10000000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_ficr_10000000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_ficr_10000000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_ficr_10000000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_ficr_10000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_ficr_10000000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_ficr_10000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_ficr_10000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_ficr_10000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_ficr_10000000_HASH 68PiV4qa1Y57Q2A04bQ9EKxOMeMZuEbOe5iUBgPtAxo

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_ficr_10000000_ORD 36
#define DT_N_S_soc_S_ficr_10000000_ORD_STR_SORTABLE 00036

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_ficr_10000000_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_ficr_10000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_ficr_10000000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_ficr DT_N_S_soc_S_ficr_10000000
#define DT_N_NODELABEL_ficr         DT_N_S_soc_S_ficr_10000000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_ficr_10000000_REG_NUM 1
#define DT_N_S_soc_S_ficr_10000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_REG_IDX_0_VAL_ADDRESS 268435456 /* 0x10000000 */
#define DT_N_S_soc_S_ficr_10000000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_ficr_10000000_RANGES_NUM 0
#define DT_N_S_soc_S_ficr_10000000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_ficr_10000000_IRQ_NUM 0
#define DT_N_S_soc_S_ficr_10000000_IRQ_LEVEL 0
#define DT_N_S_soc_S_ficr_10000000_COMPAT_MATCHES_nordic_nrf_ficr 1
#define DT_N_S_soc_S_ficr_10000000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_ficr_10000000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_COMPAT_MODEL_IDX_0 "nrf-ficr"
#define DT_N_S_soc_S_ficr_10000000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_ficr_10000000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_ficr_10000000_P_reg {268435456 /* 0x10000000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_ficr_10000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_reg_IDX_0 268435456
#define DT_N_S_soc_S_ficr_10000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_ficr_10000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_status "okay"
#define DT_N_S_soc_S_ficr_10000000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_ficr_10000000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_ficr_10000000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ficr_10000000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_ficr_10000000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_ficr_10000000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ficr_10000000, status, 0)
#define DT_N_S_soc_S_ficr_10000000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ficr_10000000, status, 0)
#define DT_N_S_soc_S_ficr_10000000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ficr_10000000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ficr_10000000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ficr_10000000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ficr_10000000_P_status_LEN 1
#define DT_N_S_soc_S_ficr_10000000_P_status_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_compatible {"nordic,nrf-ficr"}
#define DT_N_S_soc_S_ficr_10000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_compatible_IDX_0 "nordic,nrf-ficr"
#define DT_N_S_soc_S_ficr_10000000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-ficr
#define DT_N_S_soc_S_ficr_10000000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_ficr
#define DT_N_S_soc_S_ficr_10000000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_FICR
#define DT_N_S_soc_S_ficr_10000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ficr_10000000, compatible, 0)
#define DT_N_S_soc_S_ficr_10000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ficr_10000000, compatible, 0)
#define DT_N_S_soc_S_ficr_10000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ficr_10000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ficr_10000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ficr_10000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ficr_10000000_P_compatible_LEN 1
#define DT_N_S_soc_S_ficr_10000000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_ficr_10000000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_wakeup_source 0
#define DT_N_S_soc_S_ficr_10000000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_ficr_10000000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/i2c@40004000
 *
 * Node identifier: DT_N_S_soc_S_i2c_40004000
 *
 * Binding (compatible = nordic,nrf-twim):
 *   $ZEPHYR_BASE/dts/bindings/i2c/nordic,nrf-twim.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_i2c_40004000_PATH "/soc/i2c@40004000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_i2c_40004000_FULL_NAME "i2c@40004000"
#define DT_N_S_soc_S_i2c_40004000_FULL_NAME_UNQUOTED i2c@40004000
#define DT_N_S_soc_S_i2c_40004000_FULL_NAME_TOKEN i2c_40004000
#define DT_N_S_soc_S_i2c_40004000_FULL_NAME_UPPER_TOKEN I2C_40004000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_i2c_40004000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_i2c_40004000_CHILD_IDX 12

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_i2c_40004000_NODELABEL_NUM 1
#define DT_N_S_soc_S_i2c_40004000_FOREACH_NODELABEL(fn) fn(i2c1)
#define DT_N_S_soc_S_i2c_40004000_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2c1, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40004000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_i2c_40004000_CHILD_NUM 0
#define DT_N_S_soc_S_i2c_40004000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_i2c_40004000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_i2c_40004000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_i2c_40004000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_i2c_40004000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_i2c_40004000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_i2c_40004000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_i2c_40004000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_i2c_40004000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_i2c_40004000_HASH qZsd_bboD4QiuRj9wBJcGV0JkwlcMnuvnRiyrQQHGrY

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_i2c_40004000_ORD 37
#define DT_N_S_soc_S_i2c_40004000_ORD_STR_SORTABLE 00037

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_i2c_40004000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_i2c_40004000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_i2c_40004000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_twim DT_N_S_soc_S_i2c_40004000
#define DT_N_NODELABEL_i2c1         DT_N_S_soc_S_i2c_40004000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_i2c_40004000_REG_NUM 1
#define DT_N_S_soc_S_i2c_40004000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_REG_IDX_0_VAL_ADDRESS 1073758208 /* 0x40004000 */
#define DT_N_S_soc_S_i2c_40004000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_i2c_40004000_RANGES_NUM 0
#define DT_N_S_soc_S_i2c_40004000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_i2c_40004000_IRQ_NUM 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_VAL_irq 4
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_i2c_40004000_IRQ_LEVEL 1
#define DT_N_S_soc_S_i2c_40004000_COMPAT_MATCHES_nordic_nrf_twim 1
#define DT_N_S_soc_S_i2c_40004000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_i2c_40004000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_COMPAT_MODEL_IDX_0 "nrf-twim"
#define DT_N_S_soc_S_i2c_40004000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_i2c_40004000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_i2c_40004000_P_zephyr_concat_buf_size 16
#define DT_N_S_soc_S_i2c_40004000_P_zephyr_concat_buf_size_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_zephyr_flash_buf_max_size 16
#define DT_N_S_soc_S_i2c_40004000_P_zephyr_flash_buf_max_size_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_reg {1073758208 /* 0x40004000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_i2c_40004000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_reg_IDX_0 1073758208
#define DT_N_S_soc_S_i2c_40004000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_i2c_40004000_P_reg_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_interrupts {4 /* 0x4 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_IDX_0 4
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_easydma_maxcnt_bits 8
#define DT_N_S_soc_S_i2c_40004000_P_easydma_maxcnt_bits_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_sq_size 4
#define DT_N_S_soc_S_i2c_40004000_P_sq_size_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_cq_size 4
#define DT_N_S_soc_S_i2c_40004000_P_cq_size_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_status "disabled"
#define DT_N_S_soc_S_i2c_40004000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_i2c_40004000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_i2c_40004000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_i2c_40004000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_i2c_40004000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_i2c_40004000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40004000, status, 0)
#define DT_N_S_soc_S_i2c_40004000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40004000, status, 0)
#define DT_N_S_soc_S_i2c_40004000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40004000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40004000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40004000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40004000_P_status_LEN 1
#define DT_N_S_soc_S_i2c_40004000_P_status_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_compatible {"nordic,nrf-twim"}
#define DT_N_S_soc_S_i2c_40004000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_compatible_IDX_0 "nordic,nrf-twim"
#define DT_N_S_soc_S_i2c_40004000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-twim
#define DT_N_S_soc_S_i2c_40004000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_twim
#define DT_N_S_soc_S_i2c_40004000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TWIM
#define DT_N_S_soc_S_i2c_40004000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40004000, compatible, 0)
#define DT_N_S_soc_S_i2c_40004000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40004000, compatible, 0)
#define DT_N_S_soc_S_i2c_40004000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40004000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40004000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40004000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40004000_P_compatible_LEN 1
#define DT_N_S_soc_S_i2c_40004000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_i2c_40004000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_wakeup_source 0
#define DT_N_S_soc_S_i2c_40004000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_zephyr_pm_device_runtime_auto 1
#define DT_N_S_soc_S_i2c_40004000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/i2s@40025000
 *
 * Node identifier: DT_N_S_soc_S_i2s_40025000
 *
 * Binding (compatible = nordic,nrf-i2s):
 *   $ZEPHYR_BASE/dts/bindings/i2s/nordic,nrf-i2s.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_i2s_40025000_PATH "/soc/i2s@40025000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_i2s_40025000_FULL_NAME "i2s@40025000"
#define DT_N_S_soc_S_i2s_40025000_FULL_NAME_UNQUOTED i2s@40025000
#define DT_N_S_soc_S_i2s_40025000_FULL_NAME_TOKEN i2s_40025000
#define DT_N_S_soc_S_i2s_40025000_FULL_NAME_UPPER_TOKEN I2S_40025000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_i2s_40025000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_i2s_40025000_CHILD_IDX 46

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_i2s_40025000_NODELABEL_NUM 1
#define DT_N_S_soc_S_i2s_40025000_FOREACH_NODELABEL(fn) fn(i2s0)
#define DT_N_S_soc_S_i2s_40025000_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2s0, __VA_ARGS__)
#define DT_N_S_soc_S_i2s_40025000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_i2s_40025000_CHILD_NUM 0
#define DT_N_S_soc_S_i2s_40025000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_i2s_40025000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_i2s_40025000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_i2s_40025000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_i2s_40025000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_i2s_40025000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_i2s_40025000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_i2s_40025000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_i2s_40025000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_i2s_40025000_HASH Rm8hLOMefULXq097kEEoAYqthbAkGKVraXvIbPpM5fc

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_i2s_40025000_ORD 38
#define DT_N_S_soc_S_i2s_40025000_ORD_STR_SORTABLE 00038

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_i2s_40025000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_i2s_40025000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_i2s_40025000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_i2s DT_N_S_soc_S_i2s_40025000
#define DT_N_NODELABEL_i2s0        DT_N_S_soc_S_i2s_40025000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_i2s_40025000_REG_NUM 1
#define DT_N_S_soc_S_i2s_40025000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_REG_IDX_0_VAL_ADDRESS 1073893376 /* 0x40025000 */
#define DT_N_S_soc_S_i2s_40025000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_i2s_40025000_RANGES_NUM 0
#define DT_N_S_soc_S_i2s_40025000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_i2s_40025000_IRQ_NUM 1
#define DT_N_S_soc_S_i2s_40025000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_IRQ_IDX_0_VAL_irq 37
#define DT_N_S_soc_S_i2s_40025000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_i2s_40025000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_i2s_40025000_IRQ_LEVEL 1
#define DT_N_S_soc_S_i2s_40025000_COMPAT_MATCHES_nordic_nrf_i2s 1
#define DT_N_S_soc_S_i2s_40025000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_i2s_40025000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_COMPAT_MODEL_IDX_0 "nrf-i2s"
#define DT_N_S_soc_S_i2s_40025000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_i2s_40025000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_i2s_40025000_P_reg {1073893376 /* 0x40025000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_i2s_40025000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_reg_IDX_0 1073893376
#define DT_N_S_soc_S_i2s_40025000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_i2s_40025000_P_reg_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_interrupts {37 /* 0x25 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_i2s_40025000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_interrupts_IDX_0 37
#define DT_N_S_soc_S_i2s_40025000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_i2s_40025000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_clock_source "PCLK32M_HFXO"
#define DT_N_S_soc_S_i2s_40025000_P_clock_source_STRING_UNQUOTED PCLK32M_HFXO
#define DT_N_S_soc_S_i2s_40025000_P_clock_source_STRING_TOKEN PCLK32M_HFXO
#define DT_N_S_soc_S_i2s_40025000_P_clock_source_STRING_UPPER_TOKEN PCLK32M_HFXO
#define DT_N_S_soc_S_i2s_40025000_P_clock_source_IDX_0 "PCLK32M_HFXO"
#define DT_N_S_soc_S_i2s_40025000_P_clock_source_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_clock_source_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_i2s_40025000_P_clock_source_IDX_0_ENUM_VAL_pclk32m_hfxo_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_clock_source_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40025000, clock_source, 0)
#define DT_N_S_soc_S_i2s_40025000_P_clock_source_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40025000, clock_source, 0)
#define DT_N_S_soc_S_i2s_40025000_P_clock_source_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40025000, clock_source, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2s_40025000_P_clock_source_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40025000, clock_source, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2s_40025000_P_clock_source_LEN 1
#define DT_N_S_soc_S_i2s_40025000_P_clock_source_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_status "disabled"
#define DT_N_S_soc_S_i2s_40025000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_i2s_40025000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_i2s_40025000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_i2s_40025000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_i2s_40025000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_i2s_40025000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40025000, status, 0)
#define DT_N_S_soc_S_i2s_40025000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40025000, status, 0)
#define DT_N_S_soc_S_i2s_40025000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40025000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2s_40025000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40025000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2s_40025000_P_status_LEN 1
#define DT_N_S_soc_S_i2s_40025000_P_status_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_compatible {"nordic,nrf-i2s"}
#define DT_N_S_soc_S_i2s_40025000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_compatible_IDX_0 "nordic,nrf-i2s"
#define DT_N_S_soc_S_i2s_40025000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-i2s
#define DT_N_S_soc_S_i2s_40025000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_i2s
#define DT_N_S_soc_S_i2s_40025000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_I2S
#define DT_N_S_soc_S_i2s_40025000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40025000, compatible, 0)
#define DT_N_S_soc_S_i2s_40025000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40025000, compatible, 0)
#define DT_N_S_soc_S_i2s_40025000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40025000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2s_40025000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40025000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2s_40025000_P_compatible_LEN 1
#define DT_N_S_soc_S_i2s_40025000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_i2s_40025000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_wakeup_source 0
#define DT_N_S_soc_S_i2s_40025000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_i2s_40025000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_i2s_40025000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/memory@20000000
 *
 * Node identifier: DT_N_S_soc_S_memory_20000000
 *
 * Binding (compatible = mmio-sram):
 *   $ZEPHYR_BASE/dts/bindings/sram/mmio-sram.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_memory_20000000_PATH "/soc/memory@20000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_memory_20000000_FULL_NAME "memory@20000000"
#define DT_N_S_soc_S_memory_20000000_FULL_NAME_UNQUOTED memory@20000000
#define DT_N_S_soc_S_memory_20000000_FULL_NAME_TOKEN memory_20000000
#define DT_N_S_soc_S_memory_20000000_FULL_NAME_UPPER_TOKEN MEMORY_20000000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_memory_20000000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_memory_20000000_CHILD_IDX 4

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_memory_20000000_NODELABEL_NUM 1
#define DT_N_S_soc_S_memory_20000000_FOREACH_NODELABEL(fn) fn(sram0)
#define DT_N_S_soc_S_memory_20000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(sram0, __VA_ARGS__)
#define DT_N_S_soc_S_memory_20000000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_memory_20000000_CHILD_NUM 0
#define DT_N_S_soc_S_memory_20000000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_memory_20000000_HASH 5mk6hI_a0RgTbSaRk0MwzSvPe_XVqQpqtmpmf4tdmFg

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_memory_20000000_ORD 39
#define DT_N_S_soc_S_memory_20000000_ORD_STR_SORTABLE 00039

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_memory_20000000_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_memory_20000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_memory_20000000_EXISTS 1
#define DT_N_INST_0_mmio_sram DT_N_S_soc_S_memory_20000000
#define DT_N_NODELABEL_sram0  DT_N_S_soc_S_memory_20000000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_memory_20000000_REG_NUM 1
#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_VAL_ADDRESS 536870912 /* 0x20000000 */
#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_VAL_SIZE 65536 /* 0x10000 */
#define DT_N_S_soc_S_memory_20000000_RANGES_NUM 0
#define DT_N_S_soc_S_memory_20000000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_memory_20000000_IRQ_NUM 0
#define DT_N_S_soc_S_memory_20000000_IRQ_LEVEL 0
#define DT_N_S_soc_S_memory_20000000_COMPAT_MATCHES_mmio_sram 1
#define DT_N_S_soc_S_memory_20000000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_memory_20000000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_memory_20000000_P_reg {536870912 /* 0x20000000 */, 65536 /* 0x10000 */}
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_0 536870912
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_1 65536
#define DT_N_S_soc_S_memory_20000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_compatible {"mmio-sram"}
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0 "mmio-sram"
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_STRING_UNQUOTED mmio-sram
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_STRING_TOKEN mmio_sram
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_STRING_UPPER_TOKEN MMIO_SRAM
#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_20000000, compatible, 0)
#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_20000000, compatible, 0)
#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_20000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_20000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_memory_20000000_P_compatible_LEN 1
#define DT_N_S_soc_S_memory_20000000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_memory_20000000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_wakeup_source 0
#define DT_N_S_soc_S_memory_20000000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_memory_20000000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/mwu@40020000
 *
 * Node identifier: DT_N_S_soc_S_mwu_40020000
 *
 * Binding (compatible = nordic,nrf-mwu):
 *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-mwu.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_mwu_40020000_PATH "/soc/mwu@40020000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_mwu_40020000_FULL_NAME "mwu@40020000"
#define DT_N_S_soc_S_mwu_40020000_FULL_NAME_UNQUOTED mwu@40020000
#define DT_N_S_soc_S_mwu_40020000_FULL_NAME_TOKEN mwu_40020000
#define DT_N_S_soc_S_mwu_40020000_FULL_NAME_UPPER_TOKEN MWU_40020000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_mwu_40020000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_mwu_40020000_CHILD_IDX 41

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_mwu_40020000_NODELABEL_NUM 1
#define DT_N_S_soc_S_mwu_40020000_FOREACH_NODELABEL(fn) fn(mwu)
#define DT_N_S_soc_S_mwu_40020000_FOREACH_NODELABEL_VARGS(fn, ...) fn(mwu, __VA_ARGS__)
#define DT_N_S_soc_S_mwu_40020000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_mwu_40020000_CHILD_NUM 0
#define DT_N_S_soc_S_mwu_40020000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_mwu_40020000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_mwu_40020000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_mwu_40020000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_mwu_40020000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_mwu_40020000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_mwu_40020000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_mwu_40020000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_mwu_40020000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_mwu_40020000_HASH 8t_Bjj18TRSYxNqrRnFXHD5DRagn6o2l0C0B6jCGLIg

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_mwu_40020000_ORD 40
#define DT_N_S_soc_S_mwu_40020000_ORD_STR_SORTABLE 00040

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_mwu_40020000_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_mwu_40020000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_mwu_40020000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_mwu DT_N_S_soc_S_mwu_40020000
#define DT_N_NODELABEL_mwu         DT_N_S_soc_S_mwu_40020000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_mwu_40020000_REG_NUM 1
#define DT_N_S_soc_S_mwu_40020000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_mwu_40020000_REG_IDX_0_VAL_ADDRESS 1073872896 /* 0x40020000 */
#define DT_N_S_soc_S_mwu_40020000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_mwu_40020000_RANGES_NUM 0
#define DT_N_S_soc_S_mwu_40020000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_mwu_40020000_IRQ_NUM 0
#define DT_N_S_soc_S_mwu_40020000_IRQ_LEVEL 0
#define DT_N_S_soc_S_mwu_40020000_COMPAT_MATCHES_nordic_nrf_mwu 1
#define DT_N_S_soc_S_mwu_40020000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_mwu_40020000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_mwu_40020000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_mwu_40020000_COMPAT_MODEL_IDX_0 "nrf-mwu"
#define DT_N_S_soc_S_mwu_40020000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_mwu_40020000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_mwu_40020000_P_reg {1073872896 /* 0x40020000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_mwu_40020000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_mwu_40020000_P_reg_IDX_0 1073872896
#define DT_N_S_soc_S_mwu_40020000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_mwu_40020000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_mwu_40020000_P_reg_EXISTS 1
#define DT_N_S_soc_S_mwu_40020000_P_status "okay"
#define DT_N_S_soc_S_mwu_40020000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_mwu_40020000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_mwu_40020000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_mwu_40020000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_mwu_40020000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_mwu_40020000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_mwu_40020000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_mwu_40020000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_mwu_40020000, status, 0)
#define DT_N_S_soc_S_mwu_40020000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_mwu_40020000, status, 0)
#define DT_N_S_soc_S_mwu_40020000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_mwu_40020000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_mwu_40020000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_mwu_40020000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_mwu_40020000_P_status_LEN 1
#define DT_N_S_soc_S_mwu_40020000_P_status_EXISTS 1
#define DT_N_S_soc_S_mwu_40020000_P_compatible {"nordic,nrf-mwu"}
#define DT_N_S_soc_S_mwu_40020000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_mwu_40020000_P_compatible_IDX_0 "nordic,nrf-mwu"
#define DT_N_S_soc_S_mwu_40020000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-mwu
#define DT_N_S_soc_S_mwu_40020000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_mwu
#define DT_N_S_soc_S_mwu_40020000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_MWU
#define DT_N_S_soc_S_mwu_40020000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_mwu_40020000, compatible, 0)
#define DT_N_S_soc_S_mwu_40020000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_mwu_40020000, compatible, 0)
#define DT_N_S_soc_S_mwu_40020000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_mwu_40020000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_mwu_40020000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_mwu_40020000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_mwu_40020000_P_compatible_LEN 1
#define DT_N_S_soc_S_mwu_40020000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_mwu_40020000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_mwu_40020000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_mwu_40020000_P_wakeup_source 0
#define DT_N_S_soc_S_mwu_40020000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_mwu_40020000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_mwu_40020000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/nfct@40005000
 *
 * Node identifier: DT_N_S_soc_S_nfct_40005000
 *
 * Binding (compatible = nordic,nrf-nfct):
 *   $ZEPHYR_BASE/dts/bindings/net/wireless/nordic,nrf-nfct.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_nfct_40005000_PATH "/soc/nfct@40005000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_nfct_40005000_FULL_NAME "nfct@40005000"
#define DT_N_S_soc_S_nfct_40005000_FULL_NAME_UNQUOTED nfct@40005000
#define DT_N_S_soc_S_nfct_40005000_FULL_NAME_TOKEN nfct_40005000
#define DT_N_S_soc_S_nfct_40005000_FULL_NAME_UPPER_TOKEN NFCT_40005000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_nfct_40005000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_nfct_40005000_CHILD_IDX 14

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_nfct_40005000_NODELABEL_NUM 1
#define DT_N_S_soc_S_nfct_40005000_FOREACH_NODELABEL(fn) fn(nfct)
#define DT_N_S_soc_S_nfct_40005000_FOREACH_NODELABEL_VARGS(fn, ...) fn(nfct, __VA_ARGS__)
#define DT_N_S_soc_S_nfct_40005000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_nfct_40005000_CHILD_NUM 0
#define DT_N_S_soc_S_nfct_40005000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_nfct_40005000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_nfct_40005000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_nfct_40005000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_nfct_40005000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_nfct_40005000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_nfct_40005000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_nfct_40005000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_nfct_40005000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_nfct_40005000_HASH yn09GxbRohCQ838YLyhUmAG3BuRnJe72jNisVzttZfM

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_nfct_40005000_ORD 41
#define DT_N_S_soc_S_nfct_40005000_ORD_STR_SORTABLE 00041

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_nfct_40005000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_nfct_40005000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_nfct_40005000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_nfct DT_N_S_soc_S_nfct_40005000
#define DT_N_NODELABEL_nfct         DT_N_S_soc_S_nfct_40005000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_nfct_40005000_REG_NUM 1
#define DT_N_S_soc_S_nfct_40005000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_REG_IDX_0_VAL_ADDRESS 1073762304 /* 0x40005000 */
#define DT_N_S_soc_S_nfct_40005000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_nfct_40005000_RANGES_NUM 0
#define DT_N_S_soc_S_nfct_40005000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_nfct_40005000_IRQ_NUM 1
#define DT_N_S_soc_S_nfct_40005000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_IRQ_IDX_0_VAL_irq 5
#define DT_N_S_soc_S_nfct_40005000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_nfct_40005000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_nfct_40005000_IRQ_LEVEL 1
#define DT_N_S_soc_S_nfct_40005000_COMPAT_MATCHES_nordic_nrf_nfct 1
#define DT_N_S_soc_S_nfct_40005000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_nfct_40005000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_COMPAT_MODEL_IDX_0 "nrf-nfct"
#define DT_N_S_soc_S_nfct_40005000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_nfct_40005000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_nfct_40005000_P_reg {1073762304 /* 0x40005000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_nfct_40005000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_P_reg_IDX_0 1073762304
#define DT_N_S_soc_S_nfct_40005000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_nfct_40005000_P_reg_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_P_interrupts {5 /* 0x5 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_nfct_40005000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_P_interrupts_IDX_0 5
#define DT_N_S_soc_S_nfct_40005000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_nfct_40005000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_P_status "disabled"
#define DT_N_S_soc_S_nfct_40005000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_nfct_40005000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_nfct_40005000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_nfct_40005000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_nfct_40005000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_nfct_40005000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_nfct_40005000, status, 0)
#define DT_N_S_soc_S_nfct_40005000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_nfct_40005000, status, 0)
#define DT_N_S_soc_S_nfct_40005000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_nfct_40005000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_nfct_40005000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_nfct_40005000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_nfct_40005000_P_status_LEN 1
#define DT_N_S_soc_S_nfct_40005000_P_status_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_P_compatible {"nordic,nrf-nfct"}
#define DT_N_S_soc_S_nfct_40005000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_P_compatible_IDX_0 "nordic,nrf-nfct"
#define DT_N_S_soc_S_nfct_40005000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-nfct
#define DT_N_S_soc_S_nfct_40005000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_nfct
#define DT_N_S_soc_S_nfct_40005000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_NFCT
#define DT_N_S_soc_S_nfct_40005000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_nfct_40005000, compatible, 0)
#define DT_N_S_soc_S_nfct_40005000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_nfct_40005000, compatible, 0)
#define DT_N_S_soc_S_nfct_40005000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_nfct_40005000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_nfct_40005000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_nfct_40005000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_nfct_40005000_P_compatible_LEN 1
#define DT_N_S_soc_S_nfct_40005000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_nfct_40005000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_P_wakeup_source 0
#define DT_N_S_soc_S_nfct_40005000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_nfct_40005000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_nfct_40005000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/pdm@4001d000
 *
 * Node identifier: DT_N_S_soc_S_pdm_4001d000
 *
 * Binding (compatible = nordic,nrf-pdm):
 *   $ZEPHYR_BASE/dts/bindings/audio/nordic,nrf-pdm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_pdm_4001d000_PATH "/soc/pdm@4001d000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_pdm_4001d000_FULL_NAME "pdm@4001d000"
#define DT_N_S_soc_S_pdm_4001d000_FULL_NAME_UNQUOTED pdm@4001d000
#define DT_N_S_soc_S_pdm_4001d000_FULL_NAME_TOKEN pdm_4001d000
#define DT_N_S_soc_S_pdm_4001d000_FULL_NAME_UPPER_TOKEN PDM_4001D000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_pdm_4001d000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_pdm_4001d000_CHILD_IDX 38

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_pdm_4001d000_NODELABEL_NUM 1
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_NODELABEL(fn) fn(pdm0)
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_NODELABEL_VARGS(fn, ...) fn(pdm0, __VA_ARGS__)
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_pdm_4001d000_CHILD_NUM 0
#define DT_N_S_soc_S_pdm_4001d000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_pdm_4001d000_HASH HSeb7W_iYLHevrBtcPEyyh_yMIloL0UcZciFRnF__DU

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_pdm_4001d000_ORD 42
#define DT_N_S_soc_S_pdm_4001d000_ORD_STR_SORTABLE 00042

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_pdm_4001d000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_pdm_4001d000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_pdm_4001d000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_pdm DT_N_S_soc_S_pdm_4001d000
#define DT_N_NODELABEL_pdm0        DT_N_S_soc_S_pdm_4001d000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_pdm_4001d000_REG_NUM 1
#define DT_N_S_soc_S_pdm_4001d000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_REG_IDX_0_VAL_ADDRESS 1073860608 /* 0x4001d000 */
#define DT_N_S_soc_S_pdm_4001d000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_pdm_4001d000_RANGES_NUM 0
#define DT_N_S_soc_S_pdm_4001d000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_pdm_4001d000_IRQ_NUM 1
#define DT_N_S_soc_S_pdm_4001d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_IRQ_IDX_0_VAL_irq 29
#define DT_N_S_soc_S_pdm_4001d000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_pdm_4001d000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_pdm_4001d000_IRQ_LEVEL 1
#define DT_N_S_soc_S_pdm_4001d000_COMPAT_MATCHES_nordic_nrf_pdm 1
#define DT_N_S_soc_S_pdm_4001d000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_pdm_4001d000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_COMPAT_MODEL_IDX_0 "nrf-pdm"
#define DT_N_S_soc_S_pdm_4001d000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_pdm_4001d000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_pdm_4001d000_P_reg {1073860608 /* 0x4001d000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_pdm_4001d000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_reg_IDX_0 1073860608
#define DT_N_S_soc_S_pdm_4001d000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_pdm_4001d000_P_reg_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_interrupts {29 /* 0x1d */, 1 /* 0x1 */}
#define DT_N_S_soc_S_pdm_4001d000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_interrupts_IDX_0 29
#define DT_N_S_soc_S_pdm_4001d000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_pdm_4001d000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source "PCLK32M_HFXO"
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_STRING_UNQUOTED PCLK32M_HFXO
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_STRING_TOKEN PCLK32M_HFXO
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_STRING_UPPER_TOKEN PCLK32M_HFXO
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_IDX_0 "PCLK32M_HFXO"
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_IDX_0_ENUM_VAL_pclk32m_hfxo_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 0)
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 0)
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pdm_4001d000, clock_source, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_LEN 1
#define DT_N_S_soc_S_pdm_4001d000_P_clock_source_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_queue_size 4
#define DT_N_S_soc_S_pdm_4001d000_P_queue_size_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_status "disabled"
#define DT_N_S_soc_S_pdm_4001d000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_pdm_4001d000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_pdm_4001d000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_pdm_4001d000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_pdm_4001d000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_pdm_4001d000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pdm_4001d000, status, 0)
#define DT_N_S_soc_S_pdm_4001d000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pdm_4001d000, status, 0)
#define DT_N_S_soc_S_pdm_4001d000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pdm_4001d000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pdm_4001d000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pdm_4001d000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pdm_4001d000_P_status_LEN 1
#define DT_N_S_soc_S_pdm_4001d000_P_status_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_compatible {"nordic,nrf-pdm"}
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_IDX_0 "nordic,nrf-pdm"
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pdm
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pdm
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PDM
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pdm_4001d000, compatible, 0)
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pdm_4001d000, compatible, 0)
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pdm_4001d000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pdm_4001d000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_LEN 1
#define DT_N_S_soc_S_pdm_4001d000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_pdm_4001d000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_wakeup_source 0
#define DT_N_S_soc_S_pdm_4001d000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_pdm_4001d000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_pdm_4001d000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/ppi@4001f000
 *
 * Node identifier: DT_N_S_soc_S_ppi_4001f000
 *
 * Binding (compatible = nordic,nrf-ppi):
 *   $ZEPHYR_BASE/dts/bindings/misc/nordic,nrf-ppi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_ppi_4001f000_PATH "/soc/ppi@4001f000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_ppi_4001f000_FULL_NAME "ppi@4001f000"
#define DT_N_S_soc_S_ppi_4001f000_FULL_NAME_UNQUOTED ppi@4001f000
#define DT_N_S_soc_S_ppi_4001f000_FULL_NAME_TOKEN ppi_4001f000
#define DT_N_S_soc_S_ppi_4001f000_FULL_NAME_UPPER_TOKEN PPI_4001F000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_ppi_4001f000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_ppi_4001f000_CHILD_IDX 40

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_ppi_4001f000_NODELABEL_NUM 1
#define DT_N_S_soc_S_ppi_4001f000_FOREACH_NODELABEL(fn) fn(ppi)
#define DT_N_S_soc_S_ppi_4001f000_FOREACH_NODELABEL_VARGS(fn, ...) fn(ppi, __VA_ARGS__)
#define DT_N_S_soc_S_ppi_4001f000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_ppi_4001f000_CHILD_NUM 0
#define DT_N_S_soc_S_ppi_4001f000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_ppi_4001f000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_ppi_4001f000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_ppi_4001f000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_ppi_4001f000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_ppi_4001f000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_ppi_4001f000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_ppi_4001f000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_ppi_4001f000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_ppi_4001f000_HASH KQNQhUNVlbCH0wGgvOTGymkL__4HOyDYo0sjTaxGYPM

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_ppi_4001f000_ORD 43
#define DT_N_S_soc_S_ppi_4001f000_ORD_STR_SORTABLE 00043

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_ppi_4001f000_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_ppi_4001f000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_ppi_4001f000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_ppi DT_N_S_soc_S_ppi_4001f000
#define DT_N_NODELABEL_ppi         DT_N_S_soc_S_ppi_4001f000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_ppi_4001f000_REG_NUM 1
#define DT_N_S_soc_S_ppi_4001f000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ppi_4001f000_REG_IDX_0_VAL_ADDRESS 1073868800 /* 0x4001f000 */
#define DT_N_S_soc_S_ppi_4001f000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_ppi_4001f000_RANGES_NUM 0
#define DT_N_S_soc_S_ppi_4001f000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_ppi_4001f000_IRQ_NUM 0
#define DT_N_S_soc_S_ppi_4001f000_IRQ_LEVEL 0
#define DT_N_S_soc_S_ppi_4001f000_COMPAT_MATCHES_nordic_nrf_ppi 1
#define DT_N_S_soc_S_ppi_4001f000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ppi_4001f000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_ppi_4001f000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ppi_4001f000_COMPAT_MODEL_IDX_0 "nrf-ppi"
#define DT_N_S_soc_S_ppi_4001f000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_ppi_4001f000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_ppi_4001f000_P_reg {1073868800 /* 0x4001f000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_ppi_4001f000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ppi_4001f000_P_reg_IDX_0 1073868800
#define DT_N_S_soc_S_ppi_4001f000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ppi_4001f000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_ppi_4001f000_P_reg_EXISTS 1
#define DT_N_S_soc_S_ppi_4001f000_P_status "okay"
#define DT_N_S_soc_S_ppi_4001f000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_ppi_4001f000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_ppi_4001f000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ppi_4001f000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_ppi_4001f000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ppi_4001f000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_ppi_4001f000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_ppi_4001f000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ppi_4001f000, status, 0)
#define DT_N_S_soc_S_ppi_4001f000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ppi_4001f000, status, 0)
#define DT_N_S_soc_S_ppi_4001f000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ppi_4001f000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ppi_4001f000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ppi_4001f000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ppi_4001f000_P_status_LEN 1
#define DT_N_S_soc_S_ppi_4001f000_P_status_EXISTS 1
#define DT_N_S_soc_S_ppi_4001f000_P_compatible {"nordic,nrf-ppi"}
#define DT_N_S_soc_S_ppi_4001f000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ppi_4001f000_P_compatible_IDX_0 "nordic,nrf-ppi"
#define DT_N_S_soc_S_ppi_4001f000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-ppi
#define DT_N_S_soc_S_ppi_4001f000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_ppi
#define DT_N_S_soc_S_ppi_4001f000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PPI
#define DT_N_S_soc_S_ppi_4001f000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ppi_4001f000, compatible, 0)
#define DT_N_S_soc_S_ppi_4001f000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_ppi_4001f000, compatible, 0)
#define DT_N_S_soc_S_ppi_4001f000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_ppi_4001f000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ppi_4001f000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_ppi_4001f000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_ppi_4001f000_P_compatible_LEN 1
#define DT_N_S_soc_S_ppi_4001f000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_ppi_4001f000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_ppi_4001f000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_ppi_4001f000_P_wakeup_source 0
#define DT_N_S_soc_S_ppi_4001f000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_ppi_4001f000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_ppi_4001f000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/pwm@4001c000
 *
 * Node identifier: DT_N_S_soc_S_pwm_4001c000
 *
 * Binding (compatible = nordic,nrf-pwm):
 *   $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-pwm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_pwm_4001c000_PATH "/soc/pwm@4001c000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_pwm_4001c000_FULL_NAME "pwm@4001c000"
#define DT_N_S_soc_S_pwm_4001c000_FULL_NAME_UNQUOTED pwm@4001c000
#define DT_N_S_soc_S_pwm_4001c000_FULL_NAME_TOKEN pwm_4001c000
#define DT_N_S_soc_S_pwm_4001c000_FULL_NAME_UPPER_TOKEN PWM_4001C000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_pwm_4001c000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_pwm_4001c000_CHILD_IDX 37

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_pwm_4001c000_NODELABEL_NUM 1
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_NODELABEL(fn) fn(pwm0)
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_NODELABEL_VARGS(fn, ...) fn(pwm0, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_pwm_4001c000_CHILD_NUM 0
#define DT_N_S_soc_S_pwm_4001c000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_pwm_4001c000_HASH 9lQEfUJwIRaZ7T_RLwtmpK6wLktpHMLYr2ybjScM3SQ

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_pwm_4001c000_ORD 44
#define DT_N_S_soc_S_pwm_4001c000_ORD_STR_SORTABLE 00044

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_pwm_4001c000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_pwm_4001c000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_pwm_4001c000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_pwm DT_N_S_soc_S_pwm_4001c000
#define DT_N_NODELABEL_pwm0        DT_N_S_soc_S_pwm_4001c000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_pwm_4001c000_REG_NUM 1
#define DT_N_S_soc_S_pwm_4001c000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_REG_IDX_0_VAL_ADDRESS 1073856512 /* 0x4001c000 */
#define DT_N_S_soc_S_pwm_4001c000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_pwm_4001c000_RANGES_NUM 0
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_pwm_4001c000_IRQ_NUM 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_VAL_irq 28
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_pwm_4001c000_IRQ_LEVEL 1
#define DT_N_S_soc_S_pwm_4001c000_COMPAT_MATCHES_nordic_nrf_pwm 1
#define DT_N_S_soc_S_pwm_4001c000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_pwm_4001c000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_COMPAT_MODEL_IDX_0 "nrf-pwm"
#define DT_N_S_soc_S_pwm_4001c000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_pwm_4001c000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_pwm_4001c000_P_reg {1073856512 /* 0x4001c000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_pwm_4001c000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_reg_IDX_0 1073856512
#define DT_N_S_soc_S_pwm_4001c000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_pwm_4001c000_P_reg_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_center_aligned 0
#define DT_N_S_soc_S_pwm_4001c000_P_center_aligned_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_idleout_supported 0
#define DT_N_S_soc_S_pwm_4001c000_P_idleout_supported_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_status "disabled"
#define DT_N_S_soc_S_pwm_4001c000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_pwm_4001c000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_pwm_4001c000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_pwm_4001c000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_pwm_4001c000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_pwm_4001c000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4001c000, status, 0)
#define DT_N_S_soc_S_pwm_4001c000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pwm_4001c000, status, 0)
#define DT_N_S_soc_S_pwm_4001c000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pwm_4001c000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_4001c000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pwm_4001c000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_4001c000_P_status_LEN 1
#define DT_N_S_soc_S_pwm_4001c000_P_status_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_compatible {"nordic,nrf-pwm"}
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_IDX_0 "nordic,nrf-pwm"
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pwm
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pwm
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PWM
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4001c000, compatible, 0)
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pwm_4001c000, compatible, 0)
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pwm_4001c000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pwm_4001c000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_LEN 1
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts {28 /* 0x1c */, 1 /* 0x1 */}
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_IDX_0 28
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_pwm_4001c000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_wakeup_source 0
#define DT_N_S_soc_S_pwm_4001c000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_pwm_4001c000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/pwm@40021000
 *
 * Node identifier: DT_N_S_soc_S_pwm_40021000
 *
 * Binding (compatible = nordic,nrf-pwm):
 *   $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-pwm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_pwm_40021000_PATH "/soc/pwm@40021000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_pwm_40021000_FULL_NAME "pwm@40021000"
#define DT_N_S_soc_S_pwm_40021000_FULL_NAME_UNQUOTED pwm@40021000
#define DT_N_S_soc_S_pwm_40021000_FULL_NAME_TOKEN pwm_40021000
#define DT_N_S_soc_S_pwm_40021000_FULL_NAME_UPPER_TOKEN PWM_40021000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_pwm_40021000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_pwm_40021000_CHILD_IDX 42

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_pwm_40021000_NODELABEL_NUM 1
#define DT_N_S_soc_S_pwm_40021000_FOREACH_NODELABEL(fn) fn(pwm1)
#define DT_N_S_soc_S_pwm_40021000_FOREACH_NODELABEL_VARGS(fn, ...) fn(pwm1, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_40021000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_pwm_40021000_CHILD_NUM 0
#define DT_N_S_soc_S_pwm_40021000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_pwm_40021000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_pwm_40021000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_pwm_40021000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_pwm_40021000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_pwm_40021000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_pwm_40021000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_pwm_40021000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_pwm_40021000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_pwm_40021000_HASH DTLy7jKNMamucGvdQaGf4NnPVrMSQpz56_dMDbK5JYE

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_pwm_40021000_ORD 45
#define DT_N_S_soc_S_pwm_40021000_ORD_STR_SORTABLE 00045

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_pwm_40021000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_pwm_40021000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_pwm_40021000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_pwm DT_N_S_soc_S_pwm_40021000
#define DT_N_NODELABEL_pwm1        DT_N_S_soc_S_pwm_40021000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_pwm_40021000_REG_NUM 1
#define DT_N_S_soc_S_pwm_40021000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_REG_IDX_0_VAL_ADDRESS 1073876992 /* 0x40021000 */
#define DT_N_S_soc_S_pwm_40021000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_pwm_40021000_RANGES_NUM 0
#define DT_N_S_soc_S_pwm_40021000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_pwm_40021000_IRQ_NUM 1
#define DT_N_S_soc_S_pwm_40021000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_IRQ_IDX_0_VAL_irq 33
#define DT_N_S_soc_S_pwm_40021000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_pwm_40021000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_pwm_40021000_IRQ_LEVEL 1
#define DT_N_S_soc_S_pwm_40021000_COMPAT_MATCHES_nordic_nrf_pwm 1
#define DT_N_S_soc_S_pwm_40021000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_pwm_40021000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_COMPAT_MODEL_IDX_0 "nrf-pwm"
#define DT_N_S_soc_S_pwm_40021000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_pwm_40021000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_pwm_40021000_P_reg {1073876992 /* 0x40021000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_pwm_40021000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_reg_IDX_0 1073876992
#define DT_N_S_soc_S_pwm_40021000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_pwm_40021000_P_reg_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_center_aligned 0
#define DT_N_S_soc_S_pwm_40021000_P_center_aligned_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_idleout_supported 0
#define DT_N_S_soc_S_pwm_40021000_P_idleout_supported_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_status "disabled"
#define DT_N_S_soc_S_pwm_40021000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_pwm_40021000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_pwm_40021000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_pwm_40021000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_pwm_40021000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_pwm_40021000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_40021000, status, 0)
#define DT_N_S_soc_S_pwm_40021000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pwm_40021000, status, 0)
#define DT_N_S_soc_S_pwm_40021000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pwm_40021000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_40021000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pwm_40021000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_40021000_P_status_LEN 1
#define DT_N_S_soc_S_pwm_40021000_P_status_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_compatible {"nordic,nrf-pwm"}
#define DT_N_S_soc_S_pwm_40021000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_compatible_IDX_0 "nordic,nrf-pwm"
#define DT_N_S_soc_S_pwm_40021000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pwm
#define DT_N_S_soc_S_pwm_40021000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pwm
#define DT_N_S_soc_S_pwm_40021000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PWM
#define DT_N_S_soc_S_pwm_40021000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_40021000, compatible, 0)
#define DT_N_S_soc_S_pwm_40021000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pwm_40021000, compatible, 0)
#define DT_N_S_soc_S_pwm_40021000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pwm_40021000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_40021000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pwm_40021000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_40021000_P_compatible_LEN 1
#define DT_N_S_soc_S_pwm_40021000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_interrupts {33 /* 0x21 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_pwm_40021000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_interrupts_IDX_0 33
#define DT_N_S_soc_S_pwm_40021000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_pwm_40021000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_pwm_40021000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_wakeup_source 0
#define DT_N_S_soc_S_pwm_40021000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_pwm_40021000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/pwm@40022000
 *
 * Node identifier: DT_N_S_soc_S_pwm_40022000
 *
 * Binding (compatible = nordic,nrf-pwm):
 *   $ZEPHYR_BASE/dts/bindings/pwm/nordic,nrf-pwm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_pwm_40022000_PATH "/soc/pwm@40022000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_pwm_40022000_FULL_NAME "pwm@40022000"
#define DT_N_S_soc_S_pwm_40022000_FULL_NAME_UNQUOTED pwm@40022000
#define DT_N_S_soc_S_pwm_40022000_FULL_NAME_TOKEN pwm_40022000
#define DT_N_S_soc_S_pwm_40022000_FULL_NAME_UPPER_TOKEN PWM_40022000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_pwm_40022000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_pwm_40022000_CHILD_IDX 43

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_pwm_40022000_NODELABEL_NUM 1
#define DT_N_S_soc_S_pwm_40022000_FOREACH_NODELABEL(fn) fn(pwm2)
#define DT_N_S_soc_S_pwm_40022000_FOREACH_NODELABEL_VARGS(fn, ...) fn(pwm2, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_40022000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_pwm_40022000_CHILD_NUM 0
#define DT_N_S_soc_S_pwm_40022000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_pwm_40022000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_pwm_40022000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_pwm_40022000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_pwm_40022000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_pwm_40022000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_pwm_40022000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_pwm_40022000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_pwm_40022000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_pwm_40022000_HASH gNoZVxO8irS8II0y4fjBJgwVyNw2FrnkuIPfe6Yo5Sg

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_pwm_40022000_ORD 46
#define DT_N_S_soc_S_pwm_40022000_ORD_STR_SORTABLE 00046

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_pwm_40022000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_pwm_40022000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_pwm_40022000_EXISTS 1
#define DT_N_INST_2_nordic_nrf_pwm DT_N_S_soc_S_pwm_40022000
#define DT_N_NODELABEL_pwm2        DT_N_S_soc_S_pwm_40022000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_pwm_40022000_REG_NUM 1
#define DT_N_S_soc_S_pwm_40022000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_REG_IDX_0_VAL_ADDRESS 1073881088 /* 0x40022000 */
#define DT_N_S_soc_S_pwm_40022000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_pwm_40022000_RANGES_NUM 0
#define DT_N_S_soc_S_pwm_40022000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_pwm_40022000_IRQ_NUM 1
#define DT_N_S_soc_S_pwm_40022000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_IRQ_IDX_0_VAL_irq 34
#define DT_N_S_soc_S_pwm_40022000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_pwm_40022000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_pwm_40022000_IRQ_LEVEL 1
#define DT_N_S_soc_S_pwm_40022000_COMPAT_MATCHES_nordic_nrf_pwm 1
#define DT_N_S_soc_S_pwm_40022000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_pwm_40022000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_COMPAT_MODEL_IDX_0 "nrf-pwm"
#define DT_N_S_soc_S_pwm_40022000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_pwm_40022000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_pwm_40022000_P_reg {1073881088 /* 0x40022000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_pwm_40022000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_reg_IDX_0 1073881088
#define DT_N_S_soc_S_pwm_40022000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_pwm_40022000_P_reg_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_center_aligned 0
#define DT_N_S_soc_S_pwm_40022000_P_center_aligned_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_idleout_supported 0
#define DT_N_S_soc_S_pwm_40022000_P_idleout_supported_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_status "disabled"
#define DT_N_S_soc_S_pwm_40022000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_pwm_40022000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_pwm_40022000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_pwm_40022000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_pwm_40022000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_pwm_40022000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_40022000, status, 0)
#define DT_N_S_soc_S_pwm_40022000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pwm_40022000, status, 0)
#define DT_N_S_soc_S_pwm_40022000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pwm_40022000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_40022000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pwm_40022000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_40022000_P_status_LEN 1
#define DT_N_S_soc_S_pwm_40022000_P_status_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_compatible {"nordic,nrf-pwm"}
#define DT_N_S_soc_S_pwm_40022000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_compatible_IDX_0 "nordic,nrf-pwm"
#define DT_N_S_soc_S_pwm_40022000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-pwm
#define DT_N_S_soc_S_pwm_40022000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_pwm
#define DT_N_S_soc_S_pwm_40022000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_PWM
#define DT_N_S_soc_S_pwm_40022000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_40022000, compatible, 0)
#define DT_N_S_soc_S_pwm_40022000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pwm_40022000, compatible, 0)
#define DT_N_S_soc_S_pwm_40022000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pwm_40022000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_40022000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pwm_40022000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_pwm_40022000_P_compatible_LEN 1
#define DT_N_S_soc_S_pwm_40022000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_interrupts {34 /* 0x22 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_pwm_40022000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_interrupts_IDX_0 34
#define DT_N_S_soc_S_pwm_40022000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_pwm_40022000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_pwm_40022000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_wakeup_source 0
#define DT_N_S_soc_S_pwm_40022000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_pwm_40022000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/qdec@40012000
 *
 * Node identifier: DT_N_S_soc_S_qdec_40012000
 *
 * Binding (compatible = nordic,nrf-qdec):
 *   $ZEPHYR_BASE/dts/bindings/sensor/nordic,nrf-qdec.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_qdec_40012000_PATH "/soc/qdec@40012000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_qdec_40012000_FULL_NAME "qdec@40012000"
#define DT_N_S_soc_S_qdec_40012000_FULL_NAME_UNQUOTED qdec@40012000
#define DT_N_S_soc_S_qdec_40012000_FULL_NAME_TOKEN qdec_40012000
#define DT_N_S_soc_S_qdec_40012000_FULL_NAME_UPPER_TOKEN QDEC_40012000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_qdec_40012000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_qdec_40012000_CHILD_IDX 27

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_qdec_40012000_NODELABEL_NUM 2
#define DT_N_S_soc_S_qdec_40012000_FOREACH_NODELABEL(fn) fn(qdec) fn(qdec0)
#define DT_N_S_soc_S_qdec_40012000_FOREACH_NODELABEL_VARGS(fn, ...) fn(qdec, __VA_ARGS__) fn(qdec0, __VA_ARGS__)
#define DT_N_S_soc_S_qdec_40012000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_qdec_40012000_CHILD_NUM 0
#define DT_N_S_soc_S_qdec_40012000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_qdec_40012000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_qdec_40012000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_qdec_40012000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_qdec_40012000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_qdec_40012000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_qdec_40012000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_qdec_40012000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_qdec_40012000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_qdec_40012000_HASH VElv5vF_Ef3_I6zcFZ8aN0hMMiiZApVSzfXGFuhcHIU

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_qdec_40012000_ORD 47
#define DT_N_S_soc_S_qdec_40012000_ORD_STR_SORTABLE 00047

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_qdec_40012000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_qdec_40012000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_qdec_40012000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_qdec DT_N_S_soc_S_qdec_40012000
#define DT_N_NODELABEL_qdec         DT_N_S_soc_S_qdec_40012000
#define DT_N_NODELABEL_qdec0        DT_N_S_soc_S_qdec_40012000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_qdec_40012000_REG_NUM 1
#define DT_N_S_soc_S_qdec_40012000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_REG_IDX_0_VAL_ADDRESS 1073815552 /* 0x40012000 */
#define DT_N_S_soc_S_qdec_40012000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_qdec_40012000_RANGES_NUM 0
#define DT_N_S_soc_S_qdec_40012000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_qdec_40012000_IRQ_NUM 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_irq 18
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_qdec_40012000_IRQ_LEVEL 1
#define DT_N_S_soc_S_qdec_40012000_COMPAT_MATCHES_nordic_nrf_qdec 1
#define DT_N_S_soc_S_qdec_40012000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_qdec_40012000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_COMPAT_MODEL_IDX_0 "nrf-qdec"
#define DT_N_S_soc_S_qdec_40012000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_qdec_40012000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_qdec_40012000_P_reg {1073815552 /* 0x40012000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_0 1073815552
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_qdec_40012000_P_reg_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts {18 /* 0x12 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_0 18
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_status "disabled"
#define DT_N_S_soc_S_qdec_40012000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_qdec_40012000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_qdec_40012000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_qdec_40012000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_qdec_40012000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_qdec_40012000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qdec_40012000, status, 0)
#define DT_N_S_soc_S_qdec_40012000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_qdec_40012000, status, 0)
#define DT_N_S_soc_S_qdec_40012000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_qdec_40012000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_qdec_40012000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_qdec_40012000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_qdec_40012000_P_status_LEN 1
#define DT_N_S_soc_S_qdec_40012000_P_status_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_compatible {"nordic,nrf-qdec"}
#define DT_N_S_soc_S_qdec_40012000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_compatible_IDX_0 "nordic,nrf-qdec"
#define DT_N_S_soc_S_qdec_40012000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-qdec
#define DT_N_S_soc_S_qdec_40012000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_qdec
#define DT_N_S_soc_S_qdec_40012000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_QDEC
#define DT_N_S_soc_S_qdec_40012000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qdec_40012000, compatible, 0)
#define DT_N_S_soc_S_qdec_40012000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_qdec_40012000, compatible, 0)
#define DT_N_S_soc_S_qdec_40012000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_qdec_40012000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_qdec_40012000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_qdec_40012000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_qdec_40012000_P_compatible_LEN 1
#define DT_N_S_soc_S_qdec_40012000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_qdec_40012000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_wakeup_source 0
#define DT_N_S_soc_S_qdec_40012000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_qdec_40012000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/random@4000d000
 *
 * Node identifier: DT_N_S_soc_S_random_4000d000
 *
 * Binding (compatible = nordic,nrf-rng):
 *   $ZEPHYR_BASE/dts/bindings/rng/nordic,nrf-rng.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_random_4000d000_PATH "/soc/random@4000d000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_random_4000d000_FULL_NAME "random@4000d000"
#define DT_N_S_soc_S_random_4000d000_FULL_NAME_UNQUOTED random@4000d000
#define DT_N_S_soc_S_random_4000d000_FULL_NAME_TOKEN random_4000d000
#define DT_N_S_soc_S_random_4000d000_FULL_NAME_UPPER_TOKEN RANDOM_4000D000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_random_4000d000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_random_4000d000_CHILD_IDX 22

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_random_4000d000_NODELABEL_NUM 1
#define DT_N_S_soc_S_random_4000d000_FOREACH_NODELABEL(fn) fn(rng)
#define DT_N_S_soc_S_random_4000d000_FOREACH_NODELABEL_VARGS(fn, ...) fn(rng, __VA_ARGS__)
#define DT_N_S_soc_S_random_4000d000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_random_4000d000_CHILD_NUM 0
#define DT_N_S_soc_S_random_4000d000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_random_4000d000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_random_4000d000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_random_4000d000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_random_4000d000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_random_4000d000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_random_4000d000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_random_4000d000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_random_4000d000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_random_4000d000_HASH HugY6543deJoL1MEPqkojlUgB5d9EbMH_3mfbwbryg4

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_random_4000d000_ORD 48
#define DT_N_S_soc_S_random_4000d000_ORD_STR_SORTABLE 00048

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_random_4000d000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_random_4000d000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_random_4000d000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_rng DT_N_S_soc_S_random_4000d000
#define DT_N_NODELABEL_rng         DT_N_S_soc_S_random_4000d000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_random_4000d000_REG_NUM 1
#define DT_N_S_soc_S_random_4000d000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_REG_IDX_0_VAL_ADDRESS 1073795072 /* 0x4000d000 */
#define DT_N_S_soc_S_random_4000d000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_random_4000d000_RANGES_NUM 0
#define DT_N_S_soc_S_random_4000d000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_random_4000d000_IRQ_NUM 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_irq 13
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_random_4000d000_IRQ_LEVEL 1
#define DT_N_S_soc_S_random_4000d000_COMPAT_MATCHES_nordic_nrf_rng 1
#define DT_N_S_soc_S_random_4000d000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_random_4000d000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_COMPAT_MODEL_IDX_0 "nrf-rng"
#define DT_N_S_soc_S_random_4000d000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_random_4000d000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_random_4000d000_P_reg {1073795072 /* 0x4000d000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_0 1073795072
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_random_4000d000_P_reg_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts {13 /* 0xd */, 1 /* 0x1 */}
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_0 13
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_status "okay"
#define DT_N_S_soc_S_random_4000d000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_random_4000d000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_random_4000d000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_random_4000d000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_random_4000d000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_random_4000d000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_random_4000d000, status, 0)
#define DT_N_S_soc_S_random_4000d000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_random_4000d000, status, 0)
#define DT_N_S_soc_S_random_4000d000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_random_4000d000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_random_4000d000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_random_4000d000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_random_4000d000_P_status_LEN 1
#define DT_N_S_soc_S_random_4000d000_P_status_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_compatible {"nordic,nrf-rng"}
#define DT_N_S_soc_S_random_4000d000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_compatible_IDX_0 "nordic,nrf-rng"
#define DT_N_S_soc_S_random_4000d000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-rng
#define DT_N_S_soc_S_random_4000d000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_rng
#define DT_N_S_soc_S_random_4000d000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_RNG
#define DT_N_S_soc_S_random_4000d000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_random_4000d000, compatible, 0)
#define DT_N_S_soc_S_random_4000d000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_random_4000d000, compatible, 0)
#define DT_N_S_soc_S_random_4000d000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_random_4000d000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_random_4000d000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_random_4000d000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_random_4000d000_P_compatible_LEN 1
#define DT_N_S_soc_S_random_4000d000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_random_4000d000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_wakeup_source 0
#define DT_N_S_soc_S_random_4000d000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_random_4000d000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/rtc@4000b000
 *
 * Node identifier: DT_N_S_soc_S_rtc_4000b000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   $ZEPHYR_BASE/dts/bindings/rtc/nordic,nrf-rtc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_rtc_4000b000_PATH "/soc/rtc@4000b000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_rtc_4000b000_FULL_NAME "rtc@4000b000"
#define DT_N_S_soc_S_rtc_4000b000_FULL_NAME_UNQUOTED rtc@4000b000
#define DT_N_S_soc_S_rtc_4000b000_FULL_NAME_TOKEN rtc_4000b000
#define DT_N_S_soc_S_rtc_4000b000_FULL_NAME_UPPER_TOKEN RTC_4000B000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_rtc_4000b000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_rtc_4000b000_CHILD_IDX 20

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_rtc_4000b000_NODELABEL_NUM 1
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_NODELABEL(fn) fn(rtc0)
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_NODELABEL_VARGS(fn, ...) fn(rtc0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_rtc_4000b000_CHILD_NUM 0
#define DT_N_S_soc_S_rtc_4000b000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_rtc_4000b000_HASH mZLEaZAFf_m98BZSWtbgNKExDBEqvnHMbbsI0vM_9PQ

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_rtc_4000b000_ORD 49
#define DT_N_S_soc_S_rtc_4000b000_ORD_STR_SORTABLE 00049

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_rtc_4000b000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_rtc_4000b000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_rtc_4000b000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_rtc DT_N_S_soc_S_rtc_4000b000
#define DT_N_NODELABEL_rtc0        DT_N_S_soc_S_rtc_4000b000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_rtc_4000b000_REG_NUM 1
#define DT_N_S_soc_S_rtc_4000b000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_REG_IDX_0_VAL_ADDRESS 1073786880 /* 0x4000b000 */
#define DT_N_S_soc_S_rtc_4000b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_rtc_4000b000_RANGES_NUM 0
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_rtc_4000b000_IRQ_NUM 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_irq 11
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_rtc_4000b000_IRQ_LEVEL 1
#define DT_N_S_soc_S_rtc_4000b000_COMPAT_MATCHES_nordic_nrf_rtc 1
#define DT_N_S_soc_S_rtc_4000b000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_rtc_4000b000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_COMPAT_MODEL_IDX_0 "nrf-rtc"
#define DT_N_S_soc_S_rtc_4000b000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_rtc_4000b000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_rtc_4000b000_P_reg {1073786880 /* 0x4000b000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_0 1073786880
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_rtc_4000b000_P_reg_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_cc_num 3
#define DT_N_S_soc_S_rtc_4000b000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_ppi_wrap 0
#define DT_N_S_soc_S_rtc_4000b000_P_ppi_wrap_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_fixed_top 0
#define DT_N_S_soc_S_rtc_4000b000_P_fixed_top_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_zli 0
#define DT_N_S_soc_S_rtc_4000b000_P_zli_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_clock_frequency 32768
#define DT_N_S_soc_S_rtc_4000b000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts {11 /* 0xb */, 1 /* 0x1 */}
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_0 11
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_prescaler 1
#define DT_N_S_soc_S_rtc_4000b000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_status "disabled"
#define DT_N_S_soc_S_rtc_4000b000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_rtc_4000b000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_rtc_4000b000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_rtc_4000b000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_rtc_4000b000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_rtc_4000b000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_4000b000, status, 0)
#define DT_N_S_soc_S_rtc_4000b000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_4000b000, status, 0)
#define DT_N_S_soc_S_rtc_4000b000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_4000b000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_4000b000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rtc_4000b000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_4000b000_P_status_LEN 1
#define DT_N_S_soc_S_rtc_4000b000_P_status_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_compatible {"nordic,nrf-rtc"}
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_IDX_0 "nordic,nrf-rtc"
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-rtc
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_rtc
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_RTC
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_4000b000, compatible, 0)
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_4000b000, compatible, 0)
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_4000b000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rtc_4000b000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_LEN 1
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_rtc_4000b000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_wakeup_source 0
#define DT_N_S_soc_S_rtc_4000b000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_rtc_4000b000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/rtc@40011000
 *
 * Node identifier: DT_N_S_soc_S_rtc_40011000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   $ZEPHYR_BASE/dts/bindings/rtc/nordic,nrf-rtc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_rtc_40011000_PATH "/soc/rtc@40011000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_rtc_40011000_FULL_NAME "rtc@40011000"
#define DT_N_S_soc_S_rtc_40011000_FULL_NAME_UNQUOTED rtc@40011000
#define DT_N_S_soc_S_rtc_40011000_FULL_NAME_TOKEN rtc_40011000
#define DT_N_S_soc_S_rtc_40011000_FULL_NAME_UPPER_TOKEN RTC_40011000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_rtc_40011000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_rtc_40011000_CHILD_IDX 26

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_rtc_40011000_NODELABEL_NUM 1
#define DT_N_S_soc_S_rtc_40011000_FOREACH_NODELABEL(fn) fn(rtc1)
#define DT_N_S_soc_S_rtc_40011000_FOREACH_NODELABEL_VARGS(fn, ...) fn(rtc1, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_40011000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_rtc_40011000_CHILD_NUM 0
#define DT_N_S_soc_S_rtc_40011000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_rtc_40011000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_rtc_40011000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_rtc_40011000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_rtc_40011000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_rtc_40011000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_rtc_40011000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_rtc_40011000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_rtc_40011000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_rtc_40011000_HASH tj4ySXplksaoUQf5ERYnW_7Pk6dsYwlb0WfCIZhNSnA

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_rtc_40011000_ORD 50
#define DT_N_S_soc_S_rtc_40011000_ORD_STR_SORTABLE 00050

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_rtc_40011000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_rtc_40011000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_rtc_40011000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_rtc DT_N_S_soc_S_rtc_40011000
#define DT_N_NODELABEL_rtc1        DT_N_S_soc_S_rtc_40011000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_rtc_40011000_REG_NUM 1
#define DT_N_S_soc_S_rtc_40011000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_REG_IDX_0_VAL_ADDRESS 1073811456 /* 0x40011000 */
#define DT_N_S_soc_S_rtc_40011000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_rtc_40011000_RANGES_NUM 0
#define DT_N_S_soc_S_rtc_40011000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_rtc_40011000_IRQ_NUM 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_irq 17
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_rtc_40011000_IRQ_LEVEL 1
#define DT_N_S_soc_S_rtc_40011000_COMPAT_MATCHES_nordic_nrf_rtc 1
#define DT_N_S_soc_S_rtc_40011000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_rtc_40011000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_COMPAT_MODEL_IDX_0 "nrf-rtc"
#define DT_N_S_soc_S_rtc_40011000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_rtc_40011000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_rtc_40011000_P_reg {1073811456 /* 0x40011000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_0 1073811456
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_rtc_40011000_P_reg_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_cc_num 4
#define DT_N_S_soc_S_rtc_40011000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_ppi_wrap 0
#define DT_N_S_soc_S_rtc_40011000_P_ppi_wrap_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_fixed_top 0
#define DT_N_S_soc_S_rtc_40011000_P_fixed_top_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_zli 0
#define DT_N_S_soc_S_rtc_40011000_P_zli_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_clock_frequency 32768
#define DT_N_S_soc_S_rtc_40011000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts {17 /* 0x11 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_0 17
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_prescaler 1
#define DT_N_S_soc_S_rtc_40011000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_status "disabled"
#define DT_N_S_soc_S_rtc_40011000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_rtc_40011000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_rtc_40011000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_rtc_40011000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_rtc_40011000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_rtc_40011000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40011000, status, 0)
#define DT_N_S_soc_S_rtc_40011000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_40011000, status, 0)
#define DT_N_S_soc_S_rtc_40011000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_40011000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_40011000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rtc_40011000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_40011000_P_status_LEN 1
#define DT_N_S_soc_S_rtc_40011000_P_status_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_compatible {"nordic,nrf-rtc"}
#define DT_N_S_soc_S_rtc_40011000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_compatible_IDX_0 "nordic,nrf-rtc"
#define DT_N_S_soc_S_rtc_40011000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-rtc
#define DT_N_S_soc_S_rtc_40011000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_rtc
#define DT_N_S_soc_S_rtc_40011000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_RTC
#define DT_N_S_soc_S_rtc_40011000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40011000, compatible, 0)
#define DT_N_S_soc_S_rtc_40011000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_40011000, compatible, 0)
#define DT_N_S_soc_S_rtc_40011000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_40011000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_40011000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rtc_40011000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_40011000_P_compatible_LEN 1
#define DT_N_S_soc_S_rtc_40011000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_rtc_40011000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_wakeup_source 0
#define DT_N_S_soc_S_rtc_40011000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_rtc_40011000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/rtc@40024000
 *
 * Node identifier: DT_N_S_soc_S_rtc_40024000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   $ZEPHYR_BASE/dts/bindings/rtc/nordic,nrf-rtc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_rtc_40024000_PATH "/soc/rtc@40024000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_rtc_40024000_FULL_NAME "rtc@40024000"
#define DT_N_S_soc_S_rtc_40024000_FULL_NAME_UNQUOTED rtc@40024000
#define DT_N_S_soc_S_rtc_40024000_FULL_NAME_TOKEN rtc_40024000
#define DT_N_S_soc_S_rtc_40024000_FULL_NAME_UPPER_TOKEN RTC_40024000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_rtc_40024000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_rtc_40024000_CHILD_IDX 45

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_rtc_40024000_NODELABEL_NUM 1
#define DT_N_S_soc_S_rtc_40024000_FOREACH_NODELABEL(fn) fn(rtc2)
#define DT_N_S_soc_S_rtc_40024000_FOREACH_NODELABEL_VARGS(fn, ...) fn(rtc2, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_40024000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_rtc_40024000_CHILD_NUM 0
#define DT_N_S_soc_S_rtc_40024000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_rtc_40024000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_rtc_40024000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_rtc_40024000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_rtc_40024000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_rtc_40024000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_rtc_40024000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_rtc_40024000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_rtc_40024000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_rtc_40024000_HASH OGJdq88N6dKe4lPooQj_t4vi5OmO6p6pS3PYPrvc9go

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_rtc_40024000_ORD 51
#define DT_N_S_soc_S_rtc_40024000_ORD_STR_SORTABLE 00051

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_rtc_40024000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_rtc_40024000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_rtc_40024000_EXISTS 1
#define DT_N_INST_2_nordic_nrf_rtc DT_N_S_soc_S_rtc_40024000
#define DT_N_NODELABEL_rtc2        DT_N_S_soc_S_rtc_40024000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_rtc_40024000_REG_NUM 1
#define DT_N_S_soc_S_rtc_40024000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_REG_IDX_0_VAL_ADDRESS 1073889280 /* 0x40024000 */
#define DT_N_S_soc_S_rtc_40024000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_rtc_40024000_RANGES_NUM 0
#define DT_N_S_soc_S_rtc_40024000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_rtc_40024000_IRQ_NUM 1
#define DT_N_S_soc_S_rtc_40024000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_IRQ_IDX_0_VAL_irq 36
#define DT_N_S_soc_S_rtc_40024000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_rtc_40024000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_rtc_40024000_IRQ_LEVEL 1
#define DT_N_S_soc_S_rtc_40024000_COMPAT_MATCHES_nordic_nrf_rtc 1
#define DT_N_S_soc_S_rtc_40024000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_rtc_40024000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_COMPAT_MODEL_IDX_0 "nrf-rtc"
#define DT_N_S_soc_S_rtc_40024000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_rtc_40024000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_rtc_40024000_P_reg {1073889280 /* 0x40024000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_rtc_40024000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_reg_IDX_0 1073889280
#define DT_N_S_soc_S_rtc_40024000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_rtc_40024000_P_reg_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_cc_num 4
#define DT_N_S_soc_S_rtc_40024000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_ppi_wrap 0
#define DT_N_S_soc_S_rtc_40024000_P_ppi_wrap_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_fixed_top 0
#define DT_N_S_soc_S_rtc_40024000_P_fixed_top_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_zli 0
#define DT_N_S_soc_S_rtc_40024000_P_zli_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_clock_frequency 32768
#define DT_N_S_soc_S_rtc_40024000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_interrupts {36 /* 0x24 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_rtc_40024000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_interrupts_IDX_0 36
#define DT_N_S_soc_S_rtc_40024000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_rtc_40024000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_prescaler 1
#define DT_N_S_soc_S_rtc_40024000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_status "disabled"
#define DT_N_S_soc_S_rtc_40024000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_rtc_40024000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_rtc_40024000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_rtc_40024000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_rtc_40024000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_rtc_40024000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40024000, status, 0)
#define DT_N_S_soc_S_rtc_40024000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_40024000, status, 0)
#define DT_N_S_soc_S_rtc_40024000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_40024000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_40024000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rtc_40024000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_40024000_P_status_LEN 1
#define DT_N_S_soc_S_rtc_40024000_P_status_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_compatible {"nordic,nrf-rtc"}
#define DT_N_S_soc_S_rtc_40024000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_compatible_IDX_0 "nordic,nrf-rtc"
#define DT_N_S_soc_S_rtc_40024000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-rtc
#define DT_N_S_soc_S_rtc_40024000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_rtc
#define DT_N_S_soc_S_rtc_40024000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_RTC
#define DT_N_S_soc_S_rtc_40024000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40024000, compatible, 0)
#define DT_N_S_soc_S_rtc_40024000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rtc_40024000, compatible, 0)
#define DT_N_S_soc_S_rtc_40024000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rtc_40024000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_40024000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rtc_40024000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_rtc_40024000_P_compatible_LEN 1
#define DT_N_S_soc_S_rtc_40024000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_rtc_40024000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_wakeup_source 0
#define DT_N_S_soc_S_rtc_40024000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_rtc_40024000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/spi@40003000
 *
 * Node identifier: DT_N_S_soc_S_spi_40003000
 *
 * Binding (compatible = nordic,nrf-spi):
 *   $ZEPHYR_BASE/dts/bindings/spi/nordic,nrf-spi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_spi_40003000_PATH "/soc/spi@40003000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_spi_40003000_FULL_NAME "spi@40003000"
#define DT_N_S_soc_S_spi_40003000_FULL_NAME_UNQUOTED spi@40003000
#define DT_N_S_soc_S_spi_40003000_FULL_NAME_TOKEN spi_40003000
#define DT_N_S_soc_S_spi_40003000_FULL_NAME_UPPER_TOKEN SPI_40003000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_spi_40003000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_spi_40003000_CHILD_IDX 11

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_spi_40003000_NODELABEL_NUM 1
#define DT_N_S_soc_S_spi_40003000_FOREACH_NODELABEL(fn) fn(spi0)
#define DT_N_S_soc_S_spi_40003000_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40003000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_spi_40003000_CHILD_NUM 0
#define DT_N_S_soc_S_spi_40003000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_spi_40003000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_spi_40003000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_spi_40003000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_spi_40003000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_spi_40003000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_spi_40003000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_spi_40003000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_spi_40003000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_spi_40003000_HASH kjiFEWzA__24aXGWIixMGP8icmqfoEI5FnmWvvsfqS0

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_spi_40003000_ORD 52
#define DT_N_S_soc_S_spi_40003000_ORD_STR_SORTABLE 00052

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_spi_40003000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_spi_40003000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_spi_40003000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_spi DT_N_S_soc_S_spi_40003000
#define DT_N_NODELABEL_spi0        DT_N_S_soc_S_spi_40003000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_spi_40003000_REG_NUM 1
#define DT_N_S_soc_S_spi_40003000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_REG_IDX_0_VAL_ADDRESS 1073754112 /* 0x40003000 */
#define DT_N_S_soc_S_spi_40003000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_spi_40003000_RANGES_NUM 0
#define DT_N_S_soc_S_spi_40003000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_spi_40003000_IRQ_NUM 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_irq 3
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_spi_40003000_IRQ_LEVEL 1
#define DT_N_S_soc_S_spi_40003000_COMPAT_MATCHES_nordic_nrf_spi 1
#define DT_N_S_soc_S_spi_40003000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_spi_40003000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_COMPAT_MODEL_IDX_0 "nrf-spi"
#define DT_N_S_soc_S_spi_40003000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_spi_40003000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_spi_40003000_P_reg {1073754112 /* 0x40003000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_0 1073754112
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_spi_40003000_P_reg_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts {3 /* 0x3 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_0 3
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_max_frequency 8000000
#define DT_N_S_soc_S_spi_40003000_P_max_frequency_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_overrun_character 255
#define DT_N_S_soc_S_spi_40003000_P_overrun_character_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_easydma_maxcnt_bits 8
#define DT_N_S_soc_S_spi_40003000_P_easydma_maxcnt_bits_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_cross_domain_pins_supported 0
#define DT_N_S_soc_S_spi_40003000_P_cross_domain_pins_supported_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_status "disabled"
#define DT_N_S_soc_S_spi_40003000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_spi_40003000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_spi_40003000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_spi_40003000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_spi_40003000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_spi_40003000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003000, status, 0)
#define DT_N_S_soc_S_spi_40003000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003000, status, 0)
#define DT_N_S_soc_S_spi_40003000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40003000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40003000_P_status_LEN 1
#define DT_N_S_soc_S_spi_40003000_P_status_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_compatible {"nordic,nrf-spi"}
#define DT_N_S_soc_S_spi_40003000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_compatible_IDX_0 "nordic,nrf-spi"
#define DT_N_S_soc_S_spi_40003000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-spi
#define DT_N_S_soc_S_spi_40003000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_spi
#define DT_N_S_soc_S_spi_40003000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SPI
#define DT_N_S_soc_S_spi_40003000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003000, compatible, 0)
#define DT_N_S_soc_S_spi_40003000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003000, compatible, 0)
#define DT_N_S_soc_S_spi_40003000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40003000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40003000_P_compatible_LEN 1
#define DT_N_S_soc_S_spi_40003000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_spi_40003000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_wakeup_source 0
#define DT_N_S_soc_S_spi_40003000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_spi_40003000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/spi@40004000
 *
 * Node identifier: DT_N_S_soc_S_spi_40004000
 *
 * Binding (compatible = nordic,nrf-spi):
 *   $ZEPHYR_BASE/dts/bindings/spi/nordic,nrf-spi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_spi_40004000_PATH "/soc/spi@40004000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_spi_40004000_FULL_NAME "spi@40004000"
#define DT_N_S_soc_S_spi_40004000_FULL_NAME_UNQUOTED spi@40004000
#define DT_N_S_soc_S_spi_40004000_FULL_NAME_TOKEN spi_40004000
#define DT_N_S_soc_S_spi_40004000_FULL_NAME_UPPER_TOKEN SPI_40004000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_spi_40004000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_spi_40004000_CHILD_IDX 13

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_spi_40004000_NODELABEL_NUM 1
#define DT_N_S_soc_S_spi_40004000_FOREACH_NODELABEL(fn) fn(spi1)
#define DT_N_S_soc_S_spi_40004000_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi1, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40004000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_spi_40004000_CHILD_NUM 0
#define DT_N_S_soc_S_spi_40004000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_spi_40004000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_spi_40004000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_spi_40004000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_spi_40004000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_spi_40004000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_spi_40004000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_spi_40004000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_spi_40004000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_spi_40004000_HASH qii9x_U6xlXtm4dv7b567iHa6R_sCzUhaIJmD7Ty6WI

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_spi_40004000_ORD 53
#define DT_N_S_soc_S_spi_40004000_ORD_STR_SORTABLE 00053

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_spi_40004000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_spi_40004000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_spi_40004000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_spi DT_N_S_soc_S_spi_40004000
#define DT_N_NODELABEL_spi1        DT_N_S_soc_S_spi_40004000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_spi_40004000_REG_NUM 1
#define DT_N_S_soc_S_spi_40004000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_REG_IDX_0_VAL_ADDRESS 1073758208 /* 0x40004000 */
#define DT_N_S_soc_S_spi_40004000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_spi_40004000_RANGES_NUM 0
#define DT_N_S_soc_S_spi_40004000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_spi_40004000_IRQ_NUM 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_irq 4
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_spi_40004000_IRQ_LEVEL 1
#define DT_N_S_soc_S_spi_40004000_COMPAT_MATCHES_nordic_nrf_spi 1
#define DT_N_S_soc_S_spi_40004000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_spi_40004000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_COMPAT_MODEL_IDX_0 "nrf-spi"
#define DT_N_S_soc_S_spi_40004000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_spi_40004000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_spi_40004000_P_reg {1073758208 /* 0x40004000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_0 1073758208
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_spi_40004000_P_reg_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts {4 /* 0x4 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_0 4
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_max_frequency 8000000
#define DT_N_S_soc_S_spi_40004000_P_max_frequency_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_overrun_character 255
#define DT_N_S_soc_S_spi_40004000_P_overrun_character_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_easydma_maxcnt_bits 8
#define DT_N_S_soc_S_spi_40004000_P_easydma_maxcnt_bits_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_cross_domain_pins_supported 0
#define DT_N_S_soc_S_spi_40004000_P_cross_domain_pins_supported_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_status "disabled"
#define DT_N_S_soc_S_spi_40004000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_spi_40004000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_spi_40004000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_spi_40004000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_spi_40004000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_spi_40004000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40004000, status, 0)
#define DT_N_S_soc_S_spi_40004000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40004000, status, 0)
#define DT_N_S_soc_S_spi_40004000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40004000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40004000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40004000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40004000_P_status_LEN 1
#define DT_N_S_soc_S_spi_40004000_P_status_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_compatible {"nordic,nrf-spi"}
#define DT_N_S_soc_S_spi_40004000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_compatible_IDX_0 "nordic,nrf-spi"
#define DT_N_S_soc_S_spi_40004000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-spi
#define DT_N_S_soc_S_spi_40004000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_spi
#define DT_N_S_soc_S_spi_40004000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SPI
#define DT_N_S_soc_S_spi_40004000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40004000, compatible, 0)
#define DT_N_S_soc_S_spi_40004000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40004000, compatible, 0)
#define DT_N_S_soc_S_spi_40004000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40004000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40004000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40004000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40004000_P_compatible_LEN 1
#define DT_N_S_soc_S_spi_40004000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_spi_40004000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_wakeup_source 0
#define DT_N_S_soc_S_spi_40004000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_spi_40004000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/spi@40023000
 *
 * Node identifier: DT_N_S_soc_S_spi_40023000
 *
 * Binding (compatible = nordic,nrf-spi):
 *   $ZEPHYR_BASE/dts/bindings/spi/nordic,nrf-spi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_spi_40023000_PATH "/soc/spi@40023000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_spi_40023000_FULL_NAME "spi@40023000"
#define DT_N_S_soc_S_spi_40023000_FULL_NAME_UNQUOTED spi@40023000
#define DT_N_S_soc_S_spi_40023000_FULL_NAME_TOKEN spi_40023000
#define DT_N_S_soc_S_spi_40023000_FULL_NAME_UPPER_TOKEN SPI_40023000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_spi_40023000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_spi_40023000_CHILD_IDX 44

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_spi_40023000_NODELABEL_NUM 1
#define DT_N_S_soc_S_spi_40023000_FOREACH_NODELABEL(fn) fn(spi2)
#define DT_N_S_soc_S_spi_40023000_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi2, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40023000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_spi_40023000_CHILD_NUM 0
#define DT_N_S_soc_S_spi_40023000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_spi_40023000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_spi_40023000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_spi_40023000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_spi_40023000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_spi_40023000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_spi_40023000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_spi_40023000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_spi_40023000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_spi_40023000_HASH tKKKETHG3TZcYpIF_ENoITT6BwgcNP6vFxs4KdbbBkk

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_spi_40023000_ORD 54
#define DT_N_S_soc_S_spi_40023000_ORD_STR_SORTABLE 00054

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_spi_40023000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_spi_40023000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_spi_40023000_EXISTS 1
#define DT_N_INST_2_nordic_nrf_spi DT_N_S_soc_S_spi_40023000
#define DT_N_NODELABEL_spi2        DT_N_S_soc_S_spi_40023000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_spi_40023000_REG_NUM 1
#define DT_N_S_soc_S_spi_40023000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_REG_IDX_0_VAL_ADDRESS 1073885184 /* 0x40023000 */
#define DT_N_S_soc_S_spi_40023000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_spi_40023000_RANGES_NUM 0
#define DT_N_S_soc_S_spi_40023000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_spi_40023000_IRQ_NUM 1
#define DT_N_S_soc_S_spi_40023000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_IRQ_IDX_0_VAL_irq 35
#define DT_N_S_soc_S_spi_40023000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_spi_40023000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_spi_40023000_IRQ_LEVEL 1
#define DT_N_S_soc_S_spi_40023000_COMPAT_MATCHES_nordic_nrf_spi 1
#define DT_N_S_soc_S_spi_40023000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_spi_40023000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_COMPAT_MODEL_IDX_0 "nrf-spi"
#define DT_N_S_soc_S_spi_40023000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_spi_40023000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_spi_40023000_P_reg {1073885184 /* 0x40023000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_spi_40023000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_reg_IDX_0 1073885184
#define DT_N_S_soc_S_spi_40023000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_spi_40023000_P_reg_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_interrupts {35 /* 0x23 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_spi_40023000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_interrupts_IDX_0 35
#define DT_N_S_soc_S_spi_40023000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_spi_40023000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_max_frequency 8000000
#define DT_N_S_soc_S_spi_40023000_P_max_frequency_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_overrun_character 255
#define DT_N_S_soc_S_spi_40023000_P_overrun_character_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_easydma_maxcnt_bits 8
#define DT_N_S_soc_S_spi_40023000_P_easydma_maxcnt_bits_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_cross_domain_pins_supported 0
#define DT_N_S_soc_S_spi_40023000_P_cross_domain_pins_supported_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_status "disabled"
#define DT_N_S_soc_S_spi_40023000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_spi_40023000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_spi_40023000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_spi_40023000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_spi_40023000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_spi_40023000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40023000, status, 0)
#define DT_N_S_soc_S_spi_40023000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40023000, status, 0)
#define DT_N_S_soc_S_spi_40023000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40023000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40023000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40023000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40023000_P_status_LEN 1
#define DT_N_S_soc_S_spi_40023000_P_status_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_compatible {"nordic,nrf-spi"}
#define DT_N_S_soc_S_spi_40023000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_compatible_IDX_0 "nordic,nrf-spi"
#define DT_N_S_soc_S_spi_40023000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-spi
#define DT_N_S_soc_S_spi_40023000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_spi
#define DT_N_S_soc_S_spi_40023000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_SPI
#define DT_N_S_soc_S_spi_40023000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40023000, compatible, 0)
#define DT_N_S_soc_S_spi_40023000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40023000, compatible, 0)
#define DT_N_S_soc_S_spi_40023000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40023000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40023000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40023000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_spi_40023000_P_compatible_LEN 1
#define DT_N_S_soc_S_spi_40023000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_spi_40023000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_wakeup_source 0
#define DT_N_S_soc_S_spi_40023000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_spi_40023000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/temp@4000c000
 *
 * Node identifier: DT_N_S_soc_S_temp_4000c000
 *
 * Binding (compatible = nordic,nrf-temp):
 *   $ZEPHYR_BASE/dts/bindings/sensor/nordic,nrf-temp.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_temp_4000c000_PATH "/soc/temp@4000c000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_temp_4000c000_FULL_NAME "temp@4000c000"
#define DT_N_S_soc_S_temp_4000c000_FULL_NAME_UNQUOTED temp@4000c000
#define DT_N_S_soc_S_temp_4000c000_FULL_NAME_TOKEN temp_4000c000
#define DT_N_S_soc_S_temp_4000c000_FULL_NAME_UPPER_TOKEN TEMP_4000C000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_temp_4000c000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_temp_4000c000_CHILD_IDX 21

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_temp_4000c000_NODELABEL_NUM 1
#define DT_N_S_soc_S_temp_4000c000_FOREACH_NODELABEL(fn) fn(temp)
#define DT_N_S_soc_S_temp_4000c000_FOREACH_NODELABEL_VARGS(fn, ...) fn(temp, __VA_ARGS__)
#define DT_N_S_soc_S_temp_4000c000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_temp_4000c000_CHILD_NUM 0
#define DT_N_S_soc_S_temp_4000c000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_temp_4000c000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_temp_4000c000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_temp_4000c000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_temp_4000c000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_temp_4000c000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_temp_4000c000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_temp_4000c000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_temp_4000c000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_temp_4000c000_HASH T0pRrslahsDdnOdIo1nnzFiaNIZ1FzS1_kGYz9f3K6s

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_temp_4000c000_ORD 55
#define DT_N_S_soc_S_temp_4000c000_ORD_STR_SORTABLE 00055

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_temp_4000c000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_temp_4000c000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_temp_4000c000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_temp DT_N_S_soc_S_temp_4000c000
#define DT_N_NODELABEL_temp         DT_N_S_soc_S_temp_4000c000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_temp_4000c000_REG_NUM 1
#define DT_N_S_soc_S_temp_4000c000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_REG_IDX_0_VAL_ADDRESS 1073790976 /* 0x4000c000 */
#define DT_N_S_soc_S_temp_4000c000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_temp_4000c000_RANGES_NUM 0
#define DT_N_S_soc_S_temp_4000c000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_temp_4000c000_IRQ_NUM 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_irq 12
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_temp_4000c000_IRQ_LEVEL 1
#define DT_N_S_soc_S_temp_4000c000_COMPAT_MATCHES_nordic_nrf_temp 1
#define DT_N_S_soc_S_temp_4000c000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_temp_4000c000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_COMPAT_MODEL_IDX_0 "nrf-temp"
#define DT_N_S_soc_S_temp_4000c000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_temp_4000c000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_temp_4000c000_P_reg {1073790976 /* 0x4000c000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_0 1073790976
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_temp_4000c000_P_reg_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts {12 /* 0xc */, 1 /* 0x1 */}
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_0 12
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_status "disabled"
#define DT_N_S_soc_S_temp_4000c000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_temp_4000c000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_temp_4000c000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_temp_4000c000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_temp_4000c000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_temp_4000c000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_temp_4000c000, status, 0)
#define DT_N_S_soc_S_temp_4000c000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_temp_4000c000, status, 0)
#define DT_N_S_soc_S_temp_4000c000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_temp_4000c000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_temp_4000c000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_temp_4000c000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_temp_4000c000_P_status_LEN 1
#define DT_N_S_soc_S_temp_4000c000_P_status_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_compatible {"nordic,nrf-temp"}
#define DT_N_S_soc_S_temp_4000c000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_compatible_IDX_0 "nordic,nrf-temp"
#define DT_N_S_soc_S_temp_4000c000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-temp
#define DT_N_S_soc_S_temp_4000c000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_temp
#define DT_N_S_soc_S_temp_4000c000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TEMP
#define DT_N_S_soc_S_temp_4000c000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_temp_4000c000, compatible, 0)
#define DT_N_S_soc_S_temp_4000c000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_temp_4000c000, compatible, 0)
#define DT_N_S_soc_S_temp_4000c000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_temp_4000c000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_temp_4000c000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_temp_4000c000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_temp_4000c000_P_compatible_LEN 1
#define DT_N_S_soc_S_temp_4000c000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_temp_4000c000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_wakeup_source 0
#define DT_N_S_soc_S_temp_4000c000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_temp_4000c000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/timer@40008000
 *
 * Node identifier: DT_N_S_soc_S_timer_40008000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE/dts/bindings/counter/nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_40008000_PATH "/soc/timer@40008000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_40008000_FULL_NAME "timer@40008000"
#define DT_N_S_soc_S_timer_40008000_FULL_NAME_UNQUOTED timer@40008000
#define DT_N_S_soc_S_timer_40008000_FULL_NAME_TOKEN timer_40008000
#define DT_N_S_soc_S_timer_40008000_FULL_NAME_UPPER_TOKEN TIMER_40008000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_40008000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_timer_40008000_CHILD_IDX 17

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_timer_40008000_NODELABEL_NUM 1
#define DT_N_S_soc_S_timer_40008000_FOREACH_NODELABEL(fn) fn(timer0)
#define DT_N_S_soc_S_timer_40008000_FOREACH_NODELABEL_VARGS(fn, ...) fn(timer0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40008000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_timer_40008000_CHILD_NUM 0
#define DT_N_S_soc_S_timer_40008000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_timer_40008000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_40008000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_40008000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_40008000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_timer_40008000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_timer_40008000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_40008000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_40008000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_timer_40008000_HASH XCzECSHKjRkeN4aNEgXg57v3t68j6ZUXXw_YRBjfNUo

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_40008000_ORD 56
#define DT_N_S_soc_S_timer_40008000_ORD_STR_SORTABLE 00056

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_40008000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_40008000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_40008000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_timer DT_N_S_soc_S_timer_40008000
#define DT_N_NODELABEL_timer0        DT_N_S_soc_S_timer_40008000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_timer_40008000_REG_NUM 1
#define DT_N_S_soc_S_timer_40008000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_REG_IDX_0_VAL_ADDRESS 1073774592 /* 0x40008000 */
#define DT_N_S_soc_S_timer_40008000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_40008000_RANGES_NUM 0
#define DT_N_S_soc_S_timer_40008000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_timer_40008000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_irq 8
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_timer_40008000_IRQ_LEVEL 1
#define DT_N_S_soc_S_timer_40008000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_40008000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_timer_40008000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_COMPAT_MODEL_IDX_0 "nrf-timer"
#define DT_N_S_soc_S_timer_40008000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_timer_40008000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_timer_40008000_P_reg {1073774592 /* 0x40008000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_0 1073774592
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_40008000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_cc_num 4
#define DT_N_S_soc_S_timer_40008000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_max_bit_width 32
#define DT_N_S_soc_S_timer_40008000_P_max_bit_width_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts {8 /* 0x8 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_0 8
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_prescaler 0
#define DT_N_S_soc_S_timer_40008000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_zli 0
#define DT_N_S_soc_S_timer_40008000_P_zli_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_status "disabled"
#define DT_N_S_soc_S_timer_40008000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_timer_40008000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_timer_40008000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_timer_40008000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_timer_40008000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_timer_40008000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40008000, status, 0)
#define DT_N_S_soc_S_timer_40008000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_40008000, status, 0)
#define DT_N_S_soc_S_timer_40008000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_40008000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40008000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_40008000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40008000_P_status_LEN 1
#define DT_N_S_soc_S_timer_40008000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_40008000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_40008000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-timer
#define DT_N_S_soc_S_timer_40008000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_timer
#define DT_N_S_soc_S_timer_40008000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TIMER
#define DT_N_S_soc_S_timer_40008000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40008000, compatible, 0)
#define DT_N_S_soc_S_timer_40008000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_40008000, compatible, 0)
#define DT_N_S_soc_S_timer_40008000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_40008000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40008000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_40008000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_40008000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_40008000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_timer_40008000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_wakeup_source 0
#define DT_N_S_soc_S_timer_40008000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_timer_40008000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/timer@4000a000
 *
 * Node identifier: DT_N_S_soc_S_timer_4000a000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE/dts/bindings/counter/nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_4000a000_PATH "/soc/timer@4000a000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_4000a000_FULL_NAME "timer@4000a000"
#define DT_N_S_soc_S_timer_4000a000_FULL_NAME_UNQUOTED timer@4000a000
#define DT_N_S_soc_S_timer_4000a000_FULL_NAME_TOKEN timer_4000a000
#define DT_N_S_soc_S_timer_4000a000_FULL_NAME_UPPER_TOKEN TIMER_4000A000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_4000a000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_timer_4000a000_CHILD_IDX 19

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_timer_4000a000_NODELABEL_NUM 1
#define DT_N_S_soc_S_timer_4000a000_FOREACH_NODELABEL(fn) fn(timer2)
#define DT_N_S_soc_S_timer_4000a000_FOREACH_NODELABEL_VARGS(fn, ...) fn(timer2, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4000a000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_timer_4000a000_CHILD_NUM 0
#define DT_N_S_soc_S_timer_4000a000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_timer_4000a000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_4000a000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_4000a000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_4000a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_timer_4000a000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_timer_4000a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_4000a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_4000a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_timer_4000a000_HASH __C_u4LSRY6ogG5xUr9B3U0iwW0BU7sCyxU_m9INcKU

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_4000a000_ORD 57
#define DT_N_S_soc_S_timer_4000a000_ORD_STR_SORTABLE 00057

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_4000a000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_4000a000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_4000a000_EXISTS 1
#define DT_N_INST_2_nordic_nrf_timer DT_N_S_soc_S_timer_4000a000
#define DT_N_NODELABEL_timer2        DT_N_S_soc_S_timer_4000a000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_timer_4000a000_REG_NUM 1
#define DT_N_S_soc_S_timer_4000a000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_REG_IDX_0_VAL_ADDRESS 1073782784 /* 0x4000a000 */
#define DT_N_S_soc_S_timer_4000a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_4000a000_RANGES_NUM 0
#define DT_N_S_soc_S_timer_4000a000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_timer_4000a000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_irq 10
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_timer_4000a000_IRQ_LEVEL 1
#define DT_N_S_soc_S_timer_4000a000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_4000a000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_timer_4000a000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_COMPAT_MODEL_IDX_0 "nrf-timer"
#define DT_N_S_soc_S_timer_4000a000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_timer_4000a000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_timer_4000a000_P_reg {1073782784 /* 0x4000a000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_0 1073782784
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_4000a000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_cc_num 4
#define DT_N_S_soc_S_timer_4000a000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_max_bit_width 32
#define DT_N_S_soc_S_timer_4000a000_P_max_bit_width_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts {10 /* 0xa */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_0 10
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_prescaler 0
#define DT_N_S_soc_S_timer_4000a000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_zli 0
#define DT_N_S_soc_S_timer_4000a000_P_zli_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_status "disabled"
#define DT_N_S_soc_S_timer_4000a000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_timer_4000a000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_timer_4000a000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_timer_4000a000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_timer_4000a000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_timer_4000a000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4000a000, status, 0)
#define DT_N_S_soc_S_timer_4000a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_4000a000, status, 0)
#define DT_N_S_soc_S_timer_4000a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_4000a000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4000a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_4000a000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4000a000_P_status_LEN 1
#define DT_N_S_soc_S_timer_4000a000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_4000a000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_4000a000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-timer
#define DT_N_S_soc_S_timer_4000a000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_timer
#define DT_N_S_soc_S_timer_4000a000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TIMER
#define DT_N_S_soc_S_timer_4000a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4000a000, compatible, 0)
#define DT_N_S_soc_S_timer_4000a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_4000a000, compatible, 0)
#define DT_N_S_soc_S_timer_4000a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_4000a000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4000a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_4000a000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4000a000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_4000a000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_timer_4000a000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_wakeup_source 0
#define DT_N_S_soc_S_timer_4000a000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_timer_4000a000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/timer@4001a000
 *
 * Node identifier: DT_N_S_soc_S_timer_4001a000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE/dts/bindings/counter/nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_4001a000_PATH "/soc/timer@4001a000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_4001a000_FULL_NAME "timer@4001a000"
#define DT_N_S_soc_S_timer_4001a000_FULL_NAME_UNQUOTED timer@4001a000
#define DT_N_S_soc_S_timer_4001a000_FULL_NAME_TOKEN timer_4001a000
#define DT_N_S_soc_S_timer_4001a000_FULL_NAME_UPPER_TOKEN TIMER_4001A000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_4001a000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_timer_4001a000_CHILD_IDX 35

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_timer_4001a000_NODELABEL_NUM 1
#define DT_N_S_soc_S_timer_4001a000_FOREACH_NODELABEL(fn) fn(timer3)
#define DT_N_S_soc_S_timer_4001a000_FOREACH_NODELABEL_VARGS(fn, ...) fn(timer3, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4001a000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_timer_4001a000_CHILD_NUM 0
#define DT_N_S_soc_S_timer_4001a000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_timer_4001a000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_4001a000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_4001a000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_4001a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_timer_4001a000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_timer_4001a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_4001a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_4001a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_timer_4001a000_HASH AViRQLSpuuxlBlFUhHqqWaKpQA_Hs9UiYRILOw3vbDE

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_4001a000_ORD 58
#define DT_N_S_soc_S_timer_4001a000_ORD_STR_SORTABLE 00058

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_4001a000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_4001a000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_4001a000_EXISTS 1
#define DT_N_INST_3_nordic_nrf_timer DT_N_S_soc_S_timer_4001a000
#define DT_N_NODELABEL_timer3        DT_N_S_soc_S_timer_4001a000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_timer_4001a000_REG_NUM 1
#define DT_N_S_soc_S_timer_4001a000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_REG_IDX_0_VAL_ADDRESS 1073848320 /* 0x4001a000 */
#define DT_N_S_soc_S_timer_4001a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_4001a000_RANGES_NUM 0
#define DT_N_S_soc_S_timer_4001a000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_timer_4001a000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_4001a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_IRQ_IDX_0_VAL_irq 26
#define DT_N_S_soc_S_timer_4001a000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_4001a000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_timer_4001a000_IRQ_LEVEL 1
#define DT_N_S_soc_S_timer_4001a000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_4001a000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_timer_4001a000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_COMPAT_MODEL_IDX_0 "nrf-timer"
#define DT_N_S_soc_S_timer_4001a000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_timer_4001a000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_timer_4001a000_P_reg {1073848320 /* 0x4001a000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_4001a000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_reg_IDX_0 1073848320
#define DT_N_S_soc_S_timer_4001a000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_4001a000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_cc_num 6
#define DT_N_S_soc_S_timer_4001a000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_max_bit_width 32
#define DT_N_S_soc_S_timer_4001a000_P_max_bit_width_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_interrupts {26 /* 0x1a */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_4001a000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_interrupts_IDX_0 26
#define DT_N_S_soc_S_timer_4001a000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_4001a000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_prescaler 0
#define DT_N_S_soc_S_timer_4001a000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_zli 0
#define DT_N_S_soc_S_timer_4001a000_P_zli_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_status "disabled"
#define DT_N_S_soc_S_timer_4001a000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_timer_4001a000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_timer_4001a000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_timer_4001a000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_timer_4001a000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_timer_4001a000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4001a000, status, 0)
#define DT_N_S_soc_S_timer_4001a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_4001a000, status, 0)
#define DT_N_S_soc_S_timer_4001a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_4001a000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4001a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_4001a000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4001a000_P_status_LEN 1
#define DT_N_S_soc_S_timer_4001a000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_4001a000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_4001a000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-timer
#define DT_N_S_soc_S_timer_4001a000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_timer
#define DT_N_S_soc_S_timer_4001a000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TIMER
#define DT_N_S_soc_S_timer_4001a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4001a000, compatible, 0)
#define DT_N_S_soc_S_timer_4001a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_4001a000, compatible, 0)
#define DT_N_S_soc_S_timer_4001a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_4001a000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4001a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_4001a000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4001a000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_4001a000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_timer_4001a000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_wakeup_source 0
#define DT_N_S_soc_S_timer_4001a000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_timer_4001a000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/timer@4001b000
 *
 * Node identifier: DT_N_S_soc_S_timer_4001b000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE/dts/bindings/counter/nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_4001b000_PATH "/soc/timer@4001b000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_4001b000_FULL_NAME "timer@4001b000"
#define DT_N_S_soc_S_timer_4001b000_FULL_NAME_UNQUOTED timer@4001b000
#define DT_N_S_soc_S_timer_4001b000_FULL_NAME_TOKEN timer_4001b000
#define DT_N_S_soc_S_timer_4001b000_FULL_NAME_UPPER_TOKEN TIMER_4001B000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_4001b000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_timer_4001b000_CHILD_IDX 36

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_timer_4001b000_NODELABEL_NUM 1
#define DT_N_S_soc_S_timer_4001b000_FOREACH_NODELABEL(fn) fn(timer4)
#define DT_N_S_soc_S_timer_4001b000_FOREACH_NODELABEL_VARGS(fn, ...) fn(timer4, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4001b000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_timer_4001b000_CHILD_NUM 0
#define DT_N_S_soc_S_timer_4001b000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_timer_4001b000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_4001b000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_4001b000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_4001b000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_timer_4001b000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_timer_4001b000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_4001b000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_4001b000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_timer_4001b000_HASH 5ADCKqLctbF3jZ8tWFC9k9F24AwE1ZfXELd8l5moKbU

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_4001b000_ORD 59
#define DT_N_S_soc_S_timer_4001b000_ORD_STR_SORTABLE 00059

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_4001b000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_4001b000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_4001b000_EXISTS 1
#define DT_N_INST_4_nordic_nrf_timer DT_N_S_soc_S_timer_4001b000
#define DT_N_NODELABEL_timer4        DT_N_S_soc_S_timer_4001b000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_timer_4001b000_REG_NUM 1
#define DT_N_S_soc_S_timer_4001b000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_REG_IDX_0_VAL_ADDRESS 1073852416 /* 0x4001b000 */
#define DT_N_S_soc_S_timer_4001b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_4001b000_RANGES_NUM 0
#define DT_N_S_soc_S_timer_4001b000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_timer_4001b000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_4001b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_IRQ_IDX_0_VAL_irq 27
#define DT_N_S_soc_S_timer_4001b000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_4001b000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_timer_4001b000_IRQ_LEVEL 1
#define DT_N_S_soc_S_timer_4001b000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_4001b000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_timer_4001b000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_COMPAT_MODEL_IDX_0 "nrf-timer"
#define DT_N_S_soc_S_timer_4001b000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_timer_4001b000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_timer_4001b000_P_reg {1073852416 /* 0x4001b000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_4001b000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_reg_IDX_0 1073852416
#define DT_N_S_soc_S_timer_4001b000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_4001b000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_cc_num 6
#define DT_N_S_soc_S_timer_4001b000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_max_bit_width 32
#define DT_N_S_soc_S_timer_4001b000_P_max_bit_width_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_interrupts {27 /* 0x1b */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_4001b000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_interrupts_IDX_0 27
#define DT_N_S_soc_S_timer_4001b000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_4001b000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_prescaler 0
#define DT_N_S_soc_S_timer_4001b000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_zli 0
#define DT_N_S_soc_S_timer_4001b000_P_zli_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_status "disabled"
#define DT_N_S_soc_S_timer_4001b000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_timer_4001b000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_timer_4001b000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_timer_4001b000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_timer_4001b000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_timer_4001b000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4001b000, status, 0)
#define DT_N_S_soc_S_timer_4001b000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_4001b000, status, 0)
#define DT_N_S_soc_S_timer_4001b000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_4001b000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4001b000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_4001b000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4001b000_P_status_LEN 1
#define DT_N_S_soc_S_timer_4001b000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_4001b000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_4001b000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-timer
#define DT_N_S_soc_S_timer_4001b000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_timer
#define DT_N_S_soc_S_timer_4001b000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TIMER
#define DT_N_S_soc_S_timer_4001b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4001b000, compatible, 0)
#define DT_N_S_soc_S_timer_4001b000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_4001b000, compatible, 0)
#define DT_N_S_soc_S_timer_4001b000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_4001b000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4001b000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_4001b000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_4001b000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_4001b000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_timer_4001b000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_wakeup_source 0
#define DT_N_S_soc_S_timer_4001b000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_timer_4001b000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/timer@e000e010
 *
 * Node identifier: DT_N_S_soc_S_timer_e000e010
 *
 * Binding (compatible = arm,armv7m-systick):
 *   $ZEPHYR_BASE/dts/bindings/timer/arm,armv7m-systick.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_e000e010_PATH "/soc/timer@e000e010"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_e000e010_FULL_NAME "timer@e000e010"
#define DT_N_S_soc_S_timer_e000e010_FULL_NAME_UNQUOTED timer@e000e010
#define DT_N_S_soc_S_timer_e000e010_FULL_NAME_TOKEN timer_e000e010
#define DT_N_S_soc_S_timer_e000e010_FULL_NAME_UPPER_TOKEN TIMER_E000E010

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_e000e010_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_timer_e000e010_CHILD_IDX 1

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_timer_e000e010_NODELABEL_NUM 1
#define DT_N_S_soc_S_timer_e000e010_FOREACH_NODELABEL(fn) fn(systick)
#define DT_N_S_soc_S_timer_e000e010_FOREACH_NODELABEL_VARGS(fn, ...) fn(systick, __VA_ARGS__)
#define DT_N_S_soc_S_timer_e000e010_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_timer_e000e010_CHILD_NUM 0
#define DT_N_S_soc_S_timer_e000e010_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_timer_e000e010_HASH aZrzPLAIRgEwRZJIvTCzJONA6gPgc4QlhkiU5oWGArA

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_e000e010_ORD 60
#define DT_N_S_soc_S_timer_e000e010_ORD_STR_SORTABLE 00060

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_e000e010_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_e000e010_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_e000e010_EXISTS 1
#define DT_N_INST_0_arm_armv7m_systick DT_N_S_soc_S_timer_e000e010
#define DT_N_NODELABEL_systick         DT_N_S_soc_S_timer_e000e010

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_timer_e000e010_REG_NUM 1
#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_ADDRESS 3758153744 /* 0xe000e010 */
#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_SIZE 16 /* 0x10 */
#define DT_N_S_soc_S_timer_e000e010_RANGES_NUM 0
#define DT_N_S_soc_S_timer_e000e010_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_timer_e000e010_IRQ_NUM 0
#define DT_N_S_soc_S_timer_e000e010_IRQ_LEVEL 0
#define DT_N_S_soc_S_timer_e000e010_COMPAT_MATCHES_arm_armv7m_systick 1
#define DT_N_S_soc_S_timer_e000e010_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_COMPAT_VENDOR_IDX_0 "ARM Ltd."
#define DT_N_S_soc_S_timer_e000e010_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_COMPAT_MODEL_IDX_0 "armv7m-systick"
#define DT_N_S_soc_S_timer_e000e010_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_timer_e000e010_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_timer_e000e010_P_reg {3758153744 /* 0xe000e010 */, 16 /* 0x10 */}
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0 3758153744
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1 16
#define DT_N_S_soc_S_timer_e000e010_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_status "disabled"
#define DT_N_S_soc_S_timer_e000e010_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_timer_e000e010_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_timer_e000e010_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_timer_e000e010_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_timer_e000e010_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_timer_e000e010_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, status, 0)
#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_e000e010, status, 0)
#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_e000e010, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_e000e010_P_status_LEN 1
#define DT_N_S_soc_S_timer_e000e010_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_compatible {"arm,armv7m-systick"}
#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0 "arm,armv7m-systick"
#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_UNQUOTED arm,armv7m-systick
#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_TOKEN arm_armv7m_systick
#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_ARMV7M_SYSTICK
#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0)
#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0)
#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_timer_e000e010_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_e000e010_P_compatible_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_timer_e000e010_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_wakeup_source 0
#define DT_N_S_soc_S_timer_e000e010_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_timer_e000e010_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/uart@40002000
 *
 * Node identifier: DT_N_S_soc_S_uart_40002000
 *
 * Binding (compatible = nordic,nrf-uarte):
 *   $ZEPHYR_BASE/dts/bindings/serial/nordic,nrf-uarte.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_uart_40002000_PATH "/soc/uart@40002000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_uart_40002000_FULL_NAME "uart@40002000"
#define DT_N_S_soc_S_uart_40002000_FULL_NAME_UNQUOTED uart@40002000
#define DT_N_S_soc_S_uart_40002000_FULL_NAME_TOKEN uart_40002000
#define DT_N_S_soc_S_uart_40002000_FULL_NAME_UPPER_TOKEN UART_40002000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_uart_40002000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_uart_40002000_CHILD_IDX 9

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_uart_40002000_NODELABEL_NUM 1
#define DT_N_S_soc_S_uart_40002000_FOREACH_NODELABEL(fn) fn(uart0)
#define DT_N_S_soc_S_uart_40002000_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart0, __VA_ARGS__)
#define DT_N_S_soc_S_uart_40002000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_uart_40002000_CHILD_NUM 0
#define DT_N_S_soc_S_uart_40002000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_uart_40002000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_uart_40002000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_uart_40002000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_uart_40002000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_uart_40002000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_uart_40002000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_uart_40002000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_uart_40002000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_uart_40002000_HASH r7AwWkfYm9keVbRLOwM7UtzC1BzpGQAQmp9IyaUqBAA

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_uart_40002000_ORD 61
#define DT_N_S_soc_S_uart_40002000_ORD_STR_SORTABLE 00061

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_uart_40002000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_uart_40002000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_uart_40002000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_uarte DT_N_S_soc_S_uart_40002000
#define DT_N_NODELABEL_uart0         DT_N_S_soc_S_uart_40002000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_uart_40002000_REG_NUM 1
#define DT_N_S_soc_S_uart_40002000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_REG_IDX_0_VAL_ADDRESS 1073750016 /* 0x40002000 */
#define DT_N_S_soc_S_uart_40002000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_uart_40002000_RANGES_NUM 0
#define DT_N_S_soc_S_uart_40002000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_uart_40002000_IRQ_NUM 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_irq 2
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_uart_40002000_IRQ_LEVEL 1
#define DT_N_S_soc_S_uart_40002000_COMPAT_MATCHES_nordic_nrf_uarte 1
#define DT_N_S_soc_S_uart_40002000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_uart_40002000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_COMPAT_MODEL_IDX_0 "nrf-uarte"
#define DT_N_S_soc_S_uart_40002000_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_uart_40002000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_uart_40002000_P_endtx_stoptx_supported 0
#define DT_N_S_soc_S_uart_40002000_P_endtx_stoptx_supported_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_frame_timeout_supported 0
#define DT_N_S_soc_S_uart_40002000_P_frame_timeout_supported_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_cross_domain_pins_supported 0
#define DT_N_S_soc_S_uart_40002000_P_cross_domain_pins_supported_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_reg {1073750016 /* 0x40002000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_0 1073750016
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_uart_40002000_P_reg_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts {2 /* 0x2 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_0 2
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_disable_rx 0
#define DT_N_S_soc_S_uart_40002000_P_disable_rx_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_hw_flow_control 0
#define DT_N_S_soc_S_uart_40002000_P_hw_flow_control_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_parity "none"
#define DT_N_S_soc_S_uart_40002000_P_parity_STRING_UNQUOTED none
#define DT_N_S_soc_S_uart_40002000_P_parity_STRING_TOKEN none
#define DT_N_S_soc_S_uart_40002000_P_parity_STRING_UPPER_TOKEN NONE
#define DT_N_S_soc_S_uart_40002000_P_parity_IDX_0 "none"
#define DT_N_S_soc_S_uart_40002000_P_parity_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_parity_IDX_0_ENUM_IDX 0
#define DT_N_S_soc_S_uart_40002000_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40002000, parity, 0)
#define DT_N_S_soc_S_uart_40002000_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_uart_40002000, parity, 0)
#define DT_N_S_soc_S_uart_40002000_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uart_40002000, parity, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uart_40002000_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_uart_40002000, parity, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uart_40002000_P_parity_LEN 1
#define DT_N_S_soc_S_uart_40002000_P_parity_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_status "disabled"
#define DT_N_S_soc_S_uart_40002000_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_uart_40002000_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_uart_40002000_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_uart_40002000_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_uart_40002000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_uart_40002000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40002000, status, 0)
#define DT_N_S_soc_S_uart_40002000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_uart_40002000, status, 0)
#define DT_N_S_soc_S_uart_40002000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uart_40002000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uart_40002000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_uart_40002000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uart_40002000_P_status_LEN 1
#define DT_N_S_soc_S_uart_40002000_P_status_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_compatible {"nordic,nrf-uarte"}
#define DT_N_S_soc_S_uart_40002000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_compatible_IDX_0 "nordic,nrf-uarte"
#define DT_N_S_soc_S_uart_40002000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-uarte
#define DT_N_S_soc_S_uart_40002000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_uarte
#define DT_N_S_soc_S_uart_40002000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_UARTE
#define DT_N_S_soc_S_uart_40002000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40002000, compatible, 0)
#define DT_N_S_soc_S_uart_40002000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_uart_40002000, compatible, 0)
#define DT_N_S_soc_S_uart_40002000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uart_40002000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uart_40002000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_uart_40002000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uart_40002000_P_compatible_LEN 1
#define DT_N_S_soc_S_uart_40002000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_uart_40002000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_wakeup_source 0
#define DT_N_S_soc_S_uart_40002000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_uart_40002000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/uicr@10001000
 *
 * Node identifier: DT_N_S_soc_S_uicr_10001000
 *
 * Binding (compatible = nordic,nrf-uicr):
 *   $ZEPHYR_BASE/dts/bindings/arm/nordic,nrf-uicr.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_uicr_10001000_PATH "/soc/uicr@10001000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_uicr_10001000_FULL_NAME "uicr@10001000"
#define DT_N_S_soc_S_uicr_10001000_FULL_NAME_UNQUOTED uicr@10001000
#define DT_N_S_soc_S_uicr_10001000_FULL_NAME_TOKEN uicr_10001000
#define DT_N_S_soc_S_uicr_10001000_FULL_NAME_UPPER_TOKEN UICR_10001000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_uicr_10001000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_uicr_10001000_CHILD_IDX 3

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_uicr_10001000_NODELABEL_NUM 1
#define DT_N_S_soc_S_uicr_10001000_FOREACH_NODELABEL(fn) fn(uicr)
#define DT_N_S_soc_S_uicr_10001000_FOREACH_NODELABEL_VARGS(fn, ...) fn(uicr, __VA_ARGS__)
#define DT_N_S_soc_S_uicr_10001000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_uicr_10001000_CHILD_NUM 0
#define DT_N_S_soc_S_uicr_10001000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_uicr_10001000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_uicr_10001000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_uicr_10001000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_uicr_10001000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_uicr_10001000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_uicr_10001000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_uicr_10001000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_uicr_10001000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_uicr_10001000_HASH 4KeVoS_YMtHipQBXTxg3nQvJ1Yuav_vLojacEaRkYiI

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_uicr_10001000_ORD 62
#define DT_N_S_soc_S_uicr_10001000_ORD_STR_SORTABLE 00062

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_uicr_10001000_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_uicr_10001000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_uicr_10001000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_uicr DT_N_S_soc_S_uicr_10001000
#define DT_N_NODELABEL_uicr         DT_N_S_soc_S_uicr_10001000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_uicr_10001000_REG_NUM 1
#define DT_N_S_soc_S_uicr_10001000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_REG_IDX_0_VAL_ADDRESS 268439552 /* 0x10001000 */
#define DT_N_S_soc_S_uicr_10001000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_uicr_10001000_RANGES_NUM 0
#define DT_N_S_soc_S_uicr_10001000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_uicr_10001000_IRQ_NUM 0
#define DT_N_S_soc_S_uicr_10001000_IRQ_LEVEL 0
#define DT_N_S_soc_S_uicr_10001000_COMPAT_MATCHES_nordic_nrf_uicr 1
#define DT_N_S_soc_S_uicr_10001000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_uicr_10001000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_COMPAT_MODEL_IDX_0 "nrf-uicr"
#define DT_N_S_soc_S_uicr_10001000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_uicr_10001000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_uicr_10001000_P_reg {268439552 /* 0x10001000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_uicr_10001000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_reg_IDX_0 268439552
#define DT_N_S_soc_S_uicr_10001000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_uicr_10001000_P_reg_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_nfct_pins_as_gpios 0
#define DT_N_S_soc_S_uicr_10001000_P_nfct_pins_as_gpios_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_gpio_as_nreset 0
#define DT_N_S_soc_S_uicr_10001000_P_gpio_as_nreset_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_status "okay"
#define DT_N_S_soc_S_uicr_10001000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_uicr_10001000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_uicr_10001000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_uicr_10001000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_uicr_10001000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_uicr_10001000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uicr_10001000, status, 0)
#define DT_N_S_soc_S_uicr_10001000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_uicr_10001000, status, 0)
#define DT_N_S_soc_S_uicr_10001000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uicr_10001000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uicr_10001000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_uicr_10001000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uicr_10001000_P_status_LEN 1
#define DT_N_S_soc_S_uicr_10001000_P_status_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_compatible {"nordic,nrf-uicr"}
#define DT_N_S_soc_S_uicr_10001000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_compatible_IDX_0 "nordic,nrf-uicr"
#define DT_N_S_soc_S_uicr_10001000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-uicr
#define DT_N_S_soc_S_uicr_10001000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_uicr
#define DT_N_S_soc_S_uicr_10001000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_UICR
#define DT_N_S_soc_S_uicr_10001000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uicr_10001000, compatible, 0)
#define DT_N_S_soc_S_uicr_10001000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_uicr_10001000, compatible, 0)
#define DT_N_S_soc_S_uicr_10001000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_uicr_10001000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uicr_10001000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_uicr_10001000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_uicr_10001000_P_compatible_LEN 1
#define DT_N_S_soc_S_uicr_10001000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_uicr_10001000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_wakeup_source 0
#define DT_N_S_soc_S_uicr_10001000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_uicr_10001000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/watchdog@40010000
 *
 * Node identifier: DT_N_S_soc_S_watchdog_40010000
 *
 * Binding (compatible = nordic,nrf-wdt):
 *   $ZEPHYR_BASE/dts/bindings/watchdog/nordic,nrf-wdt.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_watchdog_40010000_PATH "/soc/watchdog@40010000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_watchdog_40010000_FULL_NAME "watchdog@40010000"
#define DT_N_S_soc_S_watchdog_40010000_FULL_NAME_UNQUOTED watchdog@40010000
#define DT_N_S_soc_S_watchdog_40010000_FULL_NAME_TOKEN watchdog_40010000
#define DT_N_S_soc_S_watchdog_40010000_FULL_NAME_UPPER_TOKEN WATCHDOG_40010000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_watchdog_40010000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_watchdog_40010000_CHILD_IDX 25

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_watchdog_40010000_NODELABEL_NUM 2
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_NODELABEL(fn) fn(wdt) fn(wdt0)
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_NODELABEL_VARGS(fn, ...) fn(wdt, __VA_ARGS__) fn(wdt0, __VA_ARGS__)
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_watchdog_40010000_CHILD_NUM 0
#define DT_N_S_soc_S_watchdog_40010000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_watchdog_40010000_HASH uWMkStkskRGte8fmDdZd15q2PYXHcj8wT3KKpXlQPTc

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_watchdog_40010000_ORD 63
#define DT_N_S_soc_S_watchdog_40010000_ORD_STR_SORTABLE 00063

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_watchdog_40010000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_watchdog_40010000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_watchdog_40010000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_wdt DT_N_S_soc_S_watchdog_40010000
#define DT_N_NODELABEL_wdt         DT_N_S_soc_S_watchdog_40010000
#define DT_N_NODELABEL_wdt0        DT_N_S_soc_S_watchdog_40010000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_watchdog_40010000_REG_NUM 1
#define DT_N_S_soc_S_watchdog_40010000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_REG_IDX_0_VAL_ADDRESS 1073807360 /* 0x40010000 */
#define DT_N_S_soc_S_watchdog_40010000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_watchdog_40010000_RANGES_NUM 0
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_watchdog_40010000_IRQ_NUM 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_irq 16
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_watchdog_40010000_IRQ_LEVEL 1
#define DT_N_S_soc_S_watchdog_40010000_COMPAT_MATCHES_nordic_nrf_wdt 1
#define DT_N_S_soc_S_watchdog_40010000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_watchdog_40010000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_COMPAT_MODEL_IDX_0 "nrf-wdt"
#define DT_N_S_soc_S_watchdog_40010000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_watchdog_40010000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_watchdog_40010000_P_reg {1073807360 /* 0x40010000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_0 1073807360
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_watchdog_40010000_P_reg_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts {16 /* 0x10 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_0 16
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_status "okay"
#define DT_N_S_soc_S_watchdog_40010000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_watchdog_40010000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_watchdog_40010000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_watchdog_40010000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_watchdog_40010000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_watchdog_40010000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40010000, status, 0)
#define DT_N_S_soc_S_watchdog_40010000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_40010000, status, 0)
#define DT_N_S_soc_S_watchdog_40010000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_40010000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_watchdog_40010000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_40010000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_watchdog_40010000_P_status_LEN 1
#define DT_N_S_soc_S_watchdog_40010000_P_status_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_compatible {"nordic,nrf-wdt"}
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_IDX_0 "nordic,nrf-wdt"
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-wdt
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_wdt
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_WDT
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40010000, compatible, 0)
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_40010000, compatible, 0)
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_40010000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_40010000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_LEN 1
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_watchdog_40010000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_wakeup_source 0
#define DT_N_S_soc_S_watchdog_40010000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_watchdog_40010000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/adc@40007000/channel@0
 *
 * Node identifier: DT_N_S_soc_S_adc_40007000_S_channel_0
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_adc_40007000_S_channel_0_PATH "/soc/adc@40007000/channel@0"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FULL_NAME "channel@0"
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FULL_NAME_UNQUOTED channel@0
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FULL_NAME_TOKEN channel_0
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FULL_NAME_UPPER_TOKEN CHANNEL_0

/* Node parent (/soc/adc@40007000) identifier: */
#define DT_N_S_soc_S_adc_40007000_S_channel_0_PARENT DT_N_S_soc_S_adc_40007000

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_adc_40007000_S_channel_0_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_adc_40007000_S_channel_0_NODELABEL_NUM 0
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FOREACH_NODELABEL(fn) 
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FOREACH_NODELABEL_VARGS(fn, ...) 
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_adc_40007000) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_adc_40007000_S_channel_0_CHILD_NUM 0
#define DT_N_S_soc_S_adc_40007000_S_channel_0_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_adc_40007000_S_channel_0_HASH Q4mtZrxouvADkGZNsAZb5B6tzcfME1NfbK5w7ZUOuWU

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_adc_40007000_S_channel_0_ORD 64
#define DT_N_S_soc_S_adc_40007000_S_channel_0_ORD_STR_SORTABLE 00064

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_adc_40007000_S_channel_0_REQUIRES_ORDS \
	11, /* /soc/adc@40007000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_adc_40007000_S_channel_0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_adc_40007000_S_channel_0_EXISTS 1

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_adc_40007000_S_channel_0_REG_NUM 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
#define DT_N_S_soc_S_adc_40007000_S_channel_0_RANGES_NUM 0
#define DT_N_S_soc_S_adc_40007000_S_channel_0_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_adc_40007000_S_channel_0_IRQ_NUM 0
#define DT_N_S_soc_S_adc_40007000_S_channel_0_IRQ_LEVEL 0
#define DT_N_S_soc_S_adc_40007000_S_channel_0_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_adc_40007000_S_channel_0_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_reg {0 /* 0x0 */}
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_reg_IDX_0 0
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_reg_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_gain "ADC_GAIN_1_5"
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_gain_STRING_UNQUOTED ADC_GAIN_1_5
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_gain_STRING_TOKEN ADC_GAIN_1_5
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_gain_STRING_UPPER_TOKEN ADC_GAIN_1_5
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_gain_IDX_0 "ADC_GAIN_1_5"
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_gain_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_gain_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_gain_IDX_0_ENUM_VAL_adc_gain_1_5_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_gain_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40007000_S_channel_0, zephyr_gain, 0)
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_gain_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40007000_S_channel_0, zephyr_gain, 0)
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_gain_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40007000_S_channel_0, zephyr_gain, 0, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_gain_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40007000_S_channel_0, zephyr_gain, 0, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_gain_LEN 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_gain_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_reference "ADC_REF_INTERNAL"
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_reference_STRING_UNQUOTED ADC_REF_INTERNAL
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_reference_STRING_TOKEN ADC_REF_INTERNAL
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_reference_STRING_UPPER_TOKEN ADC_REF_INTERNAL
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_reference_IDX_0 "ADC_REF_INTERNAL"
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_reference_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_reference_IDX_0_ENUM_IDX 4
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_reference_IDX_0_ENUM_VAL_adc_ref_internal_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_reference_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40007000_S_channel_0, zephyr_reference, 0)
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_reference_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40007000_S_channel_0, zephyr_reference, 0)
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_reference_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40007000_S_channel_0, zephyr_reference, 0, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_reference_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40007000_S_channel_0, zephyr_reference, 0, __VA_ARGS__)
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_reference_LEN 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_reference_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_acquisition_time 0
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_acquisition_time_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_differential 0
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_differential_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_input_positive 4
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_input_positive_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_resolution 12
#define DT_N_S_soc_S_adc_40007000_S_channel_0_P_zephyr_resolution_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000
 *
 * Binding (compatible = nordic,nrf52-flash-controller):
 *   $ZEPHYR_BASE/dts/bindings/flash_controller/nordic,nrf52-flash-controller.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_PATH "/soc/flash-controller@4001e000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_FULL_NAME "flash-controller@4001e000"
#define DT_N_S_soc_S_flash_controller_4001e000_FULL_NAME_UNQUOTED flash-controller@4001e000
#define DT_N_S_soc_S_flash_controller_4001e000_FULL_NAME_TOKEN flash_controller_4001e000
#define DT_N_S_soc_S_flash_controller_4001e000_FULL_NAME_UPPER_TOKEN FLASH_CONTROLLER_4001E000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_flash_controller_4001e000_CHILD_IDX 39

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_flash_controller_4001e000_NODELABEL_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_NODELABEL(fn) fn(flash_controller)
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_NODELABEL_VARGS(fn, ...) fn(flash_controller, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_flash_controller_4001e000_CHILD_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0)
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0)
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0)
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0)
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, __VA_ARGS__)

/* Node's hash: */
#define DT_N_S_soc_S_flash_controller_4001e000_HASH MIT74kgkaUo35GkLmgvEOvuxYL7jzuLYTWU7WwgHfyw

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_ORD 65
#define DT_N_S_soc_S_flash_controller_4001e000_ORD_STR_SORTABLE 00065

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_REQUIRES_ORDS \
	4, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_SUPPORTS_ORDS \
	66, /* /soc/flash-controller@4001e000/flash@0 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_EXISTS 1
#define DT_N_INST_0_nordic_nrf52_flash_controller DT_N_S_soc_S_flash_controller_4001e000
#define DT_N_NODELABEL_flash_controller           DT_N_S_soc_S_flash_controller_4001e000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_4001e000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_REG_IDX_0_VAL_ADDRESS 1073864704 /* 0x4001e000 */
#define DT_N_S_soc_S_flash_controller_4001e000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_flash_controller_4001e000_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_IRQ_LEVEL 0
#define DT_N_S_soc_S_flash_controller_4001e000_COMPAT_MATCHES_nordic_nrf52_flash_controller 1
#define DT_N_S_soc_S_flash_controller_4001e000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_flash_controller_4001e000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_COMPAT_MODEL_IDX_0 "nrf52-flash-controller"
#define DT_N_S_soc_S_flash_controller_4001e000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_4001e000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_P_partial_erase 0
#define DT_N_S_soc_S_flash_controller_4001e000_P_partial_erase_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg {1073864704 /* 0x4001e000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_0 1073864704
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible {"nordic,nrf52-flash-controller"}
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_IDX_0 "nordic,nrf52-flash-controller"
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf52-flash-controller
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf52_flash_controller
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF52_FLASH_CONTROLLER
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000, compatible, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_4001e000, compatible, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_4001e000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_LEN 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_flash_controller_4001e000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_wakeup_source 0
#define DT_N_S_soc_S_flash_controller_4001e000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_flash_controller_4001e000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0
 *
 * Binding (compatible = soc-nv-flash):
 *   $ZEPHYR_BASE/dts/bindings/mtd/soc-nv-flash.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_PATH "/soc/flash-controller@4001e000/flash@0"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FULL_NAME "flash@0"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FULL_NAME_UNQUOTED flash@0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FULL_NAME_TOKEN flash_0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FULL_NAME_UPPER_TOKEN FLASH_0

/* Node parent (/soc/flash-controller@4001e000) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_PARENT DT_N_S_soc_S_flash_controller_4001e000

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_NODELABEL_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_NODELABEL(fn) fn(flash0)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_NODELABEL_VARGS(fn, ...) fn(flash0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_4001e000) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_CHILD_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions, __VA_ARGS__)

/* Node's hash: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_HASH CLSOFQb_ZMvERbh_tCK2vGlINT4ZjLkJR5uWOmCRJiU

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_ORD 66
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_ORD_STR_SORTABLE 00066

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REQUIRES_ORDS \
	65, /* /soc/flash-controller@4001e000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_SUPPORTS_ORDS \
	67, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_EXISTS 1
#define DT_N_INST_0_soc_nv_flash DT_N_S_soc_S_flash_controller_4001e000_S_flash_0
#define DT_N_NODELABEL_flash0    DT_N_S_soc_S_flash_controller_4001e000_S_flash_0

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_IDX_0_VAL_SIZE 524288 /* 0x80000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_IRQ_LEVEL 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_COMPAT_MATCHES_soc_nv_flash 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_erase_block_size 4096
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_erase_block_size_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_write_block_size 4
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_write_block_size_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible {"soc-nv-flash"}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_IDX_0 "soc-nv-flash"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_IDX_0_STRING_UNQUOTED soc-nv-flash
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_IDX_0_STRING_TOKEN soc_nv_flash
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_IDX_0_STRING_UPPER_TOKEN SOC_NV_FLASH
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, compatible, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, compatible, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_LEN 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg {0 /* 0x0 */, 524288 /* 0x80000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_0 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_1 524288
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_wakeup_source 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
 *
 * Binding (compatible = fixed-partitions):
 *   $ZEPHYR_BASE/dts/bindings/mtd/fixed-partitions.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_PATH "/soc/flash-controller@4001e000/flash@0/partitions"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FULL_NAME "partitions"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FULL_NAME_UNQUOTED partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FULL_NAME_TOKEN partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FULL_NAME_UPPER_TOKEN PARTITIONS

/* Node parent (/soc/flash-controller@4001e000/flash@0) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_NODELABEL_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_NODELABEL(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_NODELABEL_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0) fn(DT_N_S_soc_S_flash_controller_4001e000) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_CHILD_NUM 4
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_CHILD_NUM_STATUS_OKAY 4
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000, __VA_ARGS__)

/* Node's hash: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_HASH wMeswNpo0OTVRyViatg8jxadMBSVgtVO5BZYQVxQQOw

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_ORD 67
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_ORD_STR_SORTABLE 00067

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_REQUIRES_ORDS \
	66, /* /soc/flash-controller@4001e000/flash@0 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_SUPPORTS_ORDS \
	68, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@0 */ \
	69, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@c000 */ \
	70, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@31800 */ \
	71, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@57000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_EXISTS 1
#define DT_N_INST_0_fixed_partitions DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_REG_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_IRQ_LEVEL 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_COMPAT_MATCHES_fixed_partitions 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_PINCTRL_NUM 0

/* (No generic property macros) */

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@0
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@0"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FULL_NAME "partition@0"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FULL_NAME_UNQUOTED partition@0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FULL_NAME_TOKEN partition_0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FULL_NAME_UPPER_TOKEN PARTITION_0

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_NODELABEL_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_NODELABEL(fn) fn(boot_partition)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_NODELABEL_VARGS(fn, ...) fn(boot_partition, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0) fn(DT_N_S_soc_S_flash_controller_4001e000) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_CHILD_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_HASH YIAL4G7_dFi2sYfvJCw7Eh377q_8M5iIVT3IWn4wKYI

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_ORD 68
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_ORD_STR_SORTABLE 00068

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REQUIRES_ORDS \
	67, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_EXISTS 1
#define DT_N_NODELABEL_boot_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_VAL_SIZE 49152 /* 0xc000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_IRQ_LEVEL 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_PINCTRL_NUM 0

/* fixed-partitions identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_PARTITION_ID 0

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label "mcuboot"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_STRING_UNQUOTED mcuboot
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_STRING_TOKEN mcuboot
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_STRING_UPPER_TOKEN MCUBOOT
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_IDX_0 "mcuboot"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_LEN 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg {0 /* 0x0 */, 49152 /* 0xc000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_0 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_1 49152
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@c000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@c000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FULL_NAME "partition@c000"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FULL_NAME_UNQUOTED partition@c000
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FULL_NAME_TOKEN partition_c000
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FULL_NAME_UPPER_TOKEN PARTITION_C000

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_CHILD_IDX 1

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_NODELABEL_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_NODELABEL(fn) fn(slot0_partition)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_NODELABEL_VARGS(fn, ...) fn(slot0_partition, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0) fn(DT_N_S_soc_S_flash_controller_4001e000) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_CHILD_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_HASH 9BSW88retd5BjGG6_nV1ryB_MbqV79p4SBlkly0T0zQ

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_ORD 69
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_ORD_STR_SORTABLE 00069

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_REQUIRES_ORDS \
	67, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_EXISTS 1
#define DT_N_NODELABEL_slot0_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_REG_IDX_0_VAL_ADDRESS 49152 /* 0xc000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_REG_IDX_0_VAL_SIZE 153600 /* 0x25800 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_IRQ_LEVEL 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_PINCTRL_NUM 0

/* fixed-partitions identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_PARTITION_ID 1

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label "image-0"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_STRING_UNQUOTED image-0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_STRING_TOKEN image_0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_STRING_UPPER_TOKEN IMAGE_0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_IDX_0 "image-0"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_LEN 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg {49152 /* 0xc000 */, 153600 /* 0x25800 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_IDX_0 49152
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_IDX_1 153600
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@31800
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@31800"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FULL_NAME "partition@31800"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FULL_NAME_UNQUOTED partition@31800
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FULL_NAME_TOKEN partition_31800
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FULL_NAME_UPPER_TOKEN PARTITION_31800

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_CHILD_IDX 2

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_NODELABEL_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FOREACH_NODELABEL(fn) fn(slot1_partition)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FOREACH_NODELABEL_VARGS(fn, ...) fn(slot1_partition, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0) fn(DT_N_S_soc_S_flash_controller_4001e000) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_CHILD_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_HASH S_7wL5zQKgv9WywwsfQTBA0O4ae2yw1A7KQmB_JqR4E

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_ORD 70
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_ORD_STR_SORTABLE 00070

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_REQUIRES_ORDS \
	67, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_EXISTS 1
#define DT_N_NODELABEL_slot1_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_REG_IDX_0_VAL_ADDRESS 202752 /* 0x31800 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_REG_IDX_0_VAL_SIZE 153600 /* 0x25800 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_IRQ_LEVEL 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_PINCTRL_NUM 0

/* fixed-partitions identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_PARTITION_ID 2

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_label "image-1"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_label_STRING_UNQUOTED image-1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_label_STRING_TOKEN image_1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_label_STRING_UPPER_TOKEN IMAGE_1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_label_IDX_0 "image-1"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_label_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800, label, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800, label, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_label_LEN 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_reg {202752 /* 0x31800 */, 153600 /* 0x25800 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_reg_IDX_0 202752
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_reg_IDX_1 153600
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@57000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@57000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FULL_NAME "partition@57000"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FULL_NAME_UNQUOTED partition@57000
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FULL_NAME_TOKEN partition_57000
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FULL_NAME_UPPER_TOKEN PARTITION_57000

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_CHILD_IDX 3

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_NODELABEL_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FOREACH_NODELABEL(fn) fn(app_storage_partition)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FOREACH_NODELABEL_VARGS(fn, ...) fn(app_storage_partition, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0) fn(DT_N_S_soc_S_flash_controller_4001e000) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_CHILD_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_HASH CEkkdTeHdKYR0_SaV_WKHRimgAHhcjXweWYxGLWy1Xw

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_ORD 71
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_ORD_STR_SORTABLE 00071

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_REQUIRES_ORDS \
	67, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_EXISTS 1
#define DT_N_NODELABEL_app_storage_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_REG_IDX_0_VAL_ADDRESS 356352 /* 0x57000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_REG_IDX_0_VAL_SIZE 163840 /* 0x28000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_RANGES_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_IRQ_LEVEL 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_PINCTRL_NUM 0

/* fixed-partitions identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_PARTITION_ID 3

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_label "app_storage_partition"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_label_STRING_UNQUOTED app_storage_partition
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_label_STRING_TOKEN app_storage_partition
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_label_STRING_UPPER_TOKEN APP_STORAGE_PARTITION
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_label_IDX_0 "app_storage_partition"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_label_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000, label, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000, label, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_label_LEN 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_reg {356352 /* 0x57000 */, 163840 /* 0x28000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_reg_IDX_0 356352
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_reg_IDX_1 163840
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/i2c@40003000
 *
 * Node identifier: DT_N_S_soc_S_i2c_40003000
 *
 * Binding (compatible = nordic,nrf-twim):
 *   $ZEPHYR_BASE/dts/bindings/i2c/nordic,nrf-twim.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_i2c_40003000_PATH "/soc/i2c@40003000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_i2c_40003000_FULL_NAME "i2c@40003000"
#define DT_N_S_soc_S_i2c_40003000_FULL_NAME_UNQUOTED i2c@40003000
#define DT_N_S_soc_S_i2c_40003000_FULL_NAME_TOKEN i2c_40003000
#define DT_N_S_soc_S_i2c_40003000_FULL_NAME_UPPER_TOKEN I2C_40003000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_i2c_40003000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_i2c_40003000_CHILD_IDX 10

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_i2c_40003000_NODELABEL_NUM 1
#define DT_N_S_soc_S_i2c_40003000_FOREACH_NODELABEL(fn) fn(i2c0)
#define DT_N_S_soc_S_i2c_40003000_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2c0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_i2c_40003000_CHILD_NUM 1
#define DT_N_S_soc_S_i2c_40003000_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_soc_S_i2c_40003000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18)
#define DT_N_S_soc_S_i2c_40003000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18)
#define DT_N_S_soc_S_i2c_40003000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18)
#define DT_N_S_soc_S_i2c_40003000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18)
#define DT_N_S_soc_S_i2c_40003000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, __VA_ARGS__)

/* Node's hash: */
#define DT_N_S_soc_S_i2c_40003000_HASH o126xB_iWNi505UyklSsWdyOe8B4DivDCl5lUn3zfgA

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_i2c_40003000_ORD 72
#define DT_N_S_soc_S_i2c_40003000_ORD_STR_SORTABLE 00072

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_i2c_40003000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */ \
	21, /* /pin-controller/i2c0_default_1 */ \
	23, /* /pin-controller/i2c0_sleep_1 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_i2c_40003000_SUPPORTS_ORDS \
	73, /* /soc/i2c@40003000/bma530@18 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_i2c_40003000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_twim DT_N_S_soc_S_i2c_40003000
#define DT_N_NODELABEL_i2c0         DT_N_S_soc_S_i2c_40003000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_i2c_40003000_REG_NUM 1
#define DT_N_S_soc_S_i2c_40003000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_REG_IDX_0_VAL_ADDRESS 1073754112 /* 0x40003000 */
#define DT_N_S_soc_S_i2c_40003000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_i2c_40003000_RANGES_NUM 0
#define DT_N_S_soc_S_i2c_40003000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_i2c_40003000_IRQ_NUM 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_irq 3
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_i2c_40003000_IRQ_LEVEL 1
#define DT_N_S_soc_S_i2c_40003000_COMPAT_MATCHES_nordic_nrf_twim 1
#define DT_N_S_soc_S_i2c_40003000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_i2c_40003000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_COMPAT_MODEL_IDX_0 "nrf-twim"
#define DT_N_S_soc_S_i2c_40003000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_i2c_40003000_PINCTRL_NUM 2
#define DT_N_S_soc_S_i2c_40003000_PINCTRL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_PINCTRL_IDX_0_TOKEN default
#define DT_N_S_soc_S_i2c_40003000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT
#define DT_N_S_soc_S_i2c_40003000_PINCTRL_NAME_default_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_PINCTRL_NAME_default_IDX 0
#define DT_N_S_soc_S_i2c_40003000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_pin_controller_S_i2c0_default_1
#define DT_N_S_soc_S_i2c_40003000_PINCTRL_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_PINCTRL_IDX_1_TOKEN sleep
#define DT_N_S_soc_S_i2c_40003000_PINCTRL_IDX_1_UPPER_TOKEN SLEEP
#define DT_N_S_soc_S_i2c_40003000_PINCTRL_NAME_sleep_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_PINCTRL_NAME_sleep_IDX 1
#define DT_N_S_soc_S_i2c_40003000_PINCTRL_NAME_sleep_IDX_0_PH DT_N_S_pin_controller_S_i2c0_sleep_1

/* Generic property macros: */
#define DT_N_S_soc_S_i2c_40003000_P_zephyr_concat_buf_size 16
#define DT_N_S_soc_S_i2c_40003000_P_zephyr_concat_buf_size_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_zephyr_flash_buf_max_size 16
#define DT_N_S_soc_S_i2c_40003000_P_zephyr_flash_buf_max_size_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_reg {1073754112 /* 0x40003000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_0 1073754112
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_i2c_40003000_P_reg_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts {3 /* 0x3 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_0 3
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_0_IDX_0 DT_N_S_pin_controller_S_i2c0_default_1
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_0_IDX_0_PH DT_N_S_pin_controller_S_i2c0_default_1
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_0_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000, pinctrl_0, 0)
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40003000, pinctrl_0, 0)
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000, pinctrl_0, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40003000, pinctrl_0, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_0_LEN 1
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names {"default", "sleep"}
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_IDX_0 "default"
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_IDX_0_STRING_TOKEN default
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_IDX_1 "sleep"
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_IDX_1_STRING_UNQUOTED sleep
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_IDX_1_STRING_TOKEN sleep
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_IDX_1_STRING_UPPER_TOKEN SLEEP
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000, pinctrl_names, 0) \
	fn(DT_N_S_soc_S_i2c_40003000, pinctrl_names, 1)
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40003000, pinctrl_names, 0) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_i2c_40003000, pinctrl_names, 1)
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000, pinctrl_names, 0, __VA_ARGS__) \
	fn(DT_N_S_soc_S_i2c_40003000, pinctrl_names, 1, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40003000, pinctrl_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \
	fn(DT_N_S_soc_S_i2c_40003000, pinctrl_names, 1, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_LEN 2
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_names_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_easydma_maxcnt_bits 8
#define DT_N_S_soc_S_i2c_40003000_P_easydma_maxcnt_bits_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_clock_frequency 100000
#define DT_N_S_soc_S_i2c_40003000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_sq_size 4
#define DT_N_S_soc_S_i2c_40003000_P_sq_size_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_cq_size 4
#define DT_N_S_soc_S_i2c_40003000_P_cq_size_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_status "okay"
#define DT_N_S_soc_S_i2c_40003000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_i2c_40003000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_i2c_40003000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_i2c_40003000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_i2c_40003000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_i2c_40003000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000, status, 0)
#define DT_N_S_soc_S_i2c_40003000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40003000, status, 0)
#define DT_N_S_soc_S_i2c_40003000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40003000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_P_status_LEN 1
#define DT_N_S_soc_S_i2c_40003000_P_status_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_compatible {"nordic,nrf-twim"}
#define DT_N_S_soc_S_i2c_40003000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_compatible_IDX_0 "nordic,nrf-twim"
#define DT_N_S_soc_S_i2c_40003000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-twim
#define DT_N_S_soc_S_i2c_40003000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_twim
#define DT_N_S_soc_S_i2c_40003000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_TWIM
#define DT_N_S_soc_S_i2c_40003000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000, compatible, 0)
#define DT_N_S_soc_S_i2c_40003000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40003000, compatible, 0)
#define DT_N_S_soc_S_i2c_40003000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40003000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_P_compatible_LEN 1
#define DT_N_S_soc_S_i2c_40003000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_i2c_40003000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_wakeup_source 0
#define DT_N_S_soc_S_i2c_40003000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_zephyr_pm_device_runtime_auto 1
#define DT_N_S_soc_S_i2c_40003000_P_zephyr_pm_device_runtime_auto_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_1_IDX_0 DT_N_S_pin_controller_S_i2c0_sleep_1
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_1_IDX_0_PH DT_N_S_pin_controller_S_i2c0_sleep_1
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_1_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_1_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000, pinctrl_1, 0)
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40003000, pinctrl_1, 0)
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_1_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000, pinctrl_1, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_1_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40003000, pinctrl_1, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_1_LEN 1
#define DT_N_S_soc_S_i2c_40003000_P_pinctrl_1_EXISTS 1

/*
 * Devicetree node: /soc/i2c@40003000/bma530@18
 *
 * Node identifier: DT_N_S_soc_S_i2c_40003000_S_bma530_18
 *
 * Binding (compatible = bosch,bma530):
 *   /Users/caio/Documents/Projects/prj3/Kleinigkeit_fw_prj/bma530_module/dts/bindings/sensor/bosch,bma530.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_PATH "/soc/i2c@40003000/bma530@18"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FULL_NAME "bma530@18"
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FULL_NAME_UNQUOTED bma530@18
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FULL_NAME_TOKEN bma530_18
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FULL_NAME_UPPER_TOKEN BMA530_18

/* Node parent (/soc/i2c@40003000) identifier: */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_PARENT DT_N_S_soc_S_i2c_40003000

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_NODELABEL_NUM 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FOREACH_NODELABEL(fn) fn(bma530)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FOREACH_NODELABEL_VARGS(fn, ...) fn(bma530, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_i2c_40003000) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_CHILD_NUM 0
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_HASH s___xpXPkISqiVqTOeD3vNIVAsRTB6W2TGvSRe87cB4

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_ORD 73
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_ORD_STR_SORTABLE 00073

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_REQUIRES_ORDS \
	9, /* /soc/gpio@50000000 */ \
	72, /* /soc/i2c@40003000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_EXISTS 1
#define DT_N_INST_0_bosch_bma530 DT_N_S_soc_S_i2c_40003000_S_bma530_18
#define DT_N_NODELABEL_bma530    DT_N_S_soc_S_i2c_40003000_S_bma530_18

/* Bus info (controller: '/soc/i2c@40003000', type: '['i2c']') */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_BUS_i2c 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_BUS DT_N_S_soc_S_i2c_40003000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_REG_NUM 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_REG_IDX_0_VAL_ADDRESS 24 /* 0x18 */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_RANGES_NUM 0
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_IRQ_NUM 0
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_IRQ_LEVEL 0
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_COMPAT_MATCHES_bosch_bma530 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_COMPAT_VENDOR_IDX_0 "Bosch Sensortec GmbH"
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_COMPAT_MODEL_IDX_0 "bma530"
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_reg {24 /* 0x18 */}
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_reg_IDX_0 24
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_reg_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int1_gpios_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int1_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000000
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int1_gpios_IDX_0_VAL_pin 10
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int1_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int1_gpios_IDX_0_VAL_flags 0
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int1_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int1_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, int1_gpios, 0)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int1_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, int1_gpios, 0)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int1_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, int1_gpios, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int1_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, int1_gpios, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int1_gpios_LEN 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int1_gpios_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int2_gpios_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int2_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000000
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int2_gpios_IDX_0_VAL_pin 9
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int2_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int2_gpios_IDX_0_VAL_flags 0
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int2_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int2_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, int2_gpios, 0)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int2_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, int2_gpios, 0)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int2_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, int2_gpios, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int2_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, int2_gpios, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int2_gpios_LEN 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_int2_gpios_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_odr 100
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_odr_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_range 8
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_range_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_status "okay"
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, status, 0)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, status, 0)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_status_LEN 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_status_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_compatible {"bosch,bma530"}
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_compatible_IDX_0 "bosch,bma530"
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_compatible_IDX_0_STRING_UNQUOTED bosch,bma530
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_compatible_IDX_0_STRING_TOKEN bosch_bma530
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_compatible_IDX_0_STRING_UPPER_TOKEN BOSCH_BMA530
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, compatible, 0)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, compatible, 0)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_compatible_LEN 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_compatible_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_label "BMA530"
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_label_STRING_UNQUOTED BMA530
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_label_STRING_TOKEN BMA530
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_label_STRING_UPPER_TOKEN BMA530
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_label_IDX_0 "BMA530"
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_label_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, label, 0)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_label_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, label, 0)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_label_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_label_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, label, 0, __VA_ARGS__)
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_label_LEN 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_label_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_wakeup_source 0
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_i2c_40003000_S_bma530_18_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/power@40000000
 *
 * Node identifier: DT_N_S_soc_S_power_40000000
 *
 * Binding (compatible = nordic,nrf-power):
 *   $ZEPHYR_BASE/dts/bindings/power/nordic,nrf-power.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_power_40000000_PATH "/soc/power@40000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_power_40000000_FULL_NAME "power@40000000"
#define DT_N_S_soc_S_power_40000000_FULL_NAME_UNQUOTED power@40000000
#define DT_N_S_soc_S_power_40000000_FULL_NAME_TOKEN power_40000000
#define DT_N_S_soc_S_power_40000000_FULL_NAME_UPPER_TOKEN POWER_40000000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_power_40000000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_power_40000000_CHILD_IDX 6

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_power_40000000_NODELABEL_NUM 1
#define DT_N_S_soc_S_power_40000000_FOREACH_NODELABEL(fn) fn(power)
#define DT_N_S_soc_S_power_40000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(power, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_power_40000000_CHILD_NUM 3
#define DT_N_S_soc_S_power_40000000_CHILD_NUM_STATUS_OKAY 3
#define DT_N_S_soc_S_power_40000000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578)
#define DT_N_S_soc_S_power_40000000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578)
#define DT_N_S_soc_S_power_40000000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c, __VA_ARGS__) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520, __VA_ARGS__) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578)
#define DT_N_S_soc_S_power_40000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578)
#define DT_N_S_soc_S_power_40000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c, __VA_ARGS__) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520, __VA_ARGS__) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578, __VA_ARGS__)

/* Node's hash: */
#define DT_N_S_soc_S_power_40000000_HASH d5ZQxJ7Dny0Q4TLqUh2vFn7wmml1nlavvhVL0GOp08Q

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_power_40000000_ORD 74
#define DT_N_S_soc_S_power_40000000_ORD_STR_SORTABLE 00074

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_power_40000000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_power_40000000_SUPPORTS_ORDS \
	75, /* /soc/power@40000000/gpregret1@4000051c */ \
	76, /* /soc/power@40000000/gpregret2@40000520 */ \
	77, /* /soc/power@40000000/regulator@40000578 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_power_40000000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_power DT_N_S_soc_S_power_40000000
#define DT_N_NODELABEL_power         DT_N_S_soc_S_power_40000000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_power_40000000_REG_NUM 1
#define DT_N_S_soc_S_power_40000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_REG_IDX_0_VAL_ADDRESS 1073741824 /* 0x40000000 */
#define DT_N_S_soc_S_power_40000000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_power_40000000_RANGES_NUM 0
#define DT_N_S_soc_S_power_40000000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_power_40000000_IRQ_NUM 1
#define DT_N_S_soc_S_power_40000000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_IRQ_IDX_0_VAL_irq 0
#define DT_N_S_soc_S_power_40000000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_power_40000000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_power_40000000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_power_40000000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_power_40000000_IRQ_LEVEL 1
#define DT_N_S_soc_S_power_40000000_COMPAT_MATCHES_nordic_nrf_power 1
#define DT_N_S_soc_S_power_40000000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_power_40000000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_COMPAT_MODEL_IDX_0 "nrf-power"
#define DT_N_S_soc_S_power_40000000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_power_40000000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_power_40000000_P_reg {1073741824 /* 0x40000000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_power_40000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_P_reg_IDX_0 1073741824
#define DT_N_S_soc_S_power_40000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_power_40000000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_power_40000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_power_40000000_P_interrupts {0 /* 0x0 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_power_40000000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_P_interrupts_IDX_0 0
#define DT_N_S_soc_S_power_40000000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_power_40000000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_power_40000000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_power_40000000_P_status "okay"
#define DT_N_S_soc_S_power_40000000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_power_40000000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_power_40000000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_power_40000000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_power_40000000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_power_40000000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_power_40000000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_power_40000000, status, 0)
#define DT_N_S_soc_S_power_40000000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_power_40000000, status, 0)
#define DT_N_S_soc_S_power_40000000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_power_40000000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_40000000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_P_status_LEN 1
#define DT_N_S_soc_S_power_40000000_P_status_EXISTS 1
#define DT_N_S_soc_S_power_40000000_P_compatible {"nordic,nrf-power"}
#define DT_N_S_soc_S_power_40000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_P_compatible_IDX_0 "nordic,nrf-power"
#define DT_N_S_soc_S_power_40000000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-power
#define DT_N_S_soc_S_power_40000000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_power
#define DT_N_S_soc_S_power_40000000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_POWER
#define DT_N_S_soc_S_power_40000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_power_40000000, compatible, 0)
#define DT_N_S_soc_S_power_40000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_power_40000000, compatible, 0)
#define DT_N_S_soc_S_power_40000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_power_40000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_40000000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_P_compatible_LEN 1
#define DT_N_S_soc_S_power_40000000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_power_40000000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_power_40000000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_power_40000000_P_wakeup_source 0
#define DT_N_S_soc_S_power_40000000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_power_40000000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_power_40000000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/power@40000000/gpregret1@4000051c
 *
 * Node identifier: DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c
 *
 * Binding (compatible = nordic,nrf-gpregret):
 *   $ZEPHYR_BASE/dts/bindings/retained_mem/nordic,nrf-gpreget.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_PATH "/soc/power@40000000/gpregret1@4000051c"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FULL_NAME "gpregret1@4000051c"
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FULL_NAME_UNQUOTED gpregret1@4000051c
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FULL_NAME_TOKEN gpregret1_4000051c
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FULL_NAME_UPPER_TOKEN GPREGRET1_4000051C

/* Node parent (/soc/power@40000000) identifier: */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_PARENT DT_N_S_soc_S_power_40000000

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_NODELABEL_NUM 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FOREACH_NODELABEL(fn) fn(gpregret1)
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpregret1, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_power_40000000) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_CHILD_NUM 0
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_HASH OWRjmrYfM9jJ_jDDS_Q0kLi6EE_K4K98ruphA6_SbRI

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_ORD 75
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_ORD_STR_SORTABLE 00075

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_REQUIRES_ORDS \
	74, /* /soc/power@40000000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_EXISTS 1
#define DT_N_INST_0_nordic_nrf_gpregret DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c
#define DT_N_NODELABEL_gpregret1        DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_REG_NUM 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_REG_IDX_0_VAL_ADDRESS 1073743132 /* 0x4000051c */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_REG_IDX_0_VAL_SIZE 1 /* 0x1 */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_RANGES_NUM 0
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_IRQ_NUM 0
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_IRQ_LEVEL 0
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_COMPAT_MATCHES_nordic_nrf_gpregret 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_COMPAT_MODEL_IDX_0 "nrf-gpregret"
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_reg {1073743132 /* 0x4000051c */, 1 /* 0x1 */}
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_reg_IDX_0 1073743132
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_reg_IDX_1 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_reg_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_status "okay"
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c, status, 0)
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c, status, 0)
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_status_LEN 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_status_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_compatible {"nordic,nrf-gpregret"}
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_compatible_IDX_0 "nordic,nrf-gpregret"
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpregret
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpregret
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPREGRET
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c, compatible, 0)
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c, compatible, 0)
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_compatible_LEN 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_compatible_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_wakeup_source 0
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/power@40000000/gpregret2@40000520
 *
 * Node identifier: DT_N_S_soc_S_power_40000000_S_gpregret2_40000520
 *
 * Binding (compatible = nordic,nrf-gpregret):
 *   $ZEPHYR_BASE/dts/bindings/retained_mem/nordic,nrf-gpreget.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_PATH "/soc/power@40000000/gpregret2@40000520"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FULL_NAME "gpregret2@40000520"
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FULL_NAME_UNQUOTED gpregret2@40000520
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FULL_NAME_TOKEN gpregret2_40000520
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FULL_NAME_UPPER_TOKEN GPREGRET2_40000520

/* Node parent (/soc/power@40000000) identifier: */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_PARENT DT_N_S_soc_S_power_40000000

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_CHILD_IDX 1

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_NODELABEL_NUM 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FOREACH_NODELABEL(fn) fn(gpregret2)
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpregret2, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_power_40000000) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_CHILD_NUM 0
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_HASH nK_LJMUpkIZ6fTilLYs_3UEtTNx1SlTqnFo7vyc5Udo

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_ORD 76
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_ORD_STR_SORTABLE 00076

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_REQUIRES_ORDS \
	74, /* /soc/power@40000000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_EXISTS 1
#define DT_N_INST_1_nordic_nrf_gpregret DT_N_S_soc_S_power_40000000_S_gpregret2_40000520
#define DT_N_NODELABEL_gpregret2        DT_N_S_soc_S_power_40000000_S_gpregret2_40000520

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_REG_NUM 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_REG_IDX_0_VAL_ADDRESS 1073743136 /* 0x40000520 */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_REG_IDX_0_VAL_SIZE 1 /* 0x1 */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_RANGES_NUM 0
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_IRQ_NUM 0
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_IRQ_LEVEL 0
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_COMPAT_MATCHES_nordic_nrf_gpregret 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_COMPAT_MODEL_IDX_0 "nrf-gpregret"
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_reg {1073743136 /* 0x40000520 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_reg_IDX_0 1073743136
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_reg_IDX_1 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_reg_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_status "okay"
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520, status, 0)
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520, status, 0)
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_status_LEN 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_status_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_compatible {"nordic,nrf-gpregret"}
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_compatible_IDX_0 "nordic,nrf-gpregret"
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-gpregret
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_gpregret
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_GPREGRET
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520, compatible, 0)
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520, compatible, 0)
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_compatible_LEN 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_compatible_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_wakeup_source 0
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_power_40000000_S_gpregret2_40000520_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/power@40000000/regulator@40000578
 *
 * Node identifier: DT_N_S_soc_S_power_40000000_S_regulator_40000578
 *
 * Binding (compatible = nordic,nrf5x-regulator):
 *   $ZEPHYR_BASE/dts/bindings/regulator/nordic,nrf5x-regulator.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_PATH "/soc/power@40000000/regulator@40000578"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FULL_NAME "regulator@40000578"
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FULL_NAME_UNQUOTED regulator@40000578
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FULL_NAME_TOKEN regulator_40000578
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FULL_NAME_UPPER_TOKEN REGULATOR_40000578

/* Node parent (/soc/power@40000000) identifier: */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_PARENT DT_N_S_soc_S_power_40000000

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_CHILD_IDX 2

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_NODELABEL_NUM 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FOREACH_NODELABEL(fn) fn(reg)
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FOREACH_NODELABEL_VARGS(fn, ...) fn(reg, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_power_40000000) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_CHILD_NUM 0
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_HASH WCLCNnr6w0EO9qHHOMmcmn_oZ2W4EYdQl6ZBMFNX5dM

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_ORD 77
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_ORD_STR_SORTABLE 00077

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_REQUIRES_ORDS \
	74, /* /soc/power@40000000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_EXISTS 1
#define DT_N_INST_0_nordic_nrf5x_regulator DT_N_S_soc_S_power_40000000_S_regulator_40000578
#define DT_N_NODELABEL_reg                 DT_N_S_soc_S_power_40000000_S_regulator_40000578

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_REG_NUM 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_REG_IDX_0_VAL_ADDRESS 1073743224 /* 0x40000578 */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_REG_IDX_0_VAL_SIZE 1 /* 0x1 */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_RANGES_NUM 0
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_IRQ_NUM 0
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_IRQ_LEVEL 0
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_COMPAT_MATCHES_nordic_nrf5x_regulator 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_COMPAT_MODEL_IDX_0 "nrf5x-regulator"
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_reg {1073743224 /* 0x40000578 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_reg_IDX_0 1073743224
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_reg_IDX_1 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_reg_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_regulator_name "REG"
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_regulator_name_STRING_UNQUOTED REG
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_regulator_name_STRING_TOKEN REG
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_regulator_name_STRING_UPPER_TOKEN REG
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_regulator_name_IDX_0 "REG"
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_regulator_name_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_regulator_name_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578, regulator_name, 0)
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_regulator_name_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578, regulator_name, 0)
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_regulator_name_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578, regulator_name, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_regulator_name_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578, regulator_name, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_regulator_name_LEN 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_regulator_name_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_regulator_initial_mode 0
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_regulator_initial_mode_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_compatible {"nordic,nrf5x-regulator"}
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_compatible_IDX_0 "nordic,nrf5x-regulator"
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf5x-regulator
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_compatible_IDX_0_STRING_TOKEN nordic_nrf5x_regulator
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF5X_REGULATOR
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578, compatible, 0)
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578, compatible, 0)
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_compatible_LEN 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_compatible_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_wakeup_source 0
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_power_40000000_S_regulator_40000578_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/radio@40001000
 *
 * Node identifier: DT_N_S_soc_S_radio_40001000
 *
 * Binding (compatible = nordic,nrf-radio):
 *   $ZEPHYR_BASE/dts/bindings/net/wireless/nordic,nrf-radio.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_radio_40001000_PATH "/soc/radio@40001000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_radio_40001000_FULL_NAME "radio@40001000"
#define DT_N_S_soc_S_radio_40001000_FULL_NAME_UNQUOTED radio@40001000
#define DT_N_S_soc_S_radio_40001000_FULL_NAME_TOKEN radio_40001000
#define DT_N_S_soc_S_radio_40001000_FULL_NAME_UPPER_TOKEN RADIO_40001000

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_radio_40001000_PARENT DT_N_S_soc

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_radio_40001000_CHILD_IDX 8

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_radio_40001000_NODELABEL_NUM 1
#define DT_N_S_soc_S_radio_40001000_FOREACH_NODELABEL(fn) fn(radio)
#define DT_N_S_soc_S_radio_40001000_FOREACH_NODELABEL_VARGS(fn, ...) fn(radio, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_radio_40001000_CHILD_NUM 2
#define DT_N_S_soc_S_radio_40001000_CHILD_NUM_STATUS_OKAY 1
#define DT_N_S_soc_S_radio_40001000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller)
#define DT_N_S_soc_S_radio_40001000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller)
#define DT_N_S_soc_S_radio_40001000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, __VA_ARGS__) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc)
#define DT_N_S_soc_S_radio_40001000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc)
#define DT_N_S_soc_S_radio_40001000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, __VA_ARGS__)

/* Node's hash: */
#define DT_N_S_soc_S_radio_40001000_HASH EhySRig3_YTJPPOLi2lkW9MH67kBg_0lXwfv5Sl4ivk

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_radio_40001000_ORD 78
#define DT_N_S_soc_S_radio_40001000_ORD_STR_SORTABLE 00078

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_radio_40001000_REQUIRES_ORDS \
	4, /* /soc */ \
	5, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_radio_40001000_SUPPORTS_ORDS \
	79, /* /soc/radio@40001000/bt_hci_controller */ \
	80, /* /soc/radio@40001000/bt_hci_sdc */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_radio_40001000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_radio DT_N_S_soc_S_radio_40001000
#define DT_N_NODELABEL_radio         DT_N_S_soc_S_radio_40001000

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_radio_40001000_REG_NUM 1
#define DT_N_S_soc_S_radio_40001000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_REG_IDX_0_VAL_ADDRESS 1073745920 /* 0x40001000 */
#define DT_N_S_soc_S_radio_40001000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_radio_40001000_RANGES_NUM 0
#define DT_N_S_soc_S_radio_40001000_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_radio_40001000_IRQ_NUM 1
#define DT_N_S_soc_S_radio_40001000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_IRQ_IDX_0_VAL_irq 1
#define DT_N_S_soc_S_radio_40001000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_radio_40001000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_S_soc_S_radio_40001000_IRQ_LEVEL 1
#define DT_N_S_soc_S_radio_40001000_COMPAT_MATCHES_nordic_nrf_radio 1
#define DT_N_S_soc_S_radio_40001000_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_radio_40001000_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_COMPAT_MODEL_IDX_0 "nrf-radio"
#define DT_N_S_soc_S_radio_40001000_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_radio_40001000_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_radio_40001000_P_reg {1073745920 /* 0x40001000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_radio_40001000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_reg_IDX_0 1073745920
#define DT_N_S_soc_S_radio_40001000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_radio_40001000_P_reg_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_interrupts {1 /* 0x1 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_radio_40001000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_interrupts_IDX_0 1
#define DT_N_S_soc_S_radio_40001000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_radio_40001000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_dfe_supported 0
#define DT_N_S_soc_S_radio_40001000_P_dfe_supported_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_ieee802154_supported 0
#define DT_N_S_soc_S_radio_40001000_P_ieee802154_supported_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_ble_2mbps_supported 1
#define DT_N_S_soc_S_radio_40001000_P_ble_2mbps_supported_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_ble_coded_phy_supported 0
#define DT_N_S_soc_S_radio_40001000_P_ble_coded_phy_supported_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_tx_high_power_supported 0
#define DT_N_S_soc_S_radio_40001000_P_tx_high_power_supported_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_cs_supported 0
#define DT_N_S_soc_S_radio_40001000_P_cs_supported_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_status "okay"
#define DT_N_S_soc_S_radio_40001000_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_radio_40001000_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_radio_40001000_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_radio_40001000_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_radio_40001000_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_radio_40001000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_40001000, status, 0)
#define DT_N_S_soc_S_radio_40001000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_40001000, status, 0)
#define DT_N_S_soc_S_radio_40001000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_40001000, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_P_status_LEN 1
#define DT_N_S_soc_S_radio_40001000_P_status_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_compatible {"nordic,nrf-radio"}
#define DT_N_S_soc_S_radio_40001000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_compatible_IDX_0 "nordic,nrf-radio"
#define DT_N_S_soc_S_radio_40001000_P_compatible_IDX_0_STRING_UNQUOTED nordic,nrf-radio
#define DT_N_S_soc_S_radio_40001000_P_compatible_IDX_0_STRING_TOKEN nordic_nrf_radio
#define DT_N_S_soc_S_radio_40001000_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_NRF_RADIO
#define DT_N_S_soc_S_radio_40001000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_40001000, compatible, 0)
#define DT_N_S_soc_S_radio_40001000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_40001000, compatible, 0)
#define DT_N_S_soc_S_radio_40001000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_40001000, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_P_compatible_LEN 1
#define DT_N_S_soc_S_radio_40001000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_radio_40001000_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_wakeup_source 0
#define DT_N_S_soc_S_radio_40001000_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_radio_40001000_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/radio@40001000/bt_hci_controller
 *
 * Node identifier: DT_N_S_soc_S_radio_40001000_S_bt_hci_controller
 *
 * Binding (compatible = zephyr,bt-hci-ll-sw-split):
 *   $ZEPHYR_BASE/dts/bindings/bluetooth/zephyr,bt-hci-ll-sw-split.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_PATH "/soc/radio@40001000/bt_hci_controller"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FULL_NAME "bt_hci_controller"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FULL_NAME_UNQUOTED bt_hci_controller
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FULL_NAME_TOKEN bt_hci_controller
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FULL_NAME_UPPER_TOKEN BT_HCI_CONTROLLER

/* Node parent (/soc/radio@40001000) identifier: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_PARENT DT_N_S_soc_S_radio_40001000

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_CHILD_IDX 1

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_NODELABEL_NUM 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FOREACH_NODELABEL(fn) fn(bt_hci_controller)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FOREACH_NODELABEL_VARGS(fn, ...) fn(bt_hci_controller, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_radio_40001000) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_CHILD_NUM 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_HASH IMh9qmPrfgi4fCuriAPFm_mVkv1qEz1_6WXYE6pxZ1I

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_ORD 79
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_ORD_STR_SORTABLE 00079

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_REQUIRES_ORDS \
	78, /* /soc/radio@40001000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_EXISTS 1
#define DT_N_INST_0_zephyr_bt_hci_ll_sw_split DT_N_S_soc_S_radio_40001000_S_bt_hci_controller
#define DT_N_NODELABEL_bt_hci_controller      DT_N_S_soc_S_radio_40001000_S_bt_hci_controller

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_REG_NUM 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_RANGES_NUM 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_IRQ_NUM 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_IRQ_LEVEL 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_COMPAT_MATCHES_zephyr_bt_hci_ll_sw_split 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_COMPAT_VENDOR_IDX_0 "The Zephyr Project"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_COMPAT_MODEL_IDX_0 "bt-hci-ll-sw-split"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_STATUS_disabled 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_name "Controller"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_name_STRING_UNQUOTED Controller
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_name_STRING_TOKEN Controller
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_name_STRING_UPPER_TOKEN CONTROLLER
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_name_IDX_0 "Controller"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_name_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_name_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, bt_hci_name, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_name_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, bt_hci_name, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_name_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, bt_hci_name, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_name_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, bt_hci_name, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_name_LEN 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_name_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_bus "virtual"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_bus_STRING_UNQUOTED virtual
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_bus_STRING_TOKEN virtual
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_bus_STRING_UPPER_TOKEN VIRTUAL
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_bus_IDX_0 "virtual"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_bus_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_bus_IDX_0_ENUM_IDX 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_bus_IDX_0_ENUM_VAL_virtual_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_bus_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, bt_hci_bus, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_bus_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, bt_hci_bus, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_bus_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, bt_hci_bus, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_bus_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, bt_hci_bus, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_bus_LEN 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_bus_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_quirks {"no-auto-dle"}
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_quirks_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_quirks_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_quirks_IDX_0_ENUM_VAL_no_auto_dle_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_quirks_IDX_0 "no-auto-dle"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_quirks_IDX_0_STRING_UNQUOTED no-auto-dle
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_quirks_IDX_0_STRING_TOKEN no_auto_dle
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_quirks_IDX_0_STRING_UPPER_TOKEN NO_AUTO_DLE
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_quirks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, bt_hci_quirks, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_quirks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, bt_hci_quirks, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_quirks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, bt_hci_quirks, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_quirks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, bt_hci_quirks, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_quirks_LEN 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_quirks_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_vs_ext 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_bt_hci_vs_ext_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_status "disabled"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_status_STRING_UNQUOTED disabled
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_status_STRING_TOKEN disabled
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_status_STRING_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_status_IDX_0 "disabled"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_status_IDX_0_ENUM_IDX 2
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, status, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, status, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_status_LEN 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_status_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_compatible {"zephyr,bt-hci-ll-sw-split"}
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_compatible_IDX_0 "zephyr,bt-hci-ll-sw-split"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_compatible_IDX_0_STRING_UNQUOTED zephyr,bt-hci-ll-sw-split
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_compatible_IDX_0_STRING_TOKEN zephyr_bt_hci_ll_sw_split
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_BT_HCI_LL_SW_SPLIT
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, compatible, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, compatible, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_compatible_LEN 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_compatible_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_wakeup_source 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_controller_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Devicetree node: /soc/radio@40001000/bt_hci_sdc
 *
 * Node identifier: DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc
 *
 * Binding (compatible = nordic,bt-hci-sdc):
 *   /opt/nordic/ncs/v3.1.1/nrf/dts/bindings/bluetooth/nordic,bt-hci-sdc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_PATH "/soc/radio@40001000/bt_hci_sdc"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FULL_NAME "bt_hci_sdc"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FULL_NAME_UNQUOTED bt_hci_sdc
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FULL_NAME_TOKEN bt_hci_sdc
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FULL_NAME_UPPER_TOKEN BT_HCI_SDC

/* Node parent (/soc/radio@40001000) identifier: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_PARENT DT_N_S_soc_S_radio_40001000

/* Node's index in its parent's list of children: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_CHILD_IDX 0

/* Helpers for dealing with node labels: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_NODELABEL_NUM 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FOREACH_NODELABEL(fn) fn(bt_hci_sdc)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FOREACH_NODELABEL_VARGS(fn, ...) fn(bt_hci_sdc, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_radio_40001000) fn(DT_N_S_soc) fn(DT_N)

/* Helper macros for child nodes of this node. */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_CHILD_NUM 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_CHILD_NUM_STATUS_OKAY 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FOREACH_CHILD_SEP(fn, sep) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FOREACH_CHILD_VARGS(fn, ...) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FOREACH_CHILD_STATUS_OKAY(fn) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) 

/* Node's hash: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_HASH Ig5iMuWVZBCfc9Fr9AANLBu_vA4OFpHfkkz5Gn6olm0

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_ORD 80
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_ORD_STR_SORTABLE 00080

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_REQUIRES_ORDS \
	78, /* /soc/radio@40001000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_EXISTS 1
#define DT_N_INST_0_nordic_bt_hci_sdc DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc
#define DT_N_NODELABEL_bt_hci_sdc     DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc

/* Macros for properties that are special in the specification: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_REG_NUM 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_RANGES_NUM 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_FOREACH_RANGE(fn) 
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_IRQ_NUM 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_IRQ_LEVEL 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_COMPAT_MATCHES_nordic_bt_hci_sdc 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_COMPAT_VENDOR_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_COMPAT_VENDOR_IDX_0 "Nordic Semiconductor"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_COMPAT_MODEL_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_COMPAT_MODEL_IDX_0 "bt-hci-sdc"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_STATUS_okay 1

/* Pin control (pinctrl-<i>, pinctrl-names) properties: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_PINCTRL_NUM 0

/* Generic property macros: */
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_name "SDC"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_name_STRING_UNQUOTED SDC
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_name_STRING_TOKEN SDC
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_name_STRING_UPPER_TOKEN SDC
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_name_IDX_0 "SDC"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_name_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_name_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, bt_hci_name, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_name_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, bt_hci_name, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_name_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, bt_hci_name, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_name_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, bt_hci_name, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_name_LEN 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_name_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_bus "virtual"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_bus_STRING_UNQUOTED virtual
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_bus_STRING_TOKEN virtual
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_bus_STRING_UPPER_TOKEN VIRTUAL
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_bus_IDX_0 "virtual"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_bus_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_bus_IDX_0_ENUM_IDX 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_bus_IDX_0_ENUM_VAL_virtual_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_bus_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, bt_hci_bus, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_bus_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, bt_hci_bus, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_bus_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, bt_hci_bus, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_bus_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, bt_hci_bus, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_bus_LEN 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_bus_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_vs_ext 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_bt_hci_vs_ext_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_status "okay"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_status_STRING_UNQUOTED okay
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_status_STRING_TOKEN okay
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_status_STRING_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_status_IDX_0 "okay"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_status_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_status_IDX_0_ENUM_IDX 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, status, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, status, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, status, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_status_LEN 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_status_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_compatible {"nordic,bt-hci-sdc"}
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_compatible_IDX_0 "nordic,bt-hci-sdc"
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_compatible_IDX_0_STRING_UNQUOTED nordic,bt-hci-sdc
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_compatible_IDX_0_STRING_TOKEN nordic_bt_hci_sdc
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_compatible_IDX_0_STRING_UPPER_TOKEN NORDIC_BT_HCI_SDC
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, compatible, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, compatible, 0)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, compatible, 0, __VA_ARGS__)
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_compatible_LEN 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_compatible_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_zephyr_deferred_init 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_zephyr_deferred_init_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_wakeup_source 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_wakeup_source_EXISTS 1
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_zephyr_pm_device_runtime_auto 0
#define DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc_P_zephyr_pm_device_runtime_auto_EXISTS 1

/*
 * Chosen nodes
 */
#define DT_CHOSEN_zephyr_bt_hci                  DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc
#define DT_CHOSEN_zephyr_bt_hci_EXISTS           1
#define DT_CHOSEN_zephyr_entropy                 DT_N_S_soc_S_random_4000d000
#define DT_CHOSEN_zephyr_entropy_EXISTS          1
#define DT_CHOSEN_zephyr_flash_controller        DT_N_S_soc_S_flash_controller_4001e000
#define DT_CHOSEN_zephyr_flash_controller_EXISTS 1
#define DT_CHOSEN_zephyr_sram                    DT_N_S_soc_S_memory_20000000
#define DT_CHOSEN_zephyr_sram_EXISTS             1
#define DT_CHOSEN_zephyr_flash                   DT_N_S_soc_S_flash_controller_4001e000_S_flash_0
#define DT_CHOSEN_zephyr_flash_EXISTS            1
#define DT_CHOSEN_zephyr_code_partition          DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000
#define DT_CHOSEN_zephyr_code_partition_EXISTS   1

/* Macros for iterating over all nodes and enabled nodes */
#define DT_FOREACH_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_ficr_10000000) fn(DT_N_S_soc_S_uicr_10001000) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_clock_40000000) fn(DT_N_S_soc_S_power_40000000) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578) fn(DT_N_S_soc_S_bprot_40000000) fn(DT_N_S_soc_S_radio_40001000) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller) fn(DT_N_S_soc_S_uart_40002000) fn(DT_N_S_soc_S_i2c_40003000) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18) fn(DT_N_S_soc_S_spi_40003000) fn(DT_N_S_soc_S_i2c_40004000) fn(DT_N_S_soc_S_spi_40004000) fn(DT_N_S_soc_S_nfct_40005000) fn(DT_N_S_soc_S_gpiote_40006000) fn(DT_N_S_soc_S_adc_40007000) fn(DT_N_S_soc_S_adc_40007000_S_channel_0) fn(DT_N_S_soc_S_timer_40008000) fn(DT_N_S_soc_S_timer_40009000) fn(DT_N_S_soc_S_timer_4000a000) fn(DT_N_S_soc_S_rtc_4000b000) fn(DT_N_S_soc_S_temp_4000c000) fn(DT_N_S_soc_S_random_4000d000) fn(DT_N_S_soc_S_ecb_4000e000) fn(DT_N_S_soc_S_ccm_4000f000) fn(DT_N_S_soc_S_watchdog_40010000) fn(DT_N_S_soc_S_rtc_40011000) fn(DT_N_S_soc_S_qdec_40012000) fn(DT_N_S_soc_S_comparator_40013000) fn(DT_N_S_soc_S_egu_40014000) fn(DT_N_S_soc_S_egu_40015000) fn(DT_N_S_soc_S_egu_40016000) fn(DT_N_S_soc_S_egu_40017000) fn(DT_N_S_soc_S_egu_40018000) fn(DT_N_S_soc_S_egu_40019000) fn(DT_N_S_soc_S_timer_4001a000) fn(DT_N_S_soc_S_timer_4001b000) fn(DT_N_S_soc_S_pwm_4001c000) fn(DT_N_S_soc_S_pdm_4001d000) fn(DT_N_S_soc_S_flash_controller_4001e000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000) fn(DT_N_S_soc_S_ppi_4001f000) fn(DT_N_S_soc_S_mwu_40020000) fn(DT_N_S_soc_S_pwm_40021000) fn(DT_N_S_soc_S_pwm_40022000) fn(DT_N_S_soc_S_spi_40023000) fn(DT_N_S_soc_S_rtc_40024000) fn(DT_N_S_soc_S_i2s_40025000) fn(DT_N_S_soc_S_gpio_50000000) fn(DT_N_S_pin_controller) fn(DT_N_S_pin_controller_S_i2c0_default_1) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1) fn(DT_N_S_pin_controller_S_i2c0_sleep_1) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_sw_pwm) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000) fn(DT_N_S_clocks) fn(DT_N_S_clocks_S_hfxo) fn(DT_N_S_zephyr_user) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_vcc_enable)
#define DT_FOREACH_OKAY_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_ficr_10000000) fn(DT_N_S_soc_S_uicr_10001000) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_clock_40000000) fn(DT_N_S_soc_S_power_40000000) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578) fn(DT_N_S_soc_S_bprot_40000000) fn(DT_N_S_soc_S_radio_40001000) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc) fn(DT_N_S_soc_S_i2c_40003000) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18) fn(DT_N_S_soc_S_gpiote_40006000) fn(DT_N_S_soc_S_adc_40007000) fn(DT_N_S_soc_S_adc_40007000_S_channel_0) fn(DT_N_S_soc_S_random_4000d000) fn(DT_N_S_soc_S_ecb_4000e000) fn(DT_N_S_soc_S_ccm_4000f000) fn(DT_N_S_soc_S_watchdog_40010000) fn(DT_N_S_soc_S_egu_40014000) fn(DT_N_S_soc_S_egu_40015000) fn(DT_N_S_soc_S_egu_40016000) fn(DT_N_S_soc_S_egu_40017000) fn(DT_N_S_soc_S_egu_40018000) fn(DT_N_S_soc_S_egu_40019000) fn(DT_N_S_soc_S_flash_controller_4001e000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000) fn(DT_N_S_soc_S_ppi_4001f000) fn(DT_N_S_soc_S_mwu_40020000) fn(DT_N_S_soc_S_gpio_50000000) fn(DT_N_S_pin_controller) fn(DT_N_S_pin_controller_S_i2c0_default_1) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1) fn(DT_N_S_pin_controller_S_i2c0_sleep_1) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1) fn(DT_N_S_entropy_bt_hci) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000) fn(DT_N_S_clocks) fn(DT_N_S_clocks_S_hfxo) fn(DT_N_S_zephyr_user) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_vcc_enable)
#define DT_FOREACH_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_10000000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_10001000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_clock_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_power_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c, __VA_ARGS__) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520, __VA_ARGS__) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578, __VA_ARGS__) fn(DT_N_S_soc_S_bprot_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_radio_40001000, __VA_ARGS__) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, __VA_ARGS__) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_controller, __VA_ARGS__) fn(DT_N_S_soc_S_uart_40002000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40003000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40004000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40004000, __VA_ARGS__) fn(DT_N_S_soc_S_nfct_40005000, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_40006000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40007000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40007000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_timer_40008000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_40009000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_4000a000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_4000b000, __VA_ARGS__) fn(DT_N_S_soc_S_temp_4000c000, __VA_ARGS__) fn(DT_N_S_soc_S_random_4000d000, __VA_ARGS__) fn(DT_N_S_soc_S_ecb_4000e000, __VA_ARGS__) fn(DT_N_S_soc_S_ccm_4000f000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_qdec_40012000, __VA_ARGS__) fn(DT_N_S_soc_S_comparator_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40015000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40016000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40017000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40018000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40019000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_4001a000, __VA_ARGS__) fn(DT_N_S_soc_S_timer_4001b000, __VA_ARGS__) fn(DT_N_S_soc_S_pwm_4001c000, __VA_ARGS__) fn(DT_N_S_soc_S_pdm_4001d000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000, __VA_ARGS__) fn(DT_N_S_soc_S_ppi_4001f000, __VA_ARGS__) fn(DT_N_S_soc_S_mwu_40020000, __VA_ARGS__) fn(DT_N_S_soc_S_pwm_40021000, __VA_ARGS__) fn(DT_N_S_soc_S_pwm_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40023000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_40024000, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40025000, __VA_ARGS__) fn(DT_N_S_soc_S_gpio_50000000, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c0_default_1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c0_sleep_1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_sw_pwm, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_clocks_S_hfxo, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_vcc_enable, __VA_ARGS__)
#define DT_FOREACH_OKAY_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_ficr_10000000, __VA_ARGS__) fn(DT_N_S_soc_S_uicr_10001000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__) fn(DT_N_S_soc_S_clock_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_power_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c, __VA_ARGS__) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520, __VA_ARGS__) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578, __VA_ARGS__) fn(DT_N_S_soc_S_bprot_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_radio_40001000, __VA_ARGS__) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40003000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, __VA_ARGS__) fn(DT_N_S_soc_S_gpiote_40006000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40007000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40007000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_random_4000d000, __VA_ARGS__) fn(DT_N_S_soc_S_ecb_4000e000, __VA_ARGS__) fn(DT_N_S_soc_S_ccm_4000f000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40015000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40016000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40017000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40018000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40019000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000, __VA_ARGS__) fn(DT_N_S_soc_S_ppi_4001f000, __VA_ARGS__) fn(DT_N_S_soc_S_mwu_40020000, __VA_ARGS__) fn(DT_N_S_soc_S_gpio_50000000, __VA_ARGS__) fn(DT_N_S_pin_controller, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c0_default_1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c0_default_1_S_group1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c0_sleep_1, __VA_ARGS__) fn(DT_N_S_pin_controller_S_i2c0_sleep_1_S_group1, __VA_ARGS__) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_clocks_S_hfxo, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_vcc_enable, __VA_ARGS__)
#define DT_COMPAT_fixed_partitions_LABEL_mcuboot DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0
#define DT_COMPAT_fixed_partitions_LABEL_mcuboot_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_image_0 DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000
#define DT_COMPAT_fixed_partitions_LABEL_image_0_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_image_1 DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_31800
#define DT_COMPAT_fixed_partitions_LABEL_image_1_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_app_storage_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_57000
#define DT_COMPAT_fixed_partitions_LABEL_app_storage_partition_EXISTS 1

/*
 * Macros for compatibles with status "okay" nodes
 */
#define DT_COMPAT_HAS_OKAY_kleinigkeit_kleinigkeit_es2832aa2 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf52832_qfaa 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf52832 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf52 1
#define DT_COMPAT_HAS_OKAY_simple_bus 1
#define DT_COMPAT_HAS_OKAY_arm_v7m_nvic 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_ficr 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_uicr 1
#define DT_COMPAT_HAS_OKAY_mmio_sram 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_clock 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_power 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpregret 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf5x_regulator 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_bprot 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_radio 1
#define DT_COMPAT_HAS_OKAY_nordic_bt_hci_sdc 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_twim 1
#define DT_COMPAT_HAS_OKAY_bosch_bma530 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpiote 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_saadc 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_rng 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_ecb 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_ccm 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_wdt 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_egu 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_swi 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf52_flash_controller 1
#define DT_COMPAT_HAS_OKAY_soc_nv_flash 1
#define DT_COMPAT_HAS_OKAY_fixed_partitions 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_ppi 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_mwu 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpio 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_pinctrl 1
#define DT_COMPAT_HAS_OKAY_zephyr_bt_hci_entropy 1
#define DT_COMPAT_HAS_OKAY_arm_cortex_m4f 1
#define DT_COMPAT_HAS_OKAY_arm_armv7m_itm 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf52_hfxo 1
#define DT_COMPAT_HAS_OKAY_gpio_leds 1
#define DT_COMPAT_HAS_OKAY_nordic_gpio_pins 1

/*
 * Macros for status "okay" instances of each compatible
 */
#define DT_N_INST_kleinigkeit_kleinigkeit_es2832aa2_NUM_OKAY 1
#define DT_N_INST_nordic_nrf52832_qfaa_NUM_OKAY 1
#define DT_N_INST_nordic_nrf52832_NUM_OKAY 1
#define DT_N_INST_nordic_nrf52_NUM_OKAY 1
#define DT_N_INST_simple_bus_NUM_OKAY 1
#define DT_N_INST_arm_v7m_nvic_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_ficr_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_uicr_NUM_OKAY 1
#define DT_N_INST_mmio_sram_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_clock_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_power_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_gpregret_NUM_OKAY 2
#define DT_N_INST_nordic_nrf5x_regulator_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_bprot_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_radio_NUM_OKAY 1
#define DT_N_INST_nordic_bt_hci_sdc_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_twim_NUM_OKAY 1
#define DT_N_INST_bosch_bma530_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_gpiote_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_saadc_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_rng_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_ecb_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_ccm_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_wdt_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_egu_NUM_OKAY 6
#define DT_N_INST_nordic_nrf_swi_NUM_OKAY 6
#define DT_N_INST_nordic_nrf52_flash_controller_NUM_OKAY 1
#define DT_N_INST_soc_nv_flash_NUM_OKAY 1
#define DT_N_INST_fixed_partitions_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_ppi_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_mwu_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_gpio_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_pinctrl_NUM_OKAY 1
#define DT_N_INST_zephyr_bt_hci_entropy_NUM_OKAY 1
#define DT_N_INST_arm_cortex_m4f_NUM_OKAY 1
#define DT_N_INST_arm_armv7m_itm_NUM_OKAY 1
#define DT_N_INST_nordic_nrf52_hfxo_NUM_OKAY 1
#define DT_N_INST_gpio_leds_NUM_OKAY 1
#define DT_N_INST_nordic_gpio_pins_NUM_OKAY 1
#define DT_FOREACH_OKAY_kleinigkeit_kleinigkeit_es2832aa2(fn) fn(DT_N)
#define DT_FOREACH_OKAY_VARGS_kleinigkeit_kleinigkeit_es2832aa2(fn, ...) fn(DT_N, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_kleinigkeit_kleinigkeit_es2832aa2(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_kleinigkeit_kleinigkeit_es2832aa2(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf52832_qfaa(fn) fn(DT_N_S_soc)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf52832_qfaa(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf52832_qfaa(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf52832_qfaa(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf52832(fn) fn(DT_N_S_soc)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf52832(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf52832(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf52832(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf52(fn) fn(DT_N_S_soc)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf52(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf52(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf52(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_simple_bus(fn) fn(DT_N_S_soc)
#define DT_FOREACH_OKAY_VARGS_simple_bus(fn, ...) fn(DT_N_S_soc, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_simple_bus(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_simple_bus(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_arm_v7m_nvic(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100)
#define DT_FOREACH_OKAY_VARGS_arm_v7m_nvic(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_arm_v7m_nvic(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_arm_v7m_nvic(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_ficr(fn) fn(DT_N_S_soc_S_ficr_10000000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ficr(fn, ...) fn(DT_N_S_soc_S_ficr_10000000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_ficr(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ficr(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_uicr(fn) fn(DT_N_S_soc_S_uicr_10001000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_uicr(fn, ...) fn(DT_N_S_soc_S_uicr_10001000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_uicr(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_uicr(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_mmio_sram(fn) fn(DT_N_S_soc_S_memory_20000000)
#define DT_FOREACH_OKAY_VARGS_mmio_sram(fn, ...) fn(DT_N_S_soc_S_memory_20000000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_mmio_sram(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_mmio_sram(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_clock(fn) fn(DT_N_S_soc_S_clock_40000000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_clock(fn, ...) fn(DT_N_S_soc_S_clock_40000000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_clock(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_clock(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_power(fn) fn(DT_N_S_soc_S_power_40000000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_power(fn, ...) fn(DT_N_S_soc_S_power_40000000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_power(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_power(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_gpregret(fn) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_gpregret(fn, ...) fn(DT_N_S_soc_S_power_40000000_S_gpregret1_4000051c, __VA_ARGS__) fn(DT_N_S_soc_S_power_40000000_S_gpregret2_40000520, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_gpregret(fn) fn(0) fn(1)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_gpregret(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf5x_regulator(fn) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf5x_regulator(fn, ...) fn(DT_N_S_soc_S_power_40000000_S_regulator_40000578, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf5x_regulator(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf5x_regulator(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_bprot(fn) fn(DT_N_S_soc_S_bprot_40000000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_bprot(fn, ...) fn(DT_N_S_soc_S_bprot_40000000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_bprot(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_bprot(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_radio(fn) fn(DT_N_S_soc_S_radio_40001000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_radio(fn, ...) fn(DT_N_S_soc_S_radio_40001000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_radio(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_radio(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_bt_hci_sdc(fn) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc)
#define DT_FOREACH_OKAY_VARGS_nordic_bt_hci_sdc(fn, ...) fn(DT_N_S_soc_S_radio_40001000_S_bt_hci_sdc, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_bt_hci_sdc(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_bt_hci_sdc(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_twim(fn) fn(DT_N_S_soc_S_i2c_40003000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_twim(fn, ...) fn(DT_N_S_soc_S_i2c_40003000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_twim(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_twim(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_bosch_bma530(fn) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18)
#define DT_FOREACH_OKAY_VARGS_bosch_bma530(fn, ...) fn(DT_N_S_soc_S_i2c_40003000_S_bma530_18, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_bosch_bma530(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_bosch_bma530(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_gpiote(fn) fn(DT_N_S_soc_S_gpiote_40006000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_gpiote(fn, ...) fn(DT_N_S_soc_S_gpiote_40006000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_gpiote(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_gpiote(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_saadc(fn) fn(DT_N_S_soc_S_adc_40007000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_saadc(fn, ...) fn(DT_N_S_soc_S_adc_40007000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_saadc(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_saadc(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_rng(fn) fn(DT_N_S_soc_S_random_4000d000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_rng(fn, ...) fn(DT_N_S_soc_S_random_4000d000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_rng(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_rng(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_ecb(fn) fn(DT_N_S_soc_S_ecb_4000e000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ecb(fn, ...) fn(DT_N_S_soc_S_ecb_4000e000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_ecb(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ecb(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_ccm(fn) fn(DT_N_S_soc_S_ccm_4000f000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ccm(fn, ...) fn(DT_N_S_soc_S_ccm_4000f000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_ccm(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ccm(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_wdt(fn) fn(DT_N_S_soc_S_watchdog_40010000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_wdt(fn, ...) fn(DT_N_S_soc_S_watchdog_40010000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_wdt(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_wdt(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_egu(fn) fn(DT_N_S_soc_S_egu_40014000) fn(DT_N_S_soc_S_egu_40015000) fn(DT_N_S_soc_S_egu_40016000) fn(DT_N_S_soc_S_egu_40017000) fn(DT_N_S_soc_S_egu_40018000) fn(DT_N_S_soc_S_egu_40019000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_egu(fn, ...) fn(DT_N_S_soc_S_egu_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40015000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40016000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40017000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40018000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40019000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_egu(fn) fn(0) fn(1) fn(2) fn(3) fn(4) fn(5)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_egu(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) fn(3, __VA_ARGS__) fn(4, __VA_ARGS__) fn(5, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_swi(fn) fn(DT_N_S_soc_S_egu_40014000) fn(DT_N_S_soc_S_egu_40015000) fn(DT_N_S_soc_S_egu_40016000) fn(DT_N_S_soc_S_egu_40017000) fn(DT_N_S_soc_S_egu_40018000) fn(DT_N_S_soc_S_egu_40019000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_swi(fn, ...) fn(DT_N_S_soc_S_egu_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40015000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40016000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40017000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40018000, __VA_ARGS__) fn(DT_N_S_soc_S_egu_40019000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_swi(fn) fn(0) fn(1) fn(2) fn(3) fn(4) fn(5)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_swi(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) fn(3, __VA_ARGS__) fn(4, __VA_ARGS__) fn(5, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf52_flash_controller(fn) fn(DT_N_S_soc_S_flash_controller_4001e000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf52_flash_controller(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf52_flash_controller(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf52_flash_controller(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_soc_nv_flash(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0)
#define DT_FOREACH_OKAY_VARGS_soc_nv_flash(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_soc_nv_flash(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_soc_nv_flash(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_fixed_partitions(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions)
#define DT_FOREACH_OKAY_VARGS_fixed_partitions(fn, ...) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_fixed_partitions(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_fixed_partitions(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_ppi(fn) fn(DT_N_S_soc_S_ppi_4001f000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_ppi(fn, ...) fn(DT_N_S_soc_S_ppi_4001f000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_ppi(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_ppi(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_mwu(fn) fn(DT_N_S_soc_S_mwu_40020000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_mwu(fn, ...) fn(DT_N_S_soc_S_mwu_40020000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_mwu(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_mwu(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_gpio(fn) fn(DT_N_S_soc_S_gpio_50000000)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_gpio(fn, ...) fn(DT_N_S_soc_S_gpio_50000000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_gpio(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_gpio(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf_pinctrl(fn) fn(DT_N_S_pin_controller)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf_pinctrl(fn, ...) fn(DT_N_S_pin_controller, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf_pinctrl(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf_pinctrl(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_zephyr_bt_hci_entropy(fn) fn(DT_N_S_entropy_bt_hci)
#define DT_FOREACH_OKAY_VARGS_zephyr_bt_hci_entropy(fn, ...) fn(DT_N_S_entropy_bt_hci, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_zephyr_bt_hci_entropy(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_zephyr_bt_hci_entropy(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_arm_cortex_m4f(fn) fn(DT_N_S_cpus_S_cpu_0)
#define DT_FOREACH_OKAY_VARGS_arm_cortex_m4f(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_arm_cortex_m4f(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_arm_cortex_m4f(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_arm_armv7m_itm(fn) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000)
#define DT_FOREACH_OKAY_VARGS_arm_armv7m_itm(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_itm_e0000000, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_arm_armv7m_itm(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_arm_armv7m_itm(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_nrf52_hfxo(fn) fn(DT_N_S_clocks_S_hfxo)
#define DT_FOREACH_OKAY_VARGS_nordic_nrf52_hfxo(fn, ...) fn(DT_N_S_clocks_S_hfxo, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_nrf52_hfxo(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_nrf52_hfxo(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_gpio_leds(fn) fn(DT_N_S_leds)
#define DT_FOREACH_OKAY_VARGS_gpio_leds(fn, ...) fn(DT_N_S_leds, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_gpio_leds(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_gpio_leds(fn, ...) fn(0, __VA_ARGS__)
#define DT_FOREACH_OKAY_nordic_gpio_pins(fn) fn(DT_N_S_vcc_enable)
#define DT_FOREACH_OKAY_VARGS_nordic_gpio_pins(fn, ...) fn(DT_N_S_vcc_enable, __VA_ARGS__)
#define DT_FOREACH_OKAY_INST_nordic_gpio_pins(fn) fn(0)
#define DT_FOREACH_OKAY_INST_VARGS_nordic_gpio_pins(fn, ...) fn(0, __VA_ARGS__)

/*
 * Bus information for status "okay" nodes of each compatible
 */
#define DT_COMPAT_bosch_bma530_BUS_i2c 1
