
zephyr.elf:     file format elf32-littlearm


Disassembly of section rom_start:

00000000 <_vector_start>:
#include <syscalls/z_errno_mrsh.c>

#else
int *z_impl_z_errno(void)
{
	return &_current->errno_var;
   0:	20004b00 	.word	0x20004b00
}
   4:	0000323d 	.word	0x0000323d
   8:	000090dd 	.word	0x000090dd
   c:	00003211 	.word	0x00003211
  10:	00003211 	.word	0x00003211
  14:	00003211 	.word	0x00003211
  18:	00003211 	.word	0x00003211
	...
  2c:	00002bd5 	.word	0x00002bd5
  30:	00003211 	.word	0x00003211
  34:	00000000 	.word	0x00000000
  38:	00002b45 	.word	0x00002b45
  3c:	00003211 	.word	0x00003211

00000040 <_irq_vector_table>:
  40:	00002d4d 00002d4d 00002d4d 00002d4d     M-..M-..M-..M-..
  50:	00002d4d 00002d4d 00002d4d 00002d4d     M-..M-..M-..M-..
  60:	00002d4d 00002d4d 00002d4d 00002d4d     M-..M-..M-..M-..
  70:	00002d4d 00002d4d 00002d4d 00002d4d     M-..M-..M-..M-..
  80:	00002d4d 00002d4d 00002d4d 00002d4d     M-..M-..M-..M-..
  90:	00002d4d 00002d4d 00002d4d 00002d4d     M-..M-..M-..M-..
  a0:	00002d4d 00002d4d 00002d4d 00002d4d     M-..M-..M-..M-..
  b0:	00002d4d 00002d4d 00002d4d 00002d4d     M-..M-..M-..M-..
  c0:	00002d4d 00002d4d 00002d4d 00002d4d     M-..M-..M-..M-..
  d0:	00002d4d 00002d4d 00002d4d 00002d4d     M-..M-..M-..M-..
  e0:	00002d4d 00002d4d 00002d4d 00002d4d     M-..M-..M-..M-..
  f0:	00002d4d 00002d4d 00002d4d 00002d4d     M-..M-..M-..M-..

Disassembly of section text:

00000100 <__aeabi_uldivmod>:
     100:	b953      	cbnz	r3, 118 <__aeabi_uldivmod+0x18>
     102:	b94a      	cbnz	r2, 118 <__aeabi_uldivmod+0x18>
     104:	2900      	cmp	r1, #0
     106:	bf08      	it	eq
     108:	2800      	cmpeq	r0, #0
     10a:	bf1c      	itt	ne
     10c:	f04f 31ff 	movne.w	r1, #4294967295
     110:	f04f 30ff 	movne.w	r0, #4294967295
     114:	f000 b96e 	b.w	3f4 <__aeabi_idiv0>
     118:	f1ad 0c08 	sub.w	ip, sp, #8
     11c:	e96d ce04 	strd	ip, lr, [sp, #-16]!
     120:	f000 f806 	bl	130 <__udivmoddi4>
     124:	f8dd e004 	ldr.w	lr, [sp, #4]
     128:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
     12c:	b004      	add	sp, #16
     12e:	4770      	bx	lr

00000130 <__udivmoddi4>:
     130:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
     134:	9d08      	ldr	r5, [sp, #32]
     136:	4604      	mov	r4, r0
     138:	468c      	mov	ip, r1
     13a:	2b00      	cmp	r3, #0
     13c:	f040 8083 	bne.w	246 <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0x46>
     140:	428a      	cmp	r2, r1
     142:	4617      	mov	r7, r2
     144:	d947      	bls.n	1d6 <__data_size+0x8a>
     146:	fab2 f282 	clz	r2, r2
     14a:	b142      	cbz	r2, 15e <__data_size+0x12>
     14c:	f1c2 0020 	rsb	r0, r2, #32
     150:	fa24 f000 	lsr.w	r0, r4, r0
     154:	4091      	lsls	r1, r2
     156:	4097      	lsls	r7, r2
     158:	ea40 0c01 	orr.w	ip, r0, r1
     15c:	4094      	lsls	r4, r2
     15e:	ea4f 4817 	mov.w	r8, r7, lsr #16
     162:	0c23      	lsrs	r3, r4, #16
     164:	fbbc f6f8 	udiv	r6, ip, r8
     168:	fa1f fe87 	uxth.w	lr, r7
     16c:	fb08 c116 	mls	r1, r8, r6, ip
     170:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
     174:	fb06 f10e 	mul.w	r1, r6, lr
     178:	4299      	cmp	r1, r3
     17a:	d909      	bls.n	190 <__data_size+0x44>
     17c:	18fb      	adds	r3, r7, r3
     17e:	f106 30ff 	add.w	r0, r6, #4294967295
     182:	f080 8119 	bcs.w	3b8 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xb8>
     186:	4299      	cmp	r1, r3
     188:	f240 8116 	bls.w	3b8 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xb8>
     18c:	3e02      	subs	r6, #2
     18e:	443b      	add	r3, r7
     190:	1a5b      	subs	r3, r3, r1
     192:	b2a4      	uxth	r4, r4
     194:	fbb3 f0f8 	udiv	r0, r3, r8
     198:	fb08 3310 	mls	r3, r8, r0, r3
     19c:	ea44 4403 	orr.w	r4, r4, r3, lsl #16
     1a0:	fb00 fe0e 	mul.w	lr, r0, lr
     1a4:	45a6      	cmp	lr, r4
     1a6:	d909      	bls.n	1bc <__data_size+0x70>
     1a8:	193c      	adds	r4, r7, r4
     1aa:	f100 33ff 	add.w	r3, r0, #4294967295
     1ae:	f080 8105 	bcs.w	3bc <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xbc>
     1b2:	45a6      	cmp	lr, r4
     1b4:	f240 8102 	bls.w	3bc <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xbc>
     1b8:	3802      	subs	r0, #2
     1ba:	443c      	add	r4, r7
     1bc:	ea40 4006 	orr.w	r0, r0, r6, lsl #16
     1c0:	eba4 040e 	sub.w	r4, r4, lr
     1c4:	2600      	movs	r6, #0
     1c6:	b11d      	cbz	r5, 1d0 <__data_size+0x84>
     1c8:	40d4      	lsrs	r4, r2
     1ca:	2300      	movs	r3, #0
     1cc:	e9c5 4300 	strd	r4, r3, [r5]
     1d0:	4631      	mov	r1, r6
     1d2:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
     1d6:	b902      	cbnz	r2, 1da <__data_size+0x8e>
     1d8:	deff      	udf	#255	; 0xff
     1da:	fab2 f282 	clz	r2, r2
     1de:	2a00      	cmp	r2, #0
     1e0:	d150      	bne.n	284 <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0x84>
     1e2:	1bcb      	subs	r3, r1, r7
     1e4:	ea4f 4e17 	mov.w	lr, r7, lsr #16
     1e8:	fa1f f887 	uxth.w	r8, r7
     1ec:	2601      	movs	r6, #1
     1ee:	fbb3 fcfe 	udiv	ip, r3, lr
     1f2:	0c21      	lsrs	r1, r4, #16
     1f4:	fb0e 331c 	mls	r3, lr, ip, r3
     1f8:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
     1fc:	fb08 f30c 	mul.w	r3, r8, ip
     200:	428b      	cmp	r3, r1
     202:	d907      	bls.n	214 <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0x14>
     204:	1879      	adds	r1, r7, r1
     206:	f10c 30ff 	add.w	r0, ip, #4294967295
     20a:	d202      	bcs.n	212 <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0x12>
     20c:	428b      	cmp	r3, r1
     20e:	f200 80e9 	bhi.w	3e4 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xe4>
     212:	4684      	mov	ip, r0
     214:	1ac9      	subs	r1, r1, r3
     216:	b2a3      	uxth	r3, r4
     218:	fbb1 f0fe 	udiv	r0, r1, lr
     21c:	fb0e 1110 	mls	r1, lr, r0, r1
     220:	ea43 4401 	orr.w	r4, r3, r1, lsl #16
     224:	fb08 f800 	mul.w	r8, r8, r0
     228:	45a0      	cmp	r8, r4
     22a:	d907      	bls.n	23c <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0x3c>
     22c:	193c      	adds	r4, r7, r4
     22e:	f100 33ff 	add.w	r3, r0, #4294967295
     232:	d202      	bcs.n	23a <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0x3a>
     234:	45a0      	cmp	r8, r4
     236:	f200 80d9 	bhi.w	3ec <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xec>
     23a:	4618      	mov	r0, r3
     23c:	eba4 0408 	sub.w	r4, r4, r8
     240:	ea40 400c 	orr.w	r0, r0, ip, lsl #16
     244:	e7bf      	b.n	1c6 <__data_size+0x7a>
     246:	428b      	cmp	r3, r1
     248:	d909      	bls.n	25e <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0x5e>
     24a:	2d00      	cmp	r5, #0
     24c:	f000 80b1 	beq.w	3b2 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xb2>
     250:	2600      	movs	r6, #0
     252:	e9c5 0100 	strd	r0, r1, [r5]
     256:	4630      	mov	r0, r6
     258:	4631      	mov	r1, r6
     25a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
     25e:	fab3 f683 	clz	r6, r3
     262:	2e00      	cmp	r6, #0
     264:	d14a      	bne.n	2fc <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0xfc>
     266:	428b      	cmp	r3, r1
     268:	d302      	bcc.n	270 <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0x70>
     26a:	4282      	cmp	r2, r0
     26c:	f200 80b8 	bhi.w	3e0 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xe0>
     270:	1a84      	subs	r4, r0, r2
     272:	eb61 0103 	sbc.w	r1, r1, r3
     276:	2001      	movs	r0, #1
     278:	468c      	mov	ip, r1
     27a:	2d00      	cmp	r5, #0
     27c:	d0a8      	beq.n	1d0 <__data_size+0x84>
     27e:	e9c5 4c00 	strd	r4, ip, [r5]
     282:	e7a5      	b.n	1d0 <__data_size+0x84>
     284:	f1c2 0320 	rsb	r3, r2, #32
     288:	fa20 f603 	lsr.w	r6, r0, r3
     28c:	4097      	lsls	r7, r2
     28e:	fa01 f002 	lsl.w	r0, r1, r2
     292:	ea4f 4e17 	mov.w	lr, r7, lsr #16
     296:	40d9      	lsrs	r1, r3
     298:	4330      	orrs	r0, r6
     29a:	0c03      	lsrs	r3, r0, #16
     29c:	fbb1 f6fe 	udiv	r6, r1, lr
     2a0:	fa1f f887 	uxth.w	r8, r7
     2a4:	fb0e 1116 	mls	r1, lr, r6, r1
     2a8:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
     2ac:	fb06 f108 	mul.w	r1, r6, r8
     2b0:	4299      	cmp	r1, r3
     2b2:	fa04 f402 	lsl.w	r4, r4, r2
     2b6:	d909      	bls.n	2cc <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0xcc>
     2b8:	18fb      	adds	r3, r7, r3
     2ba:	f106 3cff 	add.w	ip, r6, #4294967295
     2be:	f080 808d 	bcs.w	3dc <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xdc>
     2c2:	4299      	cmp	r1, r3
     2c4:	f240 808a 	bls.w	3dc <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xdc>
     2c8:	3e02      	subs	r6, #2
     2ca:	443b      	add	r3, r7
     2cc:	1a5b      	subs	r3, r3, r1
     2ce:	b281      	uxth	r1, r0
     2d0:	fbb3 f0fe 	udiv	r0, r3, lr
     2d4:	fb0e 3310 	mls	r3, lr, r0, r3
     2d8:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
     2dc:	fb00 f308 	mul.w	r3, r0, r8
     2e0:	428b      	cmp	r3, r1
     2e2:	d907      	bls.n	2f4 <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0xf4>
     2e4:	1879      	adds	r1, r7, r1
     2e6:	f100 3cff 	add.w	ip, r0, #4294967295
     2ea:	d273      	bcs.n	3d4 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xd4>
     2ec:	428b      	cmp	r3, r1
     2ee:	d971      	bls.n	3d4 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xd4>
     2f0:	3802      	subs	r0, #2
     2f2:	4439      	add	r1, r7
     2f4:	1acb      	subs	r3, r1, r3
     2f6:	ea40 4606 	orr.w	r6, r0, r6, lsl #16
     2fa:	e778      	b.n	1ee <__data_size+0xa2>
     2fc:	f1c6 0c20 	rsb	ip, r6, #32
     300:	fa03 f406 	lsl.w	r4, r3, r6
     304:	fa22 f30c 	lsr.w	r3, r2, ip
     308:	431c      	orrs	r4, r3
     30a:	fa20 f70c 	lsr.w	r7, r0, ip
     30e:	fa01 f306 	lsl.w	r3, r1, r6
     312:	ea4f 4e14 	mov.w	lr, r4, lsr #16
     316:	fa21 f10c 	lsr.w	r1, r1, ip
     31a:	431f      	orrs	r7, r3
     31c:	0c3b      	lsrs	r3, r7, #16
     31e:	fbb1 f9fe 	udiv	r9, r1, lr
     322:	fa1f f884 	uxth.w	r8, r4
     326:	fb0e 1119 	mls	r1, lr, r9, r1
     32a:	ea43 4101 	orr.w	r1, r3, r1, lsl #16
     32e:	fb09 fa08 	mul.w	sl, r9, r8
     332:	458a      	cmp	sl, r1
     334:	fa02 f206 	lsl.w	r2, r2, r6
     338:	fa00 f306 	lsl.w	r3, r0, r6
     33c:	d908      	bls.n	350 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x50>
     33e:	1861      	adds	r1, r4, r1
     340:	f109 30ff 	add.w	r0, r9, #4294967295
     344:	d248      	bcs.n	3d8 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xd8>
     346:	458a      	cmp	sl, r1
     348:	d946      	bls.n	3d8 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xd8>
     34a:	f1a9 0902 	sub.w	r9, r9, #2
     34e:	4421      	add	r1, r4
     350:	eba1 010a 	sub.w	r1, r1, sl
     354:	b2bf      	uxth	r7, r7
     356:	fbb1 f0fe 	udiv	r0, r1, lr
     35a:	fb0e 1110 	mls	r1, lr, r0, r1
     35e:	ea47 4701 	orr.w	r7, r7, r1, lsl #16
     362:	fb00 f808 	mul.w	r8, r0, r8
     366:	45b8      	cmp	r8, r7
     368:	d907      	bls.n	37a <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x7a>
     36a:	19e7      	adds	r7, r4, r7
     36c:	f100 31ff 	add.w	r1, r0, #4294967295
     370:	d22e      	bcs.n	3d0 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xd0>
     372:	45b8      	cmp	r8, r7
     374:	d92c      	bls.n	3d0 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xd0>
     376:	3802      	subs	r0, #2
     378:	4427      	add	r7, r4
     37a:	ea40 4009 	orr.w	r0, r0, r9, lsl #16
     37e:	eba7 0708 	sub.w	r7, r7, r8
     382:	fba0 8902 	umull	r8, r9, r0, r2
     386:	454f      	cmp	r7, r9
     388:	46c6      	mov	lr, r8
     38a:	4649      	mov	r1, r9
     38c:	d31a      	bcc.n	3c4 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xc4>
     38e:	d017      	beq.n	3c0 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xc0>
     390:	b15d      	cbz	r5, 3aa <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xaa>
     392:	ebb3 020e 	subs.w	r2, r3, lr
     396:	eb67 0701 	sbc.w	r7, r7, r1
     39a:	fa07 fc0c 	lsl.w	ip, r7, ip
     39e:	40f2      	lsrs	r2, r6
     3a0:	ea4c 0202 	orr.w	r2, ip, r2
     3a4:	40f7      	lsrs	r7, r6
     3a6:	e9c5 2700 	strd	r2, r7, [r5]
     3aa:	2600      	movs	r6, #0
     3ac:	4631      	mov	r1, r6
     3ae:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
     3b2:	462e      	mov	r6, r5
     3b4:	4628      	mov	r0, r5
     3b6:	e70b      	b.n	1d0 <__data_size+0x84>
     3b8:	4606      	mov	r6, r0
     3ba:	e6e9      	b.n	190 <__data_size+0x44>
     3bc:	4618      	mov	r0, r3
     3be:	e6fd      	b.n	1bc <__data_size+0x70>
     3c0:	4543      	cmp	r3, r8
     3c2:	d2e5      	bcs.n	390 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x90>
     3c4:	ebb8 0e02 	subs.w	lr, r8, r2
     3c8:	eb69 0104 	sbc.w	r1, r9, r4
     3cc:	3801      	subs	r0, #1
     3ce:	e7df      	b.n	390 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x90>
     3d0:	4608      	mov	r0, r1
     3d2:	e7d2      	b.n	37a <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x7a>
     3d4:	4660      	mov	r0, ip
     3d6:	e78d      	b.n	2f4 <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0xf4>
     3d8:	4681      	mov	r9, r0
     3da:	e7b9      	b.n	350 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x50>
     3dc:	4666      	mov	r6, ip
     3de:	e775      	b.n	2cc <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0xcc>
     3e0:	4630      	mov	r0, r6
     3e2:	e74a      	b.n	27a <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0x7a>
     3e4:	f1ac 0c02 	sub.w	ip, ip, #2
     3e8:	4439      	add	r1, r7
     3ea:	e713      	b.n	214 <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0x14>
     3ec:	3802      	subs	r0, #2
     3ee:	443c      	add	r4, r7
     3f0:	e724      	b.n	23c <CONFIG_PM_PARTITION_SIZE_MCUBOOT_PAD+0x3c>
     3f2:	bf00      	nop

000003f4 <__aeabi_idiv0>:
     3f4:	4770      	bx	lr
     3f6:	bf00      	nop

000003f8 <boot_log_thread_func>:
 * anywhere else int the code.
 */

/* most simple log processing theread */
void boot_log_thread_func(void *dummy1, void *dummy2, void *dummy3)
{
     3f8:	b510      	push	{r4, lr}
    (void)dummy1;
    (void)dummy2;
    (void)dummy3;

     log_init();
     3fa:	f001 fc25 	bl	1c48 <log_init>

     while (1) {
             if (log_process(false) == false) {
                    if (boot_log_stop) {
     3fe:	4c09      	ldr	r4, [pc, #36]	; (424 <CONFIG_FLASH_SIZE+0x24>)
		/* coverity[OVERRUN] */
		return (bool) arch_syscall_invoke1(*(uintptr_t *)&bypass, K_SYSCALL_LOG_PROCESS);
	}
#endif
	compiler_barrier();
	return z_impl_log_process(bypass);
     400:	2000      	movs	r0, #0
     402:	f001 fcf5 	bl	1df0 <z_impl_log_process>
             if (log_process(false) == false) {
     406:	2800      	cmp	r0, #0
     408:	d1fa      	bne.n	400 <CONFIG_FLASH_SIZE>
                    if (boot_log_stop) {
     40a:	7823      	ldrb	r3, [r4, #0]
     40c:	b92b      	cbnz	r3, 41a <CONFIG_FLASH_SIZE+0x1a>
		/* coverity[OVERRUN] */
		return (int32_t) arch_syscall_invoke2(parm0.split.lo, parm0.split.hi, K_SYSCALL_K_SLEEP);
	}
#endif
	compiler_barrier();
	return z_impl_k_sleep(timeout);
     40e:	2100      	movs	r1, #0
     410:	f44f 7076 	mov.w	r0, #984	; 0x3d8
     414:	f005 ff6a 	bl	62ec <z_impl_k_sleep>
     418:	e7f2      	b.n	400 <CONFIG_FLASH_SIZE>
		arch_syscall_invoke1(*(uintptr_t *)&sem, K_SYSCALL_K_SEM_GIVE);
		return;
	}
#endif
	compiler_barrier();
	z_impl_k_sem_give(sem);
     41a:	4803      	ldr	r0, [pc, #12]	; (428 <CONFIG_FLASH_SIZE+0x28>)
                    k_sleep(BOOT_LOG_PROCESSING_INTERVAL);
             }
     }

     k_sem_give(&boot_log_sem);
}
     41c:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
     420:	f005 bc30 	b.w	5c84 <z_impl_k_sem_give>
     424:	2000184c 	.word	0x2000184c
     428:	200001c8 	.word	0x200001c8

0000042c <zephyr_boot_log_start>:

void zephyr_boot_log_start(void)
{
     42c:	b510      	push	{r4, lr}
     42e:	b088      	sub	sp, #32
	return z_impl_k_thread_create(new_thread, stack, stack_size, entry, p1, p2, p3, prio, options, delay);
     430:	4c0d      	ldr	r4, [pc, #52]	; (468 <zephyr_boot_log_start+0x3c>)
     432:	490e      	ldr	r1, [pc, #56]	; (46c <zephyr_boot_log_start+0x40>)
     434:	f44f 7276 	mov.w	r2, #984	; 0x3d8
     438:	2300      	movs	r3, #0
     43a:	e9cd 2306 	strd	r2, r3, [sp, #24]
     43e:	2300      	movs	r3, #0
     440:	f06f 020f 	mvn.w	r2, #15
     444:	e9cd 2303 	strd	r2, r3, [sp, #12]
     448:	e9cd 3301 	strd	r3, r3, [sp, #4]
     44c:	9300      	str	r3, [sp, #0]
     44e:	f44f 7240 	mov.w	r2, #768	; 0x300
     452:	4b07      	ldr	r3, [pc, #28]	; (470 <zephyr_boot_log_start+0x44>)
     454:	4620      	mov	r0, r4
     456:	f005 fac7 	bl	59e8 <z_impl_k_thread_create>
	return z_impl_k_thread_name_set(thread, str);
     45a:	4906      	ldr	r1, [pc, #24]	; (474 <zephyr_boot_log_start+0x48>)
     45c:	4620      	mov	r0, r4
                boot_log_thread_func, NULL, NULL, NULL,
                K_HIGHEST_APPLICATION_THREAD_PRIO, 0,
                BOOT_LOG_PROCESSING_INTERVAL);

        k_thread_name_set(&boot_log_thread, "logging");
}
     45e:	b008      	add	sp, #32
     460:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
     464:	f009 b9d0 	b.w	9808 <z_impl_k_thread_name_set>
     468:	200001e8 	.word	0x200001e8
     46c:	20001f80 	.word	0x20001f80
     470:	000003f9 	.word	0x000003f9
     474:	0000a228 	.word	0x0000a228

00000478 <zephyr_boot_log_stop>:

void zephyr_boot_log_stop(void)
{
    boot_log_stop = true;
     478:	4b04      	ldr	r3, [pc, #16]	; (48c <zephyr_boot_log_stop+0x14>)
     47a:	2201      	movs	r2, #1
     47c:	701a      	strb	r2, [r3, #0]
	return z_impl_k_sem_take(sem, timeout);
     47e:	4804      	ldr	r0, [pc, #16]	; (490 <zephyr_boot_log_stop+0x18>)
     480:	f04f 32ff 	mov.w	r2, #4294967295
     484:	f04f 33ff 	mov.w	r3, #4294967295
     488:	f005 bc1c 	b.w	5cc4 <z_impl_k_sem_take>
     48c:	2000184c 	.word	0x2000184c
     490:	200001c8 	.word	0x200001c8

00000494 <main>:
}

NRF_STATIC_INLINE void nrf_wdt_reload_request_set(NRF_WDT_Type *        p_reg,
                                                  nrf_wdt_rr_register_t rr_register)
{
    p_reg->RR[rr_register] = NRF_WDT_RR_VALUE;
     494:	4b37      	ldr	r3, [pc, #220]	; (574 <FIH_LABEL_FIH_CALL_END_644+0x7c>)
     496:	4a38      	ldr	r2, [pc, #224]	; (578 <FIH_LABEL_FIH_CALL_END_644+0x80>)
    fih_int fih_rc = FIH_FAILURE;

    MCUBOOT_WATCHDOG_FEED();

#if !defined(MCUBOOT_DIRECT_XIP)
    BOOT_LOG_INF("Starting bootloader");
     498:	4838      	ldr	r0, [pc, #224]	; (57c <FIH_LABEL_FIH_CALL_END_644+0x84>)
{
     49a:	b5f0      	push	{r4, r5, r6, r7, lr}
     49c:	f8c3 2600 	str.w	r2, [r3, #1536]	; 0x600
 * @return Source ID.
 */
static inline uint32_t log_const_source_id(
				const struct log_source_const_data *data)
{
	return ((const uint8_t *)data - (uint8_t *)__log_const_start)/
     4a0:	4c37      	ldr	r4, [pc, #220]	; (580 <FIH_LABEL_FIH_CALL_END_644+0x88>)
     4a2:	f8c3 2604 	str.w	r2, [r3, #1540]	; 0x604
     4a6:	f8c3 2608 	str.w	r2, [r3, #1544]	; 0x608
     4aa:	f8c3 260c 	str.w	r2, [r3, #1548]	; 0x60c
     4ae:	f8c3 2610 	str.w	r2, [r3, #1552]	; 0x610
     4b2:	f8c3 2614 	str.w	r2, [r3, #1556]	; 0x614
     4b6:	f8c3 2618 	str.w	r2, [r3, #1560]	; 0x618
     4ba:	f8c3 261c 	str.w	r2, [r3, #1564]	; 0x61c
     4be:	4b31      	ldr	r3, [pc, #196]	; (584 <FIH_LABEL_FIH_CALL_END_644+0x8c>)
     4c0:	1ae4      	subs	r4, r4, r3
     4c2:	08e4      	lsrs	r4, r4, #3
    BOOT_LOG_INF("Starting bootloader");
     4c4:	01a4      	lsls	r4, r4, #6
     4c6:	f044 0503 	orr.w	r5, r4, #3
{
     4ca:	b085      	sub	sp, #20
    BOOT_LOG_INF("Starting bootloader");
     4cc:	4629      	mov	r1, r5
     4ce:	f008 fa5d 	bl	898c <log_0>
#ifdef CONFIG_MCUBOOT_INDICATION_LED
    /* LED init */
    led_init();
#endif

    os_heap_init();
     4d2:	f007 fd9c 	bl	800e <os_heap_init>

    ZEPHYR_BOOT_LOG_START();
     4d6:	f7ff ffa9 	bl	42c <zephyr_boot_log_start>

    (void)rc;

#if (!defined(CONFIG_XTENSA) && defined(DT_CHOSEN_ZEPHYR_FLASH_CONTROLLER_LABEL))
    if (!flash_device_get_binding(DT_CHOSEN_ZEPHYR_FLASH_CONTROLLER_LABEL)) {
     4da:	482b      	ldr	r0, [pc, #172]	; (588 <FIH_LABEL_FIH_CALL_END_644+0x90>)
     4dc:	f000 f864 	bl	5a8 <flash_device_get_binding>
     4e0:	f044 0401 	orr.w	r4, r4, #1
     4e4:	b928      	cbnz	r0, 4f2 <FIH_LABEL_FIH_CALL_START_631>
        BOOT_LOG_ERR("Flash device %s not found",
     4e6:	4928      	ldr	r1, [pc, #160]	; (588 <FIH_LABEL_FIH_CALL_END_644+0x90>)
     4e8:	4828      	ldr	r0, [pc, #160]	; (58c <FIH_LABEL_FIH_CALL_END_644+0x94>)
     4ea:	4622      	mov	r2, r4
     4ec:	f008 fa5d 	bl	89aa <log_1>
		     DT_CHOSEN_ZEPHYR_FLASH_CONTROLLER_LABEL);
        while (1)
     4f0:	e7fe      	b.n	4f0 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x8>

000004f2 <FIH_LABEL_FIH_CALL_START_631>:
        wait_for_usb_dfu(K_MSEC(CONFIG_BOOT_USB_DFU_WAIT_DELAY_MS));
        BOOT_LOG_INF("USB DFU wait time elapsed");
    }
#endif

    FIH_CALL(boot_go, fih_rc, &rsp);
     4f2:	a801      	add	r0, sp, #4
     4f4:	f000 fcb6 	bl	e64 <boot_go>

000004f8 <FIH_LABEL_FIH_CALL_END_644>:
    if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
     4f8:	4b25      	ldr	r3, [pc, #148]	; (590 <FIH_LABEL_FIH_CALL_END_644+0x98>)
     4fa:	681b      	ldr	r3, [r3, #0]
     4fc:	4283      	cmp	r3, r0
     4fe:	d004      	beq.n	50a <FIH_LABEL_FIH_CALL_END_644+0x12>
        BOOT_LOG_ERR("Unable to find bootable image");
     500:	4824      	ldr	r0, [pc, #144]	; (594 <FIH_LABEL_FIH_CALL_END_644+0x9c>)
     502:	4621      	mov	r1, r4
     504:	f008 fa42 	bl	898c <log_0>
        FIH_PANIC;
     508:	e7fe      	b.n	508 <FIH_LABEL_FIH_CALL_END_644+0x10>
    }

    BOOT_LOG_INF("Bootloader chainload address offset: 0x%x",
     50a:	9903      	ldr	r1, [sp, #12]
     50c:	4822      	ldr	r0, [pc, #136]	; (598 <FIH_LABEL_FIH_CALL_END_644+0xa0>)
     50e:	462a      	mov	r2, r5
     510:	f008 fa4b 	bl	89aa <log_1>
                 rsp.br_image_off);

#if defined(MCUBOOT_DIRECT_XIP)
    BOOT_LOG_INF("Jumping to the image slot");
#else
    BOOT_LOG_INF("Jumping to the first image slot");
     514:	4821      	ldr	r0, [pc, #132]	; (59c <FIH_LABEL_FIH_CALL_END_644+0xa4>)
     516:	4629      	mov	r1, r5
     518:	f008 fa38 	bl	898c <log_0>
/* There is only one instance of MCUBoot */
#define PROTECT_SIZE (PM_MCUBOOT_PRIMARY_ADDRESS - PM_MCUBOOT_ADDRESS)
#define PROTECT_ADDR PM_MCUBOOT_ADDRESS
#endif

    rc = fprotect_area(PROTECT_ADDR, PROTECT_SIZE);
     51c:	f44f 4140 	mov.w	r1, #49152	; 0xc000
     520:	2000      	movs	r0, #0
     522:	f008 ffec 	bl	94fe <fprotect_area>

    if (rc != 0) {
     526:	b120      	cbz	r0, 532 <FIH_LABEL_FIH_CALL_END_644+0x3a>
        BOOT_LOG_ERR("Protect mcuboot flash failed, cancel startup.");
     528:	481d      	ldr	r0, [pc, #116]	; (5a0 <FIH_LABEL_FIH_CALL_END_644+0xa8>)
     52a:	4621      	mov	r1, r4
     52c:	f008 fa2e 	bl	898c <log_0>
        while (1)
     530:	e7fe      	b.n	530 <FIH_LABEL_FIH_CALL_END_644+0x38>
#endif /* USE_PARTITION_MANAGER && CONFIG_FPROTECT */
#if defined(CONFIG_SOC_NRF5340_CPUAPP) && defined(PM_CPUNET_B0N_ADDRESS)
    pcd_lock_ram();
#endif

    ZEPHYR_BOOT_LOG_STOP();
     532:	f7ff ffa1 	bl	478 <zephyr_boot_log_stop>
    rc = flash_device_base(rsp->br_flash_dev_id, &flash_base);
     536:	4669      	mov	r1, sp
     538:	f89d 0008 	ldrb.w	r0, [sp, #8]
     53c:	f000 f840 	bl	5c0 <flash_device_base>
    vt = (struct arm_vector_table *)(flash_base +
     540:	9b00      	ldr	r3, [sp, #0]
     542:	9d03      	ldr	r5, [sp, #12]
     544:	441d      	add	r5, r3
                                     rsp->br_hdr->ih_hdr_size);
     546:	9b01      	ldr	r3, [sp, #4]
     548:	891e      	ldrh	r6, [r3, #8]
    nrf_cleanup_peripheral();
     54a:	f000 ffbb 	bl	14c4 <nrf_cleanup_peripheral>
                                     rsp->br_image_off +
     54e:	19af      	adds	r7, r5, r6
		:
		: "memory");
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	unsigned int tmp;

	__asm__ volatile(
     550:	f04f 0220 	mov.w	r2, #32
     554:	f3ef 8311 	mrs	r3, BASEPRI
     558:	f382 8812 	msr	BASEPRI_MAX, r2
     55c:	f3bf 8f6f 	isb	sy
  \details Assigns the given value to the Main Stack Pointer (MSP).
  \param [in]    topOfMainStack  Main Stack Pointer value to set
 */
__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
{
  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
     560:	59ab      	ldr	r3, [r5, r6]
     562:	f383 8808 	msr	MSP, r3
    ((void (*)(void))vt->reset)();
     566:	687b      	ldr	r3, [r7, #4]
     568:	4798      	blx	r3

    do_boot(&rsp);

    BOOT_LOG_ERR("Never should get here");
     56a:	480e      	ldr	r0, [pc, #56]	; (5a4 <FIH_LABEL_FIH_CALL_END_644+0xac>)
     56c:	4621      	mov	r1, r4
     56e:	f008 fa0d 	bl	898c <log_0>
    while (1)
     572:	e7fe      	b.n	572 <FIH_LABEL_FIH_CALL_END_644+0x7a>
     574:	40010000 	.word	0x40010000
     578:	6e524635 	.word	0x6e524635
     57c:	0000a230 	.word	0x0000a230
     580:	00009d98 	.word	0x00009d98
     584:	00009d80 	.word	0x00009d80
     588:	0000a244 	.word	0x0000a244
     58c:	0000a257 	.word	0x0000a257
     590:	2000048c 	.word	0x2000048c
     594:	0000a271 	.word	0x0000a271
     598:	0000a28f 	.word	0x0000a28f
     59c:	0000a2b9 	.word	0x0000a2b9
     5a0:	0000a2d9 	.word	0x0000a2d9
     5a4:	0000a307 	.word	0x0000a307

000005a8 <flash_device_get_binding>:
#endif

static const struct device *flash_dev;

const struct device *flash_device_get_binding(char *dev_name)
{
     5a8:	b510      	push	{r4, lr}
    if (!flash_dev) {
     5aa:	4c04      	ldr	r4, [pc, #16]	; (5bc <flash_device_get_binding+0x14>)
     5ac:	6823      	ldr	r3, [r4, #0]
     5ae:	b913      	cbnz	r3, 5b6 <flash_device_get_binding+0xe>
		/* coverity[OVERRUN] */
		return (const struct device *) arch_syscall_invoke1(*(uintptr_t *)&name, K_SYSCALL_DEVICE_GET_BINDING);
	}
#endif
	compiler_barrier();
	return z_impl_device_get_binding(name);
     5b0:	f005 f84a 	bl	5648 <z_impl_device_get_binding>
        flash_dev = device_get_binding(dev_name);
     5b4:	6020      	str	r0, [r4, #0]
    }
    return flash_dev;
}
     5b6:	6820      	ldr	r0, [r4, #0]
     5b8:	bd10      	pop	{r4, pc}
     5ba:	bf00      	nop
     5bc:	20000488 	.word	0x20000488

000005c0 <flash_device_base>:

int flash_device_base(uint8_t fd_id, uintptr_t *ret)
{
     5c0:	b508      	push	{r3, lr}
    if (fd_id != FLASH_DEVICE_ID) {
     5c2:	b170      	cbz	r0, 5e2 <flash_device_base+0x22>
     5c4:	4a08      	ldr	r2, [pc, #32]	; (5e8 <flash_device_base+0x28>)
     5c6:	4b09      	ldr	r3, [pc, #36]	; (5ec <flash_device_base+0x2c>)
     5c8:	1a9b      	subs	r3, r3, r2
     5ca:	08db      	lsrs	r3, r3, #3
        BOOT_LOG_ERR("invalid flash ID %d; expected %d",
     5cc:	019b      	lsls	r3, r3, #6
     5ce:	4601      	mov	r1, r0
     5d0:	f043 0301 	orr.w	r3, r3, #1
     5d4:	4806      	ldr	r0, [pc, #24]	; (5f0 <flash_device_base+0x30>)
     5d6:	2200      	movs	r2, #0
     5d8:	f008 f9fe 	bl	89d8 <log_2>
                     fd_id, FLASH_DEVICE_ID);
        return -EINVAL;
     5dc:	f06f 0015 	mvn.w	r0, #21
    }
    *ret = FLASH_DEVICE_BASE;
    return 0;
}
     5e0:	bd08      	pop	{r3, pc}
    *ret = FLASH_DEVICE_BASE;
     5e2:	6008      	str	r0, [r1, #0]
    return 0;
     5e4:	e7fc      	b.n	5e0 <flash_device_base+0x20>
     5e6:	bf00      	nop
     5e8:	00009d80 	.word	0x00009d80
     5ec:	00009d98 	.word	0x00009d98
     5f0:	0000a325 	.word	0x0000a325

000005f4 <bootutil_img_validate>:
fih_int
bootutil_img_validate(struct enc_key_data *enc_state, int image_index,
                      struct image_header *hdr, const struct flash_area *fap,
                      uint8_t *tmp_buf, uint32_t tmp_buf_sz, uint8_t *seed,
                      int seed_len, uint8_t *out_hash)
{
     5f4:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    uint32_t off;
    uint16_t len;
    uint16_t type;
    int sha256_valid = 0;
#ifdef EXPECTED_SIG_TLV
    fih_int valid_signature = FIH_FAILURE;
     5f8:	f8df 921c 	ldr.w	r9, [pc, #540]	; 818 <CONFIG_ISR_STACK_SIZE+0x18>
{
     5fc:	b0dd      	sub	sp, #372	; 0x174
     5fe:	4615      	mov	r5, r2
     600:	461e      	mov	r6, r3
     602:	e9dd 4868 	ldrd	r4, r8, [sp, #416]	; 0x1a0
     606:	f8dd b198 	ldr.w	fp, [sp, #408]	; 0x198
    fih_int valid_signature = FIH_FAILURE;
     60a:	f8d9 7000 	ldr.w	r7, [r9]
}

/* Enable and disable cc310 to reduce power consumption */
static inline void cc310_sha256_init(nrf_cc310_bl_hash_context_sha256_t * ctx)
{
    cc310_init();
     60e:	f000 ff27 	bl	1460 <cc310_init>
    NRF_CRYPTOCELL->ENABLE=1;
     612:	4b7f      	ldr	r3, [pc, #508]	; (810 <CONFIG_ISR_STACK_SIZE+0x10>)
     614:	2201      	movs	r2, #1
     616:	f8c3 2500 	str.w	r2, [r3, #1280]	; 0x500
    nrf_cc310_enable();
    nrf_cc310_bl_hash_sha256_init(ctx);
     61a:	a83c      	add	r0, sp, #240	; 0xf0
     61c:	f006 fc2c 	bl	6e78 <nrf_cc310_bl_hash_sha256_init>
    if (seed && (seed_len > 0)) {
     620:	f8cd 9014 	str.w	r9, [sp, #20]
     624:	b13c      	cbz	r4, 636 <bootutil_img_validate+0x42>
     626:	f1b8 0f00 	cmp.w	r8, #0
     62a:	dd04      	ble.n	636 <bootutil_img_validate+0x42>

static inline int bootutil_sha256_update(bootutil_sha256_context *ctx,
                                          const void *data,
                                          uint32_t data_len)
{
    cc310_sha256_update(ctx, data, data_len);
     62c:	4642      	mov	r2, r8
     62e:	4621      	mov	r1, r4
     630:	a83c      	add	r0, sp, #240	; 0xf0
     632:	f008 f844 	bl	86be <cc310_sha256_update>
    size += hdr->ih_protect_tlv_size;
     636:	896b      	ldrh	r3, [r5, #10]
    size = hdr_size = hdr->ih_hdr_size;
     638:	f8b5 8008 	ldrh.w	r8, [r5, #8]
     63c:	4498      	add	r8, r3
    size += hdr->ih_protect_tlv_size;
     63e:	68eb      	ldr	r3, [r5, #12]
    for (off = 0; off < size; off += blk_sz) {
     640:	f04f 0900 	mov.w	r9, #0
    size += hdr->ih_protect_tlv_size;
     644:	4498      	add	r8, r3
    for (off = 0; off < size; off += blk_sz) {
     646:	45c8      	cmp	r8, r9
     648:	d84e      	bhi.n	6e8 <FIH_LABEL_FIH_CALL_END_383+0xe>
}

static inline void cc310_sha256_finalize(bootutil_sha256_context *ctx,
                                          uint8_t *output)
{
    nrf_cc310_bl_hash_sha256_finalize(ctx,
     64a:	a90f      	add	r1, sp, #60	; 0x3c
     64c:	a83c      	add	r0, sp, #240	; 0xf0
     64e:	f006 fc85 	bl	6f5c <nrf_cc310_bl_hash_sha256_finalize>
    NRF_CRYPTOCELL->ENABLE=0;
     652:	4b6f      	ldr	r3, [pc, #444]	; (810 <CONFIG_ISR_STACK_SIZE+0x10>)
     654:	2200      	movs	r2, #0
     656:	f8c3 2500 	str.w	r2, [r3, #1280]	; 0x500
     65a:	f8c3 2500 	str.w	r2, [r3, #1280]	; 0x500
            tmp_buf_sz, hash, seed, seed_len);
    if (rc) {
        goto out;
    }

    if (out_hash) {
     65e:	9b6a      	ldr	r3, [sp, #424]	; 0x1a8
     660:	b123      	cbz	r3, 66c <bootutil_img_validate+0x78>
        memcpy(out_hash, hash, 32);
     662:	2220      	movs	r2, #32
     664:	a90f      	add	r1, sp, #60	; 0x3c
     666:	4618      	mov	r0, r3
     668:	f008 fd7f 	bl	916a <memcpy>
    }

    rc = bootutil_tlv_iter_begin(&it, hdr, fap, IMAGE_TLV_ANY, false);
     66c:	2300      	movs	r3, #0
     66e:	9300      	str	r3, [sp, #0]
     670:	4632      	mov	r2, r6
     672:	f64f 73ff 	movw	r3, #65535	; 0xffff
     676:	4629      	mov	r1, r5
     678:	a809      	add	r0, sp, #36	; 0x24
     67a:	f007 fcc9 	bl	8010 <bootutil_tlv_iter_begin>
    if (rc) {
     67e:	4604      	mov	r4, r0
     680:	2800      	cmp	r0, #0
     682:	d144      	bne.n	70e <FIH_LABEL_FIH_CALL_END_383+0x34>
             * can be multiple signatures, each preceded by a key.
             */
#endif /* !MCUBOOT_HW_KEY */
        } else if (type == EXPECTED_SIG_TLV) {
            /* Ignore this signature if it is out of bounds. */
            if (key_id < 0 || key_id >= bootutil_key_cnt) {
     684:	f8df a194 	ldr.w	sl, [pc, #404]	; 81c <CONFIG_ISR_STACK_SIZE+0x1c>
     688:	f8df 8184 	ldr.w	r8, [pc, #388]	; 810 <CONFIG_ISR_STACK_SIZE+0x10>
    int sha256_valid = 0;
     68c:	9003      	str	r0, [sp, #12]
    int key_id = -1;
     68e:	f04f 35ff 	mov.w	r5, #4294967295
        rc = bootutil_tlv_iter_next(&it, &off, &len, &type);
     692:	f10d 031e 	add.w	r3, sp, #30
     696:	aa07      	add	r2, sp, #28
     698:	a908      	add	r1, sp, #32
     69a:	a809      	add	r0, sp, #36	; 0x24
     69c:	f007 fd04 	bl	80a8 <bootutil_tlv_iter_next>
        if (rc < 0) {
     6a0:	1e04      	subs	r4, r0, #0
     6a2:	db34      	blt.n	70e <FIH_LABEL_FIH_CALL_END_383+0x34>
        } else if (rc > 0) {
     6a4:	f040 80a4 	bne.w	7f0 <FIH_LABEL_FIH_CALL_END_920+0x6>
        if (type == IMAGE_TLV_SHA256) {
     6a8:	f8bd 901e 	ldrh.w	r9, [sp, #30]
     6ac:	f1b9 0f10 	cmp.w	r9, #16
     6b0:	d138      	bne.n	724 <FIH_LABEL_FIH_CALL_END_383+0x4a>
            if (len != sizeof(hash)) {
     6b2:	f8bd 901c 	ldrh.w	r9, [sp, #28]
     6b6:	f1b9 0f20 	cmp.w	r9, #32
     6ba:	f040 80a3 	bne.w	804 <CONFIG_ISR_STACK_SIZE+0x4>
            rc = LOAD_IMAGE_DATA(hdr, fap, off, buf, sizeof(hash));
     6be:	9908      	ldr	r1, [sp, #32]
     6c0:	464b      	mov	r3, r9
     6c2:	aa3c      	add	r2, sp, #240	; 0xf0
     6c4:	4630      	mov	r0, r6
     6c6:	f008 fc54 	bl	8f72 <flash_area_read>
            if (rc) {
     6ca:	4604      	mov	r4, r0
     6cc:	b9f8      	cbnz	r0, 70e <FIH_LABEL_FIH_CALL_END_383+0x34>

000006ce <FIH_LABEL_FIH_CALL_START_364>:
            FIH_CALL(boot_fih_memequal, fih_rc, hash, buf, sizeof(hash));
     6ce:	464a      	mov	r2, r9
     6d0:	a93c      	add	r1, sp, #240	; 0xf0
     6d2:	a80f      	add	r0, sp, #60	; 0x3c
     6d4:	f007 fd5f 	bl	8196 <boot_fih_memequal>
     6d8:	4604      	mov	r4, r0

000006da <FIH_LABEL_FIH_CALL_END_383>:
            if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
     6da:	4b4e      	ldr	r3, [pc, #312]	; (814 <CONFIG_ISR_STACK_SIZE+0x14>)
     6dc:	681b      	ldr	r3, [r3, #0]
     6de:	4283      	cmp	r3, r0
     6e0:	d115      	bne.n	70e <FIH_LABEL_FIH_CALL_END_383+0x34>
            sha256_valid = 1;
     6e2:	2301      	movs	r3, #1
     6e4:	9303      	str	r3, [sp, #12]
     6e6:	e7d4      	b.n	692 <bootutil_img_validate+0x9e>
        blk_sz = size - off;
     6e8:	9a67      	ldr	r2, [sp, #412]	; 0x19c
     6ea:	eba8 0309 	sub.w	r3, r8, r9
        if (blk_sz > tmp_buf_sz) {
     6ee:	429a      	cmp	r2, r3
     6f0:	bf28      	it	cs
     6f2:	461a      	movcs	r2, r3
        rc = flash_area_read(fap, off, tmp_buf, blk_sz);
     6f4:	4613      	mov	r3, r2
     6f6:	4692      	mov	sl, r2
     6f8:	4649      	mov	r1, r9
     6fa:	465a      	mov	r2, fp
     6fc:	4630      	mov	r0, r6
     6fe:	f008 fc38 	bl	8f72 <flash_area_read>
        if (rc) {
     702:	4604      	mov	r4, r0
     704:	b138      	cbz	r0, 716 <FIH_LABEL_FIH_CALL_END_383+0x3c>
     706:	4b42      	ldr	r3, [pc, #264]	; (810 <CONFIG_ISR_STACK_SIZE+0x10>)
     708:	2200      	movs	r2, #0
     70a:	f8c3 2500 	str.w	r2, [r3, #1280]	; 0x500
    if (rc) {
        fih_rc = fih_int_encode(rc);
    }

    FIH_RET(fih_rc);
}
     70e:	4620      	mov	r0, r4
     710:	b05d      	add	sp, #372	; 0x174
     712:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
     716:	4652      	mov	r2, sl
     718:	4659      	mov	r1, fp
     71a:	a83c      	add	r0, sp, #240	; 0xf0
     71c:	f007 ffcf 	bl	86be <cc310_sha256_update>
    for (off = 0; off < size; off += blk_sz) {
     720:	44d1      	add	r9, sl
     722:	e790      	b.n	646 <bootutil_img_validate+0x52>
        } else if (type == IMAGE_TLV_KEYHASH) {
     724:	f1b9 0f01 	cmp.w	r9, #1
     728:	d13f      	bne.n	7aa <FIH_LABEL_FIH_CALL_END_383+0xd0>
            if (len > 32) {
     72a:	f8bd 301c 	ldrh.w	r3, [sp, #28]
     72e:	2b20      	cmp	r3, #32
     730:	d868      	bhi.n	804 <CONFIG_ISR_STACK_SIZE+0x4>
            rc = LOAD_IMAGE_DATA(hdr, fap, off, buf, len);
     732:	9908      	ldr	r1, [sp, #32]
     734:	aa3c      	add	r2, sp, #240	; 0xf0
     736:	4630      	mov	r0, r6
     738:	f008 fc1b 	bl	8f72 <flash_area_read>
            if (rc) {
     73c:	4604      	mov	r4, r0
     73e:	2800      	cmp	r0, #0
     740:	d1e5      	bne.n	70e <FIH_LABEL_FIH_CALL_END_383+0x34>
            key_id = bootutil_find_key(buf, len);
     742:	f89d 501c 	ldrb.w	r5, [sp, #28]
    if (keyhash_len > 32) {
     746:	2d20      	cmp	r5, #32
     748:	d80a      	bhi.n	760 <FIH_LABEL_FIH_CALL_END_383+0x86>
    for (i = 0; i < bootutil_key_cnt; i++) {
     74a:	f8da 3000 	ldr.w	r3, [sl]
     74e:	f8df b0d0 	ldr.w	fp, [pc, #208]	; 820 <CONFIG_ISR_STACK_SIZE+0x20>
     752:	9304      	str	r3, [sp, #16]
     754:	9b04      	ldr	r3, [sp, #16]
     756:	429c      	cmp	r4, r3
     758:	db05      	blt.n	766 <FIH_LABEL_FIH_CALL_END_383+0x8c>
     75a:	2300      	movs	r3, #0
     75c:	f8c8 3500 	str.w	r3, [r8, #1280]	; 0x500
        return -1;
     760:	f04f 34ff 	mov.w	r4, #4294967295
     764:	e01d      	b.n	7a2 <FIH_LABEL_FIH_CALL_END_383+0xc8>
    cc310_init();
     766:	f000 fe7b 	bl	1460 <cc310_init>
    NRF_CRYPTOCELL->ENABLE=1;
     76a:	f8c8 9500 	str.w	r9, [r8, #1280]	; 0x500
    nrf_cc310_bl_hash_sha256_init(ctx);
     76e:	a81f      	add	r0, sp, #124	; 0x7c
     770:	f006 fb82 	bl	6e78 <nrf_cc310_bl_hash_sha256_init>
        bootutil_sha256_update(&sha256_ctx, key->key, *key->len);
     774:	f8db 2004 	ldr.w	r2, [fp, #4]
     778:	f85b 1b08 	ldr.w	r1, [fp], #8
     77c:	6812      	ldr	r2, [r2, #0]
     77e:	a81f      	add	r0, sp, #124	; 0x7c
     780:	f007 ff9d 	bl	86be <cc310_sha256_update>
    nrf_cc310_bl_hash_sha256_finalize(ctx,
     784:	a917      	add	r1, sp, #92	; 0x5c
     786:	a81f      	add	r0, sp, #124	; 0x7c
     788:	f006 fbe8 	bl	6f5c <nrf_cc310_bl_hash_sha256_finalize>
    NRF_CRYPTOCELL->ENABLE=0;
     78c:	2200      	movs	r2, #0
     78e:	f8c8 2500 	str.w	r2, [r8, #1280]	; 0x500
        if (!memcmp(hash, keyhash, keyhash_len)) {
     792:	a93c      	add	r1, sp, #240	; 0xf0
     794:	462a      	mov	r2, r5
     796:	a817      	add	r0, sp, #92	; 0x5c
     798:	f008 fcd7 	bl	914a <memcmp>
     79c:	b918      	cbnz	r0, 7a6 <FIH_LABEL_FIH_CALL_END_383+0xcc>
     79e:	f8c8 0500 	str.w	r0, [r8, #1280]	; 0x500
            key_id = bootutil_find_key(buf, len);
     7a2:	4625      	mov	r5, r4
     7a4:	e775      	b.n	692 <bootutil_img_validate+0x9e>
    for (i = 0; i < bootutil_key_cnt; i++) {
     7a6:	3401      	adds	r4, #1
     7a8:	e7d4      	b.n	754 <FIH_LABEL_FIH_CALL_END_383+0x7a>
        } else if (type == EXPECTED_SIG_TLV) {
     7aa:	f1b9 0f22 	cmp.w	r9, #34	; 0x22
     7ae:	f47f af70 	bne.w	692 <bootutil_img_validate+0x9e>
            if (key_id < 0 || key_id >= bootutil_key_cnt) {
     7b2:	2d00      	cmp	r5, #0
     7b4:	db19      	blt.n	7ea <FIH_LABEL_FIH_CALL_END_920>
     7b6:	f8da 3000 	ldr.w	r3, [sl]
     7ba:	42ab      	cmp	r3, r5
     7bc:	dd15      	ble.n	7ea <FIH_LABEL_FIH_CALL_END_920>
            if (!EXPECTED_SIG_LEN(len) || len > sizeof(buf)) {
     7be:	f8bd 301c 	ldrh.w	r3, [sp, #28]
     7c2:	2b80      	cmp	r3, #128	; 0x80
     7c4:	d81e      	bhi.n	804 <CONFIG_ISR_STACK_SIZE+0x4>
            rc = LOAD_IMAGE_DATA(hdr, fap, off, buf, len);
     7c6:	9908      	ldr	r1, [sp, #32]
     7c8:	aa3c      	add	r2, sp, #240	; 0xf0
     7ca:	4630      	mov	r0, r6
     7cc:	f008 fbd1 	bl	8f72 <flash_area_read>
            if (rc) {
     7d0:	4604      	mov	r4, r0
     7d2:	2800      	cmp	r0, #0
     7d4:	d19b      	bne.n	70e <FIH_LABEL_FIH_CALL_END_383+0x34>

000007d6 <FIH_LABEL_FIH_CALL_START_898>:
            FIH_CALL(bootutil_verify_sig, valid_signature, hash, sizeof(hash),
     7d6:	b2ed      	uxtb	r5, r5
     7d8:	f8bd 301c 	ldrh.w	r3, [sp, #28]
     7dc:	9500      	str	r5, [sp, #0]
     7de:	aa3c      	add	r2, sp, #240	; 0xf0
     7e0:	2120      	movs	r1, #32
     7e2:	a80f      	add	r0, sp, #60	; 0x3c
     7e4:	f000 f81e 	bl	824 <bootutil_verify_sig>
     7e8:	4607      	mov	r7, r0

000007ea <FIH_LABEL_FIH_CALL_END_920>:
                key_id = -1;
     7ea:	f04f 35ff 	mov.w	r5, #4294967295
     7ee:	e750      	b.n	692 <bootutil_img_validate+0x9e>
    if (rc) {
     7f0:	9b03      	ldr	r3, [sp, #12]
     7f2:	b153      	cbz	r3, 80a <CONFIG_ISR_STACK_SIZE+0xa>
    fih_rc = fih_int_encode_zero_equality(fih_not_eq(valid_signature,
     7f4:	4b07      	ldr	r3, [pc, #28]	; (814 <CONFIG_ISR_STACK_SIZE+0x14>)
 * value that is not FIH_SUCCESS
 */
__attribute__((always_inline)) inline
fih_int fih_int_encode_zero_equality(int x)
{
    if (x) {
     7f6:	681b      	ldr	r3, [r3, #0]
     7f8:	42bb      	cmp	r3, r7
     7fa:	d001      	beq.n	800 <CONFIG_ISR_STACK_SIZE>
        return FIH_FAILURE;
     7fc:	9b05      	ldr	r3, [sp, #20]
     7fe:	681f      	ldr	r7, [r3, #0]
                rc = -1;
     800:	463c      	mov	r4, r7
     802:	e784      	b.n	70e <FIH_LABEL_FIH_CALL_END_383+0x34>
     804:	f04f 34ff 	mov.w	r4, #4294967295
     808:	e781      	b.n	70e <FIH_LABEL_FIH_CALL_END_383+0x34>
     80a:	2401      	movs	r4, #1
    FIH_RET(fih_rc);
     80c:	e77f      	b.n	70e <FIH_LABEL_FIH_CALL_END_383+0x34>
     80e:	bf00      	nop
     810:	5002a000 	.word	0x5002a000
     814:	2000048c 	.word	0x2000048c
     818:	20000000 	.word	0x20000000
     81c:	00009e28 	.word	0x00009e28
     820:	00009e2c 	.word	0x00009e2c

00000824 <bootutil_verify_sig>:
#endif /* not MCUBOOT_ECDSA_NEED_ASN1_SIG */

int
bootutil_verify_sig(uint8_t *hash, uint32_t hlen, uint8_t *sig, size_t slen,
  uint8_t key_id)
{
     824:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
     828:	b096      	sub	sp, #88	; 0x58
     82a:	4617      	mov	r7, r2
     82c:	461d      	mov	r5, r3
     82e:	f89d 2070 	ldrb.w	r2, [sp, #112]	; 0x70

#ifndef MCUBOOT_ECDSA_NEED_ASN1_SIG
    uint8_t signature[2 * NUM_ECC_BYTES];
#endif

    pubkey = (uint8_t *)bootutil_keys[key_id].key;
     832:	4b35      	ldr	r3, [pc, #212]	; (908 <bootutil_verify_sig+0xe4>)
{
     834:	460e      	mov	r6, r1
    pubkey = (uint8_t *)bootutil_keys[key_id].key;
     836:	f853 1032 	ldr.w	r1, [r3, r2, lsl #3]
     83a:	9101      	str	r1, [sp, #4]
    end = pubkey + *bootutil_keys[key_id].len;
     83c:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
{
     840:	4680      	mov	r8, r0
    end = pubkey + *bootutil_keys[key_id].len;
     842:	685b      	ldr	r3, [r3, #4]
     844:	6818      	ldr	r0, [r3, #0]
    if (mbedtls_asn1_get_tag(cp, end, &len,
     846:	aa02      	add	r2, sp, #8
     848:	4401      	add	r1, r0
     84a:	2330      	movs	r3, #48	; 0x30
     84c:	a801      	add	r0, sp, #4
     84e:	f007 fec3 	bl	85d8 <mbedtls_asn1_get_tag>
     852:	b110      	cbz	r0, 85a <bootutil_verify_sig+0x36>
    }
    rc = mbedtls_ecdsa_read_signature(&ctx, hash, hlen, sig, slen);

#else /* CY_MBEDTLS_HW_ACCELERATION */
    if (hlen != NUM_ECC_BYTES) {
        return -1;
     854:	f04f 30ff 	mov.w	r0, #4294967295
     858:	e053      	b.n	902 <bootutil_verify_sig+0xde>
    end = *cp + len;
     85a:	e9dd 4301 	ldrd	r4, r3, [sp, #4]
     85e:	441c      	add	r4, r3
    if (mbedtls_asn1_get_alg(cp, end, &alg, &param)) {
     860:	aa03      	add	r2, sp, #12
     862:	ab06      	add	r3, sp, #24
     864:	4621      	mov	r1, r4
     866:	a801      	add	r0, sp, #4
     868:	f007 fede 	bl	8628 <mbedtls_asn1_get_alg>
     86c:	2800      	cmp	r0, #0
     86e:	d1f1      	bne.n	854 <bootutil_verify_sig+0x30>
    if (alg.MBEDTLS_CONTEXT_MEMBER(len) != sizeof(ec_pubkey_oid) - 1 ||
     870:	9a04      	ldr	r2, [sp, #16]
     872:	2a07      	cmp	r2, #7
     874:	d1ee      	bne.n	854 <bootutil_verify_sig+0x30>
        memcmp(alg.MBEDTLS_CONTEXT_MEMBER(p), ec_pubkey_oid, sizeof(ec_pubkey_oid) - 1)) {
     876:	4925      	ldr	r1, [pc, #148]	; (90c <bootutil_verify_sig+0xe8>)
     878:	9805      	ldr	r0, [sp, #20]
     87a:	f008 fc66 	bl	914a <memcmp>
    if (alg.MBEDTLS_CONTEXT_MEMBER(len) != sizeof(ec_pubkey_oid) - 1 ||
     87e:	2800      	cmp	r0, #0
     880:	d1e8      	bne.n	854 <bootutil_verify_sig+0x30>
    if (param.MBEDTLS_CONTEXT_MEMBER(len) != sizeof(ec_secp256r1_oid) - 1 ||
     882:	9a07      	ldr	r2, [sp, #28]
     884:	2a08      	cmp	r2, #8
     886:	d1e5      	bne.n	854 <bootutil_verify_sig+0x30>
        memcmp(param.MBEDTLS_CONTEXT_MEMBER(p), ec_secp256r1_oid, sizeof(ec_secp256r1_oid) - 1)) {
     888:	4921      	ldr	r1, [pc, #132]	; (910 <bootutil_verify_sig+0xec>)
     88a:	9808      	ldr	r0, [sp, #32]
     88c:	f008 fc5d 	bl	914a <memcmp>
    if (param.MBEDTLS_CONTEXT_MEMBER(len) != sizeof(ec_secp256r1_oid) - 1 ||
     890:	2800      	cmp	r0, #0
     892:	d1df      	bne.n	854 <bootutil_verify_sig+0x30>
    if (mbedtls_asn1_get_bitstring_null(cp, end, &len)) {
     894:	aa02      	add	r2, sp, #8
     896:	4621      	mov	r1, r4
     898:	a801      	add	r0, sp, #4
     89a:	f007 feb1 	bl	8600 <mbedtls_asn1_get_bitstring_null>
     89e:	2800      	cmp	r0, #0
     8a0:	d1d8      	bne.n	854 <bootutil_verify_sig+0x30>
    if (*cp + len != end) {
     8a2:	e9dd 3201 	ldrd	r3, r2, [sp, #4]
     8a6:	4413      	add	r3, r2
     8a8:	429c      	cmp	r4, r3
     8aa:	d1d3      	bne.n	854 <bootutil_verify_sig+0x30>
    if (len != 2 * NUM_ECC_BYTES + 1) {
     8ac:	2a41      	cmp	r2, #65	; 0x41
     8ae:	d1d1      	bne.n	854 <bootutil_verify_sig+0x30>
    rc = bootutil_decode_sig(signature, sig, sig + slen);
     8b0:	443d      	add	r5, r7
    rc = mbedtls_asn1_get_tag(&cp, end, &len,
     8b2:	2330      	movs	r3, #48	; 0x30
     8b4:	aa03      	add	r2, sp, #12
     8b6:	4629      	mov	r1, r5
     8b8:	a802      	add	r0, sp, #8
     8ba:	9702      	str	r7, [sp, #8]
     8bc:	f007 fe8c 	bl	85d8 <mbedtls_asn1_get_tag>
    if (rc) {
     8c0:	2800      	cmp	r0, #0
     8c2:	d1c7      	bne.n	854 <bootutil_verify_sig+0x30>
    if (cp + len > end) {
     8c4:	e9dd 3202 	ldrd	r3, r2, [sp, #8]
     8c8:	4413      	add	r3, r2
     8ca:	429d      	cmp	r5, r3
     8cc:	d3c2      	bcc.n	854 <bootutil_verify_sig+0x30>
    rc = bootutil_read_bigint(signature, &cp, end);
     8ce:	462a      	mov	r2, r5
     8d0:	a902      	add	r1, sp, #8
     8d2:	a806      	add	r0, sp, #24
     8d4:	f007 fc33 	bl	813e <bootutil_read_bigint>
    if (rc) {
     8d8:	2800      	cmp	r0, #0
     8da:	d1bb      	bne.n	854 <bootutil_verify_sig+0x30>
    rc = bootutil_read_bigint(signature + NUM_ECC_BYTES, &cp, end);
     8dc:	462a      	mov	r2, r5
     8de:	a902      	add	r1, sp, #8
     8e0:	a80e      	add	r0, sp, #56	; 0x38
     8e2:	f007 fc2c 	bl	813e <bootutil_read_bigint>
    if (rc) {
     8e6:	2800      	cmp	r0, #0
     8e8:	d1b4      	bne.n	854 <bootutil_verify_sig+0x30>
    if (hlen != NUM_ECC_BYTES) {
     8ea:	2e20      	cmp	r6, #32
     8ec:	d1b2      	bne.n	854 <bootutil_verify_sig+0x30>

    bootutil_ecdsa_p256_init(&ctx);
#ifdef MCUBOOT_ECDSA_NEED_ASN1_SIG
    rc = bootutil_ecdsa_p256_verify(&ctx, pubkey, end - pubkey, hash, sig, slen);
#else
    rc = bootutil_ecdsa_p256_verify(&ctx, pubkey, end - pubkey, hash, signature,
     8ee:	9901      	ldr	r1, [sp, #4]
    (void)ctx;
    (void)pk_len;
    (void)sig_len;

    /* Only support uncompressed keys. */
    if (pk[0] != 0x04) {
     8f0:	780b      	ldrb	r3, [r1, #0]
     8f2:	2b04      	cmp	r3, #4
     8f4:	d1ae      	bne.n	854 <bootutil_verify_sig+0x30>
        return -1;
    }
    pk++;

    return cc310_ecdsa_verify_secp256r1(hash, pk, sig, BOOTUTIL_CRYPTO_ECDSA_P256_HASH_SIZE);
     8f6:	4633      	mov	r3, r6
     8f8:	aa06      	add	r2, sp, #24
     8fa:	3101      	adds	r1, #1
     8fc:	4640      	mov	r0, r8
     8fe:	f000 fdc7 	bl	1490 <cc310_ecdsa_verify_secp256r1>
#endif /* CY_MBEDTLS_HW_ACCELERATION */

    bootutil_ecdsa_p256_drop(&ctx);

    return rc;
}
     902:	b016      	add	sp, #88	; 0x58
     904:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
     908:	00009e2c 	.word	0x00009e2c
     90c:	0000a346 	.word	0x0000a346
     910:	0000a34e 	.word	0x0000a34e

00000914 <boot_read_swap_size>:
    return -1;
}

int
boot_read_swap_size(int image_index, uint32_t *swap_size)
{
     914:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
     918:	b086      	sub	sp, #24
    uint8_t areas[2] = {
     91a:	2302      	movs	r3, #2
        if (memcmp(magic, boot_img_magic, BOOT_MAGIC_SZ) == 0) {
     91c:	f8df 806c 	ldr.w	r8, [pc, #108]	; 98c <boot_read_swap_size+0x78>
    uint8_t areas[2] = {
     920:	f8ad 3000 	strh.w	r3, [sp]
{
     924:	460d      	mov	r5, r1
     926:	466f      	mov	r7, sp
    for (i = 0; i < sizeof(areas) / sizeof(areas[0]); i++) {
     928:	2600      	movs	r6, #0
        rc = flash_area_open(areas[i], fap);
     92a:	f817 0b01 	ldrb.w	r0, [r7], #1
     92e:	a901      	add	r1, sp, #4
     930:	f001 fed8 	bl	26e4 <flash_area_open>
        if (rc != 0) {
     934:	4604      	mov	r4, r0
     936:	b9a0      	cbnz	r0, 962 <boot_read_swap_size+0x4e>
        off = boot_magic_off(*fap);
     938:	9801      	ldr	r0, [sp, #4]
    return flash_area_get_size(fap) - BOOT_MAGIC_SZ;
     93a:	6881      	ldr	r1, [r0, #8]
        rc = flash_area_read(*fap, off, magic, BOOT_MAGIC_SZ);
     93c:	2310      	movs	r3, #16
     93e:	aa02      	add	r2, sp, #8
     940:	3910      	subs	r1, #16
     942:	f008 fb16 	bl	8f72 <flash_area_read>
     946:	4604      	mov	r4, r0
        flash_area_close(*fap);
     948:	9801      	ldr	r0, [sp, #4]
     94a:	f008 fb11 	bl	8f70 <flash_area_close>
        if (rc != 0) {
     94e:	b944      	cbnz	r4, 962 <boot_read_swap_size+0x4e>
        if (memcmp(magic, boot_img_magic, BOOT_MAGIC_SZ) == 0) {
     950:	2210      	movs	r2, #16
     952:	4641      	mov	r1, r8
     954:	a802      	add	r0, sp, #8
     956:	f008 fbf8 	bl	914a <memcmp>
     95a:	b140      	cbz	r0, 96e <boot_read_swap_size+0x5a>
    for (i = 0; i < sizeof(areas) / sizeof(areas[0]); i++) {
     95c:	b12e      	cbz	r6, 96a <boot_read_swap_size+0x56>
    return -1;
     95e:	f04f 34ff 	mov.w	r4, #4294967295
        rc = flash_area_read(fap, off, swap_size, sizeof *swap_size);
        flash_area_close(fap);
    }

    return rc;
}
     962:	4620      	mov	r0, r4
     964:	b006      	add	sp, #24
     966:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
     96a:	2601      	movs	r6, #1
     96c:	e7dd      	b.n	92a <boot_read_swap_size+0x16>
    return boot_swap_info_off(fap) - BOOT_MAX_ALIGN;
     96e:	9801      	ldr	r0, [sp, #4]
     970:	f008 fde4 	bl	953c <boot_swap_info_off>
        rc = flash_area_read(fap, off, swap_size, sizeof *swap_size);
     974:	2304      	movs	r3, #4
     976:	f1a0 0108 	sub.w	r1, r0, #8
     97a:	462a      	mov	r2, r5
     97c:	9801      	ldr	r0, [sp, #4]
     97e:	f008 faf8 	bl	8f72 <flash_area_read>
     982:	4604      	mov	r4, r0
        flash_area_close(fap);
     984:	9801      	ldr	r0, [sp, #4]
     986:	f008 faf3 	bl	8f70 <flash_area_close>
     98a:	e7ea      	b.n	962 <boot_read_swap_size+0x4e>
     98c:	0000a078 	.word	0x0000a078

00000990 <boot_validate_slot.isra.0>:
 *         FIH_SUCCESS                      if image was successfully validated
 *         1 (or its fih_int encoded form)  if no bootloable image was found
 *         FIH_FAILURE                      on any errors
 */
static fih_int
boot_validate_slot(struct boot_loader_state *state, int slot,
     990:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
                   struct boot_status *bs)
{
    const struct flash_area *fap;
    struct image_header *hdr;
    int area_id;
    fih_int fih_rc = FIH_FAILURE;
     994:	4b3c      	ldr	r3, [pc, #240]	; (a88 <FIH_LABEL_FIH_CALL_END_477+0x90>)
boot_validate_slot(struct boot_loader_state *state, int slot,
     996:	b088      	sub	sp, #32
     998:	4606      	mov	r6, r0
    int rc;

    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
     99a:	2000      	movs	r0, #0
boot_validate_slot(struct boot_loader_state *state, int slot,
     99c:	460c      	mov	r4, r1
    fih_int fih_rc = FIH_FAILURE;
     99e:	681d      	ldr	r5, [r3, #0]
    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
     9a0:	f007 fb2a 	bl	7ff8 <flash_area_id_from_multi_image_slot>
    rc = flash_area_open(area_id, &fap);
     9a4:	a906      	add	r1, sp, #24
     9a6:	b2c0      	uxtb	r0, r0
     9a8:	f001 fe9c 	bl	26e4 <flash_area_open>
    if (rc != 0) {
     9ac:	2800      	cmp	r0, #0
     9ae:	d161      	bne.n	a74 <FIH_LABEL_FIH_CALL_END_477+0x7c>
    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
     9b0:	4621      	mov	r1, r4
     9b2:	f007 fb21 	bl	7ff8 <flash_area_id_from_multi_image_slot>
     ((swap_type) == BOOT_SWAP_TYPE_PERM))

static inline struct image_header*
boot_img_hdr(struct boot_loader_state *state, size_t slot)
{
    return &BOOT_IMG(state, slot).hdr;
     9b6:	252c      	movs	r5, #44	; 0x2c
    rc = flash_area_open(area_id, &fap);
     9b8:	a907      	add	r1, sp, #28
     9ba:	b2c0      	uxtb	r0, r0
     9bc:	fb05 6504 	mla	r5, r5, r4, r6
     9c0:	f001 fe90 	bl	26e4 <flash_area_open>
    if (rc != 0) {
     9c4:	2800      	cmp	r0, #0
     9c6:	d040      	beq.n	a4a <FIH_LABEL_FIH_CALL_END_477+0x52>
        FIH_RET(fih_rc);
    }

    hdr = boot_img_hdr(state, slot);
    if (boot_check_header_erased(state, slot) == 0 ||
        (hdr->ih_flags & IMAGE_F_NON_BOOTABLE)) {
     9c8:	f04f 082c 	mov.w	r8, #44	; 0x2c
     9cc:	fb08 f804 	mul.w	r8, r8, r4
     9d0:	eb06 0708 	add.w	r7, r6, r8
     9d4:	6939      	ldr	r1, [r7, #16]
    if (boot_check_header_erased(state, slot) == 0 ||
     9d6:	f011 0110 	ands.w	r1, r1, #16
     9da:	d141      	bne.n	a60 <FIH_LABEL_FIH_CALL_END_477+0x68>

000009dc <FIH_LABEL_FIH_CALL_START_421>:
    FIH_CALL(bootutil_img_validate, fih_rc, BOOT_CURR_ENC(state), image_index,
     9dc:	f44f 7380 	mov.w	r3, #256	; 0x100
     9e0:	9301      	str	r3, [sp, #4]
     9e2:	4b2a      	ldr	r3, [pc, #168]	; (a8c <FIH_LABEL_FIH_CALL_END_477+0x94>)
     9e4:	9300      	str	r3, [sp, #0]
     9e6:	462a      	mov	r2, r5
     9e8:	e9cd 1103 	strd	r1, r1, [sp, #12]
     9ec:	9b06      	ldr	r3, [sp, #24]
     9ee:	9102      	str	r1, [sp, #8]
     9f0:	4608      	mov	r0, r1
     9f2:	f7ff fdff 	bl	5f4 <bootutil_img_validate>
     9f6:	4605      	mov	r5, r0

000009f8 <FIH_LABEL_FIH_CALL_END_477>:
    if (hdr->ih_magic != IMAGE_MAGIC) {
     9f8:	4b25      	ldr	r3, [pc, #148]	; (a90 <FIH_LABEL_FIH_CALL_END_477+0x98>)
     9fa:	f856 2008 	ldr.w	r2, [r6, r8]
                       fih_rc, BOOT_CURR_IMG(state), slot);
    if (fih_eq(fih_rc, fih_int_encode(BOOT_HOOK_REGULAR)))
    {
        FIH_CALL(boot_image_check, fih_rc, state, hdr, fap, bs);
    }
    if (!boot_is_header_valid(hdr, fap) || fih_not_eq(fih_rc, FIH_SUCCESS)) {
     9fe:	9806      	ldr	r0, [sp, #24]
    if (hdr->ih_magic != IMAGE_MAGIC) {
     a00:	429a      	cmp	r2, r3
     a02:	d10c      	bne.n	a1e <FIH_LABEL_FIH_CALL_END_477+0x26>
    if (!boot_u32_safe_add(&size, hdr->ih_img_size, hdr->ih_hdr_size)) {
     a04:	893a      	ldrh	r2, [r7, #8]
     a06:	68fb      	ldr	r3, [r7, #12]
    if (a > UINT32_MAX - b) {
     a08:	43d1      	mvns	r1, r2
     a0a:	428b      	cmp	r3, r1
     a0c:	d807      	bhi.n	a1e <FIH_LABEL_FIH_CALL_END_477+0x26>
        *dest = a + b;
     a0e:	4413      	add	r3, r2
    if (size >= flash_area_get_size(fap)) {
     a10:	6882      	ldr	r2, [r0, #8]
     a12:	4293      	cmp	r3, r2
     a14:	d203      	bcs.n	a1e <FIH_LABEL_FIH_CALL_END_477+0x26>
    if (!boot_is_header_valid(hdr, fap) || fih_not_eq(fih_rc, FIH_SUCCESS)) {
     a16:	4b1f      	ldr	r3, [pc, #124]	; (a94 <FIH_LABEL_FIH_CALL_END_477+0x9c>)
     a18:	681b      	ldr	r3, [r3, #0]
     a1a:	42ab      	cmp	r3, r5
     a1c:	d027      	beq.n	a6e <FIH_LABEL_FIH_CALL_END_477+0x76>
        if ((slot != BOOT_PRIMARY_SLOT) || ARE_SLOTS_EQUIVALENT()) {
     a1e:	b11c      	cbz	r4, a28 <FIH_LABEL_FIH_CALL_END_477+0x30>
            flash_area_erase(fap, 0, flash_area_get_size(fap));
     a20:	6882      	ldr	r2, [r0, #8]
     a22:	2100      	movs	r1, #0
     a24:	f008 faef 	bl	9006 <flash_area_erase>
     a28:	4b1b      	ldr	r3, [pc, #108]	; (a98 <FIH_LABEL_FIH_CALL_END_477+0xa0>)
     a2a:	4a1c      	ldr	r2, [pc, #112]	; (a9c <FIH_LABEL_FIH_CALL_END_477+0xa4>)
            /* Image is invalid, erase it to prevent further unnecessary
             * attempts to validate and boot it.
             */
        }
#if !defined(__BOOTSIM__)
        BOOT_LOG_ERR("Image in the %s slot is not valid!",
     a2c:	491c      	ldr	r1, [pc, #112]	; (aa0 <FIH_LABEL_FIH_CALL_END_477+0xa8>)
     a2e:	481d      	ldr	r0, [pc, #116]	; (aa4 <FIH_LABEL_FIH_CALL_END_477+0xac>)
     a30:	1ad2      	subs	r2, r2, r3
     a32:	08d2      	lsrs	r2, r2, #3
     a34:	4b1c      	ldr	r3, [pc, #112]	; (aa8 <FIH_LABEL_FIH_CALL_END_477+0xb0>)
     a36:	0192      	lsls	r2, r2, #6
     a38:	f042 0201 	orr.w	r2, r2, #1
     a3c:	2c00      	cmp	r4, #0
     a3e:	bf08      	it	eq
     a40:	4619      	moveq	r1, r3
     a42:	f007 ffb2 	bl	89aa <log_1>
        fih_rc = fih_int_encode(1);
     a46:	2501      	movs	r5, #1
     a48:	e011      	b.n	a6e <FIH_LABEL_FIH_CALL_END_477+0x76>
    erased_val = flash_area_erased_val(fap);
     a4a:	9807      	ldr	r0, [sp, #28]
     a4c:	f008 fb13 	bl	9076 <flash_area_erased_val>
     a50:	4607      	mov	r7, r0
    flash_area_close(fap);
     a52:	9807      	ldr	r0, [sp, #28]
     a54:	f008 fa8c 	bl	8f70 <flash_area_close>
boot_data_is_set_to(uint8_t val, void *data, size_t len)
     a58:	1e6b      	subs	r3, r5, #1
     a5a:	1cea      	adds	r2, r5, #3
    for (i = 0; i < len; i++) {
     a5c:	4293      	cmp	r3, r2
     a5e:	d10d      	bne.n	a7c <FIH_LABEL_FIH_CALL_END_477+0x84>
        if (slot != BOOT_PRIMARY_SLOT) {
     a60:	2c00      	cmp	r4, #0
     a62:	d0f0      	beq.n	a46 <FIH_LABEL_FIH_CALL_END_477+0x4e>
            swap_erase_trailer_sectors(state, fap);
     a64:	9906      	ldr	r1, [sp, #24]
     a66:	4630      	mov	r0, r6
     a68:	f007 fc95 	bl	8396 <swap_erase_trailer_sectors>
        fih_rc = fih_int_encode(1);
     a6c:	4625      	mov	r5, r4
        }
    }
#endif

out:
    flash_area_close(fap);
     a6e:	9806      	ldr	r0, [sp, #24]
     a70:	f008 fa7e 	bl	8f70 <flash_area_close>

    FIH_RET(fih_rc);
}
     a74:	4628      	mov	r0, r5
     a76:	b008      	add	sp, #32
     a78:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        if (val != p[i]) {
     a7c:	f813 1f01 	ldrb.w	r1, [r3, #1]!
     a80:	42b9      	cmp	r1, r7
     a82:	d0eb      	beq.n	a5c <FIH_LABEL_FIH_CALL_END_477+0x64>
     a84:	e7a0      	b.n	9c8 <boot_validate_slot.isra.0+0x38>
     a86:	bf00      	nop
     a88:	20000000 	.word	0x20000000
     a8c:	2000184d 	.word	0x2000184d
     a90:	96f3b83d 	.word	0x96f3b83d
     a94:	2000048c 	.word	0x2000048c
     a98:	00009d80 	.word	0x00009d80
     a9c:	00009d98 	.word	0x00009d98
     aa0:	0000a35f 	.word	0x0000a35f
     aa4:	0000a369 	.word	0x0000a369
     aa8:	0000a357 	.word	0x0000a357

00000aac <boot_swap_image>:
 *
 * @return                      0 on success; nonzero on failure.
 */
static int
boot_swap_image(struct boot_loader_state *state, struct boot_status *bs)
{
     aac:	b573      	push	{r0, r1, r4, r5, r6, lr}
     aae:	460d      	mov	r5, r1
     ab0:	4604      	mov	r4, r0
    uint8_t image_index;
    int rc;

    /* FIXME: just do this if asked by user? */

    size = copy_size = 0;
     ab2:	2100      	movs	r1, #0
    image_index = BOOT_CURR_IMG(state);

    if (boot_status_is_reset(bs)) {
     ab4:	4628      	mov	r0, r5
    size = copy_size = 0;
     ab6:	e9cd 1100 	strd	r1, r1, [sp]
    if (boot_status_is_reset(bs)) {
     aba:	f007 fc2b 	bl	8314 <boot_status_is_reset>
     abe:	b360      	cbz	r0, b1a <boot_swap_image+0x6e>
        /*
         * No swap ever happened, so need to find the largest image which
         * will be used to determine the amount of sectors to swap.
         */
        hdr = boot_img_hdr(state, BOOT_PRIMARY_SLOT);
        if (hdr->ih_magic == IMAGE_MAGIC) {
     ac0:	4e19      	ldr	r6, [pc, #100]	; (b28 <boot_swap_image+0x7c>)
     ac2:	6822      	ldr	r2, [r4, #0]
     ac4:	42b2      	cmp	r2, r6
     ac6:	d103      	bne.n	ad0 <boot_swap_image+0x24>
            rc = boot_read_image_size(state, BOOT_PRIMARY_SLOT, &copy_size);
     ac8:	aa01      	add	r2, sp, #4
     aca:	4620      	mov	r0, r4
     acc:	f007 fb97 	bl	81fe <boot_read_image_size>
            memset(bs->enckey[0], 0xff, BOOT_ENC_KEY_SIZE);
        }
#endif

        hdr = boot_img_hdr(state, BOOT_SECONDARY_SLOT);
        if (hdr->ih_magic == IMAGE_MAGIC) {
     ad0:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
     ad2:	42b3      	cmp	r3, r6
     ad4:	d104      	bne.n	ae0 <boot_swap_image+0x34>
            rc = boot_read_image_size(state, BOOT_SECONDARY_SLOT, &size);
     ad6:	466a      	mov	r2, sp
     ad8:	2101      	movs	r1, #1
     ada:	4620      	mov	r0, r4
     adc:	f007 fb8f 	bl	81fe <boot_read_image_size>
        } else {
            memset(bs->enckey[1], 0xff, BOOT_ENC_KEY_SIZE);
        }
#endif

        if (size > copy_size) {
     ae0:	e9dd 3200 	ldrd	r3, r2, [sp]
     ae4:	4293      	cmp	r3, r2
            copy_size = size;
     ae6:	bf88      	it	hi
     ae8:	9301      	strhi	r3, [sp, #4]
        }

        bs->swap_size = copy_size;
     aea:	9b01      	ldr	r3, [sp, #4]
     aec:	60ab      	str	r3, [r5, #8]
            }
        }
#endif
    }

    swap_run(state, bs, copy_size);
     aee:	4629      	mov	r1, r5
     af0:	9a01      	ldr	r2, [sp, #4]
     af2:	4620      	mov	r0, r4
     af4:	f000 fba2 	bl	123c <swap_run>

#ifdef MCUBOOT_VALIDATE_PRIMARY_SLOT
    extern int boot_status_fails;
    if (boot_status_fails > 0) {
     af8:	4b0c      	ldr	r3, [pc, #48]	; (b2c <boot_swap_image+0x80>)
     afa:	6819      	ldr	r1, [r3, #0]
     afc:	2900      	cmp	r1, #0
     afe:	dd09      	ble.n	b14 <boot_swap_image+0x68>
     b00:	4a0b      	ldr	r2, [pc, #44]	; (b30 <boot_swap_image+0x84>)
     b02:	4b0c      	ldr	r3, [pc, #48]	; (b34 <boot_swap_image+0x88>)
        BOOT_LOG_WRN("%d status write fails performing the swap",
     b04:	480c      	ldr	r0, [pc, #48]	; (b38 <boot_swap_image+0x8c>)
     b06:	1ad2      	subs	r2, r2, r3
     b08:	08d2      	lsrs	r2, r2, #3
     b0a:	0192      	lsls	r2, r2, #6
     b0c:	f042 0202 	orr.w	r2, r2, #2
     b10:	f007 ff4b 	bl	89aa <log_1>
                     boot_status_fails);
    }
#endif

    return 0;
}
     b14:	2000      	movs	r0, #0
     b16:	b002      	add	sp, #8
     b18:	bd70      	pop	{r4, r5, r6, pc}
        rc = boot_read_swap_size(image_index, &bs->swap_size);
     b1a:	f105 0108 	add.w	r1, r5, #8
     b1e:	f7ff fef9 	bl	914 <boot_read_swap_size>
        copy_size = bs->swap_size;
     b22:	68ab      	ldr	r3, [r5, #8]
     b24:	9301      	str	r3, [sp, #4]
     b26:	e7e2      	b.n	aee <boot_swap_image+0x42>
     b28:	96f3b83d 	.word	0x96f3b83d
     b2c:	200010f0 	.word	0x200010f0
     b30:	00009d98 	.word	0x00009d98
     b34:	00009d80 	.word	0x00009d80
     b38:	0000a38c 	.word	0x0000a38c

00000b3c <boot_copy_region>:
{
     b3c:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
        rc = flash_area_read(fap_src, off_src + bytes_copied, buf, chunk_sz);
     b40:	f8df b078 	ldr.w	fp, [pc, #120]	; bbc <boot_copy_region+0x80>
     b44:	4c1b      	ldr	r4, [pc, #108]	; (bb4 <boot_copy_region+0x78>)
     b46:	4d1c      	ldr	r5, [pc, #112]	; (bb8 <boot_copy_region+0x7c>)
{
     b48:	468a      	mov	sl, r1
     b4a:	4690      	mov	r8, r2
     b4c:	4699      	mov	r9, r3
    bytes_copied = 0;
     b4e:	2600      	movs	r6, #0
    while (bytes_copied < sz) {
     b50:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
     b52:	429e      	cmp	r6, r3
     b54:	d301      	bcc.n	b5a <boot_copy_region+0x1e>
    return 0;
     b56:	2000      	movs	r0, #0
     b58:	e00f      	b.n	b7a <boot_copy_region+0x3e>
        if (sz - bytes_copied > sizeof buf) {
     b5a:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
        rc = flash_area_read(fap_src, off_src + bytes_copied, buf, chunk_sz);
     b5c:	4a17      	ldr	r2, [pc, #92]	; (bbc <boot_copy_region+0x80>)
        if (sz - bytes_copied > sizeof buf) {
     b5e:	1b9f      	subs	r7, r3, r6
     b60:	f5b7 6f80 	cmp.w	r7, #1024	; 0x400
     b64:	bf28      	it	cs
     b66:	f44f 6780 	movcs.w	r7, #1024	; 0x400
        rc = flash_area_read(fap_src, off_src + bytes_copied, buf, chunk_sz);
     b6a:	463b      	mov	r3, r7
     b6c:	eb06 0109 	add.w	r1, r6, r9
     b70:	4650      	mov	r0, sl
     b72:	f008 f9fe 	bl	8f72 <flash_area_read>
        if (rc != 0) {
     b76:	b110      	cbz	r0, b7e <boot_copy_region+0x42>
            return BOOT_EFLASH;
     b78:	2001      	movs	r0, #1
}
     b7a:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
        rc = flash_area_write(fap_dst, off_dst + bytes_copied, buf, chunk_sz);
     b7e:	990a      	ldr	r1, [sp, #40]	; 0x28
     b80:	463b      	mov	r3, r7
     b82:	465a      	mov	r2, fp
     b84:	1871      	adds	r1, r6, r1
     b86:	4640      	mov	r0, r8
     b88:	f008 fa0f 	bl	8faa <flash_area_write>
        if (rc != 0) {
     b8c:	2800      	cmp	r0, #0
     b8e:	d1f3      	bne.n	b78 <boot_copy_region+0x3c>
     b90:	f8c4 5600 	str.w	r5, [r4, #1536]	; 0x600
        bytes_copied += chunk_sz;
     b94:	443e      	add	r6, r7
     b96:	f8c4 5604 	str.w	r5, [r4, #1540]	; 0x604
     b9a:	f8c4 5608 	str.w	r5, [r4, #1544]	; 0x608
     b9e:	f8c4 560c 	str.w	r5, [r4, #1548]	; 0x60c
     ba2:	f8c4 5610 	str.w	r5, [r4, #1552]	; 0x610
     ba6:	f8c4 5614 	str.w	r5, [r4, #1556]	; 0x614
     baa:	f8c4 5618 	str.w	r5, [r4, #1560]	; 0x618
     bae:	f8c4 561c 	str.w	r5, [r4, #1564]	; 0x61c
        MCUBOOT_WATCHDOG_FEED();
     bb2:	e7cd      	b.n	b50 <boot_copy_region+0x14>
     bb4:	40010000 	.word	0x40010000
     bb8:	6e524635 	.word	0x6e524635
     bbc:	200004f0 	.word	0x200004f0

00000bc0 <context_boot_go>:
#endif
}

fih_int
context_boot_go(struct boot_loader_state *state, struct boot_rsp *rsp)
{
     bc0:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
    size_t slot;
    struct boot_status bs;
    int rc = -1;
    fih_int fih_rc = FIH_FAILURE;
     bc4:	4b9d      	ldr	r3, [pc, #628]	; (e3c <FIH_LABEL_FIH_CALL_END_2701+0x46>)
     bc6:	681e      	ldr	r6, [r3, #0]
        boot_enc_zeroize(BOOT_CURR_ENC(state));
#endif

        image_index = BOOT_CURR_IMG(state);

        BOOT_IMG(state, BOOT_PRIMARY_SLOT).sectors =
     bc8:	4b9d      	ldr	r3, [pc, #628]	; (e40 <FIH_LABEL_FIH_CALL_END_2701+0x4a>)
     bca:	6243      	str	r3, [r0, #36]	; 0x24
{
     bcc:	460f      	mov	r7, r1
            primary_slot_sectors[image_index];
        BOOT_IMG(state, BOOT_SECONDARY_SLOT).sectors =
     bce:	4b9d      	ldr	r3, [pc, #628]	; (e44 <FIH_LABEL_FIH_CALL_END_2701+0x4e>)
     bd0:	6503      	str	r3, [r0, #80]	; 0x50

        /* Open primary and secondary image areas for the duration
         * of this call.
         */
        for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) {
            fa_id = flash_area_id_from_multi_image_slot(image_index, slot);
     bd2:	2100      	movs	r1, #0
{
     bd4:	b085      	sub	sp, #20
     bd6:	4604      	mov	r4, r0
            fa_id = flash_area_id_from_multi_image_slot(image_index, slot);
     bd8:	4608      	mov	r0, r1
     bda:	f007 fa0d 	bl	7ff8 <flash_area_id_from_multi_image_slot>
            rc = flash_area_open(fa_id, &BOOT_IMG_AREA(state, slot));
     bde:	f104 0120 	add.w	r1, r4, #32
     be2:	b2c0      	uxtb	r0, r0
     be4:	f001 fd7e 	bl	26e4 <flash_area_open>
            fa_id = flash_area_id_from_multi_image_slot(image_index, slot);
     be8:	2101      	movs	r1, #1
     bea:	2000      	movs	r0, #0
     bec:	f007 fa04 	bl	7ff8 <flash_area_id_from_multi_image_slot>
            rc = flash_area_open(fa_id, &BOOT_IMG_AREA(state, slot));
     bf0:	f104 014c 	add.w	r1, r4, #76	; 0x4c
     bf4:	b2c0      	uxtb	r0, r0
     bf6:	f001 fd75 	bl	26e4 <flash_area_open>
     bfa:	4605      	mov	r5, r0
    rc = boot_read_sectors(state);
     bfc:	4620      	mov	r0, r4
     bfe:	f007 fb5f 	bl	82c0 <boot_read_sectors>
    if (rc != 0) {
     c02:	4680      	mov	r8, r0
     c04:	b998      	cbnz	r0, c2e <context_boot_go+0x6e>
    rc = boot_read_image_headers(state, false, NULL);
     c06:	2200      	movs	r2, #0
     c08:	4611      	mov	r1, r2
     c0a:	4620      	mov	r0, r4
     c0c:	f007 fb3f 	bl	828e <boot_read_image_headers>
    if (rc != 0) {
     c10:	4681      	mov	r9, r0
     c12:	b360      	cbz	r0, c6e <context_boot_go+0xae>
     c14:	4a8c      	ldr	r2, [pc, #560]	; (e48 <FIH_LABEL_FIH_CALL_END_2701+0x52>)
     c16:	4b8d      	ldr	r3, [pc, #564]	; (e4c <FIH_LABEL_FIH_CALL_END_2701+0x56>)
        BOOT_LOG_WRN("Failed reading image headers; Image=%u",
     c18:	488d      	ldr	r0, [pc, #564]	; (e50 <FIH_LABEL_FIH_CALL_END_2701+0x5a>)
     c1a:	1ad2      	subs	r2, r2, r3
     c1c:	08d2      	lsrs	r2, r2, #3
     c1e:	0192      	lsls	r2, r2, #6
     c20:	f042 0202 	orr.w	r2, r2, #2
     c24:	2100      	movs	r1, #0
            BOOT_LOG_WRN("Failed reading boot status; Image=%u",
     c26:	f007 fec0 	bl	89aa <log_1>
        BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE;
     c2a:	2301      	movs	r3, #1
     c2c:	e0a3      	b.n	d76 <FIH_LABEL_FIH_CALL_END_2448+0xe>
     c2e:	4b87      	ldr	r3, [pc, #540]	; (e4c <FIH_LABEL_FIH_CALL_END_2701+0x56>)
     c30:	4a85      	ldr	r2, [pc, #532]	; (e48 <FIH_LABEL_FIH_CALL_END_2701+0x52>)
        BOOT_LOG_WRN("Failed reading sectors; BOOT_MAX_IMG_SECTORS=%d"
     c32:	4888      	ldr	r0, [pc, #544]	; (e54 <FIH_LABEL_FIH_CALL_END_2701+0x5e>)
     c34:	1ad2      	subs	r2, r2, r3
     c36:	08d2      	lsrs	r2, r2, #3
     c38:	0192      	lsls	r2, r2, #6
     c3a:	f042 0202 	orr.w	r2, r2, #2
     c3e:	2180      	movs	r1, #128	; 0x80
     c40:	f007 feb3 	bl	89aa <log_1>
        BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE;
     c44:	2301      	movs	r3, #1
        if (rc == BOOT_EFLASH)
     c46:	4598      	cmp	r8, r3
        BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE;
     c48:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
        if (rc == BOOT_EFLASH)
     c4c:	d1db      	bne.n	c06 <context_boot_go+0x46>
#endif

        /* Determine swap type and complete swap if it has been aborted. */
        boot_prepare_image_for_update(state, &bs);

        if (BOOT_IS_UPGRADE(BOOT_SWAP_TYPE(state))) {
     c4e:	f894 3058 	ldrb.w	r3, [r4, #88]	; 0x58
        /* Indicate that swap is not aborted */
        boot_status_reset(&bs);
#endif /* (BOOT_IMAGE_NUMBER > 1) */

        /* Set the previously determined swap type */
        bs.swap_type = BOOT_SWAP_TYPE(state);
     c52:	f88d 3007 	strb.w	r3, [sp, #7]

        switch (BOOT_SWAP_TYPE(state)) {
     c56:	2b04      	cmp	r3, #4
     c58:	f200 8090 	bhi.w	d7c <FIH_LABEL_FIH_CALL_END_2448+0x14>
     c5c:	2b01      	cmp	r3, #1
     c5e:	f200 8094 	bhi.w	d8a <FIH_LABEL_FIH_CALL_END_2448+0x22>
     c62:	f000 80ab 	beq.w	dbc <FIH_LABEL_FIH_CALL_END_2448+0x54>
            }
#endif /* !MCUBOOT_OVERWRITE_ONLY */
            break;

        default:
            BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC;
     c66:	23ff      	movs	r3, #255	; 0xff
     c68:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
     c6c:	e0a6      	b.n	dbc <FIH_LABEL_FIH_CALL_END_2448+0x54>
    if (boot_slots_compatible(state)) {
     c6e:	4620      	mov	r0, r4
     c70:	f000 f9c4 	bl	ffc <boot_slots_compatible>
     c74:	2800      	cmp	r0, #0
     c76:	d0d8      	beq.n	c2a <context_boot_go+0x6a>
        boot_status_reset(bs);
     c78:	4668      	mov	r0, sp
     c7a:	f007 fb42 	bl	8302 <boot_status_reset>
        rc = swap_read_status(state, bs);
     c7e:	4669      	mov	r1, sp
     c80:	4620      	mov	r0, r4
     c82:	f007 fbdd 	bl	8440 <swap_read_status>
        if (rc != 0) {
     c86:	b148      	cbz	r0, c9c <context_boot_go+0xdc>
     c88:	4a6f      	ldr	r2, [pc, #444]	; (e48 <FIH_LABEL_FIH_CALL_END_2701+0x52>)
     c8a:	4b70      	ldr	r3, [pc, #448]	; (e4c <FIH_LABEL_FIH_CALL_END_2701+0x56>)
            BOOT_LOG_WRN("Failed reading boot status; Image=%u",
     c8c:	4872      	ldr	r0, [pc, #456]	; (e58 <FIH_LABEL_FIH_CALL_END_2701+0x62>)
     c8e:	1ad2      	subs	r2, r2, r3
     c90:	08d2      	lsrs	r2, r2, #3
     c92:	0192      	lsls	r2, r2, #6
     c94:	f042 0202 	orr.w	r2, r2, #2
     c98:	4649      	mov	r1, r9
     c9a:	e7c4      	b.n	c26 <context_boot_go+0x66>
        rc = boot_read_image_headers(state, !boot_status_is_reset(bs), bs);
     c9c:	4668      	mov	r0, sp
     c9e:	f007 fb39 	bl	8314 <boot_status_is_reset>
     ca2:	f080 0001 	eor.w	r0, r0, #1
     ca6:	466a      	mov	r2, sp
     ca8:	b2c1      	uxtb	r1, r0
     caa:	4620      	mov	r0, r4
     cac:	f007 faef 	bl	828e <boot_read_image_headers>
        if (rc != 0) {
     cb0:	4602      	mov	r2, r0
     cb2:	2800      	cmp	r0, #0
     cb4:	d1ae      	bne.n	c14 <context_boot_go+0x54>
        if (!boot_status_is_reset(bs)) {
     cb6:	4668      	mov	r0, sp
     cb8:	f007 fb2c 	bl	8314 <boot_status_is_reset>
     cbc:	4680      	mov	r8, r0
     cbe:	bb90      	cbnz	r0, d26 <context_boot_go+0x166>
    rc = boot_swap_image(state, bs);
     cc0:	4669      	mov	r1, sp
     cc2:	4620      	mov	r0, r4
     cc4:	f7ff fef2 	bl	aac <boot_swap_image>
    BOOT_SWAP_TYPE(state) = bs->swap_type;
     cc8:	f89d 3007 	ldrb.w	r3, [sp, #7]
     ccc:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
    if (bs->swap_type == BOOT_SWAP_TYPE_REVERT ||
     cd0:	3b03      	subs	r3, #3
     cd2:	2b01      	cmp	r3, #1
     cd4:	d806      	bhi.n	ce4 <context_boot_go+0x124>
        rc = swap_set_image_ok(BOOT_CURR_IMG(state));
     cd6:	4640      	mov	r0, r8
     cd8:	f007 fc00 	bl	84dc <swap_set_image_ok>
        if (rc != 0) {
     cdc:	b110      	cbz	r0, ce4 <context_boot_go+0x124>
            BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC;
     cde:	23ff      	movs	r3, #255	; 0xff
     ce0:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
    if (BOOT_IS_UPGRADE(bs->swap_type)) {
     ce4:	f89d 3007 	ldrb.w	r3, [sp, #7]
     ce8:	3b02      	subs	r3, #2
     cea:	2b02      	cmp	r3, #2
     cec:	d811      	bhi.n	d12 <context_boot_go+0x152>
        rc = swap_set_copy_done(BOOT_CURR_IMG(state));
     cee:	2000      	movs	r0, #0
     cf0:	f007 fbe2 	bl	84b8 <swap_set_copy_done>
        if (rc != 0) {
     cf4:	b168      	cbz	r0, d12 <context_boot_go+0x152>
            BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC;
     cf6:	23ff      	movs	r3, #255	; 0xff
     cf8:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
     cfc:	4952      	ldr	r1, [pc, #328]	; (e48 <FIH_LABEL_FIH_CALL_END_2701+0x52>)
     cfe:	4b53      	ldr	r3, [pc, #332]	; (e4c <FIH_LABEL_FIH_CALL_END_2701+0x56>)
        BOOT_LOG_ERR("panic!");
     d00:	4856      	ldr	r0, [pc, #344]	; (e5c <FIH_LABEL_FIH_CALL_END_2701+0x66>)
     d02:	1ac9      	subs	r1, r1, r3
     d04:	08c9      	lsrs	r1, r1, #3
     d06:	0189      	lsls	r1, r1, #6
     d08:	f041 0101 	orr.w	r1, r1, #1
     d0c:	f007 fe3e 	bl	898c <log_0>
        while (1) {}
     d10:	e7fe      	b.n	d10 <context_boot_go+0x150>
    if (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_PANIC) {
     d12:	f894 3058 	ldrb.w	r3, [r4, #88]	; 0x58
     d16:	2bff      	cmp	r3, #255	; 0xff
     d18:	d0f0      	beq.n	cfc <context_boot_go+0x13c>
            rc = boot_read_image_headers(state, false, bs);
     d1a:	466a      	mov	r2, sp
     d1c:	2100      	movs	r1, #0
     d1e:	4620      	mov	r0, r4
     d20:	f007 fab5 	bl	828e <boot_read_image_headers>
            BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE;
     d24:	e781      	b.n	c2a <context_boot_go+0x6a>
            if (bs->swap_type == BOOT_SWAP_TYPE_NONE) {
     d26:	f89d 9007 	ldrb.w	r9, [sp, #7]
     d2a:	f1b9 0f01 	cmp.w	r9, #1
     d2e:	d117      	bne.n	d60 <FIH_LABEL_FIH_CALL_START_2428>
    swap_type = boot_swap_type_multi(BOOT_CURR_IMG(state));
     d30:	4610      	mov	r0, r2
     d32:	f003 fdb9 	bl	48a8 <boot_swap_type_multi>
    if (BOOT_IS_UPGRADE(swap_type)) {
     d36:	1e83      	subs	r3, r0, #2
     d38:	2b02      	cmp	r3, #2
    swap_type = boot_swap_type_multi(BOOT_CURR_IMG(state));
     d3a:	4680      	mov	r8, r0
    if (BOOT_IS_UPGRADE(swap_type)) {
     d3c:	d80d      	bhi.n	d5a <FIH_LABEL_FIH_CALL_END_2363+0x14>

00000d3e <FIH_LABEL_FIH_CALL_START_2339>:
        FIH_CALL(boot_validate_slot, fih_rc, state, BOOT_SECONDARY_SLOT, bs);
     d3e:	4649      	mov	r1, r9
     d40:	4620      	mov	r0, r4
     d42:	f7ff fe25 	bl	990 <boot_validate_slot.isra.0>

00000d46 <FIH_LABEL_FIH_CALL_END_2363>:
        if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
     d46:	4b46      	ldr	r3, [pc, #280]	; (e60 <FIH_LABEL_FIH_CALL_END_2701+0x6a>)
     d48:	681b      	ldr	r3, [r3, #0]
     d4a:	4298      	cmp	r0, r3
     d4c:	d005      	beq.n	d5a <FIH_LABEL_FIH_CALL_END_2363+0x14>
                swap_type = BOOT_SWAP_TYPE_FAIL;
     d4e:	2801      	cmp	r0, #1
     d50:	bf0c      	ite	eq
     d52:	f04f 0801 	moveq.w	r8, #1
     d56:	f04f 0805 	movne.w	r8, #5
                BOOT_SWAP_TYPE(state) = boot_validated_swap_type(state, bs);
     d5a:	f884 8058 	strb.w	r8, [r4, #88]	; 0x58
     d5e:	e776      	b.n	c4e <context_boot_go+0x8e>

00000d60 <FIH_LABEL_FIH_CALL_START_2428>:
                FIH_CALL(boot_validate_slot, fih_rc,
     d60:	2101      	movs	r1, #1
     d62:	4620      	mov	r0, r4
     d64:	f7ff fe14 	bl	990 <boot_validate_slot.isra.0>

00000d68 <FIH_LABEL_FIH_CALL_END_2448>:
                if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
     d68:	4b3d      	ldr	r3, [pc, #244]	; (e60 <FIH_LABEL_FIH_CALL_END_2701+0x6a>)
     d6a:	681b      	ldr	r3, [r3, #0]
     d6c:	4298      	cmp	r0, r3
                    BOOT_SWAP_TYPE(state) = bs->swap_type;
     d6e:	bf0c      	ite	eq
     d70:	f89d 3007 	ldrbeq.w	r3, [sp, #7]
                    BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_FAIL;
     d74:	2305      	movne	r3, #5
        BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE;
     d76:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
     d7a:	e768      	b.n	c4e <context_boot_go+0x8e>
        switch (BOOT_SWAP_TYPE(state)) {
     d7c:	2b05      	cmp	r3, #5
     d7e:	f47f af72 	bne.w	c66 <context_boot_go+0xa6>
            rc = swap_set_image_ok(BOOT_CURR_IMG(state));
     d82:	2000      	movs	r0, #0
     d84:	f007 fbaa 	bl	84dc <swap_set_image_ok>
     d88:	e013      	b.n	db2 <FIH_LABEL_FIH_CALL_END_2448+0x4a>
        rc = boot_swap_image(state, bs);
     d8a:	4669      	mov	r1, sp
     d8c:	4620      	mov	r0, r4
     d8e:	f7ff fe8d 	bl	aac <boot_swap_image>
    swap_type = BOOT_SWAP_TYPE(state);
     d92:	f894 3058 	ldrb.w	r3, [r4, #88]	; 0x58
    if (swap_type == BOOT_SWAP_TYPE_REVERT ||
     d96:	1eda      	subs	r2, r3, #3
     d98:	2a01      	cmp	r2, #1
        rc = boot_swap_image(state, bs);
     d9a:	4605      	mov	r5, r0
    if (swap_type == BOOT_SWAP_TYPE_REVERT ||
     d9c:	d80c      	bhi.n	db8 <FIH_LABEL_FIH_CALL_END_2448+0x50>
        rc = swap_set_image_ok(BOOT_CURR_IMG(state));
     d9e:	2000      	movs	r0, #0
     da0:	f007 fb9c 	bl	84dc <swap_set_image_ok>
        if (rc != 0) {
     da4:	4605      	mov	r5, r0
     da6:	2800      	cmp	r0, #0
     da8:	f47f af5d 	bne.w	c66 <context_boot_go+0xa6>
        rc = swap_set_copy_done(BOOT_CURR_IMG(state));
     dac:	2000      	movs	r0, #0
     dae:	f007 fb83 	bl	84b8 <swap_set_copy_done>
            if (rc != 0) {
     db2:	4605      	mov	r5, r0
     db4:	b110      	cbz	r0, dbc <FIH_LABEL_FIH_CALL_END_2448+0x54>
     db6:	e756      	b.n	c66 <context_boot_go+0xa6>
    if (BOOT_IS_UPGRADE(swap_type)) {
     db8:	2b02      	cmp	r3, #2
     dba:	d0f7      	beq.n	dac <FIH_LABEL_FIH_CALL_END_2448+0x44>
        }

        if (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_PANIC) {
     dbc:	f894 3058 	ldrb.w	r3, [r4, #88]	; 0x58
     dc0:	2bff      	cmp	r3, #255	; 0xff
     dc2:	d10a      	bne.n	dda <FIH_LABEL_FIH_CALL_END_2448+0x72>
     dc4:	4920      	ldr	r1, [pc, #128]	; (e48 <FIH_LABEL_FIH_CALL_END_2701+0x52>)
     dc6:	4b21      	ldr	r3, [pc, #132]	; (e4c <FIH_LABEL_FIH_CALL_END_2701+0x56>)
            BOOT_LOG_ERR("panic!");
     dc8:	4824      	ldr	r0, [pc, #144]	; (e5c <FIH_LABEL_FIH_CALL_END_2701+0x66>)
     dca:	1ac9      	subs	r1, r1, r3
     dcc:	08c9      	lsrs	r1, r1, #3
     dce:	0189      	lsls	r1, r1, #6
     dd0:	f041 0101 	orr.w	r1, r1, #1
     dd4:	f007 fdda 	bl	898c <log_0>
            assert(0);

            /* Loop forever... */
            FIH_PANIC;
     dd8:	e7fe      	b.n	dd8 <FIH_LABEL_FIH_CALL_END_2448+0x70>
#if BOOT_IMAGE_NUMBER > 1
        if (state->img_mask[BOOT_CURR_IMG(state)]) {
            continue;
        }
#endif
        if (BOOT_SWAP_TYPE(state) != BOOT_SWAP_TYPE_NONE) {
     dda:	2b01      	cmp	r3, #1
     ddc:	d006      	beq.n	dec <FIH_LABEL_FIH_CALL_START_2685>
            /* Attempt to read an image header from each slot. Ensure that image
             * headers in slots are aligned with headers in boot_data.
             */
            rc = boot_read_image_headers(state, false, &bs);
     dde:	466a      	mov	r2, sp
     de0:	2100      	movs	r1, #0
     de2:	4620      	mov	r0, r4
     de4:	f007 fa53 	bl	828e <boot_read_image_headers>
            if (rc != 0) {
     de8:	4605      	mov	r5, r0
     dea:	b9d0      	cbnz	r0, e22 <FIH_LABEL_FIH_CALL_END_2701+0x2c>

00000dec <FIH_LABEL_FIH_CALL_START_2685>:
	 * primary.
	 */
	if (BOOT_CURR_IMG(state) == 0)
#endif
	{
            FIH_CALL(boot_validate_slot, fih_rc, state, BOOT_PRIMARY_SLOT, NULL);
     dec:	2100      	movs	r1, #0
     dee:	4620      	mov	r0, r4
     df0:	f7ff fdce 	bl	990 <boot_validate_slot.isra.0>
     df4:	4606      	mov	r6, r0

00000df6 <FIH_LABEL_FIH_CALL_END_2701>:
            if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
     df6:	f8df 8068 	ldr.w	r8, [pc, #104]	; e60 <FIH_LABEL_FIH_CALL_END_2701+0x6a>
     dfa:	f8d8 3000 	ldr.w	r3, [r8]
     dfe:	4298      	cmp	r0, r3
     e00:	d10f      	bne.n	e22 <FIH_LABEL_FIH_CALL_END_2701+0x2c>
    /*
     * Since the boot_status struct stores plaintext encryption keys, reset
     * them here to avoid the possibility of jumping into an image that could
     * easily recover them.
     */
    memset(&bs, 0, sizeof(struct boot_status));
     e02:	2210      	movs	r2, #16
     e04:	2100      	movs	r1, #0
     e06:	4668      	mov	r0, sp
     e08:	f008 f9ba 	bl	9180 <memset>
    rsp->br_flash_dev_id = flash_area_get_device_id(BOOT_IMG_AREA(state, active_slot));
     e0c:	6a20      	ldr	r0, [r4, #32]
     e0e:	f007 f8fc 	bl	800a <flash_area_get_device_id>
     e12:	7138      	strb	r0, [r7, #4]
 * Offset of the slot from the beginning of the flash device.
 */
static inline uint32_t
boot_img_slot_off(struct boot_loader_state *state, size_t slot)
{
    return flash_area_get_off(BOOT_IMG(state, slot).area);
     e14:	6a23      	ldr	r3, [r4, #32]

    fill_rsp(state, rsp);

    fih_rc = FIH_SUCCESS;
     e16:	f8d8 6000 	ldr.w	r6, [r8]
    rsp->br_image_off = boot_img_slot_off(state, active_slot);
     e1a:	685b      	ldr	r3, [r3, #4]
     e1c:	60bb      	str	r3, [r7, #8]
    rsp->br_hdr = boot_img_hdr(state, active_slot);
     e1e:	603c      	str	r4, [r7, #0]
        rc = boot_add_shared_data(state, BOOT_PRIMARY_SLOT);
     e20:	2500      	movs	r5, #0
            flash_area_close(BOOT_IMG_AREA(state, BOOT_NUM_SLOTS - 1 - slot));
     e22:	6ce0      	ldr	r0, [r4, #76]	; 0x4c
     e24:	f008 f8a4 	bl	8f70 <flash_area_close>
     e28:	6a20      	ldr	r0, [r4, #32]
     e2a:	f008 f8a1 	bl	8f70 <flash_area_close>
    if (rc) {
        fih_rc = fih_int_encode(rc);
    }

    FIH_RET(fih_rc);
}
     e2e:	2d00      	cmp	r5, #0
     e30:	bf14      	ite	ne
     e32:	4628      	movne	r0, r5
     e34:	4630      	moveq	r0, r6
     e36:	b005      	add	sp, #20
     e38:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
     e3c:	20000000 	.word	0x20000000
     e40:	200008f0 	.word	0x200008f0
     e44:	20000cf0 	.word	0x20000cf0
     e48:	00009d98 	.word	0x00009d98
     e4c:	00009d80 	.word	0x00009d80
     e50:	0000a3f3 	.word	0x0000a3f3
     e54:	0000a3b6 	.word	0x0000a3b6
     e58:	0000a41a 	.word	0x0000a41a
     e5c:	0000a43f 	.word	0x0000a43f
     e60:	2000048c 	.word	0x2000048c

00000e64 <boot_go>:
 *
 * @return                      FIH_SUCCESS on success; nonzero on failure.
 */
fih_int
boot_go(struct boot_rsp *rsp)
{
     e64:	b538      	push	{r3, r4, r5, lr}
void boot_state_clear(struct boot_loader_state *state)
{
    if (state != NULL) {
        memset(state, 0, sizeof(struct boot_loader_state));
    } else {
        memset(&boot_data, 0, sizeof(struct boot_loader_state));
     e66:	4d06      	ldr	r5, [pc, #24]	; (e80 <FIH_LABEL_FIH_CALL_END_3379+0x4>)
{
     e68:	4604      	mov	r4, r0
        memset(&boot_data, 0, sizeof(struct boot_loader_state));
     e6a:	2260      	movs	r2, #96	; 0x60
     e6c:	2100      	movs	r1, #0
     e6e:	4628      	mov	r0, r5
     e70:	f008 f986 	bl	9180 <memset>

00000e74 <FIH_LABEL_FIH_CALL_START_3364>:
    FIH_CALL(context_boot_go, fih_rc, &boot_data, rsp);
     e74:	4621      	mov	r1, r4
     e76:	4628      	mov	r0, r5
     e78:	f7ff fea2 	bl	bc0 <context_boot_go>

00000e7c <FIH_LABEL_FIH_CALL_END_3379>:
}
     e7c:	bd38      	pop	{r3, r4, r5, pc}
     e7e:	bf00      	nop
     e80:	20000490 	.word	0x20000490

00000e84 <boot_read_image_header>:
static uint32_t g_last_idx = UINT32_MAX;

int
boot_read_image_header(struct boot_loader_state *state, int slot,
                       struct image_header *out_hdr, struct boot_status *bs)
{
     e84:	b573      	push	{r0, r1, r4, r5, r6, lr}
     e86:	4616      	mov	r6, r2
#if (BOOT_IMAGE_NUMBER == 1)
    (void)state;
#endif

    off = 0;
    if (bs) {
     e88:	461c      	mov	r4, r3
     e8a:	b333      	cbz	r3, eda <boot_read_image_header+0x56>

static inline size_t
boot_img_sector_size(const struct boot_loader_state *state,
                     size_t slot, size_t sector)
{
    return flash_sector_get_size(&BOOT_IMG(state, slot).sectors[sector]);
     e8c:	6a43      	ldr	r3, [r0, #36]	; 0x24
     e8e:	685d      	ldr	r5, [r3, #4]
        sz = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, 0);
        if (bs->op == BOOT_STATUS_OP_MOVE) {
     e90:	7963      	ldrb	r3, [r4, #5]
     e92:	2b01      	cmp	r3, #1
     e94:	d115      	bne.n	ec2 <boot_read_image_header+0x3e>
            if (slot == 0 && bs->idx > g_last_idx) {
     e96:	bb01      	cbnz	r1, eda <boot_read_image_header+0x56>
     e98:	4b1f      	ldr	r3, [pc, #124]	; (f18 <boot_read_image_header+0x94>)
     e9a:	6822      	ldr	r2, [r4, #0]
     e9c:	681b      	ldr	r3, [r3, #0]
    off = 0;
     e9e:	429a      	cmp	r2, r3
     ea0:	bf98      	it	ls
     ea2:	2500      	movls	r5, #0
                }
            }
        }
    }

    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
     ea4:	2000      	movs	r0, #0
     ea6:	f007 f8a7 	bl	7ff8 <flash_area_id_from_multi_image_slot>
    rc = flash_area_open(area_id, &fap);
     eaa:	a901      	add	r1, sp, #4
     eac:	b2c0      	uxtb	r0, r0
     eae:	f001 fc19 	bl	26e4 <flash_area_open>
    if (rc != 0) {
     eb2:	b1f0      	cbz	r0, ef2 <boot_read_image_header+0x6e>
        rc = BOOT_EFLASH;
     eb4:	2501      	movs	r5, #1
    }

    rc = 0;

done:
    flash_area_close(fap);
     eb6:	9801      	ldr	r0, [sp, #4]
     eb8:	f008 f85a 	bl	8f70 <flash_area_close>
    return rc;
}
     ebc:	4628      	mov	r0, r5
     ebe:	b002      	add	sp, #8
     ec0:	bd70      	pop	{r4, r5, r6, pc}
        } else if (bs->op == BOOT_STATUS_OP_SWAP) {
     ec2:	2b02      	cmp	r3, #2
     ec4:	d109      	bne.n	eda <boot_read_image_header+0x56>
            if (bs->idx > 1 && bs->idx <= g_last_idx) {
     ec6:	6823      	ldr	r3, [r4, #0]
     ec8:	2b01      	cmp	r3, #1
     eca:	d908      	bls.n	ede <boot_read_image_header+0x5a>
     ecc:	4a12      	ldr	r2, [pc, #72]	; (f18 <boot_read_image_header+0x94>)
     ece:	6812      	ldr	r2, [r2, #0]
     ed0:	4293      	cmp	r3, r2
     ed2:	d802      	bhi.n	eda <boot_read_image_header+0x56>
                if (slot == 0) {
     ed4:	fab1 f181 	clz	r1, r1
     ed8:	0949      	lsrs	r1, r1, #5
    off = 0;
     eda:	2500      	movs	r5, #0
     edc:	e7e2      	b.n	ea4 <boot_read_image_header+0x20>
            } else if (bs->idx == 1) {
     ede:	d1fc      	bne.n	eda <boot_read_image_header+0x56>
                if (slot == 0) {
     ee0:	2900      	cmp	r1, #0
     ee2:	d0df      	beq.n	ea4 <boot_read_image_header+0x20>
                if (slot == 1 && bs->state == 2) {
     ee4:	2901      	cmp	r1, #1
     ee6:	d1f8      	bne.n	eda <boot_read_image_header+0x56>
     ee8:	7921      	ldrb	r1, [r4, #4]
     eea:	3902      	subs	r1, #2
     eec:	bf18      	it	ne
     eee:	2101      	movne	r1, #1
     ef0:	e7f3      	b.n	eda <boot_read_image_header+0x56>
    rc = flash_area_read(fap, off, out_hdr, sizeof *out_hdr);
     ef2:	4629      	mov	r1, r5
     ef4:	9801      	ldr	r0, [sp, #4]
     ef6:	2320      	movs	r3, #32
     ef8:	4632      	mov	r2, r6
     efa:	f008 f83a 	bl	8f72 <flash_area_read>
    if (rc != 0) {
     efe:	4605      	mov	r5, r0
     f00:	2800      	cmp	r0, #0
     f02:	d1d7      	bne.n	eb4 <boot_read_image_header+0x30>
    if (bs != NULL && out_hdr->ih_magic != IMAGE_MAGIC) {
     f04:	2c00      	cmp	r4, #0
     f06:	d0d6      	beq.n	eb6 <boot_read_image_header+0x32>
     f08:	6835      	ldr	r5, [r6, #0]
     f0a:	4804      	ldr	r0, [pc, #16]	; (f1c <boot_read_image_header+0x98>)
     f0c:	1a2d      	subs	r5, r5, r0
     f0e:	bf18      	it	ne
     f10:	f04f 35ff 	movne.w	r5, #4294967295
     f14:	e7cf      	b.n	eb6 <boot_read_image_header+0x32>
     f16:	bf00      	nop
     f18:	20000004 	.word	0x20000004
     f1c:	96f3b83d 	.word	0x96f3b83d

00000f20 <swap_read_status_bytes>:

int
swap_read_status_bytes(const struct flash_area *fap,
        struct boot_loader_state *state, struct boot_status *bs)
{
     f20:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
     f24:	4607      	mov	r7, r0
     f26:	b085      	sub	sp, #20
     f28:	460c      	mov	r4, r1
    int rc;
    int last_rc;
    int erased_sections;
    int i;

    max_entries = boot_status_entries(BOOT_CURR_IMG(state), fap);
     f2a:	4601      	mov	r1, r0
     f2c:	2000      	movs	r0, #0
{
     f2e:	4616      	mov	r6, r2
    max_entries = boot_status_entries(BOOT_CURR_IMG(state), fap);
     f30:	f007 f938 	bl	81a4 <boot_status_entries>
    if (max_entries < 0) {
     f34:	1e05      	subs	r5, r0, #0
     f36:	db57      	blt.n	fe8 <swap_read_status_bytes+0xc8>
    erased_sections = 0;
    found_idx = -1;
    /* skip erased sectors at the end */
    last_rc = 1;
    write_sz = BOOT_WRITE_SZ(state);
    off = boot_status_off(fap);
     f38:	4638      	mov	r0, r7
    write_sz = BOOT_WRITE_SZ(state);
     f3a:	6de4      	ldr	r4, [r4, #92]	; 0x5c
    off = boot_status_off(fap);
     f3c:	f007 f93f 	bl	81be <boot_status_off>
    for (i = max_entries; i > 0; i--) {
     f40:	fa5f f984 	uxtb.w	r9, r4
     f44:	f105 38ff 	add.w	r8, r5, #4294967295
     f48:	fb09 0808 	mla	r8, r9, r8, r0
    erased_sections = 0;
     f4c:	f04f 0a00 	mov.w	sl, #0
    last_rc = 1;
     f50:	f04f 0b01 	mov.w	fp, #1
    found_idx = -1;
     f54:	f04f 34ff 	mov.w	r4, #4294967295
    for (i = max_entries; i > 0; i--) {
     f58:	b9cd      	cbnz	r5, f8e <swap_read_status_bytes+0x6e>
            }
        }
        last_rc = rc;
    }

    if (erased_sections > 1) {
     f5a:	f1ba 0f01 	cmp.w	sl, #1
     f5e:	dd09      	ble.n	f74 <swap_read_status_bytes+0x54>
     f60:	4923      	ldr	r1, [pc, #140]	; (ff0 <swap_read_status_bytes+0xd0>)
     f62:	4b24      	ldr	r3, [pc, #144]	; (ff4 <swap_read_status_bytes+0xd4>)
        /* This means there was an error writing status on the last
         * swap. Tell user and move on to validation!
         */
#if !defined(__BOOTSIM__)
        BOOT_LOG_ERR("Detected inconsistent status!");
     f64:	4824      	ldr	r0, [pc, #144]	; (ff8 <swap_read_status_bytes+0xd8>)
     f66:	1ac9      	subs	r1, r1, r3
     f68:	08c9      	lsrs	r1, r1, #3
     f6a:	0189      	lsls	r1, r1, #6
     f6c:	f041 0101 	orr.w	r1, r1, #1
     f70:	f007 fd0c 	bl	898c <log_0>
        assert(0);
#endif
    }

    move_entries = BOOT_MAX_IMG_SECTORS * BOOT_STATUS_MOVE_STATE_COUNT;
    if (found_idx == -1) {
     f74:	1c63      	adds	r3, r4, #1
     f76:	d006      	beq.n	f86 <swap_read_status_bytes+0x66>
        /* no swap status found; nothing to do */
    } else if (found_idx < move_entries) {
     f78:	2c7f      	cmp	r4, #127	; 0x7f
     f7a:	dc2a      	bgt.n	fd2 <swap_read_status_bytes+0xb2>
        bs->op = BOOT_STATUS_OP_MOVE;
        bs->idx = (found_idx  / BOOT_STATUS_MOVE_STATE_COUNT) + BOOT_STATUS_IDX_0;
     f7c:	3401      	adds	r4, #1
        bs->state = (found_idx % BOOT_STATUS_MOVE_STATE_COUNT) + BOOT_STATUS_STATE_0;;
     f7e:	f240 1301 	movw	r3, #257	; 0x101
        bs->idx = (found_idx  / BOOT_STATUS_MOVE_STATE_COUNT) + BOOT_STATUS_IDX_0;
     f82:	6034      	str	r4, [r6, #0]
        bs->state = (found_idx % BOOT_STATUS_MOVE_STATE_COUNT) + BOOT_STATUS_STATE_0;;
     f84:	80b3      	strh	r3, [r6, #4]
        bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0;
        bs->state = ((found_idx - move_entries) % BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_STATE_0;
    }

    return 0;
}
     f86:	4628      	mov	r0, r5
     f88:	b005      	add	sp, #20
     f8a:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
        rc = flash_area_read(fap, off + (i - 1) * write_sz, &status, 1);
     f8e:	1e6b      	subs	r3, r5, #1
     f90:	9300      	str	r3, [sp, #0]
     f92:	f10d 020f 	add.w	r2, sp, #15
     f96:	2301      	movs	r3, #1
     f98:	4641      	mov	r1, r8
     f9a:	4638      	mov	r0, r7
     f9c:	f007 ffe9 	bl	8f72 <flash_area_read>
        if (rc < 0) {
     fa0:	1e03      	subs	r3, r0, #0
     fa2:	9301      	str	r3, [sp, #4]
     fa4:	db22      	blt.n	fec <swap_read_status_bytes+0xcc>
        if (bootutil_buffer_is_erased(fap, &status, 1)) {
     fa6:	2201      	movs	r2, #1
     fa8:	f10d 010f 	add.w	r1, sp, #15
     fac:	4638      	mov	r0, r7
     fae:	f008 fad6 	bl	955e <bootutil_buffer_is_erased>
     fb2:	9b01      	ldr	r3, [sp, #4]
     fb4:	b140      	cbz	r0, fc8 <swap_read_status_bytes+0xa8>
            if (rc != last_rc) {
     fb6:	455b      	cmp	r3, fp
     fb8:	d001      	beq.n	fbe <swap_read_status_bytes+0x9e>
                erased_sections++;
     fba:	f10a 0a01 	add.w	sl, sl, #1
            if (found_idx == -1) {
     fbe:	9d00      	ldr	r5, [sp, #0]
     fc0:	eba8 0809 	sub.w	r8, r8, r9
     fc4:	469b      	mov	fp, r3
     fc6:	e7c7      	b.n	f58 <swap_read_status_bytes+0x38>
     fc8:	f1b4 3fff 	cmp.w	r4, #4294967295
     fcc:	bf08      	it	eq
     fce:	462c      	moveq	r4, r5
     fd0:	e7f5      	b.n	fbe <swap_read_status_bytes+0x9e>
        bs->op = BOOT_STATUS_OP_SWAP;
     fd2:	2302      	movs	r3, #2
        bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0;
     fd4:	3c80      	subs	r4, #128	; 0x80
        bs->op = BOOT_STATUS_OP_SWAP;
     fd6:	7173      	strb	r3, [r6, #5]
        bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0;
     fd8:	1063      	asrs	r3, r4, #1
        bs->state = ((found_idx - move_entries) % BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_STATE_0;
     fda:	f004 0401 	and.w	r4, r4, #1
        bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0;
     fde:	3301      	adds	r3, #1
        bs->state = ((found_idx - move_entries) % BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_STATE_0;
     fe0:	3401      	adds	r4, #1
        bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0;
     fe2:	6033      	str	r3, [r6, #0]
        bs->state = ((found_idx - move_entries) % BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_STATE_0;
     fe4:	7134      	strb	r4, [r6, #4]
     fe6:	e7ce      	b.n	f86 <swap_read_status_bytes+0x66>
        return BOOT_EBADARGS;
     fe8:	2507      	movs	r5, #7
     fea:	e7cc      	b.n	f86 <swap_read_status_bytes+0x66>
            return BOOT_EFLASH;
     fec:	2501      	movs	r5, #1
     fee:	e7ca      	b.n	f86 <swap_read_status_bytes+0x66>
     ff0:	00009d98 	.word	0x00009d98
     ff4:	00009d80 	.word	0x00009d80
     ff8:	0000a446 	.word	0x0000a446

00000ffc <boot_slots_compatible>:
    return BOOT_IMG(state, slot).num_sectors;
     ffc:	6a81      	ldr	r1, [r0, #40]	; 0x28
     ffe:	6d42      	ldr	r2, [r0, #84]	; 0x54
    size_t sector_sz_sec = 0;
    size_t i;

    num_sectors_pri = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT);
    num_sectors_sec = boot_img_num_sectors(state, BOOT_SECONDARY_SLOT);
    if ((num_sectors_pri != num_sectors_sec) &&
    1000:	4291      	cmp	r1, r2
{
    1002:	b538      	push	{r3, r4, r5, lr}
    if ((num_sectors_pri != num_sectors_sec) &&
    1004:	d00e      	beq.n	1024 <CONFIG_FPROTECT_BLOCK_SIZE+0x24>
            (num_sectors_pri != (num_sectors_sec + 1))) {
    1006:	1c53      	adds	r3, r2, #1
    if ((num_sectors_pri != num_sectors_sec) &&
    1008:	428b      	cmp	r3, r1
    100a:	d00b      	beq.n	1024 <CONFIG_FPROTECT_BLOCK_SIZE+0x24>
    100c:	491c      	ldr	r1, [pc, #112]	; (1080 <CONFIG_FPROTECT_BLOCK_SIZE+0x80>)
    100e:	4b1d      	ldr	r3, [pc, #116]	; (1084 <CONFIG_FPROTECT_BLOCK_SIZE+0x84>)
        BOOT_LOG_WRN("Cannot upgrade: not a compatible amount of sectors");
    1010:	481d      	ldr	r0, [pc, #116]	; (1088 <CONFIG_FPROTECT_BLOCK_SIZE+0x88>)
    1012:	1ac9      	subs	r1, r1, r3
    1014:	08c9      	lsrs	r1, r1, #3
    1016:	0189      	lsls	r1, r1, #6
    1018:	f041 0102 	orr.w	r1, r1, #2
        }
    }

    if (num_sectors_pri > num_sectors_sec) {
        if (sector_sz_pri != boot_img_sector_size(state, BOOT_PRIMARY_SLOT, i)) {
            BOOT_LOG_WRN("Cannot upgrade: not same sector layout");
    101c:	f007 fcb6 	bl	898c <log_0>
            return 0;
    1020:	2000      	movs	r0, #0
        }
    }

    return 1;
#endif /* PM_S1_ADDRESS */
}
    1022:	bd38      	pop	{r3, r4, r5, pc}
    if (num_sectors_pri > BOOT_MAX_IMG_SECTORS) {
    1024:	2980      	cmp	r1, #128	; 0x80
    1026:	d928      	bls.n	107a <CONFIG_FPROTECT_BLOCK_SIZE+0x7a>
    1028:	4915      	ldr	r1, [pc, #84]	; (1080 <CONFIG_FPROTECT_BLOCK_SIZE+0x80>)
    102a:	4b16      	ldr	r3, [pc, #88]	; (1084 <CONFIG_FPROTECT_BLOCK_SIZE+0x84>)
        BOOT_LOG_WRN("Cannot upgrade: more sectors than allowed");
    102c:	4817      	ldr	r0, [pc, #92]	; (108c <CONFIG_FPROTECT_BLOCK_SIZE+0x8c>)
    102e:	1ac9      	subs	r1, r1, r3
    1030:	08c9      	lsrs	r1, r1, #3
    1032:	0189      	lsls	r1, r1, #6
    1034:	f041 0102 	orr.w	r1, r1, #2
    1038:	e7f0      	b.n	101c <CONFIG_FPROTECT_BLOCK_SIZE+0x1c>
    return flash_sector_get_size(&BOOT_IMG(state, slot).sectors[sector]);
    103a:	6a44      	ldr	r4, [r0, #36]	; 0x24
    103c:	6d05      	ldr	r5, [r0, #80]	; 0x50
    103e:	eb04 04c3 	add.w	r4, r4, r3, lsl #3
    1042:	eb05 05c3 	add.w	r5, r5, r3, lsl #3
    1046:	6864      	ldr	r4, [r4, #4]
        if (sector_sz_pri != sector_sz_sec) {
    1048:	686d      	ldr	r5, [r5, #4]
    104a:	42ac      	cmp	r4, r5
    104c:	d008      	beq.n	1060 <CONFIG_FPROTECT_BLOCK_SIZE+0x60>
    104e:	490c      	ldr	r1, [pc, #48]	; (1080 <CONFIG_FPROTECT_BLOCK_SIZE+0x80>)
    1050:	4b0c      	ldr	r3, [pc, #48]	; (1084 <CONFIG_FPROTECT_BLOCK_SIZE+0x84>)
            BOOT_LOG_WRN("Cannot upgrade: not same sector layout");
    1052:	480f      	ldr	r0, [pc, #60]	; (1090 <CONFIG_FPROTECT_BLOCK_SIZE+0x90>)
    1054:	1ac9      	subs	r1, r1, r3
    1056:	08c9      	lsrs	r1, r1, #3
    1058:	0189      	lsls	r1, r1, #6
    105a:	f041 0102 	orr.w	r1, r1, #2
    105e:	e7dd      	b.n	101c <CONFIG_FPROTECT_BLOCK_SIZE+0x1c>
    for (i = 0; i < num_sectors_sec; i++) {
    1060:	3301      	adds	r3, #1
    1062:	429a      	cmp	r2, r3
    1064:	d1e9      	bne.n	103a <CONFIG_FPROTECT_BLOCK_SIZE+0x3a>
    if (num_sectors_pri > num_sectors_sec) {
    1066:	4291      	cmp	r1, r2
    1068:	d905      	bls.n	1076 <CONFIG_FPROTECT_BLOCK_SIZE+0x76>
    106a:	6a43      	ldr	r3, [r0, #36]	; 0x24
    106c:	eb03 02c2 	add.w	r2, r3, r2, lsl #3
        if (sector_sz_pri != boot_img_sector_size(state, BOOT_PRIMARY_SLOT, i)) {
    1070:	6853      	ldr	r3, [r2, #4]
    1072:	42a3      	cmp	r3, r4
    1074:	d1eb      	bne.n	104e <CONFIG_FPROTECT_BLOCK_SIZE+0x4e>
    return 1;
    1076:	2001      	movs	r0, #1
    1078:	e7d3      	b.n	1022 <CONFIG_FPROTECT_BLOCK_SIZE+0x22>
    for (i = 0; i < num_sectors_sec; i++) {
    107a:	2300      	movs	r3, #0
    size_t sector_sz_pri = 0;
    107c:	461c      	mov	r4, r3
    107e:	e7f0      	b.n	1062 <CONFIG_FPROTECT_BLOCK_SIZE+0x62>
    1080:	00009d98 	.word	0x00009d98
    1084:	00009d80 	.word	0x00009d80
    1088:	0000a464 	.word	0x0000a464
    108c:	0000a497 	.word	0x0000a497
    1090:	0000a4c1 	.word	0x0000a4c1

00001094 <swap_status_source>:
                 (state)->copy_done,                                \
                 (state)->image_ok)

int
swap_status_source(struct boot_loader_state *state)
{
    1094:	b510      	push	{r4, lr}
    1096:	b08a      	sub	sp, #40	; 0x28
    (void)state;
#endif

    image_index = BOOT_CURR_IMG(state);

    rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_PRIMARY(image_index),
    1098:	a901      	add	r1, sp, #4
    109a:	2002      	movs	r0, #2
    109c:	f008 fac4 	bl	9628 <boot_read_swap_state_by_id>
    10a0:	4c2f      	ldr	r4, [pc, #188]	; (1160 <swap_status_source+0xcc>)
    10a2:	4b30      	ldr	r3, [pc, #192]	; (1164 <swap_status_source+0xd0>)
            &state_primary_slot);
    assert(rc == 0);

    BOOT_LOG_SWAP_STATE("Primary image", &state_primary_slot);
    10a4:	f89d 1004 	ldrb.w	r1, [sp, #4]
    10a8:	4a2f      	ldr	r2, [pc, #188]	; (1168 <swap_status_source+0xd4>)
    10aa:	9205      	str	r2, [sp, #20]
    10ac:	1ae4      	subs	r4, r4, r3
    10ae:	08e4      	lsrs	r4, r4, #3
    10b0:	01a4      	lsls	r4, r4, #6
    10b2:	2901      	cmp	r1, #1
    10b4:	f044 0303 	orr.w	r3, r4, #3
    10b8:	d047      	beq.n	114a <swap_status_source+0xb6>
    10ba:	4a2c      	ldr	r2, [pc, #176]	; (116c <swap_status_source+0xd8>)
    10bc:	482c      	ldr	r0, [pc, #176]	; (1170 <swap_status_source+0xdc>)
    10be:	2903      	cmp	r1, #3
    10c0:	bf08      	it	eq
    10c2:	4602      	moveq	r2, r0
    10c4:	9206      	str	r2, [sp, #24]
    10c6:	f89d 2005 	ldrb.w	r2, [sp, #5]
    10ca:	9207      	str	r2, [sp, #28]
    10cc:	f89d 2006 	ldrb.w	r2, [sp, #6]
    10d0:	9208      	str	r2, [sp, #32]
    10d2:	f89d 2007 	ldrb.w	r2, [sp, #7]
    10d6:	4827      	ldr	r0, [pc, #156]	; (1174 <swap_status_source+0xe0>)
    10d8:	9209      	str	r2, [sp, #36]	; 0x24
    10da:	a905      	add	r1, sp, #20
    10dc:	2205      	movs	r2, #5
    10de:	f007 fcb3 	bl	8a48 <log_n>

    rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_SECONDARY(image_index),
    10e2:	a903      	add	r1, sp, #12
    10e4:	2005      	movs	r0, #5
    10e6:	f008 fa9f 	bl	9628 <boot_read_swap_state_by_id>
            &state_secondary_slot);
    assert(rc == 0);

    BOOT_LOG_SWAP_STATE("Secondary image", &state_secondary_slot);
    10ea:	f89d 100c 	ldrb.w	r1, [sp, #12]
    10ee:	4a22      	ldr	r2, [pc, #136]	; (1178 <swap_status_source+0xe4>)
    10f0:	9205      	str	r2, [sp, #20]
    10f2:	2901      	cmp	r1, #1
    10f4:	f044 0303 	orr.w	r3, r4, #3
    10f8:	d029      	beq.n	114e <swap_status_source+0xba>
    10fa:	4a1c      	ldr	r2, [pc, #112]	; (116c <swap_status_source+0xd8>)
    10fc:	481c      	ldr	r0, [pc, #112]	; (1170 <swap_status_source+0xdc>)
    10fe:	2903      	cmp	r1, #3
    1100:	bf08      	it	eq
    1102:	4602      	moveq	r2, r0
    1104:	9206      	str	r2, [sp, #24]
    1106:	f89d 200d 	ldrb.w	r2, [sp, #13]
    110a:	9207      	str	r2, [sp, #28]
    110c:	f89d 200e 	ldrb.w	r2, [sp, #14]
    1110:	9208      	str	r2, [sp, #32]
    1112:	f89d 200f 	ldrb.w	r2, [sp, #15]
    1116:	9209      	str	r2, [sp, #36]	; 0x24
    1118:	4816      	ldr	r0, [pc, #88]	; (1174 <swap_status_source+0xe0>)
    111a:	2205      	movs	r2, #5
    111c:	a905      	add	r1, sp, #20
    111e:	f007 fc93 	bl	8a48 <log_n>

    if (state_primary_slot.magic == BOOT_MAGIC_GOOD &&
    1122:	f89d 3004 	ldrb.w	r3, [sp, #4]
    1126:	2b01      	cmp	r3, #1
    1128:	d113      	bne.n	1152 <swap_status_source+0xbe>
    112a:	f89d 3006 	ldrb.w	r3, [sp, #6]
    112e:	2b03      	cmp	r3, #3
    1130:	d10f      	bne.n	1152 <swap_status_source+0xbe>
            state_primary_slot.copy_done == BOOT_FLAG_UNSET &&
    1132:	f89d 300c 	ldrb.w	r3, [sp, #12]
    1136:	2b01      	cmp	r3, #1
    1138:	d00b      	beq.n	1152 <swap_status_source+0xbe>
            state_secondary_slot.magic != BOOT_MAGIC_GOOD) {

        source = BOOT_STATUS_SOURCE_PRIMARY_SLOT;

        BOOT_LOG_INF("Boot source: primary slot");
    113a:	4810      	ldr	r0, [pc, #64]	; (117c <swap_status_source+0xe8>)
    113c:	f044 0103 	orr.w	r1, r4, #3
    1140:	f007 fc24 	bl	898c <log_0>
        return source;
    1144:	2002      	movs	r0, #2
    }

    BOOT_LOG_INF("Boot source: none");
    return BOOT_STATUS_SOURCE_NONE;
}
    1146:	b00a      	add	sp, #40	; 0x28
    1148:	bd10      	pop	{r4, pc}
    BOOT_LOG_SWAP_STATE("Primary image", &state_primary_slot);
    114a:	4a0d      	ldr	r2, [pc, #52]	; (1180 <swap_status_source+0xec>)
    114c:	e7ba      	b.n	10c4 <swap_status_source+0x30>
    BOOT_LOG_SWAP_STATE("Secondary image", &state_secondary_slot);
    114e:	4a0c      	ldr	r2, [pc, #48]	; (1180 <swap_status_source+0xec>)
    1150:	e7d8      	b.n	1104 <swap_status_source+0x70>
    BOOT_LOG_INF("Boot source: none");
    1152:	480c      	ldr	r0, [pc, #48]	; (1184 <swap_status_source+0xf0>)
    1154:	f044 0103 	orr.w	r1, r4, #3
    1158:	f007 fc18 	bl	898c <log_0>
    return BOOT_STATUS_SOURCE_NONE;
    115c:	2000      	movs	r0, #0
    115e:	e7f2      	b.n	1146 <swap_status_source+0xb2>
    1160:	00009d98 	.word	0x00009d98
    1164:	00009d80 	.word	0x00009d80
    1168:	0000a4e8 	.word	0x0000a4e8
    116c:	0000a4fc 	.word	0x0000a4fc
    1170:	0000a4f6 	.word	0x0000a4f6
    1174:	0000a505 	.word	0x0000a505
    1178:	0000a541 	.word	0x0000a541
    117c:	0000a551 	.word	0x0000a551
    1180:	0000a500 	.word	0x0000a500
    1184:	0000a56b 	.word	0x0000a56b

00001188 <fixup_revert>:
 * upgrade (by initializing the secondary slot).
 */
void
fixup_revert(const struct boot_loader_state *state, struct boot_status *bs,
        const struct flash_area *fap_sec)
{
    1188:	b570      	push	{r4, r5, r6, lr}
#if (BOOT_IMAGE_NUMBER == 1)
    (void)state;
#endif

    /* No fixup required */
    if (bs->swap_type != BOOT_SWAP_TYPE_REVERT ||
    118a:	684b      	ldr	r3, [r1, #4]
{
    118c:	4614      	mov	r4, r2
    if (bs->swap_type != BOOT_SWAP_TYPE_REVERT ||
    118e:	4a23      	ldr	r2, [pc, #140]	; (121c <fixup_revert+0x94>)
    1190:	f003 23ff 	and.w	r3, r3, #4278255360	; 0xff00ff00
    1194:	4293      	cmp	r3, r2
{
    1196:	b088      	sub	sp, #32
    1198:	4606      	mov	r6, r0
    119a:	460d      	mov	r5, r1
    if (bs->swap_type != BOOT_SWAP_TYPE_REVERT ||
    119c:	d139      	bne.n	1212 <fixup_revert+0x8a>
        bs->op != BOOT_STATUS_OP_MOVE ||
    119e:	680b      	ldr	r3, [r1, #0]
    11a0:	2b01      	cmp	r3, #1
    11a2:	d136      	bne.n	1212 <fixup_revert+0x8a>
        bs->idx != BOOT_STATUS_IDX_0) {
        return;
    }

    rc = boot_read_swap_state(fap_sec, &swap_state);
    11a4:	a901      	add	r1, sp, #4
    11a6:	4620      	mov	r0, r4
    11a8:	f003 fb2e 	bl	4808 <boot_read_swap_state>
    11ac:	4a1c      	ldr	r2, [pc, #112]	; (1220 <fixup_revert+0x98>)
    11ae:	4b1d      	ldr	r3, [pc, #116]	; (1224 <fixup_revert+0x9c>)
    assert(rc == 0);

    BOOT_LOG_SWAP_STATE("Secondary image", &swap_state);
    11b0:	f89d 1004 	ldrb.w	r1, [sp, #4]
    11b4:	1a9b      	subs	r3, r3, r2
    11b6:	08db      	lsrs	r3, r3, #3
    11b8:	4a1b      	ldr	r2, [pc, #108]	; (1228 <fixup_revert+0xa0>)
    11ba:	9203      	str	r2, [sp, #12]
    11bc:	019b      	lsls	r3, r3, #6
    11be:	2901      	cmp	r1, #1
    11c0:	f043 0303 	orr.w	r3, r3, #3
    11c4:	d027      	beq.n	1216 <fixup_revert+0x8e>
    11c6:	4a19      	ldr	r2, [pc, #100]	; (122c <fixup_revert+0xa4>)
    11c8:	4819      	ldr	r0, [pc, #100]	; (1230 <fixup_revert+0xa8>)
    11ca:	2903      	cmp	r1, #3
    11cc:	bf08      	it	eq
    11ce:	4602      	moveq	r2, r0
    11d0:	9204      	str	r2, [sp, #16]
    11d2:	f89d 2005 	ldrb.w	r2, [sp, #5]
    11d6:	9205      	str	r2, [sp, #20]
    11d8:	f89d 2006 	ldrb.w	r2, [sp, #6]
    11dc:	9206      	str	r2, [sp, #24]
    11de:	f89d 2007 	ldrb.w	r2, [sp, #7]
    11e2:	9207      	str	r2, [sp, #28]
    11e4:	4813      	ldr	r0, [pc, #76]	; (1234 <fixup_revert+0xac>)
    11e6:	2205      	movs	r2, #5
    11e8:	a903      	add	r1, sp, #12
    11ea:	f007 fc2d 	bl	8a48 <log_n>

    if (swap_state.magic == BOOT_MAGIC_UNSET) {
    11ee:	f89d 3004 	ldrb.w	r3, [sp, #4]
    11f2:	2b03      	cmp	r3, #3
    11f4:	d10d      	bne.n	1212 <fixup_revert+0x8a>
        rc = swap_erase_trailer_sectors(state, fap_sec);
    11f6:	4621      	mov	r1, r4
    11f8:	4630      	mov	r0, r6
    11fa:	f007 f8cc 	bl	8396 <swap_erase_trailer_sectors>
        assert(rc == 0);

        rc = boot_write_image_ok(fap_sec);
    11fe:	4620      	mov	r0, r4
    1200:	f008 fa09 	bl	9616 <boot_write_image_ok>
        assert(rc == 0);

        rc = boot_write_swap_size(fap_sec, bs->swap_size);
    1204:	68a9      	ldr	r1, [r5, #8]
    1206:	4620      	mov	r0, r4
    1208:	f006 ffea 	bl	81e0 <boot_write_swap_size>
        assert(rc == 0);

        rc = boot_write_magic(fap_sec);
    120c:	4620      	mov	r0, r4
    120e:	f003 faed 	bl	47ec <boot_write_magic>
        assert(rc == 0);
    }
}
    1212:	b008      	add	sp, #32
    1214:	bd70      	pop	{r4, r5, r6, pc}
    BOOT_LOG_SWAP_STATE("Secondary image", &swap_state);
    1216:	4a08      	ldr	r2, [pc, #32]	; (1238 <fixup_revert+0xb0>)
    1218:	e7da      	b.n	11d0 <fixup_revert+0x48>
    121a:	bf00      	nop
    121c:	04000100 	.word	0x04000100
    1220:	00009d80 	.word	0x00009d80
    1224:	00009d98 	.word	0x00009d98
    1228:	0000a541 	.word	0x0000a541
    122c:	0000a4fc 	.word	0x0000a4fc
    1230:	0000a4f6 	.word	0x0000a4f6
    1234:	0000a505 	.word	0x0000a505
    1238:	0000a500 	.word	0x0000a500

0000123c <swap_run>:

void
swap_run(struct boot_loader_state *state, struct boot_status *bs,
         uint32_t copy_size)
{
    123c:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    1240:	ed2d 8b02 	vpush	{d8}
    1244:	6a43      	ldr	r3, [r0, #36]	; 0x24
    1246:	460c      	mov	r4, r1
    1248:	685e      	ldr	r6, [r3, #4]
    124a:	b08b      	sub	sp, #44	; 0x2c
    124c:	4605      	mov	r5, r0
    124e:	2101      	movs	r1, #1
    uint8_t image_index;
    const struct flash_area *fap_pri;
    const struct flash_area *fap_sec;
    int rc;

    sz = 0;
    1250:	2300      	movs	r3, #0
    g_last_idx = 0;

    sector_sz = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, 0);
    while (1) {
        sz += sector_sz;
    1252:	4433      	add	r3, r6
        /* Skip to next sector because all sectors will be moved up. */
        g_last_idx++;
        if (sz >= copy_size) {
    1254:	429a      	cmp	r2, r3
    1256:	4608      	mov	r0, r1
    1258:	f101 0101 	add.w	r1, r1, #1
    125c:	d8f9      	bhi.n	1252 <swap_run+0x16>
    125e:	4f7b      	ldr	r7, [pc, #492]	; (144c <swap_run+0x210>)
    1260:	6038      	str	r0, [r7, #0]
    }

    /*
     * When starting a new swap upgrade, check that there is enough space.
     */
    if (boot_status_is_reset(bs)) {
    1262:	4620      	mov	r0, r4
    1264:	f007 f856 	bl	8314 <boot_status_is_reset>
    1268:	46bb      	mov	fp, r7
    126a:	b1f8      	cbz	r0, 12ac <swap_run+0x70>
        sz = 0;
        trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state));
    126c:	6de8      	ldr	r0, [r5, #92]	; 0x5c
    126e:	f006 ff94 	bl	819a <boot_trailer_sz>
        first_trailer_idx = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT) - 1;
    1272:	6aab      	ldr	r3, [r5, #40]	; 0x28
        sz = 0;
    1274:	2200      	movs	r2, #0
        first_trailer_idx = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT) - 1;
    1276:	3b01      	subs	r3, #1

        while (1) {
            sz += sector_sz;
    1278:	4432      	add	r2, r6
            if  (sz >= trailer_sz) {
    127a:	4282      	cmp	r2, r0
    127c:	d201      	bcs.n	1282 <swap_run+0x46>
                break;
            }
            first_trailer_idx--;
    127e:	3b01      	subs	r3, #1
            sz += sector_sz;
    1280:	e7fa      	b.n	1278 <swap_run+0x3c>
        }

        if (g_last_idx >= first_trailer_idx) {
    1282:	f8db 2000 	ldr.w	r2, [fp]
    1286:	429a      	cmp	r2, r3
    1288:	d310      	bcc.n	12ac <swap_run+0x70>
    128a:	4b71      	ldr	r3, [pc, #452]	; (1450 <swap_run+0x214>)
    128c:	4971      	ldr	r1, [pc, #452]	; (1454 <swap_run+0x218>)
            BOOT_LOG_WRN("Not enough free space to run swap upgrade");
    128e:	4872      	ldr	r0, [pc, #456]	; (1458 <swap_run+0x21c>)
    1290:	1ac9      	subs	r1, r1, r3
    1292:	08c9      	lsrs	r1, r1, #3
    1294:	0189      	lsls	r1, r1, #6
    1296:	f041 0102 	orr.w	r1, r1, #2
    129a:	f007 fb77 	bl	898c <log_0>
            bs->swap_type = BOOT_SWAP_TYPE_NONE;
    129e:	2301      	movs	r3, #1
    12a0:	71e3      	strb	r3, [r4, #7]
        idx++;
    }

    flash_area_close(fap_pri);
    flash_area_close(fap_sec);
}
    12a2:	b00b      	add	sp, #44	; 0x2c
    12a4:	ecbd 8b02 	vpop	{d8}
    12a8:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(image_index), &fap_pri);
    12ac:	a908      	add	r1, sp, #32
    12ae:	2002      	movs	r0, #2
    12b0:	f001 fa18 	bl	26e4 <flash_area_open>
    rc = flash_area_open(FLASH_AREA_IMAGE_SECONDARY(image_index), &fap_sec);
    12b4:	a909      	add	r1, sp, #36	; 0x24
    12b6:	2005      	movs	r0, #5
    12b8:	f001 fa14 	bl	26e4 <flash_area_open>
    fixup_revert(state, bs, fap_sec);
    12bc:	9a09      	ldr	r2, [sp, #36]	; 0x24
    12be:	4621      	mov	r1, r4
    12c0:	4628      	mov	r0, r5
    12c2:	f7ff ff61 	bl	1188 <fixup_revert>
    if (bs->op == BOOT_STATUS_OP_MOVE) {
    12c6:	7963      	ldrb	r3, [r4, #5]
    12c8:	2b01      	cmp	r3, #1
    12ca:	d108      	bne.n	12de <swap_run+0xa2>
        idx = g_last_idx;
    12cc:	f8db 7000 	ldr.w	r7, [fp]
    BOOT_STATUS_ASSERT(rc == 0);
    12d0:	f8df a188 	ldr.w	sl, [pc, #392]	; 145c <swap_run+0x220>
        while (idx > 0) {
    12d4:	f8db 3000 	ldr.w	r3, [fp]
    12d8:	b9a7      	cbnz	r7, 1304 <swap_run+0xc8>
        bs->idx = BOOT_STATUS_IDX_0;
    12da:	2301      	movs	r3, #1
    12dc:	6023      	str	r3, [r4, #0]
    bs->op = BOOT_STATUS_OP_SWAP;
    12de:	2302      	movs	r3, #2
        BOOT_STATUS_ASSERT(rc == 0);
    12e0:	f8df 8178 	ldr.w	r8, [pc, #376]	; 145c <swap_run+0x220>
    bs->op = BOOT_STATUS_OP_SWAP;
    12e4:	7163      	strb	r3, [r4, #5]
    idx = 1;
    12e6:	2701      	movs	r7, #1
        bs->state = BOOT_STATUS_STATE_1;
    12e8:	9305      	str	r3, [sp, #20]
    while (idx <= g_last_idx) {
    12ea:	f8db 3000 	ldr.w	r3, [fp]
    12ee:	f8dd 9020 	ldr.w	r9, [sp, #32]
    12f2:	429f      	cmp	r7, r3
    12f4:	d94d      	bls.n	1392 <swap_run+0x156>
    flash_area_close(fap_pri);
    12f6:	4648      	mov	r0, r9
    12f8:	f007 fe3a 	bl	8f70 <flash_area_close>
    flash_area_close(fap_sec);
    12fc:	9809      	ldr	r0, [sp, #36]	; 0x24
    12fe:	f007 fe37 	bl	8f70 <flash_area_close>
    1302:	e7ce      	b.n	12a2 <swap_run+0x66>
            if (idx <= (g_last_idx - bs->idx + 1)) {
    1304:	6822      	ldr	r2, [r4, #0]
    1306:	3301      	adds	r3, #1
    1308:	1a9b      	subs	r3, r3, r2
    130a:	429f      	cmp	r7, r3
    130c:	d83f      	bhi.n	138e <swap_run+0x152>

static inline uint32_t
boot_img_sector_off(const struct boot_loader_state *state, size_t slot,
                    size_t sector)
{
    return flash_sector_get_off(&BOOT_IMG(state, slot).sectors[sector]) -
    130e:	6a6b      	ldr	r3, [r5, #36]	; 0x24
    1310:	f8dd 8020 	ldr.w	r8, [sp, #32]
 */
uint8_t flash_area_erased_val(const struct flash_area *fap);

static inline uint32_t flash_sector_get_off(const struct flash_sector *fs)
{
	return fs->fs_off;
    1314:	6819      	ldr	r1, [r3, #0]
    1316:	f853 0037 	ldr.w	r0, [r3, r7, lsl #3]
    131a:	eb03 03c7 	add.w	r3, r3, r7, lsl #3
    if (bs->idx == BOOT_STATUS_IDX_0) {
    131e:	2a01      	cmp	r2, #1
    1320:	f853 3c08 	ldr.w	r3, [r3, #-8]
    1324:	eba3 0301 	sub.w	r3, r3, r1
    1328:	ee08 3a10 	vmov	s16, r3
    132c:	eba0 0901 	sub.w	r9, r0, r1
    1330:	d112      	bne.n	1358 <swap_run+0x11c>
        if (bs->source != BOOT_STATUS_SOURCE_PRIMARY_SLOT) {
    1332:	68e2      	ldr	r2, [r4, #12]
                boot_move_sector_up(idx, sector_sz, state, bs, fap_pri, fap_sec);
    1334:	9b09      	ldr	r3, [sp, #36]	; 0x24
        if (bs->source != BOOT_STATUS_SOURCE_PRIMARY_SLOT) {
    1336:	2a02      	cmp	r2, #2
    1338:	d00a      	beq.n	1350 <swap_run+0x114>
            rc = swap_erase_trailer_sectors(state, fap_pri);
    133a:	4641      	mov	r1, r8
    133c:	4628      	mov	r0, r5
    133e:	9303      	str	r3, [sp, #12]
    1340:	f007 f829 	bl	8396 <swap_erase_trailer_sectors>
            rc = swap_status_init(state, fap_pri, bs);
    1344:	4622      	mov	r2, r4
    1346:	4641      	mov	r1, r8
    1348:	4628      	mov	r0, r5
    134a:	f007 f85a 	bl	8402 <swap_status_init>
    134e:	9b03      	ldr	r3, [sp, #12]
        rc = swap_erase_trailer_sectors(state, fap_sec);
    1350:	4619      	mov	r1, r3
    1352:	4628      	mov	r0, r5
    1354:	f007 f81f 	bl	8396 <swap_erase_trailer_sectors>
    rc = boot_erase_region(fap_pri, new_off, sz);
    1358:	4632      	mov	r2, r6
    135a:	4649      	mov	r1, r9
    135c:	4640      	mov	r0, r8
    135e:	f007 f818 	bl	8392 <boot_erase_region>
    rc = boot_copy_region(state, fap_pri, fap_pri, old_off, new_off, sz);
    1362:	ee18 3a10 	vmov	r3, s16
    1366:	4642      	mov	r2, r8
    1368:	4641      	mov	r1, r8
    136a:	e9cd 9600 	strd	r9, r6, [sp]
    136e:	4628      	mov	r0, r5
    1370:	f7ff fbe4 	bl	b3c <boot_copy_region>
    rc = boot_write_status(state, bs);
    1374:	4621      	mov	r1, r4
    1376:	4628      	mov	r0, r5
    1378:	f006 ffd9 	bl	832e <boot_write_status>
    bs->idx++;
    137c:	6823      	ldr	r3, [r4, #0]
    137e:	3301      	adds	r3, #1
    1380:	6023      	str	r3, [r4, #0]
    BOOT_STATUS_ASSERT(rc == 0);
    1382:	b120      	cbz	r0, 138e <swap_run+0x152>
    1384:	f8da 3000 	ldr.w	r3, [sl]
    1388:	3301      	adds	r3, #1
    138a:	f8ca 3000 	str.w	r3, [sl]
            idx--;
    138e:	3f01      	subs	r7, #1
    1390:	e7a0      	b.n	12d4 <swap_run+0x98>
        if (idx >= bs->idx) {
    1392:	6823      	ldr	r3, [r4, #0]
    1394:	429f      	cmp	r7, r3
    1396:	d356      	bcc.n	1446 <swap_run+0x20a>
    1398:	6a69      	ldr	r1, [r5, #36]	; 0x24
    139a:	6d28      	ldr	r0, [r5, #80]	; 0x50
    139c:	f851 3037 	ldr.w	r3, [r1, r7, lsl #3]
    13a0:	9304      	str	r3, [sp, #16]
    13a2:	00fa      	lsls	r2, r7, #3
    13a4:	3a08      	subs	r2, #8
    13a6:	680b      	ldr	r3, [r1, #0]
    13a8:	f850 c002 	ldr.w	ip, [r0, r2]
    13ac:	9303      	str	r3, [sp, #12]
    13ae:	6803      	ldr	r3, [r0, #0]
    if (bs->state == BOOT_STATUS_STATE_0) {
    13b0:	7920      	ldrb	r0, [r4, #4]
            boot_swap_sectors(idx, sector_sz, state, bs, fap_pri, fap_sec);
    13b2:	f8dd a024 	ldr.w	sl, [sp, #36]	; 0x24
    if (bs->state == BOOT_STATUS_STATE_0) {
    13b6:	2801      	cmp	r0, #1
    13b8:	ebac 0303 	sub.w	r3, ip, r3
    13bc:	d141      	bne.n	1442 <swap_run+0x206>
    13be:	5889      	ldr	r1, [r1, r2]
    13c0:	9307      	str	r3, [sp, #28]
    13c2:	9b03      	ldr	r3, [sp, #12]
        rc = boot_erase_region(fap_pri, pri_off, sz);
    13c4:	4632      	mov	r2, r6
    13c6:	1ac9      	subs	r1, r1, r3
    13c8:	4648      	mov	r0, r9
    13ca:	9106      	str	r1, [sp, #24]
    13cc:	f006 ffe1 	bl	8392 <boot_erase_region>
        rc = boot_copy_region(state, fap_sec, fap_pri, sec_off, pri_off, sz);
    13d0:	9906      	ldr	r1, [sp, #24]
    13d2:	9b07      	ldr	r3, [sp, #28]
    13d4:	9100      	str	r1, [sp, #0]
    13d6:	464a      	mov	r2, r9
    13d8:	4651      	mov	r1, sl
    13da:	9601      	str	r6, [sp, #4]
    13dc:	4628      	mov	r0, r5
    13de:	9306      	str	r3, [sp, #24]
    13e0:	f7ff fbac 	bl	b3c <boot_copy_region>
        rc = boot_write_status(state, bs);
    13e4:	4621      	mov	r1, r4
    13e6:	4628      	mov	r0, r5
    13e8:	f006 ffa1 	bl	832e <boot_write_status>
        bs->state = BOOT_STATUS_STATE_1;
    13ec:	9b05      	ldr	r3, [sp, #20]
    13ee:	7123      	strb	r3, [r4, #4]
        BOOT_STATUS_ASSERT(rc == 0);
    13f0:	9b06      	ldr	r3, [sp, #24]
    13f2:	b120      	cbz	r0, 13fe <swap_run+0x1c2>
    13f4:	f8d8 2000 	ldr.w	r2, [r8]
    13f8:	3201      	adds	r2, #1
    13fa:	f8c8 2000 	str.w	r2, [r8]
        rc = boot_erase_region(fap_sec, sec_off, sz);
    13fe:	4619      	mov	r1, r3
    1400:	4632      	mov	r2, r6
    1402:	4650      	mov	r0, sl
    1404:	9306      	str	r3, [sp, #24]
    1406:	f006 ffc4 	bl	8392 <boot_erase_region>
        rc = boot_copy_region(state, fap_pri, fap_sec, pri_up_off, sec_off, sz);
    140a:	9b06      	ldr	r3, [sp, #24]
    140c:	9300      	str	r3, [sp, #0]
    140e:	e9dd 2303 	ldrd	r2, r3, [sp, #12]
    1412:	4649      	mov	r1, r9
    1414:	1a9b      	subs	r3, r3, r2
    1416:	9601      	str	r6, [sp, #4]
    1418:	4652      	mov	r2, sl
    141a:	4628      	mov	r0, r5
    141c:	f7ff fb8e 	bl	b3c <boot_copy_region>
        rc = boot_write_status(state, bs);
    1420:	4621      	mov	r1, r4
    1422:	4628      	mov	r0, r5
    1424:	f006 ff83 	bl	832e <boot_write_status>
        bs->idx++;
    1428:	6823      	ldr	r3, [r4, #0]
    142a:	3301      	adds	r3, #1
    142c:	6023      	str	r3, [r4, #0]
        bs->state = BOOT_STATUS_STATE_0;
    142e:	f04f 0301 	mov.w	r3, #1
    1432:	7123      	strb	r3, [r4, #4]
        BOOT_STATUS_ASSERT(rc == 0);
    1434:	b138      	cbz	r0, 1446 <swap_run+0x20a>
    1436:	f8d8 3000 	ldr.w	r3, [r8]
    143a:	3301      	adds	r3, #1
    143c:	f8c8 3000 	str.w	r3, [r8]
    1440:	e001      	b.n	1446 <swap_run+0x20a>
    if (bs->state == BOOT_STATUS_STATE_1) {
    1442:	2802      	cmp	r0, #2
    1444:	d0db      	beq.n	13fe <swap_run+0x1c2>
        idx++;
    1446:	3701      	adds	r7, #1
    1448:	e74f      	b.n	12ea <swap_run+0xae>
    144a:	bf00      	nop
    144c:	20000004 	.word	0x20000004
    1450:	00009d80 	.word	0x00009d80
    1454:	00009d98 	.word	0x00009d98
    1458:	0000a57d 	.word	0x0000a57d
    145c:	200010f0 	.word	0x200010f0

00001460 <cc310_init>:
 */

#include "cc310_glue.h"

int cc310_init(void)
{
    1460:	b570      	push	{r4, r5, r6, lr}
    /* Only initialize once */
    static bool initialized;

    if (!initialized) {
    1462:	4d09      	ldr	r5, [pc, #36]	; (1488 <cc310_init+0x28>)
    1464:	782b      	ldrb	r3, [r5, #0]
    1466:	b953      	cbnz	r3, 147e <cc310_init+0x1e>
    NRF_CRYPTOCELL->ENABLE=1;
    1468:	4c08      	ldr	r4, [pc, #32]	; (148c <cc310_init+0x2c>)
    146a:	2601      	movs	r6, #1
    146c:	f8c4 6500 	str.w	r6, [r4, #1280]	; 0x500
        nrf_cc310_enable();
        if (nrf_cc310_bl_init() != 0) {
    1470:	f005 fda4 	bl	6fbc <nrf_cc310_bl_init>
    1474:	b928      	cbnz	r0, 1482 <cc310_init+0x22>
            return -1;
        }
        initialized = true;
    1476:	702e      	strb	r6, [r5, #0]
    NRF_CRYPTOCELL->ENABLE=0;
    1478:	f8c4 0500 	str.w	r0, [r4, #1280]	; 0x500
        nrf_cc310_disable();
    }

    return 0;
}
    147c:	bd70      	pop	{r4, r5, r6, pc}
    return 0;
    147e:	2000      	movs	r0, #0
    1480:	e7fc      	b.n	147c <cc310_init+0x1c>
            return -1;
    1482:	f04f 30ff 	mov.w	r0, #4294967295
    1486:	e7f9      	b.n	147c <cc310_init+0x1c>
    1488:	2000194d 	.word	0x2000194d
    148c:	5002a000 	.word	0x5002a000

00001490 <cc310_ecdsa_verify_secp256r1>:

int cc310_ecdsa_verify_secp256r1(uint8_t *hash,
                                 uint8_t *public_key,
                                 uint8_t *signature,
                                 size_t hash_len)
{
    1490:	b570      	push	{r4, r5, r6, lr}
    NRF_CRYPTOCELL->ENABLE=1;
    1492:	4e0b      	ldr	r6, [pc, #44]	; (14c0 <cc310_ecdsa_verify_secp256r1+0x30>)
    1494:	b0ae      	sub	sp, #184	; 0xb8
    1496:	461d      	mov	r5, r3
    1498:	e9cd 2102 	strd	r2, r1, [sp, #8]
    149c:	4604      	mov	r4, r0
        int rc;
        nrf_cc310_bl_ecdsa_verify_context_secp256r1_t ctx;
        cc310_init();
    149e:	f7ff ffdf 	bl	1460 <cc310_init>
    14a2:	2301      	movs	r3, #1
    14a4:	f8c6 3500 	str.w	r3, [r6, #1280]	; 0x500
        nrf_cc310_enable();
        rc = nrf_cc310_bl_ecdsa_verify_secp256r1(&ctx,
    14a8:	e9dd 2102 	ldrd	r2, r1, [sp, #8]
    14ac:	4623      	mov	r3, r4
    14ae:	9500      	str	r5, [sp, #0]
    14b0:	a805      	add	r0, sp, #20
    14b2:	f008 faf2 	bl	9a9a <nrf_cc310_bl_ecdsa_verify_secp256r1>
    NRF_CRYPTOCELL->ENABLE=0;
    14b6:	2300      	movs	r3, #0
    14b8:	f8c6 3500 	str.w	r3, [r6, #1280]	; 0x500
                                                 (nrf_cc310_bl_ecc_signature_secp256r1_t  *) signature,
                                                 hash,
                                                 hash_len);
        nrf_cc310_disable();
        return rc;
}
    14bc:	b02e      	add	sp, #184	; 0xb8
    14be:	bd70      	pop	{r4, r5, r6, pc}
    14c0:	5002a000 	.word	0x5002a000

000014c4 <nrf_cleanup_peripheral>:
    return (uint32_t)p_reg + task;
}

NRF_STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_reg, nrf_rtc_task_t task)
{
    *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
    14c4:	4b17      	ldr	r3, [pc, #92]	; (1524 <nrf_cleanup_peripheral+0x60>)
    p_reg->EVTENSET = mask;
}

NRF_STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_reg, uint32_t mask)
{
    p_reg->EVTENCLR = mask;
    14c6:	4918      	ldr	r1, [pc, #96]	; (1528 <nrf_cleanup_peripheral+0x64>)
    *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
    14c8:	2201      	movs	r2, #1
    14ca:	601a      	str	r2, [r3, #0]
    p_reg->EVTENCLR = mask;
    14cc:	f04f 33ff 	mov.w	r3, #4294967295
    14d0:	f8c1 3348 	str.w	r3, [r1, #840]	; 0x348
    p_reg->INTENCLR = mask;
    14d4:	f8c1 3308 	str.w	r3, [r1, #776]	; 0x308
    *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
    14d8:	f501 41c0 	add.w	r1, r1, #24576	; 0x6000
    14dc:	3104      	adds	r1, #4
    14de:	600a      	str	r2, [r1, #0]
    p_reg->EVTENCLR = mask;
    14e0:	f8c1 3344 	str.w	r3, [r1, #836]	; 0x344
    p_reg->INTENCLR = mask;
    14e4:	f8c1 3304 	str.w	r3, [r1, #772]	; 0x304
    *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
    14e8:	f501 3198 	add.w	r1, r1, #77824	; 0x13000
    14ec:	600a      	str	r2, [r1, #0]
    p_reg->EVTENCLR = mask;
    14ee:	4a0f      	ldr	r2, [pc, #60]	; (152c <nrf_cleanup_peripheral+0x68>)
    14f0:	f8c2 3348 	str.w	r3, [r2, #840]	; 0x348
    p_reg->INTENCLR = mask;
    14f4:	f8c2 3308 	str.w	r3, [r2, #776]	; 0x308
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
}

NRF_STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg)
{
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
    14f8:	f5a2 3208 	sub.w	r2, r2, #139264	; 0x22000
    14fc:	2100      	movs	r1, #0
    14fe:	f8c2 1500 	str.w	r1, [r2, #1280]	; 0x500
    p_reg->INTENCLR = mask;
    1502:	f8c2 3308 	str.w	r3, [r2, #776]	; 0x308
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
    1506:	f502 3218 	add.w	r2, r2, #155648	; 0x26000
    150a:	f8c2 1500 	str.w	r1, [r2, #1280]	; 0x500
    p_reg->INTENCLR = mask;
    150e:	f8c2 3308 	str.w	r3, [r2, #776]	; 0x308
    }
}

NRF_STATIC_INLINE void nrf_ppi_channels_disable_all(NRF_PPI_Type * p_reg)
{
    p_reg->CHENCLR = ((uint32_t)0xFFFFFFFFuL);
    1512:	f5a2 4210 	sub.w	r2, r2, #36864	; 0x9000
    1516:	f8c2 3508 	str.w	r3, [r2, #1288]	; 0x508
    p_reg->INTENSET = mask;
}

NRF_STATIC_INLINE void nrf_clock_int_disable(NRF_CLOCK_Type * p_reg, uint32_t mask)
{
    p_reg->INTENCLR = mask;
    151a:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
    151e:	f8c2 3308 	str.w	r3, [r2, #776]	; 0x308
#endif
#if defined(NRF_DPPIC)
    nrf_dppi_channels_disable_all(NRF_DPPIC);
#endif
    nrf_cleanup_clock();
}
    1522:	4770      	bx	lr
    1524:	4000b004 	.word	0x4000b004
    1528:	4000b000 	.word	0x4000b000
    152c:	40024000 	.word	0x40024000

00001530 <char_out>:

static int char_out(int c, void *ctx_p)
{
	struct out_context *ctx = ctx_p;

	ctx->count++;
    1530:	680b      	ldr	r3, [r1, #0]
    1532:	3301      	adds	r3, #1
    1534:	600b      	str	r3, [r1, #0]
	return _char_out(c);
    1536:	4b01      	ldr	r3, [pc, #4]	; (153c <char_out+0xc>)
    1538:	681b      	ldr	r3, [r3, #0]
    153a:	4718      	bx	r3
    153c:	20000008 	.word	0x20000008

00001540 <__printk_hook_install>:
	_char_out = fn;
    1540:	4b01      	ldr	r3, [pc, #4]	; (1548 <__printk_hook_install+0x8>)
    1542:	6018      	str	r0, [r3, #0]
}
    1544:	4770      	bx	lr
    1546:	bf00      	nop
    1548:	20000008 	.word	0x20000008

0000154c <vprintk>:
#endif
	}
}
#else
void vprintk(const char *fmt, va_list ap)
{
    154c:	b507      	push	{r0, r1, r2, lr}
    154e:	460b      	mov	r3, r1
	struct out_context ctx = { 0 };
    1550:	2100      	movs	r1, #0
{
    1552:	4602      	mov	r2, r0
	struct out_context ctx = { 0 };
    1554:	9101      	str	r1, [sp, #4]
#ifdef CONFIG_PRINTK_SYNC
	k_spinlock_key_t key = k_spin_lock(&lock);
#endif

	cbvprintf(char_out, &ctx, fmt, ap);
    1556:	4803      	ldr	r0, [pc, #12]	; (1564 <vprintk+0x18>)
    1558:	a901      	add	r1, sp, #4
    155a:	f000 f901 	bl	1760 <cbvprintf>

#ifdef CONFIG_PRINTK_SYNC
	k_spin_unlock(&lock, key);
#endif
}
    155e:	b003      	add	sp, #12
    1560:	f85d fb04 	ldr.w	pc, [sp], #4
    1564:	00001531 	.word	0x00001531

00001568 <vsnprintk>:

	return ret;
}

int vsnprintk(char *str, size_t size, const char *fmt, va_list ap)
{
    1568:	b530      	push	{r4, r5, lr}
    156a:	b085      	sub	sp, #20
	struct str_context ctx = { str, size, 0 };
    156c:	e9cd 0101 	strd	r0, r1, [sp, #4]
{
    1570:	4604      	mov	r4, r0
	struct str_context ctx = { str, size, 0 };
    1572:	2500      	movs	r5, #0

	cbvprintf(str_out, &ctx, fmt, ap);
    1574:	a901      	add	r1, sp, #4
    1576:	4805      	ldr	r0, [pc, #20]	; (158c <vsnprintk+0x24>)
	struct str_context ctx = { str, size, 0 };
    1578:	9503      	str	r5, [sp, #12]
	cbvprintf(str_out, &ctx, fmt, ap);
    157a:	f000 f8f1 	bl	1760 <cbvprintf>

	if (ctx.count < ctx.max) {
    157e:	e9dd 3002 	ldrd	r3, r0, [sp, #8]
    1582:	4298      	cmp	r0, r3
		str[ctx.count] = '\0';
    1584:	bfb8      	it	lt
    1586:	5425      	strblt	r5, [r4, r0]
	}

	return ctx.count;
}
    1588:	b005      	add	sp, #20
    158a:	bd30      	pop	{r4, r5, pc}
    158c:	00008735 	.word	0x00008735

00001590 <process_event>:
 * regions.
 */
static void process_event(struct onoff_manager *mgr,
			  int evt,
			  k_spinlock_key_t key)
{
    1590:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
	sys_slist_t clients;
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    1594:	f8b0 9018 	ldrh.w	r9, [r0, #24]
	__ASSERT_NO_MSG(evt != EVT_NOP);

	/* If this is a nested call record the event for processing in
	 * the top invocation.
	 */
	if (processing) {
    1598:	f019 0808 	ands.w	r8, r9, #8
{
    159c:	4604      	mov	r4, r0
    159e:	4693      	mov	fp, r2
	if (processing) {
    15a0:	d00e      	beq.n	15c0 <process_event+0x30>
		if (evt == EVT_COMPLETE) {
    15a2:	2901      	cmp	r1, #1
			mgr->flags |= ONOFF_FLAG_COMPLETE;
    15a4:	bf0c      	ite	eq
    15a6:	f049 0910 	orreq.w	r9, r9, #16
		} else {
			__ASSERT_NO_MSG(evt == EVT_RECHECK);

			mgr->flags |= ONOFF_FLAG_RECHECK;
    15aa:	f049 0920 	orrne.w	r9, r9, #32
    15ae:	f8a0 9018 	strh.w	r9, [r0, #24]
	__asm__ volatile(
		"cpsie i;"
		"isb"
		: : : "memory");
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	__asm__ volatile(
    15b2:	f38b 8811 	msr	BASEPRI, fp
    15b6:	f3bf 8f6f 	isb	sy
		state = mgr->flags & ONOFF_STATE_MASK;
	} while (evt != EVT_NOP);

out:
	k_spin_unlock(&mgr->lock, key);
}
    15ba:	b003      	add	sp, #12
    15bc:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
				transit(mgr, transition_complete);
    15c0:	f8df a198 	ldr.w	sl, [pc, #408]	; 175c <process_event+0x1cc>
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    15c4:	f009 0907 	and.w	r9, r9, #7
		if (evt == EVT_RECHECK) {
    15c8:	2902      	cmp	r1, #2
    15ca:	d107      	bne.n	15dc <process_event+0x4c>
			evt = process_recheck(mgr);
    15cc:	4620      	mov	r0, r4
    15ce:	f007 f8de 	bl	878e <process_recheck>
		if (evt == EVT_NOP) {
    15d2:	2800      	cmp	r0, #0
    15d4:	d0ed      	beq.n	15b2 <process_event+0x22>
		if (evt == EVT_COMPLETE) {
    15d6:	2801      	cmp	r0, #1
    15d8:	8b23      	ldrh	r3, [r4, #24]
    15da:	d14d      	bne.n	1678 <process_event+0xe8>
			res = mgr->last_res;
    15dc:	6967      	ldr	r7, [r4, #20]
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    15de:	8b21      	ldrh	r1, [r4, #24]
	if (res < 0) {
    15e0:	2f00      	cmp	r7, #0
    15e2:	da15      	bge.n	1610 <process_event+0x80>
		*clients = mgr->clients;
    15e4:	6825      	ldr	r5, [r4, #0]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    15e6:	f021 0107 	bic.w	r1, r1, #7
 * @param list A pointer on the list to initialize
 */
static inline void sys_slist_init(sys_slist_t *list)
{
	list->head = NULL;
	list->tail = NULL;
    15ea:	e9c4 8800 	strd	r8, r8, [r4]
    15ee:	f041 0101 	orr.w	r1, r1, #1
	mgr->flags = (state & ONOFF_STATE_MASK)
    15f2:	8321      	strh	r1, [r4, #24]
		onoff_transition_fn transit = NULL;
    15f4:	2600      	movs	r6, #0
		bool do_monitors = (state != (mgr->flags & ONOFF_STATE_MASK))
    15f6:	8b21      	ldrh	r1, [r4, #24]
    15f8:	f001 0207 	and.w	r2, r1, #7
				   && !sys_slist_is_empty(&mgr->monitors);
    15fc:	454a      	cmp	r2, r9
    15fe:	d002      	beq.n	1606 <process_event+0x76>
		if (do_monitors
    1600:	68a3      	ldr	r3, [r4, #8]
    1602:	2b00      	cmp	r3, #0
    1604:	d159      	bne.n	16ba <process_event+0x12a>
		    || !sys_slist_is_empty(&clients)
    1606:	b90d      	cbnz	r5, 160c <process_event+0x7c>
		    || (transit != NULL)) {
    1608:	2e00      	cmp	r6, #0
    160a:	d071      	beq.n	16f0 <process_event+0x160>
    160c:	2300      	movs	r3, #0
    160e:	e055      	b.n	16bc <process_event+0x12c>
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    1610:	f001 0307 	and.w	r3, r1, #7
		   || (state == ONOFF_STATE_RESETTING)) {
    1614:	1f5a      	subs	r2, r3, #5
	} else if ((state == ONOFF_STATE_TO_ON)
    1616:	2a01      	cmp	r2, #1
    1618:	d81f      	bhi.n	165a <process_event+0xca>
		*clients = mgr->clients;
    161a:	f021 0107 	bic.w	r1, r1, #7
		if (state == ONOFF_STATE_TO_ON) {
    161e:	2b06      	cmp	r3, #6
		*clients = mgr->clients;
    1620:	6825      	ldr	r5, [r4, #0]
	list->head = NULL;
    1622:	b289      	uxth	r1, r1
	list->tail = NULL;
    1624:	e9c4 8800 	strd	r8, r8, [r4]
		if (state == ONOFF_STATE_TO_ON) {
    1628:	d10c      	bne.n	1644 <process_event+0xb4>
 *
 * @return A pointer on the first node of the list (or NULL if none)
 */
static inline sys_snode_t *sys_slist_peek_head(sys_slist_t *list)
{
	return list->head;
    162a:	2d00      	cmp	r5, #0
    162c:	462b      	mov	r3, r5
    162e:	bf38      	it	cc
    1630:	2300      	movcc	r3, #0
			SYS_SLIST_FOR_EACH_CONTAINER(clients, cp, node) {
    1632:	b12b      	cbz	r3, 1640 <process_event+0xb0>
				mgr->refs += 1U;
    1634:	8b62      	ldrh	r2, [r4, #26]
 *
 * @return a pointer on the next node (or NULL if none)
 */
static inline sys_snode_t *sys_slist_peek_next_no_check(sys_snode_t *node);

Z_GENLIST_PEEK_NEXT_NO_CHECK(slist, snode)
    1636:	681b      	ldr	r3, [r3, #0]
    1638:	3201      	adds	r2, #1
    163a:	8362      	strh	r2, [r4, #26]
			SYS_SLIST_FOR_EACH_CONTAINER(clients, cp, node) {
    163c:	2b00      	cmp	r3, #0
    163e:	d1f8      	bne.n	1632 <process_event+0xa2>
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    1640:	f041 0102 	orr.w	r1, r1, #2
	mgr->flags = (state & ONOFF_STATE_MASK)
    1644:	8321      	strh	r1, [r4, #24]
		if (process_recheck(mgr) != EVT_NOP) {
    1646:	4620      	mov	r0, r4
    1648:	f007 f8a1 	bl	878e <process_recheck>
    164c:	2800      	cmp	r0, #0
    164e:	d0d1      	beq.n	15f4 <process_event+0x64>
			mgr->flags |= ONOFF_FLAG_RECHECK;
    1650:	8b23      	ldrh	r3, [r4, #24]
    1652:	f043 0320 	orr.w	r3, r3, #32
    1656:	8323      	strh	r3, [r4, #24]
    1658:	e7cc      	b.n	15f4 <process_event+0x64>
	} else if (state == ONOFF_STATE_TO_OFF) {
    165a:	2b04      	cmp	r3, #4
    165c:	d10a      	bne.n	1674 <process_event+0xe4>
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    165e:	f021 0107 	bic.w	r1, r1, #7
    1662:	b289      	uxth	r1, r1
	mgr->flags = (state & ONOFF_STATE_MASK)
    1664:	8321      	strh	r1, [r4, #24]
		if (process_recheck(mgr) != EVT_NOP) {
    1666:	4620      	mov	r0, r4
    1668:	f007 f891 	bl	878e <process_recheck>
    166c:	b110      	cbz	r0, 1674 <process_event+0xe4>
			mgr->flags |= ONOFF_FLAG_RECHECK;
    166e:	f041 0120 	orr.w	r1, r1, #32
    1672:	8321      	strh	r1, [r4, #24]
    1674:	2500      	movs	r5, #0
    1676:	e7bd      	b.n	15f4 <process_event+0x64>
		} else if (evt == EVT_START) {
    1678:	2803      	cmp	r0, #3
    167a:	d109      	bne.n	1690 <process_event+0x100>
			transit = mgr->transitions->start;
    167c:	6922      	ldr	r2, [r4, #16]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    167e:	f023 0307 	bic.w	r3, r3, #7
			transit = mgr->transitions->start;
    1682:	6816      	ldr	r6, [r2, #0]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    1684:	f043 0306 	orr.w	r3, r3, #6
	mgr->flags = (state & ONOFF_STATE_MASK)
    1688:	8323      	strh	r3, [r4, #24]
}
    168a:	2500      	movs	r5, #0
		res = 0;
    168c:	462f      	mov	r7, r5
    168e:	e7b2      	b.n	15f6 <process_event+0x66>
		} else if (evt == EVT_STOP) {
    1690:	2804      	cmp	r0, #4
    1692:	d106      	bne.n	16a2 <process_event+0x112>
			transit = mgr->transitions->stop;
    1694:	6922      	ldr	r2, [r4, #16]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    1696:	f023 0307 	bic.w	r3, r3, #7
			transit = mgr->transitions->stop;
    169a:	6856      	ldr	r6, [r2, #4]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    169c:	f043 0304 	orr.w	r3, r3, #4
    16a0:	e7f2      	b.n	1688 <process_event+0xf8>
		} else if (evt == EVT_RESET) {
    16a2:	2805      	cmp	r0, #5
    16a4:	d106      	bne.n	16b4 <process_event+0x124>
			transit = mgr->transitions->reset;
    16a6:	6922      	ldr	r2, [r4, #16]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    16a8:	f023 0307 	bic.w	r3, r3, #7
			transit = mgr->transitions->reset;
    16ac:	6896      	ldr	r6, [r2, #8]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    16ae:	f043 0305 	orr.w	r3, r3, #5
    16b2:	e7e9      	b.n	1688 <process_event+0xf8>
    16b4:	2500      	movs	r5, #0
		onoff_transition_fn transit = NULL;
    16b6:	462e      	mov	r6, r5
    16b8:	e7e8      	b.n	168c <process_event+0xfc>
				   && !sys_slist_is_empty(&mgr->monitors);
    16ba:	2301      	movs	r3, #1
			uint32_t flags = mgr->flags | ONOFF_FLAG_PROCESSING;
    16bc:	f041 0108 	orr.w	r1, r1, #8
			mgr->flags = flags;
    16c0:	8321      	strh	r1, [r4, #24]
    16c2:	f38b 8811 	msr	BASEPRI, fp
    16c6:	f3bf 8f6f 	isb	sy
			if (do_monitors) {
    16ca:	bb03      	cbnz	r3, 170e <process_event+0x17e>
	while (!sys_slist_is_empty(list)) {
    16cc:	2d00      	cmp	r5, #0
    16ce:	d134      	bne.n	173a <process_event+0x1aa>
			if (transit != NULL) {
    16d0:	b116      	cbz	r6, 16d8 <process_event+0x148>
				transit(mgr, transition_complete);
    16d2:	4651      	mov	r1, sl
    16d4:	4620      	mov	r0, r4
    16d6:	47b0      	blx	r6
	__asm__ volatile(
    16d8:	f04f 0320 	mov.w	r3, #32
    16dc:	f3ef 8b11 	mrs	fp, BASEPRI
    16e0:	f383 8812 	msr	BASEPRI_MAX, r3
    16e4:	f3bf 8f6f 	isb	sy
			mgr->flags &= ~ONOFF_FLAG_PROCESSING;
    16e8:	8b23      	ldrh	r3, [r4, #24]
    16ea:	f023 0308 	bic.w	r3, r3, #8
    16ee:	8323      	strh	r3, [r4, #24]
		if ((mgr->flags & ONOFF_FLAG_COMPLETE) != 0) {
    16f0:	8b23      	ldrh	r3, [r4, #24]
    16f2:	06da      	lsls	r2, r3, #27
    16f4:	d52a      	bpl.n	174c <process_event+0x1bc>
			mgr->flags &= ~ONOFF_FLAG_COMPLETE;
    16f6:	f023 0310 	bic.w	r3, r3, #16
    16fa:	8323      	strh	r3, [r4, #24]
			evt = EVT_COMPLETE;
    16fc:	2101      	movs	r1, #1
		state = mgr->flags & ONOFF_STATE_MASK;
    16fe:	f8b4 9018 	ldrh.w	r9, [r4, #24]
    1702:	f009 0907 	and.w	r9, r9, #7
	} while (evt != EVT_NOP);
    1706:	2900      	cmp	r1, #0
    1708:	f47f af5e 	bne.w	15c8 <process_event+0x38>
out:
    170c:	e751      	b.n	15b2 <process_event+0x22>
	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(mlist, mon, tmp, node) {
    170e:	68a1      	ldr	r1, [r4, #8]
    1710:	2900      	cmp	r1, #0
    1712:	d0db      	beq.n	16cc <process_event+0x13c>
	return node->next;
    1714:	680b      	ldr	r3, [r1, #0]
		mon->callback(mgr, mon, state, res);
    1716:	f8d1 b004 	ldr.w	fp, [r1, #4]
    171a:	9201      	str	r2, [sp, #4]
    171c:	2b00      	cmp	r3, #0
    171e:	bf38      	it	cc
    1720:	2300      	movcc	r3, #0
    1722:	4699      	mov	r9, r3
    1724:	4620      	mov	r0, r4
    1726:	463b      	mov	r3, r7
    1728:	47d8      	blx	fp
	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(mlist, mon, tmp, node) {
    172a:	9a01      	ldr	r2, [sp, #4]
    172c:	f1b9 0f00 	cmp.w	r9, #0
    1730:	d0cc      	beq.n	16cc <process_event+0x13c>
    1732:	f8d9 3000 	ldr.w	r3, [r9]
Z_GENLIST_PEEK_NEXT_NO_CHECK(slist, snode)
    1736:	4649      	mov	r1, r9
    1738:	e7ed      	b.n	1716 <process_event+0x186>
 *
 * @return A pointer to the first node of the list
 */
static inline sys_snode_t *sys_slist_get_not_empty(sys_slist_t *list);

Z_GENLIST_GET_NOT_EMPTY(slist, snode)
    173a:	4629      	mov	r1, r5
		notify_one(mgr, cli, state, res);
    173c:	463b      	mov	r3, r7
    173e:	4620      	mov	r0, r4
    1740:	9201      	str	r2, [sp, #4]
    1742:	682d      	ldr	r5, [r5, #0]
    1744:	f007 f83f 	bl	87c6 <notify_one>
	while (!sys_slist_is_empty(list)) {
    1748:	9a01      	ldr	r2, [sp, #4]
    174a:	e7bf      	b.n	16cc <process_event+0x13c>
		} else if ((mgr->flags & ONOFF_FLAG_RECHECK) != 0) {
    174c:	f013 0120 	ands.w	r1, r3, #32
			mgr->flags &= ~ONOFF_FLAG_RECHECK;
    1750:	bf1e      	ittt	ne
    1752:	f023 0320 	bicne.w	r3, r3, #32
    1756:	8323      	strhne	r3, [r4, #24]
			evt = EVT_RECHECK;
    1758:	2102      	movne	r1, #2
    175a:	e7d0      	b.n	16fe <process_event+0x16e>
    175c:	000087f3 	.word	0x000087f3

00001760 <cbvprintf>:
 * @param ap Variable parameters
 *
 * @return printed byte count if CONFIG_CBPRINTF_LIBC_SUBSTS is set
 */
int cbvprintf(cbprintf_cb out, void *ctx, const char *fmt, va_list ap)
{
    1760:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    1764:	b08f      	sub	sp, #60	; 0x3c
    1766:	461f      	mov	r7, r3
	char *prefix, *data;
	int min_width, precision, data_len;
	char padding_mode, length_mod, special;

	/* we pre-increment in the loop  afterwards */
	fmt--;
    1768:	1e53      	subs	r3, r2, #1
{
    176a:	9000      	str	r0, [sp, #0]
    176c:	468b      	mov	fp, r1
	fmt--;
    176e:	9301      	str	r3, [sp, #4]
	size_t count = 0;
    1770:	f04f 0a00 	mov.w	sl, #0

start:
	while (*++fmt != '%') {
    1774:	9b01      	ldr	r3, [sp, #4]
    1776:	7858      	ldrb	r0, [r3, #1]
    1778:	2825      	cmp	r0, #37	; 0x25
    177a:	f103 0401 	add.w	r4, r3, #1
    177e:	d122      	bne.n	17c6 <cbvprintf+0x66>
	min_width = -1;
	precision = -1;
	prefix = "";
	padding_mode = 0;
	length_mod = 0;
	special = 0;
    1780:	f04f 0c00 	mov.w	ip, #0

	for (fmt++ ; ; fmt++) {
    1784:	4618      	mov	r0, r3
	precision = -1;
    1786:	f04f 36ff 	mov.w	r6, #4294967295
	for (fmt++ ; ; fmt++) {
    178a:	3002      	adds	r0, #2
	length_mod = 0;
    178c:	4661      	mov	r1, ip
	padding_mode = 0;
    178e:	f8cd c008 	str.w	ip, [sp, #8]
	min_width = -1;
    1792:	4634      	mov	r4, r6
				precision = 10 * precision + *fmt - '0';
			} else {
				if (min_width < 0) {
					min_width = 0;
				}
				min_width = 10 * min_width + *fmt - '0';
    1794:	f04f 0e0a 	mov.w	lr, #10
		switch (*fmt) {
    1798:	7802      	ldrb	r2, [r0, #0]
    179a:	9001      	str	r0, [sp, #4]
    179c:	2a39      	cmp	r2, #57	; 0x39
    179e:	f100 0001 	add.w	r0, r0, #1
    17a2:	d857      	bhi.n	1854 <cbvprintf+0xf4>
    17a4:	2a1f      	cmp	r2, #31
    17a6:	d818      	bhi.n	17da <cbvprintf+0x7a>
    17a8:	2a00      	cmp	r2, #0
    17aa:	f000 81fe 	beq.w	1baa <cbvprintf+0x44a>
			precision = 0;
			break;
		}

		default:
			OUTC('%');
    17ae:	9b00      	ldr	r3, [sp, #0]
    17b0:	4659      	mov	r1, fp
    17b2:	2025      	movs	r0, #37	; 0x25
    17b4:	4798      	blx	r3
			OUTC(*fmt);
    17b6:	9b01      	ldr	r3, [sp, #4]
    17b8:	4659      	mov	r1, fp
    17ba:	7818      	ldrb	r0, [r3, #0]
    17bc:	9b00      	ldr	r3, [sp, #0]
    17be:	4798      	blx	r3
    17c0:	f10a 0a02 	add.w	sl, sl, #2
			goto start;
    17c4:	e7d6      	b.n	1774 <cbvprintf+0x14>
		if (*fmt == '\0') {
    17c6:	2800      	cmp	r0, #0
    17c8:	f000 81ef 	beq.w	1baa <cbvprintf+0x44a>
		OUTC(*fmt);
    17cc:	9b00      	ldr	r3, [sp, #0]
    17ce:	4659      	mov	r1, fp
    17d0:	4798      	blx	r3
    17d2:	f10a 0a01 	add.w	sl, sl, #1
	while (*++fmt != '%') {
    17d6:	9401      	str	r4, [sp, #4]
    17d8:	e7cc      	b.n	1774 <cbvprintf+0x14>
    17da:	f1a2 0320 	sub.w	r3, r2, #32
    17de:	2b19      	cmp	r3, #25
    17e0:	d8e5      	bhi.n	17ae <cbvprintf+0x4e>
    17e2:	a501      	add	r5, pc, #4	; (adr r5, 17e8 <cbvprintf+0x88>)
    17e4:	f855 f023 	ldr.w	pc, [r5, r3, lsl #2]
    17e8:	00001851 	.word	0x00001851
    17ec:	000017af 	.word	0x000017af
    17f0:	000017af 	.word	0x000017af
    17f4:	00001851 	.word	0x00001851
    17f8:	000017af 	.word	0x000017af
    17fc:	000018d1 	.word	0x000018d1
    1800:	000017af 	.word	0x000017af
    1804:	000017af 	.word	0x000017af
    1808:	000017af 	.word	0x000017af
    180c:	000017af 	.word	0x000017af
    1810:	00001913 	.word	0x00001913
    1814:	00001851 	.word	0x00001851
    1818:	000017af 	.word	0x000017af
    181c:	00001927 	.word	0x00001927
    1820:	000018df 	.word	0x000018df
    1824:	000017af 	.word	0x000017af
    1828:	000018eb 	.word	0x000018eb
    182c:	00001907 	.word	0x00001907
    1830:	00001907 	.word	0x00001907
    1834:	00001907 	.word	0x00001907
    1838:	00001907 	.word	0x00001907
    183c:	00001907 	.word	0x00001907
    1840:	00001907 	.word	0x00001907
    1844:	00001907 	.word	0x00001907
    1848:	00001907 	.word	0x00001907
    184c:	00001907 	.word	0x00001907
		switch (*fmt) {
    1850:	4694      	mov	ip, r2
    1852:	e7a1      	b.n	1798 <cbvprintf+0x38>
    1854:	2a58      	cmp	r2, #88	; 0x58
    1856:	f000 8140 	beq.w	1ada <cbvprintf+0x37a>
    185a:	f1a2 0363 	sub.w	r3, r2, #99	; 0x63
    185e:	b2dd      	uxtb	r5, r3
    1860:	2d17      	cmp	r5, #23
    1862:	d8a4      	bhi.n	17ae <cbvprintf+0x4e>
    1864:	2b17      	cmp	r3, #23
    1866:	d8a2      	bhi.n	17ae <cbvprintf+0x4e>
    1868:	a501      	add	r5, pc, #4	; (adr r5, 1870 <cbvprintf+0x110>)
    186a:	f855 f023 	ldr.w	pc, [r5, r3, lsl #2]
    186e:	bf00      	nop
    1870:	00001b35 	.word	0x00001b35
    1874:	0000194d 	.word	0x0000194d
    1878:	000017af 	.word	0x000017af
    187c:	000017af 	.word	0x000017af
    1880:	000017af 	.word	0x000017af
    1884:	0000192d 	.word	0x0000192d
    1888:	0000194d 	.word	0x0000194d
    188c:	000017af 	.word	0x000017af
    1890:	000017af 	.word	0x000017af
    1894:	0000192d 	.word	0x0000192d
    1898:	000017af 	.word	0x000017af
    189c:	000017af 	.word	0x000017af
    18a0:	000017af 	.word	0x000017af
    18a4:	00001a85 	.word	0x00001a85
    18a8:	000017af 	.word	0x000017af
    18ac:	000017af 	.word	0x000017af
    18b0:	00001b17 	.word	0x00001b17
    18b4:	000017af 	.word	0x000017af
    18b8:	0000194d 	.word	0x0000194d
    18bc:	000017af 	.word	0x000017af
    18c0:	000017af 	.word	0x000017af
    18c4:	00001a85 	.word	0x00001a85
    18c8:	000017af 	.word	0x000017af
    18cc:	0000192d 	.word	0x0000192d
			OUTC('%');
    18d0:	9b00      	ldr	r3, [sp, #0]
    18d2:	4659      	mov	r1, fp
    18d4:	2025      	movs	r0, #37	; 0x25
    18d6:	4798      	blx	r3
    18d8:	f10a 0a01 	add.w	sl, sl, #1
			goto start;
    18dc:	e74a      	b.n	1774 <cbvprintf+0x14>
			padding_mode &= (char)~PAD_ZERO;
    18de:	9b02      	ldr	r3, [sp, #8]
    18e0:	f003 03fe 	and.w	r3, r3, #254	; 0xfe
    18e4:	9302      	str	r3, [sp, #8]
			precision = 0;
    18e6:	2600      	movs	r6, #0
			continue;
    18e8:	e756      	b.n	1798 <cbvprintf+0x38>
			if (min_width < 0 && precision < 0 && !padding_mode) {
    18ea:	2c00      	cmp	r4, #0
    18ec:	da0b      	bge.n	1906 <cbvprintf+0x1a6>
    18ee:	2e00      	cmp	r6, #0
    18f0:	da0b      	bge.n	190a <cbvprintf+0x1aa>
    18f2:	9b02      	ldr	r3, [sp, #8]
    18f4:	2b00      	cmp	r3, #0
    18f6:	f000 8154 	beq.w	1ba2 <cbvprintf+0x442>
				min_width = 10 * min_width + *fmt - '0';
    18fa:	ea24 74e4 	bic.w	r4, r4, r4, asr #31
    18fe:	fb0e 2404 	mla	r4, lr, r4, r2
    1902:	3c30      	subs	r4, #48	; 0x30
    1904:	e748      	b.n	1798 <cbvprintf+0x38>
			if (precision >= 0) {
    1906:	2e00      	cmp	r6, #0
    1908:	dbf7      	blt.n	18fa <cbvprintf+0x19a>
				precision = 10 * precision + *fmt - '0';
    190a:	fb0e 2606 	mla	r6, lr, r6, r2
    190e:	3e30      	subs	r6, #48	; 0x30
    1910:	e742      	b.n	1798 <cbvprintf+0x38>
			if (precision >= 0) {
    1912:	2e00      	cmp	r6, #0
    1914:	f857 3b04 	ldr.w	r3, [r7], #4
    1918:	db01      	blt.n	191e <cbvprintf+0x1be>
				precision = va_arg(ap, int);
    191a:	461e      	mov	r6, r3
    191c:	e73c      	b.n	1798 <cbvprintf+0x38>
				if (min_width < 0) {
    191e:	1e1c      	subs	r4, r3, #0
    1920:	f6bf af3a 	bge.w	1798 <cbvprintf+0x38>
					min_width = -min_width;
    1924:	4264      	negs	r4, r4
		switch (*fmt) {
    1926:	2302      	movs	r3, #2
				padding_mode = PAD_ZERO;
    1928:	9302      	str	r3, [sp, #8]
    192a:	e735      	b.n	1798 <cbvprintf+0x38>
			if (*fmt == 'h' && length_mod == 'h') {
    192c:	2a68      	cmp	r2, #104	; 0x68
    192e:	d103      	bne.n	1938 <cbvprintf+0x1d8>
    1930:	2968      	cmp	r1, #104	; 0x68
    1932:	d106      	bne.n	1942 <cbvprintf+0x1e2>
				length_mod = 'H';
    1934:	2148      	movs	r1, #72	; 0x48
    1936:	e72f      	b.n	1798 <cbvprintf+0x38>
			} else if (*fmt == 'l' && length_mod == 'l') {
    1938:	2a6c      	cmp	r2, #108	; 0x6c
    193a:	d102      	bne.n	1942 <cbvprintf+0x1e2>
    193c:	296c      	cmp	r1, #108	; 0x6c
    193e:	f000 8132 	beq.w	1ba6 <cbvprintf+0x446>
			} else if (length_mod == '\0') {
    1942:	2900      	cmp	r1, #0
    1944:	f47f af33 	bne.w	17ae <cbvprintf+0x4e>
    1948:	4611      	mov	r1, r2
		switch (*fmt) {
    194a:	e725      	b.n	1798 <cbvprintf+0x38>
			if (length_mod == 'z') {
    194c:	297a      	cmp	r1, #122	; 0x7a
    194e:	d10f      	bne.n	1970 <cbvprintf+0x210>
				d = va_arg(ap, unsigned int);
    1950:	683b      	ldr	r3, [r7, #0]
			} else if (*fmt == 'u') {
    1952:	2a75      	cmp	r2, #117	; 0x75
    1954:	f107 0504 	add.w	r5, r7, #4
				d = va_arg(ap, unsigned int);
    1958:	4698      	mov	r8, r3
			} else if (*fmt == 'u') {
    195a:	f040 8088 	bne.w	1a6e <cbvprintf+0x30e>
				d = va_arg(ap, unsigned int);
    195e:	f04f 0900 	mov.w	r9, #0
			} else if (special == ' ') {
    1962:	f1bc 0f20 	cmp.w	ip, #32
    1966:	f040 8085 	bne.w	1a74 <cbvprintf+0x314>
				prefix = " ";
    196a:	4f92      	ldr	r7, [pc, #584]	; (1bb4 <cbvprintf+0x454>)
				min_width--;
    196c:	3c01      	subs	r4, #1
    196e:	e015      	b.n	199c <cbvprintf+0x23c>
			} else if (length_mod == 'l') {
    1970:	296c      	cmp	r1, #108	; 0x6c
    1972:	d0ed      	beq.n	1950 <cbvprintf+0x1f0>
			} else if (length_mod == 'L') {
    1974:	294c      	cmp	r1, #76	; 0x4c
    1976:	d1eb      	bne.n	1950 <cbvprintf+0x1f0>
				if (*fmt == 'u') {
    1978:	1dfd      	adds	r5, r7, #7
    197a:	f025 0507 	bic.w	r5, r5, #7
    197e:	2a75      	cmp	r2, #117	; 0x75
    1980:	e8f5 8902 	ldrd	r8, r9, [r5], #8
    1984:	d0ed      	beq.n	1962 <cbvprintf+0x202>
			if (*fmt != 'u' && (int_value_type)d < 0) {
    1986:	f1b8 0f00 	cmp.w	r8, #0
    198a:	f179 0300 	sbcs.w	r3, r9, #0
    198e:	dae8      	bge.n	1962 <cbvprintf+0x202>
				d = -d;
    1990:	f1d8 0800 	rsbs	r8, r8, #0
				prefix = "-";
    1994:	4f88      	ldr	r7, [pc, #544]	; (1bb8 <cbvprintf+0x458>)
				d = -d;
    1996:	eb69 0949 	sbc.w	r9, r9, r9, lsl #1
				min_width--;
    199a:	3c01      	subs	r4, #1
	int i = 0;
    199c:	ab0d      	add	r3, sp, #52	; 0x34
    199e:	9305      	str	r3, [sp, #20]
    19a0:	2300      	movs	r3, #0
    19a2:	9303      	str	r3, [sp, #12]
		buftop[--i] = c + '0';
    19a4:	9b03      	ldr	r3, [sp, #12]
    19a6:	9304      	str	r3, [sp, #16]
    19a8:	3b01      	subs	r3, #1
    19aa:	9303      	str	r3, [sp, #12]
		unsigned int c = num % base;
    19ac:	4640      	mov	r0, r8
    19ae:	4649      	mov	r1, r9
    19b0:	220a      	movs	r2, #10
    19b2:	2300      	movs	r3, #0
    19b4:	f7fe fba4 	bl	100 <__aeabi_uldivmod>
		buftop[--i] = c + '0';
    19b8:	9b05      	ldr	r3, [sp, #20]
    19ba:	3230      	adds	r2, #48	; 0x30
    19bc:	f803 2901 	strb.w	r2, [r3], #-1
		num /= base;
    19c0:	4640      	mov	r0, r8
		buftop[--i] = c + '0';
    19c2:	9305      	str	r3, [sp, #20]
		num /= base;
    19c4:	220a      	movs	r2, #10
    19c6:	2300      	movs	r3, #0
    19c8:	4649      	mov	r1, r9
    19ca:	e9cd 8906 	strd	r8, r9, [sp, #24]
    19ce:	f7fe fb97 	bl	100 <__aeabi_uldivmod>
	} while (num);
    19d2:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
    19d6:	2b00      	cmp	r3, #0
    19d8:	bf08      	it	eq
    19da:	2a0a      	cmpeq	r2, #10
		num /= base;
    19dc:	4680      	mov	r8, r0
    19de:	4689      	mov	r9, r1
	} while (num);
    19e0:	d2e0      	bcs.n	19a4 <cbvprintf+0x244>
	return -i;
    19e2:	9b04      	ldr	r3, [sp, #16]
			data = buf + sizeof(buf) - data_len;
    19e4:	aa0e      	add	r2, sp, #56	; 0x38
	return -i;
    19e6:	f1c3 0901 	rsb	r9, r3, #1
			data = buf + sizeof(buf) - data_len;
    19ea:	eb02 0803 	add.w	r8, r2, r3
		}

		if (precision < 0 && (padding_mode & PAD_ZERO)) {
    19ee:	2e00      	cmp	r6, #0
			data = buf + sizeof(buf) - data_len;
    19f0:	f1a8 0804 	sub.w	r8, r8, #4
		if (precision < 0 && (padding_mode & PAD_ZERO)) {
    19f4:	da04      	bge.n	1a00 <cbvprintf+0x2a0>
    19f6:	9b02      	ldr	r3, [sp, #8]
    19f8:	f013 0f01 	tst.w	r3, #1
    19fc:	bf18      	it	ne
    19fe:	4626      	movne	r6, r4
			precision = min_width;
		}
		min_width -= data_len;
		precision -= data_len;
    1a00:	eba6 0309 	sub.w	r3, r6, r9
		if (precision > 0) {
    1a04:	2b00      	cmp	r3, #0
		precision -= data_len;
    1a06:	9303      	str	r3, [sp, #12]
			min_width -= precision;
		}

		if (!(padding_mode & PAD_TAIL)) {
    1a08:	9b02      	ldr	r3, [sp, #8]
		min_width -= data_len;
    1a0a:	bfd4      	ite	le
    1a0c:	eba4 0409 	suble.w	r4, r4, r9
			min_width -= precision;
    1a10:	1ba4      	subgt	r4, r4, r6
		if (!(padding_mode & PAD_TAIL)) {
    1a12:	079a      	lsls	r2, r3, #30
    1a14:	f140 80af 	bpl.w	1b76 <cbvprintf+0x416>
    1a18:	ebaa 0607 	sub.w	r6, sl, r7
    1a1c:	eb06 0a07 	add.w	sl, r6, r7
			while (--min_width >= 0) {
				OUTC(' ');
			}
		}
		while (*prefix) {
    1a20:	f817 0b01 	ldrb.w	r0, [r7], #1
    1a24:	2800      	cmp	r0, #0
    1a26:	f040 80a8 	bne.w	1b7a <cbvprintf+0x41a>
		precision -= data_len;
    1a2a:	9e03      	ldr	r6, [sp, #12]
			OUTC(*prefix++);
		}
		while (--precision >= 0) {
    1a2c:	3e01      	subs	r6, #1
    1a2e:	f140 80a8 	bpl.w	1b82 <cbvprintf+0x422>
    1a32:	9b03      	ldr	r3, [sp, #12]
    1a34:	1e5a      	subs	r2, r3, #1
    1a36:	3201      	adds	r2, #1
    1a38:	bfac      	ite	ge
    1a3a:	461f      	movge	r7, r3
    1a3c:	2700      	movlt	r7, #0
    1a3e:	464e      	mov	r6, r9
			OUTC('0');
		}
		while (--data_len >= 0) {
    1a40:	3e01      	subs	r6, #1
    1a42:	f140 80a3 	bpl.w	1b8c <cbvprintf+0x42c>
    1a46:	f109 32ff 	add.w	r2, r9, #4294967295
    1a4a:	3201      	adds	r2, #1
    1a4c:	bfac      	ite	ge
    1a4e:	464b      	movge	r3, r9
    1a50:	2300      	movlt	r3, #0
    1a52:	eb03 0907 	add.w	r9, r3, r7
    1a56:	4626      	mov	r6, r4
			OUTC(*data++);
		}
		while (--min_width >= 0) {
    1a58:	3e01      	subs	r6, #1
    1a5a:	f140 809d 	bpl.w	1b98 <cbvprintf+0x438>
    1a5e:	1e63      	subs	r3, r4, #1
    1a60:	3301      	adds	r3, #1
    1a62:	bfb8      	it	lt
    1a64:	2400      	movlt	r4, #0
    1a66:	44a1      	add	r9, r4
    1a68:	44ca      	add	sl, r9
    1a6a:	462f      	mov	r7, r5
    1a6c:	e682      	b.n	1774 <cbvprintf+0x14>
				d = va_arg(ap, int);
    1a6e:	ea4f 79e3 	mov.w	r9, r3, asr #31
    1a72:	e788      	b.n	1986 <cbvprintf+0x226>
			} else if (special == '+') {
    1a74:	f1bc 0f2b 	cmp.w	ip, #43	; 0x2b
				prefix = "+";
    1a78:	bf0a      	itet	eq
    1a7a:	4f50      	ldreq	r7, [pc, #320]	; (1bbc <cbvprintf+0x45c>)
	prefix = "";
    1a7c:	4f50      	ldrne	r7, [pc, #320]	; (1bc0 <cbvprintf+0x460>)
				min_width--;
    1a7e:	f104 34ff 	addeq.w	r4, r4, #4294967295
    1a82:	e78b      	b.n	199c <cbvprintf+0x23c>
			if (*fmt == 'p') {
    1a84:	2a70      	cmp	r2, #112	; 0x70
    1a86:	d128      	bne.n	1ada <cbvprintf+0x37a>
				x = (uintptr_t)va_arg(ap, void *);
    1a88:	463d      	mov	r5, r7
    1a8a:	f855 0b04 	ldr.w	r0, [r5], #4
				if (x == (uint_value_type)0) {
    1a8e:	2800      	cmp	r0, #0
    1a90:	d05a      	beq.n	1b48 <cbvprintf+0x3e8>
				prefix = (*fmt & 0x20) ? "0x" : "0X";
    1a92:	4f4c      	ldr	r7, [pc, #304]	; (1bc4 <cbvprintf+0x464>)
				x = (uintptr_t)va_arg(ap, void *);
    1a94:	2100      	movs	r1, #0
				min_width -= 2;
    1a96:	3c02      	subs	r4, #2
			data_len = convert_value(x, 16, ALPHA(*fmt),
    1a98:	f002 0260 	and.w	r2, r2, #96	; 0x60
    1a9c:	f1a2 0939 	sub.w	r9, r2, #57	; 0x39
	int i = 0;
    1aa0:	f10d 0e34 	add.w	lr, sp, #52	; 0x34
    1aa4:	f04f 0800 	mov.w	r8, #0
		unsigned int c = num % base;
    1aa8:	f000 030f 	and.w	r3, r0, #15
		if (c >= 10) {
    1aac:	2b09      	cmp	r3, #9
			c += alpha;
    1aae:	bf88      	it	hi
    1ab0:	444b      	addhi	r3, r9
		buftop[--i] = c + '0';
    1ab2:	3330      	adds	r3, #48	; 0x30
	} while (num);
    1ab4:	2900      	cmp	r1, #0
		buftop[--i] = c + '0';
    1ab6:	f80e 3901 	strb.w	r3, [lr], #-1
	} while (num);
    1aba:	bf08      	it	eq
    1abc:	2810      	cmpeq	r0, #16
		num /= base;
    1abe:	ea4f 1310 	mov.w	r3, r0, lsr #4
		buftop[--i] = c + '0';
    1ac2:	f108 3cff 	add.w	ip, r8, #4294967295
		num /= base;
    1ac6:	ea43 7301 	orr.w	r3, r3, r1, lsl #28
    1aca:	ea4f 1211 	mov.w	r2, r1, lsr #4
	} while (num);
    1ace:	d21e      	bcs.n	1b0e <cbvprintf+0x3ae>
			data = buf + sizeof(buf) - data_len;
    1ad0:	ab0e      	add	r3, sp, #56	; 0x38
	return -i;
    1ad2:	f1c8 0901 	rsb	r9, r8, #1
			data = buf + sizeof(buf) - data_len;
    1ad6:	4498      	add	r8, r3
    1ad8:	e789      	b.n	19ee <cbvprintf+0x28e>
			} else if (length_mod == 'l') {
    1ada:	296c      	cmp	r1, #108	; 0x6c
    1adc:	d104      	bne.n	1ae8 <cbvprintf+0x388>
				x = va_arg(ap, unsigned int);
    1ade:	463d      	mov	r5, r7
    1ae0:	2100      	movs	r1, #0
    1ae2:	f855 0b04 	ldr.w	r0, [r5], #4
    1ae6:	e006      	b.n	1af6 <cbvprintf+0x396>
			} else if (length_mod == 'L') {
    1ae8:	294c      	cmp	r1, #76	; 0x4c
    1aea:	d1f8      	bne.n	1ade <cbvprintf+0x37e>
				unsigned long long llx =
    1aec:	1dfd      	adds	r5, r7, #7
    1aee:	f025 0507 	bic.w	r5, r5, #7
    1af2:	e8f5 0102 	ldrd	r0, r1, [r5], #8
			if (special == '#') {
    1af6:	f1bc 0f23 	cmp.w	ip, #35	; 0x23
    1afa:	d106      	bne.n	1b0a <cbvprintf+0x3aa>
				prefix = (*fmt & 0x20) ? "0x" : "0X";
    1afc:	4b31      	ldr	r3, [pc, #196]	; (1bc4 <cbvprintf+0x464>)
    1afe:	4f32      	ldr	r7, [pc, #200]	; (1bc8 <cbvprintf+0x468>)
    1b00:	f012 0f20 	tst.w	r2, #32
    1b04:	bf18      	it	ne
    1b06:	461f      	movne	r7, r3
    1b08:	e7c5      	b.n	1a96 <cbvprintf+0x336>
	prefix = "";
    1b0a:	4f2d      	ldr	r7, [pc, #180]	; (1bc0 <cbvprintf+0x460>)
    1b0c:	e7c4      	b.n	1a98 <cbvprintf+0x338>
		buftop[--i] = c + '0';
    1b0e:	46e0      	mov	r8, ip
		num /= base;
    1b10:	4618      	mov	r0, r3
    1b12:	4611      	mov	r1, r2
    1b14:	e7c8      	b.n	1aa8 <cbvprintf+0x348>
			data = va_arg(ap, char *);
    1b16:	463d      	mov	r5, r7
    1b18:	f855 8b04 	ldr.w	r8, [r5], #4
			data_len = strlen(data);
    1b1c:	4640      	mov	r0, r8
    1b1e:	f007 fb01 	bl	9124 <strlen>
			if (precision >= 0 && data_len > precision) {
    1b22:	2e00      	cmp	r6, #0
			data_len = strlen(data);
    1b24:	4681      	mov	r9, r0
			if (precision >= 0 && data_len > precision) {
    1b26:	db02      	blt.n	1b2e <cbvprintf+0x3ce>
    1b28:	42b0      	cmp	r0, r6
    1b2a:	bfa8      	it	ge
    1b2c:	46b1      	movge	r9, r6
    1b2e:	4f24      	ldr	r7, [pc, #144]	; (1bc0 <cbvprintf+0x460>)
    1b30:	2600      	movs	r6, #0
    1b32:	e765      	b.n	1a00 <cbvprintf+0x2a0>
			int c = va_arg(ap, int);
    1b34:	463d      	mov	r5, r7
			data_len = 1;
    1b36:	f04f 0901 	mov.w	r9, #1
			buf[0] = c;
    1b3a:	f855 3b04 	ldr.w	r3, [r5], #4
    1b3e:	f88d 3020 	strb.w	r3, [sp, #32]
			data = buf;
    1b42:	f10d 0820 	add.w	r8, sp, #32
    1b46:	e7f2      	b.n	1b2e <cbvprintf+0x3ce>
					data = "(nil)";
    1b48:	f8df 8080 	ldr.w	r8, [pc, #128]	; 1bcc <cbvprintf+0x46c>
					data_len = 5;
    1b4c:	f04f 0905 	mov.w	r9, #5
    1b50:	e7ed      	b.n	1b2e <cbvprintf+0x3ce>
				OUTC(' ');
    1b52:	9b00      	ldr	r3, [sp, #0]
    1b54:	4659      	mov	r1, fp
    1b56:	2020      	movs	r0, #32
    1b58:	4798      	blx	r3
			while (--min_width >= 0) {
    1b5a:	3e01      	subs	r6, #1
    1b5c:	d5f9      	bpl.n	1b52 <cbvprintf+0x3f2>
    1b5e:	1e62      	subs	r2, r4, #1
    1b60:	1c53      	adds	r3, r2, #1
    1b62:	bfac      	ite	ge
    1b64:	4621      	movge	r1, r4
    1b66:	2100      	movlt	r1, #0
    1b68:	f1c4 0400 	rsb	r4, r4, #0
    1b6c:	bfb8      	it	lt
    1b6e:	2400      	movlt	r4, #0
    1b70:	448a      	add	sl, r1
    1b72:	4414      	add	r4, r2
    1b74:	e750      	b.n	1a18 <cbvprintf+0x2b8>
    1b76:	4626      	mov	r6, r4
    1b78:	e7ef      	b.n	1b5a <cbvprintf+0x3fa>
			OUTC(*prefix++);
    1b7a:	9b00      	ldr	r3, [sp, #0]
    1b7c:	4659      	mov	r1, fp
    1b7e:	4798      	blx	r3
    1b80:	e74c      	b.n	1a1c <cbvprintf+0x2bc>
			OUTC('0');
    1b82:	9b00      	ldr	r3, [sp, #0]
    1b84:	4659      	mov	r1, fp
    1b86:	2030      	movs	r0, #48	; 0x30
    1b88:	4798      	blx	r3
    1b8a:	e74f      	b.n	1a2c <cbvprintf+0x2cc>
			OUTC(*data++);
    1b8c:	f818 0b01 	ldrb.w	r0, [r8], #1
    1b90:	9b00      	ldr	r3, [sp, #0]
    1b92:	4659      	mov	r1, fp
    1b94:	4798      	blx	r3
    1b96:	e753      	b.n	1a40 <cbvprintf+0x2e0>
			OUTC(' ');
    1b98:	9b00      	ldr	r3, [sp, #0]
    1b9a:	4659      	mov	r1, fp
    1b9c:	2020      	movs	r0, #32
    1b9e:	4798      	blx	r3
    1ba0:	e75a      	b.n	1a58 <cbvprintf+0x2f8>
				padding_mode = PAD_ZERO;
    1ba2:	2301      	movs	r3, #1
    1ba4:	e6c0      	b.n	1928 <cbvprintf+0x1c8>
				length_mod = 'L';
    1ba6:	214c      	movs	r1, #76	; 0x4c
    1ba8:	e5f6      	b.n	1798 <cbvprintf+0x38>
		}

		goto start;
	}
}
    1baa:	4650      	mov	r0, sl
    1bac:	b00f      	add	sp, #60	; 0x3c
    1bae:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    1bb2:	bf00      	nop
    1bb4:	0000a69d 	.word	0x0000a69d
    1bb8:	0000a602 	.word	0x0000a602
    1bbc:	0000a604 	.word	0x0000a604
    1bc0:	0000a694 	.word	0x0000a694
    1bc4:	0000a606 	.word	0x0000a606
    1bc8:	0000a609 	.word	0x0000a609
    1bcc:	0000a60c 	.word	0x0000a60c

00001bd0 <sys_reboot>:
#include <sys/printk.h>

extern void sys_arch_reboot(int type);

FUNC_NORETURN void sys_reboot(int type)
{
    1bd0:	b508      	push	{r3, lr}
    1bd2:	f04f 0220 	mov.w	r2, #32
    1bd6:	f3ef 8311 	mrs	r3, BASEPRI
    1bda:	f382 8812 	msr	BASEPRI_MAX, r2
    1bde:	f3bf 8f6f 	isb	sy
	(void)irq_lock();
	sys_clock_disable();

	sys_arch_reboot(type);
    1be2:	f001 fcbf 	bl	3564 <sys_arch_reboot>

	/* should never get here */
	printk("Failed to reboot: spinning endlessly...\n");
    1be6:	4803      	ldr	r0, [pc, #12]	; (1bf4 <sys_reboot+0x24>)
    1be8:	f006 fdb7 	bl	875a <printk>
 *
 * @return N/A
 */
static inline void k_cpu_idle(void)
{
	arch_cpu_idle();
    1bec:	f000 fe9c 	bl	2928 <arch_cpu_idle>
    1bf0:	e7fc      	b.n	1bec <sys_reboot+0x1c>
    1bf2:	bf00      	nop
    1bf4:	0000a612 	.word	0x0000a612

00001bf8 <log_core_init>:
void log_core_init(void)
{
	uint32_t freq;
	log_timestamp_get_t _timestamp_func;

	panic_mode = false;
    1bf8:	4a0c      	ldr	r2, [pc, #48]	; (1c2c <log_core_init+0x34>)
    1bfa:	2300      	movs	r3, #0
{
    1bfc:	b510      	push	{r4, lr}
	panic_mode = false;
    1bfe:	7013      	strb	r3, [r2, #0]
	dropped_cnt = 0;
    1c00:	4a0b      	ldr	r2, [pc, #44]	; (1c30 <log_core_init+0x38>)
    1c02:	6013      	str	r3, [r2, #0]
{
	if (timestamp_getter == NULL) {
		return -EINVAL;
	}

	timestamp_func = timestamp_getter;
    1c04:	4b0b      	ldr	r3, [pc, #44]	; (1c34 <log_core_init+0x3c>)
    1c06:	4a0c      	ldr	r2, [pc, #48]	; (1c38 <log_core_init+0x40>)
    1c08:	601a      	str	r2, [r3, #0]
	log_output_timestamp_freq_set(freq);
    1c0a:	f44f 4000 	mov.w	r0, #32768	; 0x8000
    1c0e:	f000 fc8d 	bl	252c <log_output_timestamp_freq_set>
		log_msg_pool_init();
    1c12:	f000 fa2f 	bl	2074 <log_msg_pool_init>
		log_list_init(&list);
    1c16:	4809      	ldr	r0, [pc, #36]	; (1c3c <log_core_init+0x44>)
    1c18:	f006 fe70 	bl	88fc <log_list_init>
}
    1c1c:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
		k_mem_slab_init(&log_strdup_pool, log_strdup_pool_buf,
    1c20:	4907      	ldr	r1, [pc, #28]	; (1c40 <log_core_init+0x48>)
    1c22:	4808      	ldr	r0, [pc, #32]	; (1c44 <log_core_init+0x4c>)
    1c24:	2304      	movs	r3, #4
    1c26:	2228      	movs	r2, #40	; 0x28
    1c28:	f007 bda4 	b.w	9774 <k_mem_slab_init>
    1c2c:	2000194f 	.word	0x2000194f
    1c30:	200010f8 	.word	0x200010f8
    1c34:	2000000c 	.word	0x2000000c
    1c38:	0000893b 	.word	0x0000893b
    1c3c:	20001100 	.word	0x20001100
    1c40:	20005580 	.word	0x20005580
    1c44:	20001108 	.word	0x20001108

00001c48 <log_init>:
{
    1c48:	b570      	push	{r4, r5, r6, lr}
 *
 * @return Previous value of @a target.
 */
static inline atomic_val_t atomic_add(atomic_t *target, atomic_val_t value)
{
	return __atomic_fetch_add(target, value, __ATOMIC_SEQ_CST);
    1c4a:	4b12      	ldr	r3, [pc, #72]	; (1c94 <log_init+0x4c>)
    1c4c:	f3bf 8f5b 	dmb	ish
    1c50:	e853 5f00 	ldrex	r5, [r3]
    1c54:	1c6a      	adds	r2, r5, #1
    1c56:	e843 2100 	strex	r1, r2, [r3]
    1c5a:	2900      	cmp	r1, #0
    1c5c:	d1f8      	bne.n	1c50 <log_init+0x8>
    1c5e:	f3bf 8f5b 	dmb	ish
	if (atomic_inc(&initialized) != 0) {
    1c62:	b92d      	cbnz	r5, 1c70 <log_init+0x28>
 *
 * @return Number of backends.
 */
static inline int log_backend_count_get(void)
{
	return __log_backends_end - __log_backends_start;
    1c64:	4c0c      	ldr	r4, [pc, #48]	; (1c98 <log_init+0x50>)
    1c66:	4e0d      	ldr	r6, [pc, #52]	; (1c9c <log_init+0x54>)
    1c68:	1b36      	subs	r6, r6, r4
    1c6a:	1136      	asrs	r6, r6, #4
	for (i = 0; i < log_backend_count_get(); i++) {
    1c6c:	42b5      	cmp	r5, r6
    1c6e:	db00      	blt.n	1c72 <log_init+0x2a>
}
    1c70:	bd70      	pop	{r4, r5, r6, pc}
		if (backend->autostart) {
    1c72:	7b23      	ldrb	r3, [r4, #12]
    1c74:	b153      	cbz	r3, 1c8c <log_init+0x44>
			if (backend->api->init != NULL) {
    1c76:	6823      	ldr	r3, [r4, #0]
    1c78:	699b      	ldr	r3, [r3, #24]
    1c7a:	b10b      	cbz	r3, 1c80 <log_init+0x38>
				backend->api->init(backend);
    1c7c:	4620      	mov	r0, r4
    1c7e:	4798      	blx	r3
			log_backend_enable(backend,
    1c80:	6863      	ldr	r3, [r4, #4]
    1c82:	2204      	movs	r2, #4
    1c84:	6819      	ldr	r1, [r3, #0]
    1c86:	4620      	mov	r0, r4
    1c88:	f000 f9e6 	bl	2058 <log_backend_enable>
	for (i = 0; i < log_backend_count_get(); i++) {
    1c8c:	3501      	adds	r5, #1
    1c8e:	3410      	adds	r4, #16
    1c90:	e7ec      	b.n	1c6c <log_init+0x24>
    1c92:	bf00      	nop
    1c94:	200010fc 	.word	0x200010fc
    1c98:	00009dc0 	.word	0x00009dc0
    1c9c:	00009de0 	.word	0x00009de0

00001ca0 <get_msg>:
		}
	}
}

union log_msgs get_msg(void)
{
    1ca0:	b510      	push	{r4, lr}
    1ca2:	f04f 0320 	mov.w	r3, #32
    1ca6:	f3ef 8411 	mrs	r4, BASEPRI
    1caa:	f383 8812 	msr	BASEPRI_MAX, r3
    1cae:	f3bf 8f6f 	isb	sy
		return msg;
	}

	int key = irq_lock();

	msg.msg = log_list_head_get(&list);
    1cb2:	4804      	ldr	r0, [pc, #16]	; (1cc4 <get_msg+0x24>)
    1cb4:	f006 fe32 	bl	891c <log_list_head_get>
	__asm__ volatile(
    1cb8:	f384 8811 	msr	BASEPRI, r4
    1cbc:	f3bf 8f6f 	isb	sy
	irq_unlock(key);

	return msg;
}
    1cc0:	bd10      	pop	{r4, pc}
    1cc2:	bf00      	nop
    1cc4:	20001100 	.word	0x20001100

00001cc8 <z_log_notify_backend_enabled>:
	 */
	if (IS_ENABLED(CONFIG_LOG_PROCESS_THREAD) && !backend_attached) {
		k_sem_give(&log_process_thread_sem);
	}

	backend_attached = true;
    1cc8:	4b01      	ldr	r3, [pc, #4]	; (1cd0 <z_log_notify_backend_enabled+0x8>)
    1cca:	2201      	movs	r2, #1
    1ccc:	701a      	strb	r2, [r3, #0]
}
    1cce:	4770      	bx	lr
    1cd0:	2000194e 	.word	0x2000194e

00001cd4 <z_log_dropped>:
    1cd4:	4b0c      	ldr	r3, [pc, #48]	; (1d08 <z_log_dropped+0x34>)
    1cd6:	f3bf 8f5b 	dmb	ish
    1cda:	e853 2f00 	ldrex	r2, [r3]
    1cde:	3201      	adds	r2, #1
    1ce0:	e843 2100 	strex	r1, r2, [r3]
    1ce4:	2900      	cmp	r1, #0
    1ce6:	d1f8      	bne.n	1cda <z_log_dropped+0x6>
    1ce8:	f3bf 8f5b 	dmb	ish
 *
 * @return Previous value of @a target.
 */
static inline atomic_val_t atomic_sub(atomic_t *target, atomic_val_t value)
{
	return __atomic_fetch_sub(target, value, __ATOMIC_SEQ_CST);
    1cec:	f3bf 8f5b 	dmb	ish
    1cf0:	4b06      	ldr	r3, [pc, #24]	; (1d0c <z_log_dropped+0x38>)
    1cf2:	e853 2f00 	ldrex	r2, [r3]
    1cf6:	3a01      	subs	r2, #1
    1cf8:	e843 2100 	strex	r1, r2, [r3]
    1cfc:	2900      	cmp	r1, #0
    1cfe:	d1f8      	bne.n	1cf2 <z_log_dropped+0x1e>
    1d00:	f3bf 8f5b 	dmb	ish

void z_log_dropped(void)
{
	atomic_inc(&dropped_cnt);
	atomic_dec(&buffered_cnt);
}
    1d04:	4770      	bx	lr
    1d06:	bf00      	nop
    1d08:	200010f8 	.word	0x200010f8
    1d0c:	200010f4 	.word	0x200010f4

00001d10 <z_log_dropped_read_and_clear>:

uint32_t z_log_dropped_read_and_clear(void)
{
	return atomic_set(&dropped_cnt, 0);
}
    1d10:	2000      	movs	r0, #0
{
	/* This builtin, as described by Intel, is not a traditional
	 * test-and-set operation, but rather an atomic exchange operation. It
	 * writes value into *ptr, and returns the previous contents of *ptr.
	 */
	return __atomic_exchange_n(target, value, __ATOMIC_SEQ_CST);
    1d12:	4b06      	ldr	r3, [pc, #24]	; (1d2c <z_log_dropped_read_and_clear+0x1c>)
    1d14:	f3bf 8f5b 	dmb	ish
    1d18:	4602      	mov	r2, r0
    1d1a:	e853 0f00 	ldrex	r0, [r3]
    1d1e:	e843 2100 	strex	r1, r2, [r3]
    1d22:	2900      	cmp	r1, #0
    1d24:	d1f9      	bne.n	1d1a <z_log_dropped_read_and_clear+0xa>
    1d26:	f3bf 8f5b 	dmb	ish
    1d2a:	4770      	bx	lr
    1d2c:	200010f8 	.word	0x200010f8

00001d30 <dropped_notify>:
{
    1d30:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
	uint32_t dropped = z_log_dropped_read_and_clear();
    1d32:	f7ff ffed 	bl	1d10 <z_log_dropped_read_and_clear>
    1d36:	4c0a      	ldr	r4, [pc, #40]	; (1d60 <dropped_notify+0x30>)
    1d38:	4d0a      	ldr	r5, [pc, #40]	; (1d64 <dropped_notify+0x34>)
    1d3a:	1b2d      	subs	r5, r5, r4
    1d3c:	4607      	mov	r7, r0
    1d3e:	112d      	asrs	r5, r5, #4
	for (int i = 0; i < log_backend_count_get(); i++) {
    1d40:	2600      	movs	r6, #0
    1d42:	42ae      	cmp	r6, r5
    1d44:	db00      	blt.n	1d48 <dropped_notify+0x18>
}
    1d46:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 */
static inline bool log_backend_is_active(
				const struct log_backend *const backend)
{
	__ASSERT_NO_MSG(backend != NULL);
	return backend->cb->active;
    1d48:	6863      	ldr	r3, [r4, #4]
		if (log_backend_is_active(backend)) {
    1d4a:	795b      	ldrb	r3, [r3, #5]
    1d4c:	b12b      	cbz	r3, 1d5a <dropped_notify+0x2a>
	if (backend->api->dropped != NULL) {
    1d4e:	6823      	ldr	r3, [r4, #0]
    1d50:	691b      	ldr	r3, [r3, #16]
    1d52:	b113      	cbz	r3, 1d5a <dropped_notify+0x2a>
		backend->api->dropped(backend, cnt);
    1d54:	4639      	mov	r1, r7
    1d56:	4620      	mov	r0, r4
    1d58:	4798      	blx	r3
	for (int i = 0; i < log_backend_count_get(); i++) {
    1d5a:	3601      	adds	r6, #1
    1d5c:	3410      	adds	r4, #16
    1d5e:	e7f0      	b.n	1d42 <dropped_notify+0x12>
    1d60:	00009dc0 	.word	0x00009dc0
    1d64:	00009de0 	.word	0x00009de0

00001d68 <z_log_strdup>:
	return (((const char *)addr >= (const char *)RO_START) &&
    1d68:	4b16      	ldr	r3, [pc, #88]	; (1dc4 <z_log_strdup+0x5c>)
    1d6a:	4298      	cmp	r0, r3
	z_log_dropped();
}


char *z_log_strdup(const char *str)
{
    1d6c:	b537      	push	{r0, r1, r2, r4, r5, lr}
    1d6e:	4604      	mov	r4, r0
	return (((const char *)addr >= (const char *)RO_START) &&
    1d70:	d302      	bcc.n	1d78 <z_log_strdup+0x10>
	struct log_strdup_buf *dup;
	int err;

	if (IS_ENABLED(CONFIG_LOG_IMMEDIATE) ||
    1d72:	4b15      	ldr	r3, [pc, #84]	; (1dc8 <z_log_strdup+0x60>)
    1d74:	4298      	cmp	r0, r3
    1d76:	d320      	bcc.n	1dba <z_log_strdup+0x52>
	    is_rodata(str) || k_is_user_context()) {
		return (char *)str;
	}

	err = k_mem_slab_alloc(&log_strdup_pool, (void **)&dup, K_NO_WAIT);
    1d78:	4814      	ldr	r0, [pc, #80]	; (1dcc <z_log_strdup+0x64>)
    1d7a:	2200      	movs	r2, #0
    1d7c:	2300      	movs	r3, #0
    1d7e:	a901      	add	r1, sp, #4
    1d80:	f003 fdd0 	bl	5924 <k_mem_slab_alloc>
	if (err != 0) {
    1d84:	4605      	mov	r5, r0
    1d86:	b9d8      	cbnz	r0, 1dc0 <z_log_strdup+0x58>
    1d88:	2201      	movs	r2, #1
    1d8a:	9b01      	ldr	r3, [sp, #4]
    1d8c:	f3bf 8f5b 	dmb	ish
    1d90:	e853 1f00 	ldrex	r1, [r3]
    1d94:	e843 2000 	strex	r0, r2, [r3]
    1d98:	2800      	cmp	r0, #0
    1d9a:	d1f9      	bne.n	1d90 <z_log_strdup+0x28>
    1d9c:	f3bf 8f5b 	dmb	ish
	}

	/* Set 'allocated' flag. */
	(void)atomic_set(&dup->refcount, 1);

	strncpy(dup->buf, str, sizeof(dup->buf) - 2);
    1da0:	9801      	ldr	r0, [sp, #4]
    1da2:	4621      	mov	r1, r4
    1da4:	221f      	movs	r2, #31
    1da6:	3004      	adds	r0, #4
    1da8:	f007 f9a9 	bl	90fe <strncpy>
	dup->buf[sizeof(dup->buf) - 2] = '~';
    1dac:	9c01      	ldr	r4, [sp, #4]
    1dae:	237e      	movs	r3, #126	; 0x7e
    1db0:	f884 3023 	strb.w	r3, [r4, #35]	; 0x23
	dup->buf[sizeof(dup->buf) - 1] = '\0';
    1db4:	f884 5024 	strb.w	r5, [r4, #36]	; 0x24

	return dup->buf;
    1db8:	3404      	adds	r4, #4
}
    1dba:	4620      	mov	r0, r4
    1dbc:	b003      	add	sp, #12
    1dbe:	bd30      	pop	{r4, r5, pc}
		return (char *)log_strdup_fail_msg;
    1dc0:	4c03      	ldr	r4, [pc, #12]	; (1dd0 <z_log_strdup+0x68>)
    1dc2:	e7fa      	b.n	1dba <z_log_strdup+0x52>
    1dc4:	00009b00 	.word	0x00009b00
    1dc8:	0000ae98 	.word	0x0000ae98
    1dcc:	20001108 	.word	0x20001108
    1dd0:	0000a63b 	.word	0x0000a63b

00001dd4 <log_is_strdup>:
			log_strdup_longest : 0;
}

bool log_is_strdup(const void *buf)
{
	return PART_OF_ARRAY(log_strdup_pool_buf, (uint8_t *)buf);
    1dd4:	b148      	cbz	r0, 1dea <log_is_strdup+0x16>
    1dd6:	4b05      	ldr	r3, [pc, #20]	; (1dec <log_is_strdup+0x18>)
    1dd8:	4298      	cmp	r0, r3
    1dda:	d305      	bcc.n	1de8 <log_is_strdup+0x14>
    1ddc:	33a0      	adds	r3, #160	; 0xa0
    1dde:	4298      	cmp	r0, r3
    1de0:	bf2c      	ite	cs
    1de2:	2000      	movcs	r0, #0
    1de4:	2001      	movcc	r0, #1
    1de6:	4770      	bx	lr
    1de8:	2000      	movs	r0, #0

}
    1dea:	4770      	bx	lr
    1dec:	20005580 	.word	0x20005580

00001df0 <z_impl_log_process>:
	if (!backend_attached && !bypass) {
    1df0:	4b3a      	ldr	r3, [pc, #232]	; (1edc <z_impl_log_process+0xec>)
    1df2:	781b      	ldrb	r3, [r3, #0]
{
    1df4:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
    1df8:	4604      	mov	r4, r0
	if (!backend_attached && !bypass) {
    1dfa:	b903      	cbnz	r3, 1dfe <z_impl_log_process+0xe>
    1dfc:	b1a0      	cbz	r0, 1e28 <z_impl_log_process+0x38>
	msg = get_msg();
    1dfe:	f7ff ff4f 	bl	1ca0 <get_msg>
	if (msg.msg) {
    1e02:	4605      	mov	r5, r0
    1e04:	b118      	cbz	r0, 1e0e <z_impl_log_process+0x1e>
		if (!bypass) {
    1e06:	b194      	cbz	r4, 1e2e <z_impl_log_process+0x3e>
			log_msg_put(msg.msg);
    1e08:	4628      	mov	r0, r5
    1e0a:	f006 feaf 	bl	8b6c <log_msg_put>
	if (!bypass && z_log_dropped_pending()) {
    1e0e:	b92c      	cbnz	r4, 1e1c <z_impl_log_process+0x2c>
	return dropped_cnt > 0;
    1e10:	4b33      	ldr	r3, [pc, #204]	; (1ee0 <z_impl_log_process+0xf0>)
	if (!bypass && z_log_dropped_pending()) {
    1e12:	681b      	ldr	r3, [r3, #0]
    1e14:	2b00      	cmp	r3, #0
    1e16:	dd01      	ble.n	1e1c <z_impl_log_process+0x2c>
		dropped_notify();
    1e18:	f7ff ff8a 	bl	1d30 <dropped_notify>
	return (log_list_head_peek(&list) != NULL);
    1e1c:	4831      	ldr	r0, [pc, #196]	; (1ee4 <z_impl_log_process+0xf4>)
    1e1e:	f006 fd7b 	bl	8918 <log_list_head_peek>
    1e22:	1e04      	subs	r4, r0, #0
    1e24:	bf18      	it	ne
    1e26:	2401      	movne	r4, #1
}
    1e28:	4620      	mov	r0, r4
    1e2a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
	return __atomic_fetch_sub(target, value, __ATOMIC_SEQ_CST);
    1e2e:	4b2e      	ldr	r3, [pc, #184]	; (1ee8 <z_impl_log_process+0xf8>)
    1e30:	f3bf 8f5b 	dmb	ish
    1e34:	e853 2f00 	ldrex	r2, [r3]
    1e38:	3a01      	subs	r2, #1
    1e3a:	e843 2100 	strex	r1, r2, [r3]
    1e3e:	2900      	cmp	r1, #0
    1e40:	d1f8      	bne.n	1e34 <z_impl_log_process+0x44>
    1e42:	f3bf 8f5b 	dmb	ish
		    !panic_mode) {
    1e46:	4b29      	ldr	r3, [pc, #164]	; (1eec <z_impl_log_process+0xfc>)
		if (!IS_ENABLED(CONFIG_LOG2) &&
    1e48:	781b      	ldrb	r3, [r3, #0]
    1e4a:	b9a3      	cbnz	r3, 1e76 <z_impl_log_process+0x86>
 * @retval true  Standard message.
 * @retval false Hexdump message.
 */
static inline bool log_msg_is_std(struct log_msg *msg)
{
	return  (msg->hdr.params.generic.type == LOG_MSG_TYPE_STD);
    1e4c:	7a2b      	ldrb	r3, [r5, #8]
	if (!log_msg_is_std(msg)) {
    1e4e:	07db      	lsls	r3, r3, #31
    1e50:	d411      	bmi.n	1e76 <z_impl_log_process+0x86>
	msg_str = log_msg_str_get(msg);
    1e52:	f006 fe9e 	bl	8b92 <log_msg_str_get>
    1e56:	4606      	mov	r6, r0
	mask = z_log_get_s_mask(msg_str, log_msg_nargs_get(msg));
    1e58:	4628      	mov	r0, r5
    1e5a:	f006 fe65 	bl	8b28 <log_msg_nargs_get>
    1e5e:	4601      	mov	r1, r0
    1e60:	4630      	mov	r0, r6
    1e62:	f006 fd6e 	bl	8942 <z_log_get_s_mask>
	return (((const char *)addr >= (const char *)RO_START) &&
    1e66:	f8df 8090 	ldr.w	r8, [pc, #144]	; 1ef8 <z_impl_log_process+0x108>
		if (!is_rodata(str) && !log_is_strdup(str) &&
    1e6a:	f8df 9090 	ldr.w	r9, [pc, #144]	; 1efc <z_impl_log_process+0x10c>
    1e6e:	f8df a090 	ldr.w	sl, [pc, #144]	; 1f00 <z_impl_log_process+0x110>
	mask = z_log_get_s_mask(msg_str, log_msg_nargs_get(msg));
    1e72:	4606      	mov	r6, r0
	while (mask) {
    1e74:	b936      	cbnz	r6, 1e84 <z_impl_log_process+0x94>
	return __log_backends_end - __log_backends_start;
    1e76:	4e1e      	ldr	r6, [pc, #120]	; (1ef0 <z_impl_log_process+0x100>)
    1e78:	4f1e      	ldr	r7, [pc, #120]	; (1ef4 <z_impl_log_process+0x104>)
    1e7a:	1bbf      	subs	r7, r7, r6
    1e7c:	113f      	asrs	r7, r7, #4
    1e7e:	f04f 0800 	mov.w	r8, #0
    1e82:	e028      	b.n	1ed6 <z_impl_log_process+0xe6>
		idx = 31 - __builtin_clz(mask);
    1e84:	fab6 f786 	clz	r7, r6
    1e88:	f1c7 071f 	rsb	r7, r7, #31
		str = (const char *)log_msg_arg_get(msg, idx);
    1e8c:	4639      	mov	r1, r7
    1e8e:	4628      	mov	r0, r5
    1e90:	f006 fe4d 	bl	8b2e <log_msg_arg_get>
	return (((const char *)addr >= (const char *)RO_START) &&
    1e94:	4540      	cmp	r0, r8
		str = (const char *)log_msg_arg_get(msg, idx);
    1e96:	4602      	mov	r2, r0
	return (((const char *)addr >= (const char *)RO_START) &&
    1e98:	d301      	bcc.n	1e9e <z_impl_log_process+0xae>
		if (!is_rodata(str) && !log_is_strdup(str) &&
    1e9a:	4550      	cmp	r0, sl
    1e9c:	d30a      	bcc.n	1eb4 <z_impl_log_process+0xc4>
    1e9e:	4610      	mov	r0, r2
    1ea0:	f7ff ff98 	bl	1dd4 <log_is_strdup>
    1ea4:	b930      	cbnz	r0, 1eb4 <z_impl_log_process+0xc4>
    1ea6:	454a      	cmp	r2, r9
    1ea8:	d004      	beq.n	1eb4 <z_impl_log_process+0xc4>
	return msg->hdr.ids.source_id;
    1eaa:	8969      	ldrh	r1, [r5, #10]
				log_source_name_get(CONFIG_LOG_DOMAIN_ID,
    1eac:	f3c1 1189 	ubfx	r1, r1, #6, #10
    1eb0:	f000 f8c4 	bl	203c <log_source_name_get>
		mask &= ~BIT(idx);
    1eb4:	2301      	movs	r3, #1
    1eb6:	fa03 f707 	lsl.w	r7, r3, r7
    1eba:	ea26 0607 	bic.w	r6, r6, r7
    1ebe:	e7d9      	b.n	1e74 <z_impl_log_process+0x84>
	return backend->cb->active;
    1ec0:	6873      	ldr	r3, [r6, #4]
			if (log_backend_is_active(backend) &&
    1ec2:	795b      	ldrb	r3, [r3, #5]
    1ec4:	b123      	cbz	r3, 1ed0 <z_impl_log_process+0xe0>
	backend->api->put(backend, msg);
    1ec6:	6833      	ldr	r3, [r6, #0]
    1ec8:	4629      	mov	r1, r5
    1eca:	685b      	ldr	r3, [r3, #4]
    1ecc:	4630      	mov	r0, r6
    1ece:	4798      	blx	r3
		for (int i = 0; i < log_backend_count_get(); i++) {
    1ed0:	f108 0801 	add.w	r8, r8, #1
    1ed4:	3610      	adds	r6, #16
    1ed6:	45b8      	cmp	r8, r7
    1ed8:	dbf2      	blt.n	1ec0 <z_impl_log_process+0xd0>
    1eda:	e795      	b.n	1e08 <z_impl_log_process+0x18>
    1edc:	2000194e 	.word	0x2000194e
    1ee0:	200010f8 	.word	0x200010f8
    1ee4:	20001100 	.word	0x20001100
    1ee8:	200010f4 	.word	0x200010f4
    1eec:	2000194f 	.word	0x2000194f
    1ef0:	00009dc0 	.word	0x00009dc0
    1ef4:	00009de0 	.word	0x00009de0
    1ef8:	00009b00 	.word	0x00009b00
    1efc:	0000a63b 	.word	0x0000a63b
    1f00:	0000ae98 	.word	0x0000ae98

00001f04 <msg_finalize>:
	msg->hdr.timestamp = timestamp_func();
    1f04:	4b27      	ldr	r3, [pc, #156]	; (1fa4 <msg_finalize+0xa0>)
{
    1f06:	b537      	push	{r0, r1, r2, r4, r5, lr}
	msg->hdr.timestamp = timestamp_func();
    1f08:	681b      	ldr	r3, [r3, #0]
	msg->hdr.ids = src_level;
    1f0a:	8141      	strh	r1, [r0, #10]
{
    1f0c:	4604      	mov	r4, r0
	msg->hdr.timestamp = timestamp_func();
    1f0e:	4798      	blx	r3
    1f10:	60e0      	str	r0, [r4, #12]
	__asm__ volatile(
    1f12:	f04f 0320 	mov.w	r3, #32
    1f16:	f3ef 8511 	mrs	r5, BASEPRI
    1f1a:	f383 8812 	msr	BASEPRI_MAX, r3
    1f1e:	f3bf 8f6f 	isb	sy
	log_list_add_tail(&list, msg);
    1f22:	4821      	ldr	r0, [pc, #132]	; (1fa8 <msg_finalize+0xa4>)
    1f24:	4621      	mov	r1, r4
    1f26:	f006 fced 	bl	8904 <log_list_add_tail>
	__asm__ volatile(
    1f2a:	f385 8811 	msr	BASEPRI, r5
    1f2e:	f3bf 8f6f 	isb	sy
	return __atomic_fetch_add(target, value, __ATOMIC_SEQ_CST);
    1f32:	f3bf 8f5b 	dmb	ish
    1f36:	4b1d      	ldr	r3, [pc, #116]	; (1fac <msg_finalize+0xa8>)
    1f38:	e853 2f00 	ldrex	r2, [r3]
    1f3c:	1c51      	adds	r1, r2, #1
    1f3e:	e843 1000 	strex	r0, r1, [r3]
    1f42:	2800      	cmp	r0, #0
    1f44:	d1f8      	bne.n	1f38 <msg_finalize+0x34>
    1f46:	f3bf 8f5b 	dmb	ish
	if (panic_mode) {
    1f4a:	4b19      	ldr	r3, [pc, #100]	; (1fb0 <msg_finalize+0xac>)
    1f4c:	781b      	ldrb	r3, [r3, #0]
    1f4e:	b183      	cbz	r3, 1f72 <msg_finalize+0x6e>
	__asm__ volatile(
    1f50:	f04f 0320 	mov.w	r3, #32
    1f54:	f3ef 8411 	mrs	r4, BASEPRI
    1f58:	f383 8812 	msr	BASEPRI_MAX, r3
    1f5c:	f3bf 8f6f 	isb	sy
    1f60:	2000      	movs	r0, #0
    1f62:	f7ff ff45 	bl	1df0 <z_impl_log_process>
	__asm__ volatile(
    1f66:	f384 8811 	msr	BASEPRI, r4
    1f6a:	f3bf 8f6f 	isb	sy
}
    1f6e:	b003      	add	sp, #12
    1f70:	bd30      	pop	{r4, r5, pc}
	} else if (proc_tid != NULL && cnt == 0) {
    1f72:	4b10      	ldr	r3, [pc, #64]	; (1fb4 <msg_finalize+0xb0>)
    1f74:	681b      	ldr	r3, [r3, #0]
    1f76:	2b00      	cmp	r3, #0
    1f78:	d0f9      	beq.n	1f6e <msg_finalize+0x6a>
    1f7a:	b93a      	cbnz	r2, 1f8c <msg_finalize+0x88>
		}
	} else {
		if (result32) {
			return (uint32_t)((t * to_hz + off) / from_hz);
		} else {
			return (t * to_hz + off) / from_hz;
    1f7c:	2200      	movs	r2, #0
    1f7e:	2300      	movs	r3, #0
	z_impl_k_timer_start(timer, duration, period);
    1f80:	480d      	ldr	r0, [pc, #52]	; (1fb8 <msg_finalize+0xb4>)
    1f82:	e9cd 2300 	strd	r2, r3, [sp]
    1f86:	f004 fbe1 	bl	674c <z_impl_k_timer_start>
    1f8a:	e7f0      	b.n	1f6e <msg_finalize+0x6a>
		if ((cnt == CONFIG_LOG_PROCESS_TRIGGER_THRESHOLD) &&
    1f8c:	2a0a      	cmp	r2, #10
    1f8e:	d1ee      	bne.n	1f6e <msg_finalize+0x6a>
	z_impl_k_timer_stop(timer);
    1f90:	4809      	ldr	r0, [pc, #36]	; (1fb8 <msg_finalize+0xb4>)
    1f92:	f007 fd64 	bl	9a5e <z_impl_k_timer_stop>
	z_impl_k_sem_give(sem);
    1f96:	4809      	ldr	r0, [pc, #36]	; (1fbc <msg_finalize+0xb8>)
}
    1f98:	b003      	add	sp, #12
    1f9a:	e8bd 4030 	ldmia.w	sp!, {r4, r5, lr}
    1f9e:	f003 be71 	b.w	5c84 <z_impl_k_sem_give>
    1fa2:	bf00      	nop
    1fa4:	2000000c 	.word	0x2000000c
    1fa8:	20001100 	.word	0x20001100
    1fac:	200010f4 	.word	0x200010f4
    1fb0:	2000194f 	.word	0x2000194f
    1fb4:	20001124 	.word	0x20001124
    1fb8:	200002a8 	.word	0x200002a8
    1fbc:	200001d8 	.word	0x200001d8

00001fc0 <z_impl_log_panic>:
{
    1fc0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
	if (panic_mode) {
    1fc2:	4f0e      	ldr	r7, [pc, #56]	; (1ffc <z_impl_log_panic+0x3c>)
    1fc4:	783d      	ldrb	r5, [r7, #0]
    1fc6:	b975      	cbnz	r5, 1fe6 <z_impl_log_panic+0x26>
	return __log_backends_end - __log_backends_start;
    1fc8:	4c0d      	ldr	r4, [pc, #52]	; (2000 <z_impl_log_panic+0x40>)
    1fca:	4e0e      	ldr	r6, [pc, #56]	; (2004 <z_impl_log_panic+0x44>)
	log_init();
    1fcc:	f7ff fe3c 	bl	1c48 <log_init>
    1fd0:	1b36      	subs	r6, r6, r4
    1fd2:	1136      	asrs	r6, r6, #4
	for (int i = 0; i < log_backend_count_get(); i++) {
    1fd4:	42b5      	cmp	r5, r6
    1fd6:	db07      	blt.n	1fe8 <z_impl_log_panic+0x28>
    1fd8:	2000      	movs	r0, #0
    1fda:	f7ff ff09 	bl	1df0 <z_impl_log_process>
		while (log_process(false) == true) {
    1fde:	2800      	cmp	r0, #0
    1fe0:	d1fa      	bne.n	1fd8 <z_impl_log_panic+0x18>
	panic_mode = true;
    1fe2:	2301      	movs	r3, #1
    1fe4:	703b      	strb	r3, [r7, #0]
}
    1fe6:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	return backend->cb->active;
    1fe8:	6863      	ldr	r3, [r4, #4]
		if (log_backend_is_active(backend)) {
    1fea:	795b      	ldrb	r3, [r3, #5]
    1fec:	b11b      	cbz	r3, 1ff6 <z_impl_log_panic+0x36>
	backend->api->panic(backend);
    1fee:	6823      	ldr	r3, [r4, #0]
    1ff0:	4620      	mov	r0, r4
    1ff2:	695b      	ldr	r3, [r3, #20]
    1ff4:	4798      	blx	r3
	for (int i = 0; i < log_backend_count_get(); i++) {
    1ff6:	3501      	adds	r5, #1
    1ff8:	3410      	adds	r4, #16
    1ffa:	e7eb      	b.n	1fd4 <z_impl_log_panic+0x14>
    1ffc:	2000194f 	.word	0x2000194f
    2000:	00009dc0 	.word	0x00009dc0
    2004:	00009de0 	.word	0x00009de0

00002008 <z_log_free>:

void z_log_free(void *str)
{
    2008:	b507      	push	{r0, r1, r2, lr}
	struct log_strdup_buf *dup = CONTAINER_OF(str, struct log_strdup_buf,
    200a:	3804      	subs	r0, #4
    200c:	9001      	str	r0, [sp, #4]
	return __atomic_fetch_sub(target, value, __ATOMIC_SEQ_CST);
    200e:	f3bf 8f5b 	dmb	ish
    2012:	e850 3f00 	ldrex	r3, [r0]
    2016:	1e5a      	subs	r2, r3, #1
    2018:	e840 2100 	strex	r1, r2, [r0]
    201c:	2900      	cmp	r1, #0
    201e:	d1f8      	bne.n	2012 <z_log_free+0xa>
    2020:	f3bf 8f5b 	dmb	ish
						  buf);

	if (atomic_dec(&dup->refcount) == 1) {
    2024:	2b01      	cmp	r3, #1
    2026:	d103      	bne.n	2030 <z_log_free+0x28>
		k_mem_slab_free(&log_strdup_pool, (void **)&dup);
    2028:	4803      	ldr	r0, [pc, #12]	; (2038 <z_log_free+0x30>)
    202a:	a901      	add	r1, sp, #4
    202c:	f007 fbbd 	bl	97aa <k_mem_slab_free>
		if (IS_ENABLED(CONFIG_LOG_STRDUP_POOL_PROFILING)) {
			atomic_dec(&log_strdup_in_use);
		}
	}
}
    2030:	b003      	add	sp, #12
    2032:	f85d fb04 	ldr.w	pc, [sp], #4
    2036:	bf00      	nop
    2038:	20001108 	.word	0x20001108

0000203c <log_source_name_get>:
    203c:	4a04      	ldr	r2, [pc, #16]	; (2050 <log_source_name_get+0x14>)
    203e:	4b05      	ldr	r3, [pc, #20]	; (2054 <log_source_name_get+0x18>)
    2040:	1a9b      	subs	r3, r3, r2
	return __log_const_start[source_id].name;
}

const char *log_source_name_get(uint32_t domain_id, uint32_t src_id)
{
	return src_id < z_log_sources_count() ? log_name_get(src_id) : NULL;
    2042:	ebb1 0fd3 	cmp.w	r1, r3, lsr #3
	return __log_const_start[source_id].name;
    2046:	bf34      	ite	cc
    2048:	f852 0031 	ldrcc.w	r0, [r2, r1, lsl #3]
	return src_id < z_log_sources_count() ? log_name_get(src_id) : NULL;
    204c:	2000      	movcs	r0, #0
}
    204e:	4770      	bx	lr
    2050:	00009d80 	.word	0x00009d80
    2054:	00009dc0 	.word	0x00009dc0

00002058 <log_backend_enable>:
			uint32_t level)
{
	/* As first slot in filtering mask is reserved, backend ID has offset.*/
	uint32_t id = LOG_FILTER_FIRST_BACKEND_SLOT_IDX;

	id += backend - log_backend_get(0);
    2058:	4b05      	ldr	r3, [pc, #20]	; (2070 <log_backend_enable+0x18>)

	log_backend_id_set(backend, id);
    205a:	6842      	ldr	r2, [r0, #4]
	id += backend - log_backend_get(0);
    205c:	1ac3      	subs	r3, r0, r3
    205e:	111b      	asrs	r3, r3, #4
    2060:	3301      	adds	r3, #1
	log_backend_id_set(backend, id);
    2062:	7113      	strb	r3, [r2, #4]
	backend_filter_set(backend, level);
	log_backend_activate(backend, ctx);
    2064:	6843      	ldr	r3, [r0, #4]
	backend->cb->active = true;
    2066:	2201      	movs	r2, #1
	backend->cb->ctx = ctx;
    2068:	6019      	str	r1, [r3, #0]
	backend->cb->active = true;
    206a:	715a      	strb	r2, [r3, #5]

	z_log_notify_backend_enabled();
    206c:	f7ff be2c 	b.w	1cc8 <z_log_notify_backend_enabled>
    2070:	00009dc0 	.word	0x00009dc0

00002074 <log_msg_pool_init>:
static uint8_t __noinit __aligned(sizeof(void *))
		log_msg_pool_buf[CONFIG_LOG_BUFFER_SIZE];

void log_msg_pool_init(void)
{
	k_mem_slab_init(&log_msg_pool, log_msg_pool_buf, MSG_SIZE, NUM_OF_MSGS);
    2074:	2320      	movs	r3, #32
    2076:	4902      	ldr	r1, [pc, #8]	; (2080 <log_msg_pool_init+0xc>)
    2078:	4802      	ldr	r0, [pc, #8]	; (2084 <log_msg_pool_init+0x10>)
    207a:	461a      	mov	r2, r3
    207c:	f007 bb7a 	b.w	9774 <k_mem_slab_init>
    2080:	20005620 	.word	0x20005620
    2084:	20001128 	.word	0x20001128

00002088 <log_msg_no_space_handle>:

	k_mem_slab_free(&log_msg_pool, (void **)&msg);
}

union log_msg_chunk *log_msg_no_space_handle(void)
{
    2088:	b537      	push	{r0, r1, r2, r4, r5, lr}
	union log_msg_chunk *msg = NULL;
    208a:	2300      	movs	r3, #0

	if (IS_ENABLED(CONFIG_LOG_MODE_OVERFLOW)) {
		do {
			more = log_process(true);
			z_log_dropped();
			err = k_mem_slab_alloc(&log_msg_pool,
    208c:	4d09      	ldr	r5, [pc, #36]	; (20b4 <log_msg_no_space_handle+0x2c>)
	union log_msg_chunk *msg = NULL;
    208e:	9301      	str	r3, [sp, #4]
    2090:	2001      	movs	r0, #1
    2092:	f7ff fead 	bl	1df0 <z_impl_log_process>
    2096:	4604      	mov	r4, r0
			z_log_dropped();
    2098:	f7ff fe1c 	bl	1cd4 <z_log_dropped>
			err = k_mem_slab_alloc(&log_msg_pool,
    209c:	2200      	movs	r2, #0
    209e:	2300      	movs	r3, #0
    20a0:	a901      	add	r1, sp, #4
    20a2:	4628      	mov	r0, r5
    20a4:	f003 fc3e 	bl	5924 <k_mem_slab_alloc>
					       (void **)&msg,
					       K_NO_WAIT);
		} while ((err != 0) && more);
    20a8:	b108      	cbz	r0, 20ae <log_msg_no_space_handle+0x26>
    20aa:	2c00      	cmp	r4, #0
    20ac:	d1f0      	bne.n	2090 <log_msg_no_space_handle+0x8>
	} else {
		z_log_dropped();
	}
	return msg;

}
    20ae:	9801      	ldr	r0, [sp, #4]
    20b0:	b003      	add	sp, #12
    20b2:	bd30      	pop	{r4, r5, pc}
    20b4:	20001128 	.word	0x20001128

000020b8 <log_msg_chunk_alloc>:
{
    20b8:	b507      	push	{r0, r1, r2, lr}
	union log_msg_chunk *msg = NULL;
    20ba:	2300      	movs	r3, #0
    20bc:	9301      	str	r3, [sp, #4]
	int err = k_mem_slab_alloc(&log_msg_pool, (void **)&msg,
    20be:	4807      	ldr	r0, [pc, #28]	; (20dc <log_msg_chunk_alloc+0x24>)
    20c0:	2200      	movs	r2, #0
    20c2:	2300      	movs	r3, #0
    20c4:	a901      	add	r1, sp, #4
    20c6:	f003 fc2d 	bl	5924 <k_mem_slab_alloc>
	if (err != 0) {
    20ca:	b110      	cbz	r0, 20d2 <log_msg_chunk_alloc+0x1a>
		msg = log_msg_no_space_handle();
    20cc:	f7ff ffdc 	bl	2088 <log_msg_no_space_handle>
    20d0:	9001      	str	r0, [sp, #4]
}
    20d2:	9801      	ldr	r0, [sp, #4]
    20d4:	b003      	add	sp, #12
    20d6:	f85d fb04 	ldr.w	pc, [sp], #4
    20da:	bf00      	nop
    20dc:	20001128 	.word	0x20001128

000020e0 <msg_free>:
{
    20e0:	b5f0      	push	{r4, r5, r6, r7, lr}
	return  (msg->hdr.params.generic.type == LOG_MSG_TYPE_STD);
    20e2:	7a03      	ldrb	r3, [r0, #8]
	}
}

uint32_t log_msg_nargs_get(struct log_msg *msg)
{
	return msg->hdr.params.std.nargs;
    20e4:	7a45      	ldrb	r5, [r0, #9]
{
    20e6:	b085      	sub	sp, #20
	return msg->hdr.params.std.nargs;
    20e8:	092d      	lsrs	r5, r5, #4
{
    20ea:	9001      	str	r0, [sp, #4]
	if (log_msg_is_std(msg) && nargs) {
    20ec:	07d8      	lsls	r0, r3, #31
    20ee:	d41c      	bmi.n	212a <msg_free+0x4a>
    20f0:	b1dd      	cbz	r5, 212a <msg_free+0x4a>
		uint32_t smask = 0U;
    20f2:	2400      	movs	r4, #0
		for (i = 0U; i < nargs; i++) {
    20f4:	4626      	mov	r6, r4
			void *buf = (void *)log_msg_arg_get(msg, i);
    20f6:	9801      	ldr	r0, [sp, #4]
    20f8:	4631      	mov	r1, r6
    20fa:	f006 fd18 	bl	8b2e <log_msg_arg_get>
    20fe:	4607      	mov	r7, r0
			if (log_is_strdup(buf)) {
    2100:	f7ff fe68 	bl	1dd4 <log_is_strdup>
    2104:	b170      	cbz	r0, 2124 <msg_free+0x44>
				if (smask == 0U) {
    2106:	b934      	cbnz	r4, 2116 <msg_free+0x36>
					smask = z_log_get_s_mask(
    2108:	9b01      	ldr	r3, [sp, #4]
    210a:	4629      	mov	r1, r5
    210c:	6918      	ldr	r0, [r3, #16]
    210e:	f006 fc18 	bl	8942 <z_log_get_s_mask>
					if (smask == 0U) {
    2112:	4604      	mov	r4, r0
    2114:	b148      	cbz	r0, 212a <msg_free+0x4a>
				if (smask & BIT(i)) {
    2116:	fa24 f306 	lsr.w	r3, r4, r6
    211a:	07d9      	lsls	r1, r3, #31
    211c:	d502      	bpl.n	2124 <msg_free+0x44>
					z_log_free(buf);
    211e:	4638      	mov	r0, r7
    2120:	f7ff ff72 	bl	2008 <z_log_free>
		for (i = 0U; i < nargs; i++) {
    2124:	3601      	adds	r6, #1
    2126:	42ae      	cmp	r6, r5
    2128:	d3e5      	bcc.n	20f6 <msg_free+0x16>
	if (msg->hdr.params.generic.ext == 1) {
    212a:	9b01      	ldr	r3, [sp, #4]
    212c:	7a1a      	ldrb	r2, [r3, #8]
    212e:	0792      	lsls	r2, r2, #30
    2130:	d504      	bpl.n	213c <msg_free+0x5c>
		cont_free(msg->payload.ext.next);
    2132:	695b      	ldr	r3, [r3, #20]
		k_mem_slab_free(&log_msg_pool, (void **)&cont);
    2134:	4c08      	ldr	r4, [pc, #32]	; (2158 <msg_free+0x78>)
    2136:	9303      	str	r3, [sp, #12]
	while (cont != NULL) {
    2138:	9b03      	ldr	r3, [sp, #12]
    213a:	b92b      	cbnz	r3, 2148 <msg_free+0x68>
	k_mem_slab_free(&log_msg_pool, (void **)&msg);
    213c:	4806      	ldr	r0, [pc, #24]	; (2158 <msg_free+0x78>)
    213e:	a901      	add	r1, sp, #4
    2140:	f007 fb33 	bl	97aa <k_mem_slab_free>
}
    2144:	b005      	add	sp, #20
    2146:	bdf0      	pop	{r4, r5, r6, r7, pc}
		next = cont->next;
    2148:	681d      	ldr	r5, [r3, #0]
		k_mem_slab_free(&log_msg_pool, (void **)&cont);
    214a:	a903      	add	r1, sp, #12
    214c:	4620      	mov	r0, r4
    214e:	f007 fb2c 	bl	97aa <k_mem_slab_free>
		cont = next;
    2152:	9503      	str	r5, [sp, #12]
    2154:	e7f0      	b.n	2138 <msg_free+0x58>
    2156:	bf00      	nop
    2158:	20001128 	.word	0x20001128

0000215c <print_formatted>:
	return 0;
}

static int print_formatted(const struct log_output *output,
			   const char *fmt, ...)
{
    215c:	b40e      	push	{r1, r2, r3}
    215e:	b503      	push	{r0, r1, lr}
    2160:	ab03      	add	r3, sp, #12
    2162:	4601      	mov	r1, r0
    2164:	f853 2b04 	ldr.w	r2, [r3], #4
	va_list args;
	int length = 0;

	va_start(args, fmt);
	length = cbvprintf(out_func, (void *)output, fmt, args);
    2168:	4804      	ldr	r0, [pc, #16]	; (217c <print_formatted+0x20>)
	va_start(args, fmt);
    216a:	9301      	str	r3, [sp, #4]
	length = cbvprintf(out_func, (void *)output, fmt, args);
    216c:	f7ff faf8 	bl	1760 <cbvprintf>
	va_end(args);

	return length;
}
    2170:	b002      	add	sp, #8
    2172:	f85d eb04 	ldr.w	lr, [sp], #4
    2176:	b003      	add	sp, #12
    2178:	4770      	bx	lr
    217a:	bf00      	nop
    217c:	00008f3b 	.word	0x00008f3b

00002180 <prefix_print>:
}

static uint32_t prefix_print(const struct log_output *output,
			 uint32_t flags, bool func_on, uint32_t timestamp, uint8_t level,
			 uint8_t domain_id, int16_t source_id)
{
    2180:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    2184:	b087      	sub	sp, #28
    2186:	461f      	mov	r7, r3
	uint32_t length = 0U;

	bool stamp = flags & LOG_OUTPUT_FLAG_TIMESTAMP;
	bool colors_on = flags & LOG_OUTPUT_FLAG_COLORS;
    2188:	f001 0301 	and.w	r3, r1, #1
{
    218c:	9205      	str	r2, [sp, #20]
    218e:	f89d 9040 	ldrb.w	r9, [sp, #64]	; 0x40
    2192:	f9bd a048 	ldrsh.w	sl, [sp, #72]	; 0x48
	bool colors_on = flags & LOG_OUTPUT_FLAG_COLORS;
    2196:	9304      	str	r3, [sp, #16]
{
    2198:	4606      	mov	r6, r0
    219a:	4688      	mov	r8, r1
	bool stamp = flags & LOG_OUTPUT_FLAG_TIMESTAMP;
    219c:	f001 0b02 	and.w	fp, r1, #2
	bool level_on = flags & LOG_OUTPUT_FLAG_LEVEL;
    21a0:	f001 0508 	and.w	r5, r1, #8
	const char *tag = z_log_get_tag();
    21a4:	f006 fc5b 	bl	8a5e <z_log_get_tag>
			"<%d>1 ",
			facility * 8 +
			level_to_rfc5424_severity(level));
	}

	if (tag) {
    21a8:	4602      	mov	r2, r0
    21aa:	2800      	cmp	r0, #0
    21ac:	d044      	beq.n	2238 <prefix_print+0xb8>
		length += print_formatted(output, "%s ", tag);
    21ae:	4939      	ldr	r1, [pc, #228]	; (2294 <prefix_print+0x114>)
    21b0:	4630      	mov	r0, r6
    21b2:	f7ff ffd3 	bl	215c <print_formatted>
    21b6:	4604      	mov	r4, r0
	}

	if (stamp) {
    21b8:	f1bb 0f00 	cmp.w	fp, #0
    21bc:	d008      	beq.n	21d0 <prefix_print+0x50>
	if (!format) {
    21be:	f018 0f44 	tst.w	r8, #68	; 0x44
    21c2:	d13b      	bne.n	223c <prefix_print+0xbc>
		length = print_formatted(output, "[%08lu] ", timestamp);
    21c4:	4934      	ldr	r1, [pc, #208]	; (2298 <prefix_print+0x118>)
    21c6:	463a      	mov	r2, r7
    21c8:	4630      	mov	r0, r6
    21ca:	f7ff ffc7 	bl	215c <print_formatted>
		length += timestamp_print(output, flags, timestamp);
    21ce:	4404      	add	r4, r0
	if (color) {
    21d0:	9b04      	ldr	r3, [sp, #16]
    21d2:	b153      	cbz	r3, 21ea <prefix_print+0x6a>
		const char *log_color = start && (colors[level] != NULL) ?
    21d4:	4b31      	ldr	r3, [pc, #196]	; (229c <prefix_print+0x11c>)
		print_formatted(output, "%s", log_color);
    21d6:	4932      	ldr	r1, [pc, #200]	; (22a0 <prefix_print+0x120>)
		const char *log_color = start && (colors[level] != NULL) ?
    21d8:	f853 2029 	ldr.w	r2, [r3, r9, lsl #2]
		print_formatted(output, "%s", log_color);
    21dc:	4b31      	ldr	r3, [pc, #196]	; (22a4 <prefix_print+0x124>)
    21de:	4630      	mov	r0, r6
    21e0:	2a00      	cmp	r2, #0
    21e2:	bf08      	it	eq
    21e4:	461a      	moveq	r2, r3
    21e6:	f7ff ffb9 	bl	215c <print_formatted>
	if (level_on) {
    21ea:	b13d      	cbz	r5, 21fc <prefix_print+0x7c>
		total += print_formatted(output, "<%s> ", severity[level]);
    21ec:	4b2e      	ldr	r3, [pc, #184]	; (22a8 <prefix_print+0x128>)
    21ee:	492f      	ldr	r1, [pc, #188]	; (22ac <prefix_print+0x12c>)
    21f0:	f853 2029 	ldr.w	r2, [r3, r9, lsl #2]
    21f4:	4630      	mov	r0, r6
    21f6:	f7ff ffb1 	bl	215c <print_formatted>
    21fa:	4605      	mov	r5, r0
	if (source_id >= 0) {
    21fc:	f1ba 0f00 	cmp.w	sl, #0
    2200:	db16      	blt.n	2230 <prefix_print+0xb0>
		total += print_formatted(output,
    2202:	9b05      	ldr	r3, [sp, #20]
    2204:	2b00      	cmp	r3, #0
    2206:	d043      	beq.n	2290 <prefix_print+0x110>
				((1 << level) & LOG_FUNCTION_PREFIX_MASK)) ?
    2208:	2301      	movs	r3, #1
    220a:	fa03 f909 	lsl.w	r9, r3, r9
		total += print_formatted(output,
    220e:	4b28      	ldr	r3, [pc, #160]	; (22b0 <prefix_print+0x130>)
    2210:	4f28      	ldr	r7, [pc, #160]	; (22b4 <prefix_print+0x134>)
    2212:	f019 0f10 	tst.w	r9, #16
    2216:	bf18      	it	ne
    2218:	461f      	movne	r7, r3
    221a:	4651      	mov	r1, sl
    221c:	f89d 0044 	ldrb.w	r0, [sp, #68]	; 0x44
    2220:	f7ff ff0c 	bl	203c <log_source_name_get>
    2224:	4639      	mov	r1, r7
    2226:	4602      	mov	r2, r0
    2228:	4630      	mov	r0, r6
    222a:	f7ff ff97 	bl	215c <print_formatted>
    222e:	4405      	add	r5, r0
	length += ids_print(output, level_on, func_on,
			domain_id, source_id, level);


	return length;
}
    2230:	1928      	adds	r0, r5, r4
    2232:	b007      	add	sp, #28
    2234:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
	uint32_t length = 0U;
    2238:	4604      	mov	r4, r0
    223a:	e7bd      	b.n	21b8 <prefix_print+0x38>
	} else if (freq != 0U) {
    223c:	4b1e      	ldr	r3, [pc, #120]	; (22b8 <prefix_print+0x138>)
    223e:	6818      	ldr	r0, [r3, #0]
    2240:	2800      	cmp	r0, #0
    2242:	d0c4      	beq.n	21ce <prefix_print+0x4e>
		timestamp /= timestamp_div;
    2244:	4b1d      	ldr	r3, [pc, #116]	; (22bc <prefix_print+0x13c>)
    2246:	f44f 6c61 	mov.w	ip, #3600	; 0xe10
    224a:	6819      	ldr	r1, [r3, #0]
    224c:	fbb7 f7f1 	udiv	r7, r7, r1
		total_seconds = timestamp / freq;
    2250:	fbb7 f1f0 	udiv	r1, r7, r0
		remainder = timestamp % freq;
    2254:	fb00 7711 	mls	r7, r0, r1, r7
    2258:	fbb1 f2fc 	udiv	r2, r1, ip
    225c:	fb0c 1c12 	mls	ip, ip, r2, r1
		ms = (remainder * 1000U) / freq;
    2260:	f44f 717a 	mov.w	r1, #1000	; 0x3e8
    2264:	434f      	muls	r7, r1
		mins = seconds / 60U;
    2266:	f04f 0e3c 	mov.w	lr, #60	; 0x3c
		us = (1000 * (remainder * 1000U - (ms * freq))) / freq;
    226a:	fbb7 f8f0 	udiv	r8, r7, r0
    226e:	fb00 7718 	mls	r7, r0, r8, r7
    2272:	434f      	muls	r7, r1
		mins = seconds / 60U;
    2274:	fbbc f3fe 	udiv	r3, ip, lr
			length = print_formatted(output,
    2278:	fb0e c113 	mls	r1, lr, r3, ip
		us = (1000 * (remainder * 1000U - (ms * freq))) / freq;
    227c:	fbb7 f0f0 	udiv	r0, r7, r0
			length = print_formatted(output,
    2280:	9100      	str	r1, [sp, #0]
    2282:	e9cd 8001 	strd	r8, r0, [sp, #4]
    2286:	490e      	ldr	r1, [pc, #56]	; (22c0 <prefix_print+0x140>)
    2288:	4630      	mov	r0, r6
    228a:	f7ff ff67 	bl	215c <print_formatted>
    228e:	e79e      	b.n	21ce <prefix_print+0x4e>
		total += print_formatted(output,
    2290:	4f08      	ldr	r7, [pc, #32]	; (22b4 <prefix_print+0x134>)
    2292:	e7c2      	b.n	221a <prefix_print+0x9a>
    2294:	0000a663 	.word	0x0000a663
    2298:	0000a667 	.word	0x0000a667
    229c:	00009e38 	.word	0x00009e38
    22a0:	0000ad53 	.word	0x0000ad53
    22a4:	0000a655 	.word	0x0000a655
    22a8:	00009e4c 	.word	0x00009e4c
    22ac:	0000a68c 	.word	0x0000a68c
    22b0:	0000a65f 	.word	0x0000a65f
    22b4:	0000a65a 	.word	0x0000a65a
    22b8:	20001144 	.word	0x20001144
    22bc:	20001148 	.word	0x20001148
    22c0:	0000a670 	.word	0x0000a670

000022c4 <postfix_print>:

static void postfix_print(const struct log_output *output,
			  uint32_t flags, uint8_t level)
{
    22c4:	b538      	push	{r3, r4, r5, lr}
    22c6:	460c      	mov	r4, r1
	if (color) {
    22c8:	07e1      	lsls	r1, r4, #31
{
    22ca:	4605      	mov	r5, r0
	if (color) {
    22cc:	d503      	bpl.n	22d6 <postfix_print+0x12>
		print_formatted(output, "%s", log_color);
    22ce:	4a08      	ldr	r2, [pc, #32]	; (22f0 <postfix_print+0x2c>)
    22d0:	4908      	ldr	r1, [pc, #32]	; (22f4 <postfix_print+0x30>)
    22d2:	f7ff ff43 	bl	215c <print_formatted>
	if ((flags & LOG_OUTPUT_FLAG_CRLF_NONE) != 0U) {
    22d6:	06e2      	lsls	r2, r4, #27
    22d8:	d408      	bmi.n	22ec <postfix_print+0x28>
	if ((flags & LOG_OUTPUT_FLAG_CRLF_LFONLY) != 0U) {
    22da:	06a3      	lsls	r3, r4, #26
		print_formatted(ctx, "\r\n");
    22dc:	4628      	mov	r0, r5
		print_formatted(ctx, "\n");
    22de:	bf4c      	ite	mi
    22e0:	4905      	ldrmi	r1, [pc, #20]	; (22f8 <postfix_print+0x34>)
		print_formatted(ctx, "\r\n");
    22e2:	4906      	ldrpl	r1, [pc, #24]	; (22fc <postfix_print+0x38>)
	color_postfix(output, (flags & LOG_OUTPUT_FLAG_COLORS),
			      level);
	newline_print(output, flags);
}
    22e4:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
		print_formatted(ctx, "\r\n");
    22e8:	f7ff bf38 	b.w	215c <print_formatted>
}
    22ec:	bd38      	pop	{r3, r4, r5, pc}
    22ee:	bf00      	nop
    22f0:	0000a655 	.word	0x0000a655
    22f4:	0000ad53 	.word	0x0000ad53
    22f8:	0000a693 	.word	0x0000a693
    22fc:	0000a692 	.word	0x0000a692

00002300 <hexdump_line_print>:
{
    2300:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
    2304:	461d      	mov	r5, r3
    2306:	9b08      	ldr	r3, [sp, #32]
    2308:	4617      	mov	r7, r2
	if ((flags & LOG_OUTPUT_FLAG_CRLF_NONE) != 0U) {
    230a:	06da      	lsls	r2, r3, #27
{
    230c:	4604      	mov	r4, r0
    230e:	460e      	mov	r6, r1
	if ((flags & LOG_OUTPUT_FLAG_CRLF_NONE) != 0U) {
    2310:	d405      	bmi.n	231e <hexdump_line_print+0x1e>
	if ((flags & LOG_OUTPUT_FLAG_CRLF_LFONLY) != 0U) {
    2312:	0699      	lsls	r1, r3, #26
		print_formatted(ctx, "\n");
    2314:	bf4c      	ite	mi
    2316:	492a      	ldrmi	r1, [pc, #168]	; (23c0 <hexdump_line_print+0xc0>)
		print_formatted(ctx, "\r\n");
    2318:	492a      	ldrpl	r1, [pc, #168]	; (23c4 <hexdump_line_print+0xc4>)
    231a:	f7ff ff1f 	bl	215c <print_formatted>
		print_formatted(output, " ");
    231e:	f8df 90ac 	ldr.w	r9, [pc, #172]	; 23cc <hexdump_line_print+0xcc>
{
    2322:	f04f 0800 	mov.w	r8, #0
	for (int i = 0; i < prefix_offset; i++) {
    2326:	45a8      	cmp	r8, r5
    2328:	db2a      	blt.n	2380 <hexdump_line_print+0x80>
			print_formatted(output, "   ");
    232a:	f8df 80a4 	ldr.w	r8, [pc, #164]	; 23d0 <hexdump_line_print+0xd0>
			print_formatted(output, "%02x ", data[i]);
    232e:	f8df 90a4 	ldr.w	r9, [pc, #164]	; 23d4 <hexdump_line_print+0xd4>
			print_formatted(output, " ");
    2332:	f8df a098 	ldr.w	sl, [pc, #152]	; 23cc <hexdump_line_print+0xcc>
	for (int i = 0; i < HEXDUMP_BYTES_IN_LINE; i++) {
    2336:	2500      	movs	r5, #0
		if (i < length) {
    2338:	42bd      	cmp	r5, r7
    233a:	d22f      	bcs.n	239c <hexdump_line_print+0x9c>
			print_formatted(output, "%02x ", data[i]);
    233c:	5d72      	ldrb	r2, [r6, r5]
    233e:	4649      	mov	r1, r9
    2340:	4620      	mov	r0, r4
    2342:	f7ff ff0b 	bl	215c <print_formatted>
	for (int i = 0; i < HEXDUMP_BYTES_IN_LINE; i++) {
    2346:	3501      	adds	r5, #1
    2348:	2d10      	cmp	r5, #16
    234a:	d120      	bne.n	238e <hexdump_line_print+0x8e>
	print_formatted(output, "|");
    234c:	491e      	ldr	r1, [pc, #120]	; (23c8 <hexdump_line_print+0xc8>)
			print_formatted(output, " ");
    234e:	f8df 807c 	ldr.w	r8, [pc, #124]	; 23cc <hexdump_line_print+0xcc>
			print_formatted(output, "%c",
    2352:	f8df 9084 	ldr.w	r9, [pc, #132]	; 23d8 <hexdump_line_print+0xd8>
	print_formatted(output, "|");
    2356:	4620      	mov	r0, r4
    2358:	f7ff ff00 	bl	215c <print_formatted>
	for (int i = 0; i < HEXDUMP_BYTES_IN_LINE; i++) {
    235c:	2500      	movs	r5, #0
		if (i < length) {
    235e:	42af      	cmp	r7, r5
    2360:	d928      	bls.n	23b4 <hexdump_line_print+0xb4>
			char c = (char)data[i];
    2362:	5d72      	ldrb	r2, [r6, r5]
			(((unsigned)c) <= (unsigned)'~'));
}

static inline int isprint(int c)
{
	return (int)((((unsigned)c) >= ' ') &&
    2364:	f1a2 0320 	sub.w	r3, r2, #32
    2368:	2b5f      	cmp	r3, #95	; 0x5f
			print_formatted(output, "%c",
    236a:	bf28      	it	cs
    236c:	222e      	movcs	r2, #46	; 0x2e
    236e:	4649      	mov	r1, r9
    2370:	4620      	mov	r0, r4
    2372:	f7ff fef3 	bl	215c <print_formatted>
	for (int i = 0; i < HEXDUMP_BYTES_IN_LINE; i++) {
    2376:	3501      	adds	r5, #1
    2378:	2d10      	cmp	r5, #16
    237a:	d114      	bne.n	23a6 <hexdump_line_print+0xa6>
}
    237c:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
		print_formatted(output, " ");
    2380:	4649      	mov	r1, r9
    2382:	4620      	mov	r0, r4
    2384:	f7ff feea 	bl	215c <print_formatted>
	for (int i = 0; i < prefix_offset; i++) {
    2388:	f108 0801 	add.w	r8, r8, #1
    238c:	e7cb      	b.n	2326 <hexdump_line_print+0x26>
		if (i > 0 && !(i % 8)) {
    238e:	076a      	lsls	r2, r5, #29
    2390:	d1d2      	bne.n	2338 <hexdump_line_print+0x38>
			print_formatted(output, " ");
    2392:	4651      	mov	r1, sl
    2394:	4620      	mov	r0, r4
    2396:	f7ff fee1 	bl	215c <print_formatted>
    239a:	e7cd      	b.n	2338 <hexdump_line_print+0x38>
			print_formatted(output, "   ");
    239c:	4641      	mov	r1, r8
    239e:	4620      	mov	r0, r4
    23a0:	f7ff fedc 	bl	215c <print_formatted>
    23a4:	e7cf      	b.n	2346 <hexdump_line_print+0x46>
		if (i > 0 && !(i % 8)) {
    23a6:	076b      	lsls	r3, r5, #29
    23a8:	d1d9      	bne.n	235e <hexdump_line_print+0x5e>
			print_formatted(output, " ");
    23aa:	4641      	mov	r1, r8
    23ac:	4620      	mov	r0, r4
    23ae:	f7ff fed5 	bl	215c <print_formatted>
    23b2:	e7d4      	b.n	235e <hexdump_line_print+0x5e>
			print_formatted(output, " ");
    23b4:	4641      	mov	r1, r8
    23b6:	4620      	mov	r0, r4
    23b8:	f7ff fed0 	bl	215c <print_formatted>
    23bc:	e7db      	b.n	2376 <hexdump_line_print+0x76>
    23be:	bf00      	nop
    23c0:	0000a693 	.word	0x0000a693
    23c4:	0000a692 	.word	0x0000a692
    23c8:	0000a69f 	.word	0x0000a69f
    23cc:	0000a69d 	.word	0x0000a69d
    23d0:	0000a69b 	.word	0x0000a69b
    23d4:	0000a695 	.word	0x0000a695
    23d8:	0000a6a1 	.word	0x0000a6a1

000023dc <log_output_msg_process>:

void log_output_msg_process(const struct log_output *output,
			    struct log_msg *msg,
			    uint32_t flags)
{
    23dc:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
	return msg->hdr.ids.level;
    23e0:	7a8b      	ldrb	r3, [r1, #10]
		log_output_msg_syst_process(output, msg, flags);
		return;
	}

	prefix_offset = raw_string ?
			0 : prefix_print(output, flags, std_msg, timestamp,
    23e2:	f013 0807 	ands.w	r8, r3, #7
{
    23e6:	4617      	mov	r7, r2
    23e8:	b08a      	sub	sp, #40	; 0x28
	return  (msg->hdr.params.generic.type == LOG_MSG_TYPE_STD);
    23ea:	7a0a      	ldrb	r2, [r1, #8]
    23ec:	4605      	mov	r5, r0
    23ee:	460e      	mov	r6, r1
			0 : prefix_print(output, flags, std_msg, timestamp,
    23f0:	d021      	beq.n	2436 <log_output_msg_process+0x5a>
	return msg->hdr.ids.source_id;
    23f2:	8949      	ldrh	r1, [r1, #10]
    23f4:	f3c3 03c2 	ubfx	r3, r3, #3, #3
    23f8:	f3c1 1189 	ubfx	r1, r1, #6, #10
	return  (msg->hdr.params.generic.type == LOG_MSG_TYPE_STD);
    23fc:	43d2      	mvns	r2, r2
    23fe:	e9cd 8300 	strd	r8, r3, [sp]
    2402:	9102      	str	r1, [sp, #8]
    2404:	68f3      	ldr	r3, [r6, #12]
    2406:	f002 0201 	and.w	r2, r2, #1
    240a:	4639      	mov	r1, r7
    240c:	f7ff feb8 	bl	2180 <prefix_print>
    2410:	4681      	mov	r9, r0
    2412:	7a34      	ldrb	r4, [r6, #8]
    2414:	43e4      	mvns	r4, r4
					 level, domain_id, source_id);

	if (log_msg_is_std(msg)) {
    2416:	f014 0401 	ands.w	r4, r4, #1
    241a:	d00e      	beq.n	243a <log_output_msg_process+0x5e>
		std_print(msg, output);
    241c:	4629      	mov	r1, r5
    241e:	4630      	mov	r0, r6
    2420:	f006 fc21 	bl	8c66 <std_print>
		raw_string_print(msg, output);
	} else {
		hexdump_print(msg, output, prefix_offset, flags);
	}

	if (!raw_string) {
    2424:	f1b8 0f00 	cmp.w	r8, #0
    2428:	d02b      	beq.n	2482 <log_output_msg_process+0xa6>
		postfix_print(output, flags, level);
    242a:	4642      	mov	r2, r8
    242c:	4639      	mov	r1, r7
    242e:	4628      	mov	r0, r5
    2430:	f7ff ff48 	bl	22c4 <postfix_print>
    2434:	e025      	b.n	2482 <log_output_msg_process+0xa6>
			0 : prefix_print(output, flags, std_msg, timestamp,
    2436:	46c1      	mov	r9, r8
    2438:	e7eb      	b.n	2412 <log_output_msg_process+0x36>
	} else if (raw_string) {
    243a:	f1b8 0f00 	cmp.w	r8, #0
    243e:	d126      	bne.n	248e <log_output_msg_process+0xb2>
	size_t offset = 0;
    2440:	4627      	mov	r7, r4
		length = output->size;
    2442:	68eb      	ldr	r3, [r5, #12]
    2444:	9306      	str	r3, [sp, #24]
		log_msg_hexdump_data_get(msg, output->buf, &length, offset);
    2446:	aa06      	add	r2, sp, #24
    2448:	463b      	mov	r3, r7
    244a:	68a9      	ldr	r1, [r5, #8]
    244c:	4630      	mov	r0, r6
    244e:	f006 fbf6 	bl	8c3e <log_msg_hexdump_data_get>
		output->control_block->offset = length;
    2452:	9a06      	ldr	r2, [sp, #24]
    2454:	686b      	ldr	r3, [r5, #4]
    2456:	601a      	str	r2, [r3, #0]
		if (length != 0) {
    2458:	b13a      	cbz	r2, 246a <log_output_msg_process+0x8e>
			eol = (output->buf[length - 1] == '\n');
    245a:	68ab      	ldr	r3, [r5, #8]
    245c:	4413      	add	r3, r2
    245e:	f813 4c01 	ldrb.w	r4, [r3, #-1]
    2462:	f1a4 030a 	sub.w	r3, r4, #10
    2466:	425c      	negs	r4, r3
    2468:	415c      	adcs	r4, r3
		log_output_flush(output);
    246a:	4628      	mov	r0, r5
    246c:	f006 fd58 	bl	8f20 <log_output_flush>
		offset += length;
    2470:	9b06      	ldr	r3, [sp, #24]
    2472:	441f      	add	r7, r3
	} while (length > 0);
    2474:	2b00      	cmp	r3, #0
    2476:	d1e4      	bne.n	2442 <log_output_msg_process+0x66>
	if (eol) {
    2478:	b11c      	cbz	r4, 2482 <log_output_msg_process+0xa6>
		print_formatted(output, "\r");
    247a:	4914      	ldr	r1, [pc, #80]	; (24cc <log_output_msg_process+0xf0>)
    247c:	4628      	mov	r0, r5
    247e:	f7ff fe6d 	bl	215c <print_formatted>
	}

	log_output_flush(output);
    2482:	4628      	mov	r0, r5
    2484:	f006 fd4c 	bl	8f20 <log_output_flush>
}
    2488:	b00a      	add	sp, #40	; 0x28
    248a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
	print_formatted(output, "%s", log_msg_str_get(msg));
    248e:	4630      	mov	r0, r6
    2490:	f006 fb7f 	bl	8b92 <log_msg_str_get>
    2494:	490e      	ldr	r1, [pc, #56]	; (24d0 <log_output_msg_process+0xf4>)
    2496:	4602      	mov	r2, r0
    2498:	4628      	mov	r0, r5
    249a:	f7ff fe5f 	bl	215c <print_formatted>
		length = sizeof(buf);
    249e:	f04f 0a10 	mov.w	sl, #16
		log_msg_hexdump_data_get(msg, buf, &length, offset);
    24a2:	aa05      	add	r2, sp, #20
    24a4:	4623      	mov	r3, r4
    24a6:	a906      	add	r1, sp, #24
    24a8:	4630      	mov	r0, r6
		length = sizeof(buf);
    24aa:	f8cd a014 	str.w	sl, [sp, #20]
		log_msg_hexdump_data_get(msg, buf, &length, offset);
    24ae:	f006 fbc6 	bl	8c3e <log_msg_hexdump_data_get>
		if (length) {
    24b2:	9a05      	ldr	r2, [sp, #20]
    24b4:	2a00      	cmp	r2, #0
    24b6:	d0b8      	beq.n	242a <log_output_msg_process+0x4e>
			hexdump_line_print(output, buf, length,
    24b8:	464b      	mov	r3, r9
    24ba:	9700      	str	r7, [sp, #0]
    24bc:	a906      	add	r1, sp, #24
    24be:	4628      	mov	r0, r5
    24c0:	f7ff ff1e 	bl	2300 <hexdump_line_print>
			offset += length;
    24c4:	9b05      	ldr	r3, [sp, #20]
    24c6:	441c      	add	r4, r3
		length = sizeof(buf);
    24c8:	e7eb      	b.n	24a2 <log_output_msg_process+0xc6>
    24ca:	bf00      	nop
    24cc:	0000a6a4 	.word	0x0000a6a4
    24d0:	0000ad53 	.word	0x0000ad53

000024d4 <log_output_dropped_process>:
	postfix_print(output, flags, level);
	log_output_flush(output);
}

void log_output_dropped_process(const struct log_output *output, uint32_t cnt)
{
    24d4:	b573      	push	{r0, r1, r4, r5, r6, lr}
	static const char postfix[] =
			" messages dropped ---\r\n" DROPPED_COLOR_POSTFIX;
	log_output_func_t outf = output->func;

	cnt = MIN(cnt, 9999);
	len = snprintk(buf, sizeof(buf), "%d", cnt);
    24d6:	f242 730f 	movw	r3, #9999	; 0x270f
    24da:	428b      	cmp	r3, r1
    24dc:	bf28      	it	cs
    24de:	460b      	movcs	r3, r1
	log_output_func_t outf = output->func;
    24e0:	6805      	ldr	r5, [r0, #0]
	len = snprintk(buf, sizeof(buf), "%d", cnt);
    24e2:	4a0f      	ldr	r2, [pc, #60]	; (2520 <log_output_dropped_process+0x4c>)
{
    24e4:	4604      	mov	r4, r0
	len = snprintk(buf, sizeof(buf), "%d", cnt);
    24e6:	2105      	movs	r1, #5
    24e8:	4668      	mov	r0, sp
    24ea:	f006 f943 	bl	8774 <snprintk>

	buffer_write(outf, (uint8_t *)prefix, sizeof(prefix) - 1,
    24ee:	6863      	ldr	r3, [r4, #4]
    24f0:	490c      	ldr	r1, [pc, #48]	; (2524 <log_output_dropped_process+0x50>)
    24f2:	685b      	ldr	r3, [r3, #4]
	len = snprintk(buf, sizeof(buf), "%d", cnt);
    24f4:	4606      	mov	r6, r0
	buffer_write(outf, (uint8_t *)prefix, sizeof(prefix) - 1,
    24f6:	220b      	movs	r2, #11
    24f8:	4628      	mov	r0, r5
    24fa:	f006 fba7 	bl	8c4c <buffer_write>
		     output->control_block->ctx);
	buffer_write(outf, buf, len, output->control_block->ctx);
    24fe:	6863      	ldr	r3, [r4, #4]
    2500:	4632      	mov	r2, r6
    2502:	4669      	mov	r1, sp
    2504:	4628      	mov	r0, r5
    2506:	685b      	ldr	r3, [r3, #4]
    2508:	f006 fba0 	bl	8c4c <buffer_write>
	buffer_write(outf, (uint8_t *)postfix, sizeof(postfix) - 1,
    250c:	6863      	ldr	r3, [r4, #4]
    250e:	4906      	ldr	r1, [pc, #24]	; (2528 <log_output_dropped_process+0x54>)
    2510:	685b      	ldr	r3, [r3, #4]
    2512:	221b      	movs	r2, #27
    2514:	4628      	mov	r0, r5
    2516:	f006 fb99 	bl	8c4c <buffer_write>
		     output->control_block->ctx);
}
    251a:	b002      	add	sp, #8
    251c:	bd70      	pop	{r4, r5, r6, pc}
    251e:	bf00      	nop
    2520:	0000add3 	.word	0x0000add3
    2524:	0000a6e2 	.word	0x0000a6e2
    2528:	0000a6c6 	.word	0x0000a6c6

0000252c <log_output_timestamp_freq_set>:

void log_output_timestamp_freq_set(uint32_t frequency)
{
	timestamp_div = 1U;
    252c:	4a08      	ldr	r2, [pc, #32]	; (2550 <log_output_timestamp_freq_set+0x24>)
{
    252e:	b510      	push	{r4, lr}
	timestamp_div = 1U;
    2530:	2301      	movs	r3, #1
	/* There is no point to have frequency higher than 1MHz (ns are not
	 * printed) and too high frequency leads to overflows in calculations.
	 */
	while (frequency > 1000000) {
    2532:	4c08      	ldr	r4, [pc, #32]	; (2554 <log_output_timestamp_freq_set+0x28>)
	timestamp_div = 1U;
    2534:	6013      	str	r3, [r2, #0]
	while (frequency > 1000000) {
    2536:	2100      	movs	r1, #0
    2538:	42a0      	cmp	r0, r4
    253a:	d804      	bhi.n	2546 <log_output_timestamp_freq_set+0x1a>
    253c:	b101      	cbz	r1, 2540 <log_output_timestamp_freq_set+0x14>
    253e:	6013      	str	r3, [r2, #0]
		frequency /= 2U;
		timestamp_div *= 2U;
	}

	freq = frequency;
    2540:	4b05      	ldr	r3, [pc, #20]	; (2558 <log_output_timestamp_freq_set+0x2c>)
    2542:	6018      	str	r0, [r3, #0]
}
    2544:	bd10      	pop	{r4, pc}
		frequency /= 2U;
    2546:	0840      	lsrs	r0, r0, #1
		timestamp_div *= 2U;
    2548:	005b      	lsls	r3, r3, #1
    254a:	2101      	movs	r1, #1
    254c:	e7f4      	b.n	2538 <log_output_timestamp_freq_set+0xc>
    254e:	bf00      	nop
    2550:	20001148 	.word	0x20001148
    2554:	000f4240 	.word	0x000f4240
    2558:	20001144 	.word	0x20001144

0000255c <char_out>:
		uart_poll_out(uart_dev, c);
	}
}

static int char_out(uint8_t *data, size_t length, void *ctx)
{
    255c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
		return length;
	}

	if (!IS_ENABLED(CONFIG_LOG_BACKEND_UART_ASYNC) || in_panic || !use_async) {
		for (size_t i = 0; i < length; i++) {
			uart_poll_out(uart_dev, data[i]);
    255e:	4f07      	ldr	r7, [pc, #28]	; (257c <char_out+0x20>)
{
    2560:	460d      	mov	r5, r1
    2562:	4604      	mov	r4, r0
    2564:	1846      	adds	r6, r0, r1
		for (size_t i = 0; i < length; i++) {
    2566:	42b4      	cmp	r4, r6
    2568:	d101      	bne.n	256e <char_out+0x12>
	__ASSERT_NO_MSG(err == 0);

	(void)err;

	return length;
}
    256a:	4628      	mov	r0, r5
    256c:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
			uart_poll_out(uart_dev, data[i]);
    256e:	6838      	ldr	r0, [r7, #0]
    2570:	f814 1b01 	ldrb.w	r1, [r4], #1
						unsigned char out_char)
{
	const struct uart_driver_api *api =
		(const struct uart_driver_api *)dev->api;

	api->poll_out(dev, out_char);
    2574:	6883      	ldr	r3, [r0, #8]
    2576:	685b      	ldr	r3, [r3, #4]
    2578:	4798      	blx	r3
		for (size_t i = 0; i < length; i++) {
    257a:	e7f4      	b.n	2566 <char_out+0xa>
    257c:	20001160 	.word	0x20001160

00002580 <log_backend_uart_init>:
	}
}

static void log_backend_uart_init(struct log_backend const *const backend)
{
	uart_dev = DEVICE_DT_GET(DT_CHOSEN(zephyr_console));
    2580:	4b01      	ldr	r3, [pc, #4]	; (2588 <log_backend_uart_init+0x8>)
    2582:	4a02      	ldr	r2, [pc, #8]	; (258c <log_backend_uart_init+0xc>)
    2584:	601a      	str	r2, [r3, #0]
		} else {
			LOG_WRN("Failed to initialize asynchronous mode (err:%d). "
				"Fallback to polling.", err);
		}
	}
}
    2586:	4770      	bx	lr
    2588:	20001160 	.word	0x20001160
    258c:	00009bd0 	.word	0x00009bd0

00002590 <panic>:

static void panic(struct log_backend const *const backend)
{
	in_panic = true;
    2590:	4b02      	ldr	r3, [pc, #8]	; (259c <panic+0xc>)
 * @param output	Log output instance.
 */
static inline void
log_backend_std_panic(const struct log_output *const output)
{
	log_output_flush(output);
    2592:	4803      	ldr	r0, [pc, #12]	; (25a0 <panic+0x10>)
    2594:	2201      	movs	r2, #1
    2596:	701a      	strb	r2, [r3, #0]
    2598:	f006 bcc2 	b.w	8f20 <log_output_flush>
    259c:	20001950 	.word	0x20001950
    25a0:	00009e7c 	.word	0x00009e7c

000025a4 <dropped>:
 * @param cnt		Number of dropped messages.
 */
static inline void
log_backend_std_dropped(const struct log_output *const output, uint32_t cnt)
{
	log_output_dropped_process(output, cnt);
    25a4:	4801      	ldr	r0, [pc, #4]	; (25ac <dropped+0x8>)
    25a6:	f7ff bf95 	b.w	24d4 <log_output_dropped_process>
    25aa:	bf00      	nop
    25ac:	00009e7c 	.word	0x00009e7c

000025b0 <put>:
{
    25b0:	b510      	push	{r4, lr}
	log_msg_get(msg);
    25b2:	4608      	mov	r0, r1
    25b4:	460c      	mov	r4, r1
    25b6:	f006 faaa 	bl	8b0e <log_msg_get>
	log_output_msg_process(output, msg, flags);
    25ba:	4805      	ldr	r0, [pc, #20]	; (25d0 <put+0x20>)
    25bc:	4621      	mov	r1, r4
    25be:	220f      	movs	r2, #15
    25c0:	f7ff ff0c 	bl	23dc <log_output_msg_process>
	log_msg_put(msg);
    25c4:	4620      	mov	r0, r4
}
    25c6:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    25ca:	f006 bacf 	b.w	8b6c <log_msg_put>
    25ce:	bf00      	nop
    25d0:	00009e7c 	.word	0x00009e7c

000025d4 <log_backend_rtt_init>:
{
	if (CONFIG_LOG_BACKEND_RTT_BUFFER > 0) {
		log_backend_rtt_cfg();
	}

	host_present = true;
    25d4:	4b01      	ldr	r3, [pc, #4]	; (25dc <log_backend_rtt_init+0x8>)
    25d6:	2201      	movs	r2, #1
    25d8:	701a      	strb	r2, [r3, #0]
	line_pos = line_buf;
}
    25da:	4770      	bx	lr
    25dc:	20001962 	.word	0x20001962

000025e0 <panic>:

static void panic(struct log_backend const *const backend)
{
	panic_mode = true;
    25e0:	4b02      	ldr	r3, [pc, #8]	; (25ec <panic+0xc>)
	log_output_flush(output);
    25e2:	4803      	ldr	r0, [pc, #12]	; (25f0 <panic+0x10>)
    25e4:	2201      	movs	r2, #1
    25e6:	701a      	strb	r2, [r3, #0]
    25e8:	f006 bc9a 	b.w	8f20 <log_output_flush>
    25ec:	20001963 	.word	0x20001963
    25f0:	00009ea8 	.word	0x00009ea8

000025f4 <dropped>:
	log_output_dropped_process(output, cnt);
    25f4:	4801      	ldr	r0, [pc, #4]	; (25fc <dropped+0x8>)
    25f6:	f7ff bf6d 	b.w	24d4 <log_output_dropped_process>
    25fa:	bf00      	nop
    25fc:	00009ea8 	.word	0x00009ea8

00002600 <put>:
{
    2600:	b510      	push	{r4, lr}
	log_msg_get(msg);
    2602:	4608      	mov	r0, r1
    2604:	460c      	mov	r4, r1
    2606:	f006 fa82 	bl	8b0e <log_msg_get>
	log_output_msg_process(output, msg, flags);
    260a:	4805      	ldr	r0, [pc, #20]	; (2620 <put+0x20>)
    260c:	4621      	mov	r1, r4
    260e:	220f      	movs	r2, #15
    2610:	f7ff fee4 	bl	23dc <log_output_msg_process>
	log_msg_put(msg);
    2614:	4620      	mov	r0, r4
}
    2616:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    261a:	f006 baa7 	b.w	8b6c <log_msg_put>
    261e:	bf00      	nop
    2620:	00009ea8 	.word	0x00009ea8

00002624 <on_failed_write.part.0>:
	return IS_ENABLED(CONFIG_LOG_IMMEDIATE) || panic_mode;
    2624:	4b05      	ldr	r3, [pc, #20]	; (263c <on_failed_write.part.0+0x18>)
	} else if (is_sync_mode()) {
    2626:	781b      	ldrb	r3, [r3, #0]
    2628:	b11b      	cbz	r3, 2632 <on_failed_write.part.0+0xe>
	z_impl_k_busy_wait(usec_to_wait);
    262a:	f241 3088 	movw	r0, #5000	; 0x1388
    262e:	f007 ba12 	b.w	9a56 <z_impl_k_busy_wait>
	return z_impl_k_sleep(timeout);
    2632:	20a4      	movs	r0, #164	; 0xa4
    2634:	2100      	movs	r1, #0
    2636:	f003 be59 	b.w	62ec <z_impl_k_sleep>
    263a:	bf00      	nop
    263c:	20001963 	.word	0x20001963

00002640 <data_out_block_mode>:
{
    2640:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
	return IS_ENABLED(CONFIG_LOG_IMMEDIATE) || panic_mode;
    2644:	f8df 9094 	ldr.w	r9, [pc, #148]	; 26dc <data_out_block_mode+0x9c>
	return z_impl_k_mutex_lock(mutex, timeout);
    2648:	f8df a094 	ldr.w	sl, [pc, #148]	; 26e0 <data_out_block_mode+0xa0>
{
    264c:	4680      	mov	r8, r0
    264e:	460f      	mov	r7, r1
	int retry_cnt = IS_ENABLED(CONFIG_LOG_BACKEND_RTT_MODE_BLOCK) ?
    2650:	2404      	movs	r4, #4
    2652:	46cb      	mov	fp, r9
		if (!is_sync_mode()) {
    2654:	f899 5000 	ldrb.w	r5, [r9]
    2658:	b9cd      	cbnz	r5, 268e <data_out_block_mode+0x4e>
    265a:	f04f 33ff 	mov.w	r3, #4294967295
    265e:	f04f 32ff 	mov.w	r2, #4294967295
    2662:	4650      	mov	r0, sl
    2664:	f003 fa4a 	bl	5afc <z_impl_k_mutex_lock>
			ret = SEGGER_RTT_WriteSkipNoLock(CONFIG_LOG_BACKEND_RTT_BUFFER,
    2668:	463a      	mov	r2, r7
    266a:	4641      	mov	r1, r8
    266c:	4628      	mov	r0, r5
    266e:	f002 ff75 	bl	555c <SEGGER_RTT_WriteSkipNoLock>
    2672:	4606      	mov	r6, r0
	return z_impl_k_mutex_unlock(mutex);
    2674:	4650      	mov	r0, sl
    2676:	f003 fabf 	bl	5bf8 <z_impl_k_mutex_unlock>
		if (ret) {
    267a:	4d17      	ldr	r5, [pc, #92]	; (26d8 <data_out_block_mode+0x98>)
    267c:	b1fe      	cbz	r6, 26be <data_out_block_mode+0x7e>
	host_present = true;
    267e:	2301      	movs	r3, #1
    2680:	702b      	strb	r3, [r5, #0]
	if (is_panic_mode()) {
    2682:	f89b 3000 	ldrb.w	r3, [fp]
    2686:	b96b      	cbnz	r3, 26a4 <data_out_block_mode+0x64>
}
    2688:	4638      	mov	r0, r7
    268a:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
			ret = SEGGER_RTT_WriteSkipNoLock(CONFIG_LOG_BACKEND_RTT_BUFFER,
    268e:	463a      	mov	r2, r7
    2690:	4641      	mov	r1, r8
    2692:	2000      	movs	r0, #0
    2694:	f002 ff62 	bl	555c <SEGGER_RTT_WriteSkipNoLock>
    2698:	4606      	mov	r6, r0
    269a:	e7ee      	b.n	267a <data_out_block_mode+0x3a>
	if (retry_cnt == 0) {
    269c:	b95c      	cbnz	r4, 26b6 <data_out_block_mode+0x76>
		host_present = false;
    269e:	702c      	strb	r4, [r5, #0]
    26a0:	f04f 34ff 	mov.w	r4, #4294967295
		while (SEGGER_RTT_HasDataUp(CONFIG_LOG_BACKEND_RTT_BUFFER) &&
    26a4:	2000      	movs	r0, #0
    26a6:	f002 ffa5 	bl	55f4 <SEGGER_RTT_HasDataUp>
    26aa:	2800      	cmp	r0, #0
    26ac:	d0ec      	beq.n	2688 <data_out_block_mode+0x48>
    26ae:	782b      	ldrb	r3, [r5, #0]
    26b0:	2b00      	cmp	r3, #0
    26b2:	d1f3      	bne.n	269c <data_out_block_mode+0x5c>
    26b4:	e7e8      	b.n	2688 <data_out_block_mode+0x48>
			on_failed_write(retry_cnt--);
    26b6:	3c01      	subs	r4, #1
    26b8:	f7ff ffb4 	bl	2624 <on_failed_write.part.0>
    26bc:	e7f2      	b.n	26a4 <data_out_block_mode+0x64>
		} else if (host_present) {
    26be:	782b      	ldrb	r3, [r5, #0]
    26c0:	b113      	cbz	r3, 26c8 <data_out_block_mode+0x88>
	if (retry_cnt == 0) {
    26c2:	3c01      	subs	r4, #1
    26c4:	d104      	bne.n	26d0 <data_out_block_mode+0x90>
		host_present = false;
    26c6:	702c      	strb	r4, [r5, #0]
	} while ((ret == 0) && host_present);
    26c8:	782b      	ldrb	r3, [r5, #0]
    26ca:	2b00      	cmp	r3, #0
    26cc:	d1c2      	bne.n	2654 <data_out_block_mode+0x14>
    26ce:	e7db      	b.n	2688 <data_out_block_mode+0x48>
    26d0:	f7ff ffa8 	bl	2624 <on_failed_write.part.0>
    26d4:	e7f8      	b.n	26c8 <data_out_block_mode+0x88>
    26d6:	bf00      	nop
    26d8:	20001962 	.word	0x20001962
    26dc:	20001963 	.word	0x20001963
    26e0:	200001a0 	.word	0x200001a0

000026e4 <flash_area_open>:

int flash_area_open(uint8_t id, const struct flash_area **fap)
{
	const struct flash_area *area;

	if (flash_map == NULL) {
    26e4:	4b0c      	ldr	r3, [pc, #48]	; (2718 <flash_area_open+0x34>)
    26e6:	681b      	ldr	r3, [r3, #0]
{
    26e8:	b570      	push	{r4, r5, r6, lr}
	if (flash_map == NULL) {
    26ea:	b173      	cbz	r3, 270a <flash_area_open+0x26>
extern const struct flash_area *flash_map;
extern const int flash_map_entries;

static inline struct flash_area const *get_flash_area_from_id(int idx)
{
	for (int i = 0; i < flash_map_entries; i++) {
    26ec:	4a0b      	ldr	r2, [pc, #44]	; (271c <flash_area_open+0x38>)
    26ee:	6815      	ldr	r5, [r2, #0]
    26f0:	2200      	movs	r2, #0
    26f2:	42aa      	cmp	r2, r5
    26f4:	db02      	blt.n	26fc <flash_area_open+0x18>
		return -EACCES;
	}

	area = get_flash_area_from_id(id);
	if (area == NULL) {
		return -ENOENT;
    26f6:	f06f 0001 	mvn.w	r0, #1
	}

	*fap = area;
	return 0;
}
    26fa:	bd70      	pop	{r4, r5, r6, pc}
		if (flash_map[i].fa_id == idx) {
    26fc:	461c      	mov	r4, r3
    26fe:	f813 6b10 	ldrb.w	r6, [r3], #16
    2702:	4286      	cmp	r6, r0
    2704:	d004      	beq.n	2710 <flash_area_open+0x2c>
	for (int i = 0; i < flash_map_entries; i++) {
    2706:	3201      	adds	r2, #1
    2708:	e7f3      	b.n	26f2 <flash_area_open+0xe>
		return -EACCES;
    270a:	f06f 000c 	mvn.w	r0, #12
    270e:	e7f4      	b.n	26fa <flash_area_open+0x16>
	*fap = area;
    2710:	600c      	str	r4, [r1, #0]
	return 0;
    2712:	2000      	movs	r0, #0
    2714:	e7f1      	b.n	26fa <flash_area_open+0x16>
    2716:	bf00      	nop
    2718:	20000010 	.word	0x20000010
    271c:	00009f28 	.word	0x00009f28

00002720 <flash_area_get_sectors>:

	return true;
}

int flash_area_get_sectors(int idx, uint32_t *cnt, struct flash_sector *ret)
{
    2720:	b570      	push	{r4, r5, r6, lr}
    2722:	b088      	sub	sp, #32
    2724:	4605      	mov	r5, r0
    2726:	460c      	mov	r4, r1
	int rc = flash_area_open(idx, &fa);
    2728:	b2c0      	uxtb	r0, r0
    272a:	4669      	mov	r1, sp
{
    272c:	4616      	mov	r6, r2
	int rc = flash_area_open(idx, &fa);
    272e:	f7ff ffd9 	bl	26e4 <flash_area_open>
	if (rc < 0 || fa == NULL) {
    2732:	2800      	cmp	r0, #0
    2734:	db1f      	blt.n	2776 <flash_area_get_sectors+0x56>
    2736:	9b00      	ldr	r3, [sp, #0]
    2738:	b1eb      	cbz	r3, 2776 <flash_area_get_sectors+0x56>
	cb_data->area_off = fa->fa_off;
    273a:	685a      	ldr	r2, [r3, #4]
    273c:	9202      	str	r2, [sp, #8]
	cb_data->area_len = fa->fa_size;
    273e:	689a      	ldr	r2, [r3, #8]
	cb_data->ret_len = *cnt;
    2740:	6821      	ldr	r1, [r4, #0]
	flash_dev = device_get_binding(fa->fa_dev_name);
    2742:	68d8      	ldr	r0, [r3, #12]
	cb_data->area_idx = idx;
    2744:	9501      	str	r5, [sp, #4]
	cb_data->ret = ret;
    2746:	e9cd 2603 	strd	r2, r6, [sp, #12]
	cb_data->ret_idx = 0U;
    274a:	2200      	movs	r2, #0
	cb_data->status = 0;
    274c:	e9cd 1206 	strd	r1, r2, [sp, #24]
	cb_data->ret_idx = 0U;
    2750:	9205      	str	r2, [sp, #20]
    2752:	f002 ff79 	bl	5648 <z_impl_device_get_binding>
    2756:	4605      	mov	r5, r0
	flash_area_close(fa);
    2758:	9800      	ldr	r0, [sp, #0]
    275a:	f006 fc09 	bl	8f70 <flash_area_close>
	if (flash_dev == NULL) {
    275e:	b16d      	cbz	r5, 277c <flash_area_get_sectors+0x5c>
	flash_page_foreach(flash_dev, cb, cb_data);
    2760:	4628      	mov	r0, r5
    2762:	4908      	ldr	r1, [pc, #32]	; (2784 <flash_area_get_sectors+0x64>)
    2764:	aa01      	add	r2, sp, #4
    2766:	f006 fe10 	bl	938a <flash_page_foreach>
	if (cb_data->status == 0) {
    276a:	9807      	ldr	r0, [sp, #28]
    276c:	b908      	cbnz	r0, 2772 <flash_area_get_sectors+0x52>
		*cnt = cb_data->ret_idx;
    276e:	9b05      	ldr	r3, [sp, #20]
    2770:	6023      	str	r3, [r4, #0]
	struct layout_data data;

	return flash_area_layout(idx, cnt, ret, get_sectors_cb, &data);
}
    2772:	b008      	add	sp, #32
    2774:	bd70      	pop	{r4, r5, r6, pc}
		return -EINVAL;
    2776:	f06f 0015 	mvn.w	r0, #21
    277a:	e7fa      	b.n	2772 <flash_area_get_sectors+0x52>
		return -ENODEV;
    277c:	f06f 0012 	mvn.w	r0, #18
	return flash_area_layout(idx, cnt, ret, get_sectors_cb, &data);
    2780:	e7f7      	b.n	2772 <flash_area_get_sectors+0x52>
    2782:	bf00      	nop
    2784:	00009089 	.word	0x00009089

00002788 <nrf_cc3xx_platform_abort_init>:

/** @brief Function to initialize the nrf_cc3xx_platform abort APIs.
 */
void nrf_cc3xx_platform_abort_init(void)
{
	nrf_cc3xx_platform_set_abort(&apis);
    2788:	4801      	ldr	r0, [pc, #4]	; (2790 <nrf_cc3xx_platform_abort_init+0x8>)
    278a:	f004 b899 	b.w	68c0 <nrf_cc3xx_platform_set_abort>
    278e:	bf00      	nop
    2790:	00009f2c 	.word	0x00009f2c

00002794 <mutex_unlock_platform>:
    }
}

/** @brief Static function to unlock a mutex
 */
static int32_t mutex_unlock_platform(nrf_cc3xx_platform_mutex_t *mutex) {
    2794:	b508      	push	{r3, lr}
    struct k_mutex * p_mutex;

    /* Ensure that the mutex param is valid (not NULL) */
    if(mutex == NULL) {
    2796:	b1d0      	cbz	r0, 27ce <mutex_unlock_platform+0x3a>
        return NRF_CC3XX_PLATFORM_ERROR_PARAM_NULL;
    }

    switch (mutex->flags)
    2798:	6843      	ldr	r3, [r0, #4]
    279a:	2b04      	cmp	r3, #4
    279c:	d111      	bne.n	27c2 <mutex_unlock_platform+0x2e>
	return __atomic_compare_exchange_n(target, &old_value, new_value,
    279e:	2200      	movs	r2, #0
    27a0:	6803      	ldr	r3, [r0, #0]
    27a2:	f3bf 8f5b 	dmb	ish
    27a6:	e853 1f00 	ldrex	r1, [r3]
    27aa:	2901      	cmp	r1, #1
    27ac:	d103      	bne.n	27b6 <mutex_unlock_platform+0x22>
    27ae:	e843 2000 	strex	r0, r2, [r3]
    27b2:	2800      	cmp	r0, #0
    27b4:	d1f7      	bne.n	27a6 <mutex_unlock_platform+0x12>
    27b6:	f3bf 8f5b 	dmb	ish
    {
    case NRF_CC3XX_PLATFORM_MUTEX_MASK_IS_ATOMIC:
        return atomic_cas((atomic_t *)mutex->mutex, 1, 0) ?
                       NRF_CC3XX_PLATFORM_SUCCESS :
    27ba:	4807      	ldr	r0, [pc, #28]	; (27d8 <mutex_unlock_platform+0x44>)
    27bc:	bf08      	it	eq
    27be:	4610      	moveq	r0, r2
        p_mutex = (struct k_mutex *)mutex->mutex;

        k_mutex_unlock(p_mutex);
        return NRF_CC3XX_PLATFORM_SUCCESS;
    }
}
    27c0:	bd08      	pop	{r3, pc}
        if (mutex->flags == NRF_CC3XX_PLATFORM_MUTEX_MASK_INVALID) {
    27c2:	b13b      	cbz	r3, 27d4 <mutex_unlock_platform+0x40>
        p_mutex = (struct k_mutex *)mutex->mutex;
    27c4:	6800      	ldr	r0, [r0, #0]
    27c6:	f003 fa17 	bl	5bf8 <z_impl_k_mutex_unlock>
        return NRF_CC3XX_PLATFORM_SUCCESS;
    27ca:	2000      	movs	r0, #0
    27cc:	e7f8      	b.n	27c0 <mutex_unlock_platform+0x2c>
        return NRF_CC3XX_PLATFORM_ERROR_PARAM_NULL;
    27ce:	f46f 40e0 	mvn.w	r0, #28672	; 0x7000
    27d2:	e7f5      	b.n	27c0 <mutex_unlock_platform+0x2c>
            return NRF_CC3XX_PLATFORM_ERROR_MUTEX_NOT_INITIALIZED;
    27d4:	4801      	ldr	r0, [pc, #4]	; (27dc <mutex_unlock_platform+0x48>)
    27d6:	e7f3      	b.n	27c0 <mutex_unlock_platform+0x2c>
    27d8:	ffff8fe9 	.word	0xffff8fe9
    27dc:	ffff8fea 	.word	0xffff8fea

000027e0 <mutex_free_platform>:
static void mutex_free_platform(nrf_cc3xx_platform_mutex_t *mutex) {
    27e0:	b510      	push	{r4, lr}
    if (mutex == NULL) {
    27e2:	4604      	mov	r4, r0
    27e4:	b918      	cbnz	r0, 27ee <mutex_free_platform+0xe>
        platform_abort_apis.abort_fn(
    27e6:	4b0d      	ldr	r3, [pc, #52]	; (281c <CONFIG_MAIN_STACK_SIZE+0x1c>)
    27e8:	480d      	ldr	r0, [pc, #52]	; (2820 <CONFIG_MAIN_STACK_SIZE+0x20>)
    27ea:	685b      	ldr	r3, [r3, #4]
    27ec:	4798      	blx	r3
    if (mutex->flags == NRF_CC3XX_PLATFORM_MUTEX_MASK_IS_ATOMIC ||
    27ee:	6861      	ldr	r1, [r4, #4]
    27f0:	2908      	cmp	r1, #8
    27f2:	d00d      	beq.n	2810 <CONFIG_MAIN_STACK_SIZE+0x10>
    if (mutex->flags == NRF_CC3XX_PLATFORM_MUTEX_MASK_INVALID) {
    27f4:	f031 0304 	bics.w	r3, r1, #4
    27f8:	d00a      	beq.n	2810 <CONFIG_MAIN_STACK_SIZE+0x10>
    if ((mutex->flags & NRF_CC3XX_PLATFORM_MUTEX_MASK_IS_ALLOCATED) != 0) {
    27fa:	f011 0102 	ands.w	r1, r1, #2
    27fe:	d008      	beq.n	2812 <CONFIG_MAIN_STACK_SIZE+0x12>
        k_mem_slab_free(&mutex_slab, &mutex->mutex);
    2800:	4808      	ldr	r0, [pc, #32]	; (2824 <CONFIG_MAIN_STACK_SIZE+0x24>)
    2802:	4621      	mov	r1, r4
    2804:	f006 ffd1 	bl	97aa <k_mem_slab_free>
        mutex->mutex = NULL;
    2808:	2300      	movs	r3, #0
    280a:	6023      	str	r3, [r4, #0]
    mutex->flags = NRF_CC3XX_PLATFORM_MUTEX_MASK_INVALID;
    280c:	2300      	movs	r3, #0
    280e:	6063      	str	r3, [r4, #4]
}
    2810:	bd10      	pop	{r4, pc}
        memset(mutex->mutex, 0, sizeof(struct k_mutex));
    2812:	6820      	ldr	r0, [r4, #0]
    2814:	2214      	movs	r2, #20
    2816:	f006 fcb3 	bl	9180 <memset>
    281a:	e7f7      	b.n	280c <CONFIG_MAIN_STACK_SIZE+0xc>
    281c:	200000ec 	.word	0x200000ec
    2820:	0000a70f 	.word	0x0000a70f
    2824:	20001178 	.word	0x20001178

00002828 <mutex_init_platform>:
static void mutex_init_platform(nrf_cc3xx_platform_mutex_t *mutex) {
    2828:	b510      	push	{r4, lr}
    if (mutex == NULL) {
    282a:	4604      	mov	r4, r0
    282c:	b918      	cbnz	r0, 2836 <mutex_init_platform+0xe>
        platform_abort_apis.abort_fn(
    282e:	4b16      	ldr	r3, [pc, #88]	; (2888 <mutex_init_platform+0x60>)
    2830:	4816      	ldr	r0, [pc, #88]	; (288c <mutex_init_platform+0x64>)
    2832:	685b      	ldr	r3, [r3, #4]
    2834:	4798      	blx	r3
    if (mutex->flags == NRF_CC3XX_PLATFORM_MUTEX_MASK_IS_ATOMIC ||
    2836:	6863      	ldr	r3, [r4, #4]
    2838:	2b04      	cmp	r3, #4
    283a:	d023      	beq.n	2884 <mutex_init_platform+0x5c>
    283c:	2b08      	cmp	r3, #8
    283e:	d021      	beq.n	2884 <mutex_init_platform+0x5c>
    if (mutex->flags == NRF_CC3XX_PLATFORM_MUTEX_MASK_INVALID &&
    2840:	b9cb      	cbnz	r3, 2876 <mutex_init_platform+0x4e>
    2842:	6823      	ldr	r3, [r4, #0]
    2844:	b9bb      	cbnz	r3, 2876 <mutex_init_platform+0x4e>
        ret = k_mem_slab_alloc(&mutex_slab, &mutex->mutex, K_FOREVER);
    2846:	4812      	ldr	r0, [pc, #72]	; (2890 <mutex_init_platform+0x68>)
    2848:	f04f 32ff 	mov.w	r2, #4294967295
    284c:	f04f 33ff 	mov.w	r3, #4294967295
    2850:	4621      	mov	r1, r4
    2852:	f003 f867 	bl	5924 <k_mem_slab_alloc>
        if(ret != 0 || mutex->mutex == NULL)
    2856:	b908      	cbnz	r0, 285c <mutex_init_platform+0x34>
    2858:	6823      	ldr	r3, [r4, #0]
    285a:	b91b      	cbnz	r3, 2864 <mutex_init_platform+0x3c>
            platform_abort_apis.abort_fn(
    285c:	4b0a      	ldr	r3, [pc, #40]	; (2888 <mutex_init_platform+0x60>)
    285e:	480d      	ldr	r0, [pc, #52]	; (2894 <mutex_init_platform+0x6c>)
    2860:	685b      	ldr	r3, [r3, #4]
    2862:	4798      	blx	r3
        memset(mutex->mutex, 0, sizeof(struct k_mutex));
    2864:	6820      	ldr	r0, [r4, #0]
    2866:	2214      	movs	r2, #20
    2868:	2100      	movs	r1, #0
    286a:	f006 fc89 	bl	9180 <memset>
        mutex->flags |= NRF_CC3XX_PLATFORM_MUTEX_MASK_IS_ALLOCATED;
    286e:	6863      	ldr	r3, [r4, #4]
    2870:	f043 0302 	orr.w	r3, r3, #2
    2874:	6063      	str	r3, [r4, #4]
    p_mutex = (struct k_mutex *)mutex->mutex;
    2876:	6820      	ldr	r0, [r4, #0]
	return z_impl_k_mutex_init(mutex);
    2878:	f006 ffd7 	bl	982a <z_impl_k_mutex_init>
    mutex->flags |= NRF_CC3XX_PLATFORM_MUTEX_MASK_IS_VALID;
    287c:	6863      	ldr	r3, [r4, #4]
    287e:	f043 0301 	orr.w	r3, r3, #1
    2882:	6063      	str	r3, [r4, #4]
}
    2884:	bd10      	pop	{r4, pc}
    2886:	bf00      	nop
    2888:	200000ec 	.word	0x200000ec
    288c:	0000a70f 	.word	0x0000a70f
    2890:	20001178 	.word	0x20001178
    2894:	0000a735 	.word	0x0000a735

00002898 <mutex_lock_platform>:
static int32_t mutex_lock_platform(nrf_cc3xx_platform_mutex_t *mutex) {
    2898:	b508      	push	{r3, lr}
    if(mutex == NULL) {
    289a:	b308      	cbz	r0, 28e0 <mutex_lock_platform+0x48>
    switch (mutex->flags) {
    289c:	6843      	ldr	r3, [r0, #4]
    289e:	2b04      	cmp	r3, #4
    28a0:	d110      	bne.n	28c4 <mutex_lock_platform+0x2c>
    28a2:	2201      	movs	r2, #1
    28a4:	6803      	ldr	r3, [r0, #0]
    28a6:	f3bf 8f5b 	dmb	ish
    28aa:	e853 1f00 	ldrex	r1, [r3]
    28ae:	2900      	cmp	r1, #0
    28b0:	d103      	bne.n	28ba <mutex_lock_platform+0x22>
    28b2:	e843 2000 	strex	r0, r2, [r3]
    28b6:	2800      	cmp	r0, #0
    28b8:	d1f7      	bne.n	28aa <mutex_lock_platform+0x12>
    28ba:	f3bf 8f5b 	dmb	ish
                       NRF_CC3XX_PLATFORM_SUCCESS :
    28be:	d10b      	bne.n	28d8 <mutex_lock_platform+0x40>
    28c0:	2000      	movs	r0, #0
}
    28c2:	bd08      	pop	{r3, pc}
        if (mutex->flags == NRF_CC3XX_PLATFORM_MUTEX_MASK_INVALID) {
    28c4:	b153      	cbz	r3, 28dc <mutex_lock_platform+0x44>
        p_mutex = (struct k_mutex *)mutex->mutex;
    28c6:	6800      	ldr	r0, [r0, #0]
	return z_impl_k_mutex_lock(mutex, timeout);
    28c8:	f04f 32ff 	mov.w	r2, #4294967295
    28cc:	f04f 33ff 	mov.w	r3, #4294967295
    28d0:	f003 f914 	bl	5afc <z_impl_k_mutex_lock>
        if (ret == 0) {
    28d4:	2800      	cmp	r0, #0
    28d6:	d0f3      	beq.n	28c0 <mutex_lock_platform+0x28>
                       NRF_CC3XX_PLATFORM_SUCCESS :
    28d8:	4803      	ldr	r0, [pc, #12]	; (28e8 <mutex_lock_platform+0x50>)
    28da:	e7f2      	b.n	28c2 <mutex_lock_platform+0x2a>
            return NRF_CC3XX_PLATFORM_ERROR_MUTEX_NOT_INITIALIZED;
    28dc:	4803      	ldr	r0, [pc, #12]	; (28ec <mutex_lock_platform+0x54>)
    28de:	e7f0      	b.n	28c2 <mutex_lock_platform+0x2a>
        return NRF_CC3XX_PLATFORM_ERROR_PARAM_NULL;
    28e0:	f46f 40e0 	mvn.w	r0, #28672	; 0x7000
    28e4:	e7ed      	b.n	28c2 <mutex_lock_platform+0x2a>
    28e6:	bf00      	nop
    28e8:	ffff8fe9 	.word	0xffff8fe9
    28ec:	ffff8fea 	.word	0xffff8fea

000028f0 <nrf_cc3xx_platform_mutex_init>:
};

/** @brief Function to initialize the nrf_cc3xx_platform mutex APIs
 */
void nrf_cc3xx_platform_mutex_init(void)
{
    28f0:	b508      	push	{r3, lr}
    k_mem_slab_init(&mutex_slab,
    28f2:	4906      	ldr	r1, [pc, #24]	; (290c <nrf_cc3xx_platform_mutex_init+0x1c>)
    28f4:	4806      	ldr	r0, [pc, #24]	; (2910 <nrf_cc3xx_platform_mutex_init+0x20>)
    28f6:	2340      	movs	r3, #64	; 0x40
    28f8:	2214      	movs	r2, #20
    28fa:	f006 ff3b 	bl	9774 <k_mem_slab_init>
                mutex_slab_buffer,
                sizeof(struct k_mutex),
                NUM_MUTEXES);

    nrf_cc3xx_platform_set_mutexes(&mutex_apis, &mutexes);
}
    28fe:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
    nrf_cc3xx_platform_set_mutexes(&mutex_apis, &mutexes);
    2902:	4904      	ldr	r1, [pc, #16]	; (2914 <nrf_cc3xx_platform_mutex_init+0x24>)
    2904:	4804      	ldr	r0, [pc, #16]	; (2918 <nrf_cc3xx_platform_mutex_init+0x28>)
    2906:	f004 b83d 	b.w	6984 <nrf_cc3xx_platform_set_mutexes>
    290a:	bf00      	nop
    290c:	20001194 	.word	0x20001194
    2910:	20001178 	.word	0x20001178
    2914:	00009f44 	.word	0x00009f44
    2918:	00009f34 	.word	0x00009f34

0000291c <z_arm_cpu_idle_init>:
 * void z_arm_cpu_idle_init(void);
 */

SECTION_FUNC(TEXT, z_arm_cpu_idle_init)
#if defined(CONFIG_CPU_CORTEX_M)
	ldr	r1, =_SCB_SCR
    291c:	4901      	ldr	r1, [pc, #4]	; (2924 <z_arm_cpu_idle_init+0x8>)
	movs.n	r2, #_SCR_INIT_BITS
    291e:	2210      	movs	r2, #16
	str	r2, [r1]
    2920:	600a      	str	r2, [r1, #0]
#endif
	bx	lr
    2922:	4770      	bx	lr
	ldr	r1, =_SCB_SCR
    2924:	e000ed10 	.word	0xe000ed10

00002928 <arch_cpu_idle>:
	 * before entering low power state.
	 *
	 * Set PRIMASK before configuring BASEPRI to prevent interruption
	 * before wake-up.
	 */
	cpsid	i
    2928:	b672      	cpsid	i

	/*
	 * Set wake-up interrupt priority to the lowest and synchronise to
	 * ensure that this is visible to the WFI instruction.
	 */
	eors.n	r0, r0
    292a:	4040      	eors	r0, r0
	msr	BASEPRI, r0
    292c:	f380 8811 	msr	BASEPRI, r0
	isb
    2930:	f3bf 8f6f 	isb	sy

	/*
	 * Wait for all memory transactions to complete before entering low
	 * power state.
	 */
	dsb
    2934:	f3bf 8f4f 	dsb	sy

	/* Enter low power state */
	wfi
    2938:	bf30      	wfi

	/*
	 * Clear PRIMASK and flush instruction buffer to immediately service
	 * the wake-up interrupt.
	 */
	cpsie	i
    293a:	b662      	cpsie	i
	isb
    293c:	f3bf 8f6f 	isb	sy

	bx	lr
    2940:	4770      	bx	lr
    2942:	bf00      	nop

00002944 <arch_cpu_atomic_idle>:

	/*
	 * Lock PRIMASK while sleeping: wfe will still get interrupted by
	 * incoming interrupts but the CPU will not service them right away.
	 */
	cpsid	i
    2944:	b672      	cpsid	i
	cpsie	i
_irq_disabled:

#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	/* r1: zero, for setting BASEPRI (needs a register) */
	eors.n	r1, r1
    2946:	4049      	eors	r1, r1

	/* unlock BASEPRI so wfe gets interrupted by incoming interrupts */
	msr	BASEPRI, r1
    2948:	f381 8811 	msr	BASEPRI, r1

	wfe
    294c:	bf20      	wfe

	msr	BASEPRI, r0
    294e:	f380 8811 	msr	BASEPRI, r0
	cpsie	i
    2952:	b662      	cpsie	i
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
	bx	lr
    2954:	4770      	bx	lr
    2956:	bf00      	nop

00002958 <z_arm_fatal_error>:
	LOG_ERR("Faulting instruction address (r15/pc): 0x%08x",
		esf->basic.pc);
}

void z_arm_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
{
    2958:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
    295c:	4606      	mov	r6, r0
    295e:	b08b      	sub	sp, #44	; 0x2c

	if (esf != NULL) {
    2960:	460d      	mov	r5, r1
    2962:	2900      	cmp	r1, #0
    2964:	d054      	beq.n	2a10 <z_arm_fatal_error+0xb8>
    2966:	4b2e      	ldr	r3, [pc, #184]	; (2a20 <z_arm_fatal_error+0xc8>)
    2968:	4c2e      	ldr	r4, [pc, #184]	; (2a24 <z_arm_fatal_error+0xcc>)
	LOG_ERR("r0/a1:  0x%08x  r1/a2:  0x%08x  r2/a3:  0x%08x",
    296a:	482f      	ldr	r0, [pc, #188]	; (2a28 <z_arm_fatal_error+0xd0>)
		LOG_ERR("s[%2d]:  0x%08x  s[%2d]:  0x%08x"
    296c:	f8df 90cc 	ldr.w	r9, [pc, #204]	; 2a3c <z_arm_fatal_error+0xe4>
    2970:	1ae4      	subs	r4, r4, r3
    2972:	08e4      	lsrs	r4, r4, #3
	LOG_ERR("r0/a1:  0x%08x  r1/a2:  0x%08x  r2/a3:  0x%08x",
    2974:	01a4      	lsls	r4, r4, #6
    2976:	f044 0401 	orr.w	r4, r4, #1
    297a:	f8ad 4000 	strh.w	r4, [sp]
    297e:	e9d1 2301 	ldrd	r2, r3, [r1, #4]
    2982:	6809      	ldr	r1, [r1, #0]
    2984:	f006 f841 	bl	8a0a <log_3>
	LOG_ERR("r3/a4:  0x%08x r12/ip:  0x%08x r14/lr:  0x%08x",
    2988:	f8ad 4000 	strh.w	r4, [sp]
    298c:	e9d5 2304 	ldrd	r2, r3, [r5, #16]
    2990:	68e9      	ldr	r1, [r5, #12]
    2992:	4826      	ldr	r0, [pc, #152]	; (2a2c <z_arm_fatal_error+0xd4>)
    2994:	f006 f839 	bl	8a0a <log_3>
	LOG_ERR(" xpsr:  0x%08x", esf->basic.xpsr);
    2998:	69e9      	ldr	r1, [r5, #28]
    299a:	4825      	ldr	r0, [pc, #148]	; (2a30 <z_arm_fatal_error+0xd8>)
    299c:	4622      	mov	r2, r4
    299e:	f006 f804 	bl	89aa <log_1>
	for (int i = 0; i < ARRAY_SIZE(esf->s); i += 4) {
    29a2:	46a8      	mov	r8, r5
    29a4:	2700      	movs	r7, #0
		LOG_ERR("s[%2d]:  0x%08x  s[%2d]:  0x%08x"
    29a6:	edd8 7a08 	vldr	s15, [r8, #32]
    29aa:	9702      	str	r7, [sp, #8]
    29ac:	eefc 7ae7 	vcvt.u32.f32	s15, s15
    29b0:	1c7b      	adds	r3, r7, #1
    29b2:	edcd 7a03 	vstr	s15, [sp, #12]
    29b6:	edd8 7a09 	vldr	s15, [r8, #36]	; 0x24
    29ba:	9304      	str	r3, [sp, #16]
    29bc:	eefc 7ae7 	vcvt.u32.f32	s15, s15
    29c0:	1cbb      	adds	r3, r7, #2
    29c2:	edcd 7a05 	vstr	s15, [sp, #20]
    29c6:	edd8 7a0a 	vldr	s15, [r8, #40]	; 0x28
    29ca:	9306      	str	r3, [sp, #24]
    29cc:	eefc 7ae7 	vcvt.u32.f32	s15, s15
    29d0:	1cfb      	adds	r3, r7, #3
    29d2:	edcd 7a07 	vstr	s15, [sp, #28]
    29d6:	edd8 7a0b 	vldr	s15, [r8, #44]	; 0x2c
    29da:	9308      	str	r3, [sp, #32]
    29dc:	eefc 7ae7 	vcvt.u32.f32	s15, s15
    29e0:	2208      	movs	r2, #8
    29e2:	4623      	mov	r3, r4
    29e4:	eb0d 0102 	add.w	r1, sp, r2
    29e8:	4648      	mov	r0, r9
	for (int i = 0; i < ARRAY_SIZE(esf->s); i += 4) {
    29ea:	3704      	adds	r7, #4
		LOG_ERR("s[%2d]:  0x%08x  s[%2d]:  0x%08x"
    29ec:	edcd 7a09 	vstr	s15, [sp, #36]	; 0x24
    29f0:	f006 f82a 	bl	8a48 <log_n>
	for (int i = 0; i < ARRAY_SIZE(esf->s); i += 4) {
    29f4:	2f10      	cmp	r7, #16
    29f6:	f108 0810 	add.w	r8, r8, #16
    29fa:	d1d4      	bne.n	29a6 <z_arm_fatal_error+0x4e>
	LOG_ERR("fpscr:  0x%08x", esf->fpscr);
    29fc:	6e29      	ldr	r1, [r5, #96]	; 0x60
    29fe:	480d      	ldr	r0, [pc, #52]	; (2a34 <z_arm_fatal_error+0xdc>)
    2a00:	4622      	mov	r2, r4
    2a02:	f005 ffd2 	bl	89aa <log_1>
	LOG_ERR("Faulting instruction address (r15/pc): 0x%08x",
    2a06:	69a9      	ldr	r1, [r5, #24]
    2a08:	480b      	ldr	r0, [pc, #44]	; (2a38 <z_arm_fatal_error+0xe0>)
    2a0a:	4622      	mov	r2, r4
    2a0c:	f005 ffcd 	bl	89aa <log_1>
		esf_dump(esf);
	}
	z_fatal_error(reason, esf);
    2a10:	4629      	mov	r1, r5
    2a12:	4630      	mov	r0, r6
    2a14:	f002 fe44 	bl	56a0 <z_fatal_error>
}
    2a18:	b00b      	add	sp, #44	; 0x2c
    2a1a:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
    2a1e:	bf00      	nop
    2a20:	00009d80 	.word	0x00009d80
    2a24:	00009da8 	.word	0x00009da8
    2a28:	0000a762 	.word	0x0000a762
    2a2c:	0000a791 	.word	0x0000a791
    2a30:	0000a7c0 	.word	0x0000a7c0
    2a34:	0000a812 	.word	0x0000a812
    2a38:	0000a821 	.word	0x0000a821
    2a3c:	0000a7cf 	.word	0x0000a7cf

00002a40 <arch_irq_enable>:
#define REG_FROM_IRQ(irq) (irq / NUM_IRQS_PER_REG)
#define BIT_FROM_IRQ(irq) (irq % NUM_IRQS_PER_REG)

void arch_irq_enable(unsigned int irq)
{
	NVIC_EnableIRQ((IRQn_Type)irq);
    2a40:	b243      	sxtb	r3, r0
  \param [in]      IRQn  Device specific interrupt number.
  \note    IRQn must not be negative.
 */
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
  if ((int32_t)(IRQn) >= 0)
    2a42:	2b00      	cmp	r3, #0
    2a44:	db08      	blt.n	2a58 <arch_irq_enable+0x18>
  {
    __COMPILER_BARRIER();
    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    2a46:	2201      	movs	r2, #1
    2a48:	f000 001f 	and.w	r0, r0, #31
    2a4c:	fa02 f000 	lsl.w	r0, r2, r0
    2a50:	095b      	lsrs	r3, r3, #5
    2a52:	4a02      	ldr	r2, [pc, #8]	; (2a5c <arch_irq_enable+0x1c>)
    2a54:	f842 0023 	str.w	r0, [r2, r3, lsl #2]
}
    2a58:	4770      	bx	lr
    2a5a:	bf00      	nop
    2a5c:	e000e100 	.word	0xe000e100

00002a60 <arch_irq_is_enabled>:
	NVIC_DisableIRQ((IRQn_Type)irq);
}

int arch_irq_is_enabled(unsigned int irq)
{
	return NVIC->ISER[REG_FROM_IRQ(irq)] & BIT(BIT_FROM_IRQ(irq));
    2a60:	4b05      	ldr	r3, [pc, #20]	; (2a78 <arch_irq_is_enabled+0x18>)
    2a62:	0942      	lsrs	r2, r0, #5
    2a64:	f000 001f 	and.w	r0, r0, #31
    2a68:	f853 2022 	ldr.w	r2, [r3, r2, lsl #2]
    2a6c:	2301      	movs	r3, #1
    2a6e:	fa03 f000 	lsl.w	r0, r3, r0
}
    2a72:	4010      	ands	r0, r2
    2a74:	4770      	bx	lr
    2a76:	bf00      	nop
    2a78:	e000e100 	.word	0xe000e100

00002a7c <z_arm_irq_priority_set>:
	 */
	__ASSERT(prio <= (BIT(NUM_IRQ_PRIO_BITS) - 1),
		 "invalid priority %d for %d irq! values must be less than %lu\n",
		 prio - _IRQ_PRIO_OFFSET, irq,
		 BIT(NUM_IRQ_PRIO_BITS) - (_IRQ_PRIO_OFFSET));
	NVIC_SetPriority((IRQn_Type)irq, prio);
    2a7c:	b243      	sxtb	r3, r0
  \param [in]  priority  Priority to set.
  \note    The priority cannot be set for every processor exception.
 */
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
  if ((int32_t)(IRQn) >= 0)
    2a7e:	2b00      	cmp	r3, #0
  {
    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    2a80:	bfa8      	it	ge
    2a82:	f103 4360 	addge.w	r3, r3, #3758096384	; 0xe0000000
		prio += _IRQ_PRIO_OFFSET;
    2a86:	f101 0101 	add.w	r1, r1, #1
  }
  else
  {
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    2a8a:	bfb8      	it	lt
    2a8c:	4b06      	ldrlt	r3, [pc, #24]	; (2aa8 <z_arm_irq_priority_set+0x2c>)
    2a8e:	ea4f 1141 	mov.w	r1, r1, lsl #5
    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    2a92:	bfac      	ite	ge
    2a94:	f503 4361 	addge.w	r3, r3, #57600	; 0xe100
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    2a98:	f000 000f 	andlt.w	r0, r0, #15
    2a9c:	b2c9      	uxtb	r1, r1
    2a9e:	bfb4      	ite	lt
    2aa0:	5419      	strblt	r1, [r3, r0]
    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    2aa2:	f883 1300 	strbge.w	r1, [r3, #768]	; 0x300
}
    2aa6:	4770      	bx	lr
    2aa8:	e000ed14 	.word	0xe000ed14

00002aac <z_SysNmiOnReset>:
_ASM_FILE_PROLOGUE

GTEXT(z_SysNmiOnReset)

SECTION_FUNC(TEXT, z_SysNmiOnReset)
    wfi
    2aac:	bf30      	wfi
    b z_SysNmiOnReset
    2aae:	f7ff bffd 	b.w	2aac <z_SysNmiOnReset>
    2ab2:	bf00      	nop

00002ab4 <z_arm_prep_c>:

#define VECTOR_ADDRESS ((uintptr_t)_vector_start)

static inline void relocate_vector_table(void)
{
	SCB->VTOR = VECTOR_ADDRESS & SCB_VTOR_TBLOFF_Msk;
    2ab4:	4a14      	ldr	r2, [pc, #80]	; (2b08 <z_arm_prep_c+0x54>)
 * This routine prepares for the execution of and runs C code.
 *
 * @return N/A
 */
void z_arm_prep_c(void)
{
    2ab6:	b508      	push	{r3, lr}
	SCB->VTOR = VECTOR_ADDRESS & SCB_VTOR_TBLOFF_Msk;
    2ab8:	4b14      	ldr	r3, [pc, #80]	; (2b0c <z_arm_prep_c+0x58>)
    2aba:	f022 027f 	bic.w	r2, r2, #127	; 0x7f
    2abe:	609a      	str	r2, [r3, #8]
  __ASM volatile ("dsb 0xF":::"memory");
    2ac0:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("isb 0xF":::"memory");
    2ac4:	f3bf 8f6f 	isb	sy
	SCB->CPACR &= (~(CPACR_CP10_Msk | CPACR_CP11_Msk));
    2ac8:	f8d3 2088 	ldr.w	r2, [r3, #136]	; 0x88
    2acc:	f422 0270 	bic.w	r2, r2, #15728640	; 0xf00000
    2ad0:	f8c3 2088 	str.w	r2, [r3, #136]	; 0x88
	SCB->CPACR |= CPACR_CP10_PRIV_ACCESS | CPACR_CP11_PRIV_ACCESS;
    2ad4:	f8d3 2088 	ldr.w	r2, [r3, #136]	; 0x88
    2ad8:	f442 02a0 	orr.w	r2, r2, #5242880	; 0x500000
    2adc:	f8c3 2088 	str.w	r2, [r3, #136]	; 0x88
	FPU->FPCCR = FPU_FPCCR_ASPEN_Msk | FPU_FPCCR_LSPEN_Msk;
    2ae0:	f04f 4240 	mov.w	r2, #3221225472	; 0xc0000000
    2ae4:	f8c3 2234 	str.w	r2, [r3, #564]	; 0x234
  __ASM volatile ("dsb 0xF":::"memory");
    2ae8:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("isb 0xF":::"memory");
    2aec:	f3bf 8f6f 	isb	sy
// Re-enable using built-in when GCC has been fixed
// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
  /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
  __builtin_arm_set_fpscr(fpscr);
#else
  __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
    2af0:	2300      	movs	r3, #0
    2af2:	eee1 3a10 	vmsr	fpscr, r3
	relocate_vector_table();
#if defined(CONFIG_CPU_HAS_FPU)
	z_arm_floating_point_init();
#endif
	z_bss_zero();
    2af6:	f002 fe77 	bl	57e8 <z_bss_zero>
	z_data_copy();
    2afa:	f003 fc69 	bl	63d0 <z_data_copy>
#if ((defined(CONFIG_ARMV7_R) || defined(CONFIG_ARMV7_A)) && defined(CONFIG_INIT_STACKS))
	z_arm_init_stacks();
#endif
	z_arm_interrupt_init();
    2afe:	f000 fb91 	bl	3224 <z_arm_interrupt_init>
	z_cstart();
    2b02:	f002 fe7b 	bl	57fc <z_cstart>
    2b06:	bf00      	nop
    2b08:	00000000 	.word	0x00000000
    2b0c:	e000ed00 	.word	0xe000ed00

00002b10 <arch_swap>:
 * as BASEPRI is not available.
 */
int arch_swap(unsigned int key)
{
	/* store off key and return value */
	_current->arch.basepri = key;
    2b10:	4a09      	ldr	r2, [pc, #36]	; (2b38 <arch_swap+0x28>)
	_current->arch.swap_return_value = _k_neg_eagain;
    2b12:	490a      	ldr	r1, [pc, #40]	; (2b3c <arch_swap+0x2c>)
	_current->arch.basepri = key;
    2b14:	6893      	ldr	r3, [r2, #8]
	_current->arch.swap_return_value = _k_neg_eagain;
    2b16:	6809      	ldr	r1, [r1, #0]
    2b18:	6799      	str	r1, [r3, #120]	; 0x78

#if defined(CONFIG_CPU_CORTEX_M)
	/* set pending bit to make sure we will take a PendSV exception */
	SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk;
    2b1a:	4909      	ldr	r1, [pc, #36]	; (2b40 <arch_swap+0x30>)
	_current->arch.basepri = key;
    2b1c:	6758      	str	r0, [r3, #116]	; 0x74
	SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk;
    2b1e:	684b      	ldr	r3, [r1, #4]
    2b20:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
    2b24:	604b      	str	r3, [r1, #4]
    2b26:	2300      	movs	r3, #0
    2b28:	f383 8811 	msr	BASEPRI, r3
    2b2c:	f3bf 8f6f 	isb	sy
#endif

	/* Context switch is performed here. Returning implies the
	 * thread has been context-switched-in again.
	 */
	return _current->arch.swap_return_value;
    2b30:	6893      	ldr	r3, [r2, #8]
}
    2b32:	6f98      	ldr	r0, [r3, #120]	; 0x78
    2b34:	4770      	bx	lr
    2b36:	bf00      	nop
    2b38:	200017fc 	.word	0x200017fc
    2b3c:	0000a09c 	.word	0x0000a09c
    2b40:	e000ed00 	.word	0xe000ed00

00002b44 <z_arm_pendsv>:
    pop {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
#endif /* CONFIG_INSTRUMENT_THREAD_SWITCHING */

    /* load _kernel into r1 and current k_thread into r2 */
    ldr r1, =_kernel
    2b44:	4921      	ldr	r1, [pc, #132]	; (2bcc <in_fp_endif+0x2a>)
    ldr r2, [r1, #_kernel_offset_to_current]
    2b46:	688a      	ldr	r2, [r1, #8]

#if defined(CONFIG_ARM_STORE_EXC_RETURN)
    /* Store LSB of LR (EXC_RETURN) to the thread's 'mode' word. */
    strb lr, [r2, #_thread_offset_to_mode_exc_return]
    2b48:	f882 e0bd 	strb.w	lr, [r2, #189]	; 0xbd
#endif

    /* addr of callee-saved regs in thread in r0 */
    ldr r0, =_thread_offset_to_callee_saved
    2b4c:	f04f 0030 	mov.w	r0, #48	; 0x30
    add r0, r2
    2b50:	4410      	add	r0, r2

    /* save callee-saved + psp in thread */
#if defined(CONFIG_CPU_CORTEX_M)
    mrs ip, PSP
    2b52:	f3ef 8c09 	mrs	ip, PSP
    mov r6, r11
    mov r7, ip
    /* store r8-12 */
    stmea r0!, {r3-r7}
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    stmia r0, {v1-v8, ip}
    2b56:	e880 1ff0 	stmia.w	r0, {r4, r5, r6, r7, r8, r9, sl, fp, ip}
#ifdef CONFIG_FPU_SHARING
    /* Assess whether switched-out thread had been using the FP registers. */
    tst lr, #_EXC_RETURN_FTYPE_Msk
    2b5a:	f01e 0f10 	tst.w	lr, #16
    bne out_fp_endif
    2b5e:	d103      	bne.n	2b68 <out_fp_endif>
    /* FP context active: set FP state and store callee-saved registers.
     * Note: if Lazy FP stacking is enabled, storing the callee-saved
     * registers will automatically trigger FP state preservation in
     * the thread's stack. This will also clear the FPCCR.LSPACT flag.
     */
    add r0, r2, #_thread_offset_to_preempt_float
    2b60:	f102 007c 	add.w	r0, r2, #124	; 0x7c
    vstmia r0, {s16-s31}
    2b64:	ec80 8a10 	vstmia	r0, {s16-s31}

00002b68 <out_fp_endif>:

    /* Protect the kernel state while we play with the thread lists */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
    cpsid i
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    movs.n r0, #_EXC_IRQ_DEFAULT_PRIO
    2b68:	2020      	movs	r0, #32
    msr BASEPRI_MAX, r0
    2b6a:	f380 8812 	msr	BASEPRI_MAX, r0
    isb /* Make the effect of disabling interrupts be realized immediately */
    2b6e:	f3bf 8f6f 	isb	sy
     * the new thread is context-switched in since all decisions
     * to pend PendSV have been taken with the current kernel
     * state and this is what we're handling currently.
     */
#if defined(CONFIG_CPU_CORTEX_M)
    ldr v4, =_SCS_ICSR
    2b72:	4f17      	ldr	r7, [pc, #92]	; (2bd0 <in_fp_endif+0x2e>)
    ldr v3, =_SCS_ICSR_UNPENDSV
    2b74:	f04f 6600 	mov.w	r6, #134217728	; 0x8000000
#endif

    /* _kernel is still in r1 */

    /* fetch the thread to run from the ready queue cache */
    ldr r2, [r1, #_kernel_offset_to_ready_q_cache]
    2b78:	698a      	ldr	r2, [r1, #24]

    str r2, [r1, #_kernel_offset_to_current]
    2b7a:	608a      	str	r2, [r1, #8]
     * has been handled.
     */

    /* _SCS_ICSR is still in v4 and _SCS_ICSR_UNPENDSV in v3 */
#if defined(CONFIG_CPU_CORTEX_M)
    str v3, [v4, #0]
    2b7c:	603e      	str	r6, [r7, #0]

#endif

#if defined(CONFIG_ARM_STORE_EXC_RETURN)
    /* Restore EXC_RETURN value. */
    ldrsb lr, [r2, #_thread_offset_to_mode_exc_return]
    2b7e:	f992 e0bd 	ldrsb.w	lr, [r2, #189]	; 0xbd

    ldr r0, [r4]
    movs.n r3, #0
    str r3, [r4]
#else
    ldr r0, [r2, #_thread_offset_to_basepri]
    2b82:	6f50      	ldr	r0, [r2, #116]	; 0x74
    movs r3, #0
    2b84:	2300      	movs	r3, #0
    str r3, [r2, #_thread_offset_to_basepri]
    2b86:	6753      	str	r3, [r2, #116]	; 0x74
    /* restore r4-r7, go back 9*4 bytes to the start of the stored block */
    subs r0, #36
    ldmia r0!, {r4-r7}
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    /* restore BASEPRI for the incoming thread */
    msr BASEPRI, r0
    2b88:	f380 8811 	msr	BASEPRI, r0

#ifdef CONFIG_FPU_SHARING
    /* Assess whether switched-in thread had been using the FP registers. */
    tst lr, #_EXC_RETURN_FTYPE_Msk
    2b8c:	f01e 0f10 	tst.w	lr, #16
    beq in_fp_active
    2b90:	d003      	beq.n	2b9a <in_fp_active>
    /* FP context inactive for swapped-in thread:
     * - reset FPSCR to 0
     * - set EXC_RETURN.F_Type (prevents FP frame un-stacking when returning
     *   from pendSV)
     */
    movs.n r3, #0
    2b92:	2300      	movs	r3, #0
    vmsr fpscr, r3
    2b94:	eee1 3a10 	vmsr	fpscr, r3
    b in_fp_endif
    2b98:	e003      	b.n	2ba2 <in_fp_endif>

00002b9a <in_fp_active>:
    /* FP context active:
     * - clear EXC_RETURN.F_Type
     * - FPSCR and caller-saved registers will be restored automatically
     * - restore callee-saved FP registers
     */
    add r0, r2, #_thread_offset_to_preempt_float
    2b9a:	f102 007c 	add.w	r0, r2, #124	; 0x7c
    vldmia r0, {s16-s31}
    2b9e:	ec90 8a10 	vldmia	r0, {s16-s31}

00002ba2 <in_fp_endif>:
in_fp_endif:
    /* Clear CONTROL.FPCA that may have been set by FP instructions */
    mrs r3, CONTROL
    2ba2:	f3ef 8314 	mrs	r3, CONTROL
    bic r3, #_CONTROL_FPCA_Msk
    2ba6:	f023 0304 	bic.w	r3, r3, #4
    msr CONTROL, r3
    2baa:	f383 8814 	msr	CONTROL, r3
    isb
    2bae:	f3bf 8f6f 	isb	sy
#endif

#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
    /* Re-program dynamic memory map */
    push {r2,lr}
    2bb2:	b504      	push	{r2, lr}
    mov r0, r2 /* _current thread */
    2bb4:	4610      	mov	r0, r2
    bl z_arm_configure_dynamic_mpu_regions
    2bb6:	f000 fbcb 	bl	3350 <z_arm_configure_dynamic_mpu_regions>
    pop {r2,lr}
    2bba:	e8bd 4004 	ldmia.w	sp!, {r2, lr}
    isb

#endif

    /* load callee-saved + psp from thread */
    add r0, r2, #_thread_offset_to_callee_saved
    2bbe:	f102 0030 	add.w	r0, r2, #48	; 0x30
    ldmia r0, {v1-v8, ip}
    2bc2:	e890 1ff0 	ldmia.w	r0, {r4, r5, r6, r7, r8, r9, sl, fp, ip}
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */

#if defined(CONFIG_CPU_CORTEX_M)
    msr PSP, ip
    2bc6:	f38c 8809 	msr	PSP, ip

    /*
     * Cortex-M: return from PendSV exception
     * Cortex-R: return to the caller (z_arm_{exc,int}_exit, or z_arm_svc)
     */
    bx lr
    2bca:	4770      	bx	lr
    ldr r1, =_kernel
    2bcc:	200017fc 	.word	0x200017fc
    ldr v4, =_SCS_ICSR
    2bd0:	e000ed04 	.word	0xe000ed04

00002bd4 <z_arm_svc>:
  bne _stack_frame_endif
_stack_frame_msp:
  mrs r0, MSP
_stack_frame_endif:
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    tst lr, #_EXC_RETURN_SPSEL_Msk /* did we come from thread mode ? */
    2bd4:	f01e 0f04 	tst.w	lr, #4
    ite eq  /* if zero (equal), came from handler mode */
    2bd8:	bf0c      	ite	eq
        mrseq r0, MSP   /* handler mode, stack frame is on MSP */
    2bda:	f3ef 8008 	mrseq	r0, MSP
        mrsne r0, PSP   /* thread mode, stack frame is on PSP */
    2bde:	f3ef 8009 	mrsne	r0, PSP
#endif


    /* Figure out what SVC call number was invoked */

    ldr r1, [r0, #24]   /* grab address of PC from stack frame */
    2be2:	6981      	ldr	r1, [r0, #24]
     */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
    subs r1, r1, #2
    ldrb r1, [r1]
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    ldrb r1, [r1, #-2]
    2be4:	f811 1c02 	ldrb.w	r1, [r1, #-2]
#endif
    bne _oops

#endif /* CONFIG_USERSPACE */

    cmp r1, #2
    2be8:	2902      	cmp	r1, #2
    beq _oops
    2bea:	d0ff      	beq.n	2bec <_oops>

00002bec <_oops>:
    /* exception return is done in z_arm_int_exit() */
    b z_arm_int_exit
#endif

_oops:
    push {r0, lr}
    2bec:	b501      	push	{r0, lr}
    bl z_do_kernel_oops
    2bee:	f006 fa6d 	bl	90cc <z_do_kernel_oops>
    /* return from SVC exception is done here */
    pop {r0, pc}
    2bf2:	bd01      	pop	{r0, pc}

00002bf4 <arch_new_thread>:
		thread->stack_info.start += MPU_GUARD_ALIGN_AND_SIZE;
		thread->stack_info.size -= MPU_GUARD_ALIGN_AND_SIZE;
	}
#endif /* CONFIG_USERSPACE */
#if FP_GUARD_EXTRA_SIZE > 0
	if ((thread->base.user_options & K_FP_REGS) != 0) {
    2bf4:	7b01      	ldrb	r1, [r0, #12]
{
    2bf6:	b510      	push	{r4, lr}
	if ((thread->base.user_options & K_FP_REGS) != 0) {
    2bf8:	f011 0402 	ands.w	r4, r1, #2
    2bfc:	d005      	beq.n	2c0a <arch_new_thread+0x16>
		/* Larger guard needed due to lazy stacking of FP regs may
		 * overshoot the guard area without writing anything. We
		 * carve it out of the stack buffer as-needed instead of
		 * unconditionally reserving it.
		 */
		thread->stack_info.start += FP_GUARD_EXTRA_SIZE;
    2bfe:	6e41      	ldr	r1, [r0, #100]	; 0x64
    2c00:	3160      	adds	r1, #96	; 0x60
    2c02:	6641      	str	r1, [r0, #100]	; 0x64
		thread->stack_info.size -= FP_GUARD_EXTRA_SIZE;
    2c04:	6e81      	ldr	r1, [r0, #104]	; 0x68
    2c06:	3960      	subs	r1, #96	; 0x60
    2c08:	6681      	str	r1, [r0, #104]	; 0x68

#if defined(CONFIG_CPU_CORTEX_M)
	/* force ARM mode by clearing LSB of address */
	iframe->pc &= 0xfffffffe;
#endif
	iframe->a1 = (uint32_t)entry;
    2c0a:	f842 3c20 	str.w	r3, [r2, #-32]
	iframe->a2 = (uint32_t)p1;
    2c0e:	9b02      	ldr	r3, [sp, #8]
    2c10:	f842 3c1c 	str.w	r3, [r2, #-28]
	iframe->a3 = (uint32_t)p2;
    2c14:	9b03      	ldr	r3, [sp, #12]
    2c16:	f842 3c18 	str.w	r3, [r2, #-24]
	iframe->pc &= 0xfffffffe;
    2c1a:	490d      	ldr	r1, [pc, #52]	; (2c50 <arch_new_thread+0x5c>)
	iframe->a4 = (uint32_t)p3;
    2c1c:	9b04      	ldr	r3, [sp, #16]
    2c1e:	f842 3c14 	str.w	r3, [r2, #-20]

#if defined(CONFIG_CPU_CORTEX_M)
	iframe->xpsr =
    2c22:	f04f 7380 	mov.w	r3, #16777216	; 0x1000000
    2c26:	f842 3c04 	str.w	r3, [r2, #-4]
	iframe->pc &= 0xfffffffe;
    2c2a:	f021 0101 	bic.w	r1, r1, #1
	iframe->xpsr |= T_BIT;
#endif /* CONFIG_COMPILER_ISA_THUMB2 */
#endif /* CONFIG_CPU_CORTEX_M */

	thread->callee_saved.psp = (uint32_t)iframe;
	thread->arch.basepri = 0;
    2c2e:	2300      	movs	r3, #0
	iframe->pc &= 0xfffffffe;
    2c30:	f842 1c08 	str.w	r1, [r2, #-8]
	iframe = Z_STACK_PTR_TO_FRAME(struct __basic_sf, stack_ptr);
    2c34:	3a20      	subs	r2, #32
	thread->arch.basepri = 0;
    2c36:	6743      	str	r3, [r0, #116]	; 0x74

#if defined(CONFIG_ARM_STORE_EXC_RETURN) || defined(CONFIG_USERSPACE)
	thread->arch.mode = 0;
    2c38:	f44f 437d 	mov.w	r3, #64768	; 0xfd00
	thread->callee_saved.psp = (uint32_t)iframe;
    2c3c:	6502      	str	r2, [r0, #80]	; 0x50
	thread->arch.mode = 0;
    2c3e:	f8c0 30bc 	str.w	r3, [r0, #188]	; 0xbc
#if defined(CONFIG_ARM_STORE_EXC_RETURN)
	thread->arch.mode_exc_return = DEFAULT_EXC_RETURN;
#endif
#if FP_GUARD_EXTRA_SIZE > 0
	if ((thread->base.user_options & K_FP_REGS) != 0) {
    2c42:	b11c      	cbz	r4, 2c4c <arch_new_thread+0x58>
		thread->arch.mode |= Z_ARM_MODE_MPU_GUARD_FLOAT_Msk;
    2c44:	f64f 5308 	movw	r3, #64776	; 0xfd08
    2c48:	f8c0 30bc 	str.w	r3, [r0, #188]	; 0xbc
#endif
	/*
	 * initial values in all other registers/thread entries are
	 * irrelevant.
	 */
}
    2c4c:	bd10      	pop	{r4, pc}
    2c4e:	bf00      	nop
    2c50:	000088e7 	.word	0x000088e7

00002c54 <z_arm_mpu_stack_guard_and_fpu_adjust>:
 * Adjust the MPU stack guard size together with the FPU
 * policy and the stack_info values for the thread that is
 * being switched in.
 */
uint32_t z_arm_mpu_stack_guard_and_fpu_adjust(struct k_thread *thread)
{
    2c54:	b530      	push	{r4, r5, lr}
	if (((thread->base.user_options & K_FP_REGS) != 0) ||
    2c56:	7b01      	ldrb	r1, [r0, #12]
    2c58:	f8d0 30bc 	ldr.w	r3, [r0, #188]	; 0xbc
    2c5c:	4a17      	ldr	r2, [pc, #92]	; (2cbc <z_arm_mpu_stack_guard_and_fpu_adjust+0x68>)
    2c5e:	f011 0f02 	tst.w	r1, #2
    2c62:	f003 0508 	and.w	r5, r3, #8
    2c66:	d103      	bne.n	2c70 <z_arm_mpu_stack_guard_and_fpu_adjust+0x1c>
    2c68:	f890 40bd 	ldrb.w	r4, [r0, #189]	; 0xbd
    2c6c:	06e4      	lsls	r4, r4, #27
    2c6e:	d413      	bmi.n	2c98 <z_arm_mpu_stack_guard_and_fpu_adjust+0x44>
		 * The thread is not pre-tagged with K_FP_REGS, but it has
		 * generated an FP context. Activate lazy stacking and
		 * program a large MPU guard to detect privilege thread
		 * stack overflows.
		 */
		FPU->FPCCR |= FPU_FPCCR_LSPEN_Msk;
    2c70:	6854      	ldr	r4, [r2, #4]
    2c72:	f044 4480 	orr.w	r4, r4, #1073741824	; 0x40000000
    2c76:	6054      	str	r4, [r2, #4]
		if ((thread->arch.mode &
    2c78:	b94d      	cbnz	r5, 2c8e <z_arm_mpu_stack_guard_and_fpu_adjust+0x3a>
			thread->arch.mode |= Z_ARM_MODE_MPU_GUARD_FLOAT_Msk;
    2c7a:	f043 0308 	orr.w	r3, r3, #8
    2c7e:	f8c0 30bc 	str.w	r3, [r0, #188]	; 0xbc
				thread->stack_info.start +=
    2c82:	6e43      	ldr	r3, [r0, #100]	; 0x64
    2c84:	3360      	adds	r3, #96	; 0x60
    2c86:	6643      	str	r3, [r0, #100]	; 0x64
				thread->stack_info.size -=
    2c88:	6e83      	ldr	r3, [r0, #104]	; 0x68
    2c8a:	3b60      	subs	r3, #96	; 0x60
    2c8c:	6683      	str	r3, [r0, #104]	; 0x68

		z_arm_thread_stack_info_adjust(thread, true);

		/* Tag the thread with K_FP_REGS */
		thread->base.user_options |= K_FP_REGS;
    2c8e:	f041 0102 	orr.w	r1, r1, #2
    2c92:	7301      	strb	r1, [r0, #12]

		return MPU_GUARD_ALIGN_AND_SIZE_FLOAT;
    2c94:	2080      	movs	r0, #128	; 0x80
	FPU->FPCCR &= (~FPU_FPCCR_LSPEN_Msk);

	z_arm_thread_stack_info_adjust(thread, false);

	return MPU_GUARD_ALIGN_AND_SIZE;
}
    2c96:	bd30      	pop	{r4, r5, pc}
	FPU->FPCCR &= (~FPU_FPCCR_LSPEN_Msk);
    2c98:	6851      	ldr	r1, [r2, #4]
    2c9a:	f021 4180 	bic.w	r1, r1, #1073741824	; 0x40000000
    2c9e:	6051      	str	r1, [r2, #4]
		if ((thread->arch.mode &
    2ca0:	b14d      	cbz	r5, 2cb6 <z_arm_mpu_stack_guard_and_fpu_adjust+0x62>
			thread->arch.mode &= ~Z_ARM_MODE_MPU_GUARD_FLOAT_Msk;
    2ca2:	f023 0308 	bic.w	r3, r3, #8
    2ca6:	f8c0 30bc 	str.w	r3, [r0, #188]	; 0xbc
				thread->stack_info.start -=
    2caa:	6e43      	ldr	r3, [r0, #100]	; 0x64
    2cac:	3b60      	subs	r3, #96	; 0x60
    2cae:	6643      	str	r3, [r0, #100]	; 0x64
				thread->stack_info.size +=
    2cb0:	6e83      	ldr	r3, [r0, #104]	; 0x68
    2cb2:	3360      	adds	r3, #96	; 0x60
    2cb4:	6683      	str	r3, [r0, #104]	; 0x68
	return MPU_GUARD_ALIGN_AND_SIZE;
    2cb6:	2020      	movs	r0, #32
    2cb8:	e7ed      	b.n	2c96 <z_arm_mpu_stack_guard_and_fpu_adjust+0x42>
    2cba:	bf00      	nop
    2cbc:	e000ef30 	.word	0xe000ef30

00002cc0 <z_check_thread_stack_fail>:
 *         thread stack corruption, otherwise return 0.
 */
uint32_t z_check_thread_stack_fail(const uint32_t fault_addr, const uint32_t psp)
{
#if defined(CONFIG_MULTITHREADING)
	const struct k_thread *thread = _current;
    2cc0:	4b0f      	ldr	r3, [pc, #60]	; (2d00 <z_check_thread_stack_fail+0x40>)
{
    2cc2:	4602      	mov	r2, r0
	const struct k_thread *thread = _current;
    2cc4:	6898      	ldr	r0, [r3, #8]
{
    2cc6:	b510      	push	{r4, lr}

	if (thread == NULL) {
    2cc8:	b1c0      	cbz	r0, 2cfc <z_check_thread_stack_fail+0x3c>
#endif

#if (defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)) && \
	defined(CONFIG_MPU_STACK_GUARD)
	uint32_t guard_len =
		((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ?
    2cca:	f8d0 30bc 	ldr.w	r3, [r0, #188]	; 0xbc
    2cce:	6e40      	ldr	r0, [r0, #100]	; 0x64
		MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE;
    2cd0:	f013 0f08 	tst.w	r3, #8
    2cd4:	bf14      	ite	ne
    2cd6:	2480      	movne	r4, #128	; 0x80
    2cd8:	2420      	moveq	r4, #32
			return thread->stack_info.start;
		}
	}
#else /* CONFIG_USERSPACE */
#if defined(CONFIG_MULTITHREADING)
	if (IS_MPU_GUARD_VIOLATION(thread->stack_info.start - guard_len,
    2cda:	f112 0f16 	cmn.w	r2, #22
    2cde:	d004      	beq.n	2cea <z_check_thread_stack_fail+0x2a>
    2ce0:	1b03      	subs	r3, r0, r4
    2ce2:	4293      	cmp	r3, r2
    2ce4:	d806      	bhi.n	2cf4 <z_check_thread_stack_fail+0x34>
    2ce6:	4282      	cmp	r2, r0
    2ce8:	d204      	bcs.n	2cf4 <z_check_thread_stack_fail+0x34>
    2cea:	4281      	cmp	r1, r0
    2cec:	bf2c      	ite	cs
    2cee:	2100      	movcs	r1, #0
    2cf0:	2101      	movcc	r1, #1
    2cf2:	e000      	b.n	2cf6 <z_check_thread_stack_fail+0x36>
    2cf4:	2100      	movs	r1, #0
    2cf6:	2900      	cmp	r1, #0
		return (uint32_t)Z_THREAD_STACK_BUFFER(z_main_stack);
	}
#endif
#endif /* CONFIG_USERSPACE */

	return 0;
    2cf8:	bf08      	it	eq
    2cfa:	2000      	moveq	r0, #0
}
    2cfc:	bd10      	pop	{r4, pc}
    2cfe:	bf00      	nop
    2d00:	200017fc 	.word	0x200017fc

00002d04 <arch_switch_to_main_thread>:
#endif /* CONFIG_FPU */
}

void arch_switch_to_main_thread(struct k_thread *main_thread, char *stack_ptr,
				k_thread_entry_t _main)
{
    2d04:	4614      	mov	r4, r2
    2d06:	b508      	push	{r3, lr}
    2d08:	460d      	mov	r5, r1
    2d0a:	2200      	movs	r2, #0
    2d0c:	eee1 2a10 	vmsr	fpscr, r2
  __ASM volatile ("MRS %0, control" : "=r" (result) );
    2d10:	f3ef 8214 	mrs	r2, CONTROL
	__set_CONTROL(__get_CONTROL() & (~(CONTROL_FPCA_Msk)));
    2d14:	f022 0204 	bic.w	r2, r2, #4
  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
    2d18:	f382 8814 	msr	CONTROL, r2
  __ASM volatile ("isb 0xF":::"memory");
    2d1c:	f3bf 8f6f 	isb	sy
    2d20:	f3bf 8f6f 	isb	sy
	z_arm_prepare_switch_to_main();

	_current = main_thread;
    2d24:	4a08      	ldr	r2, [pc, #32]	; (2d48 <arch_switch_to_main_thread+0x44>)
    2d26:	6090      	str	r0, [r2, #8]
#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
	/*
	 * If stack protection is enabled, make sure to set it
	 * before jumping to thread entry function
	 */
	z_arm_configure_dynamic_mpu_regions(main_thread);
    2d28:	f000 fb12 	bl	3350 <z_arm_configure_dynamic_mpu_regions>

	/*
	 * Set PSP to the highest address of the main stack
	 * before enabling interrupts and jumping to main.
	 */
	__asm__ volatile (
    2d2c:	4620      	mov	r0, r4
    2d2e:	f385 8809 	msr	PSP, r5
    2d32:	2100      	movs	r1, #0
    2d34:	b663      	cpsie	if
    2d36:	f381 8811 	msr	BASEPRI, r1
    2d3a:	f3bf 8f6f 	isb	sy
    2d3e:	2200      	movs	r2, #0
    2d40:	2300      	movs	r3, #0
    2d42:	f005 fdd0 	bl	88e6 <z_thread_entry>
	:
	: "r" (_main), "r" (stack_ptr)
	: "r0" /* not to be overwritten by msr PSP, %1 */
	);

	CODE_UNREACHABLE;
    2d46:	bf00      	nop
    2d48:	200017fc 	.word	0x200017fc

00002d4c <_isr_wrapper>:
 * @return N/A
 */
SECTION_FUNC(TEXT, _isr_wrapper)

#if defined(CONFIG_CPU_CORTEX_M)
	push {r0,lr}		/* r0, lr are now the first items on the stack */
    2d4c:	b501      	push	{r0, lr}
#endif

#endif /* CONFIG_PM */

#if defined(CONFIG_CPU_CORTEX_M)
	mrs r0, IPSR	/* get exception number */
    2d4e:	f3ef 8005 	mrs	r0, IPSR
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
	ldr r1, =16
	subs r0, r1	/* get IRQ number */
	lsls r0, #3	/* table is 8-byte wide */
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	sub r0, r0, #16	/* get IRQ number */
    2d52:	f1a0 0010 	sub.w	r0, r0, #16
	lsl r0, r0, #3	/* table is 8-byte wide */
    2d56:	ea4f 00c0 	mov.w	r0, r0, lsl #3
	lsl r1, r1, #3
	cmp r0, r1
	bge spurious_continue
#endif /* !CONFIG_CPU_CORTEX_M */

	ldr r1, =_sw_isr_table
    2d5a:	4904      	ldr	r1, [pc, #16]	; (2d6c <_isr_wrapper+0x20>)
	add r1, r1, r0	/* table entry: ISRs must have their MSB set to stay
    2d5c:	4401      	add	r1, r0
			 * in thumb mode */

	ldm r1!,{r0,r3}	/* arg in r0, ISR in r3 */
    2d5e:	c909      	ldmia	r1!, {r0, r3}
	blx r3		/* call ISR */
    2d60:	4798      	blx	r3

#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
	pop {r0, r3}
	mov lr, r3
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	pop {r0, lr}
    2d62:	e8bd 4001 	ldmia.w	sp!, {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */

	/* Use 'bx' instead of 'b' because 'bx' can jump further, and use
	 * 'bx' instead of 'blx' because exception return is done in
	 * z_arm_int_exit() */
	ldr r1, =z_arm_int_exit
    2d66:	4902      	ldr	r1, [pc, #8]	; (2d70 <_isr_wrapper+0x24>)
	bx r1
    2d68:	4708      	bx	r1
    2d6a:	0000      	.short	0x0000
	ldr r1, =_sw_isr_table
    2d6c:	00009c00 	.word	0x00009c00
	ldr r1, =z_arm_int_exit
    2d70:	00002d75 	.word	0x00002d75

00002d74 <z_arm_exc_exit>:
 */

SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_exc_exit)

#ifdef CONFIG_PREEMPT_ENABLED
	ldr r3, =_kernel
    2d74:	4b04      	ldr	r3, [pc, #16]	; (2d88 <_EXIT_EXC+0x2>)

	ldr r1, [r3, #_kernel_offset_to_current]
    2d76:	6899      	ldr	r1, [r3, #8]
	ldr r0, [r3, #_kernel_offset_to_ready_q_cache]
    2d78:	6998      	ldr	r0, [r3, #24]
	cmp r0, r1
    2d7a:	4288      	cmp	r0, r1
	beq _EXIT_EXC
    2d7c:	d003      	beq.n	2d86 <_EXIT_EXC>

	/* context switch required, pend the PendSV exception */
	ldr r1, =_SCS_ICSR
    2d7e:	4903      	ldr	r1, [pc, #12]	; (2d8c <_EXIT_EXC+0x6>)
	ldr r2, =_SCS_ICSR_PENDSV
    2d80:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
	str r2, [r1]
    2d84:	600a      	str	r2, [r1, #0]

00002d86 <_EXIT_EXC>:
#else
	pop {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
#endif /* CONFIG_STACK_SENTINEL */

	bx lr
    2d86:	4770      	bx	lr
	ldr r3, =_kernel
    2d88:	200017fc 	.word	0x200017fc
	ldr r1, =_SCS_ICSR
    2d8c:	e000ed04 	.word	0xe000ed04

00002d90 <mem_manage_fault>:
 *
 * @return error code to identify the fatal error reason
 */
static uint32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault,
			      bool *recoverable)
{
    2d90:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
    2d94:	4b35      	ldr	r3, [pc, #212]	; (2e6c <mem_manage_fault+0xdc>)
    2d96:	4c36      	ldr	r4, [pc, #216]	; (2e70 <mem_manage_fault+0xe0>)
	uint32_t reason = K_ERR_CPU_EXCEPTION;
	uint32_t mmfar = -EINVAL;

	PR_FAULT_INFO("***** MPU FAULT *****");

	if ((SCB->CFSR & SCB_CFSR_MSTKERR_Msk) != 0) {
    2d98:	4d36      	ldr	r5, [pc, #216]	; (2e74 <mem_manage_fault+0xe4>)
    2d9a:	1ae4      	subs	r4, r4, r3
    2d9c:	08e4      	lsrs	r4, r4, #3
	PR_FAULT_INFO("***** MPU FAULT *****");
    2d9e:	01a4      	lsls	r4, r4, #6
    2da0:	f044 0901 	orr.w	r9, r4, #1
{
    2da4:	4607      	mov	r7, r0
    2da6:	4688      	mov	r8, r1
	PR_FAULT_INFO("***** MPU FAULT *****");
    2da8:	4833      	ldr	r0, [pc, #204]	; (2e78 <mem_manage_fault+0xe8>)
    2daa:	4649      	mov	r1, r9
{
    2dac:	4616      	mov	r6, r2
	PR_FAULT_INFO("***** MPU FAULT *****");
    2dae:	f005 fded 	bl	898c <log_0>
	if ((SCB->CFSR & SCB_CFSR_MSTKERR_Msk) != 0) {
    2db2:	6aaa      	ldr	r2, [r5, #40]	; 0x28
    2db4:	06d3      	lsls	r3, r2, #27
    2db6:	d503      	bpl.n	2dc0 <mem_manage_fault+0x30>
		PR_FAULT_INFO("  Stacking error (context area might be"
    2db8:	4830      	ldr	r0, [pc, #192]	; (2e7c <mem_manage_fault+0xec>)
    2dba:	4649      	mov	r1, r9
    2dbc:	f005 fde6 	bl	898c <log_0>
			" not valid)");
	}
	if ((SCB->CFSR & SCB_CFSR_MUNSTKERR_Msk) != 0) {
    2dc0:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2dc2:	0718      	lsls	r0, r3, #28
    2dc4:	d504      	bpl.n	2dd0 <mem_manage_fault+0x40>
		PR_FAULT_INFO("  Unstacking error");
    2dc6:	482e      	ldr	r0, [pc, #184]	; (2e80 <mem_manage_fault+0xf0>)
    2dc8:	f044 0101 	orr.w	r1, r4, #1
    2dcc:	f005 fdde 	bl	898c <log_0>
	}
	if ((SCB->CFSR & SCB_CFSR_DACCVIOL_Msk) != 0) {
    2dd0:	4d28      	ldr	r5, [pc, #160]	; (2e74 <mem_manage_fault+0xe4>)
    2dd2:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2dd4:	0799      	lsls	r1, r3, #30
    2dd6:	d423      	bmi.n	2e20 <mem_manage_fault+0x90>
	uint32_t mmfar = -EINVAL;
    2dd8:	f06f 0915 	mvn.w	r9, #21
				/* clear SCB_MMAR[VALID] to reset */
				SCB->CFSR &= ~SCB_CFSR_MMARVALID_Msk;
			}
		}
	}
	if ((SCB->CFSR & SCB_CFSR_IACCVIOL_Msk) != 0) {
    2ddc:	4d25      	ldr	r5, [pc, #148]	; (2e74 <mem_manage_fault+0xe4>)
    2dde:	6aaa      	ldr	r2, [r5, #40]	; 0x28
    2de0:	07d3      	lsls	r3, r2, #31
    2de2:	d504      	bpl.n	2dee <mem_manage_fault+0x5e>
		PR_FAULT_INFO("  Instruction Access Violation");
    2de4:	4827      	ldr	r0, [pc, #156]	; (2e84 <mem_manage_fault+0xf4>)
    2de6:	f044 0101 	orr.w	r1, r4, #1
    2dea:	f005 fdcf 	bl	898c <log_0>
	}
#if defined(CONFIG_ARMV7_M_ARMV8_M_FP)
	if ((SCB->CFSR & SCB_CFSR_MLSPERR_Msk) != 0) {
    2dee:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2df0:	0698      	lsls	r0, r3, #26
    2df2:	d504      	bpl.n	2dfe <mem_manage_fault+0x6e>
		PR_FAULT_INFO(
    2df4:	4824      	ldr	r0, [pc, #144]	; (2e88 <mem_manage_fault+0xf8>)
    2df6:	f044 0101 	orr.w	r1, r4, #1
    2dfa:	f005 fdc7 	bl	898c <log_0>
	 * crossed into an area beyond the thread stack.]
	 *
	 * Data Access Violation errors may or may not be caused by
	 * thread stack overflows.
	 */
	if ((SCB->CFSR & SCB_CFSR_MSTKERR_Msk) ||
    2dfe:	4b1d      	ldr	r3, [pc, #116]	; (2e74 <mem_manage_fault+0xe4>)
    2e00:	6a9a      	ldr	r2, [r3, #40]	; 0x28
    2e02:	06d1      	lsls	r1, r2, #27
    2e04:	d424      	bmi.n	2e50 <mem_manage_fault+0xc0>
		(SCB->CFSR & SCB_CFSR_DACCVIOL_Msk)) {
    2e06:	6a9a      	ldr	r2, [r3, #40]	; 0x28
	if ((SCB->CFSR & SCB_CFSR_MSTKERR_Msk) ||
    2e08:	0792      	lsls	r2, r2, #30
    2e0a:	d421      	bmi.n	2e50 <mem_manage_fault+0xc0>
	uint32_t reason = K_ERR_CPU_EXCEPTION;
    2e0c:	2000      	movs	r0, #0
		"without stack guard, user-mode or null-pointer detection\n");
#endif /* CONFIG_MPU_STACK_GUARD || CONFIG_USERSPACE */
	}

	/* clear MMFSR sticky bits */
	SCB->CFSR |= SCB_CFSR_MEMFAULTSR_Msk;
    2e0e:	4a19      	ldr	r2, [pc, #100]	; (2e74 <mem_manage_fault+0xe4>)
    2e10:	6a93      	ldr	r3, [r2, #40]	; 0x28
    2e12:	f043 03ff 	orr.w	r3, r3, #255	; 0xff
    2e16:	6293      	str	r3, [r2, #40]	; 0x28

	/* Assess whether system shall ignore/recover from this MPU fault. */
	*recoverable = memory_fault_recoverable(esf, true);
    2e18:	2300      	movs	r3, #0
    2e1a:	7033      	strb	r3, [r6, #0]

	return reason;
}
    2e1c:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
		PR_FAULT_INFO("  Data Access Violation");
    2e20:	f044 0a01 	orr.w	sl, r4, #1
    2e24:	4819      	ldr	r0, [pc, #100]	; (2e8c <mem_manage_fault+0xfc>)
    2e26:	4651      	mov	r1, sl
    2e28:	f005 fdb0 	bl	898c <log_0>
		uint32_t temp = SCB->MMFAR;
    2e2c:	f8d5 9034 	ldr.w	r9, [r5, #52]	; 0x34
		if ((SCB->CFSR & SCB_CFSR_MMARVALID_Msk) != 0) {
    2e30:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2e32:	061a      	lsls	r2, r3, #24
    2e34:	d5d0      	bpl.n	2dd8 <mem_manage_fault+0x48>
			PR_EXC("  MMFAR Address: 0x%x", mmfar);
    2e36:	4816      	ldr	r0, [pc, #88]	; (2e90 <mem_manage_fault+0x100>)
    2e38:	4652      	mov	r2, sl
    2e3a:	4649      	mov	r1, r9
    2e3c:	f005 fdb5 	bl	89aa <log_1>
			if (from_hard_fault != 0) {
    2e40:	f1b8 0f00 	cmp.w	r8, #0
    2e44:	d0ca      	beq.n	2ddc <mem_manage_fault+0x4c>
				SCB->CFSR &= ~SCB_CFSR_MMARVALID_Msk;
    2e46:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2e48:	f023 0380 	bic.w	r3, r3, #128	; 0x80
    2e4c:	62ab      	str	r3, [r5, #40]	; 0x28
    2e4e:	e7c5      	b.n	2ddc <mem_manage_fault+0x4c>
		if (SCB->ICSR & SCB_ICSR_RETTOBASE_Msk) {
    2e50:	685b      	ldr	r3, [r3, #4]
    2e52:	051b      	lsls	r3, r3, #20
    2e54:	d5da      	bpl.n	2e0c <mem_manage_fault+0x7c>
			uint32_t min_stack_ptr = z_check_thread_stack_fail(mmfar,
    2e56:	4639      	mov	r1, r7
    2e58:	4648      	mov	r0, r9
    2e5a:	f7ff ff31 	bl	2cc0 <z_check_thread_stack_fail>
			if (min_stack_ptr) {
    2e5e:	2800      	cmp	r0, #0
    2e60:	d0d4      	beq.n	2e0c <mem_manage_fault+0x7c>
  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
    2e62:	f380 8809 	msr	PSP, r0
				reason = K_ERR_STACK_CHK_FAIL;
    2e66:	2002      	movs	r0, #2
    2e68:	e7d1      	b.n	2e0e <mem_manage_fault+0x7e>
    2e6a:	bf00      	nop
    2e6c:	00009d80 	.word	0x00009d80
    2e70:	00009da8 	.word	0x00009da8
    2e74:	e000ed00 	.word	0xe000ed00
    2e78:	0000a84f 	.word	0x0000a84f
    2e7c:	0000a865 	.word	0x0000a865
    2e80:	0000a898 	.word	0x0000a898
    2e84:	0000a8d9 	.word	0x0000a8d9
    2e88:	0000a8f8 	.word	0x0000a8f8
    2e8c:	0000a8ab 	.word	0x0000a8ab
    2e90:	0000a8c3 	.word	0x0000a8c3

00002e94 <usage_fault.isra.0>:
 *
 * See z_arm_fault_dump() for example.
 *
 * @return error code to identify the fatal error reason
 */
static uint32_t usage_fault(const z_arch_esf_t *esf)
    2e94:	b570      	push	{r4, r5, r6, lr}
    2e96:	4b23      	ldr	r3, [pc, #140]	; (2f24 <usage_fault.isra.0+0x90>)
    2e98:	4c23      	ldr	r4, [pc, #140]	; (2f28 <usage_fault.isra.0+0x94>)
	uint32_t reason = K_ERR_CPU_EXCEPTION;

	PR_FAULT_INFO("***** USAGE FAULT *****");

	/* bits are sticky: they stack and must be reset */
	if ((SCB->CFSR & SCB_CFSR_DIVBYZERO_Msk) != 0) {
    2e9a:	4d24      	ldr	r5, [pc, #144]	; (2f2c <usage_fault.isra.0+0x98>)
	PR_FAULT_INFO("***** USAGE FAULT *****");
    2e9c:	4824      	ldr	r0, [pc, #144]	; (2f30 <usage_fault.isra.0+0x9c>)
    2e9e:	1ae4      	subs	r4, r4, r3
    2ea0:	08e4      	lsrs	r4, r4, #3
    2ea2:	01a4      	lsls	r4, r4, #6
    2ea4:	f044 0601 	orr.w	r6, r4, #1
    2ea8:	4631      	mov	r1, r6
    2eaa:	f005 fd6f 	bl	898c <log_0>
	if ((SCB->CFSR & SCB_CFSR_DIVBYZERO_Msk) != 0) {
    2eae:	6aaa      	ldr	r2, [r5, #40]	; 0x28
    2eb0:	0193      	lsls	r3, r2, #6
    2eb2:	d503      	bpl.n	2ebc <usage_fault.isra.0+0x28>
		PR_FAULT_INFO("  Division by zero");
    2eb4:	481f      	ldr	r0, [pc, #124]	; (2f34 <usage_fault.isra.0+0xa0>)
    2eb6:	4631      	mov	r1, r6
    2eb8:	f005 fd68 	bl	898c <log_0>
	}
	if ((SCB->CFSR & SCB_CFSR_UNALIGNED_Msk) != 0) {
    2ebc:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2ebe:	01dd      	lsls	r5, r3, #7
    2ec0:	d504      	bpl.n	2ecc <usage_fault.isra.0+0x38>
		PR_FAULT_INFO("  Unaligned memory access");
    2ec2:	481d      	ldr	r0, [pc, #116]	; (2f38 <usage_fault.isra.0+0xa4>)
    2ec4:	f044 0101 	orr.w	r1, r4, #1
    2ec8:	f005 fd60 	bl	898c <log_0>
		 */
		reason = K_ERR_STACK_CHK_FAIL;
#endif /* CONFIG_BUILTIN_STACK_GUARD */
	}
#endif /* CONFIG_ARMV8_M_MAINLINE */
	if ((SCB->CFSR & SCB_CFSR_NOCP_Msk) != 0) {
    2ecc:	4d17      	ldr	r5, [pc, #92]	; (2f2c <usage_fault.isra.0+0x98>)
    2ece:	6aaa      	ldr	r2, [r5, #40]	; 0x28
    2ed0:	0310      	lsls	r0, r2, #12
    2ed2:	d504      	bpl.n	2ede <usage_fault.isra.0+0x4a>
		PR_FAULT_INFO("  No coprocessor instructions");
    2ed4:	4819      	ldr	r0, [pc, #100]	; (2f3c <usage_fault.isra.0+0xa8>)
    2ed6:	f044 0101 	orr.w	r1, r4, #1
    2eda:	f005 fd57 	bl	898c <log_0>
	}
	if ((SCB->CFSR & SCB_CFSR_INVPC_Msk) != 0) {
    2ede:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2ee0:	0359      	lsls	r1, r3, #13
    2ee2:	d504      	bpl.n	2eee <usage_fault.isra.0+0x5a>
		PR_FAULT_INFO("  Illegal load of EXC_RETURN into PC");
    2ee4:	4816      	ldr	r0, [pc, #88]	; (2f40 <usage_fault.isra.0+0xac>)
    2ee6:	f044 0101 	orr.w	r1, r4, #1
    2eea:	f005 fd4f 	bl	898c <log_0>
	}
	if ((SCB->CFSR & SCB_CFSR_INVSTATE_Msk) != 0) {
    2eee:	4d0f      	ldr	r5, [pc, #60]	; (2f2c <usage_fault.isra.0+0x98>)
    2ef0:	6aaa      	ldr	r2, [r5, #40]	; 0x28
    2ef2:	0392      	lsls	r2, r2, #14
    2ef4:	d504      	bpl.n	2f00 <usage_fault.isra.0+0x6c>
		PR_FAULT_INFO("  Illegal use of the EPSR");
    2ef6:	4813      	ldr	r0, [pc, #76]	; (2f44 <usage_fault.isra.0+0xb0>)
    2ef8:	f044 0101 	orr.w	r1, r4, #1
    2efc:	f005 fd46 	bl	898c <log_0>
	}
	if ((SCB->CFSR & SCB_CFSR_UNDEFINSTR_Msk) != 0) {
    2f00:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2f02:	03db      	lsls	r3, r3, #15
    2f04:	d504      	bpl.n	2f10 <usage_fault.isra.0+0x7c>
		PR_FAULT_INFO("  Attempt to execute undefined instruction");
    2f06:	4810      	ldr	r0, [pc, #64]	; (2f48 <usage_fault.isra.0+0xb4>)
    2f08:	f044 0101 	orr.w	r1, r4, #1
    2f0c:	f005 fd3e 	bl	898c <log_0>
	}

	/* clear UFSR sticky bits */
	SCB->CFSR |= SCB_CFSR_USGFAULTSR_Msk;
    2f10:	4a06      	ldr	r2, [pc, #24]	; (2f2c <usage_fault.isra.0+0x98>)
    2f12:	6a93      	ldr	r3, [r2, #40]	; 0x28
    2f14:	ea6f 4303 	mvn.w	r3, r3, lsl #16
    2f18:	ea6f 4313 	mvn.w	r3, r3, lsr #16
    2f1c:	6293      	str	r3, [r2, #40]	; 0x28

	return reason;
}
    2f1e:	2000      	movs	r0, #0
    2f20:	bd70      	pop	{r4, r5, r6, pc}
    2f22:	bf00      	nop
    2f24:	00009d80 	.word	0x00009d80
    2f28:	00009da8 	.word	0x00009da8
    2f2c:	e000ed00 	.word	0xe000ed00
    2f30:	0000a927 	.word	0x0000a927
    2f34:	0000a93f 	.word	0x0000a93f
    2f38:	0000a952 	.word	0x0000a952
    2f3c:	0000a96c 	.word	0x0000a96c
    2f40:	0000a98a 	.word	0x0000a98a
    2f44:	0000a9af 	.word	0x0000a9af
    2f48:	0000a9c9 	.word	0x0000a9c9

00002f4c <bus_fault.isra.0>:
static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable)
    2f4c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    2f50:	4b2a      	ldr	r3, [pc, #168]	; (2ffc <bus_fault.isra.0+0xb0>)
    2f52:	4c2b      	ldr	r4, [pc, #172]	; (3000 <bus_fault.isra.0+0xb4>)
	if (SCB->CFSR & SCB_CFSR_STKERR_Msk) {
    2f54:	4d2b      	ldr	r5, [pc, #172]	; (3004 <bus_fault.isra.0+0xb8>)
    2f56:	1ae4      	subs	r4, r4, r3
    2f58:	08e4      	lsrs	r4, r4, #3
	PR_FAULT_INFO("***** BUS FAULT *****");
    2f5a:	01a4      	lsls	r4, r4, #6
    2f5c:	f044 0801 	orr.w	r8, r4, #1
static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable)
    2f60:	4607      	mov	r7, r0
    2f62:	460e      	mov	r6, r1
	PR_FAULT_INFO("***** BUS FAULT *****");
    2f64:	4828      	ldr	r0, [pc, #160]	; (3008 <bus_fault.isra.0+0xbc>)
    2f66:	4641      	mov	r1, r8
    2f68:	f005 fd10 	bl	898c <log_0>
	if (SCB->CFSR & SCB_CFSR_STKERR_Msk) {
    2f6c:	6aaa      	ldr	r2, [r5, #40]	; 0x28
    2f6e:	04d1      	lsls	r1, r2, #19
    2f70:	d503      	bpl.n	2f7a <bus_fault.isra.0+0x2e>
		PR_FAULT_INFO("  Stacking error");
    2f72:	4826      	ldr	r0, [pc, #152]	; (300c <bus_fault.isra.0+0xc0>)
    2f74:	4641      	mov	r1, r8
    2f76:	f005 fd09 	bl	898c <log_0>
	if (SCB->CFSR & SCB_CFSR_UNSTKERR_Msk) {
    2f7a:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2f7c:	051a      	lsls	r2, r3, #20
    2f7e:	d504      	bpl.n	2f8a <bus_fault.isra.0+0x3e>
		PR_FAULT_INFO("  Unstacking error");
    2f80:	4823      	ldr	r0, [pc, #140]	; (3010 <bus_fault.isra.0+0xc4>)
    2f82:	f044 0101 	orr.w	r1, r4, #1
    2f86:	f005 fd01 	bl	898c <log_0>
	if (SCB->CFSR & SCB_CFSR_PRECISERR_Msk) {
    2f8a:	4d1e      	ldr	r5, [pc, #120]	; (3004 <bus_fault.isra.0+0xb8>)
    2f8c:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2f8e:	059b      	lsls	r3, r3, #22
    2f90:	d512      	bpl.n	2fb8 <bus_fault.isra.0+0x6c>
		PR_FAULT_INFO("  Precise data bus error");
    2f92:	f044 0801 	orr.w	r8, r4, #1
    2f96:	481f      	ldr	r0, [pc, #124]	; (3014 <bus_fault.isra.0+0xc8>)
    2f98:	4641      	mov	r1, r8
    2f9a:	f005 fcf7 	bl	898c <log_0>
		STORE_xFAR(bfar, SCB->BFAR);
    2f9e:	6ba9      	ldr	r1, [r5, #56]	; 0x38
		if ((SCB->CFSR & SCB_CFSR_BFARVALID_Msk) != 0) {
    2fa0:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2fa2:	0418      	lsls	r0, r3, #16
    2fa4:	d508      	bpl.n	2fb8 <bus_fault.isra.0+0x6c>
			PR_EXC("  BFAR Address: 0x%x", bfar);
    2fa6:	481c      	ldr	r0, [pc, #112]	; (3018 <bus_fault.isra.0+0xcc>)
    2fa8:	4642      	mov	r2, r8
    2faa:	f005 fcfe 	bl	89aa <log_1>
			if (from_hard_fault != 0) {
    2fae:	b11f      	cbz	r7, 2fb8 <bus_fault.isra.0+0x6c>
				SCB->CFSR &= ~SCB_CFSR_BFARVALID_Msk;
    2fb0:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2fb2:	f423 4300 	bic.w	r3, r3, #32768	; 0x8000
    2fb6:	62ab      	str	r3, [r5, #40]	; 0x28
	if (SCB->CFSR & SCB_CFSR_IMPRECISERR_Msk) {
    2fb8:	4d12      	ldr	r5, [pc, #72]	; (3004 <bus_fault.isra.0+0xb8>)
    2fba:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2fbc:	0559      	lsls	r1, r3, #21
    2fbe:	d504      	bpl.n	2fca <bus_fault.isra.0+0x7e>
		PR_FAULT_INFO("  Imprecise data bus error");
    2fc0:	4816      	ldr	r0, [pc, #88]	; (301c <bus_fault.isra.0+0xd0>)
    2fc2:	f044 0101 	orr.w	r1, r4, #1
    2fc6:	f005 fce1 	bl	898c <log_0>
	if ((SCB->CFSR & SCB_CFSR_IBUSERR_Msk) != 0) {
    2fca:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2fcc:	05da      	lsls	r2, r3, #23
    2fce:	d50d      	bpl.n	2fec <bus_fault.isra.0+0xa0>
		PR_FAULT_INFO("  Instruction bus error");
    2fd0:	4813      	ldr	r0, [pc, #76]	; (3020 <bus_fault.isra.0+0xd4>)
    2fd2:	f044 0101 	orr.w	r1, r4, #1
		PR_FAULT_INFO("  Floating-point lazy state preservation error");
    2fd6:	f005 fcd9 	bl	898c <log_0>
	SCB->CFSR |= SCB_CFSR_BUSFAULTSR_Msk;
    2fda:	4a0a      	ldr	r2, [pc, #40]	; (3004 <bus_fault.isra.0+0xb8>)
    2fdc:	6a93      	ldr	r3, [r2, #40]	; 0x28
	*recoverable = memory_fault_recoverable(esf, true);
    2fde:	2000      	movs	r0, #0
	SCB->CFSR |= SCB_CFSR_BUSFAULTSR_Msk;
    2fe0:	f443 437f 	orr.w	r3, r3, #65280	; 0xff00
    2fe4:	6293      	str	r3, [r2, #40]	; 0x28
	*recoverable = memory_fault_recoverable(esf, true);
    2fe6:	7030      	strb	r0, [r6, #0]
}
    2fe8:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
	} else if (SCB->CFSR & SCB_CFSR_LSPERR_Msk) {
    2fec:	6aab      	ldr	r3, [r5, #40]	; 0x28
    2fee:	049b      	lsls	r3, r3, #18
    2ff0:	d5f3      	bpl.n	2fda <bus_fault.isra.0+0x8e>
		PR_FAULT_INFO("  Floating-point lazy state preservation error");
    2ff2:	480c      	ldr	r0, [pc, #48]	; (3024 <bus_fault.isra.0+0xd8>)
    2ff4:	f044 0101 	orr.w	r1, r4, #1
    2ff8:	e7ed      	b.n	2fd6 <bus_fault.isra.0+0x8a>
    2ffa:	bf00      	nop
    2ffc:	00009d80 	.word	0x00009d80
    3000:	00009da8 	.word	0x00009da8
    3004:	e000ed00 	.word	0xe000ed00
    3008:	0000a9f4 	.word	0x0000a9f4
    300c:	0000aa0a 	.word	0x0000aa0a
    3010:	0000a898 	.word	0x0000a898
    3014:	0000aa1b 	.word	0x0000aa1b
    3018:	0000aa34 	.word	0x0000aa34
    301c:	0000aa49 	.word	0x0000aa49
    3020:	0000aa64 	.word	0x0000aa64
    3024:	0000a8f8 	.word	0x0000a8f8

00003028 <z_arm_fault>:
 * @param callee_regs Callee-saved registers (R4-R11, PSP)
 *
 */
void z_arm_fault(uint32_t msp, uint32_t psp, uint32_t exc_return,
	_callee_saved_t *callee_regs)
{
    3028:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
	uint32_t reason = K_ERR_CPU_EXCEPTION;
	int fault = SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk;
    302c:	4b65      	ldr	r3, [pc, #404]	; (31c4 <z_arm_fault+0x19c>)
    302e:	685e      	ldr	r6, [r3, #4]
{
    3030:	b09c      	sub	sp, #112	; 0x70
	int fault = SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk;
    3032:	f3c6 0408 	ubfx	r4, r6, #0, #9
    3036:	2700      	movs	r7, #0
    3038:	f387 8811 	msr	BASEPRI, r7
    303c:	f3bf 8f6f 	isb	sy
	if ((exc_return & EXC_RETURN_INDICATOR_PREFIX) !=
    3040:	f002 437f 	and.w	r3, r2, #4278190080	; 0xff000000
    3044:	f1b3 4f7f 	cmp.w	r3, #4278190080	; 0xff000000
    3048:	d10d      	bne.n	3066 <z_arm_fault+0x3e>
	if ((exc_return & EXC_RETURN_MODE_THREAD) &&
    304a:	f002 030c 	and.w	r3, r2, #12
    304e:	2b08      	cmp	r3, #8
    3050:	d10b      	bne.n	306a <z_arm_fault+0x42>
    3052:	495d      	ldr	r1, [pc, #372]	; (31c8 <z_arm_fault+0x1a0>)
    3054:	4b5d      	ldr	r3, [pc, #372]	; (31cc <z_arm_fault+0x1a4>)
		PR_EXC("SPSEL in thread mode does not indicate PSP");
    3056:	485e      	ldr	r0, [pc, #376]	; (31d0 <z_arm_fault+0x1a8>)
    3058:	1ac9      	subs	r1, r1, r3
    305a:	08c9      	lsrs	r1, r1, #3
    305c:	0189      	lsls	r1, r1, #6
    305e:	f041 0101 	orr.w	r1, r1, #1
    3062:	f005 fc93 	bl	898c <log_0>
		return NULL;
    3066:	463d      	mov	r5, r7
    3068:	e004      	b.n	3074 <z_arm_fault+0x4c>
		if (exc_return & EXC_RETURN_MODE_THREAD) {
    306a:	0712      	lsls	r2, r2, #28
			ptr_esf =  (z_arch_esf_t *)psp;
    306c:	bf4e      	itee	mi
    306e:	460d      	movmi	r5, r1
			ptr_esf = (z_arch_esf_t *)msp;
    3070:	4605      	movpl	r5, r0
			*nested_exc = true;
    3072:	2701      	movpl	r7, #1
	*recoverable = false;
    3074:	2300      	movs	r3, #0
    3076:	f88d 3007 	strb.w	r3, [sp, #7]
	switch (fault) {
    307a:	1ee3      	subs	r3, r4, #3
    307c:	2b09      	cmp	r3, #9
    307e:	f200 8087 	bhi.w	3190 <z_arm_fault+0x168>
    3082:	e8df f003 	tbb	[pc, r3]
    3086:	7405      	.short	0x7405
    3088:	85857178 	.word	0x85857178
    308c:	7c858585 	.word	0x7c858585
    3090:	4a4e      	ldr	r2, [pc, #312]	; (31cc <z_arm_fault+0x1a4>)
    3092:	4e4d      	ldr	r6, [pc, #308]	; (31c8 <z_arm_fault+0x1a0>)
	PR_FAULT_INFO("***** HARD FAULT *****");
    3094:	484f      	ldr	r0, [pc, #316]	; (31d4 <z_arm_fault+0x1ac>)
    3096:	1ab6      	subs	r6, r6, r2
    3098:	08f6      	lsrs	r6, r6, #3
    309a:	01b6      	lsls	r6, r6, #6
    309c:	f046 0601 	orr.w	r6, r6, #1
    30a0:	4631      	mov	r1, r6
    30a2:	f005 fc73 	bl	898c <log_0>
	if ((SCB->HFSR & SCB_HFSR_VECTTBL_Msk) != 0) {
    30a6:	4b47      	ldr	r3, [pc, #284]	; (31c4 <z_arm_fault+0x19c>)
    30a8:	6adc      	ldr	r4, [r3, #44]	; 0x2c
	*recoverable = false;
    30aa:	f04f 0800 	mov.w	r8, #0
	if ((SCB->HFSR & SCB_HFSR_VECTTBL_Msk) != 0) {
    30ae:	f014 0402 	ands.w	r4, r4, #2
	*recoverable = false;
    30b2:	f88d 8007 	strb.w	r8, [sp, #7]
	if ((SCB->HFSR & SCB_HFSR_VECTTBL_Msk) != 0) {
    30b6:	d005      	beq.n	30c4 <z_arm_fault+0x9c>
		PR_EXC("  Bus fault on vector table read");
    30b8:	4847      	ldr	r0, [pc, #284]	; (31d8 <z_arm_fault+0x1b0>)
    30ba:	4631      	mov	r1, r6
	PR_FAULT_INFO(
    30bc:	f005 fc66 	bl	898c <log_0>
	uint32_t reason = K_ERR_CPU_EXCEPTION;
    30c0:	2400      	movs	r4, #0
}
    30c2:	e006      	b.n	30d2 <z_arm_fault+0xaa>
	} else if ((SCB->HFSR & SCB_HFSR_DEBUGEVT_Msk) != 0) {
    30c4:	6ada      	ldr	r2, [r3, #44]	; 0x2c
    30c6:	2a00      	cmp	r2, #0
    30c8:	da1d      	bge.n	3106 <z_arm_fault+0xde>
		PR_EXC("  Debug event");
    30ca:	4844      	ldr	r0, [pc, #272]	; (31dc <z_arm_fault+0x1b4>)
    30cc:	4631      	mov	r1, r6
    30ce:	f005 fc5d 	bl	898c <log_0>
#ifdef CONFIG_DEBUG_COREDUMP
	z_arm_coredump_fault_sp = POINTER_TO_UINT(esf);
#endif

	reason = fault_handle(esf, fault, &recoverable);
	if (recoverable) {
    30d2:	f89d 3007 	ldrb.w	r3, [sp, #7]
    30d6:	b99b      	cbnz	r3, 3100 <z_arm_fault+0xd8>
		return;
	}

	/* Copy ESF */
#if !defined(CONFIG_EXTRA_EXCEPTION_INFO)
	memcpy(&esf_copy, esf, sizeof(z_arch_esf_t));
    30d8:	2268      	movs	r2, #104	; 0x68
    30da:	4629      	mov	r1, r5
    30dc:	a802      	add	r0, sp, #8
    30de:	f006 f844 	bl	916a <memcpy>
	/* Overwrite stacked IPSR to mark a nested exception,
	 * or a return to Thread mode. Note that this may be
	 * required, if the retrieved ESF contents are invalid
	 * due to, for instance, a stacking error.
	 */
	if (nested_exc) {
    30e2:	9b09      	ldr	r3, [sp, #36]	; 0x24
    30e4:	2f00      	cmp	r7, #0
    30e6:	d067      	beq.n	31b8 <z_arm_fault+0x190>
		if ((esf_copy.basic.xpsr & IPSR_ISR_Msk) == 0) {
    30e8:	f3c3 0208 	ubfx	r2, r3, #0, #9
    30ec:	b922      	cbnz	r2, 30f8 <z_arm_fault+0xd0>
			esf_copy.basic.xpsr |= IPSR_ISR_Msk;
    30ee:	ea6f 2353 	mvn.w	r3, r3, lsr #9
    30f2:	ea6f 2343 	mvn.w	r3, r3, lsl #9
		}
	} else {
		esf_copy.basic.xpsr &= ~(IPSR_ISR_Msk);
    30f6:	9309      	str	r3, [sp, #36]	; 0x24
	}

	z_arm_fatal_error(reason, &esf_copy);
    30f8:	a902      	add	r1, sp, #8
    30fa:	4620      	mov	r0, r4
    30fc:	f7ff fc2c 	bl	2958 <z_arm_fatal_error>
}
    3100:	b01c      	add	sp, #112	; 0x70
    3102:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
	} else if ((SCB->HFSR & SCB_HFSR_FORCED_Msk) != 0) {
    3106:	6adb      	ldr	r3, [r3, #44]	; 0x2c
    3108:	005b      	lsls	r3, r3, #1
    310a:	d5e2      	bpl.n	30d2 <z_arm_fault+0xaa>
		PR_EXC("  Fault escalation (see below)");
    310c:	4834      	ldr	r0, [pc, #208]	; (31e0 <z_arm_fault+0x1b8>)
    310e:	4631      	mov	r1, r6
    3110:	f005 fc3c 	bl	898c <log_0>
	uint16_t fault_insn = *(ret_addr - 1);
    3114:	69ab      	ldr	r3, [r5, #24]
	if (((fault_insn & 0xff00) == _SVC_OPCODE) &&
    3116:	f833 2c02 	ldrh.w	r2, [r3, #-2]
    311a:	f64d 7302 	movw	r3, #57090	; 0xdf02
    311e:	429a      	cmp	r2, r3
    3120:	d00d      	beq.n	313e <z_arm_fault+0x116>
		} else if (SCB_MMFSR != 0) {
    3122:	f103 4360 	add.w	r3, r3, #3758096384	; 0xe0000000
    3126:	f603 6326 	addw	r3, r3, #3622	; 0xe26
    312a:	781b      	ldrb	r3, [r3, #0]
    312c:	b173      	cbz	r3, 314c <z_arm_fault+0x124>
			reason = mem_manage_fault(esf, 1, recoverable);
    312e:	f10d 0207 	add.w	r2, sp, #7
    3132:	2101      	movs	r1, #1
		reason = mem_manage_fault(esf, 0, recoverable);
    3134:	4628      	mov	r0, r5
    3136:	f7ff fe2b 	bl	2d90 <mem_manage_fault>
    313a:	4604      	mov	r4, r0
		break;
    313c:	e7c9      	b.n	30d2 <z_arm_fault+0xaa>
			PR_EXC("ARCH_EXCEPT with reason %x\n", esf->basic.r0);
    313e:	6829      	ldr	r1, [r5, #0]
    3140:	4828      	ldr	r0, [pc, #160]	; (31e4 <z_arm_fault+0x1bc>)
    3142:	4632      	mov	r2, r6
    3144:	f005 fc31 	bl	89aa <log_1>
			reason = esf->basic.r0;
    3148:	682c      	ldr	r4, [r5, #0]
    314a:	e7c2      	b.n	30d2 <z_arm_fault+0xaa>
		} else if (SCB_BFSR != 0) {
    314c:	4b26      	ldr	r3, [pc, #152]	; (31e8 <z_arm_fault+0x1c0>)
    314e:	781b      	ldrb	r3, [r3, #0]
    3150:	b12b      	cbz	r3, 315e <z_arm_fault+0x136>
			reason = bus_fault(esf, 1, recoverable);
    3152:	f10d 0107 	add.w	r1, sp, #7
    3156:	2001      	movs	r0, #1
		reason = bus_fault(esf, 0, recoverable);
    3158:	f7ff fef8 	bl	2f4c <bus_fault.isra.0>
    315c:	e7ed      	b.n	313a <z_arm_fault+0x112>
		} else if (SCB_UFSR != 0) {
    315e:	4b23      	ldr	r3, [pc, #140]	; (31ec <z_arm_fault+0x1c4>)
    3160:	881b      	ldrh	r3, [r3, #0]
    3162:	b29b      	uxth	r3, r3
    3164:	2b00      	cmp	r3, #0
    3166:	d0b4      	beq.n	30d2 <z_arm_fault+0xaa>
		reason = usage_fault(esf);
    3168:	f7ff fe94 	bl	2e94 <usage_fault.isra.0>
    316c:	e7e5      	b.n	313a <z_arm_fault+0x112>
		reason = mem_manage_fault(esf, 0, recoverable);
    316e:	f10d 0207 	add.w	r2, sp, #7
    3172:	2100      	movs	r1, #0
    3174:	e7de      	b.n	3134 <z_arm_fault+0x10c>
		reason = bus_fault(esf, 0, recoverable);
    3176:	f10d 0107 	add.w	r1, sp, #7
    317a:	2000      	movs	r0, #0
    317c:	e7ec      	b.n	3158 <z_arm_fault+0x130>
    317e:	4912      	ldr	r1, [pc, #72]	; (31c8 <z_arm_fault+0x1a0>)
    3180:	4b12      	ldr	r3, [pc, #72]	; (31cc <z_arm_fault+0x1a4>)
	PR_FAULT_INFO(
    3182:	481b      	ldr	r0, [pc, #108]	; (31f0 <z_arm_fault+0x1c8>)
    3184:	1ac9      	subs	r1, r1, r3
    3186:	08c9      	lsrs	r1, r1, #3
    3188:	0189      	lsls	r1, r1, #6
    318a:	f041 0101 	orr.w	r1, r1, #1
    318e:	e795      	b.n	30bc <z_arm_fault+0x94>
    3190:	4a0e      	ldr	r2, [pc, #56]	; (31cc <z_arm_fault+0x1a4>)
    3192:	4b0d      	ldr	r3, [pc, #52]	; (31c8 <z_arm_fault+0x1a0>)
	PR_FAULT_INFO("***** %s %d) *****",
    3194:	4817      	ldr	r0, [pc, #92]	; (31f4 <z_arm_fault+0x1cc>)
    3196:	4918      	ldr	r1, [pc, #96]	; (31f8 <z_arm_fault+0x1d0>)
    3198:	1a9b      	subs	r3, r3, r2
    319a:	08db      	lsrs	r3, r3, #3
    319c:	f416 7ff8 	tst.w	r6, #496	; 0x1f0
    31a0:	ea4f 1383 	mov.w	r3, r3, lsl #6
    31a4:	bf18      	it	ne
    31a6:	4601      	movne	r1, r0
    31a8:	f043 0301 	orr.w	r3, r3, #1
    31ac:	4813      	ldr	r0, [pc, #76]	; (31fc <z_arm_fault+0x1d4>)
    31ae:	f1a4 0210 	sub.w	r2, r4, #16
    31b2:	f005 fc11 	bl	89d8 <log_2>
    31b6:	e783      	b.n	30c0 <z_arm_fault+0x98>
		esf_copy.basic.xpsr &= ~(IPSR_ISR_Msk);
    31b8:	f423 73ff 	bic.w	r3, r3, #510	; 0x1fe
    31bc:	f023 0301 	bic.w	r3, r3, #1
    31c0:	e799      	b.n	30f6 <z_arm_fault+0xce>
    31c2:	bf00      	nop
    31c4:	e000ed00 	.word	0xe000ed00
    31c8:	00009da8 	.word	0x00009da8
    31cc:	00009d80 	.word	0x00009d80
    31d0:	0000aa7c 	.word	0x0000aa7c
    31d4:	0000aaa7 	.word	0x0000aaa7
    31d8:	0000aabe 	.word	0x0000aabe
    31dc:	0000aadf 	.word	0x0000aadf
    31e0:	0000aaed 	.word	0x0000aaed
    31e4:	0000ab0c 	.word	0x0000ab0c
    31e8:	e000ed29 	.word	0xe000ed29
    31ec:	e000ed2a 	.word	0xe000ed2a
    31f0:	0000ab28 	.word	0x0000ab28
    31f4:	0000ab61 	.word	0x0000ab61
    31f8:	0000ab4c 	.word	0x0000ab4c
    31fc:	0000ab7a 	.word	0x0000ab7a

00003200 <z_arm_fault_init>:
 */
void z_arm_fault_init(void)
{
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	SCB->CCR |= SCB_CCR_DIV_0_TRP_Msk;
    3200:	4a02      	ldr	r2, [pc, #8]	; (320c <z_arm_fault_init+0xc>)
    3202:	6953      	ldr	r3, [r2, #20]
    3204:	f043 0310 	orr.w	r3, r3, #16
    3208:	6153      	str	r3, [r2, #20]
	 * Stack to attempt to descend into secure region, in which case a
	 * Secure Hard Fault will occur and we can track the fault from there.
	 */
	SCB->CCR |= SCB_CCR_STKOFHFNMIGN_Msk;
#endif /* CONFIG_BUILTIN_STACK_GUARD */
}
    320a:	4770      	bx	lr
    320c:	e000ed00 	.word	0xe000ed00

00003210 <z_arm_bus_fault>:
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
SECTION_SUBSEC_FUNC(TEXT,__fault,z_arm_exc_spurious)

	mrs r0, MSP
    3210:	f3ef 8008 	mrs	r0, MSP
	mrs r1, PSP
    3214:	f3ef 8109 	mrs	r1, PSP
	push {r0, lr}
    3218:	b501      	push	{r0, lr}
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	push {r4-r11}
#endif
	mov  r3, sp /* pointer to _callee_saved_t */
#endif /* CONFIG_EXTRA_EXCEPTION_INFO */
	mov r2, lr /* EXC_RETURN */
    321a:	4672      	mov	r2, lr
	bl z_arm_fault
    321c:	f7ff ff04 	bl	3028 <z_arm_fault>
	 * in this routine. Therefore, we can just reset
	 * the MSP to its value prior to entering the function
	 */
	add sp, #40
#endif
	pop {r0, pc}
    3220:	bd01      	pop	{r0, pc}
    3222:	bf00      	nop

00003224 <z_arm_interrupt_init>:
    3224:	4804      	ldr	r0, [pc, #16]	; (3238 <z_arm_interrupt_init+0x14>)
 * @return N/A
 */

void z_arm_interrupt_init(void)
{
	int irq = 0;
    3226:	2300      	movs	r3, #0
    3228:	2120      	movs	r1, #32
    322a:	18c2      	adds	r2, r0, r3

	for (; irq < CONFIG_NUM_IRQS; irq++) {
    322c:	3301      	adds	r3, #1
    322e:	2b30      	cmp	r3, #48	; 0x30
    3230:	f882 1300 	strb.w	r1, [r2, #768]	; 0x300
    3234:	d1f9      	bne.n	322a <z_arm_interrupt_init+0x6>
		NVIC_SetPriority((IRQn_Type)irq, _IRQ_PRIO_OFFSET);
	}
}
    3236:	4770      	bx	lr
    3238:	e000e100 	.word	0xe000e100

0000323c <__start>:
 */
SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)

#if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)
    /* Reset CONTROL register */
    movs.n r0, #0
    323c:	2000      	movs	r0, #0
    msr CONTROL, r0
    323e:	f380 8814 	msr	CONTROL, r0
    isb
    3242:	f3bf 8f6f 	isb	sy
#endif /* CONFIG_CPU_CORTEX_M_HAS_SPLIM */

#endif /* CONFIG_INIT_ARCH_HW_AT_BOOT */

#if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
    bl z_arm_platform_init
    3246:	f006 fc55 	bl	9af4 <z_arm_platform_init>
#endif

#if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)
#if defined(CONFIG_CPU_HAS_ARM_MPU)
    /* Disable MPU */
    movs.n r0, #0
    324a:	2000      	movs	r0, #0
    ldr r1, =_SCS_MPU_CTRL
    324c:	490d      	ldr	r1, [pc, #52]	; (3284 <__start+0x48>)
    str r0, [r1]
    324e:	6008      	str	r0, [r1, #0]
    dsb
    3250:	f3bf 8f4f 	dsb	sy
#endif /* CONFIG_CPU_HAS_ARM_MPU */
    ldr r0, =z_main_stack + CONFIG_MAIN_STACK_SIZE
    3254:	480c      	ldr	r0, [pc, #48]	; (3288 <__start+0x4c>)
    msr msp, r0
    3256:	f380 8808 	msr	MSP, r0

    /* Initialize core architecture registers and system blocks */
    bl z_arm_init_arch_hw_at_boot
    325a:	f000 f829 	bl	32b0 <z_arm_init_arch_hw_at_boot>

    /* lock interrupts: will get unlocked when switch to main task */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
    cpsid i
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    movs.n r0, #_EXC_IRQ_DEFAULT_PRIO
    325e:	2020      	movs	r0, #32
    msr BASEPRI, r0
    3260:	f380 8811 	msr	BASEPRI, r0

    /*
     * Set PSP and use it to boot without using MSP, so that it
     * gets set to z_interrupt_stacks during initialization.
     */
    ldr r0, =z_interrupt_stacks
    3264:	4809      	ldr	r0, [pc, #36]	; (328c <__start+0x50>)
    ldr r1, =CONFIG_ISR_STACK_SIZE + MPU_GUARD_ALIGN_AND_SIZE
    3266:	f44f 6102 	mov.w	r1, #2080	; 0x820
    adds r0, r0, r1
    326a:	1840      	adds	r0, r0, r1
    msr PSP, r0
    326c:	f380 8809 	msr	PSP, r0
    mrs r0, CONTROL
    3270:	f3ef 8014 	mrs	r0, CONTROL
    movs r1, #2
    3274:	2102      	movs	r1, #2
    orrs r0, r1 /* CONTROL_SPSEL_Msk */
    3276:	4308      	orrs	r0, r1
    msr CONTROL, r0
    3278:	f380 8814 	msr	CONTROL, r0
    /*
     * When changing the stack pointer, software must use an ISB instruction
     * immediately after the MSR instruction. This ensures that instructions
     * after the ISB instruction execute using the new stack pointer.
     */
    isb
    327c:	f3bf 8f6f 	isb	sy
    /*
     * 'bl' jumps the furthest of the branch instructions that are
     * supported on all platforms. So it is used when jumping to z_arm_prep_c
     * (even though we do not intend to return).
     */
    bl z_arm_prep_c
    3280:	f7ff fc18 	bl	2ab4 <z_arm_prep_c>
    ldr r1, =_SCS_MPU_CTRL
    3284:	e000ed94 	.word	0xe000ed94
    ldr r0, =z_main_stack + CONFIG_MAIN_STACK_SIZE
    3288:	20004b00 	.word	0x20004b00
    ldr r0, =z_interrupt_stacks
    328c:	20004d00 	.word	0x20004d00

00003290 <z_arm_clear_arm_mpu_config>:
void z_arm_clear_arm_mpu_config(void)
{
	int i;

	int num_regions =
		((MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos);
    3290:	4a06      	ldr	r2, [pc, #24]	; (32ac <z_arm_clear_arm_mpu_config+0x1c>)
    3292:	6811      	ldr	r1, [r2, #0]

	for (i = 0; i < num_regions; i++) {
    3294:	2300      	movs	r3, #0
	int num_regions =
    3296:	f3c1 2107 	ubfx	r1, r1, #8, #8
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
{
  MPU->RNR = rnr;
  MPU->RASR = 0U;
    329a:	4618      	mov	r0, r3
	for (i = 0; i < num_regions; i++) {
    329c:	428b      	cmp	r3, r1
    329e:	d100      	bne.n	32a2 <z_arm_clear_arm_mpu_config+0x12>
		ARM_MPU_ClrRegion(i);
	}
}
    32a0:	4770      	bx	lr
  MPU->RNR = rnr;
    32a2:	6093      	str	r3, [r2, #8]
  MPU->RASR = 0U;
    32a4:	6110      	str	r0, [r2, #16]
	for (i = 0; i < num_regions; i++) {
    32a6:	3301      	adds	r3, #1
    32a8:	e7f8      	b.n	329c <z_arm_clear_arm_mpu_config+0xc>
    32aa:	bf00      	nop
    32ac:	e000ed90 	.word	0xe000ed90

000032b0 <z_arm_init_arch_hw_at_boot>:
 * components and core registers.
 *
 * @return N/A
 */
void z_arm_init_arch_hw_at_boot(void)
{
    32b0:	b508      	push	{r3, lr}
  __ASM volatile ("cpsid i" : : : "memory");
    32b2:	b672      	cpsid	i
  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
    32b4:	2300      	movs	r3, #0
    32b6:	f383 8813 	msr	FAULTMASK, r3

	/* Initialize System Control Block components */

#if defined(CONFIG_CPU_HAS_ARM_MPU) || defined(CONFIG_CPU_HAS_NXP_MPU)
	/* Clear MPU region configuration */
	z_arm_clear_arm_mpu_config();
    32ba:	f7ff ffe9 	bl	3290 <z_arm_clear_arm_mpu_config>
#endif /* CONFIG_CPU_HAS_ARM_MPU */

	/* Disable NVIC interrupts */
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {
		NVIC->ICER[i] = 0xFFFFFFFF;
    32be:	4b14      	ldr	r3, [pc, #80]	; (3310 <z_arm_init_arch_hw_at_boot+0x60>)
    32c0:	f04f 32ff 	mov.w	r2, #4294967295
    32c4:	f8c3 2080 	str.w	r2, [r3, #128]	; 0x80
    32c8:	f8c3 2084 	str.w	r2, [r3, #132]	; 0x84
    32cc:	f8c3 2088 	str.w	r2, [r3, #136]	; 0x88
    32d0:	f8c3 208c 	str.w	r2, [r3, #140]	; 0x8c
    32d4:	f8c3 2090 	str.w	r2, [r3, #144]	; 0x90
    32d8:	f8c3 2094 	str.w	r2, [r3, #148]	; 0x94
    32dc:	f8c3 2098 	str.w	r2, [r3, #152]	; 0x98
    32e0:	f8c3 209c 	str.w	r2, [r3, #156]	; 0x9c
	}
	/* Clear pending NVIC interrupts */
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICPR); i++) {
		NVIC->ICPR[i] = 0xFFFFFFFF;
    32e4:	f8c3 2180 	str.w	r2, [r3, #384]	; 0x180
    32e8:	f8c3 2184 	str.w	r2, [r3, #388]	; 0x184
    32ec:	f8c3 2188 	str.w	r2, [r3, #392]	; 0x188
    32f0:	f8c3 218c 	str.w	r2, [r3, #396]	; 0x18c
    32f4:	f8c3 2190 	str.w	r2, [r3, #400]	; 0x190
    32f8:	f8c3 2194 	str.w	r2, [r3, #404]	; 0x194
    32fc:	f8c3 2198 	str.w	r2, [r3, #408]	; 0x198
    3300:	f8c3 219c 	str.w	r2, [r3, #412]	; 0x19c
  __ASM volatile ("cpsie i" : : : "memory");
    3304:	b662      	cpsie	i
  __ASM volatile ("dsb 0xF":::"memory");
    3306:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("isb 0xF":::"memory");
    330a:	f3bf 8f6f 	isb	sy
	/* Restore Interrupts */
	__enable_irq();

	__DSB();
	__ISB();
}
    330e:	bd08      	pop	{r3, pc}
    3310:	e000e100 	.word	0xe000e100

00003314 <z_impl_k_thread_abort>:
#include <wait_q.h>
#include <sys/__assert.h>

void z_impl_k_thread_abort(k_tid_t thread)
{
	if (_current == thread) {
    3314:	4b06      	ldr	r3, [pc, #24]	; (3330 <z_impl_k_thread_abort+0x1c>)
    3316:	689b      	ldr	r3, [r3, #8]
    3318:	4283      	cmp	r3, r0
    331a:	d107      	bne.n	332c <z_impl_k_thread_abort+0x18>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
    331c:	f3ef 8305 	mrs	r3, IPSR
		if (arch_is_in_isr()) {
    3320:	b123      	cbz	r3, 332c <z_impl_k_thread_abort+0x18>
			 * should no longer run after we return, so
			 * Trigger PendSV, in case we are in one of the
			 * situations where the isr check is true but there
			 * is not an implicit scheduler invocation.
			 */
			SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk;
    3322:	4a04      	ldr	r2, [pc, #16]	; (3334 <z_impl_k_thread_abort+0x20>)
    3324:	6853      	ldr	r3, [r2, #4]
    3326:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
    332a:	6053      	str	r3, [r2, #4]
		}
	}

	z_thread_abort(thread);
    332c:	f002 bffe 	b.w	632c <z_thread_abort>
    3330:	200017fc 	.word	0x200017fc
    3334:	e000ed00 	.word	0xe000ed00

00003338 <z_arm_configure_static_mpu_regions>:
	/* Configure the static MPU regions within firmware SRAM boundaries.
	 * Start address of the image is given by _image_ram_start. The end
	 * of the firmware SRAM area is marked by __kernel_ram_end, taking
	 * into account the unused SRAM area, as well.
	 */
	arm_core_mpu_configure_static_mpu_regions(static_regions,
    3338:	4b02      	ldr	r3, [pc, #8]	; (3344 <z_arm_configure_static_mpu_regions+0xc>)
    333a:	4a03      	ldr	r2, [pc, #12]	; (3348 <z_arm_configure_static_mpu_regions+0x10>)
    333c:	4803      	ldr	r0, [pc, #12]	; (334c <z_arm_configure_static_mpu_regions+0x14>)
    333e:	2101      	movs	r1, #1
    3340:	f000 b88a 	b.w	3458 <arm_core_mpu_configure_static_mpu_regions>
    3344:	20040000 	.word	0x20040000
    3348:	20000000 	.word	0x20000000
    334c:	00009f58 	.word	0x00009f58

00003350 <z_arm_configure_dynamic_mpu_regions>:
 *
 * This function is not inherently thread-safe, but the memory domain
 * spinlock needs to be held anyway.
 */
void z_arm_configure_dynamic_mpu_regions(struct k_thread *thread)
{
    3350:	b510      	push	{r4, lr}
    3352:	4604      	mov	r4, r0
	/* Privileged stack guard */
	uintptr_t guard_start;
	size_t guard_size = MPU_GUARD_ALIGN_AND_SIZE;

#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
	guard_size = z_arm_mpu_stack_guard_and_fpu_adjust(thread);
    3354:	f7ff fc7e 	bl	2c54 <z_arm_mpu_stack_guard_and_fpu_adjust>
#endif /* CONFIG_USERSPACE */
	{
		/* A supervisor thread only has the normal thread stack to
		 * protect with a stack guard.
		 */
		guard_start = thread->stack_info.start - guard_size;
    3358:	6e62      	ldr	r2, [r4, #100]	; 0x64
	}

	__ASSERT(region_num < _MAX_DYNAMIC_MPU_REGIONS_NUM,
		"Out-of-bounds error for dynamic region map.");

	dynamic_regions[region_num].start = guard_start;
    335a:	4b06      	ldr	r3, [pc, #24]	; (3374 <z_arm_configure_dynamic_mpu_regions+0x24>)
		guard_start = thread->stack_info.start - guard_size;
    335c:	1a12      	subs	r2, r2, r0
	dynamic_regions[region_num].size = guard_size;
    335e:	e9c3 2000 	strd	r2, r0, [r3]
	dynamic_regions[region_num].attr = K_MEM_PARTITION_P_RO_U_NA;
    3362:	4a05      	ldr	r2, [pc, #20]	; (3378 <z_arm_configure_dynamic_mpu_regions+0x28>)
    3364:	609a      	str	r2, [r3, #8]
#endif /* CONFIG_MPU_STACK_GUARD */

	/* Configure the dynamic MPU regions */
	arm_core_mpu_configure_dynamic_mpu_regions(dynamic_regions,
						   region_num);
}
    3366:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
	arm_core_mpu_configure_dynamic_mpu_regions(dynamic_regions,
    336a:	2101      	movs	r1, #1
    336c:	4618      	mov	r0, r3
    336e:	f000 b87d 	b.w	346c <arm_core_mpu_configure_dynamic_mpu_regions>
    3372:	bf00      	nop
    3374:	20001694 	.word	0x20001694
    3378:	150b0000 	.word	0x150b0000

0000337c <mpu_configure_regions>:
 * sanity check of the memory regions to be programmed.
 */
static int mpu_configure_regions(const struct z_arm_mpu_partition
	regions[], uint8_t regions_num, uint8_t start_reg_index,
	bool do_sanity_check)
{
    337c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
#endif /* CPU_CORTEX_M0PLUS | CPU_CORTEX_M3 | CPU_CORTEX_M4 */
}

static inline void set_region_number(uint32_t index)
{
	MPU->RNR = index;
    337e:	4f28      	ldr	r7, [pc, #160]	; (3420 <mpu_configure_regions+0xa4>)
	int i;
	int reg_index = start_reg_index;

	for (i = 0; i < regions_num; i++) {
    3380:	2600      	movs	r6, #0
    3382:	428e      	cmp	r6, r1
    3384:	da15      	bge.n	33b2 <mpu_configure_regions+0x36>
		if (regions[i].size == 0U) {
    3386:	6844      	ldr	r4, [r0, #4]
    3388:	2c00      	cmp	r4, #0
    338a:	d046      	beq.n	341a <mpu_configure_regions+0x9e>
			continue;
		}
		/* Non-empty region. */

		if (do_sanity_check &&
    338c:	b1cb      	cbz	r3, 33c2 <mpu_configure_regions+0x46>
	 * and greater or equal to the minimum
	 * MPU region size. Start address of the
	 * partition must align with size.
	 */
	int partition_is_valid =
		((part->size & (part->size - 1U)) == 0U)
    338e:	f104 3cff 	add.w	ip, r4, #4294967295
		&&
		(part->size >= CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE)
		&&
    3392:	ea14 0f0c 	tst.w	r4, ip
    3396:	d00e      	beq.n	33b6 <mpu_configure_regions+0x3a>
    3398:	4a22      	ldr	r2, [pc, #136]	; (3424 <mpu_configure_regions+0xa8>)
    339a:	4b23      	ldr	r3, [pc, #140]	; (3428 <mpu_configure_regions+0xac>)
				(!mpu_partition_is_valid(&regions[i]))) {
			LOG_ERR("Partition %u: sanity check failed.", i);
    339c:	4823      	ldr	r0, [pc, #140]	; (342c <mpu_configure_regions+0xb0>)
    339e:	1ad2      	subs	r2, r2, r3
    33a0:	08d2      	lsrs	r2, r2, #3
    33a2:	0192      	lsls	r2, r2, #6
    33a4:	f042 0201 	orr.w	r2, r2, #1
    33a8:	4631      	mov	r1, r6
		LOG_ERR("Failed to allocate new MPU region %u\n", index);
    33aa:	f005 fafe 	bl	89aa <log_1>
			return -EINVAL;
		}

		reg_index = mpu_configure_region(reg_index, &regions[i]);
    33ae:	f06f 0215 	mvn.w	r2, #21
		/* Increment number of programmed MPU indices. */
		reg_index++;
	}

	return reg_index;
}
    33b2:	4610      	mov	r0, r2
    33b4:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
		&&
    33b6:	2c1f      	cmp	r4, #31
    33b8:	d9ee      	bls.n	3398 <mpu_configure_regions+0x1c>
		((part->start & (part->size - 1U)) == 0U);
    33ba:	6805      	ldr	r5, [r0, #0]
		&&
    33bc:	ea1c 0f05 	tst.w	ip, r5
    33c0:	d1ea      	bne.n	3398 <mpu_configure_regions+0x1c>
 * to that power-of-two value.
 */
static inline uint32_t size_to_mpu_rasr_size(uint32_t size)
{
	/* The minimal supported region size is 32 bytes */
	if (size <= 32U) {
    33c2:	2c20      	cmp	r4, #32
		reg_index = mpu_configure_region(reg_index, &regions[i]);
    33c4:	b2d5      	uxtb	r5, r2
	get_region_attr_from_mpu_partition_info(&region_conf.attr,
    33c6:	f8d0 c008 	ldr.w	ip, [r0, #8]
	region_conf.base = new_region->start;
    33ca:	6802      	ldr	r2, [r0, #0]
    33cc:	d916      	bls.n	33fc <mpu_configure_regions+0x80>
	/*
	 * A size value greater than 2^31 could not be handled by
	 * round_up_to_next_power_of_two() properly. We handle
	 * it separately here.
	 */
	if (size > (1UL << 31)) {
    33ce:	f1b4 4f00 	cmp.w	r4, #2147483648	; 0x80000000
    33d2:	d815      	bhi.n	3400 <mpu_configure_regions+0x84>
		return REGION_4G;
	}

	return ((32 - __builtin_clz(size - 1U) - 2 + 1) << MPU_RASR_SIZE_Pos) &
    33d4:	3c01      	subs	r4, #1
    33d6:	fab4 f484 	clz	r4, r4
    33da:	f1c4 041f 	rsb	r4, r4, #31
    33de:	0064      	lsls	r4, r4, #1
	if (index > (get_num_regions() - 1U)) {
    33e0:	2d07      	cmp	r5, #7
#if defined(CONFIG_CPU_CORTEX_R)
	(void) size;

	p_attr->rasr = attr->rasr_attr;
#else
	p_attr->rasr = attr->rasr_attr | size_to_mpu_rasr_size(size);
    33e2:	ea4c 0404 	orr.w	r4, ip, r4
    33e6:	d90d      	bls.n	3404 <mpu_configure_regions+0x88>
    33e8:	4a0e      	ldr	r2, [pc, #56]	; (3424 <mpu_configure_regions+0xa8>)
    33ea:	4b0f      	ldr	r3, [pc, #60]	; (3428 <mpu_configure_regions+0xac>)
		LOG_ERR("Failed to allocate new MPU region %u\n", index);
    33ec:	4810      	ldr	r0, [pc, #64]	; (3430 <mpu_configure_regions+0xb4>)
    33ee:	1ad2      	subs	r2, r2, r3
    33f0:	08d2      	lsrs	r2, r2, #3
    33f2:	0192      	lsls	r2, r2, #6
    33f4:	f042 0201 	orr.w	r2, r2, #1
    33f8:	4629      	mov	r1, r5
    33fa:	e7d6      	b.n	33aa <mpu_configure_regions+0x2e>
		return REGION_32B;
    33fc:	2408      	movs	r4, #8
    33fe:	e7ef      	b.n	33e0 <mpu_configure_regions+0x64>
		return REGION_4G;
    3400:	243e      	movs	r4, #62	; 0x3e
    3402:	e7ed      	b.n	33e0 <mpu_configure_regions+0x64>
	MPU->RBAR = (region_conf->base & MPU_RBAR_ADDR_Msk)
    3404:	f022 021f 	bic.w	r2, r2, #31
				| MPU_RBAR_VALID_Msk | index;
    3408:	432a      	orrs	r2, r5
    340a:	f042 0210 	orr.w	r2, r2, #16
	MPU->RASR = region_conf->attr.rasr | MPU_RASR_ENABLE_Msk;
    340e:	f044 0401 	orr.w	r4, r4, #1
    3412:	60bd      	str	r5, [r7, #8]
	MPU->RBAR = (region_conf->base & MPU_RBAR_ADDR_Msk)
    3414:	60fa      	str	r2, [r7, #12]
	MPU->RASR = region_conf->attr.rasr | MPU_RASR_ENABLE_Msk;
    3416:	613c      	str	r4, [r7, #16]
		reg_index++;
    3418:	1c6a      	adds	r2, r5, #1
	for (i = 0; i < regions_num; i++) {
    341a:	3601      	adds	r6, #1
    341c:	300c      	adds	r0, #12
    341e:	e7b0      	b.n	3382 <mpu_configure_regions+0x6>
    3420:	e000ed90 	.word	0xe000ed90
    3424:	00009da0 	.word	0x00009da0
    3428:	00009d80 	.word	0x00009d80
    342c:	0000ab91 	.word	0x0000ab91
    3430:	0000abb4 	.word	0x0000abb4

00003434 <arm_core_mpu_enable>:
void arm_core_mpu_enable(void)
{
	/* Enable MPU and use the default memory map as a
	 * background region for privileged software access.
	 */
	MPU->CTRL = MPU_CTRL_ENABLE_Msk | MPU_CTRL_PRIVDEFENA_Msk;
    3434:	4b03      	ldr	r3, [pc, #12]	; (3444 <arm_core_mpu_enable+0x10>)
    3436:	2205      	movs	r2, #5
    3438:	605a      	str	r2, [r3, #4]
  __ASM volatile ("dsb 0xF":::"memory");
    343a:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("isb 0xF":::"memory");
    343e:	f3bf 8f6f 	isb	sy

	/* Make sure that all the registers are set before proceeding */
	__DSB();
	__ISB();
}
    3442:	4770      	bx	lr
    3444:	e000ed90 	.word	0xe000ed90

00003448 <arm_core_mpu_disable>:
  __ASM volatile ("dmb 0xF":::"memory");
    3448:	f3bf 8f5f 	dmb	sy
{
	/* Force any outstanding transfers to complete before disabling MPU */
	__DMB();

	/* Disable MPU */
	MPU->CTRL = 0;
    344c:	4b01      	ldr	r3, [pc, #4]	; (3454 <arm_core_mpu_disable+0xc>)
    344e:	2200      	movs	r2, #0
    3450:	605a      	str	r2, [r3, #4]
}
    3452:	4770      	bx	lr
    3454:	e000ed90 	.word	0xe000ed90

00003458 <arm_core_mpu_configure_static_mpu_regions>:
 * @brief configure fixed (static) MPU regions.
 */
void arm_core_mpu_configure_static_mpu_regions(const struct z_arm_mpu_partition
	static_regions[], const uint8_t regions_num,
	const uint32_t background_area_start, const uint32_t background_area_end)
{
    3458:	b510      	push	{r4, lr}
static int mpu_configure_static_mpu_regions(const struct z_arm_mpu_partition
	static_regions[], const uint8_t regions_num,
	const uint32_t background_area_base,
	const uint32_t background_area_end)
{
	int mpu_reg_index = static_regions_num;
    345a:	4c03      	ldr	r4, [pc, #12]	; (3468 <arm_core_mpu_configure_static_mpu_regions+0x10>)
	 * programmed on top of SRAM region configuration.
	 */
	ARG_UNUSED(background_area_base);
	ARG_UNUSED(background_area_end);

	mpu_reg_index = mpu_configure_regions(static_regions,
    345c:	2301      	movs	r3, #1
    345e:	7822      	ldrb	r2, [r4, #0]
    3460:	f7ff ff8c 	bl	337c <mpu_configure_regions>
		regions_num, mpu_reg_index, true);

	static_regions_num = mpu_reg_index;
    3464:	7020      	strb	r0, [r4, #0]
					       background_area_start, background_area_end) == -EINVAL) {

		__ASSERT(0, "Configuring %u static MPU regions failed\n",
			regions_num);
	}
}
    3466:	bd10      	pop	{r4, pc}
    3468:	20001964 	.word	0x20001964

0000346c <arm_core_mpu_configure_dynamic_mpu_regions>:
/**
 * @brief configure dynamic MPU regions.
 */
void arm_core_mpu_configure_dynamic_mpu_regions(const struct z_arm_mpu_partition
	dynamic_regions[], uint8_t regions_num)
{
    346c:	b508      	push	{r3, lr}

	/* In ARMv7-M architecture the dynamic regions are
	 * programmed on top of existing SRAM region configuration.
	 */

	mpu_reg_index = mpu_configure_regions(dynamic_regions,
    346e:	4a08      	ldr	r2, [pc, #32]	; (3490 <arm_core_mpu_configure_dynamic_mpu_regions+0x24>)
    3470:	2300      	movs	r3, #0
    3472:	7812      	ldrb	r2, [r2, #0]
    3474:	f7ff ff82 	bl	337c <mpu_configure_regions>
		regions_num, mpu_reg_index, false);

	if (mpu_reg_index != -EINVAL) {
    3478:	f110 0f16 	cmn.w	r0, #22
    347c:	d003      	beq.n	3486 <arm_core_mpu_configure_dynamic_mpu_regions+0x1a>
  MPU->RNR = rnr;
    347e:	4b05      	ldr	r3, [pc, #20]	; (3494 <arm_core_mpu_configure_dynamic_mpu_regions+0x28>)
  MPU->RASR = 0U;
    3480:	2200      	movs	r2, #0

		/* Disable the non-programmed MPU regions. */
		for (int i = mpu_reg_index; i < get_num_regions(); i++) {
    3482:	2807      	cmp	r0, #7
    3484:	dd00      	ble.n	3488 <arm_core_mpu_configure_dynamic_mpu_regions+0x1c>
		== -EINVAL) {

		__ASSERT(0, "Configuring %u dynamic MPU regions failed\n",
			regions_num);
	}
}
    3486:	bd08      	pop	{r3, pc}
  MPU->RNR = rnr;
    3488:	6098      	str	r0, [r3, #8]
  MPU->RASR = 0U;
    348a:	611a      	str	r2, [r3, #16]
    348c:	3001      	adds	r0, #1
    348e:	e7f8      	b.n	3482 <arm_core_mpu_configure_dynamic_mpu_regions+0x16>
    3490:	20001964 	.word	0x20001964
    3494:	e000ed90 	.word	0xe000ed90

00003498 <z_arm_mpu_init>:
 */
int z_arm_mpu_init(void)
{
	uint32_t r_index;

	if (mpu_config.num_regions > get_num_regions()) {
    3498:	4913      	ldr	r1, [pc, #76]	; (34e8 <z_arm_mpu_init+0x50>)
    349a:	6808      	ldr	r0, [r1, #0]
    349c:	2808      	cmp	r0, #8
{
    349e:	b510      	push	{r4, lr}
	if (mpu_config.num_regions > get_num_regions()) {
    34a0:	d81e      	bhi.n	34e0 <z_arm_mpu_init+0x48>
		return -1;
	}

	LOG_DBG("total region count: %d", get_num_regions());

	arm_core_mpu_disable();
    34a2:	f7ff ffd1 	bl	3448 <arm_core_mpu_disable>
    34a6:	4c11      	ldr	r4, [pc, #68]	; (34ec <z_arm_mpu_init+0x54>)
    34a8:	6849      	ldr	r1, [r1, #4]

	/* Architecture-specific configuration */
	mpu_init();

	/* Program fixed regions configured at SOC definition. */
	for (r_index = 0U; r_index < mpu_config.num_regions; r_index++) {
    34aa:	2200      	movs	r2, #0
    34ac:	4290      	cmp	r0, r2
    34ae:	f101 010c 	add.w	r1, r1, #12
    34b2:	d105      	bne.n	34c0 <z_arm_mpu_init+0x28>
		region_init(r_index, &mpu_config.mpu_regions[r_index]);
	}

	/* Update the number of programmed MPU regions. */
	static_regions_num = mpu_config.num_regions;
    34b4:	4b0e      	ldr	r3, [pc, #56]	; (34f0 <z_arm_mpu_init+0x58>)
    34b6:	7018      	strb	r0, [r3, #0]


	arm_core_mpu_enable();
    34b8:	f7ff ffbc 	bl	3434 <arm_core_mpu_enable>
		(MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos ==
		NUM_MPU_REGIONS,
		"Invalid number of MPU regions\n");
#endif /* CORTEX_M0PLUS || CPU_CORTEX_M3 || CPU_CORTEX_M4 */

	return 0;
    34bc:	2000      	movs	r0, #0
}
    34be:	bd10      	pop	{r4, pc}
    34c0:	60a2      	str	r2, [r4, #8]
	MPU->RBAR = (region_conf->base & MPU_RBAR_ADDR_Msk)
    34c2:	f851 3c0c 	ldr.w	r3, [r1, #-12]
    34c6:	f023 031f 	bic.w	r3, r3, #31
				| MPU_RBAR_VALID_Msk | index;
    34ca:	4313      	orrs	r3, r2
    34cc:	f043 0310 	orr.w	r3, r3, #16
	MPU->RBAR = (region_conf->base & MPU_RBAR_ADDR_Msk)
    34d0:	60e3      	str	r3, [r4, #12]
	MPU->RASR = region_conf->attr.rasr | MPU_RASR_ENABLE_Msk;
    34d2:	f851 3c04 	ldr.w	r3, [r1, #-4]
    34d6:	f043 0301 	orr.w	r3, r3, #1
    34da:	6123      	str	r3, [r4, #16]
	for (r_index = 0U; r_index < mpu_config.num_regions; r_index++) {
    34dc:	3201      	adds	r2, #1
    34de:	e7e5      	b.n	34ac <z_arm_mpu_init+0x14>
		return -1;
    34e0:	f04f 30ff 	mov.w	r0, #4294967295
    34e4:	e7eb      	b.n	34be <z_arm_mpu_init+0x26>
    34e6:	bf00      	nop
    34e8:	00009f64 	.word	0x00009f64
    34ec:	e000ed90 	.word	0xe000ed90
    34f0:	20001964 	.word	0x20001964

000034f4 <__stdout_hook_install>:

static int (*_stdout_hook)(int) = _stdout_hook_default;

void __stdout_hook_install(int (*hook)(int))
{
	_stdout_hook = hook;
    34f4:	4b01      	ldr	r3, [pc, #4]	; (34fc <__stdout_hook_install+0x8>)
    34f6:	6018      	str	r0, [r3, #0]
}
    34f8:	4770      	bx	lr
    34fa:	bf00      	nop
    34fc:	20000034 	.word	0x20000034

00003500 <nordicsemi_nrf52_init>:
	__asm__ volatile(
    3500:	f04f 0320 	mov.w	r3, #32
    3504:	f3ef 8111 	mrs	r1, BASEPRI
    3508:	f383 8812 	msr	BASEPRI_MAX, r3
    350c:	f3bf 8f6f 	isb	sy

	key = irq_lock();

#ifdef CONFIG_NRF_ENABLE_ICACHE
	/* Enable the instruction cache */
	NRF_NVMC->ICACHECNF = NVMC_ICACHECNF_CACHEEN_Msk;
    3510:	4a0f      	ldr	r2, [pc, #60]	; (3550 <nordicsemi_nrf52_init+0x50>)
    3512:	2301      	movs	r3, #1
    3514:	f8c2 3540 	str.w	r3, [r2, #1344]	; 0x540
#endif

#if NRF_POWER_HAS_DCDCEN
NRF_STATIC_INLINE void nrf_power_dcdcen_set(NRF_POWER_Type * p_reg, bool enable)
{
    p_reg->DCDCEN = (enable ? POWER_DCDCEN_DCDCEN_Enabled : POWER_DCDCEN_DCDCEN_Disabled) <<
    3518:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
    351c:	f8c2 3578 	str.w	r3, [r2, #1400]	; 0x578
{
    #ifndef NRF52_SERIES
        return false;
    #else
        #if defined (NRF52840_XXAA) || defined (DEVELOP_IN_NRF52840)
            uint32_t var1 = *(uint32_t *)0x10000130ul;
    3520:	4a0c      	ldr	r2, [pc, #48]	; (3554 <nordicsemi_nrf52_init+0x54>)
            uint32_t var2 = *(uint32_t *)0x10000134ul;
        #endif
        #if defined (NRF52840_XXAA) || defined (DEVELOP_IN_NRF52840)
            if (var1 == 0x08)
    3522:	6812      	ldr	r2, [r2, #0]
    3524:	2a08      	cmp	r2, #8
    3526:	d108      	bne.n	353a <nordicsemi_nrf52_init+0x3a>
            uint32_t var2 = *(uint32_t *)0x10000134ul;
    3528:	4a0b      	ldr	r2, [pc, #44]	; (3558 <nordicsemi_nrf52_init+0x58>)
    352a:	6812      	ldr	r2, [r2, #0]
            {
                switch(var2)
    352c:	2a05      	cmp	r2, #5
    352e:	d804      	bhi.n	353a <nordicsemi_nrf52_init+0x3a>
#endif // defined(POWER_RAM_POWER_S0POWER_Msk)

#if NRF_POWER_HAS_DCDCEN_VDDH
NRF_STATIC_INLINE void nrf_power_dcdcen_vddh_set(NRF_POWER_Type * p_reg, bool enable)
{
    if (enable && nrf52_errata_197())
    3530:	480a      	ldr	r0, [pc, #40]	; (355c <nordicsemi_nrf52_init+0x5c>)
    3532:	5c82      	ldrb	r2, [r0, r2]
    3534:	b10a      	cbz	r2, 353a <nordicsemi_nrf52_init+0x3a>
    {
        // Workaround for anomaly 197 "POWER: DCDC of REG0 not functional".
        *(volatile uint32_t *)0x40000638ul = 1ul;
    3536:	4a0a      	ldr	r2, [pc, #40]	; (3560 <nordicsemi_nrf52_init+0x60>)
    3538:	6013      	str	r3, [r2, #0]
    }
    p_reg->DCDCEN0 = (enable ? POWER_DCDCEN0_DCDCEN_Enabled : POWER_DCDCEN0_DCDCEN_Disabled) <<
    353a:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    353e:	2201      	movs	r2, #1
    3540:	f8c3 2580 	str.w	r2, [r3, #1408]	; 0x580
	__asm__ volatile(
    3544:	f381 8811 	msr	BASEPRI, r1
    3548:	f3bf 8f6f 	isb	sy
	NMI_INIT();

	irq_unlock(key);

	return 0;
}
    354c:	2000      	movs	r0, #0
    354e:	4770      	bx	lr
    3550:	4001e000 	.word	0x4001e000
    3554:	10000130 	.word	0x10000130
    3558:	10000134 	.word	0x10000134
    355c:	0000abed 	.word	0x0000abed
    3560:	40000638 	.word	0x40000638

00003564 <sys_arch_reboot>:
    *p_gpregret = val;
    3564:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    3568:	b2c0      	uxtb	r0, r0
    356a:	f8c3 051c 	str.w	r0, [r3, #1308]	; 0x51c
  __ASM volatile ("dsb 0xF":::"memory");
    356e:	f3bf 8f4f 	dsb	sy
__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
{
  __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                       buffered write are completed before reset */
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
    3572:	4905      	ldr	r1, [pc, #20]	; (3588 <sys_arch_reboot+0x24>)
    3574:	4b05      	ldr	r3, [pc, #20]	; (358c <sys_arch_reboot+0x28>)
    3576:	68ca      	ldr	r2, [r1, #12]
    3578:	f402 62e0 	and.w	r2, r2, #1792	; 0x700
    357c:	4313      	orrs	r3, r2
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
    357e:	60cb      	str	r3, [r1, #12]
    3580:	f3bf 8f4f 	dsb	sy
                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
  __DSB();                                                          /* Ensure completion of memory access */

  for(;;)                                                           /* wait until reset */
  {
    __NOP();
    3584:	bf00      	nop
  for(;;)                                                           /* wait until reset */
    3586:	e7fd      	b.n	3584 <sys_arch_reboot+0x20>
    3588:	e000ed00 	.word	0xe000ed00
    358c:	05fa0004 	.word	0x05fa0004

00003590 <arch_busy_wait>:

#else // NRFX_CHECK(NRFX_DELAY_DWT_BASED)

NRF_STATIC_INLINE void nrfx_coredep_delay_us(uint32_t time_us)
{
    if (time_us == 0)
    3590:	b120      	cbz	r0, 359c <arch_busy_wait+0xc>
    };

    typedef void (* delay_func_t)(uint32_t);
    const delay_func_t delay_cycles =
        // Set LSB to 1 to execute the code in the Thumb mode.
        (delay_func_t)((((uint32_t)delay_machine_code) | 1));
    3592:	4b03      	ldr	r3, [pc, #12]	; (35a0 <arch_busy_wait+0x10>)
    uint32_t cycles = time_us * NRFX_DELAY_CPU_FREQ_MHZ;
    delay_cycles(cycles);
    3594:	0180      	lsls	r0, r0, #6
    3596:	f043 0301 	orr.w	r3, r3, #1
    359a:	4718      	bx	r3

void arch_busy_wait(uint32_t time_us)
{
	nrfx_coredep_delay_us(time_us);
}
    359c:	4770      	bx	lr
    359e:	bf00      	nop
    35a0:	00009e20 	.word	0x00009e20

000035a4 <onoff_stop>:
	return (clock_control_subsys_t)offset;
}

static void onoff_stop(struct onoff_manager *mgr,
			onoff_notify_fn notify)
{
    35a4:	b570      	push	{r4, r5, r6, lr}
    35a6:	4604      	mov	r4, r0
	size_t offset = (size_t)(mgr - data->mgr);
    35a8:	480d      	ldr	r0, [pc, #52]	; (35e0 <onoff_stop+0x3c>)
    35aa:	1a23      	subs	r3, r4, r0
    35ac:	109a      	asrs	r2, r3, #2
    35ae:	4b0d      	ldr	r3, [pc, #52]	; (35e4 <onoff_stop+0x40>)
    35b0:	4353      	muls	r3, r2
    35b2:	b2db      	uxtb	r3, r3
	err = set_off_state(&subdata->flags, ctx);
    35b4:	250c      	movs	r5, #12
    35b6:	435d      	muls	r5, r3
    35b8:	f105 0340 	add.w	r3, r5, #64	; 0x40
{
    35bc:	460e      	mov	r6, r1
	err = set_off_state(&subdata->flags, ctx);
    35be:	4418      	add	r0, r3
    35c0:	2140      	movs	r1, #64	; 0x40
    35c2:	f005 fdf2 	bl	91aa <set_off_state>
	if (err < 0) {
    35c6:	1e01      	subs	r1, r0, #0
    35c8:	db04      	blt.n	35d4 <onoff_stop+0x30>
	get_sub_config(dev, type)->stop();
    35ca:	4b07      	ldr	r3, [pc, #28]	; (35e8 <onoff_stop+0x44>)
    35cc:	442b      	add	r3, r5
    35ce:	685b      	ldr	r3, [r3, #4]
    35d0:	4798      	blx	r3
	return 0;
    35d2:	2100      	movs	r1, #0
	int res;

	res = stop(CLOCK_DEVICE, get_subsys(mgr), CTX_ONOFF);
	notify(mgr, res);
    35d4:	4620      	mov	r0, r4
    35d6:	4633      	mov	r3, r6
}
    35d8:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
	notify(mgr, res);
    35dc:	4718      	bx	r3
    35de:	bf00      	nop
    35e0:	200016b0 	.word	0x200016b0
    35e4:	b6db6db7 	.word	0xb6db6db7
    35e8:	00009f9c 	.word	0x00009f9c

000035ec <onoff_start>:
	notify(mgr, 0);
}

static void onoff_start(struct onoff_manager *mgr,
			onoff_notify_fn notify)
{
    35ec:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
	size_t offset = (size_t)(mgr - data->mgr);
    35f0:	4c0f      	ldr	r4, [pc, #60]	; (3630 <onoff_start+0x44>)
    35f2:	4d10      	ldr	r5, [pc, #64]	; (3634 <onoff_start+0x48>)
    35f4:	1b03      	subs	r3, r0, r4
    35f6:	109b      	asrs	r3, r3, #2
    35f8:	435d      	muls	r5, r3
    35fa:	b2eb      	uxtb	r3, r5
	err = set_starting_state(&subdata->flags, ctx);
    35fc:	250c      	movs	r5, #12
    35fe:	435d      	muls	r5, r3
{
    3600:	4607      	mov	r7, r0
	err = set_starting_state(&subdata->flags, ctx);
    3602:	f105 0040 	add.w	r0, r5, #64	; 0x40
{
    3606:	460e      	mov	r6, r1
	err = set_starting_state(&subdata->flags, ctx);
    3608:	4420      	add	r0, r4
    360a:	2140      	movs	r1, #64	; 0x40
    360c:	f005 fde6 	bl	91dc <set_starting_state>
	if (err < 0) {
    3610:	1e01      	subs	r1, r0, #0
    3612:	db08      	blt.n	3626 <onoff_start+0x3a>
	subdata->cb = cb;
    3614:	4b08      	ldr	r3, [pc, #32]	; (3638 <onoff_start+0x4c>)
    3616:	442c      	add	r4, r5
	subdata->user_data = user_data;
    3618:	e9c4 360e 	strd	r3, r6, [r4, #56]	; 0x38
	 get_sub_config(dev, type)->start();
    361c:	4b07      	ldr	r3, [pc, #28]	; (363c <onoff_start+0x50>)
    361e:	595b      	ldr	r3, [r3, r5]
	err = async_start(CLOCK_DEVICE, get_subsys(mgr),
			  onoff_started_callback, notify, CTX_ONOFF);
	if (err < 0) {
		notify(mgr, err);
	}
}
    3620:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
	 get_sub_config(dev, type)->start();
    3624:	4718      	bx	r3
		notify(mgr, err);
    3626:	4638      	mov	r0, r7
    3628:	4633      	mov	r3, r6
}
    362a:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
		notify(mgr, err);
    362e:	4718      	bx	r3
    3630:	200016b0 	.word	0x200016b0
    3634:	b6db6db7 	.word	0xb6db6db7
    3638:	0000923f 	.word	0x0000923f
    363c:	00009f9c 	.word	0x00009f9c

00003640 <clk_init>:
	static const struct onoff_transitions transitions = {
		.start = onoff_start,
		.stop = onoff_stop
	};

	IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
    3640:	2200      	movs	r2, #0
{
    3642:	b570      	push	{r4, r5, r6, lr}
	IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
    3644:	2101      	movs	r1, #1
{
    3646:	4604      	mov	r4, r0
	IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
    3648:	4610      	mov	r0, r2
    364a:	f7ff fa17 	bl	2a7c <z_arm_irq_priority_set>
		    nrfx_isr, nrfx_power_clock_irq_handler, 0);
	irq_enable(DT_INST_IRQN(0));
    364e:	2000      	movs	r0, #0
    3650:	f7ff f9f6 	bl	2a40 <arch_irq_enable>

	nrfx_err = nrfx_clock_init(clock_event_handler);
    3654:	480f      	ldr	r0, [pc, #60]	; (3694 <clk_init+0x54>)
    3656:	f001 fb17 	bl	4c88 <nrfx_clock_init>
	if (nrfx_err != NRFX_SUCCESS) {
    365a:	4b0f      	ldr	r3, [pc, #60]	; (3698 <clk_init+0x58>)
    365c:	4298      	cmp	r0, r3
    365e:	d115      	bne.n	368c <clk_init+0x4c>
		struct nrf_clock_control_data *data = dev->data;

		z_nrf_clock_calibration_init(data->mgr);
	}

	nrfx_clock_enable();
    3660:	f006 f808 	bl	9674 <nrfx_clock_enable>

	for (enum clock_control_nrf_type i = 0;
		i < CLOCK_CONTROL_NRF_TYPE_COUNT; i++) {
		struct nrf_clock_control_sub_data *subdata =
						get_sub_data(dev, i);
    3664:	6926      	ldr	r6, [r4, #16]

		err = onoff_manager_init(get_onoff_manager(dev, i),
    3666:	490d      	ldr	r1, [pc, #52]	; (369c <clk_init+0x5c>)
    3668:	4630      	mov	r0, r6
    366a:	f005 f8e0 	bl	882e <onoff_manager_init>
					 &transitions);
		if (err < 0) {
    366e:	2800      	cmp	r0, #0
    3670:	db0b      	blt.n	368a <clk_init+0x4a>
			return err;
		}

		subdata->flags = CLOCK_CONTROL_STATUS_OFF;
    3672:	2501      	movs	r5, #1
    3674:	6435      	str	r5, [r6, #64]	; 0x40
						get_sub_data(dev, i);
    3676:	6924      	ldr	r4, [r4, #16]
		err = onoff_manager_init(get_onoff_manager(dev, i),
    3678:	4908      	ldr	r1, [pc, #32]	; (369c <clk_init+0x5c>)
    367a:	f104 001c 	add.w	r0, r4, #28
    367e:	f005 f8d6 	bl	882e <onoff_manager_init>
		if (err < 0) {
    3682:	2800      	cmp	r0, #0
    3684:	db01      	blt.n	368a <clk_init+0x4a>
		subdata->flags = CLOCK_CONTROL_STATUS_OFF;
    3686:	64e5      	str	r5, [r4, #76]	; 0x4c
	}

	return 0;
    3688:	2000      	movs	r0, #0
}
    368a:	bd70      	pop	{r4, r5, r6, pc}
		return -EIO;
    368c:	f06f 0004 	mvn.w	r0, #4
    3690:	e7fb      	b.n	368a <clk_init+0x4a>
    3692:	bf00      	nop
    3694:	000036dd 	.word	0x000036dd
    3698:	0bad0000 	.word	0x0bad0000
    369c:	00009fb4 	.word	0x00009fb4

000036a0 <clkstarted_handle.constprop.0>:
static void clkstarted_handle(const struct device *dev,
    36a0:	b573      	push	{r0, r1, r4, r5, r6, lr}
	clock_control_cb_t callback = sub_data->cb;
    36a2:	230c      	movs	r3, #12
static void clkstarted_handle(const struct device *dev,
    36a4:	4601      	mov	r1, r0
	clock_control_cb_t callback = sub_data->cb;
    36a6:	480b      	ldr	r0, [pc, #44]	; (36d4 <clkstarted_handle.constprop.0+0x34>)
    36a8:	434b      	muls	r3, r1
    36aa:	18c4      	adds	r4, r0, r3
	void *user_data = sub_data->user_data;
    36ac:	e9d4 520e 	ldrd	r5, r2, [r4, #56]	; 0x38
	sub_data->cb = NULL;
    36b0:	2600      	movs	r6, #0
	set_on_state(&sub_data->flags);
    36b2:	3340      	adds	r3, #64	; 0x40
	sub_data->cb = NULL;
    36b4:	63a6      	str	r6, [r4, #56]	; 0x38
	set_on_state(&sub_data->flags);
    36b6:	4418      	add	r0, r3
	void *user_data = sub_data->user_data;
    36b8:	9201      	str	r2, [sp, #4]
	set_on_state(&sub_data->flags);
    36ba:	f005 fdad 	bl	9218 <set_on_state>
	if (callback) {
    36be:	b135      	cbz	r5, 36ce <clkstarted_handle.constprop.0+0x2e>
		callback(dev, (clock_control_subsys_t)type, user_data);
    36c0:	9a01      	ldr	r2, [sp, #4]
    36c2:	4805      	ldr	r0, [pc, #20]	; (36d8 <clkstarted_handle.constprop.0+0x38>)
    36c4:	462b      	mov	r3, r5
}
    36c6:	b002      	add	sp, #8
    36c8:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
		callback(dev, (clock_control_subsys_t)type, user_data);
    36cc:	4718      	bx	r3
}
    36ce:	b002      	add	sp, #8
    36d0:	bd70      	pop	{r4, r5, r6, pc}
    36d2:	bf00      	nop
    36d4:	200016b0 	.word	0x200016b0
    36d8:	00009b70 	.word	0x00009b70

000036dc <clock_event_handler>:
	switch (event) {
    36dc:	b110      	cbz	r0, 36e4 <clock_event_handler+0x8>
    36de:	2801      	cmp	r0, #1
    36e0:	d004      	beq.n	36ec <clock_event_handler+0x10>
    36e2:	4770      	bx	lr
		if (GET_STATUS(data->flags) == CLOCK_CONTROL_STATUS_STARTING) {
    36e4:	4b03      	ldr	r3, [pc, #12]	; (36f4 <clock_event_handler+0x18>)
    36e6:	6c1b      	ldr	r3, [r3, #64]	; 0x40
    36e8:	075b      	lsls	r3, r3, #29
    36ea:	d101      	bne.n	36f0 <clock_event_handler+0x14>
		clkstarted_handle(dev, CLOCK_CONTROL_NRF_TYPE_LFCLK);
    36ec:	f7ff bfd8 	b.w	36a0 <clkstarted_handle.constprop.0>
}
    36f0:	4770      	bx	lr
    36f2:	bf00      	nop
    36f4:	200016b0 	.word	0x200016b0

000036f8 <generic_hfclk_start>:
{
    36f8:	b508      	push	{r3, lr}
	__asm__ volatile(
    36fa:	f04f 0320 	mov.w	r3, #32
    36fe:	f3ef 8111 	mrs	r1, BASEPRI
    3702:	f383 8812 	msr	BASEPRI_MAX, r3
    3706:	f3bf 8f6f 	isb	sy
	hfclk_users |= HF_USER_GENERIC;
    370a:	4a12      	ldr	r2, [pc, #72]	; (3754 <generic_hfclk_start+0x5c>)
    370c:	6813      	ldr	r3, [r2, #0]
    370e:	f043 0002 	orr.w	r0, r3, #2
	if (hfclk_users & HF_USER_BT) {
    3712:	f013 0301 	ands.w	r3, r3, #1
	hfclk_users |= HF_USER_GENERIC;
    3716:	6010      	str	r0, [r2, #0]
	if (hfclk_users & HF_USER_BT) {
    3718:	d00c      	beq.n	3734 <generic_hfclk_start+0x3c>
            break;
        case NRF_CLOCK_DOMAIN_HFCLK:
            if (p_clk_src != NULL)
            {
                (*(nrf_clock_hfclk_t *)p_clk_src) =
                    (nrf_clock_hfclk_t)((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_SRC_Msk)
    371a:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
    371e:	f8d2 340c 	ldr.w	r3, [r2, #1036]	; 0x40c
                                        >> CLOCK_HFCLKSTAT_SRC_Pos);
            }
            if ((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_STATE_Msk)
    3722:	f8d2 240c 	ldr.w	r2, [r2, #1036]	; 0x40c
		if (type == NRF_CLOCK_HFCLK_HIGH_ACCURACY) {
    3726:	f013 0301 	ands.w	r3, r3, #1
    372a:	d003      	beq.n	3734 <generic_hfclk_start+0x3c>
			set_on_state(get_hf_flags());
    372c:	480a      	ldr	r0, [pc, #40]	; (3758 <generic_hfclk_start+0x60>)
    372e:	f005 fd73 	bl	9218 <set_on_state>
			already_started = true;
    3732:	2301      	movs	r3, #1
	__asm__ volatile(
    3734:	f381 8811 	msr	BASEPRI, r1
    3738:	f3bf 8f6f 	isb	sy
	if (already_started) {
    373c:	b123      	cbz	r3, 3748 <generic_hfclk_start+0x50>
}
    373e:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
		clkstarted_handle(CLOCK_DEVICE,
    3742:	2000      	movs	r0, #0
    3744:	f7ff bfac 	b.w	36a0 <clkstarted_handle.constprop.0>
}
    3748:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
    nrfx_clock_stop(NRF_CLOCK_DOMAIN_LFCLK);
}

NRFX_STATIC_INLINE void nrfx_clock_hfclk_start(void)
{
    nrfx_clock_start(NRF_CLOCK_DOMAIN_HFCLK);
    374c:	2001      	movs	r0, #1
    374e:	f001 baab 	b.w	4ca8 <nrfx_clock_start>
    3752:	bf00      	nop
    3754:	20001700 	.word	0x20001700
    3758:	200016f0 	.word	0x200016f0

0000375c <generic_hfclk_stop>:
 *
 * @return Previous value of @a target.
 */
static inline atomic_val_t atomic_and(atomic_t *target, atomic_val_t value)
{
	return __atomic_fetch_and(target, value, __ATOMIC_SEQ_CST);
    375c:	4b09      	ldr	r3, [pc, #36]	; (3784 <generic_hfclk_stop+0x28>)
    375e:	f3bf 8f5b 	dmb	ish
    3762:	e853 2f00 	ldrex	r2, [r3]
    3766:	f022 0102 	bic.w	r1, r2, #2
    376a:	e843 1000 	strex	r0, r1, [r3]
    376e:	2800      	cmp	r0, #0
    3770:	d1f7      	bne.n	3762 <generic_hfclk_stop+0x6>
    3772:	f3bf 8f5b 	dmb	ish
	if (atomic_and(&hfclk_users, ~HF_USER_GENERIC) & HF_USER_BT) {
    3776:	07d3      	lsls	r3, r2, #31
    3778:	d402      	bmi.n	3780 <generic_hfclk_stop+0x24>
}

NRFX_STATIC_INLINE void nrfx_clock_hfclk_stop(void)
{
    nrfx_clock_stop(NRF_CLOCK_DOMAIN_HFCLK);
    377a:	2001      	movs	r0, #1
    377c:	f001 bac6 	b.w	4d0c <nrfx_clock_stop>
}
    3780:	4770      	bx	lr
    3782:	bf00      	nop
    3784:	20001700 	.word	0x20001700

00003788 <api_blocking_start>:
{
    3788:	b51f      	push	{r0, r1, r2, r3, r4, lr}
	struct k_sem sem = Z_SEM_INITIALIZER(sem, 0, 1);
    378a:	2200      	movs	r2, #0
    378c:	2301      	movs	r3, #1
    378e:	e9cd 2302 	strd	r2, r3, [sp, #8]
	err = api_start(dev, subsys, blocking_start_callback, &sem);
    3792:	4a09      	ldr	r2, [pc, #36]	; (37b8 <api_blocking_start+0x30>)
	struct k_sem sem = Z_SEM_INITIALIZER(sem, 0, 1);
    3794:	f8cd d000 	str.w	sp, [sp]
	err = api_start(dev, subsys, blocking_start_callback, &sem);
    3798:	466b      	mov	r3, sp
	struct k_sem sem = Z_SEM_INITIALIZER(sem, 0, 1);
    379a:	f8cd d004 	str.w	sp, [sp, #4]
	err = api_start(dev, subsys, blocking_start_callback, &sem);
    379e:	f005 fd75 	bl	928c <api_start>
	if (err < 0) {
    37a2:	2800      	cmp	r0, #0
    37a4:	db05      	blt.n	37b2 <api_blocking_start+0x2a>
	return z_impl_k_sem_take(sem, timeout);
    37a6:	f44f 4280 	mov.w	r2, #16384	; 0x4000
    37aa:	2300      	movs	r3, #0
    37ac:	4668      	mov	r0, sp
    37ae:	f002 fa89 	bl	5cc4 <z_impl_k_sem_take>
}
    37b2:	b005      	add	sp, #20
    37b4:	f85d fb04 	ldr.w	pc, [sp], #4
    37b8:	0000925f 	.word	0x0000925f

000037bc <z_nrf_clock_control_lf_on>:
{
    37bc:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
	return __atomic_exchange_n(target, value, __ATOMIC_SEQ_CST);
    37c0:	493a      	ldr	r1, [pc, #232]	; (38ac <z_nrf_clock_control_lf_on+0xf0>)
    37c2:	f3bf 8f5b 	dmb	ish
    37c6:	4606      	mov	r6, r0
    37c8:	2201      	movs	r2, #1
    37ca:	e851 3f00 	ldrex	r3, [r1]
    37ce:	e841 2000 	strex	r0, r2, [r1]
    37d2:	2800      	cmp	r0, #0
    37d4:	d1f9      	bne.n	37ca <z_nrf_clock_control_lf_on+0xe>
    37d6:	f3bf 8f5b 	dmb	ish
	if (atomic_set(&on, 1) == 0) {
    37da:	b933      	cbnz	r3, 37ea <z_nrf_clock_control_lf_on+0x2e>
 */
static inline void sys_notify_init_spinwait(struct sys_notify *notify)
{
	__ASSERT_NO_MSG(notify != NULL);

	*notify = (struct sys_notify){
    37dc:	4934      	ldr	r1, [pc, #208]	; (38b0 <z_nrf_clock_control_lf_on+0xf4>)
		err = onoff_request(mgr, &cli);
    37de:	4835      	ldr	r0, [pc, #212]	; (38b4 <z_nrf_clock_control_lf_on+0xf8>)
    37e0:	604b      	str	r3, [r1, #4]
    37e2:	60cb      	str	r3, [r1, #12]
    37e4:	608a      	str	r2, [r1, #8]
    37e6:	f005 f835 	bl	8854 <onoff_request>
	switch (start_mode) {
    37ea:	1e73      	subs	r3, r6, #1
    37ec:	2b01      	cmp	r3, #1
    37ee:	d832      	bhi.n	3856 <z_nrf_clock_control_lf_on+0x9a>
	if ((mode == CLOCK_CONTROL_NRF_LF_START_AVAILABLE) &&
    37f0:	2e01      	cmp	r6, #1
    37f2:	d107      	bne.n	3804 <z_nrf_clock_control_lf_on+0x48>
    return clk_src;
}

NRF_STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(NRF_CLOCK_Type const * p_reg)
{
    return (nrf_clock_lfclk_t)((p_reg->LFCLKSRCCOPY & CLOCK_LFCLKSRCCOPY_SRC_Msk)
    37f4:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    37f8:	f8d3 341c 	ldr.w	r3, [r3, #1052]	; 0x41c
    37fc:	f003 0303 	and.w	r3, r3, #3
	    (target_type == NRF_CLOCK_LFCLK_Xtal) &&
    3800:	2b01      	cmp	r3, #1
    3802:	d028      	beq.n	3856 <z_nrf_clock_control_lf_on+0x9a>
	bool isr_mode = k_is_in_isr() || k_is_pre_kernel();
    3804:	f005 fffa 	bl	97fc <k_is_in_isr>
    3808:	4604      	mov	r4, r0
    380a:	b918      	cbnz	r0, 3814 <z_nrf_clock_control_lf_on+0x58>
	return !z_sys_post_kernel;
    380c:	4b2a      	ldr	r3, [pc, #168]	; (38b8 <z_nrf_clock_control_lf_on+0xfc>)
	int key = isr_mode ? irq_lock() : 0;
    380e:	781b      	ldrb	r3, [r3, #0]
    3810:	2b00      	cmp	r3, #0
    3812:	d144      	bne.n	389e <z_nrf_clock_control_lf_on+0xe2>
	__asm__ volatile(
    3814:	f04f 0320 	mov.w	r3, #32
    3818:	f3ef 8511 	mrs	r5, BASEPRI
    381c:	f383 8812 	msr	BASEPRI_MAX, r3
    3820:	f3bf 8f6f 	isb	sy
    3824:	2401      	movs	r4, #1
    return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + event));
    3826:	4f25      	ldr	r7, [pc, #148]	; (38bc <z_nrf_clock_control_lf_on+0x100>)
    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    3828:	f8df 8094 	ldr.w	r8, [pc, #148]	; 38c0 <z_nrf_clock_control_lf_on+0x104>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    382c:	f8df 9094 	ldr.w	r9, [pc, #148]	; 38c4 <z_nrf_clock_control_lf_on+0x108>
                    (nrf_clock_lfclk_t)((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_SRC_Msk)
    3830:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
    3834:	f8d2 3418 	ldr.w	r3, [r2, #1048]	; 0x418
            if ((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_STATE_Msk)
    3838:	f8d2 2418 	ldr.w	r2, [r2, #1048]	; 0x418
    383c:	03d2      	lsls	r2, r2, #15
    383e:	d50c      	bpl.n	385a <z_nrf_clock_control_lf_on+0x9e>
                                        >> CLOCK_LFCLKSTAT_SRC_Pos);
    3840:	f003 0303 	and.w	r3, r3, #3
	while (!(nrfx_clock_is_running(d, (void *)&type)
    3844:	2b01      	cmp	r3, #1
    3846:	d001      	beq.n	384c <z_nrf_clock_control_lf_on+0x90>
		     || (mode == CLOCK_CONTROL_NRF_LF_START_AVAILABLE)))) {
    3848:	2e01      	cmp	r6, #1
    384a:	d106      	bne.n	385a <z_nrf_clock_control_lf_on+0x9e>
	if (isr_mode) {
    384c:	b30c      	cbz	r4, 3892 <z_nrf_clock_control_lf_on+0xd6>
	__asm__ volatile(
    384e:	f385 8811 	msr	BASEPRI, r5
    3852:	f3bf 8f6f 	isb	sy
}
    3856:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
			if (isr_mode || !IS_ENABLED(CONFIG_MULTITHREADING)) {
    385a:	b1ac      	cbz	r4, 3888 <z_nrf_clock_control_lf_on+0xcc>
 *
 * @return N/A
 */
static inline void k_cpu_atomic_idle(unsigned int key)
{
	arch_cpu_atomic_idle(key);
    385c:	4628      	mov	r0, r5
    385e:	f7ff f871 	bl	2944 <arch_cpu_atomic_idle>
    return (nrf_clock_lfclk_t)(p_reg->LFCLKSRC);
    3862:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
    3866:	f8d2 3518 	ldr.w	r3, [r2, #1304]	; 0x518
		if ((target_type ==  NRF_CLOCK_LFCLK_Xtal)
    386a:	2b00      	cmp	r3, #0
    386c:	d1e0      	bne.n	3830 <z_nrf_clock_control_lf_on+0x74>
    return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + event));
    386e:	6839      	ldr	r1, [r7, #0]
		    && nrf_clock_event_check(NRF_CLOCK,
    3870:	2900      	cmp	r1, #0
    3872:	d0dd      	beq.n	3830 <z_nrf_clock_control_lf_on+0x74>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    3874:	603b      	str	r3, [r7, #0]
#ifndef NRF_DECLARE_ONLY

NRF_STATIC_INLINE void nrf_event_readback(void * p_event_reg)
{
#if NRFX_CHECK(NRFX_EVENT_READBACK_ENABLED) && !defined(NRF51)
    (void)*((volatile uint32_t *)(p_event_reg));
    3876:	683b      	ldr	r3, [r7, #0]
    p_reg->LFCLKSRC = (uint32_t)(source);
    3878:	2301      	movs	r3, #1
    387a:	f8c2 3518 	str.w	r3, [r2, #1304]	; 0x518
    387e:	f8c8 3180 	str.w	r3, [r8, #384]	; 0x180
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    3882:	f8c9 3000 	str.w	r3, [r9]
}
    3886:	e7d3      	b.n	3830 <z_nrf_clock_control_lf_on+0x74>
	return z_impl_k_sleep(timeout);
    3888:	2100      	movs	r1, #0
    388a:	2021      	movs	r0, #33	; 0x21
    388c:	f002 fd2e 	bl	62ec <z_impl_k_sleep>
	return k_sleep(Z_TIMEOUT_MS(ms));
    3890:	e7e7      	b.n	3862 <z_nrf_clock_control_lf_on+0xa6>
    p_reg->INTENSET = mask;
    3892:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    3896:	2202      	movs	r2, #2
    3898:	f8c3 2304 	str.w	r2, [r3, #772]	; 0x304
}
    389c:	e7db      	b.n	3856 <z_nrf_clock_control_lf_on+0x9a>
    p_reg->INTENCLR = mask;
    389e:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    38a2:	2202      	movs	r2, #2
    38a4:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
	int key = isr_mode ? irq_lock() : 0;
    38a8:	4605      	mov	r5, r0
}
    38aa:	e7bc      	b.n	3826 <z_nrf_clock_control_lf_on+0x6a>
    38ac:	20001704 	.word	0x20001704
    38b0:	200016a0 	.word	0x200016a0
    38b4:	200016cc 	.word	0x200016cc
    38b8:	20001d76 	.word	0x20001d76
    38bc:	40000104 	.word	0x40000104
    38c0:	e000e100 	.word	0xe000e100
    38c4:	40000008 	.word	0x40000008

000038c8 <uart_console_init>:
 * @brief Initialize one UART as the console/debug port
 *
 * @return 0 if successful, otherwise failed.
 */
static int uart_console_init(const struct device *arg)
{
    38c8:	b508      	push	{r3, lr}

	ARG_UNUSED(arg);

	/* Claim console device */
	uart_console_dev = DEVICE_DT_GET(DT_CHOSEN(zephyr_console));
    38ca:	4b08      	ldr	r3, [pc, #32]	; (38ec <uart_console_init+0x24>)
    38cc:	4808      	ldr	r0, [pc, #32]	; (38f0 <uart_console_init+0x28>)
    38ce:	6018      	str	r0, [r3, #0]
 *
 * @return a non-positive integer as documented in device_usable_check().
 */
static inline int z_device_usable_check(const struct device *dev)
{
	return z_device_ready(dev) ? 0 : -ENODEV;
    38d0:	f005 ff46 	bl	9760 <z_device_ready>
    38d4:	b138      	cbz	r0, 38e6 <uart_console_init+0x1e>
	__stdout_hook_install(console_out);
    38d6:	4807      	ldr	r0, [pc, #28]	; (38f4 <uart_console_init+0x2c>)
    38d8:	f7ff fe0c 	bl	34f4 <__stdout_hook_install>
	__printk_hook_install(console_out);
    38dc:	4805      	ldr	r0, [pc, #20]	; (38f4 <uart_console_init+0x2c>)
    38de:	f7fd fe2f 	bl	1540 <__printk_hook_install>
		return -ENODEV;
	}

	uart_console_hook_install();

	return 0;
    38e2:	2000      	movs	r0, #0
}
    38e4:	bd08      	pop	{r3, pc}
		return -ENODEV;
    38e6:	f06f 0012 	mvn.w	r0, #18
    38ea:	e7fb      	b.n	38e4 <uart_console_init+0x1c>
    38ec:	20001708 	.word	0x20001708
    38f0:	00009bd0 	.word	0x00009bd0
    38f4:	000038f9 	.word	0x000038f9

000038f8 <console_out>:
	if ('\n' == c) {
    38f8:	280a      	cmp	r0, #10
{
    38fa:	b538      	push	{r3, r4, r5, lr}
    38fc:	4d07      	ldr	r5, [pc, #28]	; (391c <console_out+0x24>)
    38fe:	4604      	mov	r4, r0
	if ('\n' == c) {
    3900:	d104      	bne.n	390c <console_out+0x14>
    3902:	6828      	ldr	r0, [r5, #0]
    3904:	6883      	ldr	r3, [r0, #8]
    3906:	210d      	movs	r1, #13
    3908:	685b      	ldr	r3, [r3, #4]
    390a:	4798      	blx	r3
	uart_poll_out(uart_console_dev, c);
    390c:	6828      	ldr	r0, [r5, #0]
    390e:	6883      	ldr	r3, [r0, #8]
    3910:	b2e1      	uxtb	r1, r4
    3912:	685b      	ldr	r3, [r3, #4]
    3914:	4798      	blx	r3
}
    3916:	4620      	mov	r0, r4
    3918:	bd38      	pop	{r3, r4, r5, pc}
    391a:	bf00      	nop
    391c:	20001708 	.word	0x20001708

00003920 <nrfx_gpio_handler>:
			dev = DEVICE_DT_INST_GET(i); \
		}

	if (0) {
	} /* Followed by else if from FOREACH macro. Done to avoid return statement in macro.  */
	DT_INST_FOREACH_STATUS_OKAY(GPIO_NRF_GET_DEV)
    3920:	0943      	lsrs	r3, r0, #5
}

static void nrfx_gpio_handler(nrfx_gpiote_pin_t abs_pin,
			      nrfx_gpiote_trigger_t trigger,
			      void *context)
{
    3922:	b570      	push	{r4, r5, r6, lr}
	DT_INST_FOREACH_STATUS_OKAY(GPIO_NRF_GET_DEV)
    3924:	d002      	beq.n	392c <nrfx_gpio_handler+0xc>
    3926:	2b01      	cmp	r3, #1
    3928:	d01d      	beq.n	3966 <nrfx_gpio_handler+0x46>

	struct gpio_nrfx_data *data = get_port_data(port);
	sys_slist_t *list = &data->callbacks;

	gpio_fire_callbacks(list, port, BIT(pin));
}
    392a:	bd70      	pop	{r4, r5, r6, pc}
	DT_INST_FOREACH_STATUS_OKAY(GPIO_NRF_GET_DEV)
    392c:	4e0f      	ldr	r6, [pc, #60]	; (396c <nrfx_gpio_handler+0x4c>)
					const struct device *port,
					uint32_t pins)
{
	struct gpio_callback *cb, *tmp;

	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(list, cb, tmp, node) {
    392e:	6933      	ldr	r3, [r6, #16]
    3930:	6859      	ldr	r1, [r3, #4]
    3932:	2900      	cmp	r1, #0
    3934:	d0f9      	beq.n	392a <nrfx_gpio_handler+0xa>
    3936:	680c      	ldr	r4, [r1, #0]
}

NRF_STATIC_INLINE uint32_t nrf_gpio_pin_port_number_extract(uint32_t * p_pin)
{
    uint32_t pin_number = *p_pin;
    *p_pin = pin_number & 0x1F;
    3938:	f000 031f 	and.w	r3, r0, #31
	gpio_fire_callbacks(list, port, BIT(pin));
    393c:	2501      	movs	r5, #1
    393e:	2c00      	cmp	r4, #0
    3940:	fa05 f503 	lsl.w	r5, r5, r3
	return node->next;
    3944:	bf38      	it	cc
    3946:	2400      	movcc	r4, #0
		if (cb->pin_mask & pins) {
    3948:	688a      	ldr	r2, [r1, #8]
    394a:	402a      	ands	r2, r5
    394c:	d002      	beq.n	3954 <nrfx_gpio_handler+0x34>
			__ASSERT(cb->handler, "No callback handler!");
			cb->handler(port, cb, cb->pin_mask & pins);
    394e:	684b      	ldr	r3, [r1, #4]
    3950:	4630      	mov	r0, r6
    3952:	4798      	blx	r3
	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(list, cb, tmp, node) {
    3954:	2c00      	cmp	r4, #0
    3956:	d0e8      	beq.n	392a <nrfx_gpio_handler+0xa>
    3958:	6823      	ldr	r3, [r4, #0]
    395a:	2b00      	cmp	r3, #0
    395c:	bf38      	it	cc
    395e:	2300      	movcc	r3, #0
Z_GENLIST_PEEK_NEXT_NO_CHECK(slist, snode)
    3960:	4621      	mov	r1, r4
    3962:	461c      	mov	r4, r3
    3964:	e7f0      	b.n	3948 <nrfx_gpio_handler+0x28>
	DT_INST_FOREACH_STATUS_OKAY(GPIO_NRF_GET_DEV)
    3966:	4e02      	ldr	r6, [pc, #8]	; (3970 <nrfx_gpio_handler+0x50>)
    3968:	e7e1      	b.n	392e <nrfx_gpio_handler+0xe>
    396a:	bf00      	nop
    396c:	00009b88 	.word	0x00009b88
    3970:	00009ba0 	.word	0x00009ba0

00003974 <gpio_nrfx_pin_interrupt_configure>:
{
    3974:	b530      	push	{r4, r5, lr}
	uint32_t abs_pin = NRF_GPIO_PIN_MAP(get_port_cfg(port)->port_num, pin);
    3976:	6840      	ldr	r0, [r0, #4]
    3978:	7b04      	ldrb	r4, [r0, #12]
    397a:	f001 051f 	and.w	r5, r1, #31
	if (mode == GPIO_INT_MODE_DISABLED) {
    397e:	f5b2 5f00 	cmp.w	r2, #8192	; 0x2000
	uint32_t abs_pin = NRF_GPIO_PIN_MAP(get_port_cfg(port)->port_num, pin);
    3982:	ea45 1544 	orr.w	r5, r5, r4, lsl #5
{
    3986:	b085      	sub	sp, #20
    3988:	f04f 0400 	mov.w	r4, #0
	if (mode == GPIO_INT_MODE_DISABLED) {
    398c:	d104      	bne.n	3998 <gpio_nrfx_pin_interrupt_configure+0x24>
		nrfx_gpiote_trigger_disable(abs_pin);
    398e:	4628      	mov	r0, r5
    3990:	f001 fc5e 	bl	5250 <nrfx_gpiote_trigger_disable>
	return 0;
    3994:	2000      	movs	r0, #0
    3996:	e032      	b.n	39fe <gpio_nrfx_pin_interrupt_configure+0x8a>
	if (mode == GPIO_INT_MODE_LEVEL) {
    3998:	f5b2 4f80 	cmp.w	r2, #16384	; 0x4000
	nrfx_gpiote_trigger_config_t trigger_config = {
    399c:	e9cd 4402 	strd	r4, r4, [sp, #8]
	if (mode == GPIO_INT_MODE_LEVEL) {
    39a0:	d12f      	bne.n	3a02 <gpio_nrfx_pin_interrupt_configure+0x8e>
		return trig == GPIO_INT_TRIG_LOW ? NRFX_GPIOTE_TRIGGER_LOW :
    39a2:	f5b3 3f00 	cmp.w	r3, #131072	; 0x20000
    39a6:	bf0c      	ite	eq
    39a8:	2304      	moveq	r3, #4
    39aa:	2305      	movne	r3, #5
	nrfx_gpiote_trigger_config_t trigger_config = {
    39ac:	f88d 3008 	strb.w	r3, [sp, #8]
	if (!(BIT(pin) & get_port_cfg(port)->edge_sense) &&
    39b0:	6883      	ldr	r3, [r0, #8]
    39b2:	fa23 f101 	lsr.w	r1, r3, r1
    39b6:	07c9      	lsls	r1, r1, #31
    39b8:	d42f      	bmi.n	3a1a <gpio_nrfx_pin_interrupt_configure+0xa6>
    39ba:	f5b2 3fa0 	cmp.w	r2, #81920	; 0x14000
    39be:	d12c      	bne.n	3a1a <gpio_nrfx_pin_interrupt_configure+0xa6>

    return pin_number >> 5;
    39c0:	096a      	lsrs	r2, r5, #5
        case 1: return NRF_P1;
    39c2:	2a01      	cmp	r2, #1
    *p_pin = pin_number & 0x1F;
    39c4:	f005 031f 	and.w	r3, r5, #31
        case 1: return NRF_P1;
    39c8:	4a1c      	ldr	r2, [pc, #112]	; (3a3c <gpio_nrfx_pin_interrupt_configure+0xc8>)
    return (nrf_gpio_pin_dir_t)((reg->PIN_CNF[pin_number] &
    39ca:	f503 73e0 	add.w	r3, r3, #448	; 0x1c0
        case 1: return NRF_P1;
    39ce:	bf18      	it	ne
    39d0:	f04f 42a0 	movne.w	r2, #1342177280	; 0x50000000
    return (nrf_gpio_pin_dir_t)((reg->PIN_CNF[pin_number] &
    39d4:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
	    (mode == GPIO_INT_MODE_EDGE) &&
    39d8:	07db      	lsls	r3, r3, #31
    39da:	d41e      	bmi.n	3a1a <gpio_nrfx_pin_interrupt_configure+0xa6>
		err = nrfx_gpiote_channel_get(abs_pin, &ch);
    39dc:	f10d 0407 	add.w	r4, sp, #7
    39e0:	4621      	mov	r1, r4
    39e2:	4628      	mov	r0, r5
    39e4:	f001 fba0 	bl	5128 <nrfx_gpiote_channel_get>
		if (err == NRFX_ERROR_INVALID_PARAM) {
    39e8:	4b15      	ldr	r3, [pc, #84]	; (3a40 <gpio_nrfx_pin_interrupt_configure+0xcc>)
    39ea:	4298      	cmp	r0, r3
    39ec:	d114      	bne.n	3a18 <gpio_nrfx_pin_interrupt_configure+0xa4>
			err = nrfx_gpiote_channel_alloc(&ch);
    39ee:	4620      	mov	r0, r4
    39f0:	f001 fbe4 	bl	51bc <nrfx_gpiote_channel_alloc>
			if (err != NRFX_SUCCESS) {
    39f4:	4b13      	ldr	r3, [pc, #76]	; (3a44 <gpio_nrfx_pin_interrupt_configure+0xd0>)
    39f6:	4298      	cmp	r0, r3
    39f8:	d00e      	beq.n	3a18 <gpio_nrfx_pin_interrupt_configure+0xa4>
				return -ENOMEM;
    39fa:	f06f 000b 	mvn.w	r0, #11
}
    39fe:	b005      	add	sp, #20
    3a00:	bd30      	pop	{r4, r5, pc}
	return trig == GPIO_INT_TRIG_BOTH ? NRFX_GPIOTE_TRIGGER_TOGGLE :
    3a02:	f5b3 2fc0 	cmp.w	r3, #393216	; 0x60000
    3a06:	d005      	beq.n	3a14 <gpio_nrfx_pin_interrupt_configure+0xa0>
    3a08:	f5b3 3f00 	cmp.w	r3, #131072	; 0x20000
    3a0c:	bf0c      	ite	eq
    3a0e:	2302      	moveq	r3, #2
    3a10:	2301      	movne	r3, #1
    3a12:	e7cb      	b.n	39ac <gpio_nrfx_pin_interrupt_configure+0x38>
    3a14:	2303      	movs	r3, #3
    3a16:	e7c9      	b.n	39ac <gpio_nrfx_pin_interrupt_configure+0x38>
		trigger_config.p_in_channel = &ch;
    3a18:	9403      	str	r4, [sp, #12]
	err = nrfx_gpiote_input_configure(abs_pin, NULL, &trigger_config, NULL);
    3a1a:	2300      	movs	r3, #0
    3a1c:	4619      	mov	r1, r3
    3a1e:	aa02      	add	r2, sp, #8
    3a20:	4628      	mov	r0, r5
    3a22:	f001 fa5f 	bl	4ee4 <nrfx_gpiote_input_configure>
	if (err != NRFX_SUCCESS) {
    3a26:	4b07      	ldr	r3, [pc, #28]	; (3a44 <gpio_nrfx_pin_interrupt_configure+0xd0>)
    3a28:	4298      	cmp	r0, r3
    3a2a:	d104      	bne.n	3a36 <gpio_nrfx_pin_interrupt_configure+0xc2>
	nrfx_gpiote_trigger_enable(abs_pin, true);
    3a2c:	2101      	movs	r1, #1
    3a2e:	4628      	mov	r0, r5
    3a30:	f001 fbca 	bl	51c8 <nrfx_gpiote_trigger_enable>
    3a34:	e7ae      	b.n	3994 <gpio_nrfx_pin_interrupt_configure+0x20>
		return -EIO;
    3a36:	f06f 0004 	mvn.w	r0, #4
    3a3a:	e7e0      	b.n	39fe <gpio_nrfx_pin_interrupt_configure+0x8a>
    3a3c:	50000300 	.word	0x50000300
    3a40:	0bad0004 	.word	0x0bad0004
    3a44:	0bad0000 	.word	0x0bad0000

00003a48 <gpio_nrfx_init>:

#define GPIOTE_NODE DT_INST(0, nordic_nrf_gpiote)

static int gpio_nrfx_init(const struct device *port)
{
    3a48:	b510      	push	{r4, lr}
	nrfx_err_t err;

	if (nrfx_gpiote_is_init()) {
    3a4a:	f001 fba7 	bl	519c <nrfx_gpiote_is_init>
    3a4e:	4604      	mov	r4, r0
    3a50:	b968      	cbnz	r0, 3a6e <gpio_nrfx_init+0x26>
		return 0;
	}

	err = nrfx_gpiote_init(0/*not used*/);
    3a52:	f001 fb7b 	bl	514c <nrfx_gpiote_init>
	if (err != NRFX_SUCCESS) {
    3a56:	4b08      	ldr	r3, [pc, #32]	; (3a78 <gpio_nrfx_init+0x30>)
    3a58:	4298      	cmp	r0, r3
    3a5a:	d10a      	bne.n	3a72 <gpio_nrfx_init+0x2a>
		return -EIO;
	}

	nrfx_gpiote_global_callback_set(nrfx_gpio_handler, NULL);
    3a5c:	4807      	ldr	r0, [pc, #28]	; (3a7c <gpio_nrfx_init+0x34>)
    3a5e:	4621      	mov	r1, r4
    3a60:	f001 fb5c 	bl	511c <nrfx_gpiote_global_callback_set>

	IRQ_CONNECT(DT_IRQN(GPIOTE_NODE), DT_IRQ(GPIOTE_NODE, priority),
    3a64:	4622      	mov	r2, r4
    3a66:	2105      	movs	r1, #5
    3a68:	2006      	movs	r0, #6
    3a6a:	f7ff f807 	bl	2a7c <z_arm_irq_priority_set>
		return 0;
    3a6e:	2000      	movs	r0, #0
		    nrfx_isr, nrfx_gpiote_irq_handler, 0);

	return 0;
}
    3a70:	bd10      	pop	{r4, pc}
		return -EIO;
    3a72:	f06f 0004 	mvn.w	r0, #4
    3a76:	e7fb      	b.n	3a70 <gpio_nrfx_init+0x28>
    3a78:	0bad0000 	.word	0x0bad0000
    3a7c:	00003921 	.word	0x00003921

00003a80 <gpio_nrfx_pin_configure>:
{
    3a80:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
	const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
    3a84:	6847      	ldr	r7, [r0, #4]
	nrfx_gpiote_pin_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
    3a86:	7b3b      	ldrb	r3, [r7, #12]
    3a88:	f001 051f 	and.w	r5, r1, #31
{
    3a8c:	b085      	sub	sp, #20
    3a8e:	460e      	mov	r6, r1
	nrfx_gpiote_pin_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
    3a90:	ea45 1543 	orr.w	r5, r5, r3, lsl #5
	if (flags == GPIO_DISCONNECTED) {
    3a94:	4614      	mov	r4, r2
    3a96:	b9ca      	cbnz	r2, 3acc <gpio_nrfx_pin_configure+0x4c>
	err = nrfx_gpiote_channel_get(pin, &ch);
    3a98:	a902      	add	r1, sp, #8
    3a9a:	4628      	mov	r0, r5
    3a9c:	f001 fb44 	bl	5128 <nrfx_gpiote_channel_get>
    3aa0:	4604      	mov	r4, r0
	err = nrfx_gpiote_pin_uninit(pin);
    3aa2:	4628      	mov	r0, r5
    3aa4:	f001 fbf6 	bl	5294 <nrfx_gpiote_pin_uninit>
	if (err != NRFX_SUCCESS) {
    3aa8:	4b48      	ldr	r3, [pc, #288]	; (3bcc <gpio_nrfx_pin_configure+0x14c>)
    3aaa:	4298      	cmp	r0, r3
    3aac:	d004      	beq.n	3ab8 <gpio_nrfx_pin_configure+0x38>
		return -EIO;
    3aae:	f06f 0004 	mvn.w	r0, #4
}
    3ab2:	b005      	add	sp, #20
    3ab4:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
	if (free_ch) {
    3ab8:	4284      	cmp	r4, r0
    3aba:	d105      	bne.n	3ac8 <gpio_nrfx_pin_configure+0x48>
		err = nrfx_gpiote_channel_free(ch);
    3abc:	f89d 0008 	ldrb.w	r0, [sp, #8]
    3ac0:	f001 fb76 	bl	51b0 <nrfx_gpiote_channel_free>
	return (err != NRFX_SUCCESS) ? -EIO : 0;
    3ac4:	42a0      	cmp	r0, r4
    3ac6:	d1f2      	bne.n	3aae <gpio_nrfx_pin_configure+0x2e>
	return (err != NRFX_SUCCESS) ? -EINVAL : 0;
    3ac8:	2000      	movs	r0, #0
    3aca:	e7f2      	b.n	3ab2 <gpio_nrfx_pin_configure+0x32>
	nrfx_gpiote_trigger_config_t trigger_config = {
    3acc:	f04f 0900 	mov.w	r9, #0
	err = nrfx_gpiote_channel_get(pin, &ch);
    3ad0:	f10d 0103 	add.w	r1, sp, #3
    3ad4:	4630      	mov	r0, r6
	nrfx_gpiote_trigger_config_t trigger_config = {
    3ad6:	e9cd 9902 	strd	r9, r9, [sp, #8]
	err = nrfx_gpiote_channel_get(pin, &ch);
    3ada:	f001 fb25 	bl	5128 <nrfx_gpiote_channel_get>
	err = nrfx_gpiote_input_configure(abs_pin, NULL, &trigger_config, NULL);
    3ade:	464b      	mov	r3, r9
	err = nrfx_gpiote_channel_get(pin, &ch);
    3ae0:	4680      	mov	r8, r0
	err = nrfx_gpiote_input_configure(abs_pin, NULL, &trigger_config, NULL);
    3ae2:	aa02      	add	r2, sp, #8
    3ae4:	4649      	mov	r1, r9
    3ae6:	4628      	mov	r0, r5
    3ae8:	f001 f9fc 	bl	4ee4 <nrfx_gpiote_input_configure>
	if (err != NRFX_SUCCESS) {
    3aec:	4b37      	ldr	r3, [pc, #220]	; (3bcc <gpio_nrfx_pin_configure+0x14c>)
    3aee:	4298      	cmp	r0, r3
    3af0:	d002      	beq.n	3af8 <gpio_nrfx_pin_configure+0x78>
	switch (flags & (GPIO_DS_LOW_MASK | GPIO_DS_HIGH_MASK |
    3af2:	f06f 0015 	mvn.w	r0, #21
    3af6:	e7dc      	b.n	3ab2 <gpio_nrfx_pin_configure+0x32>
	if (free_ch) {
    3af8:	4580      	cmp	r8, r0
    3afa:	d103      	bne.n	3b04 <gpio_nrfx_pin_configure+0x84>
		err = nrfx_gpiote_channel_free(ch);
    3afc:	f89d 0003 	ldrb.w	r0, [sp, #3]
    3b00:	f001 fb56 	bl	51b0 <nrfx_gpiote_channel_free>
	if (flags & GPIO_OUTPUT) {
    3b04:	05a3      	lsls	r3, r4, #22
    3b06:	d54e      	bpl.n	3ba6 <gpio_nrfx_pin_configure+0x126>
	switch (flags & (GPIO_DS_LOW_MASK | GPIO_DS_HIGH_MASK |
    3b08:	4b31      	ldr	r3, [pc, #196]	; (3bd0 <gpio_nrfx_pin_configure+0x150>)
    3b0a:	4a32      	ldr	r2, [pc, #200]	; (3bd4 <gpio_nrfx_pin_configure+0x154>)
    3b0c:	4023      	ands	r3, r4
    3b0e:	4293      	cmp	r3, r2
    3b10:	d03a      	beq.n	3b88 <gpio_nrfx_pin_configure+0x108>
    3b12:	d80c      	bhi.n	3b2e <gpio_nrfx_pin_configure+0xae>
    3b14:	2b06      	cmp	r3, #6
    3b16:	d014      	beq.n	3b42 <gpio_nrfx_pin_configure+0xc2>
    3b18:	d804      	bhi.n	3b24 <gpio_nrfx_pin_configure+0xa4>
    3b1a:	b193      	cbz	r3, 3b42 <gpio_nrfx_pin_configure+0xc2>
    3b1c:	2b02      	cmp	r3, #2
    3b1e:	d1e8      	bne.n	3af2 <gpio_nrfx_pin_configure+0x72>
    3b20:	2304      	movs	r3, #4
    3b22:	e00e      	b.n	3b42 <gpio_nrfx_pin_configure+0xc2>
    3b24:	f5b3 1f80 	cmp.w	r3, #1048576	; 0x100000
    3b28:	d1e3      	bne.n	3af2 <gpio_nrfx_pin_configure+0x72>
		*drive = NRF_GPIO_PIN_H0S1;
    3b2a:	2301      	movs	r3, #1
    3b2c:	e009      	b.n	3b42 <gpio_nrfx_pin_configure+0xc2>
	switch (flags & (GPIO_DS_LOW_MASK | GPIO_DS_HIGH_MASK |
    3b2e:	4a2a      	ldr	r2, [pc, #168]	; (3bd8 <gpio_nrfx_pin_configure+0x158>)
    3b30:	4293      	cmp	r3, r2
    3b32:	d02b      	beq.n	3b8c <gpio_nrfx_pin_configure+0x10c>
    3b34:	f5b3 0fa0 	cmp.w	r3, #5242880	; 0x500000
    3b38:	d02a      	beq.n	3b90 <gpio_nrfx_pin_configure+0x110>
    3b3a:	f5b3 0f80 	cmp.w	r3, #4194304	; 0x400000
    3b3e:	d1d8      	bne.n	3af2 <gpio_nrfx_pin_configure+0x72>
		*drive = NRF_GPIO_PIN_S0H1;
    3b40:	2302      	movs	r3, #2
		nrfx_gpiote_output_config_t output_config = {
    3b42:	f88d 3004 	strb.w	r3, [sp, #4]
				NRF_GPIO_PIN_INPUT_CONNECT :
    3b46:	f484 7380 	eor.w	r3, r4, #256	; 0x100
    3b4a:	f3c3 2300 	ubfx	r3, r3, #8, #1
	if (flags & GPIO_PULL_UP) {
    3b4e:	06e0      	lsls	r0, r4, #27
		nrfx_gpiote_output_config_t output_config = {
    3b50:	f88d 3005 	strb.w	r3, [sp, #5]
		return NRF_GPIO_PIN_PULLDOWN;
    3b54:	bf54      	ite	pl
    3b56:	f3c4 1340 	ubfxpl	r3, r4, #5, #1
		return NRF_GPIO_PIN_PULLUP;
    3b5a:	2303      	movmi	r3, #3
		if (flags & GPIO_OUTPUT_INIT_HIGH) {
    3b5c:	0521      	lsls	r1, r4, #20
		nrfx_gpiote_output_config_t output_config = {
    3b5e:	f88d 3006 	strb.w	r3, [sp, #6]
		if (flags & GPIO_OUTPUT_INIT_HIGH) {
    3b62:	d517      	bpl.n	3b94 <gpio_nrfx_pin_configure+0x114>
			nrf_gpio_port_out_set(cfg->port, BIT(pin));
    3b64:	687b      	ldr	r3, [r7, #4]
    3b66:	2101      	movs	r1, #1
    3b68:	fa01 f606 	lsl.w	r6, r1, r6
    p_reg->OUTSET = set_mask;
    3b6c:	f8c3 6508 	str.w	r6, [r3, #1288]	; 0x508
		err = nrfx_gpiote_output_configure(abs_pin, &output_config, NULL);
    3b70:	2200      	movs	r2, #0
    3b72:	a901      	add	r1, sp, #4
    3b74:	4628      	mov	r0, r5
    3b76:	f001 fa61 	bl	503c <nrfx_gpiote_output_configure>
		return (err != NRFX_SUCCESS) ? -EINVAL : 0;
    3b7a:	4b14      	ldr	r3, [pc, #80]	; (3bcc <gpio_nrfx_pin_configure+0x14c>)
    3b7c:	4298      	cmp	r0, r3
    3b7e:	bf14      	ite	ne
    3b80:	f06f 0015 	mvnne.w	r0, #21
    3b84:	2000      	moveq	r0, #0
    3b86:	e794      	b.n	3ab2 <gpio_nrfx_pin_configure+0x32>
		*drive = NRF_GPIO_PIN_H0D1;
    3b88:	2307      	movs	r3, #7
    3b8a:	e7da      	b.n	3b42 <gpio_nrfx_pin_configure+0xc2>
		*drive = NRF_GPIO_PIN_D0H1;
    3b8c:	2305      	movs	r3, #5
    3b8e:	e7d8      	b.n	3b42 <gpio_nrfx_pin_configure+0xc2>
		*drive = NRF_GPIO_PIN_H0H1;
    3b90:	2303      	movs	r3, #3
    3b92:	e7d6      	b.n	3b42 <gpio_nrfx_pin_configure+0xc2>
		} else if (flags & GPIO_OUTPUT_INIT_LOW) {
    3b94:	0562      	lsls	r2, r4, #21
			nrf_gpio_port_out_clear(cfg->port, BIT(pin));
    3b96:	bf41      	itttt	mi
    3b98:	687b      	ldrmi	r3, [r7, #4]
    3b9a:	2101      	movmi	r1, #1
    3b9c:	fa01 f606 	lslmi.w	r6, r1, r6
    p_reg->OUTCLR = clr_mask;
    3ba0:	f8c3 650c 	strmi.w	r6, [r3, #1292]	; 0x50c
}
    3ba4:	e7e4      	b.n	3b70 <gpio_nrfx_pin_configure+0xf0>
	if (flags & GPIO_PULL_UP) {
    3ba6:	06e3      	lsls	r3, r4, #27
	err = nrfx_gpiote_input_configure(abs_pin, &input_config, NULL, NULL);
    3ba8:	f04f 0300 	mov.w	r3, #0
		return NRF_GPIO_PIN_PULLUP;
    3bac:	bf54      	ite	pl
    3bae:	f3c4 1440 	ubfxpl	r4, r4, #5, #1
    3bb2:	2403      	movmi	r4, #3
	err = nrfx_gpiote_input_configure(abs_pin, &input_config, NULL, NULL);
    3bb4:	461a      	mov	r2, r3
    3bb6:	a901      	add	r1, sp, #4
    3bb8:	4628      	mov	r0, r5
	nrfx_gpiote_input_config_t input_config = {
    3bba:	f88d 4004 	strb.w	r4, [sp, #4]
	err = nrfx_gpiote_input_configure(abs_pin, &input_config, NULL, NULL);
    3bbe:	f001 f991 	bl	4ee4 <nrfx_gpiote_input_configure>
	return (err != NRFX_SUCCESS) ? -EINVAL : 0;
    3bc2:	4b02      	ldr	r3, [pc, #8]	; (3bcc <gpio_nrfx_pin_configure+0x14c>)
    3bc4:	4298      	cmp	r0, r3
    3bc6:	f43f af7f 	beq.w	3ac8 <gpio_nrfx_pin_configure+0x48>
    3bca:	e792      	b.n	3af2 <gpio_nrfx_pin_configure+0x72>
    3bcc:	0bad0000 	.word	0x0bad0000
    3bd0:	00f00006 	.word	0x00f00006
    3bd4:	00100006 	.word	0x00100006
    3bd8:	00400002 	.word	0x00400002

00003bdc <flash_nrf_pages_layout>:

static void flash_nrf_pages_layout(const struct device *dev,
				     const struct flash_pages_layout **layout,
				     size_t *layout_size)
{
	*layout = &dev_layout;
    3bdc:	4b02      	ldr	r3, [pc, #8]	; (3be8 <flash_nrf_pages_layout+0xc>)
    3bde:	600b      	str	r3, [r1, #0]
	*layout_size = 1;
    3be0:	2301      	movs	r3, #1
    3be2:	6013      	str	r3, [r2, #0]
}
    3be4:	4770      	bx	lr
    3be6:	bf00      	nop
    3be8:	20001724 	.word	0x20001724

00003bec <flash_nrf_get_parameters>:
flash_nrf_get_parameters(const struct device *dev)
{
	ARG_UNUSED(dev);

	return &flash_nrf_parameters;
}
    3bec:	4800      	ldr	r0, [pc, #0]	; (3bf0 <flash_nrf_get_parameters+0x4>)
    3bee:	4770      	bx	lr
    3bf0:	0000a01c 	.word	0x0000a01c

00003bf4 <flash_nrf_read>:
{
    3bf4:	b537      	push	{r0, r1, r2, r4, r5, lr}
    3bf6:	460c      	mov	r4, r1
	if (is_regular_addr_valid(addr, len)) {
    3bf8:	4620      	mov	r0, r4
    3bfa:	4619      	mov	r1, r3
{
    3bfc:	4615      	mov	r5, r2
	if (is_regular_addr_valid(addr, len)) {
    3bfe:	9301      	str	r3, [sp, #4]
    3c00:	f005 fbb0 	bl	9364 <is_regular_addr_valid>
    3c04:	9a01      	ldr	r2, [sp, #4]
    3c06:	b970      	cbnz	r0, 3c26 <flash_nrf_read+0x32>
    3c08:	490b      	ldr	r1, [pc, #44]	; (3c38 <flash_nrf_read+0x44>)
    3c0a:	4b0c      	ldr	r3, [pc, #48]	; (3c3c <flash_nrf_read+0x48>)
		LOG_ERR("invalid address: 0x%08lx:%zu",
    3c0c:	480c      	ldr	r0, [pc, #48]	; (3c40 <flash_nrf_read+0x4c>)
    3c0e:	1a5b      	subs	r3, r3, r1
    3c10:	08db      	lsrs	r3, r3, #3
    3c12:	019b      	lsls	r3, r3, #6
    3c14:	f043 0301 	orr.w	r3, r3, #1
    3c18:	4621      	mov	r1, r4
    3c1a:	f004 fedd 	bl	89d8 <log_2>
		return -EINVAL;
    3c1e:	f06f 0015 	mvn.w	r0, #21
}
    3c22:	b003      	add	sp, #12
    3c24:	bd30      	pop	{r4, r5, pc}
	if (!len) {
    3c26:	b12a      	cbz	r2, 3c34 <flash_nrf_read+0x40>
	memcpy(data, (void *)addr, len);
    3c28:	4621      	mov	r1, r4
    3c2a:	4628      	mov	r0, r5
    3c2c:	f005 fa9d 	bl	916a <memcpy>
	return 0;
    3c30:	2000      	movs	r0, #0
    3c32:	e7f6      	b.n	3c22 <flash_nrf_read+0x2e>
		return 0;
    3c34:	4610      	mov	r0, r2
    3c36:	e7f4      	b.n	3c22 <flash_nrf_read+0x2e>
    3c38:	00009d80 	.word	0x00009d80
    3c3c:	00009d90 	.word	0x00009d90
    3c40:	0000ac21 	.word	0x0000ac21

00003c44 <nrf_flash_init>:
	.page_layout = flash_nrf_pages_layout,
#endif
};

static int nrf_flash_init(const struct device *dev)
{
    3c44:	b510      	push	{r4, lr}
	return z_impl_k_sem_init(sem, initial_count, limit);
    3c46:	2201      	movs	r2, #1
    3c48:	4611      	mov	r1, r2
    3c4a:	4806      	ldr	r0, [pc, #24]	; (3c64 <nrf_flash_init+0x20>)
#ifndef CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE
	nrf_flash_sync_init();
#endif /* !CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE */

#if defined(CONFIG_FLASH_PAGE_LAYOUT)
	dev_layout.pages_count = nrfx_nvmc_flash_page_count_get();
    3c4c:	4c06      	ldr	r4, [pc, #24]	; (3c68 <nrf_flash_init+0x24>)
    3c4e:	f005 fdf3 	bl	9838 <z_impl_k_sem_init>
    3c52:	f005 fd79 	bl	9748 <nrfx_nvmc_flash_page_count_get>
    3c56:	6020      	str	r0, [r4, #0]
	dev_layout.pages_size = nrfx_nvmc_flash_page_size_get();
    3c58:	f005 fd72 	bl	9740 <nrfx_nvmc_flash_page_size_get>
    3c5c:	6060      	str	r0, [r4, #4]
#endif

	return 0;
}
    3c5e:	2000      	movs	r0, #0
    3c60:	bd10      	pop	{r4, pc}
    3c62:	bf00      	nop
    3c64:	2000172c 	.word	0x2000172c
    3c68:	20001724 	.word	0x20001724

00003c6c <restore_pofwarn.part.0>:
    uint32_t pofcon = p_reg->POFCON;
    3c6c:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
    3c70:	f8d2 1510 	ldr.w	r1, [r2, #1296]	; 0x510
    uint32_t pofcon = p_reg->POFCON;
    3c74:	f8d2 3510 	ldr.w	r3, [r2, #1296]	; 0x510
        (((uint32_t)thr) << POWER_POFCON_THRESHOLD_Pos) |
    3c78:	f001 011e 	and.w	r1, r1, #30
    pofcon &= ~(POWER_POFCON_THRESHOLD_Msk | POWER_POFCON_POF_Msk);
    3c7c:	f023 031f 	bic.w	r3, r3, #31
    3c80:	430b      	orrs	r3, r1
    pofcon |=
    3c82:	f043 0301 	orr.w	r3, r3, #1
    p_reg->POFCON = pofcon;
    3c86:	f8c2 3510 	str.w	r3, [r2, #1296]	; 0x510

	if (pofcon_enabled) {
		pof_thr = nrf_power_pofcon_get(NRF_POWER, NULL);

		nrf_power_pofcon_set(NRF_POWER, true, pof_thr);
		pofcon_enabled = false;
    3c8a:	4b02      	ldr	r3, [pc, #8]	; (3c94 <restore_pofwarn.part.0+0x28>)
    3c8c:	2200      	movs	r2, #0
    3c8e:	701a      	strb	r2, [r3, #0]
	}
}
    3c90:	4770      	bx	lr
    3c92:	bf00      	nop
    3c94:	20001965 	.word	0x20001965

00003c98 <suspend_pofwarn.part.0>:
    uint32_t pofcon = p_reg->POFCON;
    3c98:	f04f 4180 	mov.w	r1, #1073741824	; 0x40000000
    3c9c:	f8d1 2510 	ldr.w	r2, [r1, #1296]	; 0x510
	if (enabled) {
    3ca0:	f012 0001 	ands.w	r0, r2, #1
    3ca4:	d01a      	beq.n	3cdc <suspend_pofwarn.part.0+0x44>
    uint32_t pofcon = p_reg->POFCON;
    3ca6:	f8d1 0510 	ldr.w	r0, [r1, #1296]	; 0x510
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    3caa:	4b0d      	ldr	r3, [pc, #52]	; (3ce0 <suspend_pofwarn.part.0+0x48>)
    pofcon &= ~(POWER_POFCON_THRESHOLD_Msk | POWER_POFCON_POF_Msk);
    3cac:	f020 001f 	bic.w	r0, r0, #31
        (((uint32_t)thr) << POWER_POFCON_THRESHOLD_Pos) |
    3cb0:	f002 021e 	and.w	r2, r2, #30
    pofcon |=
    3cb4:	4310      	orrs	r0, r2
    p_reg->POFCON = pofcon;
    3cb6:	f8c1 0510 	str.w	r0, [r1, #1296]	; 0x510
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    3cba:	6818      	ldr	r0, [r3, #0]
		if (nrf_power_event_check(NRF_POWER, NRF_POWER_EVENT_POFWARN)) {
    3cbc:	b158      	cbz	r0, 3cd6 <suspend_pofwarn.part.0+0x3e>
    uint32_t pofcon = p_reg->POFCON;
    3cbe:	f8d1 3510 	ldr.w	r3, [r1, #1296]	; 0x510
    pofcon &= ~(POWER_POFCON_THRESHOLD_Msk | POWER_POFCON_POF_Msk);
    3cc2:	f023 031f 	bic.w	r3, r3, #31
    3cc6:	4313      	orrs	r3, r2
    pofcon |=
    3cc8:	f043 0301 	orr.w	r3, r3, #1
    p_reg->POFCON = pofcon;
    3ccc:	f8c1 3510 	str.w	r3, [r1, #1296]	; 0x510
			return -ECANCELED;
    3cd0:	f06f 008b 	mvn.w	r0, #139	; 0x8b
    3cd4:	4770      	bx	lr
		pofcon_enabled = enabled;
    3cd6:	4b03      	ldr	r3, [pc, #12]	; (3ce4 <suspend_pofwarn.part.0+0x4c>)
    3cd8:	2201      	movs	r2, #1
    3cda:	701a      	strb	r2, [r3, #0]
}
    3cdc:	4770      	bx	lr
    3cde:	bf00      	nop
    3ce0:	40000108 	.word	0x40000108
    3ce4:	20001965 	.word	0x20001965

00003ce8 <flash_nrf_erase>:
{
    3ce8:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    3cec:	460d      	mov	r5, r1
    3cee:	4614      	mov	r4, r2
	uint32_t pg_size = nrfx_nvmc_flash_page_size_get();
    3cf0:	f005 fd26 	bl	9740 <nrfx_nvmc_flash_page_size_get>
	if (is_regular_addr_valid(addr, size)) {
    3cf4:	4621      	mov	r1, r4
	uint32_t pg_size = nrfx_nvmc_flash_page_size_get();
    3cf6:	4606      	mov	r6, r0
	if (is_regular_addr_valid(addr, size)) {
    3cf8:	4628      	mov	r0, r5
    3cfa:	f005 fb33 	bl	9364 <is_regular_addr_valid>
    3cfe:	462f      	mov	r7, r5
    3d00:	2800      	cmp	r0, #0
    3d02:	d042      	beq.n	3d8a <flash_nrf_erase+0xa2>
		if (((addr % pg_size) != 0) || ((size % pg_size) != 0)) {
    3d04:	fbb5 f3f6 	udiv	r3, r5, r6
    3d08:	fb06 5313 	mls	r3, r6, r3, r5
    3d0c:	b923      	cbnz	r3, 3d18 <flash_nrf_erase+0x30>
    3d0e:	fbb4 f2f6 	udiv	r2, r4, r6
    3d12:	fb06 4212 	mls	r2, r6, r2, r4
    3d16:	b172      	cbz	r2, 3d36 <flash_nrf_erase+0x4e>
    3d18:	4a22      	ldr	r2, [pc, #136]	; (3da4 <flash_nrf_erase+0xbc>)
    3d1a:	4b23      	ldr	r3, [pc, #140]	; (3da8 <flash_nrf_erase+0xc0>)
			LOG_ERR("unaligned address: 0x%08lx:%zu",
    3d1c:	4823      	ldr	r0, [pc, #140]	; (3dac <flash_nrf_erase+0xc4>)
    3d1e:	1a9b      	subs	r3, r3, r2
    3d20:	08db      	lsrs	r3, r3, #3
    3d22:	019b      	lsls	r3, r3, #6
    3d24:	f043 0301 	orr.w	r3, r3, #1
    3d28:	4622      	mov	r2, r4
    3d2a:	4629      	mov	r1, r5
		LOG_ERR("invalid address: 0x%08lx:%zu",
    3d2c:	f004 fe54 	bl	89d8 <log_2>
		return -EINVAL;
    3d30:	f06f 0415 	mvn.w	r4, #21
    3d34:	e01f      	b.n	3d76 <flash_nrf_erase+0x8e>
		if (!n_pages) {
    3d36:	42b4      	cmp	r4, r6
    3d38:	d332      	bcc.n	3da0 <flash_nrf_erase+0xb8>
	return z_impl_k_sem_take(sem, timeout);
    3d3a:	f04f 32ff 	mov.w	r2, #4294967295
    3d3e:	f04f 33ff 	mov.w	r3, #4294967295
    3d42:	481b      	ldr	r0, [pc, #108]	; (3db0 <flash_nrf_erase+0xc8>)
    #else
        #if defined (NRF52805_XXAA) || defined (DEVELOP_IN_NRF52805)\
         || defined (NRF52810_XXAA) || defined (DEVELOP_IN_NRF52810)\
         || defined (NRF52811_XXAA) || defined (DEVELOP_IN_NRF52811)\
         || defined (NRF52840_XXAA) || defined (DEVELOP_IN_NRF52840)
            uint32_t var1 = *(uint32_t *)0x10000130ul;
    3d44:	4e1b      	ldr	r6, [pc, #108]	; (3db4 <flash_nrf_erase+0xcc>)
	if (pofcon_enabled) {
    3d46:	f8df 8074 	ldr.w	r8, [pc, #116]	; 3dbc <flash_nrf_erase+0xd4>
    3d4a:	f001 ffbb 	bl	5cc4 <z_impl_k_sem_take>
	uint32_t pg_size = nrfx_nvmc_flash_page_size_get();
    3d4e:	f005 fcf7 	bl	9740 <nrfx_nvmc_flash_page_size_get>
    3d52:	4605      	mov	r5, r0
            uint32_t var2 = *(uint32_t *)0x10000134ul;
        #endif
        #if defined (NRF52840_XXAA) || defined (DEVELOP_IN_NRF52840)
            if (var1 == 0x08)
    3d54:	6833      	ldr	r3, [r6, #0]
    3d56:	2b08      	cmp	r3, #8
    3d58:	d010      	beq.n	3d7c <flash_nrf_erase+0x94>
		(void)nrfx_nvmc_page_erase(e_ctx->flash_addr);
    3d5a:	4638      	mov	r0, r7
    3d5c:	f001 fb96 	bl	548c <nrfx_nvmc_page_erase>
	if (pofcon_enabled) {
    3d60:	f898 3000 	ldrb.w	r3, [r8]
    3d64:	b10b      	cbz	r3, 3d6a <flash_nrf_erase+0x82>
    3d66:	f7ff ff81 	bl	3c6c <restore_pofwarn.part.0>
	} while (e_ctx->len > 0);
    3d6a:	1b64      	subs	r4, r4, r5
    3d6c:	442f      	add	r7, r5
    3d6e:	d1f1      	bne.n	3d54 <flash_nrf_erase+0x6c>
	z_impl_k_sem_give(sem);
    3d70:	480f      	ldr	r0, [pc, #60]	; (3db0 <flash_nrf_erase+0xc8>)
    3d72:	f001 ff87 	bl	5c84 <z_impl_k_sem_give>
}
    3d76:	4620      	mov	r0, r4
    3d78:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
            {
                switch(var2)
    3d7c:	f7ff ff8c 	bl	3c98 <suspend_pofwarn.part.0>
		if (SUSPEND_POFWARN()) {
    3d80:	2800      	cmp	r0, #0
    3d82:	d0ea      	beq.n	3d5a <flash_nrf_erase+0x72>
			return -ECANCELED;
    3d84:	f06f 048b 	mvn.w	r4, #139	; 0x8b
    3d88:	e7f2      	b.n	3d70 <flash_nrf_erase+0x88>
    3d8a:	4a06      	ldr	r2, [pc, #24]	; (3da4 <flash_nrf_erase+0xbc>)
    3d8c:	4b06      	ldr	r3, [pc, #24]	; (3da8 <flash_nrf_erase+0xc0>)
		LOG_ERR("invalid address: 0x%08lx:%zu",
    3d8e:	480a      	ldr	r0, [pc, #40]	; (3db8 <flash_nrf_erase+0xd0>)
    3d90:	1a9b      	subs	r3, r3, r2
    3d92:	08db      	lsrs	r3, r3, #3
    3d94:	019b      	lsls	r3, r3, #6
    3d96:	f043 0301 	orr.w	r3, r3, #1
    3d9a:	4622      	mov	r2, r4
    3d9c:	4629      	mov	r1, r5
    3d9e:	e7c5      	b.n	3d2c <flash_nrf_erase+0x44>
			return 0;
    3da0:	4614      	mov	r4, r2
    3da2:	e7e8      	b.n	3d76 <flash_nrf_erase+0x8e>
    3da4:	00009d80 	.word	0x00009d80
    3da8:	00009d90 	.word	0x00009d90
    3dac:	0000ac3e 	.word	0x0000ac3e
    3db0:	2000172c 	.word	0x2000172c
    3db4:	10000130 	.word	0x10000130
    3db8:	0000ac21 	.word	0x0000ac21
    3dbc:	20001965 	.word	0x20001965

00003dc0 <flash_nrf_write>:
{
    3dc0:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
    3dc4:	460e      	mov	r6, r1
	if (is_regular_addr_valid(addr, len)) {
    3dc6:	4630      	mov	r0, r6
    3dc8:	4619      	mov	r1, r3
{
    3dca:	4617      	mov	r7, r2
    3dcc:	461c      	mov	r4, r3
	if (is_regular_addr_valid(addr, len)) {
    3dce:	f005 fac9 	bl	9364 <is_regular_addr_valid>
    3dd2:	b980      	cbnz	r0, 3df6 <flash_nrf_write+0x36>
    3dd4:	4a29      	ldr	r2, [pc, #164]	; (3e7c <flash_nrf_write+0xbc>)
    3dd6:	4b2a      	ldr	r3, [pc, #168]	; (3e80 <flash_nrf_write+0xc0>)
		LOG_ERR("invalid address: 0x%08lx:%zu",
    3dd8:	482a      	ldr	r0, [pc, #168]	; (3e84 <flash_nrf_write+0xc4>)
    3dda:	1a9b      	subs	r3, r3, r2
    3ddc:	08db      	lsrs	r3, r3, #3
    3dde:	019b      	lsls	r3, r3, #6
    3de0:	f043 0301 	orr.w	r3, r3, #1
    3de4:	4622      	mov	r2, r4
    3de6:	4631      	mov	r1, r6
		LOG_ERR("not word-aligned: 0x%08lx:%zu",
    3de8:	f004 fdf6 	bl	89d8 <log_2>
		return -EINVAL;
    3dec:	f06f 0415 	mvn.w	r4, #21
}
    3df0:	4620      	mov	r0, r4
    3df2:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
	return (data & 0x3) ? false : true;
    3df6:	ea44 0506 	orr.w	r5, r4, r6
	if (!is_aligned_32(addr) || (len % sizeof(uint32_t))) {
    3dfa:	f015 0503 	ands.w	r5, r5, #3
    3dfe:	d00a      	beq.n	3e16 <flash_nrf_write+0x56>
    3e00:	4a1e      	ldr	r2, [pc, #120]	; (3e7c <flash_nrf_write+0xbc>)
    3e02:	4b1f      	ldr	r3, [pc, #124]	; (3e80 <flash_nrf_write+0xc0>)
		LOG_ERR("not word-aligned: 0x%08lx:%zu",
    3e04:	4820      	ldr	r0, [pc, #128]	; (3e88 <flash_nrf_write+0xc8>)
    3e06:	1a9b      	subs	r3, r3, r2
    3e08:	08db      	lsrs	r3, r3, #3
    3e0a:	019b      	lsls	r3, r3, #6
    3e0c:	f043 0301 	orr.w	r3, r3, #1
    3e10:	4622      	mov	r2, r4
    3e12:	4631      	mov	r1, r6
    3e14:	e7e8      	b.n	3de8 <flash_nrf_write+0x28>
	if (!len) {
    3e16:	2c00      	cmp	r4, #0
    3e18:	d0ea      	beq.n	3df0 <flash_nrf_write+0x30>
	return z_impl_k_sem_take(sem, timeout);
    3e1a:	481c      	ldr	r0, [pc, #112]	; (3e8c <flash_nrf_write+0xcc>)
            uint32_t var1 = *(uint32_t *)0x10000130ul;
    3e1c:	f8df 9074 	ldr.w	r9, [pc, #116]	; 3e94 <flash_nrf_write+0xd4>
	if (pofcon_enabled) {
    3e20:	f8df a074 	ldr.w	sl, [pc, #116]	; 3e98 <flash_nrf_write+0xd8>
    3e24:	f04f 32ff 	mov.w	r2, #4294967295
    3e28:	f04f 33ff 	mov.w	r3, #4294967295
    3e2c:	f001 ff4a 	bl	5cc4 <z_impl_k_sem_take>
static int write_op(void *context)
    3e30:	f024 0403 	bic.w	r4, r4, #3
	while (w_ctx->len >= sizeof(uint32_t)) {
    3e34:	42a5      	cmp	r5, r4
    3e36:	eb05 0806 	add.w	r8, r5, r6
    3e3a:	d109      	bne.n	3e50 <flash_nrf_write+0x90>

#ifndef NRF_DECLARE_ONLY

NRF_STATIC_INLINE bool nrf_nvmc_ready_check(NRF_NVMC_Type const * p_reg)
{
    return (bool)(p_reg->READY & NVMC_READY_READY_Msk);
    3e3c:	4a14      	ldr	r2, [pc, #80]	; (3e90 <flash_nrf_write+0xd0>)
    3e3e:	f8d2 3400 	ldr.w	r3, [r2, #1024]	; 0x400
	while (!nrfx_nvmc_write_done_check()) {
    3e42:	07db      	lsls	r3, r3, #31
    3e44:	d5fb      	bpl.n	3e3e <flash_nrf_write+0x7e>
	return FLASH_OP_DONE;
    3e46:	2400      	movs	r4, #0
	z_impl_k_sem_give(sem);
    3e48:	4810      	ldr	r0, [pc, #64]	; (3e8c <flash_nrf_write+0xcc>)
    3e4a:	f001 ff1b 	bl	5c84 <z_impl_k_sem_give>
}
    3e4e:	e7cf      	b.n	3df0 <flash_nrf_write+0x30>
            if (var1 == 0x08)
    3e50:	f8d9 3000 	ldr.w	r3, [r9]
    3e54:	2b08      	cmp	r3, #8
    3e56:	d00a      	beq.n	3e6e <flash_nrf_write+0xae>
		nrfx_nvmc_word_write(w_ctx->flash_addr,
    3e58:	5979      	ldr	r1, [r7, r5]
    3e5a:	4640      	mov	r0, r8
    3e5c:	f001 fb36 	bl	54cc <nrfx_nvmc_word_write>
	if (pofcon_enabled) {
    3e60:	f89a 3000 	ldrb.w	r3, [sl]
    3e64:	b10b      	cbz	r3, 3e6a <flash_nrf_write+0xaa>
    3e66:	f7ff ff01 	bl	3c6c <restore_pofwarn.part.0>
	w_ctx->len -= shift;
    3e6a:	3504      	adds	r5, #4
}
    3e6c:	e7e2      	b.n	3e34 <flash_nrf_write+0x74>
                switch(var2)
    3e6e:	f7ff ff13 	bl	3c98 <suspend_pofwarn.part.0>
		if (SUSPEND_POFWARN()) {
    3e72:	2800      	cmp	r0, #0
    3e74:	d0f0      	beq.n	3e58 <flash_nrf_write+0x98>
			return -ECANCELED;
    3e76:	f06f 048b 	mvn.w	r4, #139	; 0x8b
    3e7a:	e7e5      	b.n	3e48 <flash_nrf_write+0x88>
    3e7c:	00009d80 	.word	0x00009d80
    3e80:	00009d90 	.word	0x00009d90
    3e84:	0000ac21 	.word	0x0000ac21
    3e88:	0000ac5d 	.word	0x0000ac5d
    3e8c:	2000172c 	.word	0x2000172c
    3e90:	4001e000 	.word	0x4001e000
    3e94:	10000130 	.word	0x10000130
    3e98:	20001965 	.word	0x20001965

00003e9c <uarte_nrfx_configure>:
	return 0;
}

static int uarte_nrfx_configure(const struct device *dev,
				const struct uart_config *cfg)
{
    3e9c:	b5f0      	push	{r4, r5, r6, r7, lr}
	nrf_uarte_config_t uarte_cfg;

#if defined(UARTE_CONFIG_STOP_Msk)
	switch (cfg->stop_bits) {
    3e9e:	794b      	ldrb	r3, [r1, #5]
    3ea0:	2b01      	cmp	r3, #1
    3ea2:	d026      	beq.n	3ef2 <uarte_nrfx_configure+0x56>
    3ea4:	2b03      	cmp	r3, #3
    3ea6:	d121      	bne.n	3eec <uarte_nrfx_configure+0x50>
	case UART_CFG_STOP_BITS_1:
		uarte_cfg.stop = NRF_UARTE_STOP_ONE;
		break;
	case UART_CFG_STOP_BITS_2:
		uarte_cfg.stop = NRF_UARTE_STOP_TWO;
    3ea8:	2610      	movs	r6, #16
	if (cfg->stop_bits != UART_CFG_STOP_BITS_1) {
		return -ENOTSUP;
	}
#endif

	if (cfg->data_bits != UART_CFG_DATA_BITS_8) {
    3eaa:	798b      	ldrb	r3, [r1, #6]
    3eac:	2b03      	cmp	r3, #3
    3eae:	d11d      	bne.n	3eec <uarte_nrfx_configure+0x50>
		return -ENOTSUP;
	}

	switch (cfg->flow_ctrl) {
    3eb0:	79cc      	ldrb	r4, [r1, #7]
    3eb2:	b10c      	cbz	r4, 3eb8 <uarte_nrfx_configure+0x1c>
    3eb4:	2c01      	cmp	r4, #1
    3eb6:	d119      	bne.n	3eec <uarte_nrfx_configure+0x50>
	}

#if defined(UARTE_CONFIG_PARITYTYPE_Msk)
	uarte_cfg.paritytype = NRF_UARTE_PARITYTYPE_EVEN;
#endif
	switch (cfg->parity) {
    3eb8:	790a      	ldrb	r2, [r1, #4]
    3eba:	b112      	cbz	r2, 3ec2 <uarte_nrfx_configure+0x26>
    3ebc:	2a02      	cmp	r2, #2
    3ebe:	d115      	bne.n	3eec <uarte_nrfx_configure+0x50>
	case UART_CFG_PARITY_NONE:
		uarte_cfg.parity = NRF_UARTE_PARITY_EXCLUDED;
		break;
	case UART_CFG_PARITY_EVEN:
		uarte_cfg.parity = NRF_UARTE_PARITY_INCLUDED;
    3ec0:	220e      	movs	r2, #14
#endif
	default:
		return -ENOTSUP;
	}

	if (baudrate_set(dev, cfg->baudrate) != 0) {
    3ec2:	680b      	ldr	r3, [r1, #0]
	return config->uarte_regs;
    3ec4:	6845      	ldr	r5, [r0, #4]
	switch (baudrate) {
    3ec6:	f5b3 4f16 	cmp.w	r3, #38400	; 0x9600
	return config->uarte_regs;
    3eca:	682d      	ldr	r5, [r5, #0]
	switch (baudrate) {
    3ecc:	d065      	beq.n	3f9a <uarte_nrfx_configure+0xfe>
    3ece:	d82d      	bhi.n	3f2c <uarte_nrfx_configure+0x90>
    3ed0:	f5b3 5f16 	cmp.w	r3, #9600	; 0x2580
    3ed4:	d064      	beq.n	3fa0 <uarte_nrfx_configure+0x104>
    3ed6:	d816      	bhi.n	3f06 <uarte_nrfx_configure+0x6a>
    3ed8:	f5b3 6f96 	cmp.w	r3, #1200	; 0x4b0
    3edc:	d062      	beq.n	3fa4 <uarte_nrfx_configure+0x108>
    3ede:	d80a      	bhi.n	3ef6 <uarte_nrfx_configure+0x5a>
    3ee0:	f5b3 7f96 	cmp.w	r3, #300	; 0x12c
    3ee4:	d061      	beq.n	3faa <uarte_nrfx_configure+0x10e>
    3ee6:	f5b3 7f16 	cmp.w	r3, #600	; 0x258
    3eea:	d061      	beq.n	3fb0 <uarte_nrfx_configure+0x114>
    3eec:	f06f 0085 	mvn.w	r0, #133	; 0x85
    3ef0:	e052      	b.n	3f98 <uarte_nrfx_configure+0xfc>
	switch (cfg->stop_bits) {
    3ef2:	2600      	movs	r6, #0
    3ef4:	e7d9      	b.n	3eaa <uarte_nrfx_configure+0xe>
	switch (baudrate) {
    3ef6:	f5b3 6f16 	cmp.w	r3, #2400	; 0x960
    3efa:	d05c      	beq.n	3fb6 <uarte_nrfx_configure+0x11a>
    3efc:	f5b3 5f96 	cmp.w	r3, #4800	; 0x12c0
    3f00:	d1f4      	bne.n	3eec <uarte_nrfx_configure+0x50>
		nrf_baudrate = NRF_UARTE_BAUDRATE_4800;
    3f02:	4b37      	ldr	r3, [pc, #220]	; (3fe0 <uarte_nrfx_configure+0x144>)
    3f04:	e03c      	b.n	3f80 <uarte_nrfx_configure+0xe4>
	switch (baudrate) {
    3f06:	f5b3 4fe1 	cmp.w	r3, #28800	; 0x7080
    3f0a:	d057      	beq.n	3fbc <uarte_nrfx_configure+0x120>
    3f0c:	d807      	bhi.n	3f1e <uarte_nrfx_configure+0x82>
    3f0e:	f5b3 5f61 	cmp.w	r3, #14400	; 0x3840
    3f12:	d055      	beq.n	3fc0 <uarte_nrfx_configure+0x124>
    3f14:	f5b3 4f96 	cmp.w	r3, #19200	; 0x4b00
    3f18:	d1e8      	bne.n	3eec <uarte_nrfx_configure+0x50>
		nrf_baudrate = NRF_UARTE_BAUDRATE_19200;
    3f1a:	4b32      	ldr	r3, [pc, #200]	; (3fe4 <uarte_nrfx_configure+0x148>)
    3f1c:	e030      	b.n	3f80 <uarte_nrfx_configure+0xe4>
	switch (baudrate) {
    3f1e:	f647 2712 	movw	r7, #31250	; 0x7a12
    3f22:	42bb      	cmp	r3, r7
    3f24:	d1e2      	bne.n	3eec <uarte_nrfx_configure+0x50>
		nrf_baudrate = NRF_UARTE_BAUDRATE_31250;
    3f26:	f44f 0300 	mov.w	r3, #8388608	; 0x800000
    3f2a:	e029      	b.n	3f80 <uarte_nrfx_configure+0xe4>
	switch (baudrate) {
    3f2c:	f5b3 3f61 	cmp.w	r3, #230400	; 0x38400
    3f30:	d048      	beq.n	3fc4 <uarte_nrfx_configure+0x128>
    3f32:	d813      	bhi.n	3f5c <uarte_nrfx_configure+0xc0>
    3f34:	f5b3 3f96 	cmp.w	r3, #76800	; 0x12c00
    3f38:	d047      	beq.n	3fca <uarte_nrfx_configure+0x12e>
    3f3a:	d809      	bhi.n	3f50 <uarte_nrfx_configure+0xb4>
    3f3c:	f64d 27c0 	movw	r7, #56000	; 0xdac0
    3f40:	42bb      	cmp	r3, r7
    3f42:	d044      	beq.n	3fce <uarte_nrfx_configure+0x132>
    3f44:	f5b3 4f61 	cmp.w	r3, #57600	; 0xe100
    3f48:	d1d0      	bne.n	3eec <uarte_nrfx_configure+0x50>
		nrf_baudrate = NRF_UARTE_BAUDRATE_57600;
    3f4a:	f44f 036b 	mov.w	r3, #15400960	; 0xeb0000
    3f4e:	e017      	b.n	3f80 <uarte_nrfx_configure+0xe4>
	switch (baudrate) {
    3f50:	f5b3 3fe1 	cmp.w	r3, #115200	; 0x1c200
    3f54:	d1ca      	bne.n	3eec <uarte_nrfx_configure+0x50>
		nrf_baudrate = NRF_UARTE_BAUDRATE_115200;
    3f56:	f04f 73eb 	mov.w	r3, #30801920	; 0x1d60000
    3f5a:	e011      	b.n	3f80 <uarte_nrfx_configure+0xe4>
	switch (baudrate) {
    3f5c:	f5b3 2f61 	cmp.w	r3, #921600	; 0xe1000
    3f60:	d038      	beq.n	3fd4 <uarte_nrfx_configure+0x138>
    3f62:	d808      	bhi.n	3f76 <uarte_nrfx_configure+0xda>
    3f64:	4f20      	ldr	r7, [pc, #128]	; (3fe8 <uarte_nrfx_configure+0x14c>)
    3f66:	42bb      	cmp	r3, r7
    3f68:	d037      	beq.n	3fda <uarte_nrfx_configure+0x13e>
    3f6a:	f5b3 2fe1 	cmp.w	r3, #460800	; 0x70800
    3f6e:	d1bd      	bne.n	3eec <uarte_nrfx_configure+0x50>
		nrf_baudrate = NRF_UARTE_BAUDRATE_460800;
    3f70:	f04f 63e8 	mov.w	r3, #121634816	; 0x7400000
    3f74:	e004      	b.n	3f80 <uarte_nrfx_configure+0xe4>
	switch (baudrate) {
    3f76:	4f1d      	ldr	r7, [pc, #116]	; (3fec <uarte_nrfx_configure+0x150>)
    3f78:	42bb      	cmp	r3, r7
    3f7a:	d1b7      	bne.n	3eec <uarte_nrfx_configure+0x50>
		nrf_baudrate = NRF_UARTE_BAUDRATE_1000000;
    3f7c:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
                    | (uint32_t)p_cfg->hwfc;
}

NRF_STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate)
{
    p_reg->BAUDRATE = baudrate;
    3f80:	f8c5 3524 	str.w	r3, [r5, #1316]	; 0x524
		return -ENOTSUP;
	}

	nrf_uarte_configure(get_uarte_instance(dev), &uarte_cfg);

	get_dev_data(dev)->uart_config = *cfg;
    3f84:	6903      	ldr	r3, [r0, #16]
    3f86:	c903      	ldmia	r1, {r0, r1}
                    | (uint32_t)p_cfg->hwfc;
    3f88:	4334      	orrs	r4, r6
    3f8a:	4322      	orrs	r2, r4
    3f8c:	3304      	adds	r3, #4
    p_reg->CONFIG = (uint32_t)p_cfg->parity
    3f8e:	f8c5 256c 	str.w	r2, [r5, #1388]	; 0x56c
    3f92:	e883 0003 	stmia.w	r3, {r0, r1}

	return 0;
    3f96:	2000      	movs	r0, #0
}
    3f98:	bdf0      	pop	{r4, r5, r6, r7, pc}
		nrf_baudrate = NRF_UARTE_BAUDRATE_38400;
    3f9a:	f44f 031d 	mov.w	r3, #10289152	; 0x9d0000
    3f9e:	e7ef      	b.n	3f80 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_9600;
    3fa0:	4b13      	ldr	r3, [pc, #76]	; (3ff0 <uarte_nrfx_configure+0x154>)
    3fa2:	e7ed      	b.n	3f80 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_1200;
    3fa4:	f44f 239e 	mov.w	r3, #323584	; 0x4f000
    3fa8:	e7ea      	b.n	3f80 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = 0x00014000;
    3faa:	f44f 33a0 	mov.w	r3, #81920	; 0x14000
    3fae:	e7e7      	b.n	3f80 <uarte_nrfx_configure+0xe4>
	switch (baudrate) {
    3fb0:	f44f 331c 	mov.w	r3, #159744	; 0x27000
    3fb4:	e7e4      	b.n	3f80 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_2400;
    3fb6:	f44f 231d 	mov.w	r3, #643072	; 0x9d000
    3fba:	e7e1      	b.n	3f80 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_28800;
    3fbc:	4b0d      	ldr	r3, [pc, #52]	; (3ff4 <uarte_nrfx_configure+0x158>)
    3fbe:	e7df      	b.n	3f80 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_14400;
    3fc0:	4b0d      	ldr	r3, [pc, #52]	; (3ff8 <uarte_nrfx_configure+0x15c>)
    3fc2:	e7dd      	b.n	3f80 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_230400;
    3fc4:	f04f 736c 	mov.w	r3, #61865984	; 0x3b00000
    3fc8:	e7da      	b.n	3f80 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_76800;
    3fca:	4b0c      	ldr	r3, [pc, #48]	; (3ffc <uarte_nrfx_configure+0x160>)
    3fcc:	e7d8      	b.n	3f80 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_56000;
    3fce:	f44f 0365 	mov.w	r3, #15007744	; 0xe50000
    3fd2:	e7d5      	b.n	3f80 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_921600;
    3fd4:	f04f 6370 	mov.w	r3, #251658240	; 0xf000000
    3fd8:	e7d2      	b.n	3f80 <uarte_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UARTE_BAUDRATE_250000;
    3fda:	f04f 6380 	mov.w	r3, #67108864	; 0x4000000
    3fde:	e7cf      	b.n	3f80 <uarte_nrfx_configure+0xe4>
    3fe0:	0013b000 	.word	0x0013b000
    3fe4:	004ea000 	.word	0x004ea000
    3fe8:	0003d090 	.word	0x0003d090
    3fec:	000f4240 	.word	0x000f4240
    3ff0:	00275000 	.word	0x00275000
    3ff4:	0075c000 	.word	0x0075c000
    3ff8:	003af000 	.word	0x003af000
    3ffc:	013a9000 	.word	0x013a9000

00004000 <nrf_gpio_cfg_input>:
    *p_pin = pin_number & 0x1F;
    4000:	f000 021f 	and.w	r2, r0, #31
    return pin_number >> 5;
    4004:	0940      	lsrs	r0, r0, #5
    switch (nrf_gpio_pin_port_number_extract(p_pin))
    4006:	2801      	cmp	r0, #1
        case 1: return NRF_P1;
    4008:	4b04      	ldr	r3, [pc, #16]	; (401c <nrf_gpio_cfg_input+0x1c>)
    reg->PIN_CNF[pin_number] = cnf;
    400a:	f502 72e0 	add.w	r2, r2, #448	; 0x1c0
        case 1: return NRF_P1;
    400e:	bf18      	it	ne
    4010:	f04f 43a0 	movne.w	r3, #1342177280	; 0x50000000
           ((uint32_t)pull << GPIO_PIN_CNF_PULL_Pos)   |
    4014:	0089      	lsls	r1, r1, #2
    reg->PIN_CNF[pin_number] = cnf;
    4016:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
}
    401a:	4770      	bx	lr
    401c:	50000300 	.word	0x50000300

00004020 <uarte_nrfx_poll_out>:
 *
 * @param dev UARTE device struct
 * @param c Character to send
 */
static void uarte_nrfx_poll_out(const struct device *dev, unsigned char c)
{
    4020:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
	struct uarte_nrfx_data *data = get_dev_data(dev);
    4022:	6906      	ldr	r6, [r0, #16]
{
    4024:	4605      	mov	r5, r0
    4026:	460f      	mov	r7, r1
	bool isr_mode = k_is_in_isr() || k_is_pre_kernel();
    4028:	f005 fbe8 	bl	97fc <k_is_in_isr>
    402c:	b910      	cbnz	r0, 4034 <uarte_nrfx_poll_out+0x14>
	return !z_sys_post_kernel;
    402e:	4b2c      	ldr	r3, [pc, #176]	; (40e0 <uarte_nrfx_poll_out+0xc0>)
	int key;

	if (isr_mode) {
    4030:	781b      	ldrb	r3, [r3, #0]
    4032:	b983      	cbnz	r3, 4056 <uarte_nrfx_poll_out+0x36>
	__asm__ volatile(
    4034:	f04f 0320 	mov.w	r3, #32
    4038:	f3ef 8411 	mrs	r4, BASEPRI
    403c:	f383 8812 	msr	BASEPRI_MAX, r3
    4040:	f3bf 8f6f 	isb	sy
		while (1) {
			key = irq_lock();
			if (is_tx_ready(dev)) {
    4044:	4628      	mov	r0, r5
    4046:	f005 fa15 	bl	9474 <is_tx_ready>
    404a:	bb28      	cbnz	r0, 4098 <uarte_nrfx_poll_out+0x78>
	__asm__ volatile(
    404c:	f384 8811 	msr	BASEPRI, r4
    4050:	f3bf 8f6f 	isb	sy
		"cpsie i;"
		: : : "memory", "cc");
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
}
    4054:	e7ee      	b.n	4034 <uarte_nrfx_poll_out+0x14>
{
    4056:	2464      	movs	r4, #100	; 0x64
		NRFX_WAIT_FOR(is_tx_ready(dev), 100, 1, res);
    4058:	4628      	mov	r0, r5
    405a:	f005 fa0b 	bl	9474 <is_tx_ready>
    405e:	b970      	cbnz	r0, 407e <uarte_nrfx_poll_out+0x5e>
    4060:	2001      	movs	r0, #1
    4062:	f005 fb05 	bl	9670 <nrfx_busy_wait>
    4066:	3c01      	subs	r4, #1
    4068:	d1f6      	bne.n	4058 <uarte_nrfx_poll_out+0x38>
	return z_impl_k_sleep(timeout);
    406a:	2100      	movs	r1, #0
    406c:	2021      	movs	r0, #33	; 0x21
    406e:	f002 f93d 	bl	62ec <z_impl_k_sleep>
	return k_sleep(Z_TIMEOUT_MS(ms));
    4072:	e7f0      	b.n	4056 <uarte_nrfx_poll_out+0x36>
	__asm__ volatile(
    4074:	f384 8811 	msr	BASEPRI, r4
    4078:	f3bf 8f6f 	isb	sy
}
    407c:	e7f5      	b.n	406a <uarte_nrfx_poll_out+0x4a>
	__asm__ volatile(
    407e:	f04f 0320 	mov.w	r3, #32
    4082:	f3ef 8411 	mrs	r4, BASEPRI
    4086:	f383 8812 	msr	BASEPRI_MAX, r3
    408a:	f3bf 8f6f 	isb	sy
			if (is_tx_ready(dev)) {
    408e:	4628      	mov	r0, r5
    4090:	f005 f9f0 	bl	9474 <is_tx_ready>
    4094:	2800      	cmp	r0, #0
    4096:	d0ed      	beq.n	4074 <uarte_nrfx_poll_out+0x54>
		}
	} else {
		key = wait_tx_ready(dev);
	}

	data->char_out = c;
    4098:	f806 7f10 	strb.w	r7, [r6, #16]!
	const struct uarte_nrfx_config *config = get_dev_config(dev);
    409c:	6869      	ldr	r1, [r5, #4]
	return config->uarte_regs;
    409e:	680b      	ldr	r3, [r1, #0]
NRF_STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg,
                                               uint8_t  const * p_buffer,
                                               size_t           length)
{
    p_reg->TXD.PTR    = (uint32_t)p_buffer;
    p_reg->TXD.MAXCNT = length;
    40a0:	2201      	movs	r2, #1
    p_reg->TXD.PTR    = (uint32_t)p_buffer;
    40a2:	f8c3 6544 	str.w	r6, [r3, #1348]	; 0x544
    p_reg->TXD.MAXCNT = length;
    40a6:	f8c3 2548 	str.w	r2, [r3, #1352]	; 0x548
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    40aa:	2200      	movs	r2, #0
    40ac:	f8c3 2120 	str.w	r2, [r3, #288]	; 0x120
    40b0:	f8d3 0120 	ldr.w	r0, [r3, #288]	; 0x120
    40b4:	f8c3 2158 	str.w	r2, [r3, #344]	; 0x158
    40b8:	f8d3 2158 	ldr.w	r2, [r3, #344]	; 0x158
	if (get_dev_config(dev)->flags & UARTE_CFG_FLAG_LOW_POWER) {
    40bc:	684a      	ldr	r2, [r1, #4]
    40be:	06d2      	lsls	r2, r2, #27
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
    40c0:	bf41      	itttt	mi
    40c2:	2208      	movmi	r2, #8
    40c4:	f8c3 2500 	strmi.w	r2, [r3, #1280]	; 0x500
    p_reg->INTENSET = mask;
    40c8:	f44f 0280 	movmi.w	r2, #4194304	; 0x400000
    40cc:	f8c3 2304 	strmi.w	r2, [r3, #772]	; 0x304
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    40d0:	2201      	movs	r2, #1
    40d2:	609a      	str	r2, [r3, #8]
	__asm__ volatile(
    40d4:	f384 8811 	msr	BASEPRI, r4
    40d8:	f3bf 8f6f 	isb	sy
	tx_start(dev, &data->char_out, 1);

	irq_unlock(key);
}
    40dc:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    40de:	bf00      	nop
    40e0:	20001d76 	.word	0x20001d76

000040e4 <nrf_gpio_cfg_output>:
    *p_pin = pin_number & 0x1F;
    40e4:	f000 021f 	and.w	r2, r0, #31
    return pin_number >> 5;
    40e8:	0940      	lsrs	r0, r0, #5
    switch (nrf_gpio_pin_port_number_extract(p_pin))
    40ea:	2801      	cmp	r0, #1
        case 1: return NRF_P1;
    40ec:	4b04      	ldr	r3, [pc, #16]	; (4100 <nrf_gpio_cfg_output+0x1c>)
    reg->PIN_CNF[pin_number] = cnf;
    40ee:	f502 72e0 	add.w	r2, r2, #448	; 0x1c0
        case 1: return NRF_P1;
    40f2:	bf18      	it	ne
    40f4:	f04f 43a0 	movne.w	r3, #1342177280	; 0x50000000
    reg->PIN_CNF[pin_number] = cnf;
    40f8:	2103      	movs	r1, #3
    40fa:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
}
    40fe:	4770      	bx	lr
    4100:	50000300 	.word	0x50000300

00004104 <nrf_gpio_pin_set>:
    *p_pin = pin_number & 0x1F;
    4104:	f000 011f 	and.w	r1, r0, #31
    return pin_number >> 5;
    4108:	0940      	lsrs	r0, r0, #5
    switch (nrf_gpio_pin_port_number_extract(p_pin))
    410a:	2801      	cmp	r0, #1
        case 1: return NRF_P1;
    410c:	4b04      	ldr	r3, [pc, #16]	; (4120 <nrf_gpio_pin_set+0x1c>)
    nrf_gpio_port_out_set(reg, 1UL << pin_number);
    410e:	f04f 0201 	mov.w	r2, #1
        case 1: return NRF_P1;
    4112:	bf18      	it	ne
    4114:	f04f 43a0 	movne.w	r3, #1342177280	; 0x50000000
    nrf_gpio_port_out_set(reg, 1UL << pin_number);
    4118:	408a      	lsls	r2, r1
    p_reg->OUTSET = set_mask;
    411a:	f8c3 2508 	str.w	r2, [r3, #1288]	; 0x508
}
    411e:	4770      	bx	lr
    4120:	50000300 	.word	0x50000300

00004124 <uarte_instance_init.isra.0>:
	nrfx_gppi_channels_enable(BIT(data->ppi_ch_endtx));

	return 0;
}

static int uarte_instance_init(const struct device *dev,
    4124:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
	const struct uarte_nrfx_config *config = get_dev_config(dev);
    4128:	f8d0 8004 	ldr.w	r8, [r0, #4]
			       uint8_t interrupts_active)
{
	int err;
	NRF_UARTE_Type *uarte = get_uarte_instance(dev);
	struct uarte_nrfx_data *data = get_dev_data(dev);
    412c:	6907      	ldr	r7, [r0, #16]
	return config->uarte_regs;
    412e:	f8d8 4000 	ldr.w	r4, [r8]
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
    4132:	2300      	movs	r3, #0
    4134:	f8c4 3500 	str.w	r3, [r4, #1280]	; 0x500
	const struct uarte_nrfx_config *cfg = get_dev_config(dev);

	nrf_uarte_disable(uarte);

	data->dev = dev;
    4138:	6038      	str	r0, [r7, #0]
	const struct uarte_nrfx_config *cfg = get_dev_config(dev);
    413a:	6845      	ldr	r5, [r0, #4]
static int uarte_instance_init(const struct device *dev,
    413c:	4606      	mov	r6, r0
		if (cfg->tx_pin != NRF_UARTE_PSEL_DISCONNECTED) {
    413e:	68e8      	ldr	r0, [r5, #12]
    4140:	1c42      	adds	r2, r0, #1
    4142:	d004      	beq.n	414e <uarte_instance_init.isra.0+0x2a>
        nrf_gpio_pin_set(pin_number);
    4144:	f7ff ffde 	bl	4104 <nrf_gpio_pin_set>
			nrf_gpio_cfg_output(cfg->tx_pin);
    4148:	68e8      	ldr	r0, [r5, #12]
    414a:	f7ff ffcb 	bl	40e4 <nrf_gpio_cfg_output>
		if (cfg->rx_pin != NRF_UARTE_PSEL_DISCONNECTED) {
    414e:	6928      	ldr	r0, [r5, #16]
    4150:	1c43      	adds	r3, r0, #1
    4152:	d006      	beq.n	4162 <uarte_instance_init.isra.0+0x3e>
			nrf_gpio_cfg_input(cfg->rx_pin,
    4154:	7f2b      	ldrb	r3, [r5, #28]
    4156:	2b00      	cmp	r3, #0
    4158:	bf14      	ite	ne
    415a:	2103      	movne	r1, #3
    415c:	2100      	moveq	r1, #0
    415e:	f7ff ff4f 	bl	4000 <nrf_gpio_cfg_input>
		if (cfg->rts_pin != NRF_UARTE_PSEL_DISCONNECTED) {
    4162:	6968      	ldr	r0, [r5, #20]
    4164:	1c42      	adds	r2, r0, #1
    4166:	d004      	beq.n	4172 <uarte_instance_init.isra.0+0x4e>
    4168:	f7ff ffcc 	bl	4104 <nrf_gpio_pin_set>
			nrf_gpio_cfg_output(cfg->rts_pin);
    416c:	6968      	ldr	r0, [r5, #20]
    416e:	f7ff ffb9 	bl	40e4 <nrf_gpio_cfg_output>
		if (cfg->cts_pin != NRF_UARTE_PSEL_DISCONNECTED) {
    4172:	69a8      	ldr	r0, [r5, #24]
    4174:	1c43      	adds	r3, r0, #1
    4176:	d006      	beq.n	4186 <uarte_instance_init.isra.0+0x62>
			nrf_gpio_cfg_input(cfg->cts_pin,
    4178:	7f6b      	ldrb	r3, [r5, #29]
    417a:	2b00      	cmp	r3, #0
    417c:	bf14      	ite	ne
    417e:	2103      	movne	r1, #3
    4180:	2100      	moveq	r1, #0
    4182:	f7ff ff3d 	bl	4000 <nrf_gpio_cfg_input>
	nrf_uarte_txrx_pins_set(cfg->uarte_regs, cfg->tx_pin, cfg->rx_pin);
    4186:	e9d5 1203 	ldrd	r1, r2, [r5, #12]
    418a:	682b      	ldr	r3, [r5, #0]
    p_reg->PSEL.TXD = pseltxd;
    418c:	f8c3 150c 	str.w	r1, [r3, #1292]	; 0x50c
    p_reg->PSEL.RXD = pselrxd;
    4190:	f8c3 2514 	str.w	r2, [r3, #1300]	; 0x514
	nrf_uarte_hwfc_pins_set(cfg->uarte_regs, cfg->rts_pin, cfg->cts_pin);
    4194:	e9d5 1205 	ldrd	r1, r2, [r5, #20]
    p_reg->PSEL.RTS = pselrts;
    4198:	f8c3 1508 	str.w	r1, [r3, #1288]	; 0x508
	}
#else
	uarte_nrfx_pins_configure(dev, false);
#endif /* CONFIG_PINCTRL */

	err = uarte_nrfx_configure(dev, &get_dev_data(dev)->uart_config);
    419c:	6931      	ldr	r1, [r6, #16]
    p_reg->PSEL.CTS = pselcts;
    419e:	f8c3 2510 	str.w	r2, [r3, #1296]	; 0x510
    41a2:	3104      	adds	r1, #4
    41a4:	4630      	mov	r0, r6
    41a6:	f7ff fe79 	bl	3e9c <uarte_nrfx_configure>
	if (err) {
    41aa:	4605      	mov	r5, r0
    41ac:	b9b0      	cbnz	r0, 41dc <uarte_instance_init.isra.0+0xb8>
		return err;
	}

	if (IS_ENABLED(CONFIG_UART_ENHANCED_POLL_OUT) &&
	    cfg->flags & UARTE_CFG_FLAG_PPI_ENDTX) {
    41ae:	f8d8 3004 	ldr.w	r3, [r8, #4]
	if (IS_ENABLED(CONFIG_UART_ENHANCED_POLL_OUT) &&
    41b2:	0799      	lsls	r1, r3, #30
    41b4:	d528      	bpl.n	4208 <uarte_instance_init.isra.0+0xe4>
	ret = gppi_channel_alloc(&data->ppi_ch_endtx);
    41b6:	f107 0012 	add.w	r0, r7, #18
    41ba:	f001 f999 	bl	54f0 <nrfx_ppi_channel_alloc>
	if (ret != NRFX_SUCCESS) {
    41be:	4b27      	ldr	r3, [pc, #156]	; (425c <uarte_instance_init.isra.0+0x138>)
    41c0:	4298      	cmp	r0, r3
    41c2:	d00e      	beq.n	41e2 <uarte_instance_init.isra.0+0xbe>
    41c4:	4b26      	ldr	r3, [pc, #152]	; (4260 <uarte_instance_init.isra.0+0x13c>)
    41c6:	4927      	ldr	r1, [pc, #156]	; (4264 <uarte_instance_init.isra.0+0x140>)
		LOG_ERR("Failed to allocate PPI Channel");
    41c8:	4827      	ldr	r0, [pc, #156]	; (4268 <uarte_instance_init.isra.0+0x144>)
    41ca:	1ac9      	subs	r1, r1, r3
    41cc:	08c9      	lsrs	r1, r1, #3
    41ce:	0189      	lsls	r1, r1, #6
    41d0:	f041 0101 	orr.w	r1, r1, #1
    41d4:	f004 fbda 	bl	898c <log_0>
		return -EIO;
    41d8:	f06f 0504 	mvn.w	r5, #4

	/* switch off transmitter to save an energy */
	nrf_uarte_task_trigger(uarte, NRF_UARTE_TASK_STOPTX);

	return 0;
}
    41dc:	4628      	mov	r0, r5
    41de:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
	nrfx_gppi_channel_endpoints_setup(data->ppi_ch_endtx,
    41e2:	7cb8      	ldrb	r0, [r7, #18]
    return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
    41e4:	00c3      	lsls	r3, r0, #3
    41e6:	f103 4380 	add.w	r3, r3, #1073741824	; 0x40000000
    41ea:	f503 33f8 	add.w	r3, r3, #126976	; 0x1f000
    return (uint32_t)p_reg + (uint32_t)task;
    41ee:	f104 020c 	add.w	r2, r4, #12
    return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
    41f2:	f504 7190 	add.w	r1, r4, #288	; 0x120
NRF_STATIC_INLINE void nrf_ppi_channel_endpoint_setup(NRF_PPI_Type *    p_reg,
                                                      nrf_ppi_channel_t channel,
                                                      uint32_t          eep,
                                                      uint32_t          tep)
{
    p_reg->CH[(uint32_t) channel].EEP = eep;
    41f6:	f8c3 1510 	str.w	r1, [r3, #1296]	; 0x510
    p_reg->CH[(uint32_t) channel].TEP = tep;
    41fa:	f8c3 2514 	str.w	r2, [r3, #1300]	; 0x514
    p_reg->CHENSET = mask;
    41fe:	4a1b      	ldr	r2, [pc, #108]	; (426c <uarte_instance_init.isra.0+0x148>)
	nrfx_gppi_channels_enable(BIT(data->ppi_ch_endtx));
    4200:	2301      	movs	r3, #1
    4202:	4083      	lsls	r3, r0
    4204:	f8c2 3504 	str.w	r3, [r2, #1284]	; 0x504
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
    4208:	2308      	movs	r3, #8
    420a:	f8c4 3500 	str.w	r3, [r4, #1280]	; 0x500
		if (!cfg->disable_rx) {
    420e:	f898 3008 	ldrb.w	r3, [r8, #8]
    4212:	b95b      	cbnz	r3, 422c <uarte_instance_init.isra.0+0x108>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4214:	f8c4 3110 	str.w	r3, [r4, #272]	; 0x110
    4218:	f8d4 3110 	ldr.w	r3, [r4, #272]	; 0x110
			nrf_uarte_rx_buffer_set(uarte, &data->rx_data, 1);
    421c:	f107 0311 	add.w	r3, r7, #17

NRF_STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg,
                                               uint8_t *        p_buffer,
                                               size_t           length)
{
    p_reg->RXD.PTR    = (uint32_t)p_buffer;
    4220:	f8c4 3534 	str.w	r3, [r4, #1332]	; 0x534
    p_reg->RXD.MAXCNT = length;
    4224:	2301      	movs	r3, #1
    4226:	f8c4 3538 	str.w	r3, [r4, #1336]	; 0x538
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    422a:	6023      	str	r3, [r4, #0]
	if (!(cfg->flags & UARTE_CFG_FLAG_PPI_ENDTX)) {
    422c:	f8d8 3004 	ldr.w	r3, [r8, #4]
    4230:	079a      	lsls	r2, r3, #30
    p_reg->INTENSET = mask;
    4232:	bf5c      	itt	pl
    4234:	f44f 7280 	movpl.w	r2, #256	; 0x100
    4238:	f8c4 2304 	strpl.w	r2, [r4, #772]	; 0x304
	if (cfg->flags & UARTE_CFG_FLAG_LOW_POWER) {
    423c:	06db      	lsls	r3, r3, #27
    423e:	bf44      	itt	mi
    4240:	f44f 0380 	movmi.w	r3, #4194304	; 0x400000
    4244:	f8c4 3304 	strmi.w	r3, [r4, #772]	; 0x304
	nrf_uarte_tx_buffer_set(uarte, &data->char_out, 0);
    4248:	3710      	adds	r7, #16
    p_reg->TXD.MAXCNT = length;
    424a:	2300      	movs	r3, #0
    p_reg->TXD.PTR    = (uint32_t)p_buffer;
    424c:	f8c4 7544 	str.w	r7, [r4, #1348]	; 0x544
    p_reg->TXD.MAXCNT = length;
    4250:	f8c4 3548 	str.w	r3, [r4, #1352]	; 0x548
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    4254:	2301      	movs	r3, #1
    4256:	60a3      	str	r3, [r4, #8]
    4258:	60e3      	str	r3, [r4, #12]
	return 0;
    425a:	e7bf      	b.n	41dc <uarte_instance_init.isra.0+0xb8>
    425c:	0bad0000 	.word	0x0bad0000
    4260:	00009d80 	.word	0x00009d80
    4264:	00009db8 	.word	0x00009db8
    4268:	0000ac85 	.word	0x0000ac85
    426c:	4001f000 	.word	0x4001f000

00004270 <sys_clock_timeout_handler>:
static void sys_clock_timeout_handler(int32_t chan,
				      uint64_t expire_time,
				      void *user_data)
{
	uint32_t cc_value = absolute_time_to_cc(expire_time);
	uint64_t dticks = (expire_time - last_count) / CYC_PER_TICK;
    4270:	4919      	ldr	r1, [pc, #100]	; (42d8 <sys_clock_timeout_handler+0x68>)
{
    4272:	b570      	push	{r4, r5, r6, lr}
    4274:	4604      	mov	r4, r0
	return absolute_time & COUNTER_MAX;
    4276:	f022 467f 	bic.w	r6, r2, #4278190080	; 0xff000000
	uint64_t dticks = (expire_time - last_count) / CYC_PER_TICK;
    427a:	6808      	ldr	r0, [r1, #0]

	last_count += dticks * CYC_PER_TICK;
    427c:	e9c1 2300 	strd	r2, r3, [r1]
	return (cc_value >= ANCHOR_RANGE_START) && (cc_value < ANCHOR_RANGE_END);
    4280:	f5a6 1300 	sub.w	r3, r6, #2097152	; 0x200000
	uint64_t dticks = (expire_time - last_count) / CYC_PER_TICK;
    4284:	1a10      	subs	r0, r2, r0
	if (in_anchor_range(cc_value)) {
    4286:	f5b3 0f40 	cmp.w	r3, #12582912	; 0xc00000
    428a:	f04f 0500 	mov.w	r5, #0
    428e:	d20a      	bcs.n	42a6 <sys_clock_timeout_handler+0x36>
		anchor = (((uint64_t)overflow_cnt) << COUNTER_BIT_WIDTH) + cc_value;
    4290:	4b12      	ldr	r3, [pc, #72]	; (42dc <sys_clock_timeout_handler+0x6c>)
    4292:	6819      	ldr	r1, [r3, #0]
    4294:	060a      	lsls	r2, r1, #24
    4296:	0a0b      	lsrs	r3, r1, #8
    4298:	1992      	adds	r2, r2, r6
    429a:	4911      	ldr	r1, [pc, #68]	; (42e0 <sys_clock_timeout_handler+0x70>)
    429c:	f143 0300 	adc.w	r3, r3, #0
    42a0:	e9c1 2300 	strd	r2, r3, [r1]
		return true;
    42a4:	2501      	movs	r5, #1
		 */
		compare_set(chan, last_count + CYC_PER_TICK,
					  sys_clock_timeout_handler, NULL);
	}

	sys_clock_announce(IS_ENABLED(CONFIG_TICKLESS_KERNEL) ?
    42a6:	f002 f987 	bl	65b8 <sys_clock_announce>
    return p_reg->CC[ch];
    42aa:	00a3      	lsls	r3, r4, #2
    42ac:	f103 4380 	add.w	r3, r3, #1073741824	; 0x40000000
    42b0:	f503 3388 	add.w	r3, r3, #69632	; 0x11000
    42b4:	f8d3 2540 	ldr.w	r2, [r3, #1344]	; 0x540
			   (int32_t)dticks : (dticks > 0));

	if (cc_value == get_comparator(chan)) {
    42b8:	42b2      	cmp	r2, r6
    42ba:	d10b      	bne.n	42d4 <sys_clock_timeout_handler+0x64>
		 * If anchor was updated we can enable same CC value to trigger
		 * interrupt after full cycle. Else set event in anchor update
		 * range. Since anchor was not updated we know that it's very
		 * far from mid point so setting is done without any protection.
		 */
		if (!anchor_updated) {
    42bc:	b91d      	cbnz	r5, 42c6 <sys_clock_timeout_handler+0x56>
    p_reg->CC[ch] = cc_val;
    42be:	f44f 0200 	mov.w	r2, #8388608	; 0x800000
    42c2:	f8c3 2540 	str.w	r2, [r3, #1344]	; 0x540
    p_reg->EVTENSET = mask;
    42c6:	4b07      	ldr	r3, [pc, #28]	; (42e4 <sys_clock_timeout_handler+0x74>)
	nrf_rtc_event_enable(RTC, RTC_CHANNEL_INT_MASK(chan));
    42c8:	f44f 3080 	mov.w	r0, #65536	; 0x10000
    42cc:	fa00 f404 	lsl.w	r4, r0, r4
    42d0:	f8c3 4344 	str.w	r4, [r3, #836]	; 0x344
			set_comparator(chan, COUNTER_HALF_SPAN);
		}
		event_enable(chan);
	}
}
    42d4:	bd70      	pop	{r4, r5, r6, pc}
    42d6:	bf00      	nop
    42d8:	200002f8 	.word	0x200002f8
    42dc:	20001744 	.word	0x20001744
    42e0:	200002e0 	.word	0x200002e0
    42e4:	40011000 	.word	0x40011000

000042e8 <compare_int_lock>:
{
    42e8:	b510      	push	{r4, lr}
	atomic_val_t prev = atomic_and(&int_mask, ~BIT(chan));
    42ea:	2301      	movs	r3, #1
    42ec:	4083      	lsls	r3, r0
	return __atomic_fetch_and(target, value, __ATOMIC_SEQ_CST);
    42ee:	4a11      	ldr	r2, [pc, #68]	; (4334 <compare_int_lock+0x4c>)
    42f0:	f3bf 8f5b 	dmb	ish
    42f4:	43dc      	mvns	r4, r3
    42f6:	e852 1f00 	ldrex	r1, [r2]
    42fa:	ea01 0c04 	and.w	ip, r1, r4
    42fe:	e842 ce00 	strex	lr, ip, [r2]
    4302:	f1be 0f00 	cmp.w	lr, #0
    4306:	d1f6      	bne.n	42f6 <compare_int_lock+0xe>
    4308:	f3bf 8f5b 	dmb	ish
	nrf_rtc_int_disable(RTC, RTC_CHANNEL_INT_MASK(chan));
    430c:	f44f 3280 	mov.w	r2, #65536	; 0x10000
    4310:	fa02 f000 	lsl.w	r0, r2, r0
    p_reg->INTENCLR = mask;
    4314:	f102 4280 	add.w	r2, r2, #1073741824	; 0x40000000
    4318:	f502 5280 	add.w	r2, r2, #4096	; 0x1000
    431c:	f8c2 0308 	str.w	r0, [r2, #776]	; 0x308
  __ASM volatile ("dmb 0xF":::"memory");
    4320:	f3bf 8f5f 	dmb	sy
  __ASM volatile ("isb 0xF":::"memory");
    4324:	f3bf 8f6f 	isb	sy
	return prev & BIT(chan);
    4328:	420b      	tst	r3, r1
}
    432a:	bf14      	ite	ne
    432c:	2001      	movne	r0, #1
    432e:	2000      	moveq	r0, #0
    4330:	bd10      	pop	{r4, pc}
    4332:	bf00      	nop
    4334:	20001740 	.word	0x20001740

00004338 <compare_int_unlock.part.0>:
		atomic_or(&int_mask, BIT(chan));
    4338:	2301      	movs	r3, #1
	return __atomic_fetch_or(target, value, __ATOMIC_SEQ_CST);
    433a:	4a12      	ldr	r2, [pc, #72]	; (4384 <compare_int_unlock.part.0+0x4c>)
    433c:	f3bf 8f5b 	dmb	ish
    4340:	4083      	lsls	r3, r0
    4342:	e852 1f00 	ldrex	r1, [r2]
    4346:	4319      	orrs	r1, r3
    4348:	e842 1c00 	strex	ip, r1, [r2]
    434c:	f1bc 0f00 	cmp.w	ip, #0
    4350:	d1f7      	bne.n	4342 <compare_int_unlock.part.0+0xa>
    4352:	f3bf 8f5b 	dmb	ish
    p_reg->INTENSET = mask;
    4356:	4a0c      	ldr	r2, [pc, #48]	; (4388 <compare_int_unlock.part.0+0x50>)
		nrf_rtc_int_enable(RTC, RTC_CHANNEL_INT_MASK(chan));
    4358:	f44f 3380 	mov.w	r3, #65536	; 0x10000
    435c:	4083      	lsls	r3, r0
    435e:	f8c2 3304 	str.w	r3, [r2, #772]	; 0x304
	return __atomic_load_n(target, __ATOMIC_SEQ_CST);
    4362:	4b0a      	ldr	r3, [pc, #40]	; (438c <compare_int_unlock.part.0+0x54>)
    4364:	f3bf 8f5b 	dmb	ish
    4368:	681b      	ldr	r3, [r3, #0]
    436a:	f3bf 8f5b 	dmb	ish
		if (atomic_get(&force_isr_mask) & BIT(chan)) {
    436e:	fa23 f000 	lsr.w	r0, r3, r0
    4372:	07c3      	lsls	r3, r0, #31
    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    4374:	bf42      	ittt	mi
    4376:	4b06      	ldrmi	r3, [pc, #24]	; (4390 <compare_int_unlock.part.0+0x58>)
    4378:	f44f 3200 	movmi.w	r2, #131072	; 0x20000
    437c:	f8c3 2100 	strmi.w	r2, [r3, #256]	; 0x100
}
    4380:	4770      	bx	lr
    4382:	bf00      	nop
    4384:	20001740 	.word	0x20001740
    4388:	40011000 	.word	0x40011000
    438c:	2000173c 	.word	0x2000173c
    4390:	e000e100 	.word	0xe000e100

00004394 <z_nrf_rtc_timer_read>:
	uint64_t val = ((uint64_t)overflow_cnt) << COUNTER_BIT_WIDTH;
    4394:	4b0d      	ldr	r3, [pc, #52]	; (43cc <z_nrf_rtc_timer_read+0x38>)
    4396:	681b      	ldr	r3, [r3, #0]
    4398:	0a19      	lsrs	r1, r3, #8
    439a:	0618      	lsls	r0, r3, #24
  __ASM volatile ("dmb 0xF":::"memory");
    439c:	f3bf 8f5f 	dmb	sy
     return p_reg->COUNTER;
    43a0:	4b0b      	ldr	r3, [pc, #44]	; (43d0 <z_nrf_rtc_timer_read+0x3c>)
    43a2:	f8d3 3504 	ldr.w	r3, [r3, #1284]	; 0x504
	val += cntr;
    43a6:	18c0      	adds	r0, r0, r3
    43a8:	f141 0100 	adc.w	r1, r1, #0
	if (cntr < OVERFLOW_RISK_RANGE_END) {
    43ac:	f5b3 1f80 	cmp.w	r3, #1048576	; 0x100000
    43b0:	d20a      	bcs.n	43c8 <z_nrf_rtc_timer_read+0x34>
		if (val < anchor) {
    43b2:	4b08      	ldr	r3, [pc, #32]	; (43d4 <z_nrf_rtc_timer_read+0x40>)
    43b4:	e9d3 2300 	ldrd	r2, r3, [r3]
    43b8:	4299      	cmp	r1, r3
    43ba:	bf08      	it	eq
    43bc:	4290      	cmpeq	r0, r2
    43be:	d203      	bcs.n	43c8 <z_nrf_rtc_timer_read+0x34>
			val += COUNTER_SPAN;
    43c0:	f110 7080 	adds.w	r0, r0, #16777216	; 0x1000000
    43c4:	f141 0100 	adc.w	r1, r1, #0
}
    43c8:	4770      	bx	lr
    43ca:	bf00      	nop
    43cc:	20001744 	.word	0x20001744
    43d0:	40011000 	.word	0x40011000
    43d4:	200002e0 	.word	0x200002e0

000043d8 <compare_set>:
{
    43d8:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    43dc:	b085      	sub	sp, #20
    43de:	4616      	mov	r6, r2
    43e0:	461f      	mov	r7, r3
    43e2:	4605      	mov	r5, r0
	key = compare_int_lock(chan);
    43e4:	f7ff ff80 	bl	42e8 <compare_int_lock>
    43e8:	9001      	str	r0, [sp, #4]
	uint64_t curr_time = z_nrf_rtc_timer_read();
    43ea:	f7ff ffd3 	bl	4394 <z_nrf_rtc_timer_read>
	if (curr_time < target_time) {
    43ee:	42b9      	cmp	r1, r7
    43f0:	bf08      	it	eq
    43f2:	42b0      	cmpeq	r0, r6
    43f4:	d27f      	bcs.n	44f6 <compare_set+0x11e>
		if (target_time - curr_time > COUNTER_SPAN) {
    43f6:	ebb6 0800 	subs.w	r8, r6, r0
    43fa:	eb67 0901 	sbc.w	r9, r7, r1
    43fe:	2300      	movs	r3, #0
    4400:	f04f 7280 	mov.w	r2, #16777216	; 0x1000000
    4404:	454b      	cmp	r3, r9
    4406:	bf08      	it	eq
    4408:	4542      	cmpeq	r2, r8
    440a:	f0c0 8085 	bcc.w	4518 <compare_set+0x140>
		if (target_time != cc_data[chan].target_time) {
    440e:	4b44      	ldr	r3, [pc, #272]	; (4520 <compare_set+0x148>)
    4410:	eb03 1305 	add.w	r3, r3, r5, lsl #4
    4414:	e9d3 2302 	ldrd	r2, r3, [r3, #8]
    4418:	429f      	cmp	r7, r3
    441a:	bf08      	it	eq
    441c:	4296      	cmpeq	r6, r2
    441e:	d054      	beq.n	44ca <compare_set+0xf2>
    4420:	ea4f 0985 	mov.w	r9, r5, lsl #2
	nrf_rtc_event_enable(RTC, RTC_CHANNEL_INT_MASK(chan));
    4424:	f44f 3b80 	mov.w	fp, #65536	; 0x10000
    4428:	f109 4980 	add.w	r9, r9, #1073741824	; 0x40000000
	nrf_rtc_event_clear(RTC, RTC_CHANNEL_EVENT_ADDR(chan));
    442c:	f105 0850 	add.w	r8, r5, #80	; 0x50
	nrf_rtc_event_enable(RTC, RTC_CHANNEL_INT_MASK(chan));
    4430:	fa0b f205 	lsl.w	r2, fp, r5
    4434:	f509 3988 	add.w	r9, r9, #69632	; 0x11000
	nrf_rtc_event_clear(RTC, RTC_CHANNEL_EVENT_ADDR(chan));
    4438:	ea4f 0888 	mov.w	r8, r8, lsl #2
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    443c:	fa1f f888 	uxth.w	r8, r8
	nrf_rtc_event_enable(RTC, RTC_CHANNEL_INT_MASK(chan));
    4440:	9202      	str	r2, [sp, #8]
     return p_reg->COUNTER;
    4442:	4a38      	ldr	r2, [pc, #224]	; (4524 <compare_set+0x14c>)
    return p_reg->CC[ch];
    4444:	f8d9 0540 	ldr.w	r0, [r9, #1344]	; 0x540
	return absolute_time & COUNTER_MAX;
    4448:	f026 437f 	bic.w	r3, r6, #4278190080	; 0xff000000
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    444c:	f108 4880 	add.w	r8, r8, #1073741824	; 0x40000000
    4450:	f508 3888 	add.w	r8, r8, #69632	; 0x11000
	uint32_t cc_val = abs_val & COUNTER_MAX;
    4454:	461c      	mov	r4, r3
    4456:	4693      	mov	fp, r2
     return p_reg->COUNTER;
    4458:	f8d2 a504 	ldr.w	sl, [r2, #1284]	; 0x504
	return (a - b) & COUNTER_MAX;
    445c:	eba0 000a 	sub.w	r0, r0, sl
    4460:	f020 407f 	bic.w	r0, r0, #4278190080	; 0xff000000
	nrf_rtc_cc_set(RTC, chan, cyc & COUNTER_MAX);
    4464:	f02a 417f 	bic.w	r1, sl, #4278190080	; 0xff000000
		if (counter_sub(prev_cc, now) == 1) {
    4468:	2801      	cmp	r0, #1
    p_reg->CC[ch] = cc_val;
    446a:	f8c9 1540 	str.w	r1, [r9, #1344]	; 0x540
    446e:	d105      	bne.n	447c <compare_set+0xa4>
    4470:	9303      	str	r3, [sp, #12]
	z_impl_k_busy_wait(usec_to_wait);
    4472:	2013      	movs	r0, #19
    4474:	f005 faef 	bl	9a56 <z_impl_k_busy_wait>
    4478:	4a2a      	ldr	r2, [pc, #168]	; (4524 <compare_set+0x14c>)
    447a:	9b03      	ldr	r3, [sp, #12]
    p_reg->EVTENSET = mask;
    447c:	9902      	ldr	r1, [sp, #8]
		if (counter_sub(cc_val, now + 2) > COUNTER_HALF_SPAN) {
    447e:	f10a 0c02 	add.w	ip, sl, #2
	return (a - b) & COUNTER_MAX;
    4482:	eba4 000c 	sub.w	r0, r4, ip
    4486:	f020 407f 	bic.w	r0, r0, #4278190080	; 0xff000000
			cc_val = now + 2;
    448a:	f5b0 0f00 	cmp.w	r0, #8388608	; 0x800000
    448e:	bf88      	it	hi
    4490:	4664      	movhi	r4, ip
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    4492:	2000      	movs	r0, #0
    4494:	f8c8 0000 	str.w	r0, [r8]
    4498:	f8d8 0000 	ldr.w	r0, [r8]
    p_reg->EVTENSET = mask;
    449c:	f8cb 1344 	str.w	r1, [fp, #836]	; 0x344
	nrf_rtc_cc_set(RTC, chan, cyc & COUNTER_MAX);
    44a0:	f024 407f 	bic.w	r0, r4, #4278190080	; 0xff000000
    p_reg->CC[ch] = cc_val;
    44a4:	f8c9 0540 	str.w	r0, [r9, #1344]	; 0x540
     return p_reg->COUNTER;
    44a8:	f8db 0504 	ldr.w	r0, [fp, #1284]	; 0x504
		 (counter_sub(cc_val, now2 + 2) > COUNTER_HALF_SPAN));
    44ac:	4582      	cmp	sl, r0
    44ae:	d006      	beq.n	44be <compare_set+0xe6>
	return (a - b) & COUNTER_MAX;
    44b0:	1a20      	subs	r0, r4, r0
    44b2:	3802      	subs	r0, #2
    44b4:	f020 407f 	bic.w	r0, r0, #4278190080	; 0xff000000
	} while ((now2 != now) &&
    44b8:	f5b0 0f00 	cmp.w	r0, #8388608	; 0x800000
    44bc:	d819      	bhi.n	44f2 <compare_set+0x11a>
	return (a - b) & COUNTER_MAX;
    44be:	1ae4      	subs	r4, r4, r3
    44c0:	f024 447f 	bic.w	r4, r4, #4278190080	; 0xff000000
			target_time += counter_sub(cc_set, cc_value);
    44c4:	1932      	adds	r2, r6, r4
    44c6:	f147 0300 	adc.w	r3, r7, #0
	cc_data[chan].target_time = target_time;
    44ca:	4c15      	ldr	r4, [pc, #84]	; (4520 <compare_set+0x148>)
    44cc:	0129      	lsls	r1, r5, #4
    44ce:	eb04 1005 	add.w	r0, r4, r5, lsl #4
    44d2:	e9c0 2302 	strd	r2, r3, [r0, #8]
	cc_data[chan].callback = handler;
    44d6:	9a0e      	ldr	r2, [sp, #56]	; 0x38
	cc_data[chan].user_context = user_data;
    44d8:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
	cc_data[chan].callback = handler;
    44da:	5062      	str	r2, [r4, r1]
	cc_data[chan].user_context = user_data;
    44dc:	6043      	str	r3, [r0, #4]
	return ret;
    44de:	2400      	movs	r4, #0
	if (key) {
    44e0:	9b01      	ldr	r3, [sp, #4]
    44e2:	b113      	cbz	r3, 44ea <compare_set+0x112>
    44e4:	4628      	mov	r0, r5
    44e6:	f7ff ff27 	bl	4338 <compare_int_unlock.part.0>
}
    44ea:	4620      	mov	r0, r4
    44ec:	b005      	add	sp, #20
    44ee:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    44f2:	4620      	mov	r0, r4
    44f4:	e7b0      	b.n	4458 <compare_set+0x80>
		atomic_or(&force_isr_mask, BIT(chan));
    44f6:	2301      	movs	r3, #1
	return __atomic_fetch_or(target, value, __ATOMIC_SEQ_CST);
    44f8:	4a0b      	ldr	r2, [pc, #44]	; (4528 <compare_set+0x150>)
    44fa:	f3bf 8f5b 	dmb	ish
    44fe:	40ab      	lsls	r3, r5
    4500:	e852 1f00 	ldrex	r1, [r2]
    4504:	4319      	orrs	r1, r3
    4506:	e842 1000 	strex	r0, r1, [r2]
    450a:	2800      	cmp	r0, #0
    450c:	d1f8      	bne.n	4500 <compare_set+0x128>
    450e:	f3bf 8f5b 	dmb	ish
    4512:	4632      	mov	r2, r6
    4514:	463b      	mov	r3, r7
    4516:	e7d8      	b.n	44ca <compare_set+0xf2>
			return -EINVAL;
    4518:	f06f 0415 	mvn.w	r4, #21
    451c:	e7e0      	b.n	44e0 <compare_set+0x108>
    451e:	bf00      	nop
    4520:	200002e8 	.word	0x200002e8
    4524:	40011000 	.word	0x40011000
    4528:	2000173c 	.word	0x2000173c

0000452c <sys_clock_driver_init>:
{
	return (uint32_t)z_nrf_rtc_timer_read();
}

static int sys_clock_driver_init(const struct device *dev)
{
    452c:	b573      	push	{r0, r1, r4, r5, r6, lr}
			CLOCK_CONTROL_NRF_LF_START_STABLE);

	/* TODO: replace with counter driver to access RTC */
	nrf_rtc_prescaler_set(RTC, 0);
	for (int32_t chan = 0; chan < CHAN_COUNT; chan++) {
		cc_data[chan].target_time = TARGET_TIME_INVALID;
    452e:	4b19      	ldr	r3, [pc, #100]	; (4594 <sys_clock_driver_init+0x68>)
    p_reg->PRESCALER = val;
    4530:	4d19      	ldr	r5, [pc, #100]	; (4598 <sys_clock_driver_init+0x6c>)
    4532:	2400      	movs	r4, #0
    4534:	f04f 30ff 	mov.w	r0, #4294967295
    4538:	f04f 31ff 	mov.w	r1, #4294967295
    453c:	f8c5 4508 	str.w	r4, [r5, #1288]	; 0x508
    4540:	e9c3 0102 	strd	r0, r1, [r3, #8]
    p_reg->INTENSET = mask;
    4544:	f44f 3380 	mov.w	r3, #65536	; 0x10000
    4548:	f8c5 3304 	str.w	r3, [r5, #772]	; 0x304
    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    454c:	4b13      	ldr	r3, [pc, #76]	; (459c <sys_clock_driver_init+0x70>)
    454e:	2602      	movs	r6, #2
    4550:	f44f 3200 	mov.w	r2, #131072	; 0x20000

	nrf_rtc_int_enable(RTC, NRF_RTC_INT_OVERFLOW_MASK);

	NVIC_ClearPendingIRQ(RTC_IRQn);

	IRQ_CONNECT(RTC_IRQn, DT_IRQ(DT_NODELABEL(RTC_LABEL), priority),
    4554:	2101      	movs	r1, #1
    4556:	f8c5 6304 	str.w	r6, [r5, #772]	; 0x304
    455a:	2011      	movs	r0, #17
    455c:	f8c3 2180 	str.w	r2, [r3, #384]	; 0x180
    4560:	4622      	mov	r2, r4
    4562:	f7fe fa8b 	bl	2a7c <z_arm_irq_priority_set>
		    rtc_nrf_isr, 0, 0);
	irq_enable(RTC_IRQn);
    4566:	2011      	movs	r0, #17
    4568:	f7fe fa6a 	bl	2a40 <arch_irq_enable>
    *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
    456c:	4a0c      	ldr	r2, [pc, #48]	; (45a0 <sys_clock_driver_init+0x74>)
    456e:	2301      	movs	r3, #1
    4570:	6013      	str	r3, [r2, #0]

	nrf_rtc_task_trigger(RTC, NRF_RTC_TASK_CLEAR);
	nrf_rtc_task_trigger(RTC, NRF_RTC_TASK_START);

	int_mask = BIT_MASK(CHAN_COUNT);
    4572:	4a0c      	ldr	r2, [pc, #48]	; (45a4 <sys_clock_driver_init+0x78>)
    4574:	602b      	str	r3, [r5, #0]
    4576:	6013      	str	r3, [r2, #0]

	uint32_t initial_timeout = IS_ENABLED(CONFIG_TICKLESS_KERNEL) ?
		(COUNTER_HALF_SPAN - 1) :
		(counter() + CYC_PER_TICK);

	compare_set(0, initial_timeout, sys_clock_timeout_handler, NULL);
    4578:	4b0b      	ldr	r3, [pc, #44]	; (45a8 <sys_clock_driver_init+0x7c>)
    457a:	4a0c      	ldr	r2, [pc, #48]	; (45ac <sys_clock_driver_init+0x80>)
    457c:	9300      	str	r3, [sp, #0]
    457e:	9401      	str	r4, [sp, #4]
    4580:	2300      	movs	r3, #0
    4582:	4620      	mov	r0, r4
    4584:	f7ff ff28 	bl	43d8 <compare_set>

	z_nrf_clock_control_lf_on(mode);
    4588:	4630      	mov	r0, r6
    458a:	f7ff f917 	bl	37bc <z_nrf_clock_control_lf_on>

	return 0;
}
    458e:	4620      	mov	r0, r4
    4590:	b002      	add	sp, #8
    4592:	bd70      	pop	{r4, r5, r6, pc}
    4594:	200002e8 	.word	0x200002e8
    4598:	40011000 	.word	0x40011000
    459c:	e000e100 	.word	0xe000e100
    45a0:	40011008 	.word	0x40011008
    45a4:	20001740 	.word	0x20001740
    45a8:	00004271 	.word	0x00004271
    45ac:	007fffff 	.word	0x007fffff

000045b0 <rtc_nrf_isr>:
{
    45b0:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
    return p_reg->INTENSET & mask;
    45b4:	4c34      	ldr	r4, [pc, #208]	; (4688 <rtc_nrf_isr+0xd8>)
    45b6:	f8d4 3304 	ldr.w	r3, [r4, #772]	; 0x304
	if (nrf_rtc_int_enable_check(RTC, NRF_RTC_INT_OVERFLOW_MASK) &&
    45ba:	079a      	lsls	r2, r3, #30
    45bc:	d509      	bpl.n	45d2 <rtc_nrf_isr+0x22>
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    45be:	4b33      	ldr	r3, [pc, #204]	; (468c <rtc_nrf_isr+0xdc>)
    45c0:	681a      	ldr	r2, [r3, #0]
    45c2:	b132      	cbz	r2, 45d2 <rtc_nrf_isr+0x22>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    45c4:	2200      	movs	r2, #0
    45c6:	601a      	str	r2, [r3, #0]
		overflow_cnt++;
    45c8:	4a31      	ldr	r2, [pc, #196]	; (4690 <rtc_nrf_isr+0xe0>)
    45ca:	681b      	ldr	r3, [r3, #0]
    45cc:	6813      	ldr	r3, [r2, #0]
    45ce:	3301      	adds	r3, #1
    45d0:	6013      	str	r3, [r2, #0]
	__asm__ volatile(
    45d2:	f04f 0320 	mov.w	r3, #32
    45d6:	f3ef 8211 	mrs	r2, BASEPRI
    45da:	f383 8812 	msr	BASEPRI_MAX, r3
    45de:	f3bf 8f6f 	isb	sy
    return p_reg->INTENSET & mask;
    45e2:	f8d4 3304 	ldr.w	r3, [r4, #772]	; 0x304
	if (nrf_rtc_int_enable_check(RTC, RTC_CHANNEL_INT_MASK(chan))) {
    45e6:	03db      	lsls	r3, r3, #15
    45e8:	d512      	bpl.n	4610 <rtc_nrf_isr+0x60>
	return __atomic_fetch_and(target, value, __ATOMIC_SEQ_CST);
    45ea:	f3bf 8f5b 	dmb	ish
    45ee:	4b29      	ldr	r3, [pc, #164]	; (4694 <rtc_nrf_isr+0xe4>)
    45f0:	e853 1f00 	ldrex	r1, [r3]
    45f4:	f021 0001 	bic.w	r0, r1, #1
    45f8:	e843 0600 	strex	r6, r0, [r3]
    45fc:	2e00      	cmp	r6, #0
    45fe:	d1f7      	bne.n	45f0 <rtc_nrf_isr+0x40>
    4600:	f3bf 8f5b 	dmb	ish
    4604:	4b24      	ldr	r3, [pc, #144]	; (4698 <rtc_nrf_isr+0xe8>)
		result = atomic_and(&force_isr_mask, ~BIT(chan)) ||
    4606:	2900      	cmp	r1, #0
    4608:	d139      	bne.n	467e <rtc_nrf_isr+0xce>
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    460a:	6819      	ldr	r1, [r3, #0]
		if (result) {
    460c:	2900      	cmp	r1, #0
    460e:	d136      	bne.n	467e <rtc_nrf_isr+0xce>
{
    4610:	2300      	movs	r3, #0
	__asm__ volatile(
    4612:	f382 8811 	msr	BASEPRI, r2
    4616:	f3bf 8f6f 	isb	sy
	if (channel_processing_check_and_clear(chan)) {
    461a:	b36b      	cbz	r3, 4678 <rtc_nrf_isr+0xc8>
		curr_time = z_nrf_rtc_timer_read();
    461c:	f7ff feba 	bl	4394 <z_nrf_rtc_timer_read>
    4620:	4606      	mov	r6, r0
    4622:	460f      	mov	r7, r1
	__asm__ volatile(
    4624:	f04f 0320 	mov.w	r3, #32
    4628:	f3ef 8011 	mrs	r0, BASEPRI
    462c:	f383 8812 	msr	BASEPRI_MAX, r3
    4630:	f3bf 8f6f 	isb	sy
		expire_time = cc_data[chan].target_time;
    4634:	4b19      	ldr	r3, [pc, #100]	; (469c <rtc_nrf_isr+0xec>)
    4636:	e9d3 8902 	ldrd	r8, r9, [r3, #8]
		if (curr_time >= expire_time) {
    463a:	4549      	cmp	r1, r9
    463c:	bf08      	it	eq
    463e:	4546      	cmpeq	r6, r8
    4640:	f04f 0200 	mov.w	r2, #0
			cc_data[chan].target_time = TARGET_TIME_INVALID;
    4644:	bf21      	itttt	cs
    4646:	f04f 36ff 	movcs.w	r6, #4294967295
    464a:	f04f 37ff 	movcs.w	r7, #4294967295
			user_context = cc_data[chan].user_context;
    464e:	e9d3 1500 	ldrdcs	r1, r5, [r3]
			cc_data[chan].target_time = TARGET_TIME_INVALID;
    4652:	e9c3 6702 	strdcs	r6, r7, [r3, #8]
			cc_data[chan].callback = NULL;
    4656:	bf23      	ittte	cs
    4658:	601a      	strcs	r2, [r3, #0]
    p_reg->EVTENCLR = mask;
    465a:	f44f 3380 	movcs.w	r3, #65536	; 0x10000
    465e:	f8c4 3348 	strcs.w	r3, [r4, #840]	; 0x348
		z_nrf_rtc_timer_compare_handler_t handler = NULL;
    4662:	4611      	movcc	r1, r2
	__asm__ volatile(
    4664:	f380 8811 	msr	BASEPRI, r0
    4668:	f3bf 8f6f 	isb	sy
		if (handler) {
    466c:	b121      	cbz	r1, 4678 <rtc_nrf_isr+0xc8>
			handler(chan, expire_time, user_context);
    466e:	9500      	str	r5, [sp, #0]
    4670:	4642      	mov	r2, r8
    4672:	464b      	mov	r3, r9
    4674:	2000      	movs	r0, #0
    4676:	4788      	blx	r1
}
    4678:	b003      	add	sp, #12
    467a:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    467e:	2100      	movs	r1, #0
    4680:	6019      	str	r1, [r3, #0]
    4682:	681b      	ldr	r3, [r3, #0]
		result = atomic_and(&force_isr_mask, ~BIT(chan)) ||
    4684:	2301      	movs	r3, #1
}
    4686:	e7c4      	b.n	4612 <rtc_nrf_isr+0x62>
    4688:	40011000 	.word	0x40011000
    468c:	40011104 	.word	0x40011104
    4690:	20001744 	.word	0x20001744
    4694:	2000173c 	.word	0x2000173c
    4698:	40011140 	.word	0x40011140
    469c:	200002e8 	.word	0x200002e8

000046a0 <sys_clock_set_timeout>:
	ticks = (ticks == K_TICKS_FOREVER) ? MAX_TICKS : ticks;
    46a0:	4b14      	ldr	r3, [pc, #80]	; (46f4 <sys_clock_set_timeout+0x54>)
{
    46a2:	b513      	push	{r0, r1, r4, lr}
	ticks = (ticks == K_TICKS_FOREVER) ? MAX_TICKS : ticks;
    46a4:	f1b0 3fff 	cmp.w	r0, #4294967295
    46a8:	bf08      	it	eq
    46aa:	4618      	moveq	r0, r3
	ticks = CLAMP(ticks - 1, 0, (int32_t)MAX_TICKS);
    46ac:	1e44      	subs	r4, r0, #1
    46ae:	2c00      	cmp	r4, #0
    46b0:	dd1e      	ble.n	46f0 <sys_clock_set_timeout+0x50>
    46b2:	429c      	cmp	r4, r3
    46b4:	bfa8      	it	ge
    46b6:	461c      	movge	r4, r3
	uint32_t unannounced = z_nrf_rtc_timer_read() - last_count;
    46b8:	f7ff fe6c 	bl	4394 <z_nrf_rtc_timer_read>
    46bc:	4b0e      	ldr	r3, [pc, #56]	; (46f8 <sys_clock_set_timeout+0x58>)
	compare_set(0, target_time, sys_clock_timeout_handler, NULL);
    46be:	490f      	ldr	r1, [pc, #60]	; (46fc <sys_clock_set_timeout+0x5c>)
	uint32_t unannounced = z_nrf_rtc_timer_read() - last_count;
    46c0:	e9d3 2300 	ldrd	r2, r3, [r3]
    46c4:	1a80      	subs	r0, r0, r2
		ticks = 0;
    46c6:	f5b0 0f00 	cmp.w	r0, #8388608	; 0x800000
    46ca:	bf28      	it	cs
    46cc:	2400      	movcs	r4, #0
	cyc = ticks * CYC_PER_TICK + 1 + unannounced;
    46ce:	3001      	adds	r0, #1
    46d0:	4404      	add	r4, r0
	uint64_t target_time = cyc + last_count;
    46d2:	4808      	ldr	r0, [pc, #32]	; (46f4 <sys_clock_set_timeout+0x54>)
	compare_set(0, target_time, sys_clock_timeout_handler, NULL);
    46d4:	9100      	str	r1, [sp, #0]
	uint64_t target_time = cyc + last_count;
    46d6:	4284      	cmp	r4, r0
    46d8:	bf28      	it	cs
    46da:	4604      	movcs	r4, r0
	compare_set(0, target_time, sys_clock_timeout_handler, NULL);
    46dc:	1912      	adds	r2, r2, r4
    46de:	f04f 0000 	mov.w	r0, #0
    46e2:	9001      	str	r0, [sp, #4]
    46e4:	f143 0300 	adc.w	r3, r3, #0
    46e8:	f7ff fe76 	bl	43d8 <compare_set>
}
    46ec:	b002      	add	sp, #8
    46ee:	bd10      	pop	{r4, pc}
	ticks = CLAMP(ticks - 1, 0, (int32_t)MAX_TICKS);
    46f0:	2400      	movs	r4, #0
    46f2:	e7e1      	b.n	46b8 <sys_clock_set_timeout+0x18>
    46f4:	007fffff 	.word	0x007fffff
    46f8:	200002f8 	.word	0x200002f8
    46fc:	00004271 	.word	0x00004271

00004700 <sys_clock_elapsed>:
{
    4700:	b508      	push	{r3, lr}
	return (z_nrf_rtc_timer_read() - last_count) / CYC_PER_TICK;
    4702:	f7ff fe47 	bl	4394 <z_nrf_rtc_timer_read>
    4706:	4b02      	ldr	r3, [pc, #8]	; (4710 <sys_clock_elapsed+0x10>)
    4708:	681b      	ldr	r3, [r3, #0]
}
    470a:	1ac0      	subs	r0, r0, r3
    470c:	bd08      	pop	{r3, pc}
    470e:	bf00      	nop
    4710:	200002f8 	.word	0x200002f8

00004714 <fprotect_set_permission>:
	return 0;
}

static int fprotect_set_permission(uint32_t start, size_t length,
				   size_t permission)
{
    4714:	b5f0      	push	{r4, r5, r6, r7, lr}
    4716:	4c28      	ldr	r4, [pc, #160]	; (47b8 <fprotect_set_permission+0xa4>)
}

NRF_STATIC_INLINE nrf_acl_perm_t nrf_acl_region_perm_get(NRF_ACL_Type const * p_reg,
                                                         uint32_t             region_id)
{
    return (nrf_acl_perm_t)p_reg->ACL[region_id].PERM;
    4718:	f8df c0a0 	ldr.w	ip, [pc, #160]	; 47bc <fprotect_set_permission+0xa8>
    471c:	6823      	ldr	r3, [r4, #0]
	while (nrf_acl_region_perm_get(NRF_ACL, idx) != 0) {
    471e:	2600      	movs	r6, #0
    4720:	eb0c 1703 	add.w	r7, ip, r3, lsl #4
    4724:	011d      	lsls	r5, r3, #4
    4726:	f8d7 7808 	ldr.w	r7, [r7, #2056]	; 0x808
    472a:	f017 0fff 	tst.w	r7, #255	; 0xff
    472e:	d10c      	bne.n	474a <fprotect_set_permission+0x36>
    4730:	b106      	cbz	r6, 4734 <fprotect_set_permission+0x20>
    4732:	6023      	str	r3, [r4, #0]
NRF_STATIC_INLINE uint32_t nrf_ficr_codepagesize_get(NRF_FICR_Type const * p_reg)
{
#if defined(FICR_INFO_CODEPAGESIZE_CODEPAGESIZE_Msk)
    return p_reg->INFO.CODEPAGESIZE;
#else
    return p_reg->CODEPAGESIZE;
    4734:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
    4738:	691e      	ldr	r6, [r3, #16]

	if (result != 0) {
		return result;
	}

	if (start % nrf_ficr_codepagesize_get(NRF_FICR) != 0 ||
    473a:	fbb0 f4f6 	udiv	r4, r0, r6
    473e:	fb06 0414 	mls	r4, r6, r4, r0
    4742:	b15c      	cbz	r4, 475c <fprotect_set_permission+0x48>
	    length % nrf_ficr_codepagesize_get(NRF_FICR) != 0 ||
	    length > NRF_ACL_REGION_SIZE_MAX || length == 0) {
		return -EINVAL;
    4744:	f06f 0015 	mvn.w	r0, #21
    4748:	e007      	b.n	475a <fprotect_set_permission+0x46>
		idx++;
    474a:	3301      	adds	r3, #1
		if (idx >= ACL_REGIONS_COUNT) {
    474c:	2b07      	cmp	r3, #7
    474e:	f04f 0601 	mov.w	r6, #1
    4752:	d9e5      	bls.n	4720 <fprotect_set_permission+0xc>
    4754:	6023      	str	r3, [r4, #0]
			return -ENOSPC;
    4756:	f06f 001b 	mvn.w	r0, #27
		|| (nrf_acl_region_perm_get(NRF_ACL, region_idx) != permission)) {
		return -EFAULT;
	}

	return 0;
}
    475a:	bdf0      	pop	{r4, r5, r6, r7, pc}
    475c:	691e      	ldr	r6, [r3, #16]
	    length % nrf_ficr_codepagesize_get(NRF_FICR) != 0 ||
    475e:	fbb1 f4f6 	udiv	r4, r1, r6
    4762:	fb06 1414 	mls	r4, r6, r4, r1
	if (start % nrf_ficr_codepagesize_get(NRF_FICR) != 0 ||
    4766:	2c00      	cmp	r4, #0
    4768:	d1ec      	bne.n	4744 <fprotect_set_permission+0x30>
    476a:	691c      	ldr	r4, [r3, #16]
NRF_STATIC_INLINE uint32_t nrf_ficr_codesize_get(NRF_FICR_Type const * p_reg)
{
#if defined(FICR_INFO_CODESIZE_CODESIZE_Msk)
    return p_reg->INFO.CODESIZE;
#else
    return p_reg->CODESIZE;
    476c:	695b      	ldr	r3, [r3, #20]
	    length > NRF_ACL_REGION_SIZE_MAX || length == 0) {
    476e:	4363      	muls	r3, r4
	    length % nrf_ficr_codepagesize_get(NRF_FICR) != 0 ||
    4770:	428b      	cmp	r3, r1
    4772:	d3e7      	bcc.n	4744 <fprotect_set_permission+0x30>
	    length > NRF_ACL_REGION_SIZE_MAX || length == 0) {
    4774:	2900      	cmp	r1, #0
    4776:	d0e5      	beq.n	4744 <fprotect_set_permission+0x30>
    p_reg->ACL[region_id].ADDR = address;
    4778:	f105 4380 	add.w	r3, r5, #1073741824	; 0x40000000
    477c:	f503 33f0 	add.w	r3, r3, #122880	; 0x1e000
    p_reg->ACL[region_id].PERM = perm;
    4780:	461c      	mov	r4, r3
    p_reg->ACL[region_id].ADDR = address;
    4782:	f8c3 0800 	str.w	r0, [r3, #2048]	; 0x800
    p_reg->ACL[region_id].SIZE = size;
    4786:	f8c3 1804 	str.w	r1, [r3, #2052]	; 0x804
    p_reg->ACL[region_id].PERM = perm;
    478a:	f8c3 2808 	str.w	r2, [r3, #2056]	; 0x808
    return (uint32_t)p_reg->ACL[region_id].ADDR;
    478e:	f8d3 5800 	ldr.w	r5, [r3, #2048]	; 0x800
	if ((nrf_acl_region_address_get(NRF_ACL, region_idx) != start)
    4792:	42a8      	cmp	r0, r5
    4794:	d10c      	bne.n	47b0 <fprotect_set_permission+0x9c>
    return (size_t)p_reg->ACL[region_id].SIZE;
    4796:	f8d3 3804 	ldr.w	r3, [r3, #2052]	; 0x804
		|| (nrf_acl_region_size_get(NRF_ACL, region_idx) != length)
    479a:	4299      	cmp	r1, r3
    479c:	d108      	bne.n	47b0 <fprotect_set_permission+0x9c>
    return (nrf_acl_perm_t)p_reg->ACL[region_id].PERM;
    479e:	f8d4 3808 	ldr.w	r3, [r4, #2056]	; 0x808
		|| (nrf_acl_region_perm_get(NRF_ACL, region_idx) != permission)) {
    47a2:	b2db      	uxtb	r3, r3
		return -EFAULT;
    47a4:	4293      	cmp	r3, r2
    47a6:	bf0c      	ite	eq
    47a8:	2000      	moveq	r0, #0
    47aa:	f06f 000d 	mvnne.w	r0, #13
    47ae:	e7d4      	b.n	475a <fprotect_set_permission+0x46>
    47b0:	f06f 000d 	mvn.w	r0, #13
    47b4:	e7d1      	b.n	475a <fprotect_set_permission+0x46>
    47b6:	bf00      	nop
    47b8:	20001748 	.word	0x20001748
    47bc:	4001e000 	.word	0x4001e000

000047c0 <k_sys_fatal_error_handler>:

extern void sys_arch_reboot(int type);

void k_sys_fatal_error_handler(unsigned int reason,
			       const z_arch_esf_t *esf)
{
    47c0:	b508      	push	{r3, lr}
	z_impl_log_panic();
    47c2:	f7fd fbfd 	bl	1fc0 <z_impl_log_panic>
    47c6:	4b06      	ldr	r3, [pc, #24]	; (47e0 <k_sys_fatal_error_handler+0x20>)
    47c8:	4906      	ldr	r1, [pc, #24]	; (47e4 <k_sys_fatal_error_handler+0x24>)
	defined(CONFIG_SPM_SERVICE_NS_HANDLER_FROM_SPM_FAULT)
	z_spm_ns_fatal_error_handler();
#endif

	if (IS_ENABLED(CONFIG_RESET_ON_FATAL_ERROR)) {
		LOG_ERR("Resetting system");
    47ca:	4807      	ldr	r0, [pc, #28]	; (47e8 <k_sys_fatal_error_handler+0x28>)
    47cc:	1ac9      	subs	r1, r1, r3
    47ce:	08c9      	lsrs	r1, r1, #3
    47d0:	0189      	lsls	r1, r1, #6
    47d2:	f041 0101 	orr.w	r1, r1, #1
    47d6:	f004 f8d9 	bl	898c <log_0>
		sys_arch_reboot(0);
    47da:	2000      	movs	r0, #0
    47dc:	f7fe fec2 	bl	3564 <sys_arch_reboot>
		for (;;) {
			/* Spin endlessly */
		}
	}

	CODE_UNREACHABLE;
    47e0:	00009d80 	.word	0x00009d80
    47e4:	00009d88 	.word	0x00009d88
    47e8:	0000acc2 	.word	0x0000acc2

000047ec <boot_write_magic>:
}

static inline uint32_t
boot_magic_off(const struct flash_area *fap)
{
    return flash_area_get_size(fap) - BOOT_MAGIC_SZ;
    47ec:	6881      	ldr	r1, [r0, #8]
    off = boot_magic_off(fap);

    BOOT_LOG_DBG("writing magic; fa_id=%d off=0x%lx (0x%lx)",
                 flash_area_get_id(fap), (unsigned long)off,
                 (unsigned long)(flash_area_get_off(fap) + off));
    rc = flash_area_write(fap, off, boot_img_magic, BOOT_MAGIC_SZ);
    47ee:	4a05      	ldr	r2, [pc, #20]	; (4804 <boot_write_magic+0x18>)
{
    47f0:	b508      	push	{r3, lr}
    rc = flash_area_write(fap, off, boot_img_magic, BOOT_MAGIC_SZ);
    47f2:	3910      	subs	r1, #16
    47f4:	2310      	movs	r3, #16
    47f6:	f004 fbd8 	bl	8faa <flash_area_write>
    if (rc != 0) {
        return BOOT_EFLASH;
    }

    return 0;
}
    47fa:	3800      	subs	r0, #0
    47fc:	bf18      	it	ne
    47fe:	2001      	movne	r0, #1
    4800:	bd08      	pop	{r3, pc}
    4802:	bf00      	nop
    4804:	0000a078 	.word	0x0000a078

00004808 <boot_read_swap_state>:
{
    4808:	b530      	push	{r4, r5, lr}
    480a:	460c      	mov	r4, r1
    return flash_area_get_size(fap) - BOOT_MAGIC_SZ;
    480c:	6881      	ldr	r1, [r0, #8]
{
    480e:	b087      	sub	sp, #28
    rc = flash_area_read(fap, off, magic, BOOT_MAGIC_SZ);
    4810:	2310      	movs	r3, #16
    4812:	aa02      	add	r2, sp, #8
    4814:	3910      	subs	r1, #16
{
    4816:	4605      	mov	r5, r0
    rc = flash_area_read(fap, off, magic, BOOT_MAGIC_SZ);
    4818:	f004 fbab 	bl	8f72 <flash_area_read>
    if (rc < 0) {
    481c:	2800      	cmp	r0, #0
    481e:	db11      	blt.n	4844 <boot_read_swap_state+0x3c>
    if (buffer == NULL || len == 0) {
    4820:	2210      	movs	r2, #16
    4822:	a902      	add	r1, sp, #8
    4824:	4628      	mov	r0, r5
    4826:	f004 fe78 	bl	951a <bootutil_buffer_is_erased.part.0>
    if (bootutil_buffer_is_erased(fap, magic, BOOT_MAGIC_SZ)) {
    482a:	b168      	cbz	r0, 4848 <boot_read_swap_state+0x40>
        state->magic = BOOT_MAGIC_UNSET;
    482c:	2303      	movs	r3, #3
        state->magic = boot_magic_decode(magic);
    482e:	7023      	strb	r3, [r4, #0]
    return boot_copy_done_off(fap) - BOOT_MAX_ALIGN;
    4830:	68a9      	ldr	r1, [r5, #8]
    rc = flash_area_read(fap, off, &swap_info, sizeof swap_info);
    4832:	2301      	movs	r3, #1
    4834:	f10d 0207 	add.w	r2, sp, #7
    4838:	3928      	subs	r1, #40	; 0x28
    483a:	4628      	mov	r0, r5
    483c:	f004 fb99 	bl	8f72 <flash_area_read>
    if (rc < 0) {
    4840:	2800      	cmp	r0, #0
    4842:	da0b      	bge.n	485c <boot_read_swap_state+0x54>
        return BOOT_EFLASH;
    4844:	2001      	movs	r0, #1
    4846:	e02a      	b.n	489e <boot_read_swap_state+0x96>
    if (memcmp(magic, boot_img_magic, BOOT_MAGIC_SZ) == 0) {
    4848:	4916      	ldr	r1, [pc, #88]	; (48a4 <boot_read_swap_state+0x9c>)
    484a:	2210      	movs	r2, #16
    484c:	a802      	add	r0, sp, #8
    484e:	f004 fc7c 	bl	914a <memcmp>
    4852:	2800      	cmp	r0, #0
        return BOOT_MAGIC_GOOD;
    4854:	bf14      	ite	ne
    4856:	2302      	movne	r3, #2
    4858:	2301      	moveq	r3, #1
    485a:	e7e8      	b.n	482e <boot_read_swap_state+0x26>
    state->swap_type = BOOT_GET_SWAP_TYPE(swap_info);
    485c:	f89d 3007 	ldrb.w	r3, [sp, #7]
    4860:	f003 020f 	and.w	r2, r3, #15
    state->image_num = BOOT_GET_IMAGE_NUM(swap_info);
    4864:	091b      	lsrs	r3, r3, #4
    state->swap_type = BOOT_GET_SWAP_TYPE(swap_info);
    4866:	7062      	strb	r2, [r4, #1]
    state->image_num = BOOT_GET_IMAGE_NUM(swap_info);
    4868:	7123      	strb	r3, [r4, #4]
    if (buffer == NULL || len == 0) {
    486a:	2201      	movs	r2, #1
    486c:	f10d 0107 	add.w	r1, sp, #7
    4870:	4628      	mov	r0, r5
    4872:	f004 fe52 	bl	951a <bootutil_buffer_is_erased.part.0>
    if (bootutil_buffer_is_erased(fap, &swap_info, sizeof swap_info) ||
    4876:	b910      	cbnz	r0, 487e <boot_read_swap_state+0x76>
    4878:	7863      	ldrb	r3, [r4, #1]
    487a:	2b04      	cmp	r3, #4
    487c:	d903      	bls.n	4886 <boot_read_swap_state+0x7e>
        state->swap_type = BOOT_SWAP_TYPE_NONE;
    487e:	2301      	movs	r3, #1
    4880:	7063      	strb	r3, [r4, #1]
        state->image_num = 0;
    4882:	2300      	movs	r3, #0
    4884:	7123      	strb	r3, [r4, #4]
    return boot_image_ok_off(fap) - BOOT_MAX_ALIGN;
    4886:	68aa      	ldr	r2, [r5, #8]
    return boot_read_flag(fap, copy_done, boot_copy_done_off(fap));
    4888:	1ca1      	adds	r1, r4, #2
    488a:	3a20      	subs	r2, #32
    488c:	4628      	mov	r0, r5
    488e:	f004 fe6c 	bl	956a <boot_read_flag>
    if (rc) {
    4892:	2800      	cmp	r0, #0
    4894:	d1d6      	bne.n	4844 <boot_read_swap_state+0x3c>
    return boot_read_image_ok(fap, &state->image_ok);
    4896:	1ce1      	adds	r1, r4, #3
    4898:	4628      	mov	r0, r5
    489a:	f004 fec1 	bl	9620 <boot_read_image_ok>
}
    489e:	b007      	add	sp, #28
    48a0:	bd30      	pop	{r4, r5, pc}
    48a2:	bf00      	nop
    48a4:	0000a078 	.word	0x0000a078

000048a8 <boot_swap_type_multi>:
    return boot_write_trailer(fap, off, (const uint8_t *) &swap_info, 1);
}

int
boot_swap_type_multi(int image_index)
{
    48a8:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
    48ac:	b085      	sub	sp, #20
    48ae:	4605      	mov	r5, r0

    rc = BOOT_HOOK_CALL(boot_read_swap_state_primary_slot_hook,
                        BOOT_HOOK_REGULAR, image_index, &primary_slot);
    if (rc == BOOT_HOOK_REGULAR)
    {
        rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_PRIMARY(image_index),
    48b0:	4669      	mov	r1, sp
    48b2:	2002      	movs	r0, #2
    48b4:	f004 feb8 	bl	9628 <boot_read_swap_state_by_id>
                                        &primary_slot);
    }
    if (rc) {
    48b8:	4604      	mov	r4, r0
    48ba:	b118      	cbz	r0, 48c4 <boot_swap_type_multi+0x1c>
        return BOOT_SWAP_TYPE_PANIC;
    48bc:	20ff      	movs	r0, #255	; 0xff
        }
    }

    BOOT_LOG_INF("Swap type: none");
    return BOOT_SWAP_TYPE_NONE;
}
    48be:	b005      	add	sp, #20
    48c0:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
    rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_SECONDARY(image_index),
    48c4:	a902      	add	r1, sp, #8
    48c6:	2005      	movs	r0, #5
    48c8:	f004 feae 	bl	9628 <boot_read_swap_state_by_id>
    if (rc == BOOT_EFLASH) {
    48cc:	2801      	cmp	r0, #1
    48ce:	d13d      	bne.n	494c <boot_swap_type_multi+0xa4>
    48d0:	4b32      	ldr	r3, [pc, #200]	; (499c <boot_swap_type_multi+0xf4>)
    48d2:	4a33      	ldr	r2, [pc, #204]	; (49a0 <boot_swap_type_multi+0xf8>)
        BOOT_LOG_INF("Secondary image of image pair (%d.) "
    48d4:	4833      	ldr	r0, [pc, #204]	; (49a4 <boot_swap_type_multi+0xfc>)
    48d6:	1ad2      	subs	r2, r2, r3
    48d8:	08d2      	lsrs	r2, r2, #3
    48da:	0192      	lsls	r2, r2, #6
    48dc:	f042 0203 	orr.w	r2, r2, #3
    48e0:	4629      	mov	r1, r5
    48e2:	f004 f862 	bl	89aa <log_1>
        secondary_slot.magic = BOOT_MAGIC_UNSET;
    48e6:	4b30      	ldr	r3, [pc, #192]	; (49a8 <boot_swap_type_multi+0x100>)
    48e8:	9302      	str	r3, [sp, #8]
        secondary_slot.image_num = 0;
    48ea:	f88d 400c 	strb.w	r4, [sp, #12]
        if (boot_magic_compatible_check(table->magic_primary_slot,
    48ee:	f89d 5000 	ldrb.w	r5, [sp]
            boot_magic_compatible_check(table->magic_secondary_slot,
    48f2:	f89d 6008 	ldrb.w	r6, [sp, #8]
                table->image_ok_primary_slot == primary_slot.image_ok) &&
    48f6:	f89d 7003 	ldrb.w	r7, [sp, #3]
                table->image_ok_secondary_slot == secondary_slot.image_ok) &&
    48fa:	f89d 800b 	ldrb.w	r8, [sp, #11]
                table->copy_done_primary_slot == primary_slot.copy_done)) {
    48fe:	f89d 9002 	ldrb.w	r9, [sp, #2]
    4902:	4c2a      	ldr	r4, [pc, #168]	; (49ac <boot_swap_type_multi+0x104>)
    4904:	2200      	movs	r2, #0
        if (boot_magic_compatible_check(table->magic_primary_slot,
    4906:	7820      	ldrb	r0, [r4, #0]
    4908:	4629      	mov	r1, r5
    490a:	f004 fe1a 	bl	9542 <boot_magic_compatible_check>
    490e:	b310      	cbz	r0, 4956 <boot_swap_type_multi+0xae>
            boot_magic_compatible_check(table->magic_secondary_slot,
    4910:	7860      	ldrb	r0, [r4, #1]
    4912:	4631      	mov	r1, r6
    4914:	f004 fe15 	bl	9542 <boot_magic_compatible_check>
                                        primary_slot.magic) &&
    4918:	b1e8      	cbz	r0, 4956 <boot_swap_type_multi+0xae>
            (table->image_ok_primary_slot == BOOT_FLAG_ANY   ||
    491a:	78a3      	ldrb	r3, [r4, #2]
                                        secondary_slot.magic) &&
    491c:	2b04      	cmp	r3, #4
    491e:	d001      	beq.n	4924 <boot_swap_type_multi+0x7c>
            (table->image_ok_primary_slot == BOOT_FLAG_ANY   ||
    4920:	42bb      	cmp	r3, r7
    4922:	d118      	bne.n	4956 <boot_swap_type_multi+0xae>
            (table->image_ok_secondary_slot == BOOT_FLAG_ANY ||
    4924:	78e3      	ldrb	r3, [r4, #3]
                table->image_ok_primary_slot == primary_slot.image_ok) &&
    4926:	2b04      	cmp	r3, #4
    4928:	d001      	beq.n	492e <boot_swap_type_multi+0x86>
            (table->image_ok_secondary_slot == BOOT_FLAG_ANY ||
    492a:	4543      	cmp	r3, r8
    492c:	d113      	bne.n	4956 <boot_swap_type_multi+0xae>
            (table->copy_done_primary_slot == BOOT_FLAG_ANY  ||
    492e:	7923      	ldrb	r3, [r4, #4]
                table->image_ok_secondary_slot == secondary_slot.image_ok) &&
    4930:	2b04      	cmp	r3, #4
    4932:	d10e      	bne.n	4952 <boot_swap_type_multi+0xaa>
    4934:	4b19      	ldr	r3, [pc, #100]	; (499c <boot_swap_type_multi+0xf4>)
    4936:	4a1a      	ldr	r2, [pc, #104]	; (49a0 <boot_swap_type_multi+0xf8>)
    4938:	1ad2      	subs	r2, r2, r3
            BOOT_LOG_INF("Swap type: %s",
    493a:	7963      	ldrb	r3, [r4, #5]
    493c:	08d2      	lsrs	r2, r2, #3
    493e:	0192      	lsls	r2, r2, #6
    4940:	2b02      	cmp	r3, #2
    4942:	f042 0203 	orr.w	r2, r2, #3
    4946:	d117      	bne.n	4978 <boot_swap_type_multi+0xd0>
    4948:	4919      	ldr	r1, [pc, #100]	; (49b0 <boot_swap_type_multi+0x108>)
    494a:	e01c      	b.n	4986 <boot_swap_type_multi+0xde>
    } else if (rc) {
    494c:	2800      	cmp	r0, #0
    494e:	d0ce      	beq.n	48ee <boot_swap_type_multi+0x46>
    4950:	e7b4      	b.n	48bc <boot_swap_type_multi+0x14>
            (table->copy_done_primary_slot == BOOT_FLAG_ANY  ||
    4952:	454b      	cmp	r3, r9
    4954:	d0ee      	beq.n	4934 <boot_swap_type_multi+0x8c>
    for (i = 0; i < BOOT_SWAP_TABLES_COUNT; i++) {
    4956:	3201      	adds	r2, #1
    4958:	2a03      	cmp	r2, #3
    495a:	f104 0406 	add.w	r4, r4, #6
    495e:	d1d2      	bne.n	4906 <boot_swap_type_multi+0x5e>
    4960:	4b0e      	ldr	r3, [pc, #56]	; (499c <boot_swap_type_multi+0xf4>)
    4962:	490f      	ldr	r1, [pc, #60]	; (49a0 <boot_swap_type_multi+0xf8>)
    BOOT_LOG_INF("Swap type: none");
    4964:	4813      	ldr	r0, [pc, #76]	; (49b4 <boot_swap_type_multi+0x10c>)
    4966:	1ac9      	subs	r1, r1, r3
    4968:	08c9      	lsrs	r1, r1, #3
    496a:	0189      	lsls	r1, r1, #6
    496c:	f041 0103 	orr.w	r1, r1, #3
    4970:	f004 f80c 	bl	898c <log_0>
    return BOOT_SWAP_TYPE_NONE;
    4974:	2001      	movs	r0, #1
    4976:	e7a2      	b.n	48be <boot_swap_type_multi+0x16>
            BOOT_LOG_INF("Swap type: %s",
    4978:	2b03      	cmp	r3, #3
    497a:	d00c      	beq.n	4996 <boot_swap_type_multi+0xee>
    497c:	490e      	ldr	r1, [pc, #56]	; (49b8 <boot_swap_type_multi+0x110>)
    497e:	480f      	ldr	r0, [pc, #60]	; (49bc <boot_swap_type_multi+0x114>)
    4980:	2b04      	cmp	r3, #4
    4982:	bf08      	it	eq
    4984:	4601      	moveq	r1, r0
    4986:	480e      	ldr	r0, [pc, #56]	; (49c0 <boot_swap_type_multi+0x118>)
    4988:	f004 f80f 	bl	89aa <log_1>
            if (table->swap_type != BOOT_SWAP_TYPE_TEST &&
    498c:	7960      	ldrb	r0, [r4, #5]
    498e:	1e83      	subs	r3, r0, #2
    4990:	2b02      	cmp	r3, #2
    4992:	d994      	bls.n	48be <boot_swap_type_multi+0x16>
    4994:	e792      	b.n	48bc <boot_swap_type_multi+0x14>
            BOOT_LOG_INF("Swap type: %s",
    4996:	490b      	ldr	r1, [pc, #44]	; (49c4 <boot_swap_type_multi+0x11c>)
    4998:	e7f5      	b.n	4986 <boot_swap_type_multi+0xde>
    499a:	bf00      	nop
    499c:	00009d80 	.word	0x00009d80
    49a0:	00009d98 	.word	0x00009d98
    49a4:	0000acdf 	.word	0x0000acdf
    49a8:	03030103 	.word	0x03030103
    49ac:	0000ad66 	.word	0x0000ad66
    49b0:	0000ad43 	.word	0x0000ad43
    49b4:	0000ad56 	.word	0x0000ad56
    49b8:	0000ad2c 	.word	0x0000ad2c
    49bc:	0000ad25 	.word	0x0000ad25
    49c0:	0000ad48 	.word	0x0000ad48
    49c4:	0000ad3e 	.word	0x0000ad3e

000049c8 <nrf52_errata_136>:
            uint32_t var1 = *(uint32_t *)0x10000130ul;
    49c8:	4b03      	ldr	r3, [pc, #12]	; (49d8 <nrf52_errata_136+0x10>)
            if (var1 == 0x08)
    49ca:	6818      	ldr	r0, [r3, #0]
}
    49cc:	f1a0 0308 	sub.w	r3, r0, #8
    49d0:	4258      	negs	r0, r3
    49d2:	4158      	adcs	r0, r3
    49d4:	4770      	bx	lr
    49d6:	bf00      	nop
    49d8:	10000130 	.word	0x10000130

000049dc <nrf52_errata_103>:
            uint32_t var1 = *(uint32_t *)0x10000130ul;
    49dc:	4b06      	ldr	r3, [pc, #24]	; (49f8 <nrf52_errata_103+0x1c>)
            if (var1 == 0x08)
    49de:	681b      	ldr	r3, [r3, #0]
    49e0:	2b08      	cmp	r3, #8
    49e2:	d106      	bne.n	49f2 <nrf52_errata_103+0x16>
            uint32_t var2 = *(uint32_t *)0x10000134ul;
    49e4:	4b05      	ldr	r3, [pc, #20]	; (49fc <nrf52_errata_103+0x20>)
    49e6:	681b      	ldr	r3, [r3, #0]
                switch(var2)
    49e8:	2b05      	cmp	r3, #5
    49ea:	d802      	bhi.n	49f2 <nrf52_errata_103+0x16>
    49ec:	4a04      	ldr	r2, [pc, #16]	; (4a00 <nrf52_errata_103+0x24>)
    49ee:	5cd0      	ldrb	r0, [r2, r3]
    49f0:	4770      	bx	lr
        return false;
    49f2:	2000      	movs	r0, #0
}
    49f4:	4770      	bx	lr
    49f6:	bf00      	nop
    49f8:	10000130 	.word	0x10000130
    49fc:	10000134 	.word	0x10000134
    4a00:	0000ad7e 	.word	0x0000ad7e

00004a04 <nvmc_wait>:

/* -- NVMC utility functions -- */
/* Waits until NVMC is done with the current pending action */
void nvmc_wait(void)
{
    while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
    4a04:	4a02      	ldr	r2, [pc, #8]	; (4a10 <nvmc_wait+0xc>)
    4a06:	f8d2 3400 	ldr.w	r3, [r2, #1024]	; 0x400
    4a0a:	2b00      	cmp	r3, #0
    4a0c:	d0fb      	beq.n	4a06 <nvmc_wait+0x2>
}
    4a0e:	4770      	bx	lr
    4a10:	4001e000 	.word	0x4001e000

00004a14 <SystemInit>:
{
    SystemCoreClock = __SYSTEM_CLOCK_64M;
}

void SystemInit(void)
{
    4a14:	b510      	push	{r4, lr}
    #endif

    #if NRF52_ERRATA_36_ENABLE_WORKAROUND
        /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf52_errata_36()){
    4a16:	f7ff ffd7 	bl	49c8 <nrf52_errata_136>
    4a1a:	b140      	cbz	r0, 4a2e <SystemInit+0x1a>
            NRF_CLOCK->EVENTS_DONE = 0;
    4a1c:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4a20:	2200      	movs	r2, #0
    4a22:	f8c3 210c 	str.w	r2, [r3, #268]	; 0x10c
            NRF_CLOCK->EVENTS_CTTO = 0;
    4a26:	f8c3 2110 	str.w	r2, [r3, #272]	; 0x110
            NRF_CLOCK->CTIV = 0;
    4a2a:	f8c3 2538 	str.w	r2, [r3, #1336]	; 0x538
    #endif

    #if NRF52_ERRATA_66_ENABLE_WORKAROUND
        /* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf52_errata_66()){
    4a2e:	f7ff ffcb 	bl	49c8 <nrf52_errata_136>
    4a32:	2800      	cmp	r0, #0
    4a34:	d046      	beq.n	4ac4 <SystemInit+0xb0>
            NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
    4a36:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
    4a3a:	4b61      	ldr	r3, [pc, #388]	; (4bc0 <SystemInit+0x1ac>)
    4a3c:	f8d2 1404 	ldr.w	r1, [r2, #1028]	; 0x404
    4a40:	f8c3 1520 	str.w	r1, [r3, #1312]	; 0x520
            NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
    4a44:	f8d2 1408 	ldr.w	r1, [r2, #1032]	; 0x408
    4a48:	f8c3 1524 	str.w	r1, [r3, #1316]	; 0x524
            NRF_TEMP->A2 = NRF_FICR->TEMP.A2;
    4a4c:	f8d2 140c 	ldr.w	r1, [r2, #1036]	; 0x40c
    4a50:	f8c3 1528 	str.w	r1, [r3, #1320]	; 0x528
            NRF_TEMP->A3 = NRF_FICR->TEMP.A3;
    4a54:	f8d2 1410 	ldr.w	r1, [r2, #1040]	; 0x410
    4a58:	f8c3 152c 	str.w	r1, [r3, #1324]	; 0x52c
            NRF_TEMP->A4 = NRF_FICR->TEMP.A4;
    4a5c:	f8d2 1414 	ldr.w	r1, [r2, #1044]	; 0x414
    4a60:	f8c3 1530 	str.w	r1, [r3, #1328]	; 0x530
            NRF_TEMP->A5 = NRF_FICR->TEMP.A5;
    4a64:	f8d2 1418 	ldr.w	r1, [r2, #1048]	; 0x418
    4a68:	f8c3 1534 	str.w	r1, [r3, #1332]	; 0x534
            NRF_TEMP->B0 = NRF_FICR->TEMP.B0;
    4a6c:	f8d2 141c 	ldr.w	r1, [r2, #1052]	; 0x41c
    4a70:	f8c3 1540 	str.w	r1, [r3, #1344]	; 0x540
            NRF_TEMP->B1 = NRF_FICR->TEMP.B1;
    4a74:	f8d2 1420 	ldr.w	r1, [r2, #1056]	; 0x420
    4a78:	f8c3 1544 	str.w	r1, [r3, #1348]	; 0x544
            NRF_TEMP->B2 = NRF_FICR->TEMP.B2;
    4a7c:	f8d2 1424 	ldr.w	r1, [r2, #1060]	; 0x424
    4a80:	f8c3 1548 	str.w	r1, [r3, #1352]	; 0x548
            NRF_TEMP->B3 = NRF_FICR->TEMP.B3;
    4a84:	f8d2 1428 	ldr.w	r1, [r2, #1064]	; 0x428
    4a88:	f8c3 154c 	str.w	r1, [r3, #1356]	; 0x54c
            NRF_TEMP->B4 = NRF_FICR->TEMP.B4;
    4a8c:	f8d2 142c 	ldr.w	r1, [r2, #1068]	; 0x42c
    4a90:	f8c3 1550 	str.w	r1, [r3, #1360]	; 0x550
            NRF_TEMP->B5 = NRF_FICR->TEMP.B5;
    4a94:	f8d2 1430 	ldr.w	r1, [r2, #1072]	; 0x430
    4a98:	f8c3 1554 	str.w	r1, [r3, #1364]	; 0x554
            NRF_TEMP->T0 = NRF_FICR->TEMP.T0;
    4a9c:	f8d2 1434 	ldr.w	r1, [r2, #1076]	; 0x434
    4aa0:	f8c3 1560 	str.w	r1, [r3, #1376]	; 0x560
            NRF_TEMP->T1 = NRF_FICR->TEMP.T1;
    4aa4:	f8d2 1438 	ldr.w	r1, [r2, #1080]	; 0x438
    4aa8:	f8c3 1564 	str.w	r1, [r3, #1380]	; 0x564
            NRF_TEMP->T2 = NRF_FICR->TEMP.T2;
    4aac:	f8d2 143c 	ldr.w	r1, [r2, #1084]	; 0x43c
    4ab0:	f8c3 1568 	str.w	r1, [r3, #1384]	; 0x568
            NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
    4ab4:	f8d2 1440 	ldr.w	r1, [r2, #1088]	; 0x440
    4ab8:	f8c3 156c 	str.w	r1, [r3, #1388]	; 0x56c
            NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
    4abc:	f8d2 2444 	ldr.w	r2, [r2, #1092]	; 0x444
    4ac0:	f8c3 2570 	str.w	r2, [r3, #1392]	; 0x570
    #endif

    #if NRF52_ERRATA_98_ENABLE_WORKAROUND
        /* Workaround for Errata 98 "NFCT: Not able to communicate with the peer" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf52_errata_98()){
    4ac4:	f7ff ff8a 	bl	49dc <nrf52_errata_103>
    4ac8:	b110      	cbz	r0, 4ad0 <SystemInit+0xbc>
            *(volatile uint32_t *)0x4000568Cul = 0x00038148ul;
    4aca:	4b3e      	ldr	r3, [pc, #248]	; (4bc4 <SystemInit+0x1b0>)
    4acc:	4a3e      	ldr	r2, [pc, #248]	; (4bc8 <SystemInit+0x1b4>)
    4ace:	601a      	str	r2, [r3, #0]
    #endif

    #if NRF52_ERRATA_103_ENABLE_WORKAROUND && defined(CCM_MAXPACKETSIZE_MAXPACKETSIZE_Pos)
        /* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf52_errata_103()){
    4ad0:	f7ff ff84 	bl	49dc <nrf52_errata_103>
    4ad4:	b118      	cbz	r0, 4ade <SystemInit+0xca>
            NRF_CCM->MAXPACKETSIZE = 0xFBul;
    4ad6:	4b3d      	ldr	r3, [pc, #244]	; (4bcc <SystemInit+0x1b8>)
    4ad8:	22fb      	movs	r2, #251	; 0xfb
    4ada:	f8c3 2518 	str.w	r2, [r3, #1304]	; 0x518
    #endif

    #if NRF52_ERRATA_115_ENABLE_WORKAROUND
        /* Workaround for Errata 115 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf52_errata_115()){
    4ade:	f7ff ff7d 	bl	49dc <nrf52_errata_103>
    4ae2:	b148      	cbz	r0, 4af8 <SystemInit+0xe4>
            *(volatile uint32_t *)0x40000EE4 = (*(volatile uint32_t *)0x40000EE4 & 0xFFFFFFF0) | (*(uint32_t *)0x10000258 & 0x0000000F);
    4ae4:	493a      	ldr	r1, [pc, #232]	; (4bd0 <SystemInit+0x1bc>)
    4ae6:	4b3b      	ldr	r3, [pc, #236]	; (4bd4 <SystemInit+0x1c0>)
    4ae8:	680a      	ldr	r2, [r1, #0]
    4aea:	681b      	ldr	r3, [r3, #0]
    4aec:	f022 020f 	bic.w	r2, r2, #15
    4af0:	f003 030f 	and.w	r3, r3, #15
    4af4:	4313      	orrs	r3, r2
    4af6:	600b      	str	r3, [r1, #0]
    #endif

    #if NRF52_ERRATA_120_ENABLE_WORKAROUND
        /* Workaround for Errata 120 "QSPI: Data read or written is corrupted" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf52_errata_120()){
    4af8:	f7ff ff70 	bl	49dc <nrf52_errata_103>
    4afc:	b118      	cbz	r0, 4b06 <SystemInit+0xf2>
            *(volatile uint32_t *)0x40029640ul = 0x200ul;
    4afe:	4b36      	ldr	r3, [pc, #216]	; (4bd8 <SystemInit+0x1c4>)
    4b00:	f44f 7200 	mov.w	r2, #512	; 0x200
    4b04:	601a      	str	r2, [r3, #0]
    #endif

    #if NRF52_ERRATA_136_ENABLE_WORKAROUND
        /* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf52_errata_136()){
    4b06:	f7ff ff5f 	bl	49c8 <nrf52_errata_136>
    4b0a:	b148      	cbz	r0, 4b20 <SystemInit+0x10c>
            if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
    4b0c:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4b10:	f8d3 2400 	ldr.w	r2, [r3, #1024]	; 0x400
    4b14:	07d2      	lsls	r2, r2, #31
                NRF_POWER->RESETREAS =  ~POWER_RESETREAS_RESETPIN_Msk;
    4b16:	bf44      	itt	mi
    4b18:	f06f 0201 	mvnmi.w	r2, #1
    4b1c:	f8c3 2400 	strmi.w	r2, [r3, #1024]	; 0x400

    /* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
     * compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
     * operations are not used in your code. */
    #if (__FPU_USED == 1)
        SCB->CPACR |= (3UL << 20) | (3UL << 22);
    4b20:	4a2e      	ldr	r2, [pc, #184]	; (4bdc <SystemInit+0x1c8>)
    4b22:	f8d2 3088 	ldr.w	r3, [r2, #136]	; 0x88
    4b26:	f443 0370 	orr.w	r3, r3, #15728640	; 0xf00000
    4b2a:	f8c2 3088 	str.w	r3, [r2, #136]	; 0x88
  __ASM volatile ("dsb 0xF":::"memory");
    4b2e:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("isb 0xF":::"memory");
    4b32:	f3bf 8f6f 	isb	sy
         || defined (NRF52820_XXAA) || defined (DEVELOP_IN_NRF52820)\
         || defined (NRF52832_XXAA) || defined (DEVELOP_IN_NRF52832)\
         || defined (NRF52832_XXAB) || defined (DEVELOP_IN_NRF52832)\
         || defined (NRF52833_XXAA) || defined (DEVELOP_IN_NRF52833)\
         || defined (NRF52840_XXAA) || defined (DEVELOP_IN_NRF52840)
            uint32_t var1 = *(uint32_t *)0x10000130ul;
    4b36:	4b2a      	ldr	r3, [pc, #168]	; (4be0 <SystemInit+0x1cc>)
                        return true;
                }
            }
        #endif
        #if defined (NRF52840_XXAA) || defined (DEVELOP_IN_NRF52840)
            if (var1 == 0x08)
    4b38:	681b      	ldr	r3, [r3, #0]
    4b3a:	2b08      	cmp	r3, #8
    4b3c:	d10e      	bne.n	4b5c <SystemInit+0x148>
            uint32_t var2 = *(uint32_t *)0x10000134ul;
    4b3e:	4b29      	ldr	r3, [pc, #164]	; (4be4 <SystemInit+0x1d0>)
    4b40:	681b      	ldr	r3, [r3, #0]
            {
                switch(var2)
    4b42:	2b05      	cmp	r3, #5
    4b44:	d802      	bhi.n	4b4c <SystemInit+0x138>
            {
                /* Prevent processor from unlocking APPROTECT soft branch after this point. */
                NRF_APPROTECT->FORCEPROTECT = APPROTECT_FORCEPROTECT_FORCEPROTECT_Force;
            }
        #else
            if (nrf52_configuration_249())
    4b46:	4a28      	ldr	r2, [pc, #160]	; (4be8 <SystemInit+0x1d4>)
    4b48:	5cd3      	ldrb	r3, [r2, r3]
    4b4a:	b13b      	cbz	r3, 4b5c <SystemInit+0x148>
            {
                /* Load APPROTECT soft branch from UICR.
                   If UICR->APPROTECT is disabled, POWER->APPROTECT will be disabled. */
                NRF_APPROTECT->DISABLE = NRF_UICR->APPROTECT;
    4b4c:	f04f 2310 	mov.w	r3, #268439552	; 0x10001000
    4b50:	f8d3 2208 	ldr.w	r2, [r3, #520]	; 0x208
    4b54:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4b58:	f8c3 2558 	str.w	r2, [r3, #1368]	; 0x558

    /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
      defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
      reserved for PinReset and not available as normal GPIO. */
    #if defined (CONFIG_GPIO_AS_PINRESET)
        if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
    4b5c:	f04f 2310 	mov.w	r3, #268439552	; 0x10001000
    4b60:	f8d3 2200 	ldr.w	r2, [r3, #512]	; 0x200
    4b64:	2a00      	cmp	r2, #0
    4b66:	db03      	blt.n	4b70 <SystemInit+0x15c>
            ((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
    4b68:	f8d3 3204 	ldr.w	r3, [r3, #516]	; 0x204
        if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
    4b6c:	2b00      	cmp	r3, #0
    4b6e:	da22      	bge.n	4bb6 <SystemInit+0x1a2>
    NRF_NVMC->CONFIG = mode << NVMC_CONFIG_WEN_Pos;
    4b70:	491e      	ldr	r1, [pc, #120]	; (4bec <SystemInit+0x1d8>)
    4b72:	2301      	movs	r3, #1
    4b74:	f8c1 3504 	str.w	r3, [r1, #1284]	; 0x504
    nvmc_wait();
    4b78:	f7ff ff44 	bl	4a04 <nvmc_wait>
            nvmc_config(NVMC_CONFIG_WEN_Wen);
            NRF_UICR->PSELRESET[0] = RESET_PIN;
    4b7c:	f04f 2010 	mov.w	r0, #268439552	; 0x10001000
    4b80:	2412      	movs	r4, #18
    4b82:	f8c0 4200 	str.w	r4, [r0, #512]	; 0x200
            nvmc_wait();
    4b86:	f7ff ff3d 	bl	4a04 <nvmc_wait>
            NRF_UICR->PSELRESET[1] = RESET_PIN;
    4b8a:	f8c0 4204 	str.w	r4, [r0, #516]	; 0x204
            nvmc_wait();
    4b8e:	f7ff ff39 	bl	4a04 <nvmc_wait>
    NRF_NVMC->CONFIG = mode << NVMC_CONFIG_WEN_Pos;
    4b92:	2300      	movs	r3, #0
    4b94:	f8c1 3504 	str.w	r3, [r1, #1284]	; 0x504
    nvmc_wait();
    4b98:	f7ff ff34 	bl	4a04 <nvmc_wait>
  __ASM volatile ("dsb 0xF":::"memory");
    4b9c:	f3bf 8f4f 	dsb	sy
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
    4ba0:	490e      	ldr	r1, [pc, #56]	; (4bdc <SystemInit+0x1c8>)
    4ba2:	4b13      	ldr	r3, [pc, #76]	; (4bf0 <SystemInit+0x1dc>)
    4ba4:	68ca      	ldr	r2, [r1, #12]
    4ba6:	f402 62e0 	and.w	r2, r2, #1792	; 0x700
    4baa:	4313      	orrs	r3, r2
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
    4bac:	60cb      	str	r3, [r1, #12]
    4bae:	f3bf 8f4f 	dsb	sy
    __NOP();
    4bb2:	bf00      	nop
  for(;;)                                                           /* wait until reset */
    4bb4:	e7fd      	b.n	4bb2 <SystemInit+0x19e>
    SystemCoreClock = __SYSTEM_CLOCK_64M;
    4bb6:	4b0f      	ldr	r3, [pc, #60]	; (4bf4 <SystemInit+0x1e0>)
    4bb8:	4a0f      	ldr	r2, [pc, #60]	; (4bf8 <SystemInit+0x1e4>)
    4bba:	601a      	str	r2, [r3, #0]
            NVIC_SystemReset();
        }
    #endif

    SystemCoreClockUpdate();
}
    4bbc:	bd10      	pop	{r4, pc}
    4bbe:	bf00      	nop
    4bc0:	4000c000 	.word	0x4000c000
    4bc4:	4000568c 	.word	0x4000568c
    4bc8:	00038148 	.word	0x00038148
    4bcc:	4000f000 	.word	0x4000f000
    4bd0:	40000ee4 	.word	0x40000ee4
    4bd4:	10000258 	.word	0x10000258
    4bd8:	40029640 	.word	0x40029640
    4bdc:	e000ed00 	.word	0xe000ed00
    4be0:	10000130 	.word	0x10000130
    4be4:	10000134 	.word	0x10000134
    4be8:	0000ad78 	.word	0x0000ad78
    4bec:	4001e000 	.word	0x4001e000
    4bf0:	05fa0004 	.word	0x05fa0004
    4bf4:	20000060 	.word	0x20000060
    4bf8:	03d09000 	.word	0x03d09000

00004bfc <nrfx_flag32_alloc>:
{
    return (mask & NRFX_BIT(bitpos)) ? false : true;
}

nrfx_err_t nrfx_flag32_alloc(nrfx_atomic_t * p_mask, uint8_t *p_flag)
{
    4bfc:	b570      	push	{r4, r5, r6, lr}
        idx = 31 - NRF_CLZ(prev_mask);
        if (idx < 0) {
            return NRFX_ERROR_NO_MEM;
        }

        new_mask = prev_mask & ~NRFX_BIT(idx);
    4bfe:	2501      	movs	r5, #1
        prev_mask = *p_mask;
    4c00:	6803      	ldr	r3, [r0, #0]
        idx = 31 - NRF_CLZ(prev_mask);
    4c02:	fab3 f283 	clz	r2, r3
        if (idx < 0) {
    4c06:	2a20      	cmp	r2, #32
        idx = 31 - NRF_CLZ(prev_mask);
    4c08:	f1c2 041f 	rsb	r4, r2, #31
        if (idx < 0) {
    4c0c:	d014      	beq.n	4c38 <nrfx_flag32_alloc+0x3c>
	return __atomic_compare_exchange_n(target, &old_value, new_value,
    4c0e:	f3bf 8f5b 	dmb	ish
        new_mask = prev_mask & ~NRFX_BIT(idx);
    4c12:	fa05 f204 	lsl.w	r2, r5, r4
    4c16:	ea23 0202 	bic.w	r2, r3, r2
    4c1a:	e850 6f00 	ldrex	r6, [r0]
    4c1e:	429e      	cmp	r6, r3
    4c20:	d104      	bne.n	4c2c <nrfx_flag32_alloc+0x30>
    4c22:	e840 2c00 	strex	ip, r2, [r0]
    4c26:	f1bc 0f00 	cmp.w	ip, #0
    4c2a:	d1f6      	bne.n	4c1a <nrfx_flag32_alloc+0x1e>
    4c2c:	f3bf 8f5b 	dmb	ish
    } while (!NRFX_ATOMIC_CAS(p_mask, prev_mask, new_mask));
    4c30:	d1e6      	bne.n	4c00 <nrfx_flag32_alloc+0x4>

    *p_flag = idx;

    return NRFX_SUCCESS;
    4c32:	4802      	ldr	r0, [pc, #8]	; (4c3c <nrfx_flag32_alloc+0x40>)
    *p_flag = idx;
    4c34:	700c      	strb	r4, [r1, #0]
}
    4c36:	bd70      	pop	{r4, r5, r6, pc}
            return NRFX_ERROR_NO_MEM;
    4c38:	4801      	ldr	r0, [pc, #4]	; (4c40 <nrfx_flag32_alloc+0x44>)
    4c3a:	e7fc      	b.n	4c36 <nrfx_flag32_alloc+0x3a>
    4c3c:	0bad0000 	.word	0x0bad0000
    4c40:	0bad0002 	.word	0x0bad0002

00004c44 <nrfx_flag32_free>:

nrfx_err_t nrfx_flag32_free(nrfx_atomic_t * p_mask, uint8_t flag)
{
    uint32_t new_mask, prev_mask;

    if ((NRFX_BIT(flag) & *p_mask))
    4c44:	6803      	ldr	r3, [r0, #0]
    4c46:	40cb      	lsrs	r3, r1
    4c48:	07db      	lsls	r3, r3, #31
{
    4c4a:	b510      	push	{r4, lr}
    if ((NRFX_BIT(flag) & *p_mask))
    4c4c:	d415      	bmi.n	4c7a <nrfx_flag32_free+0x36>
        return NRFX_ERROR_INVALID_PARAM;
    }

    do {
        prev_mask = *p_mask;
        new_mask = prev_mask | NRFX_BIT(flag);
    4c4e:	2301      	movs	r3, #1
    4c50:	fa03 f101 	lsl.w	r1, r3, r1
        prev_mask = *p_mask;
    4c54:	6803      	ldr	r3, [r0, #0]
    4c56:	f3bf 8f5b 	dmb	ish
        new_mask = prev_mask | NRFX_BIT(flag);
    4c5a:	ea41 0203 	orr.w	r2, r1, r3
    4c5e:	e850 4f00 	ldrex	r4, [r0]
    4c62:	429c      	cmp	r4, r3
    4c64:	d104      	bne.n	4c70 <nrfx_flag32_free+0x2c>
    4c66:	e840 2c00 	strex	ip, r2, [r0]
    4c6a:	f1bc 0f00 	cmp.w	ip, #0
    4c6e:	d1f6      	bne.n	4c5e <nrfx_flag32_free+0x1a>
    4c70:	f3bf 8f5b 	dmb	ish
    } while (!NRFX_ATOMIC_CAS(p_mask, prev_mask, new_mask));
    4c74:	d1ee      	bne.n	4c54 <nrfx_flag32_free+0x10>

    return NRFX_SUCCESS;
    4c76:	4802      	ldr	r0, [pc, #8]	; (4c80 <nrfx_flag32_free+0x3c>)
}
    4c78:	bd10      	pop	{r4, pc}
        return NRFX_ERROR_INVALID_PARAM;
    4c7a:	4802      	ldr	r0, [pc, #8]	; (4c84 <nrfx_flag32_free+0x40>)
    4c7c:	e7fc      	b.n	4c78 <nrfx_flag32_free+0x34>
    4c7e:	bf00      	nop
    4c80:	0bad0000 	.word	0x0bad0000
    4c84:	0bad0004 	.word	0x0bad0004

00004c88 <nrfx_clock_init>:
nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler)
{
    NRFX_ASSERT(event_handler);

    nrfx_err_t err_code = NRFX_SUCCESS;
    if (m_clock_cb.module_initialized)
    4c88:	4b04      	ldr	r3, [pc, #16]	; (4c9c <nrfx_clock_init+0x14>)
    4c8a:	791a      	ldrb	r2, [r3, #4]
    4c8c:	b922      	cbnz	r2, 4c98 <nrfx_clock_init+0x10>
    {
#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
        m_clock_cb.cal_state = CAL_STATE_IDLE;
#endif
        m_clock_cb.event_handler = event_handler;
        m_clock_cb.module_initialized = true;
    4c8e:	2201      	movs	r2, #1
        m_clock_cb.event_handler = event_handler;
    4c90:	6018      	str	r0, [r3, #0]
        m_clock_cb.module_initialized = true;
    4c92:	809a      	strh	r2, [r3, #4]
    nrfx_err_t err_code = NRFX_SUCCESS;
    4c94:	4802      	ldr	r0, [pc, #8]	; (4ca0 <nrfx_clock_init+0x18>)
    4c96:	4770      	bx	lr
        err_code = NRFX_ERROR_ALREADY_INITIALIZED;
    4c98:	4802      	ldr	r0, [pc, #8]	; (4ca4 <nrfx_clock_init+0x1c>)
#endif
    }

    NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
    return err_code;
}
    4c9a:	4770      	bx	lr
    4c9c:	2000174c 	.word	0x2000174c
    4ca0:	0bad0000 	.word	0x0bad0000
    4ca4:	0bad000c 	.word	0x0bad000c

00004ca8 <nrfx_clock_start>:
}

void nrfx_clock_start(nrf_clock_domain_t domain)
{
    NRFX_ASSERT(m_clock_cb.module_initialized);
    switch (domain)
    4ca8:	b110      	cbz	r0, 4cb0 <nrfx_clock_start+0x8>
    4caa:	2801      	cmp	r0, #1
    4cac:	d020      	beq.n	4cf0 <nrfx_clock_start+0x48>
    4cae:	4770      	bx	lr
                    (nrf_clock_lfclk_t)((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_SRC_Msk)
    4cb0:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4cb4:	f8d3 2418 	ldr.w	r2, [r3, #1048]	; 0x418
            if ((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_STATE_Msk)
    4cb8:	f8d3 1418 	ldr.w	r1, [r3, #1048]	; 0x418
    4cbc:	f411 3f80 	tst.w	r1, #65536	; 0x10000
    4cc0:	4619      	mov	r1, r3
    4cc2:	d011      	beq.n	4ce8 <nrfx_clock_start+0x40>
                                        >> CLOCK_LFCLKSTAT_SRC_Pos);
    4cc4:	f002 0203 	and.w	r2, r2, #3
    {
        case NRF_CLOCK_DOMAIN_LFCLK:
#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED)
            {
                nrf_clock_lfclk_t lfclksrc;
                if (nrf_clock_is_running(NRF_CLOCK, NRF_CLOCK_DOMAIN_LFCLK, &lfclksrc) &&
    4cc8:	2a01      	cmp	r2, #1
    4cca:	d10d      	bne.n	4ce8 <nrfx_clock_start+0x40>
    p_reg->LFCLKSRC = (uint32_t)(source);
    4ccc:	f8c3 2518 	str.w	r2, [r3, #1304]	; 0x518
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4cd0:	4b0c      	ldr	r3, [pc, #48]	; (4d04 <nrfx_clock_start+0x5c>)
    4cd2:	2200      	movs	r2, #0
    4cd4:	601a      	str	r2, [r3, #0]
    4cd6:	681b      	ldr	r3, [r3, #0]
    p_reg->INTENSET = mask;
    4cd8:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4cdc:	2202      	movs	r2, #2
    4cde:	f8c3 2304 	str.w	r2, [r3, #772]	; 0x304
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    4ce2:	2201      	movs	r2, #1
    4ce4:	609a      	str	r2, [r3, #8]
}
    4ce6:	4770      	bx	lr
    p_reg->LFCLKSRC = (uint32_t)(source);
    4ce8:	2300      	movs	r3, #0
    4cea:	f8c1 3518 	str.w	r3, [r1, #1304]	; 0x518
}
    4cee:	e7ef      	b.n	4cd0 <nrfx_clock_start+0x28>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4cf0:	4b05      	ldr	r3, [pc, #20]	; (4d08 <nrfx_clock_start+0x60>)
    4cf2:	2200      	movs	r2, #0
    4cf4:	601a      	str	r2, [r3, #0]
    4cf6:	681b      	ldr	r3, [r3, #0]
    p_reg->INTENSET = mask;
    4cf8:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4cfc:	f8c3 0304 	str.w	r0, [r3, #772]	; 0x304
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    4d00:	6018      	str	r0, [r3, #0]
#endif
        default:
            NRFX_ASSERT(0);
            break;
    }
}
    4d02:	4770      	bx	lr
    4d04:	40000104 	.word	0x40000104
    4d08:	40000100 	.word	0x40000100

00004d0c <nrfx_clock_stop>:

void nrfx_clock_stop(nrf_clock_domain_t domain)
{
    4d0c:	b538      	push	{r3, r4, r5, lr}
    NRFX_ASSERT(m_clock_cb.module_initialized);
    switch (domain)
    4d0e:	b110      	cbz	r0, 4d16 <nrfx_clock_stop+0xa>
    4d10:	2801      	cmp	r0, #1
    4d12:	d018      	beq.n	4d46 <nrfx_clock_stop+0x3a>
    if (domain == NRF_CLOCK_DOMAIN_HFCLK)
    {
            m_clock_cb.hfclk_started = false;
    }
#endif
}
    4d14:	bd38      	pop	{r3, r4, r5, pc}
    p_reg->INTENCLR = mask;
    4d16:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4d1a:	2202      	movs	r2, #2
    4d1c:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4d20:	4a18      	ldr	r2, [pc, #96]	; (4d84 <nrfx_clock_stop+0x78>)
    4d22:	6010      	str	r0, [r2, #0]
    4d24:	6812      	ldr	r2, [r2, #0]
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    4d26:	4a18      	ldr	r2, [pc, #96]	; (4d88 <nrfx_clock_stop+0x7c>)
    4d28:	2101      	movs	r1, #1
    4d2a:	6011      	str	r1, [r2, #0]
    4d2c:	f242 7510 	movw	r5, #10000	; 0x2710
            if ((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_STATE_Msk)
    4d30:	461c      	mov	r4, r3
    4d32:	f8d4 3418 	ldr.w	r3, [r4, #1048]	; 0x418
    4d36:	03db      	lsls	r3, r3, #15
    4d38:	d5ec      	bpl.n	4d14 <nrfx_clock_stop+0x8>
        NRFX_WAIT_FOR(!nrfx_clock_is_running(domain, NULL), 10000, 1, stopped);
    4d3a:	2001      	movs	r0, #1
    4d3c:	f004 fc98 	bl	9670 <nrfx_busy_wait>
    4d40:	3d01      	subs	r5, #1
    4d42:	d1f6      	bne.n	4d32 <nrfx_clock_stop+0x26>
    4d44:	e7e6      	b.n	4d14 <nrfx_clock_stop+0x8>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4d46:	4b11      	ldr	r3, [pc, #68]	; (4d8c <nrfx_clock_stop+0x80>)
    p_reg->INTENCLR = mask;
    4d48:	f04f 4480 	mov.w	r4, #1073741824	; 0x40000000
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4d4c:	2200      	movs	r2, #0
    p_reg->INTENCLR = mask;
    4d4e:	f8c4 0308 	str.w	r0, [r4, #776]	; 0x308
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4d52:	601a      	str	r2, [r3, #0]
    4d54:	681b      	ldr	r3, [r3, #0]
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    4d56:	4b0e      	ldr	r3, [pc, #56]	; (4d90 <nrfx_clock_stop+0x84>)
    4d58:	f242 7510 	movw	r5, #10000	; 0x2710
    4d5c:	6018      	str	r0, [r3, #0]
                    (nrf_clock_hfclk_t)((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_SRC_Msk)
    4d5e:	f8d4 340c 	ldr.w	r3, [r4, #1036]	; 0x40c
            if ((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_STATE_Msk)
    4d62:	f8d4 240c 	ldr.w	r2, [r4, #1036]	; 0x40c
    4d66:	03d2      	lsls	r2, r2, #15
                    (nrf_clock_hfclk_t)((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_SRC_Msk)
    4d68:	f003 0301 	and.w	r3, r3, #1
            if ((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_STATE_Msk)
    4d6c:	d505      	bpl.n	4d7a <nrfx_clock_stop+0x6e>
        NRFX_WAIT_FOR((!nrfx_clock_is_running(domain, &clk_src) ||
    4d6e:	b123      	cbz	r3, 4d7a <nrfx_clock_stop+0x6e>
    4d70:	2001      	movs	r0, #1
    4d72:	f004 fc7d 	bl	9670 <nrfx_busy_wait>
    4d76:	3d01      	subs	r5, #1
    4d78:	d1f1      	bne.n	4d5e <nrfx_clock_stop+0x52>
            m_clock_cb.hfclk_started = false;
    4d7a:	4b06      	ldr	r3, [pc, #24]	; (4d94 <nrfx_clock_stop+0x88>)
    4d7c:	2200      	movs	r2, #0
    4d7e:	715a      	strb	r2, [r3, #5]
    4d80:	e7c8      	b.n	4d14 <nrfx_clock_stop+0x8>
    4d82:	bf00      	nop
    4d84:	40000104 	.word	0x40000104
    4d88:	4000000c 	.word	0x4000000c
    4d8c:	40000100 	.word	0x40000100
    4d90:	40000004 	.word	0x40000004
    4d94:	2000174c 	.word	0x2000174c

00004d98 <nrfx_power_clock_irq_handler>:
    return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + event));
    4d98:	4b16      	ldr	r3, [pc, #88]	; (4df4 <nrfx_power_clock_irq_handler+0x5c>)
    4d9a:	681a      	ldr	r2, [r3, #0]
    }
}
#endif

void nrfx_clock_irq_handler(void)
{
    4d9c:	b510      	push	{r4, lr}
    if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED))
    4d9e:	b16a      	cbz	r2, 4dbc <nrfx_power_clock_irq_handler+0x24>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4da0:	2200      	movs	r2, #0
    4da2:	601a      	str	r2, [r3, #0]
    4da4:	681b      	ldr	r3, [r3, #0]
    p_reg->INTENCLR = mask;
    4da6:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4daa:	2201      	movs	r2, #1
    4dac:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
        nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED);
        NRFX_LOG_DEBUG("Event: NRF_CLOCK_EVENT_HFCLKSTARTED");
        nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HF_STARTED_MASK);

#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
        if (!m_clock_cb.hfclk_started)
    4db0:	4b11      	ldr	r3, [pc, #68]	; (4df8 <nrfx_power_clock_irq_handler+0x60>)
    4db2:	7958      	ldrb	r0, [r3, #5]
    4db4:	b910      	cbnz	r0, 4dbc <nrfx_power_clock_irq_handler+0x24>
        {
            m_clock_cb.hfclk_started = true;
    4db6:	715a      	strb	r2, [r3, #5]
            m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK_STARTED);
    4db8:	681b      	ldr	r3, [r3, #0]
    4dba:	4798      	blx	r3
    return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + event));
    4dbc:	4b0f      	ldr	r3, [pc, #60]	; (4dfc <nrfx_power_clock_irq_handler+0x64>)
    4dbe:	681a      	ldr	r2, [r3, #0]
        }
#else
        m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK_STARTED);
#endif
    }
    if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_LFCLKSTARTED))
    4dc0:	b172      	cbz	r2, 4de0 <nrfx_power_clock_irq_handler+0x48>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4dc2:	2200      	movs	r2, #0
    4dc4:	601a      	str	r2, [r3, #0]
    4dc6:	681b      	ldr	r3, [r3, #0]
                    (nrf_clock_lfclk_t)((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_SRC_Msk)
    4dc8:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4dcc:	f8d3 2418 	ldr.w	r2, [r3, #1048]	; 0x418
            if ((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_STATE_Msk)
    4dd0:	f8d3 1418 	ldr.w	r1, [r3, #1048]	; 0x418
        NRFX_LOG_DEBUG("Event: NRF_CLOCK_EVENT_LFCLKSTARTED");

#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED)
        nrf_clock_lfclk_t lfclksrc;
        (void)nrf_clock_is_running(NRF_CLOCK, NRF_CLOCK_DOMAIN_LFCLK, &lfclksrc);
        if (lfclksrc == NRF_CLOCK_LFCLK_RC)
    4dd4:	0792      	lsls	r2, r2, #30
    4dd6:	d104      	bne.n	4de2 <nrfx_power_clock_irq_handler+0x4a>
    p_reg->LFCLKSRC = (uint32_t)(source);
    4dd8:	2201      	movs	r2, #1
    4dda:	f8c3 2518 	str.w	r2, [r3, #1304]	; 0x518
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    4dde:	609a      	str	r2, [r3, #8]
        nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HF192M_STARTED_MASK);

        m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK192M_STARTED);
    }
#endif
}
    4de0:	bd10      	pop	{r4, pc}
    p_reg->INTENCLR = mask;
    4de2:	2202      	movs	r2, #2
    4de4:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
            m_clock_cb.event_handler(NRFX_CLOCK_EVT_LFCLK_STARTED);
    4de8:	4b03      	ldr	r3, [pc, #12]	; (4df8 <nrfx_power_clock_irq_handler+0x60>)
}
    4dea:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
            m_clock_cb.event_handler(NRFX_CLOCK_EVT_LFCLK_STARTED);
    4dee:	681b      	ldr	r3, [r3, #0]
    4df0:	2001      	movs	r0, #1
    4df2:	4718      	bx	r3
    4df4:	40000100 	.word	0x40000100
    4df8:	2000174c 	.word	0x2000174c
    4dfc:	40000104 	.word	0x40000104

00004e00 <nrf_gpio_pin_port_decode>:
    uint32_t pin_number = *p_pin;
    4e00:	6803      	ldr	r3, [r0, #0]
    *p_pin = pin_number & 0x1F;
    4e02:	f003 021f 	and.w	r2, r3, #31
    return pin_number >> 5;
    4e06:	095b      	lsrs	r3, r3, #5
    switch (nrf_gpio_pin_port_number_extract(p_pin))
    4e08:	2b01      	cmp	r3, #1
    *p_pin = pin_number & 0x1F;
    4e0a:	6002      	str	r2, [r0, #0]
}
    4e0c:	4802      	ldr	r0, [pc, #8]	; (4e18 <nrf_gpio_pin_port_decode+0x18>)
    4e0e:	bf18      	it	ne
    4e10:	f04f 40a0 	movne.w	r0, #1342177280	; 0x50000000
    4e14:	4770      	bx	lr
    4e16:	bf00      	nop
    4e18:	50000300 	.word	0x50000300

00004e1c <call_handler>:
    nrf_gpiote_event_t event = nrfx_gpiote_in_event_get(pin);
    return nrf_gpiote_event_address_get(NRF_GPIOTE, event);
}

static void call_handler(nrfx_gpiote_pin_t pin, nrfx_gpiote_trigger_t trigger)
{
    4e1c:	b570      	push	{r4, r5, r6, lr}
    int32_t handler_id = PIN_GET_HANDLER_ID(m_cb.pin_flags[pin]);
    4e1e:	f100 0308 	add.w	r3, r0, #8
    4e22:	4c0c      	ldr	r4, [pc, #48]	; (4e54 <call_handler+0x38>)
    4e24:	f834 3013 	ldrh.w	r3, [r4, r3, lsl #1]
    4e28:	05da      	lsls	r2, r3, #23
{
    4e2a:	4605      	mov	r5, r0
    4e2c:	460e      	mov	r6, r1
    int32_t handler_id = PIN_GET_HANDLER_ID(m_cb.pin_flags[pin]);
    4e2e:	d507      	bpl.n	4e40 <call_handler+0x24>
    4e30:	f3c3 2343 	ubfx	r3, r3, #9, #4
    nrfx_gpiote_handler_config_t const * handler = channel_handler_get(pin);

    if (handler)
    {
        handler->handler(pin, trigger, handler->p_context);
    4e34:	eb04 02c3 	add.w	r2, r4, r3, lsl #3
    4e38:	f854 3033 	ldr.w	r3, [r4, r3, lsl #3]
    4e3c:	6852      	ldr	r2, [r2, #4]
    4e3e:	4798      	blx	r3
    }
    if (m_cb.global_handler.handler)
    4e40:	68a3      	ldr	r3, [r4, #8]
    4e42:	b12b      	cbz	r3, 4e50 <call_handler+0x34>
    {
        m_cb.global_handler.handler(pin, trigger, m_cb.global_handler.p_context);
    4e44:	68e2      	ldr	r2, [r4, #12]
    4e46:	4631      	mov	r1, r6
    4e48:	4628      	mov	r0, r5
    }
}
    4e4a:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
        m_cb.global_handler.handler(pin, trigger, m_cb.global_handler.p_context);
    4e4e:	4718      	bx	r3
}
    4e50:	bd70      	pop	{r4, r5, r6, pc}
    4e52:	bf00      	nop
    4e54:	20000064 	.word	0x20000064

00004e58 <release_handler>:
    int32_t handler_id = PIN_GET_HANDLER_ID(m_cb.pin_flags[pin]);
    4e58:	4b13      	ldr	r3, [pc, #76]	; (4ea8 <release_handler+0x50>)
    4e5a:	3008      	adds	r0, #8
{
    4e5c:	b410      	push	{r4}
    int32_t handler_id = PIN_GET_HANDLER_ID(m_cb.pin_flags[pin]);
    4e5e:	f833 2010 	ldrh.w	r2, [r3, r0, lsl #1]
    4e62:	05d1      	lsls	r1, r2, #23
    4e64:	d51c      	bpl.n	4ea0 <release_handler+0x48>
    4e66:	f3c2 2143 	ubfx	r1, r2, #9, #4
    m_cb.pin_flags[pin] &= ~PIN_HANDLER_MASK;
    4e6a:	f422 52f8 	bic.w	r2, r2, #7936	; 0x1f00
    4e6e:	f823 2010 	strh.w	r2, [r3, r0, lsl #1]
    for (uint32_t i = 0; i < MAX_PIN_NUMBER; i++)
    4e72:	f103 0410 	add.w	r4, r3, #16
    4e76:	2000      	movs	r0, #0
        if (PIN_GET_HANDLER_ID(m_cb.pin_flags[i]) == handler_id)
    4e78:	f834 2b02 	ldrh.w	r2, [r4], #2
    4e7c:	f412 7f80 	tst.w	r2, #256	; 0x100
    4e80:	d003      	beq.n	4e8a <release_handler+0x32>
    4e82:	f3c2 2243 	ubfx	r2, r2, #9, #4
    4e86:	4291      	cmp	r1, r2
    4e88:	d00a      	beq.n	4ea0 <release_handler+0x48>
    for (uint32_t i = 0; i < MAX_PIN_NUMBER; i++)
    4e8a:	3001      	adds	r0, #1
    4e8c:	2830      	cmp	r0, #48	; 0x30
    4e8e:	d1f3      	bne.n	4e78 <release_handler+0x20>
        m_cb.handlers[handler_id].handler = NULL;
    4e90:	2200      	movs	r2, #0
    4e92:	f843 2031 	str.w	r2, [r3, r1, lsl #3]
        nrfx_err_t err = nrfx_flag32_free(&m_cb.available_evt_handlers, handler_id);
    4e96:	4805      	ldr	r0, [pc, #20]	; (4eac <release_handler+0x54>)
}
    4e98:	f85d 4b04 	ldr.w	r4, [sp], #4
        nrfx_err_t err = nrfx_flag32_free(&m_cb.available_evt_handlers, handler_id);
    4e9c:	f7ff bed2 	b.w	4c44 <nrfx_flag32_free>
}
    4ea0:	f85d 4b04 	ldr.w	r4, [sp], #4
    4ea4:	4770      	bx	lr
    4ea6:	bf00      	nop
    4ea8:	20000064 	.word	0x20000064
    4eac:	200000d8 	.word	0x200000d8

00004eb0 <pin_handler_trigger_uninit>:
{
    4eb0:	b538      	push	{r3, r4, r5, lr}
    return m_cb.pin_flags[pin] & PIN_FLAG_TE_USED;
    4eb2:	4c0a      	ldr	r4, [pc, #40]	; (4edc <pin_handler_trigger_uninit+0x2c>)
    4eb4:	f100 0508 	add.w	r5, r0, #8
    4eb8:	f834 3015 	ldrh.w	r3, [r4, r5, lsl #1]
    if (pin_in_use_by_te(pin))
    4ebc:	069a      	lsls	r2, r3, #26
    4ebe:	d506      	bpl.n	4ece <pin_handler_trigger_uninit+0x1e>
        nrf_gpiote_te_default(NRF_GPIOTE, pin_te_get(pin));
    4ec0:	0b5b      	lsrs	r3, r3, #13
                         ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk);
}

NRF_STATIC_INLINE void nrf_gpiote_te_default(NRF_GPIOTE_Type * p_reg, uint32_t idx)
{
    p_reg->CONFIG[idx] = 0;
    4ec2:	4a07      	ldr	r2, [pc, #28]	; (4ee0 <pin_handler_trigger_uninit+0x30>)
    4ec4:	f503 73a2 	add.w	r3, r3, #324	; 0x144
    4ec8:	2100      	movs	r1, #0
    4eca:	f842 1023 	str.w	r1, [r2, r3, lsl #2]
    release_handler(pin);
    4ece:	f7ff ffc3 	bl	4e58 <release_handler>
    m_cb.pin_flags[pin] = PIN_FLAG_NOT_USED;
    4ed2:	2300      	movs	r3, #0
    4ed4:	f824 3015 	strh.w	r3, [r4, r5, lsl #1]
}
    4ed8:	bd38      	pop	{r3, r4, r5, pc}
    4eda:	bf00      	nop
    4edc:	20000064 	.word	0x20000064
    4ee0:	40006000 	.word	0x40006000

00004ee4 <nrfx_gpiote_input_configure>:
{
    4ee4:	e92d 41ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
    4ee8:	4604      	mov	r4, r0
    4eea:	4617      	mov	r7, r2
    4eec:	461d      	mov	r5, r3
    if (p_input_config)
    4eee:	b311      	cbz	r1, 4f36 <nrfx_gpiote_input_configure+0x52>
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    4ef0:	4e4d      	ldr	r6, [pc, #308]	; (5028 <nrfx_gpiote_input_configure+0x144>)
    4ef2:	f100 0808 	add.w	r8, r0, #8
        if (pin_is_task_output(pin))
    4ef6:	f836 3018 	ldrh.w	r3, [r6, r8, lsl #1]
    4efa:	f003 0322 	and.w	r3, r3, #34	; 0x22
    4efe:	2b22      	cmp	r3, #34	; 0x22
    4f00:	d103      	bne.n	4f0a <nrfx_gpiote_input_configure+0x26>
                return NRFX_ERROR_INVALID_PARAM;
    4f02:	484a      	ldr	r0, [pc, #296]	; (502c <nrfx_gpiote_input_configure+0x148>)
}
    4f04:	b004      	add	sp, #16
    4f06:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        nrf_gpio_pin_dir_t dir = NRF_GPIO_PIN_DIR_INPUT;
    4f0a:	2300      	movs	r3, #0
        nrf_gpio_reconfigure(pin, &dir, &input_connect, &p_input_config->pull, NULL, NULL);
    4f0c:	e9cd 3300 	strd	r3, r3, [sp]
        nrf_gpio_pin_dir_t dir = NRF_GPIO_PIN_DIR_INPUT;
    4f10:	f88d 300e 	strb.w	r3, [sp, #14]
        nrf_gpio_pin_input_t input_connect = NRF_GPIO_PIN_INPUT_CONNECT;
    4f14:	f88d 300f 	strb.w	r3, [sp, #15]
        nrf_gpio_reconfigure(pin, &dir, &input_connect, &p_input_config->pull, NULL, NULL);
    4f18:	f10d 020f 	add.w	r2, sp, #15
    4f1c:	460b      	mov	r3, r1
    4f1e:	f10d 010e 	add.w	r1, sp, #14
    4f22:	f004 fbb1 	bl	9688 <nrf_gpio_reconfigure>
        m_cb.pin_flags[pin] &= ~PIN_FLAG_OUTPUT;
    4f26:	f836 3018 	ldrh.w	r3, [r6, r8, lsl #1]
    4f2a:	f023 0302 	bic.w	r3, r3, #2
        m_cb.pin_flags[pin] |= PIN_FLAG_IN_USE;
    4f2e:	f043 0301 	orr.w	r3, r3, #1
    4f32:	f826 3018 	strh.w	r3, [r6, r8, lsl #1]
    if (p_trigger_config)
    4f36:	b197      	cbz	r7, 4f5e <nrfx_gpiote_input_configure+0x7a>
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    4f38:	483b      	ldr	r0, [pc, #236]	; (5028 <nrfx_gpiote_input_configure+0x144>)
        nrfx_gpiote_trigger_t trigger = p_trigger_config->trigger;
    4f3a:	783e      	ldrb	r6, [r7, #0]
        bool use_evt = p_trigger_config->p_in_channel ? true : false;
    4f3c:	687a      	ldr	r2, [r7, #4]
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    4f3e:	f104 0308 	add.w	r3, r4, #8
    4f42:	f830 1013 	ldrh.w	r1, [r0, r3, lsl #1]
        if (pin_is_output(pin))
    4f46:	078f      	lsls	r7, r1, #30
    4f48:	d50c      	bpl.n	4f64 <nrfx_gpiote_input_configure+0x80>
            if (use_evt)
    4f4a:	2a00      	cmp	r2, #0
    4f4c:	d1d9      	bne.n	4f02 <nrfx_gpiote_input_configure+0x1e>
        m_cb.pin_flags[pin] &= ~PIN_FLAG_TRIG_MODE_MASK;
    4f4e:	f830 2013 	ldrh.w	r2, [r0, r3, lsl #1]
    4f52:	f022 021c 	bic.w	r2, r2, #28
        m_cb.pin_flags[pin] |= PIN_FLAG_TRIG_MODE_SET(trigger);
    4f56:	ea42 0286 	orr.w	r2, r2, r6, lsl #2
    4f5a:	f820 2013 	strh.w	r2, [r0, r3, lsl #1]
    if (p_handler_config)
    4f5e:	bbcd      	cbnz	r5, 4fd4 <nrfx_gpiote_input_configure+0xf0>
    return NRFX_SUCCESS;
    4f60:	4833      	ldr	r0, [pc, #204]	; (5030 <nrfx_gpiote_input_configure+0x14c>)
    4f62:	e7cf      	b.n	4f04 <nrfx_gpiote_input_configure+0x20>
            m_cb.pin_flags[pin] &= ~(PIN_TE_ID_MASK | PIN_FLAG_TE_USED);
    4f64:	f021 0120 	bic.w	r1, r1, #32
    4f68:	04c9      	lsls	r1, r1, #19
    4f6a:	0cc9      	lsrs	r1, r1, #19
    4f6c:	f820 1013 	strh.w	r1, [r0, r3, lsl #1]
            if (use_evt)
    4f70:	2a00      	cmp	r2, #0
    4f72:	d0ec      	beq.n	4f4e <nrfx_gpiote_input_configure+0x6a>
                if (!edge)
    4f74:	2e03      	cmp	r6, #3
    4f76:	d8c4      	bhi.n	4f02 <nrfx_gpiote_input_configure+0x1e>
                uint8_t ch = *p_trigger_config->p_in_channel;
    4f78:	7817      	ldrb	r7, [r2, #0]
                if (trigger == NRFX_GPIOTE_TRIGGER_NONE)
    4f7a:	b92e      	cbnz	r6, 4f88 <nrfx_gpiote_input_configure+0xa4>
    4f7c:	4a2d      	ldr	r2, [pc, #180]	; (5034 <nrfx_gpiote_input_configure+0x150>)
    4f7e:	f507 71a2 	add.w	r1, r7, #324	; 0x144
    4f82:	f842 6021 	str.w	r6, [r2, r1, lsl #2]
#if defined(NRF9160_XXAA) || defined(NRF5340_XXAA)
    p_reg->CONFIG[idx] = 0;
#endif
}
    4f86:	e7e2      	b.n	4f4e <nrfx_gpiote_input_configure+0x6a>
   p_reg->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Msk;
    4f88:	00ba      	lsls	r2, r7, #2
    4f8a:	f102 4280 	add.w	r2, r2, #1073741824	; 0x40000000
    4f8e:	f502 42c0 	add.w	r2, r2, #24576	; 0x6000
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    4f92:	ea4f 2e04 	mov.w	lr, r4, lsl #8
   p_reg->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Msk;
    4f96:	f8d2 c510 	ldr.w	ip, [r2, #1296]	; 0x510
    4f9a:	f02c 0c03 	bic.w	ip, ip, #3
    4f9e:	f8c2 c510 	str.w	ip, [r2, #1296]	; 0x510
  p_reg->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk | GPIOTE_CONFIG_POLARITY_Msk);
    4fa2:	f8d2 c510 	ldr.w	ip, [r2, #1296]	; 0x510
    4fa6:	f42c 3c4f 	bic.w	ip, ip, #211968	; 0x33c00
    4faa:	f42c 7c40 	bic.w	ip, ip, #768	; 0x300
    4fae:	f8c2 c510 	str.w	ip, [r2, #1296]	; 0x510
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    4fb2:	f8d2 c510 	ldr.w	ip, [r2, #1296]	; 0x510
    4fb6:	f40e 5e7c 	and.w	lr, lr, #16128	; 0x3f00
    4fba:	ea4c 4c06 	orr.w	ip, ip, r6, lsl #16
                    m_cb.pin_flags[pin] |= PIN_FLAG_TE_ID(ch);
    4fbe:	ea41 3147 	orr.w	r1, r1, r7, lsl #13
    4fc2:	ea4c 0c0e 	orr.w	ip, ip, lr
    4fc6:	f041 0120 	orr.w	r1, r1, #32
    4fca:	f820 1013 	strh.w	r1, [r0, r3, lsl #1]
    4fce:	f8c2 c510 	str.w	ip, [r2, #1296]	; 0x510
    4fd2:	e7bc      	b.n	4f4e <nrfx_gpiote_input_configure+0x6a>
        err = pin_handler_set(pin, p_handler_config->handler, p_handler_config->p_context);
    4fd4:	e9d5 6700 	ldrd	r6, r7, [r5]
    release_handler(pin);
    4fd8:	4620      	mov	r0, r4
    4fda:	f7ff ff3d 	bl	4e58 <release_handler>
    if (!handler)
    4fde:	2e00      	cmp	r6, #0
    4fe0:	d0be      	beq.n	4f60 <nrfx_gpiote_input_configure+0x7c>
        if ((m_cb.handlers[i].handler == handler) && (m_cb.handlers[i].p_context == p_context))
    4fe2:	4d11      	ldr	r5, [pc, #68]	; (5028 <nrfx_gpiote_input_configure+0x144>)
    4fe4:	682b      	ldr	r3, [r5, #0]
    4fe6:	429e      	cmp	r6, r3
    4fe8:	d104      	bne.n	4ff4 <nrfx_gpiote_input_configure+0x110>
    4fea:	686b      	ldr	r3, [r5, #4]
    4fec:	429f      	cmp	r7, r3
    4fee:	d101      	bne.n	4ff4 <nrfx_gpiote_input_configure+0x110>
    4ff0:	2200      	movs	r2, #0
    4ff2:	e00a      	b.n	500a <nrfx_gpiote_input_configure+0x126>
        err = nrfx_flag32_alloc(&m_cb.available_evt_handlers, &id);
    4ff4:	4810      	ldr	r0, [pc, #64]	; (5038 <nrfx_gpiote_input_configure+0x154>)
    4ff6:	f10d 010f 	add.w	r1, sp, #15
    4ffa:	f7ff fdff 	bl	4bfc <nrfx_flag32_alloc>
        if (err != NRFX_SUCCESS)
    4ffe:	4b0c      	ldr	r3, [pc, #48]	; (5030 <nrfx_gpiote_input_configure+0x14c>)
    5000:	4298      	cmp	r0, r3
    5002:	f47f af7f 	bne.w	4f04 <nrfx_gpiote_input_configure+0x20>
        handler_id = (int32_t)id;
    5006:	f89d 200f 	ldrb.w	r2, [sp, #15]
    m_cb.handlers[handler_id].handler = handler;
    500a:	f845 6032 	str.w	r6, [r5, r2, lsl #3]
    m_cb.handlers[handler_id].p_context = p_context;
    500e:	eb05 03c2 	add.w	r3, r5, r2, lsl #3
    m_cb.pin_flags[pin] |= PIN_FLAG_HANDLER(handler_id);
    5012:	3408      	adds	r4, #8
    m_cb.handlers[handler_id].p_context = p_context;
    5014:	605f      	str	r7, [r3, #4]
    m_cb.pin_flags[pin] |= PIN_FLAG_HANDLER(handler_id);
    5016:	f835 3014 	ldrh.w	r3, [r5, r4, lsl #1]
    501a:	ea43 2342 	orr.w	r3, r3, r2, lsl #9
    501e:	f443 7380 	orr.w	r3, r3, #256	; 0x100
    5022:	f825 3014 	strh.w	r3, [r5, r4, lsl #1]
    5026:	e79b      	b.n	4f60 <nrfx_gpiote_input_configure+0x7c>
    5028:	20000064 	.word	0x20000064
    502c:	0bad0004 	.word	0x0bad0004
    5030:	0bad0000 	.word	0x0bad0000
    5034:	40006000 	.word	0x40006000
    5038:	200000d8 	.word	0x200000d8

0000503c <nrfx_gpiote_output_configure>:
{
    503c:	b5f0      	push	{r4, r5, r6, r7, lr}
    503e:	4604      	mov	r4, r0
    5040:	b085      	sub	sp, #20
    5042:	4615      	mov	r5, r2
    if (p_config)
    5044:	b309      	cbz	r1, 508a <nrfx_gpiote_output_configure+0x4e>
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    5046:	f100 0708 	add.w	r7, r0, #8
    504a:	4e31      	ldr	r6, [pc, #196]	; (5110 <nrfx_gpiote_output_configure+0xd4>)
    504c:	f836 3017 	ldrh.w	r3, [r6, r7, lsl #1]
        if (pin_is_input(pin) && pin_in_use_by_te(pin))
    5050:	0798      	lsls	r0, r3, #30
    5052:	d401      	bmi.n	5058 <nrfx_gpiote_output_configure+0x1c>
    5054:	069a      	lsls	r2, r3, #26
    5056:	d458      	bmi.n	510a <nrfx_gpiote_output_configure+0xce>
        if (pin_has_trigger(pin) && (p_config->input_connect == NRF_GPIO_PIN_INPUT_DISCONNECT))
    5058:	f013 0f1c 	tst.w	r3, #28
    505c:	d002      	beq.n	5064 <nrfx_gpiote_output_configure+0x28>
    505e:	784b      	ldrb	r3, [r1, #1]
    5060:	2b01      	cmp	r3, #1
    5062:	d052      	beq.n	510a <nrfx_gpiote_output_configure+0xce>
        nrf_gpio_pin_dir_t dir = NRF_GPIO_PIN_DIR_OUTPUT;
    5064:	2301      	movs	r3, #1
    5066:	f88d 300f 	strb.w	r3, [sp, #15]
        nrf_gpio_reconfigure(pin, &dir, &p_config->input_connect, &p_config->pull,
    506a:	2300      	movs	r3, #0
    506c:	e9cd 1300 	strd	r1, r3, [sp]
    5070:	1c4a      	adds	r2, r1, #1
    5072:	1c8b      	adds	r3, r1, #2
    5074:	4620      	mov	r0, r4
    5076:	f10d 010f 	add.w	r1, sp, #15
    507a:	f004 fb05 	bl	9688 <nrf_gpio_reconfigure>
        m_cb.pin_flags[pin] |= PIN_FLAG_IN_USE | PIN_FLAG_OUTPUT;
    507e:	f836 3017 	ldrh.w	r3, [r6, r7, lsl #1]
    5082:	f043 0303 	orr.w	r3, r3, #3
    5086:	f826 3017 	strh.w	r3, [r6, r7, lsl #1]
    if (p_task_config)
    508a:	b915      	cbnz	r5, 5092 <nrfx_gpiote_output_configure+0x56>
    return NRFX_SUCCESS;
    508c:	4821      	ldr	r0, [pc, #132]	; (5114 <nrfx_gpiote_output_configure+0xd8>)
}
    508e:	b005      	add	sp, #20
    5090:	bdf0      	pop	{r4, r5, r6, r7, pc}
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    5092:	4e1f      	ldr	r6, [pc, #124]	; (5110 <nrfx_gpiote_output_configure+0xd4>)
    5094:	f104 0708 	add.w	r7, r4, #8
    5098:	f836 0017 	ldrh.w	r0, [r6, r7, lsl #1]
        if (pin_is_input(pin))
    509c:	0783      	lsls	r3, r0, #30
    509e:	d534      	bpl.n	510a <nrfx_gpiote_output_configure+0xce>
        uint32_t ch = p_task_config->task_ch;
    50a0:	f895 c000 	ldrb.w	ip, [r5]
    p_reg->CONFIG[idx] = 0;
    50a4:	4661      	mov	r1, ip
    50a6:	0089      	lsls	r1, r1, #2
        m_cb.pin_flags[pin] &= ~(PIN_FLAG_TE_USED | PIN_TE_ID_MASK);
    50a8:	f020 0020 	bic.w	r0, r0, #32
    50ac:	f101 4180 	add.w	r1, r1, #1073741824	; 0x40000000
    50b0:	04c0      	lsls	r0, r0, #19
    50b2:	f501 41c0 	add.w	r1, r1, #24576	; 0x6000
    50b6:	0cc0      	lsrs	r0, r0, #19
    50b8:	f826 0017 	strh.w	r0, [r6, r7, lsl #1]
    50bc:	2300      	movs	r3, #0
    50be:	f8c1 3510 	str.w	r3, [r1, #1296]	; 0x510
        if (p_task_config->polarity != NRF_GPIOTE_POLARITY_NONE)
    50c2:	786a      	ldrb	r2, [r5, #1]
    50c4:	2a00      	cmp	r2, #0
    50c6:	d0e1      	beq.n	508c <nrfx_gpiote_output_configure+0x50>
  p_reg->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk |
    50c8:	f8d1 3510 	ldr.w	r3, [r1, #1296]	; 0x510
            nrf_gpiote_task_configure(NRF_GPIOTE, ch, pin,
    50cc:	78ad      	ldrb	r5, [r5, #2]
    50ce:	f423 1399 	bic.w	r3, r3, #1253376	; 0x132000
    50d2:	f423 53f8 	bic.w	r3, r3, #7936	; 0x1f00
    50d6:	f8c1 3510 	str.w	r3, [r1, #1296]	; 0x510
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    50da:	f8d1 e510 	ldr.w	lr, [r1, #1296]	; 0x510
    50de:	0223      	lsls	r3, r4, #8
    50e0:	f403 537c 	and.w	r3, r3, #16128	; 0x3f00
                        ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk) |
    50e4:	0412      	lsls	r2, r2, #16
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    50e6:	ea43 030e 	orr.w	r3, r3, lr
                        ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk) |
    50ea:	f402 3240 	and.w	r2, r2, #196608	; 0x30000
                        ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk);
    50ee:	052d      	lsls	r5, r5, #20
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    50f0:	4313      	orrs	r3, r2
                        ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk);
    50f2:	f405 1580 	and.w	r5, r5, #1048576	; 0x100000
            m_cb.pin_flags[pin] |= PIN_FLAG_TE_ID(ch);
    50f6:	ea40 304c 	orr.w	r0, r0, ip, lsl #13
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    50fa:	432b      	orrs	r3, r5
    50fc:	f040 0020 	orr.w	r0, r0, #32
    5100:	f826 0017 	strh.w	r0, [r6, r7, lsl #1]
    5104:	f8c1 3510 	str.w	r3, [r1, #1296]	; 0x510
    5108:	e7c0      	b.n	508c <nrfx_gpiote_output_configure+0x50>
            return NRFX_ERROR_INVALID_PARAM;
    510a:	4803      	ldr	r0, [pc, #12]	; (5118 <nrfx_gpiote_output_configure+0xdc>)
    510c:	e7bf      	b.n	508e <nrfx_gpiote_output_configure+0x52>
    510e:	bf00      	nop
    5110:	20000064 	.word	0x20000064
    5114:	0bad0000 	.word	0x0bad0000
    5118:	0bad0004 	.word	0x0bad0004

0000511c <nrfx_gpiote_global_callback_set>:
    m_cb.global_handler.handler = handler;
    511c:	4b01      	ldr	r3, [pc, #4]	; (5124 <nrfx_gpiote_global_callback_set+0x8>)
    m_cb.global_handler.p_context = p_context;
    511e:	e9c3 0102 	strd	r0, r1, [r3, #8]
}
    5122:	4770      	bx	lr
    5124:	20000064 	.word	0x20000064

00005128 <nrfx_gpiote_channel_get>:
    return m_cb.pin_flags[pin] & PIN_FLAG_TE_USED;
    5128:	3008      	adds	r0, #8
    512a:	4b05      	ldr	r3, [pc, #20]	; (5140 <nrfx_gpiote_channel_get+0x18>)
    512c:	f833 3010 	ldrh.w	r3, [r3, r0, lsl #1]
    if (pin_in_use_by_te(pin))
    5130:	069a      	lsls	r2, r3, #26
        *p_channel = PIN_GET_TE_ID(m_cb.pin_flags[pin]);
    5132:	bf43      	ittte	mi
    5134:	0b5b      	lsrmi	r3, r3, #13
        return NRFX_SUCCESS;
    5136:	4803      	ldrmi	r0, [pc, #12]	; (5144 <nrfx_gpiote_channel_get+0x1c>)
        *p_channel = PIN_GET_TE_ID(m_cb.pin_flags[pin]);
    5138:	700b      	strbmi	r3, [r1, #0]
        return NRFX_ERROR_INVALID_PARAM;
    513a:	4803      	ldrpl	r0, [pc, #12]	; (5148 <nrfx_gpiote_channel_get+0x20>)
}
    513c:	4770      	bx	lr
    513e:	bf00      	nop
    5140:	20000064 	.word	0x20000064
    5144:	0bad0000 	.word	0x0bad0000
    5148:	0bad0004 	.word	0x0bad0004

0000514c <nrfx_gpiote_init>:
{
    514c:	b538      	push	{r3, r4, r5, lr}
    if (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED)
    514e:	4c0e      	ldr	r4, [pc, #56]	; (5188 <nrfx_gpiote_init+0x3c>)
    5150:	f894 5078 	ldrb.w	r5, [r4, #120]	; 0x78
    5154:	b9b5      	cbnz	r5, 5184 <nrfx_gpiote_init+0x38>
    memset(m_cb.pin_flags, 0, sizeof(m_cb.pin_flags));
    5156:	2260      	movs	r2, #96	; 0x60
    5158:	4629      	mov	r1, r5
    515a:	f104 0010 	add.w	r0, r4, #16
    515e:	f004 f80f 	bl	9180 <memset>
    NRFX_IRQ_ENABLE(nrfx_get_irq_number(NRF_GPIOTE));
    5162:	2006      	movs	r0, #6
    5164:	f7fd fc6c 	bl	2a40 <arch_irq_enable>
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    5168:	4b08      	ldr	r3, [pc, #32]	; (518c <nrfx_gpiote_init+0x40>)
    return err_code;
    516a:	4809      	ldr	r0, [pc, #36]	; (5190 <nrfx_gpiote_init+0x44>)
    516c:	601d      	str	r5, [r3, #0]
    516e:	681b      	ldr	r3, [r3, #0]
    p_reg->INTENSET = mask;
    5170:	4b08      	ldr	r3, [pc, #32]	; (5194 <nrfx_gpiote_init+0x48>)
    5172:	f04f 4200 	mov.w	r2, #2147483648	; 0x80000000
    5176:	f8c3 2304 	str.w	r2, [r3, #772]	; 0x304
    m_cb.state = NRFX_DRV_STATE_INITIALIZED;
    517a:	2301      	movs	r3, #1
    517c:	f884 3078 	strb.w	r3, [r4, #120]	; 0x78
    m_cb.available_evt_handlers = NRFX_BIT_MASK(NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS);
    5180:	6763      	str	r3, [r4, #116]	; 0x74
}
    5182:	bd38      	pop	{r3, r4, r5, pc}
        return err_code;
    5184:	4804      	ldr	r0, [pc, #16]	; (5198 <nrfx_gpiote_init+0x4c>)
    5186:	e7fc      	b.n	5182 <nrfx_gpiote_init+0x36>
    5188:	20000064 	.word	0x20000064
    518c:	4000617c 	.word	0x4000617c
    5190:	0bad0000 	.word	0x0bad0000
    5194:	40006000 	.word	0x40006000
    5198:	0bad0005 	.word	0x0bad0005

0000519c <nrfx_gpiote_is_init>:
    return (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED) ? true : false;
    519c:	4b03      	ldr	r3, [pc, #12]	; (51ac <nrfx_gpiote_is_init+0x10>)
    519e:	f893 0078 	ldrb.w	r0, [r3, #120]	; 0x78
}
    51a2:	3800      	subs	r0, #0
    51a4:	bf18      	it	ne
    51a6:	2001      	movne	r0, #1
    51a8:	4770      	bx	lr
    51aa:	bf00      	nop
    51ac:	20000064 	.word	0x20000064

000051b0 <nrfx_gpiote_channel_free>:
{
    51b0:	4601      	mov	r1, r0
    return nrfx_flag32_free(&m_cb.available_channels_mask, channel);
    51b2:	4801      	ldr	r0, [pc, #4]	; (51b8 <nrfx_gpiote_channel_free+0x8>)
    51b4:	f7ff bd46 	b.w	4c44 <nrfx_flag32_free>
    51b8:	200000d4 	.word	0x200000d4

000051bc <nrfx_gpiote_channel_alloc>:
{
    51bc:	4601      	mov	r1, r0
    return nrfx_flag32_alloc(&m_cb.available_channels_mask, p_channel);
    51be:	4801      	ldr	r0, [pc, #4]	; (51c4 <nrfx_gpiote_channel_alloc+0x8>)
    51c0:	f7ff bd1c 	b.w	4bfc <nrfx_flag32_alloc>
    51c4:	200000d4 	.word	0x200000d4

000051c8 <nrfx_gpiote_trigger_enable>:
{
    51c8:	b537      	push	{r0, r1, r2, r4, r5, lr}
    return m_cb.pin_flags[pin] & PIN_FLAG_TE_USED;
    51ca:	4b1f      	ldr	r3, [pc, #124]	; (5248 <nrfx_gpiote_trigger_enable+0x80>)
    51cc:	f100 0208 	add.w	r2, r0, #8
{
    51d0:	4604      	mov	r4, r0
    return m_cb.pin_flags[pin] & PIN_FLAG_TE_USED;
    51d2:	f833 3012 	ldrh.w	r3, [r3, r2, lsl #1]
    if (pin_in_use_by_te(pin) && pin_is_input(pin))
    51d6:	069a      	lsls	r2, r3, #26
    51d8:	d51d      	bpl.n	5216 <nrfx_gpiote_trigger_enable+0x4e>
    51da:	f013 0502 	ands.w	r5, r3, #2
    51de:	d11a      	bne.n	5216 <nrfx_gpiote_trigger_enable+0x4e>
    return PIN_GET_TE_ID(m_cb.pin_flags[pin]);
    51e0:	0b5b      	lsrs	r3, r3, #13
#endif

NRF_STATIC_INLINE nrf_gpiote_event_t nrf_gpiote_in_event_get(uint8_t index)
{
    NRFX_ASSERT(index < GPIOTE_CH_NUM);
    return (nrf_gpiote_event_t)NRFX_OFFSETOF(NRF_GPIOTE_Type, EVENTS_IN[index]);
    51e2:	009a      	lsls	r2, r3, #2
    return ((uint32_t)p_reg + event);
    51e4:	f102 4080 	add.w	r0, r2, #1073741824	; 0x40000000
    51e8:	f500 40c2 	add.w	r0, r0, #24832	; 0x6100
    51ec:	f102 4280 	add.w	r2, r2, #1073741824	; 0x40000000
    51f0:	f502 42c0 	add.w	r2, r2, #24576	; 0x6000
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    51f4:	6005      	str	r5, [r0, #0]
    51f6:	6800      	ldr	r0, [r0, #0]
   p_reg->CONFIG[idx] |= GPIOTE_CONFIG_MODE_Event;
    51f8:	f8d2 0510 	ldr.w	r0, [r2, #1296]	; 0x510
    51fc:	f040 0001 	orr.w	r0, r0, #1
    5200:	f8c2 0510 	str.w	r0, [r2, #1296]	; 0x510
        if (int_enable)
    5204:	b129      	cbz	r1, 5212 <nrfx_gpiote_trigger_enable+0x4a>
            nrf_gpiote_int_enable(NRF_GPIOTE, NRFX_BIT(ch));
    5206:	2201      	movs	r2, #1
    5208:	fa02 f303 	lsl.w	r3, r2, r3
    p_reg->INTENSET = mask;
    520c:	4a0f      	ldr	r2, [pc, #60]	; (524c <nrfx_gpiote_trigger_enable+0x84>)
    520e:	f8c2 3304 	str.w	r3, [r2, #772]	; 0x304
}
    5212:	b003      	add	sp, #12
    5214:	bd30      	pop	{r4, r5, pc}
    nrfx_gpiote_trigger_t trigger = PIN_FLAG_TRIG_MODE_GET(m_cb.pin_flags[pin]);
    5216:	f3c3 0382 	ubfx	r3, r3, #2, #3
    if (trigger == NRFX_GPIOTE_TRIGGER_LOW)
    521a:	2b04      	cmp	r3, #4
    521c:	d010      	beq.n	5240 <nrfx_gpiote_trigger_enable+0x78>
    else if (trigger == NRFX_GPIOTE_TRIGGER_HIGH)
    521e:	2b05      	cmp	r3, #5
    5220:	d010      	beq.n	5244 <nrfx_gpiote_trigger_enable+0x7c>
    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
    5222:	a801      	add	r0, sp, #4
    5224:	9401      	str	r4, [sp, #4]
    5226:	f7ff fdeb 	bl	4e00 <nrf_gpio_pin_port_decode>
    return ((nrf_gpio_port_in_read(reg) >> pin_number) & 1UL);
    522a:	9b01      	ldr	r3, [sp, #4]
    return p_reg->IN;
    522c:	f8d0 1510 	ldr.w	r1, [r0, #1296]	; 0x510
    return ((nrf_gpio_port_in_read(reg) >> pin_number) & 1UL);
    5230:	40d9      	lsrs	r1, r3
    5232:	f001 0101 	and.w	r1, r1, #1
        sense = nrf_gpio_pin_read(pin) ? NRF_GPIO_PIN_SENSE_LOW : NRF_GPIO_PIN_SENSE_HIGH;
    5236:	3102      	adds	r1, #2
        nrf_gpio_cfg_sense_set(pin, get_initial_sense(pin));
    5238:	4620      	mov	r0, r4
    523a:	f004 fa6c 	bl	9716 <nrf_gpio_cfg_sense_set>
}
    523e:	e7e8      	b.n	5212 <nrfx_gpiote_trigger_enable+0x4a>
        sense = NRF_GPIO_PIN_SENSE_LOW;
    5240:	2103      	movs	r1, #3
    5242:	e7f9      	b.n	5238 <nrfx_gpiote_trigger_enable+0x70>
        sense = NRF_GPIO_PIN_SENSE_HIGH;
    5244:	2102      	movs	r1, #2
    5246:	e7f7      	b.n	5238 <nrfx_gpiote_trigger_enable+0x70>
    5248:	20000064 	.word	0x20000064
    524c:	40006000 	.word	0x40006000

00005250 <nrfx_gpiote_trigger_disable>:
    return m_cb.pin_flags[pin] & PIN_FLAG_TE_USED;
    5250:	4b0e      	ldr	r3, [pc, #56]	; (528c <nrfx_gpiote_trigger_disable+0x3c>)
    5252:	f100 0208 	add.w	r2, r0, #8
    5256:	f833 3012 	ldrh.w	r3, [r3, r2, lsl #1]
    if (pin_in_use_by_te(pin) && pin_is_input(pin))
    525a:	0699      	lsls	r1, r3, #26
    525c:	d513      	bpl.n	5286 <nrfx_gpiote_trigger_disable+0x36>
    525e:	079a      	lsls	r2, r3, #30
    5260:	d411      	bmi.n	5286 <nrfx_gpiote_trigger_disable+0x36>
    return PIN_GET_TE_ID(m_cb.pin_flags[pin]);
    5262:	0b5b      	lsrs	r3, r3, #13
        nrf_gpiote_int_disable(NRF_GPIOTE, NRFX_BIT(ch));
    5264:	2201      	movs	r2, #1
    5266:	409a      	lsls	r2, r3
    p_reg->INTENCLR = mask;
    5268:	009b      	lsls	r3, r3, #2
    526a:	4909      	ldr	r1, [pc, #36]	; (5290 <nrfx_gpiote_trigger_disable+0x40>)
    526c:	f103 4380 	add.w	r3, r3, #1073741824	; 0x40000000
    5270:	f503 43c0 	add.w	r3, r3, #24576	; 0x6000
    5274:	f8c1 2308 	str.w	r2, [r1, #776]	; 0x308
   p_reg->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Msk;
    5278:	f8d3 2510 	ldr.w	r2, [r3, #1296]	; 0x510
    527c:	f022 0203 	bic.w	r2, r2, #3
    5280:	f8c3 2510 	str.w	r2, [r3, #1296]	; 0x510
}
    5284:	4770      	bx	lr
        nrf_gpio_cfg_sense_set(pin, NRF_GPIO_PIN_NOSENSE);
    5286:	2100      	movs	r1, #0
    5288:	f004 ba45 	b.w	9716 <nrf_gpio_cfg_sense_set>
    528c:	20000064 	.word	0x20000064
    5290:	40006000 	.word	0x40006000

00005294 <nrfx_gpiote_pin_uninit>:
    return m_cb.pin_flags[pin] & PIN_FLAG_IN_USE;
    5294:	4b0e      	ldr	r3, [pc, #56]	; (52d0 <nrfx_gpiote_pin_uninit+0x3c>)
    5296:	f100 0208 	add.w	r2, r0, #8
{
    529a:	b513      	push	{r0, r1, r4, lr}
    return m_cb.pin_flags[pin] & PIN_FLAG_IN_USE;
    529c:	f813 3012 	ldrb.w	r3, [r3, r2, lsl #1]
    if (!pin_in_use(pin))
    52a0:	07db      	lsls	r3, r3, #31
{
    52a2:	4604      	mov	r4, r0
    if (!pin_in_use(pin))
    52a4:	d511      	bpl.n	52ca <nrfx_gpiote_pin_uninit+0x36>
    nrfx_gpiote_trigger_disable(pin);
    52a6:	f7ff ffd3 	bl	5250 <nrfx_gpiote_trigger_disable>
    pin_handler_trigger_uninit(pin);
    52aa:	4620      	mov	r0, r4
    52ac:	f7ff fe00 	bl	4eb0 <pin_handler_trigger_uninit>
    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
    52b0:	a801      	add	r0, sp, #4
    52b2:	9401      	str	r4, [sp, #4]
    52b4:	f7ff fda4 	bl	4e00 <nrf_gpio_pin_port_decode>
    reg->PIN_CNF[pin_number] = cnf;
    52b8:	9b01      	ldr	r3, [sp, #4]
    52ba:	f503 73e0 	add.w	r3, r3, #448	; 0x1c0
    52be:	2202      	movs	r2, #2
    52c0:	f840 2023 	str.w	r2, [r0, r3, lsl #2]
    nrf_gpio_cfg(
    52c4:	4803      	ldr	r0, [pc, #12]	; (52d4 <nrfx_gpiote_pin_uninit+0x40>)
}
    52c6:	b002      	add	sp, #8
    52c8:	bd10      	pop	{r4, pc}
        return NRFX_ERROR_INVALID_PARAM;
    52ca:	4803      	ldr	r0, [pc, #12]	; (52d8 <nrfx_gpiote_pin_uninit+0x44>)
    52cc:	e7fb      	b.n	52c6 <nrfx_gpiote_pin_uninit+0x32>
    52ce:	bf00      	nop
    52d0:	20000064 	.word	0x20000064
    52d4:	0bad0000 	.word	0x0bad0000
    52d8:	0bad0004 	.word	0x0bad0004

000052dc <nrfx_gpiote_irq_handler>:
        call_handler(pin, gpiote_polarity_to_trigger(polarity));
    }
}

void nrfx_gpiote_irq_handler(void)
{
    52dc:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    52e0:	4b64      	ldr	r3, [pc, #400]	; (5474 <nrfx_gpiote_irq_handler+0x198>)
    return p_reg->INTENSET & mask;
    52e2:	4865      	ldr	r0, [pc, #404]	; (5478 <nrfx_gpiote_irq_handler+0x19c>)
    uint32_t i;
    nrf_gpiote_event_t event = NRF_GPIOTE_EVENT_IN_0;
    uint32_t mask = (uint32_t)NRF_GPIOTE_INT_IN0_MASK;

    /* collect status of all GPIOTE pin events. Processing is done once all are collected and cleared.*/
    for (i = 0; i < GPIOTE_CH_NUM; i++)
    52e4:	4965      	ldr	r1, [pc, #404]	; (547c <nrfx_gpiote_irq_handler+0x1a0>)
    uint32_t status = 0;
    52e6:	2500      	movs	r5, #0
{
    52e8:	b087      	sub	sp, #28
    uint32_t mask = (uint32_t)NRF_GPIOTE_INT_IN0_MASK;
    52ea:	2201      	movs	r2, #1
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    52ec:	462c      	mov	r4, r5
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    52ee:	681e      	ldr	r6, [r3, #0]
    {
        if (nrf_gpiote_event_check(NRF_GPIOTE, event) &&
    52f0:	b136      	cbz	r6, 5300 <nrfx_gpiote_irq_handler+0x24>
    return p_reg->INTENSET & mask;
    52f2:	f8d0 6304 	ldr.w	r6, [r0, #772]	; 0x304
    52f6:	4216      	tst	r6, r2
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    52f8:	bf1e      	ittt	ne
    52fa:	601c      	strne	r4, [r3, #0]
    52fc:	681e      	ldrne	r6, [r3, #0]
            nrf_gpiote_int_enable_check(NRF_GPIOTE, mask))
        {
            nrf_gpiote_event_clear(NRF_GPIOTE, event);
            status |= mask;
    52fe:	4315      	orrne	r5, r2
        }
        mask <<= 1;
    5300:	3304      	adds	r3, #4
    for (i = 0; i < GPIOTE_CH_NUM; i++)
    5302:	428b      	cmp	r3, r1
        mask <<= 1;
    5304:	ea4f 0242 	mov.w	r2, r2, lsl #1
    for (i = 0; i < GPIOTE_CH_NUM; i++)
    5308:	d1f1      	bne.n	52ee <nrfx_gpiote_irq_handler+0x12>
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    530a:	4f5d      	ldr	r7, [pc, #372]	; (5480 <nrfx_gpiote_irq_handler+0x1a4>)
    530c:	683b      	ldr	r3, [r7, #0]
         * in ascending order. */
        event = (nrf_gpiote_event_t)((uint32_t)event + sizeof(uint32_t));
    }

    /* handle PORT event */
    if (nrf_gpiote_event_check(NRF_GPIOTE, NRF_GPIOTE_EVENT_PORT))
    530e:	b37b      	cbz	r3, 5370 <nrfx_gpiote_irq_handler+0x94>
        *p_masks = gpio_regs[i]->LATCH;
    5310:	f04f 43a0 	mov.w	r3, #1342177280	; 0x50000000
    5314:	4e5b      	ldr	r6, [pc, #364]	; (5484 <nrfx_gpiote_irq_handler+0x1a8>)
    5316:	f8d3 2520 	ldr.w	r2, [r3, #1312]	; 0x520
    531a:	9204      	str	r2, [sp, #16]
        gpio_regs[i]->LATCH = *p_masks;
    531c:	f8c3 2520 	str.w	r2, [r3, #1312]	; 0x520
        *p_masks = gpio_regs[i]->LATCH;
    5320:	f8d6 3520 	ldr.w	r3, [r6, #1312]	; 0x520
    5324:	9305      	str	r3, [sp, #20]
        gpio_regs[i]->LATCH = *p_masks;
    5326:	f8c6 3520 	str.w	r3, [r6, #1312]	; 0x520
        *p_masks = gpio_regs[i]->LATCH;
    532a:	9600      	str	r6, [sp, #0]
        for (uint32_t i = 0; i < GPIO_COUNT; i++)
    532c:	f10d 0910 	add.w	r9, sp, #16
                NRF_GPIO_PIN_SENSE_LOW : NRF_GPIO_PIN_SENSE_HIGH;
    5330:	f04f 0800 	mov.w	r8, #0
__STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask)
{
    uint8_t * p_mask8 = (uint8_t *)p_mask;
    uint32_t byte_idx = BITMASK_BYTE_GET(bit);
    bit = BITMASK_RELBIT_GET(bit);
    p_mask8[byte_idx] &= ~(1 << bit);
    5334:	f04f 0b01 	mov.w	fp, #1
            while (latch[i])
    5338:	f8d9 3000 	ldr.w	r3, [r9]
    533c:	b9f3      	cbnz	r3, 537c <nrfx_gpiote_irq_handler+0xa0>
        for (uint32_t i = 0; i < GPIO_COUNT; i++)
    533e:	f108 0820 	add.w	r8, r8, #32
    5342:	f1b8 0f40 	cmp.w	r8, #64	; 0x40
    5346:	f109 0904 	add.w	r9, r9, #4
    534a:	d1f5      	bne.n	5338 <nrfx_gpiote_irq_handler+0x5c>
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    534c:	603b      	str	r3, [r7, #0]
    534e:	683b      	ldr	r3, [r7, #0]
        gpio_regs[i]->LATCH = *p_masks;
    5350:	9900      	ldr	r1, [sp, #0]
        *p_masks = gpio_regs[i]->LATCH;
    5352:	f04f 43a0 	mov.w	r3, #1342177280	; 0x50000000
    5356:	f8d3 2520 	ldr.w	r2, [r3, #1312]	; 0x520
    535a:	9204      	str	r2, [sp, #16]
        gpio_regs[i]->LATCH = *p_masks;
    535c:	f8c3 2520 	str.w	r2, [r3, #1312]	; 0x520
        *p_masks = gpio_regs[i]->LATCH;
    5360:	9b00      	ldr	r3, [sp, #0]
    5362:	f8d3 3520 	ldr.w	r3, [r3, #1312]	; 0x520
    5366:	9305      	str	r3, [sp, #20]
        gpio_regs[i]->LATCH = *p_masks;
    5368:	f8c1 3520 	str.w	r3, [r1, #1312]	; 0x520
        if (latch[port_idx])
    536c:	4313      	orrs	r3, r2
    536e:	d1dd      	bne.n	532c <nrfx_gpiote_irq_handler+0x50>
        mask &= ~NRFX_BIT(ch);
    5370:	2401      	movs	r4, #1
    while (mask)
    5372:	2d00      	cmp	r5, #0
    5374:	d166      	bne.n	5444 <nrfx_gpiote_irq_handler+0x168>
        port_event_handle();
    }

    /* Process pin events. */
    gpiote_evt_handle(status);
}
    5376:	b007      	add	sp, #28
    5378:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
                uint32_t pin = NRF_CTZ(latch[i]);
    537c:	fa93 f3a3 	rbit	r3, r3
    5380:	fab3 f383 	clz	r3, r3
                pin += 32 * i;
    5384:	eb08 0603 	add.w	r6, r8, r3
                nrfx_gpiote_trigger_t trigger = PIN_FLAG_TRIG_MODE_GET(m_cb.pin_flags[pin]);
    5388:	f106 0208 	add.w	r2, r6, #8
    538c:	4b3e      	ldr	r3, [pc, #248]	; (5488 <nrfx_gpiote_irq_handler+0x1ac>)
    538e:	9603      	str	r6, [sp, #12]
    5390:	f833 2012 	ldrh.w	r2, [r3, r2, lsl #1]
    5394:	f3c2 0382 	ubfx	r3, r2, #2, #3
    uint32_t byte_idx = BITMASK_BYTE_GET(bit);
    5398:	08f4      	lsrs	r4, r6, #3
    539a:	9301      	str	r3, [sp, #4]
    539c:	469a      	mov	sl, r3
    p_mask8[byte_idx] &= ~(1 << bit);
    539e:	ab04      	add	r3, sp, #16
    bit = BITMASK_RELBIT_GET(bit);
    53a0:	f006 0007 	and.w	r0, r6, #7
    p_mask8[byte_idx] &= ~(1 << bit);
    53a4:	fa0b fc00 	lsl.w	ip, fp, r0
    53a8:	5d18      	ldrb	r0, [r3, r4]
    53aa:	ea20 000c 	bic.w	r0, r0, ip
    53ae:	5518      	strb	r0, [r3, r4]
    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
    53b0:	a803      	add	r0, sp, #12
    53b2:	0891      	lsrs	r1, r2, #2
    53b4:	f7ff fd24 	bl	4e00 <nrf_gpio_pin_port_decode>
    return (nrf_gpio_pin_sense_t)((reg->PIN_CNF[pin_number] &
    53b8:	9c03      	ldr	r4, [sp, #12]
    53ba:	f504 74e0 	add.w	r4, r4, #448	; 0x1c0
    if (is_level(trigger))
    53be:	074b      	lsls	r3, r1, #29
    53c0:	f850 4024 	ldr.w	r4, [r0, r4, lsl #2]
                                   GPIO_PIN_CNF_SENSE_Msk) >> GPIO_PIN_CNF_SENSE_Pos);
    53c4:	f3c4 4401 	ubfx	r4, r4, #16, #2
    53c8:	d523      	bpl.n	5412 <nrfx_gpiote_irq_handler+0x136>
        call_handler(pin, trigger);
    53ca:	4651      	mov	r1, sl
    53cc:	4630      	mov	r0, r6
    53ce:	f7ff fd25 	bl	4e1c <call_handler>
    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
    53d2:	a803      	add	r0, sp, #12
    53d4:	9603      	str	r6, [sp, #12]
    53d6:	f7ff fd13 	bl	4e00 <nrf_gpio_pin_port_decode>
    return (nrf_gpio_pin_sense_t)((reg->PIN_CNF[pin_number] &
    53da:	9a03      	ldr	r2, [sp, #12]
    53dc:	f502 72e0 	add.w	r2, r2, #448	; 0x1c0
    53e0:	b2e4      	uxtb	r4, r4
    53e2:	f850 2022 	ldr.w	r2, [r0, r2, lsl #2]
        if (nrf_gpio_pin_sense_get(pin) == sense)
    53e6:	f3c2 4201 	ubfx	r2, r2, #16, #2
    53ea:	4294      	cmp	r4, r2
    53ec:	d107      	bne.n	53fe <nrfx_gpiote_irq_handler+0x122>
            nrf_gpio_cfg_sense_set(pin, NRF_GPIO_PIN_NOSENSE);
    53ee:	2100      	movs	r1, #0
    53f0:	4630      	mov	r0, r6
    53f2:	f004 f990 	bl	9716 <nrf_gpio_cfg_sense_set>
            nrf_gpio_cfg_sense_set(pin, sense);
    53f6:	4621      	mov	r1, r4
    53f8:	4630      	mov	r0, r6
    53fa:	f004 f98c 	bl	9716 <nrf_gpio_cfg_sense_set>
    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
    53fe:	a803      	add	r0, sp, #12
    5400:	9603      	str	r6, [sp, #12]
    5402:	f7ff fcfd 	bl	4e00 <nrf_gpio_pin_port_decode>
    reg->LATCH = (1 << pin_number);
    5406:	9b03      	ldr	r3, [sp, #12]
    5408:	fa0b f303 	lsl.w	r3, fp, r3
    540c:	f8c0 3520 	str.w	r3, [r0, #1312]	; 0x520
    5410:	e792      	b.n	5338 <nrfx_gpiote_irq_handler+0x5c>
                NRF_GPIO_PIN_SENSE_LOW : NRF_GPIO_PIN_SENSE_HIGH;
    5412:	2c02      	cmp	r4, #2
        nrf_gpio_cfg_sense_set(pin, next_sense);
    5414:	bf0c      	ite	eq
    5416:	2103      	moveq	r1, #3
    5418:	2102      	movne	r1, #2
    541a:	4630      	mov	r0, r6
    541c:	f004 f97b 	bl	9716 <nrf_gpio_cfg_sense_set>
        if ((trigger == NRFX_GPIOTE_TRIGGER_TOGGLE) ||
    5420:	9b01      	ldr	r3, [sp, #4]
    5422:	2b03      	cmp	r3, #3
    5424:	d004      	beq.n	5430 <nrfx_gpiote_irq_handler+0x154>
    5426:	2c02      	cmp	r4, #2
    5428:	d107      	bne.n	543a <nrfx_gpiote_irq_handler+0x15e>
            (sense == NRF_GPIO_PIN_SENSE_HIGH && trigger == NRFX_GPIOTE_TRIGGER_LOTOHI) ||
    542a:	f1ba 0f01 	cmp.w	sl, #1
            (sense == NRF_GPIO_PIN_SENSE_LOW && trigger == NRFX_GPIOTE_TRIGGER_HITOLO))
    542e:	d1e6      	bne.n	53fe <nrfx_gpiote_irq_handler+0x122>
            call_handler(pin, trigger);
    5430:	4651      	mov	r1, sl
    5432:	4630      	mov	r0, r6
    5434:	f7ff fcf2 	bl	4e1c <call_handler>
    5438:	e7e1      	b.n	53fe <nrfx_gpiote_irq_handler+0x122>
            (sense == NRF_GPIO_PIN_SENSE_HIGH && trigger == NRFX_GPIOTE_TRIGGER_LOTOHI) ||
    543a:	2c03      	cmp	r4, #3
    543c:	d1df      	bne.n	53fe <nrfx_gpiote_irq_handler+0x122>
            (sense == NRF_GPIO_PIN_SENSE_LOW && trigger == NRFX_GPIOTE_TRIGGER_HITOLO))
    543e:	f1ba 0f02 	cmp.w	sl, #2
    5442:	e7f4      	b.n	542e <nrfx_gpiote_irq_handler+0x152>
        uint32_t ch = NRF_CTZ(mask);
    5444:	fa95 f3a5 	rbit	r3, r5
    5448:	fab3 f383 	clz	r3, r3
        mask &= ~NRFX_BIT(ch);
    544c:	fa04 f203 	lsl.w	r2, r4, r3
    5450:	009b      	lsls	r3, r3, #2
    5452:	f103 4380 	add.w	r3, r3, #1073741824	; 0x40000000
    5456:	f503 43c0 	add.w	r3, r3, #24576	; 0x6000
    545a:	ea25 0502 	bic.w	r5, r5, r2
    return ((p_reg->CONFIG[idx] & GPIOTE_CONFIG_PORT_PIN_Msk) >> GPIOTE_CONFIG_PSEL_Pos);
    545e:	f8d3 0510 	ldr.w	r0, [r3, #1296]	; 0x510
    return (nrf_gpiote_polarity_t)((p_reg->CONFIG[idx] & GPIOTE_CONFIG_POLARITY_Msk) >>
    5462:	f8d3 1510 	ldr.w	r1, [r3, #1296]	; 0x510
        call_handler(pin, gpiote_polarity_to_trigger(polarity));
    5466:	f3c0 2005 	ubfx	r0, r0, #8, #6
    546a:	f3c1 4101 	ubfx	r1, r1, #16, #2
    546e:	f7ff fcd5 	bl	4e1c <call_handler>
    5472:	e77e      	b.n	5372 <nrfx_gpiote_irq_handler+0x96>
    5474:	40006100 	.word	0x40006100
    5478:	40006000 	.word	0x40006000
    547c:	40006120 	.word	0x40006120
    5480:	4000617c 	.word	0x4000617c
    5484:	50000300 	.word	0x50000300
    5488:	20000064 	.word	0x20000064

0000548c <nrfx_nvmc_page_erase>:
    return p_reg->CODEPAGESIZE;
    548c:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
    5490:	691a      	ldr	r2, [r3, #16]
}

static bool is_page_aligned_check(uint32_t addr)
{
    /* If the modulo operation returns '0', then the address is aligned. */
    return !(addr % flash_page_size_get());
    5492:	fbb0 f3f2 	udiv	r3, r0, r2
    5496:	fb02 0313 	mls	r3, r2, r3, r0

nrfx_err_t nrfx_nvmc_page_erase(uint32_t addr)
{
    NRFX_ASSERT(is_valid_address(addr, false));

    if (!is_page_aligned_check(addr))
    549a:	b973      	cbnz	r3, 54ba <nrfx_nvmc_page_erase+0x2e>
#endif

NRF_STATIC_INLINE void nrf_nvmc_mode_set(NRF_NVMC_Type * p_reg,
                                         nrf_nvmc_mode_t mode)
{
    p_reg->CONFIG = (uint32_t)mode;
    549c:	4b08      	ldr	r3, [pc, #32]	; (54c0 <nrfx_nvmc_page_erase+0x34>)
    549e:	2202      	movs	r2, #2
    54a0:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
    else
    {
        p_reg->ERASEPCR1 = page_addr;
    }
#elif defined(NRF52_SERIES)
    p_reg->ERASEPAGE = page_addr;
    54a4:	f8c3 0508 	str.w	r0, [r3, #1288]	; 0x508
    return (bool)(p_reg->READY & NVMC_READY_READY_Msk);
    54a8:	f8d3 2400 	ldr.w	r2, [r3, #1024]	; 0x400
        return NRFX_ERROR_INVALID_ADDR;
    }

    nvmc_erase_mode_set();
    nrf_nvmc_page_erase_start(NRF_NVMC, addr);
    while (!nrf_nvmc_ready_check(NRF_NVMC))
    54ac:	07d2      	lsls	r2, r2, #31
    54ae:	d5fb      	bpl.n	54a8 <nrfx_nvmc_page_erase+0x1c>
    p_reg->CONFIG = (uint32_t)mode;
    54b0:	2200      	movs	r2, #0
    {}
    nvmc_readonly_mode_set();

    return NRFX_SUCCESS;
    54b2:	4804      	ldr	r0, [pc, #16]	; (54c4 <nrfx_nvmc_page_erase+0x38>)
    54b4:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
    54b8:	4770      	bx	lr
        return NRFX_ERROR_INVALID_ADDR;
    54ba:	4803      	ldr	r0, [pc, #12]	; (54c8 <nrfx_nvmc_page_erase+0x3c>)
}
    54bc:	4770      	bx	lr
    54be:	bf00      	nop
    54c0:	4001e000 	.word	0x4001e000
    54c4:	0bad0000 	.word	0x0bad0000
    54c8:	0bad000a 	.word	0x0bad000a

000054cc <nrfx_nvmc_word_write>:
    54cc:	4b07      	ldr	r3, [pc, #28]	; (54ec <nrfx_nvmc_word_write+0x20>)
    54ce:	2201      	movs	r2, #1
    54d0:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
    return (bool)(p_reg->READY & NVMC_READY_READY_Msk);
    54d4:	f8d3 2400 	ldr.w	r2, [r3, #1024]	; 0x400
    while (!nrf_nvmc_ready_check(NRF_NVMC))
    54d8:	07d2      	lsls	r2, r2, #31
    54da:	d5fb      	bpl.n	54d4 <nrfx_nvmc_word_write+0x8>
    *(volatile uint32_t *)addr = value;
    54dc:	6001      	str	r1, [r0, #0]
  __ASM volatile ("dmb 0xF":::"memory");
    54de:	f3bf 8f5f 	dmb	sy
    p_reg->CONFIG = (uint32_t)mode;
    54e2:	2200      	movs	r2, #0
    54e4:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
    nvmc_write_mode_set();

    nvmc_word_write(addr, value);

    nvmc_readonly_mode_set();
}
    54e8:	4770      	bx	lr
    54ea:	bf00      	nop
    54ec:	4001e000 	.word	0x4001e000

000054f0 <nrfx_ppi_channel_alloc>:
    nrfx_flag32_init(&m_groups_allocated, NRFX_PPI_ALL_APP_GROUPS_MASK);
}


nrfx_err_t nrfx_ppi_channel_alloc(nrf_ppi_channel_t * p_channel)
{
    54f0:	4601      	mov	r1, r0
    return nrfx_flag32_alloc(&m_channels_allocated, (uint8_t *)p_channel);
    54f2:	4801      	ldr	r0, [pc, #4]	; (54f8 <nrfx_ppi_channel_alloc+0x8>)
    54f4:	f7ff bb82 	b.w	4bfc <nrfx_flag32_alloc>
    54f8:	200000e0 	.word	0x200000e0

000054fc <_DoInit>:
                      _DoInit();                                                                     \
                    }                                                                                \
                  } while (0);                                                                       \
                }

static void _DoInit(void) {
    54fc:	b510      	push	{r4, lr}
  volatile SEGGER_RTT_CB* p;   // Volatile to make sure that compiler cannot change the order of accesses to the control block
  //
  // Initialize control block
  //
  p                     = (volatile SEGGER_RTT_CB*)((char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access control block uncached so that nothing in the cache ever becomes dirty and all changes are visible in HW directly
  p->MaxNumUpBuffers    = SEGGER_RTT_MAX_NUM_UP_BUFFERS;
    54fe:	4c11      	ldr	r4, [pc, #68]	; (5544 <_DoInit+0x48>)
  p->MaxNumDownBuffers  = SEGGER_RTT_MAX_NUM_DOWN_BUFFERS;
  //
  // Initialize up buffer 0
  //
  p->aUp[0].sName         = "Terminal";
    5500:	4a11      	ldr	r2, [pc, #68]	; (5548 <_DoInit+0x4c>)
  //
  // Finish initialization of the control block.
  // Copy Id string in three steps to make sure "SEGGER RTT" is not found
  // in initializer memory (usually flash) by J-Link
  //
  STRCPY((char*)&p->acID[7], "RTT");
    5502:	4912      	ldr	r1, [pc, #72]	; (554c <_DoInit+0x50>)
  p->MaxNumUpBuffers    = SEGGER_RTT_MAX_NUM_UP_BUFFERS;
    5504:	2303      	movs	r3, #3
    5506:	6123      	str	r3, [r4, #16]
  p->MaxNumDownBuffers  = SEGGER_RTT_MAX_NUM_DOWN_BUFFERS;
    5508:	6163      	str	r3, [r4, #20]
  p->aUp[0].pBuffer       = _acUpBuffer;
    550a:	4b11      	ldr	r3, [pc, #68]	; (5550 <_DoInit+0x54>)
  p->aUp[0].sName         = "Terminal";
    550c:	61a2      	str	r2, [r4, #24]
  p->aUp[0].pBuffer       = _acUpBuffer;
    550e:	61e3      	str	r3, [r4, #28]
  p->aUp[0].SizeOfBuffer  = BUFFER_SIZE_UP;
    5510:	f44f 6380 	mov.w	r3, #1024	; 0x400
    5514:	6223      	str	r3, [r4, #32]
  p->aUp[0].RdOff         = 0u;
    5516:	2300      	movs	r3, #0
    5518:	62a3      	str	r3, [r4, #40]	; 0x28
  p->aUp[0].WrOff         = 0u;
    551a:	6263      	str	r3, [r4, #36]	; 0x24
  p->aUp[0].Flags         = SEGGER_RTT_MODE_DEFAULT;
    551c:	62e3      	str	r3, [r4, #44]	; 0x2c
  p->aDown[0].sName         = "Terminal";
    551e:	6622      	str	r2, [r4, #96]	; 0x60
  p->aDown[0].pBuffer       = _acDownBuffer;
    5520:	4a0c      	ldr	r2, [pc, #48]	; (5554 <_DoInit+0x58>)
    5522:	6662      	str	r2, [r4, #100]	; 0x64
  STRCPY((char*)&p->acID[7], "RTT");
    5524:	1de0      	adds	r0, r4, #7
  p->aDown[0].SizeOfBuffer  = BUFFER_SIZE_DOWN;
    5526:	2210      	movs	r2, #16
    5528:	66a2      	str	r2, [r4, #104]	; 0x68
  p->aDown[0].RdOff         = 0u;
    552a:	6723      	str	r3, [r4, #112]	; 0x70
  p->aDown[0].WrOff         = 0u;
    552c:	66e3      	str	r3, [r4, #108]	; 0x6c
  p->aDown[0].Flags         = SEGGER_RTT_MODE_DEFAULT;
    552e:	6763      	str	r3, [r4, #116]	; 0x74
  STRCPY((char*)&p->acID[7], "RTT");
    5530:	f003 fddb 	bl	90ea <strcpy>
  RTT__DMB();                       // Force order of memory accessed inside core for cores that allow to change the order
  STRCPY((char*)&p->acID[0], "SEGGER");
    5534:	4908      	ldr	r1, [pc, #32]	; (5558 <_DoInit+0x5c>)
    5536:	4620      	mov	r0, r4
    5538:	f003 fdd7 	bl	90ea <strcpy>
  RTT__DMB();                       // Force order of memory accessed inside core for cores that allow to change the order
  p->acID[6] = ' ';
    553c:	2320      	movs	r3, #32
    553e:	71a3      	strb	r3, [r4, #6]
  RTT__DMB();                       // Force order of memory accessed inside core for cores that allow to change the order
}
    5540:	bd10      	pop	{r4, pc}
    5542:	bf00      	nop
    5544:	20001754 	.word	0x20001754
    5548:	0000ad84 	.word	0x0000ad84
    554c:	0000ad8d 	.word	0x0000ad8d
    5550:	20001976 	.word	0x20001976
    5554:	20001966 	.word	0x20001966
    5558:	0000ad91 	.word	0x0000ad91

0000555c <SEGGER_RTT_WriteSkipNoLock>:
*    (2) For performance reasons this function does not call Init()
*        and may only be called after RTT has been initialized.
*        Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
*/
#if (RTT_USE_ASM == 0)
unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
    555c:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  //
  // 1) is the most common case for large buffers and assuming that J-Link reads the data fast enough
  //
  pData = (const char *)pBuffer;
  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
  RdOff = pRing->RdOff;
    5560:	4f23      	ldr	r7, [pc, #140]	; (55f0 <SEGGER_RTT_WriteSkipNoLock+0x94>)
    5562:	f04f 0b18 	mov.w	fp, #24
unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
    5566:	4614      	mov	r4, r2
  RdOff = pRing->RdOff;
    5568:	fb0b 7200 	mla	r2, fp, r0, r7
unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
    556c:	4606      	mov	r6, r0
  RdOff = pRing->RdOff;
    556e:	6a93      	ldr	r3, [r2, #40]	; 0x28
  WrOff = pRing->WrOff;
    5570:	6a55      	ldr	r5, [r2, #36]	; 0x24
  if (RdOff <= WrOff) {                                 // Case 1), 2) or 3)
    5572:	42ab      	cmp	r3, r5
unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
    5574:	4688      	mov	r8, r1
  if (RdOff <= WrOff) {                                 // Case 1), 2) or 3)
    5576:	d834      	bhi.n	55e2 <SEGGER_RTT_WriteSkipNoLock+0x86>
    Avail = pRing->SizeOfBuffer - WrOff - 1u;           // Space until wrap-around (assume 1 byte not usable for case that RdOff == 0)
    5578:	f8d2 a020 	ldr.w	sl, [r2, #32]
    557c:	ebaa 0905 	sub.w	r9, sl, r5
    5580:	f109 32ff 	add.w	r2, r9, #4294967295
    if (Avail >= NumBytes) {                            // Case 1)?
    5584:	4294      	cmp	r4, r2
    5586:	d811      	bhi.n	55ac <SEGGER_RTT_WriteSkipNoLock+0x50>
CopyStraight:
      pDst = (pRing->pBuffer + WrOff) + SEGGER_RTT_UNCACHED_OFF;
    5588:	f04f 0918 	mov.w	r9, #24
    558c:	fb06 9309 	mla	r3, r6, r9, r9
    5590:	443b      	add	r3, r7
      memcpy((void*)pDst, pData, NumBytes);
    5592:	4622      	mov	r2, r4
      pDst = (pRing->pBuffer + WrOff) + SEGGER_RTT_UNCACHED_OFF;
    5594:	6858      	ldr	r0, [r3, #4]
      memcpy((void*)pDst, pData, NumBytes);
    5596:	4641      	mov	r1, r8
    5598:	4428      	add	r0, r5
    559a:	f003 fde6 	bl	916a <memcpy>
      RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
      pRing->WrOff = WrOff + NumBytes;
    559e:	fb09 7606 	mla	r6, r9, r6, r7
    55a2:	442c      	add	r4, r5
      if (NumBytes) {
        pDst = pRing->pBuffer + SEGGER_RTT_UNCACHED_OFF;
        memcpy((void*)pDst, pData + Rem, NumBytes);
      }
      RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
      pRing->WrOff = NumBytes;
    55a4:	6274      	str	r4, [r6, #36]	; 0x24
      return 1;
    55a6:	2001      	movs	r0, #1
    if (Avail >= NumBytes) {                           // Case 4)? => If not, we have case 5) (does not fit)
      goto CopyStraight;
    }
  }
  return 0;     // No space in buffer
}
    55a8:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
    Avail += RdOff;                                     // Space incl. wrap-around
    55ac:	4413      	add	r3, r2
    if (Avail >= NumBytes) {                            // Case 2? => If not, we have case 3) (does not fit)
    55ae:	429c      	cmp	r4, r3
    55b0:	d81b      	bhi.n	55ea <SEGGER_RTT_WriteSkipNoLock+0x8e>
      pDst = (pRing->pBuffer + WrOff) + SEGGER_RTT_UNCACHED_OFF;
    55b2:	fb00 bb0b 	mla	fp, r0, fp, fp
    55b6:	44bb      	add	fp, r7
      memcpy((void*)pDst, pData, Rem);                  // Copy 1st chunk
    55b8:	464a      	mov	r2, r9
      pDst = (pRing->pBuffer + WrOff) + SEGGER_RTT_UNCACHED_OFF;
    55ba:	f8db 0004 	ldr.w	r0, [fp, #4]
    55be:	442c      	add	r4, r5
      memcpy((void*)pDst, pData, Rem);                  // Copy 1st chunk
    55c0:	4428      	add	r0, r5
    55c2:	f003 fdd2 	bl	916a <memcpy>
      if (NumBytes) {
    55c6:	ebb4 040a 	subs.w	r4, r4, sl
    55ca:	d006      	beq.n	55da <SEGGER_RTT_WriteSkipNoLock+0x7e>
        memcpy((void*)pDst, pData + Rem, NumBytes);
    55cc:	f8db 0004 	ldr.w	r0, [fp, #4]
    55d0:	4622      	mov	r2, r4
    55d2:	eb08 0109 	add.w	r1, r8, r9
    55d6:	f003 fdc8 	bl	916a <memcpy>
      pRing->WrOff = NumBytes;
    55da:	2018      	movs	r0, #24
    55dc:	fb00 7606 	mla	r6, r0, r6, r7
    55e0:	e7e0      	b.n	55a4 <SEGGER_RTT_WriteSkipNoLock+0x48>
    Avail = RdOff - WrOff - 1u;
    55e2:	3b01      	subs	r3, #1
    55e4:	1b5b      	subs	r3, r3, r5
    if (Avail >= NumBytes) {                           // Case 4)? => If not, we have case 5) (does not fit)
    55e6:	42a3      	cmp	r3, r4
    55e8:	d2ce      	bcs.n	5588 <SEGGER_RTT_WriteSkipNoLock+0x2c>
  return 0;     // No space in buffer
    55ea:	2000      	movs	r0, #0
    55ec:	e7dc      	b.n	55a8 <SEGGER_RTT_WriteSkipNoLock+0x4c>
    55ee:	bf00      	nop
    55f0:	20001754 	.word	0x20001754

000055f4 <SEGGER_RTT_HasDataUp>:
unsigned SEGGER_RTT_HasDataUp(unsigned BufferIndex) {
  SEGGER_RTT_BUFFER_UP* pRing;
  unsigned                v;

  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
  v = pRing->RdOff;
    55f4:	4b03      	ldr	r3, [pc, #12]	; (5604 <SEGGER_RTT_HasDataUp+0x10>)
    55f6:	2218      	movs	r2, #24
    55f8:	fb02 3000 	mla	r0, r2, r0, r3
    55fc:	6a83      	ldr	r3, [r0, #40]	; 0x28
  return pRing->WrOff - v;
    55fe:	6a40      	ldr	r0, [r0, #36]	; 0x24
}
    5600:	1ac0      	subs	r0, r0, r3
    5602:	4770      	bx	lr
    5604:	20001754 	.word	0x20001754

00005608 <z_sys_init_run_level>:
		/* End marker */
		__init_end,
	};
	const struct init_entry *entry;

	for (entry = levels[level]; entry < levels[level+1]; entry++) {
    5608:	4b0e      	ldr	r3, [pc, #56]	; (5644 <z_sys_init_run_level+0x3c>)
{
    560a:	b570      	push	{r4, r5, r6, lr}
	for (entry = levels[level]; entry < levels[level+1]; entry++) {
    560c:	f853 4020 	ldr.w	r4, [r3, r0, lsl #2]
    5610:	3001      	adds	r0, #1
    5612:	f853 6020 	ldr.w	r6, [r3, r0, lsl #2]
    5616:	42a6      	cmp	r6, r4
    5618:	d800      	bhi.n	561c <z_sys_init_run_level+0x14>
				dev->state->init_res = rc;
			}
			dev->state->initialized = true;
		}
	}
}
    561a:	bd70      	pop	{r4, r5, r6, pc}
		int rc = entry->init(dev);
    561c:	e9d4 3500 	ldrd	r3, r5, [r4]
    5620:	4628      	mov	r0, r5
    5622:	4798      	blx	r3
		if (dev != NULL) {
    5624:	b165      	cbz	r5, 5640 <z_sys_init_run_level+0x38>
			if (rc != 0) {
    5626:	68eb      	ldr	r3, [r5, #12]
    5628:	b130      	cbz	r0, 5638 <z_sys_init_run_level+0x30>
				if (rc < 0) {
    562a:	2800      	cmp	r0, #0
    562c:	bfb8      	it	lt
    562e:	4240      	neglt	r0, r0
				dev->state->init_res = rc;
    5630:	28ff      	cmp	r0, #255	; 0xff
    5632:	bfa8      	it	ge
    5634:	20ff      	movge	r0, #255	; 0xff
    5636:	7018      	strb	r0, [r3, #0]
			dev->state->initialized = true;
    5638:	785a      	ldrb	r2, [r3, #1]
    563a:	f042 0201 	orr.w	r2, r2, #1
    563e:	705a      	strb	r2, [r3, #1]
	for (entry = levels[level]; entry < levels[level+1]; entry++) {
    5640:	3408      	adds	r4, #8
    5642:	e7e8      	b.n	5616 <z_sys_init_run_level+0xe>
    5644:	0000a088 	.word	0x0000a088

00005648 <z_impl_device_get_binding>:

const struct device *z_impl_device_get_binding(const char *name)
{
    5648:	b570      	push	{r4, r5, r6, lr}
	const struct device *dev;

	/* A null string identifies no device.  So does an empty
	 * string.
	 */
	if ((name == NULL) || (name[0] == '\0')) {
    564a:	4605      	mov	r5, r0
    564c:	b910      	cbnz	r0, 5654 <z_impl_device_get_binding+0xc>
		return NULL;
    564e:	2400      	movs	r4, #0
			return dev;
		}
	}

	return NULL;
}
    5650:	4620      	mov	r0, r4
    5652:	bd70      	pop	{r4, r5, r6, pc}
	if ((name == NULL) || (name[0] == '\0')) {
    5654:	7803      	ldrb	r3, [r0, #0]
    5656:	2b00      	cmp	r3, #0
    5658:	d0f9      	beq.n	564e <z_impl_device_get_binding+0x6>
	for (dev = __device_start; dev != __device_end; dev++) {
    565a:	4a0f      	ldr	r2, [pc, #60]	; (5698 <z_impl_device_get_binding+0x50>)
    565c:	4c0f      	ldr	r4, [pc, #60]	; (569c <z_impl_device_get_binding+0x54>)
    565e:	4616      	mov	r6, r2
    5660:	4294      	cmp	r4, r2
    5662:	d108      	bne.n	5676 <z_impl_device_get_binding+0x2e>
	for (dev = __device_start; dev != __device_end; dev++) {
    5664:	4c0d      	ldr	r4, [pc, #52]	; (569c <z_impl_device_get_binding+0x54>)
    5666:	42b4      	cmp	r4, r6
    5668:	d0f1      	beq.n	564e <z_impl_device_get_binding+0x6>
		if (z_device_ready(dev) && (strcmp(name, dev->name) == 0)) {
    566a:	4620      	mov	r0, r4
    566c:	f004 f878 	bl	9760 <z_device_ready>
    5670:	b950      	cbnz	r0, 5688 <z_impl_device_get_binding+0x40>
	for (dev = __device_start; dev != __device_end; dev++) {
    5672:	3418      	adds	r4, #24
    5674:	e7f7      	b.n	5666 <z_impl_device_get_binding+0x1e>
		if (z_device_ready(dev) && (dev->name == name)) {
    5676:	4620      	mov	r0, r4
    5678:	f004 f872 	bl	9760 <z_device_ready>
    567c:	b110      	cbz	r0, 5684 <z_impl_device_get_binding+0x3c>
    567e:	6823      	ldr	r3, [r4, #0]
    5680:	42ab      	cmp	r3, r5
    5682:	d0e5      	beq.n	5650 <z_impl_device_get_binding+0x8>
	for (dev = __device_start; dev != __device_end; dev++) {
    5684:	3418      	adds	r4, #24
    5686:	e7eb      	b.n	5660 <z_impl_device_get_binding+0x18>
		if (z_device_ready(dev) && (strcmp(name, dev->name) == 0)) {
    5688:	6821      	ldr	r1, [r4, #0]
    568a:	4628      	mov	r0, r5
    568c:	f003 fd51 	bl	9132 <strcmp>
    5690:	2800      	cmp	r0, #0
    5692:	d1ee      	bne.n	5672 <z_impl_device_get_binding+0x2a>
    5694:	e7dc      	b.n	5650 <z_impl_device_get_binding+0x8>
    5696:	bf00      	nop
    5698:	00009c00 	.word	0x00009c00
    569c:	00009b70 	.word	0x00009b70

000056a0 <z_fatal_error>:
	return 0;
#endif
}

void z_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
{
    56a0:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
    56a4:	4606      	mov	r6, r0
    56a6:	460f      	mov	r7, r1
	__asm__ volatile(
    56a8:	f04f 0320 	mov.w	r3, #32
    56ac:	f3ef 8811 	mrs	r8, BASEPRI
    56b0:	f383 8812 	msr	BASEPRI_MAX, r3
    56b4:	f3bf 8f6f 	isb	sy
	return z_impl_z_current_get();
    56b8:	f000 fe32 	bl	6320 <z_impl_z_current_get>
    56bc:	4c1f      	ldr	r4, [pc, #124]	; (573c <z_fatal_error+0x9c>)
    56be:	4b20      	ldr	r3, [pc, #128]	; (5740 <z_fatal_error+0xa0>)
    56c0:	1ae4      	subs	r4, r4, r3
    56c2:	2e04      	cmp	r6, #4
    56c4:	ea4f 04d4 	mov.w	r4, r4, lsr #3
    56c8:	bf96      	itet	ls
    56ca:	4a1e      	ldrls	r2, [pc, #120]	; (5744 <z_fatal_error+0xa4>)
			k_current_get() : NULL;

	/* twister looks for the "ZEPHYR FATAL ERROR" string, don't
	 * change it without also updating twister
	 */
	LOG_ERR(">>> ZEPHYR FATAL ERROR %d: %s on CPU %d", reason,
    56cc:	4a1e      	ldrhi	r2, [pc, #120]	; (5748 <z_fatal_error+0xa8>)
    56ce:	f852 2026 	ldrls.w	r2, [r2, r6, lsl #2]
    56d2:	01a4      	lsls	r4, r4, #6
    56d4:	f044 0301 	orr.w	r3, r4, #1
    56d8:	4605      	mov	r5, r0
    56da:	f8ad 3000 	strh.w	r3, [sp]
    56de:	481b      	ldr	r0, [pc, #108]	; (574c <z_fatal_error+0xac>)
    56e0:	2300      	movs	r3, #0
    56e2:	4631      	mov	r1, r6
    56e4:	f003 f991 	bl	8a0a <log_3>
	 * an IRQ or exception was being handled, or thread context.
	 *
	 * See #17656
	 */
#if defined(CONFIG_ARCH_HAS_NESTED_EXCEPTION_DETECTION)
	if ((esf != NULL) && arch_is_in_nested_exception(esf)) {
    56e8:	b147      	cbz	r7, 56fc <z_fatal_error+0x5c>
 * @return true if execution state was in handler mode, before
 *              the current exception occurred, otherwise false.
 */
static ALWAYS_INLINE bool arch_is_in_nested_exception(const z_arch_esf_t *esf)
{
	return (esf->basic.xpsr & IPSR_ISR_Msk) ? (true) : (false);
    56ea:	69fb      	ldr	r3, [r7, #28]
    56ec:	f3c3 0308 	ubfx	r3, r3, #0, #9
    56f0:	b123      	cbz	r3, 56fc <z_fatal_error+0x5c>
		LOG_ERR("Fault during interrupt handling\n");
    56f2:	4817      	ldr	r0, [pc, #92]	; (5750 <z_fatal_error+0xb0>)
    56f4:	f044 0101 	orr.w	r1, r4, #1
    56f8:	f003 f948 	bl	898c <log_0>
	}
#endif

	LOG_ERR("Current thread: %p (%s)", thread,
    56fc:	f044 0401 	orr.w	r4, r4, #1
	const char *thread_name = (thread != NULL) ? k_thread_name_get(thread) : NULL;
    5700:	b12d      	cbz	r5, 570e <z_fatal_error+0x6e>
    5702:	4628      	mov	r0, r5
    5704:	f004 f883 	bl	980e <k_thread_name_get>
	if ((thread_name == NULL) || (thread_name[0] == '\0')) {
    5708:	b108      	cbz	r0, 570e <z_fatal_error+0x6e>
    570a:	7803      	ldrb	r3, [r0, #0]
    570c:	b903      	cbnz	r3, 5710 <z_fatal_error+0x70>
		thread_name = "unknown";
    570e:	4811      	ldr	r0, [pc, #68]	; (5754 <z_fatal_error+0xb4>)
{
	if (IS_ENABLED(CONFIG_LOG_MODE_MINIMAL) || IS_ENABLED(CONFIG_LOG2)) {
		return (char *)str;
	}

	return z_log_strdup(str);
    5710:	f7fc fb2a 	bl	1d68 <z_log_strdup>
	LOG_ERR("Current thread: %p (%s)", thread,
    5714:	4623      	mov	r3, r4
    5716:	4602      	mov	r2, r0
    5718:	4629      	mov	r1, r5
    571a:	480f      	ldr	r0, [pc, #60]	; (5758 <z_fatal_error+0xb8>)
    571c:	f003 f95c 	bl	89d8 <log_2>
		log_strdup(thread_name_get(thread)));

	coredump(reason, esf, thread);

	k_sys_fatal_error_handler(reason, esf);
    5720:	4639      	mov	r1, r7
    5722:	4630      	mov	r0, r6
    5724:	f7ff f84c 	bl	47c0 <k_sys_fatal_error_handler>
	__asm__ volatile(
    5728:	f388 8811 	msr	BASEPRI, r8
    572c:	f3bf 8f6f 	isb	sy
	z_impl_k_thread_abort(thread);
    5730:	4628      	mov	r0, r5
	arch_irq_unlock(key);

	if (IS_ENABLED(CONFIG_MULTITHREADING)) {
		k_thread_abort(thread);
	}
}
    5732:	b002      	add	sp, #8
    5734:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
    5738:	f7fd bdec 	b.w	3314 <z_impl_k_thread_abort>
    573c:	00009da8 	.word	0x00009da8
    5740:	00009d80 	.word	0x00009d80
    5744:	0000a0a0 	.word	0x0000a0a0
    5748:	0000ad98 	.word	0x0000ad98
    574c:	0000adae 	.word	0x0000adae
    5750:	0000add6 	.word	0x0000add6
    5754:	0000ada6 	.word	0x0000ada6
    5758:	0000adf7 	.word	0x0000adf7

0000575c <init_idle_thread>:
} /* LCOV_EXCL_LINE ... because we just dumped final coverage data */

#if defined(CONFIG_MULTITHREADING)
__boot_func
static void init_idle_thread(int i)
{
    575c:	b530      	push	{r4, r5, lr}
	struct k_thread *thread = &z_idle_threads[i];
    575e:	4b11      	ldr	r3, [pc, #68]	; (57a4 <init_idle_thread+0x48>)
	snprintk(tname, 8, "idle %02d", i);
#else
	char *tname = NULL;
#endif /* CONFIG_THREAD_NAME */

	z_setup_new_thread(thread, stack,
    5760:	4911      	ldr	r1, [pc, #68]	; (57a8 <init_idle_thread+0x4c>)
	struct k_thread *thread = &z_idle_threads[i];
    5762:	24c0      	movs	r4, #192	; 0xc0
{
    5764:	b087      	sub	sp, #28
	struct k_thread *thread = &z_idle_threads[i];
    5766:	fb04 3400 	mla	r4, r4, r0, r3
	z_setup_new_thread(thread, stack,
    576a:	2201      	movs	r2, #1
    576c:	2300      	movs	r3, #0
    576e:	e9cd 2304 	strd	r2, r3, [sp, #16]
    5772:	220f      	movs	r2, #15
    5774:	e9cd 3202 	strd	r3, r2, [sp, #8]
			  CONFIG_IDLE_STACK_SIZE, idle, &_kernel.cpus[i],
    5778:	4a0c      	ldr	r2, [pc, #48]	; (57ac <init_idle_thread+0x50>)
	z_setup_new_thread(thread, stack,
    577a:	9301      	str	r3, [sp, #4]
			  CONFIG_IDLE_STACK_SIZE, idle, &_kernel.cpus[i],
    577c:	2318      	movs	r3, #24
    577e:	fb03 2300 	mla	r3, r3, r0, r2
	z_setup_new_thread(thread, stack,
    5782:	f44f 75c0 	mov.w	r5, #384	; 0x180
    5786:	9300      	str	r3, [sp, #0]
    5788:	fb05 1100 	mla	r1, r5, r0, r1
    578c:	4b08      	ldr	r3, [pc, #32]	; (57b0 <init_idle_thread+0x54>)
    578e:	f44f 72a0 	mov.w	r2, #320	; 0x140
    5792:	4620      	mov	r0, r4
    5794:	f000 f8f6 	bl	5984 <z_setup_new_thread>
	SYS_PORT_TRACING_FUNC(k_thread, sched_resume, thread);
}

static inline void z_mark_thread_as_started(struct k_thread *thread)
{
	thread->base.thread_state &= ~_THREAD_PRESTART;
    5798:	7b63      	ldrb	r3, [r4, #13]
    579a:	f023 0304 	bic.w	r3, r3, #4
    579e:	7363      	strb	r3, [r4, #13]
	z_mark_thread_as_started(thread);

#ifdef CONFIG_SMP
	thread->base.is_idle = 1U;
#endif
}
    57a0:	b007      	add	sp, #28
    57a2:	bd30      	pop	{r4, r5, pc}
    57a4:	20000300 	.word	0x20000300
    57a8:	20004b80 	.word	0x20004b80
    57ac:	200017fc 	.word	0x200017fc
    57b0:	00009813 	.word	0x00009813

000057b4 <bg_thread_main>:
{
    57b4:	b508      	push	{r3, lr}
	z_sys_post_kernel = true;
    57b6:	4b0a      	ldr	r3, [pc, #40]	; (57e0 <bg_thread_main+0x2c>)
    57b8:	2201      	movs	r2, #1
	z_sys_init_run_level(_SYS_INIT_LEVEL_POST_KERNEL);
    57ba:	2002      	movs	r0, #2
	z_sys_post_kernel = true;
    57bc:	701a      	strb	r2, [r3, #0]
	z_sys_init_run_level(_SYS_INIT_LEVEL_POST_KERNEL);
    57be:	f7ff ff23 	bl	5608 <z_sys_init_run_level>
	boot_banner();
    57c2:	f001 f823 	bl	680c <boot_banner>
	z_sys_init_run_level(_SYS_INIT_LEVEL_APPLICATION);
    57c6:	2003      	movs	r0, #3
    57c8:	f7ff ff1e 	bl	5608 <z_sys_init_run_level>
	z_init_static_threads();
    57cc:	f000 f938 	bl	5a40 <z_init_static_threads>
	main();
    57d0:	f7fa fe60 	bl	494 <main>
	z_main_thread.base.user_options &= ~K_ESSENTIAL;
    57d4:	4a03      	ldr	r2, [pc, #12]	; (57e4 <bg_thread_main+0x30>)
    57d6:	7b13      	ldrb	r3, [r2, #12]
    57d8:	f023 0301 	bic.w	r3, r3, #1
    57dc:	7313      	strb	r3, [r2, #12]
} /* LCOV_EXCL_LINE ... because we just dumped final coverage data */
    57de:	bd08      	pop	{r3, pc}
    57e0:	20001d76 	.word	0x20001d76
    57e4:	200003c0 	.word	0x200003c0

000057e8 <z_bss_zero>:
	(void)memset(__bss_start, 0, __bss_end - __bss_start);
    57e8:	4802      	ldr	r0, [pc, #8]	; (57f4 <z_bss_zero+0xc>)
    57ea:	4a03      	ldr	r2, [pc, #12]	; (57f8 <z_bss_zero+0x10>)
    57ec:	2100      	movs	r1, #0
    57ee:	1a12      	subs	r2, r2, r0
    57f0:	f003 bcc6 	b.w	9180 <memset>
    57f4:	200001e8 	.word	0x200001e8
    57f8:	20001f34 	.word	0x20001f34

000057fc <z_cstart>:
 *
 * @return Does not return
 */
__boot_func
FUNC_NORETURN void z_cstart(void)
{
    57fc:	b580      	push	{r7, lr}
    57fe:	b0b8      	sub	sp, #224	; 0xe0
	/* gcov hook needed to get the coverage report.*/
	gcov_static_init();

	LOG_CORE_INIT();
    5800:	f7fc f9fa 	bl	1bf8 <log_core_init>
 *
 * @return N/A
 */
static ALWAYS_INLINE void z_arm_interrupt_stack_setup(void)
{
	uint32_t msp =
    5804:	4f2e      	ldr	r7, [pc, #184]	; (58c0 <z_cstart+0xc4>)
  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
    5806:	f387 8808 	msr	MSP, r7
	 * for Cortex-M3 and Cortex-M4 (ARMv7-M) MCUs. For the rest
	 * of ARM Cortex-M processors this setting is enforced by
	 * default and it is not configurable.
	 */
#if defined(CONFIG_CPU_CORTEX_M3) || defined(CONFIG_CPU_CORTEX_M4)
	SCB->CCR |= SCB_CCR_STKALIGN_Msk;
    580a:	4d2e      	ldr	r5, [pc, #184]	; (58c4 <z_cstart+0xc8>)
#endif
#ifdef CONFIG_USERSPACE
	dummy_thread->mem_domain_info.mem_domain = &k_mem_domain_default;
#endif

	_current_cpu->current = dummy_thread;
    580c:	4e2e      	ldr	r6, [pc, #184]	; (58c8 <z_cstart+0xcc>)
    580e:	696b      	ldr	r3, [r5, #20]
    5810:	f443 7300 	orr.w	r3, r3, #512	; 0x200
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    5814:	2400      	movs	r4, #0
    5816:	616b      	str	r3, [r5, #20]
    5818:	23e0      	movs	r3, #224	; 0xe0
    581a:	f885 3022 	strb.w	r3, [r5, #34]	; 0x22
    581e:	77ec      	strb	r4, [r5, #31]
    5820:	762c      	strb	r4, [r5, #24]
    5822:	766c      	strb	r4, [r5, #25]
    5824:	76ac      	strb	r4, [r5, #26]
    5826:	f885 4020 	strb.w	r4, [r5, #32]
#if defined(CONFIG_ARM_SECURE_FIRMWARE)
	NVIC_SetPriority(SecureFault_IRQn, _EXC_FAULT_PRIO);
#endif /* CONFIG_ARM_SECURE_FIRMWARE */

	/* Enable Usage, Mem, & Bus Faults */
	SCB->SHCSR |= SCB_SHCSR_USGFAULTENA_Msk | SCB_SHCSR_MEMFAULTENA_Msk |
    582a:	6a6b      	ldr	r3, [r5, #36]	; 0x24
    582c:	f443 23e0 	orr.w	r3, r3, #458752	; 0x70000
    5830:	626b      	str	r3, [r5, #36]	; 0x24
    5832:	f885 4023 	strb.w	r4, [r5, #35]	; 0x23

static ALWAYS_INLINE void arch_kernel_init(void)
{
	z_arm_interrupt_stack_setup();
	z_arm_exc_setup();
	z_arm_fault_init();
    5836:	f7fd fce3 	bl	3200 <z_arm_fault_init>
	z_arm_cpu_idle_init();
    583a:	f7fd f86f 	bl	291c <z_arm_cpu_idle_init>
static ALWAYS_INLINE void z_arm_clear_faults(void)
{
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	/* Reset all faults */
	SCB->CFSR = SCB_CFSR_USGFAULTSR_Msk |
    583e:	f04f 33ff 	mov.w	r3, #4294967295
    5842:	62ab      	str	r3, [r5, #40]	; 0x28
		    SCB_CFSR_MEMFAULTSR_Msk |
		    SCB_CFSR_BUSFAULTSR_Msk;

	/* Clear all Hard Faults - HFSR is write-one-to-clear */
	SCB->HFSR = 0xffffffff;
    5844:	62eb      	str	r3, [r5, #44]	; 0x2c
	z_arm_clear_faults();
#if defined(CONFIG_ARM_MPU)
	z_arm_mpu_init();
    5846:	f7fd fe27 	bl	3498 <z_arm_mpu_init>
	 * to set up access permissions for fixed memory sections, such
	 * as Application Memory or No-Cacheable SRAM area.
	 *
	 * This function is invoked once, upon system initialization.
	 */
	z_arm_configure_static_mpu_regions();
    584a:	f7fd fd75 	bl	3338 <z_arm_configure_static_mpu_regions>
	dummy_thread->base.user_options = K_ESSENTIAL;
    584e:	f240 1301 	movw	r3, #257	; 0x101
    5852:	f8ad 302c 	strh.w	r3, [sp, #44]	; 0x2c
	_current_cpu->current = dummy_thread;
    5856:	ab08      	add	r3, sp, #32
    5858:	60b3      	str	r3, [r6, #8]
	dummy_thread->stack_info.size = 0U;
    585a:	e9cd 4421 	strd	r4, r4, [sp, #132]	; 0x84
	struct k_thread dummy_thread;

	z_dummy_thread_init(&dummy_thread);
#endif
	/* do any necessary initialization of static devices */
	z_device_state_init();
    585e:	f003 ff7e 	bl	975e <z_device_state_init>

	/* perform basic hardware initialization */
	z_sys_init_run_level(_SYS_INIT_LEVEL_PRE_KERNEL_1);
    5862:	4620      	mov	r0, r4
    5864:	f7ff fed0 	bl	5608 <z_sys_init_run_level>
	z_sys_init_run_level(_SYS_INIT_LEVEL_PRE_KERNEL_2);
    5868:	2001      	movs	r0, #1
	_kernel.ready_q.cache = &z_main_thread;
    586a:	4d18      	ldr	r5, [pc, #96]	; (58cc <z_cstart+0xd0>)
	z_sys_init_run_level(_SYS_INIT_LEVEL_PRE_KERNEL_2);
    586c:	f7ff fecc 	bl	5608 <z_sys_init_run_level>
	z_sched_init();
    5870:	f000 fca2 	bl	61b8 <z_sched_init>
	stack_ptr = z_setup_new_thread(&z_main_thread, z_main_stack,
    5874:	4a16      	ldr	r2, [pc, #88]	; (58d0 <z_cstart+0xd4>)
    5876:	9205      	str	r2, [sp, #20]
    5878:	2201      	movs	r2, #1
    587a:	4b16      	ldr	r3, [pc, #88]	; (58d4 <z_cstart+0xd8>)
    587c:	4916      	ldr	r1, [pc, #88]	; (58d8 <z_cstart+0xdc>)
    587e:	9400      	str	r4, [sp, #0]
    5880:	e9cd 4203 	strd	r4, r2, [sp, #12]
    5884:	e9cd 4401 	strd	r4, r4, [sp, #4]
    5888:	f44f 5220 	mov.w	r2, #10240	; 0x2800
    588c:	4628      	mov	r0, r5
	_kernel.ready_q.cache = &z_main_thread;
    588e:	61b5      	str	r5, [r6, #24]
	stack_ptr = z_setup_new_thread(&z_main_thread, z_main_stack,
    5890:	f000 f878 	bl	5984 <z_setup_new_thread>
    5894:	7b6a      	ldrb	r2, [r5, #13]
    5896:	9007      	str	r0, [sp, #28]
    5898:	f022 0204 	bic.w	r2, r2, #4
    589c:	736a      	strb	r2, [r5, #13]
	z_ready_thread(&z_main_thread);
    589e:	4628      	mov	r0, r5
    58a0:	f004 f818 	bl	98d4 <z_ready_thread>
		init_idle_thread(i);
    58a4:	4620      	mov	r0, r4
    58a6:	f7ff ff59 	bl	575c <init_idle_thread>
	arch_switch_to_main_thread(&z_main_thread, stack_ptr, bg_thread_main);
    58aa:	4b0a      	ldr	r3, [pc, #40]	; (58d4 <z_cstart+0xd8>)
		_kernel.cpus[i].idle_thread = &z_idle_threads[i];
    58ac:	4a0b      	ldr	r2, [pc, #44]	; (58dc <z_cstart+0xe0>)
    58ae:	60f2      	str	r2, [r6, #12]
	arch_switch_to_main_thread(&z_main_thread, stack_ptr, bg_thread_main);
    58b0:	9907      	ldr	r1, [sp, #28]
		_kernel.cpus[i].id = i;
    58b2:	7534      	strb	r4, [r6, #20]
	arch_switch_to_main_thread(&z_main_thread, stack_ptr, bg_thread_main);
    58b4:	461a      	mov	r2, r3
    58b6:	4628      	mov	r0, r5
		_kernel.cpus[i].irq_stack =
    58b8:	6077      	str	r7, [r6, #4]
	arch_switch_to_main_thread(&z_main_thread, stack_ptr, bg_thread_main);
    58ba:	f7fd fa23 	bl	2d04 <arch_switch_to_main_thread>
	CODE_UNREACHABLE; /* LCOV_EXCL_LINE */
    58be:	bf00      	nop
    58c0:	20005580 	.word	0x20005580
    58c4:	e000ed00 	.word	0xe000ed00
    58c8:	200017fc 	.word	0x200017fc
    58cc:	200003c0 	.word	0x200003c0
    58d0:	0000ae59 	.word	0x0000ae59
    58d4:	000057b5 	.word	0x000057b5
    58d8:	20002300 	.word	0x20002300
    58dc:	20000300 	.word	0x20000300

000058e0 <init_mem_slab_module>:
 * Perform any initialization that wasn't done at build time.
 *
 * @return N/A
 */
static int init_mem_slab_module(const struct device *dev)
{
    58e0:	b570      	push	{r4, r5, r6, lr}
	int rc = 0;
	ARG_UNUSED(dev);

	STRUCT_SECTION_FOREACH(k_mem_slab, slab) {
    58e2:	4b0e      	ldr	r3, [pc, #56]	; (591c <init_mem_slab_module+0x3c>)
    58e4:	4c0e      	ldr	r4, [pc, #56]	; (5920 <init_mem_slab_module+0x40>)
    58e6:	42a3      	cmp	r3, r4
    58e8:	d301      	bcc.n	58ee <init_mem_slab_module+0xe>
			goto out;
		}
		z_object_init(slab);
	}

out:
    58ea:	2000      	movs	r0, #0
	return rc;
}
    58ec:	bd70      	pop	{r4, r5, r6, pc}
	CHECKIF(((slab->block_size | (uintptr_t)slab->buffer) &
    58ee:	e9d3 0103 	ldrd	r0, r1, [r3, #12]
    58f2:	ea41 0200 	orr.w	r2, r1, r0
    58f6:	f012 0203 	ands.w	r2, r2, #3
    58fa:	d10b      	bne.n	5914 <init_mem_slab_module+0x34>
	for (j = 0U; j < slab->num_blocks; j++) {
    58fc:	689d      	ldr	r5, [r3, #8]
	slab->free_list = NULL;
    58fe:	615a      	str	r2, [r3, #20]
	for (j = 0U; j < slab->num_blocks; j++) {
    5900:	42aa      	cmp	r2, r5
    5902:	d101      	bne.n	5908 <init_mem_slab_module+0x28>
	STRUCT_SECTION_FOREACH(k_mem_slab, slab) {
    5904:	331c      	adds	r3, #28
    5906:	e7ee      	b.n	58e6 <init_mem_slab_module+0x6>
		*(char **)p = slab->free_list;
    5908:	695e      	ldr	r6, [r3, #20]
    590a:	600e      	str	r6, [r1, #0]
	for (j = 0U; j < slab->num_blocks; j++) {
    590c:	3201      	adds	r2, #1
		slab->free_list = p;
    590e:	6159      	str	r1, [r3, #20]
		p += slab->block_size;
    5910:	4401      	add	r1, r0
	for (j = 0U; j < slab->num_blocks; j++) {
    5912:	e7f5      	b.n	5900 <init_mem_slab_module+0x20>
		return -EINVAL;
    5914:	f06f 0015 	mvn.w	r0, #21
	return rc;
    5918:	e7e8      	b.n	58ec <init_mem_slab_module+0xc>
    591a:	bf00      	nop
    591c:	20000164 	.word	0x20000164
    5920:	20000164 	.word	0x20000164

00005924 <k_mem_slab_alloc>:

	return rc;
}

int k_mem_slab_alloc(struct k_mem_slab *slab, void **mem, k_timeout_t timeout)
{
    5924:	b5d3      	push	{r0, r1, r4, r6, r7, lr}
    5926:	460c      	mov	r4, r1
    5928:	4616      	mov	r6, r2
    592a:	461f      	mov	r7, r3
	__asm__ volatile(
    592c:	f04f 0320 	mov.w	r3, #32
    5930:	f3ef 8111 	mrs	r1, BASEPRI
    5934:	f383 8812 	msr	BASEPRI_MAX, r3
    5938:	f3bf 8f6f 	isb	sy
	k_spinlock_key_t key = k_spin_lock(&slab->lock);
	int result;

	SYS_PORT_TRACING_OBJ_FUNC_ENTER(k_mem_slab, alloc, slab, timeout);

	if (slab->free_list != NULL) {
    593c:	6943      	ldr	r3, [r0, #20]
    593e:	b15b      	cbz	r3, 5958 <k_mem_slab_alloc+0x34>
		/* take a free block */
		*mem = slab->free_list;
    5940:	6023      	str	r3, [r4, #0]
		slab->free_list = *(char **)(slab->free_list);
    5942:	681b      	ldr	r3, [r3, #0]
    5944:	6143      	str	r3, [r0, #20]
		slab->num_used++;
    5946:	6983      	ldr	r3, [r0, #24]
    5948:	3301      	adds	r3, #1
    594a:	6183      	str	r3, [r0, #24]

#ifdef CONFIG_MEM_SLAB_TRACE_MAX_UTILIZATION
		slab->max_used = MAX(slab->num_used, slab->max_used);
#endif

		result = 0;
    594c:	2000      	movs	r0, #0
	__asm__ volatile(
    594e:	f381 8811 	msr	BASEPRI, r1
    5952:	f3bf 8f6f 	isb	sy

	SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_mem_slab, alloc, slab, timeout, result);

	k_spin_unlock(&slab->lock, key);

	return result;
    5956:	e011      	b.n	597c <k_mem_slab_alloc+0x58>
	} else if (K_TIMEOUT_EQ(timeout, K_NO_WAIT) ||
    5958:	ea56 0207 	orrs.w	r2, r6, r7
    595c:	d103      	bne.n	5966 <k_mem_slab_alloc+0x42>
		*mem = NULL;
    595e:	6023      	str	r3, [r4, #0]
		result = -ENOMEM;
    5960:	f06f 000b 	mvn.w	r0, #11
    5964:	e7f3      	b.n	594e <k_mem_slab_alloc+0x2a>
		result = z_pend_curr(&slab->lock, key, &slab->wait_q, timeout);
    5966:	4602      	mov	r2, r0
    5968:	e9cd 6700 	strd	r6, r7, [sp]
    596c:	3008      	adds	r0, #8
    596e:	f000 fb75 	bl	605c <z_pend_curr>
		if (result == 0) {
    5972:	b918      	cbnz	r0, 597c <k_mem_slab_alloc+0x58>
			*mem = _current->base.swap_data;
    5974:	4b02      	ldr	r3, [pc, #8]	; (5980 <k_mem_slab_alloc+0x5c>)
    5976:	689b      	ldr	r3, [r3, #8]
    5978:	695b      	ldr	r3, [r3, #20]
    597a:	6023      	str	r3, [r4, #0]
}
    597c:	b002      	add	sp, #8
    597e:	bdd0      	pop	{r4, r6, r7, pc}
    5980:	200017fc 	.word	0x200017fc

00005984 <z_setup_new_thread>:
char *z_setup_new_thread(struct k_thread *new_thread,
			 k_thread_stack_t *stack, size_t stack_size,
			 k_thread_entry_t entry,
			 void *p1, void *p2, void *p3,
			 int prio, uint32_t options, const char *name)
{
    5984:	e92d 41ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
void z_init_thread_base(struct _thread_base *thread_base, int priority,
		       uint32_t initial_state, unsigned int options)
{
	/* k_q_node is initialized upon first insertion in a list */
	thread_base->pended_on = NULL;
	thread_base->user_options = (uint8_t)options;
    5988:	9e0e      	ldr	r6, [sp, #56]	; 0x38
    598a:	7306      	strb	r6, [r0, #12]
{
    598c:	460f      	mov	r7, r1
		stack_obj_size = Z_KERNEL_STACK_SIZE_ADJUST(stack_size);
    598e:	3207      	adds	r2, #7
	SYS_DLIST_FOR_EACH_CONTAINER(&((wq)->waitq), thread_ptr, \
				     base.qnode_dlist)

static inline void z_waitq_init(_wait_q_t *w)
{
	sys_dlist_init(&w->waitq);
    5990:	f100 0558 	add.w	r5, r0, #88	; 0x58
    5994:	f022 0207 	bic.w	r2, r2, #7
	thread_base->thread_state = (uint8_t)initial_state;
    5998:	2604      	movs	r6, #4

/** @} */

static inline char *Z_KERNEL_STACK_BUFFER(k_thread_stack_t *sym)
{
	return (char *)sym + K_KERNEL_STACK_RESERVED;
    599a:	3720      	adds	r7, #32
 */

static inline void sys_dlist_init(sys_dlist_t *list)
{
	list->head = (sys_dnode_t *)list;
	list->tail = (sys_dnode_t *)list;
    599c:	e9c0 5516 	strd	r5, r5, [r0, #88]	; 0x58
	new_thread->stack_info.size = stack_buf_size;
    59a0:	e9c0 7219 	strd	r7, r2, [r0, #100]	; 0x64
	thread_base->pended_on = NULL;
    59a4:	2500      	movs	r5, #0
	thread_base->thread_state = (uint8_t)initial_state;
    59a6:	7346      	strb	r6, [r0, #13]
		stack_obj_size = Z_KERNEL_STACK_SIZE_ADJUST(stack_size);
    59a8:	f102 0820 	add.w	r8, r2, #32

	thread_base->prio = priority;
    59ac:	9e0d      	ldr	r6, [sp, #52]	; 0x34
	arch_new_thread(new_thread, stack, stack_ptr, entry, p1, p2, p3);
    59ae:	9a0c      	ldr	r2, [sp, #48]	; 0x30
	thread_base->pended_on = NULL;
    59b0:	6085      	str	r5, [r0, #8]
 */

static inline void sys_dnode_init(sys_dnode_t *node)
{
	node->next = NULL;
	node->prev = NULL;
    59b2:	e9c0 5506 	strd	r5, r5, [r0, #24]
	thread_base->prio = priority;
    59b6:	7386      	strb	r6, [r0, #14]

	thread_base->sched_locked = 0U;
    59b8:	73c5      	strb	r5, [r0, #15]
	new_thread->stack_info.delta = delta;
    59ba:	66c5      	str	r5, [r0, #108]	; 0x6c
	arch_new_thread(new_thread, stack, stack_ptr, entry, p1, p2, p3);
    59bc:	9202      	str	r2, [sp, #8]
    59be:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
    59c0:	9201      	str	r2, [sp, #4]
	stack_ptr = (char *)stack + stack_obj_size;
    59c2:	4488      	add	r8, r1
	arch_new_thread(new_thread, stack, stack_ptr, entry, p1, p2, p3);
    59c4:	9a0a      	ldr	r2, [sp, #40]	; 0x28
    59c6:	9200      	str	r2, [sp, #0]
    59c8:	4642      	mov	r2, r8
{
    59ca:	4604      	mov	r4, r0
	arch_new_thread(new_thread, stack, stack_ptr, entry, p1, p2, p3);
    59cc:	f7fd f912 	bl	2bf4 <arch_new_thread>
	if (!_current) {
    59d0:	4b04      	ldr	r3, [pc, #16]	; (59e4 <z_setup_new_thread+0x60>)
	new_thread->init_data = NULL;
    59d2:	6565      	str	r5, [r4, #84]	; 0x54
	if (!_current) {
    59d4:	689b      	ldr	r3, [r3, #8]
    59d6:	b103      	cbz	r3, 59da <z_setup_new_thread+0x56>
	new_thread->resource_pool = _current->resource_pool;
    59d8:	6f1b      	ldr	r3, [r3, #112]	; 0x70
	return stack_ptr;
    59da:	6723      	str	r3, [r4, #112]	; 0x70
}
    59dc:	4640      	mov	r0, r8
    59de:	b004      	add	sp, #16
    59e0:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    59e4:	200017fc 	.word	0x200017fc

000059e8 <z_impl_k_thread_create>:
{
    59e8:	b5f0      	push	{r4, r5, r6, r7, lr}
    59ea:	b087      	sub	sp, #28
	z_setup_new_thread(new_thread, stack, stack_size, entry, p1, p2, p3,
    59ec:	2500      	movs	r5, #0
    59ee:	9505      	str	r5, [sp, #20]
    59f0:	9d10      	ldr	r5, [sp, #64]	; 0x40
    59f2:	9504      	str	r5, [sp, #16]
    59f4:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
    59f6:	9503      	str	r5, [sp, #12]
    59f8:	9d0e      	ldr	r5, [sp, #56]	; 0x38
    59fa:	9502      	str	r5, [sp, #8]
{
    59fc:	e9dd 6712 	ldrd	r6, r7, [sp, #72]	; 0x48
	z_setup_new_thread(new_thread, stack, stack_size, entry, p1, p2, p3,
    5a00:	9d0d      	ldr	r5, [sp, #52]	; 0x34
    5a02:	9501      	str	r5, [sp, #4]
    5a04:	9d0c      	ldr	r5, [sp, #48]	; 0x30
    5a06:	9500      	str	r5, [sp, #0]
{
    5a08:	4604      	mov	r4, r0
	z_setup_new_thread(new_thread, stack, stack_size, entry, p1, p2, p3,
    5a0a:	f7ff ffbb 	bl	5984 <z_setup_new_thread>
	if (!K_TIMEOUT_EQ(delay, K_FOREVER)) {
    5a0e:	1c7b      	adds	r3, r7, #1
    5a10:	bf08      	it	eq
    5a12:	f1b6 3fff 	cmpeq.w	r6, #4294967295
    5a16:	d005      	beq.n	5a24 <z_impl_k_thread_create+0x3c>
	if (K_TIMEOUT_EQ(delay, K_NO_WAIT)) {
    5a18:	ea56 0307 	orrs.w	r3, r6, r7
    5a1c:	d105      	bne.n	5a2a <z_impl_k_thread_create+0x42>
	z_sched_start(thread);
    5a1e:	4620      	mov	r0, r4
    5a20:	f000 fac0 	bl	5fa4 <z_sched_start>
}
    5a24:	4620      	mov	r0, r4
    5a26:	b007      	add	sp, #28
    5a28:	bdf0      	pop	{r4, r5, r6, r7, pc}

extern void z_thread_timeout(struct _timeout *timeout);

static inline void z_add_thread_timeout(struct k_thread *thread, k_timeout_t ticks)
{
	z_add_timeout(&thread->base.timeout, z_thread_timeout, ticks);
    5a2a:	4904      	ldr	r1, [pc, #16]	; (5a3c <z_impl_k_thread_create+0x54>)
    5a2c:	4632      	mov	r2, r6
    5a2e:	463b      	mov	r3, r7
    5a30:	f104 0018 	add.w	r0, r4, #24
    5a34:	f000 fd38 	bl	64a8 <z_add_timeout>
    5a38:	e7f4      	b.n	5a24 <z_impl_k_thread_create+0x3c>
    5a3a:	bf00      	nop
    5a3c:	000098f5 	.word	0x000098f5

00005a40 <z_init_static_threads>:
{
    5a40:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
	_FOREACH_STATIC_THREAD(thread_data) {
    5a44:	4e2a      	ldr	r6, [pc, #168]	; (5af0 <z_init_static_threads+0xb0>)
    5a46:	4d2b      	ldr	r5, [pc, #172]	; (5af4 <z_init_static_threads+0xb4>)
{
    5a48:	b086      	sub	sp, #24
    5a4a:	46b0      	mov	r8, r6
	_FOREACH_STATIC_THREAD(thread_data) {
    5a4c:	42b5      	cmp	r5, r6
    5a4e:	f105 0430 	add.w	r4, r5, #48	; 0x30
    5a52:	d310      	bcc.n	5a76 <z_init_static_threads+0x36>
	k_sched_lock();
    5a54:	f000 f9ba 	bl	5dcc <k_sched_lock>
	_FOREACH_STATIC_THREAD(thread_data) {
    5a58:	4c26      	ldr	r4, [pc, #152]	; (5af4 <z_init_static_threads+0xb4>)
    5a5a:	f8df a09c 	ldr.w	sl, [pc, #156]	; 5af8 <z_init_static_threads+0xb8>
    5a5e:	f44f 4900 	mov.w	r9, #32768	; 0x8000
    5a62:	f240 36e7 	movw	r6, #999	; 0x3e7
    5a66:	2700      	movs	r7, #0
    5a68:	4544      	cmp	r4, r8
    5a6a:	d321      	bcc.n	5ab0 <z_init_static_threads+0x70>
}
    5a6c:	b006      	add	sp, #24
    5a6e:	e8bd 47f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
	k_sched_unlock();
    5a72:	f000 bb85 	b.w	6180 <k_sched_unlock>
		z_setup_new_thread(
    5a76:	f854 3c04 	ldr.w	r3, [r4, #-4]
    5a7a:	9305      	str	r3, [sp, #20]
    5a7c:	f854 3c10 	ldr.w	r3, [r4, #-16]
    5a80:	9304      	str	r3, [sp, #16]
    5a82:	f854 3c14 	ldr.w	r3, [r4, #-20]
    5a86:	9303      	str	r3, [sp, #12]
    5a88:	f854 3c18 	ldr.w	r3, [r4, #-24]
    5a8c:	9302      	str	r3, [sp, #8]
    5a8e:	f854 3c1c 	ldr.w	r3, [r4, #-28]
    5a92:	9301      	str	r3, [sp, #4]
    5a94:	f854 3c20 	ldr.w	r3, [r4, #-32]
    5a98:	9300      	str	r3, [sp, #0]
    5a9a:	e954 230a 	ldrd	r2, r3, [r4, #-40]	; 0x28
    5a9e:	e954 010c 	ldrd	r0, r1, [r4, #-48]	; 0x30
    5aa2:	f7ff ff6f 	bl	5984 <z_setup_new_thread>
		thread_data->init_thread->init_data = thread_data;
    5aa6:	f854 3c30 	ldr.w	r3, [r4, #-48]
    5aaa:	655d      	str	r5, [r3, #84]	; 0x54
    5aac:	4625      	mov	r5, r4
    5aae:	e7cd      	b.n	5a4c <z_init_static_threads+0xc>
		if (thread_data->init_delay != K_TICKS_FOREVER) {
    5ab0:	6a63      	ldr	r3, [r4, #36]	; 0x24
    5ab2:	1c5a      	adds	r2, r3, #1
    5ab4:	d00d      	beq.n	5ad2 <z_init_static_threads+0x92>
					    K_MSEC(thread_data->init_delay));
    5ab6:	ea23 73e3 	bic.w	r3, r3, r3, asr #31
    5aba:	4630      	mov	r0, r6
    5abc:	4639      	mov	r1, r7
    5abe:	fbc9 0103 	smlal	r0, r1, r9, r3
	if (K_TIMEOUT_EQ(delay, K_NO_WAIT)) {
    5ac2:	42b9      	cmp	r1, r7
    5ac4:	bf08      	it	eq
    5ac6:	42b0      	cmpeq	r0, r6
			schedule_new_thread(thread_data->init_thread,
    5ac8:	6825      	ldr	r5, [r4, #0]
	if (K_TIMEOUT_EQ(delay, K_NO_WAIT)) {
    5aca:	d104      	bne.n	5ad6 <z_init_static_threads+0x96>
	z_sched_start(thread);
    5acc:	4628      	mov	r0, r5
    5ace:	f000 fa69 	bl	5fa4 <z_sched_start>
	_FOREACH_STATIC_THREAD(thread_data) {
    5ad2:	3430      	adds	r4, #48	; 0x30
    5ad4:	e7c8      	b.n	5a68 <z_init_static_threads+0x28>
    5ad6:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
    5ada:	2300      	movs	r3, #0
    5adc:	f7fa fb10 	bl	100 <__aeabi_uldivmod>
    5ae0:	4602      	mov	r2, r0
    5ae2:	460b      	mov	r3, r1
    5ae4:	f105 0018 	add.w	r0, r5, #24
    5ae8:	4651      	mov	r1, sl
    5aea:	f000 fcdd 	bl	64a8 <z_add_timeout>
    5aee:	e7f0      	b.n	5ad2 <z_init_static_threads+0x92>
    5af0:	20000164 	.word	0x20000164
    5af4:	20000164 	.word	0x20000164
    5af8:	000098f5 	.word	0x000098f5

00005afc <z_impl_k_mutex_lock>:
	}
	return false;
}

int z_impl_k_mutex_lock(struct k_mutex *mutex, k_timeout_t timeout)
{
    5afc:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
    5b00:	4604      	mov	r4, r0
    5b02:	4616      	mov	r6, r2
    5b04:	461f      	mov	r7, r3
	__asm__ volatile(
    5b06:	f04f 0320 	mov.w	r3, #32
    5b0a:	f3ef 8811 	mrs	r8, BASEPRI
    5b0e:	f383 8812 	msr	BASEPRI_MAX, r3
    5b12:	f3bf 8f6f 	isb	sy

	SYS_PORT_TRACING_OBJ_FUNC_ENTER(k_mutex, lock, mutex, timeout);

	key = k_spin_lock(&lock);

	if (likely((mutex->lock_count == 0U) || (mutex->owner == _current))) {
    5b16:	68c3      	ldr	r3, [r0, #12]
    5b18:	4a35      	ldr	r2, [pc, #212]	; (5bf0 <z_impl_k_mutex_lock+0xf4>)
    5b1a:	b16b      	cbz	r3, 5b38 <z_impl_k_mutex_lock+0x3c>
    5b1c:	6880      	ldr	r0, [r0, #8]
    5b1e:	6891      	ldr	r1, [r2, #8]
    5b20:	4288      	cmp	r0, r1
    5b22:	d019      	beq.n	5b58 <z_impl_k_mutex_lock+0x5c>
		SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_mutex, lock, mutex, timeout, 0);

		return 0;
	}

	if (unlikely(K_TIMEOUT_EQ(timeout, K_NO_WAIT))) {
    5b24:	ea56 0307 	orrs.w	r3, r6, r7
    5b28:	d118      	bne.n	5b5c <z_impl_k_mutex_lock+0x60>
	__asm__ volatile(
    5b2a:	f388 8811 	msr	BASEPRI, r8
    5b2e:	f3bf 8f6f 	isb	sy
		k_spin_unlock(&lock, key);

		SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_mutex, lock, mutex, timeout, -EBUSY);

		return -EBUSY;
    5b32:	f06f 000f 	mvn.w	r0, #15
    5b36:	e00c      	b.n	5b52 <z_impl_k_mutex_lock+0x56>
					_current->base.prio :
    5b38:	6891      	ldr	r1, [r2, #8]
    5b3a:	f991 100e 	ldrsb.w	r1, [r1, #14]
		mutex->owner_orig_prio = (mutex->lock_count == 0U) ?
    5b3e:	6121      	str	r1, [r4, #16]
		mutex->lock_count++;
    5b40:	3301      	adds	r3, #1
    5b42:	60e3      	str	r3, [r4, #12]
		mutex->owner = _current;
    5b44:	6893      	ldr	r3, [r2, #8]
    5b46:	60a3      	str	r3, [r4, #8]
    5b48:	f388 8811 	msr	BASEPRI, r8
    5b4c:	f3bf 8f6f 	isb	sy
		return 0;
    5b50:	2000      	movs	r0, #0
	}

	SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_mutex, lock, mutex, timeout, -EAGAIN);

	return -EAGAIN;
}
    5b52:	b002      	add	sp, #8
    5b54:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
					_current->base.prio :
    5b58:	6921      	ldr	r1, [r4, #16]
    5b5a:	e7f0      	b.n	5b3e <z_impl_k_mutex_lock+0x42>
	new_prio = new_prio_for_inheritance(_current->base.prio,
    5b5c:	f991 100e 	ldrsb.w	r1, [r1, #14]
    5b60:	f990 300e 	ldrsb.w	r3, [r0, #14]
	thread->base.thread_state &= ~states;
}

static inline bool z_is_under_prio_ceiling(int prio)
{
	return prio >= CONFIG_PRIORITY_CEILING;
    5b64:	4299      	cmp	r1, r3
    5b66:	bfa8      	it	ge
    5b68:	4619      	movge	r1, r3
    5b6a:	f06f 027e 	mvn.w	r2, #126	; 0x7e
    5b6e:	4291      	cmp	r1, r2
    5b70:	bfb8      	it	lt
    5b72:	4611      	movlt	r1, r2
	if (z_is_prio_higher(new_prio, mutex->owner->base.prio)) {
    5b74:	428b      	cmp	r3, r1
    5b76:	dd2f      	ble.n	5bd8 <z_impl_k_mutex_lock+0xdc>
		return z_set_prio(mutex->owner, new_prio);
    5b78:	f000 fa84 	bl	6084 <z_set_prio>
    5b7c:	4605      	mov	r5, r0
	int got_mutex = z_pend_curr(&lock, key, &mutex->wait_q, timeout);
    5b7e:	e9cd 6700 	strd	r6, r7, [sp]
    5b82:	481c      	ldr	r0, [pc, #112]	; (5bf4 <z_impl_k_mutex_lock+0xf8>)
    5b84:	4622      	mov	r2, r4
    5b86:	4641      	mov	r1, r8
    5b88:	f000 fa68 	bl	605c <z_pend_curr>
	if (got_mutex == 0) {
    5b8c:	2800      	cmp	r0, #0
    5b8e:	d0e0      	beq.n	5b52 <z_impl_k_mutex_lock+0x56>
	__asm__ volatile(
    5b90:	f04f 0320 	mov.w	r3, #32
    5b94:	f3ef 8611 	mrs	r6, BASEPRI
    5b98:	f383 8812 	msr	BASEPRI_MAX, r3
    5b9c:	f3bf 8f6f 	isb	sy
 * @return true if empty, false otherwise
 */

static inline bool sys_dlist_is_empty(sys_dlist_t *list)
{
	return list->head == list;
    5ba0:	6823      	ldr	r3, [r4, #0]
    5ba2:	6921      	ldr	r1, [r4, #16]
 * @return a pointer to the head element, NULL if list is empty
 */

static inline sys_dnode_t *sys_dlist_peek_head(sys_dlist_t *list)
{
	return sys_dlist_is_empty(list) ? NULL : list->head;
    5ba4:	429c      	cmp	r4, r3
    5ba6:	d00a      	beq.n	5bbe <z_impl_k_mutex_lock+0xc2>
		new_prio_for_inheritance(waiter->base.prio, mutex->owner_orig_prio) :
    5ba8:	b14b      	cbz	r3, 5bbe <z_impl_k_mutex_lock+0xc2>
    5baa:	f993 300e 	ldrsb.w	r3, [r3, #14]
    5bae:	4299      	cmp	r1, r3
    5bb0:	bfa8      	it	ge
    5bb2:	4619      	movge	r1, r3
    5bb4:	f06f 037e 	mvn.w	r3, #126	; 0x7e
    5bb8:	4299      	cmp	r1, r3
    5bba:	bfb8      	it	lt
    5bbc:	4619      	movlt	r1, r3
	resched = adjust_owner_prio(mutex, new_prio) || resched;
    5bbe:	68a0      	ldr	r0, [r4, #8]
	if (mutex->owner->base.prio != new_prio) {
    5bc0:	f990 300e 	ldrsb.w	r3, [r0, #14]
    5bc4:	4299      	cmp	r1, r3
    5bc6:	d109      	bne.n	5bdc <z_impl_k_mutex_lock+0xe0>
	if (resched) {
    5bc8:	b16d      	cbz	r5, 5be6 <z_impl_k_mutex_lock+0xea>
		z_reschedule(&lock, key);
    5bca:	480a      	ldr	r0, [pc, #40]	; (5bf4 <z_impl_k_mutex_lock+0xf8>)
    5bcc:	4631      	mov	r1, r6
    5bce:	f000 f8eb 	bl	5da8 <z_reschedule>
	return -EAGAIN;
    5bd2:	f06f 000a 	mvn.w	r0, #10
    5bd6:	e7bc      	b.n	5b52 <z_impl_k_mutex_lock+0x56>
	bool resched = false;
    5bd8:	2500      	movs	r5, #0
    5bda:	e7d0      	b.n	5b7e <z_impl_k_mutex_lock+0x82>
		return z_set_prio(mutex->owner, new_prio);
    5bdc:	f000 fa52 	bl	6084 <z_set_prio>
	resched = adjust_owner_prio(mutex, new_prio) || resched;
    5be0:	2800      	cmp	r0, #0
    5be2:	d1f2      	bne.n	5bca <z_impl_k_mutex_lock+0xce>
    5be4:	e7f0      	b.n	5bc8 <z_impl_k_mutex_lock+0xcc>
	__asm__ volatile(
    5be6:	f386 8811 	msr	BASEPRI, r6
    5bea:	f3bf 8f6f 	isb	sy
    5bee:	e7f0      	b.n	5bd2 <z_impl_k_mutex_lock+0xd6>
    5bf0:	200017fc 	.word	0x200017fc
    5bf4:	20001d77 	.word	0x20001d77

00005bf8 <z_impl_k_mutex_unlock>:
}
#include <syscalls/k_mutex_lock_mrsh.c>
#endif

int z_impl_k_mutex_unlock(struct k_mutex *mutex)
{
    5bf8:	b538      	push	{r3, r4, r5, lr}

	__ASSERT(!arch_is_in_isr(), "mutexes cannot be used inside ISRs");

	SYS_PORT_TRACING_OBJ_FUNC_ENTER(k_mutex, unlock, mutex);

	CHECKIF(mutex->owner == NULL) {
    5bfa:	6883      	ldr	r3, [r0, #8]
{
    5bfc:	4604      	mov	r4, r0
	CHECKIF(mutex->owner == NULL) {
    5bfe:	2b00      	cmp	r3, #0
    5c00:	d036      	beq.n	5c70 <z_impl_k_mutex_unlock+0x78>
		return -EINVAL;
	}
	/*
	 * The current thread does not own the mutex.
	 */
	CHECKIF(mutex->owner != _current) {
    5c02:	4a1e      	ldr	r2, [pc, #120]	; (5c7c <z_impl_k_mutex_unlock+0x84>)
    5c04:	6892      	ldr	r2, [r2, #8]
    5c06:	4293      	cmp	r3, r2
    5c08:	d135      	bne.n	5c76 <z_impl_k_mutex_unlock+0x7e>
static inline void z_sched_lock(void)
{
	__ASSERT(!arch_is_in_isr(), "");
	__ASSERT(_current->base.sched_locked != 1U, "");

	--_current->base.sched_locked;
    5c0a:	7bda      	ldrb	r2, [r3, #15]
    5c0c:	3a01      	subs	r2, #1
    5c0e:	73da      	strb	r2, [r3, #15]

	/*
	 * If we are the owner and count is greater than 1, then decrement
	 * the count and return and keep current thread as the owner.
	 */
	if (mutex->lock_count > 1U) {
    5c10:	68c3      	ldr	r3, [r0, #12]
    5c12:	2b01      	cmp	r3, #1
    5c14:	d905      	bls.n	5c22 <z_impl_k_mutex_unlock+0x2a>
		mutex->lock_count--;
    5c16:	3b01      	subs	r3, #1
    5c18:	60c3      	str	r3, [r0, #12]


k_mutex_unlock_return:
	SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_mutex, unlock, mutex, 0);

	k_sched_unlock();
    5c1a:	f000 fab1 	bl	6180 <k_sched_unlock>

	return 0;
    5c1e:	2000      	movs	r0, #0
}
    5c20:	bd38      	pop	{r3, r4, r5, pc}
	__asm__ volatile(
    5c22:	f04f 0320 	mov.w	r3, #32
    5c26:	f3ef 8511 	mrs	r5, BASEPRI
    5c2a:	f383 8812 	msr	BASEPRI_MAX, r3
    5c2e:	f3bf 8f6f 	isb	sy
	adjust_owner_prio(mutex, mutex->owner_orig_prio);
    5c32:	6901      	ldr	r1, [r0, #16]
    5c34:	6880      	ldr	r0, [r0, #8]
	if (mutex->owner->base.prio != new_prio) {
    5c36:	f990 300e 	ldrsb.w	r3, [r0, #14]
    5c3a:	4299      	cmp	r1, r3
    5c3c:	d001      	beq.n	5c42 <z_impl_k_mutex_unlock+0x4a>
		return z_set_prio(mutex->owner, new_prio);
    5c3e:	f000 fa21 	bl	6084 <z_set_prio>
	new_owner = z_unpend_first_thread(&mutex->wait_q);
    5c42:	4620      	mov	r0, r4
    5c44:	f003 feba 	bl	99bc <z_unpend_first_thread>
	mutex->owner = new_owner;
    5c48:	60a0      	str	r0, [r4, #8]
	if (new_owner != NULL) {
    5c4a:	b158      	cbz	r0, 5c64 <z_impl_k_mutex_unlock+0x6c>
		mutex->owner_orig_prio = new_owner->base.prio;
    5c4c:	f990 200e 	ldrsb.w	r2, [r0, #14]
    5c50:	6122      	str	r2, [r4, #16]
}

static ALWAYS_INLINE void
arch_thread_return_value_set(struct k_thread *thread, unsigned int value)
{
	thread->arch.swap_return_value = value;
    5c52:	2200      	movs	r2, #0
    5c54:	6782      	str	r2, [r0, #120]	; 0x78
		z_ready_thread(new_owner);
    5c56:	f003 fe3d 	bl	98d4 <z_ready_thread>
		z_reschedule(&lock, key);
    5c5a:	4809      	ldr	r0, [pc, #36]	; (5c80 <z_impl_k_mutex_unlock+0x88>)
    5c5c:	4629      	mov	r1, r5
    5c5e:	f000 f8a3 	bl	5da8 <z_reschedule>
    5c62:	e7da      	b.n	5c1a <z_impl_k_mutex_unlock+0x22>
		mutex->lock_count = 0U;
    5c64:	60e0      	str	r0, [r4, #12]
	__asm__ volatile(
    5c66:	f385 8811 	msr	BASEPRI, r5
    5c6a:	f3bf 8f6f 	isb	sy
    5c6e:	e7d4      	b.n	5c1a <z_impl_k_mutex_unlock+0x22>
		return -EINVAL;
    5c70:	f06f 0015 	mvn.w	r0, #21
    5c74:	e7d4      	b.n	5c20 <z_impl_k_mutex_unlock+0x28>
		return -EPERM;
    5c76:	f04f 30ff 	mov.w	r0, #4294967295
    5c7a:	e7d1      	b.n	5c20 <z_impl_k_mutex_unlock+0x28>
    5c7c:	200017fc 	.word	0x200017fc
    5c80:	20001d77 	.word	0x20001d77

00005c84 <z_impl_k_sem_give>:
	ARG_UNUSED(sem);
#endif
}

void z_impl_k_sem_give(struct k_sem *sem)
{
    5c84:	b538      	push	{r3, r4, r5, lr}
    5c86:	4604      	mov	r4, r0
	__asm__ volatile(
    5c88:	f04f 0320 	mov.w	r3, #32
    5c8c:	f3ef 8511 	mrs	r5, BASEPRI
    5c90:	f383 8812 	msr	BASEPRI_MAX, r3
    5c94:	f3bf 8f6f 	isb	sy
	k_spinlock_key_t key = k_spin_lock(&lock);
	struct k_thread *thread;

	SYS_PORT_TRACING_OBJ_FUNC_ENTER(k_sem, give, sem);

	thread = z_unpend_first_thread(&sem->wait_q);
    5c98:	f003 fe90 	bl	99bc <z_unpend_first_thread>

	if (thread != NULL) {
    5c9c:	b148      	cbz	r0, 5cb2 <z_impl_k_sem_give+0x2e>
    5c9e:	2200      	movs	r2, #0
    5ca0:	6782      	str	r2, [r0, #120]	; 0x78
		arch_thread_return_value_set(thread, 0);
		z_ready_thread(thread);
    5ca2:	f003 fe17 	bl	98d4 <z_ready_thread>
	} else {
		sem->count += (sem->count != sem->limit) ? 1U : 0U;
		handle_poll_events(sem);
	}

	z_reschedule(&lock, key);
    5ca6:	4629      	mov	r1, r5
    5ca8:	4805      	ldr	r0, [pc, #20]	; (5cc0 <z_impl_k_sem_give+0x3c>)

	SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_sem, give, sem);
}
    5caa:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
	z_reschedule(&lock, key);
    5cae:	f000 b87b 	b.w	5da8 <z_reschedule>
		sem->count += (sem->count != sem->limit) ? 1U : 0U;
    5cb2:	e9d4 3202 	ldrd	r3, r2, [r4, #8]
    5cb6:	429a      	cmp	r2, r3
    5cb8:	bf18      	it	ne
    5cba:	3301      	addne	r3, #1
    5cbc:	60a3      	str	r3, [r4, #8]
		handle_poll_events(sem);
    5cbe:	e7f2      	b.n	5ca6 <z_impl_k_sem_give+0x22>
    5cc0:	20001d77 	.word	0x20001d77

00005cc4 <z_impl_k_sem_take>:
}
#include <syscalls/k_sem_give_mrsh.c>
#endif

int z_impl_k_sem_take(struct k_sem *sem, k_timeout_t timeout)
{
    5cc4:	b537      	push	{r0, r1, r2, r4, r5, lr}
    5cc6:	4614      	mov	r4, r2
    5cc8:	461d      	mov	r5, r3
    5cca:	f04f 0320 	mov.w	r3, #32
    5cce:	f3ef 8111 	mrs	r1, BASEPRI
    5cd2:	f383 8812 	msr	BASEPRI_MAX, r3
    5cd6:	f3bf 8f6f 	isb	sy

	k_spinlock_key_t key = k_spin_lock(&lock);

	SYS_PORT_TRACING_OBJ_FUNC_ENTER(k_sem, take, sem, timeout);

	if (likely(sem->count > 0U)) {
    5cda:	6883      	ldr	r3, [r0, #8]
    5cdc:	b143      	cbz	r3, 5cf0 <z_impl_k_sem_take+0x2c>
		sem->count--;
    5cde:	3b01      	subs	r3, #1
    5ce0:	6083      	str	r3, [r0, #8]
	__asm__ volatile(
    5ce2:	f381 8811 	msr	BASEPRI, r1
    5ce6:	f3bf 8f6f 	isb	sy
		k_spin_unlock(&lock, key);
		ret = 0;
    5cea:	2000      	movs	r0, #0

out:
	SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_sem, take, sem, timeout, ret);

	return ret;
}
    5cec:	b003      	add	sp, #12
    5cee:	bd30      	pop	{r4, r5, pc}
	if (K_TIMEOUT_EQ(timeout, K_NO_WAIT)) {
    5cf0:	ea54 0305 	orrs.w	r3, r4, r5
    5cf4:	d106      	bne.n	5d04 <z_impl_k_sem_take+0x40>
    5cf6:	f381 8811 	msr	BASEPRI, r1
    5cfa:	f3bf 8f6f 	isb	sy
		ret = -EBUSY;
    5cfe:	f06f 000f 	mvn.w	r0, #15
    5d02:	e7f3      	b.n	5cec <z_impl_k_sem_take+0x28>
	ret = z_pend_curr(&lock, key, &sem->wait_q, timeout);
    5d04:	4602      	mov	r2, r0
    5d06:	e9cd 4500 	strd	r4, r5, [sp]
    5d0a:	4802      	ldr	r0, [pc, #8]	; (5d14 <z_impl_k_sem_take+0x50>)
    5d0c:	f000 f9a6 	bl	605c <z_pend_curr>
	return ret;
    5d10:	e7ec      	b.n	5cec <z_impl_k_sem_take+0x28>
    5d12:	bf00      	nop
    5d14:	20001d77 	.word	0x20001d77

00005d18 <z_reset_time_slice>:
 */
static struct k_thread *pending_current;
#endif

void z_reset_time_slice(void)
{
    5d18:	b510      	push	{r4, lr}
	/* Add the elapsed time since the last announced tick to the
	 * slice count, as we'll see those "expired" ticks arrive in a
	 * FUTURE z_time_slice() call.
	 */
	if (slice_time != 0) {
    5d1a:	4c08      	ldr	r4, [pc, #32]	; (5d3c <z_reset_time_slice+0x24>)
    5d1c:	6823      	ldr	r3, [r4, #0]
    5d1e:	b15b      	cbz	r3, 5d38 <z_reset_time_slice+0x20>
		_current_cpu->slice_ticks = slice_time + sys_clock_elapsed();
    5d20:	f7fe fcee 	bl	4700 <sys_clock_elapsed>
    5d24:	6822      	ldr	r2, [r4, #0]
    5d26:	4906      	ldr	r1, [pc, #24]	; (5d40 <z_reset_time_slice+0x28>)
    5d28:	4410      	add	r0, r2
    5d2a:	6108      	str	r0, [r1, #16]
		z_set_timeout_expiry(slice_time, false);
	}
}
    5d2c:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
		z_set_timeout_expiry(slice_time, false);
    5d30:	2100      	movs	r1, #0
    5d32:	4610      	mov	r0, r2
    5d34:	f003 be70 	b.w	9a18 <z_set_timeout_expiry>
}
    5d38:	bd10      	pop	{r4, pc}
    5d3a:	bf00      	nop
    5d3c:	2000182c 	.word	0x2000182c
    5d40:	200017fc 	.word	0x200017fc

00005d44 <k_sched_time_slice_set>:

void k_sched_time_slice_set(int32_t slice, int prio)
{
    5d44:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    5d46:	4604      	mov	r4, r0
    5d48:	460d      	mov	r5, r1
	__asm__ volatile(
    5d4a:	f04f 0320 	mov.w	r3, #32
    5d4e:	f3ef 8611 	mrs	r6, BASEPRI
    5d52:	f383 8812 	msr	BASEPRI_MAX, r3
    5d56:	f3bf 8f6f 	isb	sy
	LOCKED(&sched_spinlock) {
		_current_cpu->slice_ticks = 0;
    5d5a:	4b10      	ldr	r3, [pc, #64]	; (5d9c <k_sched_time_slice_set+0x58>)
    5d5c:	2200      	movs	r2, #0
			return (uint32_t)((t * to_hz + off) / from_hz);
    5d5e:	f44f 4700 	mov.w	r7, #32768	; 0x8000
    5d62:	f240 30e7 	movw	r0, #999	; 0x3e7
    5d66:	2100      	movs	r1, #0
    5d68:	611a      	str	r2, [r3, #16]
    5d6a:	fbe7 0104 	umlal	r0, r1, r7, r4
    5d6e:	2300      	movs	r3, #0
    5d70:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
    5d74:	f7fa f9c4 	bl	100 <__aeabi_uldivmod>
		slice_time = k_ms_to_ticks_ceil32(slice);
		if (IS_ENABLED(CONFIG_TICKLESS_KERNEL) && slice > 0) {
    5d78:	2c00      	cmp	r4, #0
    5d7a:	4b09      	ldr	r3, [pc, #36]	; (5da0 <k_sched_time_slice_set+0x5c>)
    5d7c:	dc09      	bgt.n	5d92 <k_sched_time_slice_set+0x4e>
			/* It's not possible to reliably set a 1-tick
			 * timeout if ticks aren't regular.
			 */
			slice_time = MAX(2, slice_time);
    5d7e:	6018      	str	r0, [r3, #0]
		}
		slice_max_prio = prio;
    5d80:	4b08      	ldr	r3, [pc, #32]	; (5da4 <k_sched_time_slice_set+0x60>)
    5d82:	601d      	str	r5, [r3, #0]
		z_reset_time_slice();
    5d84:	f7ff ffc8 	bl	5d18 <z_reset_time_slice>
	__asm__ volatile(
    5d88:	f386 8811 	msr	BASEPRI, r6
    5d8c:	f3bf 8f6f 	isb	sy
	}
}
    5d90:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
			slice_time = MAX(2, slice_time);
    5d92:	2802      	cmp	r0, #2
    5d94:	bfb8      	it	lt
    5d96:	2002      	movlt	r0, #2
    5d98:	e7f1      	b.n	5d7e <k_sched_time_slice_set+0x3a>
    5d9a:	bf00      	nop
    5d9c:	200017fc 	.word	0x200017fc
    5da0:	2000182c 	.word	0x2000182c
    5da4:	20001828 	.word	0x20001828

00005da8 <z_reschedule>:
{
#ifdef CONFIG_SMP
	_current_cpu->swap_ok = 0;
#endif

	return arch_irq_unlocked(key) && !arch_is_in_isr();
    5da8:	b949      	cbnz	r1, 5dbe <z_reschedule+0x16>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
    5daa:	f3ef 8005 	mrs	r0, IPSR
#endif
}

void z_reschedule(struct k_spinlock *lock, k_spinlock_key_t key)
{
	if (resched(key.key) && need_swap()) {
    5dae:	b930      	cbnz	r0, 5dbe <z_reschedule+0x16>
	new_thread = _kernel.ready_q.cache;
    5db0:	4b05      	ldr	r3, [pc, #20]	; (5dc8 <z_reschedule+0x20>)
	if (resched(key.key) && need_swap()) {
    5db2:	699a      	ldr	r2, [r3, #24]
    5db4:	689b      	ldr	r3, [r3, #8]
    5db6:	429a      	cmp	r2, r3
    5db8:	d001      	beq.n	5dbe <z_reschedule+0x16>
	ret = arch_swap(key);
    5dba:	f7fc bea9 	b.w	2b10 <arch_swap>
    5dbe:	f381 8811 	msr	BASEPRI, r1
    5dc2:	f3bf 8f6f 	isb	sy
		z_swap(lock, key);
	} else {
		k_spin_unlock(lock, key);
	}
}
    5dc6:	4770      	bx	lr
    5dc8:	200017fc 	.word	0x200017fc

00005dcc <k_sched_lock>:
	__asm__ volatile(
    5dcc:	f04f 0320 	mov.w	r3, #32
    5dd0:	f3ef 8111 	mrs	r1, BASEPRI
    5dd4:	f383 8812 	msr	BASEPRI_MAX, r3
    5dd8:	f3bf 8f6f 	isb	sy
    5ddc:	4b04      	ldr	r3, [pc, #16]	; (5df0 <k_sched_lock+0x24>)
    5dde:	689a      	ldr	r2, [r3, #8]
    5de0:	7bd3      	ldrb	r3, [r2, #15]
    5de2:	3b01      	subs	r3, #1
    5de4:	73d3      	strb	r3, [r2, #15]
	__asm__ volatile(
    5de6:	f381 8811 	msr	BASEPRI, r1
    5dea:	f3bf 8f6f 	isb	sy
	LOCKED(&sched_spinlock) {
		SYS_PORT_TRACING_FUNC(k_thread, sched_lock);

		z_sched_lock();
	}
}
    5dee:	4770      	bx	lr
    5df0:	200017fc 	.word	0x200017fc

00005df4 <update_cache>:
{
    5df4:	b538      	push	{r3, r4, r5, lr}
    5df6:	4602      	mov	r2, r0
	return _priq_run_best(curr_cpu_runq());
    5df8:	480c      	ldr	r0, [pc, #48]	; (5e2c <update_cache+0x38>)
    5dfa:	4d0d      	ldr	r5, [pc, #52]	; (5e30 <update_cache+0x3c>)
    5dfc:	f003 fd60 	bl	98c0 <z_priq_dumb_best>
	return (thread != NULL) ? thread : _current_cpu->idle_thread;
    5e00:	4604      	mov	r4, r0
    5e02:	b900      	cbnz	r0, 5e06 <update_cache+0x12>
    5e04:	68ec      	ldr	r4, [r5, #12]
	if (preempt_ok != 0) {
    5e06:	68ab      	ldr	r3, [r5, #8]
    5e08:	b94a      	cbnz	r2, 5e1e <update_cache+0x2a>
	if (z_is_thread_prevented_from_running(_current)) {
    5e0a:	7b5a      	ldrb	r2, [r3, #13]
    5e0c:	06d2      	lsls	r2, r2, #27
    5e0e:	d106      	bne.n	5e1e <update_cache+0x2a>
	if (IS_ENABLED(CONFIG_SWAP_NONATOMIC)
    5e10:	69a2      	ldr	r2, [r4, #24]
    5e12:	b922      	cbnz	r2, 5e1e <update_cache+0x2a>
	if (is_preempt(_current) || is_metairq(thread)) {
    5e14:	89da      	ldrh	r2, [r3, #14]
    5e16:	2a7f      	cmp	r2, #127	; 0x7f
    5e18:	d901      	bls.n	5e1e <update_cache+0x2a>
		_kernel.ready_q.cache = _current;
    5e1a:	61ab      	str	r3, [r5, #24]
}
    5e1c:	bd38      	pop	{r3, r4, r5, pc}
		if (thread != _current) {
    5e1e:	429c      	cmp	r4, r3
    5e20:	d001      	beq.n	5e26 <update_cache+0x32>
			z_reset_time_slice();
    5e22:	f7ff ff79 	bl	5d18 <z_reset_time_slice>
		_kernel.ready_q.cache = thread;
    5e26:	61ac      	str	r4, [r5, #24]
}
    5e28:	e7f8      	b.n	5e1c <update_cache+0x28>
    5e2a:	bf00      	nop
    5e2c:	20001818 	.word	0x20001818
    5e30:	200017fc 	.word	0x200017fc

00005e34 <move_thread_to_end_of_prio_q>:
{
    5e34:	b570      	push	{r4, r5, r6, lr}
	if (z_is_thread_queued(thread)) {
    5e36:	f990 200d 	ldrsb.w	r2, [r0, #13]
	return z_is_thread_state_set(thread, _THREAD_QUEUED);
    5e3a:	7b43      	ldrb	r3, [r0, #13]
    5e3c:	2a00      	cmp	r2, #0
{
    5e3e:	4601      	mov	r1, r0
	if (z_is_thread_queued(thread)) {
    5e40:	da04      	bge.n	5e4c <move_thread_to_end_of_prio_q+0x18>
	thread->base.thread_state &= ~_THREAD_QUEUED;
    5e42:	f003 037f 	and.w	r3, r3, #127	; 0x7f
    5e46:	7343      	strb	r3, [r0, #13]

void z_priq_dumb_remove(sys_dlist_t *pq, struct k_thread *thread)
{
	__ASSERT_NO_MSG(!z_is_idle_thread_object(thread));

	sys_dlist_remove(&thread->base.qnode_dlist);
    5e48:	f003 fd02 	bl	9850 <sys_dlist_remove>
	thread->base.thread_state |= _THREAD_QUEUED;
    5e4c:	7b4b      	ldrb	r3, [r1, #13]
	return list->head == list;
    5e4e:	4a17      	ldr	r2, [pc, #92]	; (5eac <move_thread_to_end_of_prio_q+0x78>)
    5e50:	f063 037f 	orn	r3, r3, #127	; 0x7f
    5e54:	4610      	mov	r0, r2
    5e56:	734b      	strb	r3, [r1, #13]
    5e58:	f850 3f1c 	ldr.w	r3, [r0, #28]!
 */

static inline sys_dnode_t *sys_dlist_peek_next(sys_dlist_t *list,
					       sys_dnode_t *node)
{
	return (node != NULL) ? sys_dlist_peek_next_no_check(list, node) : NULL;
    5e5c:	6a15      	ldr	r5, [r2, #32]
	return sys_dlist_is_empty(list) ? NULL : list->head;
    5e5e:	4283      	cmp	r3, r0
    5e60:	bf08      	it	eq
    5e62:	2300      	moveq	r3, #0
    5e64:	2b00      	cmp	r3, #0
    5e66:	bf38      	it	cc
    5e68:	2300      	movcc	r3, #0
	SYS_DLIST_FOR_EACH_CONTAINER(pq, t, base.qnode_dlist) {
    5e6a:	b1cb      	cbz	r3, 5ea0 <move_thread_to_end_of_prio_q+0x6c>
	int32_t b1 = thread_1->base.prio;
    5e6c:	f991 600e 	ldrsb.w	r6, [r1, #14]
	int32_t b2 = thread_2->base.prio;
    5e70:	f993 400e 	ldrsb.w	r4, [r3, #14]
	if (b1 != b2) {
    5e74:	42a6      	cmp	r6, r4
    5e76:	d00f      	beq.n	5e98 <move_thread_to_end_of_prio_q+0x64>
		return b2 - b1;
    5e78:	1ba4      	subs	r4, r4, r6
		if (z_sched_prio_cmp(thread, t) > 0) {
    5e7a:	2c00      	cmp	r4, #0
    5e7c:	dd0c      	ble.n	5e98 <move_thread_to_end_of_prio_q+0x64>
 * @param successor the position before which "node" will be inserted
 * @param node the element to insert
 */
static inline void sys_dlist_insert(sys_dnode_t *successor, sys_dnode_t *node)
{
	sys_dnode_t *const prev = successor->prev;
    5e7e:	6858      	ldr	r0, [r3, #4]

	node->prev = prev;
	node->next = successor;
    5e80:	e9c1 3000 	strd	r3, r0, [r1]
	prev->next = node;
    5e84:	6001      	str	r1, [r0, #0]
	successor->prev = node;
    5e86:	6059      	str	r1, [r3, #4]
	update_cache(thread == _current);
    5e88:	6890      	ldr	r0, [r2, #8]
    5e8a:	1a43      	subs	r3, r0, r1
    5e8c:	4258      	negs	r0, r3
}
    5e8e:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
	update_cache(thread == _current);
    5e92:	4158      	adcs	r0, r3
    5e94:	f7ff bfae 	b.w	5df4 <update_cache>
	return (node == list->tail) ? NULL : node->next;
    5e98:	42ab      	cmp	r3, r5
    5e9a:	d001      	beq.n	5ea0 <move_thread_to_end_of_prio_q+0x6c>
    5e9c:	681b      	ldr	r3, [r3, #0]
    5e9e:	e7e4      	b.n	5e6a <move_thread_to_end_of_prio_q+0x36>
	node->prev = tail;
    5ea0:	e9c1 0500 	strd	r0, r5, [r1]
	tail->next = node;
    5ea4:	6029      	str	r1, [r5, #0]
	list->tail = node;
    5ea6:	6211      	str	r1, [r2, #32]
}
    5ea8:	e7ee      	b.n	5e88 <move_thread_to_end_of_prio_q+0x54>
    5eaa:	bf00      	nop
    5eac:	200017fc 	.word	0x200017fc

00005eb0 <z_time_slice>:
{
    5eb0:	b570      	push	{r4, r5, r6, lr}
    5eb2:	4601      	mov	r1, r0
	__asm__ volatile(
    5eb4:	f04f 0320 	mov.w	r3, #32
    5eb8:	f3ef 8411 	mrs	r4, BASEPRI
    5ebc:	f383 8812 	msr	BASEPRI_MAX, r3
    5ec0:	f3bf 8f6f 	isb	sy
	if (pending_current == _current) {
    5ec4:	4b16      	ldr	r3, [pc, #88]	; (5f20 <z_time_slice+0x70>)
    5ec6:	4a17      	ldr	r2, [pc, #92]	; (5f24 <z_time_slice+0x74>)
    5ec8:	6898      	ldr	r0, [r3, #8]
    5eca:	6815      	ldr	r5, [r2, #0]
    5ecc:	42a8      	cmp	r0, r5
    5ece:	461d      	mov	r5, r3
    5ed0:	d106      	bne.n	5ee0 <z_time_slice+0x30>
			z_reset_time_slice();
    5ed2:	f7ff ff21 	bl	5d18 <z_reset_time_slice>
	__asm__ volatile(
    5ed6:	f384 8811 	msr	BASEPRI, r4
    5eda:	f3bf 8f6f 	isb	sy
}
    5ede:	bd70      	pop	{r4, r5, r6, pc}
	pending_current = NULL;
    5ee0:	2600      	movs	r6, #0
    5ee2:	6016      	str	r6, [r2, #0]
	if (slice_time && sliceable(_current)) {
    5ee4:	4a10      	ldr	r2, [pc, #64]	; (5f28 <z_time_slice+0x78>)
    5ee6:	6812      	ldr	r2, [r2, #0]
    5ee8:	b1ba      	cbz	r2, 5f1a <z_time_slice+0x6a>
		&& !z_is_idle_thread_object(thread);
    5eea:	89c2      	ldrh	r2, [r0, #14]
    5eec:	2a7f      	cmp	r2, #127	; 0x7f
    5eee:	d814      	bhi.n	5f1a <z_time_slice+0x6a>
		&& !z_is_thread_prevented_from_running(thread)
    5ef0:	7b42      	ldrb	r2, [r0, #13]
    5ef2:	06d2      	lsls	r2, r2, #27
    5ef4:	d111      	bne.n	5f1a <z_time_slice+0x6a>
		&& !z_is_prio_higher(thread->base.prio, slice_max_prio)
    5ef6:	4a0d      	ldr	r2, [pc, #52]	; (5f2c <z_time_slice+0x7c>)
    5ef8:	f990 600e 	ldrsb.w	r6, [r0, #14]
    5efc:	6812      	ldr	r2, [r2, #0]
    5efe:	4296      	cmp	r6, r2
    5f00:	db0b      	blt.n	5f1a <z_time_slice+0x6a>
		&& !z_is_idle_thread_object(thread);
    5f02:	4a0b      	ldr	r2, [pc, #44]	; (5f30 <z_time_slice+0x80>)
    5f04:	4290      	cmp	r0, r2
    5f06:	d008      	beq.n	5f1a <z_time_slice+0x6a>
		if (ticks >= _current_cpu->slice_ticks) {
    5f08:	691a      	ldr	r2, [r3, #16]
    5f0a:	428a      	cmp	r2, r1
    5f0c:	dc02      	bgt.n	5f14 <z_time_slice+0x64>
			move_thread_to_end_of_prio_q(_current);
    5f0e:	f7ff ff91 	bl	5e34 <move_thread_to_end_of_prio_q>
    5f12:	e7de      	b.n	5ed2 <z_time_slice+0x22>
			_current_cpu->slice_ticks -= ticks;
    5f14:	1a52      	subs	r2, r2, r1
    5f16:	611a      	str	r2, [r3, #16]
    5f18:	e7dd      	b.n	5ed6 <z_time_slice+0x26>
		_current_cpu->slice_ticks = 0;
    5f1a:	2300      	movs	r3, #0
    5f1c:	612b      	str	r3, [r5, #16]
    5f1e:	e7da      	b.n	5ed6 <z_time_slice+0x26>
    5f20:	200017fc 	.word	0x200017fc
    5f24:	20001824 	.word	0x20001824
    5f28:	2000182c 	.word	0x2000182c
    5f2c:	20001828 	.word	0x20001828
    5f30:	20000300 	.word	0x20000300

00005f34 <ready_thread>:
{
    5f34:	b470      	push	{r4, r5, r6}
	if (!z_is_thread_queued(thread) && z_is_thread_ready(thread)) {
    5f36:	f990 300d 	ldrsb.w	r3, [r0, #13]
    5f3a:	7b42      	ldrb	r2, [r0, #13]
    5f3c:	2b00      	cmp	r3, #0
    5f3e:	db2d      	blt.n	5f9c <ready_thread+0x68>
	return !((z_is_thread_prevented_from_running(thread)) != 0U ||
    5f40:	06d3      	lsls	r3, r2, #27
    5f42:	d12b      	bne.n	5f9c <ready_thread+0x68>
	return !sys_dnode_is_linked(&to->node);
    5f44:	6983      	ldr	r3, [r0, #24]
    5f46:	bb4b      	cbnz	r3, 5f9c <ready_thread+0x68>
	return list->head == list;
    5f48:	4915      	ldr	r1, [pc, #84]	; (5fa0 <ready_thread+0x6c>)
	thread->base.thread_state |= _THREAD_QUEUED;
    5f4a:	f062 027f 	orn	r2, r2, #127	; 0x7f
    5f4e:	7342      	strb	r2, [r0, #13]
    5f50:	460a      	mov	r2, r1
	return (node != NULL) ? sys_dlist_peek_next_no_check(list, node) : NULL;
    5f52:	6a0d      	ldr	r5, [r1, #32]
	return list->head == list;
    5f54:	f852 4f1c 	ldr.w	r4, [r2, #28]!
	return sys_dlist_is_empty(list) ? NULL : list->head;
    5f58:	4294      	cmp	r4, r2
    5f5a:	bf18      	it	ne
    5f5c:	4623      	movne	r3, r4
    5f5e:	2b00      	cmp	r3, #0
    5f60:	bf38      	it	cc
    5f62:	2300      	movcc	r3, #0
	SYS_DLIST_FOR_EACH_CONTAINER(pq, t, base.qnode_dlist) {
    5f64:	b1ab      	cbz	r3, 5f92 <ready_thread+0x5e>
	int32_t b1 = thread_1->base.prio;
    5f66:	f990 600e 	ldrsb.w	r6, [r0, #14]
	int32_t b2 = thread_2->base.prio;
    5f6a:	f993 400e 	ldrsb.w	r4, [r3, #14]
	if (b1 != b2) {
    5f6e:	42a6      	cmp	r6, r4
    5f70:	d00b      	beq.n	5f8a <ready_thread+0x56>
		return b2 - b1;
    5f72:	1ba4      	subs	r4, r4, r6
		if (z_sched_prio_cmp(thread, t) > 0) {
    5f74:	2c00      	cmp	r4, #0
    5f76:	dd08      	ble.n	5f8a <ready_thread+0x56>
	sys_dnode_t *const prev = successor->prev;
    5f78:	685a      	ldr	r2, [r3, #4]
	node->next = successor;
    5f7a:	e9c0 3200 	strd	r3, r2, [r0]
	prev->next = node;
    5f7e:	6010      	str	r0, [r2, #0]
	successor->prev = node;
    5f80:	6058      	str	r0, [r3, #4]
}
    5f82:	bc70      	pop	{r4, r5, r6}
		update_cache(0);
    5f84:	2000      	movs	r0, #0
    5f86:	f7ff bf35 	b.w	5df4 <update_cache>
	return (node == list->tail) ? NULL : node->next;
    5f8a:	42ab      	cmp	r3, r5
    5f8c:	d001      	beq.n	5f92 <ready_thread+0x5e>
    5f8e:	681b      	ldr	r3, [r3, #0]
    5f90:	e7e8      	b.n	5f64 <ready_thread+0x30>
	node->prev = tail;
    5f92:	e9c0 2500 	strd	r2, r5, [r0]
	tail->next = node;
    5f96:	6028      	str	r0, [r5, #0]
	list->tail = node;
    5f98:	6208      	str	r0, [r1, #32]
}
    5f9a:	e7f2      	b.n	5f82 <ready_thread+0x4e>
}
    5f9c:	bc70      	pop	{r4, r5, r6}
    5f9e:	4770      	bx	lr
    5fa0:	200017fc 	.word	0x200017fc

00005fa4 <z_sched_start>:
{
    5fa4:	b510      	push	{r4, lr}
	__asm__ volatile(
    5fa6:	f04f 0220 	mov.w	r2, #32
    5faa:	f3ef 8411 	mrs	r4, BASEPRI
    5fae:	f382 8812 	msr	BASEPRI_MAX, r2
    5fb2:	f3bf 8f6f 	isb	sy
	if (z_has_thread_started(thread)) {
    5fb6:	7b42      	ldrb	r2, [r0, #13]
    5fb8:	0751      	lsls	r1, r2, #29
    5fba:	d404      	bmi.n	5fc6 <z_sched_start+0x22>
	__asm__ volatile(
    5fbc:	f384 8811 	msr	BASEPRI, r4
    5fc0:	f3bf 8f6f 	isb	sy
}
    5fc4:	bd10      	pop	{r4, pc}
	thread->base.thread_state &= ~_THREAD_PRESTART;
    5fc6:	f022 0204 	bic.w	r2, r2, #4
    5fca:	7342      	strb	r2, [r0, #13]
	ready_thread(thread);
    5fcc:	f7ff ffb2 	bl	5f34 <ready_thread>
	z_reschedule(&sched_spinlock, key);
    5fd0:	4621      	mov	r1, r4
    5fd2:	4802      	ldr	r0, [pc, #8]	; (5fdc <z_sched_start+0x38>)
}
    5fd4:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
	z_reschedule(&sched_spinlock, key);
    5fd8:	f7ff bee6 	b.w	5da8 <z_reschedule>
    5fdc:	20001d77 	.word	0x20001d77

00005fe0 <unready_thread>:
{
    5fe0:	b508      	push	{r3, lr}
	if (z_is_thread_queued(thread)) {
    5fe2:	f990 200d 	ldrsb.w	r2, [r0, #13]
	return z_is_thread_state_set(thread, _THREAD_QUEUED);
    5fe6:	7b43      	ldrb	r3, [r0, #13]
    5fe8:	2a00      	cmp	r2, #0
{
    5fea:	4601      	mov	r1, r0
	if (z_is_thread_queued(thread)) {
    5fec:	da04      	bge.n	5ff8 <unready_thread+0x18>
	thread->base.thread_state &= ~_THREAD_QUEUED;
    5fee:	f003 037f 	and.w	r3, r3, #127	; 0x7f
    5ff2:	7343      	strb	r3, [r0, #13]
	sys_dlist_remove(&thread->base.qnode_dlist);
    5ff4:	f003 fc2c 	bl	9850 <sys_dlist_remove>
	update_cache(thread == _current);
    5ff8:	4b04      	ldr	r3, [pc, #16]	; (600c <unready_thread+0x2c>)
    5ffa:	6898      	ldr	r0, [r3, #8]
    5ffc:	1a43      	subs	r3, r0, r1
    5ffe:	4258      	negs	r0, r3
    6000:	4158      	adcs	r0, r3
}
    6002:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
	update_cache(thread == _current);
    6006:	f7ff bef5 	b.w	5df4 <update_cache>
    600a:	bf00      	nop
    600c:	200017fc 	.word	0x200017fc

00006010 <pend>:
{
    6010:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    6014:	4606      	mov	r6, r0
    6016:	4614      	mov	r4, r2
    6018:	461d      	mov	r5, r3
	__asm__ volatile(
    601a:	f04f 0320 	mov.w	r3, #32
    601e:	f3ef 8711 	mrs	r7, BASEPRI
    6022:	f383 8812 	msr	BASEPRI_MAX, r3
    6026:	f3bf 8f6f 	isb	sy
		add_to_waitq_locked(thread, wait_q);
    602a:	f003 fc85 	bl	9938 <add_to_waitq_locked>
	__asm__ volatile(
    602e:	f387 8811 	msr	BASEPRI, r7
    6032:	f3bf 8f6f 	isb	sy
	if (!K_TIMEOUT_EQ(timeout, K_FOREVER)) {
    6036:	1c6b      	adds	r3, r5, #1
    6038:	bf08      	it	eq
    603a:	f1b4 3fff 	cmpeq.w	r4, #4294967295
    603e:	d008      	beq.n	6052 <pend+0x42>
	z_add_timeout(&thread->base.timeout, z_thread_timeout, ticks);
    6040:	4622      	mov	r2, r4
    6042:	462b      	mov	r3, r5
    6044:	f106 0018 	add.w	r0, r6, #24
    6048:	4903      	ldr	r1, [pc, #12]	; (6058 <pend+0x48>)
}
    604a:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
    604e:	f000 ba2b 	b.w	64a8 <z_add_timeout>
    6052:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    6056:	bf00      	nop
    6058:	000098f5 	.word	0x000098f5

0000605c <z_pend_curr>:
{
    605c:	b510      	push	{r4, lr}
	pending_current = _current;
    605e:	4b07      	ldr	r3, [pc, #28]	; (607c <z_pend_curr+0x20>)
    6060:	6898      	ldr	r0, [r3, #8]
    6062:	4b07      	ldr	r3, [pc, #28]	; (6080 <z_pend_curr+0x24>)
{
    6064:	460c      	mov	r4, r1
	pending_current = _current;
    6066:	6018      	str	r0, [r3, #0]
{
    6068:	4611      	mov	r1, r2
	pend(_current, wait_q, timeout);
    606a:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
    606e:	f7ff ffcf 	bl	6010 <pend>
    6072:	4620      	mov	r0, r4
}
    6074:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    6078:	f7fc bd4a 	b.w	2b10 <arch_swap>
    607c:	200017fc 	.word	0x200017fc
    6080:	20001824 	.word	0x20001824

00006084 <z_set_prio>:
{
    6084:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    6086:	4604      	mov	r4, r0
	__asm__ volatile(
    6088:	f04f 0320 	mov.w	r3, #32
    608c:	f3ef 8611 	mrs	r6, BASEPRI
    6090:	f383 8812 	msr	BASEPRI_MAX, r3
    6094:	f3bf 8f6f 	isb	sy
	return !((z_is_thread_prevented_from_running(thread)) != 0U ||
    6098:	7b43      	ldrb	r3, [r0, #13]
    609a:	06da      	lsls	r2, r3, #27
    609c:	b249      	sxtb	r1, r1
    609e:	d138      	bne.n	6112 <z_set_prio+0x8e>
	return !sys_dnode_is_linked(&to->node);
    60a0:	6985      	ldr	r5, [r0, #24]
		if (need_sched) {
    60a2:	2d00      	cmp	r5, #0
    60a4:	d135      	bne.n	6112 <z_set_prio+0x8e>
	thread->base.thread_state &= ~_THREAD_QUEUED;
    60a6:	f003 037f 	and.w	r3, r3, #127	; 0x7f
    60aa:	7343      	strb	r3, [r0, #13]
	sys_dlist_remove(&thread->base.qnode_dlist);
    60ac:	f003 fbd0 	bl	9850 <sys_dlist_remove>
	thread->base.thread_state |= _THREAD_QUEUED;
    60b0:	7b43      	ldrb	r3, [r0, #13]
				thread->base.prio = prio;
    60b2:	7381      	strb	r1, [r0, #14]
	thread->base.thread_state |= _THREAD_QUEUED;
    60b4:	f063 037f 	orn	r3, r3, #127	; 0x7f
    60b8:	7343      	strb	r3, [r0, #13]
	return list->head == list;
    60ba:	4817      	ldr	r0, [pc, #92]	; (6118 <z_set_prio+0x94>)
    60bc:	4603      	mov	r3, r0
    60be:	f853 7f1c 	ldr.w	r7, [r3, #28]!
	return sys_dlist_is_empty(list) ? NULL : list->head;
    60c2:	429f      	cmp	r7, r3
    60c4:	bf18      	it	ne
    60c6:	463d      	movne	r5, r7
    60c8:	2d00      	cmp	r5, #0
	return (node != NULL) ? sys_dlist_peek_next_no_check(list, node) : NULL;
    60ca:	6a07      	ldr	r7, [r0, #32]
    60cc:	461a      	mov	r2, r3
    60ce:	462b      	mov	r3, r5
    60d0:	bf38      	it	cc
    60d2:	2300      	movcc	r3, #0
	SYS_DLIST_FOR_EACH_CONTAINER(pq, t, base.qnode_dlist) {
    60d4:	b1c3      	cbz	r3, 6108 <z_set_prio+0x84>
	int32_t b2 = thread_2->base.prio;
    60d6:	f993 500e 	ldrsb.w	r5, [r3, #14]
	if (b1 != b2) {
    60da:	42a9      	cmp	r1, r5
    60dc:	d010      	beq.n	6100 <z_set_prio+0x7c>
		return b2 - b1;
    60de:	1a6d      	subs	r5, r5, r1
		if (z_sched_prio_cmp(thread, t) > 0) {
    60e0:	2d00      	cmp	r5, #0
    60e2:	dd0d      	ble.n	6100 <z_set_prio+0x7c>
	sys_dnode_t *const prev = successor->prev;
    60e4:	685a      	ldr	r2, [r3, #4]
	node->next = successor;
    60e6:	e9c4 3200 	strd	r3, r2, [r4]
	prev->next = node;
    60ea:	6014      	str	r4, [r2, #0]
	successor->prev = node;
    60ec:	605c      	str	r4, [r3, #4]
			update_cache(1);
    60ee:	2001      	movs	r0, #1
    60f0:	f7ff fe80 	bl	5df4 <update_cache>
    60f4:	2001      	movs	r0, #1
	__asm__ volatile(
    60f6:	f386 8811 	msr	BASEPRI, r6
    60fa:	f3bf 8f6f 	isb	sy
}
    60fe:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	return (node == list->tail) ? NULL : node->next;
    6100:	42bb      	cmp	r3, r7
    6102:	d001      	beq.n	6108 <z_set_prio+0x84>
    6104:	681b      	ldr	r3, [r3, #0]
    6106:	e7e5      	b.n	60d4 <z_set_prio+0x50>
	node->prev = tail;
    6108:	e9c4 2700 	strd	r2, r7, [r4]
	tail->next = node;
    610c:	603c      	str	r4, [r7, #0]
	list->tail = node;
    610e:	6204      	str	r4, [r0, #32]
}
    6110:	e7ed      	b.n	60ee <z_set_prio+0x6a>
			thread->base.prio = prio;
    6112:	73a1      	strb	r1, [r4, #14]
    6114:	2000      	movs	r0, #0
    6116:	e7ee      	b.n	60f6 <z_set_prio+0x72>
    6118:	200017fc 	.word	0x200017fc

0000611c <z_impl_k_thread_suspend>:
{
    611c:	b570      	push	{r4, r5, r6, lr}
    611e:	4604      	mov	r4, r0
}

static inline int z_abort_thread_timeout(struct k_thread *thread)
{
	return z_abort_timeout(&thread->base.timeout);
    6120:	3018      	adds	r0, #24
    6122:	f003 fc63 	bl	99ec <z_abort_timeout>
	__asm__ volatile(
    6126:	f04f 0320 	mov.w	r3, #32
    612a:	f3ef 8611 	mrs	r6, BASEPRI
    612e:	f383 8812 	msr	BASEPRI_MAX, r3
    6132:	f3bf 8f6f 	isb	sy
		if (z_is_thread_queued(thread)) {
    6136:	f994 200d 	ldrsb.w	r2, [r4, #13]
	return z_is_thread_state_set(thread, _THREAD_QUEUED);
    613a:	7b63      	ldrb	r3, [r4, #13]
    613c:	2a00      	cmp	r2, #0
    613e:	da05      	bge.n	614c <z_impl_k_thread_suspend+0x30>
	thread->base.thread_state &= ~_THREAD_QUEUED;
    6140:	f003 037f 	and.w	r3, r3, #127	; 0x7f
    6144:	7363      	strb	r3, [r4, #13]
	sys_dlist_remove(&thread->base.qnode_dlist);
    6146:	4620      	mov	r0, r4
    6148:	f003 fb82 	bl	9850 <sys_dlist_remove>
		update_cache(thread == _current);
    614c:	4d0b      	ldr	r5, [pc, #44]	; (617c <z_impl_k_thread_suspend+0x60>)
	thread->base.thread_state |= _THREAD_SUSPENDED;
    614e:	7b63      	ldrb	r3, [r4, #13]
    6150:	68a8      	ldr	r0, [r5, #8]
    6152:	f043 0310 	orr.w	r3, r3, #16
    6156:	7363      	strb	r3, [r4, #13]
    6158:	1b03      	subs	r3, r0, r4
    615a:	4258      	negs	r0, r3
    615c:	4158      	adcs	r0, r3
    615e:	f7ff fe49 	bl	5df4 <update_cache>
	__asm__ volatile(
    6162:	f386 8811 	msr	BASEPRI, r6
    6166:	f3bf 8f6f 	isb	sy
	if (thread == _current) {
    616a:	68ab      	ldr	r3, [r5, #8]
    616c:	42a3      	cmp	r3, r4
    616e:	d103      	bne.n	6178 <z_impl_k_thread_suspend+0x5c>
}
    6170:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
		z_reschedule_unlocked();
    6174:	f003 bb9a 	b.w	98ac <z_reschedule_unlocked>
}
    6178:	bd70      	pop	{r4, r5, r6, pc}
    617a:	bf00      	nop
    617c:	200017fc 	.word	0x200017fc

00006180 <k_sched_unlock>:
{
    6180:	b510      	push	{r4, lr}
	__asm__ volatile(
    6182:	f04f 0320 	mov.w	r3, #32
    6186:	f3ef 8411 	mrs	r4, BASEPRI
    618a:	f383 8812 	msr	BASEPRI_MAX, r3
    618e:	f3bf 8f6f 	isb	sy
		++_current->base.sched_locked;
    6192:	4b08      	ldr	r3, [pc, #32]	; (61b4 <k_sched_unlock+0x34>)
    6194:	689a      	ldr	r2, [r3, #8]
    6196:	7bd3      	ldrb	r3, [r2, #15]
    6198:	3301      	adds	r3, #1
    619a:	73d3      	strb	r3, [r2, #15]
		update_cache(0);
    619c:	2000      	movs	r0, #0
    619e:	f7ff fe29 	bl	5df4 <update_cache>
	__asm__ volatile(
    61a2:	f384 8811 	msr	BASEPRI, r4
    61a6:	f3bf 8f6f 	isb	sy
}
    61aa:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
	z_reschedule_unlocked();
    61ae:	f003 bb7d 	b.w	98ac <z_reschedule_unlocked>
    61b2:	bf00      	nop
    61b4:	200017fc 	.word	0x200017fc

000061b8 <z_sched_init>:
	list->head = (sys_dnode_t *)list;
    61b8:	4b04      	ldr	r3, [pc, #16]	; (61cc <z_sched_init+0x14>)
#else
	init_ready_q(&_kernel.ready_q);
#endif

#ifdef CONFIG_TIMESLICING
	k_sched_time_slice_set(CONFIG_TIMESLICE_SIZE,
    61ba:	2100      	movs	r1, #0
    61bc:	f103 021c 	add.w	r2, r3, #28
	list->tail = (sys_dnode_t *)list;
    61c0:	e9c3 2207 	strd	r2, r2, [r3, #28]
    61c4:	4608      	mov	r0, r1
    61c6:	f7ff bdbd 	b.w	5d44 <k_sched_time_slice_set>
    61ca:	bf00      	nop
    61cc:	200017fc 	.word	0x200017fc

000061d0 <z_impl_k_yield>:
#include <syscalls/k_thread_deadline_set_mrsh.c>
#endif
#endif

void z_impl_k_yield(void)
{
    61d0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
	__asm__ volatile(
    61d2:	f04f 0320 	mov.w	r3, #32
    61d6:	f3ef 8411 	mrs	r4, BASEPRI
    61da:	f383 8812 	msr	BASEPRI_MAX, r3
    61de:	f3bf 8f6f 	isb	sy

	k_spinlock_key_t key = k_spin_lock(&sched_spinlock);

	if (!IS_ENABLED(CONFIG_SMP) ||
	    z_is_thread_queued(_current)) {
		dequeue_thread(_current);
    61e2:	491b      	ldr	r1, [pc, #108]	; (6250 <z_impl_k_yield+0x80>)
    61e4:	6888      	ldr	r0, [r1, #8]
	thread->base.thread_state &= ~_THREAD_QUEUED;
    61e6:	7b43      	ldrb	r3, [r0, #13]
    61e8:	f003 037f 	and.w	r3, r3, #127	; 0x7f
    61ec:	7343      	strb	r3, [r0, #13]
	sys_dlist_remove(&thread->base.qnode_dlist);
    61ee:	f003 fb2f 	bl	9850 <sys_dlist_remove>
	}
	queue_thread(_current);
    61f2:	688a      	ldr	r2, [r1, #8]
	thread->base.thread_state |= _THREAD_QUEUED;
    61f4:	7b53      	ldrb	r3, [r2, #13]
	return list->head == list;
    61f6:	4608      	mov	r0, r1
    61f8:	f063 037f 	orn	r3, r3, #127	; 0x7f
    61fc:	7353      	strb	r3, [r2, #13]
    61fe:	f850 3f1c 	ldr.w	r3, [r0, #28]!
	return (node != NULL) ? sys_dlist_peek_next_no_check(list, node) : NULL;
    6202:	6a0e      	ldr	r6, [r1, #32]
	return sys_dlist_is_empty(list) ? NULL : list->head;
    6204:	4283      	cmp	r3, r0
    6206:	bf08      	it	eq
    6208:	2300      	moveq	r3, #0
    620a:	2b00      	cmp	r3, #0
    620c:	bf38      	it	cc
    620e:	2300      	movcc	r3, #0
	SYS_DLIST_FOR_EACH_CONTAINER(pq, t, base.qnode_dlist) {
    6210:	b1cb      	cbz	r3, 6246 <z_impl_k_yield+0x76>
	int32_t b1 = thread_1->base.prio;
    6212:	f992 700e 	ldrsb.w	r7, [r2, #14]
	int32_t b2 = thread_2->base.prio;
    6216:	f993 500e 	ldrsb.w	r5, [r3, #14]
	if (b1 != b2) {
    621a:	42af      	cmp	r7, r5
    621c:	d00f      	beq.n	623e <z_impl_k_yield+0x6e>
		return b2 - b1;
    621e:	1bed      	subs	r5, r5, r7
		if (z_sched_prio_cmp(thread, t) > 0) {
    6220:	2d00      	cmp	r5, #0
    6222:	dd0c      	ble.n	623e <z_impl_k_yield+0x6e>
	sys_dnode_t *const prev = successor->prev;
    6224:	6859      	ldr	r1, [r3, #4]
	node->next = successor;
    6226:	e9c2 3100 	strd	r3, r1, [r2]
	prev->next = node;
    622a:	600a      	str	r2, [r1, #0]
	successor->prev = node;
    622c:	605a      	str	r2, [r3, #4]
	update_cache(1);
    622e:	2001      	movs	r0, #1
    6230:	f7ff fde0 	bl	5df4 <update_cache>
    6234:	4620      	mov	r0, r4
	z_swap(&sched_spinlock, key);
}
    6236:	e8bd 40f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, lr}
    623a:	f7fc bc69 	b.w	2b10 <arch_swap>
	return (node == list->tail) ? NULL : node->next;
    623e:	42b3      	cmp	r3, r6
    6240:	d001      	beq.n	6246 <z_impl_k_yield+0x76>
    6242:	681b      	ldr	r3, [r3, #0]
    6244:	e7e4      	b.n	6210 <z_impl_k_yield+0x40>
	node->prev = tail;
    6246:	e9c2 0600 	strd	r0, r6, [r2]
	tail->next = node;
    624a:	6032      	str	r2, [r6, #0]
	list->tail = node;
    624c:	620a      	str	r2, [r1, #32]
}
    624e:	e7ee      	b.n	622e <z_impl_k_yield+0x5e>
    6250:	200017fc 	.word	0x200017fc

00006254 <z_tick_sleep>:
}
#include <syscalls/k_yield_mrsh.c>
#endif

static int32_t z_tick_sleep(k_ticks_t ticks)
{
    6254:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    6258:	4604      	mov	r4, r0
    625a:	460d      	mov	r5, r1
	 */
	LOG_DBG("thread %p for %u ticks", _current, ticks);
#endif

	/* wait of 0 ms is treated as a 'yield' */
	if (ticks == 0) {
    625c:	ea54 0105 	orrs.w	r1, r4, r5
    6260:	d104      	bne.n	626c <z_tick_sleep+0x18>
	z_impl_k_yield();
    6262:	f7ff ffb5 	bl	61d0 <z_impl_k_yield>
		k_yield();
		return 0;
    6266:	2000      	movs	r0, #0
		return ticks;
	}
#endif

	return 0;
}
    6268:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
	if (Z_TICK_ABS(ticks) <= 0) {
    626c:	f06f 0101 	mvn.w	r1, #1
    6270:	1a0a      	subs	r2, r1, r0
    6272:	f04f 31ff 	mov.w	r1, #4294967295
    6276:	eb61 0305 	sbc.w	r3, r1, r5
    627a:	2a01      	cmp	r2, #1
    627c:	f173 0300 	sbcs.w	r3, r3, #0
    6280:	da2a      	bge.n	62d8 <z_tick_sleep+0x84>
		expected_wakeup_ticks = ticks + sys_clock_tick_get_32();
    6282:	f003 fbe4 	bl	9a4e <sys_clock_tick_get_32>
    6286:	1906      	adds	r6, r0, r4
    6288:	f04f 0320 	mov.w	r3, #32
    628c:	f3ef 8811 	mrs	r8, BASEPRI
    6290:	f383 8812 	msr	BASEPRI_MAX, r3
    6294:	f3bf 8f6f 	isb	sy
	pending_current = _current;
    6298:	4f11      	ldr	r7, [pc, #68]	; (62e0 <z_tick_sleep+0x8c>)
    629a:	4b12      	ldr	r3, [pc, #72]	; (62e4 <z_tick_sleep+0x90>)
    629c:	68b8      	ldr	r0, [r7, #8]
    629e:	6018      	str	r0, [r3, #0]
	unready_thread(_current);
    62a0:	f7ff fe9e 	bl	5fe0 <unready_thread>
	z_add_thread_timeout(_current, timeout);
    62a4:	68b8      	ldr	r0, [r7, #8]
	z_add_timeout(&thread->base.timeout, z_thread_timeout, ticks);
    62a6:	4910      	ldr	r1, [pc, #64]	; (62e8 <z_tick_sleep+0x94>)
    62a8:	4622      	mov	r2, r4
    62aa:	462b      	mov	r3, r5
    62ac:	3018      	adds	r0, #24
    62ae:	f000 f8fb 	bl	64a8 <z_add_timeout>
	z_mark_thread_as_suspended(_current);
    62b2:	68ba      	ldr	r2, [r7, #8]
    62b4:	7b53      	ldrb	r3, [r2, #13]
    62b6:	f043 0310 	orr.w	r3, r3, #16
    62ba:	7353      	strb	r3, [r2, #13]
    62bc:	4640      	mov	r0, r8
    62be:	f7fc fc27 	bl	2b10 <arch_swap>
	ticks = (k_ticks_t)expected_wakeup_ticks - sys_clock_tick_get_32();
    62c2:	f003 fbc4 	bl	9a4e <sys_clock_tick_get_32>
    62c6:	1a30      	subs	r0, r6, r0
    62c8:	eb66 0106 	sbc.w	r1, r6, r6
	if (ticks > 0) {
    62cc:	2801      	cmp	r0, #1
    62ce:	f171 0300 	sbcs.w	r3, r1, #0
		return ticks;
    62d2:	bfb8      	it	lt
    62d4:	2000      	movlt	r0, #0
    62d6:	e7c7      	b.n	6268 <z_tick_sleep+0x14>
		expected_wakeup_ticks = Z_TICK_ABS(ticks);
    62d8:	f06f 0601 	mvn.w	r6, #1
    62dc:	1a36      	subs	r6, r6, r0
    62de:	e7d3      	b.n	6288 <z_tick_sleep+0x34>
    62e0:	200017fc 	.word	0x200017fc
    62e4:	20001824 	.word	0x20001824
    62e8:	000098f5 	.word	0x000098f5

000062ec <z_impl_k_sleep>:

int32_t z_impl_k_sleep(k_timeout_t timeout)
{
    62ec:	b508      	push	{r3, lr}
    62ee:	460b      	mov	r3, r1
	__ASSERT(!arch_is_in_isr(), "");

	SYS_PORT_TRACING_FUNC_ENTER(k_thread, sleep, timeout);

	/* in case of K_FOREVER, we suspend */
	if (K_TIMEOUT_EQ(timeout, K_FOREVER)) {
    62f0:	3301      	adds	r3, #1
    62f2:	bf08      	it	eq
    62f4:	f1b0 3fff 	cmpeq.w	r0, #4294967295
    62f8:	d106      	bne.n	6308 <z_impl_k_sleep+0x1c>
		k_thread_suspend(_current);
    62fa:	4b08      	ldr	r3, [pc, #32]	; (631c <z_impl_k_sleep+0x30>)
    62fc:	6898      	ldr	r0, [r3, #8]
	z_impl_k_thread_suspend(thread);
    62fe:	f7ff ff0d 	bl	611c <z_impl_k_thread_suspend>

		SYS_PORT_TRACING_FUNC_EXIT(k_thread, sleep, timeout, (int32_t) K_TICKS_FOREVER);

		return (int32_t) K_TICKS_FOREVER;
    6302:	f04f 30ff 	mov.w	r0, #4294967295
	int32_t ret = k_ticks_to_ms_floor64(ticks);

	SYS_PORT_TRACING_FUNC_EXIT(k_thread, sleep, timeout, ret);

	return ret;
}
    6306:	bd08      	pop	{r3, pc}
	ticks = z_tick_sleep(ticks);
    6308:	f7ff ffa4 	bl	6254 <z_tick_sleep>
			return (t * to_hz + off) / from_hz;
    630c:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
    6310:	fb80 0103 	smull	r0, r1, r0, r3
    6314:	0bc3      	lsrs	r3, r0, #15
    6316:	ea43 4041 	orr.w	r0, r3, r1, lsl #17
	return ret;
    631a:	e7f4      	b.n	6306 <z_impl_k_sleep+0x1a>
    631c:	200017fc 	.word	0x200017fc

00006320 <z_impl_z_current_get>:

#ifdef CONFIG_SMP
	arch_irq_unlock(k);
#endif
	return ret;
}
    6320:	4b01      	ldr	r3, [pc, #4]	; (6328 <z_impl_z_current_get+0x8>)
    6322:	6898      	ldr	r0, [r3, #8]
    6324:	4770      	bx	lr
    6326:	bf00      	nop
    6328:	200017fc 	.word	0x200017fc

0000632c <z_thread_abort>:
#endif
	}
}

void z_thread_abort(struct k_thread *thread)
{
    632c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    6330:	4604      	mov	r4, r0
    6332:	f04f 0320 	mov.w	r3, #32
    6336:	f3ef 8611 	mrs	r6, BASEPRI
    633a:	f383 8812 	msr	BASEPRI_MAX, r3
    633e:	f3bf 8f6f 	isb	sy
	k_spinlock_key_t key = k_spin_lock(&sched_spinlock);

	if ((thread->base.thread_state & _THREAD_DEAD) != 0U) {
    6342:	7b43      	ldrb	r3, [r0, #13]
    6344:	071a      	lsls	r2, r3, #28
    6346:	d505      	bpl.n	6354 <z_thread_abort+0x28>
	__asm__ volatile(
    6348:	f386 8811 	msr	BASEPRI, r6
    634c:	f3bf 8f6f 	isb	sy
	if (thread == _current && !arch_is_in_isr()) {
		z_swap(&sched_spinlock, key);
		__ASSERT(false, "aborted _current back from dead");
	}
	k_spin_unlock(&sched_spinlock, key);
}
    6350:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
		thread->base.thread_state &= ~_THREAD_ABORTING;
    6354:	f023 0220 	bic.w	r2, r3, #32
    6358:	f042 0108 	orr.w	r1, r2, #8
		if (z_is_thread_queued(thread)) {
    635c:	09d2      	lsrs	r2, r2, #7
    635e:	d120      	bne.n	63a2 <z_thread_abort+0x76>
		thread->base.thread_state &= ~_THREAD_ABORTING;
    6360:	7341      	strb	r1, [r0, #13]
		if (thread->base.pended_on != NULL) {
    6362:	68a3      	ldr	r3, [r4, #8]
    6364:	b113      	cbz	r3, 636c <z_thread_abort+0x40>
			unpend_thread_no_timeout(thread);
    6366:	4620      	mov	r0, r4
    6368:	f003 fa7a 	bl	9860 <unpend_thread_no_timeout>
	return z_abort_timeout(&thread->base.timeout);
    636c:	f104 0018 	add.w	r0, r4, #24
    6370:	f003 fb3c 	bl	99ec <z_abort_timeout>
}

static inline struct k_thread *z_waitq_head(_wait_q_t *w)
{
	return (struct k_thread *)sys_dlist_peek_head(&w->waitq);
    6374:	f104 0758 	add.w	r7, r4, #88	; 0x58
    6378:	f04f 0800 	mov.w	r8, #0
	return list->head == list;
    637c:	6da5      	ldr	r5, [r4, #88]	; 0x58
	return sys_dlist_is_empty(list) ? NULL : list->head;
    637e:	42bd      	cmp	r5, r7
    6380:	d000      	beq.n	6384 <z_thread_abort+0x58>
	while ((thread = z_waitq_head(wait_q)) != NULL) {
    6382:	b9b5      	cbnz	r5, 63b2 <z_thread_abort+0x86>
		update_cache(1);
    6384:	2001      	movs	r0, #1
    6386:	f7ff fd35 	bl	5df4 <update_cache>
	if (thread == _current && !arch_is_in_isr()) {
    638a:	4b10      	ldr	r3, [pc, #64]	; (63cc <z_thread_abort+0xa0>)
    638c:	689b      	ldr	r3, [r3, #8]
    638e:	42a3      	cmp	r3, r4
    6390:	d1da      	bne.n	6348 <z_thread_abort+0x1c>
    6392:	f3ef 8305 	mrs	r3, IPSR
    6396:	2b00      	cmp	r3, #0
    6398:	d1d6      	bne.n	6348 <z_thread_abort+0x1c>
    639a:	4630      	mov	r0, r6
    639c:	f7fc fbb8 	bl	2b10 <arch_swap>
	return ret;
    63a0:	e7d2      	b.n	6348 <z_thread_abort+0x1c>
	thread->base.thread_state &= ~_THREAD_QUEUED;
    63a2:	f003 035f 	and.w	r3, r3, #95	; 0x5f
    63a6:	f043 0308 	orr.w	r3, r3, #8
    63aa:	7343      	strb	r3, [r0, #13]
	sys_dlist_remove(&thread->base.qnode_dlist);
    63ac:	f003 fa50 	bl	9850 <sys_dlist_remove>
}
    63b0:	e7d7      	b.n	6362 <z_thread_abort+0x36>
		unpend_thread_no_timeout(thread);
    63b2:	4628      	mov	r0, r5
    63b4:	f003 fa54 	bl	9860 <unpend_thread_no_timeout>
    63b8:	f105 0018 	add.w	r0, r5, #24
    63bc:	f003 fb16 	bl	99ec <z_abort_timeout>
    63c0:	f8c5 8078 	str.w	r8, [r5, #120]	; 0x78
		ready_thread(thread);
    63c4:	4628      	mov	r0, r5
    63c6:	f7ff fdb5 	bl	5f34 <ready_thread>
    63ca:	e7d7      	b.n	637c <z_thread_abort+0x50>
    63cc:	200017fc 	.word	0x200017fc

000063d0 <z_data_copy>:
 * This routine copies the data section from ROM to RAM.
 *
 * @return N/A
 */
void z_data_copy(void)
{
    63d0:	b508      	push	{r3, lr}
	(void)memcpy(&__data_region_start, &__data_region_load_start,
		 __data_region_end - __data_region_start);
    63d2:	4806      	ldr	r0, [pc, #24]	; (63ec <z_data_copy+0x1c>)
	(void)memcpy(&__data_region_start, &__data_region_load_start,
    63d4:	4a06      	ldr	r2, [pc, #24]	; (63f0 <z_data_copy+0x20>)
    63d6:	4907      	ldr	r1, [pc, #28]	; (63f4 <z_data_copy+0x24>)
    63d8:	1a12      	subs	r2, r2, r0
    63da:	f002 fec6 	bl	916a <memcpy>
#else
	(void)memcpy(&_app_smem_start, &_app_smem_rom_start,
		 _app_smem_end - _app_smem_start);
#endif /* CONFIG_STACK_CANARIES */
#endif /* CONFIG_USERSPACE */
}
    63de:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
	(void)memcpy(&__ramfunc_start, &__ramfunc_load_start,
    63e2:	4a05      	ldr	r2, [pc, #20]	; (63f8 <z_data_copy+0x28>)
    63e4:	4905      	ldr	r1, [pc, #20]	; (63fc <z_data_copy+0x2c>)
    63e6:	4806      	ldr	r0, [pc, #24]	; (6400 <z_data_copy+0x30>)
    63e8:	f002 bebf 	b.w	916a <memcpy>
    63ec:	20000000 	.word	0x20000000
    63f0:	200001e8 	.word	0x200001e8
    63f4:	0000ae98 	.word	0x0000ae98
    63f8:	00000000 	.word	0x00000000
    63fc:	0000ae98 	.word	0x0000ae98
    6400:	20000000 	.word	0x20000000

00006404 <elapsed>:
	sys_dlist_remove(&t->node);
}

static int32_t elapsed(void)
{
	return announce_remaining == 0 ? sys_clock_elapsed() : 0U;
    6404:	4b03      	ldr	r3, [pc, #12]	; (6414 <elapsed+0x10>)
    6406:	681b      	ldr	r3, [r3, #0]
    6408:	b90b      	cbnz	r3, 640e <elapsed+0xa>
    640a:	f7fe b979 	b.w	4700 <sys_clock_elapsed>
}
    640e:	2000      	movs	r0, #0
    6410:	4770      	bx	lr
    6412:	bf00      	nop
    6414:	20001830 	.word	0x20001830

00006418 <remove_timeout>:
{
    6418:	b530      	push	{r4, r5, lr}
    641a:	6803      	ldr	r3, [r0, #0]
	return (node != NULL) ? sys_dlist_peek_next_no_check(list, node) : NULL;
    641c:	b168      	cbz	r0, 643a <remove_timeout+0x22>
    641e:	4a0a      	ldr	r2, [pc, #40]	; (6448 <remove_timeout+0x30>)
	return (node == list->tail) ? NULL : node->next;
    6420:	6852      	ldr	r2, [r2, #4]
    6422:	4290      	cmp	r0, r2
    6424:	d009      	beq.n	643a <remove_timeout+0x22>
	if (next(t) != NULL) {
    6426:	b143      	cbz	r3, 643a <remove_timeout+0x22>
		next(t)->dticks += t->dticks;
    6428:	e9d3 2104 	ldrd	r2, r1, [r3, #16]
    642c:	e9d0 4504 	ldrd	r4, r5, [r0, #16]
    6430:	1912      	adds	r2, r2, r4
    6432:	eb45 0101 	adc.w	r1, r5, r1
    6436:	e9c3 2104 	strd	r2, r1, [r3, #16]
 * @return N/A
 */

static inline void sys_dlist_remove(sys_dnode_t *node)
{
	sys_dnode_t *const prev = node->prev;
    643a:	6842      	ldr	r2, [r0, #4]
	sys_dnode_t *const next = node->next;

	prev->next = next;
    643c:	6013      	str	r3, [r2, #0]
	next->prev = prev;
    643e:	605a      	str	r2, [r3, #4]
	node->next = NULL;
    6440:	2300      	movs	r3, #0
	node->prev = NULL;
    6442:	e9c0 3300 	strd	r3, r3, [r0]
}
    6446:	bd30      	pop	{r4, r5, pc}
    6448:	200000e4 	.word	0x200000e4

0000644c <next_timeout>:
	return list->head == list;
    644c:	4b14      	ldr	r3, [pc, #80]	; (64a0 <next_timeout+0x54>)

static int32_t next_timeout(void)
{
    644e:	b510      	push	{r4, lr}
    6450:	681c      	ldr	r4, [r3, #0]
	return sys_dlist_is_empty(list) ? NULL : list->head;
    6452:	429c      	cmp	r4, r3
    6454:	bf08      	it	eq
    6456:	2400      	moveq	r4, #0
	struct _timeout *to = first();
	int32_t ticks_elapsed = elapsed();
    6458:	f7ff ffd4 	bl	6404 <elapsed>
	int32_t ret = to == NULL ? MAX_WAIT
    645c:	b1d4      	cbz	r4, 6494 <next_timeout+0x48>
		: CLAMP(to->dticks - ticks_elapsed, 0, MAX_WAIT);
    645e:	e9d4 2304 	ldrd	r2, r3, [r4, #16]
    6462:	1a12      	subs	r2, r2, r0
    6464:	eb63 73e0 	sbc.w	r3, r3, r0, asr #31
	int32_t ret = to == NULL ? MAX_WAIT
    6468:	2a01      	cmp	r2, #1
    646a:	f173 0100 	sbcs.w	r1, r3, #0
    646e:	db14      	blt.n	649a <next_timeout+0x4e>
		: CLAMP(to->dticks - ticks_elapsed, 0, MAX_WAIT);
    6470:	4610      	mov	r0, r2
    6472:	f06f 4200 	mvn.w	r2, #2147483648	; 0x80000000
    6476:	4619      	mov	r1, r3
    6478:	4282      	cmp	r2, r0
    647a:	f04f 0300 	mov.w	r3, #0
    647e:	eb73 0401 	sbcs.w	r4, r3, r1
    6482:	da00      	bge.n	6486 <next_timeout+0x3a>
    6484:	4610      	mov	r0, r2

#ifdef CONFIG_TIMESLICING
	if (_current_cpu->slice_ticks && _current_cpu->slice_ticks < ret) {
    6486:	4b07      	ldr	r3, [pc, #28]	; (64a4 <next_timeout+0x58>)
    6488:	691b      	ldr	r3, [r3, #16]
    648a:	b113      	cbz	r3, 6492 <next_timeout+0x46>
    648c:	4298      	cmp	r0, r3
    648e:	bfa8      	it	ge
    6490:	4618      	movge	r0, r3
		ret = _current_cpu->slice_ticks;
	}
#endif
	return ret;
}
    6492:	bd10      	pop	{r4, pc}
	int32_t ret = to == NULL ? MAX_WAIT
    6494:	f06f 4000 	mvn.w	r0, #2147483648	; 0x80000000
    6498:	e7f5      	b.n	6486 <next_timeout+0x3a>
    649a:	2000      	movs	r0, #0
    649c:	e7f3      	b.n	6486 <next_timeout+0x3a>
    649e:	bf00      	nop
    64a0:	200000e4 	.word	0x200000e4
    64a4:	200017fc 	.word	0x200017fc

000064a8 <z_add_timeout>:

void z_add_timeout(struct _timeout *to, _timeout_func_t fn,
		   k_timeout_t timeout)
{
	if (K_TIMEOUT_EQ(timeout, K_FOREVER)) {
    64a8:	f1b3 3fff 	cmp.w	r3, #4294967295
    64ac:	bf08      	it	eq
    64ae:	f1b2 3fff 	cmpeq.w	r2, #4294967295
{
    64b2:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
    64b6:	4604      	mov	r4, r0
    64b8:	4692      	mov	sl, r2
    64ba:	469b      	mov	fp, r3
	if (K_TIMEOUT_EQ(timeout, K_FOREVER)) {
    64bc:	d073      	beq.n	65a6 <z_add_timeout+0xfe>
#ifdef CONFIG_KERNEL_COHERENCE
	__ASSERT_NO_MSG(arch_mem_coherent(to));
#endif

	__ASSERT(!sys_dnode_is_linked(&to->node), "");
	to->fn = fn;
    64be:	6081      	str	r1, [r0, #8]
	__asm__ volatile(
    64c0:	f04f 0320 	mov.w	r3, #32
    64c4:	f3ef 8511 	mrs	r5, BASEPRI
    64c8:	f383 8812 	msr	BASEPRI_MAX, r3
    64cc:	f3bf 8f6f 	isb	sy

	LOCKED(&timeout_lock) {
		struct _timeout *t;

		if (IS_ENABLED(CONFIG_TIMEOUT_64BIT) &&
		    Z_TICK_ABS(timeout.ticks) >= 0) {
    64d0:	f06f 0301 	mvn.w	r3, #1
    64d4:	ebb3 080a 	subs.w	r8, r3, sl
    64d8:	f04f 32ff 	mov.w	r2, #4294967295
    64dc:	eb62 090b 	sbc.w	r9, r2, fp
		if (IS_ENABLED(CONFIG_TIMEOUT_64BIT) &&
    64e0:	f1b8 0f00 	cmp.w	r8, #0
    64e4:	f179 0100 	sbcs.w	r1, r9, #0
    64e8:	db1c      	blt.n	6524 <z_add_timeout+0x7c>
			k_ticks_t ticks = Z_TICK_ABS(timeout.ticks) - curr_tick;
    64ea:	4830      	ldr	r0, [pc, #192]	; (65ac <z_add_timeout+0x104>)
    64ec:	e9d0 1000 	ldrd	r1, r0, [r0]
    64f0:	1a5b      	subs	r3, r3, r1
    64f2:	eb62 0200 	sbc.w	r2, r2, r0

			to->dticks = MAX(1, ticks);
    64f6:	ebb3 060a 	subs.w	r6, r3, sl
    64fa:	eb62 070b 	sbc.w	r7, r2, fp
    64fe:	2e01      	cmp	r6, #1
    6500:	f177 0300 	sbcs.w	r3, r7, #0
    6504:	bfbc      	itt	lt
    6506:	2601      	movlt	r6, #1
    6508:	2700      	movlt	r7, #0
    650a:	e9c4 6704 	strd	r6, r7, [r4, #16]
	return list->head == list;
    650e:	4a28      	ldr	r2, [pc, #160]	; (65b0 <z_add_timeout+0x108>)
    6510:	e9d2 3c00 	ldrd	r3, ip, [r2]
	return sys_dlist_is_empty(list) ? NULL : list->head;
    6514:	4293      	cmp	r3, r2
    6516:	d11e      	bne.n	6556 <z_add_timeout+0xae>
	node->prev = tail;
    6518:	e9c4 2c00 	strd	r2, ip, [r4]
	tail->next = node;
    651c:	f8cc 4000 	str.w	r4, [ip]
	list->tail = node;
    6520:	6054      	str	r4, [r2, #4]
}
    6522:	e02d      	b.n	6580 <z_add_timeout+0xd8>
		} else {
			to->dticks = timeout.ticks + 1 + elapsed();
    6524:	f7ff ff6e 	bl	6404 <elapsed>
    6528:	f11a 0301 	adds.w	r3, sl, #1
    652c:	9300      	str	r3, [sp, #0]
    652e:	f14b 0300 	adc.w	r3, fp, #0
    6532:	9301      	str	r3, [sp, #4]
    6534:	e9dd 2300 	ldrd	r2, r3, [sp]
    6538:	1812      	adds	r2, r2, r0
    653a:	eb43 73e0 	adc.w	r3, r3, r0, asr #31
    653e:	e9c4 2304 	strd	r2, r3, [r4, #16]
    6542:	e7e4      	b.n	650e <z_add_timeout+0x66>
			if (t->dticks > to->dticks) {
				t->dticks -= to->dticks;
				sys_dlist_insert(&t->node, &to->node);
				break;
			}
			to->dticks -= t->dticks;
    6544:	ebb6 0008 	subs.w	r0, r6, r8
    6548:	eb67 0109 	sbc.w	r1, r7, r9
	return (node == list->tail) ? NULL : node->next;
    654c:	4563      	cmp	r3, ip
    654e:	e9c4 0104 	strd	r0, r1, [r4, #16]
    6552:	d0e1      	beq.n	6518 <z_add_timeout+0x70>
    6554:	681b      	ldr	r3, [r3, #0]
		for (t = first(); t != NULL; t = next(t)) {
    6556:	2b00      	cmp	r3, #0
    6558:	d0de      	beq.n	6518 <z_add_timeout+0x70>
			if (t->dticks > to->dticks) {
    655a:	e9d3 8904 	ldrd	r8, r9, [r3, #16]
    655e:	e9d4 6704 	ldrd	r6, r7, [r4, #16]
    6562:	4546      	cmp	r6, r8
    6564:	eb77 0109 	sbcs.w	r1, r7, r9
    6568:	daec      	bge.n	6544 <z_add_timeout+0x9c>
				t->dticks -= to->dticks;
    656a:	ebb8 0006 	subs.w	r0, r8, r6
    656e:	eb69 0107 	sbc.w	r1, r9, r7
    6572:	e9c3 0104 	strd	r0, r1, [r3, #16]
	sys_dnode_t *const prev = successor->prev;
    6576:	6859      	ldr	r1, [r3, #4]
	node->next = successor;
    6578:	e9c4 3100 	strd	r3, r1, [r4]
	prev->next = node;
    657c:	600c      	str	r4, [r1, #0]
	successor->prev = node;
    657e:	605c      	str	r4, [r3, #4]
	return list->head == list;
    6580:	6813      	ldr	r3, [r2, #0]
	return sys_dlist_is_empty(list) ? NULL : list->head;
    6582:	4293      	cmp	r3, r2
    6584:	d00b      	beq.n	659e <z_add_timeout+0xf6>

		if (t == NULL) {
			sys_dlist_append(&timeout_list, &to->node);
		}

		if (to == first()) {
    6586:	429c      	cmp	r4, r3
    6588:	d109      	bne.n	659e <z_add_timeout+0xf6>
			 * last announcement, and slice_ticks is based
			 * on that. It means that the time remaining for
			 * the next announcement can be less than
			 * slice_ticks.
			 */
			int32_t next_time = next_timeout();
    658a:	f7ff ff5f 	bl	644c <next_timeout>

			if (next_time == 0 ||
    658e:	b118      	cbz	r0, 6598 <z_add_timeout+0xf0>
			    _current_cpu->slice_ticks != next_time) {
    6590:	4b08      	ldr	r3, [pc, #32]	; (65b4 <z_add_timeout+0x10c>)
			if (next_time == 0 ||
    6592:	691b      	ldr	r3, [r3, #16]
    6594:	4283      	cmp	r3, r0
    6596:	d002      	beq.n	659e <z_add_timeout+0xf6>
				sys_clock_set_timeout(next_time, false);
    6598:	2100      	movs	r1, #0
    659a:	f7fe f881 	bl	46a0 <sys_clock_set_timeout>
	__asm__ volatile(
    659e:	f385 8811 	msr	BASEPRI, r5
    65a2:	f3bf 8f6f 	isb	sy
#else
			sys_clock_set_timeout(next_timeout(), false);
#endif	/* CONFIG_TIMESLICING */
		}
	}
}
    65a6:	b003      	add	sp, #12
    65a8:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    65ac:	20000480 	.word	0x20000480
    65b0:	200000e4 	.word	0x200000e4
    65b4:	200017fc 	.word	0x200017fc

000065b8 <sys_clock_announce>:
		}
	}
}

void sys_clock_announce(int32_t ticks)
{
    65b8:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
    65bc:	4606      	mov	r6, r0
#ifdef CONFIG_TIMESLICING
	z_time_slice(ticks);
    65be:	f7ff fc77 	bl	5eb0 <z_time_slice>
	__asm__ volatile(
    65c2:	f04f 0320 	mov.w	r3, #32
    65c6:	f3ef 8411 	mrs	r4, BASEPRI
    65ca:	f383 8812 	msr	BASEPRI_MAX, r3
    65ce:	f3bf 8f6f 	isb	sy
#endif

	k_spinlock_key_t key = k_spin_lock(&timeout_lock);

	announce_remaining = ticks;
    65d2:	4d2c      	ldr	r5, [pc, #176]	; (6684 <sys_clock_announce+0xcc>)
    65d4:	f8df a0b0 	ldr.w	sl, [pc, #176]	; 6688 <sys_clock_announce+0xd0>
	return list->head == list;
    65d8:	f8df b0b0 	ldr.w	fp, [pc, #176]	; 668c <sys_clock_announce+0xd4>
    65dc:	602e      	str	r6, [r5, #0]

	while (first() != NULL && first()->dticks <= announce_remaining) {
    65de:	4651      	mov	r1, sl
    65e0:	f8d5 c000 	ldr.w	ip, [r5]
    65e4:	f8db 0000 	ldr.w	r0, [fp]
    65e8:	4662      	mov	r2, ip
    65ea:	17d3      	asrs	r3, r2, #31
	return sys_dlist_is_empty(list) ? NULL : list->head;
    65ec:	4558      	cmp	r0, fp
    65ee:	e9da 8900 	ldrd	r8, r9, [sl]
    65f2:	e9cd 2300 	strd	r2, r3, [sp]
    65f6:	d00d      	beq.n	6614 <sys_clock_announce+0x5c>
    65f8:	b160      	cbz	r0, 6614 <sys_clock_announce+0x5c>
    65fa:	e9d0 6704 	ldrd	r6, r7, [r0, #16]
    65fe:	45b4      	cmp	ip, r6
    6600:	41bb      	sbcs	r3, r7
    6602:	da1e      	bge.n	6642 <sys_clock_announce+0x8a>
		t->fn(t);
		key = k_spin_lock(&timeout_lock);
	}

	if (first() != NULL) {
		first()->dticks -= announce_remaining;
    6604:	9b00      	ldr	r3, [sp, #0]
    6606:	ebb6 0c03 	subs.w	ip, r6, r3
    660a:	9b01      	ldr	r3, [sp, #4]
    660c:	eb67 0603 	sbc.w	r6, r7, r3
    6610:	e9c0 c604 	strd	ip, r6, [r0, #16]
	}

	curr_tick += announce_remaining;
    6614:	9b00      	ldr	r3, [sp, #0]
    6616:	eb13 0208 	adds.w	r2, r3, r8
    661a:	9b01      	ldr	r3, [sp, #4]
	announce_remaining = 0;
    661c:	f04f 0600 	mov.w	r6, #0
	curr_tick += announce_remaining;
    6620:	eb43 0309 	adc.w	r3, r3, r9
    6624:	e9c1 2300 	strd	r2, r3, [r1]
	announce_remaining = 0;
    6628:	602e      	str	r6, [r5, #0]

	sys_clock_set_timeout(next_timeout(), false);
    662a:	f7ff ff0f 	bl	644c <next_timeout>
    662e:	4631      	mov	r1, r6
    6630:	f7fe f836 	bl	46a0 <sys_clock_set_timeout>
	__asm__ volatile(
    6634:	f384 8811 	msr	BASEPRI, r4
    6638:	f3bf 8f6f 	isb	sy

	k_spin_unlock(&timeout_lock, key);
}
    663c:	b003      	add	sp, #12
    663e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
		curr_tick += dt;
    6642:	eb18 0806 	adds.w	r8, r8, r6
		t->dticks = 0;
    6646:	f04f 0200 	mov.w	r2, #0
    664a:	f04f 0300 	mov.w	r3, #0
		curr_tick += dt;
    664e:	eb49 79e6 	adc.w	r9, r9, r6, asr #31
		t->dticks = 0;
    6652:	e9c0 2304 	strd	r2, r3, [r0, #16]
		announce_remaining -= dt;
    6656:	ebac 0606 	sub.w	r6, ip, r6
		curr_tick += dt;
    665a:	e9ca 8900 	strd	r8, r9, [sl]
		announce_remaining -= dt;
    665e:	602e      	str	r6, [r5, #0]
		remove_timeout(t);
    6660:	f7ff feda 	bl	6418 <remove_timeout>
    6664:	f384 8811 	msr	BASEPRI, r4
    6668:	f3bf 8f6f 	isb	sy
		t->fn(t);
    666c:	6883      	ldr	r3, [r0, #8]
    666e:	4798      	blx	r3
	__asm__ volatile(
    6670:	f04f 0320 	mov.w	r3, #32
    6674:	f3ef 8411 	mrs	r4, BASEPRI
    6678:	f383 8812 	msr	BASEPRI_MAX, r3
    667c:	f3bf 8f6f 	isb	sy

	/* Note that we need to use the underlying arch-specific lock
	 * implementation.  The "irq_lock()" API in SMP context is
	 * actually a wrapper for a global spinlock!
	 */
	k.key = arch_irq_lock();
    6680:	4901      	ldr	r1, [pc, #4]	; (6688 <sys_clock_announce+0xd0>)
#endif

#ifdef CONFIG_SPIN_VALIDATE
	z_spin_lock_set_owner(l);
#endif
	return k;
    6682:	e7ad      	b.n	65e0 <sys_clock_announce+0x28>
    6684:	20001830 	.word	0x20001830
    6688:	20000480 	.word	0x20000480
    668c:	200000e4 	.word	0x200000e4

00006690 <sys_clock_tick_get>:

int64_t sys_clock_tick_get(void)
{
    6690:	b510      	push	{r4, lr}
    6692:	f04f 0320 	mov.w	r3, #32
    6696:	f3ef 8411 	mrs	r4, BASEPRI
    669a:	f383 8812 	msr	BASEPRI_MAX, r3
    669e:	f3bf 8f6f 	isb	sy
	uint64_t t = 0U;

	LOCKED(&timeout_lock) {
		t = curr_tick + sys_clock_elapsed();
    66a2:	f7fe f82d 	bl	4700 <sys_clock_elapsed>
    66a6:	4b06      	ldr	r3, [pc, #24]	; (66c0 <sys_clock_tick_get+0x30>)
    66a8:	e9d3 2300 	ldrd	r2, r3, [r3]
    66ac:	1812      	adds	r2, r2, r0
    66ae:	f143 0300 	adc.w	r3, r3, #0
	__asm__ volatile(
    66b2:	f384 8811 	msr	BASEPRI, r4
    66b6:	f3bf 8f6f 	isb	sy
	}
	return t;
}
    66ba:	4610      	mov	r0, r2
    66bc:	4619      	mov	r1, r3
    66be:	bd10      	pop	{r4, pc}
    66c0:	20000480 	.word	0x20000480

000066c4 <z_timer_expiration_handler>:
 * @param t  Timeout used by the timer.
 *
 * @return N/A
 */
void z_timer_expiration_handler(struct _timeout *t)
{
    66c4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    66c6:	4604      	mov	r4, r0
	__asm__ volatile(
    66c8:	f04f 0320 	mov.w	r3, #32
    66cc:	f3ef 8511 	mrs	r5, BASEPRI
    66d0:	f383 8812 	msr	BASEPRI_MAX, r3
    66d4:	f3bf 8f6f 	isb	sy

	/*
	 * if the timer is periodic, start it again; don't add _TICK_ALIGN
	 * since we're already aligned to a tick boundary
	 */
	if (!K_TIMEOUT_EQ(timer->period, K_NO_WAIT) &&
    66d8:	e9d0 230a 	ldrd	r2, r3, [r0, #40]	; 0x28
    66dc:	1c56      	adds	r6, r2, #1
    66de:	f143 0700 	adc.w	r7, r3, #0
    66e2:	2f00      	cmp	r7, #0
    66e4:	bf08      	it	eq
    66e6:	2e02      	cmpeq	r6, #2
    66e8:	d302      	bcc.n	66f0 <z_timer_expiration_handler+0x2c>
	    !K_TIMEOUT_EQ(timer->period, K_FOREVER)) {
		z_add_timeout(&timer->timeout, z_timer_expiration_handler,
    66ea:	4917      	ldr	r1, [pc, #92]	; (6748 <z_timer_expiration_handler+0x84>)
    66ec:	f7ff fedc 	bl	64a8 <z_add_timeout>
			     timer->period);
	}

	/* update timer's status */
	timer->status += 1U;
    66f0:	6b23      	ldr	r3, [r4, #48]	; 0x30
    66f2:	3301      	adds	r3, #1
    66f4:	6323      	str	r3, [r4, #48]	; 0x30

	/* invoke timer expiry function */
	if (timer->expiry_fn != NULL) {
    66f6:	6a23      	ldr	r3, [r4, #32]
    66f8:	b173      	cbz	r3, 6718 <z_timer_expiration_handler+0x54>
	__asm__ volatile(
    66fa:	f385 8811 	msr	BASEPRI, r5
    66fe:	f3bf 8f6f 	isb	sy
		/* Unlock for user handler. */
		k_spin_unlock(&lock, key);
		timer->expiry_fn(timer);
    6702:	6a23      	ldr	r3, [r4, #32]
    6704:	4620      	mov	r0, r4
    6706:	4798      	blx	r3
	__asm__ volatile(
    6708:	f04f 0320 	mov.w	r3, #32
    670c:	f3ef 8511 	mrs	r5, BASEPRI
    6710:	f383 8812 	msr	BASEPRI_MAX, r3
    6714:	f3bf 8f6f 	isb	sy
	return list->head == list;
    6718:	f854 6f18 	ldr.w	r6, [r4, #24]!
	return sys_dlist_is_empty(list) ? NULL : list->head;
    671c:	42a6      	cmp	r6, r4
    671e:	d000      	beq.n	6722 <z_timer_expiration_handler+0x5e>
		return;
	}

	thread = z_waitq_head(&timer->wait_q);

	if (thread == NULL) {
    6720:	b926      	cbnz	r6, 672c <z_timer_expiration_handler+0x68>
	__asm__ volatile(
    6722:	f385 8811 	msr	BASEPRI, r5
    6726:	f3bf 8f6f 	isb	sy
	arch_thread_return_value_set(thread, 0);

	k_spin_unlock(&lock, key);

	z_ready_thread(thread);
}
    672a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	z_unpend_thread_no_timeout(thread);
    672c:	4630      	mov	r0, r6
    672e:	f003 f8a1 	bl	9874 <z_unpend_thread_no_timeout>
    6732:	2300      	movs	r3, #0
    6734:	67b3      	str	r3, [r6, #120]	; 0x78
    6736:	f385 8811 	msr	BASEPRI, r5
    673a:	f3bf 8f6f 	isb	sy
	z_ready_thread(thread);
    673e:	4630      	mov	r0, r6
}
    6740:	e8bd 40f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, lr}
	z_ready_thread(thread);
    6744:	f003 b8c6 	b.w	98d4 <z_ready_thread>
    6748:	000066c5 	.word	0x000066c5

0000674c <z_impl_k_timer_start>:
}


void z_impl_k_timer_start(struct k_timer *timer, k_timeout_t duration,
			  k_timeout_t period)
{
    674c:	e92d 4f73 	stmdb	sp!, {r0, r1, r4, r5, r6, r8, r9, sl, fp, lr}
    6750:	4619      	mov	r1, r3
    6752:	4606      	mov	r6, r0
	SYS_PORT_TRACING_OBJ_FUNC(k_timer, start, timer);

	if (K_TIMEOUT_EQ(duration, K_FOREVER)) {
    6754:	1c4c      	adds	r4, r1, #1
{
    6756:	4610      	mov	r0, r2
	if (K_TIMEOUT_EQ(duration, K_FOREVER)) {
    6758:	bf08      	it	eq
    675a:	f1b0 3fff 	cmpeq.w	r0, #4294967295
{
    675e:	e9dd 230a 	ldrd	r2, r3, [sp, #40]	; 0x28
    6762:	4680      	mov	r8, r0
    6764:	4689      	mov	r9, r1
	if (K_TIMEOUT_EQ(duration, K_FOREVER)) {
    6766:	d04c      	beq.n	6802 <z_impl_k_timer_start+0xb6>
    6768:	461d      	mov	r5, r3
	 * for backwards compatibility.  This is unfortunate
	 * (i.e. k_timer_start() doesn't treat its initial sleep
	 * argument the same way k_sleep() does), but historical.  The
	 * timer_api test relies on this behavior.
	 */
	if (!K_TIMEOUT_EQ(period, K_FOREVER) && period.ticks != 0 &&
    676a:	1c6b      	adds	r3, r5, #1
    676c:	bf08      	it	eq
    676e:	f1b2 3fff 	cmpeq.w	r2, #4294967295
    6772:	4614      	mov	r4, r2
    6774:	d019      	beq.n	67aa <z_impl_k_timer_start+0x5e>
    6776:	ea54 0305 	orrs.w	r3, r4, r5
    677a:	d016      	beq.n	67aa <z_impl_k_timer_start+0x5e>
	    Z_TICK_ABS(period.ticks) < 0) {
    677c:	f06f 0301 	mvn.w	r3, #1
    6780:	ebb3 0a02 	subs.w	sl, r3, r2
    6784:	f04f 33ff 	mov.w	r3, #4294967295
    6788:	eb63 0b05 	sbc.w	fp, r3, r5
	if (!K_TIMEOUT_EQ(period, K_FOREVER) && period.ticks != 0 &&
    678c:	f1ba 0f00 	cmp.w	sl, #0
    6790:	f17b 0300 	sbcs.w	r3, fp, #0
    6794:	da09      	bge.n	67aa <z_impl_k_timer_start+0x5e>
		period.ticks = MAX(period.ticks - 1, 1);
    6796:	f112 34ff 	adds.w	r4, r2, #4294967295
    679a:	f145 35ff 	adc.w	r5, r5, #4294967295
    679e:	2c01      	cmp	r4, #1
    67a0:	f175 0300 	sbcs.w	r3, r5, #0
    67a4:	bfbc      	itt	lt
    67a6:	2401      	movlt	r4, #1
    67a8:	2500      	movlt	r5, #0
	}
	if (Z_TICK_ABS(duration.ticks) < 0) {
    67aa:	f06f 0301 	mvn.w	r3, #1
    67ae:	1a1b      	subs	r3, r3, r0
    67b0:	9300      	str	r3, [sp, #0]
    67b2:	f04f 33ff 	mov.w	r3, #4294967295
    67b6:	eb63 0301 	sbc.w	r3, r3, r1
    67ba:	9301      	str	r3, [sp, #4]
    67bc:	e9dd 2300 	ldrd	r2, r3, [sp]
    67c0:	2a00      	cmp	r2, #0
    67c2:	f173 0300 	sbcs.w	r3, r3, #0
    67c6:	da0c      	bge.n	67e2 <z_impl_k_timer_start+0x96>
		duration.ticks = MAX(duration.ticks - 1, 0);
    67c8:	f110 38ff 	adds.w	r8, r0, #4294967295
    67cc:	f141 39ff 	adc.w	r9, r1, #4294967295
    67d0:	f1b8 0f00 	cmp.w	r8, #0
    67d4:	f179 0300 	sbcs.w	r3, r9, #0
    67d8:	bfbc      	itt	lt
    67da:	f04f 0800 	movlt.w	r8, #0
    67de:	f04f 0900 	movlt.w	r9, #0
	}

	(void)z_abort_timeout(&timer->timeout);
    67e2:	4630      	mov	r0, r6
    67e4:	f003 f902 	bl	99ec <z_abort_timeout>
	timer->period = period;
	timer->status = 0U;
    67e8:	2300      	movs	r3, #0

	z_add_timeout(&timer->timeout, z_timer_expiration_handler,
    67ea:	4907      	ldr	r1, [pc, #28]	; (6808 <z_impl_k_timer_start+0xbc>)
	timer->status = 0U;
    67ec:	6333      	str	r3, [r6, #48]	; 0x30
	z_add_timeout(&timer->timeout, z_timer_expiration_handler,
    67ee:	4642      	mov	r2, r8
    67f0:	464b      	mov	r3, r9
    67f2:	4630      	mov	r0, r6
	timer->period = period;
    67f4:	e9c6 450a 	strd	r4, r5, [r6, #40]	; 0x28
		     duration);
}
    67f8:	b002      	add	sp, #8
    67fa:	e8bd 4f70 	ldmia.w	sp!, {r4, r5, r6, r8, r9, sl, fp, lr}
	z_add_timeout(&timer->timeout, z_timer_expiration_handler,
    67fe:	f7ff be53 	b.w	64a8 <z_add_timeout>
}
    6802:	b002      	add	sp, #8
    6804:	e8bd 8f70 	ldmia.w	sp!, {r4, r5, r6, r8, r9, sl, fp, pc}
    6808:	000066c5 	.word	0x000066c5

0000680c <boot_banner>:
		k_busy_wait(CONFIG_BOOT_DELAY * USEC_PER_MSEC);
	}

#if defined(CONFIG_BOOT_BANNER)
#ifdef BUILD_VERSION
	printk("*** Booting Zephyr OS build %s %s ***\n",
    680c:	4a02      	ldr	r2, [pc, #8]	; (6818 <boot_banner+0xc>)
    680e:	4903      	ldr	r1, [pc, #12]	; (681c <boot_banner+0x10>)
    6810:	4803      	ldr	r0, [pc, #12]	; (6820 <boot_banner+0x14>)
    6812:	f001 bfa2 	b.w	875a <printk>
    6816:	bf00      	nop
    6818:	0000a694 	.word	0x0000a694
    681c:	0000ae61 	.word	0x0000ae61
    6820:	0000ae6e 	.word	0x0000ae6e

00006824 <nrf_cc3xx_platform_init_no_rng>:
    6824:	b510      	push	{r4, lr}
    6826:	4c0a      	ldr	r4, [pc, #40]	; (6850 <nrf_cc3xx_platform_init_no_rng+0x2c>)
    6828:	6823      	ldr	r3, [r4, #0]
    682a:	b11b      	cbz	r3, 6834 <nrf_cc3xx_platform_init_no_rng+0x10>
    682c:	2301      	movs	r3, #1
    682e:	6023      	str	r3, [r4, #0]
    6830:	2000      	movs	r0, #0
    6832:	bd10      	pop	{r4, pc}
    6834:	f000 f8e0 	bl	69f8 <CC_LibInitNoRng>
    6838:	2800      	cmp	r0, #0
    683a:	d0f7      	beq.n	682c <nrf_cc3xx_platform_init_no_rng+0x8>
    683c:	3801      	subs	r0, #1
    683e:	2806      	cmp	r0, #6
    6840:	d803      	bhi.n	684a <nrf_cc3xx_platform_init_no_rng+0x26>
    6842:	4b04      	ldr	r3, [pc, #16]	; (6854 <nrf_cc3xx_platform_init_no_rng+0x30>)
    6844:	f853 0020 	ldr.w	r0, [r3, r0, lsl #2]
    6848:	bd10      	pop	{r4, pc}
    684a:	4803      	ldr	r0, [pc, #12]	; (6858 <nrf_cc3xx_platform_init_no_rng+0x34>)
    684c:	bd10      	pop	{r4, pc}
    684e:	bf00      	nop
    6850:	20001834 	.word	0x20001834
    6854:	0000a0b4 	.word	0x0000a0b4
    6858:	ffff8ffe 	.word	0xffff8ffe

0000685c <nrf_cc3xx_platform_abort>:
    685c:	f3bf 8f4f 	dsb	sy
    6860:	4905      	ldr	r1, [pc, #20]	; (6878 <nrf_cc3xx_platform_abort+0x1c>)
    6862:	4b06      	ldr	r3, [pc, #24]	; (687c <nrf_cc3xx_platform_abort+0x20>)
    6864:	68ca      	ldr	r2, [r1, #12]
    6866:	f402 62e0 	and.w	r2, r2, #1792	; 0x700
    686a:	4313      	orrs	r3, r2
    686c:	60cb      	str	r3, [r1, #12]
    686e:	f3bf 8f4f 	dsb	sy
    6872:	bf00      	nop
    6874:	e7fd      	b.n	6872 <nrf_cc3xx_platform_abort+0x16>
    6876:	bf00      	nop
    6878:	e000ed00 	.word	0xe000ed00
    687c:	05fa0004 	.word	0x05fa0004

00006880 <CC_PalAbort>:
    6880:	b4f0      	push	{r4, r5, r6, r7}
    6882:	4f09      	ldr	r7, [pc, #36]	; (68a8 <CC_PalAbort+0x28>)
    6884:	4e09      	ldr	r6, [pc, #36]	; (68ac <CC_PalAbort+0x2c>)
    6886:	4c0a      	ldr	r4, [pc, #40]	; (68b0 <CC_PalAbort+0x30>)
    6888:	4a0a      	ldr	r2, [pc, #40]	; (68b4 <CC_PalAbort+0x34>)
    688a:	4d0b      	ldr	r5, [pc, #44]	; (68b8 <CC_PalAbort+0x38>)
    688c:	490b      	ldr	r1, [pc, #44]	; (68bc <CC_PalAbort+0x3c>)
    688e:	f04f 33fe 	mov.w	r3, #4278124286	; 0xfefefefe
    6892:	603b      	str	r3, [r7, #0]
    6894:	6852      	ldr	r2, [r2, #4]
    6896:	6033      	str	r3, [r6, #0]
    6898:	6023      	str	r3, [r4, #0]
    689a:	2400      	movs	r4, #0
    689c:	602b      	str	r3, [r5, #0]
    689e:	f8c1 4500 	str.w	r4, [r1, #1280]	; 0x500
    68a2:	bcf0      	pop	{r4, r5, r6, r7}
    68a4:	4710      	bx	r2
    68a6:	bf00      	nop
    68a8:	5002b400 	.word	0x5002b400
    68ac:	5002b404 	.word	0x5002b404
    68b0:	5002b408 	.word	0x5002b408
    68b4:	200000ec 	.word	0x200000ec
    68b8:	5002b40c 	.word	0x5002b40c
    68bc:	5002a000 	.word	0x5002a000

000068c0 <nrf_cc3xx_platform_set_abort>:
    68c0:	e9d0 1200 	ldrd	r1, r2, [r0]
    68c4:	4b01      	ldr	r3, [pc, #4]	; (68cc <nrf_cc3xx_platform_set_abort+0xc>)
    68c6:	e9c3 1200 	strd	r1, r2, [r3]
    68ca:	4770      	bx	lr
    68cc:	200000ec 	.word	0x200000ec

000068d0 <mutex_free>:
    68d0:	b510      	push	{r4, lr}
    68d2:	4604      	mov	r4, r0
    68d4:	b130      	cbz	r0, 68e4 <mutex_free+0x14>
    68d6:	6863      	ldr	r3, [r4, #4]
    68d8:	06db      	lsls	r3, r3, #27
    68da:	d502      	bpl.n	68e2 <mutex_free+0x12>
    68dc:	2300      	movs	r3, #0
    68de:	6023      	str	r3, [r4, #0]
    68e0:	6063      	str	r3, [r4, #4]
    68e2:	bd10      	pop	{r4, pc}
    68e4:	4b02      	ldr	r3, [pc, #8]	; (68f0 <mutex_free+0x20>)
    68e6:	4803      	ldr	r0, [pc, #12]	; (68f4 <mutex_free+0x24>)
    68e8:	685b      	ldr	r3, [r3, #4]
    68ea:	4798      	blx	r3
    68ec:	e7f3      	b.n	68d6 <mutex_free+0x6>
    68ee:	bf00      	nop
    68f0:	200000ec 	.word	0x200000ec
    68f4:	0000a0d0 	.word	0x0000a0d0

000068f8 <mutex_unlock>:
    68f8:	b168      	cbz	r0, 6916 <mutex_unlock+0x1e>
    68fa:	6843      	ldr	r3, [r0, #4]
    68fc:	b13b      	cbz	r3, 690e <mutex_unlock+0x16>
    68fe:	06db      	lsls	r3, r3, #27
    6900:	d507      	bpl.n	6912 <mutex_unlock+0x1a>
    6902:	f3bf 8f5f 	dmb	sy
    6906:	2300      	movs	r3, #0
    6908:	6003      	str	r3, [r0, #0]
    690a:	4618      	mov	r0, r3
    690c:	4770      	bx	lr
    690e:	4803      	ldr	r0, [pc, #12]	; (691c <mutex_unlock+0x24>)
    6910:	4770      	bx	lr
    6912:	4803      	ldr	r0, [pc, #12]	; (6920 <mutex_unlock+0x28>)
    6914:	4770      	bx	lr
    6916:	f46f 40e0 	mvn.w	r0, #28672	; 0x7000
    691a:	4770      	bx	lr
    691c:	ffff8fea 	.word	0xffff8fea
    6920:	ffff8fe9 	.word	0xffff8fe9

00006924 <mutex_init>:
    6924:	b510      	push	{r4, lr}
    6926:	4604      	mov	r4, r0
    6928:	b120      	cbz	r0, 6934 <mutex_init+0x10>
    692a:	2200      	movs	r2, #0
    692c:	2311      	movs	r3, #17
    692e:	6022      	str	r2, [r4, #0]
    6930:	6063      	str	r3, [r4, #4]
    6932:	bd10      	pop	{r4, pc}
    6934:	4801      	ldr	r0, [pc, #4]	; (693c <mutex_init+0x18>)
    6936:	f7ff ffa3 	bl	6880 <CC_PalAbort>
    693a:	e7f6      	b.n	692a <mutex_init+0x6>
    693c:	0000a0f8 	.word	0x0000a0f8

00006940 <mutex_lock>:
    6940:	b1c0      	cbz	r0, 6974 <mutex_lock+0x34>
    6942:	6843      	ldr	r3, [r0, #4]
    6944:	b1a3      	cbz	r3, 6970 <mutex_lock+0x30>
    6946:	06db      	lsls	r3, r3, #27
    6948:	d510      	bpl.n	696c <mutex_lock+0x2c>
    694a:	2201      	movs	r2, #1
    694c:	f3bf 8f5b 	dmb	ish
    6950:	e850 3f00 	ldrex	r3, [r0]
    6954:	e840 2100 	strex	r1, r2, [r0]
    6958:	2900      	cmp	r1, #0
    695a:	d1f9      	bne.n	6950 <mutex_lock+0x10>
    695c:	f3bf 8f5b 	dmb	ish
    6960:	2b01      	cmp	r3, #1
    6962:	d0f3      	beq.n	694c <mutex_lock+0xc>
    6964:	f3bf 8f5f 	dmb	sy
    6968:	2000      	movs	r0, #0
    696a:	4770      	bx	lr
    696c:	4803      	ldr	r0, [pc, #12]	; (697c <mutex_lock+0x3c>)
    696e:	4770      	bx	lr
    6970:	4803      	ldr	r0, [pc, #12]	; (6980 <mutex_lock+0x40>)
    6972:	4770      	bx	lr
    6974:	f46f 40e0 	mvn.w	r0, #28672	; 0x7000
    6978:	4770      	bx	lr
    697a:	bf00      	nop
    697c:	ffff8fe9 	.word	0xffff8fe9
    6980:	ffff8fea 	.word	0xffff8fea

00006984 <nrf_cc3xx_platform_set_mutexes>:
    6984:	b570      	push	{r4, r5, r6, lr}
    6986:	e9d0 2300 	ldrd	r2, r3, [r0]
    698a:	4c13      	ldr	r4, [pc, #76]	; (69d8 <nrf_cc3xx_platform_set_mutexes+0x54>)
    698c:	4d13      	ldr	r5, [pc, #76]	; (69dc <nrf_cc3xx_platform_set_mutexes+0x58>)
    698e:	e9c4 2300 	strd	r2, r3, [r4]
    6992:	e9d0 6302 	ldrd	r6, r3, [r0, #8]
    6996:	e9c4 6302 	strd	r6, r3, [r4, #8]
    699a:	4b11      	ldr	r3, [pc, #68]	; (69e0 <nrf_cc3xx_platform_set_mutexes+0x5c>)
    699c:	6808      	ldr	r0, [r1, #0]
    699e:	6018      	str	r0, [r3, #0]
    69a0:	6848      	ldr	r0, [r1, #4]
    69a2:	6058      	str	r0, [r3, #4]
    69a4:	6888      	ldr	r0, [r1, #8]
    69a6:	6098      	str	r0, [r3, #8]
    69a8:	e9d1 6003 	ldrd	r6, r0, [r1, #12]
    69ac:	f8d5 1114 	ldr.w	r1, [r5, #276]	; 0x114
    69b0:	60de      	str	r6, [r3, #12]
    69b2:	6118      	str	r0, [r3, #16]
    69b4:	06cb      	lsls	r3, r1, #27
    69b6:	d50d      	bpl.n	69d4 <nrf_cc3xx_platform_set_mutexes+0x50>
    69b8:	2300      	movs	r3, #0
    69ba:	e9c5 3344 	strd	r3, r3, [r5, #272]	; 0x110
    69be:	e9c5 336d 	strd	r3, r3, [r5, #436]	; 0x1b4
    69c2:	f505 7088 	add.w	r0, r5, #272	; 0x110
    69c6:	4790      	blx	r2
    69c8:	6823      	ldr	r3, [r4, #0]
    69ca:	f505 70da 	add.w	r0, r5, #436	; 0x1b4
    69ce:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
    69d2:	4718      	bx	r3
    69d4:	bd70      	pop	{r4, r5, r6, pc}
    69d6:	bf00      	nop
    69d8:	200000fc 	.word	0x200000fc
    69dc:	20001d78 	.word	0x20001d78
    69e0:	2000010c 	.word	0x2000010c

000069e4 <mbedtls_platform_zeroize>:
    69e4:	b138      	cbz	r0, 69f6 <mbedtls_platform_zeroize+0x12>
    69e6:	b131      	cbz	r1, 69f6 <mbedtls_platform_zeroize+0x12>
    69e8:	4401      	add	r1, r0
    69ea:	2200      	movs	r2, #0
    69ec:	4603      	mov	r3, r0
    69ee:	3001      	adds	r0, #1
    69f0:	4288      	cmp	r0, r1
    69f2:	701a      	strb	r2, [r3, #0]
    69f4:	d1fa      	bne.n	69ec <mbedtls_platform_zeroize+0x8>
    69f6:	4770      	bx	lr

000069f8 <CC_LibInitNoRng>:
    69f8:	b510      	push	{r4, lr}
    69fa:	f000 f833 	bl	6a64 <CC_HalInit>
    69fe:	b120      	cbz	r0, 6a0a <CC_LibInitNoRng+0x12>
    6a00:	2403      	movs	r4, #3
    6a02:	f000 f867 	bl	6ad4 <CC_PalTerminate>
    6a06:	4620      	mov	r0, r4
    6a08:	bd10      	pop	{r4, pc}
    6a0a:	f000 f835 	bl	6a78 <CC_PalInit>
    6a0e:	b990      	cbnz	r0, 6a36 <CC_LibInitNoRng+0x3e>
    6a10:	f000 f8b0 	bl	6b74 <CC_PalPowerSaveModeSelect>
    6a14:	b990      	cbnz	r0, 6a3c <CC_LibInitNoRng+0x44>
    6a16:	4b0f      	ldr	r3, [pc, #60]	; (6a54 <CC_LibInitNoRng+0x5c>)
    6a18:	681b      	ldr	r3, [r3, #0]
    6a1a:	0e1b      	lsrs	r3, r3, #24
    6a1c:	2bf0      	cmp	r3, #240	; 0xf0
    6a1e:	d108      	bne.n	6a32 <CC_LibInitNoRng+0x3a>
    6a20:	4a0d      	ldr	r2, [pc, #52]	; (6a58 <CC_LibInitNoRng+0x60>)
    6a22:	4b0e      	ldr	r3, [pc, #56]	; (6a5c <CC_LibInitNoRng+0x64>)
    6a24:	6812      	ldr	r2, [r2, #0]
    6a26:	429a      	cmp	r2, r3
    6a28:	d00a      	beq.n	6a40 <CC_LibInitNoRng+0x48>
    6a2a:	2407      	movs	r4, #7
    6a2c:	f000 f81c 	bl	6a68 <CC_HalTerminate>
    6a30:	e7e7      	b.n	6a02 <CC_LibInitNoRng+0xa>
    6a32:	2406      	movs	r4, #6
    6a34:	e7fa      	b.n	6a2c <CC_LibInitNoRng+0x34>
    6a36:	2404      	movs	r4, #4
    6a38:	4620      	mov	r0, r4
    6a3a:	bd10      	pop	{r4, pc}
    6a3c:	2400      	movs	r4, #0
    6a3e:	e7f5      	b.n	6a2c <CC_LibInitNoRng+0x34>
    6a40:	2001      	movs	r0, #1
    6a42:	f000 f897 	bl	6b74 <CC_PalPowerSaveModeSelect>
    6a46:	4604      	mov	r4, r0
    6a48:	2800      	cmp	r0, #0
    6a4a:	d1f7      	bne.n	6a3c <CC_LibInitNoRng+0x44>
    6a4c:	4b04      	ldr	r3, [pc, #16]	; (6a60 <CC_LibInitNoRng+0x68>)
    6a4e:	6018      	str	r0, [r3, #0]
    6a50:	e7d9      	b.n	6a06 <CC_LibInitNoRng+0xe>
    6a52:	bf00      	nop
    6a54:	5002b928 	.word	0x5002b928
    6a58:	5002ba24 	.word	0x5002ba24
    6a5c:	20e00000 	.word	0x20e00000
    6a60:	5002ba0c 	.word	0x5002ba0c

00006a64 <CC_HalInit>:
    6a64:	2000      	movs	r0, #0
    6a66:	4770      	bx	lr

00006a68 <CC_HalTerminate>:
    6a68:	2000      	movs	r0, #0
    6a6a:	4770      	bx	lr

00006a6c <CC_HalMaskInterrupt>:
    6a6c:	4b01      	ldr	r3, [pc, #4]	; (6a74 <CC_HalMaskInterrupt+0x8>)
    6a6e:	6018      	str	r0, [r3, #0]
    6a70:	4770      	bx	lr
    6a72:	bf00      	nop
    6a74:	5002ba04 	.word	0x5002ba04

00006a78 <CC_PalInit>:
    6a78:	b510      	push	{r4, lr}
    6a7a:	4811      	ldr	r0, [pc, #68]	; (6ac0 <CC_PalInit+0x48>)
    6a7c:	f000 f848 	bl	6b10 <CC_PalMutexCreate>
    6a80:	b100      	cbz	r0, 6a84 <CC_PalInit+0xc>
    6a82:	bd10      	pop	{r4, pc}
    6a84:	480f      	ldr	r0, [pc, #60]	; (6ac4 <CC_PalInit+0x4c>)
    6a86:	f000 f843 	bl	6b10 <CC_PalMutexCreate>
    6a8a:	2800      	cmp	r0, #0
    6a8c:	d1f9      	bne.n	6a82 <CC_PalInit+0xa>
    6a8e:	4c0e      	ldr	r4, [pc, #56]	; (6ac8 <CC_PalInit+0x50>)
    6a90:	4620      	mov	r0, r4
    6a92:	f000 f83d 	bl	6b10 <CC_PalMutexCreate>
    6a96:	2800      	cmp	r0, #0
    6a98:	d1f3      	bne.n	6a82 <CC_PalInit+0xa>
    6a9a:	4b0c      	ldr	r3, [pc, #48]	; (6acc <CC_PalInit+0x54>)
    6a9c:	480c      	ldr	r0, [pc, #48]	; (6ad0 <CC_PalInit+0x58>)
    6a9e:	601c      	str	r4, [r3, #0]
    6aa0:	f000 f836 	bl	6b10 <CC_PalMutexCreate>
    6aa4:	4601      	mov	r1, r0
    6aa6:	2800      	cmp	r0, #0
    6aa8:	d1eb      	bne.n	6a82 <CC_PalInit+0xa>
    6aaa:	f000 f82d 	bl	6b08 <CC_PalDmaInit>
    6aae:	4604      	mov	r4, r0
    6ab0:	b108      	cbz	r0, 6ab6 <CC_PalInit+0x3e>
    6ab2:	4620      	mov	r0, r4
    6ab4:	bd10      	pop	{r4, pc}
    6ab6:	f000 f83f 	bl	6b38 <CC_PalPowerSaveModeInit>
    6aba:	4620      	mov	r0, r4
    6abc:	e7fa      	b.n	6ab4 <CC_PalInit+0x3c>
    6abe:	bf00      	nop
    6ac0:	20000144 	.word	0x20000144
    6ac4:	20000138 	.word	0x20000138
    6ac8:	20000140 	.word	0x20000140
    6acc:	20000148 	.word	0x20000148
    6ad0:	2000013c 	.word	0x2000013c

00006ad4 <CC_PalTerminate>:
    6ad4:	b508      	push	{r3, lr}
    6ad6:	4808      	ldr	r0, [pc, #32]	; (6af8 <CC_PalTerminate+0x24>)
    6ad8:	f000 f824 	bl	6b24 <CC_PalMutexDestroy>
    6adc:	4807      	ldr	r0, [pc, #28]	; (6afc <CC_PalTerminate+0x28>)
    6ade:	f000 f821 	bl	6b24 <CC_PalMutexDestroy>
    6ae2:	4807      	ldr	r0, [pc, #28]	; (6b00 <CC_PalTerminate+0x2c>)
    6ae4:	f000 f81e 	bl	6b24 <CC_PalMutexDestroy>
    6ae8:	4806      	ldr	r0, [pc, #24]	; (6b04 <CC_PalTerminate+0x30>)
    6aea:	f000 f81b 	bl	6b24 <CC_PalMutexDestroy>
    6aee:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
    6af2:	f000 b80b 	b.w	6b0c <CC_PalDmaTerminate>
    6af6:	bf00      	nop
    6af8:	20000144 	.word	0x20000144
    6afc:	20000138 	.word	0x20000138
    6b00:	20000140 	.word	0x20000140
    6b04:	2000013c 	.word	0x2000013c

00006b08 <CC_PalDmaInit>:
    6b08:	2000      	movs	r0, #0
    6b0a:	4770      	bx	lr

00006b0c <CC_PalDmaTerminate>:
    6b0c:	4770      	bx	lr
    6b0e:	bf00      	nop

00006b10 <CC_PalMutexCreate>:
    6b10:	b508      	push	{r3, lr}
    6b12:	4b03      	ldr	r3, [pc, #12]	; (6b20 <CC_PalMutexCreate+0x10>)
    6b14:	6802      	ldr	r2, [r0, #0]
    6b16:	681b      	ldr	r3, [r3, #0]
    6b18:	6810      	ldr	r0, [r2, #0]
    6b1a:	4798      	blx	r3
    6b1c:	2000      	movs	r0, #0
    6b1e:	bd08      	pop	{r3, pc}
    6b20:	200000fc 	.word	0x200000fc

00006b24 <CC_PalMutexDestroy>:
    6b24:	b508      	push	{r3, lr}
    6b26:	4b03      	ldr	r3, [pc, #12]	; (6b34 <CC_PalMutexDestroy+0x10>)
    6b28:	6802      	ldr	r2, [r0, #0]
    6b2a:	685b      	ldr	r3, [r3, #4]
    6b2c:	6810      	ldr	r0, [r2, #0]
    6b2e:	4798      	blx	r3
    6b30:	2000      	movs	r0, #0
    6b32:	bd08      	pop	{r3, pc}
    6b34:	200000fc 	.word	0x200000fc

00006b38 <CC_PalPowerSaveModeInit>:
    6b38:	b570      	push	{r4, r5, r6, lr}
    6b3a:	4c09      	ldr	r4, [pc, #36]	; (6b60 <CC_PalPowerSaveModeInit+0x28>)
    6b3c:	4d09      	ldr	r5, [pc, #36]	; (6b64 <CC_PalPowerSaveModeInit+0x2c>)
    6b3e:	6920      	ldr	r0, [r4, #16]
    6b40:	68ab      	ldr	r3, [r5, #8]
    6b42:	4798      	blx	r3
    6b44:	b118      	cbz	r0, 6b4e <CC_PalPowerSaveModeInit+0x16>
    6b46:	4b08      	ldr	r3, [pc, #32]	; (6b68 <CC_PalPowerSaveModeInit+0x30>)
    6b48:	4808      	ldr	r0, [pc, #32]	; (6b6c <CC_PalPowerSaveModeInit+0x34>)
    6b4a:	685b      	ldr	r3, [r3, #4]
    6b4c:	4798      	blx	r3
    6b4e:	4a08      	ldr	r2, [pc, #32]	; (6b70 <CC_PalPowerSaveModeInit+0x38>)
    6b50:	68eb      	ldr	r3, [r5, #12]
    6b52:	6920      	ldr	r0, [r4, #16]
    6b54:	2100      	movs	r1, #0
    6b56:	6011      	str	r1, [r2, #0]
    6b58:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
    6b5c:	4718      	bx	r3
    6b5e:	bf00      	nop
    6b60:	2000010c 	.word	0x2000010c
    6b64:	200000fc 	.word	0x200000fc
    6b68:	200000ec 	.word	0x200000ec
    6b6c:	0000a11c 	.word	0x0000a11c
    6b70:	20001848 	.word	0x20001848

00006b74 <CC_PalPowerSaveModeSelect>:
    6b74:	b570      	push	{r4, r5, r6, lr}
    6b76:	4d1a      	ldr	r5, [pc, #104]	; (6be0 <CC_PalPowerSaveModeSelect+0x6c>)
    6b78:	4e1a      	ldr	r6, [pc, #104]	; (6be4 <CC_PalPowerSaveModeSelect+0x70>)
    6b7a:	4604      	mov	r4, r0
    6b7c:	68b2      	ldr	r2, [r6, #8]
    6b7e:	6928      	ldr	r0, [r5, #16]
    6b80:	4790      	blx	r2
    6b82:	b9f0      	cbnz	r0, 6bc2 <CC_PalPowerSaveModeSelect+0x4e>
    6b84:	b15c      	cbz	r4, 6b9e <CC_PalPowerSaveModeSelect+0x2a>
    6b86:	4c18      	ldr	r4, [pc, #96]	; (6be8 <CC_PalPowerSaveModeSelect+0x74>)
    6b88:	6823      	ldr	r3, [r4, #0]
    6b8a:	b1ab      	cbz	r3, 6bb8 <CC_PalPowerSaveModeSelect+0x44>
    6b8c:	2b01      	cmp	r3, #1
    6b8e:	d01a      	beq.n	6bc6 <CC_PalPowerSaveModeSelect+0x52>
    6b90:	3b01      	subs	r3, #1
    6b92:	6023      	str	r3, [r4, #0]
    6b94:	6928      	ldr	r0, [r5, #16]
    6b96:	68f3      	ldr	r3, [r6, #12]
    6b98:	4798      	blx	r3
    6b9a:	2000      	movs	r0, #0
    6b9c:	bd70      	pop	{r4, r5, r6, pc}
    6b9e:	4c12      	ldr	r4, [pc, #72]	; (6be8 <CC_PalPowerSaveModeSelect+0x74>)
    6ba0:	6821      	ldr	r1, [r4, #0]
    6ba2:	b939      	cbnz	r1, 6bb4 <CC_PalPowerSaveModeSelect+0x40>
    6ba4:	4b11      	ldr	r3, [pc, #68]	; (6bec <CC_PalPowerSaveModeSelect+0x78>)
    6ba6:	4a12      	ldr	r2, [pc, #72]	; (6bf0 <CC_PalPowerSaveModeSelect+0x7c>)
    6ba8:	2001      	movs	r0, #1
    6baa:	f8c3 0500 	str.w	r0, [r3, #1280]	; 0x500
    6bae:	6813      	ldr	r3, [r2, #0]
    6bb0:	2b00      	cmp	r3, #0
    6bb2:	d1fc      	bne.n	6bae <CC_PalPowerSaveModeSelect+0x3a>
    6bb4:	3101      	adds	r1, #1
    6bb6:	6021      	str	r1, [r4, #0]
    6bb8:	68f3      	ldr	r3, [r6, #12]
    6bba:	6928      	ldr	r0, [r5, #16]
    6bbc:	4798      	blx	r3
    6bbe:	2000      	movs	r0, #0
    6bc0:	bd70      	pop	{r4, r5, r6, pc}
    6bc2:	480c      	ldr	r0, [pc, #48]	; (6bf4 <CC_PalPowerSaveModeSelect+0x80>)
    6bc4:	bd70      	pop	{r4, r5, r6, pc}
    6bc6:	4a0a      	ldr	r2, [pc, #40]	; (6bf0 <CC_PalPowerSaveModeSelect+0x7c>)
    6bc8:	6813      	ldr	r3, [r2, #0]
    6bca:	2b00      	cmp	r3, #0
    6bcc:	d1fc      	bne.n	6bc8 <CC_PalPowerSaveModeSelect+0x54>
    6bce:	4a07      	ldr	r2, [pc, #28]	; (6bec <CC_PalPowerSaveModeSelect+0x78>)
    6bd0:	f06f 407e 	mvn.w	r0, #4261412864	; 0xfe000000
    6bd4:	f8c2 3500 	str.w	r3, [r2, #1280]	; 0x500
    6bd8:	f7ff ff48 	bl	6a6c <CC_HalMaskInterrupt>
    6bdc:	6823      	ldr	r3, [r4, #0]
    6bde:	e7d7      	b.n	6b90 <CC_PalPowerSaveModeSelect+0x1c>
    6be0:	2000010c 	.word	0x2000010c
    6be4:	200000fc 	.word	0x200000fc
    6be8:	20001848 	.word	0x20001848
    6bec:	5002a000 	.word	0x5002a000
    6bf0:	5002b910 	.word	0x5002b910
    6bf4:	ffff8fe9 	.word	0xffff8fe9

00006bf8 <verify_context_ecdsa_verify_secp256r1>:
    6bf8:	b130      	cbz	r0, 6c08 <verify_context_ecdsa_verify_secp256r1+0x10>
    6bfa:	6802      	ldr	r2, [r0, #0]
    6bfc:	4b03      	ldr	r3, [pc, #12]	; (6c0c <verify_context_ecdsa_verify_secp256r1+0x14>)
    6bfe:	4804      	ldr	r0, [pc, #16]	; (6c10 <verify_context_ecdsa_verify_secp256r1+0x18>)
    6c00:	429a      	cmp	r2, r3
    6c02:	bf08      	it	eq
    6c04:	2000      	moveq	r0, #0
    6c06:	4770      	bx	lr
    6c08:	4802      	ldr	r0, [pc, #8]	; (6c14 <verify_context_ecdsa_verify_secp256r1+0x1c>)
    6c0a:	4770      	bx	lr
    6c0c:	bbaa55dd 	.word	0xbbaa55dd
    6c10:	00f00882 	.word	0x00f00882
    6c14:	00f00871 	.word	0x00f00871

00006c18 <nrf_cc310_bl_ecdsa_verify_init_secp256r1>:
    6c18:	b538      	push	{r3, r4, r5, lr}
    6c1a:	460d      	mov	r5, r1
    6c1c:	4604      	mov	r4, r0
    6c1e:	b1b0      	cbz	r0, 6c4e <nrf_cc310_bl_ecdsa_verify_init_secp256r1+0x36>
    6c20:	22a0      	movs	r2, #160	; 0xa0
    6c22:	2100      	movs	r1, #0
    6c24:	3004      	adds	r0, #4
    6c26:	f002 ff51 	bl	9acc <SaSi_PalMemSet>
    6c2a:	b195      	cbz	r5, 6c52 <nrf_cc310_bl_ecdsa_verify_init_secp256r1+0x3a>
    6c2c:	2208      	movs	r2, #8
    6c2e:	4629      	mov	r1, r5
    6c30:	f104 0064 	add.w	r0, r4, #100	; 0x64
    6c34:	f002 ff50 	bl	9ad8 <CRYS_COMMON_ReverseMemcpy32>
    6c38:	2208      	movs	r2, #8
    6c3a:	f105 0120 	add.w	r1, r5, #32
    6c3e:	f104 0084 	add.w	r0, r4, #132	; 0x84
    6c42:	f002 ff49 	bl	9ad8 <CRYS_COMMON_ReverseMemcpy32>
    6c46:	4b04      	ldr	r3, [pc, #16]	; (6c58 <nrf_cc310_bl_ecdsa_verify_init_secp256r1+0x40>)
    6c48:	6023      	str	r3, [r4, #0]
    6c4a:	2000      	movs	r0, #0
    6c4c:	bd38      	pop	{r3, r4, r5, pc}
    6c4e:	4803      	ldr	r0, [pc, #12]	; (6c5c <nrf_cc310_bl_ecdsa_verify_init_secp256r1+0x44>)
    6c50:	e7fc      	b.n	6c4c <nrf_cc310_bl_ecdsa_verify_init_secp256r1+0x34>
    6c52:	4803      	ldr	r0, [pc, #12]	; (6c60 <nrf_cc310_bl_ecdsa_verify_init_secp256r1+0x48>)
    6c54:	e7fa      	b.n	6c4c <nrf_cc310_bl_ecdsa_verify_init_secp256r1+0x34>
    6c56:	bf00      	nop
    6c58:	bbaa55dd 	.word	0xbbaa55dd
    6c5c:	00f00871 	.word	0x00f00871
    6c60:	00f00883 	.word	0x00f00883

00006c64 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1>:
    6c64:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
    6c68:	4605      	mov	r5, r0
    6c6a:	460e      	mov	r6, r1
    6c6c:	4699      	mov	r9, r3
    6c6e:	4611      	mov	r1, r2
    6c70:	f7ff ffc2 	bl	6bf8 <verify_context_ecdsa_verify_secp256r1>
    6c74:	4604      	mov	r4, r0
    6c76:	2800      	cmp	r0, #0
    6c78:	f040 8084 	bne.w	6d84 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x120>
    6c7c:	2e00      	cmp	r6, #0
    6c7e:	f000 8085 	beq.w	6d8c <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x128>
    6c82:	2900      	cmp	r1, #0
    6c84:	f000 8084 	beq.w	6d90 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x12c>
    6c88:	f1b9 0f20 	cmp.w	r9, #32
    6c8c:	f040 8082 	bne.w	6d94 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x130>
    6c90:	f105 0444 	add.w	r4, r5, #68	; 0x44
    6c94:	2208      	movs	r2, #8
    6c96:	f105 0804 	add.w	r8, r5, #4
    6c9a:	4620      	mov	r0, r4
    6c9c:	f002 ff1c 	bl	9ad8 <CRYS_COMMON_ReverseMemcpy32>
    6ca0:	f105 0724 	add.w	r7, r5, #36	; 0x24
    6ca4:	2208      	movs	r2, #8
    6ca6:	4631      	mov	r1, r6
    6ca8:	4640      	mov	r0, r8
    6caa:	f002 ff15 	bl	9ad8 <CRYS_COMMON_ReverseMemcpy32>
    6cae:	f106 0120 	add.w	r1, r6, #32
    6cb2:	2208      	movs	r2, #8
    6cb4:	4638      	mov	r0, r7
    6cb6:	f002 ff0f 	bl	9ad8 <CRYS_COMMON_ReverseMemcpy32>
    6cba:	a902      	add	r1, sp, #8
    6cbc:	f44f 7080 	mov.w	r0, #256	; 0x100
    6cc0:	f841 9d04 	str.w	r9, [r1, #-4]!
    6cc4:	f002 fefc 	bl	9ac0 <PkaInitAndMutexLock>
    6cc8:	2800      	cmp	r0, #0
    6cca:	d165      	bne.n	6d98 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x134>
    6ccc:	4a33      	ldr	r2, [pc, #204]	; (6d9c <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x138>)
    6cce:	f44f 7380 	mov.w	r3, #256	; 0x100
    6cd2:	6013      	str	r3, [r2, #0]
    6cd4:	2101      	movs	r1, #1
    6cd6:	6093      	str	r3, [r2, #8]
    6cd8:	2308      	movs	r3, #8
    6cda:	4a31      	ldr	r2, [pc, #196]	; (6da0 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x13c>)
    6cdc:	f000 fb2e 	bl	733c <PkaCopyDataIntoPkaReg>
    6ce0:	2101      	movs	r1, #1
    6ce2:	4608      	mov	r0, r1
    6ce4:	2305      	movs	r3, #5
    6ce6:	4a2f      	ldr	r2, [pc, #188]	; (6da4 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x140>)
    6ce8:	f000 fb28 	bl	733c <PkaCopyDataIntoPkaReg>
    6cec:	2308      	movs	r3, #8
    6cee:	4642      	mov	r2, r8
    6cf0:	2101      	movs	r1, #1
    6cf2:	201c      	movs	r0, #28
    6cf4:	f000 fb22 	bl	733c <PkaCopyDataIntoPkaReg>
    6cf8:	2308      	movs	r3, #8
    6cfa:	463a      	mov	r2, r7
    6cfc:	2101      	movs	r1, #1
    6cfe:	2003      	movs	r0, #3
    6d00:	f000 fb1c 	bl	733c <PkaCopyDataIntoPkaReg>
    6d04:	4622      	mov	r2, r4
    6d06:	2308      	movs	r3, #8
    6d08:	2101      	movs	r1, #1
    6d0a:	2002      	movs	r0, #2
    6d0c:	f000 fb16 	bl	733c <PkaCopyDataIntoPkaReg>
    6d10:	2308      	movs	r3, #8
    6d12:	4a25      	ldr	r2, [pc, #148]	; (6da8 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x144>)
    6d14:	2101      	movs	r1, #1
    6d16:	201a      	movs	r0, #26
    6d18:	f000 fb10 	bl	733c <PkaCopyDataIntoPkaReg>
    6d1c:	2305      	movs	r3, #5
    6d1e:	4a23      	ldr	r2, [pc, #140]	; (6dac <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x148>)
    6d20:	2101      	movs	r1, #1
    6d22:	201b      	movs	r0, #27
    6d24:	f000 fb0a 	bl	733c <PkaCopyDataIntoPkaReg>
    6d28:	2308      	movs	r3, #8
    6d2a:	4a21      	ldr	r2, [pc, #132]	; (6db0 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x14c>)
    6d2c:	2101      	movs	r1, #1
    6d2e:	2014      	movs	r0, #20
    6d30:	f000 fb04 	bl	733c <PkaCopyDataIntoPkaReg>
    6d34:	2308      	movs	r3, #8
    6d36:	4a1f      	ldr	r2, [pc, #124]	; (6db4 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x150>)
    6d38:	2101      	movs	r1, #1
    6d3a:	2015      	movs	r0, #21
    6d3c:	f000 fafe 	bl	733c <PkaCopyDataIntoPkaReg>
    6d40:	2308      	movs	r3, #8
    6d42:	f105 0264 	add.w	r2, r5, #100	; 0x64
    6d46:	2101      	movs	r1, #1
    6d48:	2016      	movs	r0, #22
    6d4a:	f000 faf7 	bl	733c <PkaCopyDataIntoPkaReg>
    6d4e:	2308      	movs	r3, #8
    6d50:	f105 0284 	add.w	r2, r5, #132	; 0x84
    6d54:	2101      	movs	r1, #1
    6d56:	2017      	movs	r0, #23
    6d58:	f000 faf0 	bl	733c <PkaCopyDataIntoPkaReg>
    6d5c:	2308      	movs	r3, #8
    6d5e:	4a16      	ldr	r2, [pc, #88]	; (6db8 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x154>)
    6d60:	2101      	movs	r1, #1
    6d62:	200b      	movs	r0, #11
    6d64:	f000 faea 	bl	733c <PkaCopyDataIntoPkaReg>
    6d68:	f000 fb44 	bl	73f4 <PkaEcdsaVerify>
    6d6c:	4604      	mov	r4, r0
    6d6e:	9801      	ldr	r0, [sp, #4]
    6d70:	f000 fad2 	bl	7318 <PkaFinishAndMutexUnlock>
    6d74:	4b11      	ldr	r3, [pc, #68]	; (6dbc <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x158>)
    6d76:	2c00      	cmp	r4, #0
    6d78:	bf18      	it	ne
    6d7a:	461c      	movne	r4, r3
    6d7c:	21a4      	movs	r1, #164	; 0xa4
    6d7e:	4628      	mov	r0, r5
    6d80:	f002 fea6 	bl	9ad0 <SaSi_PalMemSetZero>
    6d84:	4620      	mov	r0, r4
    6d86:	b003      	add	sp, #12
    6d88:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
    6d8c:	4c0c      	ldr	r4, [pc, #48]	; (6dc0 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x15c>)
    6d8e:	e7f9      	b.n	6d84 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x120>
    6d90:	4c0c      	ldr	r4, [pc, #48]	; (6dc4 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x160>)
    6d92:	e7f7      	b.n	6d84 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x120>
    6d94:	4c0c      	ldr	r4, [pc, #48]	; (6dc8 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x164>)
    6d96:	e7f5      	b.n	6d84 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x120>
    6d98:	4c08      	ldr	r4, [pc, #32]	; (6dbc <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x158>)
    6d9a:	e7ef      	b.n	6d7c <nrf_cc310_bl_ecdsa_verify_hash_secp256r1+0x118>
    6d9c:	5002b090 	.word	0x5002b090
    6da0:	0000a17c 	.word	0x0000a17c
    6da4:	0000a1f4 	.word	0x0000a1f4
    6da8:	0000a13c 	.word	0x0000a13c
    6dac:	0000a1e0 	.word	0x0000a1e0
    6db0:	0000a1a0 	.word	0x0000a1a0
    6db4:	0000a1c0 	.word	0x0000a1c0
    6db8:	0000a15c 	.word	0x0000a15c
    6dbc:	00f00884 	.word	0x00f00884
    6dc0:	00f00876 	.word	0x00f00876
    6dc4:	00f00880 	.word	0x00f00880
    6dc8:	00f00881 	.word	0x00f00881

00006dcc <set_digest_in_hw_sha256>:
    6dcc:	4b0c      	ldr	r3, [pc, #48]	; (6e00 <set_digest_in_hw_sha256+0x34>)
    6dce:	69c2      	ldr	r2, [r0, #28]
    6dd0:	601a      	str	r2, [r3, #0]
    6dd2:	6982      	ldr	r2, [r0, #24]
    6dd4:	f843 2c04 	str.w	r2, [r3, #-4]
    6dd8:	6942      	ldr	r2, [r0, #20]
    6dda:	f843 2c08 	str.w	r2, [r3, #-8]
    6dde:	6902      	ldr	r2, [r0, #16]
    6de0:	f843 2c0c 	str.w	r2, [r3, #-12]
    6de4:	68c2      	ldr	r2, [r0, #12]
    6de6:	f843 2c10 	str.w	r2, [r3, #-16]
    6dea:	6882      	ldr	r2, [r0, #8]
    6dec:	f843 2c14 	str.w	r2, [r3, #-20]
    6df0:	6842      	ldr	r2, [r0, #4]
    6df2:	f843 2c18 	str.w	r2, [r3, #-24]
    6df6:	6802      	ldr	r2, [r0, #0]
    6df8:	f843 2c1c 	str.w	r2, [r3, #-28]
    6dfc:	4770      	bx	lr
    6dfe:	bf00      	nop
    6e00:	5002b65c 	.word	0x5002b65c

00006e04 <read_digest_in_hw_sha256>:
    6e04:	4b0c      	ldr	r3, [pc, #48]	; (6e38 <read_digest_in_hw_sha256+0x34>)
    6e06:	681b      	ldr	r3, [r3, #0]
    6e08:	61c3      	str	r3, [r0, #28]
    6e0a:	4b0c      	ldr	r3, [pc, #48]	; (6e3c <read_digest_in_hw_sha256+0x38>)
    6e0c:	681b      	ldr	r3, [r3, #0]
    6e0e:	6183      	str	r3, [r0, #24]
    6e10:	4b0b      	ldr	r3, [pc, #44]	; (6e40 <read_digest_in_hw_sha256+0x3c>)
    6e12:	681b      	ldr	r3, [r3, #0]
    6e14:	6143      	str	r3, [r0, #20]
    6e16:	4b0b      	ldr	r3, [pc, #44]	; (6e44 <read_digest_in_hw_sha256+0x40>)
    6e18:	681b      	ldr	r3, [r3, #0]
    6e1a:	6103      	str	r3, [r0, #16]
    6e1c:	4b0a      	ldr	r3, [pc, #40]	; (6e48 <read_digest_in_hw_sha256+0x44>)
    6e1e:	681b      	ldr	r3, [r3, #0]
    6e20:	60c3      	str	r3, [r0, #12]
    6e22:	4b0a      	ldr	r3, [pc, #40]	; (6e4c <read_digest_in_hw_sha256+0x48>)
    6e24:	681b      	ldr	r3, [r3, #0]
    6e26:	6083      	str	r3, [r0, #8]
    6e28:	4b09      	ldr	r3, [pc, #36]	; (6e50 <read_digest_in_hw_sha256+0x4c>)
    6e2a:	681b      	ldr	r3, [r3, #0]
    6e2c:	6043      	str	r3, [r0, #4]
    6e2e:	4b09      	ldr	r3, [pc, #36]	; (6e54 <read_digest_in_hw_sha256+0x50>)
    6e30:	681b      	ldr	r3, [r3, #0]
    6e32:	6003      	str	r3, [r0, #0]
    6e34:	4770      	bx	lr
    6e36:	bf00      	nop
    6e38:	5002b65c 	.word	0x5002b65c
    6e3c:	5002b658 	.word	0x5002b658
    6e40:	5002b654 	.word	0x5002b654
    6e44:	5002b650 	.word	0x5002b650
    6e48:	5002b64c 	.word	0x5002b64c
    6e4c:	5002b648 	.word	0x5002b648
    6e50:	5002b644 	.word	0x5002b644
    6e54:	5002b640 	.word	0x5002b640

00006e58 <verify_context_hash_sha256>:
    6e58:	b130      	cbz	r0, 6e68 <verify_context_hash_sha256+0x10>
    6e5a:	6802      	ldr	r2, [r0, #0]
    6e5c:	4b03      	ldr	r3, [pc, #12]	; (6e6c <verify_context_hash_sha256+0x14>)
    6e5e:	4804      	ldr	r0, [pc, #16]	; (6e70 <verify_context_hash_sha256+0x18>)
    6e60:	429a      	cmp	r2, r3
    6e62:	bf08      	it	eq
    6e64:	2000      	moveq	r0, #0
    6e66:	4770      	bx	lr
    6e68:	4802      	ldr	r0, [pc, #8]	; (6e74 <verify_context_hash_sha256+0x1c>)
    6e6a:	4770      	bx	lr
    6e6c:	bbaa55dd 	.word	0xbbaa55dd
    6e70:	00f00202 	.word	0x00f00202
    6e74:	00f00200 	.word	0x00f00200

00006e78 <nrf_cc310_bl_hash_sha256_init>:
    6e78:	b538      	push	{r3, r4, r5, lr}
    6e7a:	4604      	mov	r4, r0
    6e7c:	b168      	cbz	r0, 6e9a <nrf_cc310_bl_hash_sha256_init+0x22>
    6e7e:	1d05      	adds	r5, r0, #4
    6e80:	2170      	movs	r1, #112	; 0x70
    6e82:	4628      	mov	r0, r5
    6e84:	f002 fe24 	bl	9ad0 <SaSi_PalMemSetZero>
    6e88:	4628      	mov	r0, r5
    6e8a:	2220      	movs	r2, #32
    6e8c:	4904      	ldr	r1, [pc, #16]	; (6ea0 <nrf_cc310_bl_hash_sha256_init+0x28>)
    6e8e:	f002 fe1b 	bl	9ac8 <SaSi_PalMemCopy>
    6e92:	4b04      	ldr	r3, [pc, #16]	; (6ea4 <nrf_cc310_bl_hash_sha256_init+0x2c>)
    6e94:	6023      	str	r3, [r4, #0]
    6e96:	2000      	movs	r0, #0
    6e98:	bd38      	pop	{r3, r4, r5, pc}
    6e9a:	4803      	ldr	r0, [pc, #12]	; (6ea8 <nrf_cc310_bl_hash_sha256_init+0x30>)
    6e9c:	e7fc      	b.n	6e98 <nrf_cc310_bl_hash_sha256_init+0x20>
    6e9e:	bf00      	nop
    6ea0:	0000a208 	.word	0x0000a208
    6ea4:	bbaa55dd 	.word	0xbbaa55dd
    6ea8:	00f00200 	.word	0x00f00200

00006eac <nrf_cc310_bl_hash_sha256_update>:
    6eac:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
    6eb0:	4b28      	ldr	r3, [pc, #160]	; (6f54 <nrf_cc310_bl_hash_sha256_update+0xa8>)
    6eb2:	4604      	mov	r4, r0
    6eb4:	460e      	mov	r6, r1
    6eb6:	4615      	mov	r5, r2
    6eb8:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
    6eba:	b085      	sub	sp, #20
    6ebc:	466f      	mov	r7, sp
    6ebe:	e887 000f 	stmia.w	r7, {r0, r1, r2, r3}
    6ec2:	b92d      	cbnz	r5, 6ed0 <nrf_cc310_bl_hash_sha256_update+0x24>
    6ec4:	f04f 0900 	mov.w	r9, #0
    6ec8:	4648      	mov	r0, r9
    6eca:	b005      	add	sp, #20
    6ecc:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
    6ed0:	4620      	mov	r0, r4
    6ed2:	f7ff ffc1 	bl	6e58 <verify_context_hash_sha256>
    6ed6:	4681      	mov	r9, r0
    6ed8:	2800      	cmp	r0, #0
    6eda:	d1f5      	bne.n	6ec8 <nrf_cc310_bl_hash_sha256_update+0x1c>
    6edc:	1d23      	adds	r3, r4, #4
    6ede:	9301      	str	r3, [sp, #4]
    6ee0:	6a63      	ldr	r3, [r4, #36]	; 0x24
    6ee2:	bba3      	cbnz	r3, 6f4e <nrf_cc310_bl_hash_sha256_update+0xa2>
    6ee4:	6f23      	ldr	r3, [r4, #112]	; 0x70
    6ee6:	b18b      	cbz	r3, 6f0c <nrf_cc310_bl_hash_sha256_update+0x60>
    6ee8:	f1c3 0840 	rsb	r8, r3, #64	; 0x40
    6eec:	45a8      	cmp	r8, r5
    6eee:	bf28      	it	cs
    6ef0:	46a8      	movcs	r8, r5
    6ef2:	f104 0030 	add.w	r0, r4, #48	; 0x30
    6ef6:	4631      	mov	r1, r6
    6ef8:	4418      	add	r0, r3
    6efa:	4642      	mov	r2, r8
    6efc:	f002 fde4 	bl	9ac8 <SaSi_PalMemCopy>
    6f00:	6f23      	ldr	r3, [r4, #112]	; 0x70
    6f02:	4443      	add	r3, r8
    6f04:	4446      	add	r6, r8
    6f06:	6723      	str	r3, [r4, #112]	; 0x70
    6f08:	eba5 0508 	sub.w	r5, r5, r8
    6f0c:	6f22      	ldr	r2, [r4, #112]	; 0x70
    6f0e:	2a40      	cmp	r2, #64	; 0x40
    6f10:	d106      	bne.n	6f20 <nrf_cc310_bl_hash_sha256_update+0x74>
    6f12:	f104 0130 	add.w	r1, r4, #48	; 0x30
    6f16:	4638      	mov	r0, r7
    6f18:	f000 fbae 	bl	7678 <nrf_cc310_bl_hash_update_internal>
    6f1c:	2300      	movs	r3, #0
    6f1e:	6723      	str	r3, [r4, #112]	; 0x70
    6f20:	f005 083f 	and.w	r8, r5, #63	; 0x3f
    6f24:	f035 053f 	bics.w	r5, r5, #63	; 0x3f
    6f28:	d005      	beq.n	6f36 <nrf_cc310_bl_hash_sha256_update+0x8a>
    6f2a:	4631      	mov	r1, r6
    6f2c:	462a      	mov	r2, r5
    6f2e:	4638      	mov	r0, r7
    6f30:	f000 fba2 	bl	7678 <nrf_cc310_bl_hash_update_internal>
    6f34:	442e      	add	r6, r5
    6f36:	f1b8 0f00 	cmp.w	r8, #0
    6f3a:	d0c3      	beq.n	6ec4 <nrf_cc310_bl_hash_sha256_update+0x18>
    6f3c:	4642      	mov	r2, r8
    6f3e:	4631      	mov	r1, r6
    6f40:	f104 0030 	add.w	r0, r4, #48	; 0x30
    6f44:	f002 fdc0 	bl	9ac8 <SaSi_PalMemCopy>
    6f48:	f8c4 8070 	str.w	r8, [r4, #112]	; 0x70
    6f4c:	e7bc      	b.n	6ec8 <nrf_cc310_bl_hash_sha256_update+0x1c>
    6f4e:	f8df 9008 	ldr.w	r9, [pc, #8]	; 6f58 <nrf_cc310_bl_hash_sha256_update+0xac>
    6f52:	e7b9      	b.n	6ec8 <nrf_cc310_bl_hash_sha256_update+0x1c>
    6f54:	00009e10 	.word	0x00009e10
    6f58:	00f0020c 	.word	0x00f0020c

00006f5c <nrf_cc310_bl_hash_sha256_finalize>:
    6f5c:	e92d 41ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
    6f60:	4b14      	ldr	r3, [pc, #80]	; (6fb4 <nrf_cc310_bl_hash_sha256_finalize+0x58>)
    6f62:	4604      	mov	r4, r0
    6f64:	460e      	mov	r6, r1
    6f66:	cb0f      	ldmia	r3, {r0, r1, r2, r3}
    6f68:	466f      	mov	r7, sp
    6f6a:	e887 000f 	stmia.w	r7, {r0, r1, r2, r3}
    6f6e:	4620      	mov	r0, r4
    6f70:	f7ff ff72 	bl	6e58 <verify_context_hash_sha256>
    6f74:	4680      	mov	r8, r0
    6f76:	b9b0      	cbnz	r0, 6fa6 <nrf_cc310_bl_hash_sha256_finalize+0x4a>
    6f78:	b1ce      	cbz	r6, 6fae <nrf_cc310_bl_hash_sha256_finalize+0x52>
    6f7a:	6a63      	ldr	r3, [r4, #36]	; 0x24
    6f7c:	1d25      	adds	r5, r4, #4
    6f7e:	9501      	str	r5, [sp, #4]
    6f80:	b93b      	cbnz	r3, 6f92 <nrf_cc310_bl_hash_sha256_finalize+0x36>
    6f82:	2301      	movs	r3, #1
    6f84:	6263      	str	r3, [r4, #36]	; 0x24
    6f86:	6f22      	ldr	r2, [r4, #112]	; 0x70
    6f88:	f104 0130 	add.w	r1, r4, #48	; 0x30
    6f8c:	4638      	mov	r0, r7
    6f8e:	f000 fb73 	bl	7678 <nrf_cc310_bl_hash_update_internal>
    6f92:	462b      	mov	r3, r5
    6f94:	3e04      	subs	r6, #4
    6f96:	3424      	adds	r4, #36	; 0x24
    6f98:	f853 2b04 	ldr.w	r2, [r3], #4
    6f9c:	ba12      	rev	r2, r2
    6f9e:	42a3      	cmp	r3, r4
    6fa0:	f846 2f04 	str.w	r2, [r6, #4]!
    6fa4:	d1f8      	bne.n	6f98 <nrf_cc310_bl_hash_sha256_finalize+0x3c>
    6fa6:	4640      	mov	r0, r8
    6fa8:	b004      	add	sp, #16
    6faa:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    6fae:	f8df 8008 	ldr.w	r8, [pc, #8]	; 6fb8 <nrf_cc310_bl_hash_sha256_finalize+0x5c>
    6fb2:	e7f8      	b.n	6fa6 <nrf_cc310_bl_hash_sha256_finalize+0x4a>
    6fb4:	00009e10 	.word	0x00009e10
    6fb8:	00f00205 	.word	0x00f00205

00006fbc <nrf_cc310_bl_init>:
    6fbc:	4b08      	ldr	r3, [pc, #32]	; (6fe0 <nrf_cc310_bl_init+0x24>)
    6fbe:	681b      	ldr	r3, [r3, #0]
    6fc0:	0e1b      	lsrs	r3, r3, #24
    6fc2:	2bf0      	cmp	r3, #240	; 0xf0
    6fc4:	d108      	bne.n	6fd8 <nrf_cc310_bl_init+0x1c>
    6fc6:	4b07      	ldr	r3, [pc, #28]	; (6fe4 <nrf_cc310_bl_init+0x28>)
    6fc8:	681a      	ldr	r2, [r3, #0]
    6fca:	4b07      	ldr	r3, [pc, #28]	; (6fe8 <nrf_cc310_bl_init+0x2c>)
    6fcc:	429a      	cmp	r2, r3
    6fce:	d105      	bne.n	6fdc <nrf_cc310_bl_init+0x20>
    6fd0:	4b06      	ldr	r3, [pc, #24]	; (6fec <nrf_cc310_bl_init+0x30>)
    6fd2:	2000      	movs	r0, #0
    6fd4:	6018      	str	r0, [r3, #0]
    6fd6:	4770      	bx	lr
    6fd8:	2005      	movs	r0, #5
    6fda:	4770      	bx	lr
    6fdc:	2006      	movs	r0, #6
    6fde:	4770      	bx	lr
    6fe0:	5002b928 	.word	0x5002b928
    6fe4:	5002ba24 	.word	0x5002ba24
    6fe8:	20e00000 	.word	0x20e00000
    6fec:	5002ba0c 	.word	0x5002ba0c

00006ff0 <PkaSetRegsMapTab>:
    6ff0:	2200      	movs	r2, #0
    6ff2:	b530      	push	{r4, r5, lr}
    6ff4:	0049      	lsls	r1, r1, #1
    6ff6:	4613      	mov	r3, r2
    6ff8:	3802      	subs	r0, #2
    6ffa:	f640 75fc 	movw	r5, #4092	; 0xffc
    6ffe:	f102 54a0 	add.w	r4, r2, #335544320	; 0x14000000
    7002:	f504 442c 	add.w	r4, r4, #44032	; 0xac00
    7006:	00a4      	lsls	r4, r4, #2
    7008:	4290      	cmp	r0, r2
    700a:	f102 0201 	add.w	r2, r2, #1
    700e:	bfca      	itet	gt
    7010:	6023      	strgt	r3, [r4, #0]
    7012:	6025      	strle	r5, [r4, #0]
    7014:	185b      	addgt	r3, r3, r1
    7016:	2a1e      	cmp	r2, #30
    7018:	d1f1      	bne.n	6ffe <PkaSetRegsMapTab+0xe>
    701a:	4a04      	ldr	r2, [pc, #16]	; (702c <PkaSetRegsMapTab+0x3c>)
    701c:	6013      	str	r3, [r2, #0]
    701e:	440b      	add	r3, r1
    7020:	6053      	str	r3, [r2, #4]
    7022:	4b03      	ldr	r3, [pc, #12]	; (7030 <PkaSetRegsMapTab+0x40>)
    7024:	4a03      	ldr	r2, [pc, #12]	; (7034 <PkaSetRegsMapTab+0x44>)
    7026:	601a      	str	r2, [r3, #0]
    7028:	bd30      	pop	{r4, r5, pc}
    702a:	bf00      	nop
    702c:	5002b078 	.word	0x5002b078
    7030:	5002b084 	.word	0x5002b084
    7034:	000ff820 	.word	0x000ff820

00007038 <PkaGetRegEffectiveSizeInBits>:
    7038:	b530      	push	{r4, r5, lr}
    703a:	4b1e      	ldr	r3, [pc, #120]	; (70b4 <PkaGetRegEffectiveSizeInBits+0x7c>)
    703c:	b085      	sub	sp, #20
    703e:	461a      	mov	r2, r3
    7040:	6819      	ldr	r1, [r3, #0]
    7042:	9100      	str	r1, [sp, #0]
    7044:	9900      	ldr	r1, [sp, #0]
    7046:	07cc      	lsls	r4, r1, #31
    7048:	d5fa      	bpl.n	7040 <PkaGetRegEffectiveSizeInBits+0x8>
    704a:	f100 50a0 	add.w	r0, r0, #335544320	; 0x14000000
    704e:	f500 402c 	add.w	r0, r0, #44032	; 0xac00
    7052:	0080      	lsls	r0, r0, #2
    7054:	6801      	ldr	r1, [r0, #0]
    7056:	6813      	ldr	r3, [r2, #0]
    7058:	9301      	str	r3, [sp, #4]
    705a:	9b01      	ldr	r3, [sp, #4]
    705c:	07d8      	lsls	r0, r3, #31
    705e:	d5fa      	bpl.n	7056 <PkaGetRegEffectiveSizeInBits+0x1e>
    7060:	4b15      	ldr	r3, [pc, #84]	; (70b8 <PkaGetRegEffectiveSizeInBits+0x80>)
    7062:	4c16      	ldr	r4, [pc, #88]	; (70bc <PkaGetRegEffectiveSizeInBits+0x84>)
    7064:	6818      	ldr	r0, [r3, #0]
    7066:	4d16      	ldr	r5, [pc, #88]	; (70c0 <PkaGetRegEffectiveSizeInBits+0x88>)
    7068:	301f      	adds	r0, #31
    706a:	2320      	movs	r3, #32
    706c:	fb90 f0f3 	sdiv	r0, r0, r3
    7070:	3801      	subs	r0, #1
    7072:	2800      	cmp	r0, #0
    7074:	da10      	bge.n	7098 <PkaGetRegEffectiveSizeInBits+0x60>
    7076:	2300      	movs	r3, #0
    7078:	3001      	adds	r0, #1
    707a:	0140      	lsls	r0, r0, #5
    707c:	b153      	cbz	r3, 7094 <PkaGetRegEffectiveSizeInBits+0x5c>
    707e:	f1a0 0120 	sub.w	r1, r0, #32
    7082:	f04f 4200 	mov.w	r2, #2147483648	; 0x80000000
    7086:	4213      	tst	r3, r2
    7088:	d104      	bne.n	7094 <PkaGetRegEffectiveSizeInBits+0x5c>
    708a:	3801      	subs	r0, #1
    708c:	4288      	cmp	r0, r1
    708e:	ea4f 0252 	mov.w	r2, r2, lsr #1
    7092:	d1f8      	bne.n	7086 <PkaGetRegEffectiveSizeInBits+0x4e>
    7094:	b005      	add	sp, #20
    7096:	bd30      	pop	{r4, r5, pc}
    7098:	6813      	ldr	r3, [r2, #0]
    709a:	9303      	str	r3, [sp, #12]
    709c:	9b03      	ldr	r3, [sp, #12]
    709e:	07db      	lsls	r3, r3, #31
    70a0:	d5fa      	bpl.n	7098 <PkaGetRegEffectiveSizeInBits+0x60>
    70a2:	1843      	adds	r3, r0, r1
    70a4:	6023      	str	r3, [r4, #0]
    70a6:	682b      	ldr	r3, [r5, #0]
    70a8:	9302      	str	r3, [sp, #8]
    70aa:	9b02      	ldr	r3, [sp, #8]
    70ac:	2b00      	cmp	r3, #0
    70ae:	d1e3      	bne.n	7078 <PkaGetRegEffectiveSizeInBits+0x40>
    70b0:	3801      	subs	r0, #1
    70b2:	e7de      	b.n	7072 <PkaGetRegEffectiveSizeInBits+0x3a>
    70b4:	5002b0b4 	.word	0x5002b0b4
    70b8:	5002b0ac 	.word	0x5002b0ac
    70bc:	5002b0e4 	.word	0x5002b0e4
    70c0:	5002b0dc 	.word	0x5002b0dc

000070c4 <PkaGetNextMsBit>:
    70c4:	b5f0      	push	{r4, r5, r6, r7, lr}
    70c6:	681d      	ldr	r5, [r3, #0]
    70c8:	b085      	sub	sp, #20
    70ca:	f001 041f 	and.w	r4, r1, #31
    70ce:	b90d      	cbnz	r5, 70d4 <PkaGetNextMsBit+0x10>
    70d0:	2c1f      	cmp	r4, #31
    70d2:	d125      	bne.n	7120 <PkaGetNextMsBit+0x5c>
    70d4:	4d15      	ldr	r5, [pc, #84]	; (712c <PkaGetNextMsBit+0x68>)
    70d6:	462e      	mov	r6, r5
    70d8:	682f      	ldr	r7, [r5, #0]
    70da:	9701      	str	r7, [sp, #4]
    70dc:	9f01      	ldr	r7, [sp, #4]
    70de:	07ff      	lsls	r7, r7, #31
    70e0:	d5fa      	bpl.n	70d8 <PkaGetNextMsBit+0x14>
    70e2:	f100 50a0 	add.w	r0, r0, #335544320	; 0x14000000
    70e6:	f500 402c 	add.w	r0, r0, #44032	; 0xac00
    70ea:	0080      	lsls	r0, r0, #2
    70ec:	6800      	ldr	r0, [r0, #0]
    70ee:	6835      	ldr	r5, [r6, #0]
    70f0:	9503      	str	r5, [sp, #12]
    70f2:	9d03      	ldr	r5, [sp, #12]
    70f4:	07ed      	lsls	r5, r5, #31
    70f6:	d5fa      	bpl.n	70ee <PkaGetNextMsBit+0x2a>
    70f8:	4d0d      	ldr	r5, [pc, #52]	; (7130 <PkaGetNextMsBit+0x6c>)
    70fa:	eb00 1061 	add.w	r0, r0, r1, asr #5
    70fe:	6028      	str	r0, [r5, #0]
    7100:	480c      	ldr	r0, [pc, #48]	; (7134 <PkaGetNextMsBit+0x70>)
    7102:	6800      	ldr	r0, [r0, #0]
    7104:	9002      	str	r0, [sp, #8]
    7106:	2c1f      	cmp	r4, #31
    7108:	bf18      	it	ne
    710a:	43c9      	mvnne	r1, r1
    710c:	9802      	ldr	r0, [sp, #8]
    710e:	bf0f      	iteee	eq
    7110:	6010      	streq	r0, [r2, #0]
    7112:	f001 011f 	andne.w	r1, r1, #31
    7116:	fa00 f101 	lslne.w	r1, r0, r1
    711a:	6011      	strne	r1, [r2, #0]
    711c:	2100      	movs	r1, #0
    711e:	6019      	str	r1, [r3, #0]
    7120:	6810      	ldr	r0, [r2, #0]
    7122:	0043      	lsls	r3, r0, #1
    7124:	0fc0      	lsrs	r0, r0, #31
    7126:	6013      	str	r3, [r2, #0]
    7128:	b005      	add	sp, #20
    712a:	bdf0      	pop	{r4, r5, r6, r7, pc}
    712c:	5002b0b4 	.word	0x5002b0b4
    7130:	5002b0e4 	.word	0x5002b0e4
    7134:	5002b0dc 	.word	0x5002b0dc

00007138 <PkaSetRegsSizesTab>:
    7138:	4b0c      	ldr	r3, [pc, #48]	; (716c <PkaSetRegsSizesTab+0x34>)
    713a:	6018      	str	r0, [r3, #0]
    713c:	303f      	adds	r0, #63	; 0x3f
    713e:	f020 003f 	bic.w	r0, r0, #63	; 0x3f
    7142:	0189      	lsls	r1, r1, #6
    7144:	3040      	adds	r0, #64	; 0x40
    7146:	6058      	str	r0, [r3, #4]
    7148:	6099      	str	r1, [r3, #8]
    714a:	60d9      	str	r1, [r3, #12]
    714c:	6119      	str	r1, [r3, #16]
    714e:	6159      	str	r1, [r3, #20]
    7150:	6199      	str	r1, [r3, #24]
    7152:	331c      	adds	r3, #28
    7154:	4806      	ldr	r0, [pc, #24]	; (7170 <PkaSetRegsSizesTab+0x38>)
    7156:	6019      	str	r1, [r3, #0]
    7158:	b082      	sub	sp, #8
    715a:	6802      	ldr	r2, [r0, #0]
    715c:	9201      	str	r2, [sp, #4]
    715e:	9a01      	ldr	r2, [sp, #4]
    7160:	07d2      	lsls	r2, r2, #31
    7162:	d5fa      	bpl.n	715a <PkaSetRegsSizesTab+0x22>
    7164:	6019      	str	r1, [r3, #0]
    7166:	b002      	add	sp, #8
    7168:	4770      	bx	lr
    716a:	bf00      	nop
    716c:	5002b090 	.word	0x5002b090
    7170:	5002b0b4 	.word	0x5002b0b4

00007174 <PkaInitPka>:
    7174:	b538      	push	{r3, r4, r5, lr}
    7176:	f1a0 0320 	sub.w	r3, r0, #32
    717a:	f5b3 6f42 	cmp.w	r3, #3104	; 0xc20
    717e:	4605      	mov	r5, r0
    7180:	d82c      	bhi.n	71dc <PkaInitPka+0x68>
    7182:	288f      	cmp	r0, #143	; 0x8f
    7184:	d826      	bhi.n	71d4 <PkaInitPka+0x60>
    7186:	f100 0347 	add.w	r3, r0, #71	; 0x47
    718a:	f100 0466 	add.w	r4, r0, #102	; 0x66
    718e:	06db      	lsls	r3, r3, #27
    7190:	ea4f 1454 	mov.w	r4, r4, lsr #5
    7194:	d000      	beq.n	7198 <PkaInitPka+0x24>
    7196:	3401      	adds	r4, #1
    7198:	0164      	lsls	r4, r4, #5
    719a:	343f      	adds	r4, #63	; 0x3f
    719c:	09a4      	lsrs	r4, r4, #6
    719e:	3401      	adds	r4, #1
    71a0:	b111      	cbz	r1, 71a8 <PkaInitPka+0x34>
    71a2:	42a1      	cmp	r1, r4
    71a4:	d31a      	bcc.n	71dc <PkaInitPka+0x68>
    71a6:	460c      	mov	r4, r1
    71a8:	00e3      	lsls	r3, r4, #3
    71aa:	f44f 5080 	mov.w	r0, #4096	; 0x1000
    71ae:	fbb0 f0f3 	udiv	r0, r0, r3
    71b2:	2820      	cmp	r0, #32
    71b4:	bf28      	it	cs
    71b6:	2020      	movcs	r0, #32
    71b8:	b102      	cbz	r2, 71bc <PkaInitPka+0x48>
    71ba:	6010      	str	r0, [r2, #0]
    71bc:	4b08      	ldr	r3, [pc, #32]	; (71e0 <PkaInitPka+0x6c>)
    71be:	2201      	movs	r2, #1
    71c0:	601a      	str	r2, [r3, #0]
    71c2:	4621      	mov	r1, r4
    71c4:	f7ff ff14 	bl	6ff0 <PkaSetRegsMapTab>
    71c8:	4628      	mov	r0, r5
    71ca:	4621      	mov	r1, r4
    71cc:	f7ff ffb4 	bl	7138 <PkaSetRegsSizesTab>
    71d0:	2000      	movs	r0, #0
    71d2:	bd38      	pop	{r3, r4, r5, pc}
    71d4:	f100 041f 	add.w	r4, r0, #31
    71d8:	0964      	lsrs	r4, r4, #5
    71da:	e7dd      	b.n	7198 <PkaInitPka+0x24>
    71dc:	4801      	ldr	r0, [pc, #4]	; (71e4 <PkaInitPka+0x70>)
    71de:	e7f8      	b.n	71d2 <PkaInitPka+0x5e>
    71e0:	5002b81c 	.word	0x5002b81c
    71e4:	00f02122 	.word	0x00f02122

000071e8 <PkaClearBlockOfRegs>:
    71e8:	b5f0      	push	{r4, r5, r6, r7, lr}
    71ea:	4b45      	ldr	r3, [pc, #276]	; (7300 <PkaClearBlockOfRegs+0x118>)
    71ec:	b089      	sub	sp, #36	; 0x24
    71ee:	461d      	mov	r5, r3
    71f0:	681c      	ldr	r4, [r3, #0]
    71f2:	9401      	str	r4, [sp, #4]
    71f4:	9c01      	ldr	r4, [sp, #4]
    71f6:	07e4      	lsls	r4, r4, #31
    71f8:	d5fa      	bpl.n	71f0 <PkaClearBlockOfRegs+0x8>
    71fa:	4b42      	ldr	r3, [pc, #264]	; (7304 <PkaClearBlockOfRegs+0x11c>)
    71fc:	f8df e10c 	ldr.w	lr, [pc, #268]	; 730c <PkaClearBlockOfRegs+0x124>
    7200:	f8df c10c 	ldr.w	ip, [pc, #268]	; 7310 <PkaClearBlockOfRegs+0x128>
    7204:	4413      	add	r3, r2
    7206:	009b      	lsls	r3, r3, #2
    7208:	2400      	movs	r4, #0
    720a:	681a      	ldr	r2, [r3, #0]
    720c:	180b      	adds	r3, r1, r0
    720e:	2b1e      	cmp	r3, #30
    7210:	bf88      	it	hi
    7212:	f1c0 011e 	rsbhi	r1, r0, #30
    7216:	321f      	adds	r2, #31
    7218:	180b      	adds	r3, r1, r0
    721a:	0952      	lsrs	r2, r2, #5
    721c:	4353      	muls	r3, r2
    721e:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
    7222:	bf82      	ittt	hi
    7224:	f44f 6180 	movhi.w	r1, #1024	; 0x400
    7228:	fbb1 f1f2 	udivhi	r1, r1, r2
    722c:	1a09      	subhi	r1, r1, r0
    722e:	f100 50a0 	add.w	r0, r0, #335544320	; 0x14000000
    7232:	f500 402c 	add.w	r0, r0, #44032	; 0xac00
    7236:	4627      	mov	r7, r4
    7238:	42a1      	cmp	r1, r4
    723a:	dc33      	bgt.n	72a4 <PkaClearBlockOfRegs+0xbc>
    723c:	682b      	ldr	r3, [r5, #0]
    723e:	9304      	str	r3, [sp, #16]
    7240:	9b04      	ldr	r3, [sp, #16]
    7242:	07db      	lsls	r3, r3, #31
    7244:	d5fa      	bpl.n	723c <PkaClearBlockOfRegs+0x54>
    7246:	4b30      	ldr	r3, [pc, #192]	; (7308 <PkaClearBlockOfRegs+0x120>)
    7248:	681b      	ldr	r3, [r3, #0]
    724a:	6829      	ldr	r1, [r5, #0]
    724c:	9105      	str	r1, [sp, #20]
    724e:	9905      	ldr	r1, [sp, #20]
    7250:	07cf      	lsls	r7, r1, #31
    7252:	d5fa      	bpl.n	724a <PkaClearBlockOfRegs+0x62>
    7254:	4c2d      	ldr	r4, [pc, #180]	; (730c <PkaClearBlockOfRegs+0x124>)
    7256:	492e      	ldr	r1, [pc, #184]	; (7310 <PkaClearBlockOfRegs+0x128>)
    7258:	6023      	str	r3, [r4, #0]
    725a:	2300      	movs	r3, #0
    725c:	461e      	mov	r6, r3
    725e:	4293      	cmp	r3, r2
    7260:	f103 0001 	add.w	r0, r3, #1
    7264:	d140      	bne.n	72e8 <PkaClearBlockOfRegs+0x100>
    7266:	f020 0201 	bic.w	r2, r0, #1
    726a:	4829      	ldr	r0, [pc, #164]	; (7310 <PkaClearBlockOfRegs+0x128>)
    726c:	4619      	mov	r1, r3
    726e:	2600      	movs	r6, #0
    7270:	428a      	cmp	r2, r1
    7272:	d83c      	bhi.n	72ee <PkaClearBlockOfRegs+0x106>
    7274:	6829      	ldr	r1, [r5, #0]
    7276:	9106      	str	r1, [sp, #24]
    7278:	9906      	ldr	r1, [sp, #24]
    727a:	07ce      	lsls	r6, r1, #31
    727c:	d5fa      	bpl.n	7274 <PkaClearBlockOfRegs+0x8c>
    727e:	4925      	ldr	r1, [pc, #148]	; (7314 <PkaClearBlockOfRegs+0x12c>)
    7280:	6809      	ldr	r1, [r1, #0]
    7282:	6828      	ldr	r0, [r5, #0]
    7284:	9007      	str	r0, [sp, #28]
    7286:	9807      	ldr	r0, [sp, #28]
    7288:	07c0      	lsls	r0, r0, #31
    728a:	d5fa      	bpl.n	7282 <PkaClearBlockOfRegs+0x9a>
    728c:	6021      	str	r1, [r4, #0]
    728e:	4820      	ldr	r0, [pc, #128]	; (7310 <PkaClearBlockOfRegs+0x128>)
    7290:	2100      	movs	r1, #0
    7292:	460c      	mov	r4, r1
    7294:	428b      	cmp	r3, r1
    7296:	d12d      	bne.n	72f4 <PkaClearBlockOfRegs+0x10c>
    7298:	491d      	ldr	r1, [pc, #116]	; (7310 <PkaClearBlockOfRegs+0x128>)
    729a:	2000      	movs	r0, #0
    729c:	429a      	cmp	r2, r3
    729e:	d82c      	bhi.n	72fa <PkaClearBlockOfRegs+0x112>
    72a0:	b009      	add	sp, #36	; 0x24
    72a2:	bdf0      	pop	{r4, r5, r6, r7, pc}
    72a4:	682b      	ldr	r3, [r5, #0]
    72a6:	9302      	str	r3, [sp, #8]
    72a8:	9b02      	ldr	r3, [sp, #8]
    72aa:	07db      	lsls	r3, r3, #31
    72ac:	d5fa      	bpl.n	72a4 <PkaClearBlockOfRegs+0xbc>
    72ae:	1903      	adds	r3, r0, r4
    72b0:	009b      	lsls	r3, r3, #2
    72b2:	681b      	ldr	r3, [r3, #0]
    72b4:	682e      	ldr	r6, [r5, #0]
    72b6:	9603      	str	r6, [sp, #12]
    72b8:	9e03      	ldr	r6, [sp, #12]
    72ba:	07f6      	lsls	r6, r6, #31
    72bc:	d5fa      	bpl.n	72b4 <PkaClearBlockOfRegs+0xcc>
    72be:	f8ce 3000 	str.w	r3, [lr]
    72c2:	2300      	movs	r3, #0
    72c4:	4293      	cmp	r3, r2
    72c6:	f103 0301 	add.w	r3, r3, #1
    72ca:	d106      	bne.n	72da <PkaClearBlockOfRegs+0xf2>
    72cc:	4616      	mov	r6, r2
    72ce:	f023 0301 	bic.w	r3, r3, #1
    72d2:	42b3      	cmp	r3, r6
    72d4:	d804      	bhi.n	72e0 <PkaClearBlockOfRegs+0xf8>
    72d6:	3401      	adds	r4, #1
    72d8:	e7ae      	b.n	7238 <PkaClearBlockOfRegs+0x50>
    72da:	f8cc 7000 	str.w	r7, [ip]
    72de:	e7f1      	b.n	72c4 <PkaClearBlockOfRegs+0xdc>
    72e0:	f8cc 7000 	str.w	r7, [ip]
    72e4:	3601      	adds	r6, #1
    72e6:	e7f4      	b.n	72d2 <PkaClearBlockOfRegs+0xea>
    72e8:	600e      	str	r6, [r1, #0]
    72ea:	4603      	mov	r3, r0
    72ec:	e7b7      	b.n	725e <PkaClearBlockOfRegs+0x76>
    72ee:	6006      	str	r6, [r0, #0]
    72f0:	3101      	adds	r1, #1
    72f2:	e7bd      	b.n	7270 <PkaClearBlockOfRegs+0x88>
    72f4:	6004      	str	r4, [r0, #0]
    72f6:	3101      	adds	r1, #1
    72f8:	e7cc      	b.n	7294 <PkaClearBlockOfRegs+0xac>
    72fa:	6008      	str	r0, [r1, #0]
    72fc:	3301      	adds	r3, #1
    72fe:	e7cd      	b.n	729c <PkaClearBlockOfRegs+0xb4>
    7300:	5002b0b4 	.word	0x5002b0b4
    7304:	1400ac24 	.word	0x1400ac24
    7308:	5002b07c 	.word	0x5002b07c
    730c:	5002b0d4 	.word	0x5002b0d4
    7310:	5002b0d8 	.word	0x5002b0d8
    7314:	5002b078 	.word	0x5002b078

00007318 <PkaFinishAndMutexUnlock>:
    7318:	b508      	push	{r3, lr}
    731a:	b140      	cbz	r0, 732e <PkaFinishAndMutexUnlock+0x16>
    731c:	2820      	cmp	r0, #32
    731e:	4601      	mov	r1, r0
    7320:	f04f 0207 	mov.w	r2, #7
    7324:	bf28      	it	cs
    7326:	2120      	movcs	r1, #32
    7328:	2000      	movs	r0, #0
    732a:	f7ff ff5d 	bl	71e8 <PkaClearBlockOfRegs>
    732e:	4b02      	ldr	r3, [pc, #8]	; (7338 <PkaFinishAndMutexUnlock+0x20>)
    7330:	2200      	movs	r2, #0
    7332:	601a      	str	r2, [r3, #0]
    7334:	bd08      	pop	{r3, pc}
    7336:	bf00      	nop
    7338:	5002b81c 	.word	0x5002b81c

0000733c <PkaCopyDataIntoPkaReg>:
    733c:	b5f0      	push	{r4, r5, r6, r7, lr}
    733e:	4d29      	ldr	r5, [pc, #164]	; (73e4 <PkaCopyDataIntoPkaReg+0xa8>)
    7340:	b085      	sub	sp, #20
    7342:	462c      	mov	r4, r5
    7344:	682e      	ldr	r6, [r5, #0]
    7346:	9600      	str	r6, [sp, #0]
    7348:	9e00      	ldr	r6, [sp, #0]
    734a:	07f6      	lsls	r6, r6, #31
    734c:	d5fa      	bpl.n	7344 <PkaCopyDataIntoPkaReg+0x8>
    734e:	f100 50a0 	add.w	r0, r0, #335544320	; 0x14000000
    7352:	f500 402c 	add.w	r0, r0, #44032	; 0xac00
    7356:	0080      	lsls	r0, r0, #2
    7358:	6805      	ldr	r5, [r0, #0]
    735a:	6820      	ldr	r0, [r4, #0]
    735c:	9001      	str	r0, [sp, #4]
    735e:	9801      	ldr	r0, [sp, #4]
    7360:	07c7      	lsls	r7, r0, #31
    7362:	d5fa      	bpl.n	735a <PkaCopyDataIntoPkaReg+0x1e>
    7364:	4820      	ldr	r0, [pc, #128]	; (73e8 <PkaCopyDataIntoPkaReg+0xac>)
    7366:	4f21      	ldr	r7, [pc, #132]	; (73ec <PkaCopyDataIntoPkaReg+0xb0>)
    7368:	6005      	str	r5, [r0, #0]
    736a:	eb02 0683 	add.w	r6, r2, r3, lsl #2
    736e:	42b2      	cmp	r2, r6
    7370:	d129      	bne.n	73c6 <PkaCopyDataIntoPkaReg+0x8a>
    7372:	1c5a      	adds	r2, r3, #1
    7374:	4e1d      	ldr	r6, [pc, #116]	; (73ec <PkaCopyDataIntoPkaReg+0xb0>)
    7376:	f022 0201 	bic.w	r2, r2, #1
    737a:	2700      	movs	r7, #0
    737c:	429a      	cmp	r2, r3
    737e:	d827      	bhi.n	73d0 <PkaCopyDataIntoPkaReg+0x94>
    7380:	6823      	ldr	r3, [r4, #0]
    7382:	9302      	str	r3, [sp, #8]
    7384:	9b02      	ldr	r3, [sp, #8]
    7386:	07de      	lsls	r6, r3, #31
    7388:	d5fa      	bpl.n	7380 <PkaCopyDataIntoPkaReg+0x44>
    738a:	4b19      	ldr	r3, [pc, #100]	; (73f0 <PkaCopyDataIntoPkaReg+0xb4>)
    738c:	440b      	add	r3, r1
    738e:	009b      	lsls	r3, r3, #2
    7390:	681b      	ldr	r3, [r3, #0]
    7392:	331f      	adds	r3, #31
    7394:	095b      	lsrs	r3, r3, #5
    7396:	429a      	cmp	r2, r3
    7398:	d213      	bcs.n	73c2 <PkaCopyDataIntoPkaReg+0x86>
    739a:	6821      	ldr	r1, [r4, #0]
    739c:	9103      	str	r1, [sp, #12]
    739e:	9903      	ldr	r1, [sp, #12]
    73a0:	07c9      	lsls	r1, r1, #31
    73a2:	d5fa      	bpl.n	739a <PkaCopyDataIntoPkaReg+0x5e>
    73a4:	4415      	add	r5, r2
    73a6:	2100      	movs	r1, #0
    73a8:	1a9b      	subs	r3, r3, r2
    73aa:	4a10      	ldr	r2, [pc, #64]	; (73ec <PkaCopyDataIntoPkaReg+0xb0>)
    73ac:	6005      	str	r5, [r0, #0]
    73ae:	4608      	mov	r0, r1
    73b0:	428b      	cmp	r3, r1
    73b2:	d810      	bhi.n	73d6 <PkaCopyDataIntoPkaReg+0x9a>
    73b4:	1c5a      	adds	r2, r3, #1
    73b6:	490d      	ldr	r1, [pc, #52]	; (73ec <PkaCopyDataIntoPkaReg+0xb0>)
    73b8:	f022 0201 	bic.w	r2, r2, #1
    73bc:	2000      	movs	r0, #0
    73be:	429a      	cmp	r2, r3
    73c0:	d80c      	bhi.n	73dc <PkaCopyDataIntoPkaReg+0xa0>
    73c2:	b005      	add	sp, #20
    73c4:	bdf0      	pop	{r4, r5, r6, r7, pc}
    73c6:	f852 cb04 	ldr.w	ip, [r2], #4
    73ca:	f8c7 c000 	str.w	ip, [r7]
    73ce:	e7ce      	b.n	736e <PkaCopyDataIntoPkaReg+0x32>
    73d0:	6037      	str	r7, [r6, #0]
    73d2:	3301      	adds	r3, #1
    73d4:	e7d2      	b.n	737c <PkaCopyDataIntoPkaReg+0x40>
    73d6:	6010      	str	r0, [r2, #0]
    73d8:	3101      	adds	r1, #1
    73da:	e7e9      	b.n	73b0 <PkaCopyDataIntoPkaReg+0x74>
    73dc:	6008      	str	r0, [r1, #0]
    73de:	3301      	adds	r3, #1
    73e0:	e7ed      	b.n	73be <PkaCopyDataIntoPkaReg+0x82>
    73e2:	bf00      	nop
    73e4:	5002b0b4 	.word	0x5002b0b4
    73e8:	5002b0d4 	.word	0x5002b0d4
    73ec:	5002b0d8 	.word	0x5002b0d8
    73f0:	1400ac24 	.word	0x1400ac24

000073f4 <PkaEcdsaVerify>:
    73f4:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    73f8:	4b81      	ldr	r3, [pc, #516]	; (7600 <PkaEcdsaVerify+0x20c>)
    73fa:	681d      	ldr	r5, [r3, #0]
    73fc:	6898      	ldr	r0, [r3, #8]
    73fe:	3320      	adds	r3, #32
    7400:	b0a0      	sub	sp, #128	; 0x80
    7402:	461e      	mov	r6, r3
    7404:	681a      	ldr	r2, [r3, #0]
    7406:	9201      	str	r2, [sp, #4]
    7408:	9a01      	ldr	r2, [sp, #4]
    740a:	07d7      	lsls	r7, r2, #31
    740c:	d5fa      	bpl.n	7404 <PkaEcdsaVerify+0x10>
    740e:	4b7d      	ldr	r3, [pc, #500]	; (7604 <PkaEcdsaVerify+0x210>)
    7410:	4a7d      	ldr	r2, [pc, #500]	; (7608 <PkaEcdsaVerify+0x214>)
    7412:	601a      	str	r2, [r3, #0]
    7414:	6832      	ldr	r2, [r6, #0]
    7416:	9202      	str	r2, [sp, #8]
    7418:	9a02      	ldr	r2, [sp, #8]
    741a:	07d4      	lsls	r4, r2, #31
    741c:	d5fa      	bpl.n	7414 <PkaEcdsaVerify+0x20>
    741e:	4a7b      	ldr	r2, [pc, #492]	; (760c <PkaEcdsaVerify+0x218>)
    7420:	601a      	str	r2, [r3, #0]
    7422:	4a7b      	ldr	r2, [pc, #492]	; (7610 <PkaEcdsaVerify+0x21c>)
    7424:	4614      	mov	r4, r2
    7426:	6811      	ldr	r1, [r2, #0]
    7428:	9103      	str	r1, [sp, #12]
    742a:	9903      	ldr	r1, [sp, #12]
    742c:	07c9      	lsls	r1, r1, #31
    742e:	d5fa      	bpl.n	7426 <PkaEcdsaVerify+0x32>
    7430:	4a78      	ldr	r2, [pc, #480]	; (7614 <PkaEcdsaVerify+0x220>)
    7432:	6811      	ldr	r1, [r2, #0]
    7434:	f3c1 2140 	ubfx	r1, r1, #9, #1
    7438:	6837      	ldr	r7, [r6, #0]
    743a:	9704      	str	r7, [sp, #16]
    743c:	9f04      	ldr	r7, [sp, #16]
    743e:	07ff      	lsls	r7, r7, #31
    7440:	d5fa      	bpl.n	7438 <PkaEcdsaVerify+0x44>
    7442:	4f75      	ldr	r7, [pc, #468]	; (7618 <PkaEcdsaVerify+0x224>)
    7444:	601f      	str	r7, [r3, #0]
    7446:	6827      	ldr	r7, [r4, #0]
    7448:	9705      	str	r7, [sp, #20]
    744a:	9f05      	ldr	r7, [sp, #20]
    744c:	07ff      	lsls	r7, r7, #31
    744e:	d5fa      	bpl.n	7446 <PkaEcdsaVerify+0x52>
    7450:	6817      	ldr	r7, [r2, #0]
    7452:	2900      	cmp	r1, #0
    7454:	f000 80cf 	beq.w	75f6 <PkaEcdsaVerify+0x202>
    7458:	05b9      	lsls	r1, r7, #22
    745a:	f140 80cc 	bpl.w	75f6 <PkaEcdsaVerify+0x202>
    745e:	6831      	ldr	r1, [r6, #0]
    7460:	9106      	str	r1, [sp, #24]
    7462:	9906      	ldr	r1, [sp, #24]
    7464:	07cf      	lsls	r7, r1, #31
    7466:	d5fa      	bpl.n	745e <PkaEcdsaVerify+0x6a>
    7468:	496c      	ldr	r1, [pc, #432]	; (761c <PkaEcdsaVerify+0x228>)
    746a:	6019      	str	r1, [r3, #0]
    746c:	6821      	ldr	r1, [r4, #0]
    746e:	9107      	str	r1, [sp, #28]
    7470:	9907      	ldr	r1, [sp, #28]
    7472:	07c9      	lsls	r1, r1, #31
    7474:	d5fa      	bpl.n	746c <PkaEcdsaVerify+0x78>
    7476:	6811      	ldr	r1, [r2, #0]
    7478:	f3c1 2140 	ubfx	r1, r1, #9, #1
    747c:	6837      	ldr	r7, [r6, #0]
    747e:	9708      	str	r7, [sp, #32]
    7480:	9f08      	ldr	r7, [sp, #32]
    7482:	07ff      	lsls	r7, r7, #31
    7484:	d5fa      	bpl.n	747c <PkaEcdsaVerify+0x88>
    7486:	4f66      	ldr	r7, [pc, #408]	; (7620 <PkaEcdsaVerify+0x22c>)
    7488:	601f      	str	r7, [r3, #0]
    748a:	6827      	ldr	r7, [r4, #0]
    748c:	9709      	str	r7, [sp, #36]	; 0x24
    748e:	9f09      	ldr	r7, [sp, #36]	; 0x24
    7490:	07ff      	lsls	r7, r7, #31
    7492:	d5fa      	bpl.n	748a <PkaEcdsaVerify+0x96>
    7494:	6812      	ldr	r2, [r2, #0]
    7496:	2900      	cmp	r1, #0
    7498:	f000 80af 	beq.w	75fa <PkaEcdsaVerify+0x206>
    749c:	0591      	lsls	r1, r2, #22
    749e:	f140 80ac 	bpl.w	75fa <PkaEcdsaVerify+0x206>
    74a2:	6832      	ldr	r2, [r6, #0]
    74a4:	920a      	str	r2, [sp, #40]	; 0x28
    74a6:	9a0a      	ldr	r2, [sp, #40]	; 0x28
    74a8:	07d2      	lsls	r2, r2, #31
    74aa:	d5fa      	bpl.n	74a2 <PkaEcdsaVerify+0xae>
    74ac:	4a56      	ldr	r2, [pc, #344]	; (7608 <PkaEcdsaVerify+0x214>)
    74ae:	601a      	str	r2, [r3, #0]
    74b0:	6832      	ldr	r2, [r6, #0]
    74b2:	920b      	str	r2, [sp, #44]	; 0x2c
    74b4:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
    74b6:	07d7      	lsls	r7, r2, #31
    74b8:	d5fa      	bpl.n	74b0 <PkaEcdsaVerify+0xbc>
    74ba:	4a5a      	ldr	r2, [pc, #360]	; (7624 <PkaEcdsaVerify+0x230>)
    74bc:	601a      	str	r2, [r3, #0]
    74be:	6831      	ldr	r1, [r6, #0]
    74c0:	910c      	str	r1, [sp, #48]	; 0x30
    74c2:	990c      	ldr	r1, [sp, #48]	; 0x30
    74c4:	07cc      	lsls	r4, r1, #31
    74c6:	d5fa      	bpl.n	74be <PkaEcdsaVerify+0xca>
    74c8:	4957      	ldr	r1, [pc, #348]	; (7628 <PkaEcdsaVerify+0x234>)
    74ca:	6019      	str	r1, [r3, #0]
    74cc:	6831      	ldr	r1, [r6, #0]
    74ce:	910d      	str	r1, [sp, #52]	; 0x34
    74d0:	990d      	ldr	r1, [sp, #52]	; 0x34
    74d2:	07c9      	lsls	r1, r1, #31
    74d4:	d5fa      	bpl.n	74cc <PkaEcdsaVerify+0xd8>
    74d6:	4955      	ldr	r1, [pc, #340]	; (762c <PkaEcdsaVerify+0x238>)
    74d8:	6019      	str	r1, [r3, #0]
    74da:	6831      	ldr	r1, [r6, #0]
    74dc:	910e      	str	r1, [sp, #56]	; 0x38
    74de:	990e      	ldr	r1, [sp, #56]	; 0x38
    74e0:	07cf      	lsls	r7, r1, #31
    74e2:	d5fa      	bpl.n	74da <PkaEcdsaVerify+0xe6>
    74e4:	4952      	ldr	r1, [pc, #328]	; (7630 <PkaEcdsaVerify+0x23c>)
    74e6:	6019      	str	r1, [r3, #0]
    74e8:	6831      	ldr	r1, [r6, #0]
    74ea:	910f      	str	r1, [sp, #60]	; 0x3c
    74ec:	990f      	ldr	r1, [sp, #60]	; 0x3c
    74ee:	07cc      	lsls	r4, r1, #31
    74f0:	d5fa      	bpl.n	74e8 <PkaEcdsaVerify+0xf4>
    74f2:	4950      	ldr	r1, [pc, #320]	; (7634 <PkaEcdsaVerify+0x240>)
    74f4:	6019      	str	r1, [r3, #0]
    74f6:	4b50      	ldr	r3, [pc, #320]	; (7638 <PkaEcdsaVerify+0x244>)
    74f8:	461e      	mov	r6, r3
    74fa:	6819      	ldr	r1, [r3, #0]
    74fc:	9110      	str	r1, [sp, #64]	; 0x40
    74fe:	9910      	ldr	r1, [sp, #64]	; 0x40
    7500:	07c9      	lsls	r1, r1, #31
    7502:	d5fa      	bpl.n	74fa <PkaEcdsaVerify+0x106>
    7504:	4c3f      	ldr	r4, [pc, #252]	; (7604 <PkaEcdsaVerify+0x210>)
    7506:	4b4d      	ldr	r3, [pc, #308]	; (763c <PkaEcdsaVerify+0x248>)
    7508:	6023      	str	r3, [r4, #0]
    750a:	6833      	ldr	r3, [r6, #0]
    750c:	9311      	str	r3, [sp, #68]	; 0x44
    750e:	9b11      	ldr	r3, [sp, #68]	; 0x44
    7510:	07db      	lsls	r3, r3, #31
    7512:	d5fa      	bpl.n	750a <PkaEcdsaVerify+0x116>
    7514:	4b4a      	ldr	r3, [pc, #296]	; (7640 <PkaEcdsaVerify+0x24c>)
    7516:	6023      	str	r3, [r4, #0]
    7518:	6833      	ldr	r3, [r6, #0]
    751a:	9312      	str	r3, [sp, #72]	; 0x48
    751c:	9b12      	ldr	r3, [sp, #72]	; 0x48
    751e:	07df      	lsls	r7, r3, #31
    7520:	d5fa      	bpl.n	7518 <PkaEcdsaVerify+0x124>
    7522:	4b48      	ldr	r3, [pc, #288]	; (7644 <PkaEcdsaVerify+0x250>)
    7524:	6023      	str	r3, [r4, #0]
    7526:	4b3a      	ldr	r3, [pc, #232]	; (7610 <PkaEcdsaVerify+0x21c>)
    7528:	4698      	mov	r8, r3
    752a:	6819      	ldr	r1, [r3, #0]
    752c:	9113      	str	r1, [sp, #76]	; 0x4c
    752e:	9913      	ldr	r1, [sp, #76]	; 0x4c
    7530:	07c9      	lsls	r1, r1, #31
    7532:	d5fa      	bpl.n	752a <PkaEcdsaVerify+0x136>
    7534:	4f32      	ldr	r7, [pc, #200]	; (7600 <PkaEcdsaVerify+0x20c>)
    7536:	6038      	str	r0, [r7, #0]
    7538:	6833      	ldr	r3, [r6, #0]
    753a:	9314      	str	r3, [sp, #80]	; 0x50
    753c:	9b14      	ldr	r3, [sp, #80]	; 0x50
    753e:	07db      	lsls	r3, r3, #31
    7540:	d5fa      	bpl.n	7538 <PkaEcdsaVerify+0x144>
    7542:	6022      	str	r2, [r4, #0]
    7544:	6833      	ldr	r3, [r6, #0]
    7546:	9315      	str	r3, [sp, #84]	; 0x54
    7548:	9b15      	ldr	r3, [sp, #84]	; 0x54
    754a:	07d8      	lsls	r0, r3, #31
    754c:	d5fa      	bpl.n	7544 <PkaEcdsaVerify+0x150>
    754e:	4b3e      	ldr	r3, [pc, #248]	; (7648 <PkaEcdsaVerify+0x254>)
    7550:	6023      	str	r3, [r4, #0]
    7552:	6833      	ldr	r3, [r6, #0]
    7554:	9316      	str	r3, [sp, #88]	; 0x58
    7556:	9b16      	ldr	r3, [sp, #88]	; 0x58
    7558:	07d9      	lsls	r1, r3, #31
    755a:	d5fa      	bpl.n	7552 <PkaEcdsaVerify+0x15e>
    755c:	4b3b      	ldr	r3, [pc, #236]	; (764c <PkaEcdsaVerify+0x258>)
    755e:	6023      	str	r3, [r4, #0]
    7560:	6833      	ldr	r3, [r6, #0]
    7562:	9317      	str	r3, [sp, #92]	; 0x5c
    7564:	9b17      	ldr	r3, [sp, #92]	; 0x5c
    7566:	07da      	lsls	r2, r3, #31
    7568:	d5fa      	bpl.n	7560 <PkaEcdsaVerify+0x16c>
    756a:	4b39      	ldr	r3, [pc, #228]	; (7650 <PkaEcdsaVerify+0x25c>)
    756c:	6023      	str	r3, [r4, #0]
    756e:	6833      	ldr	r3, [r6, #0]
    7570:	9318      	str	r3, [sp, #96]	; 0x60
    7572:	9b18      	ldr	r3, [sp, #96]	; 0x60
    7574:	07db      	lsls	r3, r3, #31
    7576:	d5fa      	bpl.n	756e <PkaEcdsaVerify+0x17a>
    7578:	4b36      	ldr	r3, [pc, #216]	; (7654 <PkaEcdsaVerify+0x260>)
    757a:	6023      	str	r3, [r4, #0]
    757c:	6833      	ldr	r3, [r6, #0]
    757e:	9319      	str	r3, [sp, #100]	; 0x64
    7580:	9b19      	ldr	r3, [sp, #100]	; 0x64
    7582:	07d8      	lsls	r0, r3, #31
    7584:	d5fa      	bpl.n	757c <PkaEcdsaVerify+0x188>
    7586:	4b34      	ldr	r3, [pc, #208]	; (7658 <PkaEcdsaVerify+0x264>)
    7588:	6023      	str	r3, [r4, #0]
    758a:	6833      	ldr	r3, [r6, #0]
    758c:	931a      	str	r3, [sp, #104]	; 0x68
    758e:	9b1a      	ldr	r3, [sp, #104]	; 0x68
    7590:	07d9      	lsls	r1, r3, #31
    7592:	d5fa      	bpl.n	758a <PkaEcdsaVerify+0x196>
    7594:	4b31      	ldr	r3, [pc, #196]	; (765c <PkaEcdsaVerify+0x268>)
    7596:	6023      	str	r3, [r4, #0]
    7598:	6833      	ldr	r3, [r6, #0]
    759a:	931b      	str	r3, [sp, #108]	; 0x6c
    759c:	9b1b      	ldr	r3, [sp, #108]	; 0x6c
    759e:	07da      	lsls	r2, r3, #31
    75a0:	d5fa      	bpl.n	7598 <PkaEcdsaVerify+0x1a4>
    75a2:	4b2f      	ldr	r3, [pc, #188]	; (7660 <PkaEcdsaVerify+0x26c>)
    75a4:	6023      	str	r3, [r4, #0]
    75a6:	f000 fc1d 	bl	7de4 <PkaSum2ScalarMullt>
    75aa:	bb08      	cbnz	r0, 75f0 <PkaEcdsaVerify+0x1fc>
    75ac:	f8d8 3000 	ldr.w	r3, [r8]
    75b0:	931c      	str	r3, [sp, #112]	; 0x70
    75b2:	9b1c      	ldr	r3, [sp, #112]	; 0x70
    75b4:	07db      	lsls	r3, r3, #31
    75b6:	d5f9      	bpl.n	75ac <PkaEcdsaVerify+0x1b8>
    75b8:	603d      	str	r5, [r7, #0]
    75ba:	6833      	ldr	r3, [r6, #0]
    75bc:	931d      	str	r3, [sp, #116]	; 0x74
    75be:	9b1d      	ldr	r3, [sp, #116]	; 0x74
    75c0:	07d9      	lsls	r1, r3, #31
    75c2:	d5fa      	bpl.n	75ba <PkaEcdsaVerify+0x1c6>
    75c4:	4b27      	ldr	r3, [pc, #156]	; (7664 <PkaEcdsaVerify+0x270>)
    75c6:	6023      	str	r3, [r4, #0]
    75c8:	6833      	ldr	r3, [r6, #0]
    75ca:	931e      	str	r3, [sp, #120]	; 0x78
    75cc:	9b1e      	ldr	r3, [sp, #120]	; 0x78
    75ce:	07da      	lsls	r2, r3, #31
    75d0:	d5fa      	bpl.n	75c8 <PkaEcdsaVerify+0x1d4>
    75d2:	4b25      	ldr	r3, [pc, #148]	; (7668 <PkaEcdsaVerify+0x274>)
    75d4:	6023      	str	r3, [r4, #0]
    75d6:	f8d8 3000 	ldr.w	r3, [r8]
    75da:	931f      	str	r3, [sp, #124]	; 0x7c
    75dc:	9b1f      	ldr	r3, [sp, #124]	; 0x7c
    75de:	07db      	lsls	r3, r3, #31
    75e0:	d5f9      	bpl.n	75d6 <PkaEcdsaVerify+0x1e2>
    75e2:	4b0c      	ldr	r3, [pc, #48]	; (7614 <PkaEcdsaVerify+0x220>)
    75e4:	681b      	ldr	r3, [r3, #0]
    75e6:	f413 5f80 	tst.w	r3, #4096	; 0x1000
    75ea:	4b20      	ldr	r3, [pc, #128]	; (766c <PkaEcdsaVerify+0x278>)
    75ec:	bf08      	it	eq
    75ee:	4618      	moveq	r0, r3
    75f0:	b020      	add	sp, #128	; 0x80
    75f2:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    75f6:	481e      	ldr	r0, [pc, #120]	; (7670 <PkaEcdsaVerify+0x27c>)
    75f8:	e7fa      	b.n	75f0 <PkaEcdsaVerify+0x1fc>
    75fa:	481e      	ldr	r0, [pc, #120]	; (7674 <PkaEcdsaVerify+0x280>)
    75fc:	e7f8      	b.n	75f0 <PkaEcdsaVerify+0x1fc>
    75fe:	bf00      	nop
    7600:	5002b090 	.word	0x5002b090
    7604:	5002b080 	.word	0x5002b080
    7608:	51021000 	.word	0x51021000
    760c:	29721fc0 	.word	0x29721fc0
    7610:	5002b0b4 	.word	0x5002b0b4
    7614:	5002b088 	.word	0x5002b088
    7618:	2901cfc0 	.word	0x2901cfc0
    761c:	290e1fc0 	.word	0x290e1fc0
    7620:	29003fc0 	.word	0x29003fc0
    7624:	49020140 	.word	0x49020140
    7628:	a8843100 	.word	0xa8843100
    762c:	49160000 	.word	0x49160000
    7630:	a1080140 	.word	0xa1080140
    7634:	88084480 	.word	0x88084480
    7638:	5002b0b0 	.word	0x5002b0b0
    763c:	887044c0 	.word	0x887044c0
    7640:	417a0780 	.word	0x417a0780
    7644:	417e07c0 	.word	0x417e07c0
    7648:	496a0000 	.word	0x496a0000
    764c:	49160680 	.word	0x49160680
    7650:	496e0040 	.word	0x496e0040
    7654:	21000200 	.word	0x21000200
    7658:	21208200 	.word	0x21208200
    765c:	21208240 	.word	0x21208240
    7660:	21248280 	.word	0x21248280
    7664:	a161a140 	.word	0xa161a140
    7668:	5161c800 	.word	0x5161c800
    766c:	00f10803 	.word	0x00f10803
    7670:	00f10801 	.word	0x00f10801
    7674:	00f10802 	.word	0x00f10802

00007678 <nrf_cc310_bl_hash_update_internal>:
    7678:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
    767c:	4b31      	ldr	r3, [pc, #196]	; (7744 <nrf_cc310_bl_hash_update_internal+0xcc>)
    767e:	6844      	ldr	r4, [r0, #4]
    7680:	4680      	mov	r8, r0
    7682:	4692      	mov	sl, r2
    7684:	4699      	mov	r9, r3
    7686:	681a      	ldr	r2, [r3, #0]
    7688:	2a00      	cmp	r2, #0
    768a:	d1fc      	bne.n	7686 <nrf_cc310_bl_hash_update_internal+0xe>
    768c:	4b2e      	ldr	r3, [pc, #184]	; (7748 <nrf_cc310_bl_hash_update_internal+0xd0>)
    768e:	469b      	mov	fp, r3
    7690:	681a      	ldr	r2, [r3, #0]
    7692:	2a00      	cmp	r2, #0
    7694:	d1fc      	bne.n	7690 <nrf_cc310_bl_hash_update_internal+0x18>
    7696:	f04f 30ff 	mov.w	r0, #4294967295
    769a:	9101      	str	r1, [sp, #4]
    769c:	f000 fc94 	bl	7fc8 <SaSi_HalClearInterruptBit>
    76a0:	2080      	movs	r0, #128	; 0x80
    76a2:	f000 fc97 	bl	7fd4 <SaSi_HalMaskInterrupt>
    76a6:	4d29      	ldr	r5, [pc, #164]	; (774c <nrf_cc310_bl_hash_update_internal+0xd4>)
    76a8:	4a29      	ldr	r2, [pc, #164]	; (7750 <nrf_cc310_bl_hash_update_internal+0xd8>)
    76aa:	4f2a      	ldr	r7, [pc, #168]	; (7754 <nrf_cc310_bl_hash_update_internal+0xdc>)
    76ac:	4e2a      	ldr	r6, [pc, #168]	; (7758 <nrf_cc310_bl_hash_update_internal+0xe0>)
    76ae:	2301      	movs	r3, #1
    76b0:	2007      	movs	r0, #7
    76b2:	602b      	str	r3, [r5, #0]
    76b4:	f5a2 729e 	sub.w	r2, r2, #316	; 0x13c
    76b8:	f8c2 013c 	str.w	r0, [r2, #316]	; 0x13c
    76bc:	6013      	str	r3, [r2, #0]
    76be:	6a63      	ldr	r3, [r4, #36]	; 0x24
    76c0:	603b      	str	r3, [r7, #0]
    76c2:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    76c4:	6033      	str	r3, [r6, #0]
    76c6:	f8d8 3000 	ldr.w	r3, [r8]
    76ca:	f842 3c04 	str.w	r3, [r2, #-4]
    76ce:	f8d8 3008 	ldr.w	r3, [r8, #8]
    76d2:	4620      	mov	r0, r4
    76d4:	4798      	blx	r3
    76d6:	9901      	ldr	r1, [sp, #4]
    76d8:	f8d9 3000 	ldr.w	r3, [r9]
    76dc:	2b00      	cmp	r3, #0
    76de:	d1fb      	bne.n	76d8 <nrf_cc310_bl_hash_update_internal+0x60>
    76e0:	f1ba 0f00 	cmp.w	sl, #0
    76e4:	d120      	bne.n	7728 <nrf_cc310_bl_hash_update_internal+0xb0>
    76e6:	4b1d      	ldr	r3, [pc, #116]	; (775c <nrf_cc310_bl_hash_update_internal+0xe4>)
    76e8:	2204      	movs	r2, #4
    76ea:	601a      	str	r2, [r3, #0]
    76ec:	f8d9 3000 	ldr.w	r3, [r9]
    76f0:	2b00      	cmp	r3, #0
    76f2:	d1fb      	bne.n	76ec <nrf_cc310_bl_hash_update_internal+0x74>
    76f4:	f8db a000 	ldr.w	sl, [fp]
    76f8:	f1ba 0f00 	cmp.w	sl, #0
    76fc:	d1fa      	bne.n	76f4 <nrf_cc310_bl_hash_update_internal+0x7c>
    76fe:	f8d8 300c 	ldr.w	r3, [r8, #12]
    7702:	4620      	mov	r0, r4
    7704:	4798      	blx	r3
    7706:	683b      	ldr	r3, [r7, #0]
    7708:	6263      	str	r3, [r4, #36]	; 0x24
    770a:	6833      	ldr	r3, [r6, #0]
    770c:	62a3      	str	r3, [r4, #40]	; 0x28
    770e:	4b14      	ldr	r3, [pc, #80]	; (7760 <nrf_cc310_bl_hash_update_internal+0xe8>)
    7710:	f8c3 a000 	str.w	sl, [r3]
    7714:	f8c3 a144 	str.w	sl, [r3, #324]	; 0x144
    7718:	f8d9 3000 	ldr.w	r3, [r9]
    771c:	2b00      	cmp	r3, #0
    771e:	d1fb      	bne.n	7718 <nrf_cc310_bl_hash_update_internal+0xa0>
    7720:	602b      	str	r3, [r5, #0]
    7722:	b003      	add	sp, #12
    7724:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    7728:	6a23      	ldr	r3, [r4, #32]
    772a:	2b01      	cmp	r3, #1
    772c:	bf04      	itt	eq
    772e:	4a0c      	ldreq	r2, [pc, #48]	; (7760 <nrf_cc310_bl_hash_update_internal+0xe8>)
    7730:	6013      	streq	r3, [r2, #0]
    7732:	4b0c      	ldr	r3, [pc, #48]	; (7764 <nrf_cc310_bl_hash_update_internal+0xec>)
    7734:	2040      	movs	r0, #64	; 0x40
    7736:	6019      	str	r1, [r3, #0]
    7738:	f8c3 a004 	str.w	sl, [r3, #4]
    773c:	f000 fc50 	bl	7fe0 <SaSi_HalWaitInterrupt>
    7740:	e7d4      	b.n	76ec <nrf_cc310_bl_hash_update_internal+0x74>
    7742:	bf00      	nop
    7744:	5002b910 	.word	0x5002b910
    7748:	5002bc20 	.word	0x5002bc20
    774c:	5002b818 	.word	0x5002b818
    7750:	5002b900 	.word	0x5002b900
    7754:	5002b7cc 	.word	0x5002b7cc
    7758:	5002b7d0 	.word	0x5002b7d0
    775c:	5002b7c8 	.word	0x5002b7c8
    7760:	5002b684 	.word	0x5002b684
    7764:	5002bc28 	.word	0x5002bc28

00007768 <PkaDoubleMdf2Mdf>:
    7768:	b510      	push	{r4, lr}
    776a:	4b54      	ldr	r3, [pc, #336]	; (78bc <PkaDoubleMdf2Mdf+0x154>)
    776c:	b098      	sub	sp, #96	; 0x60
    776e:	4619      	mov	r1, r3
    7770:	681a      	ldr	r2, [r3, #0]
    7772:	9201      	str	r2, [sp, #4]
    7774:	9a01      	ldr	r2, [sp, #4]
    7776:	07d2      	lsls	r2, r2, #31
    7778:	d5fa      	bpl.n	7770 <PkaDoubleMdf2Mdf+0x8>
    777a:	4b51      	ldr	r3, [pc, #324]	; (78c0 <PkaDoubleMdf2Mdf+0x158>)
    777c:	4a51      	ldr	r2, [pc, #324]	; (78c4 <PkaDoubleMdf2Mdf+0x15c>)
    777e:	601a      	str	r2, [r3, #0]
    7780:	680a      	ldr	r2, [r1, #0]
    7782:	9202      	str	r2, [sp, #8]
    7784:	9a02      	ldr	r2, [sp, #8]
    7786:	07d4      	lsls	r4, r2, #31
    7788:	d5fa      	bpl.n	7780 <PkaDoubleMdf2Mdf+0x18>
    778a:	4a4f      	ldr	r2, [pc, #316]	; (78c8 <PkaDoubleMdf2Mdf+0x160>)
    778c:	601a      	str	r2, [r3, #0]
    778e:	680a      	ldr	r2, [r1, #0]
    7790:	9203      	str	r2, [sp, #12]
    7792:	9a03      	ldr	r2, [sp, #12]
    7794:	07d0      	lsls	r0, r2, #31
    7796:	d5fa      	bpl.n	778e <PkaDoubleMdf2Mdf+0x26>
    7798:	484c      	ldr	r0, [pc, #304]	; (78cc <PkaDoubleMdf2Mdf+0x164>)
    779a:	6018      	str	r0, [r3, #0]
    779c:	680a      	ldr	r2, [r1, #0]
    779e:	9204      	str	r2, [sp, #16]
    77a0:	9a04      	ldr	r2, [sp, #16]
    77a2:	07d2      	lsls	r2, r2, #31
    77a4:	d5fa      	bpl.n	779c <PkaDoubleMdf2Mdf+0x34>
    77a6:	4a4a      	ldr	r2, [pc, #296]	; (78d0 <PkaDoubleMdf2Mdf+0x168>)
    77a8:	601a      	str	r2, [r3, #0]
    77aa:	680a      	ldr	r2, [r1, #0]
    77ac:	9205      	str	r2, [sp, #20]
    77ae:	9a05      	ldr	r2, [sp, #20]
    77b0:	07d4      	lsls	r4, r2, #31
    77b2:	d5fa      	bpl.n	77aa <PkaDoubleMdf2Mdf+0x42>
    77b4:	4a47      	ldr	r2, [pc, #284]	; (78d4 <PkaDoubleMdf2Mdf+0x16c>)
    77b6:	601a      	str	r2, [r3, #0]
    77b8:	680a      	ldr	r2, [r1, #0]
    77ba:	9206      	str	r2, [sp, #24]
    77bc:	9a06      	ldr	r2, [sp, #24]
    77be:	07d2      	lsls	r2, r2, #31
    77c0:	d5fa      	bpl.n	77b8 <PkaDoubleMdf2Mdf+0x50>
    77c2:	4a45      	ldr	r2, [pc, #276]	; (78d8 <PkaDoubleMdf2Mdf+0x170>)
    77c4:	601a      	str	r2, [r3, #0]
    77c6:	680a      	ldr	r2, [r1, #0]
    77c8:	9207      	str	r2, [sp, #28]
    77ca:	9a07      	ldr	r2, [sp, #28]
    77cc:	07d4      	lsls	r4, r2, #31
    77ce:	d5fa      	bpl.n	77c6 <PkaDoubleMdf2Mdf+0x5e>
    77d0:	4a42      	ldr	r2, [pc, #264]	; (78dc <PkaDoubleMdf2Mdf+0x174>)
    77d2:	601a      	str	r2, [r3, #0]
    77d4:	680a      	ldr	r2, [r1, #0]
    77d6:	9208      	str	r2, [sp, #32]
    77d8:	9a08      	ldr	r2, [sp, #32]
    77da:	07d2      	lsls	r2, r2, #31
    77dc:	d5fa      	bpl.n	77d4 <PkaDoubleMdf2Mdf+0x6c>
    77de:	4a40      	ldr	r2, [pc, #256]	; (78e0 <PkaDoubleMdf2Mdf+0x178>)
    77e0:	601a      	str	r2, [r3, #0]
    77e2:	680a      	ldr	r2, [r1, #0]
    77e4:	9209      	str	r2, [sp, #36]	; 0x24
    77e6:	9a09      	ldr	r2, [sp, #36]	; 0x24
    77e8:	07d4      	lsls	r4, r2, #31
    77ea:	d5fa      	bpl.n	77e2 <PkaDoubleMdf2Mdf+0x7a>
    77ec:	4a3d      	ldr	r2, [pc, #244]	; (78e4 <PkaDoubleMdf2Mdf+0x17c>)
    77ee:	601a      	str	r2, [r3, #0]
    77f0:	680a      	ldr	r2, [r1, #0]
    77f2:	920a      	str	r2, [sp, #40]	; 0x28
    77f4:	9a0a      	ldr	r2, [sp, #40]	; 0x28
    77f6:	07d2      	lsls	r2, r2, #31
    77f8:	d5fa      	bpl.n	77f0 <PkaDoubleMdf2Mdf+0x88>
    77fa:	4a3b      	ldr	r2, [pc, #236]	; (78e8 <PkaDoubleMdf2Mdf+0x180>)
    77fc:	601a      	str	r2, [r3, #0]
    77fe:	680a      	ldr	r2, [r1, #0]
    7800:	920b      	str	r2, [sp, #44]	; 0x2c
    7802:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
    7804:	07d4      	lsls	r4, r2, #31
    7806:	d5fa      	bpl.n	77fe <PkaDoubleMdf2Mdf+0x96>
    7808:	4a38      	ldr	r2, [pc, #224]	; (78ec <PkaDoubleMdf2Mdf+0x184>)
    780a:	601a      	str	r2, [r3, #0]
    780c:	680a      	ldr	r2, [r1, #0]
    780e:	920c      	str	r2, [sp, #48]	; 0x30
    7810:	9a0c      	ldr	r2, [sp, #48]	; 0x30
    7812:	07d2      	lsls	r2, r2, #31
    7814:	d5fa      	bpl.n	780c <PkaDoubleMdf2Mdf+0xa4>
    7816:	4a36      	ldr	r2, [pc, #216]	; (78f0 <PkaDoubleMdf2Mdf+0x188>)
    7818:	601a      	str	r2, [r3, #0]
    781a:	680a      	ldr	r2, [r1, #0]
    781c:	920d      	str	r2, [sp, #52]	; 0x34
    781e:	9a0d      	ldr	r2, [sp, #52]	; 0x34
    7820:	07d4      	lsls	r4, r2, #31
    7822:	d5fa      	bpl.n	781a <PkaDoubleMdf2Mdf+0xb2>
    7824:	4a33      	ldr	r2, [pc, #204]	; (78f4 <PkaDoubleMdf2Mdf+0x18c>)
    7826:	601a      	str	r2, [r3, #0]
    7828:	680a      	ldr	r2, [r1, #0]
    782a:	920e      	str	r2, [sp, #56]	; 0x38
    782c:	9a0e      	ldr	r2, [sp, #56]	; 0x38
    782e:	07d2      	lsls	r2, r2, #31
    7830:	d5fa      	bpl.n	7828 <PkaDoubleMdf2Mdf+0xc0>
    7832:	4a31      	ldr	r2, [pc, #196]	; (78f8 <PkaDoubleMdf2Mdf+0x190>)
    7834:	601a      	str	r2, [r3, #0]
    7836:	680a      	ldr	r2, [r1, #0]
    7838:	920f      	str	r2, [sp, #60]	; 0x3c
    783a:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
    783c:	07d4      	lsls	r4, r2, #31
    783e:	d5fa      	bpl.n	7836 <PkaDoubleMdf2Mdf+0xce>
    7840:	4a2e      	ldr	r2, [pc, #184]	; (78fc <PkaDoubleMdf2Mdf+0x194>)
    7842:	601a      	str	r2, [r3, #0]
    7844:	680a      	ldr	r2, [r1, #0]
    7846:	9210      	str	r2, [sp, #64]	; 0x40
    7848:	9a10      	ldr	r2, [sp, #64]	; 0x40
    784a:	07d2      	lsls	r2, r2, #31
    784c:	d5fa      	bpl.n	7844 <PkaDoubleMdf2Mdf+0xdc>
    784e:	4a2c      	ldr	r2, [pc, #176]	; (7900 <PkaDoubleMdf2Mdf+0x198>)
    7850:	601a      	str	r2, [r3, #0]
    7852:	4b1a      	ldr	r3, [pc, #104]	; (78bc <PkaDoubleMdf2Mdf+0x154>)
    7854:	4619      	mov	r1, r3
    7856:	681c      	ldr	r4, [r3, #0]
    7858:	9411      	str	r4, [sp, #68]	; 0x44
    785a:	9c11      	ldr	r4, [sp, #68]	; 0x44
    785c:	07e4      	lsls	r4, r4, #31
    785e:	d5fa      	bpl.n	7856 <PkaDoubleMdf2Mdf+0xee>
    7860:	4b17      	ldr	r3, [pc, #92]	; (78c0 <PkaDoubleMdf2Mdf+0x158>)
    7862:	6018      	str	r0, [r3, #0]
    7864:	6808      	ldr	r0, [r1, #0]
    7866:	9012      	str	r0, [sp, #72]	; 0x48
    7868:	9812      	ldr	r0, [sp, #72]	; 0x48
    786a:	07c4      	lsls	r4, r0, #31
    786c:	d5fa      	bpl.n	7864 <PkaDoubleMdf2Mdf+0xfc>
    786e:	601a      	str	r2, [r3, #0]
    7870:	680a      	ldr	r2, [r1, #0]
    7872:	9213      	str	r2, [sp, #76]	; 0x4c
    7874:	9a13      	ldr	r2, [sp, #76]	; 0x4c
    7876:	07d0      	lsls	r0, r2, #31
    7878:	d5fa      	bpl.n	7870 <PkaDoubleMdf2Mdf+0x108>
    787a:	4a12      	ldr	r2, [pc, #72]	; (78c4 <PkaDoubleMdf2Mdf+0x15c>)
    787c:	601a      	str	r2, [r3, #0]
    787e:	680a      	ldr	r2, [r1, #0]
    7880:	9214      	str	r2, [sp, #80]	; 0x50
    7882:	9a14      	ldr	r2, [sp, #80]	; 0x50
    7884:	07d2      	lsls	r2, r2, #31
    7886:	d5fa      	bpl.n	787e <PkaDoubleMdf2Mdf+0x116>
    7888:	4a1e      	ldr	r2, [pc, #120]	; (7904 <PkaDoubleMdf2Mdf+0x19c>)
    788a:	601a      	str	r2, [r3, #0]
    788c:	680a      	ldr	r2, [r1, #0]
    788e:	9215      	str	r2, [sp, #84]	; 0x54
    7890:	9a15      	ldr	r2, [sp, #84]	; 0x54
    7892:	07d4      	lsls	r4, r2, #31
    7894:	d5fa      	bpl.n	788c <PkaDoubleMdf2Mdf+0x124>
    7896:	4a1c      	ldr	r2, [pc, #112]	; (7908 <PkaDoubleMdf2Mdf+0x1a0>)
    7898:	601a      	str	r2, [r3, #0]
    789a:	680a      	ldr	r2, [r1, #0]
    789c:	9216      	str	r2, [sp, #88]	; 0x58
    789e:	9a16      	ldr	r2, [sp, #88]	; 0x58
    78a0:	07d0      	lsls	r0, r2, #31
    78a2:	d5fa      	bpl.n	789a <PkaDoubleMdf2Mdf+0x132>
    78a4:	4a19      	ldr	r2, [pc, #100]	; (790c <PkaDoubleMdf2Mdf+0x1a4>)
    78a6:	601a      	str	r2, [r3, #0]
    78a8:	680a      	ldr	r2, [r1, #0]
    78aa:	9217      	str	r2, [sp, #92]	; 0x5c
    78ac:	9a17      	ldr	r2, [sp, #92]	; 0x5c
    78ae:	07d2      	lsls	r2, r2, #31
    78b0:	d5fa      	bpl.n	78a8 <PkaDoubleMdf2Mdf+0x140>
    78b2:	4a17      	ldr	r2, [pc, #92]	; (7910 <PkaDoubleMdf2Mdf+0x1a8>)
    78b4:	601a      	str	r2, [r3, #0]
    78b6:	b018      	add	sp, #96	; 0x60
    78b8:	bd10      	pop	{r4, pc}
    78ba:	bf00      	nop
    78bc:	5002b0b0 	.word	0x5002b0b0
    78c0:	5002b080 	.word	0x5002b080
    78c4:	21659300 	.word	0x21659300
    78c8:	90310400 	.word	0x90310400
    78cc:	90659640 	.word	0x90659640
    78d0:	21618300 	.word	0x21618300
    78d4:	2130c300 	.word	0x2130c300
    78d8:	9064c300 	.word	0x9064c300
    78dc:	90618100 	.word	0x90618100
    78e0:	21104600 	.word	0x21104600
    78e4:	21118100 	.word	0x21118100
    78e8:	21444100 	.word	0x21444100
    78ec:	2920c300 	.word	0x2920c300
    78f0:	c810460c 	.word	0xc810460c
    78f4:	21318600 	.word	0x21318600
    78f8:	2160c300 	.word	0x2160c300
    78fc:	2928c140 	.word	0x2928c140
    7900:	21659640 	.word	0x21659640
    7904:	90311300 	.word	0x90311300
    7908:	29259640 	.word	0x29259640
    790c:	c8144659 	.word	0xc8144659
    7910:	49320440 	.word	0x49320440

00007914 <PkaDoubleMdf2Jcb>:
    7914:	b510      	push	{r4, lr}
    7916:	4b49      	ldr	r3, [pc, #292]	; (7a3c <PkaDoubleMdf2Jcb+0x128>)
    7918:	b094      	sub	sp, #80	; 0x50
    791a:	4619      	mov	r1, r3
    791c:	681a      	ldr	r2, [r3, #0]
    791e:	9200      	str	r2, [sp, #0]
    7920:	9a00      	ldr	r2, [sp, #0]
    7922:	07d2      	lsls	r2, r2, #31
    7924:	d5fa      	bpl.n	791c <PkaDoubleMdf2Jcb+0x8>
    7926:	4b46      	ldr	r3, [pc, #280]	; (7a40 <PkaDoubleMdf2Jcb+0x12c>)
    7928:	4a46      	ldr	r2, [pc, #280]	; (7a44 <PkaDoubleMdf2Jcb+0x130>)
    792a:	601a      	str	r2, [r3, #0]
    792c:	680a      	ldr	r2, [r1, #0]
    792e:	9201      	str	r2, [sp, #4]
    7930:	9a01      	ldr	r2, [sp, #4]
    7932:	07d4      	lsls	r4, r2, #31
    7934:	d5fa      	bpl.n	792c <PkaDoubleMdf2Jcb+0x18>
    7936:	4a44      	ldr	r2, [pc, #272]	; (7a48 <PkaDoubleMdf2Jcb+0x134>)
    7938:	601a      	str	r2, [r3, #0]
    793a:	680a      	ldr	r2, [r1, #0]
    793c:	9202      	str	r2, [sp, #8]
    793e:	9a02      	ldr	r2, [sp, #8]
    7940:	07d0      	lsls	r0, r2, #31
    7942:	d5fa      	bpl.n	793a <PkaDoubleMdf2Jcb+0x26>
    7944:	4841      	ldr	r0, [pc, #260]	; (7a4c <PkaDoubleMdf2Jcb+0x138>)
    7946:	6018      	str	r0, [r3, #0]
    7948:	680a      	ldr	r2, [r1, #0]
    794a:	9203      	str	r2, [sp, #12]
    794c:	9a03      	ldr	r2, [sp, #12]
    794e:	07d2      	lsls	r2, r2, #31
    7950:	d5fa      	bpl.n	7948 <PkaDoubleMdf2Jcb+0x34>
    7952:	4a3f      	ldr	r2, [pc, #252]	; (7a50 <PkaDoubleMdf2Jcb+0x13c>)
    7954:	601a      	str	r2, [r3, #0]
    7956:	680a      	ldr	r2, [r1, #0]
    7958:	9204      	str	r2, [sp, #16]
    795a:	9a04      	ldr	r2, [sp, #16]
    795c:	07d4      	lsls	r4, r2, #31
    795e:	d5fa      	bpl.n	7956 <PkaDoubleMdf2Jcb+0x42>
    7960:	4a3c      	ldr	r2, [pc, #240]	; (7a54 <PkaDoubleMdf2Jcb+0x140>)
    7962:	601a      	str	r2, [r3, #0]
    7964:	680a      	ldr	r2, [r1, #0]
    7966:	9205      	str	r2, [sp, #20]
    7968:	9a05      	ldr	r2, [sp, #20]
    796a:	07d2      	lsls	r2, r2, #31
    796c:	d5fa      	bpl.n	7964 <PkaDoubleMdf2Jcb+0x50>
    796e:	4a3a      	ldr	r2, [pc, #232]	; (7a58 <PkaDoubleMdf2Jcb+0x144>)
    7970:	601a      	str	r2, [r3, #0]
    7972:	680a      	ldr	r2, [r1, #0]
    7974:	9206      	str	r2, [sp, #24]
    7976:	9a06      	ldr	r2, [sp, #24]
    7978:	07d4      	lsls	r4, r2, #31
    797a:	d5fa      	bpl.n	7972 <PkaDoubleMdf2Jcb+0x5e>
    797c:	4a37      	ldr	r2, [pc, #220]	; (7a5c <PkaDoubleMdf2Jcb+0x148>)
    797e:	601a      	str	r2, [r3, #0]
    7980:	680a      	ldr	r2, [r1, #0]
    7982:	9207      	str	r2, [sp, #28]
    7984:	9a07      	ldr	r2, [sp, #28]
    7986:	07d2      	lsls	r2, r2, #31
    7988:	d5fa      	bpl.n	7980 <PkaDoubleMdf2Jcb+0x6c>
    798a:	4a35      	ldr	r2, [pc, #212]	; (7a60 <PkaDoubleMdf2Jcb+0x14c>)
    798c:	601a      	str	r2, [r3, #0]
    798e:	680a      	ldr	r2, [r1, #0]
    7990:	9208      	str	r2, [sp, #32]
    7992:	9a08      	ldr	r2, [sp, #32]
    7994:	07d4      	lsls	r4, r2, #31
    7996:	d5fa      	bpl.n	798e <PkaDoubleMdf2Jcb+0x7a>
    7998:	4a32      	ldr	r2, [pc, #200]	; (7a64 <PkaDoubleMdf2Jcb+0x150>)
    799a:	601a      	str	r2, [r3, #0]
    799c:	680a      	ldr	r2, [r1, #0]
    799e:	9209      	str	r2, [sp, #36]	; 0x24
    79a0:	9a09      	ldr	r2, [sp, #36]	; 0x24
    79a2:	07d2      	lsls	r2, r2, #31
    79a4:	d5fa      	bpl.n	799c <PkaDoubleMdf2Jcb+0x88>
    79a6:	4a30      	ldr	r2, [pc, #192]	; (7a68 <PkaDoubleMdf2Jcb+0x154>)
    79a8:	601a      	str	r2, [r3, #0]
    79aa:	680a      	ldr	r2, [r1, #0]
    79ac:	920a      	str	r2, [sp, #40]	; 0x28
    79ae:	9a0a      	ldr	r2, [sp, #40]	; 0x28
    79b0:	07d4      	lsls	r4, r2, #31
    79b2:	d5fa      	bpl.n	79aa <PkaDoubleMdf2Jcb+0x96>
    79b4:	4a2d      	ldr	r2, [pc, #180]	; (7a6c <PkaDoubleMdf2Jcb+0x158>)
    79b6:	601a      	str	r2, [r3, #0]
    79b8:	680a      	ldr	r2, [r1, #0]
    79ba:	920b      	str	r2, [sp, #44]	; 0x2c
    79bc:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
    79be:	07d2      	lsls	r2, r2, #31
    79c0:	d5fa      	bpl.n	79b8 <PkaDoubleMdf2Jcb+0xa4>
    79c2:	4a2b      	ldr	r2, [pc, #172]	; (7a70 <PkaDoubleMdf2Jcb+0x15c>)
    79c4:	601a      	str	r2, [r3, #0]
    79c6:	680a      	ldr	r2, [r1, #0]
    79c8:	920c      	str	r2, [sp, #48]	; 0x30
    79ca:	9a0c      	ldr	r2, [sp, #48]	; 0x30
    79cc:	07d4      	lsls	r4, r2, #31
    79ce:	d5fa      	bpl.n	79c6 <PkaDoubleMdf2Jcb+0xb2>
    79d0:	4a28      	ldr	r2, [pc, #160]	; (7a74 <PkaDoubleMdf2Jcb+0x160>)
    79d2:	601a      	str	r2, [r3, #0]
    79d4:	680a      	ldr	r2, [r1, #0]
    79d6:	920d      	str	r2, [sp, #52]	; 0x34
    79d8:	9a0d      	ldr	r2, [sp, #52]	; 0x34
    79da:	07d2      	lsls	r2, r2, #31
    79dc:	d5fa      	bpl.n	79d4 <PkaDoubleMdf2Jcb+0xc0>
    79de:	4a26      	ldr	r2, [pc, #152]	; (7a78 <PkaDoubleMdf2Jcb+0x164>)
    79e0:	601a      	str	r2, [r3, #0]
    79e2:	680a      	ldr	r2, [r1, #0]
    79e4:	920e      	str	r2, [sp, #56]	; 0x38
    79e6:	9a0e      	ldr	r2, [sp, #56]	; 0x38
    79e8:	07d4      	lsls	r4, r2, #31
    79ea:	d5fa      	bpl.n	79e2 <PkaDoubleMdf2Jcb+0xce>
    79ec:	4a23      	ldr	r2, [pc, #140]	; (7a7c <PkaDoubleMdf2Jcb+0x168>)
    79ee:	601a      	str	r2, [r3, #0]
    79f0:	680a      	ldr	r2, [r1, #0]
    79f2:	920f      	str	r2, [sp, #60]	; 0x3c
    79f4:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
    79f6:	07d2      	lsls	r2, r2, #31
    79f8:	d5fa      	bpl.n	79f0 <PkaDoubleMdf2Jcb+0xdc>
    79fa:	4a21      	ldr	r2, [pc, #132]	; (7a80 <PkaDoubleMdf2Jcb+0x16c>)
    79fc:	601a      	str	r2, [r3, #0]
    79fe:	4b0f      	ldr	r3, [pc, #60]	; (7a3c <PkaDoubleMdf2Jcb+0x128>)
    7a00:	4619      	mov	r1, r3
    7a02:	681c      	ldr	r4, [r3, #0]
    7a04:	9410      	str	r4, [sp, #64]	; 0x40
    7a06:	9c10      	ldr	r4, [sp, #64]	; 0x40
    7a08:	07e4      	lsls	r4, r4, #31
    7a0a:	d5fa      	bpl.n	7a02 <PkaDoubleMdf2Jcb+0xee>
    7a0c:	4b0c      	ldr	r3, [pc, #48]	; (7a40 <PkaDoubleMdf2Jcb+0x12c>)
    7a0e:	6018      	str	r0, [r3, #0]
    7a10:	6808      	ldr	r0, [r1, #0]
    7a12:	9011      	str	r0, [sp, #68]	; 0x44
    7a14:	9811      	ldr	r0, [sp, #68]	; 0x44
    7a16:	07c4      	lsls	r4, r0, #31
    7a18:	d5fa      	bpl.n	7a10 <PkaDoubleMdf2Jcb+0xfc>
    7a1a:	601a      	str	r2, [r3, #0]
    7a1c:	680a      	ldr	r2, [r1, #0]
    7a1e:	9212      	str	r2, [sp, #72]	; 0x48
    7a20:	9a12      	ldr	r2, [sp, #72]	; 0x48
    7a22:	07d0      	lsls	r0, r2, #31
    7a24:	d5fa      	bpl.n	7a1c <PkaDoubleMdf2Jcb+0x108>
    7a26:	4a17      	ldr	r2, [pc, #92]	; (7a84 <PkaDoubleMdf2Jcb+0x170>)
    7a28:	601a      	str	r2, [r3, #0]
    7a2a:	680a      	ldr	r2, [r1, #0]
    7a2c:	9213      	str	r2, [sp, #76]	; 0x4c
    7a2e:	9a13      	ldr	r2, [sp, #76]	; 0x4c
    7a30:	07d2      	lsls	r2, r2, #31
    7a32:	d5fa      	bpl.n	7a2a <PkaDoubleMdf2Jcb+0x116>
    7a34:	4a14      	ldr	r2, [pc, #80]	; (7a88 <PkaDoubleMdf2Jcb+0x174>)
    7a36:	601a      	str	r2, [r3, #0]
    7a38:	b014      	add	sp, #80	; 0x50
    7a3a:	bd10      	pop	{r4, pc}
    7a3c:	5002b0b0 	.word	0x5002b0b0
    7a40:	5002b080 	.word	0x5002b080
    7a44:	21659080 	.word	0x21659080
    7a48:	90090400 	.word	0x90090400
    7a4c:	90659640 	.word	0x90659640
    7a50:	21618080 	.word	0x21618080
    7a54:	21082080 	.word	0x21082080
    7a58:	90642080 	.word	0x90642080
    7a5c:	90618100 	.word	0x90618100
    7a60:	21104600 	.word	0x21104600
    7a64:	21118100 	.word	0x21118100
    7a68:	21444100 	.word	0x21444100
    7a6c:	29202080 	.word	0x29202080
    7a70:	c8104602 	.word	0xc8104602
    7a74:	21098600 	.word	0x21098600
    7a78:	21602080 	.word	0x21602080
    7a7c:	29282140 	.word	0x29282140
    7a80:	21659640 	.word	0x21659640
    7a84:	29259640 	.word	0x29259640
    7a88:	c8144659 	.word	0xc8144659

00007a8c <PkaAddJcbAfn2Mdf>:
    7a8c:	b510      	push	{r4, lr}
    7a8e:	4b50      	ldr	r3, [pc, #320]	; (7bd0 <PkaAddJcbAfn2Mdf+0x144>)
    7a90:	b096      	sub	sp, #88	; 0x58
    7a92:	461c      	mov	r4, r3
    7a94:	681a      	ldr	r2, [r3, #0]
    7a96:	9201      	str	r2, [sp, #4]
    7a98:	9a01      	ldr	r2, [sp, #4]
    7a9a:	07d2      	lsls	r2, r2, #31
    7a9c:	d5fa      	bpl.n	7a94 <PkaAddJcbAfn2Mdf+0x8>
    7a9e:	4b4d      	ldr	r3, [pc, #308]	; (7bd4 <PkaAddJcbAfn2Mdf+0x148>)
    7aa0:	4a4d      	ldr	r2, [pc, #308]	; (7bd8 <PkaAddJcbAfn2Mdf+0x14c>)
    7aa2:	601a      	str	r2, [r3, #0]
    7aa4:	6822      	ldr	r2, [r4, #0]
    7aa6:	9202      	str	r2, [sp, #8]
    7aa8:	9a02      	ldr	r2, [sp, #8]
    7aaa:	07d2      	lsls	r2, r2, #31
    7aac:	d5fa      	bpl.n	7aa4 <PkaAddJcbAfn2Mdf+0x18>
    7aae:	4a4b      	ldr	r2, [pc, #300]	; (7bdc <PkaAddJcbAfn2Mdf+0x150>)
    7ab0:	601a      	str	r2, [r3, #0]
    7ab2:	4a4b      	ldr	r2, [pc, #300]	; (7be0 <PkaAddJcbAfn2Mdf+0x154>)
    7ab4:	ea42 4080 	orr.w	r0, r2, r0, lsl #18
    7ab8:	6822      	ldr	r2, [r4, #0]
    7aba:	9203      	str	r2, [sp, #12]
    7abc:	9a03      	ldr	r2, [sp, #12]
    7abe:	07d2      	lsls	r2, r2, #31
    7ac0:	d5fa      	bpl.n	7ab8 <PkaAddJcbAfn2Mdf+0x2c>
    7ac2:	6018      	str	r0, [r3, #0]
    7ac4:	6822      	ldr	r2, [r4, #0]
    7ac6:	9204      	str	r2, [sp, #16]
    7ac8:	9a04      	ldr	r2, [sp, #16]
    7aca:	07d0      	lsls	r0, r2, #31
    7acc:	d5fa      	bpl.n	7ac4 <PkaAddJcbAfn2Mdf+0x38>
    7ace:	4a45      	ldr	r2, [pc, #276]	; (7be4 <PkaAddJcbAfn2Mdf+0x158>)
    7ad0:	601a      	str	r2, [r3, #0]
    7ad2:	f5a2 0280 	sub.w	r2, r2, #4194304	; 0x400000
    7ad6:	ea42 4181 	orr.w	r1, r2, r1, lsl #18
    7ada:	6822      	ldr	r2, [r4, #0]
    7adc:	9205      	str	r2, [sp, #20]
    7ade:	9a05      	ldr	r2, [sp, #20]
    7ae0:	07d2      	lsls	r2, r2, #31
    7ae2:	d5fa      	bpl.n	7ada <PkaAddJcbAfn2Mdf+0x4e>
    7ae4:	6019      	str	r1, [r3, #0]
    7ae6:	6822      	ldr	r2, [r4, #0]
    7ae8:	9206      	str	r2, [sp, #24]
    7aea:	9a06      	ldr	r2, [sp, #24]
    7aec:	07d0      	lsls	r0, r2, #31
    7aee:	d5fa      	bpl.n	7ae6 <PkaAddJcbAfn2Mdf+0x5a>
    7af0:	4a3d      	ldr	r2, [pc, #244]	; (7be8 <PkaAddJcbAfn2Mdf+0x15c>)
    7af2:	601a      	str	r2, [r3, #0]
    7af4:	6822      	ldr	r2, [r4, #0]
    7af6:	9207      	str	r2, [sp, #28]
    7af8:	9a07      	ldr	r2, [sp, #28]
    7afa:	07d1      	lsls	r1, r2, #31
    7afc:	d5fa      	bpl.n	7af4 <PkaAddJcbAfn2Mdf+0x68>
    7afe:	4a3b      	ldr	r2, [pc, #236]	; (7bec <PkaAddJcbAfn2Mdf+0x160>)
    7b00:	601a      	str	r2, [r3, #0]
    7b02:	6822      	ldr	r2, [r4, #0]
    7b04:	9208      	str	r2, [sp, #32]
    7b06:	9a08      	ldr	r2, [sp, #32]
    7b08:	07d2      	lsls	r2, r2, #31
    7b0a:	d5fa      	bpl.n	7b02 <PkaAddJcbAfn2Mdf+0x76>
    7b0c:	4a38      	ldr	r2, [pc, #224]	; (7bf0 <PkaAddJcbAfn2Mdf+0x164>)
    7b0e:	601a      	str	r2, [r3, #0]
    7b10:	6822      	ldr	r2, [r4, #0]
    7b12:	9209      	str	r2, [sp, #36]	; 0x24
    7b14:	9a09      	ldr	r2, [sp, #36]	; 0x24
    7b16:	07d0      	lsls	r0, r2, #31
    7b18:	d5fa      	bpl.n	7b10 <PkaAddJcbAfn2Mdf+0x84>
    7b1a:	4a36      	ldr	r2, [pc, #216]	; (7bf4 <PkaAddJcbAfn2Mdf+0x168>)
    7b1c:	601a      	str	r2, [r3, #0]
    7b1e:	6822      	ldr	r2, [r4, #0]
    7b20:	920a      	str	r2, [sp, #40]	; 0x28
    7b22:	9a0a      	ldr	r2, [sp, #40]	; 0x28
    7b24:	07d1      	lsls	r1, r2, #31
    7b26:	d5fa      	bpl.n	7b1e <PkaAddJcbAfn2Mdf+0x92>
    7b28:	4a33      	ldr	r2, [pc, #204]	; (7bf8 <PkaAddJcbAfn2Mdf+0x16c>)
    7b2a:	601a      	str	r2, [r3, #0]
    7b2c:	6822      	ldr	r2, [r4, #0]
    7b2e:	920b      	str	r2, [sp, #44]	; 0x2c
    7b30:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
    7b32:	07d2      	lsls	r2, r2, #31
    7b34:	d5fa      	bpl.n	7b2c <PkaAddJcbAfn2Mdf+0xa0>
    7b36:	4a31      	ldr	r2, [pc, #196]	; (7bfc <PkaAddJcbAfn2Mdf+0x170>)
    7b38:	601a      	str	r2, [r3, #0]
    7b3a:	6822      	ldr	r2, [r4, #0]
    7b3c:	920c      	str	r2, [sp, #48]	; 0x30
    7b3e:	9a0c      	ldr	r2, [sp, #48]	; 0x30
    7b40:	07d0      	lsls	r0, r2, #31
    7b42:	d5fa      	bpl.n	7b3a <PkaAddJcbAfn2Mdf+0xae>
    7b44:	4a2e      	ldr	r2, [pc, #184]	; (7c00 <PkaAddJcbAfn2Mdf+0x174>)
    7b46:	601a      	str	r2, [r3, #0]
    7b48:	6822      	ldr	r2, [r4, #0]
    7b4a:	920d      	str	r2, [sp, #52]	; 0x34
    7b4c:	9a0d      	ldr	r2, [sp, #52]	; 0x34
    7b4e:	07d1      	lsls	r1, r2, #31
    7b50:	d5fa      	bpl.n	7b48 <PkaAddJcbAfn2Mdf+0xbc>
    7b52:	4a2c      	ldr	r2, [pc, #176]	; (7c04 <PkaAddJcbAfn2Mdf+0x178>)
    7b54:	601a      	str	r2, [r3, #0]
    7b56:	6822      	ldr	r2, [r4, #0]
    7b58:	920e      	str	r2, [sp, #56]	; 0x38
    7b5a:	9a0e      	ldr	r2, [sp, #56]	; 0x38
    7b5c:	07d2      	lsls	r2, r2, #31
    7b5e:	d5fa      	bpl.n	7b56 <PkaAddJcbAfn2Mdf+0xca>
    7b60:	4a29      	ldr	r2, [pc, #164]	; (7c08 <PkaAddJcbAfn2Mdf+0x17c>)
    7b62:	601a      	str	r2, [r3, #0]
    7b64:	6822      	ldr	r2, [r4, #0]
    7b66:	920f      	str	r2, [sp, #60]	; 0x3c
    7b68:	9a0f      	ldr	r2, [sp, #60]	; 0x3c
    7b6a:	07d0      	lsls	r0, r2, #31
    7b6c:	d5fa      	bpl.n	7b64 <PkaAddJcbAfn2Mdf+0xd8>
    7b6e:	4a27      	ldr	r2, [pc, #156]	; (7c0c <PkaAddJcbAfn2Mdf+0x180>)
    7b70:	601a      	str	r2, [r3, #0]
    7b72:	6821      	ldr	r1, [r4, #0]
    7b74:	9110      	str	r1, [sp, #64]	; 0x40
    7b76:	9910      	ldr	r1, [sp, #64]	; 0x40
    7b78:	07c9      	lsls	r1, r1, #31
    7b7a:	d5fa      	bpl.n	7b72 <PkaAddJcbAfn2Mdf+0xe6>
    7b7c:	601a      	str	r2, [r3, #0]
    7b7e:	4b14      	ldr	r3, [pc, #80]	; (7bd0 <PkaAddJcbAfn2Mdf+0x144>)
    7b80:	461a      	mov	r2, r3
    7b82:	6819      	ldr	r1, [r3, #0]
    7b84:	9111      	str	r1, [sp, #68]	; 0x44
    7b86:	9911      	ldr	r1, [sp, #68]	; 0x44
    7b88:	07c8      	lsls	r0, r1, #31
    7b8a:	d5fa      	bpl.n	7b82 <PkaAddJcbAfn2Mdf+0xf6>
    7b8c:	4b11      	ldr	r3, [pc, #68]	; (7bd4 <PkaAddJcbAfn2Mdf+0x148>)
    7b8e:	4920      	ldr	r1, [pc, #128]	; (7c10 <PkaAddJcbAfn2Mdf+0x184>)
    7b90:	6019      	str	r1, [r3, #0]
    7b92:	6811      	ldr	r1, [r2, #0]
    7b94:	9112      	str	r1, [sp, #72]	; 0x48
    7b96:	9912      	ldr	r1, [sp, #72]	; 0x48
    7b98:	07c9      	lsls	r1, r1, #31
    7b9a:	d5fa      	bpl.n	7b92 <PkaAddJcbAfn2Mdf+0x106>
    7b9c:	491d      	ldr	r1, [pc, #116]	; (7c14 <PkaAddJcbAfn2Mdf+0x188>)
    7b9e:	6019      	str	r1, [r3, #0]
    7ba0:	6811      	ldr	r1, [r2, #0]
    7ba2:	9113      	str	r1, [sp, #76]	; 0x4c
    7ba4:	9913      	ldr	r1, [sp, #76]	; 0x4c
    7ba6:	07cc      	lsls	r4, r1, #31
    7ba8:	d5fa      	bpl.n	7ba0 <PkaAddJcbAfn2Mdf+0x114>
    7baa:	490b      	ldr	r1, [pc, #44]	; (7bd8 <PkaAddJcbAfn2Mdf+0x14c>)
    7bac:	6019      	str	r1, [r3, #0]
    7bae:	6811      	ldr	r1, [r2, #0]
    7bb0:	9114      	str	r1, [sp, #80]	; 0x50
    7bb2:	9914      	ldr	r1, [sp, #80]	; 0x50
    7bb4:	07c8      	lsls	r0, r1, #31
    7bb6:	d5fa      	bpl.n	7bae <PkaAddJcbAfn2Mdf+0x122>
    7bb8:	4917      	ldr	r1, [pc, #92]	; (7c18 <PkaAddJcbAfn2Mdf+0x18c>)
    7bba:	6019      	str	r1, [r3, #0]
    7bbc:	6811      	ldr	r1, [r2, #0]
    7bbe:	9115      	str	r1, [sp, #84]	; 0x54
    7bc0:	9915      	ldr	r1, [sp, #84]	; 0x54
    7bc2:	07c9      	lsls	r1, r1, #31
    7bc4:	d5fa      	bpl.n	7bbc <PkaAddJcbAfn2Mdf+0x130>
    7bc6:	4a15      	ldr	r2, [pc, #84]	; (7c1c <PkaAddJcbAfn2Mdf+0x190>)
    7bc8:	601a      	str	r2, [r3, #0]
    7bca:	b016      	add	sp, #88	; 0x58
    7bcc:	bd10      	pop	{r4, pc}
    7bce:	bf00      	nop
    7bd0:	5002b0b0 	.word	0x5002b0b0
    7bd4:	5002b080 	.word	0x5002b080
    7bd8:	90410440 	.word	0x90410440
    7bdc:	29298600 	.word	0x29298600
    7be0:	c80110d8 	.word	0xc80110d8
    7be4:	90411440 	.word	0x90411440
    7be8:	29211440 	.word	0x29211440
    7bec:	21651440 	.word	0x21651440
    7bf0:	90403400 	.word	0x90403400
    7bf4:	900c3100 	.word	0x900c3100
    7bf8:	900c40c0 	.word	0x900c40c0
    7bfc:	292030c0 	.word	0x292030c0
    7c00:	900d9640 	.word	0x900d9640
    7c04:	90604100 	.word	0x90604100
    7c08:	c8451603 	.word	0xc8451603
    7c0c:	21118600 	.word	0x21118600
    7c10:	21604100 	.word	0x21604100
    7c14:	c8444659 	.word	0xc8444659
    7c18:	90451440 	.word	0x90451440
    7c1c:	902d1440 	.word	0x902d1440

00007c20 <PkaJcb2Afn>:
    7c20:	b570      	push	{r4, r5, r6, lr}
    7c22:	4826      	ldr	r0, [pc, #152]	; (7cbc <PkaJcb2Afn+0x9c>)
    7c24:	b088      	sub	sp, #32
    7c26:	4605      	mov	r5, r0
    7c28:	6804      	ldr	r4, [r0, #0]
    7c2a:	9400      	str	r4, [sp, #0]
    7c2c:	9c00      	ldr	r4, [sp, #0]
    7c2e:	07e6      	lsls	r6, r4, #31
    7c30:	d5fa      	bpl.n	7c28 <PkaJcb2Afn+0x8>
    7c32:	4823      	ldr	r0, [pc, #140]	; (7cc0 <PkaJcb2Afn+0xa0>)
    7c34:	4c23      	ldr	r4, [pc, #140]	; (7cc4 <PkaJcb2Afn+0xa4>)
    7c36:	6004      	str	r4, [r0, #0]
    7c38:	4c23      	ldr	r4, [pc, #140]	; (7cc8 <PkaJcb2Afn+0xa8>)
    7c3a:	ea44 4383 	orr.w	r3, r4, r3, lsl #18
    7c3e:	682c      	ldr	r4, [r5, #0]
    7c40:	9401      	str	r4, [sp, #4]
    7c42:	9c01      	ldr	r4, [sp, #4]
    7c44:	07e4      	lsls	r4, r4, #31
    7c46:	d5fa      	bpl.n	7c3e <PkaJcb2Afn+0x1e>
    7c48:	6003      	str	r3, [r0, #0]
    7c4a:	0193      	lsls	r3, r2, #6
    7c4c:	ea43 4282 	orr.w	r2, r3, r2, lsl #18
    7c50:	f042 4410 	orr.w	r4, r2, #2415919104	; 0x90000000
    7c54:	f444 44c0 	orr.w	r4, r4, #24576	; 0x6000
    7c58:	682b      	ldr	r3, [r5, #0]
    7c5a:	9302      	str	r3, [sp, #8]
    7c5c:	9b02      	ldr	r3, [sp, #8]
    7c5e:	07de      	lsls	r6, r3, #31
    7c60:	d5fa      	bpl.n	7c58 <PkaJcb2Afn+0x38>
    7c62:	6004      	str	r4, [r0, #0]
    7c64:	682b      	ldr	r3, [r5, #0]
    7c66:	9303      	str	r3, [sp, #12]
    7c68:	9b03      	ldr	r3, [sp, #12]
    7c6a:	07db      	lsls	r3, r3, #31
    7c6c:	d5fa      	bpl.n	7c64 <PkaJcb2Afn+0x44>
    7c6e:	4b17      	ldr	r3, [pc, #92]	; (7ccc <PkaJcb2Afn+0xac>)
    7c70:	6003      	str	r3, [r0, #0]
    7c72:	018b      	lsls	r3, r1, #6
    7c74:	ea43 4181 	orr.w	r1, r3, r1, lsl #18
    7c78:	f041 4310 	orr.w	r3, r1, #2415919104	; 0x90000000
    7c7c:	f443 43c0 	orr.w	r3, r3, #24576	; 0x6000
    7c80:	682e      	ldr	r6, [r5, #0]
    7c82:	9604      	str	r6, [sp, #16]
    7c84:	9e04      	ldr	r6, [sp, #16]
    7c86:	07f6      	lsls	r6, r6, #31
    7c88:	d5fa      	bpl.n	7c80 <PkaJcb2Afn+0x60>
    7c8a:	6003      	str	r3, [r0, #0]
    7c8c:	682b      	ldr	r3, [r5, #0]
    7c8e:	9305      	str	r3, [sp, #20]
    7c90:	9b05      	ldr	r3, [sp, #20]
    7c92:	07de      	lsls	r6, r3, #31
    7c94:	d5fa      	bpl.n	7c8c <PkaJcb2Afn+0x6c>
    7c96:	6004      	str	r4, [r0, #0]
    7c98:	f041 4158 	orr.w	r1, r1, #3623878656	; 0xd8000000
    7c9c:	682b      	ldr	r3, [r5, #0]
    7c9e:	9306      	str	r3, [sp, #24]
    7ca0:	9b06      	ldr	r3, [sp, #24]
    7ca2:	07dc      	lsls	r4, r3, #31
    7ca4:	d5fa      	bpl.n	7c9c <PkaJcb2Afn+0x7c>
    7ca6:	6001      	str	r1, [r0, #0]
    7ca8:	f042 4258 	orr.w	r2, r2, #3623878656	; 0xd8000000
    7cac:	682b      	ldr	r3, [r5, #0]
    7cae:	9307      	str	r3, [sp, #28]
    7cb0:	9b07      	ldr	r3, [sp, #28]
    7cb2:	07db      	lsls	r3, r3, #31
    7cb4:	d5fa      	bpl.n	7cac <PkaJcb2Afn+0x8c>
    7cb6:	6002      	str	r2, [r0, #0]
    7cb8:	b008      	add	sp, #32
    7cba:	bd70      	pop	{r4, r5, r6, pc}
    7cbc:	5002b0b0 	.word	0x5002b0b0
    7cc0:	5002b080 	.word	0x5002b080
    7cc4:	290221c0 	.word	0x290221c0
    7cc8:	98007180 	.word	0x98007180
    7ccc:	90186180 	.word	0x90186180

00007cd0 <PkaAddAff>:
    7cd0:	4b35      	ldr	r3, [pc, #212]	; (7da8 <PkaAddAff+0xd8>)
    7cd2:	b08e      	sub	sp, #56	; 0x38
    7cd4:	4619      	mov	r1, r3
    7cd6:	681a      	ldr	r2, [r3, #0]
    7cd8:	9200      	str	r2, [sp, #0]
    7cda:	9a00      	ldr	r2, [sp, #0]
    7cdc:	07d2      	lsls	r2, r2, #31
    7cde:	d5fa      	bpl.n	7cd6 <PkaAddAff+0x6>
    7ce0:	4b32      	ldr	r3, [pc, #200]	; (7dac <PkaAddAff+0xdc>)
    7ce2:	4a33      	ldr	r2, [pc, #204]	; (7db0 <PkaAddAff+0xe0>)
    7ce4:	601a      	str	r2, [r3, #0]
    7ce6:	680a      	ldr	r2, [r1, #0]
    7ce8:	9201      	str	r2, [sp, #4]
    7cea:	9a01      	ldr	r2, [sp, #4]
    7cec:	07d0      	lsls	r0, r2, #31
    7cee:	d5fa      	bpl.n	7ce6 <PkaAddAff+0x16>
    7cf0:	4a30      	ldr	r2, [pc, #192]	; (7db4 <PkaAddAff+0xe4>)
    7cf2:	601a      	str	r2, [r3, #0]
    7cf4:	680a      	ldr	r2, [r1, #0]
    7cf6:	9202      	str	r2, [sp, #8]
    7cf8:	9a02      	ldr	r2, [sp, #8]
    7cfa:	07d2      	lsls	r2, r2, #31
    7cfc:	d5fa      	bpl.n	7cf4 <PkaAddAff+0x24>
    7cfe:	4a2e      	ldr	r2, [pc, #184]	; (7db8 <PkaAddAff+0xe8>)
    7d00:	601a      	str	r2, [r3, #0]
    7d02:	680a      	ldr	r2, [r1, #0]
    7d04:	9203      	str	r2, [sp, #12]
    7d06:	9a03      	ldr	r2, [sp, #12]
    7d08:	07d0      	lsls	r0, r2, #31
    7d0a:	d5fa      	bpl.n	7d02 <PkaAddAff+0x32>
    7d0c:	4a2b      	ldr	r2, [pc, #172]	; (7dbc <PkaAddAff+0xec>)
    7d0e:	601a      	str	r2, [r3, #0]
    7d10:	680a      	ldr	r2, [r1, #0]
    7d12:	9204      	str	r2, [sp, #16]
    7d14:	9a04      	ldr	r2, [sp, #16]
    7d16:	07d2      	lsls	r2, r2, #31
    7d18:	d5fa      	bpl.n	7d10 <PkaAddAff+0x40>
    7d1a:	4a29      	ldr	r2, [pc, #164]	; (7dc0 <PkaAddAff+0xf0>)
    7d1c:	601a      	str	r2, [r3, #0]
    7d1e:	680a      	ldr	r2, [r1, #0]
    7d20:	9205      	str	r2, [sp, #20]
    7d22:	9a05      	ldr	r2, [sp, #20]
    7d24:	07d0      	lsls	r0, r2, #31
    7d26:	d5fa      	bpl.n	7d1e <PkaAddAff+0x4e>
    7d28:	4a26      	ldr	r2, [pc, #152]	; (7dc4 <PkaAddAff+0xf4>)
    7d2a:	601a      	str	r2, [r3, #0]
    7d2c:	680a      	ldr	r2, [r1, #0]
    7d2e:	9206      	str	r2, [sp, #24]
    7d30:	9a06      	ldr	r2, [sp, #24]
    7d32:	07d2      	lsls	r2, r2, #31
    7d34:	d5fa      	bpl.n	7d2c <PkaAddAff+0x5c>
    7d36:	4a24      	ldr	r2, [pc, #144]	; (7dc8 <PkaAddAff+0xf8>)
    7d38:	601a      	str	r2, [r3, #0]
    7d3a:	680a      	ldr	r2, [r1, #0]
    7d3c:	9207      	str	r2, [sp, #28]
    7d3e:	9a07      	ldr	r2, [sp, #28]
    7d40:	07d0      	lsls	r0, r2, #31
    7d42:	d5fa      	bpl.n	7d3a <PkaAddAff+0x6a>
    7d44:	4a21      	ldr	r2, [pc, #132]	; (7dcc <PkaAddAff+0xfc>)
    7d46:	601a      	str	r2, [r3, #0]
    7d48:	680a      	ldr	r2, [r1, #0]
    7d4a:	9208      	str	r2, [sp, #32]
    7d4c:	9a08      	ldr	r2, [sp, #32]
    7d4e:	07d2      	lsls	r2, r2, #31
    7d50:	d5fa      	bpl.n	7d48 <PkaAddAff+0x78>
    7d52:	4a1f      	ldr	r2, [pc, #124]	; (7dd0 <PkaAddAff+0x100>)
    7d54:	601a      	str	r2, [r3, #0]
    7d56:	680a      	ldr	r2, [r1, #0]
    7d58:	9209      	str	r2, [sp, #36]	; 0x24
    7d5a:	9a09      	ldr	r2, [sp, #36]	; 0x24
    7d5c:	07d0      	lsls	r0, r2, #31
    7d5e:	d5fa      	bpl.n	7d56 <PkaAddAff+0x86>
    7d60:	4a1c      	ldr	r2, [pc, #112]	; (7dd4 <PkaAddAff+0x104>)
    7d62:	601a      	str	r2, [r3, #0]
    7d64:	680a      	ldr	r2, [r1, #0]
    7d66:	920a      	str	r2, [sp, #40]	; 0x28
    7d68:	9a0a      	ldr	r2, [sp, #40]	; 0x28
    7d6a:	07d2      	lsls	r2, r2, #31
    7d6c:	d5fa      	bpl.n	7d64 <PkaAddAff+0x94>
    7d6e:	4a1a      	ldr	r2, [pc, #104]	; (7dd8 <PkaAddAff+0x108>)
    7d70:	601a      	str	r2, [r3, #0]
    7d72:	6808      	ldr	r0, [r1, #0]
    7d74:	900b      	str	r0, [sp, #44]	; 0x2c
    7d76:	980b      	ldr	r0, [sp, #44]	; 0x2c
    7d78:	07c0      	lsls	r0, r0, #31
    7d7a:	d5fa      	bpl.n	7d72 <PkaAddAff+0xa2>
    7d7c:	601a      	str	r2, [r3, #0]
    7d7e:	680a      	ldr	r2, [r1, #0]
    7d80:	920c      	str	r2, [sp, #48]	; 0x30
    7d82:	9a0c      	ldr	r2, [sp, #48]	; 0x30
    7d84:	07d0      	lsls	r0, r2, #31
    7d86:	d5fa      	bpl.n	7d7e <PkaAddAff+0xae>
    7d88:	4a14      	ldr	r2, [pc, #80]	; (7ddc <PkaAddAff+0x10c>)
    7d8a:	601a      	str	r2, [r3, #0]
    7d8c:	680a      	ldr	r2, [r1, #0]
    7d8e:	920d      	str	r2, [sp, #52]	; 0x34
    7d90:	9a0d      	ldr	r2, [sp, #52]	; 0x34
    7d92:	07d2      	lsls	r2, r2, #31
    7d94:	d5fa      	bpl.n	7d8c <PkaAddAff+0xbc>
    7d96:	4a12      	ldr	r2, [pc, #72]	; (7de0 <PkaAddAff+0x110>)
    7d98:	601a      	str	r2, [r3, #0]
    7d9a:	210e      	movs	r1, #14
    7d9c:	230d      	movs	r3, #13
    7d9e:	220f      	movs	r2, #15
    7da0:	2000      	movs	r0, #0
    7da2:	b00e      	add	sp, #56	; 0x38
    7da4:	f7ff bf3c 	b.w	7c20 <PkaJcb2Afn>
    7da8:	5002b0b0 	.word	0x5002b0b0
    7dac:	5002b080 	.word	0x5002b080
    7db0:	29014380 	.word	0x29014380
    7db4:	21396340 	.word	0x21396340
    7db8:	29017080 	.word	0x29017080
    7dbc:	21542080 	.word	0x21542080
    7dc0:	9034d100 	.word	0x9034d100
    7dc4:	903440c0 	.word	0x903440c0
    7dc8:	292030c0 	.word	0x292030c0
    7dcc:	900d53c0 	.word	0x900d53c0
    7dd0:	90384100 	.word	0x90384100
    7dd4:	c8082383 	.word	0xc8082383
    7dd8:	2110e380 	.word	0x2110e380
    7ddc:	21384100 	.word	0x21384100
    7de0:	c80843cf 	.word	0xc80843cf

00007de4 <PkaSum2ScalarMullt>:
    7de4:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    7de8:	2301      	movs	r3, #1
    7dea:	b092      	sub	sp, #72	; 0x48
    7dec:	e9cd 3303 	strd	r3, r3, [sp, #12]
    7df0:	4b62      	ldr	r3, [pc, #392]	; (7f7c <PkaSum2ScalarMullt+0x198>)
    7df2:	461d      	mov	r5, r3
    7df4:	681a      	ldr	r2, [r3, #0]
    7df6:	9205      	str	r2, [sp, #20]
    7df8:	9a05      	ldr	r2, [sp, #20]
    7dfa:	07d2      	lsls	r2, r2, #31
    7dfc:	d5fa      	bpl.n	7df4 <PkaSum2ScalarMullt+0x10>
    7dfe:	4c60      	ldr	r4, [pc, #384]	; (7f80 <PkaSum2ScalarMullt+0x19c>)
    7e00:	4b60      	ldr	r3, [pc, #384]	; (7f84 <PkaSum2ScalarMullt+0x1a0>)
    7e02:	6023      	str	r3, [r4, #0]
    7e04:	4b60      	ldr	r3, [pc, #384]	; (7f88 <PkaSum2ScalarMullt+0x1a4>)
    7e06:	4619      	mov	r1, r3
    7e08:	681a      	ldr	r2, [r3, #0]
    7e0a:	9206      	str	r2, [sp, #24]
    7e0c:	9a06      	ldr	r2, [sp, #24]
    7e0e:	07d7      	lsls	r7, r2, #31
    7e10:	d5fa      	bpl.n	7e08 <PkaSum2ScalarMullt+0x24>
    7e12:	4b5e      	ldr	r3, [pc, #376]	; (7f8c <PkaSum2ScalarMullt+0x1a8>)
    7e14:	681a      	ldr	r2, [r3, #0]
    7e16:	04d6      	lsls	r6, r2, #19
    7e18:	f100 80a8 	bmi.w	7f6c <PkaSum2ScalarMullt+0x188>
    7e1c:	682a      	ldr	r2, [r5, #0]
    7e1e:	9207      	str	r2, [sp, #28]
    7e20:	9a07      	ldr	r2, [sp, #28]
    7e22:	07d0      	lsls	r0, r2, #31
    7e24:	d5fa      	bpl.n	7e1c <PkaSum2ScalarMullt+0x38>
    7e26:	4a5a      	ldr	r2, [pc, #360]	; (7f90 <PkaSum2ScalarMullt+0x1ac>)
    7e28:	6022      	str	r2, [r4, #0]
    7e2a:	680a      	ldr	r2, [r1, #0]
    7e2c:	9208      	str	r2, [sp, #32]
    7e2e:	9a08      	ldr	r2, [sp, #32]
    7e30:	07d2      	lsls	r2, r2, #31
    7e32:	d5fa      	bpl.n	7e2a <PkaSum2ScalarMullt+0x46>
    7e34:	681e      	ldr	r6, [r3, #0]
    7e36:	f3c6 3600 	ubfx	r6, r6, #12, #1
    7e3a:	2e00      	cmp	r6, #0
    7e3c:	f040 8098 	bne.w	7f70 <PkaSum2ScalarMullt+0x18c>
    7e40:	2012      	movs	r0, #18
    7e42:	f7ff f8f9 	bl	7038 <PkaGetRegEffectiveSizeInBits>
    7e46:	4607      	mov	r7, r0
    7e48:	2013      	movs	r0, #19
    7e4a:	f7ff f8f5 	bl	7038 <PkaGetRegEffectiveSizeInBits>
    7e4e:	4287      	cmp	r7, r0
    7e50:	bf8c      	ite	hi
    7e52:	2012      	movhi	r0, #18
    7e54:	2013      	movls	r0, #19
    7e56:	f7ff f8ef 	bl	7038 <PkaGetRegEffectiveSizeInBits>
    7e5a:	1e47      	subs	r7, r0, #1
    7e5c:	f7ff ff38 	bl	7cd0 <PkaAddAff>
    7e60:	ab03      	add	r3, sp, #12
    7e62:	aa01      	add	r2, sp, #4
    7e64:	4639      	mov	r1, r7
    7e66:	2012      	movs	r0, #18
    7e68:	f7ff f92c 	bl	70c4 <PkaGetNextMsBit>
    7e6c:	ab04      	add	r3, sp, #16
    7e6e:	4680      	mov	r8, r0
    7e70:	aa02      	add	r2, sp, #8
    7e72:	4639      	mov	r1, r7
    7e74:	2013      	movs	r0, #19
    7e76:	f7ff f925 	bl	70c4 <PkaGetNextMsBit>
    7e7a:	eb00 0048 	add.w	r0, r0, r8, lsl #1
    7e7e:	2802      	cmp	r0, #2
    7e80:	d032      	beq.n	7ee8 <PkaSum2ScalarMullt+0x104>
    7e82:	2803      	cmp	r0, #3
    7e84:	d03e      	beq.n	7f04 <PkaSum2ScalarMullt+0x120>
    7e86:	2801      	cmp	r0, #1
    7e88:	d174      	bne.n	7f74 <PkaSum2ScalarMullt+0x190>
    7e8a:	682b      	ldr	r3, [r5, #0]
    7e8c:	9309      	str	r3, [sp, #36]	; 0x24
    7e8e:	9b09      	ldr	r3, [sp, #36]	; 0x24
    7e90:	07db      	lsls	r3, r3, #31
    7e92:	d5fa      	bpl.n	7e8a <PkaSum2ScalarMullt+0xa6>
    7e94:	4b3f      	ldr	r3, [pc, #252]	; (7f94 <PkaSum2ScalarMullt+0x1b0>)
    7e96:	6023      	str	r3, [r4, #0]
    7e98:	682b      	ldr	r3, [r5, #0]
    7e9a:	930a      	str	r3, [sp, #40]	; 0x28
    7e9c:	9b0a      	ldr	r3, [sp, #40]	; 0x28
    7e9e:	07d8      	lsls	r0, r3, #31
    7ea0:	d5fa      	bpl.n	7e98 <PkaSum2ScalarMullt+0xb4>
    7ea2:	4b3d      	ldr	r3, [pc, #244]	; (7f98 <PkaSum2ScalarMullt+0x1b4>)
    7ea4:	6023      	str	r3, [r4, #0]
    7ea6:	682b      	ldr	r3, [r5, #0]
    7ea8:	930f      	str	r3, [sp, #60]	; 0x3c
    7eaa:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
    7eac:	07d9      	lsls	r1, r3, #31
    7eae:	d5fa      	bpl.n	7ea6 <PkaSum2ScalarMullt+0xc2>
    7eb0:	4b3a      	ldr	r3, [pc, #232]	; (7f9c <PkaSum2ScalarMullt+0x1b8>)
    7eb2:	6023      	str	r3, [r4, #0]
    7eb4:	682b      	ldr	r3, [r5, #0]
    7eb6:	9310      	str	r3, [sp, #64]	; 0x40
    7eb8:	9b10      	ldr	r3, [sp, #64]	; 0x40
    7eba:	07da      	lsls	r2, r3, #31
    7ebc:	d5fa      	bpl.n	7eb4 <PkaSum2ScalarMullt+0xd0>
    7ebe:	4b38      	ldr	r3, [pc, #224]	; (7fa0 <PkaSum2ScalarMullt+0x1bc>)
    7ec0:	6023      	str	r3, [r4, #0]
    7ec2:	682b      	ldr	r3, [r5, #0]
    7ec4:	9311      	str	r3, [sp, #68]	; 0x44
    7ec6:	9b11      	ldr	r3, [sp, #68]	; 0x44
    7ec8:	07db      	lsls	r3, r3, #31
    7eca:	d5fa      	bpl.n	7ec2 <PkaSum2ScalarMullt+0xde>
    7ecc:	4b35      	ldr	r3, [pc, #212]	; (7fa4 <PkaSum2ScalarMullt+0x1c0>)
    7ece:	6023      	str	r3, [r4, #0]
    7ed0:	3f01      	subs	r7, #1
    7ed2:	d525      	bpl.n	7f20 <PkaSum2ScalarMullt+0x13c>
    7ed4:	2310      	movs	r3, #16
    7ed6:	2219      	movs	r2, #25
    7ed8:	2118      	movs	r1, #24
    7eda:	2000      	movs	r0, #0
    7edc:	f7ff fea0 	bl	7c20 <PkaJcb2Afn>
    7ee0:	4630      	mov	r0, r6
    7ee2:	b012      	add	sp, #72	; 0x48
    7ee4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    7ee8:	682b      	ldr	r3, [r5, #0]
    7eea:	930b      	str	r3, [sp, #44]	; 0x2c
    7eec:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
    7eee:	07d9      	lsls	r1, r3, #31
    7ef0:	d5fa      	bpl.n	7ee8 <PkaSum2ScalarMullt+0x104>
    7ef2:	4b2d      	ldr	r3, [pc, #180]	; (7fa8 <PkaSum2ScalarMullt+0x1c4>)
    7ef4:	6023      	str	r3, [r4, #0]
    7ef6:	682b      	ldr	r3, [r5, #0]
    7ef8:	930c      	str	r3, [sp, #48]	; 0x30
    7efa:	9b0c      	ldr	r3, [sp, #48]	; 0x30
    7efc:	07da      	lsls	r2, r3, #31
    7efe:	d5fa      	bpl.n	7ef6 <PkaSum2ScalarMullt+0x112>
    7f00:	4b2a      	ldr	r3, [pc, #168]	; (7fac <PkaSum2ScalarMullt+0x1c8>)
    7f02:	e7cf      	b.n	7ea4 <PkaSum2ScalarMullt+0xc0>
    7f04:	682b      	ldr	r3, [r5, #0]
    7f06:	930d      	str	r3, [sp, #52]	; 0x34
    7f08:	9b0d      	ldr	r3, [sp, #52]	; 0x34
    7f0a:	07db      	lsls	r3, r3, #31
    7f0c:	d5fa      	bpl.n	7f04 <PkaSum2ScalarMullt+0x120>
    7f0e:	4b28      	ldr	r3, [pc, #160]	; (7fb0 <PkaSum2ScalarMullt+0x1cc>)
    7f10:	6023      	str	r3, [r4, #0]
    7f12:	682b      	ldr	r3, [r5, #0]
    7f14:	930e      	str	r3, [sp, #56]	; 0x38
    7f16:	9b0e      	ldr	r3, [sp, #56]	; 0x38
    7f18:	07d8      	lsls	r0, r3, #31
    7f1a:	d5fa      	bpl.n	7f12 <PkaSum2ScalarMullt+0x12e>
    7f1c:	4b25      	ldr	r3, [pc, #148]	; (7fb4 <PkaSum2ScalarMullt+0x1d0>)
    7f1e:	e7c1      	b.n	7ea4 <PkaSum2ScalarMullt+0xc0>
    7f20:	ab03      	add	r3, sp, #12
    7f22:	aa01      	add	r2, sp, #4
    7f24:	4639      	mov	r1, r7
    7f26:	2012      	movs	r0, #18
    7f28:	f7ff f8cc 	bl	70c4 <PkaGetNextMsBit>
    7f2c:	ab04      	add	r3, sp, #16
    7f2e:	4604      	mov	r4, r0
    7f30:	aa02      	add	r2, sp, #8
    7f32:	4639      	mov	r1, r7
    7f34:	2013      	movs	r0, #19
    7f36:	f7ff f8c5 	bl	70c4 <PkaGetNextMsBit>
    7f3a:	eb10 0444 	adds.w	r4, r0, r4, lsl #1
    7f3e:	d102      	bne.n	7f46 <PkaSum2ScalarMullt+0x162>
    7f40:	f7ff fc12 	bl	7768 <PkaDoubleMdf2Mdf>
    7f44:	e7c4      	b.n	7ed0 <PkaSum2ScalarMullt+0xec>
    7f46:	f7ff fce5 	bl	7914 <PkaDoubleMdf2Jcb>
    7f4a:	2c02      	cmp	r4, #2
    7f4c:	d008      	beq.n	7f60 <PkaSum2ScalarMullt+0x17c>
    7f4e:	2c03      	cmp	r4, #3
    7f50:	d009      	beq.n	7f66 <PkaSum2ScalarMullt+0x182>
    7f52:	2c01      	cmp	r4, #1
    7f54:	d110      	bne.n	7f78 <PkaSum2ScalarMullt+0x194>
    7f56:	2117      	movs	r1, #23
    7f58:	2016      	movs	r0, #22
    7f5a:	f7ff fd97 	bl	7a8c <PkaAddJcbAfn2Mdf>
    7f5e:	e7b7      	b.n	7ed0 <PkaSum2ScalarMullt+0xec>
    7f60:	2115      	movs	r1, #21
    7f62:	2014      	movs	r0, #20
    7f64:	e7f9      	b.n	7f5a <PkaSum2ScalarMullt+0x176>
    7f66:	210f      	movs	r1, #15
    7f68:	200e      	movs	r0, #14
    7f6a:	e7f6      	b.n	7f5a <PkaSum2ScalarMullt+0x176>
    7f6c:	4e12      	ldr	r6, [pc, #72]	; (7fb8 <PkaSum2ScalarMullt+0x1d4>)
    7f6e:	e7b7      	b.n	7ee0 <PkaSum2ScalarMullt+0xfc>
    7f70:	4e12      	ldr	r6, [pc, #72]	; (7fbc <PkaSum2ScalarMullt+0x1d8>)
    7f72:	e7b5      	b.n	7ee0 <PkaSum2ScalarMullt+0xfc>
    7f74:	4e12      	ldr	r6, [pc, #72]	; (7fc0 <PkaSum2ScalarMullt+0x1dc>)
    7f76:	e7b3      	b.n	7ee0 <PkaSum2ScalarMullt+0xfc>
    7f78:	4e12      	ldr	r6, [pc, #72]	; (7fc4 <PkaSum2ScalarMullt+0x1e0>)
    7f7a:	e7b1      	b.n	7ee0 <PkaSum2ScalarMullt+0xfc>
    7f7c:	5002b0b0 	.word	0x5002b0b0
    7f80:	5002b080 	.word	0x5002b080
    7f84:	514a0800 	.word	0x514a0800
    7f88:	5002b0b4 	.word	0x5002b0b4
    7f8c:	5002b088 	.word	0x5002b088
    7f90:	514e0800 	.word	0x514e0800
    7f94:	495a0600 	.word	0x495a0600
    7f98:	495e0640 	.word	0x495e0640
    7f9c:	41420400 	.word	0x41420400
    7fa0:	49421400 	.word	0x49421400
    7fa4:	492e0440 	.word	0x492e0440
    7fa8:	49520600 	.word	0x49520600
    7fac:	49560640 	.word	0x49560640
    7fb0:	493a0600 	.word	0x493a0600
    7fb4:	493e0640 	.word	0x493e0640
    7fb8:	00f10806 	.word	0x00f10806
    7fbc:	00f10807 	.word	0x00f10807
    7fc0:	00f10804 	.word	0x00f10804
    7fc4:	00f10805 	.word	0x00f10805

00007fc8 <SaSi_HalClearInterruptBit>:
    7fc8:	4b01      	ldr	r3, [pc, #4]	; (7fd0 <SaSi_HalClearInterruptBit+0x8>)
    7fca:	6018      	str	r0, [r3, #0]
    7fcc:	4770      	bx	lr
    7fce:	bf00      	nop
    7fd0:	5002ba08 	.word	0x5002ba08

00007fd4 <SaSi_HalMaskInterrupt>:
    7fd4:	4b01      	ldr	r3, [pc, #4]	; (7fdc <SaSi_HalMaskInterrupt+0x8>)
    7fd6:	6018      	str	r0, [r3, #0]
    7fd8:	4770      	bx	lr
    7fda:	bf00      	nop
    7fdc:	5002ba04 	.word	0x5002ba04

00007fe0 <SaSi_HalWaitInterrupt>:
    7fe0:	4a03      	ldr	r2, [pc, #12]	; (7ff0 <SaSi_HalWaitInterrupt+0x10>)
    7fe2:	6813      	ldr	r3, [r2, #0]
    7fe4:	4218      	tst	r0, r3
    7fe6:	d0fc      	beq.n	7fe2 <SaSi_HalWaitInterrupt+0x2>
    7fe8:	4a02      	ldr	r2, [pc, #8]	; (7ff4 <SaSi_HalWaitInterrupt+0x14>)
    7fea:	6010      	str	r0, [r2, #0]
    7fec:	4618      	mov	r0, r3
    7fee:	4770      	bx	lr
    7ff0:	5002ba00 	.word	0x5002ba00
    7ff4:	5002ba08 	.word	0x5002ba08

00007ff8 <flash_area_id_from_multi_image_slot>:
 * MCUBoot uses continuous numbering for the primary slot, the secondary slot,
 * and the scratch while zephyr might number it differently.
 */
int flash_area_id_from_multi_image_slot(int image_index, int slot)
{
    switch (slot) {
    7ff8:	b129      	cbz	r1, 8006 <CONFIG_PM_PARTITION_SIZE_B0_IMAGE+0x6>
    7ffa:	2901      	cmp	r1, #1
    7ffc:	bf14      	ite	ne
    7ffe:	f06f 0015 	mvnne.w	r0, #21
    8002:	2005      	moveq	r0, #5
    8004:	4770      	bx	lr
    case 0: return FLASH_AREA_IMAGE_PRIMARY(image_index);
    8006:	2002      	movs	r0, #2
    case 2: return FLASH_AREA_IMAGE_SCRATCH;
#endif
    }

    return -EINVAL; /* flash_area_open will fail on that */
}
    8008:	4770      	bx	lr

0000800a <flash_area_get_device_id>:

uint8_t flash_area_get_device_id(const struct flash_area *fa)
{
	(void)fa;
	return FLASH_DEVICE_ID;
}
    800a:	2000      	movs	r0, #0
    800c:	4770      	bx	lr

0000800e <os_heap_init>:
    mbedtls_memory_buffer_alloc_init(mempool, sizeof(mempool));
}
#else
void os_heap_init(void)
{
}
    800e:	4770      	bx	lr

00008010 <bootutil_tlv_iter_begin>:
 *          -1 on errors
 */
int
bootutil_tlv_iter_begin(struct image_tlv_iter *it, const struct image_header *hdr,
                        const struct flash_area *fap, uint16_t type, bool prot)
{
    8010:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
    8014:	460e      	mov	r6, r1
    8016:	4617      	mov	r7, r2
    8018:	4699      	mov	r9, r3
    uint32_t off_;
    struct image_tlv_info info;

    if (it == NULL || hdr == NULL || fap == NULL) {
    801a:	4604      	mov	r4, r0
    801c:	b928      	cbnz	r0, 802a <bootutil_tlv_iter_begin+0x1a>
        return -1;
    801e:	f04f 38ff 	mov.w	r8, #4294967295
    it->prot_end = off_ + it->hdr->ih_protect_tlv_size;
    it->tlv_end = off_ + it->hdr->ih_protect_tlv_size + info.it_tlv_tot;
    // position on first TLV
    it->tlv_off = off_ + sizeof(info);
    return 0;
}
    8022:	4640      	mov	r0, r8
    8024:	b003      	add	sp, #12
    8026:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
    if (it == NULL || hdr == NULL || fap == NULL) {
    802a:	2900      	cmp	r1, #0
    802c:	d0f7      	beq.n	801e <bootutil_tlv_iter_begin+0xe>
    802e:	2a00      	cmp	r2, #0
    8030:	d0f5      	beq.n	801e <bootutil_tlv_iter_begin+0xe>
    off_ = BOOT_TLV_OFF(hdr);
    8032:	68cb      	ldr	r3, [r1, #12]
    8034:	890d      	ldrh	r5, [r1, #8]
    8036:	441d      	add	r5, r3
    if (LOAD_IMAGE_DATA(hdr, fap, off_, &info, sizeof(info))) {
    8038:	2304      	movs	r3, #4
    803a:	eb0d 0203 	add.w	r2, sp, r3
    803e:	4629      	mov	r1, r5
    8040:	4638      	mov	r0, r7
    8042:	f000 ff96 	bl	8f72 <flash_area_read>
    8046:	4680      	mov	r8, r0
    8048:	2800      	cmp	r0, #0
    804a:	d1e8      	bne.n	801e <bootutil_tlv_iter_begin+0xe>
    if (info.it_magic == IMAGE_TLV_PROT_INFO_MAGIC) {
    804c:	f8bd 1004 	ldrh.w	r1, [sp, #4]
    8050:	8973      	ldrh	r3, [r6, #10]
    8052:	f646 1208 	movw	r2, #26888	; 0x6908
    8056:	4291      	cmp	r1, r2
    8058:	d123      	bne.n	80a2 <bootutil_tlv_iter_begin+0x92>
        if (hdr->ih_protect_tlv_size != info.it_tlv_tot) {
    805a:	f8bd 1006 	ldrh.w	r1, [sp, #6]
    805e:	4299      	cmp	r1, r3
    8060:	d1dd      	bne.n	801e <bootutil_tlv_iter_begin+0xe>
        if (LOAD_IMAGE_DATA(hdr, fap, off_ + info.it_tlv_tot,
    8062:	2304      	movs	r3, #4
    8064:	eb0d 0203 	add.w	r2, sp, r3
    8068:	4429      	add	r1, r5
    806a:	4638      	mov	r0, r7
    806c:	f000 ff81 	bl	8f72 <flash_area_read>
    8070:	2800      	cmp	r0, #0
    8072:	d1d4      	bne.n	801e <bootutil_tlv_iter_begin+0xe>
    if (info.it_magic != IMAGE_TLV_INFO_MAGIC) {
    8074:	f8bd 2004 	ldrh.w	r2, [sp, #4]
    8078:	f646 1307 	movw	r3, #26887	; 0x6907
    807c:	429a      	cmp	r2, r3
    807e:	d1ce      	bne.n	801e <bootutil_tlv_iter_begin+0xe>
    it->prot = prot;
    8080:	f89d 3028 	ldrb.w	r3, [sp, #40]	; 0x28
    8084:	72a3      	strb	r3, [r4, #10]
    it->prot_end = off_ + it->hdr->ih_protect_tlv_size;
    8086:	8973      	ldrh	r3, [r6, #10]
    it->tlv_end = off_ + it->hdr->ih_protect_tlv_size + info.it_tlv_tot;
    8088:	f8bd 2006 	ldrh.w	r2, [sp, #6]
    it->type = type;
    808c:	f8a4 9008 	strh.w	r9, [r4, #8]
    it->prot_end = off_ + it->hdr->ih_protect_tlv_size;
    8090:	442b      	add	r3, r5
    8092:	60e3      	str	r3, [r4, #12]
    it->tlv_off = off_ + sizeof(info);
    8094:	3504      	adds	r5, #4
    it->tlv_end = off_ + it->hdr->ih_protect_tlv_size + info.it_tlv_tot;
    8096:	4413      	add	r3, r2
    it->fap = fap;
    8098:	e9c4 6700 	strd	r6, r7, [r4]
    it->tlv_end = off_ + it->hdr->ih_protect_tlv_size + info.it_tlv_tot;
    809c:	6163      	str	r3, [r4, #20]
    it->tlv_off = off_ + sizeof(info);
    809e:	6125      	str	r5, [r4, #16]
    return 0;
    80a0:	e7bf      	b.n	8022 <bootutil_tlv_iter_begin+0x12>
    } else if (hdr->ih_protect_tlv_size != 0) {
    80a2:	2b00      	cmp	r3, #0
    80a4:	d0e6      	beq.n	8074 <bootutil_tlv_iter_begin+0x64>
    80a6:	e7ba      	b.n	801e <bootutil_tlv_iter_begin+0xe>

000080a8 <bootutil_tlv_iter_next>:
 *          -1 on errors
 */
int
bootutil_tlv_iter_next(struct image_tlv_iter *it, uint32_t *off, uint16_t *len,
                       uint16_t *type)
{
    80a8:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
    80ac:	460f      	mov	r7, r1
    80ae:	4690      	mov	r8, r2
    80b0:	461e      	mov	r6, r3
    struct image_tlv tlv;
    int rc;

    if (it == NULL || it->hdr == NULL || it->fap == NULL) {
    80b2:	4604      	mov	r4, r0
    80b4:	b920      	cbnz	r0, 80c0 <bootutil_tlv_iter_next+0x18>
        return -1;
    80b6:	f04f 30ff 	mov.w	r0, #4294967295

        it->tlv_off += sizeof(tlv) + tlv.it_len;
    }

    return 1;
}
    80ba:	b003      	add	sp, #12
    80bc:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
    if (it == NULL || it->hdr == NULL || it->fap == NULL) {
    80c0:	6803      	ldr	r3, [r0, #0]
    80c2:	2b00      	cmp	r3, #0
    80c4:	d0f7      	beq.n	80b6 <bootutil_tlv_iter_next+0xe>
    80c6:	6843      	ldr	r3, [r0, #4]
    80c8:	2b00      	cmp	r3, #0
    80ca:	d0f4      	beq.n	80b6 <bootutil_tlv_iter_next+0xe>
        if (it->type == IMAGE_TLV_ANY || tlv.it_type == it->type) {
    80cc:	f64f 79ff 	movw	r9, #65535	; 0xffff
    while (it->tlv_off < it->tlv_end) {
    80d0:	e9d4 2304 	ldrd	r2, r3, [r4, #16]
    80d4:	429a      	cmp	r2, r3
    80d6:	d216      	bcs.n	8106 <bootutil_tlv_iter_next+0x5e>
        if (it->hdr->ih_protect_tlv_size > 0 && it->tlv_off == it->prot_end) {
    80d8:	6823      	ldr	r3, [r4, #0]
    80da:	895b      	ldrh	r3, [r3, #10]
    80dc:	b123      	cbz	r3, 80e8 <bootutil_tlv_iter_next+0x40>
    80de:	68e3      	ldr	r3, [r4, #12]
    80e0:	4293      	cmp	r3, r2
            it->tlv_off += sizeof(struct image_tlv_info);
    80e2:	bf04      	itt	eq
    80e4:	3304      	addeq	r3, #4
    80e6:	6123      	streq	r3, [r4, #16]
        rc = LOAD_IMAGE_DATA(it->hdr, it->fap, it->tlv_off, &tlv, sizeof tlv);
    80e8:	2304      	movs	r3, #4
    80ea:	6921      	ldr	r1, [r4, #16]
    80ec:	6860      	ldr	r0, [r4, #4]
    80ee:	eb0d 0203 	add.w	r2, sp, r3
    80f2:	f000 ff3e 	bl	8f72 <flash_area_read>
        if (rc) {
    80f6:	2800      	cmp	r0, #0
    80f8:	d1dd      	bne.n	80b6 <bootutil_tlv_iter_next+0xe>
        if (it->prot && it->tlv_off >= it->prot_end) {
    80fa:	7aa3      	ldrb	r3, [r4, #10]
    80fc:	6925      	ldr	r5, [r4, #16]
    80fe:	b123      	cbz	r3, 810a <bootutil_tlv_iter_next+0x62>
    8100:	68e3      	ldr	r3, [r4, #12]
    8102:	42ab      	cmp	r3, r5
    8104:	d801      	bhi.n	810a <bootutil_tlv_iter_next+0x62>
            return 1;
    8106:	2001      	movs	r0, #1
    8108:	e7d7      	b.n	80ba <bootutil_tlv_iter_next+0x12>
        if (it->type == IMAGE_TLV_ANY || tlv.it_type == it->type) {
    810a:	8921      	ldrh	r1, [r4, #8]
    810c:	f8bd 3006 	ldrh.w	r3, [sp, #6]
    8110:	4549      	cmp	r1, r9
    8112:	f103 0204 	add.w	r2, r3, #4
    8116:	d003      	beq.n	8120 <bootutil_tlv_iter_next+0x78>
    8118:	f8bd c004 	ldrh.w	ip, [sp, #4]
    811c:	458c      	cmp	ip, r1
    811e:	d10b      	bne.n	8138 <bootutil_tlv_iter_next+0x90>
            if (type != NULL) {
    8120:	b116      	cbz	r6, 8128 <bootutil_tlv_iter_next+0x80>
                *type = tlv.it_type;
    8122:	f8bd 1004 	ldrh.w	r1, [sp, #4]
    8126:	8031      	strh	r1, [r6, #0]
            *off = it->tlv_off + sizeof(tlv);
    8128:	3504      	adds	r5, #4
    812a:	603d      	str	r5, [r7, #0]
            *len = tlv.it_len;
    812c:	f8a8 3000 	strh.w	r3, [r8]
            it->tlv_off += sizeof(tlv) + tlv.it_len;
    8130:	6923      	ldr	r3, [r4, #16]
    8132:	4413      	add	r3, r2
    8134:	6123      	str	r3, [r4, #16]
            return 0;
    8136:	e7c0      	b.n	80ba <bootutil_tlv_iter_next+0x12>
        it->tlv_off += sizeof(tlv) + tlv.it_len;
    8138:	4415      	add	r5, r2
    813a:	6125      	str	r5, [r4, #16]
    813c:	e7c8      	b.n	80d0 <bootutil_tlv_iter_next+0x28>

0000813e <bootutil_read_bigint>:
{
    813e:	b573      	push	{r0, r1, r4, r5, r6, lr}
    8140:	460c      	mov	r4, r1
    8142:	4606      	mov	r6, r0
    8144:	4611      	mov	r1, r2
    if (mbedtls_asn1_get_tag(cp, end, &len, MBEDTLS_ASN1_INTEGER)) {
    8146:	2302      	movs	r3, #2
    8148:	aa01      	add	r2, sp, #4
    814a:	4620      	mov	r0, r4
    814c:	f000 fa44 	bl	85d8 <mbedtls_asn1_get_tag>
    8150:	4605      	mov	r5, r0
    8152:	b9e8      	cbnz	r0, 8190 <bootutil_read_bigint+0x52>
    if (len >= NUM_ECC_BYTES) {
    8154:	9a01      	ldr	r2, [sp, #4]
    8156:	2a1f      	cmp	r2, #31
    8158:	d90e      	bls.n	8178 <bootutil_read_bigint+0x3a>
        memcpy(i, *cp + len - NUM_ECC_BYTES, NUM_ECC_BYTES);
    815a:	6823      	ldr	r3, [r4, #0]
    815c:	f1a2 0120 	sub.w	r1, r2, #32
    8160:	4419      	add	r1, r3
    8162:	2220      	movs	r2, #32
    8164:	4630      	mov	r0, r6
        memcpy(i + NUM_ECC_BYTES - len, *cp, len);
    8166:	f001 f800 	bl	916a <memcpy>
    *cp += len;
    816a:	6823      	ldr	r3, [r4, #0]
    816c:	9a01      	ldr	r2, [sp, #4]
    816e:	4413      	add	r3, r2
    8170:	6023      	str	r3, [r4, #0]
}
    8172:	4628      	mov	r0, r5
    8174:	b002      	add	sp, #8
    8176:	bd70      	pop	{r4, r5, r6, pc}
        memset(i, 0, NUM_ECC_BYTES - len);
    8178:	4601      	mov	r1, r0
    817a:	f1c2 0220 	rsb	r2, r2, #32
    817e:	4630      	mov	r0, r6
    8180:	f000 fffe 	bl	9180 <memset>
        memcpy(i + NUM_ECC_BYTES - len, *cp, len);
    8184:	9a01      	ldr	r2, [sp, #4]
    8186:	6821      	ldr	r1, [r4, #0]
    8188:	f1c2 0020 	rsb	r0, r2, #32
    818c:	4430      	add	r0, r6
    818e:	e7ea      	b.n	8166 <bootutil_read_bigint+0x28>
        return -3;
    8190:	f06f 0502 	mvn.w	r5, #2
    8194:	e7ed      	b.n	8172 <bootutil_read_bigint+0x34>

00008196 <boot_fih_memequal>:
    return memcmp(s1, s2, n);
    8196:	f000 bfd8 	b.w	914a <memcmp>

0000819a <boot_trailer_sz>:
    return BOOT_STATUS_MAX_ENTRIES * boot_status_entry_sz(min_write_sz);
    819a:	f44f 73c0 	mov.w	r3, #384	; 0x180
    819e:	4358      	muls	r0, r3
}
    81a0:	3030      	adds	r0, #48	; 0x30
    81a2:	4770      	bx	lr

000081a4 <boot_status_entries>:
    if (flash_area_get_id(fap) == FLASH_AREA_IMAGE_PRIMARY(image_index) ||
    81a4:	780b      	ldrb	r3, [r1, #0]
    81a6:	2b02      	cmp	r3, #2
    81a8:	d006      	beq.n	81b8 <boot_status_entries+0x14>
    81aa:	2b05      	cmp	r3, #5
    return -1;
    81ac:	bf0c      	ite	eq
    81ae:	f44f 70c0 	moveq.w	r0, #384	; 0x180
    81b2:	f04f 30ff 	movne.w	r0, #4294967295
    81b6:	4770      	bx	lr
        return BOOT_STATUS_STATE_COUNT * BOOT_STATUS_MAX_ENTRIES;
    81b8:	f44f 70c0 	mov.w	r0, #384	; 0x180
}
    81bc:	4770      	bx	lr

000081be <boot_status_off>:
{
    81be:	b510      	push	{r4, lr}
    81c0:	4604      	mov	r4, r0
    elem_sz = flash_area_align(fap);
    81c2:	f000 ff4f 	bl	9064 <flash_area_align>
    return flash_area_get_size(fap) - off_from_end;
    81c6:	68a2      	ldr	r2, [r4, #8]
    return BOOT_STATUS_MAX_ENTRIES * boot_status_entry_sz(min_write_sz);
    81c8:	b2c3      	uxtb	r3, r0
    return flash_area_get_size(fap) - off_from_end;
    81ca:	3a30      	subs	r2, #48	; 0x30
}
    81cc:	f44f 70c0 	mov.w	r0, #384	; 0x180
    81d0:	fb00 2013 	mls	r0, r0, r3, r2
    81d4:	bd10      	pop	{r4, pc}

000081d6 <boot_write_copy_done>:
    return boot_image_ok_off(fap) - BOOT_MAX_ALIGN;
    81d6:	6881      	ldr	r1, [r0, #8]

    off = boot_copy_done_off(fap);
    BOOT_LOG_DBG("writing copy_done; fa_id=%d off=0x%lx (0x%lx)",
                 flash_area_get_id(fap), (unsigned long)off,
                 (unsigned long)(flash_area_get_off(fap) + off));
    return boot_write_trailer_flag(fap, off, BOOT_FLAG_SET);
    81d8:	2201      	movs	r2, #1
    81da:	3920      	subs	r1, #32
    81dc:	f001 ba11 	b.w	9602 <boot_write_trailer_flag>

000081e0 <boot_write_swap_size>:
}

int
boot_write_swap_size(const struct flash_area *fap, uint32_t swap_size)
{
    81e0:	b513      	push	{r0, r1, r4, lr}
    81e2:	4604      	mov	r4, r0
    81e4:	9101      	str	r1, [sp, #4]
    return boot_swap_info_off(fap) - BOOT_MAX_ALIGN;
    81e6:	f001 f9a9 	bl	953c <boot_swap_info_off>

    off = boot_swap_size_off(fap);
    BOOT_LOG_DBG("writing swap_size; fa_id=%d off=0x%lx (0x%lx)",
                 flash_area_get_id(fap), (unsigned long)off,
                 (unsigned long)flash_area_get_off(fap) + off);
    return boot_write_trailer(fap, off, (const uint8_t *) &swap_size, 4);
    81ea:	2304      	movs	r3, #4
    81ec:	f1a0 0108 	sub.w	r1, r0, #8
    81f0:	eb0d 0203 	add.w	r2, sp, r3
    81f4:	4620      	mov	r0, r4
    81f6:	f001 f9d5 	bl	95a4 <boot_write_trailer>
}
    81fa:	b002      	add	sp, #8
    81fc:	bd10      	pop	{r4, pc}

000081fe <boot_read_image_size>:
{
    81fe:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    8200:	4605      	mov	r5, r0
    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
    8202:	2000      	movs	r0, #0
{
    8204:	460c      	mov	r4, r1
    8206:	4617      	mov	r7, r2
    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
    8208:	f7ff fef6 	bl	7ff8 <flash_area_id_from_multi_image_slot>
    rc = flash_area_open(area_id, &fap);
    820c:	4669      	mov	r1, sp
    820e:	b2c0      	uxtb	r0, r0
    8210:	f7fa fa68 	bl	26e4 <flash_area_open>
    if (rc != 0) {
    8214:	b130      	cbz	r0, 8224 <boot_read_image_size+0x26>
        rc = BOOT_EFLASH;
    8216:	2501      	movs	r5, #1
    flash_area_close(fap);
    8218:	9800      	ldr	r0, [sp, #0]
    821a:	f000 fea9 	bl	8f70 <flash_area_close>
}
    821e:	4628      	mov	r0, r5
    8220:	b003      	add	sp, #12
    8222:	bdf0      	pop	{r4, r5, r6, r7, pc}
    off = BOOT_TLV_OFF(boot_img_hdr(state, slot));
    8224:	212c      	movs	r1, #44	; 0x2c
    8226:	fb01 5404 	mla	r4, r1, r4, r5
    if (flash_area_read(fap, off, &info, sizeof(info))) {
    822a:	9800      	ldr	r0, [sp, #0]
    off = BOOT_TLV_OFF(boot_img_hdr(state, slot));
    822c:	8921      	ldrh	r1, [r4, #8]
    822e:	68e3      	ldr	r3, [r4, #12]
    8230:	18ce      	adds	r6, r1, r3
    if (flash_area_read(fap, off, &info, sizeof(info))) {
    8232:	2304      	movs	r3, #4
    8234:	eb0d 0203 	add.w	r2, sp, r3
    8238:	4631      	mov	r1, r6
    823a:	f000 fe9a 	bl	8f72 <flash_area_read>
    823e:	4605      	mov	r5, r0
    8240:	2800      	cmp	r0, #0
    8242:	d1e8      	bne.n	8216 <boot_read_image_size+0x18>
    if (info.it_magic == IMAGE_TLV_PROT_INFO_MAGIC) {
    8244:	f8bd 2004 	ldrh.w	r2, [sp, #4]
    protect_tlv_size = boot_img_hdr(state, slot)->ih_protect_tlv_size;
    8248:	8964      	ldrh	r4, [r4, #10]
    if (info.it_magic == IMAGE_TLV_PROT_INFO_MAGIC) {
    824a:	f646 1308 	movw	r3, #26888	; 0x6908
    824e:	429a      	cmp	r2, r3
    8250:	d11a      	bne.n	8288 <boot_read_image_size+0x8a>
        if (protect_tlv_size != info.it_tlv_tot) {
    8252:	f8bd 3006 	ldrh.w	r3, [sp, #6]
    8256:	429c      	cmp	r4, r3
    8258:	d001      	beq.n	825e <boot_read_image_size+0x60>
            rc = BOOT_EBADIMAGE;
    825a:	2503      	movs	r5, #3
    825c:	e7dc      	b.n	8218 <boot_read_image_size+0x1a>
        if (flash_area_read(fap, off + info.it_tlv_tot, &info, sizeof(info))) {
    825e:	2304      	movs	r3, #4
    8260:	9800      	ldr	r0, [sp, #0]
    8262:	eb0d 0203 	add.w	r2, sp, r3
    8266:	19a1      	adds	r1, r4, r6
    8268:	f000 fe83 	bl	8f72 <flash_area_read>
    826c:	2800      	cmp	r0, #0
    826e:	d1d2      	bne.n	8216 <boot_read_image_size+0x18>
    if (info.it_magic != IMAGE_TLV_INFO_MAGIC) {
    8270:	f8bd 2004 	ldrh.w	r2, [sp, #4]
    8274:	f646 1307 	movw	r3, #26887	; 0x6907
    8278:	429a      	cmp	r2, r3
    827a:	d1ee      	bne.n	825a <boot_read_image_size+0x5c>
    *size = off + protect_tlv_size + info.it_tlv_tot;
    827c:	f8bd 1006 	ldrh.w	r1, [sp, #6]
    8280:	4421      	add	r1, r4
    8282:	4431      	add	r1, r6
    8284:	6039      	str	r1, [r7, #0]
    rc = 0;
    8286:	e7c7      	b.n	8218 <boot_read_image_size+0x1a>
    } else if (protect_tlv_size != 0) {
    8288:	2c00      	cmp	r4, #0
    828a:	d0f1      	beq.n	8270 <boot_read_image_size+0x72>
    828c:	e7e5      	b.n	825a <boot_read_image_size+0x5c>

0000828e <boot_read_image_headers>:
{
    828e:	b573      	push	{r0, r1, r4, r5, r6, lr}
    8290:	4613      	mov	r3, r2
            rc = boot_read_image_header(state, i, boot_img_hdr(state, i), bs);
    8292:	9201      	str	r2, [sp, #4]
{
    8294:	460e      	mov	r6, r1
            rc = boot_read_image_header(state, i, boot_img_hdr(state, i), bs);
    8296:	4602      	mov	r2, r0
    8298:	2100      	movs	r1, #0
{
    829a:	4605      	mov	r5, r0
            rc = boot_read_image_header(state, i, boot_img_hdr(state, i), bs);
    829c:	f7f8 fdf2 	bl	e84 <boot_read_image_header>
        if (rc != 0) {
    82a0:	4604      	mov	r4, r0
    82a2:	b950      	cbnz	r0, 82ba <boot_read_image_headers+0x2c>
            rc = boot_read_image_header(state, i, boot_img_hdr(state, i), bs);
    82a4:	9b01      	ldr	r3, [sp, #4]
    82a6:	f105 022c 	add.w	r2, r5, #44	; 0x2c
    82aa:	2101      	movs	r1, #1
    82ac:	4628      	mov	r0, r5
    82ae:	f7f8 fde9 	bl	e84 <boot_read_image_header>
        if (rc != 0) {
    82b2:	b110      	cbz	r0, 82ba <boot_read_image_headers+0x2c>
            if (i > 0 && !require_all) {
    82b4:	2e00      	cmp	r6, #0
    82b6:	bf18      	it	ne
    82b8:	4604      	movne	r4, r0
}
    82ba:	4620      	mov	r0, r4
    82bc:	b002      	add	sp, #8
    82be:	bd70      	pop	{r4, r5, r6, pc}

000082c0 <boot_read_sectors>:
{
    82c0:	b537      	push	{r0, r1, r2, r4, r5, lr}
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    82c2:	6a42      	ldr	r2, [r0, #36]	; 0x24
{
    82c4:	4604      	mov	r4, r0
    uint32_t num_sectors = BOOT_MAX_IMG_SECTORS;
    82c6:	2580      	movs	r5, #128	; 0x80
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    82c8:	a901      	add	r1, sp, #4
    82ca:	2002      	movs	r0, #2
    uint32_t num_sectors = BOOT_MAX_IMG_SECTORS;
    82cc:	9501      	str	r5, [sp, #4]
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    82ce:	f7fa fa27 	bl	2720 <flash_area_get_sectors>
    if (rc != 0) {
    82d2:	b958      	cbnz	r0, 82ec <boot_read_sectors+0x2c>
    *out_num_sectors = num_sectors;
    82d4:	9b01      	ldr	r3, [sp, #4]
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    82d6:	6d22      	ldr	r2, [r4, #80]	; 0x50
    *out_num_sectors = num_sectors;
    82d8:	62a3      	str	r3, [r4, #40]	; 0x28
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    82da:	a901      	add	r1, sp, #4
    82dc:	2005      	movs	r0, #5
    uint32_t num_sectors = BOOT_MAX_IMG_SECTORS;
    82de:	9501      	str	r5, [sp, #4]
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    82e0:	f7fa fa1e 	bl	2720 <flash_area_get_sectors>
    if (rc != 0) {
    82e4:	4605      	mov	r5, r0
    82e6:	b128      	cbz	r0, 82f4 <boot_read_sectors+0x34>
        return BOOT_EFLASH_SEC;
    82e8:	2509      	movs	r5, #9
    82ea:	e000      	b.n	82ee <boot_read_sectors+0x2e>
        return BOOT_EFLASH;
    82ec:	2501      	movs	r5, #1
}
    82ee:	4628      	mov	r0, r5
    82f0:	b003      	add	sp, #12
    82f2:	bd30      	pop	{r4, r5, pc}
    *out_num_sectors = num_sectors;
    82f4:	9b01      	ldr	r3, [sp, #4]
    elem_sz = flash_area_align(BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT));
    82f6:	6a20      	ldr	r0, [r4, #32]
    *out_num_sectors = num_sectors;
    82f8:	6563      	str	r3, [r4, #84]	; 0x54
    elem_sz = flash_area_align(BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT));
    82fa:	f000 feb3 	bl	9064 <flash_area_align>
    BOOT_WRITE_SZ(state) = boot_write_sz(state);
    82fe:	65e0      	str	r0, [r4, #92]	; 0x5c
    return 0;
    8300:	e7f5      	b.n	82ee <boot_read_sectors+0x2e>

00008302 <boot_status_reset>:
    bs->idx = BOOT_STATUS_IDX_0;
    8302:	2301      	movs	r3, #1
    8304:	6003      	str	r3, [r0, #0]
    bs->state = BOOT_STATUS_STATE_0;
    8306:	f103 2301 	add.w	r3, r3, #16777472	; 0x1000100
    830a:	6043      	str	r3, [r0, #4]
    bs->swap_size = 0;
    830c:	2300      	movs	r3, #0
    bs->source = 0;
    830e:	e9c0 3302 	strd	r3, r3, [r0, #8]
}
    8312:	4770      	bx	lr

00008314 <boot_status_is_reset>:
            bs->idx == BOOT_STATUS_IDX_0 &&
    8314:	7943      	ldrb	r3, [r0, #5]
    8316:	2b01      	cmp	r3, #1
    8318:	d107      	bne.n	832a <boot_status_is_reset+0x16>
    return (bs->op == BOOT_STATUS_OP_MOVE &&
    831a:	6803      	ldr	r3, [r0, #0]
    831c:	2b01      	cmp	r3, #1
    831e:	d104      	bne.n	832a <boot_status_is_reset+0x16>
            bs->idx == BOOT_STATUS_IDX_0 &&
    8320:	7900      	ldrb	r0, [r0, #4]
    8322:	1e43      	subs	r3, r0, #1
    8324:	4258      	negs	r0, r3
    8326:	4158      	adcs	r0, r3
    8328:	4770      	bx	lr
    832a:	2000      	movs	r0, #0
}
    832c:	4770      	bx	lr

0000832e <boot_write_status>:
{
    832e:	b57f      	push	{r0, r1, r2, r3, r4, r5, r6, lr}
    8330:	4606      	mov	r6, r0
    8332:	460d      	mov	r5, r1
    rc = flash_area_open(area_id, &fap);
    8334:	2002      	movs	r0, #2
    8336:	a901      	add	r1, sp, #4
    8338:	f7fa f9d4 	bl	26e4 <flash_area_open>
    if (rc != 0) {
    833c:	bb38      	cbnz	r0, 838e <boot_write_status+0x60>
    off = boot_status_off(fap) +
    833e:	9801      	ldr	r0, [sp, #4]
    8340:	f7ff ff3d 	bl	81be <boot_status_off>
          boot_status_internal_off(bs, BOOT_WRITE_SZ(state));
    8344:	6df1      	ldr	r1, [r6, #92]	; 0x5c
    off = boot_status_off(fap) +
    8346:	4604      	mov	r4, r0
          boot_status_internal_off(bs, BOOT_WRITE_SZ(state));
    8348:	4628      	mov	r0, r5
    834a:	f000 f8e5 	bl	8518 <boot_status_internal_off>
    off = boot_status_off(fap) +
    834e:	4404      	add	r4, r0
    align = flash_area_align(fap);
    8350:	9801      	ldr	r0, [sp, #4]
    8352:	f000 fe87 	bl	9064 <flash_area_align>
    8356:	4606      	mov	r6, r0
    erased_val = flash_area_erased_val(fap);
    8358:	9801      	ldr	r0, [sp, #4]
    835a:	f000 fe8c 	bl	9076 <flash_area_erased_val>
    memset(buf, erased_val, BOOT_MAX_ALIGN);
    835e:	2208      	movs	r2, #8
    erased_val = flash_area_erased_val(fap);
    8360:	4601      	mov	r1, r0
    memset(buf, erased_val, BOOT_MAX_ALIGN);
    8362:	eb0d 0002 	add.w	r0, sp, r2
    8366:	f000 ff0b 	bl	9180 <memset>
    buf[0] = bs->state;
    836a:	792b      	ldrb	r3, [r5, #4]
    836c:	f88d 3008 	strb.w	r3, [sp, #8]
    rc = flash_area_write(fap, off, buf, align);
    8370:	4621      	mov	r1, r4
    8372:	9801      	ldr	r0, [sp, #4]
    8374:	b2f3      	uxtb	r3, r6
    8376:	aa02      	add	r2, sp, #8
    8378:	f000 fe17 	bl	8faa <flash_area_write>
    if (rc != 0) {
    837c:	1e04      	subs	r4, r0, #0
    flash_area_close(fap);
    837e:	9801      	ldr	r0, [sp, #4]
    if (rc != 0) {
    8380:	bf18      	it	ne
    8382:	2401      	movne	r4, #1
    flash_area_close(fap);
    8384:	f000 fdf4 	bl	8f70 <flash_area_close>
}
    8388:	4620      	mov	r0, r4
    838a:	b004      	add	sp, #16
    838c:	bd70      	pop	{r4, r5, r6, pc}
        return BOOT_EFLASH;
    838e:	2401      	movs	r4, #1
    8390:	e7fa      	b.n	8388 <boot_write_status+0x5a>

00008392 <boot_erase_region>:
    return flash_area_erase(fap, off, sz);
    8392:	f000 be38 	b.w	9006 <flash_area_erase>

00008396 <swap_erase_trailer_sectors>:

#if defined(MCUBOOT_SWAP_USING_SCRATCH) || defined(MCUBOOT_SWAP_USING_MOVE)
int
swap_erase_trailer_sectors(const struct boot_loader_state *state,
                           const struct flash_area *fap)
{
    8396:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    839a:	460e      	mov	r6, r1
    int rc;

    BOOT_LOG_DBG("erasing trailer; fa_id=%d", flash_area_get_id(fap));

    image_index = BOOT_CURR_IMG(state);
    fa_id_primary = flash_area_id_from_multi_image_slot(image_index,
    839c:	2100      	movs	r1, #0
{
    839e:	4607      	mov	r7, r0
    fa_id_primary = flash_area_id_from_multi_image_slot(image_index,
    83a0:	4608      	mov	r0, r1
    83a2:	f7ff fe29 	bl	7ff8 <flash_area_id_from_multi_image_slot>
            BOOT_PRIMARY_SLOT);
    fa_id_secondary = flash_area_id_from_multi_image_slot(image_index,
    83a6:	2101      	movs	r1, #1
    fa_id_primary = flash_area_id_from_multi_image_slot(image_index,
    83a8:	4604      	mov	r4, r0
    fa_id_secondary = flash_area_id_from_multi_image_slot(image_index,
    83aa:	2000      	movs	r0, #0
    83ac:	f7ff fe24 	bl	7ff8 <flash_area_id_from_multi_image_slot>
            BOOT_SECONDARY_SLOT);

    if (flash_area_get_id(fap) == fa_id_primary) {
    83b0:	7833      	ldrb	r3, [r6, #0]
    83b2:	429c      	cmp	r4, r3
    83b4:	d021      	beq.n	83fa <swap_erase_trailer_sectors+0x64>
        slot = BOOT_PRIMARY_SLOT;
    } else if (flash_area_get_id(fap) == fa_id_secondary) {
    83b6:	4298      	cmp	r0, r3
    83b8:	d121      	bne.n	83fe <swap_erase_trailer_sectors+0x68>
        slot = BOOT_SECONDARY_SLOT;
    83ba:	2401      	movs	r4, #1
    return BOOT_IMG(state, slot).num_sectors;
    83bc:	232c      	movs	r3, #44	; 0x2c
    83be:	fb03 7404 	mla	r4, r3, r4, r7
        return BOOT_EFLASH;
    }

    /* delete starting from last sector and moving to beginning */
    sector = boot_img_num_sectors(state, slot) - 1;
    trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state));
    83c2:	6df8      	ldr	r0, [r7, #92]	; 0x5c
    sector = boot_img_num_sectors(state, slot) - 1;
    83c4:	6aa5      	ldr	r5, [r4, #40]	; 0x28
    trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state));
    83c6:	f7ff fee8 	bl	819a <boot_trailer_sz>
    sector = boot_img_num_sectors(state, slot) - 1;
    83ca:	3d01      	subs	r5, #1
    trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state));
    83cc:	4607      	mov	r7, r0
    total_sz = 0;
    83ce:	f04f 0800 	mov.w	r8, #0
    return flash_sector_get_size(&BOOT_IMG(state, slot).sectors[sector]);
    83d2:	6a63      	ldr	r3, [r4, #36]	; 0x24
    83d4:	eb03 02c5 	add.w	r2, r3, r5, lsl #3
    return flash_sector_get_off(&BOOT_IMG(state, slot).sectors[sector]) -
    83d8:	f853 1035 	ldr.w	r1, [r3, r5, lsl #3]
    return flash_sector_get_size(&BOOT_IMG(state, slot).sectors[sector]);
    83dc:	f8d2 9004 	ldr.w	r9, [r2, #4]
    return flash_sector_get_off(&BOOT_IMG(state, slot).sectors[sector]) -
    83e0:	681b      	ldr	r3, [r3, #0]
    do {
        sz = boot_img_sector_size(state, slot, sector);
        off = boot_img_sector_off(state, slot, sector);
        rc = boot_erase_region(fap, off, sz);
    83e2:	464a      	mov	r2, r9
    83e4:	1ac9      	subs	r1, r1, r3
    83e6:	4630      	mov	r0, r6
        assert(rc == 0);

        sector--;
        total_sz += sz;
    83e8:	44c8      	add	r8, r9
        rc = boot_erase_region(fap, off, sz);
    83ea:	f7ff ffd2 	bl	8392 <boot_erase_region>
    } while (total_sz < trailer_sz);
    83ee:	45b8      	cmp	r8, r7
        sector--;
    83f0:	f105 35ff 	add.w	r5, r5, #4294967295
    } while (total_sz < trailer_sz);
    83f4:	d3ed      	bcc.n	83d2 <swap_erase_trailer_sectors+0x3c>

    return rc;
}
    83f6:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
        slot = BOOT_PRIMARY_SLOT;
    83fa:	2400      	movs	r4, #0
    83fc:	e7de      	b.n	83bc <swap_erase_trailer_sectors+0x26>
        return BOOT_EFLASH;
    83fe:	2001      	movs	r0, #1
    8400:	e7f9      	b.n	83f6 <swap_erase_trailer_sectors+0x60>

00008402 <swap_status_init>:

int
swap_status_init(const struct boot_loader_state *state,
                 const struct flash_area *fap,
                 const struct boot_status *bs)
{
    8402:	b537      	push	{r0, r1, r2, r4, r5, lr}
    8404:	4615      	mov	r5, r2
    8406:	460c      	mov	r4, r1

    image_index = BOOT_CURR_IMG(state);

    BOOT_LOG_DBG("initializing status; fa_id=%d", flash_area_get_id(fap));

    rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_SECONDARY(image_index),
    8408:	2005      	movs	r0, #5
    840a:	4669      	mov	r1, sp
    840c:	f001 f90c 	bl	9628 <boot_read_swap_state_by_id>
            &swap_state);
    assert(rc == 0);

    if (bs->swap_type != BOOT_SWAP_TYPE_NONE) {
    8410:	79e9      	ldrb	r1, [r5, #7]
    8412:	2901      	cmp	r1, #1
    8414:	d003      	beq.n	841e <swap_status_init+0x1c>
        rc = boot_write_swap_info(fap, bs->swap_type, image_index);
    8416:	2200      	movs	r2, #0
    8418:	4620      	mov	r0, r4
    841a:	f001 f919 	bl	9650 <boot_write_swap_info>
        assert(rc == 0);
    }

    if (swap_state.image_ok == BOOT_FLAG_SET) {
    841e:	f89d 3003 	ldrb.w	r3, [sp, #3]
    8422:	2b01      	cmp	r3, #1
    8424:	d102      	bne.n	842c <swap_status_init+0x2a>
        rc = boot_write_image_ok(fap);
    8426:	4620      	mov	r0, r4
    8428:	f001 f8f5 	bl	9616 <boot_write_image_ok>
        assert(rc == 0);
    }

    rc = boot_write_swap_size(fap, bs->swap_size);
    842c:	68a9      	ldr	r1, [r5, #8]
    842e:	4620      	mov	r0, r4
    8430:	f7ff fed6 	bl	81e0 <boot_write_swap_size>

    rc = boot_write_enc_key(fap, 1, bs);
    assert(rc == 0);
#endif

    rc = boot_write_magic(fap);
    8434:	4620      	mov	r0, r4
    8436:	f7fc f9d9 	bl	47ec <boot_write_magic>
    assert(rc == 0);

    return 0;
}
    843a:	2000      	movs	r0, #0
    843c:	b003      	add	sp, #12
    843e:	bd30      	pop	{r4, r5, pc}

00008440 <swap_read_status>:

int
swap_read_status(struct boot_loader_state *state, struct boot_status *bs)
{
    8440:	b573      	push	{r0, r1, r4, r5, r6, lr}
    8442:	460d      	mov	r5, r1
    8444:	4606      	mov	r6, r0
    uint32_t off;
    uint8_t swap_info;
    int area_id;
    int rc;

    bs->source = swap_status_source(state);
    8446:	f7f8 fe25 	bl	1094 <swap_status_source>
    844a:	4604      	mov	r4, r0
    844c:	60e8      	str	r0, [r5, #12]
    switch (bs->source) {
    844e:	b350      	cbz	r0, 84a6 <swap_read_status+0x66>
    8450:	2802      	cmp	r0, #2
    8452:	d12d      	bne.n	84b0 <swap_read_status+0x70>
    default:
        assert(0);
        return BOOT_EBADARGS;
    }

    rc = flash_area_open(area_id, &fap);
    8454:	a901      	add	r1, sp, #4
    8456:	f7fa f945 	bl	26e4 <flash_area_open>
    if (rc != 0) {
    845a:	bb58      	cbnz	r0, 84b4 <swap_read_status+0x74>
        return BOOT_EFLASH;
    }

    rc = swap_read_status_bytes(fap, state, bs);
    845c:	9801      	ldr	r0, [sp, #4]
    845e:	462a      	mov	r2, r5
    8460:	4631      	mov	r1, r6
    8462:	f7f8 fd5d 	bl	f20 <swap_read_status_bytes>
    if (rc == 0) {
    8466:	4604      	mov	r4, r0
    8468:	b9d0      	cbnz	r0, 84a0 <swap_read_status+0x60>
        off = boot_swap_info_off(fap);
    846a:	9801      	ldr	r0, [sp, #4]
    846c:	f001 f866 	bl	953c <boot_swap_info_off>
        rc = flash_area_read(fap, off, &swap_info, sizeof swap_info);
    8470:	2301      	movs	r3, #1
        off = boot_swap_info_off(fap);
    8472:	4601      	mov	r1, r0
        rc = flash_area_read(fap, off, &swap_info, sizeof swap_info);
    8474:	f10d 0203 	add.w	r2, sp, #3
    8478:	9801      	ldr	r0, [sp, #4]
    847a:	f000 fd7a 	bl	8f72 <flash_area_read>
        if (rc != 0) {
    847e:	4604      	mov	r4, r0
    8480:	b9a0      	cbnz	r0, 84ac <swap_read_status+0x6c>
            rc = BOOT_EFLASH;
            goto done;
        }

        if (bootutil_buffer_is_erased(fap, &swap_info, sizeof swap_info)) {
    8482:	9801      	ldr	r0, [sp, #4]
    8484:	2201      	movs	r2, #1
    8486:	f10d 0103 	add.w	r1, sp, #3
    848a:	f001 f868 	bl	955e <bootutil_buffer_is_erased>
    848e:	b110      	cbz	r0, 8496 <swap_read_status+0x56>
            BOOT_SET_SWAP_INFO(swap_info, 0, BOOT_SWAP_TYPE_NONE);
    8490:	2301      	movs	r3, #1
    8492:	f88d 3003 	strb.w	r3, [sp, #3]
            rc = 0;
        }

        /* Extract the swap type info */
        bs->swap_type = BOOT_GET_SWAP_TYPE(swap_info);
    8496:	f89d 3003 	ldrb.w	r3, [sp, #3]
    849a:	f003 030f 	and.w	r3, r3, #15
    849e:	71eb      	strb	r3, [r5, #7]
    }

done:
    flash_area_close(fap);
    84a0:	9801      	ldr	r0, [sp, #4]
    84a2:	f000 fd65 	bl	8f70 <flash_area_close>

    return rc;
}
    84a6:	4620      	mov	r0, r4
    84a8:	b002      	add	sp, #8
    84aa:	bd70      	pop	{r4, r5, r6, pc}
            rc = BOOT_EFLASH;
    84ac:	2401      	movs	r4, #1
    84ae:	e7f7      	b.n	84a0 <swap_read_status+0x60>
    switch (bs->source) {
    84b0:	2407      	movs	r4, #7
    84b2:	e7f8      	b.n	84a6 <swap_read_status+0x66>
        return BOOT_EFLASH;
    84b4:	2401      	movs	r4, #1
    84b6:	e7f6      	b.n	84a6 <swap_read_status+0x66>

000084b8 <swap_set_copy_done>:

int
swap_set_copy_done(uint8_t image_index)
{
    84b8:	b513      	push	{r0, r1, r4, lr}
    const struct flash_area *fap;
    int rc;

    rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(image_index),
    84ba:	2002      	movs	r0, #2
    84bc:	a901      	add	r1, sp, #4
    84be:	f7fa f911 	bl	26e4 <flash_area_open>
            &fap);
    if (rc != 0) {
    84c2:	b948      	cbnz	r0, 84d8 <swap_set_copy_done+0x20>
        return BOOT_EFLASH;
    }

    rc = boot_write_copy_done(fap);
    84c4:	9801      	ldr	r0, [sp, #4]
    84c6:	f7ff fe86 	bl	81d6 <boot_write_copy_done>
    84ca:	4604      	mov	r4, r0
    flash_area_close(fap);
    84cc:	9801      	ldr	r0, [sp, #4]
    84ce:	f000 fd4f 	bl	8f70 <flash_area_close>
    return rc;
}
    84d2:	4620      	mov	r0, r4
    84d4:	b002      	add	sp, #8
    84d6:	bd10      	pop	{r4, pc}
        return BOOT_EFLASH;
    84d8:	2401      	movs	r4, #1
    84da:	e7fa      	b.n	84d2 <swap_set_copy_done+0x1a>

000084dc <swap_set_image_ok>:

int
swap_set_image_ok(uint8_t image_index)
{
    84dc:	b51f      	push	{r0, r1, r2, r3, r4, lr}
    const struct flash_area *fap;
    struct boot_swap_state state;
    int rc;

    rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(image_index),
    84de:	2002      	movs	r0, #2
    84e0:	a901      	add	r1, sp, #4
    84e2:	f7fa f8ff 	bl	26e4 <flash_area_open>
            &fap);
    if (rc != 0) {
    84e6:	b9a8      	cbnz	r0, 8514 <swap_set_image_ok+0x38>
        return BOOT_EFLASH;
    }

    rc = boot_read_swap_state(fap, &state);
    84e8:	9801      	ldr	r0, [sp, #4]
    84ea:	a902      	add	r1, sp, #8
    84ec:	f7fc f98c 	bl	4808 <boot_read_swap_state>
    if (rc != 0) {
    84f0:	4604      	mov	r4, r0
    84f2:	b968      	cbnz	r0, 8510 <swap_set_image_ok+0x34>
        rc = BOOT_EFLASH;
        goto out;
    }

    if (state.image_ok == BOOT_FLAG_UNSET) {
    84f4:	f89d 300b 	ldrb.w	r3, [sp, #11]
    84f8:	2b03      	cmp	r3, #3
    84fa:	d103      	bne.n	8504 <swap_set_image_ok+0x28>
        rc = boot_write_image_ok(fap);
    84fc:	9801      	ldr	r0, [sp, #4]
    84fe:	f001 f88a 	bl	9616 <boot_write_image_ok>
    8502:	4604      	mov	r4, r0
    }

out:
    flash_area_close(fap);
    8504:	9801      	ldr	r0, [sp, #4]
    8506:	f000 fd33 	bl	8f70 <flash_area_close>
    return rc;
}
    850a:	4620      	mov	r0, r4
    850c:	b004      	add	sp, #16
    850e:	bd10      	pop	{r4, pc}
        rc = BOOT_EFLASH;
    8510:	2401      	movs	r4, #1
    8512:	e7f7      	b.n	8504 <swap_set_image_ok+0x28>
        return BOOT_EFLASH;
    8514:	2401      	movs	r4, #1
    8516:	e7f8      	b.n	850a <swap_set_image_ok+0x2e>

00008518 <boot_status_internal_off>:
{
    8518:	b530      	push	{r4, r5, lr}
    idx_sz = elem_sz * ((bs->op == BOOT_STATUS_OP_MOVE) ?
    851a:	7943      	ldrb	r3, [r0, #5]
           (bs->idx - BOOT_STATUS_IDX_0) * idx_sz +
    851c:	6804      	ldr	r4, [r0, #0]
            BOOT_STATUS_MOVE_STATE_COUNT : BOOT_STATUS_SWAP_STATE_COUNT);
    851e:	2b01      	cmp	r3, #1
    8520:	bf08      	it	eq
    8522:	2201      	moveq	r2, #1
           (bs->state - BOOT_STATUS_STATE_0) * elem_sz;
    8524:	7903      	ldrb	r3, [r0, #4]
            BOOT_STATUS_MOVE_STATE_COUNT : BOOT_STATUS_SWAP_STATE_COUNT);
    8526:	bf18      	it	ne
    8528:	2202      	movne	r2, #2
    idx_sz = elem_sz * ((bs->op == BOOT_STATUS_OP_MOVE) ?
    852a:	fb01 f202 	mul.w	r2, r1, r2
           (bs->idx - BOOT_STATUS_IDX_0) * idx_sz +
    852e:	f104 34ff 	add.w	r4, r4, #4294967295
           (bs->state - BOOT_STATUS_STATE_0) * elem_sz;
    8532:	f103 33ff 	add.w	r3, r3, #4294967295
           (bs->idx - BOOT_STATUS_IDX_0) * idx_sz +
    8536:	fb02 f204 	mul.w	r2, r2, r4
               0 : (BOOT_MAX_IMG_SECTORS * BOOT_STATUS_MOVE_STATE_COUNT * elem_sz)) +
    853a:	bf14      	ite	ne
    853c:	01cd      	lslne	r5, r1, #7
    853e:	2500      	moveq	r5, #0
           (bs->idx - BOOT_STATUS_IDX_0) * idx_sz +
    8540:	fb01 2103 	mla	r1, r1, r3, r2
}
    8544:	1948      	adds	r0, r1, r5
    8546:	bd30      	pop	{r4, r5, pc}

00008548 <mbedtls_asn1_get_len>:
 */
int mbedtls_asn1_get_len( unsigned char **p,
                  const unsigned char *end,
                  size_t *len )
{
    if( ( end - *p ) < 1 )
    8548:	6803      	ldr	r3, [r0, #0]
{
    854a:	b570      	push	{r4, r5, r6, lr}
    if( ( end - *p ) < 1 )
    854c:	1acd      	subs	r5, r1, r3
    854e:	2d00      	cmp	r5, #0
    8550:	dd0d      	ble.n	856e <mbedtls_asn1_get_len+0x26>
        return( MBEDTLS_ERR_ASN1_OUT_OF_DATA );

    if( ( **p & 0x80 ) == 0 )
    8552:	f993 6000 	ldrsb.w	r6, [r3]
    8556:	781c      	ldrb	r4, [r3, #0]
    8558:	2e00      	cmp	r6, #0
    855a:	db0b      	blt.n	8574 <mbedtls_asn1_get_len+0x2c>
        *len = *(*p)++;
    855c:	1c5c      	adds	r4, r3, #1
    855e:	6004      	str	r4, [r0, #0]
    8560:	781b      	ldrb	r3, [r3, #0]
    8562:	6013      	str	r3, [r2, #0]
        default:
            return( MBEDTLS_ERR_ASN1_INVALID_LENGTH );
        }
    }

    if( *len > (size_t) ( end - *p ) )
    8564:	6803      	ldr	r3, [r0, #0]
    8566:	1ac9      	subs	r1, r1, r3
    8568:	6813      	ldr	r3, [r2, #0]
    856a:	428b      	cmp	r3, r1
    856c:	d932      	bls.n	85d4 <mbedtls_asn1_get_len+0x8c>
        return( MBEDTLS_ERR_ASN1_OUT_OF_DATA );
    856e:	f06f 005f 	mvn.w	r0, #95	; 0x5f

    return( 0 );
}
    8572:	bd70      	pop	{r4, r5, r6, pc}
        switch( **p & 0x7F )
    8574:	f004 047f 	and.w	r4, r4, #127	; 0x7f
    8578:	3c01      	subs	r4, #1
    857a:	2c03      	cmp	r4, #3
    857c:	d827      	bhi.n	85ce <mbedtls_asn1_get_len+0x86>
    857e:	e8df f004 	tbb	[pc, r4]
    8582:	0902      	.short	0x0902
    8584:	1e12      	.short	0x1e12
            if( ( end - *p ) < 2 )
    8586:	2d01      	cmp	r5, #1
    8588:	d0f1      	beq.n	856e <mbedtls_asn1_get_len+0x26>
            *len = (*p)[1];
    858a:	785c      	ldrb	r4, [r3, #1]
    858c:	6014      	str	r4, [r2, #0]
            (*p) += 2;
    858e:	3302      	adds	r3, #2
            (*p) += 5;
    8590:	6003      	str	r3, [r0, #0]
            break;
    8592:	e7e7      	b.n	8564 <mbedtls_asn1_get_len+0x1c>
            if( ( end - *p ) < 3 )
    8594:	2d02      	cmp	r5, #2
    8596:	ddea      	ble.n	856e <mbedtls_asn1_get_len+0x26>
            *len = ( (size_t)(*p)[1] << 8 ) | (*p)[2];
    8598:	f8b3 4001 	ldrh.w	r4, [r3, #1]
    859c:	ba64      	rev16	r4, r4
    859e:	b2a4      	uxth	r4, r4
    85a0:	6014      	str	r4, [r2, #0]
            (*p) += 3;
    85a2:	3303      	adds	r3, #3
    85a4:	e7f4      	b.n	8590 <mbedtls_asn1_get_len+0x48>
            if( ( end - *p ) < 4 )
    85a6:	2d03      	cmp	r5, #3
    85a8:	dde1      	ble.n	856e <mbedtls_asn1_get_len+0x26>
                   ( (size_t)(*p)[2] << 8  ) | (*p)[3];
    85aa:	789c      	ldrb	r4, [r3, #2]
            *len = ( (size_t)(*p)[1] << 16 ) |
    85ac:	785d      	ldrb	r5, [r3, #1]
                   ( (size_t)(*p)[2] << 8  ) | (*p)[3];
    85ae:	0224      	lsls	r4, r4, #8
            *len = ( (size_t)(*p)[1] << 16 ) |
    85b0:	ea44 4405 	orr.w	r4, r4, r5, lsl #16
                   ( (size_t)(*p)[2] << 8  ) | (*p)[3];
    85b4:	78dd      	ldrb	r5, [r3, #3]
    85b6:	432c      	orrs	r4, r5
            *len = ( (size_t)(*p)[1] << 16 ) |
    85b8:	6014      	str	r4, [r2, #0]
            (*p) += 4;
    85ba:	3304      	adds	r3, #4
    85bc:	e7e8      	b.n	8590 <mbedtls_asn1_get_len+0x48>
            if( ( end - *p ) < 5 )
    85be:	2d04      	cmp	r5, #4
    85c0:	ddd5      	ble.n	856e <mbedtls_asn1_get_len+0x26>
            *len = ( (size_t)(*p)[1] << 24 ) | ( (size_t)(*p)[2] << 16 ) |
    85c2:	f8d3 4001 	ldr.w	r4, [r3, #1]
    85c6:	ba24      	rev	r4, r4
    85c8:	6014      	str	r4, [r2, #0]
            (*p) += 5;
    85ca:	3305      	adds	r3, #5
    85cc:	e7e0      	b.n	8590 <mbedtls_asn1_get_len+0x48>
    if( ( **p & 0x80 ) == 0 )
    85ce:	f06f 0063 	mvn.w	r0, #99	; 0x63
    85d2:	e7ce      	b.n	8572 <mbedtls_asn1_get_len+0x2a>
    return( 0 );
    85d4:	2000      	movs	r0, #0
    85d6:	e7cc      	b.n	8572 <mbedtls_asn1_get_len+0x2a>

000085d8 <mbedtls_asn1_get_tag>:

int mbedtls_asn1_get_tag( unsigned char **p,
                  const unsigned char *end,
                  size_t *len, int tag )
{
    85d8:	b470      	push	{r4, r5, r6}
    if( ( end - *p ) < 1 )
    85da:	6804      	ldr	r4, [r0, #0]
    85dc:	1b0e      	subs	r6, r1, r4
    85de:	2e00      	cmp	r6, #0
    85e0:	dd07      	ble.n	85f2 <mbedtls_asn1_get_tag+0x1a>
        return( MBEDTLS_ERR_ASN1_OUT_OF_DATA );

    if( **p != tag )
    85e2:	7826      	ldrb	r6, [r4, #0]
    85e4:	429e      	cmp	r6, r3
    85e6:	d108      	bne.n	85fa <mbedtls_asn1_get_tag+0x22>
        return( MBEDTLS_ERR_ASN1_UNEXPECTED_TAG );

    (*p)++;
    85e8:	3401      	adds	r4, #1
    85ea:	6004      	str	r4, [r0, #0]

    return( mbedtls_asn1_get_len( p, end, len ) );
}
    85ec:	bc70      	pop	{r4, r5, r6}
    return( mbedtls_asn1_get_len( p, end, len ) );
    85ee:	f7ff bfab 	b.w	8548 <mbedtls_asn1_get_len>
        return( MBEDTLS_ERR_ASN1_OUT_OF_DATA );
    85f2:	f06f 005f 	mvn.w	r0, #95	; 0x5f
}
    85f6:	bc70      	pop	{r4, r5, r6}
    85f8:	4770      	bx	lr
        return( MBEDTLS_ERR_ASN1_UNEXPECTED_TAG );
    85fa:	f06f 0061 	mvn.w	r0, #97	; 0x61
    85fe:	e7fa      	b.n	85f6 <mbedtls_asn1_get_tag+0x1e>

00008600 <mbedtls_asn1_get_bitstring_null>:
/*
 * Get a bit string without unused bits
 */
int mbedtls_asn1_get_bitstring_null( unsigned char **p, const unsigned char *end,
                             size_t *len )
{
    8600:	b538      	push	{r3, r4, r5, lr}
    int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED;

    if( ( ret = mbedtls_asn1_get_tag( p, end, len, MBEDTLS_ASN1_BIT_STRING ) ) != 0 )
    8602:	2303      	movs	r3, #3
{
    8604:	4604      	mov	r4, r0
    if( ( ret = mbedtls_asn1_get_tag( p, end, len, MBEDTLS_ASN1_BIT_STRING ) ) != 0 )
    8606:	f7ff ffe7 	bl	85d8 <mbedtls_asn1_get_tag>
    860a:	b918      	cbnz	r0, 8614 <mbedtls_asn1_get_bitstring_null+0x14>
        return( ret );

    if( *len == 0 )
    860c:	6813      	ldr	r3, [r2, #0]
    860e:	b913      	cbnz	r3, 8616 <mbedtls_asn1_get_bitstring_null+0x16>
        return( MBEDTLS_ERR_ASN1_INVALID_DATA );
    8610:	f06f 0067 	mvn.w	r0, #103	; 0x67
    if( **p != 0 )
        return( MBEDTLS_ERR_ASN1_INVALID_DATA );
    ++( *p );

    return( 0 );
}
    8614:	bd38      	pop	{r3, r4, r5, pc}
    --( *len );
    8616:	3b01      	subs	r3, #1
    8618:	6013      	str	r3, [r2, #0]
    if( **p != 0 )
    861a:	6823      	ldr	r3, [r4, #0]
    861c:	781a      	ldrb	r2, [r3, #0]
    861e:	2a00      	cmp	r2, #0
    8620:	d1f6      	bne.n	8610 <mbedtls_asn1_get_bitstring_null+0x10>
    ++( *p );
    8622:	3301      	adds	r3, #1
    8624:	6023      	str	r3, [r4, #0]
    return( 0 );
    8626:	e7f5      	b.n	8614 <mbedtls_asn1_get_bitstring_null+0x14>

00008628 <mbedtls_asn1_get_alg>:
}

int mbedtls_asn1_get_alg( unsigned char **p,
                  const unsigned char *end,
                  mbedtls_asn1_buf *alg, mbedtls_asn1_buf *params )
{
    8628:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
    862c:	4690      	mov	r8, r2
    862e:	461f      	mov	r7, r3
    int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED;
    size_t len;

    if( ( ret = mbedtls_asn1_get_tag( p, end, &len,
    8630:	aa01      	add	r2, sp, #4
    8632:	2330      	movs	r3, #48	; 0x30
{
    8634:	4605      	mov	r5, r0
    8636:	4689      	mov	r9, r1
    if( ( ret = mbedtls_asn1_get_tag( p, end, &len,
    8638:	f7ff ffce 	bl	85d8 <mbedtls_asn1_get_tag>
    863c:	4604      	mov	r4, r0
    863e:	b9f8      	cbnz	r0, 8680 <mbedtls_asn1_get_alg+0x58>
            MBEDTLS_ASN1_CONSTRUCTED | MBEDTLS_ASN1_SEQUENCE ) ) != 0 )
        return( ret );

    if( ( end - *p ) < 1 )
    8640:	682e      	ldr	r6, [r5, #0]
    8642:	eba9 0906 	sub.w	r9, r9, r6
    8646:	f1b9 0f00 	cmp.w	r9, #0
    864a:	dd35      	ble.n	86b8 <mbedtls_asn1_get_alg+0x90>
        return( MBEDTLS_ERR_ASN1_OUT_OF_DATA );

    alg->tag = **p;
    end = *p + len;
    864c:	9901      	ldr	r1, [sp, #4]
    alg->tag = **p;
    864e:	7833      	ldrb	r3, [r6, #0]
    8650:	4642      	mov	r2, r8
    end = *p + len;
    8652:	440e      	add	r6, r1
    alg->tag = **p;
    8654:	f842 3b04 	str.w	r3, [r2], #4

    if( ( ret = mbedtls_asn1_get_tag( p, end, &alg->len, MBEDTLS_ASN1_OID ) ) != 0 )
    8658:	4631      	mov	r1, r6
    865a:	2306      	movs	r3, #6
    865c:	4628      	mov	r0, r5
    865e:	f7ff ffbb 	bl	85d8 <mbedtls_asn1_get_tag>
    8662:	4604      	mov	r4, r0
    8664:	b960      	cbnz	r0, 8680 <mbedtls_asn1_get_alg+0x58>
        return( ret );

    alg->p = *p;
    8666:	682a      	ldr	r2, [r5, #0]
    *p += alg->len;
    8668:	f8d8 1004 	ldr.w	r1, [r8, #4]
    alg->p = *p;
    866c:	f8c8 2008 	str.w	r2, [r8, #8]
    *p += alg->len;
    8670:	1853      	adds	r3, r2, r1

    if( *p == end )
    8672:	42b3      	cmp	r3, r6
    *p += alg->len;
    8674:	602b      	str	r3, [r5, #0]
    if( *p == end )
    8676:	d107      	bne.n	8688 <mbedtls_asn1_get_alg+0x60>
    {
        mbedtls_platform_zeroize( params, sizeof(mbedtls_asn1_buf) );
    8678:	210c      	movs	r1, #12
    867a:	4638      	mov	r0, r7
    867c:	f7fe f9b2 	bl	69e4 <mbedtls_platform_zeroize>

    if( *p != end )
        return( MBEDTLS_ERR_ASN1_LENGTH_MISMATCH );

    return( 0 );
}
    8680:	4620      	mov	r0, r4
    8682:	b003      	add	sp, #12
    8684:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
    params->tag = **p;
    8688:	5c51      	ldrb	r1, [r2, r1]
    868a:	463a      	mov	r2, r7
    (*p)++;
    868c:	3301      	adds	r3, #1
    params->tag = **p;
    868e:	f842 1b04 	str.w	r1, [r2], #4
    if( ( ret = mbedtls_asn1_get_len( p, end, &params->len ) ) != 0 )
    8692:	4628      	mov	r0, r5
    (*p)++;
    8694:	602b      	str	r3, [r5, #0]
    if( ( ret = mbedtls_asn1_get_len( p, end, &params->len ) ) != 0 )
    8696:	4631      	mov	r1, r6
    8698:	f7ff ff56 	bl	8548 <mbedtls_asn1_get_len>
    869c:	4604      	mov	r4, r0
    869e:	2800      	cmp	r0, #0
    86a0:	d1ee      	bne.n	8680 <mbedtls_asn1_get_alg+0x58>
    params->p = *p;
    86a2:	682b      	ldr	r3, [r5, #0]
    *p += params->len;
    86a4:	687a      	ldr	r2, [r7, #4]
    params->p = *p;
    86a6:	60bb      	str	r3, [r7, #8]
    *p += params->len;
    86a8:	4413      	add	r3, r2
    if( *p != end )
    86aa:	42b3      	cmp	r3, r6
    *p += params->len;
    86ac:	602b      	str	r3, [r5, #0]
        return( MBEDTLS_ERR_ASN1_LENGTH_MISMATCH );
    86ae:	bf0c      	ite	eq
    86b0:	4604      	moveq	r4, r0
    86b2:	f06f 0465 	mvnne.w	r4, #101	; 0x65
    86b6:	e7e3      	b.n	8680 <mbedtls_asn1_get_alg+0x58>
        return( MBEDTLS_ERR_ASN1_OUT_OF_DATA );
    86b8:	f06f 045f 	mvn.w	r4, #95	; 0x5f
    86bc:	e7e0      	b.n	8680 <mbedtls_asn1_get_alg+0x58>

000086be <cc310_sha256_update>:
{
    86be:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    if ((uint32_t) data < CONFIG_SRAM_BASE_ADDRESS) {
    86c0:	f1b1 5f00 	cmp.w	r1, #536870912	; 0x20000000
{
    86c4:	af00      	add	r7, sp, #0
    86c6:	4605      	mov	r5, r0
    86c8:	4614      	mov	r4, r2
    if ((uint32_t) data < CONFIG_SRAM_BASE_ADDRESS) {
    86ca:	d210      	bcs.n	86ee <cc310_sha256_update+0x30>
        uint8_t stack_buffer[data_len];
    86cc:	1dd3      	adds	r3, r2, #7
    86ce:	f023 0307 	bic.w	r3, r3, #7
    if ((uint32_t) data < CONFIG_SRAM_BASE_ADDRESS) {
    86d2:	466e      	mov	r6, sp
        uint8_t stack_buffer[data_len];
    86d4:	ebad 0d03 	sub.w	sp, sp, r3
        memcpy(stack_buffer, data, block_len);
    86d8:	4668      	mov	r0, sp
    86da:	f000 fd46 	bl	916a <memcpy>
        nrf_cc310_bl_hash_sha256_update(ctx, stack_buffer, block_len);
    86de:	4669      	mov	r1, sp
    86e0:	4622      	mov	r2, r4
    86e2:	4628      	mov	r0, r5
    86e4:	f7fe fbe2 	bl	6eac <nrf_cc310_bl_hash_sha256_update>
    86e8:	46b5      	mov	sp, r6
};
    86ea:	46bd      	mov	sp, r7
    86ec:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
        nrf_cc310_bl_hash_sha256_update(ctx, data, data_len);
    86ee:	f7fe fbdd 	bl	6eac <nrf_cc310_bl_hash_sha256_update>
};
    86f2:	e7fa      	b.n	86ea <cc310_sha256_update+0x2c>

000086f4 <sys_notify_validate>:

int sys_notify_validate(struct sys_notify *notify)
{
	int rv = 0;

	if (notify == NULL) {
    86f4:	b160      	cbz	r0, 8710 <sys_notify_validate+0x1c>
	uint32_t method = notify->flags >> SYS_NOTIFY_METHOD_POS;
    86f6:	6843      	ldr	r3, [r0, #4]
	return method & SYS_NOTIFY_METHOD_MASK;
    86f8:	f003 0303 	and.w	r3, r3, #3
		return -EINVAL;
	}

	/* Validate configuration based on mode */
	switch (sys_notify_get_method(notify)) {
    86fc:	2b01      	cmp	r3, #1
    86fe:	d003      	beq.n	8708 <sys_notify_validate+0x14>
    8700:	2b03      	cmp	r3, #3
    8702:	d105      	bne.n	8710 <sys_notify_validate+0x1c>
	case SYS_NOTIFY_METHOD_SPINWAIT:
		break;
	case SYS_NOTIFY_METHOD_CALLBACK:
		if (notify->method.callback == NULL) {
    8704:	6803      	ldr	r3, [r0, #0]
    8706:	b11b      	cbz	r3, 8710 <sys_notify_validate+0x1c>
		break;
	}

	/* Clear the result here instead of in all callers. */
	if (rv == 0) {
		notify->result = 0;
    8708:	2300      	movs	r3, #0
    870a:	6083      	str	r3, [r0, #8]
    870c:	4618      	mov	r0, r3
    870e:	4770      	bx	lr
		return -EINVAL;
    8710:	f06f 0015 	mvn.w	r0, #21
	}

	return rv;
}
    8714:	4770      	bx	lr

00008716 <sys_notify_finalize>:
	uint32_t method = notify->flags >> SYS_NOTIFY_METHOD_POS;
    8716:	6843      	ldr	r3, [r0, #4]
	uint32_t method = sys_notify_get_method(notify);

	/* Store the result and capture secondary notification
	 * information.
	 */
	notify->result = res;
    8718:	6081      	str	r1, [r0, #8]
	return method & SYS_NOTIFY_METHOD_MASK;
    871a:	f003 0303 	and.w	r3, r3, #3
	switch (method) {
    871e:	2b03      	cmp	r3, #3
    8720:	f04f 0200 	mov.w	r2, #0
	case SYS_NOTIFY_METHOD_SPINWAIT:
		break;
	case SYS_NOTIFY_METHOD_CALLBACK:
		rv = notify->method.callback;
    8724:	bf0c      	ite	eq
    8726:	6803      	ldreq	r3, [r0, #0]
	sys_notify_generic_callback rv = NULL;
    8728:	4613      	movne	r3, r2
	/* Mark completion by clearing the flags field to the
	 * completed state, releasing any spin-waiters, then complete
	 * secondary notification.
	 */
	compiler_barrier();
	notify->flags = SYS_NOTIFY_METHOD_COMPLETED;
    872a:	6042      	str	r2, [r0, #4]
	if (IS_ENABLED(CONFIG_POLL) && (sig != NULL)) {
		k_poll_signal_raise(sig, res);
	}

	return rv;
}
    872c:	4618      	mov	r0, r3
    872e:	4770      	bx	lr

00008730 <arch_printk_char_out>:
}
    8730:	2000      	movs	r0, #0
    8732:	4770      	bx	lr

00008734 <str_out>:
{
    8734:	b530      	push	{r4, r5, lr}
    8736:	688a      	ldr	r2, [r1, #8]
	if (ctx->str == NULL || ctx->count >= ctx->max) {
    8738:	680c      	ldr	r4, [r1, #0]
    873a:	1c55      	adds	r5, r2, #1
    873c:	b114      	cbz	r4, 8744 <str_out+0x10>
    873e:	684b      	ldr	r3, [r1, #4]
    8740:	4293      	cmp	r3, r2
    8742:	dc01      	bgt.n	8748 <str_out+0x14>
		ctx->count++;
    8744:	608d      	str	r5, [r1, #8]
}
    8746:	bd30      	pop	{r4, r5, pc}
	if (ctx->count == ctx->max - 1) {
    8748:	3b01      	subs	r3, #1
    874a:	4293      	cmp	r3, r2
		ctx->str[ctx->count++] = '\0';
    874c:	bf08      	it	eq
    874e:	2200      	moveq	r2, #0
    8750:	608d      	str	r5, [r1, #8]
    8752:	bf0c      	ite	eq
    8754:	54e2      	strbeq	r2, [r4, r3]
		ctx->str[ctx->count++] = c;
    8756:	54a0      	strbne	r0, [r4, r2]
    8758:	e7f5      	b.n	8746 <str_out+0x12>

0000875a <printk>:
{
    875a:	b40f      	push	{r0, r1, r2, r3}
    875c:	b507      	push	{r0, r1, r2, lr}
    875e:	a904      	add	r1, sp, #16
    8760:	f851 0b04 	ldr.w	r0, [r1], #4
	va_start(ap, fmt);
    8764:	9101      	str	r1, [sp, #4]
		vprintk(fmt, ap);
    8766:	f7f8 fef1 	bl	154c <vprintk>
}
    876a:	b003      	add	sp, #12
    876c:	f85d eb04 	ldr.w	lr, [sp], #4
    8770:	b004      	add	sp, #16
    8772:	4770      	bx	lr

00008774 <snprintk>:
{
    8774:	b40c      	push	{r2, r3}
    8776:	b507      	push	{r0, r1, r2, lr}
    8778:	ab04      	add	r3, sp, #16
    877a:	f853 2b04 	ldr.w	r2, [r3], #4
	va_start(ap, fmt);
    877e:	9301      	str	r3, [sp, #4]
	ret = vsnprintk(str, size, fmt, ap);
    8780:	f7f8 fef2 	bl	1568 <vsnprintk>
}
    8784:	b003      	add	sp, #12
    8786:	f85d eb04 	ldr.w	lr, [sp], #4
    878a:	b002      	add	sp, #8
    878c:	4770      	bx	lr

0000878e <process_recheck>:
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    878e:	8b03      	ldrh	r3, [r0, #24]
	if ((state == ONOFF_STATE_OFF)
    8790:	f013 0307 	ands.w	r3, r3, #7
    8794:	d105      	bne.n	87a2 <process_recheck+0x14>
	    && !sys_slist_is_empty(&mgr->clients)) {
    8796:	6803      	ldr	r3, [r0, #0]
    8798:	2b00      	cmp	r3, #0
		evt = EVT_START;
    879a:	bf0c      	ite	eq
    879c:	2000      	moveq	r0, #0
    879e:	2003      	movne	r0, #3
    87a0:	4770      	bx	lr
	} else if ((state == ONOFF_STATE_ON)
    87a2:	2b02      	cmp	r3, #2
    87a4:	d105      	bne.n	87b2 <process_recheck+0x24>
		   && (mgr->refs == 0U)) {
    87a6:	8b43      	ldrh	r3, [r0, #26]
    87a8:	2b00      	cmp	r3, #0
		evt = EVT_STOP;
    87aa:	bf14      	ite	ne
    87ac:	2000      	movne	r0, #0
    87ae:	2004      	moveq	r0, #4
    87b0:	4770      	bx	lr
	} else if ((state == ONOFF_STATE_ERROR)
    87b2:	2b01      	cmp	r3, #1
    87b4:	d105      	bne.n	87c2 <process_recheck+0x34>
		   && !sys_slist_is_empty(&mgr->clients)) {
    87b6:	6803      	ldr	r3, [r0, #0]
    87b8:	2b00      	cmp	r3, #0
		evt = EVT_RESET;
    87ba:	bf0c      	ite	eq
    87bc:	2000      	moveq	r0, #0
    87be:	2005      	movne	r0, #5
    87c0:	4770      	bx	lr
	int evt = EVT_NOP;
    87c2:	2000      	movs	r0, #0
}
    87c4:	4770      	bx	lr

000087c6 <notify_one>:
{
    87c6:	b573      	push	{r0, r1, r4, r5, r6, lr}
    87c8:	460d      	mov	r5, r1
    87ca:	4606      	mov	r6, r0
		(onoff_client_callback)sys_notify_finalize(&cli->notify, res);
    87cc:	4619      	mov	r1, r3
    87ce:	1d28      	adds	r0, r5, #4
{
    87d0:	9201      	str	r2, [sp, #4]
		(onoff_client_callback)sys_notify_finalize(&cli->notify, res);
    87d2:	9300      	str	r3, [sp, #0]
    87d4:	f7ff ff9f 	bl	8716 <sys_notify_finalize>
	if (cb) {
    87d8:	4604      	mov	r4, r0
    87da:	b140      	cbz	r0, 87ee <notify_one+0x28>
		cb(mgr, cli, state, res);
    87dc:	e9dd 3200 	ldrd	r3, r2, [sp]
    87e0:	4629      	mov	r1, r5
    87e2:	4630      	mov	r0, r6
    87e4:	46a4      	mov	ip, r4
}
    87e6:	b002      	add	sp, #8
    87e8:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
		cb(mgr, cli, state, res);
    87ec:	4760      	bx	ip
}
    87ee:	b002      	add	sp, #8
    87f0:	bd70      	pop	{r4, r5, r6, pc}

000087f2 <transition_complete>:
{
    87f2:	b410      	push	{r4}
	__asm__ volatile(
    87f4:	f04f 0420 	mov.w	r4, #32
    87f8:	f3ef 8211 	mrs	r2, BASEPRI
    87fc:	f384 8812 	msr	BASEPRI_MAX, r4
    8800:	f3bf 8f6f 	isb	sy
	mgr->last_res = res;
    8804:	6141      	str	r1, [r0, #20]
}
    8806:	f85d 4b04 	ldr.w	r4, [sp], #4
	process_event(mgr, EVT_COMPLETE, key);
    880a:	2101      	movs	r1, #1
    880c:	f7f8 bec0 	b.w	1590 <process_event>

00008810 <validate_args>:
{
    8810:	b510      	push	{r4, lr}
    8812:	460c      	mov	r4, r1
	if ((mgr == NULL) || (cli == NULL)) {
    8814:	b140      	cbz	r0, 8828 <validate_args+0x18>
    8816:	b139      	cbz	r1, 8828 <validate_args+0x18>
	int rv = sys_notify_validate(&cli->notify);
    8818:	1d08      	adds	r0, r1, #4
    881a:	f7ff ff6b 	bl	86f4 <sys_notify_validate>
	if ((rv == 0)
    881e:	b928      	cbnz	r0, 882c <validate_args+0x1c>
	    && ((cli->notify.flags
    8820:	68a3      	ldr	r3, [r4, #8]
    8822:	f033 0303 	bics.w	r3, r3, #3
    8826:	d001      	beq.n	882c <validate_args+0x1c>
		rv = -EINVAL;
    8828:	f06f 0015 	mvn.w	r0, #21
}
    882c:	bd10      	pop	{r4, pc}

0000882e <onoff_manager_init>:
{
    882e:	b538      	push	{r3, r4, r5, lr}
    8830:	460c      	mov	r4, r1
	if ((mgr == NULL)
    8832:	4605      	mov	r5, r0
    8834:	b158      	cbz	r0, 884e <onoff_manager_init+0x20>
	    || (transitions == NULL)
    8836:	b151      	cbz	r1, 884e <onoff_manager_init+0x20>
	    || (transitions->start == NULL)
    8838:	680b      	ldr	r3, [r1, #0]
    883a:	b143      	cbz	r3, 884e <onoff_manager_init+0x20>
	    || (transitions->stop == NULL)) {
    883c:	684b      	ldr	r3, [r1, #4]
    883e:	b133      	cbz	r3, 884e <onoff_manager_init+0x20>
	*mgr = (struct onoff_manager)ONOFF_MANAGER_INITIALIZER(transitions);
    8840:	221c      	movs	r2, #28
    8842:	2100      	movs	r1, #0
    8844:	f000 fc9c 	bl	9180 <memset>
    8848:	612c      	str	r4, [r5, #16]
	return 0;
    884a:	2000      	movs	r0, #0
}
    884c:	bd38      	pop	{r3, r4, r5, pc}
		return -EINVAL;
    884e:	f06f 0015 	mvn.w	r0, #21
    8852:	e7fb      	b.n	884c <onoff_manager_init+0x1e>

00008854 <onoff_request>:

int onoff_request(struct onoff_manager *mgr,
		  struct onoff_client *cli)
{
    8854:	b570      	push	{r4, r5, r6, lr}
    8856:	4604      	mov	r4, r0
    8858:	460e      	mov	r6, r1
	bool add_client = false;        /* add client to pending list */
	bool start = false;             /* trigger a start transition */
	bool notify = false;            /* do client notification */
	int rv = validate_args(mgr, cli);
    885a:	f7ff ffd9 	bl	8810 <validate_args>

	if (rv < 0) {
    885e:	1e05      	subs	r5, r0, #0
    8860:	db31      	blt.n	88c6 <onoff_request+0x72>
    8862:	f04f 0320 	mov.w	r3, #32
    8866:	f3ef 8111 	mrs	r1, BASEPRI
    886a:	f383 8812 	msr	BASEPRI_MAX, r3
    886e:	f3bf 8f6f 	isb	sy

	k_spinlock_key_t key = k_spin_lock(&mgr->lock);
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;

	/* Reject if this would overflow the reference count. */
	if (mgr->refs == SERVICE_REFS_MAX) {
    8872:	8b63      	ldrh	r3, [r4, #26]
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    8874:	8b20      	ldrh	r0, [r4, #24]
	if (mgr->refs == SERVICE_REFS_MAX) {
    8876:	f64f 75ff 	movw	r5, #65535	; 0xffff
    887a:	42ab      	cmp	r3, r5
    887c:	f000 0207 	and.w	r2, r0, #7
    8880:	d02e      	beq.n	88e0 <onoff_request+0x8c>
		rv = -EAGAIN;
		goto out;
	}

	rv = state;
	if (state == ONOFF_STATE_ON) {
    8882:	2a02      	cmp	r2, #2
    8884:	d10e      	bne.n	88a4 <onoff_request+0x50>
		/* Increment reference count, notify in exit */
		notify = true;
		mgr->refs += 1U;
    8886:	3301      	adds	r3, #1
    8888:	8363      	strh	r3, [r4, #26]
	rv = state;
    888a:	4615      	mov	r5, r2
		notify = true;
    888c:	2301      	movs	r3, #1
	__asm__ volatile(
    888e:	f381 8811 	msr	BASEPRI, r1
    8892:	f3bf 8f6f 	isb	sy
	if (start) {
		process_event(mgr, EVT_RECHECK, key);
	} else {
		k_spin_unlock(&mgr->lock, key);

		if (notify) {
    8896:	b1b3      	cbz	r3, 88c6 <onoff_request+0x72>
			notify_one(mgr, cli, state, 0);
    8898:	2300      	movs	r3, #0
    889a:	4631      	mov	r1, r6
    889c:	4620      	mov	r0, r4
    889e:	f7ff ff92 	bl	87c6 <notify_one>
    88a2:	e010      	b.n	88c6 <onoff_request+0x72>
	} else if ((state == ONOFF_STATE_OFF)
    88a4:	0783      	lsls	r3, r0, #30
    88a6:	d001      	beq.n	88ac <onoff_request+0x58>
		   || (state == ONOFF_STATE_TO_ON)) {
    88a8:	2a06      	cmp	r2, #6
    88aa:	d10e      	bne.n	88ca <onoff_request+0x76>
	parent->next = child;
    88ac:	2300      	movs	r3, #0
    88ae:	6033      	str	r3, [r6, #0]
Z_GENLIST_APPEND(slist, snode)
    88b0:	6863      	ldr	r3, [r4, #4]
    88b2:	b993      	cbnz	r3, 88da <onoff_request+0x86>
	list->head = node;
    88b4:	e9c4 6600 	strd	r6, r6, [r4]
	if (start) {
    88b8:	4615      	mov	r5, r2
    88ba:	b962      	cbnz	r2, 88d6 <onoff_request+0x82>
		process_event(mgr, EVT_RECHECK, key);
    88bc:	460a      	mov	r2, r1
    88be:	4620      	mov	r0, r4
    88c0:	2102      	movs	r1, #2
    88c2:	f7f8 fe65 	bl	1590 <process_event>
		}
	}

	return rv;
}
    88c6:	4628      	mov	r0, r5
    88c8:	bd70      	pop	{r4, r5, r6, pc}
		rv = -EIO;
    88ca:	2a05      	cmp	r2, #5
    88cc:	bf0c      	ite	eq
    88ce:	f06f 0585 	mvneq.w	r5, #133	; 0x85
    88d2:	f06f 0504 	mvnne.w	r5, #4
    88d6:	2300      	movs	r3, #0
    88d8:	e7d9      	b.n	888e <onoff_request+0x3a>
	parent->next = child;
    88da:	601e      	str	r6, [r3, #0]
	list->tail = node;
    88dc:	6066      	str	r6, [r4, #4]
}
    88de:	e7eb      	b.n	88b8 <onoff_request+0x64>
		rv = -EAGAIN;
    88e0:	f06f 050a 	mvn.w	r5, #10
    88e4:	e7f7      	b.n	88d6 <onoff_request+0x82>

000088e6 <z_thread_entry>:
 * This routine does not return, and is marked as such so the compiler won't
 * generate preamble code that is only used by functions that actually return.
 */
FUNC_NORETURN void z_thread_entry(k_thread_entry_t entry,
				 void *p1, void *p2, void *p3)
{
    88e6:	4604      	mov	r4, r0
    88e8:	b508      	push	{r3, lr}
    88ea:	4608      	mov	r0, r1
    88ec:	4611      	mov	r1, r2
#ifdef CONFIG_THREAD_LOCAL_STORAGE
	z_tls_current = z_current_get();
#endif
	entry(p1, p2, p3);
    88ee:	461a      	mov	r2, r3
    88f0:	47a0      	blx	r4
	return z_impl_z_current_get();
    88f2:	f7fd fd15 	bl	6320 <z_impl_z_current_get>
	z_impl_k_thread_abort(thread);
    88f6:	f7fa fd0d 	bl	3314 <z_impl_k_thread_abort>

000088fa <_ConfigAbsSyms>:
GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_OUTPUT_PRINT_MEMORY_USAGE, 1);
GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BUILD_OUTPUT_BIN, 1);
GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BUILD_OUTPUT_META, 1);
GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMPAT_INCLUDES, 1);

GEN_ABS_SYM_END
    88fa:	4770      	bx	lr

000088fc <log_list_init>:

#include "log_list.h"

void log_list_init(struct log_list_t *list)
{
	list->tail = NULL;
    88fc:	2300      	movs	r3, #0
	list->head = NULL;
    88fe:	e9c0 3300 	strd	r3, r3, [r0]
}
    8902:	4770      	bx	lr

00008904 <log_list_add_tail>:

void log_list_add_tail(struct log_list_t *list, struct log_msg *msg)
{
	if (list->head == NULL) {
    8904:	6803      	ldr	r3, [r0, #0]
    8906:	b923      	cbnz	r3, 8912 <log_list_add_tail+0xe>
		list->head = msg;
    8908:	6001      	str	r1, [r0, #0]
	} else {
		list->tail->next = msg;
	}

	list->tail = msg;
	msg->next = NULL;
    890a:	2300      	movs	r3, #0
	list->tail = msg;
    890c:	6041      	str	r1, [r0, #4]
	msg->next = NULL;
    890e:	600b      	str	r3, [r1, #0]
}
    8910:	4770      	bx	lr
		list->tail->next = msg;
    8912:	6843      	ldr	r3, [r0, #4]
    8914:	6019      	str	r1, [r3, #0]
    8916:	e7f8      	b.n	890a <log_list_add_tail+0x6>

00008918 <log_list_head_peek>:

struct log_msg *log_list_head_peek(struct log_list_t *list)
{
	return list->head;
}
    8918:	6800      	ldr	r0, [r0, #0]
    891a:	4770      	bx	lr

0000891c <log_list_head_get>:

struct log_msg *log_list_head_get(struct log_list_t *list)
{
	struct log_msg *msg = list->head;
    891c:	6803      	ldr	r3, [r0, #0]

	if (list->head != NULL) {
    891e:	b10b      	cbz	r3, 8924 <log_list_head_get+0x8>
		list->head = list->head->next;
    8920:	681a      	ldr	r2, [r3, #0]
    8922:	6002      	str	r2, [r0, #0]
	}

	return msg;
}
    8924:	4618      	mov	r0, r3
    8926:	4770      	bx	lr

00008928 <z_log_msg_std_alloc>:
/** @brief Allocate chunk for standard log message.
 *
 *  @return Allocated chunk of NULL.
 */
static inline struct log_msg *z_log_msg_std_alloc(void)
{
    8928:	b508      	push	{r3, lr}
	struct  log_msg *msg = (struct  log_msg *)log_msg_chunk_alloc();
    892a:	f7f9 fbc5 	bl	20b8 <log_msg_chunk_alloc>

	if (msg != NULL) {
    892e:	b118      	cbz	r0, 8938 <z_log_msg_std_alloc+0x10>
		/* all fields reset to 0, reference counter to 1 */
		msg->hdr.ref_cnt = 1;
    8930:	2301      	movs	r3, #1
    8932:	6043      	str	r3, [r0, #4]
		msg->hdr.params.raw = 0U;
    8934:	2300      	movs	r3, #0
    8936:	8103      	strh	r3, [r0, #8]
			msg->hdr.ids.source_id = 0;
		}
	}

	return msg;
}
    8938:	bd08      	pop	{r3, pc}

0000893a <default_get_timestamp>:
#ifndef _ASMLANGUAGE
extern uint32_t sys_clock_cycle_get_32(void);

static inline uint32_t arch_k_cycle_get_32(void)
{
	return sys_clock_cycle_get_32();
    893a:	f000 bddc 	b.w	94f6 <sys_clock_cycle_get_32>

0000893e <dummy_timestamp>:
    893e:	2000      	movs	r0, #0
    8940:	4770      	bx	lr

00008942 <z_log_get_s_mask>:
{
    8942:	b5f0      	push	{r4, r5, r6, r7, lr}
    8944:	4605      	mov	r5, r0
	uint32_t mask = 0U;
    8946:	2000      	movs	r0, #0
	uint32_t arg = 0U;
    8948:	4603      	mov	r3, r0
	bool arm = false;
    894a:	4602      	mov	r2, r0
				mask |= BIT(arg);
    894c:	2701      	movs	r7, #1
	while ((curr = *str++) && arg < nargs) {
    894e:	f815 4b01 	ldrb.w	r4, [r5], #1
    8952:	b10c      	cbz	r4, 8958 <z_log_get_s_mask+0x16>
    8954:	428b      	cmp	r3, r1
    8956:	d300      	bcc.n	895a <z_log_get_s_mask+0x18>
}
    8958:	bdf0      	pop	{r4, r5, r6, r7, pc}
		if (curr == '%') {
    895a:	2c25      	cmp	r4, #37	; 0x25
    895c:	d102      	bne.n	8964 <z_log_get_s_mask+0x22>
			arm = !arm;
    895e:	f082 0201 	eor.w	r2, r2, #1
    8962:	e7f4      	b.n	894e <z_log_get_s_mask+0xc>
		} else if (arm && isalpha((int)curr)) {
    8964:	2a00      	cmp	r2, #0
    8966:	d0f2      	beq.n	894e <z_log_get_s_mask+0xc>
	return (int)((((unsigned)c|32u)-(unsigned)'a') < 26U);
    8968:	f044 0620 	orr.w	r6, r4, #32
    896c:	3e61      	subs	r6, #97	; 0x61
    896e:	2e19      	cmp	r6, #25
    8970:	d8ed      	bhi.n	894e <z_log_get_s_mask+0xc>
			if (curr == 's') {
    8972:	2c73      	cmp	r4, #115	; 0x73
				mask |= BIT(arg);
    8974:	bf04      	itt	eq
    8976:	fa07 f203 	lsleq.w	r2, r7, r3
    897a:	4310      	orreq	r0, r2
			arg++;
    897c:	3301      	adds	r3, #1
			arm = false;
    897e:	2200      	movs	r2, #0
    8980:	e7e5      	b.n	894e <z_log_get_s_mask+0xc>

00008982 <enable_logger>:

K_KERNEL_STACK_DEFINE(logging_stack, CONFIG_LOG_PROCESS_THREAD_STACK_SIZE);
struct k_thread logging_thread;

static int enable_logger(const struct device *arg)
{
    8982:	b508      	push	{r3, lr}
				COND_CODE_1(CONFIG_LOG_PROCESS_THREAD,
					K_MSEC(CONFIG_LOG_PROCESS_THREAD_STARTUP_DELAY_MS),
					K_NO_WAIT));
		k_thread_name_set(&logging_thread, "logging");
	} else {
		log_init();
    8984:	f7f9 f960 	bl	1c48 <log_init>
	}

	return 0;
}
    8988:	2000      	movs	r0, #0
    898a:	bd08      	pop	{r3, pc}

0000898c <log_0>:
{
    898c:	b513      	push	{r0, r1, r4, lr}
    898e:	4604      	mov	r4, r0
    8990:	9101      	str	r1, [sp, #4]
 *
 *  @return Pointer to allocated head of the message or NULL.
 */
static inline struct log_msg *log_msg_create_0(const char *str)
{
	struct log_msg *msg = z_log_msg_std_alloc();
    8992:	f7ff ffc9 	bl	8928 <z_log_msg_std_alloc>

	if (msg != NULL) {
    8996:	b130      	cbz	r0, 89a6 <log_0+0x1a>
		msg_finalize(msg, src_level);
    8998:	9901      	ldr	r1, [sp, #4]
		msg->str = str;
    899a:	6104      	str	r4, [r0, #16]
}
    899c:	b002      	add	sp, #8
    899e:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
		msg_finalize(msg, src_level);
    89a2:	f7f9 baaf 	b.w	1f04 <msg_finalize>
}
    89a6:	b002      	add	sp, #8
    89a8:	bd10      	pop	{r4, pc}

000089aa <log_1>:
{
    89aa:	b537      	push	{r0, r1, r2, r4, r5, lr}
    89ac:	460c      	mov	r4, r1
    89ae:	4611      	mov	r1, r2
    89b0:	4605      	mov	r5, r0
    89b2:	9101      	str	r1, [sp, #4]
 *  @return Pointer to allocated head of the message or NULL.
 */
static inline struct log_msg *log_msg_create_1(const char *str,
					       log_arg_t arg1)
{
	struct  log_msg *msg = z_log_msg_std_alloc();
    89b4:	f7ff ffb8 	bl	8928 <z_log_msg_std_alloc>

	if (msg != NULL) {
    89b8:	b160      	cbz	r0, 89d4 <log_1+0x2a>
		msg->str = str;
		msg->hdr.params.std.nargs = 1U;
    89ba:	7a42      	ldrb	r2, [r0, #9]
		msg->str = str;
    89bc:	6105      	str	r5, [r0, #16]
		msg->hdr.params.std.nargs = 1U;
    89be:	2501      	movs	r5, #1
    89c0:	f365 1207 	bfi	r2, r5, #4, #4
    89c4:	7242      	strb	r2, [r0, #9]
		msg_finalize(msg, src_level);
    89c6:	9901      	ldr	r1, [sp, #4]
		msg->payload.single.args[0] = arg1;
    89c8:	6144      	str	r4, [r0, #20]
}
    89ca:	b003      	add	sp, #12
    89cc:	e8bd 4030 	ldmia.w	sp!, {r4, r5, lr}
		msg_finalize(msg, src_level);
    89d0:	f7f9 ba98 	b.w	1f04 <msg_finalize>
}
    89d4:	b003      	add	sp, #12
    89d6:	bd30      	pop	{r4, r5, pc}

000089d8 <log_2>:
{
    89d8:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    89da:	460e      	mov	r6, r1
    89dc:	4619      	mov	r1, r3
    89de:	4607      	mov	r7, r0
    89e0:	4615      	mov	r5, r2
    89e2:	9101      	str	r1, [sp, #4]
 */
static inline struct log_msg *log_msg_create_2(const char *str,
					       log_arg_t arg1,
					       log_arg_t arg2)
{
	struct  log_msg *msg = z_log_msg_std_alloc();
    89e4:	f7ff ffa0 	bl	8928 <z_log_msg_std_alloc>

	if (msg != NULL) {
    89e8:	b168      	cbz	r0, 8a06 <log_2+0x2e>
		msg->str = str;
		msg->hdr.params.std.nargs = 2U;
    89ea:	7a43      	ldrb	r3, [r0, #9]
		msg->str = str;
    89ec:	6107      	str	r7, [r0, #16]
		msg->hdr.params.std.nargs = 2U;
    89ee:	2202      	movs	r2, #2
    89f0:	f362 1307 	bfi	r3, r2, #4, #4
    89f4:	7243      	strb	r3, [r0, #9]
		msg_finalize(msg, src_level);
    89f6:	9901      	ldr	r1, [sp, #4]
		msg->payload.single.args[0] = arg1;
		msg->payload.single.args[1] = arg2;
    89f8:	e9c0 6505 	strd	r6, r5, [r0, #20]
}
    89fc:	b003      	add	sp, #12
    89fe:	e8bd 40f0 	ldmia.w	sp!, {r4, r5, r6, r7, lr}
		msg_finalize(msg, src_level);
    8a02:	f7f9 ba7f 	b.w	1f04 <msg_finalize>
}
    8a06:	b003      	add	sp, #12
    8a08:	bdf0      	pop	{r4, r5, r6, r7, pc}

00008a0a <log_3>:
{
    8a0a:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
    8a0e:	460f      	mov	r7, r1
    8a10:	f8bd 1020 	ldrh.w	r1, [sp, #32]
    8a14:	9101      	str	r1, [sp, #4]
    8a16:	4680      	mov	r8, r0
    8a18:	4616      	mov	r6, r2
    8a1a:	461d      	mov	r5, r3
static inline struct log_msg *log_msg_create_3(const char *str,
					       log_arg_t arg1,
					       log_arg_t arg2,
					       log_arg_t arg3)
{
	struct  log_msg *msg = z_log_msg_std_alloc();
    8a1c:	f7ff ff84 	bl	8928 <z_log_msg_std_alloc>

	if (msg != NULL) {
    8a20:	b178      	cbz	r0, 8a42 <log_3+0x38>
		msg->str = str;
		msg->hdr.params.std.nargs = 3U;
    8a22:	7a43      	ldrb	r3, [r0, #9]
		msg->str = str;
    8a24:	f8c0 8010 	str.w	r8, [r0, #16]
		msg->hdr.params.std.nargs = 3U;
    8a28:	2203      	movs	r2, #3
    8a2a:	f362 1307 	bfi	r3, r2, #4, #4
    8a2e:	7243      	strb	r3, [r0, #9]
		msg_finalize(msg, src_level);
    8a30:	9901      	ldr	r1, [sp, #4]
		msg->payload.single.args[0] = arg1;
		msg->payload.single.args[1] = arg2;
		msg->payload.single.args[2] = arg3;
    8a32:	61c5      	str	r5, [r0, #28]
		msg->payload.single.args[1] = arg2;
    8a34:	e9c0 7605 	strd	r7, r6, [r0, #20]
}
    8a38:	b002      	add	sp, #8
    8a3a:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
		msg_finalize(msg, src_level);
    8a3e:	f7f9 ba61 	b.w	1f04 <msg_finalize>
}
    8a42:	b002      	add	sp, #8
    8a44:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

00008a48 <log_n>:
{
    8a48:	b510      	push	{r4, lr}
    8a4a:	461c      	mov	r4, r3
		struct log_msg *msg = log_msg_create_n(str, args, narg);
    8a4c:	f000 f8a3 	bl	8b96 <log_msg_create_n>
		if (msg == NULL) {
    8a50:	b120      	cbz	r0, 8a5c <log_n+0x14>
		msg_finalize(msg, src_level);
    8a52:	4621      	mov	r1, r4
}
    8a54:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
		msg_finalize(msg, src_level);
    8a58:	f7f9 ba54 	b.w	1f04 <msg_finalize>
}
    8a5c:	bd10      	pop	{r4, pc}

00008a5e <z_log_get_tag>:
}
    8a5e:	2000      	movs	r0, #0
    8a60:	4770      	bx	lr

00008a62 <log_msg_hexdump_data_op>:
static void log_msg_hexdump_data_op(struct log_msg *msg,
				    uint8_t *data,
				    size_t *length,
				    size_t offset,
				    bool put_op)
{
    8a62:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    8a66:	461c      	mov	r4, r3
	uint32_t available_len = msg->hdr.params.hexdump.length;
    8a68:	8903      	ldrh	r3, [r0, #8]
{
    8a6a:	f89d 7020 	ldrb.w	r7, [sp, #32]
	uint32_t available_len = msg->hdr.params.hexdump.length;
    8a6e:	f3c3 038d 	ubfx	r3, r3, #2, #14
	uint8_t *head_data;
	uint32_t chunk_len;
	uint32_t req_len;
	uint32_t cpy_len;

	if (offset >= available_len) {
    8a72:	42a3      	cmp	r3, r4
{
    8a74:	460e      	mov	r6, r1
	if (offset >= available_len) {
    8a76:	d803      	bhi.n	8a80 <log_msg_hexdump_data_op+0x1e>
		*length = 0;
    8a78:	2300      	movs	r3, #0
    8a7a:	6013      	str	r3, [r2, #0]
		offset = 0;
		cont = cont->next;
		req_len -= cpy_len;
		data += cpy_len;
	}
}
    8a7c:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
	if ((offset + *length) > available_len) {
    8a80:	6811      	ldr	r1, [r2, #0]
    8a82:	4421      	add	r1, r4
    8a84:	4299      	cmp	r1, r3
		*length = available_len - offset;
    8a86:	bf84      	itt	hi
    8a88:	1b19      	subhi	r1, r3, r4
    8a8a:	6011      	strhi	r1, [r2, #0]
	if (available_len > LOG_MSG_HEXDUMP_BYTES_SINGLE_CHUNK) {
    8a8c:	2b0c      	cmp	r3, #12
	req_len = *length;
    8a8e:	f8d2 9000 	ldr.w	r9, [r2]
	if (available_len > LOG_MSG_HEXDUMP_BYTES_SINGLE_CHUNK) {
    8a92:	d92b      	bls.n	8aec <log_msg_hexdump_data_op+0x8a>
	if (offset < chunk_len) {
    8a94:	2c07      	cmp	r4, #7
		cont = msg->payload.ext.next;
    8a96:	f8d0 8014 	ldr.w	r8, [r0, #20]
	if (offset < chunk_len) {
    8a9a:	d82e      	bhi.n	8afa <log_msg_hexdump_data_op+0x98>
		head_data = msg->payload.ext.data.bytes;
    8a9c:	3018      	adds	r0, #24
		chunk_len = LOG_MSG_HEXDUMP_BYTES_HEAD_CHUNK;
    8a9e:	2308      	movs	r3, #8
		cpy_len = req_len > chunk_len ? chunk_len : req_len;
    8aa0:	454b      	cmp	r3, r9
    8aa2:	bf28      	it	cs
    8aa4:	464b      	movcs	r3, r9
    8aa6:	461d      	mov	r5, r3
		if (put_op) {
    8aa8:	4420      	add	r0, r4
			(void)memcpy(&head_data[offset], data, cpy_len);
    8aaa:	461a      	mov	r2, r3
		if (put_op) {
    8aac:	b317      	cbz	r7, 8af4 <log_msg_hexdump_data_op+0x92>
			(void)memcpy(&head_data[offset], data, cpy_len);
    8aae:	4631      	mov	r1, r6
			(void)memcpy(data, &head_data[offset], cpy_len);
    8ab0:	f000 fb5b 	bl	916a <memcpy>
		req_len -= cpy_len;
    8ab4:	eba9 0905 	sub.w	r9, r9, r5
		data += cpy_len;
    8ab8:	442e      	add	r6, r5
	while ((req_len > 0) && (cont != NULL)) {
    8aba:	f1b9 0f00 	cmp.w	r9, #0
    8abe:	d0dd      	beq.n	8a7c <log_msg_hexdump_data_op+0x1a>
    8ac0:	f1b8 0f00 	cmp.w	r8, #0
    8ac4:	d0da      	beq.n	8a7c <log_msg_hexdump_data_op+0x1a>
		chunk_len = HEXDUMP_BYTES_CONT_MSG - offset;
    8ac6:	f1c4 051c 	rsb	r5, r4, #28
		cpy_len = req_len > chunk_len ? chunk_len : req_len;
    8aca:	454d      	cmp	r5, r9
    8acc:	bf28      	it	cs
    8ace:	464d      	movcs	r5, r9
		if (put_op) {
    8ad0:	1d20      	adds	r0, r4, #4
    8ad2:	4440      	add	r0, r8
			(void)memcpy(&cont->payload.bytes[offset],
    8ad4:	462a      	mov	r2, r5
		if (put_op) {
    8ad6:	b1bf      	cbz	r7, 8b08 <log_msg_hexdump_data_op+0xa6>
			(void)memcpy(&cont->payload.bytes[offset],
    8ad8:	4631      	mov	r1, r6
			(void)memcpy(data, &cont->payload.bytes[offset],
    8ada:	f000 fb46 	bl	916a <memcpy>
		req_len -= cpy_len;
    8ade:	eba9 0905 	sub.w	r9, r9, r5
		cont = cont->next;
    8ae2:	f8d8 8000 	ldr.w	r8, [r8]
		data += cpy_len;
    8ae6:	442e      	add	r6, r5
		offset = 0;
    8ae8:	2400      	movs	r4, #0
    8aea:	e7e6      	b.n	8aba <log_msg_hexdump_data_op+0x58>
		head_data = msg->payload.single.bytes;
    8aec:	3014      	adds	r0, #20
	struct log_msg_cont *cont = NULL;
    8aee:	f04f 0800 	mov.w	r8, #0
    8af2:	e7d5      	b.n	8aa0 <log_msg_hexdump_data_op+0x3e>
			(void)memcpy(data, &head_data[offset], cpy_len);
    8af4:	4601      	mov	r1, r0
    8af6:	4630      	mov	r0, r6
    8af8:	e7da      	b.n	8ab0 <log_msg_hexdump_data_op+0x4e>
		offset -= chunk_len;
    8afa:	3c08      	subs	r4, #8
		while (offset >= chunk_len) {
    8afc:	2c1b      	cmp	r4, #27
    8afe:	d9dc      	bls.n	8aba <log_msg_hexdump_data_op+0x58>
			cont = cont->next;
    8b00:	f8d8 8000 	ldr.w	r8, [r8]
			offset -= chunk_len;
    8b04:	3c1c      	subs	r4, #28
    8b06:	e7f9      	b.n	8afc <log_msg_hexdump_data_op+0x9a>
			(void)memcpy(data, &cont->payload.bytes[offset],
    8b08:	4601      	mov	r1, r0
    8b0a:	4630      	mov	r0, r6
    8b0c:	e7e5      	b.n	8ada <log_msg_hexdump_data_op+0x78>

00008b0e <log_msg_get>:
	return __atomic_fetch_add(target, value, __ATOMIC_SEQ_CST);
    8b0e:	3004      	adds	r0, #4
    8b10:	f3bf 8f5b 	dmb	ish
    8b14:	e850 3f00 	ldrex	r3, [r0]
    8b18:	3301      	adds	r3, #1
    8b1a:	e840 3200 	strex	r2, r3, [r0]
    8b1e:	2a00      	cmp	r2, #0
    8b20:	d1f8      	bne.n	8b14 <log_msg_get+0x6>
    8b22:	f3bf 8f5b 	dmb	ish
}
    8b26:	4770      	bx	lr

00008b28 <log_msg_nargs_get>:
	return msg->hdr.params.std.nargs;
    8b28:	7a40      	ldrb	r0, [r0, #9]
}
    8b2a:	0900      	lsrs	r0, r0, #4
    8b2c:	4770      	bx	lr

00008b2e <log_msg_arg_get>:
	if (arg_idx >= msg->hdr.params.std.nargs) {
    8b2e:	7a43      	ldrb	r3, [r0, #9]
    8b30:	ebb1 1f13 	cmp.w	r1, r3, lsr #4
    8b34:	ea4f 1213 	mov.w	r2, r3, lsr #4
    8b38:	d216      	bcs.n	8b68 <log_msg_arg_get+0x3a>
	if (msg->hdr.params.std.nargs <= LOG_MSG_NARGS_SINGLE_CHUNK) {
    8b3a:	2a03      	cmp	r2, #3
    8b3c:	d803      	bhi.n	8b46 <log_msg_arg_get+0x18>
		arg = msg->payload.single.args[arg_idx];
    8b3e:	eb00 0181 	add.w	r1, r0, r1, lsl #2
    8b42:	6948      	ldr	r0, [r1, #20]
    8b44:	4770      	bx	lr
	if (arg_idx < LOG_MSG_NARGS_HEAD_CHUNK) {
    8b46:	2901      	cmp	r1, #1
    8b48:	d803      	bhi.n	8b52 <log_msg_arg_get+0x24>
		return msg->payload.ext.data.args[arg_idx];
    8b4a:	eb00 0181 	add.w	r1, r0, r1, lsl #2
    8b4e:	6988      	ldr	r0, [r1, #24]
    8b50:	4770      	bx	lr
	cont = msg->payload.ext.next;
    8b52:	6943      	ldr	r3, [r0, #20]
	arg_idx -= LOG_MSG_NARGS_HEAD_CHUNK;
    8b54:	3902      	subs	r1, #2
	while (arg_idx >= ARGS_CONT_MSG) {
    8b56:	2906      	cmp	r1, #6
    8b58:	d803      	bhi.n	8b62 <log_msg_arg_get+0x34>
	return cont->payload.args[arg_idx];
    8b5a:	eb03 0181 	add.w	r1, r3, r1, lsl #2
    8b5e:	6848      	ldr	r0, [r1, #4]
    8b60:	4770      	bx	lr
		cont = cont->next;
    8b62:	681b      	ldr	r3, [r3, #0]
		arg_idx -= ARGS_CONT_MSG;
    8b64:	3907      	subs	r1, #7
		cont = cont->next;
    8b66:	e7f6      	b.n	8b56 <log_msg_arg_get+0x28>
		return 0;
    8b68:	2000      	movs	r0, #0
}
    8b6a:	4770      	bx	lr

00008b6c <log_msg_put>:
{
    8b6c:	4603      	mov	r3, r0
	return __atomic_fetch_sub(target, value, __ATOMIC_SEQ_CST);
    8b6e:	1d02      	adds	r2, r0, #4
    8b70:	f3bf 8f5b 	dmb	ish
    8b74:	e852 1f00 	ldrex	r1, [r2]
    8b78:	3901      	subs	r1, #1
    8b7a:	e842 1c00 	strex	ip, r1, [r2]
    8b7e:	f1bc 0f00 	cmp.w	ip, #0
    8b82:	d1f7      	bne.n	8b74 <log_msg_put+0x8>
    8b84:	f3bf 8f5b 	dmb	ish
	if (msg->hdr.ref_cnt == 0) {
    8b88:	685b      	ldr	r3, [r3, #4]
    8b8a:	b90b      	cbnz	r3, 8b90 <log_msg_put+0x24>
		msg_free(msg);
    8b8c:	f7f9 baa8 	b.w	20e0 <msg_free>
}
    8b90:	4770      	bx	lr

00008b92 <log_msg_str_get>:
}
    8b92:	6900      	ldr	r0, [r0, #16]
    8b94:	4770      	bx	lr

00008b96 <log_msg_create_n>:
{
    8b96:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
    8b9a:	4681      	mov	r9, r0
    8b9c:	4688      	mov	r8, r1
    8b9e:	4615      	mov	r5, r2
	struct  log_msg *msg = (struct  log_msg *)log_msg_chunk_alloc();
    8ba0:	f7f9 fa8a 	bl	20b8 <log_msg_chunk_alloc>
	if (msg != NULL) {
    8ba4:	4604      	mov	r4, r0
    8ba6:	b330      	cbz	r0, 8bf6 <log_msg_create_n+0x60>
		msg->hdr.ref_cnt = 1;
    8ba8:	2301      	movs	r3, #1
		msg->hdr.params.raw = 0U;
    8baa:	2700      	movs	r7, #0
	if ((msg == NULL) || nargs <= LOG_MSG_NARGS_SINGLE_CHUNK) {
    8bac:	2d03      	cmp	r5, #3
		msg->hdr.ref_cnt = 1;
    8bae:	6043      	str	r3, [r0, #4]
		msg->hdr.params.raw = 0U;
    8bb0:	8107      	strh	r7, [r0, #8]
    8bb2:	d909      	bls.n	8bc8 <log_msg_create_n+0x32>
	msg->hdr.params.generic.ext = 1;
    8bb4:	2202      	movs	r2, #2
    8bb6:	8102      	strh	r2, [r0, #8]
	n -= LOG_MSG_NARGS_HEAD_CHUNK;
    8bb8:	f1a5 0a02 	sub.w	sl, r5, #2
	next = &msg->payload.ext.next;
    8bbc:	f100 0b14 	add.w	fp, r0, #20
	*next = NULL;
    8bc0:	6147      	str	r7, [r0, #20]
	while (n > 0) {
    8bc2:	f1ba 0f00 	cmp.w	sl, #0
    8bc6:	dc0e      	bgt.n	8be6 <log_msg_create_n+0x50>
		msg->hdr.params.std.nargs = nargs;
    8bc8:	7a63      	ldrb	r3, [r4, #9]
		msg->str = str;
    8bca:	f8c4 9010 	str.w	r9, [r4, #16]
		msg->hdr.params.std.nargs = nargs;
    8bce:	f365 1307 	bfi	r3, r5, #4, #4
	if (nargs > LOG_MSG_NARGS_SINGLE_CHUNK) {
    8bd2:	2d03      	cmp	r5, #3
		msg->hdr.params.std.nargs = nargs;
    8bd4:	7263      	strb	r3, [r4, #9]
	if (nargs > LOG_MSG_NARGS_SINGLE_CHUNK) {
    8bd6:	d818      	bhi.n	8c0a <log_msg_create_n+0x74>
		(void)memcpy(msg->payload.single.args, args,
    8bd8:	00aa      	lsls	r2, r5, #2
    8bda:	4641      	mov	r1, r8
    8bdc:	f104 0014 	add.w	r0, r4, #20
    8be0:	f000 fac3 	bl	916a <memcpy>
	while (nargs != 0U) {
    8be4:	e007      	b.n	8bf6 <log_msg_create_n+0x60>
		cont = (struct log_msg_cont *)log_msg_chunk_alloc();
    8be6:	f7f9 fa67 	bl	20b8 <log_msg_chunk_alloc>
		if (cont == NULL) {
    8bea:	4606      	mov	r6, r0
    8bec:	b930      	cbnz	r0, 8bfc <log_msg_create_n+0x66>
			msg_free(msg);
    8bee:	4620      	mov	r0, r4
    8bf0:	f7f9 fa76 	bl	20e0 <msg_free>
			return NULL;
    8bf4:	4634      	mov	r4, r6
}
    8bf6:	4620      	mov	r0, r4
    8bf8:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
		*next = cont;
    8bfc:	f8cb 0000 	str.w	r0, [fp]
		cont->next = NULL;
    8c00:	f1aa 0a07 	sub.w	sl, sl, #7
    8c04:	6007      	str	r7, [r0, #0]
		next = &cont->next;
    8c06:	4683      	mov	fp, r0
		n -= ARGS_CONT_MSG;
    8c08:	e7db      	b.n	8bc2 <log_msg_create_n+0x2c>
		(void)memcpy(msg->payload.ext.data.args, args,
    8c0a:	4641      	mov	r1, r8
    8c0c:	2208      	movs	r2, #8
    8c0e:	f104 0018 	add.w	r0, r4, #24
	struct log_msg_cont *cont = msg->payload.ext.next;
    8c12:	6967      	ldr	r7, [r4, #20]
		(void)memcpy(msg->payload.ext.data.args, args,
    8c14:	f000 faa9 	bl	916a <memcpy>
		nargs -= LOG_MSG_NARGS_HEAD_CHUNK;
    8c18:	3d02      	subs	r5, #2
		args += LOG_MSG_NARGS_HEAD_CHUNK;
    8c1a:	f108 0808 	add.w	r8, r8, #8
		uint32_t cpy_args = MIN(nargs, ARGS_CONT_MSG);
    8c1e:	2d07      	cmp	r5, #7
    8c20:	462e      	mov	r6, r5
    8c22:	bf28      	it	cs
    8c24:	2607      	movcs	r6, #7
		(void)memcpy(cont->payload.args, args,
    8c26:	ea4f 0986 	mov.w	r9, r6, lsl #2
    8c2a:	4641      	mov	r1, r8
    8c2c:	1d38      	adds	r0, r7, #4
    8c2e:	464a      	mov	r2, r9
    8c30:	f000 fa9b 	bl	916a <memcpy>
	while (nargs != 0U) {
    8c34:	1bad      	subs	r5, r5, r6
		cont = cont->next;
    8c36:	683f      	ldr	r7, [r7, #0]
		args += cpy_args;
    8c38:	44c8      	add	r8, r9
	while (nargs != 0U) {
    8c3a:	d1f0      	bne.n	8c1e <log_msg_create_n+0x88>
    8c3c:	e7db      	b.n	8bf6 <log_msg_create_n+0x60>

00008c3e <log_msg_hexdump_data_get>:

void log_msg_hexdump_data_get(struct log_msg *msg,
			      uint8_t *data,
			      size_t *length,
			      size_t offset)
{
    8c3e:	b513      	push	{r0, r1, r4, lr}
	log_msg_hexdump_data_op(msg, data, length, offset, false);
    8c40:	2400      	movs	r4, #0
    8c42:	9400      	str	r4, [sp, #0]
    8c44:	f7ff ff0d 	bl	8a62 <log_msg_hexdump_data_op>
}
    8c48:	b002      	add	sp, #8
    8c4a:	bd10      	pop	{r4, pc}

00008c4c <buffer_write>:
{
    8c4c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    8c4e:	4606      	mov	r6, r0
    8c50:	460d      	mov	r5, r1
    8c52:	4614      	mov	r4, r2
    8c54:	461f      	mov	r7, r3
		processed = outf(buf, len, ctx);
    8c56:	4621      	mov	r1, r4
    8c58:	4628      	mov	r0, r5
    8c5a:	463a      	mov	r2, r7
    8c5c:	47b0      	blx	r6
	} while (len != 0);
    8c5e:	1a24      	subs	r4, r4, r0
		buf += processed;
    8c60:	4405      	add	r5, r0
	} while (len != 0);
    8c62:	d1f8      	bne.n	8c56 <buffer_write+0xa>
}
    8c64:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

00008c66 <std_print>:
{
    8c66:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
    8c6a:	b08e      	sub	sp, #56	; 0x38
    8c6c:	af0e      	add	r7, sp, #56	; 0x38
    8c6e:	4680      	mov	r8, r0
    8c70:	460d      	mov	r5, r1
	const char *str = log_msg_str_get(msg);
    8c72:	f7ff ff8e 	bl	8b92 <log_msg_str_get>
    8c76:	4606      	mov	r6, r0
	uint32_t nargs = log_msg_nargs_get(msg);
    8c78:	4640      	mov	r0, r8
    8c7a:	f7ff ff55 	bl	8b28 <log_msg_nargs_get>
	log_arg_t *args = alloca(sizeof(log_arg_t)*nargs);
    8c7e:	0083      	lsls	r3, r0, #2
    8c80:	3307      	adds	r3, #7
    8c82:	f023 0307 	bic.w	r3, r3, #7
    8c86:	ebad 0d03 	sub.w	sp, sp, r3
	uint32_t nargs = log_msg_nargs_get(msg);
    8c8a:	4682      	mov	sl, r0
	log_arg_t *args = alloca(sizeof(log_arg_t)*nargs);
    8c8c:	ac0e      	add	r4, sp, #56	; 0x38
	for (i = 0; i < nargs; i++) {
    8c8e:	f04f 0900 	mov.w	r9, #0
    8c92:	45d1      	cmp	r9, sl
    8c94:	d116      	bne.n	8cc4 <std_print+0x5e>
	switch (log_msg_nargs_get(msg)) {
    8c96:	4640      	mov	r0, r8
    8c98:	f7ff ff46 	bl	8b28 <log_msg_nargs_get>
    8c9c:	280f      	cmp	r0, #15
    8c9e:	d81e      	bhi.n	8cde <std_print+0x78>
    8ca0:	e8df f010 	tbh	[pc, r0, lsl #1]
    8ca4:	00200019 	.word	0x00200019
    8ca8:	002d0026 	.word	0x002d0026
    8cac:	00410036 	.word	0x00410036
    8cb0:	005d004e 	.word	0x005d004e
    8cb4:	0081006e 	.word	0x0081006e
    8cb8:	00ad0096 	.word	0x00ad0096
    8cbc:	00e100c6 	.word	0x00e100c6
    8cc0:	011d00fe 	.word	0x011d00fe
		args[i] = log_msg_arg_get(msg, i);
    8cc4:	4649      	mov	r1, r9
    8cc6:	4640      	mov	r0, r8
    8cc8:	f7ff ff31 	bl	8b2e <log_msg_arg_get>
    8ccc:	f844 0029 	str.w	r0, [r4, r9, lsl #2]
	for (i = 0; i < nargs; i++) {
    8cd0:	f109 0901 	add.w	r9, r9, #1
    8cd4:	e7dd      	b.n	8c92 <std_print+0x2c>
		print_formatted(output, str);
    8cd6:	4631      	mov	r1, r6
    8cd8:	4628      	mov	r0, r5
    8cda:	f7f9 fa3f 	bl	215c <print_formatted>
}
    8cde:	46bd      	mov	sp, r7
    8ce0:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
		print_formatted(output, str, args[0]);
    8ce4:	6822      	ldr	r2, [r4, #0]
    8ce6:	4631      	mov	r1, r6
    8ce8:	4628      	mov	r0, r5
    8cea:	f7f9 fa37 	bl	215c <print_formatted>
		break;
    8cee:	e7f6      	b.n	8cde <std_print+0x78>
		print_formatted(output, str, args[0], args[1]);
    8cf0:	e9d4 2300 	ldrd	r2, r3, [r4]
    8cf4:	4631      	mov	r1, r6
    8cf6:	4628      	mov	r0, r5
    8cf8:	f7f9 fa30 	bl	215c <print_formatted>
		break;
    8cfc:	e7ef      	b.n	8cde <std_print+0x78>
		print_formatted(output, str, args[0], args[1], args[2]);
    8cfe:	68a3      	ldr	r3, [r4, #8]
    8d00:	9300      	str	r3, [sp, #0]
    8d02:	e9d4 2300 	ldrd	r2, r3, [r4]
    8d06:	4631      	mov	r1, r6
    8d08:	4628      	mov	r0, r5
    8d0a:	f7f9 fa27 	bl	215c <print_formatted>
		break;
    8d0e:	e7e6      	b.n	8cde <std_print+0x78>
		print_formatted(output, str, args[0], args[1], args[2],
    8d10:	68e3      	ldr	r3, [r4, #12]
    8d12:	9301      	str	r3, [sp, #4]
    8d14:	68a3      	ldr	r3, [r4, #8]
    8d16:	9300      	str	r3, [sp, #0]
    8d18:	e9d4 2300 	ldrd	r2, r3, [r4]
    8d1c:	4631      	mov	r1, r6
    8d1e:	4628      	mov	r0, r5
    8d20:	f7f9 fa1c 	bl	215c <print_formatted>
		break;
    8d24:	e7db      	b.n	8cde <std_print+0x78>
		print_formatted(output, str, args[0], args[1], args[2],
    8d26:	6923      	ldr	r3, [r4, #16]
    8d28:	9302      	str	r3, [sp, #8]
    8d2a:	68e3      	ldr	r3, [r4, #12]
    8d2c:	9301      	str	r3, [sp, #4]
    8d2e:	68a3      	ldr	r3, [r4, #8]
    8d30:	9300      	str	r3, [sp, #0]
    8d32:	e9d4 2300 	ldrd	r2, r3, [r4]
    8d36:	4631      	mov	r1, r6
    8d38:	4628      	mov	r0, r5
    8d3a:	f7f9 fa0f 	bl	215c <print_formatted>
		break;
    8d3e:	e7ce      	b.n	8cde <std_print+0x78>
		print_formatted(output, str, args[0], args[1], args[2],
    8d40:	6963      	ldr	r3, [r4, #20]
    8d42:	9303      	str	r3, [sp, #12]
    8d44:	6923      	ldr	r3, [r4, #16]
    8d46:	9302      	str	r3, [sp, #8]
    8d48:	68e3      	ldr	r3, [r4, #12]
    8d4a:	9301      	str	r3, [sp, #4]
    8d4c:	68a3      	ldr	r3, [r4, #8]
    8d4e:	9300      	str	r3, [sp, #0]
    8d50:	e9d4 2300 	ldrd	r2, r3, [r4]
    8d54:	4631      	mov	r1, r6
    8d56:	4628      	mov	r0, r5
    8d58:	f7f9 fa00 	bl	215c <print_formatted>
		break;
    8d5c:	e7bf      	b.n	8cde <std_print+0x78>
		print_formatted(output, str, args[0], args[1], args[2],
    8d5e:	69a3      	ldr	r3, [r4, #24]
    8d60:	9304      	str	r3, [sp, #16]
    8d62:	6963      	ldr	r3, [r4, #20]
    8d64:	9303      	str	r3, [sp, #12]
    8d66:	6923      	ldr	r3, [r4, #16]
    8d68:	9302      	str	r3, [sp, #8]
    8d6a:	68e3      	ldr	r3, [r4, #12]
    8d6c:	9301      	str	r3, [sp, #4]
    8d6e:	68a3      	ldr	r3, [r4, #8]
    8d70:	9300      	str	r3, [sp, #0]
    8d72:	e9d4 2300 	ldrd	r2, r3, [r4]
    8d76:	4631      	mov	r1, r6
    8d78:	4628      	mov	r0, r5
    8d7a:	f7f9 f9ef 	bl	215c <print_formatted>
		break;
    8d7e:	e7ae      	b.n	8cde <std_print+0x78>
		print_formatted(output, str, args[0], args[1], args[2],
    8d80:	69e3      	ldr	r3, [r4, #28]
    8d82:	9305      	str	r3, [sp, #20]
    8d84:	69a3      	ldr	r3, [r4, #24]
    8d86:	9304      	str	r3, [sp, #16]
    8d88:	6963      	ldr	r3, [r4, #20]
    8d8a:	9303      	str	r3, [sp, #12]
    8d8c:	6923      	ldr	r3, [r4, #16]
    8d8e:	9302      	str	r3, [sp, #8]
    8d90:	68e3      	ldr	r3, [r4, #12]
    8d92:	9301      	str	r3, [sp, #4]
    8d94:	68a3      	ldr	r3, [r4, #8]
    8d96:	9300      	str	r3, [sp, #0]
    8d98:	e9d4 2300 	ldrd	r2, r3, [r4]
    8d9c:	4631      	mov	r1, r6
    8d9e:	4628      	mov	r0, r5
    8da0:	f7f9 f9dc 	bl	215c <print_formatted>
		break;
    8da4:	e79b      	b.n	8cde <std_print+0x78>
		print_formatted(output, str, args[0], args[1], args[2],
    8da6:	6a23      	ldr	r3, [r4, #32]
    8da8:	9306      	str	r3, [sp, #24]
    8daa:	69e3      	ldr	r3, [r4, #28]
    8dac:	9305      	str	r3, [sp, #20]
    8dae:	69a3      	ldr	r3, [r4, #24]
    8db0:	9304      	str	r3, [sp, #16]
    8db2:	6963      	ldr	r3, [r4, #20]
    8db4:	9303      	str	r3, [sp, #12]
    8db6:	6923      	ldr	r3, [r4, #16]
    8db8:	9302      	str	r3, [sp, #8]
    8dba:	68e3      	ldr	r3, [r4, #12]
    8dbc:	9301      	str	r3, [sp, #4]
    8dbe:	68a3      	ldr	r3, [r4, #8]
    8dc0:	9300      	str	r3, [sp, #0]
    8dc2:	e9d4 2300 	ldrd	r2, r3, [r4]
    8dc6:	4631      	mov	r1, r6
    8dc8:	4628      	mov	r0, r5
    8dca:	f7f9 f9c7 	bl	215c <print_formatted>
		break;
    8dce:	e786      	b.n	8cde <std_print+0x78>
		print_formatted(output, str, args[0], args[1], args[2],
    8dd0:	6a63      	ldr	r3, [r4, #36]	; 0x24
    8dd2:	9307      	str	r3, [sp, #28]
    8dd4:	6a23      	ldr	r3, [r4, #32]
    8dd6:	9306      	str	r3, [sp, #24]
    8dd8:	69e3      	ldr	r3, [r4, #28]
    8dda:	9305      	str	r3, [sp, #20]
    8ddc:	69a3      	ldr	r3, [r4, #24]
    8dde:	9304      	str	r3, [sp, #16]
    8de0:	6963      	ldr	r3, [r4, #20]
    8de2:	9303      	str	r3, [sp, #12]
    8de4:	6923      	ldr	r3, [r4, #16]
    8de6:	9302      	str	r3, [sp, #8]
    8de8:	68e3      	ldr	r3, [r4, #12]
    8dea:	9301      	str	r3, [sp, #4]
    8dec:	68a3      	ldr	r3, [r4, #8]
    8dee:	9300      	str	r3, [sp, #0]
    8df0:	e9d4 2300 	ldrd	r2, r3, [r4]
    8df4:	4631      	mov	r1, r6
    8df6:	4628      	mov	r0, r5
    8df8:	f7f9 f9b0 	bl	215c <print_formatted>
		break;
    8dfc:	e76f      	b.n	8cde <std_print+0x78>
		print_formatted(output, str, args[0], args[1], args[2],
    8dfe:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    8e00:	9308      	str	r3, [sp, #32]
    8e02:	6a63      	ldr	r3, [r4, #36]	; 0x24
    8e04:	9307      	str	r3, [sp, #28]
    8e06:	6a23      	ldr	r3, [r4, #32]
    8e08:	9306      	str	r3, [sp, #24]
    8e0a:	69e3      	ldr	r3, [r4, #28]
    8e0c:	9305      	str	r3, [sp, #20]
    8e0e:	69a3      	ldr	r3, [r4, #24]
    8e10:	9304      	str	r3, [sp, #16]
    8e12:	6963      	ldr	r3, [r4, #20]
    8e14:	9303      	str	r3, [sp, #12]
    8e16:	6923      	ldr	r3, [r4, #16]
    8e18:	9302      	str	r3, [sp, #8]
    8e1a:	68e3      	ldr	r3, [r4, #12]
    8e1c:	9301      	str	r3, [sp, #4]
    8e1e:	68a3      	ldr	r3, [r4, #8]
    8e20:	9300      	str	r3, [sp, #0]
    8e22:	e9d4 2300 	ldrd	r2, r3, [r4]
    8e26:	4631      	mov	r1, r6
    8e28:	4628      	mov	r0, r5
    8e2a:	f7f9 f997 	bl	215c <print_formatted>
		break;
    8e2e:	e756      	b.n	8cde <std_print+0x78>
		print_formatted(output, str, args[0], args[1], args[2],
    8e30:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
    8e32:	9309      	str	r3, [sp, #36]	; 0x24
    8e34:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    8e36:	9308      	str	r3, [sp, #32]
    8e38:	6a63      	ldr	r3, [r4, #36]	; 0x24
    8e3a:	9307      	str	r3, [sp, #28]
    8e3c:	6a23      	ldr	r3, [r4, #32]
    8e3e:	9306      	str	r3, [sp, #24]
    8e40:	69e3      	ldr	r3, [r4, #28]
    8e42:	9305      	str	r3, [sp, #20]
    8e44:	69a3      	ldr	r3, [r4, #24]
    8e46:	9304      	str	r3, [sp, #16]
    8e48:	6963      	ldr	r3, [r4, #20]
    8e4a:	9303      	str	r3, [sp, #12]
    8e4c:	6923      	ldr	r3, [r4, #16]
    8e4e:	9302      	str	r3, [sp, #8]
    8e50:	68e3      	ldr	r3, [r4, #12]
    8e52:	9301      	str	r3, [sp, #4]
    8e54:	68a3      	ldr	r3, [r4, #8]
    8e56:	9300      	str	r3, [sp, #0]
    8e58:	e9d4 2300 	ldrd	r2, r3, [r4]
    8e5c:	4631      	mov	r1, r6
    8e5e:	4628      	mov	r0, r5
    8e60:	f7f9 f97c 	bl	215c <print_formatted>
		break;
    8e64:	e73b      	b.n	8cde <std_print+0x78>
		print_formatted(output, str, args[0], args[1], args[2],
    8e66:	6b23      	ldr	r3, [r4, #48]	; 0x30
    8e68:	930a      	str	r3, [sp, #40]	; 0x28
    8e6a:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
    8e6c:	9309      	str	r3, [sp, #36]	; 0x24
    8e6e:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    8e70:	9308      	str	r3, [sp, #32]
    8e72:	6a63      	ldr	r3, [r4, #36]	; 0x24
    8e74:	9307      	str	r3, [sp, #28]
    8e76:	6a23      	ldr	r3, [r4, #32]
    8e78:	9306      	str	r3, [sp, #24]
    8e7a:	69e3      	ldr	r3, [r4, #28]
    8e7c:	9305      	str	r3, [sp, #20]
    8e7e:	69a3      	ldr	r3, [r4, #24]
    8e80:	9304      	str	r3, [sp, #16]
    8e82:	6963      	ldr	r3, [r4, #20]
    8e84:	9303      	str	r3, [sp, #12]
    8e86:	6923      	ldr	r3, [r4, #16]
    8e88:	9302      	str	r3, [sp, #8]
    8e8a:	68e3      	ldr	r3, [r4, #12]
    8e8c:	9301      	str	r3, [sp, #4]
    8e8e:	68a3      	ldr	r3, [r4, #8]
    8e90:	9300      	str	r3, [sp, #0]
    8e92:	e9d4 2300 	ldrd	r2, r3, [r4]
    8e96:	4631      	mov	r1, r6
    8e98:	4628      	mov	r0, r5
    8e9a:	f7f9 f95f 	bl	215c <print_formatted>
		break;
    8e9e:	e71e      	b.n	8cde <std_print+0x78>
		print_formatted(output, str, args[0], args[1], args[2],
    8ea0:	6b63      	ldr	r3, [r4, #52]	; 0x34
    8ea2:	930b      	str	r3, [sp, #44]	; 0x2c
    8ea4:	6b23      	ldr	r3, [r4, #48]	; 0x30
    8ea6:	930a      	str	r3, [sp, #40]	; 0x28
    8ea8:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
    8eaa:	9309      	str	r3, [sp, #36]	; 0x24
    8eac:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    8eae:	9308      	str	r3, [sp, #32]
    8eb0:	6a63      	ldr	r3, [r4, #36]	; 0x24
    8eb2:	9307      	str	r3, [sp, #28]
    8eb4:	6a23      	ldr	r3, [r4, #32]
    8eb6:	9306      	str	r3, [sp, #24]
    8eb8:	69e3      	ldr	r3, [r4, #28]
    8eba:	9305      	str	r3, [sp, #20]
    8ebc:	69a3      	ldr	r3, [r4, #24]
    8ebe:	9304      	str	r3, [sp, #16]
    8ec0:	6963      	ldr	r3, [r4, #20]
    8ec2:	9303      	str	r3, [sp, #12]
    8ec4:	6923      	ldr	r3, [r4, #16]
    8ec6:	9302      	str	r3, [sp, #8]
    8ec8:	68e3      	ldr	r3, [r4, #12]
    8eca:	9301      	str	r3, [sp, #4]
    8ecc:	68a3      	ldr	r3, [r4, #8]
    8ece:	9300      	str	r3, [sp, #0]
    8ed0:	e9d4 2300 	ldrd	r2, r3, [r4]
    8ed4:	4631      	mov	r1, r6
    8ed6:	4628      	mov	r0, r5
    8ed8:	f7f9 f940 	bl	215c <print_formatted>
		break;
    8edc:	e6ff      	b.n	8cde <std_print+0x78>
		print_formatted(output, str, args[0], args[1], args[2],
    8ede:	6ba3      	ldr	r3, [r4, #56]	; 0x38
    8ee0:	930c      	str	r3, [sp, #48]	; 0x30
    8ee2:	6b63      	ldr	r3, [r4, #52]	; 0x34
    8ee4:	930b      	str	r3, [sp, #44]	; 0x2c
    8ee6:	6b23      	ldr	r3, [r4, #48]	; 0x30
    8ee8:	930a      	str	r3, [sp, #40]	; 0x28
    8eea:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
    8eec:	9309      	str	r3, [sp, #36]	; 0x24
    8eee:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    8ef0:	9308      	str	r3, [sp, #32]
    8ef2:	6a63      	ldr	r3, [r4, #36]	; 0x24
    8ef4:	9307      	str	r3, [sp, #28]
    8ef6:	6a23      	ldr	r3, [r4, #32]
    8ef8:	9306      	str	r3, [sp, #24]
    8efa:	69e3      	ldr	r3, [r4, #28]
    8efc:	9305      	str	r3, [sp, #20]
    8efe:	69a3      	ldr	r3, [r4, #24]
    8f00:	9304      	str	r3, [sp, #16]
    8f02:	6963      	ldr	r3, [r4, #20]
    8f04:	9303      	str	r3, [sp, #12]
    8f06:	6923      	ldr	r3, [r4, #16]
    8f08:	9302      	str	r3, [sp, #8]
    8f0a:	68e3      	ldr	r3, [r4, #12]
    8f0c:	9301      	str	r3, [sp, #4]
    8f0e:	68a3      	ldr	r3, [r4, #8]
    8f10:	9300      	str	r3, [sp, #0]
    8f12:	e9d4 2300 	ldrd	r2, r3, [r4]
    8f16:	4631      	mov	r1, r6
    8f18:	4628      	mov	r0, r5
    8f1a:	f7f9 f91f 	bl	215c <print_formatted>
}
    8f1e:	e6de      	b.n	8cde <std_print+0x78>

00008f20 <log_output_flush>:
		     output->control_block->offset,
    8f20:	6842      	ldr	r2, [r0, #4]
	buffer_write(output->func, output->buf,
    8f22:	6881      	ldr	r1, [r0, #8]
{
    8f24:	b510      	push	{r4, lr}
    8f26:	4604      	mov	r4, r0
	buffer_write(output->func, output->buf,
    8f28:	e9d2 2300 	ldrd	r2, r3, [r2]
    8f2c:	6800      	ldr	r0, [r0, #0]
    8f2e:	f7ff fe8d 	bl	8c4c <buffer_write>
	output->control_block->offset = 0;
    8f32:	6863      	ldr	r3, [r4, #4]
    8f34:	2200      	movs	r2, #0
    8f36:	601a      	str	r2, [r3, #0]
}
    8f38:	bd10      	pop	{r4, pc}

00008f3a <out_func>:
{
    8f3a:	b538      	push	{r3, r4, r5, lr}
	if (out_ctx->control_block->offset == out_ctx->size) {
    8f3c:	684b      	ldr	r3, [r1, #4]
    8f3e:	681a      	ldr	r2, [r3, #0]
    8f40:	68cb      	ldr	r3, [r1, #12]
    8f42:	429a      	cmp	r2, r3
{
    8f44:	4605      	mov	r5, r0
    8f46:	460c      	mov	r4, r1
	if (out_ctx->control_block->offset == out_ctx->size) {
    8f48:	d102      	bne.n	8f50 <out_func+0x16>
		log_output_flush(out_ctx);
    8f4a:	4608      	mov	r0, r1
    8f4c:	f7ff ffe8 	bl	8f20 <log_output_flush>
	return __atomic_fetch_add(target, value, __ATOMIC_SEQ_CST);
    8f50:	6863      	ldr	r3, [r4, #4]
    8f52:	f3bf 8f5b 	dmb	ish
    8f56:	e853 2f00 	ldrex	r2, [r3]
    8f5a:	1c51      	adds	r1, r2, #1
    8f5c:	e843 1000 	strex	r0, r1, [r3]
    8f60:	2800      	cmp	r0, #0
    8f62:	d1f8      	bne.n	8f56 <out_func+0x1c>
    8f64:	f3bf 8f5b 	dmb	ish
	out_ctx->buf[idx] = (uint8_t)c;
    8f68:	68a3      	ldr	r3, [r4, #8]
    8f6a:	549d      	strb	r5, [r3, r2]
}
    8f6c:	2000      	movs	r0, #0
    8f6e:	bd38      	pop	{r3, r4, r5, pc}

00008f70 <flash_area_close>:

void flash_area_close(const struct flash_area *fa)
{
	/* nothing to do for now */
}
    8f70:	4770      	bx	lr

00008f72 <flash_area_read>:

int flash_area_read(const struct flash_area *fa, off_t off, void *dst,
		    size_t len)
{
    8f72:	b573      	push	{r0, r1, r4, r5, r6, lr}


static inline bool is_in_flash_area_bounds(const struct flash_area *fa,
					   off_t off, size_t len)
{
	return (off >= 0) && ((off + len) <= fa->fa_size);
    8f74:	1e0c      	subs	r4, r1, #0
    8f76:	4605      	mov	r5, r0
    8f78:	9201      	str	r2, [sp, #4]
    8f7a:	461e      	mov	r6, r3
    8f7c:	db11      	blt.n	8fa2 <flash_area_read+0x30>
    8f7e:	6881      	ldr	r1, [r0, #8]
    8f80:	18e3      	adds	r3, r4, r3
    8f82:	428b      	cmp	r3, r1
    8f84:	d80d      	bhi.n	8fa2 <flash_area_read+0x30>

	if (!is_in_flash_area_bounds(fa, off, len)) {
		return -EINVAL;
	}

	dev = device_get_binding(fa->fa_dev_name);
    8f86:	68c0      	ldr	r0, [r0, #12]
    8f88:	f7fc fb5e 	bl	5648 <z_impl_device_get_binding>

	return flash_read(dev, fa->fa_off + off, dst, len);
    8f8c:	6869      	ldr	r1, [r5, #4]
    8f8e:	4421      	add	r1, r4
				    size_t len)
{
	const struct flash_driver_api *api =
		(const struct flash_driver_api *)dev->api;

	return api->read(dev, offset, data, len);
    8f90:	6883      	ldr	r3, [r0, #8]
    8f92:	9a01      	ldr	r2, [sp, #4]
    8f94:	681c      	ldr	r4, [r3, #0]
    8f96:	4633      	mov	r3, r6
    8f98:	46a4      	mov	ip, r4
}
    8f9a:	b002      	add	sp, #8
    8f9c:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
    8fa0:	4760      	bx	ip
    8fa2:	f06f 0015 	mvn.w	r0, #21
    8fa6:	b002      	add	sp, #8
    8fa8:	bd70      	pop	{r4, r5, r6, pc}

00008faa <flash_area_write>:

int flash_area_write(const struct flash_area *fa, off_t off, const void *src,
		     size_t len)
{
    8faa:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    8fae:	f1b1 0900 	subs.w	r9, r1, #0
    8fb2:	4607      	mov	r7, r0
    8fb4:	4690      	mov	r8, r2
    8fb6:	461e      	mov	r6, r3
    8fb8:	db22      	blt.n	9000 <flash_area_write+0x56>
    8fba:	6882      	ldr	r2, [r0, #8]
    8fbc:	444b      	add	r3, r9
    8fbe:	4293      	cmp	r3, r2
    8fc0:	d81e      	bhi.n	9000 <flash_area_write+0x56>

	if (!is_in_flash_area_bounds(fa, off, len)) {
		return -EINVAL;
	}

	flash_dev = device_get_binding(fa->fa_dev_name);
    8fc2:	68c0      	ldr	r0, [r0, #12]
    8fc4:	f7fc fb40 	bl	5648 <z_impl_device_get_binding>

	rc = flash_write(flash_dev, fa->fa_off + off, (void *)src, len);
    8fc8:	6879      	ldr	r1, [r7, #4]
    8fca:	4605      	mov	r5, r0
    8fcc:	4489      	add	r9, r1
			  size_t len);

static inline int z_impl_flash_write(const struct device *dev, off_t offset,
				     const void *data, size_t len)
{
	const struct flash_driver_api *api =
    8fce:	6887      	ldr	r7, [r0, #8]
	/* write protection management in this function exists for keeping
	 * compatibility with out-of-tree drivers which are not aligned jet
	 * with write-protection API depreciation.
	 * This will be removed with flash_api_write_protection handler type.
	 */
	if (api->write_protection != NULL) {
    8fd0:	68fb      	ldr	r3, [r7, #12]
    8fd2:	b95b      	cbnz	r3, 8fec <flash_area_write+0x42>
		if (rc) {
			return rc;
		}
	}

	rc = api->write(dev, offset, data, len);
    8fd4:	687c      	ldr	r4, [r7, #4]
    8fd6:	4633      	mov	r3, r6
    8fd8:	4642      	mov	r2, r8
    8fda:	4649      	mov	r1, r9
    8fdc:	4628      	mov	r0, r5
    8fde:	47a0      	blx	r4

	if (api->write_protection != NULL) {
    8fe0:	68fb      	ldr	r3, [r7, #12]
	rc = api->write(dev, offset, data, len);
    8fe2:	4604      	mov	r4, r0
	if (api->write_protection != NULL) {
    8fe4:	b943      	cbnz	r3, 8ff8 <flash_area_write+0x4e>

	return rc;
}
    8fe6:	4620      	mov	r0, r4
    8fe8:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
		rc = api->write_protection(dev, false);
    8fec:	2100      	movs	r1, #0
    8fee:	4798      	blx	r3
		if (rc) {
    8ff0:	4604      	mov	r4, r0
    8ff2:	2800      	cmp	r0, #0
    8ff4:	d0ee      	beq.n	8fd4 <flash_area_write+0x2a>
    8ff6:	e7f6      	b.n	8fe6 <flash_area_write+0x3c>
		(void) api->write_protection(dev, true);
    8ff8:	2101      	movs	r1, #1
    8ffa:	4628      	mov	r0, r5
    8ffc:	4798      	blx	r3
    8ffe:	e7f2      	b.n	8fe6 <flash_area_write+0x3c>
		return -EINVAL;
    9000:	f06f 0415 	mvn.w	r4, #21
    9004:	e7ef      	b.n	8fe6 <flash_area_write+0x3c>

00009006 <flash_area_erase>:

int flash_area_erase(const struct flash_area *fa, off_t off, size_t len)
{
    9006:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    900a:	1e0c      	subs	r4, r1, #0
    900c:	4605      	mov	r5, r0
    900e:	4617      	mov	r7, r2
    9010:	db25      	blt.n	905e <flash_area_erase+0x58>
    9012:	18a3      	adds	r3, r4, r2
    9014:	6882      	ldr	r2, [r0, #8]
    9016:	4293      	cmp	r3, r2
    9018:	d821      	bhi.n	905e <flash_area_erase+0x58>

	if (!is_in_flash_area_bounds(fa, off, len)) {
		return -EINVAL;
	}

	flash_dev = device_get_binding(fa->fa_dev_name);
    901a:	68c0      	ldr	r0, [r0, #12]
    901c:	f7fc fb14 	bl	5648 <z_impl_device_get_binding>

	rc = flash_erase(flash_dev, fa->fa_off + off, len);
    9020:	686d      	ldr	r5, [r5, #4]
    9022:	4606      	mov	r6, r0
    9024:	4425      	add	r5, r4
__syscall int flash_erase(const struct device *dev, off_t offset, size_t size);

static inline int z_impl_flash_erase(const struct device *dev, off_t offset,
				     size_t size)
{
	const struct flash_driver_api *api =
    9026:	f8d0 8008 	ldr.w	r8, [r0, #8]
	/* write protection management in this function exists for keeping
	 * compatibility with out-of-tree drivers which are not aligned jet
	 * with write-protection API depreciation.
	 * This will be removed with flash_api_write_protection handler type.
	 */
	if (api->write_protection != NULL) {
    902a:	f8d8 300c 	ldr.w	r3, [r8, #12]
    902e:	b963      	cbnz	r3, 904a <flash_area_erase+0x44>
		if (rc) {
			return rc;
		}
	}

	rc = api->erase(dev, offset, size);
    9030:	f8d8 3008 	ldr.w	r3, [r8, #8]
    9034:	463a      	mov	r2, r7
    9036:	4629      	mov	r1, r5
    9038:	4630      	mov	r0, r6
    903a:	4798      	blx	r3

	if (api->write_protection != NULL) {
    903c:	f8d8 300c 	ldr.w	r3, [r8, #12]
	rc = api->erase(dev, offset, size);
    9040:	4604      	mov	r4, r0
	if (api->write_protection != NULL) {
    9042:	b943      	cbnz	r3, 9056 <flash_area_erase+0x50>

	return rc;
}
    9044:	4620      	mov	r0, r4
    9046:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
		rc = api->write_protection(dev, false);
    904a:	2100      	movs	r1, #0
    904c:	4798      	blx	r3
		if (rc) {
    904e:	4604      	mov	r4, r0
    9050:	2800      	cmp	r0, #0
    9052:	d0ed      	beq.n	9030 <flash_area_erase+0x2a>
    9054:	e7f6      	b.n	9044 <flash_area_erase+0x3e>
		(void) api->write_protection(dev, true);
    9056:	2101      	movs	r1, #1
    9058:	4630      	mov	r0, r6
    905a:	4798      	blx	r3
    905c:	e7f2      	b.n	9044 <flash_area_erase+0x3e>
		return -EINVAL;
    905e:	f06f 0415 	mvn.w	r4, #21
    9062:	e7ef      	b.n	9044 <flash_area_erase+0x3e>

00009064 <flash_area_align>:

uint32_t flash_area_align(const struct flash_area *fa)
{
    9064:	b508      	push	{r3, lr}
	const struct device *dev;

	dev = device_get_binding(fa->fa_dev_name);
    9066:	68c0      	ldr	r0, [r0, #12]
    9068:	f7fc faee 	bl	5648 <z_impl_device_get_binding>
static inline size_t z_impl_flash_get_write_block_size(const struct device *dev)
{
	const struct flash_driver_api *api =
		(const struct flash_driver_api *)dev->api;

	return api->get_parameters(dev)->write_block_size;
    906c:	6883      	ldr	r3, [r0, #8]
    906e:	691b      	ldr	r3, [r3, #16]
    9070:	4798      	blx	r3

	return flash_get_write_block_size(dev);
}
    9072:	6800      	ldr	r0, [r0, #0]
    9074:	bd08      	pop	{r3, pc}

00009076 <flash_area_erased_val>:
{
	return device_get_binding(fa->fa_dev_name);
}

uint8_t flash_area_erased_val(const struct flash_area *fa)
{
    9076:	b508      	push	{r3, lr}
	const struct flash_parameters *param;

	param = flash_get_parameters(device_get_binding(fa->fa_dev_name));
    9078:	68c0      	ldr	r0, [r0, #12]
    907a:	f7fc fae5 	bl	5648 <z_impl_device_get_binding>
static inline const struct flash_parameters *z_impl_flash_get_parameters(const struct device *dev)
{
	const struct flash_driver_api *api =
		(const struct flash_driver_api *)dev->api;

	return api->get_parameters(dev);
    907e:	6883      	ldr	r3, [r0, #8]
    9080:	691b      	ldr	r3, [r3, #16]
    9082:	4798      	blx	r3

	return param->erase_value;
}
    9084:	7900      	ldrb	r0, [r0, #4]
    9086:	bd08      	pop	{r3, pc}

00009088 <get_sectors_cb>:
{
    9088:	b570      	push	{r4, r5, r6, lr}
	if (info->start_offset < data->area_off) {
    908a:	6802      	ldr	r2, [r0, #0]
    908c:	684c      	ldr	r4, [r1, #4]
    908e:	42a2      	cmp	r2, r4
    9090:	d316      	bcc.n	90c0 <get_sectors_cb+0x38>
	} else if (info->start_offset >= data->area_off + data->area_len) {
    9092:	688b      	ldr	r3, [r1, #8]
    9094:	4423      	add	r3, r4
    9096:	429a      	cmp	r2, r3
    9098:	d206      	bcs.n	90a8 <get_sectors_cb+0x20>
	} else if (data->ret_idx >= data->ret_len) {
    909a:	e9d1 3504 	ldrd	r3, r5, [r1, #16]
    909e:	42ab      	cmp	r3, r5
    90a0:	d304      	bcc.n	90ac <get_sectors_cb+0x24>
		data->status = -ENOMEM;
    90a2:	f06f 030b 	mvn.w	r3, #11
    90a6:	618b      	str	r3, [r1, #24]
		*bail_value = false;
    90a8:	2000      	movs	r0, #0
    90aa:	e00a      	b.n	90c2 <get_sectors_cb+0x3a>
	ret[data->ret_idx].fs_off = info->start_offset - data->area_off;
    90ac:	68cd      	ldr	r5, [r1, #12]
    90ae:	1b12      	subs	r2, r2, r4
    90b0:	eb05 06c3 	add.w	r6, r5, r3, lsl #3
    90b4:	f845 2033 	str.w	r2, [r5, r3, lsl #3]
	ret[data->ret_idx].fs_size = info->size;
    90b8:	6842      	ldr	r2, [r0, #4]
    90ba:	6072      	str	r2, [r6, #4]
	data->ret_idx++;
    90bc:	3301      	adds	r3, #1
    90be:	610b      	str	r3, [r1, #16]
		*bail_value = true;
    90c0:	2001      	movs	r0, #1
}
    90c2:	bd70      	pop	{r4, r5, r6, pc}

000090c4 <abort_function>:
{
    90c4:	b508      	push	{r3, lr}
	sys_reboot(SYS_REBOOT_WARM);
    90c6:	2000      	movs	r0, #0
    90c8:	f7f8 fd82 	bl	1bd0 <sys_reboot>

000090cc <z_do_kernel_oops>:
 *   fault handler will executed insted of the SVC.
 *
 * @param esf exception frame
 */
void z_do_kernel_oops(const z_arch_esf_t *esf)
{
    90cc:	4601      	mov	r1, r0
	}

#endif /* CONFIG_USERSPACE */

#if !defined(CONFIG_EXTRA_EXCEPTION_INFO)
	z_arm_fatal_error(reason, esf);
    90ce:	6800      	ldr	r0, [r0, #0]
    90d0:	f7f9 bc42 	b.w	2958 <z_arm_fatal_error>

000090d4 <z_irq_spurious>:
 */
void z_irq_spurious(const void *unused)
{
	ARG_UNUSED(unused);

	z_arm_fatal_error(K_ERR_SPURIOUS_IRQ, NULL);
    90d4:	2100      	movs	r1, #0
    90d6:	2001      	movs	r0, #1
    90d8:	f7f9 bc3e 	b.w	2958 <z_arm_fatal_error>

000090dc <z_arm_nmi>:
 *
 * @return N/A
 */

void z_arm_nmi(void)
{
    90dc:	b508      	push	{r3, lr}
	handler();
    90de:	f7f9 fce5 	bl	2aac <z_SysNmiOnReset>
	z_arm_int_exit();
}
    90e2:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
	z_arm_int_exit();
    90e6:	f7f9 be45 	b.w	2d74 <z_arm_exc_exit>

000090ea <strcpy>:

char *strcpy(char *ZRESTRICT d, const char *ZRESTRICT s)
{
	char *dest = d;

	while (*s != '\0') {
    90ea:	3901      	subs	r1, #1
    90ec:	4603      	mov	r3, r0
    90ee:	f811 2f01 	ldrb.w	r2, [r1, #1]!
    90f2:	b90a      	cbnz	r2, 90f8 <strcpy+0xe>
		*d = *s;
		d++;
		s++;
	}

	*d = '\0';
    90f4:	701a      	strb	r2, [r3, #0]

	return dest;
}
    90f6:	4770      	bx	lr
		*d = *s;
    90f8:	f803 2b01 	strb.w	r2, [r3], #1
		s++;
    90fc:	e7f7      	b.n	90ee <strcpy+0x4>

000090fe <strncpy>:
 *
 * @return pointer to destination buffer <d>
 */

char *strncpy(char *ZRESTRICT d, const char *ZRESTRICT s, size_t n)
{
    90fe:	b570      	push	{r4, r5, r6, lr}
    9100:	3901      	subs	r1, #1
    9102:	4605      	mov	r5, r0
    9104:	462c      	mov	r4, r5
	char *dest = d;

	while ((n > 0) && *s != '\0') {
    9106:	b142      	cbz	r2, 911a <strncpy+0x1c>
    9108:	f811 3f01 	ldrb.w	r3, [r1, #1]!
    910c:	1e56      	subs	r6, r2, #1
    910e:	b92b      	cbnz	r3, 911c <strncpy+0x1e>
    9110:	442a      	add	r2, r5
		d++;
		n--;
	}

	while (n > 0) {
		*d = '\0';
    9112:	f804 3b01 	strb.w	r3, [r4], #1
	while (n > 0) {
    9116:	42a2      	cmp	r2, r4
    9118:	d1fb      	bne.n	9112 <strncpy+0x14>
		d++;
		n--;
	}

	return dest;
}
    911a:	bd70      	pop	{r4, r5, r6, pc}
		*d = *s;
    911c:	f805 3b01 	strb.w	r3, [r5], #1
		n--;
    9120:	4632      	mov	r2, r6
    9122:	e7ef      	b.n	9104 <strncpy+0x6>

00009124 <strlen>:
 *
 * @return number of bytes in string <s>
 */

size_t strlen(const char *s)
{
    9124:	4603      	mov	r3, r0
	size_t n = 0;
    9126:	2000      	movs	r0, #0

	while (*s != '\0') {
    9128:	5c1a      	ldrb	r2, [r3, r0]
    912a:	b902      	cbnz	r2, 912e <strlen+0xa>
		s++;
		n++;
	}

	return n;
}
    912c:	4770      	bx	lr
		n++;
    912e:	3001      	adds	r0, #1
    9130:	e7fa      	b.n	9128 <strlen+0x4>

00009132 <strcmp>:
 * @return negative # if <s1> < <s2>, 0 if <s1> == <s2>, else positive #
 */

int strcmp(const char *s1, const char *s2)
{
	while ((*s1 == *s2) && (*s1 != '\0')) {
    9132:	3801      	subs	r0, #1
    9134:	3901      	subs	r1, #1
    9136:	f810 3f01 	ldrb.w	r3, [r0, #1]!
    913a:	f811 2f01 	ldrb.w	r2, [r1, #1]!
    913e:	4293      	cmp	r3, r2
    9140:	d101      	bne.n	9146 <strcmp+0x14>
    9142:	2b00      	cmp	r3, #0
    9144:	d1f7      	bne.n	9136 <strcmp+0x4>
		s1++;
		s2++;
	}

	return *s1 - *s2;
}
    9146:	1a98      	subs	r0, r3, r2
    9148:	4770      	bx	lr

0000914a <memcmp>:
 * @brief Compare two memory areas
 *
 * @return negative # if <m1> < <m2>, 0 if <m1> == <m2>, else positive #
 */
int memcmp(const void *m1, const void *m2, size_t n)
{
    914a:	b510      	push	{r4, lr}
	const char *c1 = m1;
	const char *c2 = m2;

	if (!n) {
    914c:	b15a      	cbz	r2, 9166 <memcmp+0x1c>
    914e:	3901      	subs	r1, #1
    9150:	1884      	adds	r4, r0, r2
		return 0;
	}

	while ((--n > 0) && (*c1 == *c2)) {
    9152:	f810 2b01 	ldrb.w	r2, [r0], #1
    9156:	f811 3f01 	ldrb.w	r3, [r1, #1]!
    915a:	42a0      	cmp	r0, r4
    915c:	d001      	beq.n	9162 <memcmp+0x18>
    915e:	429a      	cmp	r2, r3
    9160:	d0f7      	beq.n	9152 <memcmp+0x8>
		c1++;
		c2++;
	}

	return *c1 - *c2;
    9162:	1ad0      	subs	r0, r2, r3
}
    9164:	bd10      	pop	{r4, pc}
		return 0;
    9166:	4610      	mov	r0, r2
    9168:	e7fc      	b.n	9164 <memcmp+0x1a>

0000916a <memcpy>:
 *
 * @return pointer to start of destination buffer
 */

void *memcpy(void *ZRESTRICT d, const void *ZRESTRICT s, size_t n)
{
    916a:	b510      	push	{r4, lr}
    916c:	1e43      	subs	r3, r0, #1
    916e:	440a      	add	r2, r1
	}
#endif

	/* do byte-sized copying until finished */

	while (n > 0) {
    9170:	4291      	cmp	r1, r2
    9172:	d100      	bne.n	9176 <memcpy+0xc>
		*(d_byte++) = *(s_byte++);
		n--;
	}

	return d;
}
    9174:	bd10      	pop	{r4, pc}
		*(d_byte++) = *(s_byte++);
    9176:	f811 4b01 	ldrb.w	r4, [r1], #1
    917a:	f803 4f01 	strb.w	r4, [r3, #1]!
		n--;
    917e:	e7f7      	b.n	9170 <memcpy+0x6>

00009180 <memset>:
void *memset(void *buf, int c, size_t n)
{
	/* do byte-sized initialization until word-aligned or finished */

	unsigned char *d_byte = (unsigned char *)buf;
	unsigned char c_byte = (unsigned char)c;
    9180:	b2c9      	uxtb	r1, r1
	/* do byte-sized initialization until finished */

	d_byte = (unsigned char *)d_word;
#endif

	while (n > 0) {
    9182:	4402      	add	r2, r0
	unsigned char *d_byte = (unsigned char *)buf;
    9184:	4603      	mov	r3, r0
	while (n > 0) {
    9186:	4293      	cmp	r3, r2
    9188:	d100      	bne.n	918c <memset+0xc>
		*(d_byte++) = c_byte;
		n--;
	}

	return buf;
}
    918a:	4770      	bx	lr
		*(d_byte++) = c_byte;
    918c:	f803 1b01 	strb.w	r1, [r3], #1
		n--;
    9190:	e7f9      	b.n	9186 <memset+0x6>

00009192 <_stdout_hook_default>:
}
    9192:	f04f 30ff 	mov.w	r0, #4294967295
    9196:	4770      	bx	lr

00009198 <get_status>:
	return GET_STATUS(get_sub_data(dev, type)->flags);
    9198:	6902      	ldr	r2, [r0, #16]
    919a:	b2cb      	uxtb	r3, r1
    919c:	210c      	movs	r1, #12
    919e:	fb03 2101 	mla	r1, r3, r1, r2
    91a2:	6c08      	ldr	r0, [r1, #64]	; 0x40
}
    91a4:	f000 0007 	and.w	r0, r0, #7
    91a8:	4770      	bx	lr

000091aa <set_off_state>:
	__asm__ volatile(
    91aa:	f04f 0320 	mov.w	r3, #32
    91ae:	f3ef 8211 	mrs	r2, BASEPRI
    91b2:	f383 8812 	msr	BASEPRI_MAX, r3
    91b6:	f3bf 8f6f 	isb	sy
	uint32_t current_ctx = GET_CTX(*flags);
    91ba:	6803      	ldr	r3, [r0, #0]
	if ((current_ctx != 0) && (current_ctx != ctx)) {
    91bc:	f013 03c0 	ands.w	r3, r3, #192	; 0xc0
    91c0:	d001      	beq.n	91c6 <set_off_state+0x1c>
    91c2:	428b      	cmp	r3, r1
    91c4:	d107      	bne.n	91d6 <set_off_state+0x2c>
		*flags = CLOCK_CONTROL_STATUS_OFF;
    91c6:	2301      	movs	r3, #1
    91c8:	6003      	str	r3, [r0, #0]
	int err = 0;
    91ca:	2000      	movs	r0, #0
	__asm__ volatile(
    91cc:	f382 8811 	msr	BASEPRI, r2
    91d0:	f3bf 8f6f 	isb	sy
}
    91d4:	4770      	bx	lr
		err = -EPERM;
    91d6:	f04f 30ff 	mov.w	r0, #4294967295
    91da:	e7f7      	b.n	91cc <set_off_state+0x22>

000091dc <set_starting_state>:
{
    91dc:	b510      	push	{r4, lr}
	__asm__ volatile(
    91de:	f04f 0320 	mov.w	r3, #32
    91e2:	f3ef 8211 	mrs	r2, BASEPRI
    91e6:	f383 8812 	msr	BASEPRI_MAX, r3
    91ea:	f3bf 8f6f 	isb	sy
	uint32_t current_ctx = GET_CTX(*flags);
    91ee:	6803      	ldr	r3, [r0, #0]
	if ((*flags & (STATUS_MASK)) == CLOCK_CONTROL_STATUS_OFF) {
    91f0:	f003 0407 	and.w	r4, r3, #7
    91f4:	2c01      	cmp	r4, #1
    91f6:	d106      	bne.n	9206 <set_starting_state+0x2a>
		*flags = CLOCK_CONTROL_STATUS_STARTING | ctx;
    91f8:	6001      	str	r1, [r0, #0]
	int err = 0;
    91fa:	2000      	movs	r0, #0
	__asm__ volatile(
    91fc:	f382 8811 	msr	BASEPRI, r2
    9200:	f3bf 8f6f 	isb	sy
}
    9204:	bd10      	pop	{r4, pc}
	uint32_t current_ctx = GET_CTX(*flags);
    9206:	f003 03c0 	and.w	r3, r3, #192	; 0xc0
	} else if (current_ctx != ctx) {
    920a:	428b      	cmp	r3, r1
		err = -EALREADY;
    920c:	bf14      	ite	ne
    920e:	f04f 30ff 	movne.w	r0, #4294967295
    9212:	f06f 0077 	mvneq.w	r0, #119	; 0x77
    9216:	e7f1      	b.n	91fc <set_starting_state+0x20>

00009218 <set_on_state>:
	__asm__ volatile(
    9218:	f04f 0320 	mov.w	r3, #32
    921c:	f3ef 8211 	mrs	r2, BASEPRI
    9220:	f383 8812 	msr	BASEPRI_MAX, r3
    9224:	f3bf 8f6f 	isb	sy
	*flags = CLOCK_CONTROL_STATUS_ON | GET_CTX(*flags);
    9228:	6803      	ldr	r3, [r0, #0]
    922a:	f003 03c0 	and.w	r3, r3, #192	; 0xc0
    922e:	f043 0302 	orr.w	r3, r3, #2
    9232:	6003      	str	r3, [r0, #0]
	__asm__ volatile(
    9234:	f382 8811 	msr	BASEPRI, r2
    9238:	f3bf 8f6f 	isb	sy
}
    923c:	4770      	bx	lr

0000923e <onoff_started_callback>:
	return &data->mgr[type];
    923e:	6900      	ldr	r0, [r0, #16]
{
    9240:	b410      	push	{r4}
	return &data->mgr[type];
    9242:	b2cb      	uxtb	r3, r1
	notify(mgr, 0);
    9244:	241c      	movs	r4, #28
    9246:	fb03 0004 	mla	r0, r3, r4, r0
    924a:	2100      	movs	r1, #0
}
    924c:	f85d 4b04 	ldr.w	r4, [sp], #4
	notify(mgr, 0);
    9250:	4710      	bx	r2

00009252 <lfclk_start>:
    nrfx_clock_start(NRF_CLOCK_DOMAIN_LFCLK);
    9252:	2000      	movs	r0, #0
    9254:	f7fb bd28 	b.w	4ca8 <nrfx_clock_start>

00009258 <lfclk_stop>:
    nrfx_clock_stop(NRF_CLOCK_DOMAIN_LFCLK);
    9258:	2000      	movs	r0, #0
    925a:	f7fb bd57 	b.w	4d0c <nrfx_clock_stop>

0000925e <blocking_start_callback>:
{
    925e:	4610      	mov	r0, r2
	z_impl_k_sem_give(sem);
    9260:	f7fc bd10 	b.w	5c84 <z_impl_k_sem_give>

00009264 <api_stop>:
{
    9264:	b538      	push	{r3, r4, r5, lr}
    9266:	b2c9      	uxtb	r1, r1
	err = set_off_state(&subdata->flags, ctx);
    9268:	240c      	movs	r4, #12
    926a:	434c      	muls	r4, r1
{
    926c:	4605      	mov	r5, r0
	err = set_off_state(&subdata->flags, ctx);
    926e:	6900      	ldr	r0, [r0, #16]
    9270:	f104 0340 	add.w	r3, r4, #64	; 0x40
    9274:	2180      	movs	r1, #128	; 0x80
    9276:	4418      	add	r0, r3
    9278:	f7ff ff97 	bl	91aa <set_off_state>
	if (err < 0) {
    927c:	2800      	cmp	r0, #0
    927e:	db04      	blt.n	928a <api_stop+0x26>
	get_sub_config(dev, type)->stop();
    9280:	6869      	ldr	r1, [r5, #4]
    9282:	440c      	add	r4, r1
    9284:	6863      	ldr	r3, [r4, #4]
    9286:	4798      	blx	r3
	return 0;
    9288:	2000      	movs	r0, #0
}
    928a:	bd38      	pop	{r3, r4, r5, pc}

0000928c <api_start>:
{
    928c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    9290:	b2c9      	uxtb	r1, r1
	err = set_starting_state(&subdata->flags, ctx);
    9292:	240c      	movs	r4, #12
	struct nrf_clock_control_sub_data *subdata = get_sub_data(dev, type);
    9294:	6905      	ldr	r5, [r0, #16]
	err = set_starting_state(&subdata->flags, ctx);
    9296:	434c      	muls	r4, r1
{
    9298:	4606      	mov	r6, r0
	err = set_starting_state(&subdata->flags, ctx);
    929a:	f104 0040 	add.w	r0, r4, #64	; 0x40
    929e:	2180      	movs	r1, #128	; 0x80
    92a0:	4428      	add	r0, r5
{
    92a2:	4690      	mov	r8, r2
    92a4:	461f      	mov	r7, r3
	err = set_starting_state(&subdata->flags, ctx);
    92a6:	f7ff ff99 	bl	91dc <set_starting_state>
	if (err < 0) {
    92aa:	2800      	cmp	r0, #0
    92ac:	db06      	blt.n	92bc <api_start+0x30>
	subdata->cb = cb;
    92ae:	4425      	add	r5, r4
	subdata->user_data = user_data;
    92b0:	e9c5 870e 	strd	r8, r7, [r5, #56]	; 0x38
	 get_sub_config(dev, type)->start();
    92b4:	6873      	ldr	r3, [r6, #4]
    92b6:	591b      	ldr	r3, [r3, r4]
    92b8:	4798      	blx	r3
	return 0;
    92ba:	2000      	movs	r0, #0
}
    92bc:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

000092c0 <gpio_nrfx_port_get_raw>:
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    92c0:	6843      	ldr	r3, [r0, #4]
    92c2:	685b      	ldr	r3, [r3, #4]
    return p_reg->IN;
    92c4:	f8d3 3510 	ldr.w	r3, [r3, #1296]	; 0x510
	*value = nrf_gpio_port_in_read(reg);
    92c8:	600b      	str	r3, [r1, #0]
}
    92ca:	2000      	movs	r0, #0
    92cc:	4770      	bx	lr

000092ce <gpio_nrfx_port_set_masked_raw>:
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    92ce:	6843      	ldr	r3, [r0, #4]
    92d0:	685b      	ldr	r3, [r3, #4]
    return p_reg->OUT;
    92d2:	f8d3 0504 	ldr.w	r0, [r3, #1284]	; 0x504
	nrf_gpio_port_out_write(reg, value_tmp | (mask & value));
    92d6:	4042      	eors	r2, r0
    92d8:	400a      	ands	r2, r1
    92da:	4042      	eors	r2, r0
    p_reg->OUT = value;
    92dc:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
}
    92e0:	2000      	movs	r0, #0
    92e2:	4770      	bx	lr

000092e4 <gpio_nrfx_port_set_bits_raw>:
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    92e4:	6843      	ldr	r3, [r0, #4]
    92e6:	685b      	ldr	r3, [r3, #4]
}
    92e8:	2000      	movs	r0, #0
    p_reg->OUTSET = set_mask;
    92ea:	f8c3 1508 	str.w	r1, [r3, #1288]	; 0x508
    92ee:	4770      	bx	lr

000092f0 <gpio_nrfx_port_clear_bits_raw>:
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    92f0:	6843      	ldr	r3, [r0, #4]
    92f2:	685b      	ldr	r3, [r3, #4]
}
    92f4:	2000      	movs	r0, #0
    p_reg->OUTCLR = clr_mask;
    92f6:	f8c3 150c 	str.w	r1, [r3, #1292]	; 0x50c
    92fa:	4770      	bx	lr

000092fc <gpio_nrfx_port_toggle_bits>:
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    92fc:	6843      	ldr	r3, [r0, #4]
    92fe:	685a      	ldr	r2, [r3, #4]
    return p_reg->OUT;
    9300:	f8d2 3504 	ldr.w	r3, [r2, #1284]	; 0x504
	nrf_gpio_port_out_write(reg, value ^ mask);
    9304:	4059      	eors	r1, r3
    p_reg->OUT = value;
    9306:	f8c2 1504 	str.w	r1, [r2, #1284]	; 0x504
}
    930a:	2000      	movs	r0, #0
    930c:	4770      	bx	lr

0000930e <gpio_nrfx_manage_callback>:
	return gpio_manage_callback(&get_port_data(port)->callbacks,
    930e:	6903      	ldr	r3, [r0, #16]
Z_GENLIST_IS_EMPTY(slist)
    9310:	6858      	ldr	r0, [r3, #4]
{
    9312:	b530      	push	{r4, r5, lr}
	if (!sys_slist_is_empty(callbacks)) {
    9314:	b158      	cbz	r0, 932e <gpio_nrfx_manage_callback+0x20>
 */
static inline bool sys_slist_find_and_remove(sys_slist_t *list,
					     sys_snode_t *node);

/** @} */
Z_GENLIST_FIND_AND_REMOVE(slist, snode)
    9316:	2400      	movs	r4, #0
    9318:	4281      	cmp	r1, r0
    931a:	d113      	bne.n	9344 <gpio_nrfx_manage_callback+0x36>
Z_GENLIST_REMOVE(slist, snode)
    931c:	6808      	ldr	r0, [r1, #0]
    931e:	b95c      	cbnz	r4, 9338 <gpio_nrfx_manage_callback+0x2a>
    9320:	689c      	ldr	r4, [r3, #8]
	list->head = node;
    9322:	6058      	str	r0, [r3, #4]
Z_GENLIST_REMOVE(slist, snode)
    9324:	42a1      	cmp	r1, r4
    9326:	d100      	bne.n	932a <gpio_nrfx_manage_callback+0x1c>
	list->tail = node;
    9328:	6098      	str	r0, [r3, #8]
	parent->next = child;
    932a:	2000      	movs	r0, #0
    932c:	6008      	str	r0, [r1, #0]
	if (set) {
    932e:	b972      	cbnz	r2, 934e <gpio_nrfx_manage_callback+0x40>
	return 0;
    9330:	2000      	movs	r0, #0
}
    9332:	bd30      	pop	{r4, r5, pc}
    9334:	4628      	mov	r0, r5
    9336:	e7ef      	b.n	9318 <gpio_nrfx_manage_callback+0xa>
    9338:	6020      	str	r0, [r4, #0]
Z_GENLIST_REMOVE(slist, snode)
    933a:	6898      	ldr	r0, [r3, #8]
    933c:	4281      	cmp	r1, r0
	list->tail = node;
    933e:	bf08      	it	eq
    9340:	609c      	streq	r4, [r3, #8]
}
    9342:	e7f2      	b.n	932a <gpio_nrfx_manage_callback+0x1c>
Z_GENLIST_PEEK_NEXT_NO_CHECK(slist, snode)
    9344:	6805      	ldr	r5, [r0, #0]
Z_GENLIST_FIND_AND_REMOVE(slist, snode)
    9346:	4604      	mov	r4, r0
    9348:	2d00      	cmp	r5, #0
    934a:	d1f3      	bne.n	9334 <gpio_nrfx_manage_callback+0x26>
			if (!set) {
    934c:	b13a      	cbz	r2, 935e <gpio_nrfx_manage_callback+0x50>
Z_GENLIST_PREPEND(slist, snode)
    934e:	685a      	ldr	r2, [r3, #4]
	parent->next = child;
    9350:	600a      	str	r2, [r1, #0]
Z_GENLIST_PREPEND(slist, snode)
    9352:	6898      	ldr	r0, [r3, #8]
	list->head = node;
    9354:	6059      	str	r1, [r3, #4]
Z_GENLIST_PREPEND(slist, snode)
    9356:	2800      	cmp	r0, #0
    9358:	d1ea      	bne.n	9330 <gpio_nrfx_manage_callback+0x22>
	list->tail = node;
    935a:	6099      	str	r1, [r3, #8]
}
    935c:	e7e9      	b.n	9332 <gpio_nrfx_manage_callback+0x24>
				return -EINVAL;
    935e:	f06f 0015 	mvn.w	r0, #21
	return gpio_manage_callback(&get_port_data(port)->callbacks,
    9362:	e7e6      	b.n	9332 <gpio_nrfx_manage_callback+0x24>

00009364 <is_regular_addr_valid>:
{
    9364:	b538      	push	{r3, r4, r5, lr}
    9366:	4604      	mov	r4, r0
    9368:	460d      	mov	r5, r1
	size_t flash_size = nrfx_nvmc_flash_size_get();
    936a:	f000 f9e3 	bl	9734 <nrfx_nvmc_flash_size_get>
	if (addr >= flash_size ||
    936e:	4284      	cmp	r4, r0
    9370:	d209      	bcs.n	9386 <is_regular_addr_valid+0x22>
    9372:	2c00      	cmp	r4, #0
    9374:	db07      	blt.n	9386 <is_regular_addr_valid+0x22>
	    addr < 0 ||
    9376:	42a8      	cmp	r0, r5
    9378:	d305      	bcc.n	9386 <is_regular_addr_valid+0x22>
	    (addr) + len > flash_size) {
    937a:	1961      	adds	r1, r4, r5
	    len > flash_size ||
    937c:	4281      	cmp	r1, r0
    937e:	bf8c      	ite	hi
    9380:	2000      	movhi	r0, #0
    9382:	2001      	movls	r0, #1
}
    9384:	bd38      	pop	{r3, r4, r5, pc}
		return false;
    9386:	2000      	movs	r0, #0
    9388:	e7fc      	b.n	9384 <is_regular_addr_valid+0x20>

0000938a <flash_page_foreach>:
	return count;
}

void flash_page_foreach(const struct device *dev, flash_page_cb cb,
			void *data)
{
    938a:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
	const struct flash_pages_layout *layout;
	struct flash_pages_info page_info;
	size_t block, num_blocks, page = 0, i;
	off_t off = 0;

	api->page_layout(dev, &layout, &num_blocks);
    938e:	6883      	ldr	r3, [r0, #8]
{
    9390:	b086      	sub	sp, #24
	api->page_layout(dev, &layout, &num_blocks);
    9392:	695b      	ldr	r3, [r3, #20]
{
    9394:	4688      	mov	r8, r1
    9396:	4691      	mov	r9, r2
	api->page_layout(dev, &layout, &num_blocks);
    9398:	a901      	add	r1, sp, #4
    939a:	aa02      	add	r2, sp, #8
    939c:	4798      	blx	r3
	off_t off = 0;
    939e:	2400      	movs	r4, #0
	size_t block, num_blocks, page = 0, i;
    93a0:	46a2      	mov	sl, r4

	for (block = 0; block < num_blocks; block++) {
    93a2:	4625      	mov	r5, r4
    93a4:	9b02      	ldr	r3, [sp, #8]
    93a6:	42ab      	cmp	r3, r5
    93a8:	d802      	bhi.n	93b0 <flash_page_foreach+0x26>

			off += page_info.size;
			page++;
		}
	}
}
    93aa:	b006      	add	sp, #24
    93ac:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
		const struct flash_pages_layout *l = &layout[block];
    93b0:	9f01      	ldr	r7, [sp, #4]
    93b2:	eb07 07c5 	add.w	r7, r7, r5, lsl #3
		for (i = 0; i < l->pages_count; i++) {
    93b6:	2600      	movs	r6, #0
		page_info.size = l->pages_size;
    93b8:	687b      	ldr	r3, [r7, #4]
    93ba:	9304      	str	r3, [sp, #16]
		for (i = 0; i < l->pages_count; i++) {
    93bc:	683a      	ldr	r2, [r7, #0]
    93be:	42b2      	cmp	r2, r6
    93c0:	eb0a 0306 	add.w	r3, sl, r6
    93c4:	d802      	bhi.n	93cc <flash_page_foreach+0x42>
	for (block = 0; block < num_blocks; block++) {
    93c6:	3501      	adds	r5, #1
    93c8:	469a      	mov	sl, r3
    93ca:	e7eb      	b.n	93a4 <flash_page_foreach+0x1a>
			if (!cb(&page_info, data)) {
    93cc:	4649      	mov	r1, r9
    93ce:	a803      	add	r0, sp, #12
			page_info.start_offset = off;
    93d0:	9403      	str	r4, [sp, #12]
			page_info.index = page;
    93d2:	9305      	str	r3, [sp, #20]
			if (!cb(&page_info, data)) {
    93d4:	47c0      	blx	r8
    93d6:	2800      	cmp	r0, #0
    93d8:	d0e7      	beq.n	93aa <flash_page_foreach+0x20>
			off += page_info.size;
    93da:	9b04      	ldr	r3, [sp, #16]
		for (i = 0; i < l->pages_count; i++) {
    93dc:	3601      	adds	r6, #1
			off += page_info.size;
    93de:	441c      	add	r4, r3
		for (i = 0; i < l->pages_count; i++) {
    93e0:	e7ec      	b.n	93bc <flash_page_foreach+0x32>

000093e2 <uarte_nrfx_isr_int>:
	return config->uarte_regs;
    93e2:	6843      	ldr	r3, [r0, #4]
    93e4:	681b      	ldr	r3, [r3, #0]
    return p_reg->INTENSET & mask;
    93e6:	f8d3 2304 	ldr.w	r2, [r3, #772]	; 0x304
	if (nrf_uarte_int_enable_check(uarte, NRF_UARTE_INT_ENDTX_MASK) &&
    93ea:	05d1      	lsls	r1, r2, #23
    93ec:	d518      	bpl.n	9420 <uarte_nrfx_isr_int+0x3e>
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    93ee:	f8d3 2120 	ldr.w	r2, [r3, #288]	; 0x120
    93f2:	b1aa      	cbz	r2, 9420 <uarte_nrfx_isr_int+0x3e>
	__asm__ volatile(
    93f4:	f04f 0120 	mov.w	r1, #32
    93f8:	f3ef 8211 	mrs	r2, BASEPRI
    93fc:	f381 8812 	msr	BASEPRI_MAX, r1
    9400:	f3bf 8f6f 	isb	sy
    9404:	f8d3 1120 	ldr.w	r1, [r3, #288]	; 0x120
	if (nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDTX)) {
    9408:	b131      	cbz	r1, 9418 <uarte_nrfx_isr_int+0x36>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    940a:	2100      	movs	r1, #0
    940c:	f8c3 1120 	str.w	r1, [r3, #288]	; 0x120
    9410:	f8d3 1120 	ldr.w	r1, [r3, #288]	; 0x120
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    9414:	2101      	movs	r1, #1
    9416:	60d9      	str	r1, [r3, #12]
	__asm__ volatile(
    9418:	f382 8811 	msr	BASEPRI, r2
    941c:	f3bf 8f6f 	isb	sy
	if (get_dev_config(dev)->flags & UARTE_CFG_FLAG_LOW_POWER) {
    9420:	6842      	ldr	r2, [r0, #4]
    9422:	6852      	ldr	r2, [r2, #4]
    9424:	06d2      	lsls	r2, r2, #27
    9426:	d515      	bpl.n	9454 <uarte_nrfx_isr_int+0x72>
	__asm__ volatile(
    9428:	f04f 0120 	mov.w	r1, #32
    942c:	f3ef 8211 	mrs	r2, BASEPRI
    9430:	f381 8812 	msr	BASEPRI_MAX, r1
    9434:	f3bf 8f6f 	isb	sy
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    9438:	f8d3 1158 	ldr.w	r1, [r3, #344]	; 0x158
		if (nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED)) {
    943c:	b111      	cbz	r1, 9444 <uarte_nrfx_isr_int+0x62>
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
    943e:	2100      	movs	r1, #0
    9440:	f8c3 1500 	str.w	r1, [r3, #1280]	; 0x500
    p_reg->INTENCLR = mask;
    9444:	f44f 0180 	mov.w	r1, #4194304	; 0x400000
    9448:	f8c3 1308 	str.w	r1, [r3, #776]	; 0x308
	__asm__ volatile(
    944c:	f382 8811 	msr	BASEPRI, r2
    9450:	f3bf 8f6f 	isb	sy
}
    9454:	4770      	bx	lr

00009456 <uarte_nrfx_config_get>:
	*cfg = get_dev_data(dev)->uart_config;
    9456:	6902      	ldr	r2, [r0, #16]
{
    9458:	460b      	mov	r3, r1
	*cfg = get_dev_data(dev)->uart_config;
    945a:	e9d2 0101 	ldrd	r0, r1, [r2, #4]
    945e:	e883 0003 	stmia.w	r3, {r0, r1}
}
    9462:	2000      	movs	r0, #0
    9464:	4770      	bx	lr

00009466 <uarte_nrfx_err_check>:
	return config->uarte_regs;
    9466:	6843      	ldr	r3, [r0, #4]
    9468:	681b      	ldr	r3, [r3, #0]
    uint32_t errsrc_mask = p_reg->ERRORSRC;
    946a:	f8d3 0480 	ldr.w	r0, [r3, #1152]	; 0x480
    p_reg->ERRORSRC = errsrc_mask;
    946e:	f8c3 0480 	str.w	r0, [r3, #1152]	; 0x480
}
    9472:	4770      	bx	lr

00009474 <is_tx_ready>:
	const struct uarte_nrfx_config *config = get_dev_config(dev);
    9474:	6842      	ldr	r2, [r0, #4]
	return config->uarte_regs;
    9476:	6813      	ldr	r3, [r2, #0]
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    9478:	f8d3 0158 	ldr.w	r0, [r3, #344]	; 0x158
	return nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED) ||
    947c:	b940      	cbnz	r0, 9490 <is_tx_ready+0x1c>
	bool ppi_endtx = get_dev_config(dev)->flags & UARTE_CFG_FLAG_PPI_ENDTX;
    947e:	6852      	ldr	r2, [r2, #4]
	return nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED) ||
    9480:	0792      	lsls	r2, r2, #30
    9482:	d406      	bmi.n	9492 <is_tx_ready+0x1e>
    9484:	f8d3 0120 	ldr.w	r0, [r3, #288]	; 0x120
    9488:	3800      	subs	r0, #0
    948a:	bf18      	it	ne
    948c:	2001      	movne	r0, #1
    948e:	4770      	bx	lr
    9490:	2001      	movs	r0, #1
}
    9492:	4770      	bx	lr

00009494 <uarte_nrfx_poll_in>:
	return config->uarte_regs;
    9494:	6843      	ldr	r3, [r0, #4]
	const struct uarte_nrfx_data *data = get_dev_data(dev);
    9496:	6902      	ldr	r2, [r0, #16]
	return config->uarte_regs;
    9498:	681b      	ldr	r3, [r3, #0]
    949a:	f8d3 0110 	ldr.w	r0, [r3, #272]	; 0x110
	if (!nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDRX)) {
    949e:	b148      	cbz	r0, 94b4 <uarte_nrfx_poll_in+0x20>
	*c = data->rx_data;
    94a0:	7c52      	ldrb	r2, [r2, #17]
    94a2:	700a      	strb	r2, [r1, #0]
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    94a4:	2000      	movs	r0, #0
    94a6:	f8c3 0110 	str.w	r0, [r3, #272]	; 0x110
    94aa:	f8d3 2110 	ldr.w	r2, [r3, #272]	; 0x110
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    94ae:	2201      	movs	r2, #1
    94b0:	601a      	str	r2, [r3, #0]
	return 0;
    94b2:	4770      	bx	lr
		return -1;
    94b4:	f04f 30ff 	mov.w	r0, #4294967295
}
    94b8:	4770      	bx	lr

000094ba <uarte_0_init>:
				.tx_buffer = uarte##idx##_tx_buffer,	       \
				.tx_buff_size = sizeof(uarte##idx##_tx_buffer),\
			};))

#ifdef CONFIG_UART_0_NRF_UARTE
UART_NRF_UARTE_DEVICE(0);
    94ba:	b510      	push	{r4, lr}
    94bc:	2200      	movs	r2, #0
    94be:	4604      	mov	r4, r0
    94c0:	2101      	movs	r1, #1
    94c2:	2002      	movs	r0, #2
    94c4:	f7f9 fada 	bl	2a7c <z_arm_irq_priority_set>
    94c8:	2002      	movs	r0, #2
    94ca:	f7f9 fab9 	bl	2a40 <arch_irq_enable>
    94ce:	4620      	mov	r0, r4
    94d0:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    94d4:	f7fa be26 	b.w	4124 <uarte_instance_init.isra.0>

000094d8 <uarte_1_init>:
#endif

#ifdef CONFIG_UART_1_NRF_UARTE
UART_NRF_UARTE_DEVICE(1);
    94d8:	b510      	push	{r4, lr}
    94da:	2200      	movs	r2, #0
    94dc:	4604      	mov	r4, r0
    94de:	2101      	movs	r1, #1
    94e0:	2028      	movs	r0, #40	; 0x28
    94e2:	f7f9 facb 	bl	2a7c <z_arm_irq_priority_set>
    94e6:	2028      	movs	r0, #40	; 0x28
    94e8:	f7f9 faaa 	bl	2a40 <arch_irq_enable>
    94ec:	4620      	mov	r0, r4
    94ee:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    94f2:	f7fa be17 	b.w	4124 <uarte_instance_init.isra.0>

000094f6 <sys_clock_cycle_get_32>:
{
    94f6:	b508      	push	{r3, lr}
	return (uint32_t)z_nrf_rtc_timer_read();
    94f8:	f7fa ff4c 	bl	4394 <z_nrf_rtc_timer_read>
}
    94fc:	bd08      	pop	{r3, pc}

000094fe <fprotect_area>:
}
#endif

int fprotect_area(uint32_t start, size_t length)
{
	return fprotect_set_permission(start, length,
    94fe:	2202      	movs	r2, #2
    9500:	f7fb b908 	b.w	4714 <fprotect_set_permission>

00009504 <hw_cc3xx_init_internal>:

	/* Initialize the cc3xx HW with or without RNG support */
#if CONFIG_ENTROPY_CC3XX
	res = nrf_cc3xx_platform_init();
#else
	res = nrf_cc3xx_platform_init_no_rng();
    9504:	f7fd b98e 	b.w	6824 <nrf_cc3xx_platform_init_no_rng>

00009508 <hw_cc3xx_init>:

	return res;
}

static int hw_cc3xx_init(const struct device *dev)
{
    9508:	b508      	push	{r3, lr}
	int res;

	/* Set the RTOS abort APIs */
	nrf_cc3xx_platform_abort_init();
    950a:	f7f9 f93d 	bl	2788 <nrf_cc3xx_platform_abort_init>

	/* Set the RTOS mutex APIs */
	nrf_cc3xx_platform_mutex_init();
    950e:	f7f9 f9ef 	bl	28f0 <nrf_cc3xx_platform_mutex_init>

	/* Enable the hardware */
	res = hw_cc3xx_init_internal(dev);
	return res;
}
    9512:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
	res = nrf_cc3xx_platform_init_no_rng();
    9516:	f7fd b985 	b.w	6824 <nrf_cc3xx_platform_init_no_rng>

0000951a <bootutil_buffer_is_erased.part.0>:
bool bootutil_buffer_is_erased(const struct flash_area *area,
    951a:	b538      	push	{r3, r4, r5, lr}
    951c:	460c      	mov	r4, r1
    951e:	4615      	mov	r5, r2
    9520:	4425      	add	r5, r4
    erased_val = flash_area_erased_val(area);
    9522:	f7ff fda8 	bl	9076 <flash_area_erased_val>
    for (i = 0, u8b = (uint8_t *)buffer; i < len; i++) {
    9526:	4621      	mov	r1, r4
    9528:	42a9      	cmp	r1, r5
    952a:	d101      	bne.n	9530 <bootutil_buffer_is_erased.part.0+0x16>
    return true;
    952c:	2001      	movs	r0, #1
}
    952e:	bd38      	pop	{r3, r4, r5, pc}
        if (u8b[i] != erased_val) {
    9530:	f811 3b01 	ldrb.w	r3, [r1], #1
    9534:	4298      	cmp	r0, r3
    9536:	d0f7      	beq.n	9528 <bootutil_buffer_is_erased.part.0+0xe>
            return false;
    9538:	2000      	movs	r0, #0
    953a:	e7f8      	b.n	952e <bootutil_buffer_is_erased.part.0+0x14>

0000953c <boot_swap_info_off>:
    return boot_copy_done_off(fap) - BOOT_MAX_ALIGN;
    953c:	6880      	ldr	r0, [r0, #8]
}
    953e:	3828      	subs	r0, #40	; 0x28
    9540:	4770      	bx	lr

00009542 <boot_magic_compatible_check>:
    switch (tbl_val) {
    9542:	2804      	cmp	r0, #4
    9544:	d009      	beq.n	955a <boot_magic_compatible_check+0x18>
    9546:	2805      	cmp	r0, #5
    9548:	d103      	bne.n	9552 <boot_magic_compatible_check+0x10>
        return val != BOOT_MAGIC_GOOD;
    954a:	1e48      	subs	r0, r1, #1
    954c:	bf18      	it	ne
    954e:	2001      	movne	r0, #1
    9550:	4770      	bx	lr
        return tbl_val == val;
    9552:	1a43      	subs	r3, r0, r1
    9554:	4258      	negs	r0, r3
    9556:	4158      	adcs	r0, r3
    9558:	4770      	bx	lr
    switch (tbl_val) {
    955a:	2001      	movs	r0, #1
}
    955c:	4770      	bx	lr

0000955e <bootutil_buffer_is_erased>:
    if (buffer == NULL || len == 0) {
    955e:	b111      	cbz	r1, 9566 <bootutil_buffer_is_erased+0x8>
    9560:	b10a      	cbz	r2, 9566 <bootutil_buffer_is_erased+0x8>
    9562:	f7ff bfda 	b.w	951a <bootutil_buffer_is_erased.part.0>
}
    9566:	2000      	movs	r0, #0
    9568:	4770      	bx	lr

0000956a <boot_read_flag>:
{
    956a:	b538      	push	{r3, r4, r5, lr}
    956c:	460c      	mov	r4, r1
    rc = flash_area_read(fap, off, flag, sizeof *flag);
    956e:	2301      	movs	r3, #1
{
    9570:	4611      	mov	r1, r2
    rc = flash_area_read(fap, off, flag, sizeof *flag);
    9572:	4622      	mov	r2, r4
{
    9574:	4605      	mov	r5, r0
    rc = flash_area_read(fap, off, flag, sizeof *flag);
    9576:	f7ff fcfc 	bl	8f72 <flash_area_read>
    if (rc < 0) {
    957a:	2800      	cmp	r0, #0
    957c:	db10      	blt.n	95a0 <boot_read_flag+0x36>
    if (bootutil_buffer_is_erased(fap, flag, sizeof *flag)) {
    957e:	2201      	movs	r2, #1
    9580:	4621      	mov	r1, r4
    9582:	4628      	mov	r0, r5
    9584:	f7ff ffeb 	bl	955e <bootutil_buffer_is_erased>
    9588:	b118      	cbz	r0, 9592 <boot_read_flag+0x28>
        *flag = BOOT_FLAG_UNSET;
    958a:	2303      	movs	r3, #3
    958c:	7023      	strb	r3, [r4, #0]
    return 0;
    958e:	2000      	movs	r0, #0
}
    9590:	bd38      	pop	{r3, r4, r5, pc}
    if (flag != BOOT_FLAG_SET) {
    9592:	7823      	ldrb	r3, [r4, #0]
    9594:	2b01      	cmp	r3, #1
        return BOOT_FLAG_BAD;
    9596:	bf0c      	ite	eq
    9598:	2301      	moveq	r3, #1
    959a:	2302      	movne	r3, #2
        *flag = boot_flag_decode(*flag);
    959c:	7023      	strb	r3, [r4, #0]
    959e:	e7f7      	b.n	9590 <boot_read_flag+0x26>
        return BOOT_EFLASH;
    95a0:	2001      	movs	r0, #1
    95a2:	e7f5      	b.n	9590 <boot_read_flag+0x26>

000095a4 <boot_write_trailer>:
{
    95a4:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
    95a8:	461d      	mov	r5, r3
    95aa:	4606      	mov	r6, r0
    95ac:	460f      	mov	r7, r1
    95ae:	4690      	mov	r8, r2
    align = flash_area_align(fap);
    95b0:	f7ff fd58 	bl	9064 <flash_area_align>
    95b4:	b2c3      	uxtb	r3, r0
    align = (inlen + align - 1) & ~(align - 1);
    95b6:	fa55 f480 	uxtab	r4, r5, r0
    95ba:	3c01      	subs	r4, #1
    95bc:	425b      	negs	r3, r3
    95be:	401c      	ands	r4, r3
    95c0:	b2e4      	uxtb	r4, r4
    if (align > BOOT_MAX_ALIGN) {
    95c2:	2c08      	cmp	r4, #8
    95c4:	d81a      	bhi.n	95fc <boot_write_trailer+0x58>
    erased_val = flash_area_erased_val(fap);
    95c6:	4630      	mov	r0, r6
    95c8:	f7ff fd55 	bl	9076 <flash_area_erased_val>
    memcpy(buf, inbuf, inlen);
    95cc:	462a      	mov	r2, r5
    erased_val = flash_area_erased_val(fap);
    95ce:	4681      	mov	r9, r0
    memcpy(buf, inbuf, inlen);
    95d0:	4641      	mov	r1, r8
    95d2:	4668      	mov	r0, sp
    95d4:	f7ff fdc9 	bl	916a <memcpy>
    memset(&buf[inlen], erased_val, align - inlen);
    95d8:	1b62      	subs	r2, r4, r5
    95da:	4649      	mov	r1, r9
    95dc:	eb0d 0005 	add.w	r0, sp, r5
    95e0:	f7ff fdce 	bl	9180 <memset>
    rc = flash_area_write(fap, off, buf, align);
    95e4:	4623      	mov	r3, r4
    95e6:	466a      	mov	r2, sp
    95e8:	4639      	mov	r1, r7
    95ea:	4630      	mov	r0, r6
    95ec:	f7ff fcdd 	bl	8faa <flash_area_write>
    if (rc != 0) {
    95f0:	3800      	subs	r0, #0
    95f2:	bf18      	it	ne
    95f4:	2001      	movne	r0, #1
}
    95f6:	b003      	add	sp, #12
    95f8:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
        return -1;
    95fc:	f04f 30ff 	mov.w	r0, #4294967295
    9600:	e7f9      	b.n	95f6 <boot_write_trailer+0x52>

00009602 <boot_write_trailer_flag>:
{
    9602:	b507      	push	{r0, r1, r2, lr}
    return boot_write_trailer(fap, off, buf, 1);
    9604:	2301      	movs	r3, #1
    const uint8_t buf[1] = { flag_val };
    9606:	f88d 2004 	strb.w	r2, [sp, #4]
    return boot_write_trailer(fap, off, buf, 1);
    960a:	aa01      	add	r2, sp, #4
    960c:	f7ff ffca 	bl	95a4 <boot_write_trailer>
}
    9610:	b003      	add	sp, #12
    9612:	f85d fb04 	ldr.w	pc, [sp], #4

00009616 <boot_write_image_ok>:
    return boot_magic_off(fap) - BOOT_MAX_ALIGN;
    9616:	6881      	ldr	r1, [r0, #8]
    return boot_write_trailer_flag(fap, off, BOOT_FLAG_SET);
    9618:	2201      	movs	r2, #1
    961a:	3918      	subs	r1, #24
    961c:	f7ff bff1 	b.w	9602 <boot_write_trailer_flag>

00009620 <boot_read_image_ok>:
    return boot_magic_off(fap) - BOOT_MAX_ALIGN;
    9620:	6882      	ldr	r2, [r0, #8]
    return boot_read_flag(fap, image_ok, boot_image_ok_off(fap));
    9622:	3a18      	subs	r2, #24
    9624:	f7ff bfa1 	b.w	956a <boot_read_flag>

00009628 <boot_read_swap_state_by_id>:
{
    9628:	b513      	push	{r0, r1, r4, lr}
    962a:	460c      	mov	r4, r1
    rc = flash_area_open(flash_area_id, &fap);
    962c:	b2c0      	uxtb	r0, r0
    962e:	a901      	add	r1, sp, #4
    9630:	f7f9 f858 	bl	26e4 <flash_area_open>
    if (rc != 0) {
    9634:	b950      	cbnz	r0, 964c <boot_read_swap_state_by_id+0x24>
    rc = boot_read_swap_state(fap, state);
    9636:	4621      	mov	r1, r4
    9638:	9801      	ldr	r0, [sp, #4]
    963a:	f7fb f8e5 	bl	4808 <boot_read_swap_state>
    963e:	4604      	mov	r4, r0
    flash_area_close(fap);
    9640:	9801      	ldr	r0, [sp, #4]
    9642:	f7ff fc95 	bl	8f70 <flash_area_close>
}
    9646:	4620      	mov	r0, r4
    9648:	b002      	add	sp, #8
    964a:	bd10      	pop	{r4, pc}
        return BOOT_EFLASH;
    964c:	2401      	movs	r4, #1
    964e:	e7fa      	b.n	9646 <boot_read_swap_state_by_id+0x1e>

00009650 <boot_write_swap_info>:
{
    9650:	b507      	push	{r0, r1, r2, lr}
    BOOT_SET_SWAP_INFO(swap_info, image_num, swap_type);
    9652:	ea41 1202 	orr.w	r2, r1, r2, lsl #4
    return boot_copy_done_off(fap) - BOOT_MAX_ALIGN;
    9656:	6881      	ldr	r1, [r0, #8]
    BOOT_SET_SWAP_INFO(swap_info, image_num, swap_type);
    9658:	f88d 2007 	strb.w	r2, [sp, #7]
    return boot_write_trailer(fap, off, (const uint8_t *) &swap_info, 1);
    965c:	2301      	movs	r3, #1
    965e:	f10d 0207 	add.w	r2, sp, #7
    9662:	3928      	subs	r1, #40	; 0x28
    9664:	f7ff ff9e 	bl	95a4 <boot_write_trailer>
}
    9668:	b003      	add	sp, #12
    966a:	f85d fb04 	ldr.w	pc, [sp], #4

0000966e <nrfx_isr>:
#include <nrfx.h>
#include <kernel.h>

void nrfx_isr(const void *irq_handler)
{
	((nrfx_irq_handler_t)irq_handler)();
    966e:	4700      	bx	r0

00009670 <nrfx_busy_wait>:
	z_impl_k_busy_wait(usec_to_wait);
    9670:	f000 b9f1 	b.w	9a56 <z_impl_k_busy_wait>

00009674 <nrfx_clock_enable>:
{
    9674:	b508      	push	{r3, lr}
    priority = NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY;
#else
    #error "This code is not supposed to be compiled when neither POWER nor CLOCK is enabled."
#endif

    if (!NRFX_IRQ_IS_ENABLED(nrfx_get_irq_number(NRF_CLOCK)))
    9676:	2000      	movs	r0, #0
    9678:	f7f9 f9f2 	bl	2a60 <arch_irq_is_enabled>
    967c:	b918      	cbnz	r0, 9686 <nrfx_clock_enable+0x12>
}
    967e:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
    {
        NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(NRF_CLOCK), priority);
        NRFX_IRQ_ENABLE(nrfx_get_irq_number(NRF_CLOCK));
    9682:	f7f9 b9dd 	b.w	2a40 <arch_irq_enable>
    9686:	bd08      	pop	{r3, pc}

00009688 <nrf_gpio_reconfigure>:
{
    9688:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    968a:	9001      	str	r0, [sp, #4]
    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
    968c:	a801      	add	r0, sp, #4
{
    968e:	e9dd 4608 	ldrd	r4, r6, [sp, #32]
    9692:	4617      	mov	r7, r2
    9694:	461d      	mov	r5, r3
    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
    9696:	f7fb fbb3 	bl	4e00 <nrf_gpio_pin_port_decode>
    uint32_t cnf = reg->PIN_CNF[pin_number];
    969a:	9b01      	ldr	r3, [sp, #4]
                         (p_input ? GPIO_PIN_CNF_INPUT_Msk : 0) |
    969c:	2f00      	cmp	r7, #0
    969e:	eb00 0083 	add.w	r0, r0, r3, lsl #2
    96a2:	bf14      	ite	ne
    96a4:	2302      	movne	r3, #2
    96a6:	2300      	moveq	r3, #0
    uint32_t to_update = (p_dir   ? GPIO_PIN_CNF_DIR_Msk   : 0) |
    96a8:	2900      	cmp	r1, #0
    96aa:	bf18      	it	ne
    96ac:	f043 0301 	orrne.w	r3, r3, #1
                         (p_pull  ? GPIO_PIN_CNF_PULL_Msk  : 0) |
    96b0:	2d00      	cmp	r5, #0
    96b2:	bf14      	ite	ne
    96b4:	f04f 0c0c 	movne.w	ip, #12
    96b8:	f04f 0c00 	moveq.w	ip, #0
                         (p_drive ? GPIO_PIN_CNF_DRIVE_Msk : 0) |
    96bc:	2c00      	cmp	r4, #0
                         (p_input ? GPIO_PIN_CNF_INPUT_Msk : 0) |
    96be:	ea43 030c 	orr.w	r3, r3, ip
                         (p_drive ? GPIO_PIN_CNF_DRIVE_Msk : 0) |
    96c2:	bf14      	ite	ne
    96c4:	f44f 6ce0 	movne.w	ip, #1792	; 0x700
    96c8:	f04f 0c00 	moveq.w	ip, #0
                         (p_sense ? GPIO_PIN_CNF_SENSE_Msk : 0);
    96cc:	2e00      	cmp	r6, #0
                         (p_pull  ? GPIO_PIN_CNF_PULL_Msk  : 0) |
    96ce:	ea43 030c 	orr.w	r3, r3, ip
    uint32_t cnf = reg->PIN_CNF[pin_number];
    96d2:	f8d0 2700 	ldr.w	r2, [r0, #1792]	; 0x700
                         (p_sense ? GPIO_PIN_CNF_SENSE_Msk : 0);
    96d6:	bf14      	ite	ne
    96d8:	f44f 3c40 	movne.w	ip, #196608	; 0x30000
    96dc:	f04f 0c00 	moveq.w	ip, #0
    uint32_t to_update = (p_dir   ? GPIO_PIN_CNF_DIR_Msk   : 0) |
    96e0:	ea43 030c 	orr.w	r3, r3, ip
    cnf &= ~to_update;
    96e4:	ea22 0303 	bic.w	r3, r2, r3
    cnf |= ((uint32_t)(p_dir   ? *p_dir   : 0) << GPIO_PIN_CNF_DIR_Pos)   |
    96e8:	b101      	cbz	r1, 96ec <nrf_gpio_reconfigure+0x64>
    96ea:	7809      	ldrb	r1, [r1, #0]
           ((uint32_t)(p_input ? *p_input : 0) << GPIO_PIN_CNF_INPUT_Pos) |
    96ec:	b10f      	cbz	r7, 96f2 <nrf_gpio_reconfigure+0x6a>
    96ee:	783f      	ldrb	r7, [r7, #0]
    96f0:	007f      	lsls	r7, r7, #1
    96f2:	4319      	orrs	r1, r3
           ((uint32_t)(p_pull  ? *p_pull  : 0) << GPIO_PIN_CNF_PULL_Pos)  |
    96f4:	b10d      	cbz	r5, 96fa <nrf_gpio_reconfigure+0x72>
    96f6:	782d      	ldrb	r5, [r5, #0]
    96f8:	00ad      	lsls	r5, r5, #2
    96fa:	4339      	orrs	r1, r7
           ((uint32_t)(p_drive ? *p_drive : 0) << GPIO_PIN_CNF_DRIVE_Pos) |
    96fc:	b10c      	cbz	r4, 9702 <nrf_gpio_reconfigure+0x7a>
    96fe:	7822      	ldrb	r2, [r4, #0]
    9700:	0214      	lsls	r4, r2, #8
    9702:	430d      	orrs	r5, r1
           ((uint32_t)(p_sense ? *p_sense : 0)<< GPIO_PIN_CNF_SENSE_Pos);
    9704:	b10e      	cbz	r6, 970a <nrf_gpio_reconfigure+0x82>
    9706:	7836      	ldrb	r6, [r6, #0]
    9708:	0436      	lsls	r6, r6, #16
    cnf |= ((uint32_t)(p_dir   ? *p_dir   : 0) << GPIO_PIN_CNF_DIR_Pos)   |
    970a:	432c      	orrs	r4, r5
    970c:	4334      	orrs	r4, r6
    reg->PIN_CNF[pin_number] = cnf;
    970e:	f8c0 4700 	str.w	r4, [r0, #1792]	; 0x700
}
    9712:	b003      	add	sp, #12
    9714:	bdf0      	pop	{r4, r5, r6, r7, pc}

00009716 <nrf_gpio_cfg_sense_set>:
{
    9716:	b51f      	push	{r0, r1, r2, r3, r4, lr}
    nrf_gpio_reconfigure(pin_number, NULL, NULL, NULL, NULL, &sense_config);
    9718:	f10d 030f 	add.w	r3, sp, #15
    971c:	9301      	str	r3, [sp, #4]
    971e:	2300      	movs	r3, #0
{
    9720:	f88d 100f 	strb.w	r1, [sp, #15]
    nrf_gpio_reconfigure(pin_number, NULL, NULL, NULL, NULL, &sense_config);
    9724:	9300      	str	r3, [sp, #0]
    9726:	461a      	mov	r2, r3
    9728:	4619      	mov	r1, r3
    972a:	f7ff ffad 	bl	9688 <nrf_gpio_reconfigure>
}
    972e:	b005      	add	sp, #20
    9730:	f85d fb04 	ldr.w	pc, [sp], #4

00009734 <nrfx_nvmc_flash_size_get>:
    9734:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
    9738:	691a      	ldr	r2, [r3, #16]
    return p_reg->CODESIZE;
    973a:	6958      	ldr	r0, [r3, #20]
}

uint32_t nrfx_nvmc_flash_size_get(void)
{
    return flash_total_size_get();
}
    973c:	4350      	muls	r0, r2
    973e:	4770      	bx	lr

00009740 <nrfx_nvmc_flash_page_size_get>:
    return p_reg->CODEPAGESIZE;
    9740:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
    9744:	6918      	ldr	r0, [r3, #16]

uint32_t nrfx_nvmc_flash_page_size_get(void)
{
    return flash_page_size_get();
}
    9746:	4770      	bx	lr

00009748 <nrfx_nvmc_flash_page_count_get>:
    return p_reg->CODESIZE;
    9748:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
    974c:	6958      	ldr	r0, [r3, #20]

uint32_t nrfx_nvmc_flash_page_count_get(void)
{
    return flash_page_count_get();
}
    974e:	4770      	bx	lr

00009750 <SEGGER_RTT_Init>:
*    Initializes the RTT Control Block.
*    Should be used in RAM targets, at start of the application.
*
*/
void SEGGER_RTT_Init (void) {
  _DoInit();
    9750:	f7fb bed4 	b.w	54fc <_DoInit>

00009754 <rtt_init>:
 */

K_MUTEX_DEFINE(rtt_term_mutex);

static int rtt_init(const struct device *unused)
{
    9754:	b508      	push	{r3, lr}
	ARG_UNUSED(unused);

	SEGGER_RTT_Init();
    9756:	f7ff fffb 	bl	9750 <SEGGER_RTT_Init>

	return 0;
}
    975a:	2000      	movs	r0, #0
    975c:	bd08      	pop	{r3, pc}

0000975e <z_device_state_init>:
}
    975e:	4770      	bx	lr

00009760 <z_device_ready>:
{
	/*
	 * if an invalid device pointer is passed as argument, this call
	 * reports the `device` as not ready for usage.
	 */
	if (dev == NULL) {
    9760:	b138      	cbz	r0, 9772 <z_device_ready+0x12>
		return false;
	}

	return dev->state->initialized && (dev->state->init_res == 0U);
    9762:	68c3      	ldr	r3, [r0, #12]
    9764:	8818      	ldrh	r0, [r3, #0]
    9766:	f3c0 0008 	ubfx	r0, r0, #0, #9
    976a:	f5a0 7380 	sub.w	r3, r0, #256	; 0x100
    976e:	4258      	negs	r0, r3
    9770:	4158      	adcs	r0, r3
}
    9772:	4770      	bx	lr

00009774 <k_mem_slab_init>:
{
    9774:	b530      	push	{r4, r5, lr}
	slab->num_used = 0U;
    9776:	2400      	movs	r4, #0
    9778:	6184      	str	r4, [r0, #24]
	CHECKIF(((slab->block_size | (uintptr_t)slab->buffer) &
    977a:	ea41 0402 	orr.w	r4, r1, r2
    977e:	f014 0403 	ands.w	r4, r4, #3
	slab->block_size = block_size;
    9782:	e9c0 3202 	strd	r3, r2, [r0, #8]
	slab->buffer = buffer;
    9786:	6101      	str	r1, [r0, #16]
	CHECKIF(((slab->block_size | (uintptr_t)slab->buffer) &
    9788:	d10c      	bne.n	97a4 <k_mem_slab_init+0x30>
	slab->free_list = NULL;
    978a:	6144      	str	r4, [r0, #20]
	for (j = 0U; j < slab->num_blocks; j++) {
    978c:	42a3      	cmp	r3, r4
    978e:	d103      	bne.n	9798 <k_mem_slab_init+0x24>
	list->tail = (sys_dnode_t *)list;
    9790:	e9c0 0000 	strd	r0, r0, [r0]
}
    9794:	2000      	movs	r0, #0
}
    9796:	bd30      	pop	{r4, r5, pc}
		*(char **)p = slab->free_list;
    9798:	6945      	ldr	r5, [r0, #20]
    979a:	600d      	str	r5, [r1, #0]
	for (j = 0U; j < slab->num_blocks; j++) {
    979c:	3401      	adds	r4, #1
		slab->free_list = p;
    979e:	6141      	str	r1, [r0, #20]
		p += slab->block_size;
    97a0:	4411      	add	r1, r2
	for (j = 0U; j < slab->num_blocks; j++) {
    97a2:	e7f3      	b.n	978c <k_mem_slab_init+0x18>
		return -EINVAL;
    97a4:	f06f 0015 	mvn.w	r0, #21
	return rc;
    97a8:	e7f5      	b.n	9796 <k_mem_slab_init+0x22>

000097aa <k_mem_slab_free>:

void k_mem_slab_free(struct k_mem_slab *slab, void **mem)
{
    97aa:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    97ac:	4604      	mov	r4, r0
    97ae:	460d      	mov	r5, r1
	__asm__ volatile(
    97b0:	f04f 0320 	mov.w	r3, #32
    97b4:	f3ef 8611 	mrs	r6, BASEPRI
    97b8:	f383 8812 	msr	BASEPRI_MAX, r3
    97bc:	f3bf 8f6f 	isb	sy
	k_spinlock_key_t key = k_spin_lock(&slab->lock);

	SYS_PORT_TRACING_OBJ_FUNC_ENTER(k_mem_slab, free, slab);
	if (slab->free_list == NULL && IS_ENABLED(CONFIG_MULTITHREADING)) {
    97c0:	6947      	ldr	r7, [r0, #20]
    97c2:	b977      	cbnz	r7, 97e2 <k_mem_slab_free+0x38>
		struct k_thread *pending_thread = z_unpend_first_thread(&slab->wait_q);
    97c4:	f000 f8fa 	bl	99bc <z_unpend_first_thread>

		if (pending_thread != NULL) {
    97c8:	b158      	cbz	r0, 97e2 <k_mem_slab_free+0x38>
			SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_mem_slab, free, slab);

			z_thread_return_value_set_with_data(pending_thread, 0, *mem);
    97ca:	682a      	ldr	r2, [r5, #0]
z_thread_return_value_set_with_data(struct k_thread *thread,
				   unsigned int value,
				   void *data)
{
	arch_thread_return_value_set(thread, value);
	thread->base.swap_data = data;
    97cc:	6142      	str	r2, [r0, #20]
    97ce:	6787      	str	r7, [r0, #120]	; 0x78
			z_ready_thread(pending_thread);
    97d0:	f000 f880 	bl	98d4 <z_ready_thread>
			z_reschedule(&slab->lock, key);
    97d4:	4631      	mov	r1, r6
    97d6:	f104 0008 	add.w	r0, r4, #8
	slab->num_used--;

	SYS_PORT_TRACING_OBJ_FUNC_EXIT(k_mem_slab, free, slab);

	k_spin_unlock(&slab->lock, key);
}
    97da:	e8bd 40f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, lr}
			z_reschedule(&slab->lock, key);
    97de:	f7fc bae3 	b.w	5da8 <z_reschedule>
	**(char ***) mem = slab->free_list;
    97e2:	682b      	ldr	r3, [r5, #0]
    97e4:	6962      	ldr	r2, [r4, #20]
    97e6:	601a      	str	r2, [r3, #0]
	slab->free_list = *(char **) mem;
    97e8:	682b      	ldr	r3, [r5, #0]
    97ea:	6163      	str	r3, [r4, #20]
	slab->num_used--;
    97ec:	69a3      	ldr	r3, [r4, #24]
    97ee:	3b01      	subs	r3, #1
    97f0:	61a3      	str	r3, [r4, #24]
	__asm__ volatile(
    97f2:	f386 8811 	msr	BASEPRI, r6
    97f6:	f3bf 8f6f 	isb	sy
}
    97fa:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

000097fc <k_is_in_isr>:
    97fc:	f3ef 8005 	mrs	r0, IPSR
}
    9800:	3800      	subs	r0, #0
    9802:	bf18      	it	ne
    9804:	2001      	movne	r0, #1
    9806:	4770      	bx	lr

00009808 <z_impl_k_thread_name_set>:
}
    9808:	f06f 0057 	mvn.w	r0, #87	; 0x57
    980c:	4770      	bx	lr

0000980e <k_thread_name_get>:
}
    980e:	2000      	movs	r0, #0
    9810:	4770      	bx	lr

00009812 <idle>:
#endif	/* CONFIG_PM */
	sys_clock_idle_exit();
}

void idle(void *unused1, void *unused2, void *unused3)
{
    9812:	b508      	push	{r3, lr}
	__asm__ volatile(
    9814:	f04f 0220 	mov.w	r2, #32
    9818:	f3ef 8311 	mrs	r3, BASEPRI
    981c:	f382 8812 	msr	BASEPRI_MAX, r2
    9820:	f3bf 8f6f 	isb	sy
	arch_cpu_idle();
    9824:	f7f9 f880 	bl	2928 <arch_cpu_idle>
    9828:	e7f4      	b.n	9814 <idle+0x2>

0000982a <z_impl_k_mutex_init>:
	mutex->owner = NULL;
    982a:	2300      	movs	r3, #0
	mutex->lock_count = 0U;
    982c:	e9c0 3302 	strd	r3, r3, [r0, #8]
    9830:	e9c0 0000 	strd	r0, r0, [r0]
}
    9834:	4618      	mov	r0, r3
    9836:	4770      	bx	lr

00009838 <z_impl_k_sem_init>:
	CHECKIF(limit == 0U || limit > K_SEM_MAX_LIMIT || initial_count > limit) {
    9838:	b13a      	cbz	r2, 984a <z_impl_k_sem_init+0x12>
    983a:	428a      	cmp	r2, r1
    983c:	d305      	bcc.n	984a <z_impl_k_sem_init+0x12>
	sem->limit = limit;
    983e:	e9c0 1202 	strd	r1, r2, [r0, #8]
    9842:	e9c0 0000 	strd	r0, r0, [r0]
	return 0;
    9846:	2000      	movs	r0, #0
    9848:	4770      	bx	lr
		return -EINVAL;
    984a:	f06f 0015 	mvn.w	r0, #21
}
    984e:	4770      	bx	lr

00009850 <sys_dlist_remove>:
	sys_dnode_t *const next = node->next;
    9850:	e9d0 3200 	ldrd	r3, r2, [r0]
	prev->next = next;
    9854:	6013      	str	r3, [r2, #0]
	next->prev = prev;
    9856:	605a      	str	r2, [r3, #4]
	node->next = NULL;
    9858:	2300      	movs	r3, #0
	node->prev = NULL;
    985a:	e9c0 3300 	strd	r3, r3, [r0]
	sys_dnode_init(node);
}
    985e:	4770      	bx	lr

00009860 <unpend_thread_no_timeout>:
{
    9860:	b508      	push	{r3, lr}
	sys_dlist_remove(&thread->base.qnode_dlist);
    9862:	f7ff fff5 	bl	9850 <sys_dlist_remove>
	thread->base.thread_state &= ~_THREAD_PENDING;
    9866:	7b43      	ldrb	r3, [r0, #13]
    9868:	f023 0302 	bic.w	r3, r3, #2
    986c:	7343      	strb	r3, [r0, #13]
	thread->base.pended_on = NULL;
    986e:	2300      	movs	r3, #0
    9870:	6083      	str	r3, [r0, #8]
}
    9872:	bd08      	pop	{r3, pc}

00009874 <z_unpend_thread_no_timeout>:
{
    9874:	b508      	push	{r3, lr}
    9876:	f04f 0320 	mov.w	r3, #32
    987a:	f3ef 8111 	mrs	r1, BASEPRI
    987e:	f383 8812 	msr	BASEPRI_MAX, r3
    9882:	f3bf 8f6f 	isb	sy
		unpend_thread_no_timeout(thread);
    9886:	f7ff ffeb 	bl	9860 <unpend_thread_no_timeout>
	__asm__ volatile(
    988a:	f381 8811 	msr	BASEPRI, r1
    988e:	f3bf 8f6f 	isb	sy
}
    9892:	bd08      	pop	{r3, pc}

00009894 <z_reschedule_irqlock>:
	return arch_irq_unlocked(key) && !arch_is_in_isr();
    9894:	4603      	mov	r3, r0
    9896:	b920      	cbnz	r0, 98a2 <z_reschedule_irqlock+0xe>
    9898:	f3ef 8205 	mrs	r2, IPSR
	if (resched(key)) {
    989c:	b90a      	cbnz	r2, 98a2 <z_reschedule_irqlock+0xe>
	ret = arch_swap(key);
    989e:	f7f9 b937 	b.w	2b10 <arch_swap>
    98a2:	f383 8811 	msr	BASEPRI, r3
    98a6:	f3bf 8f6f 	isb	sy
}
    98aa:	4770      	bx	lr

000098ac <z_reschedule_unlocked>:
	__asm__ volatile(
    98ac:	f04f 0320 	mov.w	r3, #32
    98b0:	f3ef 8011 	mrs	r0, BASEPRI
    98b4:	f383 8812 	msr	BASEPRI_MAX, r3
    98b8:	f3bf 8f6f 	isb	sy
	(void) z_reschedule_irqlock(arch_irq_lock());
    98bc:	f7ff bfea 	b.w	9894 <z_reschedule_irqlock>

000098c0 <z_priq_dumb_best>:
	return list->head == list;
    98c0:	6803      	ldr	r3, [r0, #0]
	return sys_dlist_is_empty(list) ? NULL : list->head;
    98c2:	4298      	cmp	r0, r3
    98c4:	d004      	beq.n	98d0 <z_priq_dumb_best+0x10>
	if (n != NULL) {
    98c6:	2b00      	cmp	r3, #0
    98c8:	bf38      	it	cc
    98ca:	2300      	movcc	r3, #0
    98cc:	4618      	mov	r0, r3
    98ce:	4770      	bx	lr
	struct k_thread *thread = NULL;
    98d0:	2000      	movs	r0, #0
}
    98d2:	4770      	bx	lr

000098d4 <z_ready_thread>:
{
    98d4:	b510      	push	{r4, lr}
    98d6:	f04f 0320 	mov.w	r3, #32
    98da:	f3ef 8411 	mrs	r4, BASEPRI
    98de:	f383 8812 	msr	BASEPRI_MAX, r3
    98e2:	f3bf 8f6f 	isb	sy
			ready_thread(thread);
    98e6:	f7fc fb25 	bl	5f34 <ready_thread>
	__asm__ volatile(
    98ea:	f384 8811 	msr	BASEPRI, r4
    98ee:	f3bf 8f6f 	isb	sy
}
    98f2:	bd10      	pop	{r4, pc}

000098f4 <z_thread_timeout>:
{
    98f4:	b510      	push	{r4, lr}
    98f6:	4601      	mov	r1, r0
	__asm__ volatile(
    98f8:	f04f 0320 	mov.w	r3, #32
    98fc:	f3ef 8411 	mrs	r4, BASEPRI
    9900:	f383 8812 	msr	BASEPRI_MAX, r3
    9904:	f3bf 8f6f 	isb	sy
		if (!killed) {
    9908:	f810 3c0b 	ldrb.w	r3, [r0, #-11]
    990c:	f013 0f28 	tst.w	r3, #40	; 0x28
    9910:	d10d      	bne.n	992e <z_thread_timeout+0x3a>
			if (thread->base.pended_on != NULL) {
    9912:	f851 3c10 	ldr.w	r3, [r1, #-16]
	struct k_thread *thread = CONTAINER_OF(timeout,
    9916:	3818      	subs	r0, #24
			if (thread->base.pended_on != NULL) {
    9918:	b10b      	cbz	r3, 991e <z_thread_timeout+0x2a>
				unpend_thread_no_timeout(thread);
    991a:	f7ff ffa1 	bl	9860 <unpend_thread_no_timeout>
	thread->base.thread_state &= ~_THREAD_SUSPENDED;
    991e:	f811 3c0b 	ldrb.w	r3, [r1, #-11]
    9922:	f023 0314 	bic.w	r3, r3, #20
    9926:	f801 3c0b 	strb.w	r3, [r1, #-11]
			ready_thread(thread);
    992a:	f7fc fb03 	bl	5f34 <ready_thread>
	__asm__ volatile(
    992e:	f384 8811 	msr	BASEPRI, r4
    9932:	f3bf 8f6f 	isb	sy
}
    9936:	bd10      	pop	{r4, pc}

00009938 <add_to_waitq_locked>:
{
    9938:	b538      	push	{r3, r4, r5, lr}
    993a:	4604      	mov	r4, r0
    993c:	460d      	mov	r5, r1
	unready_thread(thread);
    993e:	f7fc fb4f 	bl	5fe0 <unready_thread>
	thread->base.thread_state |= _THREAD_PENDING;
    9942:	7b63      	ldrb	r3, [r4, #13]
    9944:	f043 0302 	orr.w	r3, r3, #2
    9948:	7363      	strb	r3, [r4, #13]
	if (wait_q != NULL) {
    994a:	b1b5      	cbz	r5, 997a <add_to_waitq_locked+0x42>
	return list->head == list;
    994c:	682b      	ldr	r3, [r5, #0]
		thread->base.pended_on = wait_q;
    994e:	60a5      	str	r5, [r4, #8]
	return sys_dlist_is_empty(list) ? NULL : list->head;
    9950:	429d      	cmp	r5, r3
    9952:	bf08      	it	eq
    9954:	2300      	moveq	r3, #0
    9956:	2b00      	cmp	r3, #0
    9958:	bf38      	it	cc
    995a:	2300      	movcc	r3, #0
	SYS_DLIST_FOR_EACH_CONTAINER(pq, t, base.qnode_dlist) {
    995c:	b19b      	cbz	r3, 9986 <add_to_waitq_locked+0x4e>
	int32_t b1 = thread_1->base.prio;
    995e:	f994 100e 	ldrsb.w	r1, [r4, #14]
	int32_t b2 = thread_2->base.prio;
    9962:	f993 200e 	ldrsb.w	r2, [r3, #14]
	if (b1 != b2) {
    9966:	4291      	cmp	r1, r2
    9968:	d008      	beq.n	997c <add_to_waitq_locked+0x44>
		return b2 - b1;
    996a:	1a52      	subs	r2, r2, r1
		if (z_sched_prio_cmp(thread, t) > 0) {
    996c:	2a00      	cmp	r2, #0
    996e:	dd05      	ble.n	997c <add_to_waitq_locked+0x44>
	sys_dnode_t *const prev = successor->prev;
    9970:	685a      	ldr	r2, [r3, #4]
	node->next = successor;
    9972:	e9c4 3200 	strd	r3, r2, [r4]
	prev->next = node;
    9976:	6014      	str	r4, [r2, #0]
	successor->prev = node;
    9978:	605c      	str	r4, [r3, #4]
}
    997a:	bd38      	pop	{r3, r4, r5, pc}
	return (node == list->tail) ? NULL : node->next;
    997c:	686a      	ldr	r2, [r5, #4]
    997e:	4293      	cmp	r3, r2
    9980:	d001      	beq.n	9986 <add_to_waitq_locked+0x4e>
    9982:	681b      	ldr	r3, [r3, #0]
    9984:	e7ea      	b.n	995c <add_to_waitq_locked+0x24>
	sys_dnode_t *const tail = list->tail;
    9986:	686b      	ldr	r3, [r5, #4]
	node->prev = tail;
    9988:	e9c4 5300 	strd	r5, r3, [r4]
	tail->next = node;
    998c:	601c      	str	r4, [r3, #0]
	list->tail = node;
    998e:	606c      	str	r4, [r5, #4]
    9990:	e7f3      	b.n	997a <add_to_waitq_locked+0x42>

00009992 <z_unpend1_no_timeout>:
{
    9992:	b510      	push	{r4, lr}
	__asm__ volatile(
    9994:	f04f 0320 	mov.w	r3, #32
    9998:	f3ef 8411 	mrs	r4, BASEPRI
    999c:	f383 8812 	msr	BASEPRI_MAX, r3
    99a0:	f3bf 8f6f 	isb	sy
		thread = _priq_wait_best(&wait_q->waitq);
    99a4:	f7ff ff8c 	bl	98c0 <z_priq_dumb_best>
		if (thread != NULL) {
    99a8:	4601      	mov	r1, r0
    99aa:	b108      	cbz	r0, 99b0 <z_unpend1_no_timeout+0x1e>
			unpend_thread_no_timeout(thread);
    99ac:	f7ff ff58 	bl	9860 <unpend_thread_no_timeout>
	__asm__ volatile(
    99b0:	f384 8811 	msr	BASEPRI, r4
    99b4:	f3bf 8f6f 	isb	sy
}
    99b8:	4608      	mov	r0, r1
    99ba:	bd10      	pop	{r4, pc}

000099bc <z_unpend_first_thread>:
{
    99bc:	b538      	push	{r3, r4, r5, lr}
	__asm__ volatile(
    99be:	f04f 0320 	mov.w	r3, #32
    99c2:	f3ef 8511 	mrs	r5, BASEPRI
    99c6:	f383 8812 	msr	BASEPRI_MAX, r3
    99ca:	f3bf 8f6f 	isb	sy
		thread = _priq_wait_best(&wait_q->waitq);
    99ce:	f7ff ff77 	bl	98c0 <z_priq_dumb_best>
		if (thread != NULL) {
    99d2:	4604      	mov	r4, r0
    99d4:	b120      	cbz	r0, 99e0 <z_unpend_first_thread+0x24>
			unpend_thread_no_timeout(thread);
    99d6:	f7ff ff43 	bl	9860 <unpend_thread_no_timeout>
    99da:	3018      	adds	r0, #24
    99dc:	f000 f806 	bl	99ec <z_abort_timeout>
	__asm__ volatile(
    99e0:	f385 8811 	msr	BASEPRI, r5
    99e4:	f3bf 8f6f 	isb	sy
}
    99e8:	4620      	mov	r0, r4
    99ea:	bd38      	pop	{r3, r4, r5, pc}

000099ec <z_abort_timeout>:
{
    99ec:	b510      	push	{r4, lr}
	__asm__ volatile(
    99ee:	f04f 0220 	mov.w	r2, #32
    99f2:	f3ef 8411 	mrs	r4, BASEPRI
    99f6:	f382 8812 	msr	BASEPRI_MAX, r2
    99fa:	f3bf 8f6f 	isb	sy
		if (sys_dnode_is_linked(&to->node)) {
    99fe:	6803      	ldr	r3, [r0, #0]
    9a00:	b13b      	cbz	r3, 9a12 <z_abort_timeout+0x26>
			remove_timeout(to);
    9a02:	f7fc fd09 	bl	6418 <remove_timeout>
			ret = 0;
    9a06:	2000      	movs	r0, #0
	__asm__ volatile(
    9a08:	f384 8811 	msr	BASEPRI, r4
    9a0c:	f3bf 8f6f 	isb	sy
}
    9a10:	bd10      	pop	{r4, pc}
	int ret = -EINVAL;
    9a12:	f06f 0015 	mvn.w	r0, #21
    9a16:	e7f7      	b.n	9a08 <z_abort_timeout+0x1c>

00009a18 <z_set_timeout_expiry>:
{
    9a18:	b537      	push	{r0, r1, r2, r4, r5, lr}
    9a1a:	4604      	mov	r4, r0
    9a1c:	9101      	str	r1, [sp, #4]
	__asm__ volatile(
    9a1e:	f04f 0320 	mov.w	r3, #32
    9a22:	f3ef 8511 	mrs	r5, BASEPRI
    9a26:	f383 8812 	msr	BASEPRI_MAX, r3
    9a2a:	f3bf 8f6f 	isb	sy
		int next_to = next_timeout();
    9a2e:	f7fc fd0d 	bl	644c <next_timeout>
		if (!imminent && (sooner || IS_ENABLED(CONFIG_SMP))) {
    9a32:	2801      	cmp	r0, #1
    9a34:	dd05      	ble.n	9a42 <z_set_timeout_expiry+0x2a>
    9a36:	42a0      	cmp	r0, r4
    9a38:	9901      	ldr	r1, [sp, #4]
    9a3a:	db02      	blt.n	9a42 <z_set_timeout_expiry+0x2a>
			sys_clock_set_timeout(MIN(ticks, next_to), is_idle);
    9a3c:	4620      	mov	r0, r4
    9a3e:	f7fa fe2f 	bl	46a0 <sys_clock_set_timeout>
	__asm__ volatile(
    9a42:	f385 8811 	msr	BASEPRI, r5
    9a46:	f3bf 8f6f 	isb	sy
}
    9a4a:	b003      	add	sp, #12
    9a4c:	bd30      	pop	{r4, r5, pc}

00009a4e <sys_clock_tick_get_32>:

uint32_t sys_clock_tick_get_32(void)
{
    9a4e:	b508      	push	{r3, lr}
#ifdef CONFIG_TICKLESS_KERNEL
	return (uint32_t)sys_clock_tick_get();
    9a50:	f7fc fe1e 	bl	6690 <sys_clock_tick_get>
#else
	return (uint32_t)curr_tick;
#endif
}
    9a54:	bd08      	pop	{r3, pc}

00009a56 <z_impl_k_busy_wait>:
#endif

void z_impl_k_busy_wait(uint32_t usec_to_wait)
{
	SYS_PORT_TRACING_FUNC_ENTER(k_thread, busy_wait, usec_to_wait);
	if (usec_to_wait == 0U) {
    9a56:	b108      	cbz	r0, 9a5c <z_impl_k_busy_wait+0x6>
		if ((current_cycles - start_cycles) >= cycles_to_wait) {
			break;
		}
	}
#else
	arch_busy_wait(usec_to_wait);
    9a58:	f7f9 bd9a 	b.w	3590 <arch_busy_wait>
#endif /* CONFIG_ARCH_HAS_CUSTOM_BUSY_WAIT */
	SYS_PORT_TRACING_FUNC_EXIT(k_thread, busy_wait, usec_to_wait);
}
    9a5c:	4770      	bx	lr

00009a5e <z_impl_k_timer_stop>:
}
#include <syscalls/k_timer_start_mrsh.c>
#endif

void z_impl_k_timer_stop(struct k_timer *timer)
{
    9a5e:	b510      	push	{r4, lr}
    9a60:	4604      	mov	r4, r0
	SYS_PORT_TRACING_OBJ_FUNC(k_timer, stop, timer);

	int inactive = z_abort_timeout(&timer->timeout) != 0;
    9a62:	f7ff ffc3 	bl	99ec <z_abort_timeout>

	if (inactive) {
    9a66:	b9b0      	cbnz	r0, 9a96 <z_impl_k_timer_stop+0x38>
		return;
	}

	if (timer->stop_fn != NULL) {
    9a68:	6a63      	ldr	r3, [r4, #36]	; 0x24
    9a6a:	b10b      	cbz	r3, 9a70 <z_impl_k_timer_stop+0x12>
		timer->stop_fn(timer);
    9a6c:	4620      	mov	r0, r4
    9a6e:	4798      	blx	r3
	}

	if (IS_ENABLED(CONFIG_MULTITHREADING)) {
		struct k_thread *pending_thread = z_unpend1_no_timeout(&timer->wait_q);
    9a70:	f104 0018 	add.w	r0, r4, #24
    9a74:	f7ff ff8d 	bl	9992 <z_unpend1_no_timeout>

		if (pending_thread != NULL) {
    9a78:	b168      	cbz	r0, 9a96 <z_impl_k_timer_stop+0x38>
			z_ready_thread(pending_thread);
    9a7a:	f7ff ff2b 	bl	98d4 <z_ready_thread>
	__asm__ volatile(
    9a7e:	f04f 0320 	mov.w	r3, #32
    9a82:	f3ef 8011 	mrs	r0, BASEPRI
    9a86:	f383 8812 	msr	BASEPRI_MAX, r3
    9a8a:	f3bf 8f6f 	isb	sy
			z_reschedule_unlocked();
		}
	}
}
    9a8e:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
	(void) z_reschedule_irqlock(arch_irq_lock());
    9a92:	f7ff beff 	b.w	9894 <z_reschedule_irqlock>
    9a96:	bd10      	pop	{r4, pc}

00009a98 <_OffsetAbsSyms>:

#include <gen_offset.h>

#include "offsets_aarch32.c"

GEN_ABS_SYM_END
    9a98:	4770      	bx	lr

00009a9a <nrf_cc310_bl_ecdsa_verify_secp256r1>:
    9a9a:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    9a9e:	9f06      	ldr	r7, [sp, #24]
    9aa0:	4604      	mov	r4, r0
    9aa2:	4615      	mov	r5, r2
    9aa4:	461e      	mov	r6, r3
    9aa6:	f7fd f8b7 	bl	6c18 <nrf_cc310_bl_ecdsa_verify_init_secp256r1>
    9aaa:	b938      	cbnz	r0, 9abc <nrf_cc310_bl_ecdsa_verify_secp256r1+0x22>
    9aac:	463b      	mov	r3, r7
    9aae:	4632      	mov	r2, r6
    9ab0:	4629      	mov	r1, r5
    9ab2:	4620      	mov	r0, r4
    9ab4:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
    9ab8:	f7fd b8d4 	b.w	6c64 <nrf_cc310_bl_ecdsa_verify_hash_secp256r1>
    9abc:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

00009ac0 <PkaInitAndMutexLock>:
    9ac0:	460a      	mov	r2, r1
    9ac2:	2100      	movs	r1, #0
    9ac4:	f7fd bb56 	b.w	7174 <PkaInitPka>

00009ac8 <SaSi_PalMemCopy>:
    9ac8:	f7ff bb4f 	b.w	916a <memcpy>

00009acc <SaSi_PalMemSet>:
    9acc:	f7ff bb58 	b.w	9180 <memset>

00009ad0 <SaSi_PalMemSetZero>:
    9ad0:	460a      	mov	r2, r1
    9ad2:	2100      	movs	r1, #0
    9ad4:	f7ff bb54 	b.w	9180 <memset>

00009ad8 <CRYS_COMMON_ReverseMemcpy32>:
    9ad8:	eb01 0282 	add.w	r2, r1, r2, lsl #2
    9adc:	3804      	subs	r0, #4
    9ade:	428a      	cmp	r2, r1
    9ae0:	d101      	bne.n	9ae6 <CRYS_COMMON_ReverseMemcpy32+0xe>
    9ae2:	2000      	movs	r0, #0
    9ae4:	4770      	bx	lr
    9ae6:	f852 3d04 	ldr.w	r3, [r2, #-4]!
    9aea:	ba1b      	rev	r3, r3
    9aec:	f840 3f04 	str.w	r3, [r0, #4]!
    9af0:	e7f5      	b.n	9ade <CRYS_COMMON_ReverseMemcpy32+0x6>
	...

00009af4 <z_arm_platform_init>:
	 */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
	ldr r0, =SystemInit
	bx r0
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	b SystemInit
    9af4:	f7fa bf8e 	b.w	4a14 <SystemInit>
