
zephyr.elf:     file format elf32-littlearm


Disassembly of section rom_start:

00000000 <_vector_start>:
   0:	20005d60 	.word	0x20005d60
   4:	00002de5 	.word	0x00002de5
   8:	000065d7 	.word	0x000065d7
   c:	00002db9 	.word	0x00002db9
  10:	00002db9 	.word	0x00002db9
  14:	00002db9 	.word	0x00002db9
  18:	00002db9 	.word	0x00002db9
	...
  2c:	00002935 	.word	0x00002935
  30:	00002db9 	.word	0x00002db9
  34:	00000000 	.word	0x00000000
  38:	00002db9 	.word	0x00002db9
  3c:	00002db9 	.word	0x00002db9

00000040 <_irq_vector_table>:
  40:	000029b9 000029b9 000029b9 000029b9     .)...)...)...)..
  50:	000029b9 000029b9 000029b9 000029b9     .)...)...)...)..
  60:	000029b9 000029b9 000029b9 000029b9     .)...)...)...)..
  70:	000029b9 000029b9 000029b9 000029b9     .)...)...)...)..
  80:	000029b9 000029b9 000029b9 000029b9     .)...)...)...)..
  90:	000029b9 000029b9 000029b9 000029b9     .)...)...)...)..
  a0:	000029b9 000029b9 000029b9 000029b9     .)...)...)...)..
  b0:	000029b9 000029b9 000029b9 000029b9     .)...)...)...)..
  c0:	000029b9 000029b9 000029b9 000029b9     .)...)...)...)..
  d0:	000029b9 000029b9 000029b9              .)...)...)..

Disassembly of section text:

000000dc <__aeabi_uldivmod>:
      dc:	b953      	cbnz	r3, f4 <__aeabi_uldivmod+0x18>
      de:	b94a      	cbnz	r2, f4 <__aeabi_uldivmod+0x18>
      e0:	2900      	cmp	r1, #0
      e2:	bf08      	it	eq
      e4:	2800      	cmpeq	r0, #0
      e6:	bf1c      	itt	ne
      e8:	f04f 31ff 	movne.w	r1, #4294967295
      ec:	f04f 30ff 	movne.w	r0, #4294967295
      f0:	f000 b96c 	b.w	3cc <__aeabi_idiv0>
      f4:	f1ad 0c08 	sub.w	ip, sp, #8
      f8:	e96d ce04 	strd	ip, lr, [sp, #-16]!
      fc:	f000 f806 	bl	10c <__udivmoddi4>
     100:	f8dd e004 	ldr.w	lr, [sp, #4]
     104:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
     108:	b004      	add	sp, #16
     10a:	4770      	bx	lr

0000010c <__udivmoddi4>:
     10c:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
     110:	9e08      	ldr	r6, [sp, #32]
     112:	460d      	mov	r5, r1
     114:	4604      	mov	r4, r0
     116:	468e      	mov	lr, r1
     118:	2b00      	cmp	r3, #0
     11a:	f040 8082 	bne.w	222 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x22>
     11e:	428a      	cmp	r2, r1
     120:	4617      	mov	r7, r2
     122:	d946      	bls.n	1b2 <CONFIG_NRF52_ANOMALY_132_DELAY_US+0x68>
     124:	fab2 f282 	clz	r2, r2
     128:	b14a      	cbz	r2, 13e <__udivmoddi4+0x32>
     12a:	f1c2 0120 	rsb	r1, r2, #32
     12e:	fa05 f302 	lsl.w	r3, r5, r2
     132:	fa20 f101 	lsr.w	r1, r0, r1
     136:	4097      	lsls	r7, r2
     138:	ea41 0e03 	orr.w	lr, r1, r3
     13c:	4094      	lsls	r4, r2
     13e:	ea4f 4817 	mov.w	r8, r7, lsr #16
     142:	0c23      	lsrs	r3, r4, #16
     144:	fbbe fcf8 	udiv	ip, lr, r8
     148:	b2b9      	uxth	r1, r7
     14a:	fb08 ee1c 	mls	lr, r8, ip, lr
     14e:	ea43 430e 	orr.w	r3, r3, lr, lsl #16
     152:	fb0c f001 	mul.w	r0, ip, r1
     156:	4298      	cmp	r0, r3
     158:	d90a      	bls.n	170 <CONFIG_NRF52_ANOMALY_132_DELAY_US+0x26>
     15a:	18fb      	adds	r3, r7, r3
     15c:	f10c 35ff 	add.w	r5, ip, #4294967295
     160:	f080 8116 	bcs.w	390 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x90>
     164:	4298      	cmp	r0, r3
     166:	f240 8113 	bls.w	390 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x90>
     16a:	f1ac 0c02 	sub.w	ip, ip, #2
     16e:	443b      	add	r3, r7
     170:	1a1b      	subs	r3, r3, r0
     172:	b2a4      	uxth	r4, r4
     174:	fbb3 f0f8 	udiv	r0, r3, r8
     178:	fb08 3310 	mls	r3, r8, r0, r3
     17c:	ea44 4403 	orr.w	r4, r4, r3, lsl #16
     180:	fb00 f101 	mul.w	r1, r0, r1
     184:	42a1      	cmp	r1, r4
     186:	d909      	bls.n	19c <CONFIG_NRF52_ANOMALY_132_DELAY_US+0x52>
     188:	193c      	adds	r4, r7, r4
     18a:	f100 33ff 	add.w	r3, r0, #4294967295
     18e:	f080 8101 	bcs.w	394 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x94>
     192:	42a1      	cmp	r1, r4
     194:	f240 80fe 	bls.w	394 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x94>
     198:	3802      	subs	r0, #2
     19a:	443c      	add	r4, r7
     19c:	1a64      	subs	r4, r4, r1
     19e:	ea40 400c 	orr.w	r0, r0, ip, lsl #16
     1a2:	2100      	movs	r1, #0
     1a4:	b11e      	cbz	r6, 1ae <CONFIG_NRF52_ANOMALY_132_DELAY_US+0x64>
     1a6:	40d4      	lsrs	r4, r2
     1a8:	2300      	movs	r3, #0
     1aa:	e9c6 4300 	strd	r4, r3, [r6]
     1ae:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
     1b2:	b902      	cbnz	r2, 1b6 <CONFIG_NRF52_ANOMALY_132_DELAY_US+0x6c>
     1b4:	deff      	udf	#255	; 0xff
     1b6:	fab2 f282 	clz	r2, r2
     1ba:	2a00      	cmp	r2, #0
     1bc:	d14f      	bne.n	25e <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x5e>
     1be:	1bcb      	subs	r3, r1, r7
     1c0:	ea4f 4e17 	mov.w	lr, r7, lsr #16
     1c4:	fa1f f887 	uxth.w	r8, r7
     1c8:	2101      	movs	r1, #1
     1ca:	fbb3 fcfe 	udiv	ip, r3, lr
     1ce:	0c25      	lsrs	r5, r4, #16
     1d0:	fb0e 331c 	mls	r3, lr, ip, r3
     1d4:	ea45 4503 	orr.w	r5, r5, r3, lsl #16
     1d8:	fb08 f30c 	mul.w	r3, r8, ip
     1dc:	42ab      	cmp	r3, r5
     1de:	d907      	bls.n	1f0 <CONFIG_NRF52_ANOMALY_132_DELAY_US+0xa6>
     1e0:	197d      	adds	r5, r7, r5
     1e2:	f10c 30ff 	add.w	r0, ip, #4294967295
     1e6:	d202      	bcs.n	1ee <CONFIG_NRF52_ANOMALY_132_DELAY_US+0xa4>
     1e8:	42ab      	cmp	r3, r5
     1ea:	f200 80e7 	bhi.w	3bc <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xbc>
     1ee:	4684      	mov	ip, r0
     1f0:	1aed      	subs	r5, r5, r3
     1f2:	b2a3      	uxth	r3, r4
     1f4:	fbb5 f0fe 	udiv	r0, r5, lr
     1f8:	fb0e 5510 	mls	r5, lr, r0, r5
     1fc:	ea43 4405 	orr.w	r4, r3, r5, lsl #16
     200:	fb08 f800 	mul.w	r8, r8, r0
     204:	45a0      	cmp	r8, r4
     206:	d907      	bls.n	218 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x18>
     208:	193c      	adds	r4, r7, r4
     20a:	f100 33ff 	add.w	r3, r0, #4294967295
     20e:	d202      	bcs.n	216 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x16>
     210:	45a0      	cmp	r8, r4
     212:	f200 80d7 	bhi.w	3c4 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xc4>
     216:	4618      	mov	r0, r3
     218:	eba4 0408 	sub.w	r4, r4, r8
     21c:	ea40 400c 	orr.w	r0, r0, ip, lsl #16
     220:	e7c0      	b.n	1a4 <CONFIG_NRF52_ANOMALY_132_DELAY_US+0x5a>
     222:	428b      	cmp	r3, r1
     224:	d908      	bls.n	238 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x38>
     226:	2e00      	cmp	r6, #0
     228:	f000 80af 	beq.w	38a <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x8a>
     22c:	2100      	movs	r1, #0
     22e:	e9c6 0500 	strd	r0, r5, [r6]
     232:	4608      	mov	r0, r1
     234:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
     238:	fab3 f183 	clz	r1, r3
     23c:	2900      	cmp	r1, #0
     23e:	d14b      	bne.n	2d8 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0xd8>
     240:	42ab      	cmp	r3, r5
     242:	d302      	bcc.n	24a <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x4a>
     244:	4282      	cmp	r2, r0
     246:	f200 80b7 	bhi.w	3b8 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xb8>
     24a:	1a84      	subs	r4, r0, r2
     24c:	eb65 0303 	sbc.w	r3, r5, r3
     250:	2001      	movs	r0, #1
     252:	469e      	mov	lr, r3
     254:	2e00      	cmp	r6, #0
     256:	d0aa      	beq.n	1ae <CONFIG_NRF52_ANOMALY_132_DELAY_US+0x64>
     258:	e9c6 4e00 	strd	r4, lr, [r6]
     25c:	e7a7      	b.n	1ae <CONFIG_NRF52_ANOMALY_132_DELAY_US+0x64>
     25e:	f1c2 0c20 	rsb	ip, r2, #32
     262:	fa01 f302 	lsl.w	r3, r1, r2
     266:	4097      	lsls	r7, r2
     268:	fa20 f00c 	lsr.w	r0, r0, ip
     26c:	ea4f 4e17 	mov.w	lr, r7, lsr #16
     270:	fa21 fc0c 	lsr.w	ip, r1, ip
     274:	4318      	orrs	r0, r3
     276:	fbbc f1fe 	udiv	r1, ip, lr
     27a:	0c05      	lsrs	r5, r0, #16
     27c:	fb0e cc11 	mls	ip, lr, r1, ip
     280:	fa1f f887 	uxth.w	r8, r7
     284:	ea45 450c 	orr.w	r5, r5, ip, lsl #16
     288:	fb01 f308 	mul.w	r3, r1, r8
     28c:	42ab      	cmp	r3, r5
     28e:	fa04 f402 	lsl.w	r4, r4, r2
     292:	d909      	bls.n	2a8 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0xa8>
     294:	197d      	adds	r5, r7, r5
     296:	f101 3cff 	add.w	ip, r1, #4294967295
     29a:	f080 808b 	bcs.w	3b4 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xb4>
     29e:	42ab      	cmp	r3, r5
     2a0:	f240 8088 	bls.w	3b4 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xb4>
     2a4:	3902      	subs	r1, #2
     2a6:	443d      	add	r5, r7
     2a8:	1aeb      	subs	r3, r5, r3
     2aa:	b285      	uxth	r5, r0
     2ac:	fbb3 f0fe 	udiv	r0, r3, lr
     2b0:	fb0e 3310 	mls	r3, lr, r0, r3
     2b4:	ea45 4503 	orr.w	r5, r5, r3, lsl #16
     2b8:	fb00 f308 	mul.w	r3, r0, r8
     2bc:	42ab      	cmp	r3, r5
     2be:	d907      	bls.n	2d0 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0xd0>
     2c0:	197d      	adds	r5, r7, r5
     2c2:	f100 3cff 	add.w	ip, r0, #4294967295
     2c6:	d271      	bcs.n	3ac <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xac>
     2c8:	42ab      	cmp	r3, r5
     2ca:	d96f      	bls.n	3ac <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xac>
     2cc:	3802      	subs	r0, #2
     2ce:	443d      	add	r5, r7
     2d0:	1aeb      	subs	r3, r5, r3
     2d2:	ea40 4101 	orr.w	r1, r0, r1, lsl #16
     2d6:	e778      	b.n	1ca <CONFIG_NRF52_ANOMALY_132_DELAY_US+0x80>
     2d8:	f1c1 0c20 	rsb	ip, r1, #32
     2dc:	408b      	lsls	r3, r1
     2de:	fa22 f70c 	lsr.w	r7, r2, ip
     2e2:	431f      	orrs	r7, r3
     2e4:	fa20 f40c 	lsr.w	r4, r0, ip
     2e8:	fa05 f301 	lsl.w	r3, r5, r1
     2ec:	ea4f 4e17 	mov.w	lr, r7, lsr #16
     2f0:	fa25 f50c 	lsr.w	r5, r5, ip
     2f4:	431c      	orrs	r4, r3
     2f6:	0c23      	lsrs	r3, r4, #16
     2f8:	fbb5 f9fe 	udiv	r9, r5, lr
     2fc:	fa1f f887 	uxth.w	r8, r7
     300:	fb0e 5519 	mls	r5, lr, r9, r5
     304:	ea43 4505 	orr.w	r5, r3, r5, lsl #16
     308:	fb09 fa08 	mul.w	sl, r9, r8
     30c:	45aa      	cmp	sl, r5
     30e:	fa02 f201 	lsl.w	r2, r2, r1
     312:	fa00 f301 	lsl.w	r3, r0, r1
     316:	d908      	bls.n	32a <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x2a>
     318:	197d      	adds	r5, r7, r5
     31a:	f109 30ff 	add.w	r0, r9, #4294967295
     31e:	d247      	bcs.n	3b0 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xb0>
     320:	45aa      	cmp	sl, r5
     322:	d945      	bls.n	3b0 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xb0>
     324:	f1a9 0902 	sub.w	r9, r9, #2
     328:	443d      	add	r5, r7
     32a:	eba5 050a 	sub.w	r5, r5, sl
     32e:	b2a4      	uxth	r4, r4
     330:	fbb5 f0fe 	udiv	r0, r5, lr
     334:	fb0e 5510 	mls	r5, lr, r0, r5
     338:	ea44 4405 	orr.w	r4, r4, r5, lsl #16
     33c:	fb00 f808 	mul.w	r8, r0, r8
     340:	45a0      	cmp	r8, r4
     342:	d907      	bls.n	354 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x54>
     344:	193c      	adds	r4, r7, r4
     346:	f100 35ff 	add.w	r5, r0, #4294967295
     34a:	d22d      	bcs.n	3a8 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xa8>
     34c:	45a0      	cmp	r8, r4
     34e:	d92b      	bls.n	3a8 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0xa8>
     350:	3802      	subs	r0, #2
     352:	443c      	add	r4, r7
     354:	ea40 4009 	orr.w	r0, r0, r9, lsl #16
     358:	eba4 0408 	sub.w	r4, r4, r8
     35c:	fba0 8902 	umull	r8, r9, r0, r2
     360:	454c      	cmp	r4, r9
     362:	46c6      	mov	lr, r8
     364:	464d      	mov	r5, r9
     366:	d319      	bcc.n	39c <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x9c>
     368:	d016      	beq.n	398 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x98>
     36a:	b15e      	cbz	r6, 384 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x84>
     36c:	ebb3 020e 	subs.w	r2, r3, lr
     370:	eb64 0405 	sbc.w	r4, r4, r5
     374:	fa04 fc0c 	lsl.w	ip, r4, ip
     378:	40ca      	lsrs	r2, r1
     37a:	ea4c 0202 	orr.w	r2, ip, r2
     37e:	40cc      	lsrs	r4, r1
     380:	e9c6 2400 	strd	r2, r4, [r6]
     384:	2100      	movs	r1, #0
     386:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
     38a:	4631      	mov	r1, r6
     38c:	4630      	mov	r0, r6
     38e:	e70e      	b.n	1ae <CONFIG_NRF52_ANOMALY_132_DELAY_US+0x64>
     390:	46ac      	mov	ip, r5
     392:	e6ed      	b.n	170 <CONFIG_NRF52_ANOMALY_132_DELAY_US+0x26>
     394:	4618      	mov	r0, r3
     396:	e701      	b.n	19c <CONFIG_NRF52_ANOMALY_132_DELAY_US+0x52>
     398:	4543      	cmp	r3, r8
     39a:	d2e6      	bcs.n	36a <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x6a>
     39c:	ebb8 0e02 	subs.w	lr, r8, r2
     3a0:	eb69 0507 	sbc.w	r5, r9, r7
     3a4:	3801      	subs	r0, #1
     3a6:	e7e0      	b.n	36a <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x6a>
     3a8:	4628      	mov	r0, r5
     3aa:	e7d3      	b.n	354 <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x54>
     3ac:	4660      	mov	r0, ip
     3ae:	e78f      	b.n	2d0 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0xd0>
     3b0:	4681      	mov	r9, r0
     3b2:	e7ba      	b.n	32a <CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE+0x2a>
     3b4:	4661      	mov	r1, ip
     3b6:	e777      	b.n	2a8 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0xa8>
     3b8:	4608      	mov	r0, r1
     3ba:	e74b      	b.n	254 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x54>
     3bc:	f1ac 0c02 	sub.w	ip, ip, #2
     3c0:	443d      	add	r5, r7
     3c2:	e715      	b.n	1f0 <CONFIG_NRF52_ANOMALY_132_DELAY_US+0xa6>
     3c4:	3802      	subs	r0, #2
     3c6:	443c      	add	r4, r7
     3c8:	e726      	b.n	218 <CONFIG_BOOT_MAX_LINE_INPUT_LEN+0x18>
     3ca:	bf00      	nop

000003cc <__aeabi_idiv0>:
     3cc:	4770      	bx	lr
     3ce:	bf00      	nop

000003d0 <main>:
    return detect_value == expected;
}
#endif

void main(void)
{
     3d0:	b570      	push	{r4, r5, r6, lr}
}

NRF_STATIC_INLINE void nrf_wdt_reload_request_set(NRF_WDT_Type *        p_reg,
                                                  nrf_wdt_rr_register_t rr_register)
{
    p_reg->RR[rr_register] = NRF_WDT_RR_VALUE;
     3d2:	4b4d      	ldr	r3, [pc, #308]	; (508 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x20>)
     3d4:	4a4d      	ldr	r2, [pc, #308]	; (50c <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x24>)
     3d6:	f8c3 2600 	str.w	r2, [r3, #1536]	; 0x600
    fih_int fih_rc = FIH_FAILURE;

    MCUBOOT_WATCHDOG_FEED();

#if !defined(MCUBOOT_DIRECT_XIP)
    BOOT_LOG_INF("Starting bootloader");
     3da:	484d      	ldr	r0, [pc, #308]	; (510 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x28>)
     3dc:	f8c3 2604 	str.w	r2, [r3, #1540]	; 0x604
{
     3e0:	b086      	sub	sp, #24
     3e2:	f8c3 2608 	str.w	r2, [r3, #1544]	; 0x608
    BOOT_LOG_INF("Starting bootloader");
     3e6:	2149      	movs	r1, #73	; 0x49
     3e8:	f8c3 260c 	str.w	r2, [r3, #1548]	; 0x60c
     3ec:	f8c3 2610 	str.w	r2, [r3, #1552]	; 0x610
     3f0:	f8c3 2614 	str.w	r2, [r3, #1556]	; 0x614
     3f4:	f8c3 2618 	str.w	r2, [r3, #1560]	; 0x618
     3f8:	f8c3 261c 	str.w	r2, [r3, #1564]	; 0x61c
     3fc:	f005 fdaa 	bl	5f54 <z_log_minimal_printk>
#ifdef CONFIG_MCUBOOT_INDICATION_LED
    /* LED init */
    led_init();
#endif

    os_heap_init();
     400:	f000 f8d2 	bl	5a8 <os_heap_init>
    ZEPHYR_BOOT_LOG_START();

    (void)rc;

#if (!defined(CONFIG_XTENSA) && defined(DT_CHOSEN_ZEPHYR_FLASH_CONTROLLER_LABEL))
    if (!flash_device_get_binding(DT_CHOSEN_ZEPHYR_FLASH_CONTROLLER_LABEL)) {
     404:	4843      	ldr	r0, [pc, #268]	; (514 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x2c>)
     406:	f000 f8a1 	bl	54c <flash_device_get_binding>
     40a:	b928      	cbnz	r0, 418 <CONFIG_MPSL_SIGNAL_STACK_SIZE+0x18>
        BOOT_LOG_ERR("Flash device %s not found",
     40c:	4a41      	ldr	r2, [pc, #260]	; (514 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x2c>)
     40e:	4842      	ldr	r0, [pc, #264]	; (518 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x30>)
     410:	2145      	movs	r1, #69	; 0x45
     412:	f005 fd9f 	bl	5f54 <z_log_minimal_printk>
		     DT_CHOSEN_ZEPHYR_FLASH_CONTROLLER_LABEL);
        while (1)
     416:	e7fe      	b.n	416 <CONFIG_MPSL_SIGNAL_STACK_SIZE+0x16>
        BOOT_LOG_ERR("Flash device %s not found", JEDEC_SPI_NOR_0_LABEL);
        while (1)
            ;
    }
#endif
	BOOT_LOG_INF("Check detect pin");
     418:	4840      	ldr	r0, [pc, #256]	; (51c <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x34>)
     41a:	2149      	movs	r1, #73	; 0x49
     41c:	f005 fd9a 	bl	5f54 <z_log_minimal_printk>
		/* coverity[OVERRUN] */
		return (const struct device *) arch_syscall_invoke1(*(uintptr_t *)&name, K_SYSCALL_DEVICE_GET_BINDING);
	}
#endif
	compiler_barrier();
	return z_impl_device_get_binding(name);
     420:	483f      	ldr	r0, [pc, #252]	; (520 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x38>)
     422:	f005 f879 	bl	5518 <z_impl_device_get_binding>
     426:	4604      	mov	r4, r0
{
	const struct gpio_driver_api *api =
		(const struct gpio_driver_api *)port->api;
	const struct gpio_driver_config *const cfg =
		(const struct gpio_driver_config *)port->config;
	struct gpio_driver_data *data =
     428:	6902      	ldr	r2, [r0, #16]
	const struct gpio_driver_api *api =
     42a:	6881      	ldr	r1, [r0, #8]
		 "Unsupported pin");

	if ((flags & GPIO_ACTIVE_LOW) != 0) {
		data->invert |= (gpio_port_pins_t)BIT(pin);
	} else {
		data->invert &= ~(gpio_port_pins_t)BIT(pin);
     42c:	6813      	ldr	r3, [r2, #0]
     42e:	f023 0320 	bic.w	r3, r3, #32
     432:	6013      	str	r3, [r2, #0]
	}

	return api->pin_configure(port, pin, flags);
     434:	680b      	ldr	r3, [r1, #0]
     436:	f44f 7288 	mov.w	r2, #272	; 0x110
     43a:	2105      	movs	r1, #5
     43c:	4798      	blx	r3
					   gpio_port_value_t *value)
{
	const struct gpio_driver_api *api =
		(const struct gpio_driver_api *)port->api;

	return api->port_get_raw(port, value);
     43e:	68a3      	ldr	r3, [r4, #8]
     440:	4620      	mov	r0, r4
     442:	685b      	ldr	r3, [r3, #4]
     444:	a903      	add	r1, sp, #12
     446:	4798      	blx	r3
	(void)cfg;
	__ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
		 "Unsupported pin");

	ret = gpio_port_get_raw(port, &value);
	if (ret == 0) {
     448:	4604      	mov	r4, r0
     44a:	b910      	cbnz	r0, 452 <CONFIG_MPSL_SIGNAL_STACK_SIZE+0x52>
		ret = (value & (gpio_port_pins_t)BIT(pin)) != 0 ? 1 : 0;
     44c:	9c03      	ldr	r4, [sp, #12]
     44e:	f3c4 1440 	ubfx	r4, r4, #5, #1
	BOOT_LOG_INF("detect_pin %d %d %d", pin, expected, detect_value);
     452:	4834      	ldr	r0, [pc, #208]	; (524 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x3c>)
     454:	9400      	str	r4, [sp, #0]
     456:	2300      	movs	r3, #0
     458:	2205      	movs	r2, #5
     45a:	2149      	movs	r1, #73	; 0x49
     45c:	f005 fd7a 	bl	5f54 <z_log_minimal_printk>
#ifdef CONFIG_MCUBOOT_SERIAL
    if (detect_pin(CONFIG_BOOT_SERIAL_DETECT_PORT,
     460:	b97c      	cbnz	r4, 482 <CONFIG_MPSL_SIGNAL_STACK_SIZE+0x82>
#endif // defined(DPPI_PRESENT)

#if NRF_POWER_HAS_RESETREAS
NRF_STATIC_INLINE uint32_t nrf_power_resetreas_get(NRF_POWER_Type const * p_reg)
{
    return p_reg->RESETREAS;
     462:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
     466:	f8d3 3400 	ldr.w	r3, [r3, #1024]	; 0x400
    return !(rr == 0 || (rr & NRFX_RESET_REASON_RESETPIN_MASK));
     46a:	b10b      	cbz	r3, 470 <CONFIG_MPSL_SIGNAL_STACK_SIZE+0x70>
     46c:	07db      	lsls	r3, r3, #31
     46e:	d508      	bpl.n	482 <CONFIG_MPSL_SIGNAL_STACK_SIZE+0x82>
            !boot_skip_serial_recovery()) {
#ifdef CONFIG_MCUBOOT_INDICATION_LED
        gpio_pin_set(led, LED0_GPIO_PIN, 1);
#endif

        BOOT_LOG_INF("Enter the serial recovery mode");
     470:	482d      	ldr	r0, [pc, #180]	; (528 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x40>)
     472:	2149      	movs	r1, #73	; 0x49
     474:	f005 fd6e 	bl	5f54 <z_log_minimal_printk>
        rc = boot_console_init();
     478:	f001 fd34 	bl	1ee4 <boot_console_init>
        __ASSERT(rc == 0, "Error initializing boot console.\n");
        boot_serial_start(&boot_funcs);
     47c:	482b      	ldr	r0, [pc, #172]	; (52c <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x44>)
     47e:	f002 f8b3 	bl	25e8 <boot_serial_start>
        __ASSERT(0, "Bootloader serial process was terminated unexpectedly.\n");
    }
#endif
	BOOT_LOG_INF("pin pass");
     482:	482b      	ldr	r0, [pc, #172]	; (530 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x48>)
     484:	2149      	movs	r1, #73	; 0x49
     486:	f005 fd65 	bl	5f54 <z_log_minimal_printk>

0000048a <FIH_LABEL_FIH_CALL_START_589>:
        wait_for_usb_dfu(K_MSEC(CONFIG_BOOT_USB_DFU_WAIT_DELAY_MS));
        BOOT_LOG_INF("USB DFU wait time elapsed");
    }
#endif

    FIH_CALL(boot_go, fih_rc, &rsp);
     48a:	a803      	add	r0, sp, #12
     48c:	f000 fcea 	bl	e64 <boot_go>

00000490 <FIH_LABEL_FIH_CALL_END_602>:
    if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
     490:	4b28      	ldr	r3, [pc, #160]	; (534 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x4c>)
     492:	681b      	ldr	r3, [r3, #0]
     494:	4283      	cmp	r3, r0
     496:	d004      	beq.n	4a2 <FIH_LABEL_FIH_CALL_END_602+0x12>
        BOOT_LOG_ERR("Unable to find bootable image");
     498:	4827      	ldr	r0, [pc, #156]	; (538 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x50>)
     49a:	2145      	movs	r1, #69	; 0x45
     49c:	f005 fd5a 	bl	5f54 <z_log_minimal_printk>
        FIH_PANIC;
     4a0:	e7fe      	b.n	4a0 <FIH_LABEL_FIH_CALL_END_602+0x10>
    }

    BOOT_LOG_INF("Bootloader chainload address offset: 0x%x",
     4a2:	9a05      	ldr	r2, [sp, #20]
     4a4:	4825      	ldr	r0, [pc, #148]	; (53c <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x54>)
     4a6:	2149      	movs	r1, #73	; 0x49
     4a8:	f005 fd54 	bl	5f54 <z_log_minimal_printk>
                 rsp.br_image_off);

#if defined(MCUBOOT_DIRECT_XIP)
    BOOT_LOG_INF("Jumping to the image slot");
#else
    BOOT_LOG_INF("Jumping to the first image slot");
     4ac:	4824      	ldr	r0, [pc, #144]	; (540 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x58>)
     4ae:	2149      	movs	r1, #73	; 0x49
     4b0:	f005 fd50 	bl	5f54 <z_log_minimal_printk>
/* There is only one instance of MCUBoot */
#define PROTECT_SIZE (PM_MCUBOOT_PRIMARY_ADDRESS - PM_MCUBOOT_ADDRESS)
#define PROTECT_ADDR PM_MCUBOOT_ADDRESS
#endif

    rc = fprotect_area(PROTECT_ADDR, PROTECT_SIZE);
     4b4:	f44f 4140 	mov.w	r1, #49152	; 0xc000
     4b8:	2000      	movs	r0, #0
     4ba:	f006 fbc0 	bl	6c3e <fprotect_area>

    if (rc != 0) {
     4be:	b120      	cbz	r0, 4ca <FIH_LABEL_FIH_CALL_END_602+0x3a>
        BOOT_LOG_ERR("Protect mcuboot flash failed, cancel startup.");
     4c0:	4820      	ldr	r0, [pc, #128]	; (544 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x5c>)
     4c2:	2145      	movs	r1, #69	; 0x45
     4c4:	f005 fd46 	bl	5f54 <z_log_minimal_printk>
        while (1)
     4c8:	e7fe      	b.n	4c8 <FIH_LABEL_FIH_CALL_END_602+0x38>
    rc = flash_device_base(rsp->br_flash_dev_id, &flash_base);
     4ca:	a902      	add	r1, sp, #8
     4cc:	f89d 0010 	ldrb.w	r0, [sp, #16]
     4d0:	f000 f848 	bl	564 <flash_device_base>
    vt = (struct arm_vector_table *)(flash_base +
     4d4:	9b02      	ldr	r3, [sp, #8]
     4d6:	9c05      	ldr	r4, [sp, #20]
     4d8:	441c      	add	r4, r3
                                     rsp->br_hdr->ih_hdr_size);
     4da:	9b03      	ldr	r3, [sp, #12]
     4dc:	891d      	ldrh	r5, [r3, #8]
    nrf_cleanup_peripheral();
     4de:	f000 ff65 	bl	13ac <nrf_cleanup_peripheral>
                                     rsp->br_image_off +
     4e2:	1966      	adds	r6, r4, r5
		:
		: "memory");
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	unsigned int tmp;

	__asm__ volatile(
     4e4:	f04f 0220 	mov.w	r2, #32
     4e8:	f3ef 8311 	mrs	r3, BASEPRI
     4ec:	f382 8812 	msr	BASEPRI_MAX, r2
     4f0:	f3bf 8f6f 	isb	sy
  \details Assigns the given value to the Main Stack Pointer (MSP).
  \param [in]    topOfMainStack  Main Stack Pointer value to set
 */
__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
{
  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
     4f4:	5963      	ldr	r3, [r4, r5]
     4f6:	f383 8808 	msr	MSP, r3
    ((void (*)(void))vt->reset)();
     4fa:	6873      	ldr	r3, [r6, #4]
     4fc:	4798      	blx	r3

    ZEPHYR_BOOT_LOG_STOP();

    do_boot(&rsp);

    BOOT_LOG_ERR("Never should get here");
     4fe:	4812      	ldr	r0, [pc, #72]	; (548 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x60>)
     500:	2145      	movs	r1, #69	; 0x45
     502:	f005 fd27 	bl	5f54 <z_log_minimal_printk>
    while (1)
     506:	e7fe      	b.n	506 <CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE+0x1e>
     508:	40010000 	.word	0x40010000
     50c:	6e524635 	.word	0x6e524635
     510:	00008e00 	.word	0x00008e00
     514:	00008e19 	.word	0x00008e19
     518:	00008e2c 	.word	0x00008e2c
     51c:	00008e4b 	.word	0x00008e4b
     520:	00008e61 	.word	0x00008e61
     524:	00008e68 	.word	0x00008e68
     528:	00008e81 	.word	0x00008e81
     52c:	00008b08 	.word	0x00008b08
     530:	00008ea5 	.word	0x00008ea5
     534:	20000194 	.word	0x20000194
     538:	00008eb3 	.word	0x00008eb3
     53c:	00008ed6 	.word	0x00008ed6
     540:	00008f05 	.word	0x00008f05
     544:	00008f2a 	.word	0x00008f2a
     548:	00008f5d 	.word	0x00008f5d

0000054c <flash_device_get_binding>:
#endif

static const struct device *flash_dev;

const struct device *flash_device_get_binding(char *dev_name)
{
     54c:	b510      	push	{r4, lr}
    if (!flash_dev) {
     54e:	4c04      	ldr	r4, [pc, #16]	; (560 <flash_device_get_binding+0x14>)
     550:	6823      	ldr	r3, [r4, #0]
     552:	b913      	cbnz	r3, 55a <flash_device_get_binding+0xe>
     554:	f004 ffe0 	bl	5518 <z_impl_device_get_binding>
        flash_dev = device_get_binding(dev_name);
     558:	6020      	str	r0, [r4, #0]
    }
    return flash_dev;
}
     55a:	6820      	ldr	r0, [r4, #0]
     55c:	bd10      	pop	{r4, pc}
     55e:	bf00      	nop
     560:	20000190 	.word	0x20000190

00000564 <flash_device_base>:

int flash_device_base(uint8_t fd_id, uintptr_t *ret)
{
     564:	b508      	push	{r3, lr}
    if (fd_id != FLASH_DEVICE_ID) {
     566:	4602      	mov	r2, r0
     568:	b138      	cbz	r0, 57a <flash_device_base+0x16>
        BOOT_LOG_ERR("invalid flash ID %d; expected %d",
     56a:	4805      	ldr	r0, [pc, #20]	; (580 <flash_device_base+0x1c>)
     56c:	2300      	movs	r3, #0
     56e:	2145      	movs	r1, #69	; 0x45
     570:	f005 fcf0 	bl	5f54 <z_log_minimal_printk>
                     fd_id, FLASH_DEVICE_ID);
        return -EINVAL;
     574:	f06f 0015 	mvn.w	r0, #21
    }
    *ret = FLASH_DEVICE_BASE;
    return 0;
}
     578:	bd08      	pop	{r3, pc}
    *ret = FLASH_DEVICE_BASE;
     57a:	6008      	str	r0, [r1, #0]
    return 0;
     57c:	e7fc      	b.n	578 <flash_device_base+0x14>
     57e:	bf00      	nop
     580:	00008f80 	.word	0x00008f80

00000584 <flash_area_sector_from_off>:
    return -EINVAL;
}
#endif

int flash_area_sector_from_off(off_t off, struct flash_sector *sector)
{
     584:	b51f      	push	{r0, r1, r2, r3, r4, lr}
    int rc;
    struct flash_pages_info page;

    rc = flash_get_page_info_by_offs(flash_dev, off, &page);
     586:	4a07      	ldr	r2, [pc, #28]	; (5a4 <flash_area_sector_from_off+0x20>)
{
     588:	4603      	mov	r3, r0
     58a:	460c      	mov	r4, r1
    rc = flash_get_page_info_by_offs(flash_dev, off, &page);
     58c:	6810      	ldr	r0, [r2, #0]
		/* coverity[OVERRUN] */
		return (int) arch_syscall_invoke3(*(uintptr_t *)&dev, *(uintptr_t *)&offset, *(uintptr_t *)&info, K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS);
	}
#endif
	compiler_barrier();
	return z_impl_flash_get_page_info_by_offs(dev, offset, info);
     58e:	aa01      	add	r2, sp, #4
     590:	4619      	mov	r1, r3
     592:	f006 f9ad 	bl	68f0 <z_impl_flash_get_page_info_by_offs>
    if (rc) {
     596:	b918      	cbnz	r0, 5a0 <flash_area_sector_from_off+0x1c>
        return rc;
    }

    sector->fs_off = page.start_offset;
     598:	9b01      	ldr	r3, [sp, #4]
     59a:	6023      	str	r3, [r4, #0]
    sector->fs_size = page.size;
     59c:	9b02      	ldr	r3, [sp, #8]
     59e:	6063      	str	r3, [r4, #4]

    return rc;
}
     5a0:	b004      	add	sp, #16
     5a2:	bd10      	pop	{r4, pc}
     5a4:	20000190 	.word	0x20000190

000005a8 <os_heap_init>:
/*
 * Initialize mbedtls to be able to use the local heap.
 */
void os_heap_init(void)
{
    mbedtls_memory_buffer_alloc_init(mempool, sizeof(mempool));
     5a8:	4802      	ldr	r0, [pc, #8]	; (5b4 <os_heap_init+0xc>)
     5aa:	f44f 51c0 	mov.w	r1, #6144	; 0x1800
     5ae:	f003 bf43 	b.w	4438 <mbedtls_memory_buffer_alloc_init>
     5b2:	bf00      	nop
     5b4:	20001396 	.word	0x20001396

000005b8 <bootutil_img_validate>:
fih_int
bootutil_img_validate(struct enc_key_data *enc_state, int image_index,
                      struct image_header *hdr, const struct flash_area *fap,
                      uint8_t *tmp_buf, uint32_t tmp_buf_sz, uint8_t *seed,
                      int seed_len, uint8_t *out_hash)
{
     5b8:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
     5bc:	b0f9      	sub	sp, #484	; 0x1e4
    uint32_t off;
    uint16_t len;
    uint16_t type;
    int sha256_valid = 0;
#ifdef EXPECTED_SIG_TLV
    fih_int valid_signature = FIH_FAILURE;
     5be:	f8df 91f8 	ldr.w	r9, [pc, #504]	; 7b8 <FIH_LABEL_FIH_CALL_END_644+0x34>
{
     5c2:	f8dd b208 	ldr.w	fp, [sp, #520]	; 0x208
    fih_int valid_signature = FIH_FAILURE;
     5c6:	f8d9 6000 	ldr.w	r6, [r9]
{
     5ca:	e9dd 4884 	ldrd	r4, r8, [sp, #528]	; 0x210
#if defined(MCUBOOT_USE_MBED_TLS)
typedef mbedtls_sha256_context bootutil_sha256_context;

static inline void bootutil_sha256_init(bootutil_sha256_context *ctx)
{
    mbedtls_sha256_init(ctx);
     5ce:	a838      	add	r0, sp, #224	; 0xe0
     5d0:	4617      	mov	r7, r2
     5d2:	461d      	mov	r5, r3
     5d4:	f007 ffee 	bl	85b4 <mbedtls_sha256_init>
    (void)mbedtls_sha256_starts_ret(ctx, 0);
     5d8:	2100      	movs	r1, #0
     5da:	a838      	add	r0, sp, #224	; 0xe0
     5dc:	f004 f83c 	bl	4658 <mbedtls_sha256_starts>
    if (seed && (seed_len > 0)) {
     5e0:	f8cd 900c 	str.w	r9, [sp, #12]
     5e4:	b13c      	cbz	r4, 5f6 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x1a>
     5e6:	f1b8 0f00 	cmp.w	r8, #0
     5ea:	dd04      	ble.n	5f6 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x1a>

static inline int bootutil_sha256_update(bootutil_sha256_context *ctx,
                                         const void *data,
                                         uint32_t data_len)
{
    return mbedtls_sha256_update_ret(ctx, data, data_len);
     5ec:	4642      	mov	r2, r8
     5ee:	4621      	mov	r1, r4
     5f0:	a838      	add	r0, sp, #224	; 0xe0
     5f2:	f007 ffe3 	bl	85bc <mbedtls_sha256_update>
    size += hdr->ih_protect_tlv_size;
     5f6:	897b      	ldrh	r3, [r7, #10]
    size = hdr_size = hdr->ih_hdr_size;
     5f8:	f8b7 8008 	ldrh.w	r8, [r7, #8]
     5fc:	4498      	add	r8, r3
    size += hdr->ih_protect_tlv_size;
     5fe:	68fb      	ldr	r3, [r7, #12]
    for (off = 0; off < size; off += blk_sz) {
     600:	f04f 0900 	mov.w	r9, #0
    size += hdr->ih_protect_tlv_size;
     604:	4498      	add	r8, r3
    for (off = 0; off < size; off += blk_sz) {
     606:	45c8      	cmp	r8, r9
     608:	d84b      	bhi.n	6a2 <FIH_LABEL_FIH_CALL_END_310+0x10>
}

static inline int bootutil_sha256_finish(bootutil_sha256_context *ctx,
                                          uint8_t *output)
{
    return mbedtls_sha256_finish_ret(ctx, output);
     60a:	a90d      	add	r1, sp, #52	; 0x34
     60c:	a838      	add	r0, sp, #224	; 0xe0
     60e:	f008 f812 	bl	8636 <mbedtls_sha256_finish>
            tmp_buf_sz, hash, seed, seed_len);
    if (rc) {
        goto out;
    }

    if (out_hash) {
     612:	9b86      	ldr	r3, [sp, #536]	; 0x218
     614:	b123      	cbz	r3, 620 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x44>
        memcpy(out_hash, hash, 32);
     616:	2220      	movs	r2, #32
     618:	a90d      	add	r1, sp, #52	; 0x34
     61a:	4618      	mov	r0, r3
     61c:	f006 f826 	bl	666c <memcpy>
    }

    rc = bootutil_tlv_iter_begin(&it, hdr, fap, IMAGE_TLV_ANY, false);
     620:	2300      	movs	r3, #0
     622:	9300      	str	r3, [sp, #0]
     624:	462a      	mov	r2, r5
     626:	f64f 73ff 	movw	r3, #65535	; 0xffff
     62a:	4639      	mov	r1, r7
     62c:	a807      	add	r0, sp, #28
     62e:	f005 f91c 	bl	586a <bootutil_tlv_iter_begin>
    if (rc) {
     632:	4604      	mov	r4, r0
     634:	2800      	cmp	r0, #0
     636:	f040 80b5 	bne.w	7a4 <FIH_LABEL_FIH_CALL_END_644+0x20>
             * can be multiple signatures, each preceded by a key.
             */
#endif /* !MCUBOOT_HW_KEY */
        } else if (type == EXPECTED_SIG_TLV) {
            /* Ignore this signature if it is out of bounds. */
            if (key_id < 0 || key_id >= bootutil_key_cnt) {
     63a:	f8df 9180 	ldr.w	r9, [pc, #384]	; 7bc <FIH_LABEL_FIH_CALL_END_644+0x38>
    int sha256_valid = 0;
     63e:	4680      	mov	r8, r0
    int key_id = -1;
     640:	f04f 37ff 	mov.w	r7, #4294967295
        rc = bootutil_tlv_iter_next(&it, &off, &len, &type);
     644:	f10d 0316 	add.w	r3, sp, #22
     648:	aa05      	add	r2, sp, #20
     64a:	a906      	add	r1, sp, #24
     64c:	a807      	add	r0, sp, #28
     64e:	f005 f958 	bl	5902 <bootutil_tlv_iter_next>
        if (rc < 0) {
     652:	1e04      	subs	r4, r0, #0
     654:	f2c0 80a6 	blt.w	7a4 <FIH_LABEL_FIH_CALL_END_644+0x20>
        } else if (rc > 0) {
     658:	f040 8097 	bne.w	78a <FIH_LABEL_FIH_CALL_END_644+0x6>
        if (type == IMAGE_TLV_SHA256) {
     65c:	f8bd a016 	ldrh.w	sl, [sp, #22]
     660:	f1ba 0f10 	cmp.w	sl, #16
     664:	d134      	bne.n	6d0 <FIH_LABEL_FIH_CALL_END_310+0x3e>
            if (len != sizeof(hash)) {
     666:	f8bd 8014 	ldrh.w	r8, [sp, #20]
     66a:	f1b8 0f20 	cmp.w	r8, #32
     66e:	f040 8097 	bne.w	7a0 <FIH_LABEL_FIH_CALL_END_644+0x1c>
            rc = LOAD_IMAGE_DATA(hdr, fap, off, buf, sizeof(hash));
     672:	9906      	ldr	r1, [sp, #24]
     674:	4643      	mov	r3, r8
     676:	aa38      	add	r2, sp, #224	; 0xe0
     678:	4628      	mov	r0, r5
     67a:	f005 fc79 	bl	5f70 <flash_area_read>
            if (rc) {
     67e:	4604      	mov	r4, r0
     680:	2800      	cmp	r0, #0
     682:	f040 808f 	bne.w	7a4 <FIH_LABEL_FIH_CALL_END_644+0x20>

00000686 <FIH_LABEL_FIH_CALL_START_291>:
            FIH_CALL(boot_fih_memequal, fih_rc, hash, buf, sizeof(hash));
     686:	4642      	mov	r2, r8
     688:	a938      	add	r1, sp, #224	; 0xe0
     68a:	a80d      	add	r0, sp, #52	; 0x34
     68c:	f005 f984 	bl	5998 <boot_fih_memequal>
     690:	4604      	mov	r4, r0

00000692 <FIH_LABEL_FIH_CALL_END_310>:
            if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
     692:	4b47      	ldr	r3, [pc, #284]	; (7b0 <FIH_LABEL_FIH_CALL_END_644+0x2c>)
     694:	681b      	ldr	r3, [r3, #0]
     696:	4283      	cmp	r3, r0
     698:	f040 8084 	bne.w	7a4 <FIH_LABEL_FIH_CALL_END_644+0x20>
            sha256_valid = 1;
     69c:	f04f 0801 	mov.w	r8, #1
     6a0:	e7d0      	b.n	644 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x68>
        blk_sz = size - off;
     6a2:	9a83      	ldr	r2, [sp, #524]	; 0x20c
     6a4:	eba8 0309 	sub.w	r3, r8, r9
        if (blk_sz > tmp_buf_sz) {
     6a8:	429a      	cmp	r2, r3
     6aa:	bf28      	it	cs
     6ac:	461a      	movcs	r2, r3
        rc = flash_area_read(fap, off, tmp_buf, blk_sz);
     6ae:	4613      	mov	r3, r2
     6b0:	4692      	mov	sl, r2
     6b2:	4649      	mov	r1, r9
     6b4:	465a      	mov	r2, fp
     6b6:	4628      	mov	r0, r5
     6b8:	f005 fc5a 	bl	5f70 <flash_area_read>
        if (rc) {
     6bc:	4604      	mov	r4, r0
     6be:	2800      	cmp	r0, #0
     6c0:	d170      	bne.n	7a4 <FIH_LABEL_FIH_CALL_END_644+0x20>
    return mbedtls_sha256_update_ret(ctx, data, data_len);
     6c2:	4652      	mov	r2, sl
     6c4:	4659      	mov	r1, fp
     6c6:	a838      	add	r0, sp, #224	; 0xe0
     6c8:	f007 ff78 	bl	85bc <mbedtls_sha256_update>
    for (off = 0; off < size; off += blk_sz) {
     6cc:	44d1      	add	r9, sl
     6ce:	e79a      	b.n	606 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x2a>
        } else if (type == IMAGE_TLV_KEYHASH) {
     6d0:	f1ba 0f01 	cmp.w	sl, #1
     6d4:	d136      	bne.n	744 <FIH_LABEL_FIH_CALL_END_310+0xb2>
            if (len > 32) {
     6d6:	f8bd 3014 	ldrh.w	r3, [sp, #20]
     6da:	2b20      	cmp	r3, #32
     6dc:	d860      	bhi.n	7a0 <FIH_LABEL_FIH_CALL_END_644+0x1c>
            rc = LOAD_IMAGE_DATA(hdr, fap, off, buf, len);
     6de:	9906      	ldr	r1, [sp, #24]
     6e0:	aa38      	add	r2, sp, #224	; 0xe0
     6e2:	4628      	mov	r0, r5
     6e4:	f005 fc44 	bl	5f70 <flash_area_read>
            if (rc) {
     6e8:	4604      	mov	r4, r0
     6ea:	2800      	cmp	r0, #0
     6ec:	d15a      	bne.n	7a4 <FIH_LABEL_FIH_CALL_END_644+0x20>
            key_id = bootutil_find_key(buf, len);
     6ee:	f89d a014 	ldrb.w	sl, [sp, #20]
    if (keyhash_len > 32) {
     6f2:	f1ba 0f20 	cmp.w	sl, #32
     6f6:	d903      	bls.n	700 <FIH_LABEL_FIH_CALL_END_310+0x6e>
        return -1;
     6f8:	f04f 34ff 	mov.w	r4, #4294967295
            key_id = bootutil_find_key(buf, len);
     6fc:	4627      	mov	r7, r4
     6fe:	e7a1      	b.n	644 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x68>
    for (i = 0; i < bootutil_key_cnt; i++) {
     700:	f8d9 3000 	ldr.w	r3, [r9]
     704:	4f2b      	ldr	r7, [pc, #172]	; (7b4 <FIH_LABEL_FIH_CALL_END_644+0x30>)
     706:	9302      	str	r3, [sp, #8]
     708:	9b02      	ldr	r3, [sp, #8]
     70a:	429c      	cmp	r4, r3
     70c:	daf4      	bge.n	6f8 <FIH_LABEL_FIH_CALL_END_310+0x66>
    mbedtls_sha256_init(ctx);
     70e:	a81d      	add	r0, sp, #116	; 0x74
     710:	f007 ff50 	bl	85b4 <mbedtls_sha256_init>
    (void)mbedtls_sha256_starts_ret(ctx, 0);
     714:	2100      	movs	r1, #0
     716:	a81d      	add	r0, sp, #116	; 0x74
     718:	f003 ff9e 	bl	4658 <mbedtls_sha256_starts>
        bootutil_sha256_update(&sha256_ctx, key->key, *key->len);
     71c:	687b      	ldr	r3, [r7, #4]
    return mbedtls_sha256_update_ret(ctx, data, data_len);
     71e:	f857 1b08 	ldr.w	r1, [r7], #8
     722:	681a      	ldr	r2, [r3, #0]
     724:	a81d      	add	r0, sp, #116	; 0x74
     726:	f007 ff49 	bl	85bc <mbedtls_sha256_update>
    return mbedtls_sha256_finish_ret(ctx, output);
     72a:	a915      	add	r1, sp, #84	; 0x54
     72c:	a81d      	add	r0, sp, #116	; 0x74
     72e:	f007 ff82 	bl	8636 <mbedtls_sha256_finish>
        if (!memcmp(hash, keyhash, keyhash_len)) {
     732:	4652      	mov	r2, sl
     734:	a938      	add	r1, sp, #224	; 0xe0
     736:	a815      	add	r0, sp, #84	; 0x54
     738:	f005 ff71 	bl	661e <memcmp>
     73c:	2800      	cmp	r0, #0
     73e:	d0dd      	beq.n	6fc <FIH_LABEL_FIH_CALL_END_310+0x6a>
    for (i = 0; i < bootutil_key_cnt; i++) {
     740:	3401      	adds	r4, #1
     742:	e7e1      	b.n	708 <FIH_LABEL_FIH_CALL_END_310+0x76>
        } else if (type == EXPECTED_SIG_TLV) {
     744:	f1ba 0f20 	cmp.w	sl, #32
     748:	f47f af7c 	bne.w	644 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x68>
            if (key_id < 0 || key_id >= bootutil_key_cnt) {
     74c:	2f00      	cmp	r7, #0
     74e:	db19      	blt.n	784 <FIH_LABEL_FIH_CALL_END_644>
     750:	f8d9 3000 	ldr.w	r3, [r9]
     754:	42bb      	cmp	r3, r7
     756:	dd15      	ble.n	784 <FIH_LABEL_FIH_CALL_END_644>
                key_id = -1;
                continue;
            }
            if (!EXPECTED_SIG_LEN(len) || len > sizeof(buf)) {
     758:	f8bd 3014 	ldrh.w	r3, [sp, #20]
     75c:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
     760:	d11e      	bne.n	7a0 <FIH_LABEL_FIH_CALL_END_644+0x1c>
                rc = -1;
                goto out;
            }
            rc = LOAD_IMAGE_DATA(hdr, fap, off, buf, len);
     762:	9906      	ldr	r1, [sp, #24]
     764:	aa38      	add	r2, sp, #224	; 0xe0
     766:	4628      	mov	r0, r5
     768:	f005 fc02 	bl	5f70 <flash_area_read>
            if (rc) {
     76c:	4604      	mov	r4, r0
     76e:	b9c8      	cbnz	r0, 7a4 <FIH_LABEL_FIH_CALL_END_644+0x20>

00000770 <FIH_LABEL_FIH_CALL_START_622>:
                goto out;
            }
            FIH_CALL(bootutil_verify_sig, valid_signature, hash, sizeof(hash),
     770:	b2ff      	uxtb	r7, r7
     772:	f8bd 3014 	ldrh.w	r3, [sp, #20]
     776:	9700      	str	r7, [sp, #0]
     778:	aa38      	add	r2, sp, #224	; 0xe0
     77a:	4651      	mov	r1, sl
     77c:	a80d      	add	r0, sp, #52	; 0x34
     77e:	f000 f81f 	bl	7c0 <bootutil_verify_sig>
     782:	4606      	mov	r6, r0

00000784 <FIH_LABEL_FIH_CALL_END_644>:
                key_id = -1;
     784:	f04f 37ff 	mov.w	r7, #4294967295
     788:	e75c      	b.n	644 <CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN+0x68>
#endif /* MCUBOOT_HW_ROLLBACK_PROT */
        }
    }

    rc = !sha256_valid;
    if (rc) {
     78a:	f1b8 0f00 	cmp.w	r8, #0
     78e:	d00d      	beq.n	7ac <FIH_LABEL_FIH_CALL_END_644+0x28>
        goto out;
    }
#ifdef EXPECTED_SIG_TLV
    fih_rc = fih_int_encode_zero_equality(fih_not_eq(valid_signature,
     790:	4b07      	ldr	r3, [pc, #28]	; (7b0 <FIH_LABEL_FIH_CALL_END_644+0x2c>)
 * value that is not FIH_SUCCESS
 */
__attribute__((always_inline)) inline
fih_int fih_int_encode_zero_equality(int x)
{
    if (x) {
     792:	681b      	ldr	r3, [r3, #0]
     794:	42b3      	cmp	r3, r6
     796:	d001      	beq.n	79c <FIH_LABEL_FIH_CALL_END_644+0x18>
        return FIH_FAILURE;
     798:	9b03      	ldr	r3, [sp, #12]
     79a:	681e      	ldr	r6, [r3, #0]
                rc = -1;
     79c:	4634      	mov	r4, r6
     79e:	e001      	b.n	7a4 <FIH_LABEL_FIH_CALL_END_644+0x20>
     7a0:	f04f 34ff 	mov.w	r4, #4294967295
    if (rc) {
        fih_rc = fih_int_encode(rc);
    }

    FIH_RET(fih_rc);
}
     7a4:	4620      	mov	r0, r4
     7a6:	b079      	add	sp, #484	; 0x1e4
     7a8:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
     7ac:	2401      	movs	r4, #1
    FIH_RET(fih_rc);
     7ae:	e7f9      	b.n	7a4 <FIH_LABEL_FIH_CALL_END_644+0x20>
     7b0:	20000194 	.word	0x20000194
     7b4:	00008b14 	.word	0x00008b14
     7b8:	20000000 	.word	0x20000000
     7bc:	00008b10 	.word	0x00008b10

000007c0 <bootutil_verify_sig>:
}

fih_int
bootutil_verify_sig(uint8_t *hash, uint32_t hlen, uint8_t *sig, size_t slen,
  uint8_t key_id)
{
     7c0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
     7c4:	4698      	mov	r8, r3
     7c6:	f5ad 7d4b 	sub.w	sp, sp, #812	; 0x32c
    mbedtls_rsa_context ctx;
    int rc;
    fih_int fih_rc = FIH_FAILURE;
     7ca:	4b6b      	ldr	r3, [pc, #428]	; (978 <FIH_LABEL_FIH_CALL_END_683+0x4>)
{
     7cc:	f89d 6350 	ldrb.w	r6, [sp, #848]	; 0x350
    fih_int fih_rc = FIH_FAILURE;
     7d0:	681d      	ldr	r5, [r3, #0]
{
     7d2:	4607      	mov	r7, r0
    uint8_t *cp;
    uint8_t *end;

#if MBEDTLS_VERSION_NUMBER >= 0x03000000
    mbedtls_rsa_init(&ctx);
     7d4:	a827      	add	r0, sp, #156	; 0x9c
{
     7d6:	468a      	mov	sl, r1
     7d8:	4691      	mov	r9, r2
    mbedtls_rsa_init(&ctx);
     7da:	f007 fea8 	bl	852e <mbedtls_rsa_init>
#else
    mbedtls_rsa_init(&ctx, 0, 0);
#endif

    cp = (uint8_t *)bootutil_keys[key_id].key;
     7de:	4b67      	ldr	r3, [pc, #412]	; (97c <FIH_LABEL_FIH_CALL_END_683+0x8>)
     7e0:	f853 4036 	ldr.w	r4, [r3, r6, lsl #3]
     7e4:	9402      	str	r4, [sp, #8]
    end = cp + *bootutil_keys[key_id].len;
     7e6:	eb03 03c6 	add.w	r3, r3, r6, lsl #3
    if ((rc = mbedtls_asn1_get_tag(p, end, &len,
     7ea:	aa8a      	add	r2, sp, #552	; 0x228
    end = cp + *bootutil_keys[key_id].len;
     7ec:	685b      	ldr	r3, [r3, #4]
     7ee:	6819      	ldr	r1, [r3, #0]
     7f0:	440c      	add	r4, r1
    if ((rc = mbedtls_asn1_get_tag(p, end, &len,
     7f2:	2330      	movs	r3, #48	; 0x30
     7f4:	4621      	mov	r1, r4
     7f6:	a802      	add	r0, sp, #8
     7f8:	f006 fb59 	bl	6eae <mbedtls_asn1_get_tag>
     7fc:	bb68      	cbnz	r0, 85a <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x5a>
    if (*p + len != end) {
     7fe:	9b02      	ldr	r3, [sp, #8]
     800:	9a8a      	ldr	r2, [sp, #552]	; 0x228
     802:	4413      	add	r3, r2
     804:	429c      	cmp	r4, r3
     806:	d128      	bne.n	85a <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x5a>
    if ((rc = mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(N))) != 0 ||
     808:	aa29      	add	r2, sp, #164	; 0xa4
     80a:	4621      	mov	r1, r4
     80c:	a802      	add	r0, sp, #8
     80e:	f006 fb62 	bl	6ed6 <mbedtls_asn1_get_mpi>
     812:	bb10      	cbnz	r0, 85a <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x5a>
        (rc = mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(E))) != 0) {
     814:	f10d 0bb0 	add.w	fp, sp, #176	; 0xb0
     818:	465a      	mov	r2, fp
     81a:	4621      	mov	r1, r4
     81c:	a802      	add	r0, sp, #8
     81e:	f006 fb5a 	bl	6ed6 <mbedtls_asn1_get_mpi>
    if ((rc = mbedtls_asn1_get_mpi(p, end, &ctx->MBEDTLS_CONTEXT_MEMBER(N))) != 0 ||
     822:	4606      	mov	r6, r0
     824:	b9c8      	cbnz	r0, 85a <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x5a>
    ctx->MBEDTLS_CONTEXT_MEMBER(len) = mbedtls_mpi_size(&ctx->MBEDTLS_CONTEXT_MEMBER(N));
     826:	a829      	add	r0, sp, #164	; 0xa4
     828:	f006 ff83 	bl	7732 <mbedtls_mpi_size>
    if (*p != end) {
     82c:	9b02      	ldr	r3, [sp, #8]
    ctx->MBEDTLS_CONTEXT_MEMBER(len) = mbedtls_mpi_size(&ctx->MBEDTLS_CONTEXT_MEMBER(N));
     82e:	9028      	str	r0, [sp, #160]	; 0xa0
    if (*p != end) {
     830:	429c      	cmp	r4, r3
     832:	d112      	bne.n	85a <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x5a>
    rc = mbedtls_rsa_import(ctx, &ctx->MBEDTLS_CONTEXT_MEMBER(N), NULL,
     834:	e9cd 6b00 	strd	r6, fp, [sp]
     838:	4633      	mov	r3, r6
     83a:	4632      	mov	r2, r6
     83c:	a929      	add	r1, sp, #164	; 0xa4
     83e:	a827      	add	r0, sp, #156	; 0x9c
     840:	f007 fe31 	bl	84a6 <mbedtls_rsa_import>
    if (rc != 0) {
     844:	b948      	cbnz	r0, 85a <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x5a>
    rc = mbedtls_rsa_check_pubkey(ctx);
     846:	a827      	add	r0, sp, #156	; 0x9c
     848:	f003 fea4 	bl	4594 <mbedtls_rsa_check_pubkey>
    if (rc != 0) {
     84c:	b928      	cbnz	r0, 85a <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x5a>
    ctx->MBEDTLS_CONTEXT_MEMBER(len) = mbedtls_mpi_size(&ctx->MBEDTLS_CONTEXT_MEMBER(N));
     84e:	a829      	add	r0, sp, #164	; 0xa4
     850:	f006 ff6f 	bl	7732 <mbedtls_mpi_size>

    rc = bootutil_parse_rsakey(&ctx, &cp, end);
    if (rc || slen != ctx.MBEDTLS_CONTEXT_MEMBER(len)) {
     854:	4580      	cmp	r8, r0
    ctx->MBEDTLS_CONTEXT_MEMBER(len) = mbedtls_mpi_size(&ctx->MBEDTLS_CONTEXT_MEMBER(N));
     856:	9028      	str	r0, [sp, #160]	; 0xa0
    if (rc || slen != ctx.MBEDTLS_CONTEXT_MEMBER(len)) {
     858:	d00a      	beq.n	870 <FIH_LABEL_FIH_CALL_START_226>
        mbedtls_rsa_free(&ctx);
     85a:	a827      	add	r0, sp, #156	; 0x9c
     85c:	f007 fe71 	bl	8542 <mbedtls_rsa_free>
        goto out;
    }
    FIH_CALL(bootutil_cmp_rsasig, fih_rc, &ctx, hash, hlen, sig);

out:
    mbedtls_rsa_free(&ctx);
     860:	a827      	add	r0, sp, #156	; 0x9c
     862:	f007 fe6e 	bl	8542 <mbedtls_rsa_free>

    FIH_RET(fih_rc);
}
     866:	4628      	mov	r0, r5
     868:	f50d 7d4b 	add.w	sp, sp, #812	; 0x32c
     86c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

00000870 <FIH_LABEL_FIH_CALL_START_226>:
    if (ctx->MBEDTLS_CONTEXT_MEMBER(len) != PSS_EMLEN ||
     870:	f5b8 7f80 	cmp.w	r8, #256	; 0x100
     874:	d002      	beq.n	87c <FIH_LABEL_FIH_CALL_END_287+0x2>
     876:	f04f 35ff 	mov.w	r5, #4294967295

0000087a <FIH_LABEL_FIH_CALL_END_287>:
    FIH_CALL(bootutil_cmp_rsasig, fih_rc, &ctx, hash, hlen, sig);
     87a:	e7f1      	b.n	860 <CONFIG_BOOT_SIGNATURE_TYPE_RSA_LEN+0x60>
    if (hlen != PSS_HLEN) {
     87c:	f1ba 0f20 	cmp.w	sl, #32
     880:	d1f9      	bne.n	876 <FIH_LABEL_FIH_CALL_START_226+0x6>
    if (mbedtls_rsa_public(ctx, sig, em)) {
     882:	aa8a      	add	r2, sp, #552	; 0x228
     884:	4649      	mov	r1, r9
     886:	a827      	add	r0, sp, #156	; 0x9c
     888:	f003 fea8 	bl	45dc <mbedtls_rsa_public>
     88c:	4604      	mov	r4, r0
     88e:	2800      	cmp	r0, #0
     890:	d1f1      	bne.n	876 <FIH_LABEL_FIH_CALL_START_226+0x6>
    if (em[PSS_EMLEN - 1] != 0xbc) {
     892:	f89d 3327 	ldrb.w	r3, [sp, #807]	; 0x327
     896:	2bbc      	cmp	r3, #188	; 0xbc
     898:	d1ed      	bne.n	876 <FIH_LABEL_FIH_CALL_START_226+0x6>
    uint8_t counter[4] = { 0, 0, 0, 0 };
     89a:	f50d 78a4 	add.w	r8, sp, #328	; 0x148
     89e:	9003      	str	r0, [sp, #12]
    int count = PSS_MASK_LEN;
     8a0:	26df      	movs	r6, #223	; 0xdf
     8a2:	4645      	mov	r5, r8
    mbedtls_sha256_init(ctx);
     8a4:	a80c      	add	r0, sp, #48	; 0x30
     8a6:	f007 fe85 	bl	85b4 <mbedtls_sha256_init>
    (void)mbedtls_sha256_starts_ret(ctx, 0);
     8aa:	2100      	movs	r1, #0
     8ac:	a80c      	add	r0, sp, #48	; 0x30
     8ae:	f003 fed3 	bl	4658 <mbedtls_sha256_starts>
    return mbedtls_sha256_update_ret(ctx, data, data_len);
     8b2:	2220      	movs	r2, #32
     8b4:	f20d 3107 	addw	r1, sp, #775	; 0x307
     8b8:	a80c      	add	r0, sp, #48	; 0x30
     8ba:	f007 fe7f 	bl	85bc <mbedtls_sha256_update>
     8be:	2204      	movs	r2, #4
     8c0:	a903      	add	r1, sp, #12
     8c2:	a80c      	add	r0, sp, #48	; 0x30
     8c4:	f007 fe7a 	bl	85bc <mbedtls_sha256_update>
    return mbedtls_sha256_finish_ret(ctx, output);
     8c8:	a904      	add	r1, sp, #16
     8ca:	a80c      	add	r0, sp, #48	; 0x30
     8cc:	f007 feb3 	bl	8636 <mbedtls_sha256_finish>
        if (bytes > count)
     8d0:	2e1f      	cmp	r6, #31
        counter[3]++;
     8d2:	f89d 300f 	ldrb.w	r3, [sp, #15]
        if (bytes > count)
     8d6:	bfd4      	ite	le
     8d8:	46b1      	movle	r9, r6
     8da:	f04f 0920 	movgt.w	r9, #32
        counter[3]++;
     8de:	3301      	adds	r3, #1
        memcpy(mask, htmp, bytes);
     8e0:	4640      	mov	r0, r8
     8e2:	464a      	mov	r2, r9
     8e4:	a904      	add	r1, sp, #16
        count -= bytes;
     8e6:	eba6 0609 	sub.w	r6, r6, r9
        counter[3]++;
     8ea:	f88d 300f 	strb.w	r3, [sp, #15]
        memcpy(mask, htmp, bytes);
     8ee:	f005 febd 	bl	666c <memcpy>
    while (count > 0) {
     8f2:	2e00      	cmp	r6, #0
        mask += bytes;
     8f4:	44c8      	add	r8, r9
    while (count > 0) {
     8f6:	dcd5      	bgt.n	8a4 <FIH_LABEL_FIH_CALL_END_287+0x2a>
    for (i = 0; i < PSS_MASK_LEN; i++) {
     8f8:	4628      	mov	r0, r5
     8fa:	ae8a      	add	r6, sp, #552	; 0x228
     8fc:	462a      	mov	r2, r5
     8fe:	23df      	movs	r3, #223	; 0xdf
        db_mask[i] ^= em[i];
     900:	7811      	ldrb	r1, [r2, #0]
     902:	f816 cb01 	ldrb.w	ip, [r6], #1
    for (i = 0; i < PSS_MASK_LEN; i++) {
     906:	3b01      	subs	r3, #1
        db_mask[i] ^= em[i];
     908:	ea81 010c 	eor.w	r1, r1, ip
     90c:	f802 1b01 	strb.w	r1, [r2], #1
    for (i = 0; i < PSS_MASK_LEN; i++) {
     910:	d1f6      	bne.n	900 <FIH_LABEL_FIH_CALL_END_287+0x86>
    db_mask[0] &= 0x7F;
     912:	782b      	ldrb	r3, [r5, #0]
     914:	f003 037f 	and.w	r3, r3, #127	; 0x7f
     918:	702b      	strb	r3, [r5, #0]
        if (db_mask[i] != 0) {
     91a:	f810 6b01 	ldrb.w	r6, [r0], #1
     91e:	2e00      	cmp	r6, #0
     920:	d1a9      	bne.n	876 <FIH_LABEL_FIH_CALL_START_226+0x6>
    for (i = 0; i < PSS_MASK_ZERO_COUNT; i++) {
     922:	3401      	adds	r4, #1
     924:	2cbe      	cmp	r4, #190	; 0xbe
     926:	d1f8      	bne.n	91a <FIH_LABEL_FIH_CALL_END_287+0xa0>
    if (db_mask[PSS_MASK_ONE_POS] != 1) {
     928:	f895 30be 	ldrb.w	r3, [r5, #190]	; 0xbe
     92c:	2b01      	cmp	r3, #1
     92e:	d1a2      	bne.n	876 <FIH_LABEL_FIH_CALL_START_226+0x6>
    mbedtls_sha256_init(ctx);
     930:	a80c      	add	r0, sp, #48	; 0x30
     932:	f007 fe3f 	bl	85b4 <mbedtls_sha256_init>
    (void)mbedtls_sha256_starts_ret(ctx, 0);
     936:	4631      	mov	r1, r6
     938:	a80c      	add	r0, sp, #48	; 0x30
     93a:	f003 fe8d 	bl	4658 <mbedtls_sha256_starts>
    return mbedtls_sha256_update_ret(ctx, data, data_len);
     93e:	4910      	ldr	r1, [pc, #64]	; (980 <FIH_LABEL_FIH_CALL_END_683+0xc>)
     940:	2208      	movs	r2, #8
     942:	a80c      	add	r0, sp, #48	; 0x30
     944:	f007 fe3a 	bl	85bc <mbedtls_sha256_update>
     948:	4639      	mov	r1, r7
     94a:	2220      	movs	r2, #32
     94c:	a80c      	add	r0, sp, #48	; 0x30
     94e:	f007 fe35 	bl	85bc <mbedtls_sha256_update>
     952:	2220      	movs	r2, #32
     954:	f20d 2107 	addw	r1, sp, #519	; 0x207
     958:	a80c      	add	r0, sp, #48	; 0x30
     95a:	f007 fe2f 	bl	85bc <mbedtls_sha256_update>
    return mbedtls_sha256_finish_ret(ctx, output);
     95e:	a904      	add	r1, sp, #16
     960:	a80c      	add	r0, sp, #48	; 0x30
     962:	f007 fe68 	bl	8636 <mbedtls_sha256_finish>

00000966 <FIH_LABEL_FIH_CALL_START_662>:
    FIH_CALL(boot_fih_memequal, fih_rc, h2, &em[PSS_HASH_OFFSET], PSS_HLEN);
     966:	2220      	movs	r2, #32
     968:	f20d 3107 	addw	r1, sp, #775	; 0x307
     96c:	a804      	add	r0, sp, #16
     96e:	f005 f813 	bl	5998 <boot_fih_memequal>
     972:	4605      	mov	r5, r0

00000974 <FIH_LABEL_FIH_CALL_END_683>:
    if (rc) {
     974:	e781      	b.n	87a <FIH_LABEL_FIH_CALL_END_287>
     976:	bf00      	nop
     978:	20000000 	.word	0x20000000
     97c:	00008b14 	.word	0x00008b14
     980:	00008fa6 	.word	0x00008fa6

00000984 <boot_read_swap_size>:
    return -1;
}

int
boot_read_swap_size(int image_index, uint32_t *swap_size)
{
     984:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
     988:	b086      	sub	sp, #24
    uint8_t areas[2] = {
     98a:	2302      	movs	r3, #2
        if (memcmp(magic, boot_img_magic, BOOT_MAGIC_SZ) == 0) {
     98c:	f8df 806c 	ldr.w	r8, [pc, #108]	; 9fc <boot_read_swap_size+0x78>
    uint8_t areas[2] = {
     990:	f8ad 3000 	strh.w	r3, [sp]
{
     994:	460d      	mov	r5, r1
     996:	466f      	mov	r7, sp
    for (i = 0; i < sizeof(areas) / sizeof(areas[0]); i++) {
     998:	2600      	movs	r6, #0
        rc = flash_area_open(areas[i], fap);
     99a:	f817 0b01 	ldrb.w	r0, [r7], #1
     99e:	a901      	add	r1, sp, #4
     9a0:	f001 f9a2 	bl	1ce8 <flash_area_open>
        if (rc != 0) {
     9a4:	4604      	mov	r4, r0
     9a6:	b9a0      	cbnz	r0, 9d2 <boot_read_swap_size+0x4e>
        off = boot_magic_off(*fap);
     9a8:	9801      	ldr	r0, [sp, #4]
    return flash_area_get_size(fap) - BOOT_MAGIC_SZ;
     9aa:	6881      	ldr	r1, [r0, #8]
        rc = flash_area_read(*fap, off, magic, BOOT_MAGIC_SZ);
     9ac:	2310      	movs	r3, #16
     9ae:	aa02      	add	r2, sp, #8
     9b0:	3910      	subs	r1, #16
     9b2:	f005 fadd 	bl	5f70 <flash_area_read>
     9b6:	4604      	mov	r4, r0
        flash_area_close(*fap);
     9b8:	9801      	ldr	r0, [sp, #4]
     9ba:	f005 fad8 	bl	5f6e <flash_area_close>
        if (rc != 0) {
     9be:	b944      	cbnz	r4, 9d2 <boot_read_swap_size+0x4e>
        if (memcmp(magic, boot_img_magic, BOOT_MAGIC_SZ) == 0) {
     9c0:	2210      	movs	r2, #16
     9c2:	4641      	mov	r1, r8
     9c4:	a802      	add	r0, sp, #8
     9c6:	f005 fe2a 	bl	661e <memcmp>
     9ca:	b140      	cbz	r0, 9de <boot_read_swap_size+0x5a>
    for (i = 0; i < sizeof(areas) / sizeof(areas[0]); i++) {
     9cc:	b12e      	cbz	r6, 9da <boot_read_swap_size+0x56>
    return -1;
     9ce:	f04f 34ff 	mov.w	r4, #4294967295
        rc = flash_area_read(fap, off, swap_size, sizeof *swap_size);
        flash_area_close(fap);
    }

    return rc;
}
     9d2:	4620      	mov	r0, r4
     9d4:	b006      	add	sp, #24
     9d6:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
     9da:	2601      	movs	r6, #1
     9dc:	e7dd      	b.n	99a <boot_read_swap_size+0x16>
    return boot_swap_info_off(fap) - BOOT_MAX_ALIGN;
     9de:	9801      	ldr	r0, [sp, #4]
     9e0:	f006 f982 	bl	6ce8 <boot_swap_info_off>
        rc = flash_area_read(fap, off, swap_size, sizeof *swap_size);
     9e4:	2304      	movs	r3, #4
     9e6:	f1a0 0108 	sub.w	r1, r0, #8
     9ea:	462a      	mov	r2, r5
     9ec:	9801      	ldr	r0, [sp, #4]
     9ee:	f005 fabf 	bl	5f70 <flash_area_read>
     9f2:	4604      	mov	r4, r0
        flash_area_close(fap);
     9f4:	9801      	ldr	r0, [sp, #4]
     9f6:	f005 faba 	bl	5f6e <flash_area_close>
     9fa:	e7ea      	b.n	9d2 <boot_read_swap_size+0x4e>
     9fc:	00008cc8 	.word	0x00008cc8

00000a00 <boot_validate_slot.isra.0>:
 *         FIH_SUCCESS                      if image was successfully validated
 *         1 (or its fih_int encoded form)  if no bootloable image was found
 *         FIH_FAILURE                      on any errors
 */
static fih_int
boot_validate_slot(struct boot_loader_state *state, int slot,
     a00:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
                   struct boot_status *bs)
{
    const struct flash_area *fap;
    struct image_header *hdr;
    int area_id;
    fih_int fih_rc = FIH_FAILURE;
     a04:	4b38      	ldr	r3, [pc, #224]	; (ae8 <FIH_LABEL_FIH_CALL_END_475+0x80>)
boot_validate_slot(struct boot_loader_state *state, int slot,
     a06:	b088      	sub	sp, #32
     a08:	4606      	mov	r6, r0
    int rc;

    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
     a0a:	2000      	movs	r0, #0
boot_validate_slot(struct boot_loader_state *state, int slot,
     a0c:	460d      	mov	r5, r1
    fih_int fih_rc = FIH_FAILURE;
     a0e:	681c      	ldr	r4, [r3, #0]
    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
     a10:	f004 ff20 	bl	5854 <flash_area_id_from_multi_image_slot>
    rc = flash_area_open(area_id, &fap);
     a14:	a906      	add	r1, sp, #24
     a16:	b2c0      	uxtb	r0, r0
     a18:	f001 f966 	bl	1ce8 <flash_area_open>
    if (rc != 0) {
     a1c:	2800      	cmp	r0, #0
     a1e:	d157      	bne.n	ad0 <FIH_LABEL_FIH_CALL_END_475+0x68>
    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
     a20:	4629      	mov	r1, r5
     a22:	f004 ff17 	bl	5854 <flash_area_id_from_multi_image_slot>
     ((swap_type) == BOOT_SWAP_TYPE_PERM))

static inline struct image_header*
boot_img_hdr(struct boot_loader_state *state, size_t slot)
{
    return &BOOT_IMG(state, slot).hdr;
     a26:	242c      	movs	r4, #44	; 0x2c
    rc = flash_area_open(area_id, &fap);
     a28:	a907      	add	r1, sp, #28
     a2a:	b2c0      	uxtb	r0, r0
     a2c:	fb04 6405 	mla	r4, r4, r5, r6
     a30:	f001 f95a 	bl	1ce8 <flash_area_open>
    if (rc != 0) {
     a34:	2800      	cmp	r0, #0
     a36:	d036      	beq.n	aa6 <FIH_LABEL_FIH_CALL_END_475+0x3e>
        FIH_RET(fih_rc);
    }

    hdr = boot_img_hdr(state, slot);
    if (boot_check_header_erased(state, slot) == 0 ||
        (hdr->ih_flags & IMAGE_F_NON_BOOTABLE)) {
     a38:	f04f 082c 	mov.w	r8, #44	; 0x2c
     a3c:	fb08 f805 	mul.w	r8, r8, r5
     a40:	eb06 0708 	add.w	r7, r6, r8
     a44:	6939      	ldr	r1, [r7, #16]
    if (boot_check_header_erased(state, slot) == 0 ||
     a46:	f011 0110 	ands.w	r1, r1, #16
     a4a:	d137      	bne.n	abc <FIH_LABEL_FIH_CALL_END_475+0x54>

00000a4c <FIH_LABEL_FIH_CALL_START_419>:
    FIH_CALL(bootutil_img_validate, fih_rc, BOOT_CURR_ENC(state), image_index,
     a4c:	f44f 7380 	mov.w	r3, #256	; 0x100
     a50:	9301      	str	r3, [sp, #4]
     a52:	4b26      	ldr	r3, [pc, #152]	; (aec <FIH_LABEL_FIH_CALL_END_475+0x84>)
     a54:	9300      	str	r3, [sp, #0]
     a56:	4622      	mov	r2, r4
     a58:	e9cd 1103 	strd	r1, r1, [sp, #12]
     a5c:	9b06      	ldr	r3, [sp, #24]
     a5e:	9102      	str	r1, [sp, #8]
     a60:	4608      	mov	r0, r1
     a62:	f7ff fda9 	bl	5b8 <bootutil_img_validate>
     a66:	4604      	mov	r4, r0

00000a68 <FIH_LABEL_FIH_CALL_END_475>:
    if (hdr->ih_magic != IMAGE_MAGIC) {
     a68:	4b21      	ldr	r3, [pc, #132]	; (af0 <FIH_LABEL_FIH_CALL_END_475+0x88>)
     a6a:	f856 2008 	ldr.w	r2, [r6, r8]
                       fih_rc, BOOT_CURR_IMG(state), slot);
    if (fih_eq(fih_rc, fih_int_encode(BOOT_HOOK_REGULAR)))
    {
        FIH_CALL(boot_image_check, fih_rc, state, hdr, fap, bs);
    }
    if (!boot_is_header_valid(hdr, fap) || fih_not_eq(fih_rc, FIH_SUCCESS)) {
     a6e:	9806      	ldr	r0, [sp, #24]
    if (hdr->ih_magic != IMAGE_MAGIC) {
     a70:	429a      	cmp	r2, r3
     a72:	d10c      	bne.n	a8e <FIH_LABEL_FIH_CALL_END_475+0x26>
    if (!boot_u32_safe_add(&size, hdr->ih_img_size, hdr->ih_hdr_size)) {
     a74:	893a      	ldrh	r2, [r7, #8]
     a76:	68fb      	ldr	r3, [r7, #12]
    if (a > UINT32_MAX - b) {
     a78:	43d1      	mvns	r1, r2
     a7a:	428b      	cmp	r3, r1
     a7c:	d807      	bhi.n	a8e <FIH_LABEL_FIH_CALL_END_475+0x26>
        *dest = a + b;
     a7e:	4413      	add	r3, r2
    if (size >= flash_area_get_size(fap)) {
     a80:	6882      	ldr	r2, [r0, #8]
     a82:	4293      	cmp	r3, r2
     a84:	d203      	bcs.n	a8e <FIH_LABEL_FIH_CALL_END_475+0x26>
    if (!boot_is_header_valid(hdr, fap) || fih_not_eq(fih_rc, FIH_SUCCESS)) {
     a86:	4b1b      	ldr	r3, [pc, #108]	; (af4 <FIH_LABEL_FIH_CALL_END_475+0x8c>)
     a88:	681b      	ldr	r3, [r3, #0]
     a8a:	42a3      	cmp	r3, r4
     a8c:	d01d      	beq.n	aca <FIH_LABEL_FIH_CALL_END_475+0x62>
        if ((slot != BOOT_PRIMARY_SLOT) || ARE_SLOTS_EQUIVALENT()) {
     a8e:	b345      	cbz	r5, ae2 <FIH_LABEL_FIH_CALL_END_475+0x7a>
            flash_area_erase(fap, 0, flash_area_get_size(fap));
     a90:	6882      	ldr	r2, [r0, #8]
     a92:	2100      	movs	r1, #0
     a94:	f005 fabb 	bl	600e <flash_area_erase>
            /* Image is invalid, erase it to prevent further unnecessary
             * attempts to validate and boot it.
             */
        }
#if !defined(__BOOTSIM__)
        BOOT_LOG_ERR("Image in the %s slot is not valid!",
     a98:	4a17      	ldr	r2, [pc, #92]	; (af8 <FIH_LABEL_FIH_CALL_END_475+0x90>)
     a9a:	4818      	ldr	r0, [pc, #96]	; (afc <FIH_LABEL_FIH_CALL_END_475+0x94>)
     a9c:	2145      	movs	r1, #69	; 0x45
     a9e:	f005 fa59 	bl	5f54 <z_log_minimal_printk>
        fih_rc = fih_int_encode(1);
     aa2:	2401      	movs	r4, #1
     aa4:	e011      	b.n	aca <FIH_LABEL_FIH_CALL_END_475+0x62>
    erased_val = flash_area_erased_val(fap);
     aa6:	9807      	ldr	r0, [sp, #28]
     aa8:	f005 fae9 	bl	607e <flash_area_erased_val>
     aac:	4607      	mov	r7, r0
    flash_area_close(fap);
     aae:	9807      	ldr	r0, [sp, #28]
     ab0:	f005 fa5d 	bl	5f6e <flash_area_close>
boot_data_is_set_to(uint8_t val, void *data, size_t len)
     ab4:	1e63      	subs	r3, r4, #1
     ab6:	1ce2      	adds	r2, r4, #3
    for (i = 0; i < len; i++) {
     ab8:	4293      	cmp	r3, r2
     aba:	d10d      	bne.n	ad8 <FIH_LABEL_FIH_CALL_END_475+0x70>
        if (slot != BOOT_PRIMARY_SLOT) {
     abc:	2d00      	cmp	r5, #0
     abe:	d0f0      	beq.n	aa2 <FIH_LABEL_FIH_CALL_END_475+0x3a>
            swap_erase_trailer_sectors(state, fap);
     ac0:	9906      	ldr	r1, [sp, #24]
     ac2:	4630      	mov	r0, r6
     ac4:	f005 f867 	bl	5b96 <swap_erase_trailer_sectors>
        fih_rc = fih_int_encode(1);
     ac8:	462c      	mov	r4, r5
        }
    }
#endif

out:
    flash_area_close(fap);
     aca:	9806      	ldr	r0, [sp, #24]
     acc:	f005 fa4f 	bl	5f6e <flash_area_close>

    FIH_RET(fih_rc);
}
     ad0:	4620      	mov	r0, r4
     ad2:	b008      	add	sp, #32
     ad4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        if (val != p[i]) {
     ad8:	f813 1f01 	ldrb.w	r1, [r3, #1]!
     adc:	42b9      	cmp	r1, r7
     ade:	d0eb      	beq.n	ab8 <FIH_LABEL_FIH_CALL_END_475+0x50>
     ae0:	e7aa      	b.n	a38 <boot_validate_slot.isra.0+0x38>
        BOOT_LOG_ERR("Image in the %s slot is not valid!",
     ae2:	4a07      	ldr	r2, [pc, #28]	; (b00 <FIH_LABEL_FIH_CALL_END_475+0x98>)
     ae4:	e7d9      	b.n	a9a <FIH_LABEL_FIH_CALL_END_475+0x32>
     ae6:	bf00      	nop
     ae8:	20000000 	.word	0x20000000
     aec:	20002b96 	.word	0x20002b96
     af0:	96f3b83d 	.word	0x96f3b83d
     af4:	20000194 	.word	0x20000194
     af8:	00008fae 	.word	0x00008fae
     afc:	00008fc0 	.word	0x00008fc0
     b00:	00008fb8 	.word	0x00008fb8

00000b04 <boot_swap_image>:
 *
 * @return                      0 on success; nonzero on failure.
 */
static int
boot_swap_image(struct boot_loader_state *state, struct boot_status *bs)
{
     b04:	b573      	push	{r0, r1, r4, r5, r6, lr}
     b06:	460d      	mov	r5, r1
     b08:	4604      	mov	r4, r0
    uint8_t image_index;
    int rc;

    /* FIXME: just do this if asked by user? */

    size = copy_size = 0;
     b0a:	2100      	movs	r1, #0
    image_index = BOOT_CURR_IMG(state);

    if (boot_status_is_reset(bs)) {
     b0c:	4628      	mov	r0, r5
    size = copy_size = 0;
     b0e:	e9cd 1100 	strd	r1, r1, [sp]
    if (boot_status_is_reset(bs)) {
     b12:	f004 ffff 	bl	5b14 <boot_status_is_reset>
     b16:	b330      	cbz	r0, b66 <boot_swap_image+0x62>
        /*
         * No swap ever happened, so need to find the largest image which
         * will be used to determine the amount of sectors to swap.
         */
        hdr = boot_img_hdr(state, BOOT_PRIMARY_SLOT);
        if (hdr->ih_magic == IMAGE_MAGIC) {
     b18:	4e16      	ldr	r6, [pc, #88]	; (b74 <boot_swap_image+0x70>)
     b1a:	6822      	ldr	r2, [r4, #0]
     b1c:	42b2      	cmp	r2, r6
     b1e:	d103      	bne.n	b28 <boot_swap_image+0x24>
            rc = boot_read_image_size(state, BOOT_PRIMARY_SLOT, &copy_size);
     b20:	aa01      	add	r2, sp, #4
     b22:	4620      	mov	r0, r4
     b24:	f004 ff6c 	bl	5a00 <boot_read_image_size>
            memset(bs->enckey[0], 0xff, BOOT_ENC_KEY_SIZE);
        }
#endif

        hdr = boot_img_hdr(state, BOOT_SECONDARY_SLOT);
        if (hdr->ih_magic == IMAGE_MAGIC) {
     b28:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
     b2a:	42b3      	cmp	r3, r6
     b2c:	d104      	bne.n	b38 <boot_swap_image+0x34>
            rc = boot_read_image_size(state, BOOT_SECONDARY_SLOT, &size);
     b2e:	466a      	mov	r2, sp
     b30:	2101      	movs	r1, #1
     b32:	4620      	mov	r0, r4
     b34:	f004 ff64 	bl	5a00 <boot_read_image_size>
        } else {
            memset(bs->enckey[1], 0xff, BOOT_ENC_KEY_SIZE);
        }
#endif

        if (size > copy_size) {
     b38:	e9dd 3200 	ldrd	r3, r2, [sp]
     b3c:	4293      	cmp	r3, r2
            copy_size = size;
     b3e:	bf88      	it	hi
     b40:	9301      	strhi	r3, [sp, #4]
        }

        bs->swap_size = copy_size;
     b42:	9b01      	ldr	r3, [sp, #4]
     b44:	60ab      	str	r3, [r5, #8]
            }
        }
#endif
    }

    swap_run(state, bs, copy_size);
     b46:	9a01      	ldr	r2, [sp, #4]
     b48:	4629      	mov	r1, r5
     b4a:	4620      	mov	r0, r4
     b4c:	f000 fb34 	bl	11b8 <swap_run>

#ifdef MCUBOOT_VALIDATE_PRIMARY_SLOT
    extern int boot_status_fails;
    if (boot_status_fails > 0) {
     b50:	4b09      	ldr	r3, [pc, #36]	; (b78 <boot_swap_image+0x74>)
     b52:	681a      	ldr	r2, [r3, #0]
     b54:	2a00      	cmp	r2, #0
     b56:	dd03      	ble.n	b60 <boot_swap_image+0x5c>
        BOOT_LOG_WRN("%d status write fails performing the swap",
     b58:	4808      	ldr	r0, [pc, #32]	; (b7c <boot_swap_image+0x78>)
     b5a:	2157      	movs	r1, #87	; 0x57
     b5c:	f005 f9fa 	bl	5f54 <z_log_minimal_printk>
                     boot_status_fails);
    }
#endif

    return 0;
}
     b60:	2000      	movs	r0, #0
     b62:	b002      	add	sp, #8
     b64:	bd70      	pop	{r4, r5, r6, pc}
        rc = boot_read_swap_size(image_index, &bs->swap_size);
     b66:	f105 0108 	add.w	r1, r5, #8
     b6a:	f7ff ff0b 	bl	984 <boot_read_swap_size>
        copy_size = bs->swap_size;
     b6e:	68ab      	ldr	r3, [r5, #8]
     b70:	9301      	str	r3, [sp, #4]
     b72:	e7e8      	b.n	b46 <boot_swap_image+0x42>
     b74:	96f3b83d 	.word	0x96f3b83d
     b78:	20000df8 	.word	0x20000df8
     b7c:	00008fe8 	.word	0x00008fe8

00000b80 <boot_copy_region>:
{
     b80:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
        rc = flash_area_read(fap_src, off_src + bytes_copied, buf, chunk_sz);
     b84:	f8df b078 	ldr.w	fp, [pc, #120]	; c00 <boot_copy_region+0x80>
     b88:	4c1b      	ldr	r4, [pc, #108]	; (bf8 <boot_copy_region+0x78>)
     b8a:	4d1c      	ldr	r5, [pc, #112]	; (bfc <boot_copy_region+0x7c>)
{
     b8c:	4688      	mov	r8, r1
     b8e:	4691      	mov	r9, r2
     b90:	469a      	mov	sl, r3
    bytes_copied = 0;
     b92:	2600      	movs	r6, #0
    while (bytes_copied < sz) {
     b94:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
     b96:	429e      	cmp	r6, r3
     b98:	d301      	bcc.n	b9e <boot_copy_region+0x1e>
    return 0;
     b9a:	2000      	movs	r0, #0
     b9c:	e00f      	b.n	bbe <boot_copy_region+0x3e>
        if (sz - bytes_copied > sizeof buf) {
     b9e:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
        rc = flash_area_read(fap_src, off_src + bytes_copied, buf, chunk_sz);
     ba0:	4a17      	ldr	r2, [pc, #92]	; (c00 <boot_copy_region+0x80>)
        if (sz - bytes_copied > sizeof buf) {
     ba2:	1b9f      	subs	r7, r3, r6
     ba4:	f5b7 6f80 	cmp.w	r7, #1024	; 0x400
     ba8:	bf28      	it	cs
     baa:	f44f 6780 	movcs.w	r7, #1024	; 0x400
        rc = flash_area_read(fap_src, off_src + bytes_copied, buf, chunk_sz);
     bae:	463b      	mov	r3, r7
     bb0:	eb06 010a 	add.w	r1, r6, sl
     bb4:	4640      	mov	r0, r8
     bb6:	f005 f9db 	bl	5f70 <flash_area_read>
        if (rc != 0) {
     bba:	b110      	cbz	r0, bc2 <boot_copy_region+0x42>
            return BOOT_EFLASH;
     bbc:	2001      	movs	r0, #1
}
     bbe:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
        rc = flash_area_write(fap_dst, off_dst + bytes_copied, buf, chunk_sz);
     bc2:	990a      	ldr	r1, [sp, #40]	; 0x28
     bc4:	463b      	mov	r3, r7
     bc6:	465a      	mov	r2, fp
     bc8:	1871      	adds	r1, r6, r1
     bca:	4648      	mov	r0, r9
     bcc:	f005 f9ec 	bl	5fa8 <flash_area_write>
        if (rc != 0) {
     bd0:	2800      	cmp	r0, #0
     bd2:	d1f3      	bne.n	bbc <boot_copy_region+0x3c>
     bd4:	f8c4 5600 	str.w	r5, [r4, #1536]	; 0x600
        bytes_copied += chunk_sz;
     bd8:	443e      	add	r6, r7
     bda:	f8c4 5604 	str.w	r5, [r4, #1540]	; 0x604
     bde:	f8c4 5608 	str.w	r5, [r4, #1544]	; 0x608
     be2:	f8c4 560c 	str.w	r5, [r4, #1548]	; 0x60c
     be6:	f8c4 5610 	str.w	r5, [r4, #1552]	; 0x610
     bea:	f8c4 5614 	str.w	r5, [r4, #1556]	; 0x614
     bee:	f8c4 5618 	str.w	r5, [r4, #1560]	; 0x618
     bf2:	f8c4 561c 	str.w	r5, [r4, #1564]	; 0x61c
        MCUBOOT_WATCHDOG_FEED();
     bf6:	e7cd      	b.n	b94 <boot_copy_region+0x14>
     bf8:	40010000 	.word	0x40010000
     bfc:	6e524635 	.word	0x6e524635
     c00:	200001f8 	.word	0x200001f8

00000c04 <context_boot_go>:
#endif
}

fih_int
context_boot_go(struct boot_loader_state *state, struct boot_rsp *rsp)
{
     c04:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
    size_t slot;
    struct boot_status bs;
    int rc = -1;
    fih_int fih_rc = FIH_FAILURE;
     c08:	4b8e      	ldr	r3, [pc, #568]	; (e44 <FIH_LABEL_FIH_CALL_END_2434+0x46>)
     c0a:	681e      	ldr	r6, [r3, #0]
        boot_enc_zeroize(BOOT_CURR_ENC(state));
#endif

        image_index = BOOT_CURR_IMG(state);

        BOOT_IMG(state, BOOT_PRIMARY_SLOT).sectors =
     c0c:	4b8e      	ldr	r3, [pc, #568]	; (e48 <FIH_LABEL_FIH_CALL_END_2434+0x4a>)
     c0e:	6243      	str	r3, [r0, #36]	; 0x24
{
     c10:	460f      	mov	r7, r1
            primary_slot_sectors[image_index];
        BOOT_IMG(state, BOOT_SECONDARY_SLOT).sectors =
     c12:	4b8e      	ldr	r3, [pc, #568]	; (e4c <FIH_LABEL_FIH_CALL_END_2434+0x4e>)
     c14:	6503      	str	r3, [r0, #80]	; 0x50

        /* Open primary and secondary image areas for the duration
         * of this call.
         */
        for (slot = 0; slot < BOOT_NUM_SLOTS; slot++) {
            fa_id = flash_area_id_from_multi_image_slot(image_index, slot);
     c16:	2100      	movs	r1, #0
{
     c18:	b085      	sub	sp, #20
     c1a:	4604      	mov	r4, r0
            fa_id = flash_area_id_from_multi_image_slot(image_index, slot);
     c1c:	4608      	mov	r0, r1
     c1e:	f004 fe19 	bl	5854 <flash_area_id_from_multi_image_slot>
            rc = flash_area_open(fa_id, &BOOT_IMG_AREA(state, slot));
     c22:	f104 0120 	add.w	r1, r4, #32
     c26:	b2c0      	uxtb	r0, r0
     c28:	f001 f85e 	bl	1ce8 <flash_area_open>
            fa_id = flash_area_id_from_multi_image_slot(image_index, slot);
     c2c:	2101      	movs	r1, #1
     c2e:	2000      	movs	r0, #0
     c30:	f004 fe10 	bl	5854 <flash_area_id_from_multi_image_slot>
            rc = flash_area_open(fa_id, &BOOT_IMG_AREA(state, slot));
     c34:	f104 014c 	add.w	r1, r4, #76	; 0x4c
     c38:	b2c0      	uxtb	r0, r0
     c3a:	f001 f855 	bl	1ce8 <flash_area_open>
     c3e:	4605      	mov	r5, r0
    rc = boot_read_sectors(state);
     c40:	4620      	mov	r0, r4
     c42:	f004 ff3d 	bl	5ac0 <boot_read_sectors>
    if (rc != 0) {
     c46:	4680      	mov	r8, r0
     c48:	b968      	cbnz	r0, c66 <context_boot_go+0x62>
    rc = boot_read_image_headers(state, false, NULL);
     c4a:	2200      	movs	r2, #0
     c4c:	4611      	mov	r1, r2
     c4e:	4620      	mov	r0, r4
     c50:	f004 ff1e 	bl	5a90 <boot_read_image_headers>
    if (rc != 0) {
     c54:	4680      	mov	r8, r0
     c56:	b300      	cbz	r0, c9a <context_boot_go+0x96>
        BOOT_LOG_WRN("Failed reading image headers; Image=%u",
     c58:	487d      	ldr	r0, [pc, #500]	; (e50 <FIH_LABEL_FIH_CALL_END_2434+0x52>)
     c5a:	2200      	movs	r2, #0
     c5c:	2157      	movs	r1, #87	; 0x57
            BOOT_LOG_WRN("Failed reading boot status; Image=%u",
     c5e:	f005 f979 	bl	5f54 <z_log_minimal_printk>
        BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE;
     c62:	2301      	movs	r3, #1
     c64:	e091      	b.n	d8a <FIH_LABEL_FIH_CALL_END_2221+0xe>
        BOOT_LOG_WRN("Failed reading sectors; BOOT_MAX_IMG_SECTORS=%d"
     c66:	487b      	ldr	r0, [pc, #492]	; (e54 <FIH_LABEL_FIH_CALL_END_2434+0x56>)
     c68:	2280      	movs	r2, #128	; 0x80
     c6a:	2157      	movs	r1, #87	; 0x57
     c6c:	f005 f972 	bl	5f54 <z_log_minimal_printk>
        BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE;
     c70:	2301      	movs	r3, #1
        if (rc == BOOT_EFLASH)
     c72:	4598      	cmp	r8, r3
        BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE;
     c74:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
        if (rc == BOOT_EFLASH)
     c78:	d1e7      	bne.n	c4a <context_boot_go+0x46>
#endif

        /* Determine swap type and complete swap if it has been aborted. */
        boot_prepare_image_for_update(state, &bs);

        if (BOOT_IS_UPGRADE(BOOT_SWAP_TYPE(state))) {
     c7a:	f894 3058 	ldrb.w	r3, [r4, #88]	; 0x58
        /* Indicate that swap is not aborted */
        boot_status_reset(&bs);
#endif /* (BOOT_IMAGE_NUMBER > 1) */

        /* Set the previously determined swap type */
        bs.swap_type = BOOT_SWAP_TYPE(state);
     c7e:	f88d 3007 	strb.w	r3, [sp, #7]

        switch (BOOT_SWAP_TYPE(state)) {
     c82:	2b04      	cmp	r3, #4
     c84:	f200 8084 	bhi.w	d90 <FIH_LABEL_FIH_CALL_END_2221+0x14>
     c88:	2b01      	cmp	r3, #1
     c8a:	f200 8088 	bhi.w	d9e <FIH_LABEL_FIH_CALL_END_2221+0x22>
     c8e:	f000 809f 	beq.w	dd0 <FIH_LABEL_FIH_CALL_END_2221+0x54>
            }
#endif /* !MCUBOOT_OVERWRITE_ONLY */
            break;

        default:
            BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC;
     c92:	23ff      	movs	r3, #255	; 0xff
     c94:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
     c98:	e09a      	b.n	dd0 <FIH_LABEL_FIH_CALL_END_2221+0x54>
    if (boot_slots_compatible(state)) {
     c9a:	4620      	mov	r0, r4
     c9c:	f000 f9a4 	bl	fe8 <boot_slots_compatible>
     ca0:	2800      	cmp	r0, #0
     ca2:	d0de      	beq.n	c62 <context_boot_go+0x5e>
        boot_status_reset(bs);
     ca4:	4668      	mov	r0, sp
     ca6:	f004 ff2c 	bl	5b02 <boot_status_reset>
        rc = swap_read_status(state, bs);
     caa:	4669      	mov	r1, sp
     cac:	4620      	mov	r0, r4
     cae:	f004 ffc7 	bl	5c40 <swap_read_status>
        if (rc != 0) {
     cb2:	b118      	cbz	r0, cbc <context_boot_go+0xb8>
            BOOT_LOG_WRN("Failed reading boot status; Image=%u",
     cb4:	4868      	ldr	r0, [pc, #416]	; (e58 <FIH_LABEL_FIH_CALL_END_2434+0x5a>)
     cb6:	4642      	mov	r2, r8
     cb8:	2157      	movs	r1, #87	; 0x57
     cba:	e7d0      	b.n	c5e <context_boot_go+0x5a>
        rc = boot_read_image_headers(state, !boot_status_is_reset(bs), bs);
     cbc:	4668      	mov	r0, sp
     cbe:	f004 ff29 	bl	5b14 <boot_status_is_reset>
     cc2:	f080 0101 	eor.w	r1, r0, #1
     cc6:	466a      	mov	r2, sp
     cc8:	b2c9      	uxtb	r1, r1
     cca:	4620      	mov	r0, r4
     ccc:	f004 fee0 	bl	5a90 <boot_read_image_headers>
        if (rc != 0) {
     cd0:	4602      	mov	r2, r0
     cd2:	2800      	cmp	r0, #0
     cd4:	d1c0      	bne.n	c58 <context_boot_go+0x54>
        if (!boot_status_is_reset(bs)) {
     cd6:	4668      	mov	r0, sp
     cd8:	f004 ff1c 	bl	5b14 <boot_status_is_reset>
     cdc:	4680      	mov	r8, r0
     cde:	bb60      	cbnz	r0, d3a <context_boot_go+0x136>
    rc = boot_swap_image(state, bs);
     ce0:	4669      	mov	r1, sp
     ce2:	4620      	mov	r0, r4
     ce4:	f7ff ff0e 	bl	b04 <boot_swap_image>
    BOOT_SWAP_TYPE(state) = bs->swap_type;
     ce8:	f89d 3007 	ldrb.w	r3, [sp, #7]
     cec:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
    if (bs->swap_type == BOOT_SWAP_TYPE_REVERT ||
     cf0:	3b03      	subs	r3, #3
     cf2:	2b01      	cmp	r3, #1
     cf4:	d806      	bhi.n	d04 <context_boot_go+0x100>
        rc = swap_set_image_ok(BOOT_CURR_IMG(state));
     cf6:	4640      	mov	r0, r8
     cf8:	f004 fff0 	bl	5cdc <swap_set_image_ok>
        if (rc != 0) {
     cfc:	b110      	cbz	r0, d04 <context_boot_go+0x100>
            BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC;
     cfe:	23ff      	movs	r3, #255	; 0xff
     d00:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
    if (BOOT_IS_UPGRADE(bs->swap_type)) {
     d04:	f89d 3007 	ldrb.w	r3, [sp, #7]
     d08:	3b02      	subs	r3, #2
     d0a:	2b02      	cmp	r3, #2
     d0c:	d80b      	bhi.n	d26 <context_boot_go+0x122>
        rc = swap_set_copy_done(BOOT_CURR_IMG(state));
     d0e:	2000      	movs	r0, #0
     d10:	f004 ffd2 	bl	5cb8 <swap_set_copy_done>
        if (rc != 0) {
     d14:	b138      	cbz	r0, d26 <context_boot_go+0x122>
            BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_PANIC;
     d16:	23ff      	movs	r3, #255	; 0xff
     d18:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
        BOOT_LOG_ERR("panic!");
     d1c:	484f      	ldr	r0, [pc, #316]	; (e5c <FIH_LABEL_FIH_CALL_END_2434+0x5e>)
     d1e:	2145      	movs	r1, #69	; 0x45
     d20:	f005 f918 	bl	5f54 <z_log_minimal_printk>
        while (1) {}
     d24:	e7fe      	b.n	d24 <context_boot_go+0x120>
    if (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_PANIC) {
     d26:	f894 3058 	ldrb.w	r3, [r4, #88]	; 0x58
     d2a:	2bff      	cmp	r3, #255	; 0xff
     d2c:	d0f6      	beq.n	d1c <context_boot_go+0x118>
            rc = boot_read_image_headers(state, false, bs);
     d2e:	466a      	mov	r2, sp
     d30:	2100      	movs	r1, #0
     d32:	4620      	mov	r0, r4
     d34:	f004 feac 	bl	5a90 <boot_read_image_headers>
            BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE;
     d38:	e793      	b.n	c62 <context_boot_go+0x5e>
            if (bs->swap_type == BOOT_SWAP_TYPE_NONE) {
     d3a:	f89d 9007 	ldrb.w	r9, [sp, #7]
     d3e:	f1b9 0f01 	cmp.w	r9, #1
     d42:	d117      	bne.n	d74 <FIH_LABEL_FIH_CALL_START_2201>
    swap_type = boot_swap_type_multi(BOOT_CURR_IMG(state));
     d44:	4610      	mov	r0, r2
     d46:	f003 f9ab 	bl	40a0 <boot_swap_type_multi>
    if (BOOT_IS_UPGRADE(swap_type)) {
     d4a:	1e83      	subs	r3, r0, #2
     d4c:	2b02      	cmp	r3, #2
    swap_type = boot_swap_type_multi(BOOT_CURR_IMG(state));
     d4e:	4680      	mov	r8, r0
    if (BOOT_IS_UPGRADE(swap_type)) {
     d50:	d80d      	bhi.n	d6e <FIH_LABEL_FIH_CALL_END_2136+0x14>

00000d52 <FIH_LABEL_FIH_CALL_START_2112>:
        FIH_CALL(boot_validate_slot, fih_rc, state, BOOT_SECONDARY_SLOT, bs);
     d52:	4649      	mov	r1, r9
     d54:	4620      	mov	r0, r4
     d56:	f7ff fe53 	bl	a00 <boot_validate_slot.isra.0>

00000d5a <FIH_LABEL_FIH_CALL_END_2136>:
        if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
     d5a:	4b41      	ldr	r3, [pc, #260]	; (e60 <FIH_LABEL_FIH_CALL_END_2434+0x62>)
     d5c:	681b      	ldr	r3, [r3, #0]
     d5e:	4298      	cmp	r0, r3
     d60:	d005      	beq.n	d6e <FIH_LABEL_FIH_CALL_END_2136+0x14>
                swap_type = BOOT_SWAP_TYPE_FAIL;
     d62:	2801      	cmp	r0, #1
     d64:	bf0c      	ite	eq
     d66:	f04f 0801 	moveq.w	r8, #1
     d6a:	f04f 0805 	movne.w	r8, #5
                BOOT_SWAP_TYPE(state) = boot_validated_swap_type(state, bs);
     d6e:	f884 8058 	strb.w	r8, [r4, #88]	; 0x58
     d72:	e782      	b.n	c7a <context_boot_go+0x76>

00000d74 <FIH_LABEL_FIH_CALL_START_2201>:
                FIH_CALL(boot_validate_slot, fih_rc,
     d74:	2101      	movs	r1, #1
     d76:	4620      	mov	r0, r4
     d78:	f7ff fe42 	bl	a00 <boot_validate_slot.isra.0>

00000d7c <FIH_LABEL_FIH_CALL_END_2221>:
                if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
     d7c:	4b38      	ldr	r3, [pc, #224]	; (e60 <FIH_LABEL_FIH_CALL_END_2434+0x62>)
     d7e:	681b      	ldr	r3, [r3, #0]
     d80:	4298      	cmp	r0, r3
                    BOOT_SWAP_TYPE(state) = bs->swap_type;
     d82:	bf0c      	ite	eq
     d84:	f89d 3007 	ldrbeq.w	r3, [sp, #7]
                    BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_FAIL;
     d88:	2305      	movne	r3, #5
        BOOT_SWAP_TYPE(state) = BOOT_SWAP_TYPE_NONE;
     d8a:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
     d8e:	e774      	b.n	c7a <context_boot_go+0x76>
        switch (BOOT_SWAP_TYPE(state)) {
     d90:	2b05      	cmp	r3, #5
     d92:	f47f af7e 	bne.w	c92 <context_boot_go+0x8e>
            rc = swap_set_image_ok(BOOT_CURR_IMG(state));
     d96:	2000      	movs	r0, #0
     d98:	f004 ffa0 	bl	5cdc <swap_set_image_ok>
     d9c:	e013      	b.n	dc6 <FIH_LABEL_FIH_CALL_END_2221+0x4a>
        rc = boot_swap_image(state, bs);
     d9e:	4669      	mov	r1, sp
     da0:	4620      	mov	r0, r4
     da2:	f7ff feaf 	bl	b04 <boot_swap_image>
    swap_type = BOOT_SWAP_TYPE(state);
     da6:	f894 3058 	ldrb.w	r3, [r4, #88]	; 0x58
    if (swap_type == BOOT_SWAP_TYPE_REVERT ||
     daa:	1eda      	subs	r2, r3, #3
     dac:	2a01      	cmp	r2, #1
        rc = boot_swap_image(state, bs);
     dae:	4605      	mov	r5, r0
    if (swap_type == BOOT_SWAP_TYPE_REVERT ||
     db0:	d80c      	bhi.n	dcc <FIH_LABEL_FIH_CALL_END_2221+0x50>
        rc = swap_set_image_ok(BOOT_CURR_IMG(state));
     db2:	2000      	movs	r0, #0
     db4:	f004 ff92 	bl	5cdc <swap_set_image_ok>
        if (rc != 0) {
     db8:	4605      	mov	r5, r0
     dba:	2800      	cmp	r0, #0
     dbc:	f47f af69 	bne.w	c92 <context_boot_go+0x8e>
        rc = swap_set_copy_done(BOOT_CURR_IMG(state));
     dc0:	2000      	movs	r0, #0
     dc2:	f004 ff79 	bl	5cb8 <swap_set_copy_done>
            if (rc != 0) {
     dc6:	4605      	mov	r5, r0
     dc8:	b110      	cbz	r0, dd0 <FIH_LABEL_FIH_CALL_END_2221+0x54>
     dca:	e762      	b.n	c92 <context_boot_go+0x8e>
    if (BOOT_IS_UPGRADE(swap_type)) {
     dcc:	2b02      	cmp	r3, #2
     dce:	d0f7      	beq.n	dc0 <FIH_LABEL_FIH_CALL_END_2221+0x44>
        }

        if (BOOT_SWAP_TYPE(state) == BOOT_SWAP_TYPE_PANIC) {
     dd0:	f894 3058 	ldrb.w	r3, [r4, #88]	; 0x58
     dd4:	2bff      	cmp	r3, #255	; 0xff
     dd6:	d104      	bne.n	de2 <FIH_LABEL_FIH_CALL_END_2221+0x66>
            BOOT_LOG_ERR("panic!");
     dd8:	4820      	ldr	r0, [pc, #128]	; (e5c <FIH_LABEL_FIH_CALL_END_2434+0x5e>)
     dda:	2145      	movs	r1, #69	; 0x45
     ddc:	f005 f8ba 	bl	5f54 <z_log_minimal_printk>
            assert(0);

            /* Loop forever... */
            FIH_PANIC;
     de0:	e7fe      	b.n	de0 <FIH_LABEL_FIH_CALL_END_2221+0x64>
#if BOOT_IMAGE_NUMBER > 1
        if (state->img_mask[BOOT_CURR_IMG(state)]) {
            continue;
        }
#endif
        if (BOOT_SWAP_TYPE(state) != BOOT_SWAP_TYPE_NONE) {
     de2:	2b01      	cmp	r3, #1
     de4:	d006      	beq.n	df4 <FIH_LABEL_FIH_CALL_START_2418>
            /* Attempt to read an image header from each slot. Ensure that image
             * headers in slots are aligned with headers in boot_data.
             */
            rc = boot_read_image_headers(state, false, &bs);
     de6:	466a      	mov	r2, sp
     de8:	2100      	movs	r1, #0
     dea:	4620      	mov	r0, r4
     dec:	f004 fe50 	bl	5a90 <boot_read_image_headers>
            if (rc != 0) {
     df0:	4605      	mov	r5, r0
     df2:	b9d0      	cbnz	r0, e2a <FIH_LABEL_FIH_CALL_END_2434+0x2c>

00000df4 <FIH_LABEL_FIH_CALL_START_2418>:
	 * primary.
	 */
	if (BOOT_CURR_IMG(state) == 0)
#endif
	{
            FIH_CALL(boot_validate_slot, fih_rc, state, BOOT_PRIMARY_SLOT, NULL);
     df4:	2100      	movs	r1, #0
     df6:	4620      	mov	r0, r4
     df8:	f7ff fe02 	bl	a00 <boot_validate_slot.isra.0>
     dfc:	4606      	mov	r6, r0

00000dfe <FIH_LABEL_FIH_CALL_END_2434>:
            if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
     dfe:	f8df 8060 	ldr.w	r8, [pc, #96]	; e60 <FIH_LABEL_FIH_CALL_END_2434+0x62>
     e02:	f8d8 3000 	ldr.w	r3, [r8]
     e06:	4298      	cmp	r0, r3
     e08:	d10f      	bne.n	e2a <FIH_LABEL_FIH_CALL_END_2434+0x2c>
    /*
     * Since the boot_status struct stores plaintext encryption keys, reset
     * them here to avoid the possibility of jumping into an image that could
     * easily recover them.
     */
    memset(&bs, 0, sizeof(struct boot_status));
     e0a:	2210      	movs	r2, #16
     e0c:	2100      	movs	r1, #0
     e0e:	4668      	mov	r0, sp
     e10:	f005 fc37 	bl	6682 <memset>
    rsp->br_flash_dev_id = flash_area_get_device_id(BOOT_IMG_AREA(state, active_slot));
     e14:	6a20      	ldr	r0, [r4, #32]
     e16:	f004 fd26 	bl	5866 <flash_area_get_device_id>
     e1a:	7138      	strb	r0, [r7, #4]
 * Offset of the slot from the beginning of the flash device.
 */
static inline uint32_t
boot_img_slot_off(struct boot_loader_state *state, size_t slot)
{
    return flash_area_get_off(BOOT_IMG(state, slot).area);
     e1c:	6a23      	ldr	r3, [r4, #32]

    fill_rsp(state, rsp);

    fih_rc = FIH_SUCCESS;
     e1e:	f8d8 6000 	ldr.w	r6, [r8]
    rsp->br_image_off = boot_img_slot_off(state, active_slot);
     e22:	685b      	ldr	r3, [r3, #4]
     e24:	60bb      	str	r3, [r7, #8]
    rsp->br_hdr = boot_img_hdr(state, active_slot);
     e26:	603c      	str	r4, [r7, #0]
        rc = boot_add_shared_data(state, BOOT_PRIMARY_SLOT);
     e28:	2500      	movs	r5, #0
            flash_area_close(BOOT_IMG_AREA(state, BOOT_NUM_SLOTS - 1 - slot));
     e2a:	6ce0      	ldr	r0, [r4, #76]	; 0x4c
     e2c:	f005 f89f 	bl	5f6e <flash_area_close>
     e30:	6a20      	ldr	r0, [r4, #32]
     e32:	f005 f89c 	bl	5f6e <flash_area_close>
    if (rc) {
        fih_rc = fih_int_encode(rc);
    }

    FIH_RET(fih_rc);
}
     e36:	2d00      	cmp	r5, #0
     e38:	bf14      	ite	ne
     e3a:	4628      	movne	r0, r5
     e3c:	4630      	moveq	r0, r6
     e3e:	b005      	add	sp, #20
     e40:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
     e44:	20000000 	.word	0x20000000
     e48:	200005f8 	.word	0x200005f8
     e4c:	200009f8 	.word	0x200009f8
     e50:	00009059 	.word	0x00009059
     e54:	00009017 	.word	0x00009017
     e58:	00009085 	.word	0x00009085
     e5c:	000090af 	.word	0x000090af
     e60:	20000194 	.word	0x20000194

00000e64 <boot_go>:
 *
 * @return                      FIH_SUCCESS on success; nonzero on failure.
 */
fih_int
boot_go(struct boot_rsp *rsp)
{
     e64:	b538      	push	{r3, r4, r5, lr}
void boot_state_clear(struct boot_loader_state *state)
{
    if (state != NULL) {
        memset(state, 0, sizeof(struct boot_loader_state));
    } else {
        memset(&boot_data, 0, sizeof(struct boot_loader_state));
     e66:	4d06      	ldr	r5, [pc, #24]	; (e80 <FIH_LABEL_FIH_CALL_END_3111+0x4>)
{
     e68:	4604      	mov	r4, r0
        memset(&boot_data, 0, sizeof(struct boot_loader_state));
     e6a:	2260      	movs	r2, #96	; 0x60
     e6c:	2100      	movs	r1, #0
     e6e:	4628      	mov	r0, r5
     e70:	f005 fc07 	bl	6682 <memset>

00000e74 <FIH_LABEL_FIH_CALL_START_3096>:
    FIH_CALL(context_boot_go, fih_rc, &boot_data, rsp);
     e74:	4621      	mov	r1, r4
     e76:	4628      	mov	r0, r5
     e78:	f7ff fec4 	bl	c04 <context_boot_go>

00000e7c <FIH_LABEL_FIH_CALL_END_3111>:
}
     e7c:	bd38      	pop	{r3, r4, r5, pc}
     e7e:	bf00      	nop
     e80:	20000198 	.word	0x20000198

00000e84 <boot_read_image_header>:
static uint32_t g_last_idx = UINT32_MAX;

int
boot_read_image_header(struct boot_loader_state *state, int slot,
                       struct image_header *out_hdr, struct boot_status *bs)
{
     e84:	b573      	push	{r0, r1, r4, r5, r6, lr}
     e86:	4616      	mov	r6, r2
#if (BOOT_IMAGE_NUMBER == 1)
    (void)state;
#endif

    off = 0;
    if (bs) {
     e88:	461c      	mov	r4, r3
     e8a:	b333      	cbz	r3, eda <boot_read_image_header+0x56>

static inline size_t
boot_img_sector_size(const struct boot_loader_state *state,
                     size_t slot, size_t sector)
{
    return flash_sector_get_size(&BOOT_IMG(state, slot).sectors[sector]);
     e8c:	6a43      	ldr	r3, [r0, #36]	; 0x24
     e8e:	685d      	ldr	r5, [r3, #4]
        sz = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, 0);
        if (bs->op == BOOT_STATUS_OP_MOVE) {
     e90:	7963      	ldrb	r3, [r4, #5]
     e92:	2b01      	cmp	r3, #1
     e94:	d115      	bne.n	ec2 <boot_read_image_header+0x3e>
            if (slot == 0 && bs->idx > g_last_idx) {
     e96:	bb01      	cbnz	r1, eda <boot_read_image_header+0x56>
     e98:	4b1f      	ldr	r3, [pc, #124]	; (f18 <boot_read_image_header+0x94>)
     e9a:	6822      	ldr	r2, [r4, #0]
     e9c:	681b      	ldr	r3, [r3, #0]
    off = 0;
     e9e:	429a      	cmp	r2, r3
     ea0:	bf98      	it	ls
     ea2:	2500      	movls	r5, #0
                }
            }
        }
    }

    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
     ea4:	2000      	movs	r0, #0
     ea6:	f004 fcd5 	bl	5854 <flash_area_id_from_multi_image_slot>
    rc = flash_area_open(area_id, &fap);
     eaa:	a901      	add	r1, sp, #4
     eac:	b2c0      	uxtb	r0, r0
     eae:	f000 ff1b 	bl	1ce8 <flash_area_open>
    if (rc != 0) {
     eb2:	b1f0      	cbz	r0, ef2 <boot_read_image_header+0x6e>
        rc = BOOT_EFLASH;
     eb4:	2501      	movs	r5, #1
    }

    rc = 0;

done:
    flash_area_close(fap);
     eb6:	9801      	ldr	r0, [sp, #4]
     eb8:	f005 f859 	bl	5f6e <flash_area_close>
    return rc;
}
     ebc:	4628      	mov	r0, r5
     ebe:	b002      	add	sp, #8
     ec0:	bd70      	pop	{r4, r5, r6, pc}
        } else if (bs->op == BOOT_STATUS_OP_SWAP) {
     ec2:	2b02      	cmp	r3, #2
     ec4:	d109      	bne.n	eda <boot_read_image_header+0x56>
            if (bs->idx > 1 && bs->idx <= g_last_idx) {
     ec6:	6823      	ldr	r3, [r4, #0]
     ec8:	2b01      	cmp	r3, #1
     eca:	d908      	bls.n	ede <boot_read_image_header+0x5a>
     ecc:	4a12      	ldr	r2, [pc, #72]	; (f18 <boot_read_image_header+0x94>)
     ece:	6812      	ldr	r2, [r2, #0]
     ed0:	4293      	cmp	r3, r2
     ed2:	d802      	bhi.n	eda <boot_read_image_header+0x56>
                if (slot == 0) {
     ed4:	fab1 f181 	clz	r1, r1
     ed8:	0949      	lsrs	r1, r1, #5
    off = 0;
     eda:	2500      	movs	r5, #0
     edc:	e7e2      	b.n	ea4 <boot_read_image_header+0x20>
            } else if (bs->idx == 1) {
     ede:	d1fc      	bne.n	eda <boot_read_image_header+0x56>
                if (slot == 0) {
     ee0:	2900      	cmp	r1, #0
     ee2:	d0df      	beq.n	ea4 <boot_read_image_header+0x20>
                if (slot == 1 && bs->state == 2) {
     ee4:	2901      	cmp	r1, #1
     ee6:	d1f8      	bne.n	eda <boot_read_image_header+0x56>
     ee8:	7921      	ldrb	r1, [r4, #4]
     eea:	3902      	subs	r1, #2
     eec:	bf18      	it	ne
     eee:	2101      	movne	r1, #1
     ef0:	e7f3      	b.n	eda <boot_read_image_header+0x56>
    rc = flash_area_read(fap, off, out_hdr, sizeof *out_hdr);
     ef2:	4629      	mov	r1, r5
     ef4:	9801      	ldr	r0, [sp, #4]
     ef6:	2320      	movs	r3, #32
     ef8:	4632      	mov	r2, r6
     efa:	f005 f839 	bl	5f70 <flash_area_read>
    if (rc != 0) {
     efe:	4605      	mov	r5, r0
     f00:	2800      	cmp	r0, #0
     f02:	d1d7      	bne.n	eb4 <boot_read_image_header+0x30>
    if (bs != NULL && out_hdr->ih_magic != IMAGE_MAGIC) {
     f04:	2c00      	cmp	r4, #0
     f06:	d0d6      	beq.n	eb6 <boot_read_image_header+0x32>
     f08:	6835      	ldr	r5, [r6, #0]
     f0a:	4804      	ldr	r0, [pc, #16]	; (f1c <boot_read_image_header+0x98>)
     f0c:	1a2d      	subs	r5, r5, r0
     f0e:	bf18      	it	ne
     f10:	f04f 35ff 	movne.w	r5, #4294967295
     f14:	e7cf      	b.n	eb6 <boot_read_image_header+0x32>
     f16:	bf00      	nop
     f18:	20000004 	.word	0x20000004
     f1c:	96f3b83d 	.word	0x96f3b83d

00000f20 <swap_read_status_bytes>:

int
swap_read_status_bytes(const struct flash_area *fap,
        struct boot_loader_state *state, struct boot_status *bs)
{
     f20:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
     f24:	4607      	mov	r7, r0
     f26:	b085      	sub	sp, #20
     f28:	460c      	mov	r4, r1
    int rc;
    int last_rc;
    int erased_sections;
    int i;

    max_entries = boot_status_entries(BOOT_CURR_IMG(state), fap);
     f2a:	4601      	mov	r1, r0
     f2c:	2000      	movs	r0, #0
{
     f2e:	4616      	mov	r6, r2
    max_entries = boot_status_entries(BOOT_CURR_IMG(state), fap);
     f30:	f004 fd39 	bl	59a6 <boot_status_entries>
    if (max_entries < 0) {
     f34:	1e05      	subs	r5, r0, #0
     f36:	db51      	blt.n	fdc <swap_read_status_bytes+0xbc>
    erased_sections = 0;
    found_idx = -1;
    /* skip erased sectors at the end */
    last_rc = 1;
    write_sz = BOOT_WRITE_SZ(state);
    off = boot_status_off(fap);
     f38:	4638      	mov	r0, r7
    write_sz = BOOT_WRITE_SZ(state);
     f3a:	6de4      	ldr	r4, [r4, #92]	; 0x5c
    off = boot_status_off(fap);
     f3c:	f004 fd40 	bl	59c0 <boot_status_off>
    for (i = max_entries; i > 0; i--) {
     f40:	fa5f f984 	uxtb.w	r9, r4
     f44:	f105 38ff 	add.w	r8, r5, #4294967295
     f48:	fb09 0808 	mla	r8, r9, r8, r0
    erased_sections = 0;
     f4c:	f04f 0a00 	mov.w	sl, #0
    last_rc = 1;
     f50:	f04f 0b01 	mov.w	fp, #1
    found_idx = -1;
     f54:	f04f 34ff 	mov.w	r4, #4294967295
    for (i = max_entries; i > 0; i--) {
     f58:	b99d      	cbnz	r5, f82 <swap_read_status_bytes+0x62>
            }
        }
        last_rc = rc;
    }

    if (erased_sections > 1) {
     f5a:	f1ba 0f01 	cmp.w	sl, #1
     f5e:	dd03      	ble.n	f68 <swap_read_status_bytes+0x48>
        /* This means there was an error writing status on the last
         * swap. Tell user and move on to validation!
         */
#if !defined(__BOOTSIM__)
        BOOT_LOG_ERR("Detected inconsistent status!");
     f60:	4820      	ldr	r0, [pc, #128]	; (fe4 <swap_read_status_bytes+0xc4>)
     f62:	2145      	movs	r1, #69	; 0x45
     f64:	f004 fff6 	bl	5f54 <z_log_minimal_printk>
        assert(0);
#endif
    }

    move_entries = BOOT_MAX_IMG_SECTORS * BOOT_STATUS_MOVE_STATE_COUNT;
    if (found_idx == -1) {
     f68:	1c63      	adds	r3, r4, #1
     f6a:	d006      	beq.n	f7a <swap_read_status_bytes+0x5a>
        /* no swap status found; nothing to do */
    } else if (found_idx < move_entries) {
     f6c:	2c7f      	cmp	r4, #127	; 0x7f
     f6e:	dc2a      	bgt.n	fc6 <swap_read_status_bytes+0xa6>
        bs->op = BOOT_STATUS_OP_MOVE;
        bs->idx = (found_idx  / BOOT_STATUS_MOVE_STATE_COUNT) + BOOT_STATUS_IDX_0;
     f70:	3401      	adds	r4, #1
        bs->state = (found_idx % BOOT_STATUS_MOVE_STATE_COUNT) + BOOT_STATUS_STATE_0;;
     f72:	f240 1301 	movw	r3, #257	; 0x101
        bs->idx = (found_idx  / BOOT_STATUS_MOVE_STATE_COUNT) + BOOT_STATUS_IDX_0;
     f76:	6034      	str	r4, [r6, #0]
        bs->state = (found_idx % BOOT_STATUS_MOVE_STATE_COUNT) + BOOT_STATUS_STATE_0;;
     f78:	80b3      	strh	r3, [r6, #4]
        bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0;
        bs->state = ((found_idx - move_entries) % BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_STATE_0;
    }

    return 0;
}
     f7a:	4628      	mov	r0, r5
     f7c:	b005      	add	sp, #20
     f7e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
        rc = flash_area_read(fap, off + (i - 1) * write_sz, &status, 1);
     f82:	1e6b      	subs	r3, r5, #1
     f84:	9300      	str	r3, [sp, #0]
     f86:	f10d 020f 	add.w	r2, sp, #15
     f8a:	2301      	movs	r3, #1
     f8c:	4641      	mov	r1, r8
     f8e:	4638      	mov	r0, r7
     f90:	f004 ffee 	bl	5f70 <flash_area_read>
        if (rc < 0) {
     f94:	1e03      	subs	r3, r0, #0
     f96:	9301      	str	r3, [sp, #4]
     f98:	db22      	blt.n	fe0 <swap_read_status_bytes+0xc0>
        if (bootutil_buffer_is_erased(fap, &status, 1)) {
     f9a:	2201      	movs	r2, #1
     f9c:	f10d 010f 	add.w	r1, sp, #15
     fa0:	4638      	mov	r0, r7
     fa2:	f005 feb2 	bl	6d0a <bootutil_buffer_is_erased>
     fa6:	9b01      	ldr	r3, [sp, #4]
     fa8:	b140      	cbz	r0, fbc <swap_read_status_bytes+0x9c>
            if (rc != last_rc) {
     faa:	455b      	cmp	r3, fp
     fac:	d001      	beq.n	fb2 <swap_read_status_bytes+0x92>
                erased_sections++;
     fae:	f10a 0a01 	add.w	sl, sl, #1
            if (found_idx == -1) {
     fb2:	9d00      	ldr	r5, [sp, #0]
     fb4:	eba8 0809 	sub.w	r8, r8, r9
     fb8:	469b      	mov	fp, r3
     fba:	e7cd      	b.n	f58 <swap_read_status_bytes+0x38>
     fbc:	f1b4 3fff 	cmp.w	r4, #4294967295
     fc0:	bf08      	it	eq
     fc2:	462c      	moveq	r4, r5
     fc4:	e7f5      	b.n	fb2 <swap_read_status_bytes+0x92>
        bs->op = BOOT_STATUS_OP_SWAP;
     fc6:	2302      	movs	r3, #2
        bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0;
     fc8:	3c80      	subs	r4, #128	; 0x80
        bs->op = BOOT_STATUS_OP_SWAP;
     fca:	7173      	strb	r3, [r6, #5]
        bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0;
     fcc:	1063      	asrs	r3, r4, #1
        bs->state = ((found_idx - move_entries) % BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_STATE_0;
     fce:	f004 0401 	and.w	r4, r4, #1
        bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0;
     fd2:	3301      	adds	r3, #1
        bs->state = ((found_idx - move_entries) % BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_STATE_0;
     fd4:	3401      	adds	r4, #1
        bs->idx = ((found_idx - move_entries) / BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_IDX_0;
     fd6:	6033      	str	r3, [r6, #0]
        bs->state = ((found_idx - move_entries) % BOOT_STATUS_SWAP_STATE_COUNT) + BOOT_STATUS_STATE_0;
     fd8:	7134      	strb	r4, [r6, #4]
     fda:	e7ce      	b.n	f7a <swap_read_status_bytes+0x5a>
        return BOOT_EBADARGS;
     fdc:	2507      	movs	r5, #7
     fde:	e7cc      	b.n	f7a <swap_read_status_bytes+0x5a>
            return BOOT_EFLASH;
     fe0:	2501      	movs	r5, #1
     fe2:	e7ca      	b.n	f7a <swap_read_status_bytes+0x5a>
     fe4:	000090bb 	.word	0x000090bb

00000fe8 <boot_slots_compatible>:
    return BOOT_IMG(state, slot).num_sectors;
     fe8:	6a81      	ldr	r1, [r0, #40]	; 0x28
     fea:	6d42      	ldr	r2, [r0, #84]	; 0x54
    size_t sector_sz_sec = 0;
    size_t i;

    num_sectors_pri = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT);
    num_sectors_sec = boot_img_num_sectors(state, BOOT_SECONDARY_SLOT);
    if ((num_sectors_pri != num_sectors_sec) &&
     fec:	428a      	cmp	r2, r1
{
     fee:	b538      	push	{r3, r4, r5, lr}
    if ((num_sectors_pri != num_sectors_sec) &&
     ff0:	d008      	beq.n	1004 <CONFIG_FPROTECT_BLOCK_SIZE+0x4>
            (num_sectors_pri != (num_sectors_sec + 1))) {
     ff2:	1c53      	adds	r3, r2, #1
    if ((num_sectors_pri != num_sectors_sec) &&
     ff4:	428b      	cmp	r3, r1
     ff6:	d005      	beq.n	1004 <CONFIG_FPROTECT_BLOCK_SIZE+0x4>
        BOOT_LOG_WRN("Cannot upgrade: not a compatible amount of sectors");
     ff8:	4813      	ldr	r0, [pc, #76]	; (1048 <CONFIG_FPROTECT_BLOCK_SIZE+0x48>)
     ffa:	2157      	movs	r1, #87	; 0x57

    for (i = 0; i < num_sectors_sec; i++) {
        sector_sz_pri = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, i);
        sector_sz_sec = boot_img_sector_size(state, BOOT_SECONDARY_SLOT, i);
        if (sector_sz_pri != sector_sz_sec) {
            BOOT_LOG_WRN("Cannot upgrade: not same sector layout");
     ffc:	f004 ffaa 	bl	5f54 <z_log_minimal_printk>
            return 0;
    1000:	2000      	movs	r0, #0
        }
    }

    return 1;
#endif /* PM_S1_ADDRESS */
}
    1002:	bd38      	pop	{r3, r4, r5, pc}
    if (num_sectors_pri > BOOT_MAX_IMG_SECTORS) {
    1004:	2980      	cmp	r1, #128	; 0x80
    1006:	d91c      	bls.n	1042 <CONFIG_FPROTECT_BLOCK_SIZE+0x42>
        BOOT_LOG_WRN("Cannot upgrade: more sectors than allowed");
    1008:	4810      	ldr	r0, [pc, #64]	; (104c <CONFIG_FPROTECT_BLOCK_SIZE+0x4c>)
    100a:	2157      	movs	r1, #87	; 0x57
    100c:	e7f6      	b.n	ffc <boot_slots_compatible+0x14>
    return flash_sector_get_size(&BOOT_IMG(state, slot).sectors[sector]);
    100e:	6a44      	ldr	r4, [r0, #36]	; 0x24
    1010:	6d05      	ldr	r5, [r0, #80]	; 0x50
    1012:	eb04 04c3 	add.w	r4, r4, r3, lsl #3
    1016:	eb05 05c3 	add.w	r5, r5, r3, lsl #3
    101a:	6864      	ldr	r4, [r4, #4]
        if (sector_sz_pri != sector_sz_sec) {
    101c:	686d      	ldr	r5, [r5, #4]
    101e:	42ac      	cmp	r4, r5
    1020:	d002      	beq.n	1028 <CONFIG_FPROTECT_BLOCK_SIZE+0x28>
            BOOT_LOG_WRN("Cannot upgrade: not same sector layout");
    1022:	480b      	ldr	r0, [pc, #44]	; (1050 <CONFIG_FPROTECT_BLOCK_SIZE+0x50>)
    1024:	2157      	movs	r1, #87	; 0x57
    1026:	e7e9      	b.n	ffc <boot_slots_compatible+0x14>
    for (i = 0; i < num_sectors_sec; i++) {
    1028:	3301      	adds	r3, #1
    102a:	429a      	cmp	r2, r3
    102c:	d1ef      	bne.n	100e <CONFIG_FPROTECT_BLOCK_SIZE+0xe>
    if (num_sectors_pri > num_sectors_sec) {
    102e:	4291      	cmp	r1, r2
    1030:	d905      	bls.n	103e <CONFIG_FPROTECT_BLOCK_SIZE+0x3e>
    1032:	6a43      	ldr	r3, [r0, #36]	; 0x24
    1034:	eb03 02c2 	add.w	r2, r3, r2, lsl #3
        if (sector_sz_pri != boot_img_sector_size(state, BOOT_PRIMARY_SLOT, i)) {
    1038:	6853      	ldr	r3, [r2, #4]
    103a:	42a3      	cmp	r3, r4
    103c:	d1f1      	bne.n	1022 <CONFIG_FPROTECT_BLOCK_SIZE+0x22>
    return 1;
    103e:	2001      	movs	r0, #1
    1040:	e7df      	b.n	1002 <CONFIG_FPROTECT_BLOCK_SIZE+0x2>
    for (i = 0; i < num_sectors_sec; i++) {
    1042:	2300      	movs	r3, #0
    size_t sector_sz_pri = 0;
    1044:	461c      	mov	r4, r3
    1046:	e7f0      	b.n	102a <CONFIG_FPROTECT_BLOCK_SIZE+0x2a>
    1048:	000090de 	.word	0x000090de
    104c:	00009116 	.word	0x00009116
    1050:	00009145 	.word	0x00009145

00001054 <swap_status_source>:
                 (state)->copy_done,                                \
                 (state)->image_ok)

int
swap_status_source(struct boot_loader_state *state)
{
    1054:	b500      	push	{lr}
    1056:	b089      	sub	sp, #36	; 0x24
    (void)state;
#endif

    image_index = BOOT_CURR_IMG(state);

    rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_PRIMARY(image_index),
    1058:	a904      	add	r1, sp, #16
    105a:	2002      	movs	r0, #2
    105c:	f005 feba 	bl	6dd4 <boot_read_swap_state_by_id>
            &state_primary_slot);
    assert(rc == 0);

    BOOT_LOG_SWAP_STATE("Primary image", &state_primary_slot);
    1060:	f89d 2010 	ldrb.w	r2, [sp, #16]
    1064:	2a01      	cmp	r2, #1
    1066:	d041      	beq.n	10ec <swap_status_source+0x98>
    1068:	4b25      	ldr	r3, [pc, #148]	; (1100 <swap_status_source+0xac>)
    106a:	4926      	ldr	r1, [pc, #152]	; (1104 <swap_status_source+0xb0>)
    106c:	2a03      	cmp	r2, #3
    106e:	bf18      	it	ne
    1070:	460b      	movne	r3, r1
    1072:	f89d 2013 	ldrb.w	r2, [sp, #19]
    1076:	9202      	str	r2, [sp, #8]
    1078:	f89d 2012 	ldrb.w	r2, [sp, #18]
    107c:	9201      	str	r2, [sp, #4]
    107e:	f89d 2011 	ldrb.w	r2, [sp, #17]
    1082:	4821      	ldr	r0, [pc, #132]	; (1108 <swap_status_source+0xb4>)
    1084:	9200      	str	r2, [sp, #0]
    1086:	2149      	movs	r1, #73	; 0x49
    1088:	4a20      	ldr	r2, [pc, #128]	; (110c <swap_status_source+0xb8>)
    108a:	f004 ff63 	bl	5f54 <z_log_minimal_printk>

    rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_SECONDARY(image_index),
    108e:	a906      	add	r1, sp, #24
    1090:	2005      	movs	r0, #5
    1092:	f005 fe9f 	bl	6dd4 <boot_read_swap_state_by_id>
            &state_secondary_slot);
    assert(rc == 0);

    BOOT_LOG_SWAP_STATE("Secondary image", &state_secondary_slot);
    1096:	f89d 2018 	ldrb.w	r2, [sp, #24]
    109a:	2a01      	cmp	r2, #1
    109c:	d028      	beq.n	10f0 <swap_status_source+0x9c>
    109e:	4b18      	ldr	r3, [pc, #96]	; (1100 <swap_status_source+0xac>)
    10a0:	4918      	ldr	r1, [pc, #96]	; (1104 <swap_status_source+0xb0>)
    10a2:	2a03      	cmp	r2, #3
    10a4:	bf18      	it	ne
    10a6:	460b      	movne	r3, r1
    10a8:	f89d 201b 	ldrb.w	r2, [sp, #27]
    10ac:	9202      	str	r2, [sp, #8]
    10ae:	f89d 201a 	ldrb.w	r2, [sp, #26]
    10b2:	9201      	str	r2, [sp, #4]
    10b4:	f89d 2019 	ldrb.w	r2, [sp, #25]
    10b8:	9200      	str	r2, [sp, #0]
    10ba:	4813      	ldr	r0, [pc, #76]	; (1108 <swap_status_source+0xb4>)
    10bc:	4a14      	ldr	r2, [pc, #80]	; (1110 <swap_status_source+0xbc>)
    10be:	2149      	movs	r1, #73	; 0x49
    10c0:	f004 ff48 	bl	5f54 <z_log_minimal_printk>

    if (state_primary_slot.magic == BOOT_MAGIC_GOOD &&
    10c4:	f89d 3010 	ldrb.w	r3, [sp, #16]
    10c8:	2b01      	cmp	r3, #1
    10ca:	d113      	bne.n	10f4 <swap_status_source+0xa0>
    10cc:	f89d 3012 	ldrb.w	r3, [sp, #18]
    10d0:	2b03      	cmp	r3, #3
    10d2:	d10f      	bne.n	10f4 <swap_status_source+0xa0>
            state_primary_slot.copy_done == BOOT_FLAG_UNSET &&
    10d4:	f89d 3018 	ldrb.w	r3, [sp, #24]
    10d8:	2b01      	cmp	r3, #1
    10da:	d00b      	beq.n	10f4 <swap_status_source+0xa0>
            state_secondary_slot.magic != BOOT_MAGIC_GOOD) {

        source = BOOT_STATUS_SOURCE_PRIMARY_SLOT;

        BOOT_LOG_INF("Boot source: primary slot");
    10dc:	480d      	ldr	r0, [pc, #52]	; (1114 <swap_status_source+0xc0>)
    10de:	2149      	movs	r1, #73	; 0x49
    10e0:	f004 ff38 	bl	5f54 <z_log_minimal_printk>
        return source;
    10e4:	2002      	movs	r0, #2
    }

    BOOT_LOG_INF("Boot source: none");
    return BOOT_STATUS_SOURCE_NONE;
}
    10e6:	b009      	add	sp, #36	; 0x24
    10e8:	f85d fb04 	ldr.w	pc, [sp], #4
    BOOT_LOG_SWAP_STATE("Primary image", &state_primary_slot);
    10ec:	4b0a      	ldr	r3, [pc, #40]	; (1118 <swap_status_source+0xc4>)
    10ee:	e7c0      	b.n	1072 <swap_status_source+0x1e>
    BOOT_LOG_SWAP_STATE("Secondary image", &state_secondary_slot);
    10f0:	4b09      	ldr	r3, [pc, #36]	; (1118 <swap_status_source+0xc4>)
    10f2:	e7d9      	b.n	10a8 <swap_status_source+0x54>
    BOOT_LOG_INF("Boot source: none");
    10f4:	4809      	ldr	r0, [pc, #36]	; (111c <swap_status_source+0xc8>)
    10f6:	2149      	movs	r1, #73	; 0x49
    10f8:	f004 ff2c 	bl	5f54 <z_log_minimal_printk>
    return BOOT_STATUS_SOURCE_NONE;
    10fc:	2000      	movs	r0, #0
    10fe:	e7f2      	b.n	10e6 <swap_status_source+0x92>
    1100:	00009176 	.word	0x00009176
    1104:	0000917c 	.word	0x0000917c
    1108:	0000918e 	.word	0x0000918e
    110c:	00009180 	.word	0x00009180
    1110:	000091cf 	.word	0x000091cf
    1114:	000091df 	.word	0x000091df
    1118:	00009171 	.word	0x00009171
    111c:	000091fe 	.word	0x000091fe

00001120 <fixup_revert>:
 * upgrade (by initializing the secondary slot).
 */
void
fixup_revert(const struct boot_loader_state *state, struct boot_status *bs,
        const struct flash_area *fap_sec)
{
    1120:	b570      	push	{r4, r5, r6, lr}
#if (BOOT_IMAGE_NUMBER == 1)
    (void)state;
#endif

    /* No fixup required */
    if (bs->swap_type != BOOT_SWAP_TYPE_REVERT ||
    1122:	684b      	ldr	r3, [r1, #4]
{
    1124:	4614      	mov	r4, r2
    if (bs->swap_type != BOOT_SWAP_TYPE_REVERT ||
    1126:	4a1e      	ldr	r2, [pc, #120]	; (11a0 <fixup_revert+0x80>)
    1128:	f003 23ff 	and.w	r3, r3, #4278255360	; 0xff00ff00
    112c:	4293      	cmp	r3, r2
{
    112e:	b086      	sub	sp, #24
    1130:	4606      	mov	r6, r0
    1132:	460d      	mov	r5, r1
    if (bs->swap_type != BOOT_SWAP_TYPE_REVERT ||
    1134:	d12f      	bne.n	1196 <fixup_revert+0x76>
        bs->op != BOOT_STATUS_OP_MOVE ||
    1136:	680b      	ldr	r3, [r1, #0]
    1138:	2b01      	cmp	r3, #1
    113a:	d12c      	bne.n	1196 <fixup_revert+0x76>
        bs->idx != BOOT_STATUS_IDX_0) {
        return;
    }

    rc = boot_read_swap_state(fap_sec, &swap_state);
    113c:	a904      	add	r1, sp, #16
    113e:	4620      	mov	r0, r4
    1140:	f002 ff5e 	bl	4000 <boot_read_swap_state>
    assert(rc == 0);

    BOOT_LOG_SWAP_STATE("Secondary image", &swap_state);
    1144:	f89d 2010 	ldrb.w	r2, [sp, #16]
    1148:	2a01      	cmp	r2, #1
    114a:	d026      	beq.n	119a <fixup_revert+0x7a>
    114c:	4b15      	ldr	r3, [pc, #84]	; (11a4 <fixup_revert+0x84>)
    114e:	4916      	ldr	r1, [pc, #88]	; (11a8 <fixup_revert+0x88>)
    1150:	2a03      	cmp	r2, #3
    1152:	bf18      	it	ne
    1154:	460b      	movne	r3, r1
    1156:	f89d 2013 	ldrb.w	r2, [sp, #19]
    115a:	9202      	str	r2, [sp, #8]
    115c:	f89d 2012 	ldrb.w	r2, [sp, #18]
    1160:	9201      	str	r2, [sp, #4]
    1162:	f89d 2011 	ldrb.w	r2, [sp, #17]
    1166:	9200      	str	r2, [sp, #0]
    1168:	4810      	ldr	r0, [pc, #64]	; (11ac <fixup_revert+0x8c>)
    116a:	4a11      	ldr	r2, [pc, #68]	; (11b0 <fixup_revert+0x90>)
    116c:	2149      	movs	r1, #73	; 0x49
    116e:	f004 fef1 	bl	5f54 <z_log_minimal_printk>

    if (swap_state.magic == BOOT_MAGIC_UNSET) {
    1172:	f89d 3010 	ldrb.w	r3, [sp, #16]
    1176:	2b03      	cmp	r3, #3
    1178:	d10d      	bne.n	1196 <fixup_revert+0x76>
        rc = swap_erase_trailer_sectors(state, fap_sec);
    117a:	4621      	mov	r1, r4
    117c:	4630      	mov	r0, r6
    117e:	f004 fd0a 	bl	5b96 <swap_erase_trailer_sectors>
        assert(rc == 0);

        rc = boot_write_image_ok(fap_sec);
    1182:	4620      	mov	r0, r4
    1184:	f005 fe1d 	bl	6dc2 <boot_write_image_ok>
        assert(rc == 0);

        rc = boot_write_swap_size(fap_sec, bs->swap_size);
    1188:	68a9      	ldr	r1, [r5, #8]
    118a:	4620      	mov	r0, r4
    118c:	f004 fc29 	bl	59e2 <boot_write_swap_size>
        assert(rc == 0);

        rc = boot_write_magic(fap_sec);
    1190:	4620      	mov	r0, r4
    1192:	f002 ff27 	bl	3fe4 <boot_write_magic>
        assert(rc == 0);
    }
}
    1196:	b006      	add	sp, #24
    1198:	bd70      	pop	{r4, r5, r6, pc}
    BOOT_LOG_SWAP_STATE("Secondary image", &swap_state);
    119a:	4b06      	ldr	r3, [pc, #24]	; (11b4 <fixup_revert+0x94>)
    119c:	e7db      	b.n	1156 <fixup_revert+0x36>
    119e:	bf00      	nop
    11a0:	04000100 	.word	0x04000100
    11a4:	00009176 	.word	0x00009176
    11a8:	0000917c 	.word	0x0000917c
    11ac:	0000918e 	.word	0x0000918e
    11b0:	000091cf 	.word	0x000091cf
    11b4:	00009171 	.word	0x00009171

000011b8 <swap_run>:

void
swap_run(struct boot_loader_state *state, struct boot_status *bs,
         uint32_t copy_size)
{
    11b8:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    11bc:	6a43      	ldr	r3, [r0, #36]	; 0x24
    11be:	460c      	mov	r4, r1
    11c0:	685e      	ldr	r6, [r3, #4]
    11c2:	b08b      	sub	sp, #44	; 0x2c
    11c4:	4605      	mov	r5, r0
    11c6:	2101      	movs	r1, #1
    uint8_t image_index;
    const struct flash_area *fap_pri;
    const struct flash_area *fap_sec;
    int rc;

    sz = 0;
    11c8:	2300      	movs	r3, #0
    g_last_idx = 0;

    sector_sz = boot_img_sector_size(state, BOOT_PRIMARY_SLOT, 0);
    while (1) {
        sz += sector_sz;
    11ca:	4433      	add	r3, r6
        /* Skip to next sector because all sectors will be moved up. */
        g_last_idx++;
        if (sz >= copy_size) {
    11cc:	429a      	cmp	r2, r3
    11ce:	4608      	mov	r0, r1
    11d0:	f101 0101 	add.w	r1, r1, #1
    11d4:	d8f9      	bhi.n	11ca <swap_run+0x12>
    11d6:	4f72      	ldr	r7, [pc, #456]	; (13a0 <swap_run+0x1e8>)
    11d8:	6038      	str	r0, [r7, #0]
    }

    /*
     * When starting a new swap upgrade, check that there is enough space.
     */
    if (boot_status_is_reset(bs)) {
    11da:	4620      	mov	r0, r4
    11dc:	f004 fc9a 	bl	5b14 <boot_status_is_reset>
    11e0:	9703      	str	r7, [sp, #12]
    11e2:	b1b8      	cbz	r0, 1214 <swap_run+0x5c>
        sz = 0;
        trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state));
    11e4:	6de8      	ldr	r0, [r5, #92]	; 0x5c
    11e6:	f004 fbd9 	bl	599c <boot_trailer_sz>
        first_trailer_idx = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT) - 1;
    11ea:	6aab      	ldr	r3, [r5, #40]	; 0x28
        sz = 0;
    11ec:	2200      	movs	r2, #0
        first_trailer_idx = boot_img_num_sectors(state, BOOT_PRIMARY_SLOT) - 1;
    11ee:	3b01      	subs	r3, #1

        while (1) {
            sz += sector_sz;
    11f0:	4432      	add	r2, r6
            if  (sz >= trailer_sz) {
    11f2:	4290      	cmp	r0, r2
    11f4:	d901      	bls.n	11fa <swap_run+0x42>
                break;
            }
            first_trailer_idx--;
    11f6:	3b01      	subs	r3, #1
            sz += sector_sz;
    11f8:	e7fa      	b.n	11f0 <swap_run+0x38>
        }

        if (g_last_idx >= first_trailer_idx) {
    11fa:	9a03      	ldr	r2, [sp, #12]
    11fc:	6812      	ldr	r2, [r2, #0]
    11fe:	429a      	cmp	r2, r3
    1200:	d308      	bcc.n	1214 <swap_run+0x5c>
            BOOT_LOG_WRN("Not enough free space to run swap upgrade");
    1202:	4868      	ldr	r0, [pc, #416]	; (13a4 <swap_run+0x1ec>)
    1204:	2157      	movs	r1, #87	; 0x57
    1206:	f004 fea5 	bl	5f54 <z_log_minimal_printk>
            bs->swap_type = BOOT_SWAP_TYPE_NONE;
    120a:	2301      	movs	r3, #1
    120c:	71e3      	strb	r3, [r4, #7]
        idx++;
    }

    flash_area_close(fap_pri);
    flash_area_close(fap_sec);
}
    120e:	b00b      	add	sp, #44	; 0x2c
    1210:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(image_index), &fap_pri);
    1214:	a908      	add	r1, sp, #32
    1216:	2002      	movs	r0, #2
    1218:	f000 fd66 	bl	1ce8 <flash_area_open>
    rc = flash_area_open(FLASH_AREA_IMAGE_SECONDARY(image_index), &fap_sec);
    121c:	a909      	add	r1, sp, #36	; 0x24
    121e:	2005      	movs	r0, #5
    1220:	f000 fd62 	bl	1ce8 <flash_area_open>
    fixup_revert(state, bs, fap_sec);
    1224:	9a09      	ldr	r2, [sp, #36]	; 0x24
    1226:	4621      	mov	r1, r4
    1228:	4628      	mov	r0, r5
    122a:	f7ff ff79 	bl	1120 <fixup_revert>
    if (bs->op == BOOT_STATUS_OP_MOVE) {
    122e:	7963      	ldrb	r3, [r4, #5]
    1230:	2b01      	cmp	r3, #1
    1232:	d108      	bne.n	1246 <swap_run+0x8e>
        idx = g_last_idx;
    1234:	9b03      	ldr	r3, [sp, #12]
    BOOT_STATUS_ASSERT(rc == 0);
    1236:	f8df b170 	ldr.w	fp, [pc, #368]	; 13a8 <swap_run+0x1f0>
        idx = g_last_idx;
    123a:	681f      	ldr	r7, [r3, #0]
        while (idx > 0) {
    123c:	9b03      	ldr	r3, [sp, #12]
    123e:	681b      	ldr	r3, [r3, #0]
    1240:	b9a7      	cbnz	r7, 126c <swap_run+0xb4>
        bs->idx = BOOT_STATUS_IDX_0;
    1242:	2301      	movs	r3, #1
    1244:	6023      	str	r3, [r4, #0]
    bs->op = BOOT_STATUS_OP_SWAP;
    1246:	2302      	movs	r3, #2
        BOOT_STATUS_ASSERT(rc == 0);
    1248:	f8df 815c 	ldr.w	r8, [pc, #348]	; 13a8 <swap_run+0x1f0>
    bs->op = BOOT_STATUS_OP_SWAP;
    124c:	7163      	strb	r3, [r4, #5]
    idx = 1;
    124e:	2701      	movs	r7, #1
        bs->state = BOOT_STATUS_STATE_1;
    1250:	9306      	str	r3, [sp, #24]
    while (idx <= g_last_idx) {
    1252:	9b03      	ldr	r3, [sp, #12]
    1254:	f8dd 9020 	ldr.w	r9, [sp, #32]
    1258:	681b      	ldr	r3, [r3, #0]
    125a:	429f      	cmp	r7, r3
    125c:	d94a      	bls.n	12f4 <swap_run+0x13c>
    flash_area_close(fap_pri);
    125e:	4648      	mov	r0, r9
    1260:	f004 fe85 	bl	5f6e <flash_area_close>
    flash_area_close(fap_sec);
    1264:	9809      	ldr	r0, [sp, #36]	; 0x24
    1266:	f004 fe82 	bl	5f6e <flash_area_close>
    126a:	e7d0      	b.n	120e <swap_run+0x56>
            if (idx <= (g_last_idx - bs->idx + 1)) {
    126c:	6822      	ldr	r2, [r4, #0]
    126e:	3301      	adds	r3, #1
    1270:	1a9b      	subs	r3, r3, r2
    1272:	429f      	cmp	r7, r3
    1274:	d83c      	bhi.n	12f0 <swap_run+0x138>

static inline uint32_t
boot_img_sector_off(const struct boot_loader_state *state, size_t slot,
                    size_t sector)
{
    return flash_sector_get_off(&BOOT_IMG(state, slot).sectors[sector]) -
    1276:	6a6b      	ldr	r3, [r5, #36]	; 0x24
    1278:	f8dd 8020 	ldr.w	r8, [sp, #32]
 */
uint8_t flash_area_erased_val(const struct flash_area *fap);

static inline uint32_t flash_sector_get_off(const struct flash_sector *fs)
{
	return fs->fs_off;
    127c:	6819      	ldr	r1, [r3, #0]
    127e:	f853 0037 	ldr.w	r0, [r3, r7, lsl #3]
    1282:	eb03 03c7 	add.w	r3, r3, r7, lsl #3
    if (bs->idx == BOOT_STATUS_IDX_0) {
    1286:	2a01      	cmp	r2, #1
    1288:	f853 3c08 	ldr.w	r3, [r3, #-8]
    128c:	eba0 0901 	sub.w	r9, r0, r1
    1290:	eba3 0a01 	sub.w	sl, r3, r1
    1294:	d112      	bne.n	12bc <swap_run+0x104>
        if (bs->source != BOOT_STATUS_SOURCE_PRIMARY_SLOT) {
    1296:	68e2      	ldr	r2, [r4, #12]
                boot_move_sector_up(idx, sector_sz, state, bs, fap_pri, fap_sec);
    1298:	9b09      	ldr	r3, [sp, #36]	; 0x24
        if (bs->source != BOOT_STATUS_SOURCE_PRIMARY_SLOT) {
    129a:	2a02      	cmp	r2, #2
    129c:	d00a      	beq.n	12b4 <swap_run+0xfc>
            rc = swap_erase_trailer_sectors(state, fap_pri);
    129e:	4641      	mov	r1, r8
    12a0:	4628      	mov	r0, r5
    12a2:	9304      	str	r3, [sp, #16]
    12a4:	f004 fc77 	bl	5b96 <swap_erase_trailer_sectors>
            rc = swap_status_init(state, fap_pri, bs);
    12a8:	4622      	mov	r2, r4
    12aa:	4641      	mov	r1, r8
    12ac:	4628      	mov	r0, r5
    12ae:	f004 fca8 	bl	5c02 <swap_status_init>
    12b2:	9b04      	ldr	r3, [sp, #16]
        rc = swap_erase_trailer_sectors(state, fap_sec);
    12b4:	4619      	mov	r1, r3
    12b6:	4628      	mov	r0, r5
    12b8:	f004 fc6d 	bl	5b96 <swap_erase_trailer_sectors>
    rc = boot_erase_region(fap_pri, new_off, sz);
    12bc:	4632      	mov	r2, r6
    12be:	4649      	mov	r1, r9
    12c0:	4640      	mov	r0, r8
    12c2:	f004 fc66 	bl	5b92 <boot_erase_region>
    rc = boot_copy_region(state, fap_pri, fap_pri, old_off, new_off, sz);
    12c6:	4653      	mov	r3, sl
    12c8:	4642      	mov	r2, r8
    12ca:	4641      	mov	r1, r8
    12cc:	e9cd 9600 	strd	r9, r6, [sp]
    12d0:	4628      	mov	r0, r5
    12d2:	f7ff fc55 	bl	b80 <boot_copy_region>
    rc = boot_write_status(state, bs);
    12d6:	4621      	mov	r1, r4
    12d8:	4628      	mov	r0, r5
    12da:	f004 fc28 	bl	5b2e <boot_write_status>
    bs->idx++;
    12de:	6823      	ldr	r3, [r4, #0]
    12e0:	3301      	adds	r3, #1
    12e2:	6023      	str	r3, [r4, #0]
    BOOT_STATUS_ASSERT(rc == 0);
    12e4:	b120      	cbz	r0, 12f0 <swap_run+0x138>
    12e6:	f8db 3000 	ldr.w	r3, [fp]
    12ea:	3301      	adds	r3, #1
    12ec:	f8cb 3000 	str.w	r3, [fp]
            idx--;
    12f0:	3f01      	subs	r7, #1
    12f2:	e7a3      	b.n	123c <swap_run+0x84>
        if (idx >= bs->idx) {
    12f4:	6823      	ldr	r3, [r4, #0]
    12f6:	429f      	cmp	r7, r3
    12f8:	d350      	bcc.n	139c <swap_run+0x1e4>
    12fa:	6a6a      	ldr	r2, [r5, #36]	; 0x24
            boot_swap_sectors(idx, sector_sz, state, bs, fap_pri, fap_sec);
    12fc:	f8dd a024 	ldr.w	sl, [sp, #36]	; 0x24
    1300:	f852 1037 	ldr.w	r1, [r2, r7, lsl #3]
    1304:	9105      	str	r1, [sp, #20]
    1306:	00fb      	lsls	r3, r7, #3
    1308:	6811      	ldr	r1, [r2, #0]
    130a:	9104      	str	r1, [sp, #16]
    130c:	3b08      	subs	r3, #8
    130e:	6d29      	ldr	r1, [r5, #80]	; 0x50
    1310:	58c8      	ldr	r0, [r1, r3]
    1312:	6809      	ldr	r1, [r1, #0]
    1314:	eba0 0b01 	sub.w	fp, r0, r1
    if (bs->state == BOOT_STATUS_STATE_0) {
    1318:	7921      	ldrb	r1, [r4, #4]
    131a:	2901      	cmp	r1, #1
    131c:	d13c      	bne.n	1398 <swap_run+0x1e0>
    131e:	58d1      	ldr	r1, [r2, r3]
    1320:	9b04      	ldr	r3, [sp, #16]
        rc = boot_erase_region(fap_pri, pri_off, sz);
    1322:	4632      	mov	r2, r6
    1324:	1ac9      	subs	r1, r1, r3
    1326:	4648      	mov	r0, r9
    1328:	9107      	str	r1, [sp, #28]
    132a:	f004 fc32 	bl	5b92 <boot_erase_region>
        rc = boot_copy_region(state, fap_sec, fap_pri, sec_off, pri_off, sz);
    132e:	9907      	ldr	r1, [sp, #28]
    1330:	9100      	str	r1, [sp, #0]
    1332:	465b      	mov	r3, fp
    1334:	464a      	mov	r2, r9
    1336:	4651      	mov	r1, sl
    1338:	9601      	str	r6, [sp, #4]
    133a:	4628      	mov	r0, r5
    133c:	f7ff fc20 	bl	b80 <boot_copy_region>
        rc = boot_write_status(state, bs);
    1340:	4621      	mov	r1, r4
    1342:	4628      	mov	r0, r5
    1344:	f004 fbf3 	bl	5b2e <boot_write_status>
        bs->state = BOOT_STATUS_STATE_1;
    1348:	9b06      	ldr	r3, [sp, #24]
    134a:	7123      	strb	r3, [r4, #4]
        BOOT_STATUS_ASSERT(rc == 0);
    134c:	b120      	cbz	r0, 1358 <swap_run+0x1a0>
    134e:	f8d8 3000 	ldr.w	r3, [r8]
    1352:	3301      	adds	r3, #1
    1354:	f8c8 3000 	str.w	r3, [r8]
        rc = boot_erase_region(fap_sec, sec_off, sz);
    1358:	4632      	mov	r2, r6
    135a:	4659      	mov	r1, fp
    135c:	4650      	mov	r0, sl
    135e:	f004 fc18 	bl	5b92 <boot_erase_region>
        rc = boot_copy_region(state, fap_pri, fap_sec, pri_up_off, sec_off, sz);
    1362:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
    1366:	4649      	mov	r1, r9
    1368:	1a9b      	subs	r3, r3, r2
    136a:	e9cd b600 	strd	fp, r6, [sp]
    136e:	4652      	mov	r2, sl
    1370:	4628      	mov	r0, r5
    1372:	f7ff fc05 	bl	b80 <boot_copy_region>
        rc = boot_write_status(state, bs);
    1376:	4621      	mov	r1, r4
    1378:	4628      	mov	r0, r5
    137a:	f004 fbd8 	bl	5b2e <boot_write_status>
        bs->idx++;
    137e:	6823      	ldr	r3, [r4, #0]
    1380:	3301      	adds	r3, #1
    1382:	6023      	str	r3, [r4, #0]
        bs->state = BOOT_STATUS_STATE_0;
    1384:	f04f 0301 	mov.w	r3, #1
    1388:	7123      	strb	r3, [r4, #4]
        BOOT_STATUS_ASSERT(rc == 0);
    138a:	b138      	cbz	r0, 139c <swap_run+0x1e4>
    138c:	f8d8 3000 	ldr.w	r3, [r8]
    1390:	3301      	adds	r3, #1
    1392:	f8c8 3000 	str.w	r3, [r8]
    1396:	e001      	b.n	139c <swap_run+0x1e4>
    if (bs->state == BOOT_STATUS_STATE_1) {
    1398:	2902      	cmp	r1, #2
    139a:	d0dd      	beq.n	1358 <swap_run+0x1a0>
        idx++;
    139c:	3701      	adds	r7, #1
    139e:	e758      	b.n	1252 <swap_run+0x9a>
    13a0:	20000004 	.word	0x20000004
    13a4:	00009215 	.word	0x00009215
    13a8:	20000df8 	.word	0x20000df8

000013ac <nrf_cleanup_peripheral>:
    return (uint32_t)p_reg + task;
}

NRF_STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_reg, nrf_rtc_task_t task)
{
    *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
    13ac:	4b14      	ldr	r3, [pc, #80]	; (1400 <nrf_cleanup_peripheral+0x54>)
    p_reg->EVTENSET = mask;
}

NRF_STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_reg, uint32_t mask)
{
    p_reg->EVTENCLR = mask;
    13ae:	4915      	ldr	r1, [pc, #84]	; (1404 <nrf_cleanup_peripheral+0x58>)
    *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
    13b0:	2201      	movs	r2, #1
    13b2:	601a      	str	r2, [r3, #0]
    p_reg->EVTENCLR = mask;
    13b4:	f04f 33ff 	mov.w	r3, #4294967295
    13b8:	f8c1 3348 	str.w	r3, [r1, #840]	; 0x348
    p_reg->INTENCLR = mask;
    13bc:	f8c1 3308 	str.w	r3, [r1, #776]	; 0x308
    *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
    13c0:	f501 41c0 	add.w	r1, r1, #24576	; 0x6000
    13c4:	3104      	adds	r1, #4
    13c6:	600a      	str	r2, [r1, #0]
    p_reg->EVTENCLR = mask;
    13c8:	f8c1 3344 	str.w	r3, [r1, #836]	; 0x344
    p_reg->INTENCLR = mask;
    13cc:	f8c1 3304 	str.w	r3, [r1, #772]	; 0x304
    *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
    13d0:	f501 3198 	add.w	r1, r1, #77824	; 0x13000
    13d4:	600a      	str	r2, [r1, #0]
    p_reg->EVTENCLR = mask;
    13d6:	4a0c      	ldr	r2, [pc, #48]	; (1408 <nrf_cleanup_peripheral+0x5c>)
    13d8:	f8c2 3348 	str.w	r3, [r2, #840]	; 0x348
    p_reg->INTENCLR = mask;
    13dc:	f8c2 3308 	str.w	r3, [r2, #776]	; 0x308
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
}

NRF_STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg)
{
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
    13e0:	f5a2 3208 	sub.w	r2, r2, #139264	; 0x22000
    13e4:	2100      	movs	r1, #0
    13e6:	f8c2 1500 	str.w	r1, [r2, #1280]	; 0x500
    p_reg->INTENCLR = mask;
    13ea:	f8c2 3308 	str.w	r3, [r2, #776]	; 0x308
    }
}

NRF_STATIC_INLINE void nrf_ppi_channels_disable_all(NRF_PPI_Type * p_reg)
{
    p_reg->CHENCLR = ((uint32_t)0xFFFFFFFFuL);
    13ee:	f502 32e8 	add.w	r2, r2, #118784	; 0x1d000
    13f2:	f8c2 3508 	str.w	r3, [r2, #1288]	; 0x508
    p_reg->INTENSET = mask;
}

NRF_STATIC_INLINE void nrf_clock_int_disable(NRF_CLOCK_Type * p_reg, uint32_t mask)
{
    p_reg->INTENCLR = mask;
    13f6:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
    13fa:	f8c2 3308 	str.w	r3, [r2, #776]	; 0x308
#endif
#if defined(NRF_DPPIC)
    nrf_dppi_channels_disable_all(NRF_DPPIC);
#endif
    nrf_cleanup_clock();
}
    13fe:	4770      	bx	lr
    1400:	4000b004 	.word	0x4000b004
    1404:	4000b000 	.word	0x4000b000
    1408:	40024000 	.word	0x40024000

0000140c <base64_encode>:
/*
 * Encode a buffer into base64 format
 */
int base64_encode(uint8_t *dst, size_t dlen, size_t *olen, const uint8_t *src,
		  size_t slen)
{
    140c:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
    1410:	4605      	mov	r5, r0
    1412:	9807      	ldr	r0, [sp, #28]
	size_t i, n;
	int C1, C2, C3;
	uint8_t *p;

	if (slen == 0) {
    1414:	b910      	cbnz	r0, 141c <base64_encode+0x10>
		*olen = 0;
    1416:	6010      	str	r0, [r2, #0]

	*olen = p - dst;
	*p = 0U;

	return 0;
}
    1418:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
	n = slen / 3 + (slen % 3 != 0);
    141c:	2403      	movs	r4, #3
    141e:	fbb0 f4f4 	udiv	r4, r0, r4
    1422:	eb04 0744 	add.w	r7, r4, r4, lsl #1
    1426:	42b8      	cmp	r0, r7
    1428:	bf18      	it	ne
    142a:	3401      	addne	r4, #1
	if (n > (BASE64_SIZE_T_MAX - 1) / 4) {
    142c:	f1b4 4f80 	cmp.w	r4, #1073741824	; 0x40000000
    1430:	d305      	bcc.n	143e <base64_encode+0x32>
		*olen = BASE64_SIZE_T_MAX;
    1432:	f04f 33ff 	mov.w	r3, #4294967295
    1436:	6013      	str	r3, [r2, #0]
		return -ENOMEM;
    1438:	f06f 000b 	mvn.w	r0, #11
    143c:	e7ec      	b.n	1418 <base64_encode+0xc>
	n *= 4;
    143e:	00a4      	lsls	r4, r4, #2
	if ((dlen < n + 1) || (!dst)) {
    1440:	3401      	adds	r4, #1
    1442:	428c      	cmp	r4, r1
    1444:	d800      	bhi.n	1448 <base64_encode+0x3c>
    1446:	b90d      	cbnz	r5, 144c <base64_encode+0x40>
		*olen = n + 1;
    1448:	6014      	str	r4, [r2, #0]
    144a:	e7f5      	b.n	1438 <base64_encode+0x2c>
		*p++ = base64_enc_map[(C1 >> 2) & 0x3F];
    144c:	f8df e0bc 	ldr.w	lr, [pc, #188]	; 150c <base64_encode+0x100>
    1450:	462e      	mov	r6, r5
	for (i = 0, p = dst; i < n; i += 3) {
    1452:	2400      	movs	r4, #0
    1454:	42bc      	cmp	r4, r7
    1456:	4631      	mov	r1, r6
    1458:	469c      	mov	ip, r3
    145a:	f106 0604 	add.w	r6, r6, #4
    145e:	f103 0303 	add.w	r3, r3, #3
    1462:	d32c      	bcc.n	14be <base64_encode+0xb2>
	if (i < slen) {
    1464:	4284      	cmp	r4, r0
    1466:	d225      	bcs.n	14b4 <base64_encode+0xa8>
		C1 = *src++;
    1468:	f89c 6000 	ldrb.w	r6, [ip]
		*p++ = base64_enc_map[(C1 >> 2) & 0x3F];
    146c:	4f27      	ldr	r7, [pc, #156]	; (150c <base64_encode+0x100>)
		C2 = ((i + 1) < slen) ? *src++ : 0;
    146e:	3401      	adds	r4, #1
    1470:	4284      	cmp	r4, r0
    1472:	bf38      	it	cc
    1474:	f89c 3001 	ldrbcc.w	r3, [ip, #1]
		*p++ = base64_enc_map[(C1 >> 2) & 0x3F];
    1478:	ea4f 0ca6 	mov.w	ip, r6, asr #2
		C2 = ((i + 1) < slen) ? *src++ : 0;
    147c:	bf28      	it	cs
    147e:	2300      	movcs	r3, #0
		*p++ = base64_enc_map[(C1 >> 2) & 0x3F];
    1480:	f817 c00c 	ldrb.w	ip, [r7, ip]
    1484:	f881 c000 	strb.w	ip, [r1]
		if ((i + 1) < slen) {
    1488:	4284      	cmp	r4, r0
		*p++ = base64_enc_map[(((C1 & 3) << 4) + (C2 >> 4)) & 0x3F];
    148a:	eb07 1c13 	add.w	ip, r7, r3, lsr #4
			*p++ = base64_enc_map[((C2 & 15) << 2) & 0x3F];
    148e:	bf3c      	itt	cc
    1490:	009b      	lslcc	r3, r3, #2
    1492:	f003 033c 	andcc.w	r3, r3, #60	; 0x3c
		*p++ = base64_enc_map[(((C1 & 3) << 4) + (C2 >> 4)) & 0x3F];
    1496:	ea4f 1606 	mov.w	r6, r6, lsl #4
    149a:	f006 0630 	and.w	r6, r6, #48	; 0x30
			*p++ = base64_enc_map[((C2 & 15) << 2) & 0x3F];
    149e:	bf38      	it	cc
    14a0:	5cfb      	ldrbcc	r3, [r7, r3]
		*p++ = base64_enc_map[(((C1 & 3) << 4) + (C2 >> 4)) & 0x3F];
    14a2:	f81c 6006 	ldrb.w	r6, [ip, r6]
    14a6:	704e      	strb	r6, [r1, #1]
			*p++ = '=';
    14a8:	bf28      	it	cs
    14aa:	233d      	movcs	r3, #61	; 0x3d
    14ac:	708b      	strb	r3, [r1, #2]
		*p++ = '=';
    14ae:	233d      	movs	r3, #61	; 0x3d
    14b0:	70cb      	strb	r3, [r1, #3]
    14b2:	3104      	adds	r1, #4
	*olen = p - dst;
    14b4:	1b4d      	subs	r5, r1, r5
	*p = 0U;
    14b6:	2000      	movs	r0, #0
	*olen = p - dst;
    14b8:	6015      	str	r5, [r2, #0]
	*p = 0U;
    14ba:	7008      	strb	r0, [r1, #0]
	return 0;
    14bc:	e7ac      	b.n	1418 <base64_encode+0xc>
		C1 = *src++;
    14be:	f813 cc03 	ldrb.w	ip, [r3, #-3]
		C2 = *src++;
    14c2:	f813 1c02 	ldrb.w	r1, [r3, #-2]
		C3 = *src++;
    14c6:	f813 8c01 	ldrb.w	r8, [r3, #-1]
		*p++ = base64_enc_map[(C1 >> 2) & 0x3F];
    14ca:	ea4f 09ac 	mov.w	r9, ip, asr #2
		*p++ = base64_enc_map[(((C1 &  3) << 4) + (C2 >> 4)) & 0x3F];
    14ce:	ea4f 1c0c 	mov.w	ip, ip, lsl #4
		*p++ = base64_enc_map[(C1 >> 2) & 0x3F];
    14d2:	f81e 9009 	ldrb.w	r9, [lr, r9]
    14d6:	f806 9c04 	strb.w	r9, [r6, #-4]
		*p++ = base64_enc_map[(((C1 &  3) << 4) + (C2 >> 4)) & 0x3F];
    14da:	f00c 0c30 	and.w	ip, ip, #48	; 0x30
    14de:	eb0e 1911 	add.w	r9, lr, r1, lsr #4
		*p++ = base64_enc_map[(((C2 & 15) << 2) + (C3 >> 6)) & 0x3F];
    14e2:	0089      	lsls	r1, r1, #2
		*p++ = base64_enc_map[(((C1 &  3) << 4) + (C2 >> 4)) & 0x3F];
    14e4:	f819 c00c 	ldrb.w	ip, [r9, ip]
    14e8:	f806 cc03 	strb.w	ip, [r6, #-3]
		*p++ = base64_enc_map[(((C2 & 15) << 2) + (C3 >> 6)) & 0x3F];
    14ec:	f001 013c 	and.w	r1, r1, #60	; 0x3c
    14f0:	eb0e 1c98 	add.w	ip, lr, r8, lsr #6
		*p++ = base64_enc_map[C3 & 0x3F];
    14f4:	f008 083f 	and.w	r8, r8, #63	; 0x3f
		*p++ = base64_enc_map[(((C2 & 15) << 2) + (C3 >> 6)) & 0x3F];
    14f8:	f81c 1001 	ldrb.w	r1, [ip, r1]
    14fc:	f806 1c02 	strb.w	r1, [r6, #-2]
		*p++ = base64_enc_map[C3 & 0x3F];
    1500:	f81e 1008 	ldrb.w	r1, [lr, r8]
    1504:	f806 1c01 	strb.w	r1, [r6, #-1]
	for (i = 0, p = dst; i < n; i += 3) {
    1508:	3403      	adds	r4, #3
    150a:	e7a3      	b.n	1454 <base64_encode+0x48>
    150c:	000093d2 	.word	0x000093d2

00001510 <base64_decode>:
/*
 * Decode a base64-formatted buffer
 */
int base64_decode(uint8_t *dst, size_t dlen, size_t *olen, const uint8_t *src,
		  size_t slen)
{
    1510:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
	size_t i, n;
	uint32_t j, x;
	uint8_t *p;

	/* First pass: check for validity and get output length */
	for (i = n = j = 0U; i < slen; i++) {
    1514:	f04f 0c00 	mov.w	ip, #0
{
    1518:	9e07      	ldr	r6, [sp, #28]

		if (src[i] == '=' && ++j > 2) {
			return -EINVAL;
		}

		if (src[i] > 127 || base64_dec_map[src[i]] == 127U) {
    151a:	f8df 8128 	ldr.w	r8, [pc, #296]	; 1644 <base64_decode+0x134>
{
    151e:	4607      	mov	r7, r0
	for (i = n = j = 0U; i < slen; i++) {
    1520:	4665      	mov	r5, ip
    1522:	4660      	mov	r0, ip
    1524:	42b5      	cmp	r5, r6
    1526:	d30a      	bcc.n	153e <base64_decode+0x2e>
    1528:	462e      	mov	r6, r5
    152a:	e004      	b.n	1536 <base64_decode+0x26>
			++i;
    152c:	3501      	adds	r5, #1
		while (i < slen && src[i] == ' ') {
    152e:	42ae      	cmp	r6, r5
			++x;
    1530:	f10e 0e01 	add.w	lr, lr, #1
		while (i < slen && src[i] == ' ') {
    1534:	d105      	bne.n	1542 <base64_decode+0x32>
		}

		n++;
	}

	if (n == 0) {
    1536:	bba8      	cbnz	r0, 15a4 <base64_decode+0x94>
		*olen = 0;
    1538:	6010      	str	r0, [r2, #0]
	}

	*olen = p - dst;

	return 0;
}
    153a:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
		x = 0U;
    153e:	f04f 0e00 	mov.w	lr, #0
		while (i < slen && src[i] == ' ') {
    1542:	5d5c      	ldrb	r4, [r3, r5]
    1544:	2c20      	cmp	r4, #32
    1546:	d0f1      	beq.n	152c <base64_decode+0x1c>
		if (i == slen) {
    1548:	42ae      	cmp	r6, r5
    154a:	d0f4      	beq.n	1536 <base64_decode+0x26>
		if ((slen - i) >= 2 && src[i] == '\r' && src[i + 1] == '\n') {
    154c:	eba6 0905 	sub.w	r9, r6, r5
    1550:	f1b9 0f01 	cmp.w	r9, #1
    1554:	d915      	bls.n	1582 <base64_decode+0x72>
    1556:	2c0d      	cmp	r4, #13
    1558:	d113      	bne.n	1582 <base64_decode+0x72>
    155a:	eb03 0905 	add.w	r9, r3, r5
    155e:	f899 9001 	ldrb.w	r9, [r9, #1]
    1562:	f1b9 0f0a 	cmp.w	r9, #10
		if (src[i] == '\n') {
    1566:	d01b      	beq.n	15a0 <base64_decode+0x90>
		if (x != 0U) {
    1568:	f1be 0f00 	cmp.w	lr, #0
    156c:	d106      	bne.n	157c <base64_decode+0x6c>
		if (src[i] == '=' && ++j > 2) {
    156e:	2c3d      	cmp	r4, #61	; 0x3d
    1570:	d109      	bne.n	1586 <base64_decode+0x76>
    1572:	f10c 0c01 	add.w	ip, ip, #1
    1576:	f1bc 0f02 	cmp.w	ip, #2
    157a:	d907      	bls.n	158c <base64_decode+0x7c>
			return -EINVAL;
    157c:	f06f 0015 	mvn.w	r0, #21
    1580:	e7db      	b.n	153a <base64_decode+0x2a>
		if (src[i] == '\n') {
    1582:	2c0a      	cmp	r4, #10
    1584:	e7ef      	b.n	1566 <base64_decode+0x56>
		if (src[i] > 127 || base64_dec_map[src[i]] == 127U) {
    1586:	f014 0f80 	tst.w	r4, #128	; 0x80
    158a:	d1f7      	bne.n	157c <base64_decode+0x6c>
    158c:	f818 4004 	ldrb.w	r4, [r8, r4]
    1590:	2c7f      	cmp	r4, #127	; 0x7f
    1592:	d0f3      	beq.n	157c <base64_decode+0x6c>
		if (base64_dec_map[src[i]] < 64 && j != 0U) {
    1594:	2c3f      	cmp	r4, #63	; 0x3f
    1596:	d802      	bhi.n	159e <base64_decode+0x8e>
    1598:	f1bc 0f00 	cmp.w	ip, #0
    159c:	d1ee      	bne.n	157c <base64_decode+0x6c>
		n++;
    159e:	3001      	adds	r0, #1
	for (i = n = j = 0U; i < slen; i++) {
    15a0:	3501      	adds	r5, #1
    15a2:	e7bf      	b.n	1524 <base64_decode+0x14>
	n = (6 * (n >> 3)) + ((6 * (n & 0x7) + 7) >> 3);
    15a4:	2506      	movs	r5, #6
    15a6:	f000 0407 	and.w	r4, r0, #7
    15aa:	436c      	muls	r4, r5
    15ac:	f104 0e07 	add.w	lr, r4, #7
    15b0:	08c4      	lsrs	r4, r0, #3
    15b2:	436c      	muls	r4, r5
    15b4:	eba4 040c 	sub.w	r4, r4, ip
	n -= j;
    15b8:	eb04 04de 	add.w	r4, r4, lr, lsr #3
	if (dst == NULL || dlen < n) {
    15bc:	b187      	cbz	r7, 15e0 <base64_decode+0xd0>
    15be:	428c      	cmp	r4, r1
    15c0:	d80e      	bhi.n	15e0 <base64_decode+0xd0>
	for (j = 3U, n = x = 0U, p = dst; i > 0; i--, src++) {
    15c2:	2500      	movs	r5, #0
		j -= (base64_dec_map[*src] == 64U);
    15c4:	f8df e07c 	ldr.w	lr, [pc, #124]	; 1644 <base64_decode+0x134>
		if (*src == '\r' || *src == '\n' || *src == ' ') {
    15c8:	f8df 807c 	ldr.w	r8, [pc, #124]	; 1648 <base64_decode+0x138>
    15cc:	441e      	add	r6, r3
	if (dst == NULL || dlen < n) {
    15ce:	4639      	mov	r1, r7
	for (j = 3U, n = x = 0U, p = dst; i > 0; i--, src++) {
    15d0:	2403      	movs	r4, #3
    15d2:	4628      	mov	r0, r5
    15d4:	429e      	cmp	r6, r3
    15d6:	d107      	bne.n	15e8 <base64_decode+0xd8>
	*olen = p - dst;
    15d8:	1bc9      	subs	r1, r1, r7
    15da:	6011      	str	r1, [r2, #0]
	return 0;
    15dc:	2000      	movs	r0, #0
    15de:	e7ac      	b.n	153a <base64_decode+0x2a>
		*olen = n;
    15e0:	6014      	str	r4, [r2, #0]
		return -ENOMEM;
    15e2:	f06f 000b 	mvn.w	r0, #11
    15e6:	e7a8      	b.n	153a <base64_decode+0x2a>
		if (*src == '\r' || *src == '\n' || *src == ' ') {
    15e8:	f813 9b01 	ldrb.w	r9, [r3], #1
    15ec:	f1a9 0c0a 	sub.w	ip, r9, #10
    15f0:	fa5f fc8c 	uxtb.w	ip, ip
    15f4:	f1bc 0f16 	cmp.w	ip, #22
    15f8:	d804      	bhi.n	1604 <base64_decode+0xf4>
    15fa:	fa28 fc0c 	lsr.w	ip, r8, ip
    15fe:	f01c 0f01 	tst.w	ip, #1
    1602:	d1e7      	bne.n	15d4 <base64_decode+0xc4>
		j -= (base64_dec_map[*src] == 64U);
    1604:	f81e c009 	ldrb.w	ip, [lr, r9]
		if (++n == 4) {
    1608:	3001      	adds	r0, #1
		j -= (base64_dec_map[*src] == 64U);
    160a:	f1bc 0f40 	cmp.w	ip, #64	; 0x40
    160e:	bf08      	it	eq
    1610:	3c01      	subeq	r4, #1
		x  = (x << 6) | (base64_dec_map[*src] & 0x3F);
    1612:	f00c 0c3f 	and.w	ip, ip, #63	; 0x3f
		if (++n == 4) {
    1616:	2804      	cmp	r0, #4
		x  = (x << 6) | (base64_dec_map[*src] & 0x3F);
    1618:	ea4c 1585 	orr.w	r5, ip, r5, lsl #6
		if (++n == 4) {
    161c:	d1da      	bne.n	15d4 <base64_decode+0xc4>
			if (j > 0) {
    161e:	b17c      	cbz	r4, 1640 <base64_decode+0x130>
				*p++ = (unsigned char)(x >> 16);
    1620:	0c28      	lsrs	r0, r5, #16
			if (j > 1) {
    1622:	2c01      	cmp	r4, #1
				*p++ = (unsigned char)(x >> 16);
    1624:	7008      	strb	r0, [r1, #0]
			if (j > 1) {
    1626:	d102      	bne.n	162e <base64_decode+0x11e>
				*p++ = (unsigned char)(x >> 16);
    1628:	3101      	adds	r1, #1
			n = 0;
    162a:	2000      	movs	r0, #0
    162c:	e7d2      	b.n	15d4 <base64_decode+0xc4>
			if (j > 2) {
    162e:	2c02      	cmp	r4, #2
				*p++ = (unsigned char)(x >> 8);
    1630:	ea4f 2015 	mov.w	r0, r5, lsr #8
    1634:	7048      	strb	r0, [r1, #1]
				*p++ = (unsigned char)(x);
    1636:	bf16      	itet	ne
    1638:	708d      	strbne	r5, [r1, #2]
				*p++ = (unsigned char)(x >> 8);
    163a:	3102      	addeq	r1, #2
				*p++ = (unsigned char)(x);
    163c:	3103      	addne	r1, #3
    163e:	e7f4      	b.n	162a <base64_decode+0x11a>
			n = 0;
    1640:	4620      	mov	r0, r4
	for (j = 3U, n = x = 0U, p = dst; i > 0; i--, src++) {
    1642:	e7c7      	b.n	15d4 <base64_decode+0xc4>
    1644:	00009352 	.word	0x00009352
    1648:	00400009 	.word	0x00400009

0000164c <char_out>:

static int char_out(int c, void *ctx_p)
{
	struct out_context *ctx = ctx_p;

	ctx->count++;
    164c:	680b      	ldr	r3, [r1, #0]
    164e:	3301      	adds	r3, #1
    1650:	600b      	str	r3, [r1, #0]
	return _char_out(c);
    1652:	4b01      	ldr	r3, [pc, #4]	; (1658 <char_out+0xc>)
    1654:	681b      	ldr	r3, [r3, #0]
    1656:	4718      	bx	r3
    1658:	20000008 	.word	0x20000008

0000165c <__printk_hook_install>:
	_char_out = fn;
    165c:	4b01      	ldr	r3, [pc, #4]	; (1664 <__printk_hook_install+0x8>)
    165e:	6018      	str	r0, [r3, #0]
}
    1660:	4770      	bx	lr
    1662:	bf00      	nop
    1664:	20000008 	.word	0x20000008

00001668 <vprintk>:
#endif
	}
}
#else
void vprintk(const char *fmt, va_list ap)
{
    1668:	b507      	push	{r0, r1, r2, lr}
    166a:	460b      	mov	r3, r1
	struct out_context ctx = { 0 };
    166c:	2100      	movs	r1, #0
{
    166e:	4602      	mov	r2, r0
	struct out_context ctx = { 0 };
    1670:	9101      	str	r1, [sp, #4]
#ifdef CONFIG_PRINTK_SYNC
	k_spinlock_key_t key = k_spin_lock(&lock);
#endif

	cbvprintf(char_out, &ctx, fmt, ap);
    1672:	4803      	ldr	r0, [pc, #12]	; (1680 <vprintk+0x18>)
    1674:	a901      	add	r1, sp, #4
    1676:	f000 f8eb 	bl	1850 <cbvprintf>

#ifdef CONFIG_PRINTK_SYNC
	k_spin_unlock(&lock, key);
#endif
}
    167a:	b003      	add	sp, #12
    167c:	f85d fb04 	ldr.w	pc, [sp], #4
    1680:	0000164d 	.word	0x0000164d

00001684 <process_event>:
 * regions.
 */
static void process_event(struct onoff_manager *mgr,
			  int evt,
			  k_spinlock_key_t key)
{
    1684:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
	sys_slist_t clients;
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    1688:	f8b0 9018 	ldrh.w	r9, [r0, #24]
	__ASSERT_NO_MSG(evt != EVT_NOP);

	/* If this is a nested call record the event for processing in
	 * the top invocation.
	 */
	if (processing) {
    168c:	f019 0808 	ands.w	r8, r9, #8
{
    1690:	4604      	mov	r4, r0
    1692:	4693      	mov	fp, r2
	if (processing) {
    1694:	d00d      	beq.n	16b2 <process_event+0x2e>
		if (evt == EVT_COMPLETE) {
    1696:	2901      	cmp	r1, #1
			mgr->flags |= ONOFF_FLAG_COMPLETE;
    1698:	bf0c      	ite	eq
    169a:	f049 0910 	orreq.w	r9, r9, #16
		} else {
			__ASSERT_NO_MSG(evt == EVT_RECHECK);

			mgr->flags |= ONOFF_FLAG_RECHECK;
    169e:	f049 0920 	orrne.w	r9, r9, #32
    16a2:	f8a0 9018 	strh.w	r9, [r0, #24]
	__asm__ volatile(
		"cpsie i;"
		"isb"
		: : : "memory");
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	__asm__ volatile(
    16a6:	f38b 8811 	msr	BASEPRI, fp
    16aa:	f3bf 8f6f 	isb	sy
		state = mgr->flags & ONOFF_STATE_MASK;
	} while (evt != EVT_NOP);

out:
	k_spin_unlock(&mgr->lock, key);
}
    16ae:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    16b2:	f009 0907 	and.w	r9, r9, #7
		if (evt == EVT_RECHECK) {
    16b6:	2902      	cmp	r1, #2
    16b8:	d107      	bne.n	16ca <process_event+0x46>
			evt = process_recheck(mgr);
    16ba:	4620      	mov	r0, r4
    16bc:	f004 fb9e 	bl	5dfc <process_recheck>
		if (evt == EVT_NOP) {
    16c0:	2800      	cmp	r0, #0
    16c2:	d0f0      	beq.n	16a6 <process_event+0x22>
		if (evt == EVT_COMPLETE) {
    16c4:	2801      	cmp	r0, #1
    16c6:	8b23      	ldrh	r3, [r4, #24]
    16c8:	d150      	bne.n	176c <process_event+0xe8>
			res = mgr->last_res;
    16ca:	6967      	ldr	r7, [r4, #20]
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    16cc:	8b21      	ldrh	r1, [r4, #24]
	if (res < 0) {
    16ce:	2f00      	cmp	r7, #0
    16d0:	da15      	bge.n	16fe <process_event+0x7a>
		*clients = mgr->clients;
    16d2:	6825      	ldr	r5, [r4, #0]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    16d4:	f021 0107 	bic.w	r1, r1, #7
 * @param list A pointer on the list to initialize
 */
static inline void sys_slist_init(sys_slist_t *list)
{
	list->head = NULL;
	list->tail = NULL;
    16d8:	e9c4 8800 	strd	r8, r8, [r4]
    16dc:	f041 0101 	orr.w	r1, r1, #1
	mgr->flags = (state & ONOFF_STATE_MASK)
    16e0:	8321      	strh	r1, [r4, #24]
		onoff_transition_fn transit = NULL;
    16e2:	2600      	movs	r6, #0
		bool do_monitors = (state != (mgr->flags & ONOFF_STATE_MASK))
    16e4:	8b21      	ldrh	r1, [r4, #24]
    16e6:	f001 0a07 	and.w	sl, r1, #7
				   && !sys_slist_is_empty(&mgr->monitors);
    16ea:	45ca      	cmp	sl, r9
    16ec:	d002      	beq.n	16f4 <process_event+0x70>
		if (do_monitors
    16ee:	68a3      	ldr	r3, [r4, #8]
    16f0:	2b00      	cmp	r3, #0
    16f2:	d15c      	bne.n	17ae <process_event+0x12a>
		    || !sys_slist_is_empty(&clients)
    16f4:	b90d      	cbnz	r5, 16fa <process_event+0x76>
		    || (transit != NULL)) {
    16f6:	2e00      	cmp	r6, #0
    16f8:	d074      	beq.n	17e4 <process_event+0x160>
    16fa:	2300      	movs	r3, #0
    16fc:	e058      	b.n	17b0 <process_event+0x12c>
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    16fe:	f001 0307 	and.w	r3, r1, #7
		   || (state == ONOFF_STATE_RESETTING)) {
    1702:	1f5a      	subs	r2, r3, #5
	} else if ((state == ONOFF_STATE_TO_ON)
    1704:	2a01      	cmp	r2, #1
    1706:	d820      	bhi.n	174a <process_event+0xc6>
		*clients = mgr->clients;
    1708:	f021 0107 	bic.w	r1, r1, #7
		if (state == ONOFF_STATE_TO_ON) {
    170c:	2b06      	cmp	r3, #6
		*clients = mgr->clients;
    170e:	6825      	ldr	r5, [r4, #0]
	list->head = NULL;
    1710:	b289      	uxth	r1, r1
	list->tail = NULL;
    1712:	e9c4 8800 	strd	r8, r8, [r4]
		if (state == ONOFF_STATE_TO_ON) {
    1716:	d10c      	bne.n	1732 <process_event+0xae>
 *
 * @return A pointer on the first node of the list (or NULL if none)
 */
static inline sys_snode_t *sys_slist_peek_head(sys_slist_t *list)
{
	return list->head;
    1718:	2d00      	cmp	r5, #0
    171a:	462b      	mov	r3, r5
    171c:	bf38      	it	cc
    171e:	2300      	movcc	r3, #0
			SYS_SLIST_FOR_EACH_CONTAINER(clients, cp, node) {
    1720:	b12b      	cbz	r3, 172e <process_event+0xaa>
				mgr->refs += 1U;
    1722:	8b62      	ldrh	r2, [r4, #26]
 *
 * @return a pointer on the next node (or NULL if none)
 */
static inline sys_snode_t *sys_slist_peek_next_no_check(sys_snode_t *node);

Z_GENLIST_PEEK_NEXT_NO_CHECK(slist, snode)
    1724:	681b      	ldr	r3, [r3, #0]
    1726:	3201      	adds	r2, #1
    1728:	8362      	strh	r2, [r4, #26]
			SYS_SLIST_FOR_EACH_CONTAINER(clients, cp, node) {
    172a:	2b00      	cmp	r3, #0
    172c:	d1f8      	bne.n	1720 <process_event+0x9c>
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    172e:	f041 0102 	orr.w	r1, r1, #2
	mgr->flags = (state & ONOFF_STATE_MASK)
    1732:	8321      	strh	r1, [r4, #24]
		if (process_recheck(mgr) != EVT_NOP) {
    1734:	4620      	mov	r0, r4
    1736:	f004 fb61 	bl	5dfc <process_recheck>
    173a:	4606      	mov	r6, r0
    173c:	2800      	cmp	r0, #0
    173e:	d0d1      	beq.n	16e4 <process_event+0x60>
			mgr->flags |= ONOFF_FLAG_RECHECK;
    1740:	8b23      	ldrh	r3, [r4, #24]
    1742:	f043 0320 	orr.w	r3, r3, #32
    1746:	8323      	strh	r3, [r4, #24]
    1748:	e7cb      	b.n	16e2 <process_event+0x5e>
	} else if (state == ONOFF_STATE_TO_OFF) {
    174a:	2b04      	cmp	r3, #4
    174c:	d10c      	bne.n	1768 <process_event+0xe4>
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    174e:	f021 0107 	bic.w	r1, r1, #7
    1752:	b289      	uxth	r1, r1
	mgr->flags = (state & ONOFF_STATE_MASK)
    1754:	8321      	strh	r1, [r4, #24]
		if (process_recheck(mgr) != EVT_NOP) {
    1756:	4620      	mov	r0, r4
    1758:	f004 fb50 	bl	5dfc <process_recheck>
    175c:	4605      	mov	r5, r0
    175e:	2800      	cmp	r0, #0
    1760:	d0bf      	beq.n	16e2 <process_event+0x5e>
			mgr->flags |= ONOFF_FLAG_RECHECK;
    1762:	f041 0120 	orr.w	r1, r1, #32
    1766:	8321      	strh	r1, [r4, #24]
    1768:	2500      	movs	r5, #0
    176a:	e7ba      	b.n	16e2 <process_event+0x5e>
		} else if (evt == EVT_START) {
    176c:	2803      	cmp	r0, #3
    176e:	d109      	bne.n	1784 <process_event+0x100>
			transit = mgr->transitions->start;
    1770:	6922      	ldr	r2, [r4, #16]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    1772:	f023 0307 	bic.w	r3, r3, #7
			transit = mgr->transitions->start;
    1776:	6816      	ldr	r6, [r2, #0]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    1778:	f043 0306 	orr.w	r3, r3, #6
	mgr->flags = (state & ONOFF_STATE_MASK)
    177c:	8323      	strh	r3, [r4, #24]
}
    177e:	2500      	movs	r5, #0
		res = 0;
    1780:	462f      	mov	r7, r5
    1782:	e7af      	b.n	16e4 <process_event+0x60>
		} else if (evt == EVT_STOP) {
    1784:	2804      	cmp	r0, #4
    1786:	d106      	bne.n	1796 <process_event+0x112>
			transit = mgr->transitions->stop;
    1788:	6922      	ldr	r2, [r4, #16]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    178a:	f023 0307 	bic.w	r3, r3, #7
			transit = mgr->transitions->stop;
    178e:	6856      	ldr	r6, [r2, #4]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    1790:	f043 0304 	orr.w	r3, r3, #4
    1794:	e7f2      	b.n	177c <process_event+0xf8>
		} else if (evt == EVT_RESET) {
    1796:	2805      	cmp	r0, #5
    1798:	d106      	bne.n	17a8 <process_event+0x124>
			transit = mgr->transitions->reset;
    179a:	6922      	ldr	r2, [r4, #16]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    179c:	f023 0307 	bic.w	r3, r3, #7
			transit = mgr->transitions->reset;
    17a0:	6896      	ldr	r6, [r2, #8]
		     | (mgr->flags & ~ONOFF_STATE_MASK);
    17a2:	f043 0305 	orr.w	r3, r3, #5
    17a6:	e7e9      	b.n	177c <process_event+0xf8>
    17a8:	2500      	movs	r5, #0
		onoff_transition_fn transit = NULL;
    17aa:	462e      	mov	r6, r5
    17ac:	e7e8      	b.n	1780 <process_event+0xfc>
				   && !sys_slist_is_empty(&mgr->monitors);
    17ae:	2301      	movs	r3, #1
			uint32_t flags = mgr->flags | ONOFF_FLAG_PROCESSING;
    17b0:	f041 0108 	orr.w	r1, r1, #8
			mgr->flags = flags;
    17b4:	8321      	strh	r1, [r4, #24]
    17b6:	f38b 8811 	msr	BASEPRI, fp
    17ba:	f3bf 8f6f 	isb	sy
			if (do_monitors) {
    17be:	bb03      	cbnz	r3, 1802 <process_event+0x17e>
	while (!sys_slist_is_empty(list)) {
    17c0:	2d00      	cmp	r5, #0
    17c2:	d133      	bne.n	182c <process_event+0x1a8>
			if (transit != NULL) {
    17c4:	b116      	cbz	r6, 17cc <process_event+0x148>
				transit(mgr, transition_complete);
    17c6:	4921      	ldr	r1, [pc, #132]	; (184c <process_event+0x1c8>)
    17c8:	4620      	mov	r0, r4
    17ca:	47b0      	blx	r6
	__asm__ volatile(
    17cc:	f04f 0320 	mov.w	r3, #32
    17d0:	f3ef 8b11 	mrs	fp, BASEPRI
    17d4:	f383 8812 	msr	BASEPRI_MAX, r3
    17d8:	f3bf 8f6f 	isb	sy
			mgr->flags &= ~ONOFF_FLAG_PROCESSING;
    17dc:	8b23      	ldrh	r3, [r4, #24]
    17de:	f023 0308 	bic.w	r3, r3, #8
    17e2:	8323      	strh	r3, [r4, #24]
		if ((mgr->flags & ONOFF_FLAG_COMPLETE) != 0) {
    17e4:	8b23      	ldrh	r3, [r4, #24]
    17e6:	06da      	lsls	r2, r3, #27
    17e8:	d528      	bpl.n	183c <process_event+0x1b8>
			mgr->flags &= ~ONOFF_FLAG_COMPLETE;
    17ea:	f023 0310 	bic.w	r3, r3, #16
    17ee:	8323      	strh	r3, [r4, #24]
			evt = EVT_COMPLETE;
    17f0:	2101      	movs	r1, #1
		state = mgr->flags & ONOFF_STATE_MASK;
    17f2:	f8b4 9018 	ldrh.w	r9, [r4, #24]
    17f6:	f009 0907 	and.w	r9, r9, #7
	} while (evt != EVT_NOP);
    17fa:	2900      	cmp	r1, #0
    17fc:	f47f af5b 	bne.w	16b6 <process_event+0x32>
out:
    1800:	e751      	b.n	16a6 <process_event+0x22>
	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(mlist, mon, tmp, node) {
    1802:	68a1      	ldr	r1, [r4, #8]
    1804:	2900      	cmp	r1, #0
    1806:	d0db      	beq.n	17c0 <process_event+0x13c>
	return node->next;
    1808:	680b      	ldr	r3, [r1, #0]
		mon->callback(mgr, mon, state, res);
    180a:	f8d1 b004 	ldr.w	fp, [r1, #4]
    180e:	2b00      	cmp	r3, #0
    1810:	bf38      	it	cc
    1812:	2300      	movcc	r3, #0
    1814:	4699      	mov	r9, r3
    1816:	4652      	mov	r2, sl
    1818:	463b      	mov	r3, r7
    181a:	4620      	mov	r0, r4
    181c:	47d8      	blx	fp
	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(mlist, mon, tmp, node) {
    181e:	f1b9 0f00 	cmp.w	r9, #0
    1822:	d0cd      	beq.n	17c0 <process_event+0x13c>
    1824:	f8d9 3000 	ldr.w	r3, [r9]
Z_GENLIST_PEEK_NEXT_NO_CHECK(slist, snode)
    1828:	4649      	mov	r1, r9
    182a:	e7ee      	b.n	180a <process_event+0x186>
 *
 * @return A pointer to the first node of the list
 */
static inline sys_snode_t *sys_slist_get_not_empty(sys_slist_t *list);

Z_GENLIST_GET_NOT_EMPTY(slist, snode)
    182c:	4629      	mov	r1, r5
		notify_one(mgr, cli, state, res);
    182e:	463b      	mov	r3, r7
    1830:	4652      	mov	r2, sl
    1832:	4620      	mov	r0, r4
    1834:	682d      	ldr	r5, [r5, #0]
    1836:	f004 fafd 	bl	5e34 <notify_one>
    183a:	e7c1      	b.n	17c0 <process_event+0x13c>
		} else if ((mgr->flags & ONOFF_FLAG_RECHECK) != 0) {
    183c:	f013 0120 	ands.w	r1, r3, #32
			mgr->flags &= ~ONOFF_FLAG_RECHECK;
    1840:	bf1e      	ittt	ne
    1842:	f023 0320 	bicne.w	r3, r3, #32
    1846:	8323      	strhne	r3, [r4, #24]
			evt = EVT_RECHECK;
    1848:	2102      	movne	r1, #2
    184a:	e7d2      	b.n	17f2 <process_event+0x16e>
    184c:	00005e61 	.word	0x00005e61

00001850 <cbvprintf>:
 * @param ap Variable parameters
 *
 * @return printed byte count if CONFIG_CBPRINTF_LIBC_SUBSTS is set
 */
int cbvprintf(cbprintf_cb out, void *ctx, const char *fmt, va_list ap)
{
    1850:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    1854:	b08f      	sub	sp, #60	; 0x3c
    1856:	461f      	mov	r7, r3
	char *prefix, *data;
	int min_width, precision, data_len;
	char padding_mode, length_mod, special;

	/* we pre-increment in the loop  afterwards */
	fmt--;
    1858:	1e53      	subs	r3, r2, #1
{
    185a:	9000      	str	r0, [sp, #0]
    185c:	468b      	mov	fp, r1
	fmt--;
    185e:	9301      	str	r3, [sp, #4]
	size_t count = 0;
    1860:	f04f 0a00 	mov.w	sl, #0

start:
	while (*++fmt != '%') {
    1864:	9b01      	ldr	r3, [sp, #4]
    1866:	7858      	ldrb	r0, [r3, #1]
    1868:	2825      	cmp	r0, #37	; 0x25
    186a:	f103 0401 	add.w	r4, r3, #1
    186e:	d122      	bne.n	18b6 <cbvprintf+0x66>
	min_width = -1;
	precision = -1;
	prefix = "";
	padding_mode = 0;
	length_mod = 0;
	special = 0;
    1870:	f04f 0c00 	mov.w	ip, #0

	for (fmt++ ; ; fmt++) {
    1874:	4618      	mov	r0, r3
	precision = -1;
    1876:	f04f 36ff 	mov.w	r6, #4294967295
	for (fmt++ ; ; fmt++) {
    187a:	3002      	adds	r0, #2
	length_mod = 0;
    187c:	4661      	mov	r1, ip
	padding_mode = 0;
    187e:	f8cd c008 	str.w	ip, [sp, #8]
	min_width = -1;
    1882:	4634      	mov	r4, r6
				precision = 10 * precision + *fmt - '0';
			} else {
				if (min_width < 0) {
					min_width = 0;
				}
				min_width = 10 * min_width + *fmt - '0';
    1884:	f04f 0e0a 	mov.w	lr, #10
		switch (*fmt) {
    1888:	7802      	ldrb	r2, [r0, #0]
    188a:	9001      	str	r0, [sp, #4]
    188c:	2a39      	cmp	r2, #57	; 0x39
    188e:	f100 0001 	add.w	r0, r0, #1
    1892:	d857      	bhi.n	1944 <cbvprintf+0xf4>
    1894:	2a1f      	cmp	r2, #31
    1896:	d818      	bhi.n	18ca <cbvprintf+0x7a>
    1898:	2a00      	cmp	r2, #0
    189a:	f000 81fe 	beq.w	1c9a <cbvprintf+0x44a>
			precision = 0;
			break;
		}

		default:
			OUTC('%');
    189e:	9b00      	ldr	r3, [sp, #0]
    18a0:	4659      	mov	r1, fp
    18a2:	2025      	movs	r0, #37	; 0x25
    18a4:	4798      	blx	r3
			OUTC(*fmt);
    18a6:	9b01      	ldr	r3, [sp, #4]
    18a8:	4659      	mov	r1, fp
    18aa:	7818      	ldrb	r0, [r3, #0]
    18ac:	9b00      	ldr	r3, [sp, #0]
    18ae:	4798      	blx	r3
    18b0:	f10a 0a02 	add.w	sl, sl, #2
			goto start;
    18b4:	e7d6      	b.n	1864 <cbvprintf+0x14>
		if (*fmt == '\0') {
    18b6:	2800      	cmp	r0, #0
    18b8:	f000 81ef 	beq.w	1c9a <cbvprintf+0x44a>
		OUTC(*fmt);
    18bc:	9b00      	ldr	r3, [sp, #0]
    18be:	4659      	mov	r1, fp
    18c0:	4798      	blx	r3
    18c2:	f10a 0a01 	add.w	sl, sl, #1
	while (*++fmt != '%') {
    18c6:	9401      	str	r4, [sp, #4]
    18c8:	e7cc      	b.n	1864 <cbvprintf+0x14>
    18ca:	f1a2 0320 	sub.w	r3, r2, #32
    18ce:	2b19      	cmp	r3, #25
    18d0:	d8e5      	bhi.n	189e <cbvprintf+0x4e>
    18d2:	a501      	add	r5, pc, #4	; (adr r5, 18d8 <cbvprintf+0x88>)
    18d4:	f855 f023 	ldr.w	pc, [r5, r3, lsl #2]
    18d8:	00001941 	.word	0x00001941
    18dc:	0000189f 	.word	0x0000189f
    18e0:	0000189f 	.word	0x0000189f
    18e4:	00001941 	.word	0x00001941
    18e8:	0000189f 	.word	0x0000189f
    18ec:	000019c1 	.word	0x000019c1
    18f0:	0000189f 	.word	0x0000189f
    18f4:	0000189f 	.word	0x0000189f
    18f8:	0000189f 	.word	0x0000189f
    18fc:	0000189f 	.word	0x0000189f
    1900:	00001a03 	.word	0x00001a03
    1904:	00001941 	.word	0x00001941
    1908:	0000189f 	.word	0x0000189f
    190c:	00001a17 	.word	0x00001a17
    1910:	000019cf 	.word	0x000019cf
    1914:	0000189f 	.word	0x0000189f
    1918:	000019db 	.word	0x000019db
    191c:	000019f7 	.word	0x000019f7
    1920:	000019f7 	.word	0x000019f7
    1924:	000019f7 	.word	0x000019f7
    1928:	000019f7 	.word	0x000019f7
    192c:	000019f7 	.word	0x000019f7
    1930:	000019f7 	.word	0x000019f7
    1934:	000019f7 	.word	0x000019f7
    1938:	000019f7 	.word	0x000019f7
    193c:	000019f7 	.word	0x000019f7
		switch (*fmt) {
    1940:	4694      	mov	ip, r2
    1942:	e7a1      	b.n	1888 <cbvprintf+0x38>
    1944:	2a58      	cmp	r2, #88	; 0x58
    1946:	f000 8140 	beq.w	1bca <cbvprintf+0x37a>
    194a:	f1a2 0363 	sub.w	r3, r2, #99	; 0x63
    194e:	b2dd      	uxtb	r5, r3
    1950:	2d17      	cmp	r5, #23
    1952:	d8a4      	bhi.n	189e <cbvprintf+0x4e>
    1954:	2b17      	cmp	r3, #23
    1956:	d8a2      	bhi.n	189e <cbvprintf+0x4e>
    1958:	a501      	add	r5, pc, #4	; (adr r5, 1960 <cbvprintf+0x110>)
    195a:	f855 f023 	ldr.w	pc, [r5, r3, lsl #2]
    195e:	bf00      	nop
    1960:	00001c25 	.word	0x00001c25
    1964:	00001a3d 	.word	0x00001a3d
    1968:	0000189f 	.word	0x0000189f
    196c:	0000189f 	.word	0x0000189f
    1970:	0000189f 	.word	0x0000189f
    1974:	00001a1d 	.word	0x00001a1d
    1978:	00001a3d 	.word	0x00001a3d
    197c:	0000189f 	.word	0x0000189f
    1980:	0000189f 	.word	0x0000189f
    1984:	00001a1d 	.word	0x00001a1d
    1988:	0000189f 	.word	0x0000189f
    198c:	0000189f 	.word	0x0000189f
    1990:	0000189f 	.word	0x0000189f
    1994:	00001b75 	.word	0x00001b75
    1998:	0000189f 	.word	0x0000189f
    199c:	0000189f 	.word	0x0000189f
    19a0:	00001c07 	.word	0x00001c07
    19a4:	0000189f 	.word	0x0000189f
    19a8:	00001a3d 	.word	0x00001a3d
    19ac:	0000189f 	.word	0x0000189f
    19b0:	0000189f 	.word	0x0000189f
    19b4:	00001b75 	.word	0x00001b75
    19b8:	0000189f 	.word	0x0000189f
    19bc:	00001a1d 	.word	0x00001a1d
			OUTC('%');
    19c0:	9b00      	ldr	r3, [sp, #0]
    19c2:	4659      	mov	r1, fp
    19c4:	2025      	movs	r0, #37	; 0x25
    19c6:	4798      	blx	r3
    19c8:	f10a 0a01 	add.w	sl, sl, #1
			goto start;
    19cc:	e74a      	b.n	1864 <cbvprintf+0x14>
			padding_mode &= (char)~PAD_ZERO;
    19ce:	9b02      	ldr	r3, [sp, #8]
    19d0:	f003 03fe 	and.w	r3, r3, #254	; 0xfe
    19d4:	9302      	str	r3, [sp, #8]
			precision = 0;
    19d6:	2600      	movs	r6, #0
			continue;
    19d8:	e756      	b.n	1888 <cbvprintf+0x38>
			if (min_width < 0 && precision < 0 && !padding_mode) {
    19da:	2c00      	cmp	r4, #0
    19dc:	da0b      	bge.n	19f6 <cbvprintf+0x1a6>
    19de:	2e00      	cmp	r6, #0
    19e0:	da0b      	bge.n	19fa <cbvprintf+0x1aa>
    19e2:	9b02      	ldr	r3, [sp, #8]
    19e4:	2b00      	cmp	r3, #0
    19e6:	f000 8154 	beq.w	1c92 <cbvprintf+0x442>
				min_width = 10 * min_width + *fmt - '0';
    19ea:	ea24 74e4 	bic.w	r4, r4, r4, asr #31
    19ee:	fb0e 2404 	mla	r4, lr, r4, r2
    19f2:	3c30      	subs	r4, #48	; 0x30
    19f4:	e748      	b.n	1888 <cbvprintf+0x38>
			if (precision >= 0) {
    19f6:	2e00      	cmp	r6, #0
    19f8:	dbf7      	blt.n	19ea <cbvprintf+0x19a>
				precision = 10 * precision + *fmt - '0';
    19fa:	fb0e 2606 	mla	r6, lr, r6, r2
    19fe:	3e30      	subs	r6, #48	; 0x30
    1a00:	e742      	b.n	1888 <cbvprintf+0x38>
			if (precision >= 0) {
    1a02:	2e00      	cmp	r6, #0
    1a04:	f857 3b04 	ldr.w	r3, [r7], #4
    1a08:	db01      	blt.n	1a0e <cbvprintf+0x1be>
				precision = va_arg(ap, int);
    1a0a:	461e      	mov	r6, r3
    1a0c:	e73c      	b.n	1888 <cbvprintf+0x38>
				if (min_width < 0) {
    1a0e:	1e1c      	subs	r4, r3, #0
    1a10:	f6bf af3a 	bge.w	1888 <cbvprintf+0x38>
					min_width = -min_width;
    1a14:	4264      	negs	r4, r4
		switch (*fmt) {
    1a16:	2302      	movs	r3, #2
				padding_mode = PAD_ZERO;
    1a18:	9302      	str	r3, [sp, #8]
    1a1a:	e735      	b.n	1888 <cbvprintf+0x38>
			if (*fmt == 'h' && length_mod == 'h') {
    1a1c:	2a68      	cmp	r2, #104	; 0x68
    1a1e:	d103      	bne.n	1a28 <cbvprintf+0x1d8>
    1a20:	2968      	cmp	r1, #104	; 0x68
    1a22:	d106      	bne.n	1a32 <cbvprintf+0x1e2>
				length_mod = 'H';
    1a24:	2148      	movs	r1, #72	; 0x48
    1a26:	e72f      	b.n	1888 <cbvprintf+0x38>
			} else if (*fmt == 'l' && length_mod == 'l') {
    1a28:	2a6c      	cmp	r2, #108	; 0x6c
    1a2a:	d102      	bne.n	1a32 <cbvprintf+0x1e2>
    1a2c:	296c      	cmp	r1, #108	; 0x6c
    1a2e:	f000 8132 	beq.w	1c96 <cbvprintf+0x446>
			} else if (length_mod == '\0') {
    1a32:	2900      	cmp	r1, #0
    1a34:	f47f af33 	bne.w	189e <cbvprintf+0x4e>
    1a38:	4611      	mov	r1, r2
		switch (*fmt) {
    1a3a:	e725      	b.n	1888 <cbvprintf+0x38>
			if (length_mod == 'z') {
    1a3c:	297a      	cmp	r1, #122	; 0x7a
    1a3e:	d10f      	bne.n	1a60 <cbvprintf+0x210>
				d = va_arg(ap, unsigned int);
    1a40:	683b      	ldr	r3, [r7, #0]
			} else if (*fmt == 'u') {
    1a42:	2a75      	cmp	r2, #117	; 0x75
    1a44:	f107 0504 	add.w	r5, r7, #4
				d = va_arg(ap, unsigned int);
    1a48:	4698      	mov	r8, r3
			} else if (*fmt == 'u') {
    1a4a:	f040 8088 	bne.w	1b5e <cbvprintf+0x30e>
				d = va_arg(ap, unsigned int);
    1a4e:	f04f 0900 	mov.w	r9, #0
			} else if (special == ' ') {
    1a52:	f1bc 0f20 	cmp.w	ip, #32
    1a56:	f040 8085 	bne.w	1b64 <cbvprintf+0x314>
				prefix = " ";
    1a5a:	4f92      	ldr	r7, [pc, #584]	; (1ca4 <cbvprintf+0x454>)
				min_width--;
    1a5c:	3c01      	subs	r4, #1
    1a5e:	e015      	b.n	1a8c <cbvprintf+0x23c>
			} else if (length_mod == 'l') {
    1a60:	296c      	cmp	r1, #108	; 0x6c
    1a62:	d0ed      	beq.n	1a40 <cbvprintf+0x1f0>
			} else if (length_mod == 'L') {
    1a64:	294c      	cmp	r1, #76	; 0x4c
    1a66:	d1eb      	bne.n	1a40 <cbvprintf+0x1f0>
				if (*fmt == 'u') {
    1a68:	1dfd      	adds	r5, r7, #7
    1a6a:	f025 0507 	bic.w	r5, r5, #7
    1a6e:	2a75      	cmp	r2, #117	; 0x75
    1a70:	e8f5 8902 	ldrd	r8, r9, [r5], #8
    1a74:	d0ed      	beq.n	1a52 <cbvprintf+0x202>
			if (*fmt != 'u' && (int_value_type)d < 0) {
    1a76:	f1b8 0f00 	cmp.w	r8, #0
    1a7a:	f179 0300 	sbcs.w	r3, r9, #0
    1a7e:	dae8      	bge.n	1a52 <cbvprintf+0x202>
				d = -d;
    1a80:	f1d8 0800 	rsbs	r8, r8, #0
				prefix = "-";
    1a84:	4f88      	ldr	r7, [pc, #544]	; (1ca8 <cbvprintf+0x458>)
				d = -d;
    1a86:	eb69 0949 	sbc.w	r9, r9, r9, lsl #1
				min_width--;
    1a8a:	3c01      	subs	r4, #1
	int i = 0;
    1a8c:	ab0d      	add	r3, sp, #52	; 0x34
    1a8e:	9305      	str	r3, [sp, #20]
    1a90:	2300      	movs	r3, #0
    1a92:	9303      	str	r3, [sp, #12]
		buftop[--i] = c + '0';
    1a94:	9b03      	ldr	r3, [sp, #12]
    1a96:	9304      	str	r3, [sp, #16]
    1a98:	3b01      	subs	r3, #1
    1a9a:	9303      	str	r3, [sp, #12]
		unsigned int c = num % base;
    1a9c:	4640      	mov	r0, r8
    1a9e:	4649      	mov	r1, r9
    1aa0:	220a      	movs	r2, #10
    1aa2:	2300      	movs	r3, #0
    1aa4:	f7fe fb1a 	bl	dc <__aeabi_uldivmod>
		buftop[--i] = c + '0';
    1aa8:	9b05      	ldr	r3, [sp, #20]
    1aaa:	3230      	adds	r2, #48	; 0x30
    1aac:	f803 2901 	strb.w	r2, [r3], #-1
		num /= base;
    1ab0:	4640      	mov	r0, r8
		buftop[--i] = c + '0';
    1ab2:	9305      	str	r3, [sp, #20]
		num /= base;
    1ab4:	220a      	movs	r2, #10
    1ab6:	2300      	movs	r3, #0
    1ab8:	4649      	mov	r1, r9
    1aba:	e9cd 8906 	strd	r8, r9, [sp, #24]
    1abe:	f7fe fb0d 	bl	dc <__aeabi_uldivmod>
	} while (num);
    1ac2:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
    1ac6:	2b00      	cmp	r3, #0
    1ac8:	bf08      	it	eq
    1aca:	2a0a      	cmpeq	r2, #10
		num /= base;
    1acc:	4680      	mov	r8, r0
    1ace:	4689      	mov	r9, r1
	} while (num);
    1ad0:	d2e0      	bcs.n	1a94 <cbvprintf+0x244>
	return -i;
    1ad2:	9b04      	ldr	r3, [sp, #16]
			data = buf + sizeof(buf) - data_len;
    1ad4:	aa0e      	add	r2, sp, #56	; 0x38
	return -i;
    1ad6:	f1c3 0901 	rsb	r9, r3, #1
			data = buf + sizeof(buf) - data_len;
    1ada:	eb02 0803 	add.w	r8, r2, r3
		}

		if (precision < 0 && (padding_mode & PAD_ZERO)) {
    1ade:	2e00      	cmp	r6, #0
			data = buf + sizeof(buf) - data_len;
    1ae0:	f1a8 0804 	sub.w	r8, r8, #4
		if (precision < 0 && (padding_mode & PAD_ZERO)) {
    1ae4:	da04      	bge.n	1af0 <cbvprintf+0x2a0>
    1ae6:	9b02      	ldr	r3, [sp, #8]
    1ae8:	f013 0f01 	tst.w	r3, #1
    1aec:	bf18      	it	ne
    1aee:	4626      	movne	r6, r4
			precision = min_width;
		}
		min_width -= data_len;
		precision -= data_len;
    1af0:	eba6 0309 	sub.w	r3, r6, r9
		if (precision > 0) {
    1af4:	2b00      	cmp	r3, #0
		precision -= data_len;
    1af6:	9303      	str	r3, [sp, #12]
			min_width -= precision;
		}

		if (!(padding_mode & PAD_TAIL)) {
    1af8:	9b02      	ldr	r3, [sp, #8]
		min_width -= data_len;
    1afa:	bfd4      	ite	le
    1afc:	eba4 0409 	suble.w	r4, r4, r9
			min_width -= precision;
    1b00:	1ba4      	subgt	r4, r4, r6
		if (!(padding_mode & PAD_TAIL)) {
    1b02:	079a      	lsls	r2, r3, #30
    1b04:	f140 80af 	bpl.w	1c66 <cbvprintf+0x416>
    1b08:	ebaa 0607 	sub.w	r6, sl, r7
    1b0c:	eb06 0a07 	add.w	sl, r6, r7
			while (--min_width >= 0) {
				OUTC(' ');
			}
		}
		while (*prefix) {
    1b10:	f817 0b01 	ldrb.w	r0, [r7], #1
    1b14:	2800      	cmp	r0, #0
    1b16:	f040 80a8 	bne.w	1c6a <cbvprintf+0x41a>
		precision -= data_len;
    1b1a:	9e03      	ldr	r6, [sp, #12]
			OUTC(*prefix++);
		}
		while (--precision >= 0) {
    1b1c:	3e01      	subs	r6, #1
    1b1e:	f140 80a8 	bpl.w	1c72 <cbvprintf+0x422>
    1b22:	9b03      	ldr	r3, [sp, #12]
    1b24:	1e5a      	subs	r2, r3, #1
    1b26:	3201      	adds	r2, #1
    1b28:	bfac      	ite	ge
    1b2a:	461f      	movge	r7, r3
    1b2c:	2700      	movlt	r7, #0
    1b2e:	464e      	mov	r6, r9
			OUTC('0');
		}
		while (--data_len >= 0) {
    1b30:	3e01      	subs	r6, #1
    1b32:	f140 80a3 	bpl.w	1c7c <cbvprintf+0x42c>
    1b36:	f109 32ff 	add.w	r2, r9, #4294967295
    1b3a:	3201      	adds	r2, #1
    1b3c:	bfac      	ite	ge
    1b3e:	464b      	movge	r3, r9
    1b40:	2300      	movlt	r3, #0
    1b42:	eb03 0907 	add.w	r9, r3, r7
    1b46:	4626      	mov	r6, r4
			OUTC(*data++);
		}
		while (--min_width >= 0) {
    1b48:	3e01      	subs	r6, #1
    1b4a:	f140 809d 	bpl.w	1c88 <cbvprintf+0x438>
    1b4e:	1e63      	subs	r3, r4, #1
    1b50:	3301      	adds	r3, #1
    1b52:	bfb8      	it	lt
    1b54:	2400      	movlt	r4, #0
    1b56:	44a1      	add	r9, r4
    1b58:	44ca      	add	sl, r9
    1b5a:	462f      	mov	r7, r5
    1b5c:	e682      	b.n	1864 <cbvprintf+0x14>
				d = va_arg(ap, int);
    1b5e:	ea4f 79e3 	mov.w	r9, r3, asr #31
    1b62:	e788      	b.n	1a76 <cbvprintf+0x226>
			} else if (special == '+') {
    1b64:	f1bc 0f2b 	cmp.w	ip, #43	; 0x2b
				prefix = "+";
    1b68:	bf0a      	itet	eq
    1b6a:	4f50      	ldreq	r7, [pc, #320]	; (1cac <cbvprintf+0x45c>)
	prefix = "";
    1b6c:	4f50      	ldrne	r7, [pc, #320]	; (1cb0 <cbvprintf+0x460>)
				min_width--;
    1b6e:	f104 34ff 	addeq.w	r4, r4, #4294967295
    1b72:	e78b      	b.n	1a8c <cbvprintf+0x23c>
			if (*fmt == 'p') {
    1b74:	2a70      	cmp	r2, #112	; 0x70
    1b76:	d128      	bne.n	1bca <cbvprintf+0x37a>
				x = (uintptr_t)va_arg(ap, void *);
    1b78:	463d      	mov	r5, r7
    1b7a:	f855 0b04 	ldr.w	r0, [r5], #4
				if (x == (uint_value_type)0) {
    1b7e:	2800      	cmp	r0, #0
    1b80:	d05a      	beq.n	1c38 <cbvprintf+0x3e8>
				prefix = (*fmt & 0x20) ? "0x" : "0X";
    1b82:	4f4c      	ldr	r7, [pc, #304]	; (1cb4 <cbvprintf+0x464>)
				x = (uintptr_t)va_arg(ap, void *);
    1b84:	2100      	movs	r1, #0
				min_width -= 2;
    1b86:	3c02      	subs	r4, #2
			data_len = convert_value(x, 16, ALPHA(*fmt),
    1b88:	f002 0260 	and.w	r2, r2, #96	; 0x60
    1b8c:	f1a2 0939 	sub.w	r9, r2, #57	; 0x39
	int i = 0;
    1b90:	f10d 0e34 	add.w	lr, sp, #52	; 0x34
    1b94:	f04f 0800 	mov.w	r8, #0
		unsigned int c = num % base;
    1b98:	f000 030f 	and.w	r3, r0, #15
		if (c >= 10) {
    1b9c:	2b09      	cmp	r3, #9
			c += alpha;
    1b9e:	bf88      	it	hi
    1ba0:	444b      	addhi	r3, r9
		buftop[--i] = c + '0';
    1ba2:	3330      	adds	r3, #48	; 0x30
	} while (num);
    1ba4:	2900      	cmp	r1, #0
		buftop[--i] = c + '0';
    1ba6:	f80e 3901 	strb.w	r3, [lr], #-1
	} while (num);
    1baa:	bf08      	it	eq
    1bac:	2810      	cmpeq	r0, #16
		num /= base;
    1bae:	ea4f 1310 	mov.w	r3, r0, lsr #4
		buftop[--i] = c + '0';
    1bb2:	f108 3cff 	add.w	ip, r8, #4294967295
		num /= base;
    1bb6:	ea43 7301 	orr.w	r3, r3, r1, lsl #28
    1bba:	ea4f 1211 	mov.w	r2, r1, lsr #4
	} while (num);
    1bbe:	d21e      	bcs.n	1bfe <cbvprintf+0x3ae>
			data = buf + sizeof(buf) - data_len;
    1bc0:	ab0e      	add	r3, sp, #56	; 0x38
	return -i;
    1bc2:	f1c8 0901 	rsb	r9, r8, #1
			data = buf + sizeof(buf) - data_len;
    1bc6:	4498      	add	r8, r3
    1bc8:	e789      	b.n	1ade <cbvprintf+0x28e>
			} else if (length_mod == 'l') {
    1bca:	296c      	cmp	r1, #108	; 0x6c
    1bcc:	d104      	bne.n	1bd8 <cbvprintf+0x388>
				x = va_arg(ap, unsigned int);
    1bce:	463d      	mov	r5, r7
    1bd0:	2100      	movs	r1, #0
    1bd2:	f855 0b04 	ldr.w	r0, [r5], #4
    1bd6:	e006      	b.n	1be6 <cbvprintf+0x396>
			} else if (length_mod == 'L') {
    1bd8:	294c      	cmp	r1, #76	; 0x4c
    1bda:	d1f8      	bne.n	1bce <cbvprintf+0x37e>
				unsigned long long llx =
    1bdc:	1dfd      	adds	r5, r7, #7
    1bde:	f025 0507 	bic.w	r5, r5, #7
    1be2:	e8f5 0102 	ldrd	r0, r1, [r5], #8
			if (special == '#') {
    1be6:	f1bc 0f23 	cmp.w	ip, #35	; 0x23
    1bea:	d106      	bne.n	1bfa <cbvprintf+0x3aa>
				prefix = (*fmt & 0x20) ? "0x" : "0X";
    1bec:	4b31      	ldr	r3, [pc, #196]	; (1cb4 <cbvprintf+0x464>)
    1bee:	4f32      	ldr	r7, [pc, #200]	; (1cb8 <cbvprintf+0x468>)
    1bf0:	f012 0f20 	tst.w	r2, #32
    1bf4:	bf18      	it	ne
    1bf6:	461f      	movne	r7, r3
    1bf8:	e7c5      	b.n	1b86 <cbvprintf+0x336>
	prefix = "";
    1bfa:	4f2d      	ldr	r7, [pc, #180]	; (1cb0 <cbvprintf+0x460>)
    1bfc:	e7c4      	b.n	1b88 <cbvprintf+0x338>
		buftop[--i] = c + '0';
    1bfe:	46e0      	mov	r8, ip
		num /= base;
    1c00:	4618      	mov	r0, r3
    1c02:	4611      	mov	r1, r2
    1c04:	e7c8      	b.n	1b98 <cbvprintf+0x348>
			data = va_arg(ap, char *);
    1c06:	463d      	mov	r5, r7
    1c08:	f855 8b04 	ldr.w	r8, [r5], #4
			data_len = strlen(data);
    1c0c:	4640      	mov	r0, r8
    1c0e:	f004 fcf3 	bl	65f8 <strlen>
			if (precision >= 0 && data_len > precision) {
    1c12:	2e00      	cmp	r6, #0
			data_len = strlen(data);
    1c14:	4681      	mov	r9, r0
			if (precision >= 0 && data_len > precision) {
    1c16:	db02      	blt.n	1c1e <cbvprintf+0x3ce>
    1c18:	42b0      	cmp	r0, r6
    1c1a:	bfa8      	it	ge
    1c1c:	46b1      	movge	r9, r6
    1c1e:	4f24      	ldr	r7, [pc, #144]	; (1cb0 <cbvprintf+0x460>)
    1c20:	2600      	movs	r6, #0
    1c22:	e765      	b.n	1af0 <cbvprintf+0x2a0>
			int c = va_arg(ap, int);
    1c24:	463d      	mov	r5, r7
			data_len = 1;
    1c26:	f04f 0901 	mov.w	r9, #1
			buf[0] = c;
    1c2a:	f855 3b04 	ldr.w	r3, [r5], #4
    1c2e:	f88d 3020 	strb.w	r3, [sp, #32]
			data = buf;
    1c32:	f10d 0820 	add.w	r8, sp, #32
    1c36:	e7f2      	b.n	1c1e <cbvprintf+0x3ce>
					data = "(nil)";
    1c38:	f8df 8080 	ldr.w	r8, [pc, #128]	; 1cbc <cbvprintf+0x46c>
					data_len = 5;
    1c3c:	f04f 0905 	mov.w	r9, #5
    1c40:	e7ed      	b.n	1c1e <cbvprintf+0x3ce>
				OUTC(' ');
    1c42:	9b00      	ldr	r3, [sp, #0]
    1c44:	4659      	mov	r1, fp
    1c46:	2020      	movs	r0, #32
    1c48:	4798      	blx	r3
			while (--min_width >= 0) {
    1c4a:	3e01      	subs	r6, #1
    1c4c:	d5f9      	bpl.n	1c42 <cbvprintf+0x3f2>
    1c4e:	1e62      	subs	r2, r4, #1
    1c50:	1c53      	adds	r3, r2, #1
    1c52:	bfac      	ite	ge
    1c54:	4621      	movge	r1, r4
    1c56:	2100      	movlt	r1, #0
    1c58:	f1c4 0400 	rsb	r4, r4, #0
    1c5c:	bfb8      	it	lt
    1c5e:	2400      	movlt	r4, #0
    1c60:	448a      	add	sl, r1
    1c62:	4414      	add	r4, r2
    1c64:	e750      	b.n	1b08 <cbvprintf+0x2b8>
    1c66:	4626      	mov	r6, r4
    1c68:	e7ef      	b.n	1c4a <cbvprintf+0x3fa>
			OUTC(*prefix++);
    1c6a:	9b00      	ldr	r3, [sp, #0]
    1c6c:	4659      	mov	r1, fp
    1c6e:	4798      	blx	r3
    1c70:	e74c      	b.n	1b0c <cbvprintf+0x2bc>
			OUTC('0');
    1c72:	9b00      	ldr	r3, [sp, #0]
    1c74:	4659      	mov	r1, fp
    1c76:	2030      	movs	r0, #48	; 0x30
    1c78:	4798      	blx	r3
    1c7a:	e74f      	b.n	1b1c <cbvprintf+0x2cc>
			OUTC(*data++);
    1c7c:	f818 0b01 	ldrb.w	r0, [r8], #1
    1c80:	9b00      	ldr	r3, [sp, #0]
    1c82:	4659      	mov	r1, fp
    1c84:	4798      	blx	r3
    1c86:	e753      	b.n	1b30 <cbvprintf+0x2e0>
			OUTC(' ');
    1c88:	9b00      	ldr	r3, [sp, #0]
    1c8a:	4659      	mov	r1, fp
    1c8c:	2020      	movs	r0, #32
    1c8e:	4798      	blx	r3
    1c90:	e75a      	b.n	1b48 <cbvprintf+0x2f8>
				padding_mode = PAD_ZERO;
    1c92:	2301      	movs	r3, #1
    1c94:	e6c0      	b.n	1a18 <cbvprintf+0x1c8>
				length_mod = 'L';
    1c96:	214c      	movs	r1, #76	; 0x4c
    1c98:	e5f6      	b.n	1888 <cbvprintf+0x38>
		}

		goto start;
	}
}
    1c9a:	4650      	mov	r0, sl
    1c9c:	b00f      	add	sp, #60	; 0x3c
    1c9e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    1ca2:	bf00      	nop
    1ca4:	00009901 	.word	0x00009901
    1ca8:	00009412 	.word	0x00009412
    1cac:	00009414 	.word	0x00009414
    1cb0:	00009c98 	.word	0x00009c98
    1cb4:	00009416 	.word	0x00009416
    1cb8:	00009419 	.word	0x00009419
    1cbc:	0000941c 	.word	0x0000941c

00001cc0 <sys_reboot>:
#include <sys/printk.h>

extern void sys_arch_reboot(int type);

FUNC_NORETURN void sys_reboot(int type)
{
    1cc0:	b508      	push	{r3, lr}
    1cc2:	f04f 0220 	mov.w	r2, #32
    1cc6:	f3ef 8311 	mrs	r3, BASEPRI
    1cca:	f382 8812 	msr	BASEPRI_MAX, r2
    1cce:	f3bf 8f6f 	isb	sy
	(void)irq_lock();
	sys_clock_disable();

	sys_arch_reboot(type);
    1cd2:	f001 f9b3 	bl	303c <sys_arch_reboot>

	/* should never get here */
	printk("Failed to reboot: spinning endlessly...\n");
    1cd6:	4803      	ldr	r0, [pc, #12]	; (1ce4 <sys_reboot+0x24>)
    1cd8:	f004 f883 	bl	5de2 <printk>
 *
 * @return N/A
 */
static inline void k_cpu_idle(void)
{
	arch_cpu_idle();
    1cdc:	f000 fd8e 	bl	27fc <arch_cpu_idle>
    1ce0:	e7fc      	b.n	1cdc <sys_reboot+0x1c>
    1ce2:	bf00      	nop
    1ce4:	00009422 	.word	0x00009422

00001ce8 <flash_area_open>:

int flash_area_open(uint8_t id, const struct flash_area **fap)
{
	const struct flash_area *area;

	if (flash_map == NULL) {
    1ce8:	4b0c      	ldr	r3, [pc, #48]	; (1d1c <flash_area_open+0x34>)
    1cea:	681b      	ldr	r3, [r3, #0]
{
    1cec:	b570      	push	{r4, r5, r6, lr}
	if (flash_map == NULL) {
    1cee:	b173      	cbz	r3, 1d0e <flash_area_open+0x26>
extern const struct flash_area *flash_map;
extern const int flash_map_entries;

static inline struct flash_area const *get_flash_area_from_id(int idx)
{
	for (int i = 0; i < flash_map_entries; i++) {
    1cf0:	4a0b      	ldr	r2, [pc, #44]	; (1d20 <flash_area_open+0x38>)
    1cf2:	6815      	ldr	r5, [r2, #0]
    1cf4:	2200      	movs	r2, #0
    1cf6:	42aa      	cmp	r2, r5
    1cf8:	db02      	blt.n	1d00 <flash_area_open+0x18>
		return -EACCES;
	}

	area = get_flash_area_from_id(id);
	if (area == NULL) {
		return -ENOENT;
    1cfa:	f06f 0001 	mvn.w	r0, #1
	}

	*fap = area;
	return 0;
}
    1cfe:	bd70      	pop	{r4, r5, r6, pc}
		if (flash_map[i].fa_id == idx) {
    1d00:	461c      	mov	r4, r3
    1d02:	f813 6b10 	ldrb.w	r6, [r3], #16
    1d06:	4286      	cmp	r6, r0
    1d08:	d004      	beq.n	1d14 <flash_area_open+0x2c>
	for (int i = 0; i < flash_map_entries; i++) {
    1d0a:	3201      	adds	r2, #1
    1d0c:	e7f3      	b.n	1cf6 <flash_area_open+0xe>
		return -EACCES;
    1d0e:	f06f 000c 	mvn.w	r0, #12
    1d12:	e7f4      	b.n	1cfe <flash_area_open+0x16>
	*fap = area;
    1d14:	600c      	str	r4, [r1, #0]
	return 0;
    1d16:	2000      	movs	r0, #0
    1d18:	e7f1      	b.n	1cfe <flash_area_open+0x16>
    1d1a:	bf00      	nop
    1d1c:	2000000c 	.word	0x2000000c
    1d20:	00008b90 	.word	0x00008b90

00001d24 <flash_area_get_sectors>:

	return true;
}

int flash_area_get_sectors(int idx, uint32_t *cnt, struct flash_sector *ret)
{
    1d24:	b570      	push	{r4, r5, r6, lr}
    1d26:	b088      	sub	sp, #32
    1d28:	4605      	mov	r5, r0
    1d2a:	460c      	mov	r4, r1
	int rc = flash_area_open(idx, &fa);
    1d2c:	b2c0      	uxtb	r0, r0
    1d2e:	4669      	mov	r1, sp
{
    1d30:	4616      	mov	r6, r2
	int rc = flash_area_open(idx, &fa);
    1d32:	f7ff ffd9 	bl	1ce8 <flash_area_open>
	if (rc < 0 || fa == NULL) {
    1d36:	2800      	cmp	r0, #0
    1d38:	db1f      	blt.n	1d7a <flash_area_get_sectors+0x56>
    1d3a:	9b00      	ldr	r3, [sp, #0]
    1d3c:	b1eb      	cbz	r3, 1d7a <flash_area_get_sectors+0x56>
	cb_data->area_off = fa->fa_off;
    1d3e:	685a      	ldr	r2, [r3, #4]
    1d40:	9202      	str	r2, [sp, #8]
	cb_data->area_len = fa->fa_size;
    1d42:	689a      	ldr	r2, [r3, #8]
	cb_data->ret_len = *cnt;
    1d44:	6821      	ldr	r1, [r4, #0]
	flash_dev = device_get_binding(fa->fa_dev_name);
    1d46:	68d8      	ldr	r0, [r3, #12]
	cb_data->area_idx = idx;
    1d48:	9501      	str	r5, [sp, #4]
	cb_data->ret = ret;
    1d4a:	e9cd 2603 	strd	r2, r6, [sp, #12]
	cb_data->ret_idx = 0U;
    1d4e:	2200      	movs	r2, #0
	cb_data->status = 0;
    1d50:	e9cd 1206 	strd	r1, r2, [sp, #24]
	cb_data->ret_idx = 0U;
    1d54:	9205      	str	r2, [sp, #20]
    1d56:	f003 fbdf 	bl	5518 <z_impl_device_get_binding>
    1d5a:	4605      	mov	r5, r0
	flash_area_close(fa);
    1d5c:	9800      	ldr	r0, [sp, #0]
    1d5e:	f004 f906 	bl	5f6e <flash_area_close>
	if (flash_dev == NULL) {
    1d62:	b16d      	cbz	r5, 1d80 <flash_area_get_sectors+0x5c>
	flash_page_foreach(flash_dev, cb, cb_data);
    1d64:	4628      	mov	r0, r5
    1d66:	4908      	ldr	r1, [pc, #32]	; (1d88 <flash_area_get_sectors+0x64>)
    1d68:	aa01      	add	r2, sp, #4
    1d6a:	f004 fdc5 	bl	68f8 <flash_page_foreach>
	if (cb_data->status == 0) {
    1d6e:	9807      	ldr	r0, [sp, #28]
    1d70:	b908      	cbnz	r0, 1d76 <flash_area_get_sectors+0x52>
		*cnt = cb_data->ret_idx;
    1d72:	9b05      	ldr	r3, [sp, #20]
    1d74:	6023      	str	r3, [r4, #0]
	struct layout_data data;

	return flash_area_layout(idx, cnt, ret, get_sectors_cb, &data);
}
    1d76:	b008      	add	sp, #32
    1d78:	bd70      	pop	{r4, r5, r6, pc}
		return -EINVAL;
    1d7a:	f06f 0015 	mvn.w	r0, #21
    1d7e:	e7fa      	b.n	1d76 <flash_area_get_sectors+0x52>
		return -ENODEV;
    1d80:	f06f 0012 	mvn.w	r0, #18
	return flash_area_layout(idx, cnt, ret, get_sectors_cb, &data);
    1d84:	e7f7      	b.n	1d76 <flash_area_get_sectors+0x52>
    1d86:	bf00      	nop
    1d88:	00006091 	.word	0x00006091

00001d8c <boot_uart_fifo_callback>:
	return boot_uart_fifo_init();
}

static void
boot_uart_fifo_callback(const struct device *dev, void *user_data)
{
    1d8c:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
	static struct line_input *cmd;
	uint8_t byte;
	int rx;

	uart_irq_update(uart_dev);
    1d8e:	4d26      	ldr	r5, [pc, #152]	; (1e28 <boot_uart_fifo_callback+0x9c>)
    1d90:	6828      	ldr	r0, [r5, #0]
{
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
	const struct uart_driver_api *api =
		(const struct uart_driver_api *)dev->api;

	if (api->irq_update == NULL) {
    1d92:	6883      	ldr	r3, [r0, #8]
    1d94:	6c5b      	ldr	r3, [r3, #68]	; 0x44
    1d96:	b103      	cbz	r3, 1d9a <boot_uart_fifo_callback+0xe>
		return -ENOSYS;
	}
	return api->irq_update(dev);
    1d98:	4798      	blx	r3

	if (!uart_irq_rx_ready(uart_dev)) {
    1d9a:	6828      	ldr	r0, [r5, #0]
	if (api->irq_rx_ready == NULL) {
    1d9c:	6883      	ldr	r3, [r0, #8]
    1d9e:	6b5b      	ldr	r3, [r3, #52]	; 0x34
    1da0:	b9a3      	cbnz	r3, 1dcc <boot_uart_fifo_callback+0x40>
		rx = uart_fifo_read(uart_dev, &byte, 1);
		if (rx != 1) {
			break;
		}

		if (!cmd) {
    1da2:	4c22      	ldr	r4, [pc, #136]	; (1e2c <boot_uart_fifo_callback+0xa0>)
Z_GENLIST_IS_EMPTY(slist)
    1da4:	4e22      	ldr	r6, [pc, #136]	; (1e30 <boot_uart_fifo_callback+0xa4>)
		rx = uart_fifo_read(uart_dev, &byte, 1);
    1da6:	6828      	ldr	r0, [r5, #0]
	if (api->fifo_read == NULL) {
    1da8:	6883      	ldr	r3, [r0, #8]
    1daa:	699b      	ldr	r3, [r3, #24]
    1dac:	b18b      	cbz	r3, 1dd2 <boot_uart_fifo_callback+0x46>
	return api->fifo_read(dev, rx_data, size);
    1dae:	2201      	movs	r2, #1
    1db0:	f10d 0107 	add.w	r1, sp, #7
    1db4:	4798      	blx	r3
		if (rx != 1) {
    1db6:	2801      	cmp	r0, #1
    1db8:	d10b      	bne.n	1dd2 <boot_uart_fifo_callback+0x46>
		if (!cmd) {
    1dba:	6823      	ldr	r3, [r4, #0]
    1dbc:	b993      	cbnz	r3, 1de4 <boot_uart_fifo_callback+0x58>
    1dbe:	6833      	ldr	r3, [r6, #0]
 *
 * @return A pointer to the first node of the list (or NULL if empty)
 */
static inline sys_snode_t *sys_slist_get(sys_slist_t *list);

Z_GENLIST_GET(slist, snode)
    1dc0:	b94b      	cbnz	r3, 1dd6 <boot_uart_fifo_callback+0x4a>
			sys_snode_t *node;

			node = sys_slist_get(&avail_queue);
			if (!node) {
				BOOT_LOG_ERR("Not enough memory to store"
    1dc2:	481c      	ldr	r0, [pc, #112]	; (1e34 <boot_uart_fifo_callback+0xa8>)
    1dc4:	2145      	movs	r1, #69	; 0x45
    1dc6:	f004 f8c5 	bl	5f54 <z_log_minimal_printk>
					     " incoming data!");
				return;
    1dca:	e002      	b.n	1dd2 <boot_uart_fifo_callback+0x46>
	return api->irq_rx_ready(dev);
    1dcc:	4798      	blx	r3
	if (!uart_irq_rx_ready(uart_dev)) {
    1dce:	2800      	cmp	r0, #0
    1dd0:	d1e7      	bne.n	1da2 <boot_uart_fifo_callback+0x16>
			sys_slist_append(&lines_queue, &cmd->node);
			cur = 0;
			cmd = NULL;
		}
	}
}
    1dd2:	b003      	add	sp, #12
    1dd4:	bdf0      	pop	{r4, r5, r6, r7, pc}
Z_GENLIST_GET_NOT_EMPTY(slist, snode)
    1dd6:	6871      	ldr	r1, [r6, #4]
    1dd8:	681a      	ldr	r2, [r3, #0]
	list->head = node;
    1dda:	6032      	str	r2, [r6, #0]
Z_GENLIST_GET_NOT_EMPTY(slist, snode)
    1ddc:	428b      	cmp	r3, r1
    1dde:	d100      	bne.n	1de2 <boot_uart_fifo_callback+0x56>
	list->tail = node;
    1de0:	6072      	str	r2, [r6, #4]
			cmd = CONTAINER_OF(node, struct line_input, node);
    1de2:	6023      	str	r3, [r4, #0]
		if (cur < CONFIG_BOOT_MAX_LINE_INPUT_LEN) {
    1de4:	4914      	ldr	r1, [pc, #80]	; (1e38 <boot_uart_fifo_callback+0xac>)
    1de6:	f89d 7007 	ldrb.w	r7, [sp, #7]
    1dea:	880a      	ldrh	r2, [r1, #0]
    1dec:	f5b2 7f00 	cmp.w	r2, #512	; 0x200
    1df0:	4608      	mov	r0, r1
    1df2:	d206      	bcs.n	1e02 <boot_uart_fifo_callback+0x76>
			cmd->line[cur++] = byte;
    1df4:	6823      	ldr	r3, [r4, #0]
    1df6:	4413      	add	r3, r2
    1df8:	f102 0c01 	add.w	ip, r2, #1
    1dfc:	f8a1 c000 	strh.w	ip, [r1]
    1e00:	721f      	strb	r7, [r3, #8]
		if (byte ==  '\n') {
    1e02:	2f0a      	cmp	r7, #10
    1e04:	d1cf      	bne.n	1da6 <boot_uart_fifo_callback+0x1a>
			cmd->len = cur;
    1e06:	6823      	ldr	r3, [r4, #0]
    1e08:	8802      	ldrh	r2, [r0, #0]
Z_GENLIST_APPEND(slist, snode)
    1e0a:	490c      	ldr	r1, [pc, #48]	; (1e3c <boot_uart_fifo_callback+0xb0>)
    1e0c:	605a      	str	r2, [r3, #4]
	parent->next = child;
    1e0e:	2200      	movs	r2, #0
    1e10:	601a      	str	r2, [r3, #0]
Z_GENLIST_APPEND(slist, snode)
    1e12:	684e      	ldr	r6, [r1, #4]
    1e14:	b926      	cbnz	r6, 1e20 <boot_uart_fifo_callback+0x94>
	list->head = node;
    1e16:	e9c1 3300 	strd	r3, r3, [r1]
			cur = 0;
    1e1a:	8002      	strh	r2, [r0, #0]
			cmd = NULL;
    1e1c:	6022      	str	r2, [r4, #0]
    1e1e:	e7c1      	b.n	1da4 <boot_uart_fifo_callback+0x18>
	parent->next = child;
    1e20:	6033      	str	r3, [r6, #0]
	list->tail = node;
    1e22:	604b      	str	r3, [r1, #4]
}
    1e24:	e7f9      	b.n	1e1a <boot_uart_fifo_callback+0x8e>
    1e26:	bf00      	nop
    1e28:	20001224 	.word	0x20001224
    1e2c:	20000e04 	.word	0x20000e04
    1e30:	20000dfc 	.word	0x20000dfc
    1e34:	0000944b 	.word	0x0000944b
    1e38:	20001394 	.word	0x20001394
    1e3c:	2000121c 	.word	0x2000121c

00001e40 <console_out>:
	uart_poll_out(uart_dev, c);
    1e40:	4b04      	ldr	r3, [pc, #16]	; (1e54 <console_out+0x14>)
{
    1e42:	b510      	push	{r4, lr}
    1e44:	4604      	mov	r4, r0
	uart_poll_out(uart_dev, c);
    1e46:	6818      	ldr	r0, [r3, #0]
	api->poll_out(dev, out_char);
    1e48:	6883      	ldr	r3, [r0, #8]
    1e4a:	b2e1      	uxtb	r1, r4
    1e4c:	685b      	ldr	r3, [r3, #4]
    1e4e:	4798      	blx	r3
}
    1e50:	4620      	mov	r0, r4
    1e52:	bd10      	pop	{r4, pc}
    1e54:	20001224 	.word	0x20001224

00001e58 <console_read>:
{
    1e58:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    1e5a:	4606      	mov	r6, r0
    1e5c:	460b      	mov	r3, r1
    1e5e:	4615      	mov	r5, r2
    1e60:	f04f 0220 	mov.w	r2, #32
    1e64:	f3ef 8c11 	mrs	ip, BASEPRI
    1e68:	f382 8812 	msr	BASEPRI_MAX, r2
    1e6c:	f3bf 8f6f 	isb	sy
	sys_snode_t *node;
	int key;

	key = irq_lock();
	/* Recycle cmd buffer returned previous time */
	if (cmd != NULL) {
    1e70:	4c19      	ldr	r4, [pc, #100]	; (1ed8 <console_read+0x80>)
    1e72:	6821      	ldr	r1, [r4, #0]
    1e74:	b149      	cbz	r1, 1e8a <console_read+0x32>
		if (sys_slist_peek_tail(&avail_queue) != &cmd->node) {
    1e76:	4a19      	ldr	r2, [pc, #100]	; (1edc <console_read+0x84>)
    1e78:	6850      	ldr	r0, [r2, #4]
    1e7a:	4288      	cmp	r0, r1
    1e7c:	d005      	beq.n	1e8a <console_read+0x32>
	parent->next = child;
    1e7e:	2000      	movs	r0, #0
    1e80:	6008      	str	r0, [r1, #0]
Z_GENLIST_APPEND(slist, snode)
    1e82:	6850      	ldr	r0, [r2, #4]
    1e84:	b998      	cbnz	r0, 1eae <console_read+0x56>
	list->head = node;
    1e86:	e9c2 1100 	strd	r1, r1, [r2]
Z_GENLIST_IS_EMPTY(slist)
    1e8a:	4a15      	ldr	r2, [pc, #84]	; (1ee0 <console_read+0x88>)
    1e8c:	6811      	ldr	r1, [r2, #0]
Z_GENLIST_GET(slist, snode)
    1e8e:	b129      	cbz	r1, 1e9c <console_read+0x44>
Z_GENLIST_GET_NOT_EMPTY(slist, snode)
    1e90:	6857      	ldr	r7, [r2, #4]
    1e92:	6808      	ldr	r0, [r1, #0]
	list->head = node;
    1e94:	6010      	str	r0, [r2, #0]
Z_GENLIST_GET_NOT_EMPTY(slist, snode)
    1e96:	42b9      	cmp	r1, r7
	list->tail = node;
    1e98:	bf08      	it	eq
    1e9a:	6050      	streq	r0, [r2, #4]
	__asm__ volatile(
    1e9c:	f38c 8811 	msr	BASEPRI, ip
    1ea0:	f3bf 8f6f 	isb	sy

	node = sys_slist_get(&lines_queue);
	irq_unlock(key);

	if (node == NULL) {
		cmd = NULL;
    1ea4:	6021      	str	r1, [r4, #0]
	if (node == NULL) {
    1ea6:	b929      	cbnz	r1, 1eb4 <console_read+0x5c>
		*newline = 0;
    1ea8:	2000      	movs	r0, #0
    1eaa:	6028      	str	r0, [r5, #0]
}
    1eac:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	parent->next = child;
    1eae:	6001      	str	r1, [r0, #0]
	list->tail = node;
    1eb0:	6051      	str	r1, [r2, #4]
}
    1eb2:	e7ea      	b.n	1e8a <console_read+0x32>
		return 0;
	}

	cmd = CONTAINER_OF(node, struct line_input, node);
	*line = cmd->line;
	return cmd->len;
    1eb4:	6848      	ldr	r0, [r1, #4]
	if (line == NULL) {
    1eb6:	3108      	adds	r1, #8
    1eb8:	d0f6      	beq.n	1ea8 <console_read+0x50>
	if (len > str_size - 1) {
    1eba:	1e5c      	subs	r4, r3, #1
    1ebc:	4284      	cmp	r4, r0
    1ebe:	bfa8      	it	ge
    1ec0:	4604      	movge	r4, r0
	memcpy(str, line, len);
    1ec2:	4622      	mov	r2, r4
    1ec4:	4630      	mov	r0, r6
    1ec6:	f004 fbd1 	bl	666c <memcpy>
	str[len] = '\0';
    1eca:	2300      	movs	r3, #0
    1ecc:	5533      	strb	r3, [r6, r4]
	*newline = 1;
    1ece:	2301      	movs	r3, #1
    1ed0:	602b      	str	r3, [r5, #0]
	return len + 1;
    1ed2:	18e0      	adds	r0, r4, r3
    1ed4:	e7ea      	b.n	1eac <console_read+0x54>
    1ed6:	bf00      	nop
    1ed8:	20000e08 	.word	0x20000e08
    1edc:	20000dfc 	.word	0x20000dfc
    1ee0:	2000121c 	.word	0x2000121c

00001ee4 <boot_console_init>:
	list->head = NULL;
    1ee4:	4b1d      	ldr	r3, [pc, #116]	; (1f5c <boot_console_init+0x78>)
{
    1ee6:	b537      	push	{r0, r1, r2, r4, r5, lr}
    1ee8:	2500      	movs	r5, #0
	list->tail = NULL;
    1eea:	e9c3 5500 	strd	r5, r5, [r3]
	list->head = node;
    1eee:	4b1c      	ldr	r3, [pc, #112]	; (1f60 <boot_console_init+0x7c>)
    1ef0:	4a1c      	ldr	r2, [pc, #112]	; (1f64 <boot_console_init+0x80>)

static int
boot_uart_fifo_init(void)
{
#ifdef CONFIG_BOOT_SERIAL_UART
	uart_dev = DEVICE_DT_GET(DT_CHOSEN(zephyr_console));
    1ef2:	4c1d      	ldr	r4, [pc, #116]	; (1f68 <boot_console_init+0x84>)
    1ef4:	481d      	ldr	r0, [pc, #116]	; (1f6c <boot_console_init+0x88>)
    1ef6:	6013      	str	r3, [r2, #0]
	parent->next = child;
    1ef8:	f503 7102 	add.w	r1, r3, #520	; 0x208
    1efc:	f8c3 5208 	str.w	r5, [r3, #520]	; 0x208
    1f00:	6019      	str	r1, [r3, #0]
	list->tail = node;
    1f02:	6051      	str	r1, [r2, #4]
    1f04:	6020      	str	r0, [r4, #0]
 *
 * @return a non-positive integer as documented in device_usable_check().
 */
static inline int z_device_usable_check(const struct device *dev)
{
	return z_device_ready(dev) ? 0 : -ENODEV;
    1f06:	f006 fca2 	bl	884e <z_device_ready>
    1f0a:	b310      	cbz	r0, 1f52 <boot_console_init+0x6e>
	if (rc) {
		return (-1);
	}
#endif

	uart_irq_callback_set(uart_dev, boot_uart_fifo_callback);
    1f0c:	6820      	ldr	r0, [r4, #0]
static inline void uart_irq_callback_user_data_set(const struct device *dev,
						   uart_irq_callback_user_data_t cb,
						   void *user_data)
{
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
	const struct uart_driver_api *api =
    1f0e:	6883      	ldr	r3, [r0, #8]
		(const struct uart_driver_api *)dev->api;

	if ((api != NULL) && (api->irq_callback_set != NULL)) {
    1f10:	b123      	cbz	r3, 1f1c <boot_console_init+0x38>
    1f12:	6c9b      	ldr	r3, [r3, #72]	; 0x48
    1f14:	b113      	cbz	r3, 1f1c <boot_console_init+0x38>
		api->irq_callback_set(dev, cb, user_data);
    1f16:	4916      	ldr	r1, [pc, #88]	; (1f70 <boot_console_init+0x8c>)
    1f18:	462a      	mov	r2, r5
    1f1a:	4798      	blx	r3

	/* Drain the fifo */
	if (uart_irq_rx_ready(uart_dev)) {
    1f1c:	6820      	ldr	r0, [r4, #0]
	if (api->irq_rx_ready == NULL) {
    1f1e:	6883      	ldr	r3, [r0, #8]
    1f20:	6b5b      	ldr	r3, [r3, #52]	; 0x34
    1f22:	b10b      	cbz	r3, 1f28 <boot_console_init+0x44>
	return api->irq_rx_ready(dev);
    1f24:	4798      	blx	r3
    1f26:	b148      	cbz	r0, 1f3c <boot_console_init+0x58>
		uint8_t c;

		while (uart_fifo_read(uart_dev, &c, 1)) {
    1f28:	6820      	ldr	r0, [r4, #0]
	if (api->fifo_read == NULL) {
    1f2a:	6883      	ldr	r3, [r0, #8]
    1f2c:	699b      	ldr	r3, [r3, #24]
    1f2e:	b903      	cbnz	r3, 1f32 <boot_console_init+0x4e>
    1f30:	e7fe      	b.n	1f30 <boot_console_init+0x4c>
	return api->fifo_read(dev, rx_data, size);
    1f32:	2201      	movs	r2, #1
    1f34:	f10d 0107 	add.w	r1, sp, #7
    1f38:	4798      	blx	r3
    1f3a:	e7f4      	b.n	1f26 <boot_console_init+0x42>
			;
		}
	}

	cur = 0;
    1f3c:	4b0d      	ldr	r3, [pc, #52]	; (1f74 <boot_console_init+0x90>)

	uart_irq_rx_enable(uart_dev);
    1f3e:	6820      	ldr	r0, [r4, #0]
	cur = 0;
    1f40:	2500      	movs	r5, #0
    1f42:	801d      	strh	r5, [r3, #0]
	if (api->irq_rx_enable != NULL) {
    1f44:	6883      	ldr	r3, [r0, #8]
    1f46:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    1f48:	b133      	cbz	r3, 1f58 <boot_console_init+0x74>
		api->irq_rx_enable(dev);
    1f4a:	4798      	blx	r3

	return 0;
    1f4c:	4628      	mov	r0, r5
}
    1f4e:	b003      	add	sp, #12
    1f50:	bd30      	pop	{r4, r5, pc}
		return (-1);
    1f52:	f04f 30ff 	mov.w	r0, #4294967295
    1f56:	e7fa      	b.n	1f4e <boot_console_init+0x6a>
	return 0;
    1f58:	4618      	mov	r0, r3
	return boot_uart_fifo_init();
    1f5a:	e7f8      	b.n	1f4e <boot_console_init+0x6a>
    1f5c:	2000121c 	.word	0x2000121c
    1f60:	20000e0c 	.word	0x20000e0c
    1f64:	20000dfc 	.word	0x20000dfc
    1f68:	20001224 	.word	0x20001224
    1f6c:	000088fc 	.word	0x000088fc
    1f70:	00001d8d 	.word	0x00001d8d
    1f74:	20001394 	.word	0x20001394

00001f78 <boot_serial_output>:
    }
}

static void
boot_serial_output(void)
{
    1f78:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    1f7c:	b0d2      	sub	sp, #328	; 0x148
    char *data;
    int len;
    uint16_t crc;
    uint16_t totlen;
    char pkt_start[2] = { SHELL_NLIP_PKT_START1, SHELL_NLIP_PKT_START2 };
    1f7e:	f640 1306 	movw	r3, #2310	; 0x906
    1f82:	f8ad 300c 	strh.w	r3, [sp, #12]
    char buf[BOOT_SERIAL_OUT_MAX];
    char encoded_buf[BASE64_ENCODE_SIZE(BOOT_SERIAL_OUT_MAX)];

    data = bs_obuf;
    len = (uint32_t)cbor_state.payload_mut - (uint32_t)bs_obuf;
    1f86:	4b3f      	ldr	r3, [pc, #252]	; (2084 <boot_serial_output+0x10c>)

    bs_hdr->nh_op++;
    1f88:	f8df 810c 	ldr.w	r8, [pc, #268]	; 2098 <boot_serial_output+0x120>
    len = (uint32_t)cbor_state.payload_mut - (uint32_t)bs_obuf;
    1f8c:	681c      	ldr	r4, [r3, #0]
    1f8e:	4f3e      	ldr	r7, [pc, #248]	; (2088 <boot_serial_output+0x110>)
    bs_hdr->nh_op++;
    1f90:	f8d8 0000 	ldr.w	r0, [r8]
    crc = crc16_ccitt(CRC16_INITIAL_CRC, bs_hdr, sizeof(*bs_hdr));
    crc = crc16_ccitt(crc, data, len);
#endif
    crc = htons(crc);

    boot_uf->write(pkt_start, sizeof(pkt_start));
    1f94:	4e3d      	ldr	r6, [pc, #244]	; (208c <boot_serial_output+0x114>)
    bs_hdr->nh_group = htons(bs_hdr->nh_group);
    1f96:	8881      	ldrh	r1, [r0, #4]
    bs_hdr->nh_op++;
    1f98:	7803      	ldrb	r3, [r0, #0]
    len = (uint32_t)cbor_state.payload_mut - (uint32_t)bs_obuf;
    1f9a:	1be4      	subs	r4, r4, r7
    bs_hdr->nh_len = htons(len);
    1f9c:	f3c4 2207 	ubfx	r2, r4, #8, #8
    1fa0:	ea42 2204 	orr.w	r2, r2, r4, lsl #8
    1fa4:	8042      	strh	r2, [r0, #2]
    bs_hdr->nh_op++;
    1fa6:	3301      	adds	r3, #1
    bs_hdr->nh_group = htons(bs_hdr->nh_group);
    1fa8:	020a      	lsls	r2, r1, #8
    bs_hdr->nh_op++;
    1faa:	7003      	strb	r3, [r0, #0]
    bs_hdr->nh_group = htons(bs_hdr->nh_group);
    1fac:	ea42 2211 	orr.w	r2, r2, r1, lsr #8
    bs_hdr->nh_flags = 0;
    1fb0:	2300      	movs	r3, #0
    1fb2:	7043      	strb	r3, [r0, #1]
    bs_hdr->nh_group = htons(bs_hdr->nh_group);
    1fb4:	8082      	strh	r2, [r0, #4]
    crc =  crc16((uint8_t *)bs_hdr, sizeof(*bs_hdr), CRC_CITT_POLYMINAL,
    1fb6:	2108      	movs	r1, #8
    1fb8:	9300      	str	r3, [sp, #0]
    1fba:	f241 0221 	movw	r2, #4129	; 0x1021
    1fbe:	f003 fec3 	bl	5d48 <crc16>
    crc =  crc16(data, len, CRC_CITT_POLYMINAL, crc, true);
    1fc2:	2201      	movs	r2, #1
    crc =  crc16((uint8_t *)bs_hdr, sizeof(*bs_hdr), CRC_CITT_POLYMINAL,
    1fc4:	4603      	mov	r3, r0
    1fc6:	f8ad 0010 	strh.w	r0, [sp, #16]
    crc =  crc16(data, len, CRC_CITT_POLYMINAL, crc, true);
    1fca:	9200      	str	r2, [sp, #0]
    1fcc:	4621      	mov	r1, r4
    1fce:	f241 0221 	movw	r2, #4129	; 0x1021
    1fd2:	4638      	mov	r0, r7
    1fd4:	f003 feb8 	bl	5d48 <crc16>
    boot_uf->write(pkt_start, sizeof(pkt_start));
    1fd8:	6833      	ldr	r3, [r6, #0]
    crc = htons(crc);
    1fda:	ba40      	rev16	r0, r0
    1fdc:	f8ad 0010 	strh.w	r0, [sp, #16]
    boot_uf->write(pkt_start, sizeof(pkt_start));
    1fe0:	685b      	ldr	r3, [r3, #4]
    1fe2:	a803      	add	r0, sp, #12
    1fe4:	2102      	movs	r1, #2
    1fe6:	4798      	blx	r3

    totlen = len + sizeof(*bs_hdr) + sizeof(crc);
    1fe8:	f104 030a 	add.w	r3, r4, #10
    totlen = htons(totlen);
    1fec:	ba5b      	rev16	r3, r3

    memcpy(buf, &totlen, sizeof(totlen));
    1fee:	f10d 0112 	add.w	r1, sp, #18
    1ff2:	2202      	movs	r2, #2
    1ff4:	a806      	add	r0, sp, #24
    totlen = sizeof(totlen);
    1ff6:	2502      	movs	r5, #2
    totlen = htons(totlen);
    1ff8:	f8ad 3012 	strh.w	r3, [sp, #18]
    memcpy(buf, &totlen, sizeof(totlen));
    1ffc:	f004 fb36 	bl	666c <memcpy>
    memcpy(&buf[totlen], bs_hdr, sizeof(*bs_hdr));
    2000:	f8d8 1000 	ldr.w	r1, [r8]
    totlen = sizeof(totlen);
    2004:	f8ad 5012 	strh.w	r5, [sp, #18]
    memcpy(&buf[totlen], bs_hdr, sizeof(*bs_hdr));
    2008:	2208      	movs	r2, #8
    200a:	f10d 001a 	add.w	r0, sp, #26
    200e:	f004 fb2d 	bl	666c <memcpy>
    totlen += sizeof(*bs_hdr);
    2012:	f8bd 0012 	ldrh.w	r0, [sp, #18]
    2016:	3008      	adds	r0, #8
    memcpy(&buf[totlen], data, len);
    2018:	ab06      	add	r3, sp, #24
    totlen += sizeof(*bs_hdr);
    201a:	b280      	uxth	r0, r0
    201c:	f8ad 0012 	strh.w	r0, [sp, #18]
    memcpy(&buf[totlen], data, len);
    2020:	4622      	mov	r2, r4
    2022:	4639      	mov	r1, r7
    2024:	4418      	add	r0, r3
    2026:	f004 fb21 	bl	666c <memcpy>
    totlen += len;
    202a:	f8bd 0012 	ldrh.w	r0, [sp, #18]
    202e:	4420      	add	r0, r4
    memcpy(&buf[totlen], &crc, sizeof(crc));
    2030:	ab06      	add	r3, sp, #24
    totlen += len;
    2032:	b280      	uxth	r0, r0
    2034:	f8ad 0012 	strh.w	r0, [sp, #18]
    memcpy(&buf[totlen], &crc, sizeof(crc));
    2038:	462a      	mov	r2, r5
    203a:	a904      	add	r1, sp, #16
    203c:	4418      	add	r0, r3
    203e:	f004 fb15 	bl	666c <memcpy>
    totlen += sizeof(crc);
    2042:	f8bd 3012 	ldrh.w	r3, [sp, #18]
    2046:	442b      	add	r3, r5
    2048:	b29b      	uxth	r3, r3
#ifdef __ZEPHYR__
    size_t enc_len;
    base64_encode(encoded_buf, sizeof(encoded_buf), &enc_len, buf, totlen);
    204a:	aa05      	add	r2, sp, #20
    totlen += sizeof(crc);
    204c:	f8ad 3012 	strh.w	r3, [sp, #18]
    base64_encode(encoded_buf, sizeof(encoded_buf), &enc_len, buf, totlen);
    2050:	9300      	str	r3, [sp, #0]
    2052:	21ad      	movs	r1, #173	; 0xad
    2054:	ab06      	add	r3, sp, #24
    2056:	a826      	add	r0, sp, #152	; 0x98
    2058:	f7ff f9d8 	bl	140c <base64_encode>
    totlen = enc_len;
    205c:	9905      	ldr	r1, [sp, #20]
#else
    totlen = base64_encode(buf, totlen, encoded_buf, 1);
#endif
    boot_uf->write(encoded_buf, totlen);
    205e:	6833      	ldr	r3, [r6, #0]
    totlen = enc_len;
    2060:	f8ad 1012 	strh.w	r1, [sp, #18]
    boot_uf->write(encoded_buf, totlen);
    2064:	a826      	add	r0, sp, #152	; 0x98
    2066:	685b      	ldr	r3, [r3, #4]
    2068:	b289      	uxth	r1, r1
    206a:	4798      	blx	r3
    boot_uf->write("\n\r", 2);
    206c:	6833      	ldr	r3, [r6, #0]
    206e:	4808      	ldr	r0, [pc, #32]	; (2090 <boot_serial_output+0x118>)
    2070:	685b      	ldr	r3, [r3, #4]
    2072:	4629      	mov	r1, r5
    2074:	4798      	blx	r3
    BOOT_LOG_INF("TX");
    2076:	4807      	ldr	r0, [pc, #28]	; (2094 <boot_serial_output+0x11c>)
    2078:	2149      	movs	r1, #73	; 0x49
    207a:	f003 ff6b 	bl	5f54 <z_log_minimal_printk>
}
    207e:	b052      	add	sp, #328	; 0x148
    2080:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    2084:	20000010 	.word	0x20000010
    2088:	20002c96 	.word	0x20002c96
    208c:	20001228 	.word	0x20001228
    2090:	000094a4 	.word	0x000094a4
    2094:	000094a7 	.word	0x000094a7
    2098:	2000122c 	.word	0x2000122c

0000209c <bs_rc_rsp>:
{
    209c:	b537      	push	{r0, r1, r2, r4, r5, lr}
    map_start_encode(&cbor_state, 10);
    209e:	4c0e      	ldr	r4, [pc, #56]	; (20d8 <bs_rc_rsp+0x3c>)
{
    20a0:	4605      	mov	r5, r0
    map_start_encode(&cbor_state, 10);
    20a2:	210a      	movs	r1, #10
    20a4:	4620      	mov	r0, r4
    20a6:	f004 f9f9 	bl	649c <map_start_encode>
    tstrx_put(&cbor_state, "rc");
    20aa:	4a0c      	ldr	r2, [pc, #48]	; (20dc <bs_rc_rsp+0x40>)
    20ac:	e892 0003 	ldmia.w	r2, {r0, r1}
    20b0:	466b      	mov	r3, sp
    20b2:	e883 0003 	stmia.w	r3, {r0, r1}
    20b6:	4619      	mov	r1, r3
    20b8:	4620      	mov	r0, r4
    20ba:	f004 f9c8 	bl	644e <tstrx_encode>
    uintx32_put(&cbor_state, rc_code);
    20be:	4629      	mov	r1, r5
    20c0:	4620      	mov	r0, r4
    20c2:	f004 f9bb 	bl	643c <uintx32_put>
    map_end_encode(&cbor_state, 10);
    20c6:	210a      	movs	r1, #10
    20c8:	4620      	mov	r0, r4
    20ca:	f004 fa02 	bl	64d2 <map_end_encode>
    boot_serial_output();
    20ce:	f7ff ff53 	bl	1f78 <boot_serial_output>
}
    20d2:	b003      	add	sp, #12
    20d4:	bd30      	pop	{r4, r5, pc}
    20d6:	bf00      	nop
    20d8:	20000010 	.word	0x20000010
    20dc:	00008ad0 	.word	0x00008ad0

000020e0 <boot_serial_in_dec.constprop.0>:

/*
 * Returns 1 if full packet has been received.
 */
static int
boot_serial_in_dec(char *in, int inlen, char *out, int *out_off, int maxout)
    20e0:	e92d 41ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, lr}
    uint16_t crc;
    uint16_t len;

#ifdef __ZEPHYR__
    int err;
    err = base64_decode( &out[*out_off], maxout - *out_off, &rc, in, inlen - 2);
    20e4:	680c      	ldr	r4, [r1, #0]
    20e6:	4f1b      	ldr	r7, [pc, #108]	; (2154 <boot_serial_in_dec.constprop.0+0x74>)
    20e8:	4b1b      	ldr	r3, [pc, #108]	; (2158 <boot_serial_in_dec.constprop.0+0x78>)
    20ea:	3802      	subs	r0, #2
boot_serial_in_dec(char *in, int inlen, char *out, int *out_off, int maxout)
    20ec:	460d      	mov	r5, r1
    err = base64_decode( &out[*out_off], maxout - *out_off, &rc, in, inlen - 2);
    20ee:	f5c4 7100 	rsb	r1, r4, #512	; 0x200
    20f2:	9000      	str	r0, [sp, #0]
    20f4:	aa03      	add	r2, sp, #12
    20f6:	1938      	adds	r0, r7, r4
    20f8:	3101      	adds	r1, #1
    20fa:	f7ff fa09 	bl	1510 <base64_decode>
    if (err) {
    20fe:	4604      	mov	r4, r0
    2100:	bb28      	cbnz	r0, 214e <boot_serial_in_dec.constprop.0+0x6e>
    if (rc < 0) {
        return -1;
    }
#endif

    *out_off += rc;
    2102:	682b      	ldr	r3, [r5, #0]
    2104:	9a03      	ldr	r2, [sp, #12]
    2106:	4413      	add	r3, r2
    if (*out_off <= sizeof(uint16_t)) {
    2108:	2b02      	cmp	r3, #2
    *out_off += rc;
    210a:	602b      	str	r3, [r5, #0]
    if (*out_off <= sizeof(uint16_t)) {
    210c:	d91b      	bls.n	2146 <boot_serial_in_dec.constprop.0+0x66>
        return 0;
    }

    len = ntohs(*(uint16_t *)out);
    210e:	8839      	ldrh	r1, [r7, #0]
    2110:	020e      	lsls	r6, r1, #8
    2112:	ea46 2611 	orr.w	r6, r6, r1, lsr #8
    2116:	b2b6      	uxth	r6, r6
    if (len != *out_off - sizeof(uint16_t)) {
    2118:	3b02      	subs	r3, #2
    211a:	429e      	cmp	r6, r3
    211c:	d113      	bne.n	2146 <boot_serial_in_dec.constprop.0+0x66>
        len = *out_off - sizeof(uint16_t);
    }

    out += sizeof(uint16_t);
#ifdef __ZEPHYR__
    crc = crc16(out, len, CRC_CITT_POLYMINAL, CRC16_INITIAL_CRC, true);
    211e:	f04f 0801 	mov.w	r8, #1
    2122:	4603      	mov	r3, r0
    2124:	f8cd 8000 	str.w	r8, [sp]
    2128:	f241 0221 	movw	r2, #4129	; 0x1021
    212c:	4631      	mov	r1, r6
    212e:	1cb8      	adds	r0, r7, #2
    2130:	f003 fe0a 	bl	5d48 <crc16>
#else
    crc = crc16_ccitt(CRC16_INITIAL_CRC, out, len);
#endif
    if (crc || len <= sizeof(crc)) {
    2134:	b938      	cbnz	r0, 2146 <boot_serial_in_dec.constprop.0+0x66>
    2136:	2e02      	cmp	r6, #2
    2138:	d905      	bls.n	2146 <boot_serial_in_dec.constprop.0+0x66>
        return 0;
    }
    *out_off -= sizeof(crc);
    213a:	682b      	ldr	r3, [r5, #0]
    213c:	3b02      	subs	r3, #2
    out[*out_off] = '\0';
    213e:	441f      	add	r7, r3
    *out_off -= sizeof(crc);
    2140:	602b      	str	r3, [r5, #0]
    out[*out_off] = '\0';
    2142:	70bc      	strb	r4, [r7, #2]

    return 1;
    2144:	4644      	mov	r4, r8
}
    2146:	4620      	mov	r0, r4
    2148:	b004      	add	sp, #16
    214a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        return -1;
    214e:	f04f 34ff 	mov.w	r4, #4294967295
    2152:	e7f8      	b.n	2146 <boot_serial_in_dec.constprop.0+0x66>
    2154:	20002d16 	.word	0x20002d16
    2158:	20002f19 	.word	0x20002f19

0000215c <boot_serial_input>:
{
    215c:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    if (len < sizeof(*hdr) ||
    2160:	2907      	cmp	r1, #7
{
    2162:	b0a9      	sub	sp, #164	; 0xa4
    2164:	4604      	mov	r4, r0
    if (len < sizeof(*hdr) ||
    2166:	f240 80c0 	bls.w	22ea <boot_serial_input+0x18e>
    216a:	7802      	ldrb	r2, [r0, #0]
    216c:	f012 05fd 	ands.w	r5, r2, #253	; 0xfd
    2170:	f040 80bb 	bne.w	22ea <boot_serial_input+0x18e>
      (ntohs(hdr->nh_len) < len - sizeof(*hdr))) {
    2174:	8842      	ldrh	r2, [r0, #2]
    2176:	0213      	lsls	r3, r2, #8
    2178:	ea43 2312 	orr.w	r3, r3, r2, lsr #8
    217c:	f1a1 0608 	sub.w	r6, r1, #8
    2180:	b29b      	uxth	r3, r3
      (hdr->nh_op != NMGR_OP_READ && hdr->nh_op != NMGR_OP_WRITE) ||
    2182:	42b3      	cmp	r3, r6
    2184:	f0c0 80b1 	bcc.w	22ea <boot_serial_input+0x18e>
    bs_hdr = hdr;
    2188:	4ba7      	ldr	r3, [pc, #668]	; (2428 <FIH_LABEL_FIH_CALL_END_948+0x118>)
    cbor_state.payload_mut = (uint8_t *)bs_obuf;
    218a:	4fa8      	ldr	r7, [pc, #672]	; (242c <FIH_LABEL_FIH_CALL_END_948+0x11c>)
    bs_hdr = hdr;
    218c:	6018      	str	r0, [r3, #0]
    hdr->nh_group = ntohs(hdr->nh_group);
    218e:	8880      	ldrh	r0, [r0, #4]
    2190:	0203      	lsls	r3, r0, #8
    2192:	ea43 2310 	orr.w	r3, r3, r0, lsr #8
    2196:	b298      	uxth	r0, r3
    cbor_state.payload_mut = (uint8_t *)bs_obuf;
    2198:	4ba5      	ldr	r3, [pc, #660]	; (2430 <FIH_LABEL_FIH_CALL_END_948+0x120>)
    219a:	603b      	str	r3, [r7, #0]
    if (hdr->nh_group == MGMT_GROUP_ID_IMAGE) {
    219c:	2801      	cmp	r0, #1
    cbor_state.payload_end = (const uint8_t *)bs_obuf
    219e:	f103 0380 	add.w	r3, r3, #128	; 0x80
    hdr->nh_group = ntohs(hdr->nh_group);
    21a2:	80a0      	strh	r0, [r4, #4]
    cbor_state.payload_end = (const uint8_t *)bs_obuf
    21a4:	60fb      	str	r3, [r7, #12]
    if (hdr->nh_group == MGMT_GROUP_ID_IMAGE) {
    21a6:	f040 81fc 	bne.w	25a2 <FIH_LABEL_FIH_CALL_END_948+0x292>
        switch (hdr->nh_id) {
    21aa:	f894 8007 	ldrb.w	r8, [r4, #7]
    21ae:	f1b8 0f00 	cmp.w	r8, #0
    21b2:	d007      	beq.n	21c4 <boot_serial_input+0x68>
    21b4:	f1b8 0f01 	cmp.w	r8, #1
    21b8:	f000 80ab 	beq.w	2312 <FIH_LABEL_FIH_CALL_END_948+0x2>
        bs_rc_rsp(MGMT_ERR_ENOTSUP);
    21bc:	2008      	movs	r0, #8
    21be:	f7ff ff6d 	bl	209c <bs_rc_rsp>
    21c2:	e092      	b.n	22ea <boot_serial_input+0x18e>
    tstrx_put(&cbor_state, "images");
    21c4:	4e9b      	ldr	r6, [pc, #620]	; (2434 <FIH_LABEL_FIH_CALL_END_948+0x124>)
    map_start_encode(&cbor_state, 1);
    21c6:	4601      	mov	r1, r0
    21c8:	4638      	mov	r0, r7
    21ca:	f004 f967 	bl	649c <map_start_encode>
    tstrx_put(&cbor_state, "images");
    21ce:	e896 0003 	ldmia.w	r6, {r0, r1}
    21d2:	ab08      	add	r3, sp, #32
    21d4:	e883 0003 	stmia.w	r3, {r0, r1}
    21d8:	4619      	mov	r1, r3
    21da:	4638      	mov	r0, r7
    21dc:	f004 f937 	bl	644e <tstrx_encode>
    list_start_encode(&cbor_state, 5);
    21e0:	4638      	mov	r0, r7
    21e2:	2105      	movs	r1, #5
    21e4:	f004 f94e 	bl	6484 <list_start_encode>
        for (slot = 0; slot < 2; slot++) {
    21e8:	4644      	mov	r4, r8
            if (hdr.ih_magic == IMAGE_MAGIC)
    21ea:	f8df 8264 	ldr.w	r8, [pc, #612]	; 2450 <FIH_LABEL_FIH_CALL_END_948+0x140>
            tstrx_put(&cbor_state, "slot");
    21ee:	f106 0708 	add.w	r7, r6, #8
            tstrx_put(&cbor_state, "version");
    21f2:	3610      	adds	r6, #16
            area_id = flash_area_id_from_multi_image_slot(image_index, slot);
    21f4:	4621      	mov	r1, r4
    21f6:	2000      	movs	r0, #0
    21f8:	f003 fb2c 	bl	5854 <flash_area_id_from_multi_image_slot>
            if (flash_area_open(area_id, &fap)) {
    21fc:	a907      	add	r1, sp, #28
    21fe:	b2c0      	uxtb	r0, r0
    2200:	f7ff fd72 	bl	1ce8 <flash_area_open>
    2204:	4605      	mov	r5, r0
    2206:	2800      	cmp	r0, #0
    2208:	d164      	bne.n	22d4 <boot_serial_input+0x178>
                flash_area_read(fap, 0, &hdr, sizeof(hdr));
    220a:	2320      	movs	r3, #32
    220c:	4601      	mov	r1, r0
    220e:	aa10      	add	r2, sp, #64	; 0x40
    2210:	9807      	ldr	r0, [sp, #28]
    2212:	f003 fead 	bl	5f70 <flash_area_read>
            if (hdr.ih_magic == IMAGE_MAGIC)
    2216:	9b10      	ldr	r3, [sp, #64]	; 0x40
    2218:	4543      	cmp	r3, r8
    221a:	d06b      	beq.n	22f4 <FIH_LABEL_FIH_CALL_START_918>
            fih_int fih_rc = FIH_FAILURE;
    221c:	4b86      	ldr	r3, [pc, #536]	; (2438 <FIH_LABEL_FIH_CALL_END_948+0x128>)
    221e:	681d      	ldr	r5, [r3, #0]
            flash_area_close(fap);
    2220:	9807      	ldr	r0, [sp, #28]
    2222:	f003 fea4 	bl	5f6e <flash_area_close>
            if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
    2226:	4b85      	ldr	r3, [pc, #532]	; (243c <FIH_LABEL_FIH_CALL_END_948+0x12c>)
    2228:	681b      	ldr	r3, [r3, #0]
    222a:	42ab      	cmp	r3, r5
    222c:	d152      	bne.n	22d4 <boot_serial_input+0x178>
            map_start_encode(&cbor_state, 20);
    222e:	2114      	movs	r1, #20
    2230:	487e      	ldr	r0, [pc, #504]	; (242c <FIH_LABEL_FIH_CALL_END_948+0x11c>)
    2232:	f004 f933 	bl	649c <map_start_encode>
            tstrx_put(&cbor_state, "slot");
    2236:	e897 0003 	ldmia.w	r7, {r0, r1}
    223a:	ab0a      	add	r3, sp, #40	; 0x28
    223c:	e883 0003 	stmia.w	r3, {r0, r1}
    2240:	4619      	mov	r1, r3
    2242:	487a      	ldr	r0, [pc, #488]	; (242c <FIH_LABEL_FIH_CALL_END_948+0x11c>)
    2244:	f004 f903 	bl	644e <tstrx_encode>
            uintx32_put(&cbor_state, slot);
    2248:	4621      	mov	r1, r4
    224a:	4878      	ldr	r0, [pc, #480]	; (242c <FIH_LABEL_FIH_CALL_END_948+0x11c>)
    224c:	f004 f8f6 	bl	643c <uintx32_put>
            tstrx_put(&cbor_state, "version");
    2250:	e896 0003 	ldmia.w	r6, {r0, r1}
    2254:	ab0c      	add	r3, sp, #48	; 0x30
    off = u32toa(dst, ver->iv_major);
    2256:	f10d 0960 	add.w	r9, sp, #96	; 0x60
            tstrx_put(&cbor_state, "version");
    225a:	e883 0003 	stmia.w	r3, {r0, r1}
    225e:	4619      	mov	r1, r3
    2260:	4872      	ldr	r0, [pc, #456]	; (242c <FIH_LABEL_FIH_CALL_END_948+0x11c>)
    2262:	f004 f8f4 	bl	644e <tstrx_encode>
    off = u32toa(dst, ver->iv_major);
    2266:	f89d 1054 	ldrb.w	r1, [sp, #84]	; 0x54
    226a:	4648      	mov	r0, r9
    226c:	f003 ff3c 	bl	60e8 <u32toa>
    dst[off++] = '.';
    2270:	ab28      	add	r3, sp, #160	; 0xa0
    2272:	1c45      	adds	r5, r0, #1
    2274:	4418      	add	r0, r3
    2276:	f04f 0a2e 	mov.w	sl, #46	; 0x2e
    off += u32toa(dst + off, ver->iv_minor);
    227a:	f89d 1055 	ldrb.w	r1, [sp, #85]	; 0x55
    dst[off++] = '.';
    227e:	f800 ac40 	strb.w	sl, [r0, #-64]
    off += u32toa(dst + off, ver->iv_minor);
    2282:	eb09 0005 	add.w	r0, r9, r5
    2286:	f003 ff2f 	bl	60e8 <u32toa>
    dst[off++] = '.';
    228a:	ab28      	add	r3, sp, #160	; 0xa0
    off += u32toa(dst + off, ver->iv_minor);
    228c:	4428      	add	r0, r5
    dst[off++] = '.';
    228e:	1c45      	adds	r5, r0, #1
    2290:	4418      	add	r0, r3
    off += u32toa(dst + off, ver->iv_revision);
    2292:	f8bd 1056 	ldrh.w	r1, [sp, #86]	; 0x56
    dst[off++] = '.';
    2296:	f800 ac40 	strb.w	sl, [r0, #-64]
    off += u32toa(dst + off, ver->iv_revision);
    229a:	eb09 0005 	add.w	r0, r9, r5
    229e:	f003 ff23 	bl	60e8 <u32toa>
    dst[off++] = '.';
    22a2:	ab28      	add	r3, sp, #160	; 0xa0
    off += u32toa(dst + off, ver->iv_revision);
    22a4:	4405      	add	r5, r0
    dst[off++] = '.';
    22a6:	442b      	add	r3, r5
    22a8:	3501      	adds	r5, #1
    off += u32toa(dst + off, ver->iv_build_num);
    22aa:	9916      	ldr	r1, [sp, #88]	; 0x58
    dst[off++] = '.';
    22ac:	f803 ac40 	strb.w	sl, [r3, #-64]
    off += u32toa(dst + off, ver->iv_build_num);
    22b0:	eb09 0005 	add.w	r0, r9, r5
    22b4:	f003 ff18 	bl	60e8 <u32toa>
            tstrx_put_term(&cbor_state, (char *)tmpbuf);
    22b8:	4648      	mov	r0, r9
    22ba:	f8cd 9038 	str.w	r9, [sp, #56]	; 0x38
    22be:	f004 f99b 	bl	65f8 <strlen>
    22c2:	a90e      	add	r1, sp, #56	; 0x38
    22c4:	900f      	str	r0, [sp, #60]	; 0x3c
    22c6:	4859      	ldr	r0, [pc, #356]	; (242c <FIH_LABEL_FIH_CALL_END_948+0x11c>)
    22c8:	f004 f8c1 	bl	644e <tstrx_encode>
            map_end_encode(&cbor_state, 20);
    22cc:	4857      	ldr	r0, [pc, #348]	; (242c <FIH_LABEL_FIH_CALL_END_948+0x11c>)
    22ce:	2114      	movs	r1, #20
    22d0:	f004 f8ff 	bl	64d2 <map_end_encode>
        for (slot = 0; slot < 2; slot++) {
    22d4:	b164      	cbz	r4, 22f0 <boot_serial_input+0x194>
    list_end_encode(&cbor_state, 5);
    22d6:	2105      	movs	r1, #5
    22d8:	4854      	ldr	r0, [pc, #336]	; (242c <FIH_LABEL_FIH_CALL_END_948+0x11c>)
    22da:	f004 f8f7 	bl	64cc <list_end_encode>
    map_end_encode(&cbor_state, 1);
    22de:	4621      	mov	r1, r4
    22e0:	4852      	ldr	r0, [pc, #328]	; (242c <FIH_LABEL_FIH_CALL_END_948+0x11c>)
    22e2:	f004 f8f6 	bl	64d2 <map_end_encode>
    boot_serial_output();
    22e6:	f7ff fe47 	bl	1f78 <boot_serial_output>
}
    22ea:	b029      	add	sp, #164	; 0xa4
    22ec:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    22f0:	2401      	movs	r4, #1
    22f2:	e77f      	b.n	21f4 <boot_serial_input+0x98>

000022f4 <FIH_LABEL_FIH_CALL_START_918>:
                    FIH_CALL(bootutil_img_validate, fih_rc, NULL, 0, &hdr, fap, tmpbuf, sizeof(tmpbuf),
    22f4:	2340      	movs	r3, #64	; 0x40
    22f6:	9301      	str	r3, [sp, #4]
    22f8:	ab18      	add	r3, sp, #96	; 0x60
    22fa:	e9cd 5503 	strd	r5, r5, [sp, #12]
    22fe:	9502      	str	r5, [sp, #8]
    2300:	9300      	str	r3, [sp, #0]
    2302:	4629      	mov	r1, r5
    2304:	9b07      	ldr	r3, [sp, #28]
    2306:	aa10      	add	r2, sp, #64	; 0x40
    2308:	4628      	mov	r0, r5
    230a:	f7fe f955 	bl	5b8 <bootutil_img_validate>
    230e:	4605      	mov	r5, r0

00002310 <FIH_LABEL_FIH_CALL_END_948>:
    2310:	e786      	b.n	2220 <boot_serial_input+0xc4>
    bool result = cbor_decode_Upload((const uint8_t *)buf, len, &upload, &decoded_len);
    2312:	ab0a      	add	r3, sp, #40	; 0x28
    2314:	aa18      	add	r2, sp, #96	; 0x60
    2316:	4631      	mov	r1, r6
    2318:	f104 0008 	add.w	r0, r4, #8
    const struct flash_area *fap = NULL;
    231c:	9508      	str	r5, [sp, #32]
    bool result = cbor_decode_Upload((const uint8_t *)buf, len, &upload, &decoded_len);
    231e:	f000 fa59 	bl	27d4 <cbor_decode_Upload>
    if (!result || (len != decoded_len)) {
    2322:	b908      	cbnz	r0, 2328 <FIH_LABEL_FIH_CALL_END_948+0x18>
        rc = MGMT_ERR_EINVAL;
    2324:	2403      	movs	r4, #3
    2326:	e036      	b.n	2396 <FIH_LABEL_FIH_CALL_END_948+0x86>
    if (!result || (len != decoded_len)) {
    2328:	9b0a      	ldr	r3, [sp, #40]	; 0x28
    232a:	429e      	cmp	r6, r3
    232c:	d1fa      	bne.n	2324 <FIH_LABEL_FIH_CALL_END_948+0x14>
    long long int data_len = UINT64_MAX;
    232e:	f04f 3aff 	mov.w	sl, #4294967295
    2332:	f04f 3bff 	mov.w	fp, #4294967295
    2336:	9c27      	ldr	r4, [sp, #156]	; 0x9c
    2338:	ab18      	add	r3, sp, #96	; 0x60
    for (int i = 0; i < upload._Upload_members_count; i++) {
    233a:	462a      	mov	r2, r5
    img_num = 0;
    233c:	4628      	mov	r0, r5
    long long int off = UINT64_MAX;
    233e:	46d0      	mov	r8, sl
    2340:	46d9      	mov	r9, fp
    const uint8_t *img_data = NULL;
    2342:	462f      	mov	r7, r5
    for (int i = 0; i < upload._Upload_members_count; i++) {
    2344:	42a2      	cmp	r2, r4
    2346:	d156      	bne.n	23f6 <FIH_LABEL_FIH_CALL_END_948+0xe6>
    if (off == UINT64_MAX || img_data == NULL) {
    2348:	f1b9 3fff 	cmp.w	r9, #4294967295
    234c:	bf08      	it	eq
    234e:	f1b8 3fff 	cmpeq.w	r8, #4294967295
    2352:	d0e7      	beq.n	2324 <FIH_LABEL_FIH_CALL_END_948+0x14>
    2354:	2f00      	cmp	r7, #0
    2356:	d0e5      	beq.n	2324 <FIH_LABEL_FIH_CALL_END_948+0x14>
    rc = flash_area_open(flash_area_id_from_multi_image_slot(img_num, 0), &fap);
    2358:	2100      	movs	r1, #0
    235a:	f003 fa7b 	bl	5854 <flash_area_id_from_multi_image_slot>
    235e:	a908      	add	r1, sp, #32
    2360:	b2c0      	uxtb	r0, r0
    2362:	f7ff fcc1 	bl	1ce8 <flash_area_open>
    if (rc) {
    2366:	2800      	cmp	r0, #0
    2368:	d1dc      	bne.n	2324 <FIH_LABEL_FIH_CALL_END_948+0x14>
    if (off == 0) {
    236a:	ea58 0309 	orrs.w	r3, r8, r9
    236e:	4e34      	ldr	r6, [pc, #208]	; (2440 <FIH_LABEL_FIH_CALL_END_948+0x130>)
    2370:	d10a      	bne.n	2388 <FIH_LABEL_FIH_CALL_END_948+0x78>
        if (data_len > flash_area_get_size(fap)) {
    2372:	9b08      	ldr	r3, [sp, #32]
        curr_off = 0;
    2374:	6030      	str	r0, [r6, #0]
        if (data_len > flash_area_get_size(fap)) {
    2376:	689a      	ldr	r2, [r3, #8]
    2378:	2300      	movs	r3, #0
    237a:	4552      	cmp	r2, sl
    237c:	eb73 030b 	sbcs.w	r3, r3, fp
    2380:	dbd0      	blt.n	2324 <FIH_LABEL_FIH_CALL_END_948+0x14>
        img_size = data_len;
    2382:	4b30      	ldr	r3, [pc, #192]	; (2444 <FIH_LABEL_FIH_CALL_END_948+0x134>)
    2384:	f8c3 a000 	str.w	sl, [r3]
    if (off != curr_off) {
    2388:	6833      	ldr	r3, [r6, #0]
    238a:	2100      	movs	r1, #0
    238c:	4549      	cmp	r1, r9
    238e:	bf08      	it	eq
    2390:	4543      	cmpeq	r3, r8
    2392:	d05f      	beq.n	2454 <FIH_LABEL_FIH_CALL_END_948+0x144>
        rc = 0;
    2394:	2400      	movs	r4, #0
    BOOT_LOG_INF("RX: 0x%x", rc);
    2396:	4622      	mov	r2, r4
    2398:	482b      	ldr	r0, [pc, #172]	; (2448 <FIH_LABEL_FIH_CALL_END_948+0x138>)
    tstrx_put(&cbor_state, "rc");
    239a:	4d2c      	ldr	r5, [pc, #176]	; (244c <FIH_LABEL_FIH_CALL_END_948+0x13c>)
    BOOT_LOG_INF("RX: 0x%x", rc);
    239c:	2149      	movs	r1, #73	; 0x49
    239e:	f003 fdd9 	bl	5f54 <z_log_minimal_printk>
    map_start_encode(&cbor_state, 10);
    23a2:	210a      	movs	r1, #10
    23a4:	4821      	ldr	r0, [pc, #132]	; (242c <FIH_LABEL_FIH_CALL_END_948+0x11c>)
    23a6:	f004 f879 	bl	649c <map_start_encode>
    tstrx_put(&cbor_state, "rc");
    23aa:	e895 0003 	ldmia.w	r5, {r0, r1}
    23ae:	ab10      	add	r3, sp, #64	; 0x40
    23b0:	e883 0003 	stmia.w	r3, {r0, r1}
    23b4:	4619      	mov	r1, r3
    23b6:	481d      	ldr	r0, [pc, #116]	; (242c <FIH_LABEL_FIH_CALL_END_948+0x11c>)
    23b8:	f004 f849 	bl	644e <tstrx_encode>
    uintx32_put(&cbor_state, rc);
    23bc:	481b      	ldr	r0, [pc, #108]	; (242c <FIH_LABEL_FIH_CALL_END_948+0x11c>)
    23be:	4621      	mov	r1, r4
    23c0:	f004 f83c 	bl	643c <uintx32_put>
    if (rc == 0) {
    23c4:	b96c      	cbnz	r4, 23e2 <FIH_LABEL_FIH_CALL_END_948+0xd2>
        tstrx_put(&cbor_state, "off");
    23c6:	e9d5 0108 	ldrd	r0, r1, [r5, #32]
    23ca:	ab0e      	add	r3, sp, #56	; 0x38
    23cc:	e883 0003 	stmia.w	r3, {r0, r1}
    23d0:	4619      	mov	r1, r3
    23d2:	4816      	ldr	r0, [pc, #88]	; (242c <FIH_LABEL_FIH_CALL_END_948+0x11c>)
    23d4:	f004 f83b 	bl	644e <tstrx_encode>
        uintx32_put(&cbor_state, curr_off);
    23d8:	4b19      	ldr	r3, [pc, #100]	; (2440 <FIH_LABEL_FIH_CALL_END_948+0x130>)
    23da:	4814      	ldr	r0, [pc, #80]	; (242c <FIH_LABEL_FIH_CALL_END_948+0x11c>)
    23dc:	6819      	ldr	r1, [r3, #0]
    23de:	f004 f82d 	bl	643c <uintx32_put>
    map_end_encode(&cbor_state, 10);
    23e2:	210a      	movs	r1, #10
    23e4:	4811      	ldr	r0, [pc, #68]	; (242c <FIH_LABEL_FIH_CALL_END_948+0x11c>)
    23e6:	f004 f874 	bl	64d2 <map_end_encode>
    boot_serial_output();
    23ea:	f7ff fdc5 	bl	1f78 <boot_serial_output>
    flash_area_close(fap);
    23ee:	9808      	ldr	r0, [sp, #32]
    23f0:	f003 fdbd 	bl	5f6e <flash_area_close>
}
    23f4:	e779      	b.n	22ea <boot_serial_input+0x18e>
        switch(member->_Member_choice) {
    23f6:	7a19      	ldrb	r1, [r3, #8]
    23f8:	2903      	cmp	r1, #3
    23fa:	d804      	bhi.n	2406 <FIH_LABEL_FIH_CALL_END_948+0xf6>
    23fc:	e8df f001 	tbb	[pc, r1]
    2400:	0e090602 	.word	0x0e090602
                img_num = member->_Member_image;
    2404:	6818      	ldr	r0, [r3, #0]
    for (int i = 0; i < upload._Upload_members_count; i++) {
    2406:	3201      	adds	r2, #1
    2408:	330c      	adds	r3, #12
    240a:	e79b      	b.n	2344 <FIH_LABEL_FIH_CALL_END_948+0x34>
                slen = member->_Member_data.len;
    240c:	e9d3 7500 	ldrd	r7, r5, [r3]
                break;
    2410:	e7f9      	b.n	2406 <FIH_LABEL_FIH_CALL_END_948+0xf6>
                data_len = member->_Member_len;
    2412:	6819      	ldr	r1, [r3, #0]
    2414:	468a      	mov	sl, r1
    2416:	ea4f 7be1 	mov.w	fp, r1, asr #31
                break;
    241a:	e7f4      	b.n	2406 <FIH_LABEL_FIH_CALL_END_948+0xf6>
                off = member->_Member_off;
    241c:	6819      	ldr	r1, [r3, #0]
    241e:	4688      	mov	r8, r1
    2420:	ea4f 79e1 	mov.w	r9, r1, asr #31
                break;
    2424:	e7ef      	b.n	2406 <FIH_LABEL_FIH_CALL_END_948+0xf6>
    2426:	bf00      	nop
    2428:	2000122c 	.word	0x2000122c
    242c:	20000010 	.word	0x20000010
    2430:	20002c96 	.word	0x20002c96
    2434:	00008ad8 	.word	0x00008ad8
    2438:	20000000 	.word	0x20000000
    243c:	20000194 	.word	0x20000194
    2440:	20001230 	.word	0x20001230
    2444:	20001240 	.word	0x20001240
    2448:	0000957a 	.word	0x0000957a
    244c:	00008ad0 	.word	0x00008ad0
    2450:	96f3b83d 	.word	0x96f3b83d
    if (curr_off + img_blen > img_size) {
    2454:	4a5c      	ldr	r2, [pc, #368]	; (25c8 <FIH_LABEL_FIH_CALL_END_948+0x2b8>)
    2456:	6811      	ldr	r1, [r2, #0]
    2458:	442b      	add	r3, r5
    245a:	428b      	cmp	r3, r1
    245c:	4692      	mov	sl, r2
    245e:	f63f af61 	bhi.w	2324 <FIH_LABEL_FIH_CALL_END_948+0x14>
    rem_bytes = img_blen % flash_area_align(fap);
    2462:	9808      	ldr	r0, [sp, #32]
    2464:	f003 fe02 	bl	606c <flash_area_align>
    2468:	fbb5 f8f0 	udiv	r8, r5, r0
    246c:	fb08 5010 	mls	r0, r8, r0, r5
    2470:	fa5f f880 	uxtb.w	r8, r0
    if ((curr_off + img_blen < img_size) && rem_bytes) {
    2474:	6830      	ldr	r0, [r6, #0]
    2476:	f8da 3000 	ldr.w	r3, [sl]
    247a:	1942      	adds	r2, r0, r5
    247c:	429a      	cmp	r2, r3
    247e:	d206      	bcs.n	248e <FIH_LABEL_FIH_CALL_END_948+0x17e>
    2480:	f1b8 0f00 	cmp.w	r8, #0
    2484:	d003      	beq.n	248e <FIH_LABEL_FIH_CALL_END_948+0x17e>
        img_blen -= rem_bytes;
    2486:	eba5 0508 	sub.w	r5, r5, r8
        rem_bytes = 0;
    248a:	f04f 0800 	mov.w	r8, #0
    rc = flash_area_sector_from_off(curr_off + img_blen, &sector);
    248e:	a90c      	add	r1, sp, #48	; 0x30
    2490:	4428      	add	r0, r5
    2492:	f7fe f877 	bl	584 <flash_area_sector_from_off>
    if (rc) {
    2496:	4604      	mov	r4, r0
    2498:	b120      	cbz	r0, 24a4 <FIH_LABEL_FIH_CALL_END_948+0x194>
        BOOT_LOG_ERR("Unable to determine flash sector size");
    249a:	484c      	ldr	r0, [pc, #304]	; (25cc <FIH_LABEL_FIH_CALL_END_948+0x2bc>)
    249c:	2145      	movs	r1, #69	; 0x45
                BOOT_LOG_ERR("Unable to determine flash sector of"
    249e:	f003 fd59 	bl	5f54 <z_log_minimal_printk>
                goto out;
    24a2:	e778      	b.n	2396 <FIH_LABEL_FIH_CALL_END_948+0x86>
    if (off_last != flash_sector_get_off(&sector)) {
    24a4:	4b4a      	ldr	r3, [pc, #296]	; (25d0 <FIH_LABEL_FIH_CALL_END_948+0x2c0>)
    24a6:	9a0c      	ldr	r2, [sp, #48]	; 0x30
    24a8:	6819      	ldr	r1, [r3, #0]
    24aa:	428a      	cmp	r2, r1
    24ac:	4699      	mov	r9, r3
    24ae:	d011      	beq.n	24d4 <FIH_LABEL_FIH_CALL_END_948+0x1c4>
        BOOT_LOG_INF("Erasing sector at offset 0x%x", flash_sector_get_off(&sector));
    24b0:	4848      	ldr	r0, [pc, #288]	; (25d4 <FIH_LABEL_FIH_CALL_END_948+0x2c4>)
        off_last = flash_sector_get_off(&sector);
    24b2:	601a      	str	r2, [r3, #0]
        BOOT_LOG_INF("Erasing sector at offset 0x%x", flash_sector_get_off(&sector));
    24b4:	2149      	movs	r1, #73	; 0x49
    24b6:	f003 fd4d 	bl	5f54 <z_log_minimal_printk>
        rc = flash_area_erase(fap, flash_sector_get_off(&sector),
    24ba:	e9dd 120c 	ldrd	r1, r2, [sp, #48]	; 0x30
    24be:	9808      	ldr	r0, [sp, #32]
    24c0:	f003 fda5 	bl	600e <flash_area_erase>
        if (rc) {
    24c4:	4604      	mov	r4, r0
    24c6:	b128      	cbz	r0, 24d4 <FIH_LABEL_FIH_CALL_END_948+0x1c4>
                    BOOT_LOG_ERR("Error %d while erasing sector", rc);
    24c8:	4843      	ldr	r0, [pc, #268]	; (25d8 <FIH_LABEL_FIH_CALL_END_948+0x2c8>)
    24ca:	4622      	mov	r2, r4
    24cc:	2145      	movs	r1, #69	; 0x45
    24ce:	f003 fd41 	bl	5f54 <z_log_minimal_printk>
                    goto out;
    24d2:	e760      	b.n	2396 <FIH_LABEL_FIH_CALL_END_948+0x86>
    BOOT_LOG_INF("Writing at 0x%x until 0x%x", curr_off, curr_off + img_blen);
    24d4:	6832      	ldr	r2, [r6, #0]
    24d6:	4841      	ldr	r0, [pc, #260]	; (25dc <FIH_LABEL_FIH_CALL_END_948+0x2cc>)
    24d8:	18ab      	adds	r3, r5, r2
    24da:	2149      	movs	r1, #73	; 0x49
    24dc:	f003 fd3a 	bl	5f54 <z_log_minimal_printk>
    if (rem_bytes) {
    24e0:	f1b8 0f00 	cmp.w	r8, #0
    24e4:	d044      	beq.n	2570 <FIH_LABEL_FIH_CALL_END_948+0x260>
        if (w_size) {
    24e6:	ebb5 0408 	subs.w	r4, r5, r8
    24ea:	d02c      	beq.n	2546 <FIH_LABEL_FIH_CALL_END_948+0x236>
            rc = flash_area_write(fap, curr_off, img_data, w_size);
    24ec:	6831      	ldr	r1, [r6, #0]
    24ee:	9808      	ldr	r0, [sp, #32]
    24f0:	4623      	mov	r3, r4
    24f2:	463a      	mov	r2, r7
    24f4:	f003 fd58 	bl	5fa8 <flash_area_write>
            if (rc) {
    24f8:	2800      	cmp	r0, #0
    24fa:	f47f af13 	bne.w	2324 <FIH_LABEL_FIH_CALL_END_948+0x14>
            curr_off += w_size;
    24fe:	6833      	ldr	r3, [r6, #0]
    2500:	4423      	add	r3, r4
    2502:	6033      	str	r3, [r6, #0]
            img_data += w_size;
    2504:	4427      	add	r7, r4
            img_blen -= w_size;
    2506:	4645      	mov	r5, r8
            memcpy(wbs_aligned, img_data, rem_bytes);
    2508:	4639      	mov	r1, r7
    250a:	4642      	mov	r2, r8
    250c:	a810      	add	r0, sp, #64	; 0x40
    250e:	f004 f8ad 	bl	666c <memcpy>
            memset(wbs_aligned + rem_bytes, flash_area_erased_val(fap),
    2512:	9808      	ldr	r0, [sp, #32]
    2514:	f003 fdb3 	bl	607e <flash_area_erased_val>
    2518:	ab10      	add	r3, sp, #64	; 0x40
    251a:	4601      	mov	r1, r0
    251c:	f1c8 0208 	rsb	r2, r8, #8
    2520:	eb03 0008 	add.w	r0, r3, r8
    2524:	f004 f8ad 	bl	6682 <memset>
            rc = flash_area_write(fap, curr_off, wbs_aligned, flash_area_align(fap));
    2528:	9c08      	ldr	r4, [sp, #32]
    252a:	6837      	ldr	r7, [r6, #0]
    252c:	4620      	mov	r0, r4
    252e:	f003 fd9d 	bl	606c <flash_area_align>
    2532:	aa10      	add	r2, sp, #64	; 0x40
    2534:	4603      	mov	r3, r0
    2536:	4639      	mov	r1, r7
    2538:	4620      	mov	r0, r4
        rc = flash_area_write(fap, curr_off, img_data, img_blen);
    253a:	f003 fd35 	bl	5fa8 <flash_area_write>
    if (rc == 0) {
    253e:	2800      	cmp	r0, #0
    2540:	f47f aef0 	bne.w	2324 <FIH_LABEL_FIH_CALL_END_948+0x14>
    2544:	e001      	b.n	254a <FIH_LABEL_FIH_CALL_END_948+0x23a>
        if (img_blen) {
    2546:	2d00      	cmp	r5, #0
    2548:	d1de      	bne.n	2508 <FIH_LABEL_FIH_CALL_END_948+0x1f8>
        curr_off += img_blen;
    254a:	6833      	ldr	r3, [r6, #0]
    254c:	441d      	add	r5, r3
        if (curr_off == img_size) {
    254e:	f8da 3000 	ldr.w	r3, [sl]
        curr_off += img_blen;
    2552:	6035      	str	r5, [r6, #0]
        if (curr_off == img_size) {
    2554:	429d      	cmp	r5, r3
    2556:	f47f af1d 	bne.w	2394 <FIH_LABEL_FIH_CALL_END_948+0x84>
            rc = flash_area_sector_from_off(boot_status_off(fap), &sector);
    255a:	9808      	ldr	r0, [sp, #32]
    255c:	f003 fa30 	bl	59c0 <boot_status_off>
    2560:	a90c      	add	r1, sp, #48	; 0x30
    2562:	f7fe f80f 	bl	584 <flash_area_sector_from_off>
            if (rc) {
    2566:	4604      	mov	r4, r0
    2568:	b138      	cbz	r0, 257a <FIH_LABEL_FIH_CALL_END_948+0x26a>
                BOOT_LOG_ERR("Unable to determine flash sector of"
    256a:	481d      	ldr	r0, [pc, #116]	; (25e0 <FIH_LABEL_FIH_CALL_END_948+0x2d0>)
    256c:	2145      	movs	r1, #69	; 0x45
    256e:	e796      	b.n	249e <FIH_LABEL_FIH_CALL_END_948+0x18e>
        rc = flash_area_write(fap, curr_off, img_data, img_blen);
    2570:	6831      	ldr	r1, [r6, #0]
    2572:	9808      	ldr	r0, [sp, #32]
    2574:	462b      	mov	r3, r5
    2576:	463a      	mov	r2, r7
    2578:	e7df      	b.n	253a <FIH_LABEL_FIH_CALL_END_948+0x22a>
    257a:	9a0c      	ldr	r2, [sp, #48]	; 0x30
            if (off_last < flash_sector_get_off(&sector)) {
    257c:	f8d9 3000 	ldr.w	r3, [r9]
    2580:	429a      	cmp	r2, r3
    2582:	f67f af07 	bls.w	2394 <FIH_LABEL_FIH_CALL_END_948+0x84>
                BOOT_LOG_INF("Erasing sector at offset 0x%x",
    2586:	4813      	ldr	r0, [pc, #76]	; (25d4 <FIH_LABEL_FIH_CALL_END_948+0x2c4>)
    2588:	2149      	movs	r1, #73	; 0x49
    258a:	f003 fce3 	bl	5f54 <z_log_minimal_printk>
                rc = flash_area_erase(fap, flash_sector_get_off(&sector),
    258e:	e9dd 120c 	ldrd	r1, r2, [sp, #48]	; 0x30
    2592:	9808      	ldr	r0, [sp, #32]
    2594:	f003 fd3b 	bl	600e <flash_area_erase>
                if (rc) {
    2598:	4604      	mov	r4, r0
    259a:	2800      	cmp	r0, #0
    259c:	f43f aefb 	beq.w	2396 <FIH_LABEL_FIH_CALL_END_948+0x86>
    25a0:	e792      	b.n	24c8 <FIH_LABEL_FIH_CALL_END_948+0x1b8>
    } else if (hdr->nh_group == MGMT_GROUP_ID_DEFAULT) {
    25a2:	2800      	cmp	r0, #0
    25a4:	f47f ae0a 	bne.w	21bc <boot_serial_input+0x60>
        switch (hdr->nh_id) {
    25a8:	79e3      	ldrb	r3, [r4, #7]
    25aa:	2b01      	cmp	r3, #1
    25ac:	f43f ae07 	beq.w	21be <boot_serial_input+0x62>
    25b0:	2b05      	cmp	r3, #5
    25b2:	f47f ae03 	bne.w	21bc <boot_serial_input+0x60>
    bs_rc_rsp(0);
    25b6:	f7ff fd71 	bl	209c <bs_rc_rsp>
		arch_syscall_invoke1(*(uintptr_t *)&usec_to_wait, K_SYSCALL_K_BUSY_WAIT);
		return;
	}
#endif
	compiler_barrier();
	z_impl_k_busy_wait(usec_to_wait);
    25ba:	480a      	ldr	r0, [pc, #40]	; (25e4 <FIH_LABEL_FIH_CALL_END_948+0x2d4>)
    25bc:	f006 f957 	bl	886e <z_impl_k_busy_wait>
    sys_reboot(SYS_REBOOT_COLD);
    25c0:	2001      	movs	r0, #1
    25c2:	f7ff fb7d 	bl	1cc0 <sys_reboot>
    25c6:	bf00      	nop
    25c8:	20001240 	.word	0x20001240
    25cc:	000094af 	.word	0x000094af
    25d0:	20000024 	.word	0x20000024
    25d4:	000094da 	.word	0x000094da
    25d8:	000094fd 	.word	0x000094fd
    25dc:	00009520 	.word	0x00009520
    25e0:	00009540 	.word	0x00009540
    25e4:	0003d090 	.word	0x0003d090

000025e8 <boot_serial_start>:
 * Task which waits reading console, expecting to get image over
 * serial port.
 */
void
boot_serial_start(const struct boot_uart_funcs *f)
{
    25e8:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
    int off;
    int dec_off = 0;
    int full_line;
    int max_input;

    boot_uf = f;
    25ec:	4b25      	ldr	r3, [pc, #148]	; (2684 <boot_serial_start+0x9c>)

    off = 0;
    while (1) {
        MCUBOOT_CPU_IDLE();
        MCUBOOT_WATCHDOG_FEED();
        rc = f->read(in_buf + off, sizeof(in_buf) - off, &full_line);
    25ee:	f8df 80a4 	ldr.w	r8, [pc, #164]	; 2694 <boot_serial_start+0xac>
    25f2:	4d25      	ldr	r5, [pc, #148]	; (2688 <boot_serial_start+0xa0>)
    boot_uf = f;
    25f4:	6018      	str	r0, [r3, #0]
    int dec_off = 0;
    25f6:	2400      	movs	r4, #0
{
    25f8:	4606      	mov	r6, r0
    int dec_off = 0;
    25fa:	9400      	str	r4, [sp, #0]
    off = 0;
    25fc:	4647      	mov	r7, r8
    25fe:	f000 f8fd 	bl	27fc <arch_cpu_idle>
    2602:	4b22      	ldr	r3, [pc, #136]	; (268c <boot_serial_start+0xa4>)
        rc = f->read(in_buf + off, sizeof(in_buf) - off, &full_line);
    2604:	f5c4 7100 	rsb	r1, r4, #512	; 0x200
    2608:	f8c3 5600 	str.w	r5, [r3, #1536]	; 0x600
    260c:	aa01      	add	r2, sp, #4
    260e:	f8c3 5604 	str.w	r5, [r3, #1540]	; 0x604
    2612:	3101      	adds	r1, #1
    2614:	f8c3 5608 	str.w	r5, [r3, #1544]	; 0x608
    2618:	eb08 0004 	add.w	r0, r8, r4
    261c:	f8c3 560c 	str.w	r5, [r3, #1548]	; 0x60c
    2620:	f8c3 5610 	str.w	r5, [r3, #1552]	; 0x610
    2624:	f8c3 5614 	str.w	r5, [r3, #1556]	; 0x614
    2628:	f8c3 5618 	str.w	r5, [r3, #1560]	; 0x618
    262c:	f8c3 561c 	str.w	r5, [r3, #1564]	; 0x61c
    2630:	6833      	ldr	r3, [r6, #0]
    2632:	4798      	blx	r3
        if (rc <= 0 && !full_line) {
    2634:	2800      	cmp	r0, #0
    2636:	9b01      	ldr	r3, [sp, #4]
    2638:	dc01      	bgt.n	263e <boot_serial_start+0x56>
    263a:	2b00      	cmp	r3, #0
    263c:	d0df      	beq.n	25fe <boot_serial_start+0x16>
            continue;
        }
        off += rc;
    263e:	4404      	add	r4, r0
        if (!full_line) {
    2640:	b92b      	cbnz	r3, 264e <boot_serial_start+0x66>
            if (off == max_input) {
    2642:	f240 2301 	movw	r3, #513	; 0x201
    2646:	429c      	cmp	r4, r3
    2648:	d1d9      	bne.n	25fe <boot_serial_start+0x16>

        /* serve errors: out of decode memory, or bad encoding */
        if (rc == 1) {
            boot_serial_input(&dec_buf[2], dec_off - 2);
        }
        off = 0;
    264a:	2400      	movs	r4, #0
    264c:	e7d7      	b.n	25fe <boot_serial_start+0x16>
        if (in_buf[0] == SHELL_NLIP_PKT_START1 &&
    264e:	783b      	ldrb	r3, [r7, #0]
    2650:	2b06      	cmp	r3, #6
    2652:	d109      	bne.n	2668 <boot_serial_start+0x80>
    2654:	787b      	ldrb	r3, [r7, #1]
    2656:	2b09      	cmp	r3, #9
    2658:	d10b      	bne.n	2672 <boot_serial_start+0x8a>
            dec_off = 0;
    265a:	2300      	movs	r3, #0
    265c:	9300      	str	r3, [sp, #0]
            rc = boot_serial_in_dec(&in_buf[2], off - 2, dec_buf, &dec_off, max_input);
    265e:	4669      	mov	r1, sp
    2660:	1ea0      	subs	r0, r4, #2
    2662:	f7ff fd3d 	bl	20e0 <boot_serial_in_dec.constprop.0>
    2666:	e004      	b.n	2672 <boot_serial_start+0x8a>
        } else if (in_buf[0] == SHELL_NLIP_DATA_START1 &&
    2668:	2b04      	cmp	r3, #4
    266a:	d102      	bne.n	2672 <boot_serial_start+0x8a>
    266c:	787b      	ldrb	r3, [r7, #1]
    266e:	2b14      	cmp	r3, #20
    2670:	d0f5      	beq.n	265e <boot_serial_start+0x76>
        if (rc == 1) {
    2672:	2801      	cmp	r0, #1
    2674:	d1e9      	bne.n	264a <boot_serial_start+0x62>
            boot_serial_input(&dec_buf[2], dec_off - 2);
    2676:	9900      	ldr	r1, [sp, #0]
    2678:	4805      	ldr	r0, [pc, #20]	; (2690 <boot_serial_start+0xa8>)
    267a:	3902      	subs	r1, #2
    267c:	f7ff fd6e 	bl	215c <boot_serial_input>
    2680:	e7e3      	b.n	264a <boot_serial_start+0x62>
    2682:	bf00      	nop
    2684:	20001228 	.word	0x20001228
    2688:	6e524635 	.word	0x6e524635
    268c:	40010000 	.word	0x40010000
    2690:	20002d18 	.word	0x20002d18
    2694:	20002f17 	.word	0x20002f17

00002698 <decode_Upload>:
	return tmp_result;
}

static bool decode_Upload(
		cbor_state_t *state, struct Upload *result)
{
    2698:	b530      	push	{r4, r5, lr}
    269a:	b085      	sub	sp, #20
    269c:	4605      	mov	r5, r0
    269e:	460c      	mov	r4, r1
	cbor_print("%s\n", __func__);
	bool int_res;

	bool tmp_result = (((map_start_decode(state) && (int_res = (multi_decode(1, 5, &(*result)._Upload_members_count, (void *)decode_Member, state, (&(*result)._Upload_members), sizeof(struct Member_))), ((map_end_decode(state)) && int_res)))));
    26a0:	f003 fe10 	bl	62c4 <map_start_decode>
    26a4:	b920      	cbnz	r0, 26b0 <decode_Upload+0x18>
    26a6:	2400      	movs	r4, #0

	if (!tmp_result)
		cbor_trace();

	return tmp_result;
}
    26a8:	f004 0001 	and.w	r0, r4, #1
    26ac:	b005      	add	sp, #20
    26ae:	bd30      	pop	{r4, r5, pc}
	bool tmp_result = (((map_start_decode(state) && (int_res = (multi_decode(1, 5, &(*result)._Upload_members_count, (void *)decode_Member, state, (&(*result)._Upload_members), sizeof(struct Member_))), ((map_end_decode(state)) && int_res)))));
    26b0:	230c      	movs	r3, #12
    26b2:	e9cd 4301 	strd	r4, r3, [sp, #4]
    26b6:	f104 023c 	add.w	r2, r4, #60	; 0x3c
    26ba:	4b06      	ldr	r3, [pc, #24]	; (26d4 <decode_Upload+0x3c>)
    26bc:	9500      	str	r5, [sp, #0]
    26be:	2105      	movs	r1, #5
    26c0:	2001      	movs	r0, #1
    26c2:	f003 fe0f 	bl	62e4 <multi_decode>
    26c6:	4604      	mov	r4, r0
    26c8:	4628      	mov	r0, r5
    26ca:	f003 fe09 	bl	62e0 <map_end_decode>
    26ce:	2800      	cmp	r0, #0
    26d0:	d0e9      	beq.n	26a6 <decode_Upload+0xe>
    26d2:	e7e9      	b.n	26a8 <decode_Upload+0x10>
    26d4:	000026d9 	.word	0x000026d9

000026d8 <decode_Member>:
{
    26d8:	b573      	push	{r0, r1, r4, r5, r6, lr}
    26da:	4604      	mov	r4, r0
    26dc:	460e      	mov	r6, r1
	bool tmp_result = (((union_start_code(state) && (int_res = (((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"image",
    26de:	f003 ff35 	bl	654c <union_start_code>
    26e2:	4605      	mov	r5, r0
    26e4:	b338      	cbz	r0, 2736 <decode_Member+0x5e>
    26e6:	4b36      	ldr	r3, [pc, #216]	; (27c0 <decode_Member+0xe8>)
    26e8:	9300      	str	r3, [sp, #0]
    26ea:	4669      	mov	r1, sp
    tmp_str.len = sizeof("image") - 1, &tmp_str)))))
    26ec:	2305      	movs	r3, #5
	bool tmp_result = (((union_start_code(state) && (int_res = (((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"image",
    26ee:	4620      	mov	r0, r4
    tmp_str.len = sizeof("image") - 1, &tmp_str)))))
    26f0:	9301      	str	r3, [sp, #4]
	bool tmp_result = (((union_start_code(state) && (int_res = (((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"image",
    26f2:	f003 fde4 	bl	62be <tstrx_expect>
	|| (union_elem_code(state) && ((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"sha",
    26f6:	b138      	cbz	r0, 2708 <decode_Member+0x30>
	&& (intx32_decode(state, (&(*result)._Member_image)))) && (((*result)._Member_choice = _Member_image) || 1))
    26f8:	4631      	mov	r1, r6
    26fa:	4620      	mov	r0, r4
    26fc:	f003 fd93 	bl	6226 <intx32_decode>
    2700:	b110      	cbz	r0, 2708 <decode_Member+0x30>
    2702:	2300      	movs	r3, #0
	&& (bstrx_decode(state, (&(*result)._Member_sha)))) && (((*result)._Member_choice = _Member_sha) || 1)))), union_end_code(state), int_res))));
    2704:	7233      	strb	r3, [r6, #8]
    2706:	e040      	b.n	278a <decode_Member+0xb2>
	|| (union_elem_code(state) && ((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"data",
    2708:	4620      	mov	r0, r4
    270a:	f003 ff22 	bl	6552 <union_elem_code>
    270e:	b1a8      	cbz	r0, 273c <decode_Member+0x64>
    2710:	4b2c      	ldr	r3, [pc, #176]	; (27c4 <decode_Member+0xec>)
    2712:	9300      	str	r3, [sp, #0]
    2714:	4669      	mov	r1, sp
    tmp_str.len = sizeof("data") - 1, &tmp_str)))))
    2716:	2304      	movs	r3, #4
	|| (union_elem_code(state) && ((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"data",
    2718:	4620      	mov	r0, r4
    tmp_str.len = sizeof("data") - 1, &tmp_str)))))
    271a:	9301      	str	r3, [sp, #4]
	|| (union_elem_code(state) && ((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"data",
    271c:	f003 fdcf 	bl	62be <tstrx_expect>
    2720:	b160      	cbz	r0, 273c <decode_Member+0x64>
	&& (bstrx_decode(state, (&(*result)._Member_data)))) && (((*result)._Member_choice = _Member_data) || 1)))
    2722:	4631      	mov	r1, r6
    2724:	4620      	mov	r0, r4
    2726:	f003 fdc7 	bl	62b8 <bstrx_decode>
    272a:	b138      	cbz	r0, 273c <decode_Member+0x64>
    272c:	2501      	movs	r5, #1
    272e:	7235      	strb	r5, [r6, #8]
	&& (bstrx_decode(state, (&(*result)._Member_sha)))) && (((*result)._Member_choice = _Member_sha) || 1)))), union_end_code(state), int_res))));
    2730:	4620      	mov	r0, r4
    2732:	f003 ff12 	bl	655a <union_end_code>
}
    2736:	4628      	mov	r0, r5
    2738:	b002      	add	sp, #8
    273a:	bd70      	pop	{r4, r5, r6, pc}
	|| (union_elem_code(state) && ((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"len",
    273c:	4620      	mov	r0, r4
    273e:	f003 ff08 	bl	6552 <union_elem_code>
    2742:	b178      	cbz	r0, 2764 <decode_Member+0x8c>
    2744:	4b20      	ldr	r3, [pc, #128]	; (27c8 <decode_Member+0xf0>)
    2746:	9300      	str	r3, [sp, #0]
    2748:	4669      	mov	r1, sp
    tmp_str.len = sizeof("len") - 1, &tmp_str)))))
    274a:	2303      	movs	r3, #3
	|| (union_elem_code(state) && ((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"len",
    274c:	4620      	mov	r0, r4
    tmp_str.len = sizeof("len") - 1, &tmp_str)))))
    274e:	9301      	str	r3, [sp, #4]
	|| (union_elem_code(state) && ((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"len",
    2750:	f003 fdb5 	bl	62be <tstrx_expect>
    2754:	b130      	cbz	r0, 2764 <decode_Member+0x8c>
	&& (intx32_decode(state, (&(*result)._Member_len)))) && (((*result)._Member_choice = _Member_len) || 1)))
    2756:	4631      	mov	r1, r6
    2758:	4620      	mov	r0, r4
    275a:	f003 fd64 	bl	6226 <intx32_decode>
    275e:	b108      	cbz	r0, 2764 <decode_Member+0x8c>
    2760:	2302      	movs	r3, #2
    2762:	e7cf      	b.n	2704 <decode_Member+0x2c>
	|| (union_elem_code(state) && ((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"off",
    2764:	4620      	mov	r0, r4
    2766:	f003 fef4 	bl	6552 <union_elem_code>
    276a:	b180      	cbz	r0, 278e <decode_Member+0xb6>
    276c:	4b17      	ldr	r3, [pc, #92]	; (27cc <decode_Member+0xf4>)
    276e:	9300      	str	r3, [sp, #0]
    tmp_str.len = sizeof("off") - 1, &tmp_str)))))
    2770:	2503      	movs	r5, #3
	|| (union_elem_code(state) && ((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"off",
    2772:	4669      	mov	r1, sp
    2774:	4620      	mov	r0, r4
    tmp_str.len = sizeof("off") - 1, &tmp_str)))))
    2776:	9501      	str	r5, [sp, #4]
	|| (union_elem_code(state) && ((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"off",
    2778:	f003 fda1 	bl	62be <tstrx_expect>
    277c:	b138      	cbz	r0, 278e <decode_Member+0xb6>
	&& (intx32_decode(state, (&(*result)._Member_off)))) && (((*result)._Member_choice = _Member_off) || 1)))
    277e:	4631      	mov	r1, r6
    2780:	4620      	mov	r0, r4
    2782:	f003 fd50 	bl	6226 <intx32_decode>
    2786:	b110      	cbz	r0, 278e <decode_Member+0xb6>
    2788:	7235      	strb	r5, [r6, #8]
	|| (union_elem_code(state) && ((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"sha",
    278a:	2501      	movs	r5, #1
    278c:	e7d0      	b.n	2730 <decode_Member+0x58>
    278e:	4620      	mov	r0, r4
    2790:	f003 fedf 	bl	6552 <union_elem_code>
    2794:	b908      	cbnz	r0, 279a <decode_Member+0xc2>
    2796:	2500      	movs	r5, #0
    2798:	e7ca      	b.n	2730 <decode_Member+0x58>
    279a:	4b0d      	ldr	r3, [pc, #52]	; (27d0 <decode_Member+0xf8>)
    279c:	9300      	str	r3, [sp, #0]
    279e:	4669      	mov	r1, sp
    tmp_str.len = sizeof("sha") - 1, &tmp_str)))))
    27a0:	2303      	movs	r3, #3
	|| (union_elem_code(state) && ((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"sha",
    27a2:	4620      	mov	r0, r4
    tmp_str.len = sizeof("sha") - 1, &tmp_str)))))
    27a4:	9301      	str	r3, [sp, #4]
	|| (union_elem_code(state) && ((((tstrx_expect(state, ((tmp_str.value = (const uint8_t *)"sha",
    27a6:	f003 fd8a 	bl	62be <tstrx_expect>
    27aa:	2800      	cmp	r0, #0
    27ac:	d0f3      	beq.n	2796 <decode_Member+0xbe>
	&& (bstrx_decode(state, (&(*result)._Member_sha)))) && (((*result)._Member_choice = _Member_sha) || 1)))), union_end_code(state), int_res))));
    27ae:	4631      	mov	r1, r6
    27b0:	4620      	mov	r0, r4
    27b2:	f003 fd81 	bl	62b8 <bstrx_decode>
    27b6:	2800      	cmp	r0, #0
    27b8:	d0ed      	beq.n	2796 <decode_Member+0xbe>
    27ba:	2304      	movs	r3, #4
    27bc:	e7a2      	b.n	2704 <decode_Member+0x2c>
    27be:	bf00      	nop
    27c0:	000091d9 	.word	0x000091d9
    27c4:	00009588 	.word	0x00009588
    27c8:	0000958d 	.word	0x0000958d
    27cc:	000094a0 	.word	0x000094a0
    27d0:	00009591 	.word	0x00009591

000027d4 <cbor_decode_Upload>:

bool cbor_decode_Upload(
		const uint8_t *payload, uint32_t payload_len,
		struct Upload *result,
		uint32_t *payload_len_out)
{
    27d4:	b51f      	push	{r0, r1, r2, r3, r4, lr}
	return entry_function(payload, payload_len, (const void *)result,
    27d6:	f04f 0c02 	mov.w	ip, #2
    27da:	2401      	movs	r4, #1
    27dc:	e9cd 4c01 	strd	r4, ip, [sp, #4]
    27e0:	4c02      	ldr	r4, [pc, #8]	; (27ec <cbor_decode_Upload+0x18>)
    27e2:	9400      	str	r4, [sp, #0]
    27e4:	f003 febd 	bl	6562 <entry_function>
		payload_len_out, (void *)decode_Upload,
		1, 2);
}
    27e8:	b004      	add	sp, #16
    27ea:	bd10      	pop	{r4, pc}
    27ec:	00002699 	.word	0x00002699

000027f0 <z_arm_cpu_idle_init>:
 * void z_arm_cpu_idle_init(void);
 */

SECTION_FUNC(TEXT, z_arm_cpu_idle_init)
#if defined(CONFIG_CPU_CORTEX_M)
	ldr	r1, =_SCB_SCR
    27f0:	4901      	ldr	r1, [pc, #4]	; (27f8 <z_arm_cpu_idle_init+0x8>)
	movs.n	r2, #_SCR_INIT_BITS
    27f2:	2210      	movs	r2, #16
	str	r2, [r1]
    27f4:	600a      	str	r2, [r1, #0]
#endif
	bx	lr
    27f6:	4770      	bx	lr
	ldr	r1, =_SCB_SCR
    27f8:	e000ed10 	.word	0xe000ed10

000027fc <arch_cpu_idle>:
	 * before entering low power state.
	 *
	 * Set PRIMASK before configuring BASEPRI to prevent interruption
	 * before wake-up.
	 */
	cpsid	i
    27fc:	b672      	cpsid	i

	/*
	 * Set wake-up interrupt priority to the lowest and synchronise to
	 * ensure that this is visible to the WFI instruction.
	 */
	eors.n	r0, r0
    27fe:	4040      	eors	r0, r0
	msr	BASEPRI, r0
    2800:	f380 8811 	msr	BASEPRI, r0
	isb
    2804:	f3bf 8f6f 	isb	sy

	/*
	 * Wait for all memory transactions to complete before entering low
	 * power state.
	 */
	dsb
    2808:	f3bf 8f4f 	dsb	sy

	/* Enter low power state */
	wfi
    280c:	bf30      	wfi

	/*
	 * Clear PRIMASK and flush instruction buffer to immediately service
	 * the wake-up interrupt.
	 */
	cpsie	i
    280e:	b662      	cpsie	i
	isb
    2810:	f3bf 8f6f 	isb	sy

	bx	lr
    2814:	4770      	bx	lr
    2816:	bf00      	nop

00002818 <arch_cpu_atomic_idle>:

	/*
	 * Lock PRIMASK while sleeping: wfe will still get interrupted by
	 * incoming interrupts but the CPU will not service them right away.
	 */
	cpsid	i
    2818:	b672      	cpsid	i
	cpsie	i
_irq_disabled:

#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	/* r1: zero, for setting BASEPRI (needs a register) */
	eors.n	r1, r1
    281a:	4049      	eors	r1, r1

	/* unlock BASEPRI so wfe gets interrupted by incoming interrupts */
	msr	BASEPRI, r1
    281c:	f381 8811 	msr	BASEPRI, r1

	wfe
    2820:	bf20      	wfe

	msr	BASEPRI, r0
    2822:	f380 8811 	msr	BASEPRI, r0
	cpsie	i
    2826:	b662      	cpsie	i
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
	bx	lr
    2828:	4770      	bx	lr
    282a:	bf00      	nop

0000282c <z_arm_fatal_error>:
	LOG_ERR("Faulting instruction address (r15/pc): 0x%08x",
		esf->basic.pc);
}

void z_arm_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
{
    282c:	b537      	push	{r0, r1, r2, r4, r5, lr}
    282e:	4605      	mov	r5, r0

	if (esf != NULL) {
    2830:	460c      	mov	r4, r1
    2832:	b1c9      	cbz	r1, 2868 <z_arm_fatal_error+0x3c>
	LOG_ERR("r0/a1:  0x%08x  r1/a2:  0x%08x  r2/a3:  0x%08x",
    2834:	688b      	ldr	r3, [r1, #8]
    2836:	9300      	str	r3, [sp, #0]
    2838:	e9d1 2300 	ldrd	r2, r3, [r1]
    283c:	480e      	ldr	r0, [pc, #56]	; (2878 <z_arm_fatal_error+0x4c>)
    283e:	2145      	movs	r1, #69	; 0x45
    2840:	f003 fb88 	bl	5f54 <z_log_minimal_printk>
	LOG_ERR("r3/a4:  0x%08x r12/ip:  0x%08x r14/lr:  0x%08x",
    2844:	6963      	ldr	r3, [r4, #20]
    2846:	9300      	str	r3, [sp, #0]
    2848:	e9d4 2303 	ldrd	r2, r3, [r4, #12]
    284c:	480b      	ldr	r0, [pc, #44]	; (287c <z_arm_fatal_error+0x50>)
    284e:	2145      	movs	r1, #69	; 0x45
    2850:	f003 fb80 	bl	5f54 <z_log_minimal_printk>
	LOG_ERR(" xpsr:  0x%08x", esf->basic.xpsr);
    2854:	69e2      	ldr	r2, [r4, #28]
    2856:	480a      	ldr	r0, [pc, #40]	; (2880 <z_arm_fatal_error+0x54>)
    2858:	2145      	movs	r1, #69	; 0x45
    285a:	f003 fb7b 	bl	5f54 <z_log_minimal_printk>
	LOG_ERR("Faulting instruction address (r15/pc): 0x%08x",
    285e:	69a2      	ldr	r2, [r4, #24]
    2860:	4808      	ldr	r0, [pc, #32]	; (2884 <z_arm_fatal_error+0x58>)
    2862:	2145      	movs	r1, #69	; 0x45
    2864:	f003 fb76 	bl	5f54 <z_log_minimal_printk>
		esf_dump(esf);
	}
	z_fatal_error(reason, esf);
    2868:	4621      	mov	r1, r4
    286a:	4628      	mov	r0, r5
}
    286c:	b003      	add	sp, #12
    286e:	e8bd 4030 	ldmia.w	sp!, {r4, r5, lr}
	z_fatal_error(reason, esf);
    2872:	f002 be7d 	b.w	5570 <z_fatal_error>
    2876:	bf00      	nop
    2878:	00009595 	.word	0x00009595
    287c:	000095c9 	.word	0x000095c9
    2880:	000095fd 	.word	0x000095fd
    2884:	00009611 	.word	0x00009611

00002888 <arch_irq_enable>:
#define REG_FROM_IRQ(irq) (irq / NUM_IRQS_PER_REG)
#define BIT_FROM_IRQ(irq) (irq % NUM_IRQS_PER_REG)

void arch_irq_enable(unsigned int irq)
{
	NVIC_EnableIRQ((IRQn_Type)irq);
    2888:	b243      	sxtb	r3, r0
  \param [in]      IRQn  Device specific interrupt number.
  \note    IRQn must not be negative.
 */
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
  if ((int32_t)(IRQn) >= 0)
    288a:	2b00      	cmp	r3, #0
    288c:	db08      	blt.n	28a0 <arch_irq_enable+0x18>
  {
    __COMPILER_BARRIER();
    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    288e:	2201      	movs	r2, #1
    2890:	f000 001f 	and.w	r0, r0, #31
    2894:	fa02 f000 	lsl.w	r0, r2, r0
    2898:	095b      	lsrs	r3, r3, #5
    289a:	4a02      	ldr	r2, [pc, #8]	; (28a4 <arch_irq_enable+0x1c>)
    289c:	f842 0023 	str.w	r0, [r2, r3, lsl #2]
}
    28a0:	4770      	bx	lr
    28a2:	bf00      	nop
    28a4:	e000e100 	.word	0xe000e100

000028a8 <arch_irq_is_enabled>:
	NVIC_DisableIRQ((IRQn_Type)irq);
}

int arch_irq_is_enabled(unsigned int irq)
{
	return NVIC->ISER[REG_FROM_IRQ(irq)] & BIT(BIT_FROM_IRQ(irq));
    28a8:	4b05      	ldr	r3, [pc, #20]	; (28c0 <arch_irq_is_enabled+0x18>)
    28aa:	0942      	lsrs	r2, r0, #5
    28ac:	f000 001f 	and.w	r0, r0, #31
    28b0:	f853 2022 	ldr.w	r2, [r3, r2, lsl #2]
    28b4:	2301      	movs	r3, #1
    28b6:	fa03 f000 	lsl.w	r0, r3, r0
}
    28ba:	4010      	ands	r0, r2
    28bc:	4770      	bx	lr
    28be:	bf00      	nop
    28c0:	e000e100 	.word	0xe000e100

000028c4 <z_arm_irq_priority_set>:
	 */
	__ASSERT(prio <= (BIT(NUM_IRQ_PRIO_BITS) - 1),
		 "invalid priority %d for %d irq! values must be less than %lu\n",
		 prio - _IRQ_PRIO_OFFSET, irq,
		 BIT(NUM_IRQ_PRIO_BITS) - (_IRQ_PRIO_OFFSET));
	NVIC_SetPriority((IRQn_Type)irq, prio);
    28c4:	b243      	sxtb	r3, r0
  \param [in]  priority  Priority to set.
  \note    The priority cannot be set for every processor exception.
 */
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
  if ((int32_t)(IRQn) >= 0)
    28c6:	2b00      	cmp	r3, #0
  {
    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    28c8:	bfa8      	it	ge
    28ca:	f103 4360 	addge.w	r3, r3, #3758096384	; 0xe0000000
		prio += _IRQ_PRIO_OFFSET;
    28ce:	f101 0101 	add.w	r1, r1, #1
  }
  else
  {
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    28d2:	bfb8      	it	lt
    28d4:	4b06      	ldrlt	r3, [pc, #24]	; (28f0 <z_arm_irq_priority_set+0x2c>)
    28d6:	ea4f 1141 	mov.w	r1, r1, lsl #5
    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    28da:	bfac      	ite	ge
    28dc:	f503 4361 	addge.w	r3, r3, #57600	; 0xe100
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    28e0:	f000 000f 	andlt.w	r0, r0, #15
    28e4:	b2c9      	uxtb	r1, r1
    28e6:	bfb4      	ite	lt
    28e8:	5419      	strblt	r1, [r3, r0]
    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    28ea:	f883 1300 	strbge.w	r1, [r3, #768]	; 0x300
}
    28ee:	4770      	bx	lr
    28f0:	e000ed14 	.word	0xe000ed14

000028f4 <z_SysNmiOnReset>:
_ASM_FILE_PROLOGUE

GTEXT(z_SysNmiOnReset)

SECTION_FUNC(TEXT, z_SysNmiOnReset)
    wfi
    28f4:	bf30      	wfi
    b z_SysNmiOnReset
    28f6:	f7ff bffd 	b.w	28f4 <z_SysNmiOnReset>
    28fa:	bf00      	nop

000028fc <z_arm_prep_c>:

#define VECTOR_ADDRESS ((uintptr_t)_vector_start)

static inline void relocate_vector_table(void)
{
	SCB->VTOR = VECTOR_ADDRESS & SCB_VTOR_TBLOFF_Msk;
    28fc:	4a0b      	ldr	r2, [pc, #44]	; (292c <z_arm_prep_c+0x30>)
 * This routine prepares for the execution of and runs C code.
 *
 * @return N/A
 */
void z_arm_prep_c(void)
{
    28fe:	b508      	push	{r3, lr}
	SCB->VTOR = VECTOR_ADDRESS & SCB_VTOR_TBLOFF_Msk;
    2900:	4b0b      	ldr	r3, [pc, #44]	; (2930 <z_arm_prep_c+0x34>)
    2902:	f022 027f 	bic.w	r2, r2, #127	; 0x7f
    2906:	609a      	str	r2, [r3, #8]
  __ASM volatile ("dsb 0xF":::"memory");
    2908:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("isb 0xF":::"memory");
    290c:	f3bf 8f6f 	isb	sy
	SCB->CPACR &= (~(CPACR_CP10_Msk | CPACR_CP11_Msk));
    2910:	f8d3 2088 	ldr.w	r2, [r3, #136]	; 0x88
    2914:	f422 0270 	bic.w	r2, r2, #15728640	; 0xf00000
    2918:	f8c3 2088 	str.w	r2, [r3, #136]	; 0x88
	relocate_vector_table();
#if defined(CONFIG_CPU_HAS_FPU)
	z_arm_floating_point_init();
#endif
	z_bss_zero();
    291c:	f002 fe7e 	bl	561c <z_bss_zero>
	z_data_copy();
    2920:	f002 fec0 	bl	56a4 <z_data_copy>
#if ((defined(CONFIG_ARMV7_R) || defined(CONFIG_ARMV7_A)) && defined(CONFIG_INIT_STACKS))
	z_arm_init_stacks();
#endif
	z_arm_interrupt_init();
    2924:	f000 fa52 	bl	2dcc <z_arm_interrupt_init>
	z_cstart();
    2928:	f002 fe82 	bl	5630 <z_cstart>
    292c:	00000000 	.word	0x00000000
    2930:	e000ed00 	.word	0xe000ed00

00002934 <z_arm_svc>:
  bne _stack_frame_endif
_stack_frame_msp:
  mrs r0, MSP
_stack_frame_endif:
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    tst lr, #_EXC_RETURN_SPSEL_Msk /* did we come from thread mode ? */
    2934:	f01e 0f04 	tst.w	lr, #4
    ite eq  /* if zero (equal), came from handler mode */
    2938:	bf0c      	ite	eq
        mrseq r0, MSP   /* handler mode, stack frame is on MSP */
    293a:	f3ef 8008 	mrseq	r0, MSP
        mrsne r0, PSP   /* thread mode, stack frame is on PSP */
    293e:	f3ef 8009 	mrsne	r0, PSP
#endif


    /* Figure out what SVC call number was invoked */

    ldr r1, [r0, #24]   /* grab address of PC from stack frame */
    2942:	6981      	ldr	r1, [r0, #24]
     */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
    subs r1, r1, #2
    ldrb r1, [r1]
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    ldrb r1, [r1, #-2]
    2944:	f811 1c02 	ldrb.w	r1, [r1, #-2]
#endif
    bne _oops

#endif /* CONFIG_USERSPACE */

    cmp r1, #2
    2948:	2902      	cmp	r1, #2
    beq _oops
    294a:	d0ff      	beq.n	294c <_oops>

0000294c <_oops>:
    /* exception return is done in z_arm_int_exit() */
    b z_arm_int_exit
#endif

_oops:
    push {r0, lr}
    294c:	b501      	push	{r0, lr}
    bl z_do_kernel_oops
    294e:	f003 fe3a 	bl	65c6 <z_do_kernel_oops>
    /* return from SVC exception is done here */
    pop {r0, pc}
    2952:	bd01      	pop	{r0, pc}

00002954 <z_check_thread_stack_fail>:
			fault_addr, psp)) {
		/* Thread stack corruption */
		return thread->stack_info.start;
	}
#else
	if (IS_MPU_GUARD_VIOLATION((uint32_t)z_main_stack,
    2954:	f110 0f16 	cmn.w	r0, #22
    2958:	4b09      	ldr	r3, [pc, #36]	; (2980 <z_check_thread_stack_fail+0x2c>)
    295a:	d00f      	beq.n	297c <z_check_thread_stack_fail+0x28>
    295c:	4298      	cmp	r0, r3
    295e:	d307      	bcc.n	2970 <z_check_thread_stack_fail+0x1c>
    2960:	3320      	adds	r3, #32
    2962:	4283      	cmp	r3, r0
    2964:	d904      	bls.n	2970 <z_check_thread_stack_fail+0x1c>
    2966:	428b      	cmp	r3, r1
    2968:	bf94      	ite	ls
    296a:	2300      	movls	r3, #0
    296c:	2301      	movhi	r3, #1
    296e:	e000      	b.n	2972 <z_check_thread_stack_fail+0x1e>
    2970:	2300      	movs	r3, #0
    2972:	2b00      	cmp	r3, #0
	}
#endif
#endif /* CONFIG_USERSPACE */

	return 0;
}
    2974:	4803      	ldr	r0, [pc, #12]	; (2984 <z_check_thread_stack_fail+0x30>)
    2976:	bf08      	it	eq
    2978:	2000      	moveq	r0, #0
    297a:	4770      	bx	lr
	if (IS_MPU_GUARD_VIOLATION((uint32_t)z_main_stack,
    297c:	3320      	adds	r3, #32
    297e:	e7f2      	b.n	2966 <z_check_thread_stack_fail+0x12>
    2980:	20003560 	.word	0x20003560
    2984:	20003580 	.word	0x20003580

00002988 <z_arm_switch_to_main_no_multithreading>:

#if !defined(CONFIG_MULTITHREADING) && defined(CONFIG_CPU_CORTEX_M)

FUNC_NORETURN void z_arm_switch_to_main_no_multithreading(
	k_thread_entry_t main_entry, void *p1, void *p2, void *p3)
{
    2988:	4604      	mov	r4, r0
	 */
	register void *p1_inreg __asm__("r0") = p1;
	register void *p2_inreg __asm__("r1") = p2;
	register void *p3_inreg __asm__("r2") = p3;

	__asm__ volatile (
    298a:	2520      	movs	r5, #32
	register void *p1_inreg __asm__("r0") = p1;
    298c:	4608      	mov	r0, r1
	register void *p2_inreg __asm__("r1") = p2;
    298e:	4611      	mov	r1, r2
	register void *p3_inreg __asm__("r2") = p3;
    2990:	461a      	mov	r2, r3
	__asm__ volatile (
    2992:	4b08      	ldr	r3, [pc, #32]	; (29b4 <loop+0x4>)
    2994:	f383 8809 	msr	PSP, r3
    2998:	b663      	cpsie	if
    299a:	f04f 0300 	mov.w	r3, #0
    299e:	f383 8811 	msr	BASEPRI, r3
    29a2:	f3bf 8f6f 	isb	sy
    29a6:	47a0      	blx	r4
    29a8:	f385 8811 	msr	BASEPRI, r5
    29ac:	f3bf 8f6f 	isb	sy

000029b0 <loop>:
    29b0:	e7fe      	b.n	29b0 <loop>
	, [_psplim]"r" (psplim)
#endif
	:
	);

	CODE_UNREACHABLE; /* LCOV_EXCL_LINE */
    29b2:	bf00      	nop
    29b4:	20005d80 	.word	0x20005d80

000029b8 <_isr_wrapper>:
 * @return N/A
 */
SECTION_FUNC(TEXT, _isr_wrapper)

#if defined(CONFIG_CPU_CORTEX_M)
	push {r0,lr}		/* r0, lr are now the first items on the stack */
    29b8:	b501      	push	{r0, lr}
#endif

#endif /* CONFIG_PM */

#if defined(CONFIG_CPU_CORTEX_M)
	mrs r0, IPSR	/* get exception number */
    29ba:	f3ef 8005 	mrs	r0, IPSR
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
	ldr r1, =16
	subs r0, r1	/* get IRQ number */
	lsls r0, #3	/* table is 8-byte wide */
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	sub r0, r0, #16	/* get IRQ number */
    29be:	f1a0 0010 	sub.w	r0, r0, #16
	lsl r0, r0, #3	/* table is 8-byte wide */
    29c2:	ea4f 00c0 	mov.w	r0, r0, lsl #3
	lsl r1, r1, #3
	cmp r0, r1
	bge spurious_continue
#endif /* !CONFIG_CPU_CORTEX_M */

	ldr r1, =_sw_isr_table
    29c6:	4904      	ldr	r1, [pc, #16]	; (29d8 <_isr_wrapper+0x20>)
	add r1, r1, r0	/* table entry: ISRs must have their MSB set to stay
    29c8:	4401      	add	r1, r0
			 * in thumb mode */

	ldm r1!,{r0,r3}	/* arg in r0, ISR in r3 */
    29ca:	c909      	ldmia	r1!, {r0, r3}
	blx r3		/* call ISR */
    29cc:	4798      	blx	r3

#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
	pop {r0, r3}
	mov lr, r3
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	pop {r0, lr}
    29ce:	e8bd 4001 	ldmia.w	sp!, {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */

	/* Use 'bx' instead of 'b' because 'bx' can jump further, and use
	 * 'bx' instead of 'blx' because exception return is done in
	 * z_arm_int_exit() */
	ldr r1, =z_arm_int_exit
    29d2:	4902      	ldr	r1, [pc, #8]	; (29dc <_isr_wrapper+0x24>)
	bx r1
    29d4:	4708      	bx	r1
    29d6:	0000      	.short	0x0000
	ldr r1, =_sw_isr_table
    29d8:	0000892c 	.word	0x0000892c
	ldr r1, =z_arm_int_exit
    29dc:	000029e1 	.word	0x000029e1

000029e0 <z_arm_exc_exit>:
#else
	pop {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
#endif /* CONFIG_STACK_SENTINEL */

	bx lr
    29e0:	4770      	bx	lr
    29e2:	bf00      	nop

000029e4 <mem_manage_fault>:
 *
 * @return error code to identify the fatal error reason
 */
static uint32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault,
			      bool *recoverable)
{
    29e4:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
	uint32_t reason = K_ERR_CPU_EXCEPTION;
	uint32_t mmfar = -EINVAL;

	PR_FAULT_INFO("***** MPU FAULT *****");

	if ((SCB->CFSR & SCB_CFSR_MSTKERR_Msk) != 0) {
    29e8:	4c2e      	ldr	r4, [pc, #184]	; (2aa4 <mem_manage_fault+0xc0>)
{
    29ea:	4606      	mov	r6, r0
    29ec:	4688      	mov	r8, r1
	PR_FAULT_INFO("***** MPU FAULT *****");
    29ee:	482e      	ldr	r0, [pc, #184]	; (2aa8 <mem_manage_fault+0xc4>)
    29f0:	2145      	movs	r1, #69	; 0x45
{
    29f2:	4615      	mov	r5, r2
	PR_FAULT_INFO("***** MPU FAULT *****");
    29f4:	f003 faae 	bl	5f54 <z_log_minimal_printk>
	if ((SCB->CFSR & SCB_CFSR_MSTKERR_Msk) != 0) {
    29f8:	6aa2      	ldr	r2, [r4, #40]	; 0x28
    29fa:	06d7      	lsls	r7, r2, #27
    29fc:	d503      	bpl.n	2a06 <mem_manage_fault+0x22>
		PR_FAULT_INFO("  Stacking error (context area might be"
    29fe:	482b      	ldr	r0, [pc, #172]	; (2aac <mem_manage_fault+0xc8>)
    2a00:	2145      	movs	r1, #69	; 0x45
    2a02:	f003 faa7 	bl	5f54 <z_log_minimal_printk>
			" not valid)");
	}
	if ((SCB->CFSR & SCB_CFSR_MUNSTKERR_Msk) != 0) {
    2a06:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2a08:	0718      	lsls	r0, r3, #28
    2a0a:	d503      	bpl.n	2a14 <mem_manage_fault+0x30>
		PR_FAULT_INFO("  Unstacking error");
    2a0c:	4828      	ldr	r0, [pc, #160]	; (2ab0 <mem_manage_fault+0xcc>)
    2a0e:	2145      	movs	r1, #69	; 0x45
    2a10:	f003 faa0 	bl	5f54 <z_log_minimal_printk>
	}
	if ((SCB->CFSR & SCB_CFSR_DACCVIOL_Msk) != 0) {
    2a14:	4c23      	ldr	r4, [pc, #140]	; (2aa4 <mem_manage_fault+0xc0>)
    2a16:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2a18:	0799      	lsls	r1, r3, #30
    2a1a:	d421      	bmi.n	2a60 <mem_manage_fault+0x7c>
	uint32_t mmfar = -EINVAL;
    2a1c:	f06f 0715 	mvn.w	r7, #21
				/* clear SCB_MMAR[VALID] to reset */
				SCB->CFSR &= ~SCB_CFSR_MMARVALID_Msk;
			}
		}
	}
	if ((SCB->CFSR & SCB_CFSR_IACCVIOL_Msk) != 0) {
    2a20:	4c20      	ldr	r4, [pc, #128]	; (2aa4 <mem_manage_fault+0xc0>)
    2a22:	6aa2      	ldr	r2, [r4, #40]	; 0x28
    2a24:	07d3      	lsls	r3, r2, #31
    2a26:	d503      	bpl.n	2a30 <mem_manage_fault+0x4c>
		PR_FAULT_INFO("  Instruction Access Violation");
    2a28:	4822      	ldr	r0, [pc, #136]	; (2ab4 <mem_manage_fault+0xd0>)
    2a2a:	2145      	movs	r1, #69	; 0x45
    2a2c:	f003 fa92 	bl	5f54 <z_log_minimal_printk>
	}
#if defined(CONFIG_ARMV7_M_ARMV8_M_FP)
	if ((SCB->CFSR & SCB_CFSR_MLSPERR_Msk) != 0) {
    2a30:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2a32:	0698      	lsls	r0, r3, #26
    2a34:	d503      	bpl.n	2a3e <mem_manage_fault+0x5a>
		PR_FAULT_INFO(
    2a36:	4820      	ldr	r0, [pc, #128]	; (2ab8 <mem_manage_fault+0xd4>)
    2a38:	2145      	movs	r1, #69	; 0x45
    2a3a:	f003 fa8b 	bl	5f54 <z_log_minimal_printk>
	 * crossed into an area beyond the thread stack.]
	 *
	 * Data Access Violation errors may or may not be caused by
	 * thread stack overflows.
	 */
	if ((SCB->CFSR & SCB_CFSR_MSTKERR_Msk) ||
    2a3e:	4b19      	ldr	r3, [pc, #100]	; (2aa4 <mem_manage_fault+0xc0>)
    2a40:	6a9a      	ldr	r2, [r3, #40]	; 0x28
    2a42:	06d1      	lsls	r1, r2, #27
    2a44:	d421      	bmi.n	2a8a <mem_manage_fault+0xa6>
		(SCB->CFSR & SCB_CFSR_DACCVIOL_Msk)) {
    2a46:	6a9a      	ldr	r2, [r3, #40]	; 0x28
	if ((SCB->CFSR & SCB_CFSR_MSTKERR_Msk) ||
    2a48:	0792      	lsls	r2, r2, #30
    2a4a:	d41e      	bmi.n	2a8a <mem_manage_fault+0xa6>
	uint32_t reason = K_ERR_CPU_EXCEPTION;
    2a4c:	2000      	movs	r0, #0
		"without stack guard, user-mode or null-pointer detection\n");
#endif /* CONFIG_MPU_STACK_GUARD || CONFIG_USERSPACE */
	}

	/* clear MMFSR sticky bits */
	SCB->CFSR |= SCB_CFSR_MEMFAULTSR_Msk;
    2a4e:	4a15      	ldr	r2, [pc, #84]	; (2aa4 <mem_manage_fault+0xc0>)
    2a50:	6a93      	ldr	r3, [r2, #40]	; 0x28
    2a52:	f043 03ff 	orr.w	r3, r3, #255	; 0xff
    2a56:	6293      	str	r3, [r2, #40]	; 0x28

	/* Assess whether system shall ignore/recover from this MPU fault. */
	*recoverable = memory_fault_recoverable(esf, true);
    2a58:	2300      	movs	r3, #0
    2a5a:	702b      	strb	r3, [r5, #0]

	return reason;
}
    2a5c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
		PR_FAULT_INFO("  Data Access Violation");
    2a60:	4816      	ldr	r0, [pc, #88]	; (2abc <mem_manage_fault+0xd8>)
    2a62:	2145      	movs	r1, #69	; 0x45
    2a64:	f003 fa76 	bl	5f54 <z_log_minimal_printk>
		uint32_t temp = SCB->MMFAR;
    2a68:	6b67      	ldr	r7, [r4, #52]	; 0x34
		if ((SCB->CFSR & SCB_CFSR_MMARVALID_Msk) != 0) {
    2a6a:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2a6c:	061a      	lsls	r2, r3, #24
    2a6e:	d5d5      	bpl.n	2a1c <mem_manage_fault+0x38>
			PR_EXC("  MMFAR Address: 0x%x", mmfar);
    2a70:	4813      	ldr	r0, [pc, #76]	; (2ac0 <mem_manage_fault+0xdc>)
    2a72:	463a      	mov	r2, r7
    2a74:	2145      	movs	r1, #69	; 0x45
    2a76:	f003 fa6d 	bl	5f54 <z_log_minimal_printk>
			if (from_hard_fault != 0) {
    2a7a:	f1b8 0f00 	cmp.w	r8, #0
    2a7e:	d0cf      	beq.n	2a20 <mem_manage_fault+0x3c>
				SCB->CFSR &= ~SCB_CFSR_MMARVALID_Msk;
    2a80:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2a82:	f023 0380 	bic.w	r3, r3, #128	; 0x80
    2a86:	62a3      	str	r3, [r4, #40]	; 0x28
    2a88:	e7ca      	b.n	2a20 <mem_manage_fault+0x3c>
		if (SCB->ICSR & SCB_ICSR_RETTOBASE_Msk) {
    2a8a:	685b      	ldr	r3, [r3, #4]
    2a8c:	051b      	lsls	r3, r3, #20
    2a8e:	d5dd      	bpl.n	2a4c <mem_manage_fault+0x68>
			uint32_t min_stack_ptr = z_check_thread_stack_fail(mmfar,
    2a90:	4631      	mov	r1, r6
    2a92:	4638      	mov	r0, r7
    2a94:	f7ff ff5e 	bl	2954 <z_check_thread_stack_fail>
			if (min_stack_ptr) {
    2a98:	2800      	cmp	r0, #0
    2a9a:	d0d7      	beq.n	2a4c <mem_manage_fault+0x68>
  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
    2a9c:	f380 8809 	msr	PSP, r0
				reason = K_ERR_STACK_CHK_FAIL;
    2aa0:	2002      	movs	r0, #2
    2aa2:	e7d4      	b.n	2a4e <mem_manage_fault+0x6a>
    2aa4:	e000ed00 	.word	0xe000ed00
    2aa8:	00009644 	.word	0x00009644
    2aac:	0000965f 	.word	0x0000965f
    2ab0:	00009697 	.word	0x00009697
    2ab4:	000096e7 	.word	0x000096e7
    2ab8:	0000970b 	.word	0x0000970b
    2abc:	000096af 	.word	0x000096af
    2ac0:	000096cc 	.word	0x000096cc

00002ac4 <bus_fault.isra.0>:
 *
 * See z_arm_fault_dump() for example.
 *
 * @return N/A
 */
static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable)
    2ac4:	b570      	push	{r4, r5, r6, lr}
{
	uint32_t reason = K_ERR_CPU_EXCEPTION;

	PR_FAULT_INFO("***** BUS FAULT *****");

	if (SCB->CFSR & SCB_CFSR_STKERR_Msk) {
    2ac6:	4c23      	ldr	r4, [pc, #140]	; (2b54 <bus_fault.isra.0+0x90>)
static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable)
    2ac8:	4606      	mov	r6, r0
    2aca:	460d      	mov	r5, r1
	PR_FAULT_INFO("***** BUS FAULT *****");
    2acc:	4822      	ldr	r0, [pc, #136]	; (2b58 <bus_fault.isra.0+0x94>)
    2ace:	2145      	movs	r1, #69	; 0x45
    2ad0:	f003 fa40 	bl	5f54 <z_log_minimal_printk>
	if (SCB->CFSR & SCB_CFSR_STKERR_Msk) {
    2ad4:	6aa2      	ldr	r2, [r4, #40]	; 0x28
    2ad6:	04d1      	lsls	r1, r2, #19
    2ad8:	d503      	bpl.n	2ae2 <bus_fault.isra.0+0x1e>
		PR_FAULT_INFO("  Stacking error");
    2ada:	4820      	ldr	r0, [pc, #128]	; (2b5c <bus_fault.isra.0+0x98>)
    2adc:	2145      	movs	r1, #69	; 0x45
    2ade:	f003 fa39 	bl	5f54 <z_log_minimal_printk>
	}
	if (SCB->CFSR & SCB_CFSR_UNSTKERR_Msk) {
    2ae2:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2ae4:	051a      	lsls	r2, r3, #20
    2ae6:	d503      	bpl.n	2af0 <bus_fault.isra.0+0x2c>
		PR_FAULT_INFO("  Unstacking error");
    2ae8:	481d      	ldr	r0, [pc, #116]	; (2b60 <bus_fault.isra.0+0x9c>)
    2aea:	2145      	movs	r1, #69	; 0x45
    2aec:	f003 fa32 	bl	5f54 <z_log_minimal_printk>
	}
	if (SCB->CFSR & SCB_CFSR_PRECISERR_Msk) {
    2af0:	4c18      	ldr	r4, [pc, #96]	; (2b54 <bus_fault.isra.0+0x90>)
    2af2:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2af4:	059b      	lsls	r3, r3, #22
    2af6:	d510      	bpl.n	2b1a <bus_fault.isra.0+0x56>
		PR_FAULT_INFO("  Precise data bus error");
    2af8:	481a      	ldr	r0, [pc, #104]	; (2b64 <bus_fault.isra.0+0xa0>)
    2afa:	2145      	movs	r1, #69	; 0x45
    2afc:	f003 fa2a 	bl	5f54 <z_log_minimal_printk>
		 * The BFAR address is valid only if this bit is 1.
		 *
		 * Software must follow this sequence because another
		 * higher priority exception might change the BFAR value.
		 */
		STORE_xFAR(bfar, SCB->BFAR);
    2b00:	6ba2      	ldr	r2, [r4, #56]	; 0x38

		if ((SCB->CFSR & SCB_CFSR_BFARVALID_Msk) != 0) {
    2b02:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2b04:	0418      	lsls	r0, r3, #16
    2b06:	d508      	bpl.n	2b1a <bus_fault.isra.0+0x56>
			PR_EXC("  BFAR Address: 0x%x", bfar);
    2b08:	4817      	ldr	r0, [pc, #92]	; (2b68 <bus_fault.isra.0+0xa4>)
    2b0a:	2145      	movs	r1, #69	; 0x45
    2b0c:	f003 fa22 	bl	5f54 <z_log_minimal_printk>
			if (from_hard_fault != 0) {
    2b10:	b11e      	cbz	r6, 2b1a <bus_fault.isra.0+0x56>
				/* clear SCB_CFSR_BFAR[VALID] to reset */
				SCB->CFSR &= ~SCB_CFSR_BFARVALID_Msk;
    2b12:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2b14:	f423 4300 	bic.w	r3, r3, #32768	; 0x8000
    2b18:	62a3      	str	r3, [r4, #40]	; 0x28
			}
		}
	}
	if (SCB->CFSR & SCB_CFSR_IMPRECISERR_Msk) {
    2b1a:	4c0e      	ldr	r4, [pc, #56]	; (2b54 <bus_fault.isra.0+0x90>)
    2b1c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2b1e:	0559      	lsls	r1, r3, #21
    2b20:	d503      	bpl.n	2b2a <bus_fault.isra.0+0x66>
		PR_FAULT_INFO("  Imprecise data bus error");
    2b22:	4812      	ldr	r0, [pc, #72]	; (2b6c <bus_fault.isra.0+0xa8>)
    2b24:	2145      	movs	r1, #69	; 0x45
    2b26:	f003 fa15 	bl	5f54 <z_log_minimal_printk>
	}
	if ((SCB->CFSR & SCB_CFSR_IBUSERR_Msk) != 0) {
    2b2a:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2b2c:	05da      	lsls	r2, r3, #23
    2b2e:	d50b      	bpl.n	2b48 <bus_fault.isra.0+0x84>
		PR_FAULT_INFO("  Instruction bus error");
    2b30:	480f      	ldr	r0, [pc, #60]	; (2b70 <bus_fault.isra.0+0xac>)
    2b32:	2145      	movs	r1, #69	; 0x45
#if !defined(CONFIG_ARMV7_M_ARMV8_M_FP)
	}
#else
	} else if (SCB->CFSR & SCB_CFSR_LSPERR_Msk) {
		PR_FAULT_INFO("  Floating-point lazy state preservation error");
    2b34:	f003 fa0e 	bl	5f54 <z_log_minimal_printk>
		SYSMPU->CESR &= ~sperr;
	}
#endif /* defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_MPU) */

	/* clear BFSR sticky bits */
	SCB->CFSR |= SCB_CFSR_BUSFAULTSR_Msk;
    2b38:	4a06      	ldr	r2, [pc, #24]	; (2b54 <bus_fault.isra.0+0x90>)
    2b3a:	6a93      	ldr	r3, [r2, #40]	; 0x28

	*recoverable = memory_fault_recoverable(esf, true);
    2b3c:	2000      	movs	r0, #0
	SCB->CFSR |= SCB_CFSR_BUSFAULTSR_Msk;
    2b3e:	f443 437f 	orr.w	r3, r3, #65280	; 0xff00
    2b42:	6293      	str	r3, [r2, #40]	; 0x28
	*recoverable = memory_fault_recoverable(esf, true);
    2b44:	7028      	strb	r0, [r5, #0]

	return reason;
}
    2b46:	bd70      	pop	{r4, r5, r6, pc}
	} else if (SCB->CFSR & SCB_CFSR_LSPERR_Msk) {
    2b48:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2b4a:	049b      	lsls	r3, r3, #18
    2b4c:	d5f4      	bpl.n	2b38 <bus_fault.isra.0+0x74>
		PR_FAULT_INFO("  Floating-point lazy state preservation error");
    2b4e:	4809      	ldr	r0, [pc, #36]	; (2b74 <bus_fault.isra.0+0xb0>)
    2b50:	2145      	movs	r1, #69	; 0x45
    2b52:	e7ef      	b.n	2b34 <bus_fault.isra.0+0x70>
    2b54:	e000ed00 	.word	0xe000ed00
    2b58:	0000973f 	.word	0x0000973f
    2b5c:	0000975a 	.word	0x0000975a
    2b60:	00009697 	.word	0x00009697
    2b64:	00009770 	.word	0x00009770
    2b68:	0000978e 	.word	0x0000978e
    2b6c:	000097a8 	.word	0x000097a8
    2b70:	000097c8 	.word	0x000097c8
    2b74:	0000970b 	.word	0x0000970b

00002b78 <usage_fault.isra.0>:
 *
 * See z_arm_fault_dump() for example.
 *
 * @return error code to identify the fatal error reason
 */
static uint32_t usage_fault(const z_arch_esf_t *esf)
    2b78:	b510      	push	{r4, lr}
	uint32_t reason = K_ERR_CPU_EXCEPTION;

	PR_FAULT_INFO("***** USAGE FAULT *****");

	/* bits are sticky: they stack and must be reset */
	if ((SCB->CFSR & SCB_CFSR_DIVBYZERO_Msk) != 0) {
    2b7a:	4c1d      	ldr	r4, [pc, #116]	; (2bf0 <usage_fault.isra.0+0x78>)
	PR_FAULT_INFO("***** USAGE FAULT *****");
    2b7c:	481d      	ldr	r0, [pc, #116]	; (2bf4 <usage_fault.isra.0+0x7c>)
    2b7e:	2145      	movs	r1, #69	; 0x45
    2b80:	f003 f9e8 	bl	5f54 <z_log_minimal_printk>
	if ((SCB->CFSR & SCB_CFSR_DIVBYZERO_Msk) != 0) {
    2b84:	6aa2      	ldr	r2, [r4, #40]	; 0x28
    2b86:	0193      	lsls	r3, r2, #6
    2b88:	d503      	bpl.n	2b92 <usage_fault.isra.0+0x1a>
		PR_FAULT_INFO("  Division by zero");
    2b8a:	481b      	ldr	r0, [pc, #108]	; (2bf8 <usage_fault.isra.0+0x80>)
    2b8c:	2145      	movs	r1, #69	; 0x45
    2b8e:	f003 f9e1 	bl	5f54 <z_log_minimal_printk>
	}
	if ((SCB->CFSR & SCB_CFSR_UNALIGNED_Msk) != 0) {
    2b92:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2b94:	01dc      	lsls	r4, r3, #7
    2b96:	d503      	bpl.n	2ba0 <usage_fault.isra.0+0x28>
		PR_FAULT_INFO("  Unaligned memory access");
    2b98:	4818      	ldr	r0, [pc, #96]	; (2bfc <usage_fault.isra.0+0x84>)
    2b9a:	2145      	movs	r1, #69	; 0x45
    2b9c:	f003 f9da 	bl	5f54 <z_log_minimal_printk>
		 */
		reason = K_ERR_STACK_CHK_FAIL;
#endif /* CONFIG_BUILTIN_STACK_GUARD */
	}
#endif /* CONFIG_ARMV8_M_MAINLINE */
	if ((SCB->CFSR & SCB_CFSR_NOCP_Msk) != 0) {
    2ba0:	4c13      	ldr	r4, [pc, #76]	; (2bf0 <usage_fault.isra.0+0x78>)
    2ba2:	6aa2      	ldr	r2, [r4, #40]	; 0x28
    2ba4:	0310      	lsls	r0, r2, #12
    2ba6:	d503      	bpl.n	2bb0 <usage_fault.isra.0+0x38>
		PR_FAULT_INFO("  No coprocessor instructions");
    2ba8:	4815      	ldr	r0, [pc, #84]	; (2c00 <usage_fault.isra.0+0x88>)
    2baa:	2145      	movs	r1, #69	; 0x45
    2bac:	f003 f9d2 	bl	5f54 <z_log_minimal_printk>
	}
	if ((SCB->CFSR & SCB_CFSR_INVPC_Msk) != 0) {
    2bb0:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2bb2:	0359      	lsls	r1, r3, #13
    2bb4:	d503      	bpl.n	2bbe <usage_fault.isra.0+0x46>
		PR_FAULT_INFO("  Illegal load of EXC_RETURN into PC");
    2bb6:	4813      	ldr	r0, [pc, #76]	; (2c04 <usage_fault.isra.0+0x8c>)
    2bb8:	2145      	movs	r1, #69	; 0x45
    2bba:	f003 f9cb 	bl	5f54 <z_log_minimal_printk>
	}
	if ((SCB->CFSR & SCB_CFSR_INVSTATE_Msk) != 0) {
    2bbe:	4c0c      	ldr	r4, [pc, #48]	; (2bf0 <usage_fault.isra.0+0x78>)
    2bc0:	6aa2      	ldr	r2, [r4, #40]	; 0x28
    2bc2:	0392      	lsls	r2, r2, #14
    2bc4:	d503      	bpl.n	2bce <usage_fault.isra.0+0x56>
		PR_FAULT_INFO("  Illegal use of the EPSR");
    2bc6:	4810      	ldr	r0, [pc, #64]	; (2c08 <usage_fault.isra.0+0x90>)
    2bc8:	2145      	movs	r1, #69	; 0x45
    2bca:	f003 f9c3 	bl	5f54 <z_log_minimal_printk>
	}
	if ((SCB->CFSR & SCB_CFSR_UNDEFINSTR_Msk) != 0) {
    2bce:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    2bd0:	03db      	lsls	r3, r3, #15
    2bd2:	d503      	bpl.n	2bdc <usage_fault.isra.0+0x64>
		PR_FAULT_INFO("  Attempt to execute undefined instruction");
    2bd4:	480d      	ldr	r0, [pc, #52]	; (2c0c <usage_fault.isra.0+0x94>)
    2bd6:	2145      	movs	r1, #69	; 0x45
    2bd8:	f003 f9bc 	bl	5f54 <z_log_minimal_printk>
	}

	/* clear UFSR sticky bits */
	SCB->CFSR |= SCB_CFSR_USGFAULTSR_Msk;
    2bdc:	4a04      	ldr	r2, [pc, #16]	; (2bf0 <usage_fault.isra.0+0x78>)
    2bde:	6a93      	ldr	r3, [r2, #40]	; 0x28
    2be0:	ea6f 4303 	mvn.w	r3, r3, lsl #16
    2be4:	ea6f 4313 	mvn.w	r3, r3, lsr #16
    2be8:	6293      	str	r3, [r2, #40]	; 0x28

	return reason;
}
    2bea:	2000      	movs	r0, #0
    2bec:	bd10      	pop	{r4, pc}
    2bee:	bf00      	nop
    2bf0:	e000ed00 	.word	0xe000ed00
    2bf4:	000097e5 	.word	0x000097e5
    2bf8:	00009802 	.word	0x00009802
    2bfc:	0000981a 	.word	0x0000981a
    2c00:	00009839 	.word	0x00009839
    2c04:	0000985c 	.word	0x0000985c
    2c08:	00009886 	.word	0x00009886
    2c0c:	000098a5 	.word	0x000098a5

00002c10 <z_arm_fault>:
 * @param callee_regs Callee-saved registers (R4-R11, PSP)
 *
 */
void z_arm_fault(uint32_t msp, uint32_t psp, uint32_t exc_return,
	_callee_saved_t *callee_regs)
{
    2c10:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
	uint32_t reason = K_ERR_CPU_EXCEPTION;
	int fault = SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk;
    2c14:	4b57      	ldr	r3, [pc, #348]	; (2d74 <z_arm_fault+0x164>)
    2c16:	f8d3 8004 	ldr.w	r8, [r3, #4]
{
    2c1a:	b08a      	sub	sp, #40	; 0x28
    2c1c:	460d      	mov	r5, r1
	int fault = SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk;
    2c1e:	f3c8 0708 	ubfx	r7, r8, #0, #9
    2c22:	2600      	movs	r6, #0
    2c24:	f386 8811 	msr	BASEPRI, r6
    2c28:	f3bf 8f6f 	isb	sy
	if ((exc_return & EXC_RETURN_INDICATOR_PREFIX) !=
    2c2c:	f002 437f 	and.w	r3, r2, #4278190080	; 0xff000000
    2c30:	f1b3 4f7f 	cmp.w	r3, #4278190080	; 0xff000000
    2c34:	d107      	bne.n	2c46 <z_arm_fault+0x36>
	if ((exc_return & EXC_RETURN_MODE_THREAD) &&
    2c36:	f002 030c 	and.w	r3, r2, #12
    2c3a:	2b08      	cmp	r3, #8
    2c3c:	d105      	bne.n	2c4a <z_arm_fault+0x3a>
		PR_EXC("SPSEL in thread mode does not indicate PSP");
    2c3e:	484e      	ldr	r0, [pc, #312]	; (2d78 <z_arm_fault+0x168>)
    2c40:	2145      	movs	r1, #69	; 0x45
    2c42:	f003 f987 	bl	5f54 <z_log_minimal_printk>
		return NULL;
    2c46:	4635      	mov	r5, r6
    2c48:	e003      	b.n	2c52 <z_arm_fault+0x42>
		if (exc_return & EXC_RETURN_MODE_THREAD) {
    2c4a:	0712      	lsls	r2, r2, #28
    2c4c:	d401      	bmi.n	2c52 <z_arm_fault+0x42>
			ptr_esf = (z_arch_esf_t *)msp;
    2c4e:	4605      	mov	r5, r0
			*nested_exc = true;
    2c50:	2601      	movs	r6, #1
	*recoverable = false;
    2c52:	2200      	movs	r2, #0
    2c54:	1ef9      	subs	r1, r7, #3
    2c56:	f88d 2007 	strb.w	r2, [sp, #7]
	switch (fault) {
    2c5a:	4614      	mov	r4, r2
    2c5c:	2909      	cmp	r1, #9
    2c5e:	d877      	bhi.n	2d50 <z_arm_fault+0x140>
    2c60:	e8df f001 	tbb	[pc, r1]
    2c64:	686f6b05 	.word	0x686f6b05
    2c68:	76767676 	.word	0x76767676
    2c6c:	7376      	.short	0x7376
	PR_FAULT_INFO("***** HARD FAULT *****");
    2c6e:	4843      	ldr	r0, [pc, #268]	; (2d7c <z_arm_fault+0x16c>)
    2c70:	2145      	movs	r1, #69	; 0x45
    2c72:	f003 f96f 	bl	5f54 <z_log_minimal_printk>
	if ((SCB->HFSR & SCB_HFSR_VECTTBL_Msk) != 0) {
    2c76:	4b3f      	ldr	r3, [pc, #252]	; (2d74 <z_arm_fault+0x164>)
	*recoverable = false;
    2c78:	f88d 4007 	strb.w	r4, [sp, #7]
	if ((SCB->HFSR & SCB_HFSR_VECTTBL_Msk) != 0) {
    2c7c:	6adc      	ldr	r4, [r3, #44]	; 0x2c
    2c7e:	f014 0402 	ands.w	r4, r4, #2
    2c82:	d005      	beq.n	2c90 <z_arm_fault+0x80>
		PR_EXC("  Bus fault on vector table read");
    2c84:	483e      	ldr	r0, [pc, #248]	; (2d80 <z_arm_fault+0x170>)
    2c86:	2145      	movs	r1, #69	; 0x45
	PR_FAULT_INFO(
    2c88:	f003 f964 	bl	5f54 <z_log_minimal_printk>
	uint32_t reason = K_ERR_CPU_EXCEPTION;
    2c8c:	2400      	movs	r4, #0
}
    2c8e:	e006      	b.n	2c9e <z_arm_fault+0x8e>
	} else if ((SCB->HFSR & SCB_HFSR_DEBUGEVT_Msk) != 0) {
    2c90:	6ada      	ldr	r2, [r3, #44]	; 0x2c
    2c92:	2a00      	cmp	r2, #0
    2c94:	da1d      	bge.n	2cd2 <z_arm_fault+0xc2>
		PR_EXC("  Debug event");
    2c96:	483b      	ldr	r0, [pc, #236]	; (2d84 <z_arm_fault+0x174>)
    2c98:	2145      	movs	r1, #69	; 0x45
    2c9a:	f003 f95b 	bl	5f54 <z_log_minimal_printk>
#ifdef CONFIG_DEBUG_COREDUMP
	z_arm_coredump_fault_sp = POINTER_TO_UINT(esf);
#endif

	reason = fault_handle(esf, fault, &recoverable);
	if (recoverable) {
    2c9e:	f89d 3007 	ldrb.w	r3, [sp, #7]
    2ca2:	b99b      	cbnz	r3, 2ccc <z_arm_fault+0xbc>
		return;
	}

	/* Copy ESF */
#if !defined(CONFIG_EXTRA_EXCEPTION_INFO)
	memcpy(&esf_copy, esf, sizeof(z_arch_esf_t));
    2ca4:	2220      	movs	r2, #32
    2ca6:	4629      	mov	r1, r5
    2ca8:	a802      	add	r0, sp, #8
    2caa:	f003 fcdf 	bl	666c <memcpy>
	/* Overwrite stacked IPSR to mark a nested exception,
	 * or a return to Thread mode. Note that this may be
	 * required, if the retrieved ESF contents are invalid
	 * due to, for instance, a stacking error.
	 */
	if (nested_exc) {
    2cae:	9b09      	ldr	r3, [sp, #36]	; 0x24
    2cb0:	2e00      	cmp	r6, #0
    2cb2:	d05a      	beq.n	2d6a <z_arm_fault+0x15a>
		if ((esf_copy.basic.xpsr & IPSR_ISR_Msk) == 0) {
    2cb4:	f3c3 0208 	ubfx	r2, r3, #0, #9
    2cb8:	b922      	cbnz	r2, 2cc4 <z_arm_fault+0xb4>
			esf_copy.basic.xpsr |= IPSR_ISR_Msk;
    2cba:	ea6f 2353 	mvn.w	r3, r3, lsr #9
    2cbe:	ea6f 2343 	mvn.w	r3, r3, lsl #9
		}
	} else {
		esf_copy.basic.xpsr &= ~(IPSR_ISR_Msk);
    2cc2:	9309      	str	r3, [sp, #36]	; 0x24
	}

	z_arm_fatal_error(reason, &esf_copy);
    2cc4:	a902      	add	r1, sp, #8
    2cc6:	4620      	mov	r0, r4
    2cc8:	f7ff fdb0 	bl	282c <z_arm_fatal_error>
}
    2ccc:	b00a      	add	sp, #40	; 0x28
    2cce:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
	} else if ((SCB->HFSR & SCB_HFSR_FORCED_Msk) != 0) {
    2cd2:	6adb      	ldr	r3, [r3, #44]	; 0x2c
    2cd4:	005b      	lsls	r3, r3, #1
    2cd6:	d5e2      	bpl.n	2c9e <z_arm_fault+0x8e>
		PR_EXC("  Fault escalation (see below)");
    2cd8:	482b      	ldr	r0, [pc, #172]	; (2d88 <z_arm_fault+0x178>)
    2cda:	2145      	movs	r1, #69	; 0x45
    2cdc:	f003 f93a 	bl	5f54 <z_log_minimal_printk>
	uint16_t fault_insn = *(ret_addr - 1);
    2ce0:	69ab      	ldr	r3, [r5, #24]
	if (((fault_insn & 0xff00) == _SVC_OPCODE) &&
    2ce2:	f833 2c02 	ldrh.w	r2, [r3, #-2]
    2ce6:	f64d 7302 	movw	r3, #57090	; 0xdf02
    2cea:	429a      	cmp	r2, r3
    2cec:	d00d      	beq.n	2d0a <z_arm_fault+0xfa>
		} else if (SCB_MMFSR != 0) {
    2cee:	f103 4360 	add.w	r3, r3, #3758096384	; 0xe0000000
    2cf2:	f603 6326 	addw	r3, r3, #3622	; 0xe26
    2cf6:	781b      	ldrb	r3, [r3, #0]
    2cf8:	b173      	cbz	r3, 2d18 <z_arm_fault+0x108>
			reason = mem_manage_fault(esf, 1, recoverable);
    2cfa:	f10d 0207 	add.w	r2, sp, #7
    2cfe:	2101      	movs	r1, #1
		reason = mem_manage_fault(esf, 0, recoverable);
    2d00:	4628      	mov	r0, r5
    2d02:	f7ff fe6f 	bl	29e4 <mem_manage_fault>
    2d06:	4604      	mov	r4, r0
		break;
    2d08:	e7c9      	b.n	2c9e <z_arm_fault+0x8e>
			PR_EXC("ARCH_EXCEPT with reason %x\n", esf->basic.r0);
    2d0a:	682a      	ldr	r2, [r5, #0]
    2d0c:	481f      	ldr	r0, [pc, #124]	; (2d8c <z_arm_fault+0x17c>)
    2d0e:	2145      	movs	r1, #69	; 0x45
    2d10:	f003 f920 	bl	5f54 <z_log_minimal_printk>
			reason = esf->basic.r0;
    2d14:	682c      	ldr	r4, [r5, #0]
    2d16:	e7c2      	b.n	2c9e <z_arm_fault+0x8e>
		} else if (SCB_BFSR != 0) {
    2d18:	4b1d      	ldr	r3, [pc, #116]	; (2d90 <z_arm_fault+0x180>)
    2d1a:	781b      	ldrb	r3, [r3, #0]
    2d1c:	b12b      	cbz	r3, 2d2a <z_arm_fault+0x11a>
			reason = bus_fault(esf, 1, recoverable);
    2d1e:	f10d 0107 	add.w	r1, sp, #7
    2d22:	2001      	movs	r0, #1
		reason = bus_fault(esf, 0, recoverable);
    2d24:	f7ff fece 	bl	2ac4 <bus_fault.isra.0>
    2d28:	e7ed      	b.n	2d06 <z_arm_fault+0xf6>
		} else if (SCB_UFSR != 0) {
    2d2a:	4b1a      	ldr	r3, [pc, #104]	; (2d94 <z_arm_fault+0x184>)
    2d2c:	881b      	ldrh	r3, [r3, #0]
    2d2e:	b29b      	uxth	r3, r3
    2d30:	2b00      	cmp	r3, #0
    2d32:	d0b4      	beq.n	2c9e <z_arm_fault+0x8e>
		reason = usage_fault(esf);
    2d34:	f7ff ff20 	bl	2b78 <usage_fault.isra.0>
    2d38:	e7e5      	b.n	2d06 <z_arm_fault+0xf6>
		reason = mem_manage_fault(esf, 0, recoverable);
    2d3a:	f10d 0207 	add.w	r2, sp, #7
    2d3e:	2100      	movs	r1, #0
    2d40:	e7de      	b.n	2d00 <z_arm_fault+0xf0>
		reason = bus_fault(esf, 0, recoverable);
    2d42:	f10d 0107 	add.w	r1, sp, #7
    2d46:	2000      	movs	r0, #0
    2d48:	e7ec      	b.n	2d24 <z_arm_fault+0x114>
	PR_FAULT_INFO(
    2d4a:	4813      	ldr	r0, [pc, #76]	; (2d98 <z_arm_fault+0x188>)
    2d4c:	2145      	movs	r1, #69	; 0x45
    2d4e:	e79b      	b.n	2c88 <z_arm_fault+0x78>
	PR_FAULT_INFO("***** %s %d) *****",
    2d50:	4912      	ldr	r1, [pc, #72]	; (2d9c <z_arm_fault+0x18c>)
    2d52:	4a13      	ldr	r2, [pc, #76]	; (2da0 <z_arm_fault+0x190>)
    2d54:	4813      	ldr	r0, [pc, #76]	; (2da4 <z_arm_fault+0x194>)
    2d56:	f418 7ff8 	tst.w	r8, #496	; 0x1f0
    2d5a:	bf08      	it	eq
    2d5c:	460a      	moveq	r2, r1
    2d5e:	f1a7 0310 	sub.w	r3, r7, #16
    2d62:	2145      	movs	r1, #69	; 0x45
    2d64:	f003 f8f6 	bl	5f54 <z_log_minimal_printk>
    2d68:	e790      	b.n	2c8c <z_arm_fault+0x7c>
		esf_copy.basic.xpsr &= ~(IPSR_ISR_Msk);
    2d6a:	f423 73ff 	bic.w	r3, r3, #510	; 0x1fe
    2d6e:	f023 0301 	bic.w	r3, r3, #1
    2d72:	e7a6      	b.n	2cc2 <z_arm_fault+0xb2>
    2d74:	e000ed00 	.word	0xe000ed00
    2d78:	00009903 	.word	0x00009903
    2d7c:	00009933 	.word	0x00009933
    2d80:	0000994f 	.word	0x0000994f
    2d84:	00009975 	.word	0x00009975
    2d88:	00009988 	.word	0x00009988
    2d8c:	000099ac 	.word	0x000099ac
    2d90:	e000ed29 	.word	0xe000ed29
    2d94:	e000ed2a 	.word	0xe000ed2a
    2d98:	000099cd 	.word	0x000099cd
    2d9c:	000098d5 	.word	0x000098d5
    2da0:	000098ea 	.word	0x000098ea
    2da4:	000099f6 	.word	0x000099f6

00002da8 <z_arm_fault_init>:
 */
void z_arm_fault_init(void)
{
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	SCB->CCR |= SCB_CCR_DIV_0_TRP_Msk;
    2da8:	4a02      	ldr	r2, [pc, #8]	; (2db4 <z_arm_fault_init+0xc>)
    2daa:	6953      	ldr	r3, [r2, #20]
    2dac:	f043 0310 	orr.w	r3, r3, #16
    2db0:	6153      	str	r3, [r2, #20]
	 * Stack to attempt to descend into secure region, in which case a
	 * Secure Hard Fault will occur and we can track the fault from there.
	 */
	SCB->CCR |= SCB_CCR_STKOFHFNMIGN_Msk;
#endif /* CONFIG_BUILTIN_STACK_GUARD */
}
    2db2:	4770      	bx	lr
    2db4:	e000ed00 	.word	0xe000ed00

00002db8 <z_arm_bus_fault>:
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
SECTION_SUBSEC_FUNC(TEXT,__fault,z_arm_exc_spurious)

	mrs r0, MSP
    2db8:	f3ef 8008 	mrs	r0, MSP
	mrs r1, PSP
    2dbc:	f3ef 8109 	mrs	r1, PSP
	push {r0, lr}
    2dc0:	b501      	push	{r0, lr}
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	push {r4-r11}
#endif
	mov  r3, sp /* pointer to _callee_saved_t */
#endif /* CONFIG_EXTRA_EXCEPTION_INFO */
	mov r2, lr /* EXC_RETURN */
    2dc2:	4672      	mov	r2, lr
	bl z_arm_fault
    2dc4:	f7ff ff24 	bl	2c10 <z_arm_fault>
	 * in this routine. Therefore, we can just reset
	 * the MSP to its value prior to entering the function
	 */
	add sp, #40
#endif
	pop {r0, pc}
    2dc8:	bd01      	pop	{r0, pc}
    2dca:	bf00      	nop

00002dcc <z_arm_interrupt_init>:
    2dcc:	4804      	ldr	r0, [pc, #16]	; (2de0 <z_arm_interrupt_init+0x14>)
 * @return N/A
 */

void z_arm_interrupt_init(void)
{
	int irq = 0;
    2dce:	2300      	movs	r3, #0
    2dd0:	2120      	movs	r1, #32
    2dd2:	18c2      	adds	r2, r0, r3

	for (; irq < CONFIG_NUM_IRQS; irq++) {
    2dd4:	3301      	adds	r3, #1
    2dd6:	2b27      	cmp	r3, #39	; 0x27
    2dd8:	f882 1300 	strb.w	r1, [r2, #768]	; 0x300
    2ddc:	d1f9      	bne.n	2dd2 <z_arm_interrupt_init+0x6>
		NVIC_SetPriority((IRQn_Type)irq, _IRQ_PRIO_OFFSET);
	}
}
    2dde:	4770      	bx	lr
    2de0:	e000e100 	.word	0xe000e100

00002de4 <__start>:
 */
SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)

#if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)
    /* Reset CONTROL register */
    movs.n r0, #0
    2de4:	2000      	movs	r0, #0
    msr CONTROL, r0
    2de6:	f380 8814 	msr	CONTROL, r0
    isb
    2dea:	f3bf 8f6f 	isb	sy
#endif /* CONFIG_CPU_CORTEX_M_HAS_SPLIM */

#endif /* CONFIG_INIT_ARCH_HW_AT_BOOT */

#if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
    bl z_arm_platform_init
    2dee:	f005 fd43 	bl	8878 <z_arm_platform_init>
#endif

#if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)
#if defined(CONFIG_CPU_HAS_ARM_MPU)
    /* Disable MPU */
    movs.n r0, #0
    2df2:	2000      	movs	r0, #0
    ldr r1, =_SCS_MPU_CTRL
    2df4:	490d      	ldr	r1, [pc, #52]	; (2e2c <__start+0x48>)
    str r0, [r1]
    2df6:	6008      	str	r0, [r1, #0]
    dsb
    2df8:	f3bf 8f4f 	dsb	sy
#endif /* CONFIG_CPU_HAS_ARM_MPU */
    ldr r0, =z_main_stack + CONFIG_MAIN_STACK_SIZE
    2dfc:	480c      	ldr	r0, [pc, #48]	; (2e30 <__start+0x4c>)
    msr msp, r0
    2dfe:	f380 8808 	msr	MSP, r0

    /* Initialize core architecture registers and system blocks */
    bl z_arm_init_arch_hw_at_boot
    2e02:	f000 f829 	bl	2e58 <z_arm_init_arch_hw_at_boot>

    /* lock interrupts: will get unlocked when switch to main task */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
    cpsid i
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    movs.n r0, #_EXC_IRQ_DEFAULT_PRIO
    2e06:	2020      	movs	r0, #32
    msr BASEPRI, r0
    2e08:	f380 8811 	msr	BASEPRI, r0

    /*
     * Set PSP and use it to boot without using MSP, so that it
     * gets set to z_interrupt_stacks during initialization.
     */
    ldr r0, =z_interrupt_stacks
    2e0c:	4809      	ldr	r0, [pc, #36]	; (2e34 <__start+0x50>)
    ldr r1, =CONFIG_ISR_STACK_SIZE + MPU_GUARD_ALIGN_AND_SIZE
    2e0e:	f44f 6102 	mov.w	r1, #2080	; 0x820
    adds r0, r0, r1
    2e12:	1840      	adds	r0, r0, r1
    msr PSP, r0
    2e14:	f380 8809 	msr	PSP, r0
    mrs r0, CONTROL
    2e18:	f3ef 8014 	mrs	r0, CONTROL
    movs r1, #2
    2e1c:	2102      	movs	r1, #2
    orrs r0, r1 /* CONTROL_SPSEL_Msk */
    2e1e:	4308      	orrs	r0, r1
    msr CONTROL, r0
    2e20:	f380 8814 	msr	CONTROL, r0
    /*
     * When changing the stack pointer, software must use an ISB instruction
     * immediately after the MSR instruction. This ensures that instructions
     * after the ISB instruction execute using the new stack pointer.
     */
    isb
    2e24:	f3bf 8f6f 	isb	sy
    /*
     * 'bl' jumps the furthest of the branch instructions that are
     * supported on all platforms. So it is used when jumping to z_arm_prep_c
     * (even though we do not intend to return).
     */
    bl z_arm_prep_c
    2e28:	f7ff fd68 	bl	28fc <z_arm_prep_c>
    ldr r1, =_SCS_MPU_CTRL
    2e2c:	e000ed94 	.word	0xe000ed94
    ldr r0, =z_main_stack + CONFIG_MAIN_STACK_SIZE
    2e30:	20005d60 	.word	0x20005d60
    ldr r0, =z_interrupt_stacks
    2e34:	20005d80 	.word	0x20005d80

00002e38 <z_arm_clear_arm_mpu_config>:
void z_arm_clear_arm_mpu_config(void)
{
	int i;

	int num_regions =
		((MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos);
    2e38:	4a06      	ldr	r2, [pc, #24]	; (2e54 <z_arm_clear_arm_mpu_config+0x1c>)
    2e3a:	6811      	ldr	r1, [r2, #0]

	for (i = 0; i < num_regions; i++) {
    2e3c:	2300      	movs	r3, #0
	int num_regions =
    2e3e:	f3c1 2107 	ubfx	r1, r1, #8, #8
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
{
  MPU->RNR = rnr;
  MPU->RASR = 0U;
    2e42:	4618      	mov	r0, r3
	for (i = 0; i < num_regions; i++) {
    2e44:	428b      	cmp	r3, r1
    2e46:	d100      	bne.n	2e4a <z_arm_clear_arm_mpu_config+0x12>
		ARM_MPU_ClrRegion(i);
	}
}
    2e48:	4770      	bx	lr
  MPU->RNR = rnr;
    2e4a:	6093      	str	r3, [r2, #8]
  MPU->RASR = 0U;
    2e4c:	6110      	str	r0, [r2, #16]
	for (i = 0; i < num_regions; i++) {
    2e4e:	3301      	adds	r3, #1
    2e50:	e7f8      	b.n	2e44 <z_arm_clear_arm_mpu_config+0xc>
    2e52:	bf00      	nop
    2e54:	e000ed90 	.word	0xe000ed90

00002e58 <z_arm_init_arch_hw_at_boot>:
 * components and core registers.
 *
 * @return N/A
 */
void z_arm_init_arch_hw_at_boot(void)
{
    2e58:	b508      	push	{r3, lr}
  __ASM volatile ("cpsid i" : : : "memory");
    2e5a:	b672      	cpsid	i
  \details Assigns the given value to the Fault Mask register.
  \param [in]    faultMask  Fault Mask value to set
 */
__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
{
  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
    2e5c:	2300      	movs	r3, #0
    2e5e:	f383 8813 	msr	FAULTMASK, r3

	/* Initialize System Control Block components */

#if defined(CONFIG_CPU_HAS_ARM_MPU) || defined(CONFIG_CPU_HAS_NXP_MPU)
	/* Clear MPU region configuration */
	z_arm_clear_arm_mpu_config();
    2e62:	f7ff ffe9 	bl	2e38 <z_arm_clear_arm_mpu_config>
#endif /* CONFIG_CPU_HAS_ARM_MPU */

	/* Disable NVIC interrupts */
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {
		NVIC->ICER[i] = 0xFFFFFFFF;
    2e66:	4b14      	ldr	r3, [pc, #80]	; (2eb8 <z_arm_init_arch_hw_at_boot+0x60>)
    2e68:	f04f 32ff 	mov.w	r2, #4294967295
    2e6c:	f8c3 2080 	str.w	r2, [r3, #128]	; 0x80
    2e70:	f8c3 2084 	str.w	r2, [r3, #132]	; 0x84
    2e74:	f8c3 2088 	str.w	r2, [r3, #136]	; 0x88
    2e78:	f8c3 208c 	str.w	r2, [r3, #140]	; 0x8c
    2e7c:	f8c3 2090 	str.w	r2, [r3, #144]	; 0x90
    2e80:	f8c3 2094 	str.w	r2, [r3, #148]	; 0x94
    2e84:	f8c3 2098 	str.w	r2, [r3, #152]	; 0x98
    2e88:	f8c3 209c 	str.w	r2, [r3, #156]	; 0x9c
	}
	/* Clear pending NVIC interrupts */
	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICPR); i++) {
		NVIC->ICPR[i] = 0xFFFFFFFF;
    2e8c:	f8c3 2180 	str.w	r2, [r3, #384]	; 0x180
    2e90:	f8c3 2184 	str.w	r2, [r3, #388]	; 0x184
    2e94:	f8c3 2188 	str.w	r2, [r3, #392]	; 0x188
    2e98:	f8c3 218c 	str.w	r2, [r3, #396]	; 0x18c
    2e9c:	f8c3 2190 	str.w	r2, [r3, #400]	; 0x190
    2ea0:	f8c3 2194 	str.w	r2, [r3, #404]	; 0x194
    2ea4:	f8c3 2198 	str.w	r2, [r3, #408]	; 0x198
    2ea8:	f8c3 219c 	str.w	r2, [r3, #412]	; 0x19c
  __ASM volatile ("cpsie i" : : : "memory");
    2eac:	b662      	cpsie	i
  __ASM volatile ("dsb 0xF":::"memory");
    2eae:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("isb 0xF":::"memory");
    2eb2:	f3bf 8f6f 	isb	sy
	/* Restore Interrupts */
	__enable_irq();

	__DSB();
	__ISB();
}
    2eb6:	bd08      	pop	{r3, pc}
    2eb8:	e000e100 	.word	0xe000e100

00002ebc <z_arm_configure_static_mpu_regions>:
	/* Configure the static MPU regions within firmware SRAM boundaries.
	 * Start address of the image is given by _image_ram_start. The end
	 * of the firmware SRAM area is marked by __kernel_ram_end, taking
	 * into account the unused SRAM area, as well.
	 */
	arm_core_mpu_configure_static_mpu_regions(static_regions,
    2ebc:	4b02      	ldr	r3, [pc, #8]	; (2ec8 <z_arm_configure_static_mpu_regions+0xc>)
    2ebe:	4a03      	ldr	r2, [pc, #12]	; (2ecc <z_arm_configure_static_mpu_regions+0x10>)
    2ec0:	4803      	ldr	r0, [pc, #12]	; (2ed0 <z_arm_configure_static_mpu_regions+0x14>)
    2ec2:	2102      	movs	r1, #2
    2ec4:	f000 b864 	b.w	2f90 <arm_core_mpu_configure_static_mpu_regions>
    2ec8:	20010000 	.word	0x20010000
    2ecc:	20000000 	.word	0x20000000
    2ed0:	00008b94 	.word	0x00008b94

00002ed4 <mpu_configure_regions>:
 * sanity check of the memory regions to be programmed.
 */
static int mpu_configure_regions(const struct z_arm_mpu_partition
	regions[], uint8_t regions_num, uint8_t start_reg_index,
	bool do_sanity_check)
{
    2ed4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
#endif /* CPU_CORTEX_M0PLUS | CPU_CORTEX_M3 | CPU_CORTEX_M4 */
}

static inline void set_region_number(uint32_t index)
{
	MPU->RNR = index;
    2ed6:	4f22      	ldr	r7, [pc, #136]	; (2f60 <mpu_configure_regions+0x8c>)
	int i;
	int reg_index = start_reg_index;
    2ed8:	4615      	mov	r5, r2

	for (i = 0; i < regions_num; i++) {
    2eda:	2200      	movs	r2, #0
    2edc:	428a      	cmp	r2, r1
    2ede:	da0e      	bge.n	2efe <mpu_configure_regions+0x2a>
		if (regions[i].size == 0U) {
    2ee0:	6844      	ldr	r4, [r0, #4]
    2ee2:	2c00      	cmp	r4, #0
    2ee4:	d039      	beq.n	2f5a <mpu_configure_regions+0x86>
			continue;
		}
		/* Non-empty region. */

		if (do_sanity_check &&
    2ee6:	b193      	cbz	r3, 2f0e <mpu_configure_regions+0x3a>
	 * and greater or equal to the minimum
	 * MPU region size. Start address of the
	 * partition must align with size.
	 */
	int partition_is_valid =
		((part->size & (part->size - 1U)) == 0U)
    2ee8:	f104 3cff 	add.w	ip, r4, #4294967295
		&&
		(part->size >= CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE)
		&&
    2eec:	ea14 0f0c 	tst.w	r4, ip
    2ef0:	d007      	beq.n	2f02 <mpu_configure_regions+0x2e>
				(!mpu_partition_is_valid(&regions[i]))) {
			LOG_ERR("Partition %u: sanity check failed.", i);
    2ef2:	481c      	ldr	r0, [pc, #112]	; (2f64 <mpu_configure_regions+0x90>)
    2ef4:	2145      	movs	r1, #69	; 0x45
		LOG_ERR("Failed to allocate new MPU region %u\n", index);
    2ef6:	f003 f82d 	bl	5f54 <z_log_minimal_printk>
			return -EINVAL;
		}

		reg_index = mpu_configure_region(reg_index, &regions[i]);
    2efa:	f06f 0515 	mvn.w	r5, #21
		/* Increment number of programmed MPU indices. */
		reg_index++;
	}

	return reg_index;
}
    2efe:	4628      	mov	r0, r5
    2f00:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
		&&
    2f02:	2c1f      	cmp	r4, #31
    2f04:	d9f5      	bls.n	2ef2 <mpu_configure_regions+0x1e>
		((part->start & (part->size - 1U)) == 0U);
    2f06:	6806      	ldr	r6, [r0, #0]
		&&
    2f08:	ea1c 0f06 	tst.w	ip, r6
    2f0c:	d1f1      	bne.n	2ef2 <mpu_configure_regions+0x1e>
 * to that power-of-two value.
 */
static inline uint32_t size_to_mpu_rasr_size(uint32_t size)
{
	/* The minimal supported region size is 32 bytes */
	if (size <= 32U) {
    2f0e:	2c20      	cmp	r4, #32
	region_conf.base = new_region->start;
    2f10:	6806      	ldr	r6, [r0, #0]
	get_region_attr_from_mpu_partition_info(&region_conf.attr,
    2f12:	f8d0 c008 	ldr.w	ip, [r0, #8]
		reg_index = mpu_configure_region(reg_index, &regions[i]);
    2f16:	b2ed      	uxtb	r5, r5
    2f18:	d910      	bls.n	2f3c <mpu_configure_regions+0x68>
	/*
	 * A size value greater than 2^31 could not be handled by
	 * round_up_to_next_power_of_two() properly. We handle
	 * it separately here.
	 */
	if (size > (1UL << 31)) {
    2f1a:	f1b4 4f00 	cmp.w	r4, #2147483648	; 0x80000000
    2f1e:	d80f      	bhi.n	2f40 <mpu_configure_regions+0x6c>
		return REGION_4G;
	}

	return ((32 - __builtin_clz(size - 1U) - 2 + 1) << MPU_RASR_SIZE_Pos) &
    2f20:	3c01      	subs	r4, #1
    2f22:	fab4 f484 	clz	r4, r4
    2f26:	f1c4 041f 	rsb	r4, r4, #31
    2f2a:	0064      	lsls	r4, r4, #1
	if (index > (get_num_regions() - 1U)) {
    2f2c:	2d07      	cmp	r5, #7
#if defined(CONFIG_CPU_CORTEX_R)
	(void) size;

	p_attr->rasr = attr->rasr_attr;
#else
	p_attr->rasr = attr->rasr_attr | size_to_mpu_rasr_size(size);
    2f2e:	ea4c 0404 	orr.w	r4, ip, r4
    2f32:	d907      	bls.n	2f44 <mpu_configure_regions+0x70>
		LOG_ERR("Failed to allocate new MPU region %u\n", index);
    2f34:	480c      	ldr	r0, [pc, #48]	; (2f68 <mpu_configure_regions+0x94>)
    2f36:	462a      	mov	r2, r5
    2f38:	2145      	movs	r1, #69	; 0x45
    2f3a:	e7dc      	b.n	2ef6 <mpu_configure_regions+0x22>
		return REGION_32B;
    2f3c:	2408      	movs	r4, #8
    2f3e:	e7f5      	b.n	2f2c <mpu_configure_regions+0x58>
		return REGION_4G;
    2f40:	243e      	movs	r4, #62	; 0x3e
    2f42:	e7f3      	b.n	2f2c <mpu_configure_regions+0x58>
	MPU->RBAR = (region_conf->base & MPU_RBAR_ADDR_Msk)
    2f44:	f026 061f 	bic.w	r6, r6, #31
				| MPU_RBAR_VALID_Msk | index;
    2f48:	432e      	orrs	r6, r5
    2f4a:	f046 0610 	orr.w	r6, r6, #16
	MPU->RASR = region_conf->attr.rasr | MPU_RASR_ENABLE_Msk;
    2f4e:	f044 0401 	orr.w	r4, r4, #1
    2f52:	60bd      	str	r5, [r7, #8]
	MPU->RBAR = (region_conf->base & MPU_RBAR_ADDR_Msk)
    2f54:	60fe      	str	r6, [r7, #12]
		reg_index++;
    2f56:	3501      	adds	r5, #1
	MPU->RASR = region_conf->attr.rasr | MPU_RASR_ENABLE_Msk;
    2f58:	613c      	str	r4, [r7, #16]
	for (i = 0; i < regions_num; i++) {
    2f5a:	3201      	adds	r2, #1
    2f5c:	300c      	adds	r0, #12
    2f5e:	e7bd      	b.n	2edc <mpu_configure_regions+0x8>
    2f60:	e000ed90 	.word	0xe000ed90
    2f64:	00009a12 	.word	0x00009a12
    2f68:	00009a3a 	.word	0x00009a3a

00002f6c <arm_core_mpu_enable>:
void arm_core_mpu_enable(void)
{
	/* Enable MPU and use the default memory map as a
	 * background region for privileged software access.
	 */
	MPU->CTRL = MPU_CTRL_ENABLE_Msk | MPU_CTRL_PRIVDEFENA_Msk;
    2f6c:	4b03      	ldr	r3, [pc, #12]	; (2f7c <arm_core_mpu_enable+0x10>)
    2f6e:	2205      	movs	r2, #5
    2f70:	605a      	str	r2, [r3, #4]
  __ASM volatile ("dsb 0xF":::"memory");
    2f72:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("isb 0xF":::"memory");
    2f76:	f3bf 8f6f 	isb	sy

	/* Make sure that all the registers are set before proceeding */
	__DSB();
	__ISB();
}
    2f7a:	4770      	bx	lr
    2f7c:	e000ed90 	.word	0xe000ed90

00002f80 <arm_core_mpu_disable>:
  __ASM volatile ("dmb 0xF":::"memory");
    2f80:	f3bf 8f5f 	dmb	sy
{
	/* Force any outstanding transfers to complete before disabling MPU */
	__DMB();

	/* Disable MPU */
	MPU->CTRL = 0;
    2f84:	4b01      	ldr	r3, [pc, #4]	; (2f8c <arm_core_mpu_disable+0xc>)
    2f86:	2200      	movs	r2, #0
    2f88:	605a      	str	r2, [r3, #4]
}
    2f8a:	4770      	bx	lr
    2f8c:	e000ed90 	.word	0xe000ed90

00002f90 <arm_core_mpu_configure_static_mpu_regions>:
 * @brief configure fixed (static) MPU regions.
 */
void arm_core_mpu_configure_static_mpu_regions(const struct z_arm_mpu_partition
	static_regions[], const uint8_t regions_num,
	const uint32_t background_area_start, const uint32_t background_area_end)
{
    2f90:	b510      	push	{r4, lr}
static int mpu_configure_static_mpu_regions(const struct z_arm_mpu_partition
	static_regions[], const uint8_t regions_num,
	const uint32_t background_area_base,
	const uint32_t background_area_end)
{
	int mpu_reg_index = static_regions_num;
    2f92:	4c03      	ldr	r4, [pc, #12]	; (2fa0 <arm_core_mpu_configure_static_mpu_regions+0x10>)
	 * programmed on top of SRAM region configuration.
	 */
	ARG_UNUSED(background_area_base);
	ARG_UNUSED(background_area_end);

	mpu_reg_index = mpu_configure_regions(static_regions,
    2f94:	2301      	movs	r3, #1
    2f96:	7822      	ldrb	r2, [r4, #0]
    2f98:	f7ff ff9c 	bl	2ed4 <mpu_configure_regions>
		regions_num, mpu_reg_index, true);

	static_regions_num = mpu_reg_index;
    2f9c:	7020      	strb	r0, [r4, #0]
					       background_area_start, background_area_end) == -EINVAL) {

		__ASSERT(0, "Configuring %u static MPU regions failed\n",
			regions_num);
	}
}
    2f9e:	bd10      	pop	{r4, pc}
    2fa0:	20003118 	.word	0x20003118

00002fa4 <z_arm_mpu_init>:
 */
int z_arm_mpu_init(void)
{
	uint32_t r_index;

	if (mpu_config.num_regions > get_num_regions()) {
    2fa4:	4913      	ldr	r1, [pc, #76]	; (2ff4 <z_arm_mpu_init+0x50>)
    2fa6:	6808      	ldr	r0, [r1, #0]
    2fa8:	2808      	cmp	r0, #8
{
    2faa:	b510      	push	{r4, lr}
	if (mpu_config.num_regions > get_num_regions()) {
    2fac:	d81e      	bhi.n	2fec <z_arm_mpu_init+0x48>
		return -1;
	}

	LOG_DBG("total region count: %d", get_num_regions());

	arm_core_mpu_disable();
    2fae:	f7ff ffe7 	bl	2f80 <arm_core_mpu_disable>
    2fb2:	4c11      	ldr	r4, [pc, #68]	; (2ff8 <z_arm_mpu_init+0x54>)
    2fb4:	6849      	ldr	r1, [r1, #4]

	/* Architecture-specific configuration */
	mpu_init();

	/* Program fixed regions configured at SOC definition. */
	for (r_index = 0U; r_index < mpu_config.num_regions; r_index++) {
    2fb6:	2200      	movs	r2, #0
    2fb8:	4290      	cmp	r0, r2
    2fba:	f101 010c 	add.w	r1, r1, #12
    2fbe:	d105      	bne.n	2fcc <z_arm_mpu_init+0x28>
		region_init(r_index, &mpu_config.mpu_regions[r_index]);
	}

	/* Update the number of programmed MPU regions. */
	static_regions_num = mpu_config.num_regions;
    2fc0:	4b0e      	ldr	r3, [pc, #56]	; (2ffc <z_arm_mpu_init+0x58>)
    2fc2:	7018      	strb	r0, [r3, #0]


	arm_core_mpu_enable();
    2fc4:	f7ff ffd2 	bl	2f6c <arm_core_mpu_enable>
		(MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos ==
		NUM_MPU_REGIONS,
		"Invalid number of MPU regions\n");
#endif /* CORTEX_M0PLUS || CPU_CORTEX_M3 || CPU_CORTEX_M4 */

	return 0;
    2fc8:	2000      	movs	r0, #0
}
    2fca:	bd10      	pop	{r4, pc}
    2fcc:	60a2      	str	r2, [r4, #8]
	MPU->RBAR = (region_conf->base & MPU_RBAR_ADDR_Msk)
    2fce:	f851 3c0c 	ldr.w	r3, [r1, #-12]
    2fd2:	f023 031f 	bic.w	r3, r3, #31
				| MPU_RBAR_VALID_Msk | index;
    2fd6:	4313      	orrs	r3, r2
    2fd8:	f043 0310 	orr.w	r3, r3, #16
	MPU->RBAR = (region_conf->base & MPU_RBAR_ADDR_Msk)
    2fdc:	60e3      	str	r3, [r4, #12]
	MPU->RASR = region_conf->attr.rasr | MPU_RASR_ENABLE_Msk;
    2fde:	f851 3c04 	ldr.w	r3, [r1, #-4]
    2fe2:	f043 0301 	orr.w	r3, r3, #1
    2fe6:	6123      	str	r3, [r4, #16]
	for (r_index = 0U; r_index < mpu_config.num_regions; r_index++) {
    2fe8:	3201      	adds	r2, #1
    2fea:	e7e5      	b.n	2fb8 <z_arm_mpu_init+0x14>
		return -1;
    2fec:	f04f 30ff 	mov.w	r0, #4294967295
    2ff0:	e7eb      	b.n	2fca <z_arm_mpu_init+0x26>
    2ff2:	bf00      	nop
    2ff4:	00008bac 	.word	0x00008bac
    2ff8:	e000ed90 	.word	0xe000ed90
    2ffc:	20003118 	.word	0x20003118

00003000 <__stdout_hook_install>:

static int (*_stdout_hook)(int) = _stdout_hook_default;

void __stdout_hook_install(int (*hook)(int))
{
	_stdout_hook = hook;
    3000:	4b01      	ldr	r3, [pc, #4]	; (3008 <__stdout_hook_install+0x8>)
    3002:	6018      	str	r0, [r3, #0]
}
    3004:	4770      	bx	lr
    3006:	bf00      	nop
    3008:	20000028 	.word	0x20000028

0000300c <nordicsemi_nrf52_init>:
	__asm__ volatile(
    300c:	f04f 0320 	mov.w	r3, #32
    3010:	f3ef 8211 	mrs	r2, BASEPRI
    3014:	f383 8812 	msr	BASEPRI_MAX, r3
    3018:	f3bf 8f6f 	isb	sy

	key = irq_lock();

#ifdef CONFIG_NRF_ENABLE_ICACHE
	/* Enable the instruction cache */
	NRF_NVMC->ICACHECNF = NVMC_ICACHECNF_CACHEEN_Msk;
    301c:	4906      	ldr	r1, [pc, #24]	; (3038 <nordicsemi_nrf52_init+0x2c>)
    301e:	2301      	movs	r3, #1
    3020:	f8c1 3540 	str.w	r3, [r1, #1344]	; 0x540
#endif

#if NRF_POWER_HAS_DCDCEN
NRF_STATIC_INLINE void nrf_power_dcdcen_set(NRF_POWER_Type * p_reg, bool enable)
{
    p_reg->DCDCEN = (enable ? POWER_DCDCEN_DCDCEN_Enabled : POWER_DCDCEN_DCDCEN_Disabled) <<
    3024:	f04f 4180 	mov.w	r1, #1073741824	; 0x40000000
    3028:	f8c1 3578 	str.w	r3, [r1, #1400]	; 0x578
	__asm__ volatile(
    302c:	f382 8811 	msr	BASEPRI, r2
    3030:	f3bf 8f6f 	isb	sy
	NMI_INIT();

	irq_unlock(key);

	return 0;
}
    3034:	2000      	movs	r0, #0
    3036:	4770      	bx	lr
    3038:	4001e000 	.word	0x4001e000

0000303c <sys_arch_reboot>:
    *p_gpregret = val;
    303c:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    3040:	b2c0      	uxtb	r0, r0
    3042:	f8c3 051c 	str.w	r0, [r3, #1308]	; 0x51c
  __ASM volatile ("dsb 0xF":::"memory");
    3046:	f3bf 8f4f 	dsb	sy
__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
{
  __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                       buffered write are completed before reset */
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
    304a:	4905      	ldr	r1, [pc, #20]	; (3060 <sys_arch_reboot+0x24>)
    304c:	4b05      	ldr	r3, [pc, #20]	; (3064 <sys_arch_reboot+0x28>)
    304e:	68ca      	ldr	r2, [r1, #12]
    3050:	f402 62e0 	and.w	r2, r2, #1792	; 0x700
    3054:	4313      	orrs	r3, r2
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
    3056:	60cb      	str	r3, [r1, #12]
    3058:	f3bf 8f4f 	dsb	sy
                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
  __DSB();                                                          /* Ensure completion of memory access */

  for(;;)                                                           /* wait until reset */
  {
    __NOP();
    305c:	bf00      	nop
  for(;;)                                                           /* wait until reset */
    305e:	e7fd      	b.n	305c <sys_arch_reboot+0x20>
    3060:	e000ed00 	.word	0xe000ed00
    3064:	05fa0004 	.word	0x05fa0004

00003068 <arch_busy_wait>:

#else // NRFX_CHECK(NRFX_DELAY_DWT_BASED)

NRF_STATIC_INLINE void nrfx_coredep_delay_us(uint32_t time_us)
{
    if (time_us == 0)
    3068:	b120      	cbz	r0, 3074 <arch_busy_wait+0xc>
    };

    typedef void (* delay_func_t)(uint32_t);
    const delay_func_t delay_cycles =
        // Set LSB to 1 to execute the code in the Thumb mode.
        (delay_func_t)((((uint32_t)delay_machine_code) | 1));
    306a:	4b03      	ldr	r3, [pc, #12]	; (3078 <arch_busy_wait+0x10>)
    uint32_t cycles = time_us * NRFX_DELAY_CPU_FREQ_MHZ;
    delay_cycles(cycles);
    306c:	0180      	lsls	r0, r0, #6
    306e:	f043 0301 	orr.w	r3, r3, #1
    3072:	4718      	bx	r3

void arch_busy_wait(uint32_t time_us)
{
	nrfx_coredep_delay_us(time_us);
}
    3074:	4770      	bx	lr
    3076:	bf00      	nop
    3078:	00008b00 	.word	0x00008b00

0000307c <onoff_stop>:
	return (clock_control_subsys_t)offset;
}

static void onoff_stop(struct onoff_manager *mgr,
			onoff_notify_fn notify)
{
    307c:	b570      	push	{r4, r5, r6, lr}
    307e:	4604      	mov	r4, r0
	size_t offset = (size_t)(mgr - data->mgr);
    3080:	480d      	ldr	r0, [pc, #52]	; (30b8 <onoff_stop+0x3c>)
    3082:	1a23      	subs	r3, r4, r0
    3084:	109a      	asrs	r2, r3, #2
    3086:	4b0d      	ldr	r3, [pc, #52]	; (30bc <onoff_stop+0x40>)
    3088:	4353      	muls	r3, r2
    308a:	b2db      	uxtb	r3, r3
	err = set_off_state(&subdata->flags, ctx);
    308c:	250c      	movs	r5, #12
    308e:	435d      	muls	r5, r3
    3090:	f105 0340 	add.w	r3, r5, #64	; 0x40
{
    3094:	460e      	mov	r6, r1
	err = set_off_state(&subdata->flags, ctx);
    3096:	4418      	add	r0, r3
    3098:	2140      	movs	r1, #64	; 0x40
    309a:	f003 fb07 	bl	66ac <set_off_state>
	if (err < 0) {
    309e:	1e01      	subs	r1, r0, #0
    30a0:	db04      	blt.n	30ac <onoff_stop+0x30>
	get_sub_config(dev, type)->stop();
    30a2:	4b07      	ldr	r3, [pc, #28]	; (30c0 <onoff_stop+0x44>)
    30a4:	442b      	add	r3, r5
    30a6:	685b      	ldr	r3, [r3, #4]
    30a8:	4798      	blx	r3
	return 0;
    30aa:	2100      	movs	r1, #0
	int res;

	res = stop(CLOCK_DEVICE, get_subsys(mgr), CTX_ONOFF);
	notify(mgr, res);
    30ac:	4620      	mov	r0, r4
    30ae:	4633      	mov	r3, r6
}
    30b0:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
	notify(mgr, res);
    30b4:	4718      	bx	r3
    30b6:	bf00      	nop
    30b8:	20001254 	.word	0x20001254
    30bc:	b6db6db7 	.word	0xb6db6db7
    30c0:	00008be4 	.word	0x00008be4

000030c4 <onoff_start>:
	notify(mgr, 0);
}

static void onoff_start(struct onoff_manager *mgr,
			onoff_notify_fn notify)
{
    30c4:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
	size_t offset = (size_t)(mgr - data->mgr);
    30c8:	4c0f      	ldr	r4, [pc, #60]	; (3108 <onoff_start+0x44>)
    30ca:	4d10      	ldr	r5, [pc, #64]	; (310c <onoff_start+0x48>)
    30cc:	1b03      	subs	r3, r0, r4
    30ce:	109b      	asrs	r3, r3, #2
    30d0:	435d      	muls	r5, r3
    30d2:	b2eb      	uxtb	r3, r5
	err = set_starting_state(&subdata->flags, ctx);
    30d4:	250c      	movs	r5, #12
    30d6:	435d      	muls	r5, r3
{
    30d8:	4607      	mov	r7, r0
	err = set_starting_state(&subdata->flags, ctx);
    30da:	f105 0040 	add.w	r0, r5, #64	; 0x40
{
    30de:	460e      	mov	r6, r1
	err = set_starting_state(&subdata->flags, ctx);
    30e0:	4420      	add	r0, r4
    30e2:	2140      	movs	r1, #64	; 0x40
    30e4:	f003 fafb 	bl	66de <set_starting_state>
	if (err < 0) {
    30e8:	1e01      	subs	r1, r0, #0
    30ea:	db08      	blt.n	30fe <onoff_start+0x3a>
	subdata->cb = cb;
    30ec:	4b08      	ldr	r3, [pc, #32]	; (3110 <onoff_start+0x4c>)
    30ee:	442c      	add	r4, r5
	subdata->user_data = user_data;
    30f0:	e9c4 360e 	strd	r3, r6, [r4, #56]	; 0x38
	 get_sub_config(dev, type)->start();
    30f4:	4b07      	ldr	r3, [pc, #28]	; (3114 <onoff_start+0x50>)
    30f6:	595b      	ldr	r3, [r3, r5]
	err = async_start(CLOCK_DEVICE, get_subsys(mgr),
			  onoff_started_callback, notify, CTX_ONOFF);
	if (err < 0) {
		notify(mgr, err);
	}
}
    30f8:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
	 get_sub_config(dev, type)->start();
    30fc:	4718      	bx	r3
		notify(mgr, err);
    30fe:	4638      	mov	r0, r7
    3100:	4633      	mov	r3, r6
}
    3102:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
		notify(mgr, err);
    3106:	4718      	bx	r3
    3108:	20001254 	.word	0x20001254
    310c:	b6db6db7 	.word	0xb6db6db7
    3110:	00006747 	.word	0x00006747
    3114:	00008be4 	.word	0x00008be4

00003118 <clk_init>:
	static const struct onoff_transitions transitions = {
		.start = onoff_start,
		.stop = onoff_stop
	};

	IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
    3118:	2200      	movs	r2, #0
{
    311a:	b570      	push	{r4, r5, r6, lr}
	IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
    311c:	2101      	movs	r1, #1
{
    311e:	4604      	mov	r4, r0
	IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
    3120:	4610      	mov	r0, r2
    3122:	f7ff fbcf 	bl	28c4 <z_arm_irq_priority_set>
		    nrfx_isr, nrfx_power_clock_irq_handler, 0);
	irq_enable(DT_INST_IRQN(0));
    3126:	2000      	movs	r0, #0
    3128:	f7ff fbae 	bl	2888 <arch_irq_enable>

	nrfx_err = nrfx_clock_init(clock_event_handler);
    312c:	480f      	ldr	r0, [pc, #60]	; (316c <clk_init+0x54>)
    312e:	f001 fd3d 	bl	4bac <nrfx_clock_init>
	if (nrfx_err != NRFX_SUCCESS) {
    3132:	4b0f      	ldr	r3, [pc, #60]	; (3170 <clk_init+0x58>)
    3134:	4298      	cmp	r0, r3
    3136:	d115      	bne.n	3164 <clk_init+0x4c>
		struct nrf_clock_control_data *data = dev->data;

		z_nrf_clock_calibration_init(data->mgr);
	}

	nrfx_clock_enable();
    3138:	f005 fb03 	bl	8742 <nrfx_clock_enable>

	for (enum clock_control_nrf_type i = 0;
		i < CLOCK_CONTROL_NRF_TYPE_COUNT; i++) {
		struct nrf_clock_control_sub_data *subdata =
						get_sub_data(dev, i);
    313c:	6926      	ldr	r6, [r4, #16]

		err = onoff_manager_init(get_onoff_manager(dev, i),
    313e:	490d      	ldr	r1, [pc, #52]	; (3174 <clk_init+0x5c>)
    3140:	4630      	mov	r0, r6
    3142:	f002 feaa 	bl	5e9a <onoff_manager_init>
					 &transitions);
		if (err < 0) {
    3146:	2800      	cmp	r0, #0
    3148:	db0b      	blt.n	3162 <clk_init+0x4a>
			return err;
		}

		subdata->flags = CLOCK_CONTROL_STATUS_OFF;
    314a:	2501      	movs	r5, #1
    314c:	6435      	str	r5, [r6, #64]	; 0x40
						get_sub_data(dev, i);
    314e:	6924      	ldr	r4, [r4, #16]
		err = onoff_manager_init(get_onoff_manager(dev, i),
    3150:	4908      	ldr	r1, [pc, #32]	; (3174 <clk_init+0x5c>)
    3152:	f104 001c 	add.w	r0, r4, #28
    3156:	f002 fea0 	bl	5e9a <onoff_manager_init>
		if (err < 0) {
    315a:	2800      	cmp	r0, #0
    315c:	db01      	blt.n	3162 <clk_init+0x4a>
		subdata->flags = CLOCK_CONTROL_STATUS_OFF;
    315e:	64e5      	str	r5, [r4, #76]	; 0x4c
	}

	return 0;
    3160:	2000      	movs	r0, #0
}
    3162:	bd70      	pop	{r4, r5, r6, pc}
		return -EIO;
    3164:	f06f 0004 	mvn.w	r0, #4
    3168:	e7fb      	b.n	3162 <clk_init+0x4a>
    316a:	bf00      	nop
    316c:	000031ad 	.word	0x000031ad
    3170:	0bad0000 	.word	0x0bad0000
    3174:	00008bfc 	.word	0x00008bfc

00003178 <clkstarted_handle.constprop.0>:
static void clkstarted_handle(const struct device *dev,
    3178:	4601      	mov	r1, r0
	clock_control_cb_t callback = sub_data->cb;
    317a:	230c      	movs	r3, #12
    317c:	4809      	ldr	r0, [pc, #36]	; (31a4 <clkstarted_handle.constprop.0+0x2c>)
    317e:	434b      	muls	r3, r1
static void clkstarted_handle(const struct device *dev,
    3180:	b570      	push	{r4, r5, r6, lr}
	clock_control_cb_t callback = sub_data->cb;
    3182:	18c4      	adds	r4, r0, r3
	void *user_data = sub_data->user_data;
    3184:	e9d4 560e 	ldrd	r5, r6, [r4, #56]	; 0x38
	sub_data->cb = NULL;
    3188:	2200      	movs	r2, #0
	set_on_state(&sub_data->flags);
    318a:	3340      	adds	r3, #64	; 0x40
	sub_data->cb = NULL;
    318c:	63a2      	str	r2, [r4, #56]	; 0x38
	set_on_state(&sub_data->flags);
    318e:	4418      	add	r0, r3
    3190:	f003 fac3 	bl	671a <set_on_state>
	if (callback) {
    3194:	b12d      	cbz	r5, 31a2 <clkstarted_handle.constprop.0+0x2a>
		callback(dev, (clock_control_subsys_t)type, user_data);
    3196:	4632      	mov	r2, r6
    3198:	462b      	mov	r3, r5
    319a:	4803      	ldr	r0, [pc, #12]	; (31a8 <clkstarted_handle.constprop.0+0x30>)
}
    319c:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
		callback(dev, (clock_control_subsys_t)type, user_data);
    31a0:	4718      	bx	r3
}
    31a2:	bd70      	pop	{r4, r5, r6, pc}
    31a4:	20001254 	.word	0x20001254
    31a8:	000088cc 	.word	0x000088cc

000031ac <clock_event_handler>:
	switch (event) {
    31ac:	b110      	cbz	r0, 31b4 <clock_event_handler+0x8>
    31ae:	2801      	cmp	r0, #1
    31b0:	d004      	beq.n	31bc <clock_event_handler+0x10>
    31b2:	4770      	bx	lr
		if (GET_STATUS(data->flags) == CLOCK_CONTROL_STATUS_STARTING) {
    31b4:	4b03      	ldr	r3, [pc, #12]	; (31c4 <clock_event_handler+0x18>)
    31b6:	6c1b      	ldr	r3, [r3, #64]	; 0x40
    31b8:	075b      	lsls	r3, r3, #29
    31ba:	d101      	bne.n	31c0 <clock_event_handler+0x14>
		clkstarted_handle(dev, CLOCK_CONTROL_NRF_TYPE_LFCLK);
    31bc:	f7ff bfdc 	b.w	3178 <clkstarted_handle.constprop.0>
}
    31c0:	4770      	bx	lr
    31c2:	bf00      	nop
    31c4:	20001254 	.word	0x20001254

000031c8 <generic_hfclk_start>:
{
    31c8:	b508      	push	{r3, lr}
	__asm__ volatile(
    31ca:	f04f 0320 	mov.w	r3, #32
    31ce:	f3ef 8111 	mrs	r1, BASEPRI
    31d2:	f383 8812 	msr	BASEPRI_MAX, r3
    31d6:	f3bf 8f6f 	isb	sy
	hfclk_users |= HF_USER_GENERIC;
    31da:	4a12      	ldr	r2, [pc, #72]	; (3224 <generic_hfclk_start+0x5c>)
    31dc:	6813      	ldr	r3, [r2, #0]
    31de:	f043 0002 	orr.w	r0, r3, #2
	if (hfclk_users & HF_USER_BT) {
    31e2:	f013 0301 	ands.w	r3, r3, #1
	hfclk_users |= HF_USER_GENERIC;
    31e6:	6010      	str	r0, [r2, #0]
	if (hfclk_users & HF_USER_BT) {
    31e8:	d00c      	beq.n	3204 <generic_hfclk_start+0x3c>
            break;
        case NRF_CLOCK_DOMAIN_HFCLK:
            if (p_clk_src != NULL)
            {
                (*(nrf_clock_hfclk_t *)p_clk_src) =
                    (nrf_clock_hfclk_t)((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_SRC_Msk)
    31ea:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
    31ee:	f8d2 340c 	ldr.w	r3, [r2, #1036]	; 0x40c
                                        >> CLOCK_HFCLKSTAT_SRC_Pos);
            }
            if ((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_STATE_Msk)
    31f2:	f8d2 240c 	ldr.w	r2, [r2, #1036]	; 0x40c
		if (type == NRF_CLOCK_HFCLK_HIGH_ACCURACY) {
    31f6:	f013 0301 	ands.w	r3, r3, #1
    31fa:	d003      	beq.n	3204 <generic_hfclk_start+0x3c>
			set_on_state(get_hf_flags());
    31fc:	480a      	ldr	r0, [pc, #40]	; (3228 <generic_hfclk_start+0x60>)
    31fe:	f003 fa8c 	bl	671a <set_on_state>
			already_started = true;
    3202:	2301      	movs	r3, #1
	__asm__ volatile(
    3204:	f381 8811 	msr	BASEPRI, r1
    3208:	f3bf 8f6f 	isb	sy
	if (already_started) {
    320c:	b123      	cbz	r3, 3218 <generic_hfclk_start+0x50>
}
    320e:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
		clkstarted_handle(CLOCK_DEVICE,
    3212:	2000      	movs	r0, #0
    3214:	f7ff bfb0 	b.w	3178 <clkstarted_handle.constprop.0>
}
    3218:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
    nrfx_clock_stop(NRF_CLOCK_DOMAIN_LFCLK);
}

NRFX_STATIC_INLINE void nrfx_clock_hfclk_start(void)
{
    nrfx_clock_start(NRF_CLOCK_DOMAIN_HFCLK);
    321c:	2001      	movs	r0, #1
    321e:	f001 bcd5 	b.w	4bcc <nrfx_clock_start>
    3222:	bf00      	nop
    3224:	200012a4 	.word	0x200012a4
    3228:	20001294 	.word	0x20001294

0000322c <lfclk_start>:
{
    322c:	b510      	push	{r4, lr}
	if (!once) {
    322e:	4c07      	ldr	r4, [pc, #28]	; (324c <lfclk_start+0x20>)
    3230:	7823      	ldrb	r3, [r4, #0]
    3232:	b92b      	cbnz	r3, 3240 <lfclk_start+0x14>
    3234:	f44f 70a5 	mov.w	r0, #330	; 0x14a
    3238:	f005 fb19 	bl	886e <z_impl_k_busy_wait>
		once = true;
    323c:	2301      	movs	r3, #1
    323e:	7023      	strb	r3, [r4, #0]
}
    3240:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    nrfx_clock_start(NRF_CLOCK_DOMAIN_LFCLK);
    3244:	2000      	movs	r0, #0
    3246:	f001 bcc1 	b.w	4bcc <nrfx_clock_start>
    324a:	bf00      	nop
    324c:	20003119 	.word	0x20003119

00003250 <generic_hfclk_stop>:
 *
 * @return Previous value of @a target.
 */
static inline atomic_val_t atomic_and(atomic_t *target, atomic_val_t value)
{
	return __atomic_fetch_and(target, value, __ATOMIC_SEQ_CST);
    3250:	4b09      	ldr	r3, [pc, #36]	; (3278 <generic_hfclk_stop+0x28>)
    3252:	f3bf 8f5b 	dmb	ish
    3256:	e853 2f00 	ldrex	r2, [r3]
    325a:	f022 0102 	bic.w	r1, r2, #2
    325e:	e843 1000 	strex	r0, r1, [r3]
    3262:	2800      	cmp	r0, #0
    3264:	d1f7      	bne.n	3256 <generic_hfclk_stop+0x6>
    3266:	f3bf 8f5b 	dmb	ish
	if (atomic_and(&hfclk_users, ~HF_USER_GENERIC) & HF_USER_BT) {
    326a:	07d3      	lsls	r3, r2, #31
    326c:	d402      	bmi.n	3274 <generic_hfclk_stop+0x24>
}

NRFX_STATIC_INLINE void nrfx_clock_hfclk_stop(void)
{
    nrfx_clock_stop(NRF_CLOCK_DOMAIN_HFCLK);
    326e:	2001      	movs	r0, #1
    3270:	f001 bcf8 	b.w	4c64 <nrfx_clock_stop>
}
    3274:	4770      	bx	lr
    3276:	bf00      	nop
    3278:	200012a4 	.word	0x200012a4

0000327c <z_nrf_clock_control_lf_on>:
{
    327c:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
	return __atomic_exchange_n(target, value, __ATOMIC_SEQ_CST);
    3280:	4937      	ldr	r1, [pc, #220]	; (3360 <z_nrf_clock_control_lf_on+0xe4>)
    3282:	f3bf 8f5b 	dmb	ish
    3286:	4606      	mov	r6, r0
    3288:	2201      	movs	r2, #1
    328a:	e851 3f00 	ldrex	r3, [r1]
    328e:	e841 2000 	strex	r0, r2, [r1]
    3292:	2800      	cmp	r0, #0
    3294:	d1f9      	bne.n	328a <z_nrf_clock_control_lf_on+0xe>
    3296:	f3bf 8f5b 	dmb	ish
	if (atomic_set(&on, 1) == 0) {
    329a:	b933      	cbnz	r3, 32aa <z_nrf_clock_control_lf_on+0x2e>
 */
static inline void sys_notify_init_spinwait(struct sys_notify *notify)
{
	__ASSERT_NO_MSG(notify != NULL);

	*notify = (struct sys_notify){
    329c:	4931      	ldr	r1, [pc, #196]	; (3364 <z_nrf_clock_control_lf_on+0xe8>)
		err = onoff_request(mgr, &cli);
    329e:	4832      	ldr	r0, [pc, #200]	; (3368 <z_nrf_clock_control_lf_on+0xec>)
    32a0:	604b      	str	r3, [r1, #4]
    32a2:	60cb      	str	r3, [r1, #12]
    32a4:	608a      	str	r2, [r1, #8]
    32a6:	f002 fe0b 	bl	5ec0 <onoff_request>
	switch (start_mode) {
    32aa:	1e73      	subs	r3, r6, #1
    32ac:	2b01      	cmp	r3, #1
    32ae:	d832      	bhi.n	3316 <z_nrf_clock_control_lf_on+0x9a>
	if ((mode == CLOCK_CONTROL_NRF_LF_START_AVAILABLE) &&
    32b0:	2e01      	cmp	r6, #1
    32b2:	d107      	bne.n	32c4 <z_nrf_clock_control_lf_on+0x48>
    return clk_src;
}

NRF_STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(NRF_CLOCK_Type const * p_reg)
{
    return (nrf_clock_lfclk_t)((p_reg->LFCLKSRCCOPY & CLOCK_LFCLKSRCCOPY_SRC_Msk)
    32b4:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    32b8:	f8d3 341c 	ldr.w	r3, [r3, #1052]	; 0x41c
    32bc:	f003 0303 	and.w	r3, r3, #3
	    (target_type == NRF_CLOCK_LFCLK_Xtal) &&
    32c0:	2b01      	cmp	r3, #1
    32c2:	d028      	beq.n	3316 <z_nrf_clock_control_lf_on+0x9a>
	bool isr_mode = k_is_in_isr() || k_is_pre_kernel();
    32c4:	f005 facd 	bl	8862 <k_is_in_isr>
    32c8:	4604      	mov	r4, r0
    32ca:	b918      	cbnz	r0, 32d4 <z_nrf_clock_control_lf_on+0x58>
	return !z_sys_post_kernel;
    32cc:	4b27      	ldr	r3, [pc, #156]	; (336c <z_nrf_clock_control_lf_on+0xf0>)
	int key = isr_mode ? irq_lock() : 0;
    32ce:	781b      	ldrb	r3, [r3, #0]
    32d0:	2b00      	cmp	r3, #0
    32d2:	d13e      	bne.n	3352 <z_nrf_clock_control_lf_on+0xd6>
	__asm__ volatile(
    32d4:	f04f 0320 	mov.w	r3, #32
    32d8:	f3ef 8511 	mrs	r5, BASEPRI
    32dc:	f383 8812 	msr	BASEPRI_MAX, r3
    32e0:	f3bf 8f6f 	isb	sy
    32e4:	2401      	movs	r4, #1
    return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + event));
    32e6:	4f22      	ldr	r7, [pc, #136]	; (3370 <z_nrf_clock_control_lf_on+0xf4>)
    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    32e8:	f8df 8088 	ldr.w	r8, [pc, #136]	; 3374 <z_nrf_clock_control_lf_on+0xf8>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    32ec:	f8df 9088 	ldr.w	r9, [pc, #136]	; 3378 <z_nrf_clock_control_lf_on+0xfc>
                    (nrf_clock_lfclk_t)((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_SRC_Msk)
    32f0:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
    32f4:	f8d2 3418 	ldr.w	r3, [r2, #1048]	; 0x418
            if ((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_STATE_Msk)
    32f8:	f8d2 2418 	ldr.w	r2, [r2, #1048]	; 0x418
    32fc:	03d2      	lsls	r2, r2, #15
    32fe:	d50c      	bpl.n	331a <z_nrf_clock_control_lf_on+0x9e>
                                        >> CLOCK_LFCLKSTAT_SRC_Pos);
    3300:	f003 0303 	and.w	r3, r3, #3
	while (!(nrfx_clock_is_running(d, (void *)&type)
    3304:	2b01      	cmp	r3, #1
    3306:	d001      	beq.n	330c <z_nrf_clock_control_lf_on+0x90>
		     || (mode == CLOCK_CONTROL_NRF_LF_START_AVAILABLE)))) {
    3308:	2e01      	cmp	r6, #1
    330a:	d106      	bne.n	331a <z_nrf_clock_control_lf_on+0x9e>
	if (isr_mode) {
    330c:	b1dc      	cbz	r4, 3346 <z_nrf_clock_control_lf_on+0xca>
	__asm__ volatile(
    330e:	f385 8811 	msr	BASEPRI, r5
    3312:	f3bf 8f6f 	isb	sy
}
    3316:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 *
 * @return N/A
 */
static inline void k_cpu_atomic_idle(unsigned int key)
{
	arch_cpu_atomic_idle(key);
    331a:	4628      	mov	r0, r5
    331c:	f7ff fa7c 	bl	2818 <arch_cpu_atomic_idle>
    return (nrf_clock_lfclk_t)(p_reg->LFCLKSRC);
    3320:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
    3324:	f8d2 3518 	ldr.w	r3, [r2, #1304]	; 0x518
		if ((target_type ==  NRF_CLOCK_LFCLK_Xtal)
    3328:	2b00      	cmp	r3, #0
    332a:	d1e1      	bne.n	32f0 <z_nrf_clock_control_lf_on+0x74>
    return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + event));
    332c:	6839      	ldr	r1, [r7, #0]
		    && nrf_clock_event_check(NRF_CLOCK,
    332e:	2900      	cmp	r1, #0
    3330:	d0de      	beq.n	32f0 <z_nrf_clock_control_lf_on+0x74>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    3332:	603b      	str	r3, [r7, #0]
#ifndef NRF_DECLARE_ONLY

NRF_STATIC_INLINE void nrf_event_readback(void * p_event_reg)
{
#if NRFX_CHECK(NRFX_EVENT_READBACK_ENABLED) && !defined(NRF51)
    (void)*((volatile uint32_t *)(p_event_reg));
    3334:	683b      	ldr	r3, [r7, #0]
    p_reg->LFCLKSRC = (uint32_t)(source);
    3336:	2301      	movs	r3, #1
    3338:	f8c2 3518 	str.w	r3, [r2, #1304]	; 0x518
    333c:	f8c8 3180 	str.w	r3, [r8, #384]	; 0x180
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    3340:	f8c9 3000 	str.w	r3, [r9]
}
    3344:	e7d4      	b.n	32f0 <z_nrf_clock_control_lf_on+0x74>
    p_reg->INTENSET = mask;
    3346:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    334a:	2202      	movs	r2, #2
    334c:	f8c3 2304 	str.w	r2, [r3, #772]	; 0x304
}
    3350:	e7e1      	b.n	3316 <z_nrf_clock_control_lf_on+0x9a>
    p_reg->INTENCLR = mask;
    3352:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    3356:	2202      	movs	r2, #2
    3358:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
	int key = isr_mode ? irq_lock() : 0;
    335c:	4605      	mov	r5, r0
}
    335e:	e7c2      	b.n	32e6 <z_nrf_clock_control_lf_on+0x6a>
    3360:	200012a8 	.word	0x200012a8
    3364:	20001244 	.word	0x20001244
    3368:	20001270 	.word	0x20001270
    336c:	2000354b 	.word	0x2000354b
    3370:	40000104 	.word	0x40000104
    3374:	e000e100 	.word	0xe000e100
    3378:	40000008 	.word	0x40000008

0000337c <rtt_console_init>:

	return character;
}

static int rtt_console_init(const struct device *d)
{
    337c:	b510      	push	{r4, lr}
	ARG_UNUSED(d);

	__printk_hook_install(rtt_console_out);
    337e:	4c04      	ldr	r4, [pc, #16]	; (3390 <rtt_console_init+0x14>)
    3380:	4620      	mov	r0, r4
    3382:	f7fe f96b 	bl	165c <__printk_hook_install>
	__stdout_hook_install(rtt_console_out);
    3386:	4620      	mov	r0, r4
    3388:	f7ff fe3a 	bl	3000 <__stdout_hook_install>

	return 0;
}
    338c:	2000      	movs	r0, #0
    338e:	bd10      	pop	{r4, pc}
    3390:	00003395 	.word	0x00003395

00003394 <rtt_console_out>:
{
    3394:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    3396:	4e10      	ldr	r6, [pc, #64]	; (33d8 <rtt_console_out+0x44>)
	char c = (char)character;
    3398:	f88d 0007 	strb.w	r0, [sp, #7]
{
    339c:	4604      	mov	r4, r0
	char c = (char)character;
    339e:	2503      	movs	r5, #3
		SEGGER_RTT_LOCK();
    33a0:	f3ef 8711 	mrs	r7, BASEPRI
    33a4:	f04f 0120 	mov.w	r1, #32
    33a8:	f381 8811 	msr	BASEPRI, r1
		cnt = SEGGER_RTT_WriteNoLock(0, &c, 1);
    33ac:	2201      	movs	r2, #1
    33ae:	f10d 0107 	add.w	r1, sp, #7
    33b2:	2000      	movs	r0, #0
    33b4:	f002 f85c 	bl	5470 <SEGGER_RTT_WriteNoLock>
		SEGGER_RTT_UNLOCK();
    33b8:	f387 8811 	msr	BASEPRI, r7
		if (cnt) {
    33bc:	b120      	cbz	r0, 33c8 <rtt_console_out+0x34>
			host_present = true;
    33be:	2301      	movs	r3, #1
    33c0:	7033      	strb	r3, [r6, #0]
}
    33c2:	4620      	mov	r0, r4
    33c4:	b003      	add	sp, #12
    33c6:	bdf0      	pop	{r4, r5, r6, r7, pc}
		} else if (host_present) {
    33c8:	7833      	ldrb	r3, [r6, #0]
    33ca:	2b00      	cmp	r3, #0
    33cc:	d0f9      	beq.n	33c2 <rtt_console_out+0x2e>
			if (max_cnt) {
    33ce:	3d01      	subs	r5, #1
    33d0:	d1e6      	bne.n	33a0 <rtt_console_out+0xc>
				host_present = false;
    33d2:	7035      	strb	r5, [r6, #0]
    33d4:	e7f5      	b.n	33c2 <rtt_console_out+0x2e>
    33d6:	bf00      	nop
    33d8:	2000311a 	.word	0x2000311a

000033dc <gpio_nrfx_pin_interrupt_configure>:

static int gpio_nrfx_pin_interrupt_configure(const struct device *port,
					     gpio_pin_t pin,
					     enum gpio_int_mode mode,
					     enum gpio_int_trig trig)
{
    33dc:	b530      	push	{r4, r5, lr}
	uint32_t abs_pin = NRF_GPIO_PIN_MAP(get_port_cfg(port)->port_num, pin);
    33de:	6840      	ldr	r0, [r0, #4]
    33e0:	7b04      	ldrb	r4, [r0, #12]
    33e2:	f001 051f 	and.w	r5, r1, #31
	nrfx_err_t err;

	if (mode == GPIO_INT_MODE_DISABLED) {
    33e6:	f5b2 5f00 	cmp.w	r2, #8192	; 0x2000
	uint32_t abs_pin = NRF_GPIO_PIN_MAP(get_port_cfg(port)->port_num, pin);
    33ea:	ea45 1544 	orr.w	r5, r5, r4, lsl #5
{
    33ee:	b085      	sub	sp, #20
    33f0:	f04f 0400 	mov.w	r4, #0
	if (mode == GPIO_INT_MODE_DISABLED) {
    33f4:	d104      	bne.n	3400 <gpio_nrfx_pin_interrupt_configure+0x24>
		nrfx_gpiote_trigger_disable(abs_pin);
    33f6:	4628      	mov	r0, r5
    33f8:	f001 fede 	bl	51b8 <nrfx_gpiote_trigger_disable>
		return -EIO;
	}

	nrfx_gpiote_trigger_enable(abs_pin, true);

	return 0;
    33fc:	2000      	movs	r0, #0
    33fe:	e02e      	b.n	345e <gpio_nrfx_pin_interrupt_configure+0x82>
	if (mode == GPIO_INT_MODE_LEVEL) {
    3400:	f5b2 4f80 	cmp.w	r2, #16384	; 0x4000
	nrfx_gpiote_trigger_config_t trigger_config = {
    3404:	e9cd 4402 	strd	r4, r4, [sp, #8]
	if (mode == GPIO_INT_MODE_LEVEL) {
    3408:	d12b      	bne.n	3462 <gpio_nrfx_pin_interrupt_configure+0x86>
		return trig == GPIO_INT_TRIG_LOW ? NRFX_GPIOTE_TRIGGER_LOW :
    340a:	f5b3 3f00 	cmp.w	r3, #131072	; 0x20000
    340e:	bf0c      	ite	eq
    3410:	2304      	moveq	r3, #4
    3412:	2305      	movne	r3, #5
	nrfx_gpiote_trigger_config_t trigger_config = {
    3414:	f88d 3008 	strb.w	r3, [sp, #8]
	if (!(BIT(pin) & get_port_cfg(port)->edge_sense) &&
    3418:	6883      	ldr	r3, [r0, #8]
    341a:	fa23 f101 	lsr.w	r1, r3, r1
    341e:	07c9      	lsls	r1, r1, #31
    3420:	d42b      	bmi.n	347a <gpio_nrfx_pin_interrupt_configure+0x9e>
    3422:	f5b2 3fa0 	cmp.w	r2, #81920	; 0x14000
    3426:	d128      	bne.n	347a <gpio_nrfx_pin_interrupt_configure+0x9e>
}

NRF_STATIC_INLINE uint32_t nrf_gpio_pin_port_number_extract(uint32_t * p_pin)
{
    uint32_t pin_number = *p_pin;
    *p_pin = pin_number & 0x1F;
    3428:	f005 031f 	and.w	r3, r5, #31
    return (nrf_gpio_pin_dir_t)((reg->PIN_CNF[pin_number] &
    342c:	f503 73e0 	add.w	r3, r3, #448	; 0x1c0
    3430:	f04f 42a0 	mov.w	r2, #1342177280	; 0x50000000
    3434:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
	    (mode == GPIO_INT_MODE_EDGE) &&
    3438:	07db      	lsls	r3, r3, #31
    343a:	d41e      	bmi.n	347a <gpio_nrfx_pin_interrupt_configure+0x9e>
		err = nrfx_gpiote_channel_get(abs_pin, &ch);
    343c:	f10d 0407 	add.w	r4, sp, #7
    3440:	4621      	mov	r1, r4
    3442:	4628      	mov	r0, r5
    3444:	f001 fe26 	bl	5094 <nrfx_gpiote_channel_get>
		if (err == NRFX_ERROR_INVALID_PARAM) {
    3448:	4b14      	ldr	r3, [pc, #80]	; (349c <gpio_nrfx_pin_interrupt_configure+0xc0>)
    344a:	4298      	cmp	r0, r3
    344c:	d114      	bne.n	3478 <gpio_nrfx_pin_interrupt_configure+0x9c>
			err = nrfx_gpiote_channel_alloc(&ch);
    344e:	4620      	mov	r0, r4
    3450:	f001 fe6a 	bl	5128 <nrfx_gpiote_channel_alloc>
			if (err != NRFX_SUCCESS) {
    3454:	4b12      	ldr	r3, [pc, #72]	; (34a0 <gpio_nrfx_pin_interrupt_configure+0xc4>)
    3456:	4298      	cmp	r0, r3
    3458:	d00e      	beq.n	3478 <gpio_nrfx_pin_interrupt_configure+0x9c>
				return -ENOMEM;
    345a:	f06f 000b 	mvn.w	r0, #11
}
    345e:	b005      	add	sp, #20
    3460:	bd30      	pop	{r4, r5, pc}
	return trig == GPIO_INT_TRIG_BOTH ? NRFX_GPIOTE_TRIGGER_TOGGLE :
    3462:	f5b3 2fc0 	cmp.w	r3, #393216	; 0x60000
    3466:	d005      	beq.n	3474 <gpio_nrfx_pin_interrupt_configure+0x98>
    3468:	f5b3 3f00 	cmp.w	r3, #131072	; 0x20000
    346c:	bf0c      	ite	eq
    346e:	2302      	moveq	r3, #2
    3470:	2301      	movne	r3, #1
    3472:	e7cf      	b.n	3414 <gpio_nrfx_pin_interrupt_configure+0x38>
    3474:	2303      	movs	r3, #3
    3476:	e7cd      	b.n	3414 <gpio_nrfx_pin_interrupt_configure+0x38>
		trigger_config.p_in_channel = &ch;
    3478:	9403      	str	r4, [sp, #12]
	err = nrfx_gpiote_input_configure(abs_pin, NULL, &trigger_config, NULL);
    347a:	2300      	movs	r3, #0
    347c:	4619      	mov	r1, r3
    347e:	aa02      	add	r2, sp, #8
    3480:	4628      	mov	r0, r5
    3482:	f001 fccb 	bl	4e1c <nrfx_gpiote_input_configure>
	if (err != NRFX_SUCCESS) {
    3486:	4b06      	ldr	r3, [pc, #24]	; (34a0 <gpio_nrfx_pin_interrupt_configure+0xc4>)
    3488:	4298      	cmp	r0, r3
    348a:	d104      	bne.n	3496 <gpio_nrfx_pin_interrupt_configure+0xba>
	nrfx_gpiote_trigger_enable(abs_pin, true);
    348c:	2101      	movs	r1, #1
    348e:	4628      	mov	r0, r5
    3490:	f001 fe50 	bl	5134 <nrfx_gpiote_trigger_enable>
    3494:	e7b2      	b.n	33fc <gpio_nrfx_pin_interrupt_configure+0x20>
		return -EIO;
    3496:	f06f 0004 	mvn.w	r0, #4
    349a:	e7e0      	b.n	345e <gpio_nrfx_pin_interrupt_configure+0x82>
    349c:	0bad0004 	.word	0x0bad0004
    34a0:	0bad0000 	.word	0x0bad0000

000034a4 <gpio_nrfx_init>:
}

#define GPIOTE_NODE DT_INST(0, nordic_nrf_gpiote)

static int gpio_nrfx_init(const struct device *port)
{
    34a4:	b510      	push	{r4, lr}
	nrfx_err_t err;

	if (nrfx_gpiote_is_init()) {
    34a6:	f001 fe2f 	bl	5108 <nrfx_gpiote_is_init>
    34aa:	4604      	mov	r4, r0
    34ac:	b968      	cbnz	r0, 34ca <gpio_nrfx_init+0x26>
		return 0;
	}

	err = nrfx_gpiote_init(0/*not used*/);
    34ae:	f001 fe03 	bl	50b8 <nrfx_gpiote_init>
	if (err != NRFX_SUCCESS) {
    34b2:	4b08      	ldr	r3, [pc, #32]	; (34d4 <gpio_nrfx_init+0x30>)
    34b4:	4298      	cmp	r0, r3
    34b6:	d10a      	bne.n	34ce <gpio_nrfx_init+0x2a>
		return -EIO;
	}

	nrfx_gpiote_global_callback_set(nrfx_gpio_handler, NULL);
    34b8:	4807      	ldr	r0, [pc, #28]	; (34d8 <gpio_nrfx_init+0x34>)
    34ba:	4621      	mov	r1, r4
    34bc:	f001 fde4 	bl	5088 <nrfx_gpiote_global_callback_set>

	IRQ_CONNECT(DT_IRQN(GPIOTE_NODE), DT_IRQ(GPIOTE_NODE, priority),
    34c0:	4622      	mov	r2, r4
    34c2:	2105      	movs	r1, #5
    34c4:	2006      	movs	r0, #6
    34c6:	f7ff f9fd 	bl	28c4 <z_arm_irq_priority_set>
		return 0;
    34ca:	2000      	movs	r0, #0
		    nrfx_isr, nrfx_gpiote_irq_handler, 0);

	return 0;
}
    34cc:	bd10      	pop	{r4, pc}
		return -EIO;
    34ce:	f06f 0004 	mvn.w	r0, #4
    34d2:	e7fb      	b.n	34cc <gpio_nrfx_init+0x28>
    34d4:	0bad0000 	.word	0x0bad0000
    34d8:	000034dd 	.word	0x000034dd

000034dc <nrfx_gpio_handler>:
	DT_INST_FOREACH_STATUS_OKAY(GPIO_NRF_GET_DEV)
    34dc:	0943      	lsrs	r3, r0, #5
{
    34de:	b570      	push	{r4, r5, r6, lr}
	DT_INST_FOREACH_STATUS_OKAY(GPIO_NRF_GET_DEV)
    34e0:	d118      	bne.n	3514 <nrfx_gpio_handler+0x38>
					const struct device *port,
					uint32_t pins)
{
	struct gpio_callback *cb, *tmp;

	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(list, cb, tmp, node) {
    34e2:	4b0d      	ldr	r3, [pc, #52]	; (3518 <nrfx_gpio_handler+0x3c>)
    34e4:	6859      	ldr	r1, [r3, #4]
    34e6:	b1a9      	cbz	r1, 3514 <nrfx_gpio_handler+0x38>
    34e8:	680c      	ldr	r4, [r1, #0]
		if (cb->pin_mask & pins) {
			__ASSERT(cb->handler, "No callback handler!");
			cb->handler(port, cb, cb->pin_mask & pins);
    34ea:	4e0c      	ldr	r6, [pc, #48]	; (351c <nrfx_gpio_handler+0x40>)
	gpio_fire_callbacks(list, port, BIT(pin));
    34ec:	2501      	movs	r5, #1
    34ee:	2c00      	cmp	r4, #0
    34f0:	fa05 f500 	lsl.w	r5, r5, r0
	return node->next;
    34f4:	bf38      	it	cc
    34f6:	2400      	movcc	r4, #0
		if (cb->pin_mask & pins) {
    34f8:	688a      	ldr	r2, [r1, #8]
    34fa:	402a      	ands	r2, r5
    34fc:	d002      	beq.n	3504 <nrfx_gpio_handler+0x28>
			cb->handler(port, cb, cb->pin_mask & pins);
    34fe:	684b      	ldr	r3, [r1, #4]
    3500:	4630      	mov	r0, r6
    3502:	4798      	blx	r3
	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(list, cb, tmp, node) {
    3504:	b134      	cbz	r4, 3514 <nrfx_gpio_handler+0x38>
    3506:	6823      	ldr	r3, [r4, #0]
    3508:	2b00      	cmp	r3, #0
    350a:	bf38      	it	cc
    350c:	2300      	movcc	r3, #0
Z_GENLIST_PEEK_NEXT_NO_CHECK(slist, snode)
    350e:	4621      	mov	r1, r4
    3510:	461c      	mov	r4, r3
    3512:	e7f1      	b.n	34f8 <nrfx_gpio_handler+0x1c>
}
    3514:	bd70      	pop	{r4, r5, r6, pc}
    3516:	bf00      	nop
    3518:	200012ac 	.word	0x200012ac
    351c:	000088e4 	.word	0x000088e4

00003520 <gpio_nrfx_pin_configure>:
{
    3520:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
	const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
    3524:	6847      	ldr	r7, [r0, #4]
	nrfx_gpiote_pin_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
    3526:	7b3b      	ldrb	r3, [r7, #12]
    3528:	f001 051f 	and.w	r5, r1, #31
{
    352c:	b085      	sub	sp, #20
    352e:	460e      	mov	r6, r1
	nrfx_gpiote_pin_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
    3530:	ea45 1543 	orr.w	r5, r5, r3, lsl #5
	if (flags == GPIO_DISCONNECTED) {
    3534:	4614      	mov	r4, r2
    3536:	b9ca      	cbnz	r2, 356c <gpio_nrfx_pin_configure+0x4c>
	err = nrfx_gpiote_channel_get(pin, &ch);
    3538:	a902      	add	r1, sp, #8
    353a:	4628      	mov	r0, r5
    353c:	f001 fdaa 	bl	5094 <nrfx_gpiote_channel_get>
    3540:	4604      	mov	r4, r0
	err = nrfx_gpiote_pin_uninit(pin);
    3542:	4628      	mov	r0, r5
    3544:	f001 fe5a 	bl	51fc <nrfx_gpiote_pin_uninit>
	if (err != NRFX_SUCCESS) {
    3548:	4b48      	ldr	r3, [pc, #288]	; (366c <gpio_nrfx_pin_configure+0x14c>)
    354a:	4298      	cmp	r0, r3
    354c:	d004      	beq.n	3558 <gpio_nrfx_pin_configure+0x38>
		return -EIO;
    354e:	f06f 0004 	mvn.w	r0, #4
}
    3552:	b005      	add	sp, #20
    3554:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
	if (free_ch) {
    3558:	4284      	cmp	r4, r0
    355a:	d105      	bne.n	3568 <gpio_nrfx_pin_configure+0x48>
		err = nrfx_gpiote_channel_free(ch);
    355c:	f89d 0008 	ldrb.w	r0, [sp, #8]
    3560:	f001 fddc 	bl	511c <nrfx_gpiote_channel_free>
	return (err != NRFX_SUCCESS) ? -EIO : 0;
    3564:	42a0      	cmp	r0, r4
    3566:	d1f2      	bne.n	354e <gpio_nrfx_pin_configure+0x2e>
	return (err != NRFX_SUCCESS) ? -EINVAL : 0;
    3568:	2000      	movs	r0, #0
    356a:	e7f2      	b.n	3552 <gpio_nrfx_pin_configure+0x32>
	nrfx_gpiote_trigger_config_t trigger_config = {
    356c:	f04f 0900 	mov.w	r9, #0
	err = nrfx_gpiote_channel_get(pin, &ch);
    3570:	f10d 0103 	add.w	r1, sp, #3
    3574:	4630      	mov	r0, r6
	nrfx_gpiote_trigger_config_t trigger_config = {
    3576:	e9cd 9902 	strd	r9, r9, [sp, #8]
	err = nrfx_gpiote_channel_get(pin, &ch);
    357a:	f001 fd8b 	bl	5094 <nrfx_gpiote_channel_get>
	err = nrfx_gpiote_input_configure(abs_pin, NULL, &trigger_config, NULL);
    357e:	464b      	mov	r3, r9
	err = nrfx_gpiote_channel_get(pin, &ch);
    3580:	4680      	mov	r8, r0
	err = nrfx_gpiote_input_configure(abs_pin, NULL, &trigger_config, NULL);
    3582:	aa02      	add	r2, sp, #8
    3584:	4649      	mov	r1, r9
    3586:	4628      	mov	r0, r5
    3588:	f001 fc48 	bl	4e1c <nrfx_gpiote_input_configure>
	if (err != NRFX_SUCCESS) {
    358c:	4b37      	ldr	r3, [pc, #220]	; (366c <gpio_nrfx_pin_configure+0x14c>)
    358e:	4298      	cmp	r0, r3
    3590:	d002      	beq.n	3598 <gpio_nrfx_pin_configure+0x78>
	switch (flags & (GPIO_DS_LOW_MASK | GPIO_DS_HIGH_MASK |
    3592:	f06f 0015 	mvn.w	r0, #21
    3596:	e7dc      	b.n	3552 <gpio_nrfx_pin_configure+0x32>
	if (free_ch) {
    3598:	4580      	cmp	r8, r0
    359a:	d103      	bne.n	35a4 <gpio_nrfx_pin_configure+0x84>
		err = nrfx_gpiote_channel_free(ch);
    359c:	f89d 0003 	ldrb.w	r0, [sp, #3]
    35a0:	f001 fdbc 	bl	511c <nrfx_gpiote_channel_free>
	if (flags & GPIO_OUTPUT) {
    35a4:	05a3      	lsls	r3, r4, #22
    35a6:	d54e      	bpl.n	3646 <gpio_nrfx_pin_configure+0x126>
	switch (flags & (GPIO_DS_LOW_MASK | GPIO_DS_HIGH_MASK |
    35a8:	4b31      	ldr	r3, [pc, #196]	; (3670 <gpio_nrfx_pin_configure+0x150>)
    35aa:	4a32      	ldr	r2, [pc, #200]	; (3674 <gpio_nrfx_pin_configure+0x154>)
    35ac:	4023      	ands	r3, r4
    35ae:	4293      	cmp	r3, r2
    35b0:	d03a      	beq.n	3628 <gpio_nrfx_pin_configure+0x108>
    35b2:	d80c      	bhi.n	35ce <gpio_nrfx_pin_configure+0xae>
    35b4:	2b06      	cmp	r3, #6
    35b6:	d014      	beq.n	35e2 <gpio_nrfx_pin_configure+0xc2>
    35b8:	d804      	bhi.n	35c4 <gpio_nrfx_pin_configure+0xa4>
    35ba:	b193      	cbz	r3, 35e2 <gpio_nrfx_pin_configure+0xc2>
    35bc:	2b02      	cmp	r3, #2
    35be:	d1e8      	bne.n	3592 <gpio_nrfx_pin_configure+0x72>
    35c0:	2304      	movs	r3, #4
    35c2:	e00e      	b.n	35e2 <gpio_nrfx_pin_configure+0xc2>
    35c4:	f5b3 1f80 	cmp.w	r3, #1048576	; 0x100000
    35c8:	d1e3      	bne.n	3592 <gpio_nrfx_pin_configure+0x72>
		*drive = NRF_GPIO_PIN_H0S1;
    35ca:	2301      	movs	r3, #1
    35cc:	e009      	b.n	35e2 <gpio_nrfx_pin_configure+0xc2>
	switch (flags & (GPIO_DS_LOW_MASK | GPIO_DS_HIGH_MASK |
    35ce:	4a2a      	ldr	r2, [pc, #168]	; (3678 <gpio_nrfx_pin_configure+0x158>)
    35d0:	4293      	cmp	r3, r2
    35d2:	d02b      	beq.n	362c <gpio_nrfx_pin_configure+0x10c>
    35d4:	f5b3 0fa0 	cmp.w	r3, #5242880	; 0x500000
    35d8:	d02a      	beq.n	3630 <gpio_nrfx_pin_configure+0x110>
    35da:	f5b3 0f80 	cmp.w	r3, #4194304	; 0x400000
    35de:	d1d8      	bne.n	3592 <gpio_nrfx_pin_configure+0x72>
		*drive = NRF_GPIO_PIN_S0H1;
    35e0:	2302      	movs	r3, #2
		nrfx_gpiote_output_config_t output_config = {
    35e2:	f88d 3004 	strb.w	r3, [sp, #4]
				NRF_GPIO_PIN_INPUT_CONNECT :
    35e6:	f484 7380 	eor.w	r3, r4, #256	; 0x100
    35ea:	f3c3 2300 	ubfx	r3, r3, #8, #1
	if (flags & GPIO_PULL_UP) {
    35ee:	06e0      	lsls	r0, r4, #27
		nrfx_gpiote_output_config_t output_config = {
    35f0:	f88d 3005 	strb.w	r3, [sp, #5]
		return NRF_GPIO_PIN_PULLDOWN;
    35f4:	bf54      	ite	pl
    35f6:	f3c4 1340 	ubfxpl	r3, r4, #5, #1
		return NRF_GPIO_PIN_PULLUP;
    35fa:	2303      	movmi	r3, #3
		if (flags & GPIO_OUTPUT_INIT_HIGH) {
    35fc:	0521      	lsls	r1, r4, #20
		nrfx_gpiote_output_config_t output_config = {
    35fe:	f88d 3006 	strb.w	r3, [sp, #6]
		if (flags & GPIO_OUTPUT_INIT_HIGH) {
    3602:	d517      	bpl.n	3634 <gpio_nrfx_pin_configure+0x114>
			nrf_gpio_port_out_set(cfg->port, BIT(pin));
    3604:	687b      	ldr	r3, [r7, #4]
    3606:	2101      	movs	r1, #1
    3608:	fa01 f606 	lsl.w	r6, r1, r6
    p_reg->OUTSET = set_mask;
    360c:	f8c3 6508 	str.w	r6, [r3, #1288]	; 0x508
		err = nrfx_gpiote_output_configure(abs_pin, &output_config, NULL);
    3610:	2200      	movs	r2, #0
    3612:	a901      	add	r1, sp, #4
    3614:	4628      	mov	r0, r5
    3616:	f001 fca7 	bl	4f68 <nrfx_gpiote_output_configure>
		return (err != NRFX_SUCCESS) ? -EINVAL : 0;
    361a:	4b14      	ldr	r3, [pc, #80]	; (366c <gpio_nrfx_pin_configure+0x14c>)
    361c:	4298      	cmp	r0, r3
    361e:	bf14      	ite	ne
    3620:	f06f 0015 	mvnne.w	r0, #21
    3624:	2000      	moveq	r0, #0
    3626:	e794      	b.n	3552 <gpio_nrfx_pin_configure+0x32>
		*drive = NRF_GPIO_PIN_H0D1;
    3628:	2307      	movs	r3, #7
    362a:	e7da      	b.n	35e2 <gpio_nrfx_pin_configure+0xc2>
		*drive = NRF_GPIO_PIN_D0H1;
    362c:	2305      	movs	r3, #5
    362e:	e7d8      	b.n	35e2 <gpio_nrfx_pin_configure+0xc2>
		*drive = NRF_GPIO_PIN_H0H1;
    3630:	2303      	movs	r3, #3
    3632:	e7d6      	b.n	35e2 <gpio_nrfx_pin_configure+0xc2>
		} else if (flags & GPIO_OUTPUT_INIT_LOW) {
    3634:	0562      	lsls	r2, r4, #21
			nrf_gpio_port_out_clear(cfg->port, BIT(pin));
    3636:	bf41      	itttt	mi
    3638:	687b      	ldrmi	r3, [r7, #4]
    363a:	2101      	movmi	r1, #1
    363c:	fa01 f606 	lslmi.w	r6, r1, r6
    p_reg->OUTCLR = clr_mask;
    3640:	f8c3 650c 	strmi.w	r6, [r3, #1292]	; 0x50c
}
    3644:	e7e4      	b.n	3610 <gpio_nrfx_pin_configure+0xf0>
	if (flags & GPIO_PULL_UP) {
    3646:	06e3      	lsls	r3, r4, #27
	err = nrfx_gpiote_input_configure(abs_pin, &input_config, NULL, NULL);
    3648:	f04f 0300 	mov.w	r3, #0
		return NRF_GPIO_PIN_PULLUP;
    364c:	bf54      	ite	pl
    364e:	f3c4 1440 	ubfxpl	r4, r4, #5, #1
    3652:	2403      	movmi	r4, #3
	err = nrfx_gpiote_input_configure(abs_pin, &input_config, NULL, NULL);
    3654:	461a      	mov	r2, r3
    3656:	a901      	add	r1, sp, #4
    3658:	4628      	mov	r0, r5
	nrfx_gpiote_input_config_t input_config = {
    365a:	f88d 4004 	strb.w	r4, [sp, #4]
	err = nrfx_gpiote_input_configure(abs_pin, &input_config, NULL, NULL);
    365e:	f001 fbdd 	bl	4e1c <nrfx_gpiote_input_configure>
	return (err != NRFX_SUCCESS) ? -EINVAL : 0;
    3662:	4b02      	ldr	r3, [pc, #8]	; (366c <gpio_nrfx_pin_configure+0x14c>)
    3664:	4298      	cmp	r0, r3
    3666:	f43f af7f 	beq.w	3568 <gpio_nrfx_pin_configure+0x48>
    366a:	e792      	b.n	3592 <gpio_nrfx_pin_configure+0x72>
    366c:	0bad0000 	.word	0x0bad0000
    3670:	00f00006 	.word	0x00f00006
    3674:	00100006 	.word	0x00100006
    3678:	00400002 	.word	0x00400002

0000367c <flash_nrf_pages_layout>:

static void flash_nrf_pages_layout(const struct device *dev,
				     const struct flash_pages_layout **layout,
				     size_t *layout_size)
{
	*layout = &dev_layout;
    367c:	4b02      	ldr	r3, [pc, #8]	; (3688 <flash_nrf_pages_layout+0xc>)
    367e:	600b      	str	r3, [r1, #0]
	*layout_size = 1;
    3680:	2301      	movs	r3, #1
    3682:	6013      	str	r3, [r2, #0]
}
    3684:	4770      	bx	lr
    3686:	bf00      	nop
    3688:	200012b8 	.word	0x200012b8

0000368c <flash_nrf_get_parameters>:
flash_nrf_get_parameters(const struct device *dev)
{
	ARG_UNUSED(dev);

	return &flash_nrf_parameters;
}
    368c:	4800      	ldr	r0, [pc, #0]	; (3690 <flash_nrf_get_parameters+0x4>)
    368e:	4770      	bx	lr
    3690:	00008c54 	.word	0x00008c54

00003694 <nrf_flash_init>:
	.page_layout = flash_nrf_pages_layout,
#endif
};

static int nrf_flash_init(const struct device *dev)
{
    3694:	b510      	push	{r4, lr}
#ifndef CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE
	nrf_flash_sync_init();
#endif /* !CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE */

#if defined(CONFIG_FLASH_PAGE_LAYOUT)
	dev_layout.pages_count = nrfx_nvmc_flash_page_count_get();
    3696:	f005 f876 	bl	8786 <nrfx_nvmc_flash_page_count_get>
    369a:	4c03      	ldr	r4, [pc, #12]	; (36a8 <nrf_flash_init+0x14>)
    369c:	6020      	str	r0, [r4, #0]
	dev_layout.pages_size = nrfx_nvmc_flash_page_size_get();
    369e:	f005 f86e 	bl	877e <nrfx_nvmc_flash_page_size_get>
    36a2:	6060      	str	r0, [r4, #4]
#endif

	return 0;
}
    36a4:	2000      	movs	r0, #0
    36a6:	bd10      	pop	{r4, pc}
    36a8:	200012b8 	.word	0x200012b8

000036ac <flash_nrf_erase>:
{
    36ac:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    36ae:	460e      	mov	r6, r1
    36b0:	4614      	mov	r4, r2
	uint32_t pg_size = nrfx_nvmc_flash_page_size_get();
    36b2:	f005 f864 	bl	877e <nrfx_nvmc_flash_page_size_get>
	if (is_regular_addr_valid(addr, size)) {
    36b6:	4621      	mov	r1, r4
	uint32_t pg_size = nrfx_nvmc_flash_page_size_get();
    36b8:	4605      	mov	r5, r0
	if (is_regular_addr_valid(addr, size)) {
    36ba:	4630      	mov	r0, r6
    36bc:	f003 f8cf 	bl	685e <is_regular_addr_valid>
    36c0:	4637      	mov	r7, r6
    36c2:	b1f8      	cbz	r0, 3704 <flash_nrf_erase+0x58>
		if (((addr % pg_size) != 0) || ((size % pg_size) != 0)) {
    36c4:	fbb6 f3f5 	udiv	r3, r6, r5
    36c8:	fb05 6313 	mls	r3, r5, r3, r6
    36cc:	b923      	cbnz	r3, 36d8 <flash_nrf_erase+0x2c>
    36ce:	fbb4 f0f5 	udiv	r0, r4, r5
    36d2:	fb05 4010 	mls	r0, r5, r0, r4
    36d6:	b140      	cbz	r0, 36ea <flash_nrf_erase+0x3e>
			LOG_ERR("unaligned address: 0x%08lx:%zu",
    36d8:	480d      	ldr	r0, [pc, #52]	; (3710 <flash_nrf_erase+0x64>)
    36da:	4623      	mov	r3, r4
    36dc:	4632      	mov	r2, r6
    36de:	2145      	movs	r1, #69	; 0x45
		LOG_ERR("invalid address: 0x%08lx:%zu",
    36e0:	f002 fc38 	bl	5f54 <z_log_minimal_printk>
    36e4:	f06f 0015 	mvn.w	r0, #21
    36e8:	e00b      	b.n	3702 <flash_nrf_erase+0x56>
		if (!n_pages) {
    36ea:	42a5      	cmp	r5, r4
    36ec:	d809      	bhi.n	3702 <flash_nrf_erase+0x56>

#endif /* !CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE */

static int erase_op(void *context)
{
	uint32_t pg_size = nrfx_nvmc_flash_page_size_get();
    36ee:	f005 f846 	bl	877e <nrfx_nvmc_flash_page_size_get>
    36f2:	4605      	mov	r5, r0
		if (nrfx_nvmc_page_partial_erase_continue()) {
			e_ctx->len -= pg_size;
			e_ctx->flash_addr += pg_size;
		}
#else
		(void)nrfx_nvmc_page_erase(e_ctx->flash_addr);
    36f4:	4638      	mov	r0, r7
    36f6:	f001 fe4d 	bl	5394 <nrfx_nvmc_page_erase>
			}

		}
#endif /* !CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE */

	} while (e_ctx->len > 0);
    36fa:	1b64      	subs	r4, r4, r5
    36fc:	442f      	add	r7, r5
    36fe:	d1f9      	bne.n	36f4 <flash_nrf_erase+0x48>
	return ret;
    3700:	4620      	mov	r0, r4
}
    3702:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
		LOG_ERR("invalid address: 0x%08lx:%zu",
    3704:	4803      	ldr	r0, [pc, #12]	; (3714 <flash_nrf_erase+0x68>)
    3706:	4623      	mov	r3, r4
    3708:	4632      	mov	r2, r6
    370a:	2145      	movs	r1, #69	; 0x45
    370c:	e7e8      	b.n	36e0 <flash_nrf_erase+0x34>
    370e:	bf00      	nop
    3710:	00009a98 	.word	0x00009a98
    3714:	00009abc 	.word	0x00009abc

00003718 <flash_nrf_read>:
{
    3718:	b570      	push	{r4, r5, r6, lr}
    371a:	460d      	mov	r5, r1
	if (is_regular_addr_valid(addr, len)) {
    371c:	4628      	mov	r0, r5
    371e:	4619      	mov	r1, r3
{
    3720:	4616      	mov	r6, r2
    3722:	461c      	mov	r4, r3
	if (is_regular_addr_valid(addr, len)) {
    3724:	f003 f89b 	bl	685e <is_regular_addr_valid>
    3728:	b940      	cbnz	r0, 373c <flash_nrf_read+0x24>
		LOG_ERR("invalid address: 0x%08lx:%zu",
    372a:	4809      	ldr	r0, [pc, #36]	; (3750 <flash_nrf_read+0x38>)
    372c:	4623      	mov	r3, r4
    372e:	462a      	mov	r2, r5
    3730:	2145      	movs	r1, #69	; 0x45
    3732:	f002 fc0f 	bl	5f54 <z_log_minimal_printk>
    3736:	f06f 0015 	mvn.w	r0, #21
}
    373a:	bd70      	pop	{r4, r5, r6, pc}
	if (!len) {
    373c:	b134      	cbz	r4, 374c <flash_nrf_read+0x34>
	memcpy(data, (void *)addr, len);
    373e:	4622      	mov	r2, r4
    3740:	4629      	mov	r1, r5
    3742:	4630      	mov	r0, r6
    3744:	f002 ff92 	bl	666c <memcpy>
	return 0;
    3748:	2000      	movs	r0, #0
    374a:	e7f6      	b.n	373a <flash_nrf_read+0x22>
		return 0;
    374c:	4620      	mov	r0, r4
    374e:	e7f4      	b.n	373a <flash_nrf_read+0x22>
    3750:	00009abc 	.word	0x00009abc

00003754 <flash_nrf_write>:
{
    3754:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    3756:	460e      	mov	r6, r1
	if (is_regular_addr_valid(addr, len)) {
    3758:	4630      	mov	r0, r6
    375a:	4619      	mov	r1, r3
{
    375c:	4617      	mov	r7, r2
    375e:	461c      	mov	r4, r3
	if (is_regular_addr_valid(addr, len)) {
    3760:	f003 f87d 	bl	685e <is_regular_addr_valid>
    3764:	b940      	cbnz	r0, 3778 <flash_nrf_write+0x24>
		LOG_ERR("invalid address: 0x%08lx:%zu",
    3766:	4814      	ldr	r0, [pc, #80]	; (37b8 <flash_nrf_write+0x64>)
    3768:	4623      	mov	r3, r4
    376a:	4632      	mov	r2, r6
    376c:	2145      	movs	r1, #69	; 0x45
		LOG_ERR("not word-aligned: 0x%08lx:%zu",
    376e:	f002 fbf1 	bl	5f54 <z_log_minimal_printk>
		return -EINVAL;
    3772:	f06f 0015 	mvn.w	r0, #21
}
    3776:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	return (data & 0x3) ? false : true;
    3778:	ea44 0506 	orr.w	r5, r4, r6
	if (!is_aligned_32(addr) || (len % sizeof(uint32_t))) {
    377c:	f015 0503 	ands.w	r5, r5, #3
    3780:	d004      	beq.n	378c <flash_nrf_write+0x38>
		LOG_ERR("not word-aligned: 0x%08lx:%zu",
    3782:	480e      	ldr	r0, [pc, #56]	; (37bc <flash_nrf_write+0x68>)
    3784:	4623      	mov	r3, r4
    3786:	4632      	mov	r2, r6
    3788:	2145      	movs	r1, #69	; 0x45
    378a:	e7f0      	b.n	376e <flash_nrf_write+0x1a>
	if (!len) {
    378c:	b18c      	cbz	r4, 37b2 <flash_nrf_write+0x5e>
		}
#endif /* !CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE */
	}
#endif /* CONFIG_SOC_FLASH_NRF_EMULATE_ONE_BYTE_WRITE_ACCESS */
	/* Write all the 4-byte aligned data */
	while (w_ctx->len >= sizeof(uint32_t)) {
    378e:	192b      	adds	r3, r5, r4
    3790:	2b03      	cmp	r3, #3
    3792:	eba6 0005 	sub.w	r0, r6, r5
    3796:	d806      	bhi.n	37a6 <flash_nrf_write+0x52>

#ifndef NRF_DECLARE_ONLY

NRF_STATIC_INLINE bool nrf_nvmc_ready_check(NRF_NVMC_Type const * p_reg)
{
    return (bool)(p_reg->READY & NVMC_READY_READY_Msk);
    3798:	4a09      	ldr	r2, [pc, #36]	; (37c0 <flash_nrf_write+0x6c>)
    379a:	f8d2 3400 	ldr.w	r3, [r2, #1024]	; 0x400
	while (!nrfx_nvmc_write_done_check()) {
    379e:	07db      	lsls	r3, r3, #31
    37a0:	d5fb      	bpl.n	379a <flash_nrf_write+0x46>
	return ret;
    37a2:	2000      	movs	r0, #0
    37a4:	e7e7      	b.n	3776 <flash_nrf_write+0x22>
		if (SUSPEND_POFWARN()) {
			return -ECANCELED;
		}

		nrfx_nvmc_word_write(w_ctx->flash_addr,
				     UNALIGNED_GET((uint32_t *)w_ctx->data_addr));
    37a6:	1b7b      	subs	r3, r7, r5
    37a8:	3d04      	subs	r5, #4
		nrfx_nvmc_word_write(w_ctx->flash_addr,
    37aa:	6819      	ldr	r1, [r3, #0]
    37ac:	f001 fe12 	bl	53d4 <nrfx_nvmc_word_write>
}
    37b0:	e7ed      	b.n	378e <flash_nrf_write+0x3a>
		return 0;
    37b2:	4620      	mov	r0, r4
    37b4:	e7df      	b.n	3776 <flash_nrf_write+0x22>
    37b6:	bf00      	nop
    37b8:	00009abc 	.word	0x00009abc
    37bc:	00009ade 	.word	0x00009ade
    37c0:	4001e000 	.word	0x4001e000

000037c4 <uarte_nrfx_configure>:
	return 0;
}

static int uarte_nrfx_configure(const struct device *dev,
				const struct uart_config *cfg)
{
    37c4:	b570      	push	{r4, r5, r6, lr}
		break;
	default:
		return -ENOTSUP;
	}
#else
	if (cfg->stop_bits != UART_CFG_STOP_BITS_1) {
    37c6:	794b      	ldrb	r3, [r1, #5]
    37c8:	2b01      	cmp	r3, #1
    37ca:	d120      	bne.n	380e <uarte_nrfx_configure+0x4a>
		return -ENOTSUP;
	}
#endif

	if (cfg->data_bits != UART_CFG_DATA_BITS_8) {
    37cc:	798b      	ldrb	r3, [r1, #6]
    37ce:	2b03      	cmp	r3, #3
    37d0:	d11d      	bne.n	380e <uarte_nrfx_configure+0x4a>
		return -ENOTSUP;
	}

	switch (cfg->flow_ctrl) {
    37d2:	79cc      	ldrb	r4, [r1, #7]
    37d4:	b10c      	cbz	r4, 37da <uarte_nrfx_configure+0x16>
    37d6:	2c01      	cmp	r4, #1
    37d8:	d119      	bne.n	380e <uarte_nrfx_configure+0x4a>
	}

#if defined(UARTE_CONFIG_PARITYTYPE_Msk)
	uarte_cfg.paritytype = NRF_UARTE_PARITYTYPE_EVEN;
#endif
	switch (cfg->parity) {
    37da:	790a      	ldrb	r2, [r1, #4]
    37dc:	b112      	cbz	r2, 37e4 <uarte_nrfx_configure+0x20>
    37de:	2a02      	cmp	r2, #2
    37e0:	d115      	bne.n	380e <uarte_nrfx_configure+0x4a>
    37e2:	220e      	movs	r2, #14
#endif
	default:
		return -ENOTSUP;
	}

	if (baudrate_set(dev, cfg->baudrate) != 0) {
    37e4:	680b      	ldr	r3, [r1, #0]
	return config->uarte_regs;
    37e6:	6845      	ldr	r5, [r0, #4]
	switch (baudrate) {
    37e8:	f5b3 4f16 	cmp.w	r3, #38400	; 0x9600
	return config->uarte_regs;
    37ec:	682d      	ldr	r5, [r5, #0]
	switch (baudrate) {
    37ee:	d062      	beq.n	38b6 <uarte_nrfx_configure+0xf2>
    37f0:	d82b      	bhi.n	384a <uarte_nrfx_configure+0x86>
    37f2:	f5b3 5f16 	cmp.w	r3, #9600	; 0x2580
    37f6:	d061      	beq.n	38bc <uarte_nrfx_configure+0xf8>
    37f8:	d814      	bhi.n	3824 <uarte_nrfx_configure+0x60>
    37fa:	f5b3 6f96 	cmp.w	r3, #1200	; 0x4b0
    37fe:	d05f      	beq.n	38c0 <uarte_nrfx_configure+0xfc>
    3800:	d808      	bhi.n	3814 <uarte_nrfx_configure+0x50>
    3802:	f5b3 7f96 	cmp.w	r3, #300	; 0x12c
    3806:	d05e      	beq.n	38c6 <uarte_nrfx_configure+0x102>
    3808:	f5b3 7f16 	cmp.w	r3, #600	; 0x258
    380c:	d05e      	beq.n	38cc <uarte_nrfx_configure+0x108>
    380e:	f06f 0085 	mvn.w	r0, #133	; 0x85
    3812:	e04f      	b.n	38b4 <uarte_nrfx_configure+0xf0>
    3814:	f5b3 6f16 	cmp.w	r3, #2400	; 0x960
    3818:	d05b      	beq.n	38d2 <uarte_nrfx_configure+0x10e>
    381a:	f5b3 5f96 	cmp.w	r3, #4800	; 0x12c0
    381e:	d1f6      	bne.n	380e <uarte_nrfx_configure+0x4a>
		nrf_baudrate = NRF_UARTE_BAUDRATE_4800;
    3820:	4b36      	ldr	r3, [pc, #216]	; (38fc <uarte_nrfx_configure+0x138>)
    3822:	e03c      	b.n	389e <uarte_nrfx_configure+0xda>
	switch (baudrate) {
    3824:	f5b3 4fe1 	cmp.w	r3, #28800	; 0x7080
    3828:	d056      	beq.n	38d8 <uarte_nrfx_configure+0x114>
    382a:	d807      	bhi.n	383c <uarte_nrfx_configure+0x78>
    382c:	f5b3 5f61 	cmp.w	r3, #14400	; 0x3840
    3830:	d054      	beq.n	38dc <uarte_nrfx_configure+0x118>
    3832:	f5b3 4f96 	cmp.w	r3, #19200	; 0x4b00
    3836:	d1ea      	bne.n	380e <uarte_nrfx_configure+0x4a>
		nrf_baudrate = NRF_UARTE_BAUDRATE_19200;
    3838:	4b31      	ldr	r3, [pc, #196]	; (3900 <uarte_nrfx_configure+0x13c>)
    383a:	e030      	b.n	389e <uarte_nrfx_configure+0xda>
	switch (baudrate) {
    383c:	f647 2612 	movw	r6, #31250	; 0x7a12
    3840:	42b3      	cmp	r3, r6
    3842:	d1e4      	bne.n	380e <uarte_nrfx_configure+0x4a>
		nrf_baudrate = NRF_UARTE_BAUDRATE_31250;
    3844:	f44f 0300 	mov.w	r3, #8388608	; 0x800000
    3848:	e029      	b.n	389e <uarte_nrfx_configure+0xda>
	switch (baudrate) {
    384a:	f5b3 3f61 	cmp.w	r3, #230400	; 0x38400
    384e:	d047      	beq.n	38e0 <uarte_nrfx_configure+0x11c>
    3850:	d813      	bhi.n	387a <uarte_nrfx_configure+0xb6>
    3852:	f5b3 3f96 	cmp.w	r3, #76800	; 0x12c00
    3856:	d046      	beq.n	38e6 <uarte_nrfx_configure+0x122>
    3858:	d809      	bhi.n	386e <uarte_nrfx_configure+0xaa>
    385a:	f64d 26c0 	movw	r6, #56000	; 0xdac0
    385e:	42b3      	cmp	r3, r6
    3860:	d043      	beq.n	38ea <uarte_nrfx_configure+0x126>
    3862:	f5b3 4f61 	cmp.w	r3, #57600	; 0xe100
    3866:	d1d2      	bne.n	380e <uarte_nrfx_configure+0x4a>
		nrf_baudrate = NRF_UARTE_BAUDRATE_57600;
    3868:	f44f 036b 	mov.w	r3, #15400960	; 0xeb0000
    386c:	e017      	b.n	389e <uarte_nrfx_configure+0xda>
	switch (baudrate) {
    386e:	f5b3 3fe1 	cmp.w	r3, #115200	; 0x1c200
    3872:	d1cc      	bne.n	380e <uarte_nrfx_configure+0x4a>
		nrf_baudrate = NRF_UARTE_BAUDRATE_115200;
    3874:	f04f 73eb 	mov.w	r3, #30801920	; 0x1d60000
    3878:	e011      	b.n	389e <uarte_nrfx_configure+0xda>
	switch (baudrate) {
    387a:	f5b3 2f61 	cmp.w	r3, #921600	; 0xe1000
    387e:	d037      	beq.n	38f0 <uarte_nrfx_configure+0x12c>
    3880:	d808      	bhi.n	3894 <uarte_nrfx_configure+0xd0>
    3882:	4e20      	ldr	r6, [pc, #128]	; (3904 <uarte_nrfx_configure+0x140>)
    3884:	42b3      	cmp	r3, r6
    3886:	d036      	beq.n	38f6 <uarte_nrfx_configure+0x132>
    3888:	f5b3 2fe1 	cmp.w	r3, #460800	; 0x70800
    388c:	d1bf      	bne.n	380e <uarte_nrfx_configure+0x4a>
		nrf_baudrate = NRF_UARTE_BAUDRATE_460800;
    388e:	f04f 63e8 	mov.w	r3, #121634816	; 0x7400000
    3892:	e004      	b.n	389e <uarte_nrfx_configure+0xda>
	switch (baudrate) {
    3894:	4e1c      	ldr	r6, [pc, #112]	; (3908 <uarte_nrfx_configure+0x144>)
    3896:	42b3      	cmp	r3, r6
    3898:	d1b9      	bne.n	380e <uarte_nrfx_configure+0x4a>
		nrf_baudrate = NRF_UARTE_BAUDRATE_1000000;
    389a:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
                    | (uint32_t)p_cfg->hwfc;
}

NRF_STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate)
{
    p_reg->BAUDRATE = baudrate;
    389e:	f8c5 3524 	str.w	r3, [r5, #1316]	; 0x524
		return -ENOTSUP;
	}

	nrf_uarte_configure(get_uarte_instance(dev), &uarte_cfg);

	get_dev_data(dev)->uart_config = *cfg;
    38a2:	6903      	ldr	r3, [r0, #16]
    38a4:	c903      	ldmia	r1, {r0, r1}
                    | (uint32_t)p_cfg->hwfc;
    38a6:	4322      	orrs	r2, r4
    38a8:	3304      	adds	r3, #4
    p_reg->CONFIG = (uint32_t)p_cfg->parity
    38aa:	f8c5 256c 	str.w	r2, [r5, #1388]	; 0x56c
    38ae:	e883 0003 	stmia.w	r3, {r0, r1}

	return 0;
    38b2:	2000      	movs	r0, #0
}
    38b4:	bd70      	pop	{r4, r5, r6, pc}
		nrf_baudrate = NRF_UARTE_BAUDRATE_38400;
    38b6:	f44f 031d 	mov.w	r3, #10289152	; 0x9d0000
    38ba:	e7f0      	b.n	389e <uarte_nrfx_configure+0xda>
		nrf_baudrate = NRF_UARTE_BAUDRATE_9600;
    38bc:	4b13      	ldr	r3, [pc, #76]	; (390c <uarte_nrfx_configure+0x148>)
    38be:	e7ee      	b.n	389e <uarte_nrfx_configure+0xda>
		nrf_baudrate = NRF_UARTE_BAUDRATE_1200;
    38c0:	f44f 239e 	mov.w	r3, #323584	; 0x4f000
    38c4:	e7eb      	b.n	389e <uarte_nrfx_configure+0xda>
		nrf_baudrate = 0x00014000;
    38c6:	f44f 33a0 	mov.w	r3, #81920	; 0x14000
    38ca:	e7e8      	b.n	389e <uarte_nrfx_configure+0xda>
	switch (baudrate) {
    38cc:	f44f 331c 	mov.w	r3, #159744	; 0x27000
    38d0:	e7e5      	b.n	389e <uarte_nrfx_configure+0xda>
		nrf_baudrate = NRF_UARTE_BAUDRATE_2400;
    38d2:	f44f 231d 	mov.w	r3, #643072	; 0x9d000
    38d6:	e7e2      	b.n	389e <uarte_nrfx_configure+0xda>
		nrf_baudrate = NRF_UARTE_BAUDRATE_28800;
    38d8:	4b0d      	ldr	r3, [pc, #52]	; (3910 <uarte_nrfx_configure+0x14c>)
    38da:	e7e0      	b.n	389e <uarte_nrfx_configure+0xda>
		nrf_baudrate = NRF_UARTE_BAUDRATE_14400;
    38dc:	4b0d      	ldr	r3, [pc, #52]	; (3914 <uarte_nrfx_configure+0x150>)
    38de:	e7de      	b.n	389e <uarte_nrfx_configure+0xda>
		nrf_baudrate = NRF_UARTE_BAUDRATE_230400;
    38e0:	f04f 736c 	mov.w	r3, #61865984	; 0x3b00000
    38e4:	e7db      	b.n	389e <uarte_nrfx_configure+0xda>
		nrf_baudrate = NRF_UARTE_BAUDRATE_76800;
    38e6:	4b0c      	ldr	r3, [pc, #48]	; (3918 <uarte_nrfx_configure+0x154>)
    38e8:	e7d9      	b.n	389e <uarte_nrfx_configure+0xda>
		nrf_baudrate = NRF_UARTE_BAUDRATE_56000;
    38ea:	f44f 0365 	mov.w	r3, #15007744	; 0xe50000
    38ee:	e7d6      	b.n	389e <uarte_nrfx_configure+0xda>
		nrf_baudrate = NRF_UARTE_BAUDRATE_921600;
    38f0:	f04f 6370 	mov.w	r3, #251658240	; 0xf000000
    38f4:	e7d3      	b.n	389e <uarte_nrfx_configure+0xda>
		nrf_baudrate = NRF_UARTE_BAUDRATE_250000;
    38f6:	f04f 6380 	mov.w	r3, #67108864	; 0x4000000
    38fa:	e7d0      	b.n	389e <uarte_nrfx_configure+0xda>
    38fc:	0013b000 	.word	0x0013b000
    3900:	004ea000 	.word	0x004ea000
    3904:	0003d090 	.word	0x0003d090
    3908:	000f4240 	.word	0x000f4240
    390c:	00275000 	.word	0x00275000
    3910:	0075c000 	.word	0x0075c000
    3914:	003af000 	.word	0x003af000
    3918:	013a9000 	.word	0x013a9000

0000391c <uarte_nrfx_poll_out>:
 *
 * @param dev UARTE device struct
 * @param c Character to send
 */
static void uarte_nrfx_poll_out(const struct device *dev, unsigned char c)
{
    391c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
	struct uarte_nrfx_data *data = get_dev_data(dev);
    391e:	6906      	ldr	r6, [r0, #16]
{
    3920:	4605      	mov	r5, r0
    3922:	460f      	mov	r7, r1
	bool isr_mode = k_is_in_isr() || k_is_pre_kernel();
    3924:	f004 ff9d 	bl	8862 <k_is_in_isr>
    3928:	b910      	cbnz	r0, 3930 <uarte_nrfx_poll_out+0x14>
	return !z_sys_post_kernel;
    392a:	4b1e      	ldr	r3, [pc, #120]	; (39a4 <uarte_nrfx_poll_out+0x88>)
	int key;

	if (isr_mode) {
    392c:	781b      	ldrb	r3, [r3, #0]
    392e:	b9a3      	cbnz	r3, 395a <uarte_nrfx_poll_out+0x3e>
	__asm__ volatile(
    3930:	f04f 0320 	mov.w	r3, #32
    3934:	f3ef 8411 	mrs	r4, BASEPRI
    3938:	f383 8812 	msr	BASEPRI_MAX, r3
    393c:	f3bf 8f6f 	isb	sy
		while (1) {
			key = irq_lock();
			if (is_tx_ready(dev)) {
    3940:	4628      	mov	r0, r5
    3942:	f003 f872 	bl	6a2a <is_tx_ready>
    3946:	bb00      	cbnz	r0, 398a <uarte_nrfx_poll_out+0x6e>
	__asm__ volatile(
    3948:	f384 8811 	msr	BASEPRI, r4
    394c:	f3bf 8f6f 	isb	sy
		"cpsie i;"
		: : : "memory", "cc");
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
}
    3950:	e7ee      	b.n	3930 <uarte_nrfx_poll_out+0x14>
	__asm__ volatile(
    3952:	f384 8811 	msr	BASEPRI, r4
    3956:	f3bf 8f6f 	isb	sy
{
    395a:	2464      	movs	r4, #100	; 0x64
		NRFX_WAIT_FOR(is_tx_ready(dev), 100, 1, res);
    395c:	4628      	mov	r0, r5
    395e:	f003 f864 	bl	6a2a <is_tx_ready>
    3962:	b928      	cbnz	r0, 3970 <uarte_nrfx_poll_out+0x54>
    3964:	2001      	movs	r0, #1
    3966:	f004 feea 	bl	873e <nrfx_busy_wait>
    396a:	3c01      	subs	r4, #1
    396c:	d1f6      	bne.n	395c <uarte_nrfx_poll_out+0x40>
    396e:	e7f4      	b.n	395a <uarte_nrfx_poll_out+0x3e>
	__asm__ volatile(
    3970:	f04f 0320 	mov.w	r3, #32
    3974:	f3ef 8411 	mrs	r4, BASEPRI
    3978:	f383 8812 	msr	BASEPRI_MAX, r3
    397c:	f3bf 8f6f 	isb	sy
			if (is_tx_ready(dev)) {
    3980:	4628      	mov	r0, r5
    3982:	f003 f852 	bl	6a2a <is_tx_ready>
    3986:	2800      	cmp	r0, #0
    3988:	d0e3      	beq.n	3952 <uarte_nrfx_poll_out+0x36>
		}
	} else {
		key = wait_tx_ready(dev);
	}

	data->char_out = c;
    398a:	4631      	mov	r1, r6
	tx_start(dev, &data->char_out, 1);
    398c:	2201      	movs	r2, #1
	data->char_out = c;
    398e:	f801 7f14 	strb.w	r7, [r1, #20]!
	tx_start(dev, &data->char_out, 1);
    3992:	4628      	mov	r0, r5
    3994:	f003 f8dc 	bl	6b50 <tx_start>
	__asm__ volatile(
    3998:	f384 8811 	msr	BASEPRI, r4
    399c:	f3bf 8f6f 	isb	sy

	irq_unlock(key);
}
    39a0:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    39a2:	bf00      	nop
    39a4:	2000354b 	.word	0x2000354b

000039a8 <uarte_0_init>:
				.tx_buffer = uarte##idx##_tx_buffer,	       \
				.tx_buff_size = sizeof(uarte##idx##_tx_buffer),\
			};))

#ifdef CONFIG_UART_0_NRF_UARTE
UART_NRF_UARTE_DEVICE(0);
    39a8:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    39ac:	2101      	movs	r1, #1
    39ae:	4605      	mov	r5, r0
    39b0:	2200      	movs	r2, #0
    39b2:	2002      	movs	r0, #2
    39b4:	f7fe ff86 	bl	28c4 <z_arm_irq_priority_set>
    39b8:	2002      	movs	r0, #2
    39ba:	f7fe ff65 	bl	2888 <arch_irq_enable>
	const struct uarte_nrfx_config *config = get_dev_config(dev);
    39be:	686f      	ldr	r7, [r5, #4]
	struct uarte_nrfx_data *data = get_dev_data(dev);
    39c0:	692e      	ldr	r6, [r5, #16]
	return config->uarte_regs;
    39c2:	683c      	ldr	r4, [r7, #0]
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
    39c4:	2300      	movs	r3, #0
    39c6:	f8c4 3500 	str.w	r3, [r4, #1280]	; 0x500
	data->dev = dev;
    39ca:	6035      	str	r5, [r6, #0]
	const struct uarte_nrfx_config *cfg = get_dev_config(dev);
    39cc:	686b      	ldr	r3, [r5, #4]
		if (cfg->tx_pin != NRF_UARTE_PSEL_DISCONNECTED) {
    39ce:	68d8      	ldr	r0, [r3, #12]
    39d0:	1c41      	adds	r1, r0, #1
    39d2:	d00c      	beq.n	39ee <uarte_0_init+0x46>
    *p_pin = pin_number & 0x1F;
    39d4:	f000 021f 	and.w	r2, r0, #31
    p_reg->OUTSET = set_mask;
    39d8:	f04f 4ca0 	mov.w	ip, #1342177280	; 0x50000000
    nrf_gpio_port_out_set(reg, 1UL << pin_number);
    39dc:	2101      	movs	r1, #1
    39de:	4091      	lsls	r1, r2
    reg->PIN_CNF[pin_number] = cnf;
    39e0:	f502 72e0 	add.w	r2, r2, #448	; 0x1c0
    p_reg->OUTSET = set_mask;
    39e4:	f8cc 1508 	str.w	r1, [ip, #1288]	; 0x508
    reg->PIN_CNF[pin_number] = cnf;
    39e8:	2103      	movs	r1, #3
    39ea:	f84c 1022 	str.w	r1, [ip, r2, lsl #2]
		if (cfg->rx_pin != NRF_UARTE_PSEL_DISCONNECTED) {
    39ee:	6919      	ldr	r1, [r3, #16]
    39f0:	1c4a      	adds	r2, r1, #1
    39f2:	d00e      	beq.n	3a12 <uarte_0_init+0x6a>
			nrf_gpio_cfg_input(cfg->rx_pin,
    39f4:	7f1a      	ldrb	r2, [r3, #28]
    39f6:	2a00      	cmp	r2, #0
    *p_pin = pin_number & 0x1F;
    39f8:	f001 021f 	and.w	r2, r1, #31
    reg->PIN_CNF[pin_number] = cnf;
    39fc:	f502 72e0 	add.w	r2, r2, #448	; 0x1c0
    3a00:	f04f 4ca0 	mov.w	ip, #1342177280	; 0x50000000
           ((uint32_t)pull << GPIO_PIN_CNF_PULL_Pos)   |
    3a04:	bf14      	ite	ne
    3a06:	f04f 0e0c 	movne.w	lr, #12
    3a0a:	f04f 0e00 	moveq.w	lr, #0
    reg->PIN_CNF[pin_number] = cnf;
    3a0e:	f84c e022 	str.w	lr, [ip, r2, lsl #2]
		if (cfg->rts_pin != NRF_UARTE_PSEL_DISCONNECTED) {
    3a12:	f8d3 c014 	ldr.w	ip, [r3, #20]
    3a16:	f1bc 3fff 	cmp.w	ip, #4294967295
    3a1a:	d00f      	beq.n	3a3c <uarte_0_init+0x94>
    *p_pin = pin_number & 0x1F;
    3a1c:	f00c 021f 	and.w	r2, ip, #31
    p_reg->OUTSET = set_mask;
    3a20:	f04f 48a0 	mov.w	r8, #1342177280	; 0x50000000
    nrf_gpio_port_out_set(reg, 1UL << pin_number);
    3a24:	f04f 0e01 	mov.w	lr, #1
    3a28:	fa0e fe02 	lsl.w	lr, lr, r2
    reg->PIN_CNF[pin_number] = cnf;
    3a2c:	f502 72e0 	add.w	r2, r2, #448	; 0x1c0
    p_reg->OUTSET = set_mask;
    3a30:	f8c8 e508 	str.w	lr, [r8, #1288]	; 0x508
    reg->PIN_CNF[pin_number] = cnf;
    3a34:	f04f 0e03 	mov.w	lr, #3
    3a38:	f848 e022 	str.w	lr, [r8, r2, lsl #2]
		if (cfg->cts_pin != NRF_UARTE_PSEL_DISCONNECTED) {
    3a3c:	f8d3 e018 	ldr.w	lr, [r3, #24]
    3a40:	f1be 3fff 	cmp.w	lr, #4294967295
    3a44:	d00e      	beq.n	3a64 <uarte_0_init+0xbc>
			nrf_gpio_cfg_input(cfg->cts_pin,
    3a46:	7f5a      	ldrb	r2, [r3, #29]
    3a48:	2a00      	cmp	r2, #0
    *p_pin = pin_number & 0x1F;
    3a4a:	f00e 021f 	and.w	r2, lr, #31
    reg->PIN_CNF[pin_number] = cnf;
    3a4e:	f502 72e0 	add.w	r2, r2, #448	; 0x1c0
    3a52:	f04f 48a0 	mov.w	r8, #1342177280	; 0x50000000
           ((uint32_t)pull << GPIO_PIN_CNF_PULL_Pos)   |
    3a56:	bf14      	ite	ne
    3a58:	f04f 090c 	movne.w	r9, #12
    3a5c:	f04f 0900 	moveq.w	r9, #0
    reg->PIN_CNF[pin_number] = cnf;
    3a60:	f848 9022 	str.w	r9, [r8, r2, lsl #2]
	nrf_uarte_txrx_pins_set(cfg->uarte_regs, cfg->tx_pin, cfg->rx_pin);
    3a64:	681b      	ldr	r3, [r3, #0]
    p_reg->PSEL.TXD = pseltxd;
    3a66:	f8c3 050c 	str.w	r0, [r3, #1292]	; 0x50c
    p_reg->PSEL.RXD = pselrxd;
    3a6a:	f8c3 1514 	str.w	r1, [r3, #1300]	; 0x514
	err = uarte_nrfx_configure(dev, &get_dev_data(dev)->uart_config);
    3a6e:	6929      	ldr	r1, [r5, #16]
    p_reg->PSEL.RTS = pselrts;
    3a70:	f8c3 c508 	str.w	ip, [r3, #1288]	; 0x508
    3a74:	4628      	mov	r0, r5
    p_reg->PSEL.CTS = pselcts;
    3a76:	f8c3 e510 	str.w	lr, [r3, #1296]	; 0x510
    3a7a:	3104      	adds	r1, #4
    3a7c:	f7ff fea2 	bl	37c4 <uarte_nrfx_configure>
	if (err) {
    3a80:	4605      	mov	r5, r0
    3a82:	b978      	cbnz	r0, 3aa4 <uarte_0_init+0xfc>
	    cfg->flags & UARTE_CFG_FLAG_PPI_ENDTX) {
    3a84:	687b      	ldr	r3, [r7, #4]
	if (IS_ENABLED(CONFIG_UART_ENHANCED_POLL_OUT) &&
    3a86:	0799      	lsls	r1, r3, #30
    3a88:	d522      	bpl.n	3ad0 <uarte_0_init+0x128>
	ret = gppi_channel_alloc(&data->ppi_ch_endtx);
    3a8a:	f106 0016 	add.w	r0, r6, #22
    3a8e:	f001 fcb3 	bl	53f8 <nrfx_ppi_channel_alloc>
	if (ret != NRFX_SUCCESS) {
    3a92:	4b23      	ldr	r3, [pc, #140]	; (3b20 <uarte_0_init+0x178>)
    3a94:	4298      	cmp	r0, r3
    3a96:	d008      	beq.n	3aaa <uarte_0_init+0x102>
		LOG_ERR("Failed to allocate PPI Channel");
    3a98:	4822      	ldr	r0, [pc, #136]	; (3b24 <uarte_0_init+0x17c>)
    3a9a:	2145      	movs	r1, #69	; 0x45
    3a9c:	f002 fa5a 	bl	5f54 <z_log_minimal_printk>
		return -EIO;
    3aa0:	f06f 0504 	mvn.w	r5, #4
UART_NRF_UARTE_DEVICE(0);
    3aa4:	4628      	mov	r0, r5
    3aa6:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
	nrfx_gppi_channel_endpoints_setup(data->ppi_ch_endtx,
    3aaa:	7db0      	ldrb	r0, [r6, #22]
    return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
    3aac:	00c3      	lsls	r3, r0, #3
    3aae:	f103 4380 	add.w	r3, r3, #1073741824	; 0x40000000
    3ab2:	f503 33f8 	add.w	r3, r3, #126976	; 0x1f000
    return (uint32_t)p_reg + (uint32_t)task;
    3ab6:	f104 020c 	add.w	r2, r4, #12
    return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
    3aba:	f504 7190 	add.w	r1, r4, #288	; 0x120
NRF_STATIC_INLINE void nrf_ppi_channel_endpoint_setup(NRF_PPI_Type *    p_reg,
                                                      nrf_ppi_channel_t channel,
                                                      uint32_t          eep,
                                                      uint32_t          tep)
{
    p_reg->CH[(uint32_t) channel].EEP = eep;
    3abe:	f8c3 1510 	str.w	r1, [r3, #1296]	; 0x510
    p_reg->CH[(uint32_t) channel].TEP = tep;
    3ac2:	f8c3 2514 	str.w	r2, [r3, #1300]	; 0x514
    p_reg->CHENSET = mask;
    3ac6:	4a18      	ldr	r2, [pc, #96]	; (3b28 <uarte_0_init+0x180>)
	nrfx_gppi_channels_enable(BIT(data->ppi_ch_endtx));
    3ac8:	2301      	movs	r3, #1
    3aca:	4083      	lsls	r3, r0
    3acc:	f8c2 3504 	str.w	r3, [r2, #1284]	; 0x504
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
    3ad0:	2308      	movs	r3, #8
    3ad2:	f8c4 3500 	str.w	r3, [r4, #1280]	; 0x500
		if (!cfg->disable_rx) {
    3ad6:	7a3b      	ldrb	r3, [r7, #8]
    3ad8:	b95b      	cbnz	r3, 3af2 <uarte_0_init+0x14a>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    3ada:	f8c4 3110 	str.w	r3, [r4, #272]	; 0x110
    3ade:	f8d4 3110 	ldr.w	r3, [r4, #272]	; 0x110
			nrf_uarte_rx_buffer_set(uarte, &data->rx_data, 1);
    3ae2:	f106 0315 	add.w	r3, r6, #21

NRF_STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg,
                                               uint8_t *        p_buffer,
                                               size_t           length)
{
    p_reg->RXD.PTR    = (uint32_t)p_buffer;
    3ae6:	f8c4 3534 	str.w	r3, [r4, #1332]	; 0x534
    p_reg->RXD.MAXCNT = length;
    3aea:	2301      	movs	r3, #1
    3aec:	f8c4 3538 	str.w	r3, [r4, #1336]	; 0x538
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    3af0:	6023      	str	r3, [r4, #0]
	if (!(cfg->flags & UARTE_CFG_FLAG_PPI_ENDTX)) {
    3af2:	687b      	ldr	r3, [r7, #4]
    3af4:	079a      	lsls	r2, r3, #30
    p_reg->INTENSET = mask;
    3af6:	bf5c      	itt	pl
    3af8:	f44f 7280 	movpl.w	r2, #256	; 0x100
    3afc:	f8c4 2304 	strpl.w	r2, [r4, #772]	; 0x304
	if (cfg->flags & UARTE_CFG_FLAG_LOW_POWER) {
    3b00:	06db      	lsls	r3, r3, #27
    3b02:	bf44      	itt	mi
    3b04:	f44f 0380 	movmi.w	r3, #4194304	; 0x400000
    3b08:	f8c4 3304 	strmi.w	r3, [r4, #772]	; 0x304
	nrf_uarte_tx_buffer_set(uarte, &data->char_out, 0);
    3b0c:	3614      	adds	r6, #20
    p_reg->TXD.MAXCNT = length;
    3b0e:	2300      	movs	r3, #0
    p_reg->TXD.PTR    = (uint32_t)p_buffer;
    3b10:	f8c4 6544 	str.w	r6, [r4, #1348]	; 0x544
    p_reg->TXD.MAXCNT = length;
    3b14:	f8c4 3548 	str.w	r3, [r4, #1352]	; 0x548
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    3b18:	2301      	movs	r3, #1
    3b1a:	60a3      	str	r3, [r4, #8]
    3b1c:	60e3      	str	r3, [r4, #12]
UART_NRF_UARTE_DEVICE(0);
    3b1e:	e7c1      	b.n	3aa4 <uarte_0_init+0xfc>
    3b20:	0bad0000 	.word	0x0bad0000
    3b24:	00009b0b 	.word	0x00009b0b
    3b28:	4001f000 	.word	0x4001f000

00003b2c <sys_clock_timeout_handler>:
static void sys_clock_timeout_handler(int32_t chan,
				      uint64_t expire_time,
				      void *user_data)
{
	uint32_t cc_value = absolute_time_to_cc(expire_time);
	uint64_t dticks = (expire_time - last_count) / CYC_PER_TICK;
    3b2c:	4919      	ldr	r1, [pc, #100]	; (3b94 <sys_clock_timeout_handler+0x68>)
{
    3b2e:	b570      	push	{r4, r5, r6, lr}
    3b30:	4604      	mov	r4, r0
	return absolute_time & COUNTER_MAX;
    3b32:	f022 467f 	bic.w	r6, r2, #4278190080	; 0xff000000
	uint64_t dticks = (expire_time - last_count) / CYC_PER_TICK;
    3b36:	6808      	ldr	r0, [r1, #0]

	last_count += dticks * CYC_PER_TICK;
    3b38:	e9c1 2300 	strd	r2, r3, [r1]
	return (cc_value >= ANCHOR_RANGE_START) && (cc_value < ANCHOR_RANGE_END);
    3b3c:	f5a6 1300 	sub.w	r3, r6, #2097152	; 0x200000
	uint64_t dticks = (expire_time - last_count) / CYC_PER_TICK;
    3b40:	1a10      	subs	r0, r2, r0
	if (in_anchor_range(cc_value)) {
    3b42:	f5b3 0f40 	cmp.w	r3, #12582912	; 0xc00000
    3b46:	f04f 0500 	mov.w	r5, #0
    3b4a:	d20a      	bcs.n	3b62 <sys_clock_timeout_handler+0x36>
		anchor = (((uint64_t)overflow_cnt) << COUNTER_BIT_WIDTH) + cc_value;
    3b4c:	4b12      	ldr	r3, [pc, #72]	; (3b98 <sys_clock_timeout_handler+0x6c>)
    3b4e:	6819      	ldr	r1, [r3, #0]
    3b50:	060a      	lsls	r2, r1, #24
    3b52:	0a0b      	lsrs	r3, r1, #8
    3b54:	1992      	adds	r2, r2, r6
    3b56:	4911      	ldr	r1, [pc, #68]	; (3b9c <sys_clock_timeout_handler+0x70>)
    3b58:	f143 0300 	adc.w	r3, r3, #0
    3b5c:	e9c1 2300 	strd	r2, r3, [r1]
		return true;
    3b60:	2501      	movs	r5, #1
		 */
		compare_set(chan, last_count + CYC_PER_TICK,
					  sys_clock_timeout_handler, NULL);
	}

	sys_clock_announce(IS_ENABLED(CONFIG_TICKLESS_KERNEL) ?
    3b62:	f001 fe01 	bl	5768 <sys_clock_announce>
    return p_reg->CC[ch];
    3b66:	00a3      	lsls	r3, r4, #2
    3b68:	f103 4380 	add.w	r3, r3, #1073741824	; 0x40000000
    3b6c:	f503 3388 	add.w	r3, r3, #69632	; 0x11000
    3b70:	f8d3 2540 	ldr.w	r2, [r3, #1344]	; 0x540
			   (int32_t)dticks : (dticks > 0));

	if (cc_value == get_comparator(chan)) {
    3b74:	42b2      	cmp	r2, r6
    3b76:	d10b      	bne.n	3b90 <sys_clock_timeout_handler+0x64>
		 * If anchor was updated we can enable same CC value to trigger
		 * interrupt after full cycle. Else set event in anchor update
		 * range. Since anchor was not updated we know that it's very
		 * far from mid point so setting is done without any protection.
		 */
		if (!anchor_updated) {
    3b78:	b91d      	cbnz	r5, 3b82 <sys_clock_timeout_handler+0x56>
    p_reg->CC[ch] = cc_val;
    3b7a:	f44f 0200 	mov.w	r2, #8388608	; 0x800000
    3b7e:	f8c3 2540 	str.w	r2, [r3, #1344]	; 0x540
    p_reg->EVTENSET = mask;
    3b82:	4b07      	ldr	r3, [pc, #28]	; (3ba0 <sys_clock_timeout_handler+0x74>)
	nrf_rtc_event_enable(RTC, RTC_CHANNEL_INT_MASK(chan));
    3b84:	f44f 3080 	mov.w	r0, #65536	; 0x10000
    3b88:	fa00 f404 	lsl.w	r4, r0, r4
    3b8c:	f8c3 4344 	str.w	r4, [r3, #836]	; 0x344
			set_comparator(chan, COUNTER_HALF_SPAN);
		}
		event_enable(chan);
	}
}
    3b90:	bd70      	pop	{r4, r5, r6, pc}
    3b92:	bf00      	nop
    3b94:	20000100 	.word	0x20000100
    3b98:	200012c8 	.word	0x200012c8
    3b9c:	200000e8 	.word	0x200000e8
    3ba0:	40011000 	.word	0x40011000

00003ba4 <compare_int_lock>:
{
    3ba4:	b510      	push	{r4, lr}
	atomic_val_t prev = atomic_and(&int_mask, ~BIT(chan));
    3ba6:	2301      	movs	r3, #1
    3ba8:	4083      	lsls	r3, r0
	return __atomic_fetch_and(target, value, __ATOMIC_SEQ_CST);
    3baa:	4a11      	ldr	r2, [pc, #68]	; (3bf0 <compare_int_lock+0x4c>)
    3bac:	f3bf 8f5b 	dmb	ish
    3bb0:	43dc      	mvns	r4, r3
    3bb2:	e852 1f00 	ldrex	r1, [r2]
    3bb6:	ea01 0c04 	and.w	ip, r1, r4
    3bba:	e842 ce00 	strex	lr, ip, [r2]
    3bbe:	f1be 0f00 	cmp.w	lr, #0
    3bc2:	d1f6      	bne.n	3bb2 <compare_int_lock+0xe>
    3bc4:	f3bf 8f5b 	dmb	ish
	nrf_rtc_int_disable(RTC, RTC_CHANNEL_INT_MASK(chan));
    3bc8:	f44f 3280 	mov.w	r2, #65536	; 0x10000
    3bcc:	fa02 f000 	lsl.w	r0, r2, r0
    p_reg->INTENCLR = mask;
    3bd0:	f102 4280 	add.w	r2, r2, #1073741824	; 0x40000000
    3bd4:	f502 5280 	add.w	r2, r2, #4096	; 0x1000
    3bd8:	f8c2 0308 	str.w	r0, [r2, #776]	; 0x308
  __ASM volatile ("dmb 0xF":::"memory");
    3bdc:	f3bf 8f5f 	dmb	sy
  __ASM volatile ("isb 0xF":::"memory");
    3be0:	f3bf 8f6f 	isb	sy
	return prev & BIT(chan);
    3be4:	420b      	tst	r3, r1
}
    3be6:	bf14      	ite	ne
    3be8:	2001      	movne	r0, #1
    3bea:	2000      	moveq	r0, #0
    3bec:	bd10      	pop	{r4, pc}
    3bee:	bf00      	nop
    3bf0:	200012c4 	.word	0x200012c4

00003bf4 <compare_int_unlock.part.0>:
		atomic_or(&int_mask, BIT(chan));
    3bf4:	2301      	movs	r3, #1
	return __atomic_fetch_or(target, value, __ATOMIC_SEQ_CST);
    3bf6:	4a12      	ldr	r2, [pc, #72]	; (3c40 <compare_int_unlock.part.0+0x4c>)
    3bf8:	f3bf 8f5b 	dmb	ish
    3bfc:	4083      	lsls	r3, r0
    3bfe:	e852 1f00 	ldrex	r1, [r2]
    3c02:	4319      	orrs	r1, r3
    3c04:	e842 1c00 	strex	ip, r1, [r2]
    3c08:	f1bc 0f00 	cmp.w	ip, #0
    3c0c:	d1f7      	bne.n	3bfe <compare_int_unlock.part.0+0xa>
    3c0e:	f3bf 8f5b 	dmb	ish
    p_reg->INTENSET = mask;
    3c12:	4a0c      	ldr	r2, [pc, #48]	; (3c44 <compare_int_unlock.part.0+0x50>)
		nrf_rtc_int_enable(RTC, RTC_CHANNEL_INT_MASK(chan));
    3c14:	f44f 3380 	mov.w	r3, #65536	; 0x10000
    3c18:	4083      	lsls	r3, r0
    3c1a:	f8c2 3304 	str.w	r3, [r2, #772]	; 0x304
	return __atomic_load_n(target, __ATOMIC_SEQ_CST);
    3c1e:	4b0a      	ldr	r3, [pc, #40]	; (3c48 <compare_int_unlock.part.0+0x54>)
    3c20:	f3bf 8f5b 	dmb	ish
    3c24:	681b      	ldr	r3, [r3, #0]
    3c26:	f3bf 8f5b 	dmb	ish
		if (atomic_get(&force_isr_mask) & BIT(chan)) {
    3c2a:	fa23 f000 	lsr.w	r0, r3, r0
    3c2e:	07c3      	lsls	r3, r0, #31
    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    3c30:	bf42      	ittt	mi
    3c32:	4b06      	ldrmi	r3, [pc, #24]	; (3c4c <compare_int_unlock.part.0+0x58>)
    3c34:	f44f 3200 	movmi.w	r2, #131072	; 0x20000
    3c38:	f8c3 2100 	strmi.w	r2, [r3, #256]	; 0x100
}
    3c3c:	4770      	bx	lr
    3c3e:	bf00      	nop
    3c40:	200012c4 	.word	0x200012c4
    3c44:	40011000 	.word	0x40011000
    3c48:	200012c0 	.word	0x200012c0
    3c4c:	e000e100 	.word	0xe000e100

00003c50 <z_nrf_rtc_timer_read>:
	uint64_t val = ((uint64_t)overflow_cnt) << COUNTER_BIT_WIDTH;
    3c50:	4b0d      	ldr	r3, [pc, #52]	; (3c88 <z_nrf_rtc_timer_read+0x38>)
    3c52:	681b      	ldr	r3, [r3, #0]
    3c54:	0a19      	lsrs	r1, r3, #8
    3c56:	0618      	lsls	r0, r3, #24
  __ASM volatile ("dmb 0xF":::"memory");
    3c58:	f3bf 8f5f 	dmb	sy
     return p_reg->COUNTER;
    3c5c:	4b0b      	ldr	r3, [pc, #44]	; (3c8c <z_nrf_rtc_timer_read+0x3c>)
    3c5e:	f8d3 3504 	ldr.w	r3, [r3, #1284]	; 0x504
	val += cntr;
    3c62:	18c0      	adds	r0, r0, r3
    3c64:	f141 0100 	adc.w	r1, r1, #0
	if (cntr < OVERFLOW_RISK_RANGE_END) {
    3c68:	f5b3 1f80 	cmp.w	r3, #1048576	; 0x100000
    3c6c:	d20a      	bcs.n	3c84 <z_nrf_rtc_timer_read+0x34>
		if (val < anchor) {
    3c6e:	4b08      	ldr	r3, [pc, #32]	; (3c90 <z_nrf_rtc_timer_read+0x40>)
    3c70:	e9d3 2300 	ldrd	r2, r3, [r3]
    3c74:	4299      	cmp	r1, r3
    3c76:	bf08      	it	eq
    3c78:	4290      	cmpeq	r0, r2
    3c7a:	d203      	bcs.n	3c84 <z_nrf_rtc_timer_read+0x34>
			val += COUNTER_SPAN;
    3c7c:	f110 7080 	adds.w	r0, r0, #16777216	; 0x1000000
    3c80:	f141 0100 	adc.w	r1, r1, #0
}
    3c84:	4770      	bx	lr
    3c86:	bf00      	nop
    3c88:	200012c8 	.word	0x200012c8
    3c8c:	40011000 	.word	0x40011000
    3c90:	200000e8 	.word	0x200000e8

00003c94 <compare_set>:
{
    3c94:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    3c98:	b085      	sub	sp, #20
    3c9a:	4616      	mov	r6, r2
    3c9c:	461f      	mov	r7, r3
    3c9e:	4605      	mov	r5, r0
	key = compare_int_lock(chan);
    3ca0:	f7ff ff80 	bl	3ba4 <compare_int_lock>
    3ca4:	9001      	str	r0, [sp, #4]
	uint64_t curr_time = z_nrf_rtc_timer_read();
    3ca6:	f7ff ffd3 	bl	3c50 <z_nrf_rtc_timer_read>
	if (curr_time < target_time) {
    3caa:	42b9      	cmp	r1, r7
    3cac:	bf08      	it	eq
    3cae:	42b0      	cmpeq	r0, r6
    3cb0:	d27f      	bcs.n	3db2 <compare_set+0x11e>
		if (target_time - curr_time > COUNTER_SPAN) {
    3cb2:	ebb6 0800 	subs.w	r8, r6, r0
    3cb6:	eb67 0901 	sbc.w	r9, r7, r1
    3cba:	2300      	movs	r3, #0
    3cbc:	f04f 7280 	mov.w	r2, #16777216	; 0x1000000
    3cc0:	454b      	cmp	r3, r9
    3cc2:	bf08      	it	eq
    3cc4:	4542      	cmpeq	r2, r8
    3cc6:	f0c0 8085 	bcc.w	3dd4 <compare_set+0x140>
		if (target_time != cc_data[chan].target_time) {
    3cca:	4b44      	ldr	r3, [pc, #272]	; (3ddc <compare_set+0x148>)
    3ccc:	eb03 1305 	add.w	r3, r3, r5, lsl #4
    3cd0:	e9d3 2302 	ldrd	r2, r3, [r3, #8]
    3cd4:	429f      	cmp	r7, r3
    3cd6:	bf08      	it	eq
    3cd8:	4296      	cmpeq	r6, r2
    3cda:	d054      	beq.n	3d86 <compare_set+0xf2>
    3cdc:	ea4f 0985 	mov.w	r9, r5, lsl #2
	nrf_rtc_event_enable(RTC, RTC_CHANNEL_INT_MASK(chan));
    3ce0:	f44f 3b80 	mov.w	fp, #65536	; 0x10000
    3ce4:	f109 4980 	add.w	r9, r9, #1073741824	; 0x40000000
	nrf_rtc_event_clear(RTC, RTC_CHANNEL_EVENT_ADDR(chan));
    3ce8:	f105 0850 	add.w	r8, r5, #80	; 0x50
	nrf_rtc_event_enable(RTC, RTC_CHANNEL_INT_MASK(chan));
    3cec:	fa0b f205 	lsl.w	r2, fp, r5
    3cf0:	f509 3988 	add.w	r9, r9, #69632	; 0x11000
	nrf_rtc_event_clear(RTC, RTC_CHANNEL_EVENT_ADDR(chan));
    3cf4:	ea4f 0888 	mov.w	r8, r8, lsl #2
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    3cf8:	fa1f f888 	uxth.w	r8, r8
	nrf_rtc_event_enable(RTC, RTC_CHANNEL_INT_MASK(chan));
    3cfc:	9202      	str	r2, [sp, #8]
     return p_reg->COUNTER;
    3cfe:	4a38      	ldr	r2, [pc, #224]	; (3de0 <compare_set+0x14c>)
    return p_reg->CC[ch];
    3d00:	f8d9 0540 	ldr.w	r0, [r9, #1344]	; 0x540
	return absolute_time & COUNTER_MAX;
    3d04:	f026 437f 	bic.w	r3, r6, #4278190080	; 0xff000000
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    3d08:	f108 4880 	add.w	r8, r8, #1073741824	; 0x40000000
    3d0c:	f508 3888 	add.w	r8, r8, #69632	; 0x11000
	uint32_t cc_val = abs_val & COUNTER_MAX;
    3d10:	461c      	mov	r4, r3
    3d12:	4693      	mov	fp, r2
     return p_reg->COUNTER;
    3d14:	f8d2 a504 	ldr.w	sl, [r2, #1284]	; 0x504
	return (a - b) & COUNTER_MAX;
    3d18:	eba0 000a 	sub.w	r0, r0, sl
    3d1c:	f020 407f 	bic.w	r0, r0, #4278190080	; 0xff000000
	nrf_rtc_cc_set(RTC, chan, cyc & COUNTER_MAX);
    3d20:	f02a 417f 	bic.w	r1, sl, #4278190080	; 0xff000000
		if (counter_sub(prev_cc, now) == 1) {
    3d24:	2801      	cmp	r0, #1
    p_reg->CC[ch] = cc_val;
    3d26:	f8c9 1540 	str.w	r1, [r9, #1344]	; 0x540
    3d2a:	d105      	bne.n	3d38 <compare_set+0xa4>
    3d2c:	9303      	str	r3, [sp, #12]
    3d2e:	2013      	movs	r0, #19
    3d30:	f004 fd9d 	bl	886e <z_impl_k_busy_wait>
    3d34:	4a2a      	ldr	r2, [pc, #168]	; (3de0 <compare_set+0x14c>)
    3d36:	9b03      	ldr	r3, [sp, #12]
    p_reg->EVTENSET = mask;
    3d38:	9902      	ldr	r1, [sp, #8]
		if (counter_sub(cc_val, now + 2) > COUNTER_HALF_SPAN) {
    3d3a:	f10a 0c02 	add.w	ip, sl, #2
	return (a - b) & COUNTER_MAX;
    3d3e:	eba4 000c 	sub.w	r0, r4, ip
    3d42:	f020 407f 	bic.w	r0, r0, #4278190080	; 0xff000000
			cc_val = now + 2;
    3d46:	f5b0 0f00 	cmp.w	r0, #8388608	; 0x800000
    3d4a:	bf88      	it	hi
    3d4c:	4664      	movhi	r4, ip
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    3d4e:	2000      	movs	r0, #0
    3d50:	f8c8 0000 	str.w	r0, [r8]
    3d54:	f8d8 0000 	ldr.w	r0, [r8]
    p_reg->EVTENSET = mask;
    3d58:	f8cb 1344 	str.w	r1, [fp, #836]	; 0x344
	nrf_rtc_cc_set(RTC, chan, cyc & COUNTER_MAX);
    3d5c:	f024 407f 	bic.w	r0, r4, #4278190080	; 0xff000000
    p_reg->CC[ch] = cc_val;
    3d60:	f8c9 0540 	str.w	r0, [r9, #1344]	; 0x540
     return p_reg->COUNTER;
    3d64:	f8db 0504 	ldr.w	r0, [fp, #1284]	; 0x504
		 (counter_sub(cc_val, now2 + 2) > COUNTER_HALF_SPAN));
    3d68:	4582      	cmp	sl, r0
    3d6a:	d006      	beq.n	3d7a <compare_set+0xe6>
	return (a - b) & COUNTER_MAX;
    3d6c:	1a20      	subs	r0, r4, r0
    3d6e:	3802      	subs	r0, #2
    3d70:	f020 407f 	bic.w	r0, r0, #4278190080	; 0xff000000
	} while ((now2 != now) &&
    3d74:	f5b0 0f00 	cmp.w	r0, #8388608	; 0x800000
    3d78:	d819      	bhi.n	3dae <compare_set+0x11a>
	return (a - b) & COUNTER_MAX;
    3d7a:	1ae4      	subs	r4, r4, r3
    3d7c:	f024 447f 	bic.w	r4, r4, #4278190080	; 0xff000000
			target_time += counter_sub(cc_set, cc_value);
    3d80:	1932      	adds	r2, r6, r4
    3d82:	f147 0300 	adc.w	r3, r7, #0
	cc_data[chan].target_time = target_time;
    3d86:	4c15      	ldr	r4, [pc, #84]	; (3ddc <compare_set+0x148>)
    3d88:	0129      	lsls	r1, r5, #4
    3d8a:	eb04 1005 	add.w	r0, r4, r5, lsl #4
    3d8e:	e9c0 2302 	strd	r2, r3, [r0, #8]
	cc_data[chan].callback = handler;
    3d92:	9a0e      	ldr	r2, [sp, #56]	; 0x38
	cc_data[chan].user_context = user_data;
    3d94:	9b0f      	ldr	r3, [sp, #60]	; 0x3c
	cc_data[chan].callback = handler;
    3d96:	5062      	str	r2, [r4, r1]
	cc_data[chan].user_context = user_data;
    3d98:	6043      	str	r3, [r0, #4]
	return ret;
    3d9a:	2400      	movs	r4, #0
	if (key) {
    3d9c:	9b01      	ldr	r3, [sp, #4]
    3d9e:	b113      	cbz	r3, 3da6 <compare_set+0x112>
    3da0:	4628      	mov	r0, r5
    3da2:	f7ff ff27 	bl	3bf4 <compare_int_unlock.part.0>
}
    3da6:	4620      	mov	r0, r4
    3da8:	b005      	add	sp, #20
    3daa:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    3dae:	4620      	mov	r0, r4
    3db0:	e7b0      	b.n	3d14 <compare_set+0x80>
		atomic_or(&force_isr_mask, BIT(chan));
    3db2:	2301      	movs	r3, #1
	return __atomic_fetch_or(target, value, __ATOMIC_SEQ_CST);
    3db4:	4a0b      	ldr	r2, [pc, #44]	; (3de4 <compare_set+0x150>)
    3db6:	f3bf 8f5b 	dmb	ish
    3dba:	40ab      	lsls	r3, r5
    3dbc:	e852 1f00 	ldrex	r1, [r2]
    3dc0:	4319      	orrs	r1, r3
    3dc2:	e842 1000 	strex	r0, r1, [r2]
    3dc6:	2800      	cmp	r0, #0
    3dc8:	d1f8      	bne.n	3dbc <compare_set+0x128>
    3dca:	f3bf 8f5b 	dmb	ish
    3dce:	4632      	mov	r2, r6
    3dd0:	463b      	mov	r3, r7
    3dd2:	e7d8      	b.n	3d86 <compare_set+0xf2>
			return -EINVAL;
    3dd4:	f06f 0415 	mvn.w	r4, #21
    3dd8:	e7e0      	b.n	3d9c <compare_set+0x108>
    3dda:	bf00      	nop
    3ddc:	200000f0 	.word	0x200000f0
    3de0:	40011000 	.word	0x40011000
    3de4:	200012c0 	.word	0x200012c0

00003de8 <sys_clock_driver_init>:
{
	return (uint32_t)z_nrf_rtc_timer_read();
}

static int sys_clock_driver_init(const struct device *dev)
{
    3de8:	b573      	push	{r0, r1, r4, r5, r6, lr}
			CLOCK_CONTROL_NRF_LF_START_STABLE);

	/* TODO: replace with counter driver to access RTC */
	nrf_rtc_prescaler_set(RTC, 0);
	for (int32_t chan = 0; chan < CHAN_COUNT; chan++) {
		cc_data[chan].target_time = TARGET_TIME_INVALID;
    3dea:	4b19      	ldr	r3, [pc, #100]	; (3e50 <sys_clock_driver_init+0x68>)
    p_reg->PRESCALER = val;
    3dec:	4d19      	ldr	r5, [pc, #100]	; (3e54 <sys_clock_driver_init+0x6c>)
    3dee:	2400      	movs	r4, #0
    3df0:	f04f 30ff 	mov.w	r0, #4294967295
    3df4:	f04f 31ff 	mov.w	r1, #4294967295
    3df8:	f8c5 4508 	str.w	r4, [r5, #1288]	; 0x508
    3dfc:	e9c3 0102 	strd	r0, r1, [r3, #8]
    p_reg->INTENSET = mask;
    3e00:	f44f 3380 	mov.w	r3, #65536	; 0x10000
    3e04:	f8c5 3304 	str.w	r3, [r5, #772]	; 0x304
    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    3e08:	4b13      	ldr	r3, [pc, #76]	; (3e58 <sys_clock_driver_init+0x70>)
    3e0a:	2602      	movs	r6, #2
    3e0c:	f44f 3200 	mov.w	r2, #131072	; 0x20000

	nrf_rtc_int_enable(RTC, NRF_RTC_INT_OVERFLOW_MASK);

	NVIC_ClearPendingIRQ(RTC_IRQn);

	IRQ_CONNECT(RTC_IRQn, DT_IRQ(DT_NODELABEL(RTC_LABEL), priority),
    3e10:	2101      	movs	r1, #1
    3e12:	f8c5 6304 	str.w	r6, [r5, #772]	; 0x304
    3e16:	2011      	movs	r0, #17
    3e18:	f8c3 2180 	str.w	r2, [r3, #384]	; 0x180
    3e1c:	4622      	mov	r2, r4
    3e1e:	f7fe fd51 	bl	28c4 <z_arm_irq_priority_set>
		    rtc_nrf_isr, 0, 0);
	irq_enable(RTC_IRQn);
    3e22:	2011      	movs	r0, #17
    3e24:	f7fe fd30 	bl	2888 <arch_irq_enable>
    *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
    3e28:	4a0c      	ldr	r2, [pc, #48]	; (3e5c <sys_clock_driver_init+0x74>)
    3e2a:	2301      	movs	r3, #1
    3e2c:	6013      	str	r3, [r2, #0]

	nrf_rtc_task_trigger(RTC, NRF_RTC_TASK_CLEAR);
	nrf_rtc_task_trigger(RTC, NRF_RTC_TASK_START);

	int_mask = BIT_MASK(CHAN_COUNT);
    3e2e:	4a0c      	ldr	r2, [pc, #48]	; (3e60 <sys_clock_driver_init+0x78>)
    3e30:	602b      	str	r3, [r5, #0]
    3e32:	6013      	str	r3, [r2, #0]

	uint32_t initial_timeout = IS_ENABLED(CONFIG_TICKLESS_KERNEL) ?
		(COUNTER_HALF_SPAN - 1) :
		(counter() + CYC_PER_TICK);

	compare_set(0, initial_timeout, sys_clock_timeout_handler, NULL);
    3e34:	4b0b      	ldr	r3, [pc, #44]	; (3e64 <sys_clock_driver_init+0x7c>)
    3e36:	4a0c      	ldr	r2, [pc, #48]	; (3e68 <sys_clock_driver_init+0x80>)
    3e38:	9300      	str	r3, [sp, #0]
    3e3a:	9401      	str	r4, [sp, #4]
    3e3c:	2300      	movs	r3, #0
    3e3e:	4620      	mov	r0, r4
    3e40:	f7ff ff28 	bl	3c94 <compare_set>

	z_nrf_clock_control_lf_on(mode);
    3e44:	4630      	mov	r0, r6
    3e46:	f7ff fa19 	bl	327c <z_nrf_clock_control_lf_on>

	return 0;
}
    3e4a:	4620      	mov	r0, r4
    3e4c:	b002      	add	sp, #8
    3e4e:	bd70      	pop	{r4, r5, r6, pc}
    3e50:	200000f0 	.word	0x200000f0
    3e54:	40011000 	.word	0x40011000
    3e58:	e000e100 	.word	0xe000e100
    3e5c:	40011008 	.word	0x40011008
    3e60:	200012c4 	.word	0x200012c4
    3e64:	00003b2d 	.word	0x00003b2d
    3e68:	007fffff 	.word	0x007fffff

00003e6c <rtc_nrf_isr>:
{
    3e6c:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
    return p_reg->INTENSET & mask;
    3e70:	4c34      	ldr	r4, [pc, #208]	; (3f44 <rtc_nrf_isr+0xd8>)
    3e72:	f8d4 3304 	ldr.w	r3, [r4, #772]	; 0x304
	if (nrf_rtc_int_enable_check(RTC, NRF_RTC_INT_OVERFLOW_MASK) &&
    3e76:	079a      	lsls	r2, r3, #30
    3e78:	d509      	bpl.n	3e8e <rtc_nrf_isr+0x22>
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    3e7a:	4b33      	ldr	r3, [pc, #204]	; (3f48 <rtc_nrf_isr+0xdc>)
    3e7c:	681a      	ldr	r2, [r3, #0]
    3e7e:	b132      	cbz	r2, 3e8e <rtc_nrf_isr+0x22>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    3e80:	2200      	movs	r2, #0
    3e82:	601a      	str	r2, [r3, #0]
		overflow_cnt++;
    3e84:	4a31      	ldr	r2, [pc, #196]	; (3f4c <rtc_nrf_isr+0xe0>)
    3e86:	681b      	ldr	r3, [r3, #0]
    3e88:	6813      	ldr	r3, [r2, #0]
    3e8a:	3301      	adds	r3, #1
    3e8c:	6013      	str	r3, [r2, #0]
	__asm__ volatile(
    3e8e:	f04f 0320 	mov.w	r3, #32
    3e92:	f3ef 8211 	mrs	r2, BASEPRI
    3e96:	f383 8812 	msr	BASEPRI_MAX, r3
    3e9a:	f3bf 8f6f 	isb	sy
    return p_reg->INTENSET & mask;
    3e9e:	f8d4 3304 	ldr.w	r3, [r4, #772]	; 0x304
	if (nrf_rtc_int_enable_check(RTC, RTC_CHANNEL_INT_MASK(chan))) {
    3ea2:	03db      	lsls	r3, r3, #15
    3ea4:	d512      	bpl.n	3ecc <rtc_nrf_isr+0x60>
	return __atomic_fetch_and(target, value, __ATOMIC_SEQ_CST);
    3ea6:	f3bf 8f5b 	dmb	ish
    3eaa:	4b29      	ldr	r3, [pc, #164]	; (3f50 <rtc_nrf_isr+0xe4>)
    3eac:	e853 1f00 	ldrex	r1, [r3]
    3eb0:	f021 0001 	bic.w	r0, r1, #1
    3eb4:	e843 0600 	strex	r6, r0, [r3]
    3eb8:	2e00      	cmp	r6, #0
    3eba:	d1f7      	bne.n	3eac <rtc_nrf_isr+0x40>
    3ebc:	f3bf 8f5b 	dmb	ish
    3ec0:	4b24      	ldr	r3, [pc, #144]	; (3f54 <rtc_nrf_isr+0xe8>)
		result = atomic_and(&force_isr_mask, ~BIT(chan)) ||
    3ec2:	2900      	cmp	r1, #0
    3ec4:	d136      	bne.n	3f34 <rtc_nrf_isr+0xc8>
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    3ec6:	6819      	ldr	r1, [r3, #0]
		if (result) {
    3ec8:	2900      	cmp	r1, #0
    3eca:	d133      	bne.n	3f34 <rtc_nrf_isr+0xc8>
{
    3ecc:	2300      	movs	r3, #0
	__asm__ volatile(
    3ece:	f382 8811 	msr	BASEPRI, r2
    3ed2:	f3bf 8f6f 	isb	sy
	if (channel_processing_check_and_clear(chan)) {
    3ed6:	b353      	cbz	r3, 3f2e <rtc_nrf_isr+0xc2>
		curr_time = z_nrf_rtc_timer_read();
    3ed8:	f7ff feba 	bl	3c50 <z_nrf_rtc_timer_read>
    3edc:	4606      	mov	r6, r0
	__asm__ volatile(
    3ede:	f04f 0320 	mov.w	r3, #32
    3ee2:	f3ef 8011 	mrs	r0, BASEPRI
    3ee6:	f383 8812 	msr	BASEPRI_MAX, r3
    3eea:	f3bf 8f6f 	isb	sy
		expire_time = cc_data[chan].target_time;
    3eee:	4b1a      	ldr	r3, [pc, #104]	; (3f58 <rtc_nrf_isr+0xec>)
    3ef0:	e9d3 8902 	ldrd	r8, r9, [r3, #8]
		if (curr_time >= expire_time) {
    3ef4:	4549      	cmp	r1, r9
    3ef6:	bf08      	it	eq
    3ef8:	4546      	cmpeq	r6, r8
    3efa:	f04f 0200 	mov.w	r2, #0
    3efe:	d31e      	bcc.n	3f3e <rtc_nrf_isr+0xd2>
			cc_data[chan].target_time = TARGET_TIME_INVALID;
    3f00:	f04f 36ff 	mov.w	r6, #4294967295
    3f04:	f04f 37ff 	mov.w	r7, #4294967295
			user_context = cc_data[chan].user_context;
    3f08:	e9d3 1500 	ldrd	r1, r5, [r3]
			cc_data[chan].target_time = TARGET_TIME_INVALID;
    3f0c:	e9c3 6702 	strd	r6, r7, [r3, #8]
			cc_data[chan].callback = NULL;
    3f10:	601a      	str	r2, [r3, #0]
    p_reg->EVTENCLR = mask;
    3f12:	f44f 3380 	mov.w	r3, #65536	; 0x10000
    3f16:	f8c4 3348 	str.w	r3, [r4, #840]	; 0x348
	__asm__ volatile(
    3f1a:	f380 8811 	msr	BASEPRI, r0
    3f1e:	f3bf 8f6f 	isb	sy
		if (handler) {
    3f22:	b121      	cbz	r1, 3f2e <rtc_nrf_isr+0xc2>
			handler(chan, expire_time, user_context);
    3f24:	9500      	str	r5, [sp, #0]
    3f26:	4642      	mov	r2, r8
    3f28:	464b      	mov	r3, r9
    3f2a:	2000      	movs	r0, #0
    3f2c:	4788      	blx	r1
}
    3f2e:	b003      	add	sp, #12
    3f30:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    3f34:	2100      	movs	r1, #0
    3f36:	6019      	str	r1, [r3, #0]
    3f38:	681b      	ldr	r3, [r3, #0]
		result = atomic_and(&force_isr_mask, ~BIT(chan)) ||
    3f3a:	2301      	movs	r3, #1
}
    3f3c:	e7c7      	b.n	3ece <rtc_nrf_isr+0x62>
		z_nrf_rtc_timer_compare_handler_t handler = NULL;
    3f3e:	4611      	mov	r1, r2
    3f40:	e7eb      	b.n	3f1a <rtc_nrf_isr+0xae>
    3f42:	bf00      	nop
    3f44:	40011000 	.word	0x40011000
    3f48:	40011104 	.word	0x40011104
    3f4c:	200012c8 	.word	0x200012c8
    3f50:	200012c0 	.word	0x200012c0
    3f54:	40011140 	.word	0x40011140
    3f58:	200000f0 	.word	0x200000f0

00003f5c <sys_clock_set_timeout>:
	ticks = (ticks == K_TICKS_FOREVER) ? MAX_TICKS : ticks;
    3f5c:	4b14      	ldr	r3, [pc, #80]	; (3fb0 <sys_clock_set_timeout+0x54>)
{
    3f5e:	b513      	push	{r0, r1, r4, lr}
	ticks = (ticks == K_TICKS_FOREVER) ? MAX_TICKS : ticks;
    3f60:	f1b0 3fff 	cmp.w	r0, #4294967295
    3f64:	bf08      	it	eq
    3f66:	4618      	moveq	r0, r3
	ticks = CLAMP(ticks - 1, 0, (int32_t)MAX_TICKS);
    3f68:	1e44      	subs	r4, r0, #1
    3f6a:	2c00      	cmp	r4, #0
    3f6c:	dd1e      	ble.n	3fac <sys_clock_set_timeout+0x50>
    3f6e:	429c      	cmp	r4, r3
    3f70:	bfa8      	it	ge
    3f72:	461c      	movge	r4, r3
	uint32_t unannounced = z_nrf_rtc_timer_read() - last_count;
    3f74:	f7ff fe6c 	bl	3c50 <z_nrf_rtc_timer_read>
    3f78:	4b0e      	ldr	r3, [pc, #56]	; (3fb4 <sys_clock_set_timeout+0x58>)
	compare_set(0, target_time, sys_clock_timeout_handler, NULL);
    3f7a:	490f      	ldr	r1, [pc, #60]	; (3fb8 <sys_clock_set_timeout+0x5c>)
	uint32_t unannounced = z_nrf_rtc_timer_read() - last_count;
    3f7c:	e9d3 2300 	ldrd	r2, r3, [r3]
    3f80:	1a80      	subs	r0, r0, r2
		ticks = 0;
    3f82:	f5b0 0f00 	cmp.w	r0, #8388608	; 0x800000
    3f86:	bf28      	it	cs
    3f88:	2400      	movcs	r4, #0
	cyc = ticks * CYC_PER_TICK + 1 + unannounced;
    3f8a:	3001      	adds	r0, #1
    3f8c:	4404      	add	r4, r0
	uint64_t target_time = cyc + last_count;
    3f8e:	4808      	ldr	r0, [pc, #32]	; (3fb0 <sys_clock_set_timeout+0x54>)
	compare_set(0, target_time, sys_clock_timeout_handler, NULL);
    3f90:	9100      	str	r1, [sp, #0]
	uint64_t target_time = cyc + last_count;
    3f92:	4284      	cmp	r4, r0
    3f94:	bf28      	it	cs
    3f96:	4604      	movcs	r4, r0
	compare_set(0, target_time, sys_clock_timeout_handler, NULL);
    3f98:	1912      	adds	r2, r2, r4
    3f9a:	f04f 0000 	mov.w	r0, #0
    3f9e:	9001      	str	r0, [sp, #4]
    3fa0:	f143 0300 	adc.w	r3, r3, #0
    3fa4:	f7ff fe76 	bl	3c94 <compare_set>
}
    3fa8:	b002      	add	sp, #8
    3faa:	bd10      	pop	{r4, pc}
	ticks = CLAMP(ticks - 1, 0, (int32_t)MAX_TICKS);
    3fac:	2400      	movs	r4, #0
    3fae:	e7e1      	b.n	3f74 <sys_clock_set_timeout+0x18>
    3fb0:	007fffff 	.word	0x007fffff
    3fb4:	20000100 	.word	0x20000100
    3fb8:	00003b2d 	.word	0x00003b2d

00003fbc <sys_clock_elapsed>:
{
    3fbc:	b508      	push	{r3, lr}
	return (z_nrf_rtc_timer_read() - last_count) / CYC_PER_TICK;
    3fbe:	f7ff fe47 	bl	3c50 <z_nrf_rtc_timer_read>
    3fc2:	4b02      	ldr	r3, [pc, #8]	; (3fcc <sys_clock_elapsed+0x10>)
    3fc4:	681b      	ldr	r3, [r3, #0]
}
    3fc6:	1ac0      	subs	r0, r0, r3
    3fc8:	bd08      	pop	{r3, pc}
    3fca:	bf00      	nop
    3fcc:	20000100 	.word	0x20000100

00003fd0 <k_sys_fatal_error_handler>:
	defined(CONFIG_SPM_SERVICE_NS_HANDLER_FROM_SPM_FAULT)
	z_spm_ns_fatal_error_handler();
#endif

	if (IS_ENABLED(CONFIG_RESET_ON_FATAL_ERROR)) {
		LOG_ERR("Resetting system");
    3fd0:	4803      	ldr	r0, [pc, #12]	; (3fe0 <k_sys_fatal_error_handler+0x10>)
{
    3fd2:	b508      	push	{r3, lr}
		LOG_ERR("Resetting system");
    3fd4:	2145      	movs	r1, #69	; 0x45
    3fd6:	f001 ffbd 	bl	5f54 <z_log_minimal_printk>
		sys_arch_reboot(0);
    3fda:	2000      	movs	r0, #0
    3fdc:	f7ff f82e 	bl	303c <sys_arch_reboot>
		for (;;) {
			/* Spin endlessly */
		}
	}

	CODE_UNREACHABLE;
    3fe0:	00009b46 	.word	0x00009b46

00003fe4 <boot_write_magic>:
}

static inline uint32_t
boot_magic_off(const struct flash_area *fap)
{
    return flash_area_get_size(fap) - BOOT_MAGIC_SZ;
    3fe4:	6881      	ldr	r1, [r0, #8]
    off = boot_magic_off(fap);

    BOOT_LOG_DBG("writing magic; fa_id=%d off=0x%lx (0x%lx)",
                 flash_area_get_id(fap), (unsigned long)off,
                 (unsigned long)(flash_area_get_off(fap) + off));
    rc = flash_area_write(fap, off, boot_img_magic, BOOT_MAGIC_SZ);
    3fe6:	4a05      	ldr	r2, [pc, #20]	; (3ffc <boot_write_magic+0x18>)
{
    3fe8:	b508      	push	{r3, lr}
    rc = flash_area_write(fap, off, boot_img_magic, BOOT_MAGIC_SZ);
    3fea:	3910      	subs	r1, #16
    3fec:	2310      	movs	r3, #16
    3fee:	f001 ffdb 	bl	5fa8 <flash_area_write>
    if (rc != 0) {
        return BOOT_EFLASH;
    }

    return 0;
}
    3ff2:	3800      	subs	r0, #0
    3ff4:	bf18      	it	ne
    3ff6:	2001      	movne	r0, #1
    3ff8:	bd08      	pop	{r3, pc}
    3ffa:	bf00      	nop
    3ffc:	00008cc8 	.word	0x00008cc8

00004000 <boot_read_swap_state>:
{
    4000:	b530      	push	{r4, r5, lr}
    4002:	460c      	mov	r4, r1
    return flash_area_get_size(fap) - BOOT_MAGIC_SZ;
    4004:	6881      	ldr	r1, [r0, #8]
{
    4006:	b087      	sub	sp, #28
    rc = flash_area_read(fap, off, magic, BOOT_MAGIC_SZ);
    4008:	2310      	movs	r3, #16
    400a:	aa02      	add	r2, sp, #8
    400c:	3910      	subs	r1, #16
{
    400e:	4605      	mov	r5, r0
    rc = flash_area_read(fap, off, magic, BOOT_MAGIC_SZ);
    4010:	f001 ffae 	bl	5f70 <flash_area_read>
    if (rc < 0) {
    4014:	2800      	cmp	r0, #0
    4016:	db11      	blt.n	403c <boot_read_swap_state+0x3c>
    if (buffer == NULL || len == 0) {
    4018:	2210      	movs	r2, #16
    401a:	a902      	add	r1, sp, #8
    401c:	4628      	mov	r0, r5
    401e:	f002 fe52 	bl	6cc6 <bootutil_buffer_is_erased.part.0>
    if (bootutil_buffer_is_erased(fap, magic, BOOT_MAGIC_SZ)) {
    4022:	b168      	cbz	r0, 4040 <boot_read_swap_state+0x40>
        state->magic = BOOT_MAGIC_UNSET;
    4024:	2303      	movs	r3, #3
        state->magic = boot_magic_decode(magic);
    4026:	7023      	strb	r3, [r4, #0]
    return boot_copy_done_off(fap) - BOOT_MAX_ALIGN;
    4028:	68a9      	ldr	r1, [r5, #8]
    rc = flash_area_read(fap, off, &swap_info, sizeof swap_info);
    402a:	2301      	movs	r3, #1
    402c:	f10d 0207 	add.w	r2, sp, #7
    4030:	3928      	subs	r1, #40	; 0x28
    4032:	4628      	mov	r0, r5
    4034:	f001 ff9c 	bl	5f70 <flash_area_read>
    if (rc < 0) {
    4038:	2800      	cmp	r0, #0
    403a:	da0b      	bge.n	4054 <boot_read_swap_state+0x54>
        return BOOT_EFLASH;
    403c:	2001      	movs	r0, #1
    403e:	e02a      	b.n	4096 <boot_read_swap_state+0x96>
    if (memcmp(magic, boot_img_magic, BOOT_MAGIC_SZ) == 0) {
    4040:	4916      	ldr	r1, [pc, #88]	; (409c <boot_read_swap_state+0x9c>)
    4042:	2210      	movs	r2, #16
    4044:	a802      	add	r0, sp, #8
    4046:	f002 faea 	bl	661e <memcmp>
    404a:	2800      	cmp	r0, #0
        return BOOT_MAGIC_GOOD;
    404c:	bf14      	ite	ne
    404e:	2302      	movne	r3, #2
    4050:	2301      	moveq	r3, #1
    4052:	e7e8      	b.n	4026 <boot_read_swap_state+0x26>
    state->swap_type = BOOT_GET_SWAP_TYPE(swap_info);
    4054:	f89d 3007 	ldrb.w	r3, [sp, #7]
    4058:	f003 020f 	and.w	r2, r3, #15
    state->image_num = BOOT_GET_IMAGE_NUM(swap_info);
    405c:	091b      	lsrs	r3, r3, #4
    state->swap_type = BOOT_GET_SWAP_TYPE(swap_info);
    405e:	7062      	strb	r2, [r4, #1]
    state->image_num = BOOT_GET_IMAGE_NUM(swap_info);
    4060:	7123      	strb	r3, [r4, #4]
    if (buffer == NULL || len == 0) {
    4062:	2201      	movs	r2, #1
    4064:	f10d 0107 	add.w	r1, sp, #7
    4068:	4628      	mov	r0, r5
    406a:	f002 fe2c 	bl	6cc6 <bootutil_buffer_is_erased.part.0>
    if (bootutil_buffer_is_erased(fap, &swap_info, sizeof swap_info) ||
    406e:	b910      	cbnz	r0, 4076 <boot_read_swap_state+0x76>
    4070:	7863      	ldrb	r3, [r4, #1]
    4072:	2b04      	cmp	r3, #4
    4074:	d903      	bls.n	407e <boot_read_swap_state+0x7e>
        state->swap_type = BOOT_SWAP_TYPE_NONE;
    4076:	2301      	movs	r3, #1
    4078:	7063      	strb	r3, [r4, #1]
        state->image_num = 0;
    407a:	2300      	movs	r3, #0
    407c:	7123      	strb	r3, [r4, #4]
    return boot_image_ok_off(fap) - BOOT_MAX_ALIGN;
    407e:	68aa      	ldr	r2, [r5, #8]
    return boot_read_flag(fap, copy_done, boot_copy_done_off(fap));
    4080:	1ca1      	adds	r1, r4, #2
    4082:	3a20      	subs	r2, #32
    4084:	4628      	mov	r0, r5
    4086:	f002 fe46 	bl	6d16 <boot_read_flag>
    if (rc) {
    408a:	2800      	cmp	r0, #0
    408c:	d1d6      	bne.n	403c <boot_read_swap_state+0x3c>
    return boot_read_image_ok(fap, &state->image_ok);
    408e:	1ce1      	adds	r1, r4, #3
    4090:	4628      	mov	r0, r5
    4092:	f002 fe9b 	bl	6dcc <boot_read_image_ok>
}
    4096:	b007      	add	sp, #28
    4098:	bd30      	pop	{r4, r5, pc}
    409a:	bf00      	nop
    409c:	00008cc8 	.word	0x00008cc8

000040a0 <boot_swap_type_multi>:
    return boot_write_trailer(fap, off, (const uint8_t *) &swap_info, 1);
}

int
boot_swap_type_multi(int image_index)
{
    40a0:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
    40a4:	b085      	sub	sp, #20
    40a6:	4605      	mov	r5, r0

    rc = BOOT_HOOK_CALL(boot_read_swap_state_primary_slot_hook,
                        BOOT_HOOK_REGULAR, image_index, &primary_slot);
    if (rc == BOOT_HOOK_REGULAR)
    {
        rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_PRIMARY(image_index),
    40a8:	4669      	mov	r1, sp
    40aa:	2002      	movs	r0, #2
    40ac:	f002 fe92 	bl	6dd4 <boot_read_swap_state_by_id>
                                        &primary_slot);
    }
    if (rc) {
    40b0:	4604      	mov	r4, r0
    40b2:	b118      	cbz	r0, 40bc <boot_swap_type_multi+0x1c>
        return BOOT_SWAP_TYPE_PANIC;
    40b4:	20ff      	movs	r0, #255	; 0xff
        }
    }

    BOOT_LOG_INF("Swap type: none");
    return BOOT_SWAP_TYPE_NONE;
}
    40b6:	b005      	add	sp, #20
    40b8:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
    rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_SECONDARY(image_index),
    40bc:	a902      	add	r1, sp, #8
    40be:	2005      	movs	r0, #5
    40c0:	f002 fe88 	bl	6dd4 <boot_read_swap_state_by_id>
    if (rc == BOOT_EFLASH) {
    40c4:	2801      	cmp	r0, #1
    40c6:	d138      	bne.n	413a <boot_swap_type_multi+0x9a>
        BOOT_LOG_INF("Secondary image of image pair (%d.) "
    40c8:	4829      	ldr	r0, [pc, #164]	; (4170 <boot_swap_type_multi+0xd0>)
    40ca:	462a      	mov	r2, r5
    40cc:	2149      	movs	r1, #73	; 0x49
    40ce:	f001 ff41 	bl	5f54 <z_log_minimal_printk>
        secondary_slot.magic = BOOT_MAGIC_UNSET;
    40d2:	4b28      	ldr	r3, [pc, #160]	; (4174 <boot_swap_type_multi+0xd4>)
    40d4:	9302      	str	r3, [sp, #8]
        secondary_slot.image_num = 0;
    40d6:	f88d 400c 	strb.w	r4, [sp, #12]
        if (boot_magic_compatible_check(table->magic_primary_slot,
    40da:	f89d 5000 	ldrb.w	r5, [sp]
            boot_magic_compatible_check(table->magic_secondary_slot,
    40de:	f89d 6008 	ldrb.w	r6, [sp, #8]
                table->image_ok_primary_slot == primary_slot.image_ok) &&
    40e2:	f89d 7003 	ldrb.w	r7, [sp, #3]
                table->image_ok_secondary_slot == secondary_slot.image_ok) &&
    40e6:	f89d 800b 	ldrb.w	r8, [sp, #11]
                table->copy_done_primary_slot == primary_slot.copy_done)) {
    40ea:	f89d 9002 	ldrb.w	r9, [sp, #2]
    40ee:	4c22      	ldr	r4, [pc, #136]	; (4178 <boot_swap_type_multi+0xd8>)
    40f0:	2200      	movs	r2, #0
        if (boot_magic_compatible_check(table->magic_primary_slot,
    40f2:	7820      	ldrb	r0, [r4, #0]
    40f4:	4629      	mov	r1, r5
    40f6:	f002 fdfa 	bl	6cee <boot_magic_compatible_check>
    40fa:	b318      	cbz	r0, 4144 <boot_swap_type_multi+0xa4>
            boot_magic_compatible_check(table->magic_secondary_slot,
    40fc:	7860      	ldrb	r0, [r4, #1]
    40fe:	4631      	mov	r1, r6
    4100:	f002 fdf5 	bl	6cee <boot_magic_compatible_check>
                                        primary_slot.magic) &&
    4104:	b1f0      	cbz	r0, 4144 <boot_swap_type_multi+0xa4>
            (table->image_ok_primary_slot == BOOT_FLAG_ANY   ||
    4106:	78a3      	ldrb	r3, [r4, #2]
                                        secondary_slot.magic) &&
    4108:	2b04      	cmp	r3, #4
    410a:	d001      	beq.n	4110 <boot_swap_type_multi+0x70>
            (table->image_ok_primary_slot == BOOT_FLAG_ANY   ||
    410c:	42bb      	cmp	r3, r7
    410e:	d119      	bne.n	4144 <boot_swap_type_multi+0xa4>
            (table->image_ok_secondary_slot == BOOT_FLAG_ANY ||
    4110:	78e3      	ldrb	r3, [r4, #3]
                table->image_ok_primary_slot == primary_slot.image_ok) &&
    4112:	2b04      	cmp	r3, #4
    4114:	d001      	beq.n	411a <boot_swap_type_multi+0x7a>
            (table->image_ok_secondary_slot == BOOT_FLAG_ANY ||
    4116:	4543      	cmp	r3, r8
    4118:	d114      	bne.n	4144 <boot_swap_type_multi+0xa4>
            (table->copy_done_primary_slot == BOOT_FLAG_ANY  ||
    411a:	7923      	ldrb	r3, [r4, #4]
                table->image_ok_secondary_slot == secondary_slot.image_ok) &&
    411c:	2b04      	cmp	r3, #4
    411e:	d10f      	bne.n	4140 <boot_swap_type_multi+0xa0>
            BOOT_LOG_INF("Swap type: %s",
    4120:	7963      	ldrb	r3, [r4, #5]
    4122:	2b02      	cmp	r3, #2
    4124:	d119      	bne.n	415a <boot_swap_type_multi+0xba>
    4126:	4a15      	ldr	r2, [pc, #84]	; (417c <boot_swap_type_multi+0xdc>)
    4128:	4815      	ldr	r0, [pc, #84]	; (4180 <boot_swap_type_multi+0xe0>)
    412a:	2149      	movs	r1, #73	; 0x49
    412c:	f001 ff12 	bl	5f54 <z_log_minimal_printk>
            if (table->swap_type != BOOT_SWAP_TYPE_TEST &&
    4130:	7960      	ldrb	r0, [r4, #5]
    4132:	1e83      	subs	r3, r0, #2
    4134:	2b02      	cmp	r3, #2
    4136:	d9be      	bls.n	40b6 <boot_swap_type_multi+0x16>
    4138:	e7bc      	b.n	40b4 <boot_swap_type_multi+0x14>
    } else if (rc) {
    413a:	2800      	cmp	r0, #0
    413c:	d0cd      	beq.n	40da <boot_swap_type_multi+0x3a>
    413e:	e7b9      	b.n	40b4 <boot_swap_type_multi+0x14>
            (table->copy_done_primary_slot == BOOT_FLAG_ANY  ||
    4140:	454b      	cmp	r3, r9
    4142:	d0ed      	beq.n	4120 <boot_swap_type_multi+0x80>
    for (i = 0; i < BOOT_SWAP_TABLES_COUNT; i++) {
    4144:	3201      	adds	r2, #1
    4146:	2a03      	cmp	r2, #3
    4148:	f104 0406 	add.w	r4, r4, #6
    414c:	d1d1      	bne.n	40f2 <boot_swap_type_multi+0x52>
    BOOT_LOG_INF("Swap type: none");
    414e:	480d      	ldr	r0, [pc, #52]	; (4184 <boot_swap_type_multi+0xe4>)
    4150:	2149      	movs	r1, #73	; 0x49
    4152:	f001 feff 	bl	5f54 <z_log_minimal_printk>
    return BOOT_SWAP_TYPE_NONE;
    4156:	2001      	movs	r0, #1
    4158:	e7ad      	b.n	40b6 <boot_swap_type_multi+0x16>
            BOOT_LOG_INF("Swap type: %s",
    415a:	2b03      	cmp	r3, #3
    415c:	d005      	beq.n	416a <boot_swap_type_multi+0xca>
    415e:	4a0a      	ldr	r2, [pc, #40]	; (4188 <boot_swap_type_multi+0xe8>)
    4160:	490a      	ldr	r1, [pc, #40]	; (418c <boot_swap_type_multi+0xec>)
    4162:	2b04      	cmp	r3, #4
    4164:	bf18      	it	ne
    4166:	460a      	movne	r2, r1
    4168:	e7de      	b.n	4128 <boot_swap_type_multi+0x88>
    416a:	4a09      	ldr	r2, [pc, #36]	; (4190 <boot_swap_type_multi+0xf0>)
    416c:	e7dc      	b.n	4128 <boot_swap_type_multi+0x88>
    416e:	bf00      	nop
    4170:	00009b8b 	.word	0x00009b8b
    4174:	03030103 	.word	0x03030103
    4178:	00009bfe 	.word	0x00009bfe
    417c:	00009b6f 	.word	0x00009b6f
    4180:	00009bd6 	.word	0x00009bd6
    4184:	00009be9 	.word	0x00009be9
    4188:	00009b68 	.word	0x00009b68
    418c:	00009b79 	.word	0x00009b79
    4190:	00009b74 	.word	0x00009b74

00004194 <verify_header>:
}
#endif /* MBEDTLS_MEMORY_DEBUG */

static int verify_header( memory_header *hdr )
{
    if( hdr->magic1 != MAGIC1 )
    4194:	6801      	ldr	r1, [r0, #0]
    4196:	4a0e      	ldr	r2, [pc, #56]	; (41d0 <verify_header+0x3c>)
    4198:	4291      	cmp	r1, r2
{
    419a:	4603      	mov	r3, r0
    if( hdr->magic1 != MAGIC1 )
    419c:	d115      	bne.n	41ca <verify_header+0x36>
        mbedtls_fprintf( stderr, "FATAL: MAGIC1 mismatch\n" );
#endif
        return( 1 );
    }

    if( hdr->magic2 != MAGIC2 )
    419e:	69c1      	ldr	r1, [r0, #28]
    41a0:	f1a2 2210 	sub.w	r2, r2, #268439552	; 0x10001000
    41a4:	f1a2 12ef 	sub.w	r2, r2, #15663343	; 0xef00ef
    41a8:	4291      	cmp	r1, r2
    41aa:	d10e      	bne.n	41ca <verify_header+0x36>
        mbedtls_fprintf( stderr, "FATAL: MAGIC2 mismatch\n" );
#endif
        return( 1 );
    }

    if( hdr->alloc > 1 )
    41ac:	6882      	ldr	r2, [r0, #8]
    41ae:	2a01      	cmp	r2, #1
    41b0:	d80b      	bhi.n	41ca <verify_header+0x36>
        mbedtls_fprintf( stderr, "FATAL: alloc has illegal value\n" );
#endif
        return( 1 );
    }

    if( hdr->prev != NULL && hdr->prev == hdr->next )
    41b2:	68c2      	ldr	r2, [r0, #12]
    41b4:	b112      	cbz	r2, 41bc <verify_header+0x28>
    41b6:	6901      	ldr	r1, [r0, #16]
    41b8:	428a      	cmp	r2, r1
    41ba:	d006      	beq.n	41ca <verify_header+0x36>
        mbedtls_fprintf( stderr, "FATAL: prev == next\n" );
#endif
        return( 1 );
    }

    if( hdr->prev_free != NULL && hdr->prev_free == hdr->next_free )
    41bc:	6958      	ldr	r0, [r3, #20]
    41be:	b128      	cbz	r0, 41cc <verify_header+0x38>
    41c0:	699b      	ldr	r3, [r3, #24]
    41c2:	1a1b      	subs	r3, r3, r0
    41c4:	4258      	negs	r0, r3
    41c6:	4158      	adcs	r0, r3
    41c8:	4770      	bx	lr
        return( 1 );
    41ca:	2001      	movs	r0, #1
#endif
        return( 1 );
    }

    return( 0 );
}
    41cc:	4770      	bx	lr
    41ce:	bf00      	nop
    41d0:	ff00aa55 	.word	0xff00aa55

000041d4 <verify_chain>:

static int verify_chain( void )
{
    memory_header *prv = heap.first, *cur;
    41d4:	4b0d      	ldr	r3, [pc, #52]	; (420c <verify_chain+0x38>)
{
    41d6:	b570      	push	{r4, r5, r6, lr}
    memory_header *prv = heap.first, *cur;
    41d8:	689e      	ldr	r6, [r3, #8]

    if( prv == NULL || verify_header( prv ) != 0 )
    41da:	b1a6      	cbz	r6, 4206 <verify_chain+0x32>
    41dc:	4630      	mov	r0, r6
    41de:	f7ff ffd9 	bl	4194 <verify_header>
    41e2:	4604      	mov	r4, r0
    41e4:	b978      	cbnz	r0, 4206 <verify_chain+0x32>
                                  "failed\n" );
#endif
        return( 1 );
    }

    if( heap.first->prev != NULL )
    41e6:	68f3      	ldr	r3, [r6, #12]
    41e8:	b96b      	cbnz	r3, 4206 <verify_chain+0x32>
                                  "first->prev != NULL\n" );
#endif
        return( 1 );
    }

    cur = heap.first->next;
    41ea:	6935      	ldr	r5, [r6, #16]

    while( cur != NULL )
    41ec:	b90d      	cbnz	r5, 41f2 <verify_chain+0x1e>
        prv = cur;
        cur = cur->next;
    }

    return( 0 );
}
    41ee:	4620      	mov	r0, r4
    41f0:	bd70      	pop	{r4, r5, r6, pc}
        if( verify_header( cur ) != 0 )
    41f2:	4628      	mov	r0, r5
    41f4:	f7ff ffce 	bl	4194 <verify_header>
    41f8:	b928      	cbnz	r0, 4206 <verify_chain+0x32>
        if( cur->prev != prv )
    41fa:	68eb      	ldr	r3, [r5, #12]
    41fc:	42b3      	cmp	r3, r6
    41fe:	d102      	bne.n	4206 <verify_chain+0x32>
        cur = cur->next;
    4200:	462e      	mov	r6, r5
    4202:	692d      	ldr	r5, [r5, #16]
    4204:	e7f2      	b.n	41ec <verify_chain+0x18>
        return( 1 );
    4206:	2401      	movs	r4, #1
    4208:	e7f1      	b.n	41ee <verify_chain+0x1a>
    420a:	bf00      	nop
    420c:	200012cc 	.word	0x200012cc

00004210 <buffer_alloc_calloc>:

static void *buffer_alloc_calloc( size_t n, size_t size )
{
    4210:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
#if defined(MBEDTLS_MEMORY_BACKTRACE)
    void *trace_buffer[MAX_BT];
    size_t trace_cnt;
#endif

    if( heap.buf == NULL || heap.first == NULL )
    4214:	4d40      	ldr	r5, [pc, #256]	; (4318 <buffer_alloc_calloc+0x108>)
    4216:	682c      	ldr	r4, [r5, #0]
    4218:	b1d4      	cbz	r4, 4250 <buffer_alloc_calloc+0x40>
    421a:	68ac      	ldr	r4, [r5, #8]
    421c:	b1c4      	cbz	r4, 4250 <buffer_alloc_calloc+0x40>
        return( NULL );

    original_len = len = n * size;

    if( n == 0 || size == 0 || len / n != size )
    421e:	2800      	cmp	r0, #0
    4220:	d04d      	beq.n	42be <buffer_alloc_calloc+0xae>
    4222:	2900      	cmp	r1, #0
    4224:	d04b      	beq.n	42be <buffer_alloc_calloc+0xae>
    original_len = len = n * size;
    4226:	fb01 f600 	mul.w	r6, r1, r0
    if( n == 0 || size == 0 || len / n != size )
    422a:	fbb6 f0f0 	udiv	r0, r6, r0
    422e:	4288      	cmp	r0, r1
    4230:	d145      	bne.n	42be <buffer_alloc_calloc+0xae>
        return( NULL );
    else if( len > (size_t)-MBEDTLS_MEMORY_ALIGN_MULTIPLE )
    4232:	1d30      	adds	r0, r6, #4
    4234:	d843      	bhi.n	42be <buffer_alloc_calloc+0xae>
        return( NULL );

    if( len % MBEDTLS_MEMORY_ALIGN_MULTIPLE )
    4236:	07b1      	lsls	r1, r6, #30
    4238:	d00d      	beq.n	4256 <buffer_alloc_calloc+0x46>
    {
        len -= len % MBEDTLS_MEMORY_ALIGN_MULTIPLE;
    423a:	f026 0703 	bic.w	r7, r6, #3
        len += MBEDTLS_MEMORY_ALIGN_MULTIPLE;
    423e:	3704      	adds	r7, #4
    memory_header *new, *cur = heap.first_free;
    4240:	68ec      	ldr	r4, [r5, #12]
    4242:	e003      	b.n	424c <buffer_alloc_calloc+0x3c>

    // Find block that fits
    //
    while( cur != NULL )
    {
        if( cur->size >= len )
    4244:	6863      	ldr	r3, [r4, #4]
    4246:	42bb      	cmp	r3, r7
    4248:	d23b      	bcs.n	42c2 <buffer_alloc_calloc+0xb2>
            break;

        cur = cur->next_free;
    424a:	69a4      	ldr	r4, [r4, #24]
    while( cur != NULL )
    424c:	2c00      	cmp	r4, #0
    424e:	d1f9      	bne.n	4244 <buffer_alloc_calloc+0x34>

    ret = (unsigned char *) cur + sizeof( memory_header );
    memset( ret, 0, original_len );

    return( ret );
}
    4250:	4620      	mov	r0, r4
    4252:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
    4256:	4637      	mov	r7, r6
    4258:	e7f2      	b.n	4240 <buffer_alloc_calloc+0x30>
            heap.first_free = cur->next_free;
    425a:	60e8      	str	r0, [r5, #12]
    425c:	e044      	b.n	42e8 <buffer_alloc_calloc+0xd8>
    p = ( (unsigned char *) cur ) + sizeof(memory_header) + len;
    425e:	f107 0c20 	add.w	ip, r7, #32
    4262:	eb04 030c 	add.w	r3, r4, ip
    new->size = cur->size - len - sizeof(memory_header);
    4266:	3920      	subs	r1, #32
    4268:	6059      	str	r1, [r3, #4]
    new->alloc = 0;
    426a:	2100      	movs	r1, #0
    new->prev = cur;
    426c:	e9c3 1402 	strd	r1, r4, [r3, #8]
    new->magic1 = MAGIC1;
    4270:	f8df e0ac 	ldr.w	lr, [pc, #172]	; 4320 <buffer_alloc_calloc+0x110>
    new->next = cur->next;
    4274:	6921      	ldr	r1, [r4, #16]
    4276:	6119      	str	r1, [r3, #16]
    new->magic1 = MAGIC1;
    4278:	f844 e00c 	str.w	lr, [r4, ip]
    new->magic2 = MAGIC2;
    427c:	f8df c0a4 	ldr.w	ip, [pc, #164]	; 4324 <buffer_alloc_calloc+0x114>
    4280:	f8c3 c01c 	str.w	ip, [r3, #28]
    if( new->next != NULL )
    4284:	b101      	cbz	r1, 4288 <buffer_alloc_calloc+0x78>
        new->next->prev = new;
    4286:	60cb      	str	r3, [r1, #12]
    new->next_free = cur->next_free;
    4288:	e9c3 2005 	strd	r2, r0, [r3, #20]
    if( new->prev_free != NULL )
    428c:	b1aa      	cbz	r2, 42ba <buffer_alloc_calloc+0xaa>
        new->prev_free->next_free = new;
    428e:	6193      	str	r3, [r2, #24]
    if( new->next_free != NULL )
    4290:	699a      	ldr	r2, [r3, #24]
    4292:	b102      	cbz	r2, 4296 <buffer_alloc_calloc+0x86>
        new->next_free->prev_free = new;
    4294:	6153      	str	r3, [r2, #20]
    cur->next = new;
    4296:	6123      	str	r3, [r4, #16]
    cur->prev_free = NULL;
    4298:	2300      	movs	r3, #0
    cur->next_free = NULL;
    429a:	e9c4 3305 	strd	r3, r3, [r4, #20]
    if( ( heap.verify & MBEDTLS_MEMORY_VERIFY_ALLOC ) && verify_chain() != 0 )
    429e:	692b      	ldr	r3, [r5, #16]
    cur->alloc = 1;
    42a0:	f04f 0901 	mov.w	r9, #1
    if( ( heap.verify & MBEDTLS_MEMORY_VERIFY_ALLOC ) && verify_chain() != 0 )
    42a4:	07db      	lsls	r3, r3, #31
    cur->size = len;
    42a6:	e9c4 7901 	strd	r7, r9, [r4, #4]
    if( ( heap.verify & MBEDTLS_MEMORY_VERIFY_ALLOC ) && verify_chain() != 0 )
    42aa:	d52d      	bpl.n	4308 <buffer_alloc_calloc+0xf8>
    42ac:	f7ff ff92 	bl	41d4 <verify_chain>
    42b0:	b350      	cbz	r0, 4308 <buffer_alloc_calloc+0xf8>
        mbedtls_exit( 1 );
    42b2:	4b1a      	ldr	r3, [pc, #104]	; (431c <buffer_alloc_calloc+0x10c>)
    42b4:	4648      	mov	r0, r9
    42b6:	681b      	ldr	r3, [r3, #0]
    42b8:	e025      	b.n	4306 <buffer_alloc_calloc+0xf6>
        heap.first_free = new;
    42ba:	60eb      	str	r3, [r5, #12]
    42bc:	e7e8      	b.n	4290 <buffer_alloc_calloc+0x80>
        return( NULL );
    42be:	2400      	movs	r4, #0
    42c0:	e7c6      	b.n	4250 <buffer_alloc_calloc+0x40>
    if( cur->alloc != 0 )
    42c2:	68a3      	ldr	r3, [r4, #8]
    42c4:	b11b      	cbz	r3, 42ce <buffer_alloc_calloc+0xbe>
        mbedtls_exit( 1 );
    42c6:	4b15      	ldr	r3, [pc, #84]	; (431c <buffer_alloc_calloc+0x10c>)
    42c8:	2001      	movs	r0, #1
    42ca:	681b      	ldr	r3, [r3, #0]
    42cc:	4798      	blx	r3
    if( cur->size - len < sizeof(memory_header) +
    42ce:	6861      	ldr	r1, [r4, #4]
    42d0:	1bc9      	subs	r1, r1, r7
    42d2:	2923      	cmp	r1, #35	; 0x23
    42d4:	e9d4 2005 	ldrd	r2, r0, [r4, #20]
    42d8:	f104 0820 	add.w	r8, r4, #32
    42dc:	d8bf      	bhi.n	425e <buffer_alloc_calloc+0x4e>
        cur->alloc = 1;
    42de:	2301      	movs	r3, #1
    42e0:	60a3      	str	r3, [r4, #8]
        if( cur->prev_free != NULL )
    42e2:	2a00      	cmp	r2, #0
    42e4:	d0b9      	beq.n	425a <buffer_alloc_calloc+0x4a>
            cur->prev_free->next_free = cur->next_free;
    42e6:	6190      	str	r0, [r2, #24]
        if( cur->next_free != NULL )
    42e8:	69a3      	ldr	r3, [r4, #24]
    42ea:	b103      	cbz	r3, 42ee <buffer_alloc_calloc+0xde>
            cur->next_free->prev_free = cur->prev_free;
    42ec:	615a      	str	r2, [r3, #20]
        cur->prev_free = NULL;
    42ee:	2300      	movs	r3, #0
        cur->next_free = NULL;
    42f0:	e9c4 3305 	strd	r3, r3, [r4, #20]
        if( ( heap.verify & MBEDTLS_MEMORY_VERIFY_ALLOC ) && verify_chain() != 0 )
    42f4:	692b      	ldr	r3, [r5, #16]
    42f6:	07da      	lsls	r2, r3, #31
    42f8:	d506      	bpl.n	4308 <buffer_alloc_calloc+0xf8>
    42fa:	f7ff ff6b 	bl	41d4 <verify_chain>
    42fe:	b118      	cbz	r0, 4308 <buffer_alloc_calloc+0xf8>
            mbedtls_exit( 1 );
    4300:	4b06      	ldr	r3, [pc, #24]	; (431c <buffer_alloc_calloc+0x10c>)
    4302:	681b      	ldr	r3, [r3, #0]
    4304:	2001      	movs	r0, #1
        mbedtls_exit( 1 );
    4306:	4798      	blx	r3
    memset( ret, 0, original_len );
    4308:	4632      	mov	r2, r6
    430a:	2100      	movs	r1, #0
    430c:	4640      	mov	r0, r8
    ret = (unsigned char *) cur + sizeof( memory_header );
    430e:	4644      	mov	r4, r8
    memset( ret, 0, original_len );
    4310:	f002 f9b7 	bl	6682 <memset>
    return( ret );
    4314:	e79c      	b.n	4250 <buffer_alloc_calloc+0x40>
    4316:	bf00      	nop
    4318:	200012cc 	.word	0x200012cc
    431c:	2000005c 	.word	0x2000005c
    4320:	ff00aa55 	.word	0xff00aa55
    4324:	ee119966 	.word	0xee119966

00004328 <buffer_alloc_free>:

static void buffer_alloc_free( void *ptr )
{
    4328:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    memory_header *hdr, *old = NULL;
    unsigned char *p = (unsigned char *) ptr;

    if( ptr == NULL || heap.buf == NULL || heap.first == NULL )
    432c:	4605      	mov	r5, r0
    432e:	2800      	cmp	r0, #0
    4330:	d07c      	beq.n	442c <buffer_alloc_free+0x104>
    4332:	4e3f      	ldr	r6, [pc, #252]	; (4430 <buffer_alloc_free+0x108>)
    4334:	6833      	ldr	r3, [r6, #0]
    4336:	2b00      	cmp	r3, #0
    4338:	d078      	beq.n	442c <buffer_alloc_free+0x104>
    433a:	68b2      	ldr	r2, [r6, #8]
    433c:	2a00      	cmp	r2, #0
    433e:	d075      	beq.n	442c <buffer_alloc_free+0x104>
        return;

    if( p < heap.buf || p >= heap.buf + heap.len )
    4340:	4283      	cmp	r3, r0
    4342:	d803      	bhi.n	434c <buffer_alloc_free+0x24>
    4344:	6872      	ldr	r2, [r6, #4]
    4346:	4413      	add	r3, r2
    4348:	4298      	cmp	r0, r3
    434a:	d303      	bcc.n	4354 <buffer_alloc_free+0x2c>
    {
#if defined(MBEDTLS_MEMORY_DEBUG)
        mbedtls_fprintf( stderr, "FATAL: mbedtls_free() outside of managed "
                                  "space\n" );
#endif
        mbedtls_exit( 1 );
    434c:	4b39      	ldr	r3, [pc, #228]	; (4434 <buffer_alloc_free+0x10c>)
    434e:	2001      	movs	r0, #1
    4350:	681b      	ldr	r3, [r3, #0]
    4352:	4798      	blx	r3
    }

    p -= sizeof(memory_header);
    4354:	f1a5 0420 	sub.w	r4, r5, #32
    hdr = (memory_header *) p;

    if( verify_header( hdr ) != 0 )
    4358:	4620      	mov	r0, r4
    435a:	f7ff ff1b 	bl	4194 <verify_header>
    435e:	b118      	cbz	r0, 4368 <buffer_alloc_free+0x40>
        mbedtls_exit( 1 );
    4360:	4b34      	ldr	r3, [pc, #208]	; (4434 <buffer_alloc_free+0x10c>)
    4362:	2001      	movs	r0, #1
    4364:	681b      	ldr	r3, [r3, #0]
    4366:	4798      	blx	r3

    if( hdr->alloc != 1 )
    4368:	f855 3c18 	ldr.w	r3, [r5, #-24]
    436c:	2b01      	cmp	r3, #1
    436e:	d003      	beq.n	4378 <buffer_alloc_free+0x50>
    {
#if defined(MBEDTLS_MEMORY_DEBUG)
        mbedtls_fprintf( stderr, "FATAL: mbedtls_free() on unallocated "
                                  "data\n" );
#endif
        mbedtls_exit( 1 );
    4370:	4b30      	ldr	r3, [pc, #192]	; (4434 <buffer_alloc_free+0x10c>)
    4372:	2001      	movs	r0, #1
    4374:	681b      	ldr	r3, [r3, #0]
    4376:	4798      	blx	r3
    hdr->trace_count = 0;
#endif

    // Regroup with block before
    //
    if( hdr->prev != NULL && hdr->prev->alloc == 0 )
    4378:	f855 7c14 	ldr.w	r7, [r5, #-20]
    hdr->alloc = 0;
    437c:	2300      	movs	r3, #0
    437e:	f845 3c18 	str.w	r3, [r5, #-24]
    if( hdr->prev != NULL && hdr->prev->alloc == 0 )
    4382:	b1af      	cbz	r7, 43b0 <buffer_alloc_free+0x88>
    4384:	68ba      	ldr	r2, [r7, #8]
    4386:	b992      	cbnz	r2, 43ae <buffer_alloc_free+0x86>
    {
#if defined(MBEDTLS_MEMORY_DEBUG)
        heap.header_count--;
#endif
        hdr->prev->size += sizeof(memory_header) + hdr->size;
    4388:	f855 3c1c 	ldr.w	r3, [r5, #-28]
    438c:	f103 0220 	add.w	r2, r3, #32
    4390:	687b      	ldr	r3, [r7, #4]
    4392:	4413      	add	r3, r2
    4394:	607b      	str	r3, [r7, #4]
        hdr->prev->next = hdr->next;
    4396:	f855 3c10 	ldr.w	r3, [r5, #-16]
    439a:	613b      	str	r3, [r7, #16]
        old = hdr;
        hdr = hdr->prev;

        if( hdr->next != NULL )
    439c:	b103      	cbz	r3, 43a0 <buffer_alloc_free+0x78>
            hdr->next->prev = hdr;
    439e:	60df      	str	r7, [r3, #12]

        memset( old, 0, sizeof(memory_header) );
    43a0:	4620      	mov	r0, r4
    43a2:	2220      	movs	r2, #32
    43a4:	2100      	movs	r1, #0
    43a6:	f002 f96c 	bl	6682 <memset>
    43aa:	4623      	mov	r3, r4
    43ac:	463c      	mov	r4, r7
    memory_header *hdr, *old = NULL;
    43ae:	461f      	mov	r7, r3
    }

    // Regroup with block after
    //
    if( hdr->next != NULL && hdr->next->alloc == 0 )
    43b0:	6920      	ldr	r0, [r4, #16]
    43b2:	2800      	cmp	r0, #0
    43b4:	d032      	beq.n	441c <buffer_alloc_free+0xf4>
    43b6:	6883      	ldr	r3, [r0, #8]
    43b8:	2b00      	cmp	r3, #0
    43ba:	d12f      	bne.n	441c <buffer_alloc_free+0xf4>
    {
#if defined(MBEDTLS_MEMORY_DEBUG)
        heap.header_count--;
#endif
        hdr->size += sizeof(memory_header) + hdr->next->size;
    43bc:	6863      	ldr	r3, [r4, #4]
    43be:	6842      	ldr	r2, [r0, #4]
    43c0:	3320      	adds	r3, #32
    43c2:	4413      	add	r3, r2
    43c4:	e9d4 2105 	ldrd	r2, r1, [r4, #20]
    43c8:	6063      	str	r3, [r4, #4]
        old = hdr->next;
        hdr->next = hdr->next->next;
    43ca:	6903      	ldr	r3, [r0, #16]
    43cc:	6123      	str	r3, [r4, #16]

        if( hdr->prev_free != NULL || hdr->next_free != NULL )
    43ce:	b9da      	cbnz	r2, 4408 <buffer_alloc_free+0xe0>
    43d0:	bb01      	cbnz	r1, 4414 <buffer_alloc_free+0xec>

            if( hdr->next_free != NULL )
                hdr->next_free->prev_free = hdr->prev_free;
        }

        hdr->prev_free = old->prev_free;
    43d2:	6942      	ldr	r2, [r0, #20]
        hdr->next_free = old->next_free;
    43d4:	6981      	ldr	r1, [r0, #24]
        hdr->prev_free = old->prev_free;
    43d6:	6162      	str	r2, [r4, #20]
        hdr->next_free = old->next_free;
    43d8:	61a1      	str	r1, [r4, #24]

        if( hdr->prev_free != NULL )
    43da:	b1ea      	cbz	r2, 4418 <buffer_alloc_free+0xf0>
            hdr->prev_free->next_free = hdr;
    43dc:	6194      	str	r4, [r2, #24]
        else
            heap.first_free = hdr;

        if( hdr->next_free != NULL )
    43de:	69a2      	ldr	r2, [r4, #24]
    43e0:	b102      	cbz	r2, 43e4 <buffer_alloc_free+0xbc>
            hdr->next_free->prev_free = hdr;
    43e2:	6154      	str	r4, [r2, #20]

        if( hdr->next != NULL )
    43e4:	b103      	cbz	r3, 43e8 <buffer_alloc_free+0xc0>
            hdr->next->prev = hdr;
    43e6:	60dc      	str	r4, [r3, #12]

        memset( old, 0, sizeof(memory_header) );
    43e8:	2220      	movs	r2, #32
    43ea:	2100      	movs	r1, #0
    43ec:	f002 f949 	bl	6682 <memset>
        if( heap.first_free != NULL )
            heap.first_free->prev_free = hdr;
        heap.first_free = hdr;
    }

    if( ( heap.verify & MBEDTLS_MEMORY_VERIFY_FREE ) && verify_chain() != 0 )
    43f0:	6933      	ldr	r3, [r6, #16]
    43f2:	079b      	lsls	r3, r3, #30
    43f4:	d51a      	bpl.n	442c <buffer_alloc_free+0x104>
    43f6:	f7ff feed 	bl	41d4 <verify_chain>
    43fa:	b1b8      	cbz	r0, 442c <buffer_alloc_free+0x104>
        mbedtls_exit( 1 );
    43fc:	4b0d      	ldr	r3, [pc, #52]	; (4434 <buffer_alloc_free+0x10c>)
}
    43fe:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
        mbedtls_exit( 1 );
    4402:	681b      	ldr	r3, [r3, #0]
    4404:	2001      	movs	r0, #1
    4406:	4718      	bx	r3
                hdr->prev_free->next_free = hdr->next_free;
    4408:	6191      	str	r1, [r2, #24]
            if( hdr->next_free != NULL )
    440a:	69a1      	ldr	r1, [r4, #24]
    440c:	2900      	cmp	r1, #0
    440e:	d0e0      	beq.n	43d2 <buffer_alloc_free+0xaa>
                hdr->next_free->prev_free = hdr->prev_free;
    4410:	614a      	str	r2, [r1, #20]
    4412:	e7de      	b.n	43d2 <buffer_alloc_free+0xaa>
                heap.first_free = hdr->next_free;
    4414:	60f1      	str	r1, [r6, #12]
    4416:	e7f8      	b.n	440a <buffer_alloc_free+0xe2>
            heap.first_free = hdr;
    4418:	60f4      	str	r4, [r6, #12]
    441a:	e7e0      	b.n	43de <buffer_alloc_free+0xb6>
    if( old == NULL )
    441c:	2f00      	cmp	r7, #0
    441e:	d1e7      	bne.n	43f0 <buffer_alloc_free+0xc8>
        hdr->next_free = heap.first_free;
    4420:	68f3      	ldr	r3, [r6, #12]
    4422:	61a3      	str	r3, [r4, #24]
        if( heap.first_free != NULL )
    4424:	b103      	cbz	r3, 4428 <buffer_alloc_free+0x100>
            heap.first_free->prev_free = hdr;
    4426:	615c      	str	r4, [r3, #20]
        heap.first_free = hdr;
    4428:	60f4      	str	r4, [r6, #12]
    442a:	e7e1      	b.n	43f0 <buffer_alloc_free+0xc8>
}
    442c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    4430:	200012cc 	.word	0x200012cc
    4434:	2000005c 	.word	0x2000005c

00004438 <mbedtls_memory_buffer_alloc_init>:
    (void) mbedtls_mutex_unlock( &heap.mutex );
}
#endif /* MBEDTLS_THREADING_C */

void mbedtls_memory_buffer_alloc_init( unsigned char *buf, size_t len )
{
    4438:	b538      	push	{r3, r4, r5, lr}
    memset( &heap, 0, sizeof( buffer_alloc_ctx ) );
    443a:	2214      	movs	r2, #20
{
    443c:	460d      	mov	r5, r1
    443e:	4604      	mov	r4, r0
    memset( &heap, 0, sizeof( buffer_alloc_ctx ) );
    4440:	2100      	movs	r1, #0
    4442:	4812      	ldr	r0, [pc, #72]	; (448c <mbedtls_memory_buffer_alloc_init+0x54>)
    4444:	f002 f91d 	bl	6682 <memset>
#if defined(MBEDTLS_THREADING_C)
    mbedtls_mutex_init( &heap.mutex );
    mbedtls_platform_set_calloc_free( buffer_alloc_calloc_mutexed,
                              buffer_alloc_free_mutexed );
#else
    mbedtls_platform_set_calloc_free( buffer_alloc_calloc, buffer_alloc_free );
    4448:	4911      	ldr	r1, [pc, #68]	; (4490 <mbedtls_memory_buffer_alloc_init+0x58>)
    444a:	4812      	ldr	r0, [pc, #72]	; (4494 <mbedtls_memory_buffer_alloc_init+0x5c>)
    444c:	f000 f832 	bl	44b4 <mbedtls_platform_set_calloc_free>
#endif

    if( len < sizeof( memory_header ) + MBEDTLS_MEMORY_ALIGN_MULTIPLE )
    4450:	2d23      	cmp	r5, #35	; 0x23
    4452:	d91a      	bls.n	448a <mbedtls_memory_buffer_alloc_init+0x52>
        return;
    else if( (size_t)buf % MBEDTLS_MEMORY_ALIGN_MULTIPLE )
    4454:	f014 0303 	ands.w	r3, r4, #3
    {
        /* Adjust len first since buf is used in the computation */
        len -= MBEDTLS_MEMORY_ALIGN_MULTIPLE
    4458:	bf1f      	itttt	ne
    445a:	3d04      	subne	r5, #4
    445c:	18ed      	addne	r5, r5, r3
             - (size_t)buf % MBEDTLS_MEMORY_ALIGN_MULTIPLE;
        buf += MBEDTLS_MEMORY_ALIGN_MULTIPLE
             - (size_t)buf % MBEDTLS_MEMORY_ALIGN_MULTIPLE;
    445e:	f1c3 0304 	rsbne	r3, r3, #4
        buf += MBEDTLS_MEMORY_ALIGN_MULTIPLE
    4462:	18e4      	addne	r4, r4, r3
    }

    memset( buf, 0, len );
    4464:	462a      	mov	r2, r5
    4466:	2100      	movs	r1, #0
    4468:	4620      	mov	r0, r4
    446a:	f002 f90a 	bl	6682 <memset>

    heap.buf = buf;
    446e:	4b07      	ldr	r3, [pc, #28]	; (448c <mbedtls_memory_buffer_alloc_init+0x54>)
    heap.len = len;

    heap.first = (memory_header *)buf;
    heap.first->size = len - sizeof( memory_header );
    heap.first->magic1 = MAGIC1;
    4470:	4a09      	ldr	r2, [pc, #36]	; (4498 <mbedtls_memory_buffer_alloc_init+0x60>)
    heap.first = (memory_header *)buf;
    4472:	609c      	str	r4, [r3, #8]
    heap.len = len;
    4474:	e9c3 4500 	strd	r4, r5, [r3]
    heap.first->magic1 = MAGIC1;
    4478:	6022      	str	r2, [r4, #0]
    heap.first->magic2 = MAGIC2;
    447a:	f1a2 2210 	sub.w	r2, r2, #268439552	; 0x10001000
    heap.first->size = len - sizeof( memory_header );
    447e:	3d20      	subs	r5, #32
    heap.first->magic2 = MAGIC2;
    4480:	f1a2 12ef 	sub.w	r2, r2, #15663343	; 0xef00ef
    heap.first->size = len - sizeof( memory_header );
    4484:	6065      	str	r5, [r4, #4]
    heap.first->magic2 = MAGIC2;
    4486:	61e2      	str	r2, [r4, #28]
    heap.first_free = heap.first;
    4488:	60dc      	str	r4, [r3, #12]
}
    448a:	bd38      	pop	{r3, r4, r5, pc}
    448c:	200012cc 	.word	0x200012cc
    4490:	00004329 	.word	0x00004329
    4494:	00004211 	.word	0x00004211
    4498:	ff00aa55 	.word	0xff00aa55

0000449c <mbedtls_calloc>:
void * (*mbedtls_calloc_func)( size_t, size_t ) = MBEDTLS_PLATFORM_STD_CALLOC;
void (*mbedtls_free_func)( void * ) = MBEDTLS_PLATFORM_STD_FREE;

void * mbedtls_calloc( size_t nmemb, size_t size )
{
    return (*mbedtls_calloc_func)( nmemb, size );
    449c:	4b01      	ldr	r3, [pc, #4]	; (44a4 <mbedtls_calloc+0x8>)
    449e:	681b      	ldr	r3, [r3, #0]
    44a0:	4718      	bx	r3
    44a2:	bf00      	nop
    44a4:	20000058 	.word	0x20000058

000044a8 <mbedtls_free>:
}

void mbedtls_free( void * ptr )
{
    (*mbedtls_free_func)( ptr );
    44a8:	4b01      	ldr	r3, [pc, #4]	; (44b0 <mbedtls_free+0x8>)
    44aa:	681b      	ldr	r3, [r3, #0]
    44ac:	4718      	bx	r3
    44ae:	bf00      	nop
    44b0:	20000060 	.word	0x20000060

000044b4 <mbedtls_platform_set_calloc_free>:
}

int mbedtls_platform_set_calloc_free( void * (*calloc_func)( size_t, size_t ),
                              void (*free_func)( void * ) )
{
    mbedtls_calloc_func = calloc_func;
    44b4:	4b02      	ldr	r3, [pc, #8]	; (44c0 <mbedtls_platform_set_calloc_free+0xc>)
    44b6:	6018      	str	r0, [r3, #0]
    mbedtls_free_func = free_func;
    44b8:	4b02      	ldr	r3, [pc, #8]	; (44c4 <mbedtls_platform_set_calloc_free+0x10>)
    return( 0 );
}
    44ba:	2000      	movs	r0, #0
    mbedtls_free_func = free_func;
    44bc:	6019      	str	r1, [r3, #0]
}
    44be:	4770      	bx	lr
    44c0:	20000058 	.word	0x20000058
    44c4:	20000060 	.word	0x20000060

000044c8 <mbedtls_platform_zeroize>:

void mbedtls_platform_zeroize( void *buf, size_t len )
{
    MBEDTLS_INTERNAL_VALIDATE( len == 0 || buf != NULL );

    if( len > 0 )
    44c8:	460a      	mov	r2, r1
    44ca:	b119      	cbz	r1, 44d4 <mbedtls_platform_zeroize+0xc>
        memset_func( buf, 0, len );
    44cc:	4b02      	ldr	r3, [pc, #8]	; (44d8 <mbedtls_platform_zeroize+0x10>)
    44ce:	2100      	movs	r1, #0
    44d0:	681b      	ldr	r3, [r3, #0]
    44d2:	4718      	bx	r3
}
    44d4:	4770      	bx	lr
    44d6:	bf00      	nop
    44d8:	20000064 	.word	0x20000064

000044dc <rsa_check_context.isra.0>:
/*
 * Checks whether the context fields are set in such a way
 * that the RSA primitives will be able to execute without error.
 * It does *not* make guarantees for consistency of the parameters.
 */
static int rsa_check_context( mbedtls_rsa_context const *ctx, int is_priv,
    44dc:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    /* blinding_needed is only used for NO_CRT to decide whether
     * P,Q need to be present or not. */
    ((void) blinding_needed);
#endif

    if( ctx->len != mbedtls_mpi_size( &ctx->N ) ||
    44de:	f100 0608 	add.w	r6, r0, #8
    44e2:	6847      	ldr	r7, [r0, #4]
static int rsa_check_context( mbedtls_rsa_context const *ctx, int is_priv,
    44e4:	4604      	mov	r4, r0
    if( ctx->len != mbedtls_mpi_size( &ctx->N ) ||
    44e6:	4630      	mov	r0, r6
static int rsa_check_context( mbedtls_rsa_context const *ctx, int is_priv,
    44e8:	460d      	mov	r5, r1
    if( ctx->len != mbedtls_mpi_size( &ctx->N ) ||
    44ea:	f003 f922 	bl	7732 <mbedtls_mpi_size>
    44ee:	4287      	cmp	r7, r0
    44f0:	d116      	bne.n	4520 <rsa_check_context.isra.0+0x44>
    44f2:	6863      	ldr	r3, [r4, #4]
    44f4:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
    44f8:	d812      	bhi.n	4520 <rsa_check_context.isra.0+0x44>
     * 1. Modular exponentiation needs positive, odd moduli.
     */

    /* Modular exponentiation wrt. N is always used for
     * RSA public key operations. */
    if( mbedtls_mpi_cmp_int( &ctx->N, 0 ) <= 0 ||
    44fa:	2100      	movs	r1, #0
    44fc:	4630      	mov	r0, r6
    44fe:	f003 fa78 	bl	79f2 <mbedtls_mpi_cmp_int>
    4502:	2800      	cmp	r0, #0
    4504:	dd0c      	ble.n	4520 <rsa_check_context.isra.0+0x44>
        mbedtls_mpi_get_bit( &ctx->N, 0 ) == 0  )
    4506:	2100      	movs	r1, #0
    4508:	4630      	mov	r0, r6
    450a:	f003 f8e5 	bl	76d8 <mbedtls_mpi_get_bit>
    if( mbedtls_mpi_cmp_int( &ctx->N, 0 ) <= 0 ||
    450e:	b138      	cbz	r0, 4520 <rsa_check_context.isra.0+0x44>

#if !defined(MBEDTLS_RSA_NO_CRT)
    /* Modular exponentiation for P and Q is only
     * used for private key operations and if CRT
     * is used. */
    if( is_priv &&
    4510:	b945      	cbnz	r5, 4524 <rsa_check_context.isra.0+0x48>
    /*
     * 2. Exponents must be positive
     */

    /* Always need E for public key operations */
    if( mbedtls_mpi_cmp_int( &ctx->E, 0 ) <= 0 )
    4512:	2100      	movs	r1, #0
    4514:	f104 0014 	add.w	r0, r4, #20
    4518:	f003 fa6b 	bl	79f2 <mbedtls_mpi_cmp_int>
    451c:	2800      	cmp	r0, #0
    451e:	dc1e      	bgt.n	455e <rsa_check_context.isra.0+0x82>
     * but check for QP >= 1 nonetheless. */
#if !defined(MBEDTLS_RSA_NO_CRT)
    if( is_priv &&
        mbedtls_mpi_cmp_int( &ctx->QP, 0 ) <= 0 )
    {
        return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA );
    4520:	481b      	ldr	r0, [pc, #108]	; (4590 <rsa_check_context.isra.0+0xb4>)
    4522:	e01e      	b.n	4562 <rsa_check_context.isra.0+0x86>
        ( mbedtls_mpi_cmp_int( &ctx->P, 0 ) <= 0 ||
    4524:	f104 062c 	add.w	r6, r4, #44	; 0x2c
    4528:	2100      	movs	r1, #0
    452a:	4630      	mov	r0, r6
    452c:	f003 fa61 	bl	79f2 <mbedtls_mpi_cmp_int>
    if( is_priv &&
    4530:	2800      	cmp	r0, #0
    4532:	ddf5      	ble.n	4520 <rsa_check_context.isra.0+0x44>
          mbedtls_mpi_get_bit( &ctx->P, 0 ) == 0 ||
    4534:	2100      	movs	r1, #0
    4536:	4630      	mov	r0, r6
    4538:	f003 f8ce 	bl	76d8 <mbedtls_mpi_get_bit>
        ( mbedtls_mpi_cmp_int( &ctx->P, 0 ) <= 0 ||
    453c:	2800      	cmp	r0, #0
    453e:	d0ef      	beq.n	4520 <rsa_check_context.isra.0+0x44>
          mbedtls_mpi_cmp_int( &ctx->Q, 0 ) <= 0 ||
    4540:	f104 0638 	add.w	r6, r4, #56	; 0x38
    4544:	2100      	movs	r1, #0
    4546:	4630      	mov	r0, r6
    4548:	f003 fa53 	bl	79f2 <mbedtls_mpi_cmp_int>
          mbedtls_mpi_get_bit( &ctx->P, 0 ) == 0 ||
    454c:	2800      	cmp	r0, #0
    454e:	dde7      	ble.n	4520 <rsa_check_context.isra.0+0x44>
          mbedtls_mpi_get_bit( &ctx->Q, 0 ) == 0  ) )
    4550:	2100      	movs	r1, #0
    4552:	4630      	mov	r0, r6
    4554:	f003 f8c0 	bl	76d8 <mbedtls_mpi_get_bit>
          mbedtls_mpi_cmp_int( &ctx->Q, 0 ) <= 0 ||
    4558:	2800      	cmp	r0, #0
    455a:	d1da      	bne.n	4512 <rsa_check_context.isra.0+0x36>
    455c:	e7e0      	b.n	4520 <rsa_check_context.isra.0+0x44>
    if( is_priv &&
    455e:	b90d      	cbnz	r5, 4564 <rsa_check_context.isra.0+0x88>
    }
#endif

    return( 0 );
    4560:	2000      	movs	r0, #0
}
    4562:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
        ( mbedtls_mpi_cmp_int( &ctx->DP, 0 ) <= 0 ||
    4564:	2100      	movs	r1, #0
    4566:	f104 0044 	add.w	r0, r4, #68	; 0x44
    456a:	f003 fa42 	bl	79f2 <mbedtls_mpi_cmp_int>
    if( is_priv &&
    456e:	2800      	cmp	r0, #0
    4570:	ddd6      	ble.n	4520 <rsa_check_context.isra.0+0x44>
          mbedtls_mpi_cmp_int( &ctx->DQ, 0 ) <= 0  ) )
    4572:	2100      	movs	r1, #0
    4574:	f104 0050 	add.w	r0, r4, #80	; 0x50
    4578:	f003 fa3b 	bl	79f2 <mbedtls_mpi_cmp_int>
        ( mbedtls_mpi_cmp_int( &ctx->DP, 0 ) <= 0 ||
    457c:	2800      	cmp	r0, #0
    457e:	ddcf      	ble.n	4520 <rsa_check_context.isra.0+0x44>
        mbedtls_mpi_cmp_int( &ctx->QP, 0 ) <= 0 )
    4580:	2100      	movs	r1, #0
    4582:	f104 005c 	add.w	r0, r4, #92	; 0x5c
    4586:	f003 fa34 	bl	79f2 <mbedtls_mpi_cmp_int>
    if( is_priv &&
    458a:	2800      	cmp	r0, #0
    458c:	dce8      	bgt.n	4560 <rsa_check_context.isra.0+0x84>
    458e:	e7c7      	b.n	4520 <rsa_check_context.isra.0+0x44>
    4590:	ffffbf80 	.word	0xffffbf80

00004594 <mbedtls_rsa_check_pubkey>:

/*
 * Check a public RSA key
 */
int mbedtls_rsa_check_pubkey( const mbedtls_rsa_context *ctx )
{
    4594:	b570      	push	{r4, r5, r6, lr}
    RSA_VALIDATE_RET( ctx != NULL );

    if( rsa_check_context( ctx, 0 /* public */, 0 /* no blinding */ ) != 0 )
    4596:	2100      	movs	r1, #0
{
    4598:	4604      	mov	r4, r0
    if( rsa_check_context( ctx, 0 /* public */, 0 /* no blinding */ ) != 0 )
    459a:	f7ff ff9f 	bl	44dc <rsa_check_context.isra.0>
    459e:	4605      	mov	r5, r0
    45a0:	b9b8      	cbnz	r0, 45d2 <mbedtls_rsa_check_pubkey+0x3e>
        return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED );

    if( mbedtls_mpi_bitlen( &ctx->N ) < 128 )
    45a2:	f104 0608 	add.w	r6, r4, #8
    45a6:	4630      	mov	r0, r6
    45a8:	f003 f8a7 	bl	76fa <mbedtls_mpi_bitlen>
    45ac:	287f      	cmp	r0, #127	; 0x7f
    45ae:	d910      	bls.n	45d2 <mbedtls_rsa_check_pubkey+0x3e>
    {
        return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED );
    }

    if( mbedtls_mpi_get_bit( &ctx->E, 0 ) == 0 ||
    45b0:	3414      	adds	r4, #20
    45b2:	4629      	mov	r1, r5
    45b4:	4620      	mov	r0, r4
    45b6:	f003 f88f 	bl	76d8 <mbedtls_mpi_get_bit>
    45ba:	b150      	cbz	r0, 45d2 <mbedtls_rsa_check_pubkey+0x3e>
        mbedtls_mpi_bitlen( &ctx->E )     < 2  ||
    45bc:	4620      	mov	r0, r4
    45be:	f003 f89c 	bl	76fa <mbedtls_mpi_bitlen>
    if( mbedtls_mpi_get_bit( &ctx->E, 0 ) == 0 ||
    45c2:	2801      	cmp	r0, #1
    45c4:	d905      	bls.n	45d2 <mbedtls_rsa_check_pubkey+0x3e>
        mbedtls_mpi_cmp_mpi( &ctx->E, &ctx->N ) >= 0 )
    45c6:	4631      	mov	r1, r6
    45c8:	4620      	mov	r0, r4
    45ca:	f003 f9cf 	bl	796c <mbedtls_mpi_cmp_mpi>
        mbedtls_mpi_bitlen( &ctx->E )     < 2  ||
    45ce:	2800      	cmp	r0, #0
    45d0:	db00      	blt.n	45d4 <mbedtls_rsa_check_pubkey+0x40>
    {
        return( MBEDTLS_ERR_RSA_KEY_CHECK_FAILED );
    45d2:	4d01      	ldr	r5, [pc, #4]	; (45d8 <mbedtls_rsa_check_pubkey+0x44>)
    }

    return( 0 );
}
    45d4:	4628      	mov	r0, r5
    45d6:	bd70      	pop	{r4, r5, r6, pc}
    45d8:	ffffbe00 	.word	0xffffbe00

000045dc <mbedtls_rsa_public>:
 * Do an RSA public key operation
 */
int mbedtls_rsa_public( mbedtls_rsa_context *ctx,
                const unsigned char *input,
                unsigned char *output )
{
    45dc:	b5f0      	push	{r4, r5, r6, r7, lr}
    45de:	460c      	mov	r4, r1
    45e0:	b087      	sub	sp, #28
    mbedtls_mpi T;
    RSA_VALIDATE_RET( ctx != NULL );
    RSA_VALIDATE_RET( input != NULL );
    RSA_VALIDATE_RET( output != NULL );

    if( rsa_check_context( ctx, 0 /* public */, 0 /* no blinding */ ) )
    45e2:	2100      	movs	r1, #0
{
    45e4:	4605      	mov	r5, r0
    45e6:	4616      	mov	r6, r2
    if( rsa_check_context( ctx, 0 /* public */, 0 /* no blinding */ ) )
    45e8:	f7ff ff78 	bl	44dc <rsa_check_context.isra.0>
    45ec:	bb80      	cbnz	r0, 4650 <mbedtls_rsa_public+0x74>
        return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA );

    mbedtls_mpi_init( &T );
    45ee:	a803      	add	r0, sp, #12
    45f0:	f002 ff9f 	bl	7532 <mbedtls_mpi_init>
#if defined(MBEDTLS_THREADING_C)
    if( ( ret = mbedtls_mutex_lock( &ctx->mutex ) ) != 0 )
        return( ret );
#endif

    MBEDTLS_MPI_CHK( mbedtls_mpi_read_binary( &T, input, ctx->len ) );
    45f4:	4621      	mov	r1, r4
    45f6:	686a      	ldr	r2, [r5, #4]
    45f8:	a803      	add	r0, sp, #12
    45fa:	f003 f8a0 	bl	773e <mbedtls_mpi_read_binary>
    45fe:	4604      	mov	r4, r0
    4600:	b9d0      	cbnz	r0, 4638 <mbedtls_rsa_public+0x5c>

    if( mbedtls_mpi_cmp_mpi( &T, &ctx->N ) >= 0 )
    4602:	f105 0408 	add.w	r4, r5, #8
    4606:	4621      	mov	r1, r4
    4608:	a803      	add	r0, sp, #12
    460a:	f003 f9af 	bl	796c <mbedtls_mpi_cmp_mpi>
    460e:	2800      	cmp	r0, #0
    4610:	da1b      	bge.n	464a <mbedtls_rsa_public+0x6e>
        ret = MBEDTLS_ERR_MPI_BAD_INPUT_DATA;
        goto cleanup;
    }

    olen = ctx->len;
    MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &T, &T, &ctx->E, &ctx->N, &ctx->RN ) );
    4612:	f105 0368 	add.w	r3, r5, #104	; 0x68
    4616:	a903      	add	r1, sp, #12
    4618:	9300      	str	r3, [sp, #0]
    461a:	f105 0214 	add.w	r2, r5, #20
    461e:	4623      	mov	r3, r4
    4620:	4608      	mov	r0, r1
    olen = ctx->len;
    4622:	686f      	ldr	r7, [r5, #4]
    MBEDTLS_MPI_CHK( mbedtls_mpi_exp_mod( &T, &T, &ctx->E, &ctx->N, &ctx->RN ) );
    4624:	f003 fd09 	bl	803a <mbedtls_mpi_exp_mod>
    4628:	4604      	mov	r4, r0
    462a:	b928      	cbnz	r0, 4638 <mbedtls_rsa_public+0x5c>
    MBEDTLS_MPI_CHK( mbedtls_mpi_write_binary( &T, output, olen ) );
    462c:	463a      	mov	r2, r7
    462e:	4631      	mov	r1, r6
    4630:	a803      	add	r0, sp, #12
    4632:	f003 f8a5 	bl	7780 <mbedtls_mpi_write_binary>
    4636:	4604      	mov	r4, r0
#if defined(MBEDTLS_THREADING_C)
    if( mbedtls_mutex_unlock( &ctx->mutex ) != 0 )
        return( MBEDTLS_ERR_THREADING_MUTEX_ERROR );
#endif

    mbedtls_mpi_free( &T );
    4638:	a803      	add	r0, sp, #12
    463a:	f002 ff80 	bl	753e <mbedtls_mpi_free>

    if( ret != 0 )
    463e:	b10c      	cbz	r4, 4644 <mbedtls_rsa_public+0x68>
        ( *mbedtls_test_hook_error_add )( high, low, file, line );
#endif
    (void)file;
    (void)line;

    return( high + low );
    4640:	f5a4 4485 	sub.w	r4, r4, #17024	; 0x4280
        return( MBEDTLS_ERROR_ADD( MBEDTLS_ERR_RSA_PUBLIC_FAILED, ret ) );

    return( 0 );
}
    4644:	4620      	mov	r0, r4
    4646:	b007      	add	sp, #28
    4648:	bdf0      	pop	{r4, r5, r6, r7, pc}
        ret = MBEDTLS_ERR_MPI_BAD_INPUT_DATA;
    464a:	f06f 0403 	mvn.w	r4, #3
    464e:	e7f3      	b.n	4638 <mbedtls_rsa_public+0x5c>
        return( MBEDTLS_ERR_RSA_BAD_INPUT_DATA );
    4650:	4c00      	ldr	r4, [pc, #0]	; (4654 <mbedtls_rsa_public+0x78>)
    4652:	e7f7      	b.n	4644 <mbedtls_rsa_public+0x68>
    4654:	ffffbf80 	.word	0xffffbf80

00004658 <mbedtls_sha256_starts>:
    SHA256_VALIDATE_RET( is224 == 0 || is224 == 1 );
#else
    SHA256_VALIDATE_RET( is224 == 0 );
#endif

    ctx->total[0] = 0;
    4658:	2300      	movs	r3, #0
    ctx->total[1] = 0;
    465a:	e9c0 3300 	strd	r3, r3, [r0]

    if( is224 == 0 )
    465e:	b9c1      	cbnz	r1, 4692 <mbedtls_sha256_starts+0x3a>
    {
        /* SHA-256 */
        ctx->state[0] = 0x6A09E667;
        ctx->state[1] = 0xBB67AE85;
    4660:	4a19      	ldr	r2, [pc, #100]	; (46c8 <mbedtls_sha256_starts+0x70>)
    4662:	4b1a      	ldr	r3, [pc, #104]	; (46cc <mbedtls_sha256_starts+0x74>)
        ctx->state[2] = 0x3C6EF372;
        ctx->state[3] = 0xA54FF53A;
    4664:	f8df c08c 	ldr.w	ip, [pc, #140]	; 46f4 <mbedtls_sha256_starts+0x9c>
        ctx->state[1] = 0xBB67AE85;
    4668:	e9c0 2302 	strd	r2, r3, [r0, #8]
        ctx->state[3] = 0xA54FF53A;
    466c:	4b18      	ldr	r3, [pc, #96]	; (46d0 <mbedtls_sha256_starts+0x78>)
        ctx->state[4] = 0x510E527F;
        ctx->state[5] = 0x9B05688C;
    466e:	4a19      	ldr	r2, [pc, #100]	; (46d4 <mbedtls_sha256_starts+0x7c>)
        ctx->state[3] = 0xA54FF53A;
    4670:	e9c0 c304 	strd	ip, r3, [r0, #16]
        ctx->state[5] = 0x9B05688C;
    4674:	4b18      	ldr	r3, [pc, #96]	; (46d8 <mbedtls_sha256_starts+0x80>)
    4676:	e9c0 2306 	strd	r2, r3, [r0, #24]
        ctx->state[6] = 0x1F83D9AB;
    467a:	4b18      	ldr	r3, [pc, #96]	; (46dc <mbedtls_sha256_starts+0x84>)
    467c:	6203      	str	r3, [r0, #32]
        ctx->state[7] = 0x5BE0CD19;
    467e:	f103 5374 	add.w	r3, r3, #1023410176	; 0x3d000000
    4682:	f5a3 0323 	sub.w	r3, r3, #10682368	; 0xa30000
    4686:	f6a3 4392 	subw	r3, r3, #3218	; 0xc92
        ctx->state[2] = 0x3070DD17;
        ctx->state[3] = 0xF70E5939;
        ctx->state[4] = 0xFFC00B31;
        ctx->state[5] = 0x68581511;
        ctx->state[6] = 0x64F98FA7;
        ctx->state[7] = 0xBEFA4FA4;
    468a:	6243      	str	r3, [r0, #36]	; 0x24
#endif
    }

    ctx->is224 = is224;
    468c:	6681      	str	r1, [r0, #104]	; 0x68

    return( 0 );
}
    468e:	2000      	movs	r0, #0
    4690:	4770      	bx	lr
        ctx->state[1] = 0x367CD507;
    4692:	4b13      	ldr	r3, [pc, #76]	; (46e0 <mbedtls_sha256_starts+0x88>)
    4694:	4a13      	ldr	r2, [pc, #76]	; (46e4 <mbedtls_sha256_starts+0x8c>)
        ctx->state[4] = 0xFFC00B31;
    4696:	f8df c060 	ldr.w	ip, [pc, #96]	; 46f8 <mbedtls_sha256_starts+0xa0>
        ctx->state[1] = 0x367CD507;
    469a:	e9c0 2302 	strd	r2, r3, [r0, #8]
        ctx->state[2] = 0x3070DD17;
    469e:	f103 4379 	add.w	r3, r3, #4177526784	; 0xf9000000
    46a2:	f503 0374 	add.w	r3, r3, #15990784	; 0xf40000
    46a6:	f503 6301 	add.w	r3, r3, #2064	; 0x810
    46aa:	6103      	str	r3, [r0, #16]
        ctx->state[4] = 0xFFC00B31;
    46ac:	4b0e      	ldr	r3, [pc, #56]	; (46e8 <mbedtls_sha256_starts+0x90>)
    46ae:	e9c0 c305 	strd	ip, r3, [r0, #20]
        ctx->state[5] = 0x68581511;
    46b2:	f103 43d1 	add.w	r3, r3, #1753219072	; 0x68800000
    46b6:	f503 13c0 	add.w	r3, r3, #1572864	; 0x180000
    46ba:	f503 631e 	add.w	r3, r3, #2528	; 0x9e0
    46be:	61c3      	str	r3, [r0, #28]
        ctx->state[6] = 0x64F98FA7;
    46c0:	4b0a      	ldr	r3, [pc, #40]	; (46ec <mbedtls_sha256_starts+0x94>)
    46c2:	6203      	str	r3, [r0, #32]
        ctx->state[7] = 0xBEFA4FA4;
    46c4:	4b0a      	ldr	r3, [pc, #40]	; (46f0 <mbedtls_sha256_starts+0x98>)
    46c6:	e7e0      	b.n	468a <mbedtls_sha256_starts+0x32>
    46c8:	6a09e667 	.word	0x6a09e667
    46cc:	bb67ae85 	.word	0xbb67ae85
    46d0:	a54ff53a 	.word	0xa54ff53a
    46d4:	510e527f 	.word	0x510e527f
    46d8:	9b05688c 	.word	0x9b05688c
    46dc:	1f83d9ab 	.word	0x1f83d9ab
    46e0:	367cd507 	.word	0x367cd507
    46e4:	c1059ed8 	.word	0xc1059ed8
    46e8:	ffc00b31 	.word	0xffc00b31
    46ec:	64f98fa7 	.word	0x64f98fa7
    46f0:	befa4fa4 	.word	0xbefa4fa4
    46f4:	3c6ef372 	.word	0x3c6ef372
    46f8:	f70e5939 	.word	0xf70e5939

000046fc <mbedtls_internal_sha256_process>:
        (d) += local.temp1; (h) = local.temp1 + local.temp2;        \
    } while( 0 )

int mbedtls_internal_sha256_process( mbedtls_sha256_context *ctx,
                                const unsigned char data[64] )
{
    46fc:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    4700:	b0d1      	sub	sp, #324	; 0x144
    4702:	ab48      	add	r3, sp, #288	; 0x120
    4704:	9301      	str	r3, [sp, #4]
    4706:	f100 0608 	add.w	r6, r0, #8
    470a:	f100 0328 	add.w	r3, r0, #40	; 0x28
    470e:	9a01      	ldr	r2, [sp, #4]
    4710:	9304      	str	r3, [sp, #16]
    4712:	4633      	mov	r3, r6

    SHA256_VALIDATE_RET( ctx != NULL );
    SHA256_VALIDATE_RET( (const unsigned char *)data != NULL );

    for( i = 0; i < 8; i++ )
        local.A[i] = ctx->state[i];
    4714:	f853 0b04 	ldr.w	r0, [r3], #4
    4718:	f842 0b04 	str.w	r0, [r2], #4
    for( i = 0; i < 8; i++ )
    471c:	9804      	ldr	r0, [sp, #16]
    471e:	4283      	cmp	r3, r0
    4720:	d1f8      	bne.n	4714 <mbedtls_internal_sha256_process+0x18>
    4722:	9b4f      	ldr	r3, [sp, #316]	; 0x13c
    4724:	9302      	str	r3, [sp, #8]
    4726:	ad4c      	add	r5, sp, #304	; 0x130
    4728:	e9dd e34a 	ldrd	lr, r3, [sp, #296]	; 0x128
    472c:	e895 1120 	ldmia.w	r5, {r5, r8, ip}
    4730:	e9dd 4748 	ldrd	r4, r7, [sp, #288]	; 0x120
    4734:	9303      	str	r3, [sp, #12]
    4736:	4b47      	ldr	r3, [pc, #284]	; (4854 <mbedtls_internal_sha256_process+0x158>)
    4738:	9305      	str	r3, [sp, #20]
    473a:	aa06      	add	r2, sp, #24

#if defined(MBEDTLS_SHA256_SMALLER)
    for( i = 0; i < 64; i++ )
    473c:	f04f 0900 	mov.w	r9, #0
    {
        if( i < 16 )
    4740:	f1b9 0f0f 	cmp.w	r9, #15
    4744:	d86e      	bhi.n	4824 <mbedtls_internal_sha256_process+0x128>
            GET_UINT32_BE( local.W[i], data, 4 * i );
    4746:	784b      	ldrb	r3, [r1, #1]
    4748:	f891 b000 	ldrb.w	fp, [r1]
    474c:	f891 a002 	ldrb.w	sl, [r1, #2]
    4750:	041b      	lsls	r3, r3, #16
    4752:	ea43 630b 	orr.w	r3, r3, fp, lsl #24
    4756:	f891 b003 	ldrb.w	fp, [r1, #3]
    475a:	ea43 030b 	orr.w	r3, r3, fp
    475e:	ea43 230a 	orr.w	r3, r3, sl, lsl #8
        else
            R( i );

        P( local.A[0], local.A[1], local.A[2], local.A[3], local.A[4],
    4762:	ea4f 2bf5 	mov.w	fp, r5, ror #11
    4766:	ea8b 1bb5 	eor.w	fp, fp, r5, ror #6
    476a:	ea8b 6075 	eor.w	r0, fp, r5, ror #25
    476e:	ea8c 0b08 	eor.w	fp, ip, r8
    4772:	ea0b 0b05 	and.w	fp, fp, r5
    4776:	ea8b 0b0c 	eor.w	fp, fp, ip
    477a:	4483      	add	fp, r0
    477c:	9805      	ldr	r0, [sp, #20]
    477e:	6093      	str	r3, [r2, #8]
    4780:	f850 ab04 	ldr.w	sl, [r0], #4
    4784:	9005      	str	r0, [sp, #20]
    4786:	44d3      	add	fp, sl
    4788:	9802      	ldr	r0, [sp, #8]
    478a:	445b      	add	r3, fp
    478c:	4403      	add	r3, r0
    478e:	ea4f 3a74 	mov.w	sl, r4, ror #13
    4792:	ea44 0007 	orr.w	r0, r4, r7
    4796:	ea04 0b07 	and.w	fp, r4, r7
    479a:	ea8a 0ab4 	eor.w	sl, sl, r4, ror #2
    479e:	ea00 000e 	and.w	r0, r0, lr
    47a2:	9302      	str	r3, [sp, #8]
    47a4:	ea8a 5ab4 	eor.w	sl, sl, r4, ror #22
    47a8:	ea40 000b 	orr.w	r0, r0, fp
    47ac:	eb00 0b0a 	add.w	fp, r0, sl
    47b0:	e9dd 0302 	ldrd	r0, r3, [sp, #8]
    for( i = 0; i < 64; i++ )
    47b4:	f109 0901 	add.w	r9, r9, #1
        P( local.A[0], local.A[1], local.A[2], local.A[3], local.A[4],
    47b8:	4403      	add	r3, r0
    47ba:	469a      	mov	sl, r3
    for( i = 0; i < 64; i++ )
    47bc:	f1b9 0f40 	cmp.w	r9, #64	; 0x40
        P( local.A[0], local.A[1], local.A[2], local.A[3], local.A[4],
    47c0:	4603      	mov	r3, r0
    47c2:	e9cd ce02 	strd	ip, lr, [sp, #8]
    47c6:	445b      	add	r3, fp
    for( i = 0; i < 64; i++ )
    47c8:	f102 0204 	add.w	r2, r2, #4
    47cc:	f101 0104 	add.w	r1, r1, #4
    47d0:	d121      	bne.n	4816 <mbedtls_internal_sha256_process+0x11a>
    47d2:	e9cd 584d 	strd	r5, r8, [sp, #308]	; 0x134
    47d6:	e9cd 3448 	strd	r3, r4, [sp, #288]	; 0x120
    47da:	f8cd c13c 	str.w	ip, [sp, #316]	; 0x13c
    47de:	f8cd a130 	str.w	sl, [sp, #304]	; 0x130
    47e2:	974a      	str	r7, [sp, #296]	; 0x128
    47e4:	f8cd b01c 	str.w	fp, [sp, #28]
    47e8:	f8cd e12c 	str.w	lr, [sp, #300]	; 0x12c
    47ec:	9306      	str	r3, [sp, #24]
           local.A[6], local.A[7], local.A[0], R(i+7), K[i+7] );
    }
#endif /* MBEDTLS_SHA256_SMALLER */

    for( i = 0; i < 8; i++ )
        ctx->state[i] += local.A[i];
    47ee:	9901      	ldr	r1, [sp, #4]
    47f0:	6833      	ldr	r3, [r6, #0]
    47f2:	f851 2b04 	ldr.w	r2, [r1], #4
    47f6:	9101      	str	r1, [sp, #4]
    47f8:	4413      	add	r3, r2
    47fa:	f846 3b04 	str.w	r3, [r6], #4
    for( i = 0; i < 8; i++ )
    47fe:	9b04      	ldr	r3, [sp, #16]
    4800:	42b3      	cmp	r3, r6
    4802:	d1f4      	bne.n	47ee <mbedtls_internal_sha256_process+0xf2>

    /* Zeroise buffers and variables to clear sensitive data from memory. */
    mbedtls_platform_zeroize( &local, sizeof( local ) );
    4804:	a806      	add	r0, sp, #24
    4806:	f44f 7194 	mov.w	r1, #296	; 0x128
    480a:	f7ff fe5d 	bl	44c8 <mbedtls_platform_zeroize>

    return( 0 );
}
    480e:	2000      	movs	r0, #0
    4810:	b051      	add	sp, #324	; 0x144
    4812:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    4816:	46be      	mov	lr, r7
    4818:	46c4      	mov	ip, r8
    481a:	4627      	mov	r7, r4
    481c:	46a8      	mov	r8, r5
        P( local.A[0], local.A[1], local.A[2], local.A[3], local.A[4],
    481e:	461c      	mov	r4, r3
    4820:	4655      	mov	r5, sl
    4822:	e78d      	b.n	4740 <mbedtls_internal_sha256_process+0x44>
            R( i );
    4824:	6813      	ldr	r3, [r2, #0]
    4826:	f852 bc34 	ldr.w	fp, [r2, #-52]
    482a:	f852 0c38 	ldr.w	r0, [r2, #-56]
    482e:	ea4f 4af3 	mov.w	sl, r3, ror #19
    4832:	ea8a 4a73 	eor.w	sl, sl, r3, ror #17
    4836:	ea8a 2a93 	eor.w	sl, sl, r3, lsr #10
    483a:	f852 3c14 	ldr.w	r3, [r2, #-20]
    483e:	4403      	add	r3, r0
    4840:	ea4f 40bb 	mov.w	r0, fp, ror #18
    4844:	ea80 10fb 	eor.w	r0, r0, fp, ror #7
    4848:	449a      	add	sl, r3
    484a:	ea80 03db 	eor.w	r3, r0, fp, lsr #3
    484e:	4453      	add	r3, sl
    4850:	e787      	b.n	4762 <mbedtls_internal_sha256_process+0x66>
    4852:	bf00      	nop
    4854:	00008cd8 	.word	0x00008cd8

00004858 <nrf52_errata_108>:
        #if defined (NRF52832_XXAA) || defined (DEVELOP_IN_NRF52832)\
         || defined (NRF52832_XXAB) || defined (DEVELOP_IN_NRF52832)
            uint32_t var1;
            uint32_t var2;

            if (*(uint32_t *)0x10000130ul == 0xFFFFFFFF)
    4858:	4b04      	ldr	r3, [pc, #16]	; (486c <nrf52_errata_108+0x14>)
    485a:	6818      	ldr	r0, [r3, #0]
    485c:	1c42      	adds	r2, r0, #1
            {
                var1 = ((*(uint32_t *)0xF0000FE0ul) & 0x000000FFul);
    485e:	bf04      	itt	eq
    4860:	4b03      	ldreq	r3, [pc, #12]	; (4870 <nrf52_errata_108+0x18>)
    4862:	7818      	ldrbeq	r0, [r3, #0]
                }
            }
        #endif
        return false;
    #endif
}
    4864:	1f83      	subs	r3, r0, #6
    4866:	4258      	negs	r0, r3
    4868:	4158      	adcs	r0, r3
    486a:	4770      	bx	lr
    486c:	10000130 	.word	0x10000130
    4870:	f0000fe0 	.word	0xf0000fe0

00004874 <nrf52_errata_16>:
    #ifndef NRF52_SERIES
        return false;
    #else
        #if defined (NRF52832_XXAA) || defined (DEVELOP_IN_NRF52832)\
         || defined (NRF52832_XXAB) || defined (DEVELOP_IN_NRF52832)
            uint32_t var1 = ((*(uint32_t *)0xF0000FE0ul) & 0x000000FFul);
    4874:	4b07      	ldr	r3, [pc, #28]	; (4894 <nrf52_errata_16+0x20>)
    4876:	781b      	ldrb	r3, [r3, #0]
            uint32_t var2 = ((*(uint32_t *)0xF0000FE8ul) & 0x000000F0ul) >> 4;
        #endif
        #if defined (NRF52832_XXAA) || defined (DEVELOP_IN_NRF52832)\
         || defined (NRF52832_XXAB) || defined (DEVELOP_IN_NRF52832)
            if (var1 == 0x06)
    4878:	2b06      	cmp	r3, #6
    487a:	d109      	bne.n	4890 <nrf52_errata_16+0x1c>
            uint32_t var2 = ((*(uint32_t *)0xF0000FE8ul) & 0x000000F0ul) >> 4;
    487c:	4b06      	ldr	r3, [pc, #24]	; (4898 <nrf52_errata_16+0x24>)
    487e:	681b      	ldr	r3, [r3, #0]
    4880:	f3c3 1303 	ubfx	r3, r3, #4, #4
    4884:	3b03      	subs	r3, #3
    4886:	2b04      	cmp	r3, #4
    4888:	d802      	bhi.n	4890 <nrf52_errata_16+0x1c>
    488a:	4a04      	ldr	r2, [pc, #16]	; (489c <nrf52_errata_16+0x28>)
    488c:	5cd0      	ldrb	r0, [r2, r3]
    488e:	4770      	bx	lr
                    default:
                        return false;
                }
            }
        #endif
        return false;
    4890:	2000      	movs	r0, #0
    #endif
}
    4892:	4770      	bx	lr
    4894:	f0000fe0 	.word	0xf0000fe0
    4898:	f0000fe8 	.word	0xf0000fe8
    489c:	00009c1f 	.word	0x00009c1f

000048a0 <nvmc_wait>:

/* -- NVMC utility functions -- */
/* Waits until NVMC is done with the current pending action */
void nvmc_wait(void)
{
    while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
    48a0:	4a02      	ldr	r2, [pc, #8]	; (48ac <nvmc_wait+0xc>)
    48a2:	f8d2 3400 	ldr.w	r3, [r2, #1024]	; 0x400
    48a6:	2b00      	cmp	r3, #0
    48a8:	d0fb      	beq.n	48a2 <nvmc_wait+0x2>
}
    48aa:	4770      	bx	lr
    48ac:	4001e000 	.word	0x4001e000

000048b0 <SystemInit>:
{
    SystemCoreClock = __SYSTEM_CLOCK_64M;
}

void SystemInit(void)
{
    48b0:	b510      	push	{r4, lr}
    #endif

    #if NRF52_ERRATA_12_ENABLE_WORKAROUND
        /* Workaround for Errata 12 "COMP: Reference ladder not correctly calibrated" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp */
        if (nrf52_errata_12()){
    48b2:	f7ff ffd1 	bl	4858 <nrf52_errata_108>
    48b6:	b128      	cbz	r0, 48c4 <SystemInit+0x14>
            *(volatile uint32_t *)0x40013540 = (*(uint32_t *)0x10000324 & 0x00001F00) >> 8;
    48b8:	4b81      	ldr	r3, [pc, #516]	; (4ac0 <SystemInit+0x210>)
    48ba:	4a82      	ldr	r2, [pc, #520]	; (4ac4 <SystemInit+0x214>)
    48bc:	681b      	ldr	r3, [r3, #0]
    48be:	f3c3 2304 	ubfx	r3, r3, #8, #5
    48c2:	6013      	str	r3, [r2, #0]
    #endif

    #if NRF52_ERRATA_16_ENABLE_WORKAROUND
        /* Workaround for Errata 16 "System: RAM may be corrupt on wakeup from CPU IDLE" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp */
        if (nrf52_errata_16()){
    48c4:	f7ff ffd6 	bl	4874 <nrf52_errata_16>
    48c8:	b110      	cbz	r0, 48d0 <SystemInit+0x20>
            *(volatile uint32_t *)0x4007C074 = 3131961357ul;
    48ca:	4b7f      	ldr	r3, [pc, #508]	; (4ac8 <SystemInit+0x218>)
    48cc:	4a7f      	ldr	r2, [pc, #508]	; (4acc <SystemInit+0x21c>)
    48ce:	601a      	str	r2, [r3, #0]
    #endif

    #if NRF52_ERRATA_31_ENABLE_WORKAROUND
        /* Workaround for Errata 31 "CLOCK: Calibration values are not correctly loaded from FICR at reset" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp */
        if (nrf52_errata_31()){
    48d0:	f7ff ffc2 	bl	4858 <nrf52_errata_108>
    48d4:	b128      	cbz	r0, 48e2 <SystemInit+0x32>
            *(volatile uint32_t *)0x4000053C = ((*(volatile uint32_t *)0x10000244) & 0x0000E000) >> 13;
    48d6:	4b7e      	ldr	r3, [pc, #504]	; (4ad0 <SystemInit+0x220>)
    48d8:	4a7e      	ldr	r2, [pc, #504]	; (4ad4 <SystemInit+0x224>)
    48da:	681b      	ldr	r3, [r3, #0]
    48dc:	f3c3 3342 	ubfx	r3, r3, #13, #3
    48e0:	6013      	str	r3, [r2, #0]
    #endif

    #if NRF52_ERRATA_32_ENABLE_WORKAROUND
        /* Workaround for Errata 32 "DIF: Debug session automatically enables TracePort pins" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp */
        if (nrf52_errata_32()){
    48e2:	f7ff ffc7 	bl	4874 <nrf52_errata_16>
    48e6:	b120      	cbz	r0, 48f2 <SystemInit+0x42>
            CoreDebug->DEMCR &= ~CoreDebug_DEMCR_TRCENA_Msk;
    48e8:	4a7b      	ldr	r2, [pc, #492]	; (4ad8 <SystemInit+0x228>)
    48ea:	68d3      	ldr	r3, [r2, #12]
    48ec:	f023 7380 	bic.w	r3, r3, #16777216	; 0x1000000
    48f0:	60d3      	str	r3, [r2, #12]
    #endif

    #if NRF52_ERRATA_36_ENABLE_WORKAROUND
        /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf52_errata_36()){
    48f2:	f7ff ffb1 	bl	4858 <nrf52_errata_108>
    48f6:	b140      	cbz	r0, 490a <SystemInit+0x5a>
            NRF_CLOCK->EVENTS_DONE = 0;
    48f8:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    48fc:	2200      	movs	r2, #0
    48fe:	f8c3 210c 	str.w	r2, [r3, #268]	; 0x10c
            NRF_CLOCK->EVENTS_CTTO = 0;
    4902:	f8c3 2110 	str.w	r2, [r3, #272]	; 0x110
            NRF_CLOCK->CTIV = 0;
    4906:	f8c3 2538 	str.w	r2, [r3, #1336]	; 0x538
    #endif

    #if NRF52_ERRATA_37_ENABLE_WORKAROUND
        /* Workaround for Errata 37 "RADIO: Encryption engine is slow by default" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf52_errata_37()){
    490a:	f7ff ffb3 	bl	4874 <nrf52_errata_16>
    490e:	b110      	cbz	r0, 4916 <SystemInit+0x66>
            *(volatile uint32_t *)0x400005A0 = 0x3;
    4910:	4b72      	ldr	r3, [pc, #456]	; (4adc <SystemInit+0x22c>)
    4912:	2203      	movs	r2, #3
    4914:	601a      	str	r2, [r3, #0]
    #endif

    #if NRF52_ERRATA_57_ENABLE_WORKAROUND
        /* Workaround for Errata 57 "NFCT: NFC Modulation amplitude" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf52_errata_57()){
    4916:	f7ff ffad 	bl	4874 <nrf52_errata_16>
    491a:	b140      	cbz	r0, 492e <SystemInit+0x7e>
            *(volatile uint32_t *)0x40005610 = 0x00000005;
    491c:	4b70      	ldr	r3, [pc, #448]	; (4ae0 <SystemInit+0x230>)
    491e:	2205      	movs	r2, #5
    4920:	601a      	str	r2, [r3, #0]
            *(volatile uint32_t *)0x40005688 = 0x00000001;
    4922:	2201      	movs	r2, #1
    4924:	679a      	str	r2, [r3, #120]	; 0x78
            *(volatile uint32_t *)0x40005618 = 0x00000000;
    4926:	2200      	movs	r2, #0
    4928:	609a      	str	r2, [r3, #8]
            *(volatile uint32_t *)0x40005614 = 0x0000003F;
    492a:	223f      	movs	r2, #63	; 0x3f
    492c:	605a      	str	r2, [r3, #4]
        #if defined (NRF52832_XXAA) || defined (DEVELOP_IN_NRF52832)\
         || defined (NRF52832_XXAB) || defined (DEVELOP_IN_NRF52832)
            uint32_t var1;
            uint32_t var2;

            if (*(uint32_t *)0x10000130ul == 0xFFFFFFFF)
    492e:	4b6d      	ldr	r3, [pc, #436]	; (4ae4 <SystemInit+0x234>)
    4930:	681a      	ldr	r2, [r3, #0]
    4932:	1c51      	adds	r1, r2, #1
            {
                var1 = ((*(uint32_t *)0xF0000FE0ul) & 0x000000FFul);
    4934:	bf0b      	itete	eq
    4936:	4b6c      	ldreq	r3, [pc, #432]	; (4ae8 <SystemInit+0x238>)
                var2 = ((*(uint32_t *)0xF0000FE8ul) & 0x000000F0ul) >> 4;
            }
            else
            {
                var1 = *(uint32_t *)0x10000130ul;
                var2 = *(uint32_t *)0x10000134ul;
    4938:	4b6c      	ldrne	r3, [pc, #432]	; (4aec <SystemInit+0x23c>)
                var1 = ((*(uint32_t *)0xF0000FE0ul) & 0x000000FFul);
    493a:	781a      	ldrbeq	r2, [r3, #0]
                var2 = *(uint32_t *)0x10000134ul;
    493c:	681b      	ldrne	r3, [r3, #0]
                var2 = ((*(uint32_t *)0xF0000FE8ul) & 0x000000F0ul) >> 4;
    493e:	bf02      	ittt	eq
    4940:	3308      	addeq	r3, #8
    4942:	681b      	ldreq	r3, [r3, #0]
    4944:	f3c3 1303 	ubfxeq	r3, r3, #4, #4
            uint32_t var1 = *(uint32_t *)0x10000130ul;
            uint32_t var2 = *(uint32_t *)0x10000134ul;
        #endif
        #if defined (NRF52832_XXAA) || defined (DEVELOP_IN_NRF52832)\
         || defined (NRF52832_XXAB) || defined (DEVELOP_IN_NRF52832)
            if (var1 == 0x06)
    4948:	2a06      	cmp	r2, #6
    494a:	d14d      	bne.n	49e8 <SystemInit+0x138>
            {
                switch(var2)
    494c:	3b03      	subs	r3, #3
    494e:	2b04      	cmp	r3, #4
    4950:	d803      	bhi.n	495a <SystemInit+0xaa>
    #endif

    #if NRF52_ERRATA_66_ENABLE_WORKAROUND
        /* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf52_errata_66()){
    4952:	4a67      	ldr	r2, [pc, #412]	; (4af0 <SystemInit+0x240>)
    4954:	5cd3      	ldrb	r3, [r2, r3]
    4956:	2b00      	cmp	r3, #0
    4958:	d046      	beq.n	49e8 <SystemInit+0x138>
            NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
    495a:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
    495e:	4b65      	ldr	r3, [pc, #404]	; (4af4 <SystemInit+0x244>)
    4960:	f8d2 1404 	ldr.w	r1, [r2, #1028]	; 0x404
    4964:	f8c3 1520 	str.w	r1, [r3, #1312]	; 0x520
            NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
    4968:	f8d2 1408 	ldr.w	r1, [r2, #1032]	; 0x408
    496c:	f8c3 1524 	str.w	r1, [r3, #1316]	; 0x524
            NRF_TEMP->A2 = NRF_FICR->TEMP.A2;
    4970:	f8d2 140c 	ldr.w	r1, [r2, #1036]	; 0x40c
    4974:	f8c3 1528 	str.w	r1, [r3, #1320]	; 0x528
            NRF_TEMP->A3 = NRF_FICR->TEMP.A3;
    4978:	f8d2 1410 	ldr.w	r1, [r2, #1040]	; 0x410
    497c:	f8c3 152c 	str.w	r1, [r3, #1324]	; 0x52c
            NRF_TEMP->A4 = NRF_FICR->TEMP.A4;
    4980:	f8d2 1414 	ldr.w	r1, [r2, #1044]	; 0x414
    4984:	f8c3 1530 	str.w	r1, [r3, #1328]	; 0x530
            NRF_TEMP->A5 = NRF_FICR->TEMP.A5;
    4988:	f8d2 1418 	ldr.w	r1, [r2, #1048]	; 0x418
    498c:	f8c3 1534 	str.w	r1, [r3, #1332]	; 0x534
            NRF_TEMP->B0 = NRF_FICR->TEMP.B0;
    4990:	f8d2 141c 	ldr.w	r1, [r2, #1052]	; 0x41c
    4994:	f8c3 1540 	str.w	r1, [r3, #1344]	; 0x540
            NRF_TEMP->B1 = NRF_FICR->TEMP.B1;
    4998:	f8d2 1420 	ldr.w	r1, [r2, #1056]	; 0x420
    499c:	f8c3 1544 	str.w	r1, [r3, #1348]	; 0x544
            NRF_TEMP->B2 = NRF_FICR->TEMP.B2;
    49a0:	f8d2 1424 	ldr.w	r1, [r2, #1060]	; 0x424
    49a4:	f8c3 1548 	str.w	r1, [r3, #1352]	; 0x548
            NRF_TEMP->B3 = NRF_FICR->TEMP.B3;
    49a8:	f8d2 1428 	ldr.w	r1, [r2, #1064]	; 0x428
    49ac:	f8c3 154c 	str.w	r1, [r3, #1356]	; 0x54c
            NRF_TEMP->B4 = NRF_FICR->TEMP.B4;
    49b0:	f8d2 142c 	ldr.w	r1, [r2, #1068]	; 0x42c
    49b4:	f8c3 1550 	str.w	r1, [r3, #1360]	; 0x550
            NRF_TEMP->B5 = NRF_FICR->TEMP.B5;
    49b8:	f8d2 1430 	ldr.w	r1, [r2, #1072]	; 0x430
    49bc:	f8c3 1554 	str.w	r1, [r3, #1364]	; 0x554
            NRF_TEMP->T0 = NRF_FICR->TEMP.T0;
    49c0:	f8d2 1434 	ldr.w	r1, [r2, #1076]	; 0x434
    49c4:	f8c3 1560 	str.w	r1, [r3, #1376]	; 0x560
            NRF_TEMP->T1 = NRF_FICR->TEMP.T1;
    49c8:	f8d2 1438 	ldr.w	r1, [r2, #1080]	; 0x438
    49cc:	f8c3 1564 	str.w	r1, [r3, #1380]	; 0x564
            NRF_TEMP->T2 = NRF_FICR->TEMP.T2;
    49d0:	f8d2 143c 	ldr.w	r1, [r2, #1084]	; 0x43c
    49d4:	f8c3 1568 	str.w	r1, [r3, #1384]	; 0x568
            NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
    49d8:	f8d2 1440 	ldr.w	r1, [r2, #1088]	; 0x440
    49dc:	f8c3 156c 	str.w	r1, [r3, #1388]	; 0x56c
            NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
    49e0:	f8d2 2444 	ldr.w	r2, [r2, #1092]	; 0x444
    49e4:	f8c3 2570 	str.w	r2, [r3, #1392]	; 0x570
    #endif

    #if NRF52_ERRATA_108_ENABLE_WORKAROUND
        /* Workaround for Errata 108 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf52_errata_108()){
    49e8:	f7ff ff36 	bl	4858 <nrf52_errata_108>
    49ec:	b128      	cbz	r0, 49fa <SystemInit+0x14a>
            *(volatile uint32_t *)0x40000EE4ul = *(volatile uint32_t *)0x10000258ul & 0x0000004Ful;
    49ee:	4b42      	ldr	r3, [pc, #264]	; (4af8 <SystemInit+0x248>)
    49f0:	4a42      	ldr	r2, [pc, #264]	; (4afc <SystemInit+0x24c>)
    49f2:	681b      	ldr	r3, [r3, #0]
    49f4:	f003 034f 	and.w	r3, r3, #79	; 0x4f
    49f8:	6013      	str	r3, [r2, #0]
    #endif

    #if NRF52_ERRATA_136_ENABLE_WORKAROUND
        /* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf52_errata_136()){
    49fa:	f7ff ff2d 	bl	4858 <nrf52_errata_108>
    49fe:	b148      	cbz	r0, 4a14 <SystemInit+0x164>
            if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
    4a00:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4a04:	f8d3 2400 	ldr.w	r2, [r3, #1024]	; 0x400
    4a08:	07d2      	lsls	r2, r2, #31
                NRF_POWER->RESETREAS =  ~POWER_RESETREAS_RESETPIN_Msk;
    4a0a:	bf44      	itt	mi
    4a0c:	f06f 0201 	mvnmi.w	r2, #1
    4a10:	f8c3 2400 	strmi.w	r2, [r3, #1024]	; 0x400
    #ifndef NRF52_SERIES
        return false;
    #else
        #if defined (NRF52832_XXAA) || defined (DEVELOP_IN_NRF52832)\
         || defined (NRF52832_XXAB) || defined (DEVELOP_IN_NRF52832)
            uint32_t var1 = *(uint32_t *)0x10000130ul;
    4a14:	4b33      	ldr	r3, [pc, #204]	; (4ae4 <SystemInit+0x234>)
            uint32_t var2 = *(uint32_t *)0x10000134ul;
        #endif
        #if defined (NRF52832_XXAA) || defined (DEVELOP_IN_NRF52832)\
         || defined (NRF52832_XXAB) || defined (DEVELOP_IN_NRF52832)
            if (var1 == 0x06)
    4a16:	681b      	ldr	r3, [r3, #0]
    4a18:	2b06      	cmp	r3, #6
    4a1a:	d120      	bne.n	4a5e <SystemInit+0x1ae>
            uint32_t var2 = *(uint32_t *)0x10000134ul;
    4a1c:	4b33      	ldr	r3, [pc, #204]	; (4aec <SystemInit+0x23c>)
    4a1e:	681b      	ldr	r3, [r3, #0]
    4a20:	3b03      	subs	r3, #3
    4a22:	2b04      	cmp	r3, #4
    4a24:	d802      	bhi.n	4a2c <SystemInit+0x17c>
    #endif

    #if NRF52_ERRATA_182_ENABLE_WORKAROUND
        /* Workaround for Errata 182 "RADIO: Fixes for anomalies #102, #106, and #107 do not take effect" found at the Errata document
           for your device located at https://infocenter.nordicsemi.com/index.jsp  */
        if (nrf52_errata_182()){
    4a26:	4a36      	ldr	r2, [pc, #216]	; (4b00 <SystemInit+0x250>)
    4a28:	5cd3      	ldrb	r3, [r2, r3]
    4a2a:	b143      	cbz	r3, 4a3e <SystemInit+0x18e>
            *(volatile uint32_t *) 0x4000173C |= (0x1 << 10);
    4a2c:	4a35      	ldr	r2, [pc, #212]	; (4b04 <SystemInit+0x254>)
    4a2e:	6813      	ldr	r3, [r2, #0]
    4a30:	f443 6380 	orr.w	r3, r3, #1024	; 0x400
    4a34:	6013      	str	r3, [r2, #0]
         || defined (NRF52820_XXAA) || defined (DEVELOP_IN_NRF52820)\
         || defined (NRF52832_XXAA) || defined (DEVELOP_IN_NRF52832)\
         || defined (NRF52832_XXAB) || defined (DEVELOP_IN_NRF52832)\
         || defined (NRF52833_XXAA) || defined (DEVELOP_IN_NRF52833)\
         || defined (NRF52840_XXAA) || defined (DEVELOP_IN_NRF52840)
            uint32_t var1 = *(uint32_t *)0x10000130ul;
    4a36:	4b2b      	ldr	r3, [pc, #172]	; (4ae4 <SystemInit+0x234>)
            uint32_t var2 = *(uint32_t *)0x10000134ul;
        #endif
        #if defined (NRF52832_XXAA) || defined (DEVELOP_IN_NRF52832)\
         || defined (NRF52832_XXAB) || defined (DEVELOP_IN_NRF52832)
            if (var1 == 0x06)
    4a38:	681b      	ldr	r3, [r3, #0]
    4a3a:	2b06      	cmp	r3, #6
    4a3c:	d10f      	bne.n	4a5e <SystemInit+0x1ae>
            uint32_t var2 = *(uint32_t *)0x10000134ul;
    4a3e:	4b2b      	ldr	r3, [pc, #172]	; (4aec <SystemInit+0x23c>)
    4a40:	681b      	ldr	r3, [r3, #0]
    4a42:	3b03      	subs	r3, #3
    4a44:	2b04      	cmp	r3, #4
    4a46:	d802      	bhi.n	4a4e <SystemInit+0x19e>
            {
                /* Prevent processor from unlocking APPROTECT soft branch after this point. */
                NRF_APPROTECT->FORCEPROTECT = APPROTECT_FORCEPROTECT_FORCEPROTECT_Force;
            }
        #else
            if (nrf52_configuration_249())
    4a48:	4a2f      	ldr	r2, [pc, #188]	; (4b08 <SystemInit+0x258>)
    4a4a:	5cd3      	ldrb	r3, [r2, r3]
    4a4c:	b13b      	cbz	r3, 4a5e <SystemInit+0x1ae>
            {
                /* Load APPROTECT soft branch from UICR.
                   If UICR->APPROTECT is disabled, POWER->APPROTECT will be disabled. */
                NRF_APPROTECT->DISABLE = NRF_UICR->APPROTECT;
    4a4e:	f04f 2310 	mov.w	r3, #268439552	; 0x10001000
    4a52:	f8d3 2208 	ldr.w	r2, [r3, #520]	; 0x208
    4a56:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4a5a:	f8c3 2558 	str.w	r2, [r3, #1368]	; 0x558

    /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
      defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
      reserved for PinReset and not available as normal GPIO. */
    #if defined (CONFIG_GPIO_AS_PINRESET)
        if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
    4a5e:	f04f 2310 	mov.w	r3, #268439552	; 0x10001000
    4a62:	f8d3 2200 	ldr.w	r2, [r3, #512]	; 0x200
    4a66:	2a00      	cmp	r2, #0
    4a68:	db03      	blt.n	4a72 <SystemInit+0x1c2>
            ((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
    4a6a:	f8d3 3204 	ldr.w	r3, [r3, #516]	; 0x204
        if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
    4a6e:	2b00      	cmp	r3, #0
    4a70:	da22      	bge.n	4ab8 <SystemInit+0x208>
    NRF_NVMC->CONFIG = mode << NVMC_CONFIG_WEN_Pos;
    4a72:	4926      	ldr	r1, [pc, #152]	; (4b0c <SystemInit+0x25c>)
    4a74:	2301      	movs	r3, #1
    4a76:	f8c1 3504 	str.w	r3, [r1, #1284]	; 0x504
    nvmc_wait();
    4a7a:	f7ff ff11 	bl	48a0 <nvmc_wait>
            nvmc_config(NVMC_CONFIG_WEN_Wen);
            NRF_UICR->PSELRESET[0] = RESET_PIN;
    4a7e:	f04f 2010 	mov.w	r0, #268439552	; 0x10001000
    4a82:	2415      	movs	r4, #21
    4a84:	f8c0 4200 	str.w	r4, [r0, #512]	; 0x200
            nvmc_wait();
    4a88:	f7ff ff0a 	bl	48a0 <nvmc_wait>
            NRF_UICR->PSELRESET[1] = RESET_PIN;
    4a8c:	f8c0 4204 	str.w	r4, [r0, #516]	; 0x204
            nvmc_wait();
    4a90:	f7ff ff06 	bl	48a0 <nvmc_wait>
    NRF_NVMC->CONFIG = mode << NVMC_CONFIG_WEN_Pos;
    4a94:	2300      	movs	r3, #0
    4a96:	f8c1 3504 	str.w	r3, [r1, #1284]	; 0x504
    nvmc_wait();
    4a9a:	f7ff ff01 	bl	48a0 <nvmc_wait>
  __ASM volatile ("dsb 0xF":::"memory");
    4a9e:	f3bf 8f4f 	dsb	sy
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
    4aa2:	491b      	ldr	r1, [pc, #108]	; (4b10 <SystemInit+0x260>)
    4aa4:	4b1b      	ldr	r3, [pc, #108]	; (4b14 <SystemInit+0x264>)
    4aa6:	68ca      	ldr	r2, [r1, #12]
    4aa8:	f402 62e0 	and.w	r2, r2, #1792	; 0x700
    4aac:	4313      	orrs	r3, r2
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
    4aae:	60cb      	str	r3, [r1, #12]
    4ab0:	f3bf 8f4f 	dsb	sy
    __NOP();
    4ab4:	bf00      	nop
  for(;;)                                                           /* wait until reset */
    4ab6:	e7fd      	b.n	4ab4 <SystemInit+0x204>
    SystemCoreClock = __SYSTEM_CLOCK_64M;
    4ab8:	4b17      	ldr	r3, [pc, #92]	; (4b18 <SystemInit+0x268>)
    4aba:	4a18      	ldr	r2, [pc, #96]	; (4b1c <SystemInit+0x26c>)
    4abc:	601a      	str	r2, [r3, #0]
            NVIC_SystemReset();
        }
    #endif

    SystemCoreClockUpdate();
}
    4abe:	bd10      	pop	{r4, pc}
    4ac0:	10000324 	.word	0x10000324
    4ac4:	40013540 	.word	0x40013540
    4ac8:	4007c074 	.word	0x4007c074
    4acc:	baadf00d 	.word	0xbaadf00d
    4ad0:	10000244 	.word	0x10000244
    4ad4:	4000053c 	.word	0x4000053c
    4ad8:	e000edf0 	.word	0xe000edf0
    4adc:	400005a0 	.word	0x400005a0
    4ae0:	40005610 	.word	0x40005610
    4ae4:	10000130 	.word	0x10000130
    4ae8:	f0000fe0 	.word	0xf0000fe0
    4aec:	10000134 	.word	0x10000134
    4af0:	00009c10 	.word	0x00009c10
    4af4:	4000c000 	.word	0x4000c000
    4af8:	10000258 	.word	0x10000258
    4afc:	40000ee4 	.word	0x40000ee4
    4b00:	00009c15 	.word	0x00009c15
    4b04:	4000173c 	.word	0x4000173c
    4b08:	00009c1a 	.word	0x00009c1a
    4b0c:	4001e000 	.word	0x4001e000
    4b10:	e000ed00 	.word	0xe000ed00
    4b14:	05fa0004 	.word	0x05fa0004
    4b18:	20000068 	.word	0x20000068
    4b1c:	03d09000 	.word	0x03d09000

00004b20 <nrfx_flag32_alloc>:
{
    return (mask & NRFX_BIT(bitpos)) ? false : true;
}

nrfx_err_t nrfx_flag32_alloc(nrfx_atomic_t * p_mask, uint8_t *p_flag)
{
    4b20:	b570      	push	{r4, r5, r6, lr}
        idx = 31 - NRF_CLZ(prev_mask);
        if (idx < 0) {
            return NRFX_ERROR_NO_MEM;
        }

        new_mask = prev_mask & ~NRFX_BIT(idx);
    4b22:	2501      	movs	r5, #1
        prev_mask = *p_mask;
    4b24:	6803      	ldr	r3, [r0, #0]
        idx = 31 - NRF_CLZ(prev_mask);
    4b26:	fab3 f283 	clz	r2, r3
        if (idx < 0) {
    4b2a:	2a20      	cmp	r2, #32
        idx = 31 - NRF_CLZ(prev_mask);
    4b2c:	f1c2 041f 	rsb	r4, r2, #31
        if (idx < 0) {
    4b30:	d014      	beq.n	4b5c <nrfx_flag32_alloc+0x3c>
	return __atomic_compare_exchange_n(target, &old_value, new_value,
    4b32:	f3bf 8f5b 	dmb	ish
        new_mask = prev_mask & ~NRFX_BIT(idx);
    4b36:	fa05 f204 	lsl.w	r2, r5, r4
    4b3a:	ea23 0202 	bic.w	r2, r3, r2
    4b3e:	e850 6f00 	ldrex	r6, [r0]
    4b42:	429e      	cmp	r6, r3
    4b44:	d104      	bne.n	4b50 <nrfx_flag32_alloc+0x30>
    4b46:	e840 2c00 	strex	ip, r2, [r0]
    4b4a:	f1bc 0f00 	cmp.w	ip, #0
    4b4e:	d1f6      	bne.n	4b3e <nrfx_flag32_alloc+0x1e>
    4b50:	f3bf 8f5b 	dmb	ish
    } while (!NRFX_ATOMIC_CAS(p_mask, prev_mask, new_mask));
    4b54:	d1e6      	bne.n	4b24 <nrfx_flag32_alloc+0x4>

    *p_flag = idx;

    return NRFX_SUCCESS;
    4b56:	4802      	ldr	r0, [pc, #8]	; (4b60 <nrfx_flag32_alloc+0x40>)
    *p_flag = idx;
    4b58:	700c      	strb	r4, [r1, #0]
}
    4b5a:	bd70      	pop	{r4, r5, r6, pc}
            return NRFX_ERROR_NO_MEM;
    4b5c:	4801      	ldr	r0, [pc, #4]	; (4b64 <nrfx_flag32_alloc+0x44>)
    4b5e:	e7fc      	b.n	4b5a <nrfx_flag32_alloc+0x3a>
    4b60:	0bad0000 	.word	0x0bad0000
    4b64:	0bad0002 	.word	0x0bad0002

00004b68 <nrfx_flag32_free>:

nrfx_err_t nrfx_flag32_free(nrfx_atomic_t * p_mask, uint8_t flag)
{
    uint32_t new_mask, prev_mask;

    if ((NRFX_BIT(flag) & *p_mask))
    4b68:	6803      	ldr	r3, [r0, #0]
    4b6a:	40cb      	lsrs	r3, r1
    4b6c:	07db      	lsls	r3, r3, #31
{
    4b6e:	b510      	push	{r4, lr}
    if ((NRFX_BIT(flag) & *p_mask))
    4b70:	d415      	bmi.n	4b9e <nrfx_flag32_free+0x36>
        return NRFX_ERROR_INVALID_PARAM;
    }

    do {
        prev_mask = *p_mask;
        new_mask = prev_mask | NRFX_BIT(flag);
    4b72:	2301      	movs	r3, #1
    4b74:	fa03 f101 	lsl.w	r1, r3, r1
        prev_mask = *p_mask;
    4b78:	6803      	ldr	r3, [r0, #0]
    4b7a:	f3bf 8f5b 	dmb	ish
        new_mask = prev_mask | NRFX_BIT(flag);
    4b7e:	ea41 0203 	orr.w	r2, r1, r3
    4b82:	e850 4f00 	ldrex	r4, [r0]
    4b86:	429c      	cmp	r4, r3
    4b88:	d104      	bne.n	4b94 <nrfx_flag32_free+0x2c>
    4b8a:	e840 2c00 	strex	ip, r2, [r0]
    4b8e:	f1bc 0f00 	cmp.w	ip, #0
    4b92:	d1f6      	bne.n	4b82 <nrfx_flag32_free+0x1a>
    4b94:	f3bf 8f5b 	dmb	ish
    } while (!NRFX_ATOMIC_CAS(p_mask, prev_mask, new_mask));
    4b98:	d1ee      	bne.n	4b78 <nrfx_flag32_free+0x10>

    return NRFX_SUCCESS;
    4b9a:	4802      	ldr	r0, [pc, #8]	; (4ba4 <nrfx_flag32_free+0x3c>)
}
    4b9c:	bd10      	pop	{r4, pc}
        return NRFX_ERROR_INVALID_PARAM;
    4b9e:	4802      	ldr	r0, [pc, #8]	; (4ba8 <nrfx_flag32_free+0x40>)
    4ba0:	e7fc      	b.n	4b9c <nrfx_flag32_free+0x34>
    4ba2:	bf00      	nop
    4ba4:	0bad0000 	.word	0x0bad0000
    4ba8:	0bad0004 	.word	0x0bad0004

00004bac <nrfx_clock_init>:
nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler)
{
    NRFX_ASSERT(event_handler);

    nrfx_err_t err_code = NRFX_SUCCESS;
    if (m_clock_cb.module_initialized)
    4bac:	4b04      	ldr	r3, [pc, #16]	; (4bc0 <nrfx_clock_init+0x14>)
    4bae:	791a      	ldrb	r2, [r3, #4]
    4bb0:	b922      	cbnz	r2, 4bbc <nrfx_clock_init+0x10>
    {
#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
        m_clock_cb.cal_state = CAL_STATE_IDLE;
#endif
        m_clock_cb.event_handler = event_handler;
        m_clock_cb.module_initialized = true;
    4bb2:	2201      	movs	r2, #1
        m_clock_cb.event_handler = event_handler;
    4bb4:	6018      	str	r0, [r3, #0]
        m_clock_cb.module_initialized = true;
    4bb6:	809a      	strh	r2, [r3, #4]
    nrfx_err_t err_code = NRFX_SUCCESS;
    4bb8:	4802      	ldr	r0, [pc, #8]	; (4bc4 <nrfx_clock_init+0x18>)
    4bba:	4770      	bx	lr
        err_code = NRFX_ERROR_ALREADY_INITIALIZED;
    4bbc:	4802      	ldr	r0, [pc, #8]	; (4bc8 <nrfx_clock_init+0x1c>)
#endif
    }

    NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
    return err_code;
}
    4bbe:	4770      	bx	lr
    4bc0:	200012e0 	.word	0x200012e0
    4bc4:	0bad0000 	.word	0x0bad0000
    4bc8:	0bad000c 	.word	0x0bad000c

00004bcc <nrfx_clock_start>:
    m_clock_cb.module_initialized = false;
    NRFX_LOG_INFO("Uninitialized.");
}

void nrfx_clock_start(nrf_clock_domain_t domain)
{
    4bcc:	b530      	push	{r4, r5, lr}
    NRFX_ASSERT(m_clock_cb.module_initialized);
    switch (domain)
    4bce:	b110      	cbz	r0, 4bd6 <nrfx_clock_start+0xa>
    4bd0:	2801      	cmp	r0, #1
    4bd2:	d033      	beq.n	4c3c <nrfx_clock_start+0x70>
#endif
        default:
            NRFX_ASSERT(0);
            break;
    }
}
    4bd4:	bd30      	pop	{r4, r5, pc}
                    (nrf_clock_lfclk_t)((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_SRC_Msk)
    4bd6:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4bda:	f8d3 2418 	ldr.w	r2, [r3, #1048]	; 0x418
            if ((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_STATE_Msk)
    4bde:	f8d3 1418 	ldr.w	r1, [r3, #1048]	; 0x418
    4be2:	f411 3f80 	tst.w	r1, #65536	; 0x10000
    4be6:	4619      	mov	r1, r3
    4be8:	d024      	beq.n	4c34 <nrfx_clock_start+0x68>
                                        >> CLOCK_LFCLKSTAT_SRC_Pos);
    4bea:	f002 0203 	and.w	r2, r2, #3
                if (nrf_clock_is_running(NRF_CLOCK, NRF_CLOCK_DOMAIN_LFCLK, &lfclksrc) &&
    4bee:	2a01      	cmp	r2, #1
    4bf0:	d120      	bne.n	4c34 <nrfx_clock_start+0x68>
    p_reg->LFCLKSRC = (uint32_t)(source);
    4bf2:	f8c3 2518 	str.w	r2, [r3, #1304]	; 0x518
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4bf6:	4b16      	ldr	r3, [pc, #88]	; (4c50 <nrfx_clock_start+0x84>)
    4bf8:	2200      	movs	r2, #0
    4bfa:	601a      	str	r2, [r3, #0]
    4bfc:	681b      	ldr	r3, [r3, #0]
    p_reg->INTENSET = mask;
    4bfe:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4c02:	2202      	movs	r2, #2
    4c04:	f8c3 2304 	str.w	r2, [r3, #772]	; 0x304
    core_debug = CoreDebug->DEMCR;
    4c08:	4a12      	ldr	r2, [pc, #72]	; (4c54 <nrfx_clock_start+0x88>)
    4c0a:	68d0      	ldr	r0, [r2, #12]
    CoreDebug->DEMCR = core_debug | CoreDebug_DEMCR_TRCENA_Msk;
    4c0c:	f040 7380 	orr.w	r3, r0, #16777216	; 0x1000000
    4c10:	60d3      	str	r3, [r2, #12]
    dwt_ctrl = DWT->CTRL;
    4c12:	4b11      	ldr	r3, [pc, #68]	; (4c58 <nrfx_clock_start+0x8c>)
    4c14:	681c      	ldr	r4, [r3, #0]
    DWT->CTRL = dwt_ctrl | DWT_CTRL_CYCCNTENA_Msk;
    4c16:	f044 0101 	orr.w	r1, r4, #1
    4c1a:	6019      	str	r1, [r3, #0]
    cyccnt_inital = DWT->CYCCNT;
    4c1c:	685d      	ldr	r5, [r3, #4]
    while ((DWT->CYCCNT - cyccnt_inital) < ANOMALY_132_DELAY_CYCLES)
    4c1e:	6859      	ldr	r1, [r3, #4]
    4c20:	1b49      	subs	r1, r1, r5
    4c22:	f5b1 5f0a 	cmp.w	r1, #8832	; 0x2280
    4c26:	d3fa      	bcc.n	4c1e <nrfx_clock_start+0x52>
    DWT->CTRL = dwt_ctrl;
    4c28:	601c      	str	r4, [r3, #0]
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    4c2a:	4b0c      	ldr	r3, [pc, #48]	; (4c5c <nrfx_clock_start+0x90>)
    CoreDebug->DEMCR = core_debug;
    4c2c:	60d0      	str	r0, [r2, #12]
    4c2e:	2201      	movs	r2, #1
    4c30:	601a      	str	r2, [r3, #0]
}
    4c32:	e7cf      	b.n	4bd4 <nrfx_clock_start+0x8>
    p_reg->LFCLKSRC = (uint32_t)(source);
    4c34:	2300      	movs	r3, #0
    4c36:	f8c1 3518 	str.w	r3, [r1, #1304]	; 0x518
}
    4c3a:	e7dc      	b.n	4bf6 <nrfx_clock_start+0x2a>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4c3c:	4b08      	ldr	r3, [pc, #32]	; (4c60 <nrfx_clock_start+0x94>)
    4c3e:	2200      	movs	r2, #0
    4c40:	601a      	str	r2, [r3, #0]
    4c42:	681b      	ldr	r3, [r3, #0]
    p_reg->INTENSET = mask;
    4c44:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4c48:	f8c3 0304 	str.w	r0, [r3, #772]	; 0x304
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    4c4c:	6018      	str	r0, [r3, #0]
}
    4c4e:	e7c1      	b.n	4bd4 <nrfx_clock_start+0x8>
    4c50:	40000104 	.word	0x40000104
    4c54:	e000edf0 	.word	0xe000edf0
    4c58:	e0001000 	.word	0xe0001000
    4c5c:	40000008 	.word	0x40000008
    4c60:	40000100 	.word	0x40000100

00004c64 <nrfx_clock_stop>:

void nrfx_clock_stop(nrf_clock_domain_t domain)
{
    4c64:	b538      	push	{r3, r4, r5, lr}
    NRFX_ASSERT(m_clock_cb.module_initialized);
    switch (domain)
    4c66:	b110      	cbz	r0, 4c6e <nrfx_clock_stop+0xa>
    4c68:	2801      	cmp	r0, #1
    4c6a:	d018      	beq.n	4c9e <nrfx_clock_stop+0x3a>
    if (domain == NRF_CLOCK_DOMAIN_HFCLK)
    {
            m_clock_cb.hfclk_started = false;
    }
#endif
}
    4c6c:	bd38      	pop	{r3, r4, r5, pc}
    p_reg->INTENCLR = mask;
    4c6e:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4c72:	2202      	movs	r2, #2
    4c74:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4c78:	4a18      	ldr	r2, [pc, #96]	; (4cdc <nrfx_clock_stop+0x78>)
    4c7a:	6010      	str	r0, [r2, #0]
    4c7c:	6812      	ldr	r2, [r2, #0]
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    4c7e:	4a18      	ldr	r2, [pc, #96]	; (4ce0 <nrfx_clock_stop+0x7c>)
    4c80:	2101      	movs	r1, #1
    4c82:	6011      	str	r1, [r2, #0]
    4c84:	f242 7510 	movw	r5, #10000	; 0x2710
            if ((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_STATE_Msk)
    4c88:	461c      	mov	r4, r3
    4c8a:	f8d4 3418 	ldr.w	r3, [r4, #1048]	; 0x418
    4c8e:	03db      	lsls	r3, r3, #15
    4c90:	d5ec      	bpl.n	4c6c <nrfx_clock_stop+0x8>
        NRFX_WAIT_FOR(!nrfx_clock_is_running(domain, NULL), 10000, 1, stopped);
    4c92:	2001      	movs	r0, #1
    4c94:	f003 fd53 	bl	873e <nrfx_busy_wait>
    4c98:	3d01      	subs	r5, #1
    4c9a:	d1f6      	bne.n	4c8a <nrfx_clock_stop+0x26>
    4c9c:	e7e6      	b.n	4c6c <nrfx_clock_stop+0x8>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4c9e:	4b11      	ldr	r3, [pc, #68]	; (4ce4 <nrfx_clock_stop+0x80>)
    p_reg->INTENCLR = mask;
    4ca0:	f04f 4480 	mov.w	r4, #1073741824	; 0x40000000
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4ca4:	2200      	movs	r2, #0
    p_reg->INTENCLR = mask;
    4ca6:	f8c4 0308 	str.w	r0, [r4, #776]	; 0x308
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4caa:	601a      	str	r2, [r3, #0]
    4cac:	681b      	ldr	r3, [r3, #0]
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    4cae:	4b0e      	ldr	r3, [pc, #56]	; (4ce8 <nrfx_clock_stop+0x84>)
    4cb0:	f242 7510 	movw	r5, #10000	; 0x2710
    4cb4:	6018      	str	r0, [r3, #0]
                    (nrf_clock_hfclk_t)((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_SRC_Msk)
    4cb6:	f8d4 340c 	ldr.w	r3, [r4, #1036]	; 0x40c
            if ((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_STATE_Msk)
    4cba:	f8d4 240c 	ldr.w	r2, [r4, #1036]	; 0x40c
    4cbe:	03d2      	lsls	r2, r2, #15
                    (nrf_clock_hfclk_t)((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_SRC_Msk)
    4cc0:	f003 0301 	and.w	r3, r3, #1
            if ((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_STATE_Msk)
    4cc4:	d505      	bpl.n	4cd2 <nrfx_clock_stop+0x6e>
        NRFX_WAIT_FOR((!nrfx_clock_is_running(domain, &clk_src) ||
    4cc6:	b123      	cbz	r3, 4cd2 <nrfx_clock_stop+0x6e>
    4cc8:	2001      	movs	r0, #1
    4cca:	f003 fd38 	bl	873e <nrfx_busy_wait>
    4cce:	3d01      	subs	r5, #1
    4cd0:	d1f1      	bne.n	4cb6 <nrfx_clock_stop+0x52>
            m_clock_cb.hfclk_started = false;
    4cd2:	4b06      	ldr	r3, [pc, #24]	; (4cec <nrfx_clock_stop+0x88>)
    4cd4:	2200      	movs	r2, #0
    4cd6:	715a      	strb	r2, [r3, #5]
    4cd8:	e7c8      	b.n	4c6c <nrfx_clock_stop+0x8>
    4cda:	bf00      	nop
    4cdc:	40000104 	.word	0x40000104
    4ce0:	4000000c 	.word	0x4000000c
    4ce4:	40000100 	.word	0x40000100
    4ce8:	40000004 	.word	0x40000004
    4cec:	200012e0 	.word	0x200012e0

00004cf0 <nrfx_power_clock_irq_handler>:
    return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + event));
    4cf0:	4b16      	ldr	r3, [pc, #88]	; (4d4c <nrfx_power_clock_irq_handler+0x5c>)
    4cf2:	681a      	ldr	r2, [r3, #0]
    }
}
#endif

void nrfx_clock_irq_handler(void)
{
    4cf4:	b510      	push	{r4, lr}
    if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED))
    4cf6:	b16a      	cbz	r2, 4d14 <nrfx_power_clock_irq_handler+0x24>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4cf8:	2200      	movs	r2, #0
    4cfa:	601a      	str	r2, [r3, #0]
    4cfc:	681b      	ldr	r3, [r3, #0]
    p_reg->INTENCLR = mask;
    4cfe:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4d02:	2201      	movs	r2, #1
    4d04:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
        nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED);
        NRFX_LOG_DEBUG("Event: NRF_CLOCK_EVENT_HFCLKSTARTED");
        nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HF_STARTED_MASK);

#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
        if (!m_clock_cb.hfclk_started)
    4d08:	4b11      	ldr	r3, [pc, #68]	; (4d50 <nrfx_power_clock_irq_handler+0x60>)
    4d0a:	7958      	ldrb	r0, [r3, #5]
    4d0c:	b910      	cbnz	r0, 4d14 <nrfx_power_clock_irq_handler+0x24>
        {
            m_clock_cb.hfclk_started = true;
    4d0e:	715a      	strb	r2, [r3, #5]
            m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK_STARTED);
    4d10:	681b      	ldr	r3, [r3, #0]
    4d12:	4798      	blx	r3
    return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + event));
    4d14:	4b0f      	ldr	r3, [pc, #60]	; (4d54 <nrfx_power_clock_irq_handler+0x64>)
    4d16:	681a      	ldr	r2, [r3, #0]
        }
#else
        m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK_STARTED);
#endif
    }
    if (nrf_clock_event_check(NRF_CLOCK, NRF_CLOCK_EVENT_LFCLKSTARTED))
    4d18:	b172      	cbz	r2, 4d38 <nrfx_power_clock_irq_handler+0x48>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    4d1a:	2200      	movs	r2, #0
    4d1c:	601a      	str	r2, [r3, #0]
    4d1e:	681b      	ldr	r3, [r3, #0]
                    (nrf_clock_lfclk_t)((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_SRC_Msk)
    4d20:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    4d24:	f8d3 2418 	ldr.w	r2, [r3, #1048]	; 0x418
            if ((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_STATE_Msk)
    4d28:	f8d3 1418 	ldr.w	r1, [r3, #1048]	; 0x418
        NRFX_LOG_DEBUG("Event: NRF_CLOCK_EVENT_LFCLKSTARTED");

#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LFXO_TWO_STAGE_ENABLED)
        nrf_clock_lfclk_t lfclksrc;
        (void)nrf_clock_is_running(NRF_CLOCK, NRF_CLOCK_DOMAIN_LFCLK, &lfclksrc);
        if (lfclksrc == NRF_CLOCK_LFCLK_RC)
    4d2c:	0792      	lsls	r2, r2, #30
    4d2e:	d104      	bne.n	4d3a <nrfx_power_clock_irq_handler+0x4a>
    p_reg->LFCLKSRC = (uint32_t)(source);
    4d30:	2201      	movs	r2, #1
    4d32:	f8c3 2518 	str.w	r2, [r3, #1304]	; 0x518
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    4d36:	609a      	str	r2, [r3, #8]
        nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_HF192M_STARTED_MASK);

        m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK192M_STARTED);
    }
#endif
}
    4d38:	bd10      	pop	{r4, pc}
    p_reg->INTENCLR = mask;
    4d3a:	2202      	movs	r2, #2
    4d3c:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
            m_clock_cb.event_handler(NRFX_CLOCK_EVT_LFCLK_STARTED);
    4d40:	4b03      	ldr	r3, [pc, #12]	; (4d50 <nrfx_power_clock_irq_handler+0x60>)
}
    4d42:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
            m_clock_cb.event_handler(NRFX_CLOCK_EVT_LFCLK_STARTED);
    4d46:	681b      	ldr	r3, [r3, #0]
    4d48:	2001      	movs	r0, #1
    4d4a:	4718      	bx	r3
    4d4c:	40000100 	.word	0x40000100
    4d50:	200012e0 	.word	0x200012e0
    4d54:	40000104 	.word	0x40000104

00004d58 <call_handler>:
    nrf_gpiote_event_t event = nrfx_gpiote_in_event_get(pin);
    return nrf_gpiote_event_address_get(NRF_GPIOTE, event);
}

static void call_handler(nrfx_gpiote_pin_t pin, nrfx_gpiote_trigger_t trigger)
{
    4d58:	b570      	push	{r4, r5, r6, lr}
    int32_t handler_id = PIN_GET_HANDLER_ID(m_cb.pin_flags[pin]);
    4d5a:	f100 0308 	add.w	r3, r0, #8
    4d5e:	4c0c      	ldr	r4, [pc, #48]	; (4d90 <call_handler+0x38>)
    4d60:	f834 3013 	ldrh.w	r3, [r4, r3, lsl #1]
    4d64:	05da      	lsls	r2, r3, #23
{
    4d66:	4605      	mov	r5, r0
    4d68:	460e      	mov	r6, r1
    int32_t handler_id = PIN_GET_HANDLER_ID(m_cb.pin_flags[pin]);
    4d6a:	d507      	bpl.n	4d7c <call_handler+0x24>
    4d6c:	f3c3 2343 	ubfx	r3, r3, #9, #4
    nrfx_gpiote_handler_config_t const * handler = channel_handler_get(pin);

    if (handler)
    {
        handler->handler(pin, trigger, handler->p_context);
    4d70:	eb04 02c3 	add.w	r2, r4, r3, lsl #3
    4d74:	f854 3033 	ldr.w	r3, [r4, r3, lsl #3]
    4d78:	6852      	ldr	r2, [r2, #4]
    4d7a:	4798      	blx	r3
    }
    if (m_cb.global_handler.handler)
    4d7c:	68a3      	ldr	r3, [r4, #8]
    4d7e:	b12b      	cbz	r3, 4d8c <call_handler+0x34>
    {
        m_cb.global_handler.handler(pin, trigger, m_cb.global_handler.p_context);
    4d80:	68e2      	ldr	r2, [r4, #12]
    4d82:	4631      	mov	r1, r6
    4d84:	4628      	mov	r0, r5
    }
}
    4d86:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
        m_cb.global_handler.handler(pin, trigger, m_cb.global_handler.p_context);
    4d8a:	4718      	bx	r3
}
    4d8c:	bd70      	pop	{r4, r5, r6, pc}
    4d8e:	bf00      	nop
    4d90:	2000006c 	.word	0x2000006c

00004d94 <release_handler>:
    int32_t handler_id = PIN_GET_HANDLER_ID(m_cb.pin_flags[pin]);
    4d94:	4b12      	ldr	r3, [pc, #72]	; (4de0 <release_handler+0x4c>)
    4d96:	3008      	adds	r0, #8
{
    4d98:	b410      	push	{r4}
    int32_t handler_id = PIN_GET_HANDLER_ID(m_cb.pin_flags[pin]);
    4d9a:	f833 2010 	ldrh.w	r2, [r3, r0, lsl #1]
    4d9e:	05d1      	lsls	r1, r2, #23
    4da0:	d51b      	bpl.n	4dda <release_handler+0x46>
    4da2:	f3c2 2143 	ubfx	r1, r2, #9, #4
    m_cb.pin_flags[pin] &= ~PIN_HANDLER_MASK;
    4da6:	f422 52f8 	bic.w	r2, r2, #7936	; 0x1f00
    4daa:	f823 2010 	strh.w	r2, [r3, r0, lsl #1]
    for (uint32_t i = 0; i < MAX_PIN_NUMBER; i++)
    4dae:	f103 0410 	add.w	r4, r3, #16
    4db2:	2000      	movs	r0, #0
        if (PIN_GET_HANDLER_ID(m_cb.pin_flags[i]) == handler_id)
    4db4:	f834 2b02 	ldrh.w	r2, [r4], #2
    4db8:	f412 7f80 	tst.w	r2, #256	; 0x100
    4dbc:	d003      	beq.n	4dc6 <release_handler+0x32>
    4dbe:	f3c2 2243 	ubfx	r2, r2, #9, #4
    4dc2:	4291      	cmp	r1, r2
    4dc4:	d009      	beq.n	4dda <release_handler+0x46>
    for (uint32_t i = 0; i < MAX_PIN_NUMBER; i++)
    4dc6:	3001      	adds	r0, #1
    4dc8:	2820      	cmp	r0, #32
    4dca:	d1f3      	bne.n	4db4 <release_handler+0x20>
        m_cb.handlers[handler_id].handler = NULL;
    4dcc:	2200      	movs	r2, #0
    4dce:	f843 2031 	str.w	r2, [r3, r1, lsl #3]
        nrfx_err_t err = nrfx_flag32_free(&m_cb.available_evt_handlers, handler_id);
    4dd2:	4804      	ldr	r0, [pc, #16]	; (4de4 <release_handler+0x50>)
}
    4dd4:	bc10      	pop	{r4}
        nrfx_err_t err = nrfx_flag32_free(&m_cb.available_evt_handlers, handler_id);
    4dd6:	f7ff bec7 	b.w	4b68 <nrfx_flag32_free>
}
    4dda:	bc10      	pop	{r4}
    4ddc:	4770      	bx	lr
    4dde:	bf00      	nop
    4de0:	2000006c 	.word	0x2000006c
    4de4:	200000c0 	.word	0x200000c0

00004de8 <pin_handler_trigger_uninit>:
{
    4de8:	b538      	push	{r3, r4, r5, lr}
    return m_cb.pin_flags[pin] & PIN_FLAG_TE_USED;
    4dea:	4c0a      	ldr	r4, [pc, #40]	; (4e14 <pin_handler_trigger_uninit+0x2c>)
    4dec:	f100 0508 	add.w	r5, r0, #8
    4df0:	f834 3015 	ldrh.w	r3, [r4, r5, lsl #1]
    if (pin_in_use_by_te(pin))
    4df4:	069a      	lsls	r2, r3, #26
    4df6:	d506      	bpl.n	4e06 <pin_handler_trigger_uninit+0x1e>
        nrf_gpiote_te_default(NRF_GPIOTE, pin_te_get(pin));
    4df8:	0b5b      	lsrs	r3, r3, #13
                         ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk);
}

NRF_STATIC_INLINE void nrf_gpiote_te_default(NRF_GPIOTE_Type * p_reg, uint32_t idx)
{
    p_reg->CONFIG[idx] = 0;
    4dfa:	4a07      	ldr	r2, [pc, #28]	; (4e18 <pin_handler_trigger_uninit+0x30>)
    4dfc:	f503 73a2 	add.w	r3, r3, #324	; 0x144
    4e00:	2100      	movs	r1, #0
    4e02:	f842 1023 	str.w	r1, [r2, r3, lsl #2]
    release_handler(pin);
    4e06:	f7ff ffc5 	bl	4d94 <release_handler>
    m_cb.pin_flags[pin] = PIN_FLAG_NOT_USED;
    4e0a:	2300      	movs	r3, #0
    4e0c:	f824 3015 	strh.w	r3, [r4, r5, lsl #1]
}
    4e10:	bd38      	pop	{r3, r4, r5, pc}
    4e12:	bf00      	nop
    4e14:	2000006c 	.word	0x2000006c
    4e18:	40006000 	.word	0x40006000

00004e1c <nrfx_gpiote_input_configure>:
{
    4e1c:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    4e1e:	4604      	mov	r4, r0
    if (p_input_config)
    4e20:	b1f9      	cbz	r1, 4e62 <nrfx_gpiote_input_configure+0x46>
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    4e22:	4f4c      	ldr	r7, [pc, #304]	; (4f54 <nrfx_gpiote_input_configure+0x138>)
    4e24:	f100 0c08 	add.w	ip, r0, #8
    4e28:	f837 001c 	ldrh.w	r0, [r7, ip, lsl #1]
        if (pin_is_task_output(pin))
    4e2c:	f000 0522 	and.w	r5, r0, #34	; 0x22
    4e30:	2d22      	cmp	r5, #34	; 0x22
    4e32:	d102      	bne.n	4e3a <nrfx_gpiote_input_configure+0x1e>
            return NRFX_ERROR_INVALID_PARAM;
    4e34:	4848      	ldr	r0, [pc, #288]	; (4f58 <nrfx_gpiote_input_configure+0x13c>)
}
    4e36:	b003      	add	sp, #12
    4e38:	bdf0      	pop	{r4, r5, r6, r7, pc}
    *p_pin = pin_number & 0x1F;
    4e3a:	f004 051f 	and.w	r5, r4, #31
    4e3e:	00ad      	lsls	r5, r5, #2
    4e40:	f105 45a0 	add.w	r5, r5, #1342177280	; 0x50000000
           ((uint32_t)(p_pull  ? *p_pull  : 0) << GPIO_PIN_CNF_PULL_Pos)  |
    4e44:	7809      	ldrb	r1, [r1, #0]
    uint32_t cnf = reg->PIN_CNF[pin_number];
    4e46:	f8d5 6700 	ldr.w	r6, [r5, #1792]	; 0x700
        m_cb.pin_flags[pin] &= ~PIN_FLAG_OUTPUT;
    4e4a:	f020 0002 	bic.w	r0, r0, #2
    cnf &= ~to_update;
    4e4e:	f026 060f 	bic.w	r6, r6, #15
        m_cb.pin_flags[pin] |= PIN_FLAG_IN_USE;
    4e52:	f040 0001 	orr.w	r0, r0, #1
    cnf |= ((uint32_t)(p_dir   ? *p_dir   : 0) << GPIO_PIN_CNF_DIR_Pos)   |
    4e56:	ea46 0181 	orr.w	r1, r6, r1, lsl #2
    4e5a:	f827 001c 	strh.w	r0, [r7, ip, lsl #1]
    reg->PIN_CNF[pin_number] = cnf;
    4e5e:	f8c5 1700 	str.w	r1, [r5, #1792]	; 0x700
    if (p_trigger_config)
    4e62:	b192      	cbz	r2, 4e8a <nrfx_gpiote_input_configure+0x6e>
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    4e64:	483b      	ldr	r0, [pc, #236]	; (4f54 <nrfx_gpiote_input_configure+0x138>)
        nrfx_gpiote_trigger_t trigger = p_trigger_config->trigger;
    4e66:	7816      	ldrb	r6, [r2, #0]
        bool use_evt = p_trigger_config->p_in_channel ? true : false;
    4e68:	6852      	ldr	r2, [r2, #4]
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    4e6a:	f104 0508 	add.w	r5, r4, #8
    4e6e:	f830 1015 	ldrh.w	r1, [r0, r5, lsl #1]
        if (pin_is_output(pin))
    4e72:	078f      	lsls	r7, r1, #30
    4e74:	d50c      	bpl.n	4e90 <nrfx_gpiote_input_configure+0x74>
            if (use_evt)
    4e76:	2a00      	cmp	r2, #0
    4e78:	d1dc      	bne.n	4e34 <nrfx_gpiote_input_configure+0x18>
        m_cb.pin_flags[pin] &= ~PIN_FLAG_TRIG_MODE_MASK;
    4e7a:	f830 2015 	ldrh.w	r2, [r0, r5, lsl #1]
    4e7e:	f022 021c 	bic.w	r2, r2, #28
        m_cb.pin_flags[pin] |= PIN_FLAG_TRIG_MODE_SET(trigger);
    4e82:	ea42 0286 	orr.w	r2, r2, r6, lsl #2
    4e86:	f820 2015 	strh.w	r2, [r0, r5, lsl #1]
    if (p_handler_config)
    4e8a:	bbcb      	cbnz	r3, 4f00 <nrfx_gpiote_input_configure+0xe4>
    return NRFX_SUCCESS;
    4e8c:	4833      	ldr	r0, [pc, #204]	; (4f5c <nrfx_gpiote_input_configure+0x140>)
    4e8e:	e7d2      	b.n	4e36 <nrfx_gpiote_input_configure+0x1a>
            m_cb.pin_flags[pin] &= ~(PIN_TE_ID_MASK | PIN_FLAG_TE_USED);
    4e90:	f021 0120 	bic.w	r1, r1, #32
    4e94:	04c9      	lsls	r1, r1, #19
    4e96:	0cc9      	lsrs	r1, r1, #19
    4e98:	f820 1015 	strh.w	r1, [r0, r5, lsl #1]
            if (use_evt)
    4e9c:	2a00      	cmp	r2, #0
    4e9e:	d0ec      	beq.n	4e7a <nrfx_gpiote_input_configure+0x5e>
                if (!edge)
    4ea0:	2e03      	cmp	r6, #3
    4ea2:	d8c7      	bhi.n	4e34 <nrfx_gpiote_input_configure+0x18>
                uint8_t ch = *p_trigger_config->p_in_channel;
    4ea4:	7817      	ldrb	r7, [r2, #0]
                if (trigger == NRFX_GPIOTE_TRIGGER_NONE)
    4ea6:	b92e      	cbnz	r6, 4eb4 <nrfx_gpiote_input_configure+0x98>
    4ea8:	4a2d      	ldr	r2, [pc, #180]	; (4f60 <nrfx_gpiote_input_configure+0x144>)
    4eaa:	f507 71a2 	add.w	r1, r7, #324	; 0x144
    4eae:	f842 6021 	str.w	r6, [r2, r1, lsl #2]
#if defined(NRF9160_XXAA) || defined(NRF5340_XXAA)
    p_reg->CONFIG[idx] = 0;
#endif
}
    4eb2:	e7e2      	b.n	4e7a <nrfx_gpiote_input_configure+0x5e>
   p_reg->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Msk;
    4eb4:	00ba      	lsls	r2, r7, #2
    4eb6:	f102 4280 	add.w	r2, r2, #1073741824	; 0x40000000
    4eba:	f502 42c0 	add.w	r2, r2, #24576	; 0x6000
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    4ebe:	ea4f 2e04 	mov.w	lr, r4, lsl #8
   p_reg->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Msk;
    4ec2:	f8d2 c510 	ldr.w	ip, [r2, #1296]	; 0x510
    4ec6:	f02c 0c03 	bic.w	ip, ip, #3
    4eca:	f8c2 c510 	str.w	ip, [r2, #1296]	; 0x510
  p_reg->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk | GPIOTE_CONFIG_POLARITY_Msk);
    4ece:	f8d2 c510 	ldr.w	ip, [r2, #1296]	; 0x510
    4ed2:	f42c 3c47 	bic.w	ip, ip, #203776	; 0x31c00
    4ed6:	f42c 7c40 	bic.w	ip, ip, #768	; 0x300
    4eda:	f8c2 c510 	str.w	ip, [r2, #1296]	; 0x510
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    4ede:	f8d2 c510 	ldr.w	ip, [r2, #1296]	; 0x510
    4ee2:	f40e 5ef8 	and.w	lr, lr, #7936	; 0x1f00
    4ee6:	ea4c 4c06 	orr.w	ip, ip, r6, lsl #16
                    m_cb.pin_flags[pin] |= PIN_FLAG_TE_ID(ch);
    4eea:	ea41 3147 	orr.w	r1, r1, r7, lsl #13
    4eee:	ea4c 0c0e 	orr.w	ip, ip, lr
    4ef2:	f041 0120 	orr.w	r1, r1, #32
    4ef6:	f820 1015 	strh.w	r1, [r0, r5, lsl #1]
    4efa:	f8c2 c510 	str.w	ip, [r2, #1296]	; 0x510
    4efe:	e7bc      	b.n	4e7a <nrfx_gpiote_input_configure+0x5e>
        err = pin_handler_set(pin, p_handler_config->handler, p_handler_config->p_context);
    4f00:	e9d3 6700 	ldrd	r6, r7, [r3]
    release_handler(pin);
    4f04:	4620      	mov	r0, r4
    4f06:	f7ff ff45 	bl	4d94 <release_handler>
    if (!handler)
    4f0a:	2e00      	cmp	r6, #0
    4f0c:	d0be      	beq.n	4e8c <nrfx_gpiote_input_configure+0x70>
        if ((m_cb.handlers[i].handler == handler) && (m_cb.handlers[i].p_context == p_context))
    4f0e:	4d11      	ldr	r5, [pc, #68]	; (4f54 <nrfx_gpiote_input_configure+0x138>)
    4f10:	682b      	ldr	r3, [r5, #0]
    4f12:	429e      	cmp	r6, r3
    4f14:	d104      	bne.n	4f20 <nrfx_gpiote_input_configure+0x104>
    4f16:	686b      	ldr	r3, [r5, #4]
    4f18:	429f      	cmp	r7, r3
    4f1a:	d101      	bne.n	4f20 <nrfx_gpiote_input_configure+0x104>
    4f1c:	2200      	movs	r2, #0
    4f1e:	e009      	b.n	4f34 <nrfx_gpiote_input_configure+0x118>
        err = nrfx_flag32_alloc(&m_cb.available_evt_handlers, &id);
    4f20:	4810      	ldr	r0, [pc, #64]	; (4f64 <nrfx_gpiote_input_configure+0x148>)
    4f22:	f10d 0107 	add.w	r1, sp, #7
    4f26:	f7ff fdfb 	bl	4b20 <nrfx_flag32_alloc>
        if (err != NRFX_SUCCESS)
    4f2a:	4b0c      	ldr	r3, [pc, #48]	; (4f5c <nrfx_gpiote_input_configure+0x140>)
    4f2c:	4298      	cmp	r0, r3
    4f2e:	d182      	bne.n	4e36 <nrfx_gpiote_input_configure+0x1a>
        handler_id = (int32_t)id;
    4f30:	f89d 2007 	ldrb.w	r2, [sp, #7]
    m_cb.handlers[handler_id].handler = handler;
    4f34:	f845 6032 	str.w	r6, [r5, r2, lsl #3]
    m_cb.handlers[handler_id].p_context = p_context;
    4f38:	eb05 03c2 	add.w	r3, r5, r2, lsl #3
    m_cb.pin_flags[pin] |= PIN_FLAG_HANDLER(handler_id);
    4f3c:	3408      	adds	r4, #8
    m_cb.handlers[handler_id].p_context = p_context;
    4f3e:	605f      	str	r7, [r3, #4]
    m_cb.pin_flags[pin] |= PIN_FLAG_HANDLER(handler_id);
    4f40:	f835 3014 	ldrh.w	r3, [r5, r4, lsl #1]
    4f44:	ea43 2342 	orr.w	r3, r3, r2, lsl #9
    4f48:	f443 7380 	orr.w	r3, r3, #256	; 0x100
    4f4c:	f825 3014 	strh.w	r3, [r5, r4, lsl #1]
    4f50:	e79c      	b.n	4e8c <nrfx_gpiote_input_configure+0x70>
    4f52:	bf00      	nop
    4f54:	2000006c 	.word	0x2000006c
    4f58:	0bad0004 	.word	0x0bad0004
    4f5c:	0bad0000 	.word	0x0bad0000
    4f60:	40006000 	.word	0x40006000
    4f64:	200000c0 	.word	0x200000c0

00004f68 <nrfx_gpiote_output_configure>:
{
    4f68:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
    if (p_config)
    4f6c:	2900      	cmp	r1, #0
    4f6e:	d044      	beq.n	4ffa <nrfx_gpiote_output_configure+0x92>
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    4f70:	4f42      	ldr	r7, [pc, #264]	; (507c <nrfx_gpiote_output_configure+0x114>)
    4f72:	f100 0c08 	add.w	ip, r0, #8
    4f76:	f837 501c 	ldrh.w	r5, [r7, ip, lsl #1]
        if (pin_is_input(pin) && pin_in_use_by_te(pin))
    4f7a:	07ab      	lsls	r3, r5, #30
    4f7c:	d404      	bmi.n	4f88 <nrfx_gpiote_output_configure+0x20>
    4f7e:	06ae      	lsls	r6, r5, #26
    4f80:	d502      	bpl.n	4f88 <nrfx_gpiote_output_configure+0x20>
           ((uint32_t)(p_pull  ? *p_pull  : 0) << GPIO_PIN_CNF_PULL_Pos)  |
    4f82:	483f      	ldr	r0, [pc, #252]	; (5080 <nrfx_gpiote_output_configure+0x118>)
}
    4f84:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
        if (pin_has_trigger(pin) && (p_config->input_connect == NRF_GPIO_PIN_INPUT_DISCONNECT))
    4f88:	f015 0f1c 	tst.w	r5, #28
    4f8c:	d002      	beq.n	4f94 <nrfx_gpiote_output_configure+0x2c>
    4f8e:	784b      	ldrb	r3, [r1, #1]
    4f90:	2b01      	cmp	r3, #1
    4f92:	d0f6      	beq.n	4f82 <nrfx_gpiote_output_configure+0x1a>
                         (p_input ? GPIO_PIN_CNF_INPUT_Msk : 0) |
    4f94:	f111 0e01 	adds.w	lr, r1, #1
    *p_pin = pin_number & 0x1F;
    4f98:	f000 061f 	and.w	r6, r0, #31
                         (p_input ? GPIO_PIN_CNF_INPUT_Msk : 0) |
    4f9c:	bf14      	ite	ne
    4f9e:	2402      	movne	r4, #2
    4fa0:	2400      	moveq	r4, #0
    4fa2:	00b6      	lsls	r6, r6, #2
                         (p_pull  ? GPIO_PIN_CNF_PULL_Msk  : 0) |
    4fa4:	1c8b      	adds	r3, r1, #2
    4fa6:	f106 46a0 	add.w	r6, r6, #1342177280	; 0x50000000
    4faa:	bf14      	ite	ne
    4fac:	f04f 090c 	movne.w	r9, #12
    4fb0:	f04f 0900 	moveq.w	r9, #0
    4fb4:	ea44 0409 	orr.w	r4, r4, r9
    uint32_t cnf = reg->PIN_CNF[pin_number];
    4fb8:	f8d6 8700 	ldr.w	r8, [r6, #1792]	; 0x700
                         (p_pull  ? GPIO_PIN_CNF_PULL_Msk  : 0) |
    4fbc:	f444 64e0 	orr.w	r4, r4, #1792	; 0x700
    4fc0:	f044 0401 	orr.w	r4, r4, #1
    cnf &= ~to_update;
    4fc4:	ea28 0804 	bic.w	r8, r8, r4
           ((uint32_t)(p_input ? *p_input : 0) << GPIO_PIN_CNF_INPUT_Pos) |
    4fc8:	f1be 0f00 	cmp.w	lr, #0
    4fcc:	d003      	beq.n	4fd6 <nrfx_gpiote_output_configure+0x6e>
    4fce:	f891 e001 	ldrb.w	lr, [r1, #1]
    4fd2:	ea4f 0e4e 	mov.w	lr, lr, lsl #1
           ((uint32_t)(p_pull  ? *p_pull  : 0) << GPIO_PIN_CNF_PULL_Pos)  |
    4fd6:	b10b      	cbz	r3, 4fdc <nrfx_gpiote_output_configure+0x74>
    4fd8:	788c      	ldrb	r4, [r1, #2]
    4fda:	00a3      	lsls	r3, r4, #2
           ((uint32_t)(p_drive ? *p_drive : 0) << GPIO_PIN_CNF_DRIVE_Pos) |
    4fdc:	7809      	ldrb	r1, [r1, #0]
    4fde:	ea43 2301 	orr.w	r3, r3, r1, lsl #8
    4fe2:	ea43 0308 	orr.w	r3, r3, r8
    4fe6:	ea43 030e 	orr.w	r3, r3, lr
        m_cb.pin_flags[pin] |= PIN_FLAG_IN_USE | PIN_FLAG_OUTPUT;
    4fea:	f045 0503 	orr.w	r5, r5, #3
    cnf |= ((uint32_t)(p_dir   ? *p_dir   : 0) << GPIO_PIN_CNF_DIR_Pos)   |
    4fee:	f043 0301 	orr.w	r3, r3, #1
    4ff2:	f827 501c 	strh.w	r5, [r7, ip, lsl #1]
    reg->PIN_CNF[pin_number] = cnf;
    4ff6:	f8c6 3700 	str.w	r3, [r6, #1792]	; 0x700
    if (p_task_config)
    4ffa:	b90a      	cbnz	r2, 5000 <nrfx_gpiote_output_configure+0x98>
    return NRFX_SUCCESS;
    4ffc:	4821      	ldr	r0, [pc, #132]	; (5084 <nrfx_gpiote_output_configure+0x11c>)
    4ffe:	e7c1      	b.n	4f84 <nrfx_gpiote_output_configure+0x1c>
    return PIN_FLAG_IS_OUTPUT(m_cb.pin_flags[pin]);
    5000:	4d1e      	ldr	r5, [pc, #120]	; (507c <nrfx_gpiote_output_configure+0x114>)
    5002:	f100 0608 	add.w	r6, r0, #8
    5006:	f835 4016 	ldrh.w	r4, [r5, r6, lsl #1]
        if (pin_is_input(pin))
    500a:	07a3      	lsls	r3, r4, #30
    500c:	d5b9      	bpl.n	4f82 <nrfx_gpiote_output_configure+0x1a>
        uint32_t ch = p_task_config->task_ch;
    500e:	7817      	ldrb	r7, [r2, #0]
        m_cb.pin_flags[pin] &= ~(PIN_FLAG_TE_USED | PIN_TE_ID_MASK);
    5010:	f024 0420 	bic.w	r4, r4, #32
    5014:	00b9      	lsls	r1, r7, #2
    5016:	f101 4180 	add.w	r1, r1, #1073741824	; 0x40000000
    501a:	04e4      	lsls	r4, r4, #19
    501c:	f501 41c0 	add.w	r1, r1, #24576	; 0x6000
    5020:	0ce4      	lsrs	r4, r4, #19
    5022:	f825 4016 	strh.w	r4, [r5, r6, lsl #1]
    p_reg->CONFIG[idx] = 0;
    5026:	2300      	movs	r3, #0
    5028:	f8c1 3510 	str.w	r3, [r1, #1296]	; 0x510
        if (p_task_config->polarity != NRF_GPIOTE_POLARITY_NONE)
    502c:	f892 c001 	ldrb.w	ip, [r2, #1]
    5030:	f1bc 0f00 	cmp.w	ip, #0
    5034:	d0e2      	beq.n	4ffc <nrfx_gpiote_output_configure+0x94>
  p_reg->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk |
    5036:	f8d1 3510 	ldr.w	r3, [r1, #1296]	; 0x510
            nrf_gpiote_task_configure(NRF_GPIOTE, ch, pin,
    503a:	7892      	ldrb	r2, [r2, #2]
    503c:	f423 1398 	bic.w	r3, r3, #1245184	; 0x130000
    5040:	f423 53f8 	bic.w	r3, r3, #7936	; 0x1f00
    5044:	f8c1 3510 	str.w	r3, [r1, #1296]	; 0x510
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    5048:	f8d1 e510 	ldr.w	lr, [r1, #1296]	; 0x510
    504c:	0203      	lsls	r3, r0, #8
    504e:	f403 53f8 	and.w	r3, r3, #7936	; 0x1f00
                        ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk) |
    5052:	ea4f 400c 	mov.w	r0, ip, lsl #16
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    5056:	ea43 030e 	orr.w	r3, r3, lr
                        ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk) |
    505a:	f400 3040 	and.w	r0, r0, #196608	; 0x30000
                        ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk);
    505e:	0512      	lsls	r2, r2, #20
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    5060:	4303      	orrs	r3, r0
                        ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk);
    5062:	f402 1280 	and.w	r2, r2, #1048576	; 0x100000
            m_cb.pin_flags[pin] |= PIN_FLAG_TE_ID(ch);
    5066:	ea44 3447 	orr.w	r4, r4, r7, lsl #13
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    506a:	4313      	orrs	r3, r2
    506c:	f044 0420 	orr.w	r4, r4, #32
    5070:	f825 4016 	strh.w	r4, [r5, r6, lsl #1]
    5074:	f8c1 3510 	str.w	r3, [r1, #1296]	; 0x510
    5078:	e7c0      	b.n	4ffc <nrfx_gpiote_output_configure+0x94>
    507a:	bf00      	nop
    507c:	2000006c 	.word	0x2000006c
    5080:	0bad0004 	.word	0x0bad0004
    5084:	0bad0000 	.word	0x0bad0000

00005088 <nrfx_gpiote_global_callback_set>:
    m_cb.global_handler.handler = handler;
    5088:	4b01      	ldr	r3, [pc, #4]	; (5090 <nrfx_gpiote_global_callback_set+0x8>)
    m_cb.global_handler.p_context = p_context;
    508a:	e9c3 0102 	strd	r0, r1, [r3, #8]
}
    508e:	4770      	bx	lr
    5090:	2000006c 	.word	0x2000006c

00005094 <nrfx_gpiote_channel_get>:
    return m_cb.pin_flags[pin] & PIN_FLAG_TE_USED;
    5094:	3008      	adds	r0, #8
    5096:	4b05      	ldr	r3, [pc, #20]	; (50ac <nrfx_gpiote_channel_get+0x18>)
    5098:	f833 3010 	ldrh.w	r3, [r3, r0, lsl #1]
    if (pin_in_use_by_te(pin))
    509c:	069a      	lsls	r2, r3, #26
        *p_channel = PIN_GET_TE_ID(m_cb.pin_flags[pin]);
    509e:	bf43      	ittte	mi
    50a0:	0b5b      	lsrmi	r3, r3, #13
        return NRFX_SUCCESS;
    50a2:	4803      	ldrmi	r0, [pc, #12]	; (50b0 <nrfx_gpiote_channel_get+0x1c>)
        *p_channel = PIN_GET_TE_ID(m_cb.pin_flags[pin]);
    50a4:	700b      	strbmi	r3, [r1, #0]
        return NRFX_ERROR_INVALID_PARAM;
    50a6:	4803      	ldrpl	r0, [pc, #12]	; (50b4 <nrfx_gpiote_channel_get+0x20>)
}
    50a8:	4770      	bx	lr
    50aa:	bf00      	nop
    50ac:	2000006c 	.word	0x2000006c
    50b0:	0bad0000 	.word	0x0bad0000
    50b4:	0bad0004 	.word	0x0bad0004

000050b8 <nrfx_gpiote_init>:
{
    50b8:	b538      	push	{r3, r4, r5, lr}
    if (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED)
    50ba:	4c0e      	ldr	r4, [pc, #56]	; (50f4 <nrfx_gpiote_init+0x3c>)
    50bc:	f894 5058 	ldrb.w	r5, [r4, #88]	; 0x58
    50c0:	b9b5      	cbnz	r5, 50f0 <nrfx_gpiote_init+0x38>
    memset(m_cb.pin_flags, 0, sizeof(m_cb.pin_flags));
    50c2:	2240      	movs	r2, #64	; 0x40
    50c4:	4629      	mov	r1, r5
    50c6:	f104 0010 	add.w	r0, r4, #16
    50ca:	f001 fada 	bl	6682 <memset>
    NRFX_IRQ_ENABLE(nrfx_get_irq_number(NRF_GPIOTE));
    50ce:	2006      	movs	r0, #6
    50d0:	f7fd fbda 	bl	2888 <arch_irq_enable>
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    50d4:	4b08      	ldr	r3, [pc, #32]	; (50f8 <nrfx_gpiote_init+0x40>)
    return err_code;
    50d6:	4809      	ldr	r0, [pc, #36]	; (50fc <nrfx_gpiote_init+0x44>)
    50d8:	601d      	str	r5, [r3, #0]
    50da:	681b      	ldr	r3, [r3, #0]
    p_reg->INTENSET = mask;
    50dc:	4b08      	ldr	r3, [pc, #32]	; (5100 <nrfx_gpiote_init+0x48>)
    50de:	f04f 4200 	mov.w	r2, #2147483648	; 0x80000000
    50e2:	f8c3 2304 	str.w	r2, [r3, #772]	; 0x304
    m_cb.state = NRFX_DRV_STATE_INITIALIZED;
    50e6:	2301      	movs	r3, #1
    50e8:	f884 3058 	strb.w	r3, [r4, #88]	; 0x58
    m_cb.available_evt_handlers = NRFX_BIT_MASK(NRFX_GPIOTE_CONFIG_NUM_OF_EVT_HANDLERS);
    50ec:	6563      	str	r3, [r4, #84]	; 0x54
}
    50ee:	bd38      	pop	{r3, r4, r5, pc}
        return err_code;
    50f0:	4804      	ldr	r0, [pc, #16]	; (5104 <nrfx_gpiote_init+0x4c>)
    50f2:	e7fc      	b.n	50ee <nrfx_gpiote_init+0x36>
    50f4:	2000006c 	.word	0x2000006c
    50f8:	4000617c 	.word	0x4000617c
    50fc:	0bad0000 	.word	0x0bad0000
    5100:	40006000 	.word	0x40006000
    5104:	0bad0005 	.word	0x0bad0005

00005108 <nrfx_gpiote_is_init>:
    return (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED) ? true : false;
    5108:	4b03      	ldr	r3, [pc, #12]	; (5118 <nrfx_gpiote_is_init+0x10>)
    510a:	f893 0058 	ldrb.w	r0, [r3, #88]	; 0x58
}
    510e:	3800      	subs	r0, #0
    5110:	bf18      	it	ne
    5112:	2001      	movne	r0, #1
    5114:	4770      	bx	lr
    5116:	bf00      	nop
    5118:	2000006c 	.word	0x2000006c

0000511c <nrfx_gpiote_channel_free>:
{
    511c:	4601      	mov	r1, r0
    return nrfx_flag32_free(&m_cb.available_channels_mask, channel);
    511e:	4801      	ldr	r0, [pc, #4]	; (5124 <nrfx_gpiote_channel_free+0x8>)
    5120:	f7ff bd22 	b.w	4b68 <nrfx_flag32_free>
    5124:	200000bc 	.word	0x200000bc

00005128 <nrfx_gpiote_channel_alloc>:
{
    5128:	4601      	mov	r1, r0
    return nrfx_flag32_alloc(&m_cb.available_channels_mask, p_channel);
    512a:	4801      	ldr	r0, [pc, #4]	; (5130 <nrfx_gpiote_channel_alloc+0x8>)
    512c:	f7ff bcf8 	b.w	4b20 <nrfx_flag32_alloc>
    5130:	200000bc 	.word	0x200000bc

00005134 <nrfx_gpiote_trigger_enable>:
    return m_cb.pin_flags[pin] & PIN_FLAG_TE_USED;
    5134:	f100 0208 	add.w	r2, r0, #8
    5138:	4b1d      	ldr	r3, [pc, #116]	; (51b0 <nrfx_gpiote_trigger_enable+0x7c>)
    513a:	f833 3012 	ldrh.w	r3, [r3, r2, lsl #1]
    if (pin_in_use_by_te(pin) && pin_is_input(pin))
    513e:	069a      	lsls	r2, r3, #26
{
    5140:	b410      	push	{r4}
    if (pin_in_use_by_te(pin) && pin_is_input(pin))
    5142:	d51d      	bpl.n	5180 <nrfx_gpiote_trigger_enable+0x4c>
    5144:	f013 0402 	ands.w	r4, r3, #2
    5148:	d11a      	bne.n	5180 <nrfx_gpiote_trigger_enable+0x4c>
    return PIN_GET_TE_ID(m_cb.pin_flags[pin]);
    514a:	0b5b      	lsrs	r3, r3, #13
#endif

NRF_STATIC_INLINE nrf_gpiote_event_t nrf_gpiote_in_event_get(uint8_t index)
{
    NRFX_ASSERT(index < GPIOTE_CH_NUM);
    return (nrf_gpiote_event_t)NRFX_OFFSETOF(NRF_GPIOTE_Type, EVENTS_IN[index]);
    514c:	009a      	lsls	r2, r3, #2
    return ((uint32_t)p_reg + event);
    514e:	f102 4080 	add.w	r0, r2, #1073741824	; 0x40000000
    5152:	f500 40c2 	add.w	r0, r0, #24832	; 0x6100
    5156:	f102 4280 	add.w	r2, r2, #1073741824	; 0x40000000
    515a:	f502 42c0 	add.w	r2, r2, #24576	; 0x6000
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    515e:	6004      	str	r4, [r0, #0]
    5160:	6800      	ldr	r0, [r0, #0]
   p_reg->CONFIG[idx] |= GPIOTE_CONFIG_MODE_Event;
    5162:	f8d2 0510 	ldr.w	r0, [r2, #1296]	; 0x510
    5166:	f040 0001 	orr.w	r0, r0, #1
    516a:	f8c2 0510 	str.w	r0, [r2, #1296]	; 0x510
        if (int_enable)
    516e:	b129      	cbz	r1, 517c <nrfx_gpiote_trigger_enable+0x48>
            nrf_gpiote_int_enable(NRF_GPIOTE, NRFX_BIT(ch));
    5170:	2201      	movs	r2, #1
    5172:	fa02 f303 	lsl.w	r3, r2, r3
    p_reg->INTENSET = mask;
    5176:	4a0f      	ldr	r2, [pc, #60]	; (51b4 <nrfx_gpiote_trigger_enable+0x80>)
    5178:	f8c2 3304 	str.w	r3, [r2, #772]	; 0x304
}
    517c:	bc10      	pop	{r4}
    517e:	4770      	bx	lr
    nrfx_gpiote_trigger_t trigger = PIN_FLAG_TRIG_MODE_GET(m_cb.pin_flags[pin]);
    5180:	f3c3 0382 	ubfx	r3, r3, #2, #3
    if (trigger == NRFX_GPIOTE_TRIGGER_LOW)
    5184:	2b04      	cmp	r3, #4
    5186:	d00e      	beq.n	51a6 <nrfx_gpiote_trigger_enable+0x72>
    else if (trigger == NRFX_GPIOTE_TRIGGER_HIGH)
    5188:	2b05      	cmp	r3, #5
    518a:	d00e      	beq.n	51aa <nrfx_gpiote_trigger_enable+0x76>
    return p_reg->IN;
    518c:	f04f 43a0 	mov.w	r3, #1342177280	; 0x50000000
    5190:	f8d3 1510 	ldr.w	r1, [r3, #1296]	; 0x510
    *p_pin = pin_number & 0x1F;
    5194:	f000 031f 	and.w	r3, r0, #31
    return ((nrf_gpio_port_in_read(reg) >> pin_number) & 1UL);
    5198:	40d9      	lsrs	r1, r3
    519a:	f001 0101 	and.w	r1, r1, #1
        sense = nrf_gpio_pin_read(pin) ? NRF_GPIO_PIN_SENSE_LOW : NRF_GPIO_PIN_SENSE_HIGH;
    519e:	3102      	adds	r1, #2
}
    51a0:	bc10      	pop	{r4}
        nrf_gpio_cfg_sense_set(pin, get_initial_sense(pin));
    51a2:	f003 bad8 	b.w	8756 <nrf_gpio_cfg_sense_set>
        sense = NRF_GPIO_PIN_SENSE_LOW;
    51a6:	2103      	movs	r1, #3
    51a8:	e7fa      	b.n	51a0 <nrfx_gpiote_trigger_enable+0x6c>
        sense = NRF_GPIO_PIN_SENSE_HIGH;
    51aa:	2102      	movs	r1, #2
    51ac:	e7f8      	b.n	51a0 <nrfx_gpiote_trigger_enable+0x6c>
    51ae:	bf00      	nop
    51b0:	2000006c 	.word	0x2000006c
    51b4:	40006000 	.word	0x40006000

000051b8 <nrfx_gpiote_trigger_disable>:
    return m_cb.pin_flags[pin] & PIN_FLAG_TE_USED;
    51b8:	4b0e      	ldr	r3, [pc, #56]	; (51f4 <nrfx_gpiote_trigger_disable+0x3c>)
    51ba:	f100 0208 	add.w	r2, r0, #8
    51be:	f833 3012 	ldrh.w	r3, [r3, r2, lsl #1]
    if (pin_in_use_by_te(pin) && pin_is_input(pin))
    51c2:	0699      	lsls	r1, r3, #26
    51c4:	d513      	bpl.n	51ee <nrfx_gpiote_trigger_disable+0x36>
    51c6:	079a      	lsls	r2, r3, #30
    51c8:	d411      	bmi.n	51ee <nrfx_gpiote_trigger_disable+0x36>
    return PIN_GET_TE_ID(m_cb.pin_flags[pin]);
    51ca:	0b5b      	lsrs	r3, r3, #13
        nrf_gpiote_int_disable(NRF_GPIOTE, NRFX_BIT(ch));
    51cc:	2201      	movs	r2, #1
    51ce:	409a      	lsls	r2, r3
    p_reg->INTENCLR = mask;
    51d0:	009b      	lsls	r3, r3, #2
    51d2:	4909      	ldr	r1, [pc, #36]	; (51f8 <nrfx_gpiote_trigger_disable+0x40>)
    51d4:	f103 4380 	add.w	r3, r3, #1073741824	; 0x40000000
    51d8:	f503 43c0 	add.w	r3, r3, #24576	; 0x6000
    51dc:	f8c1 2308 	str.w	r2, [r1, #776]	; 0x308
   p_reg->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Msk;
    51e0:	f8d3 2510 	ldr.w	r2, [r3, #1296]	; 0x510
    51e4:	f022 0203 	bic.w	r2, r2, #3
    51e8:	f8c3 2510 	str.w	r2, [r3, #1296]	; 0x510
}
    51ec:	4770      	bx	lr
        nrf_gpio_cfg_sense_set(pin, NRF_GPIO_PIN_NOSENSE);
    51ee:	2100      	movs	r1, #0
    51f0:	f003 bab1 	b.w	8756 <nrf_gpio_cfg_sense_set>
    51f4:	2000006c 	.word	0x2000006c
    51f8:	40006000 	.word	0x40006000

000051fc <nrfx_gpiote_pin_uninit>:
    return m_cb.pin_flags[pin] & PIN_FLAG_IN_USE;
    51fc:	4b0d      	ldr	r3, [pc, #52]	; (5234 <nrfx_gpiote_pin_uninit+0x38>)
    51fe:	f100 0208 	add.w	r2, r0, #8
{
    5202:	b510      	push	{r4, lr}
    return m_cb.pin_flags[pin] & PIN_FLAG_IN_USE;
    5204:	f813 3012 	ldrb.w	r3, [r3, r2, lsl #1]
    if (!pin_in_use(pin))
    5208:	07db      	lsls	r3, r3, #31
{
    520a:	4604      	mov	r4, r0
    if (!pin_in_use(pin))
    520c:	d50f      	bpl.n	522e <nrfx_gpiote_pin_uninit+0x32>
    nrfx_gpiote_trigger_disable(pin);
    520e:	f7ff ffd3 	bl	51b8 <nrfx_gpiote_trigger_disable>
    pin_handler_trigger_uninit(pin);
    5212:	4620      	mov	r0, r4
    *p_pin = pin_number & 0x1F;
    5214:	f004 041f 	and.w	r4, r4, #31
    5218:	f7ff fde6 	bl	4de8 <pin_handler_trigger_uninit>
    reg->PIN_CNF[pin_number] = cnf;
    521c:	f504 74e0 	add.w	r4, r4, #448	; 0x1c0
    5220:	f04f 43a0 	mov.w	r3, #1342177280	; 0x50000000
    5224:	2202      	movs	r2, #2
    5226:	f843 2024 	str.w	r2, [r3, r4, lsl #2]
    522a:	4803      	ldr	r0, [pc, #12]	; (5238 <nrfx_gpiote_pin_uninit+0x3c>)
}
    522c:	bd10      	pop	{r4, pc}
        return NRFX_ERROR_INVALID_PARAM;
    522e:	4803      	ldr	r0, [pc, #12]	; (523c <nrfx_gpiote_pin_uninit+0x40>)
    5230:	e7fc      	b.n	522c <nrfx_gpiote_pin_uninit+0x30>
    5232:	bf00      	nop
    5234:	2000006c 	.word	0x2000006c
    5238:	0bad0000 	.word	0x0bad0000
    523c:	0bad0004 	.word	0x0bad0004

00005240 <nrfx_gpiote_irq_handler>:
        call_handler(pin, gpiote_polarity_to_trigger(polarity));
    }
}

void nrfx_gpiote_irq_handler(void)
{
    5240:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    5244:	4b4e      	ldr	r3, [pc, #312]	; (5380 <nrfx_gpiote_irq_handler+0x140>)
    return p_reg->INTENSET & mask;
    5246:	484f      	ldr	r0, [pc, #316]	; (5384 <nrfx_gpiote_irq_handler+0x144>)
    uint32_t i;
    nrf_gpiote_event_t event = NRF_GPIOTE_EVENT_IN_0;
    uint32_t mask = (uint32_t)NRF_GPIOTE_INT_IN0_MASK;

    /* collect status of all GPIOTE pin events. Processing is done once all are collected and cleared.*/
    for (i = 0; i < GPIOTE_CH_NUM; i++)
    5248:	494f      	ldr	r1, [pc, #316]	; (5388 <nrfx_gpiote_irq_handler+0x148>)
    uint32_t status = 0;
    524a:	2600      	movs	r6, #0
{
    524c:	b085      	sub	sp, #20
    uint32_t mask = (uint32_t)NRF_GPIOTE_INT_IN0_MASK;
    524e:	2201      	movs	r2, #1
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    5250:	4634      	mov	r4, r6
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    5252:	681d      	ldr	r5, [r3, #0]
    {
        if (nrf_gpiote_event_check(NRF_GPIOTE, event) &&
    5254:	b135      	cbz	r5, 5264 <nrfx_gpiote_irq_handler+0x24>
    return p_reg->INTENSET & mask;
    5256:	f8d0 5304 	ldr.w	r5, [r0, #772]	; 0x304
    525a:	4215      	tst	r5, r2
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    525c:	bf1e      	ittt	ne
    525e:	601c      	strne	r4, [r3, #0]
    5260:	681d      	ldrne	r5, [r3, #0]
            nrf_gpiote_int_enable_check(NRF_GPIOTE, mask))
        {
            nrf_gpiote_event_clear(NRF_GPIOTE, event);
            status |= mask;
    5262:	4316      	orrne	r6, r2
        }
        mask <<= 1;
    5264:	3304      	adds	r3, #4
    for (i = 0; i < GPIOTE_CH_NUM; i++)
    5266:	428b      	cmp	r3, r1
        mask <<= 1;
    5268:	ea4f 0242 	mov.w	r2, r2, lsl #1
    for (i = 0; i < GPIOTE_CH_NUM; i++)
    526c:	d1f1      	bne.n	5252 <nrfx_gpiote_irq_handler+0x12>
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    526e:	4f47      	ldr	r7, [pc, #284]	; (538c <nrfx_gpiote_irq_handler+0x14c>)
    5270:	683b      	ldr	r3, [r7, #0]
         * in ascending order. */
        event = (nrf_gpiote_event_t)((uint32_t)event + sizeof(uint32_t));
    }

    /* handle PORT event */
    if (nrf_gpiote_event_check(NRF_GPIOTE, NRF_GPIOTE_EVENT_PORT))
    5272:	b1ab      	cbz	r3, 52a0 <nrfx_gpiote_irq_handler+0x60>
        *p_masks = gpio_regs[i]->LATCH;
    5274:	f04f 45a0 	mov.w	r5, #1342177280	; 0x50000000
    5278:	f8d5 3520 	ldr.w	r3, [r5, #1312]	; 0x520
    527c:	9303      	str	r3, [sp, #12]
        gpio_regs[i]->LATCH = *p_masks;
    527e:	f8c5 3520 	str.w	r3, [r5, #1312]	; 0x520
__STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask)
{
    uint8_t * p_mask8 = (uint8_t *)p_mask;
    uint32_t byte_idx = BITMASK_BYTE_GET(bit);
    bit = BITMASK_RELBIT_GET(bit);
    p_mask8[byte_idx] &= ~(1 << bit);
    5282:	f10d 080c 	add.w	r8, sp, #12
    5286:	f04f 0901 	mov.w	r9, #1
            while (latch[i])
    528a:	9803      	ldr	r0, [sp, #12]
    528c:	b950      	cbnz	r0, 52a4 <nrfx_gpiote_irq_handler+0x64>
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    528e:	6038      	str	r0, [r7, #0]
    5290:	683b      	ldr	r3, [r7, #0]
        *p_masks = gpio_regs[i]->LATCH;
    5292:	f8d5 3520 	ldr.w	r3, [r5, #1312]	; 0x520
    5296:	9303      	str	r3, [sp, #12]
        gpio_regs[i]->LATCH = *p_masks;
    5298:	f8c5 3520 	str.w	r3, [r5, #1312]	; 0x520
        if (latch[port_idx])
    529c:	2b00      	cmp	r3, #0
    529e:	d1f0      	bne.n	5282 <nrfx_gpiote_irq_handler+0x42>
        mask &= ~NRFX_BIT(ch);
    52a0:	2401      	movs	r4, #1
    52a2:	e068      	b.n	5376 <nrfx_gpiote_irq_handler+0x136>
                uint32_t pin = NRF_CTZ(latch[i]);
    52a4:	fa90 faa0 	rbit	sl, r0
    52a8:	faba fa8a 	clz	sl, sl
                nrfx_gpiote_trigger_t trigger = PIN_FLAG_TRIG_MODE_GET(m_cb.pin_flags[pin]);
    52ac:	4a38      	ldr	r2, [pc, #224]	; (5390 <nrfx_gpiote_irq_handler+0x150>)
    52ae:	f10a 0308 	add.w	r3, sl, #8
    uint32_t byte_idx = BITMASK_BYTE_GET(bit);
    52b2:	ea4f 0cda 	mov.w	ip, sl, lsr #3
    52b6:	f832 1013 	ldrh.w	r1, [r2, r3, lsl #1]
    bit = BITMASK_RELBIT_GET(bit);
    52ba:	f00a 0307 	and.w	r3, sl, #7
    p_mask8[byte_idx] &= ~(1 << bit);
    52be:	fa09 f203 	lsl.w	r2, r9, r3
    52c2:	f818 300c 	ldrb.w	r3, [r8, ip]
    52c6:	ea23 0302 	bic.w	r3, r3, r2
    52ca:	f808 300c 	strb.w	r3, [r8, ip]
    52ce:	ea4f 038a 	mov.w	r3, sl, lsl #2
    52d2:	f103 43a0 	add.w	r3, r3, #1342177280	; 0x50000000
    52d6:	f3c1 0482 	ubfx	r4, r1, #2, #3
    return (nrf_gpio_pin_sense_t)((reg->PIN_CNF[pin_number] &
    52da:	f8d3 2700 	ldr.w	r2, [r3, #1792]	; 0x700
    if (is_level(trigger))
    52de:	06c8      	lsls	r0, r1, #27
                nrfx_gpiote_trigger_t trigger = PIN_FLAG_TRIG_MODE_GET(m_cb.pin_flags[pin]);
    52e0:	46a3      	mov	fp, r4
                                   GPIO_PIN_CNF_SENSE_Msk) >> GPIO_PIN_CNF_SENSE_Pos);
    52e2:	f3c2 4201 	ubfx	r2, r2, #16, #2
    if (is_level(trigger))
    52e6:	d519      	bpl.n	531c <nrfx_gpiote_irq_handler+0xdc>
        call_handler(pin, trigger);
    52e8:	4659      	mov	r1, fp
    52ea:	4650      	mov	r0, sl
    52ec:	9301      	str	r3, [sp, #4]
    return (nrf_gpio_pin_sense_t)((reg->PIN_CNF[pin_number] &
    52ee:	b2d4      	uxtb	r4, r2
    52f0:	f7ff fd32 	bl	4d58 <call_handler>
    52f4:	9b01      	ldr	r3, [sp, #4]
    52f6:	f8d3 3700 	ldr.w	r3, [r3, #1792]	; 0x700
        if (nrf_gpio_pin_sense_get(pin) == sense)
    52fa:	f3c3 4301 	ubfx	r3, r3, #16, #2
    52fe:	429c      	cmp	r4, r3
    5300:	d107      	bne.n	5312 <nrfx_gpiote_irq_handler+0xd2>
            nrf_gpio_cfg_sense_set(pin, NRF_GPIO_PIN_NOSENSE);
    5302:	2100      	movs	r1, #0
    5304:	4650      	mov	r0, sl
    5306:	f003 fa26 	bl	8756 <nrf_gpio_cfg_sense_set>
            nrf_gpio_cfg_sense_set(pin, sense);
    530a:	4621      	mov	r1, r4
    530c:	4650      	mov	r0, sl
    530e:	f003 fa22 	bl	8756 <nrf_gpio_cfg_sense_set>
    reg->LATCH = (1 << pin_number);
    5312:	fa09 f00a 	lsl.w	r0, r9, sl
    5316:	f8c5 0520 	str.w	r0, [r5, #1312]	; 0x520
}
    531a:	e7b6      	b.n	528a <nrfx_gpiote_irq_handler+0x4a>
                NRF_GPIO_PIN_SENSE_LOW : NRF_GPIO_PIN_SENSE_HIGH;
    531c:	2a02      	cmp	r2, #2
        nrf_gpio_cfg_sense_set(pin, next_sense);
    531e:	bf0c      	ite	eq
    5320:	2103      	moveq	r1, #3
    5322:	2102      	movne	r1, #2
    5324:	4650      	mov	r0, sl
    5326:	f003 fa16 	bl	8756 <nrf_gpio_cfg_sense_set>
        if ((trigger == NRFX_GPIOTE_TRIGGER_TOGGLE) ||
    532a:	2c03      	cmp	r4, #3
    532c:	d003      	beq.n	5336 <nrfx_gpiote_irq_handler+0xf6>
    532e:	2a02      	cmp	r2, #2
    5330:	d106      	bne.n	5340 <nrfx_gpiote_irq_handler+0x100>
            (sense == NRF_GPIO_PIN_SENSE_HIGH && trigger == NRFX_GPIOTE_TRIGGER_LOTOHI) ||
    5332:	2c01      	cmp	r4, #1
            (sense == NRF_GPIO_PIN_SENSE_LOW && trigger == NRFX_GPIOTE_TRIGGER_HITOLO))
    5334:	d1ed      	bne.n	5312 <nrfx_gpiote_irq_handler+0xd2>
            call_handler(pin, trigger);
    5336:	4659      	mov	r1, fp
    5338:	4650      	mov	r0, sl
    533a:	f7ff fd0d 	bl	4d58 <call_handler>
    533e:	e7e8      	b.n	5312 <nrfx_gpiote_irq_handler+0xd2>
            (sense == NRF_GPIO_PIN_SENSE_HIGH && trigger == NRFX_GPIOTE_TRIGGER_LOTOHI) ||
    5340:	2a03      	cmp	r2, #3
    5342:	d1e6      	bne.n	5312 <nrfx_gpiote_irq_handler+0xd2>
            (sense == NRF_GPIO_PIN_SENSE_LOW && trigger == NRFX_GPIOTE_TRIGGER_HITOLO))
    5344:	2c02      	cmp	r4, #2
    5346:	e7f5      	b.n	5334 <nrfx_gpiote_irq_handler+0xf4>
        uint32_t ch = NRF_CTZ(mask);
    5348:	fa96 f3a6 	rbit	r3, r6
    534c:	fab3 f383 	clz	r3, r3
        mask &= ~NRFX_BIT(ch);
    5350:	fa04 f203 	lsl.w	r2, r4, r3
    5354:	009b      	lsls	r3, r3, #2
    5356:	f103 4380 	add.w	r3, r3, #1073741824	; 0x40000000
    535a:	f503 43c0 	add.w	r3, r3, #24576	; 0x6000
    535e:	ea26 0602 	bic.w	r6, r6, r2
    return ((p_reg->CONFIG[idx] & GPIOTE_CONFIG_PORT_PIN_Msk) >> GPIOTE_CONFIG_PSEL_Pos);
    5362:	f8d3 0510 	ldr.w	r0, [r3, #1296]	; 0x510
    return (nrf_gpiote_polarity_t)((p_reg->CONFIG[idx] & GPIOTE_CONFIG_POLARITY_Msk) >>
    5366:	f8d3 1510 	ldr.w	r1, [r3, #1296]	; 0x510
        call_handler(pin, gpiote_polarity_to_trigger(polarity));
    536a:	f3c0 2004 	ubfx	r0, r0, #8, #5
    536e:	f3c1 4101 	ubfx	r1, r1, #16, #2
    5372:	f7ff fcf1 	bl	4d58 <call_handler>
    while (mask)
    5376:	2e00      	cmp	r6, #0
    5378:	d1e6      	bne.n	5348 <nrfx_gpiote_irq_handler+0x108>
        port_event_handle();
    }

    /* Process pin events. */
    gpiote_evt_handle(status);
}
    537a:	b005      	add	sp, #20
    537c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    5380:	40006100 	.word	0x40006100
    5384:	40006000 	.word	0x40006000
    5388:	40006120 	.word	0x40006120
    538c:	4000617c 	.word	0x4000617c
    5390:	2000006c 	.word	0x2000006c

00005394 <nrfx_nvmc_page_erase>:
NRF_STATIC_INLINE uint32_t nrf_ficr_codepagesize_get(NRF_FICR_Type const * p_reg)
{
#if defined(FICR_INFO_CODEPAGESIZE_CODEPAGESIZE_Msk)
    return p_reg->INFO.CODEPAGESIZE;
#else
    return p_reg->CODEPAGESIZE;
    5394:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
    5398:	691a      	ldr	r2, [r3, #16]
}

static bool is_page_aligned_check(uint32_t addr)
{
    /* If the modulo operation returns '0', then the address is aligned. */
    return !(addr % flash_page_size_get());
    539a:	fbb0 f3f2 	udiv	r3, r0, r2
    539e:	fb02 0313 	mls	r3, r2, r3, r0

nrfx_err_t nrfx_nvmc_page_erase(uint32_t addr)
{
    NRFX_ASSERT(is_valid_address(addr, false));

    if (!is_page_aligned_check(addr))
    53a2:	b973      	cbnz	r3, 53c2 <nrfx_nvmc_page_erase+0x2e>
#endif

NRF_STATIC_INLINE void nrf_nvmc_mode_set(NRF_NVMC_Type * p_reg,
                                         nrf_nvmc_mode_t mode)
{
    p_reg->CONFIG = (uint32_t)mode;
    53a4:	4b08      	ldr	r3, [pc, #32]	; (53c8 <nrfx_nvmc_page_erase+0x34>)
    53a6:	2202      	movs	r2, #2
    53a8:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
    else
    {
        p_reg->ERASEPCR1 = page_addr;
    }
#elif defined(NRF52_SERIES)
    p_reg->ERASEPAGE = page_addr;
    53ac:	f8c3 0508 	str.w	r0, [r3, #1288]	; 0x508
    return (bool)(p_reg->READY & NVMC_READY_READY_Msk);
    53b0:	f8d3 2400 	ldr.w	r2, [r3, #1024]	; 0x400
        return NRFX_ERROR_INVALID_ADDR;
    }

    nvmc_erase_mode_set();
    nrf_nvmc_page_erase_start(NRF_NVMC, addr);
    while (!nrf_nvmc_ready_check(NRF_NVMC))
    53b4:	07d2      	lsls	r2, r2, #31
    53b6:	d5fb      	bpl.n	53b0 <nrfx_nvmc_page_erase+0x1c>
    p_reg->CONFIG = (uint32_t)mode;
    53b8:	2200      	movs	r2, #0
    {}
    nvmc_readonly_mode_set();

    return NRFX_SUCCESS;
    53ba:	4804      	ldr	r0, [pc, #16]	; (53cc <nrfx_nvmc_page_erase+0x38>)
    53bc:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
    53c0:	4770      	bx	lr
        return NRFX_ERROR_INVALID_ADDR;
    53c2:	4803      	ldr	r0, [pc, #12]	; (53d0 <nrfx_nvmc_page_erase+0x3c>)
}
    53c4:	4770      	bx	lr
    53c6:	bf00      	nop
    53c8:	4001e000 	.word	0x4001e000
    53cc:	0bad0000 	.word	0x0bad0000
    53d0:	0bad000a 	.word	0x0bad000a

000053d4 <nrfx_nvmc_word_write>:
    53d4:	4b07      	ldr	r3, [pc, #28]	; (53f4 <nrfx_nvmc_word_write+0x20>)
    53d6:	2201      	movs	r2, #1
    53d8:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
    return (bool)(p_reg->READY & NVMC_READY_READY_Msk);
    53dc:	f8d3 2400 	ldr.w	r2, [r3, #1024]	; 0x400
    while (!nrf_nvmc_ready_check(NRF_NVMC))
    53e0:	07d2      	lsls	r2, r2, #31
    53e2:	d5fb      	bpl.n	53dc <nrfx_nvmc_word_write+0x8>
    *(volatile uint32_t *)addr = value;
    53e4:	6001      	str	r1, [r0, #0]
  __ASM volatile ("dmb 0xF":::"memory");
    53e6:	f3bf 8f5f 	dmb	sy
    p_reg->CONFIG = (uint32_t)mode;
    53ea:	2200      	movs	r2, #0
    53ec:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
    nvmc_write_mode_set();

    nvmc_word_write(addr, value);

    nvmc_readonly_mode_set();
}
    53f0:	4770      	bx	lr
    53f2:	bf00      	nop
    53f4:	4001e000 	.word	0x4001e000

000053f8 <nrfx_ppi_channel_alloc>:
    nrfx_flag32_init(&m_groups_allocated, NRFX_PPI_ALL_APP_GROUPS_MASK);
}


nrfx_err_t nrfx_ppi_channel_alloc(nrf_ppi_channel_t * p_channel)
{
    53f8:	4601      	mov	r1, r0
    return nrfx_flag32_alloc(&m_channels_allocated, (uint8_t *)p_channel);
    53fa:	4801      	ldr	r0, [pc, #4]	; (5400 <nrfx_ppi_channel_alloc+0x8>)
    53fc:	f7ff bb90 	b.w	4b20 <nrfx_flag32_alloc>
    5400:	200000c8 	.word	0x200000c8

00005404 <_DoInit>:
                      _DoInit();                                                                     \
                    }                                                                                \
                  } while (0);                                                                       \
                }

static void _DoInit(void) {
    5404:	b510      	push	{r4, lr}
  volatile SEGGER_RTT_CB* p;   // Volatile to make sure that compiler cannot change the order of accesses to the control block
  //
  // Initialize control block
  //
  p                     = (volatile SEGGER_RTT_CB*)((char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access control block uncached so that nothing in the cache ever becomes dirty and all changes are visible in HW directly
  p->MaxNumUpBuffers    = SEGGER_RTT_MAX_NUM_UP_BUFFERS;
    5406:	4c14      	ldr	r4, [pc, #80]	; (5458 <_DoInit+0x54>)
  p->MaxNumDownBuffers  = SEGGER_RTT_MAX_NUM_DOWN_BUFFERS;
  //
  // Initialize up buffer 0
  //
  p->aUp[0].sName         = "Terminal";
    5408:	4a14      	ldr	r2, [pc, #80]	; (545c <_DoInit+0x58>)
  //
  // Finish initialization of the control block.
  // Copy Id string in three steps to make sure "SEGGER RTT" is not found
  // in initializer memory (usually flash) by J-Link
  //
  STRCPY((char*)&p->acID[7], "RTT");
    540a:	4915      	ldr	r1, [pc, #84]	; (5460 <_DoInit+0x5c>)
  p->MaxNumUpBuffers    = SEGGER_RTT_MAX_NUM_UP_BUFFERS;
    540c:	2303      	movs	r3, #3
    540e:	6123      	str	r3, [r4, #16]
  p->MaxNumDownBuffers  = SEGGER_RTT_MAX_NUM_DOWN_BUFFERS;
    5410:	6163      	str	r3, [r4, #20]
  p->aUp[0].pBuffer       = _acUpBuffer;
    5412:	4b14      	ldr	r3, [pc, #80]	; (5464 <_DoInit+0x60>)
  p->aUp[0].sName         = "Terminal";
    5414:	61a2      	str	r2, [r4, #24]
  p->aUp[0].pBuffer       = _acUpBuffer;
    5416:	61e3      	str	r3, [r4, #28]
  p->aUp[0].SizeOfBuffer  = BUFFER_SIZE_UP;
    5418:	f44f 6380 	mov.w	r3, #1024	; 0x400
    541c:	6223      	str	r3, [r4, #32]
  p->aUp[0].RdOff         = 0u;
    541e:	2300      	movs	r3, #0
    5420:	62a3      	str	r3, [r4, #40]	; 0x28
  p->aUp[0].WrOff         = 0u;
    5422:	6263      	str	r3, [r4, #36]	; 0x24
  p->aUp[0].Flags         = SEGGER_RTT_MODE_DEFAULT;
    5424:	62e3      	str	r3, [r4, #44]	; 0x2c
  p->aDown[0].sName         = "Terminal";
    5426:	6622      	str	r2, [r4, #96]	; 0x60
  p->aDown[0].pBuffer       = _acDownBuffer;
    5428:	4a0f      	ldr	r2, [pc, #60]	; (5468 <_DoInit+0x64>)
    542a:	6662      	str	r2, [r4, #100]	; 0x64
  STRCPY((char*)&p->acID[7], "RTT");
    542c:	1de0      	adds	r0, r4, #7
  p->aDown[0].SizeOfBuffer  = BUFFER_SIZE_DOWN;
    542e:	2210      	movs	r2, #16
    5430:	66a2      	str	r2, [r4, #104]	; 0x68
  p->aDown[0].RdOff         = 0u;
    5432:	6723      	str	r3, [r4, #112]	; 0x70
  p->aDown[0].WrOff         = 0u;
    5434:	66e3      	str	r3, [r4, #108]	; 0x6c
  p->aDown[0].Flags         = SEGGER_RTT_MODE_DEFAULT;
    5436:	6763      	str	r3, [r4, #116]	; 0x74
  STRCPY((char*)&p->acID[7], "RTT");
    5438:	f001 f8d4 	bl	65e4 <strcpy>
  RTT__DMB();                       // Force order of memory accessed inside core for cores that allow to change the order
    543c:	f3bf 8f5f 	dmb	sy
  STRCPY((char*)&p->acID[0], "SEGGER");
    5440:	490a      	ldr	r1, [pc, #40]	; (546c <_DoInit+0x68>)
    5442:	4620      	mov	r0, r4
    5444:	f001 f8ce 	bl	65e4 <strcpy>
  RTT__DMB();                       // Force order of memory accessed inside core for cores that allow to change the order
    5448:	f3bf 8f5f 	dmb	sy
  p->acID[6] = ' ';
    544c:	2320      	movs	r3, #32
    544e:	71a3      	strb	r3, [r4, #6]
  RTT__DMB();                       // Force order of memory accessed inside core for cores that allow to change the order
    5450:	f3bf 8f5f 	dmb	sy
}
    5454:	bd10      	pop	{r4, pc}
    5456:	bf00      	nop
    5458:	200012e8 	.word	0x200012e8
    545c:	00009c24 	.word	0x00009c24
    5460:	00009c2d 	.word	0x00009c2d
    5464:	2000314b 	.word	0x2000314b
    5468:	2000313b 	.word	0x2000313b
    546c:	00009c31 	.word	0x00009c31

00005470 <SEGGER_RTT_WriteNoLock>:
*    (1) Data is stored according to buffer flags.
*    (2) For performance reasons this function does not call Init()
*        and may only be called after RTT has been initialized.
*        Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
*/
unsigned SEGGER_RTT_WriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
    5470:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
  SEGGER_RTT_BUFFER_UP* pRing;
  //
  // Get "to-host" ring buffer.
  //
  pData = (const char *)pBuffer;
  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
    5472:	4c18      	ldr	r4, [pc, #96]	; (54d4 <SEGGER_RTT_WriteNoLock+0x64>)
    5474:	2318      	movs	r3, #24
    5476:	fb00 3503 	mla	r5, r0, r3, r3
  //
  // How we output depends upon the mode...
  //
  switch (pRing->Flags) {
    547a:	fb03 4000 	mla	r0, r3, r0, r4
  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
    547e:	4425      	add	r5, r4
  switch (pRing->Flags) {
    5480:	6ac4      	ldr	r4, [r0, #44]	; 0x2c
    5482:	2c01      	cmp	r4, #1
unsigned SEGGER_RTT_WriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
    5484:	460f      	mov	r7, r1
    5486:	4616      	mov	r6, r2
  switch (pRing->Flags) {
    5488:	d00f      	beq.n	54aa <SEGGER_RTT_WriteNoLock+0x3a>
    548a:	2c02      	cmp	r4, #2
    548c:	d01a      	beq.n	54c4 <SEGGER_RTT_WriteNoLock+0x54>
    548e:	b9f4      	cbnz	r4, 54ce <SEGGER_RTT_WriteNoLock+0x5e>
  case SEGGER_RTT_MODE_NO_BLOCK_SKIP:
    //
    // If we are in skip mode and there is no space for the whole
    // of this output, don't bother.
    //
    Avail = _GetAvailWriteSpace(pRing);
    5490:	4628      	mov	r0, r5
    5492:	f003 f97c 	bl	878e <_GetAvailWriteSpace>
    if (Avail < NumBytes) {
    5496:	4286      	cmp	r6, r0
    5498:	d805      	bhi.n	54a6 <SEGGER_RTT_WriteNoLock+0x36>
      Status = 0u;
    } else {
      Status = NumBytes;
      _WriteNoCheck(pRing, pData, NumBytes);
    549a:	4632      	mov	r2, r6
    549c:	4639      	mov	r1, r7
    549e:	4628      	mov	r0, r5
    54a0:	f003 f983 	bl	87aa <_WriteNoCheck>
    54a4:	4634      	mov	r4, r6
  }
  //
  // Finish up.
  //
  return Status;
}
    54a6:	4620      	mov	r0, r4
    54a8:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    Avail = _GetAvailWriteSpace(pRing);
    54aa:	4628      	mov	r0, r5
    54ac:	f003 f96f 	bl	878e <_GetAvailWriteSpace>
    Status = Avail < NumBytes ? Avail : NumBytes;
    54b0:	4286      	cmp	r6, r0
    54b2:	4634      	mov	r4, r6
    54b4:	bf28      	it	cs
    54b6:	4604      	movcs	r4, r0
    _WriteNoCheck(pRing, pData, Status);
    54b8:	4622      	mov	r2, r4
    54ba:	4639      	mov	r1, r7
    54bc:	4628      	mov	r0, r5
    54be:	f003 f974 	bl	87aa <_WriteNoCheck>
    break;
    54c2:	e7f0      	b.n	54a6 <SEGGER_RTT_WriteNoLock+0x36>
    Status = _WriteBlocking(pRing, pData, NumBytes);
    54c4:	4628      	mov	r0, r5
}
    54c6:	e8bd 40f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, lr}
    Status = _WriteBlocking(pRing, pData, NumBytes);
    54ca:	f003 b98c 	b.w	87e6 <_WriteBlocking>
  switch (pRing->Flags) {
    54ce:	2400      	movs	r4, #0
  return Status;
    54d0:	e7e9      	b.n	54a6 <SEGGER_RTT_WriteNoLock+0x36>
    54d2:	bf00      	nop
    54d4:	200012e8 	.word	0x200012e8

000054d8 <z_sys_init_run_level>:
		/* End marker */
		__init_end,
	};
	const struct init_entry *entry;

	for (entry = levels[level]; entry < levels[level+1]; entry++) {
    54d8:	4b0e      	ldr	r3, [pc, #56]	; (5514 <z_sys_init_run_level+0x3c>)
{
    54da:	b570      	push	{r4, r5, r6, lr}
	for (entry = levels[level]; entry < levels[level+1]; entry++) {
    54dc:	f853 4020 	ldr.w	r4, [r3, r0, lsl #2]
    54e0:	3001      	adds	r0, #1
    54e2:	f853 6020 	ldr.w	r6, [r3, r0, lsl #2]
    54e6:	42a6      	cmp	r6, r4
    54e8:	d800      	bhi.n	54ec <z_sys_init_run_level+0x14>
				dev->state->init_res = rc;
			}
			dev->state->initialized = true;
		}
	}
}
    54ea:	bd70      	pop	{r4, r5, r6, pc}
		int rc = entry->init(dev);
    54ec:	e9d4 3500 	ldrd	r3, r5, [r4]
    54f0:	4628      	mov	r0, r5
    54f2:	4798      	blx	r3
		if (dev != NULL) {
    54f4:	b165      	cbz	r5, 5510 <z_sys_init_run_level+0x38>
			if (rc != 0) {
    54f6:	68eb      	ldr	r3, [r5, #12]
    54f8:	b130      	cbz	r0, 5508 <z_sys_init_run_level+0x30>
				if (rc < 0) {
    54fa:	2800      	cmp	r0, #0
    54fc:	bfb8      	it	lt
    54fe:	4240      	neglt	r0, r0
				dev->state->init_res = rc;
    5500:	28ff      	cmp	r0, #255	; 0xff
    5502:	bfa8      	it	ge
    5504:	20ff      	movge	r0, #255	; 0xff
    5506:	7018      	strb	r0, [r3, #0]
			dev->state->initialized = true;
    5508:	785a      	ldrb	r2, [r3, #1]
    550a:	f042 0201 	orr.w	r2, r2, #1
    550e:	705a      	strb	r2, [r3, #1]
	for (entry = levels[level]; entry < levels[level+1]; entry++) {
    5510:	3408      	adds	r4, #8
    5512:	e7e8      	b.n	54e6 <z_sys_init_run_level+0xe>
    5514:	00008dd8 	.word	0x00008dd8

00005518 <z_impl_device_get_binding>:

const struct device *z_impl_device_get_binding(const char *name)
{
    5518:	b570      	push	{r4, r5, r6, lr}
	const struct device *dev;

	/* A null string identifies no device.  So does an empty
	 * string.
	 */
	if ((name == NULL) || (name[0] == '\0')) {
    551a:	4605      	mov	r5, r0
    551c:	b910      	cbnz	r0, 5524 <z_impl_device_get_binding+0xc>
		return NULL;
    551e:	2400      	movs	r4, #0
			return dev;
		}
	}

	return NULL;
}
    5520:	4620      	mov	r0, r4
    5522:	bd70      	pop	{r4, r5, r6, pc}
	if ((name == NULL) || (name[0] == '\0')) {
    5524:	7803      	ldrb	r3, [r0, #0]
    5526:	2b00      	cmp	r3, #0
    5528:	d0f9      	beq.n	551e <z_impl_device_get_binding+0x6>
	for (dev = __device_start; dev != __device_end; dev++) {
    552a:	4a0f      	ldr	r2, [pc, #60]	; (5568 <z_impl_device_get_binding+0x50>)
    552c:	4c0f      	ldr	r4, [pc, #60]	; (556c <z_impl_device_get_binding+0x54>)
    552e:	4616      	mov	r6, r2
    5530:	4294      	cmp	r4, r2
    5532:	d108      	bne.n	5546 <z_impl_device_get_binding+0x2e>
	for (dev = __device_start; dev != __device_end; dev++) {
    5534:	4c0d      	ldr	r4, [pc, #52]	; (556c <z_impl_device_get_binding+0x54>)
    5536:	42b4      	cmp	r4, r6
    5538:	d0f1      	beq.n	551e <z_impl_device_get_binding+0x6>
		if (z_device_ready(dev) && (strcmp(name, dev->name) == 0)) {
    553a:	4620      	mov	r0, r4
    553c:	f003 f987 	bl	884e <z_device_ready>
    5540:	b950      	cbnz	r0, 5558 <z_impl_device_get_binding+0x40>
	for (dev = __device_start; dev != __device_end; dev++) {
    5542:	3418      	adds	r4, #24
    5544:	e7f7      	b.n	5536 <z_impl_device_get_binding+0x1e>
		if (z_device_ready(dev) && (dev->name == name)) {
    5546:	4620      	mov	r0, r4
    5548:	f003 f981 	bl	884e <z_device_ready>
    554c:	b110      	cbz	r0, 5554 <z_impl_device_get_binding+0x3c>
    554e:	6823      	ldr	r3, [r4, #0]
    5550:	42ab      	cmp	r3, r5
    5552:	d0e5      	beq.n	5520 <z_impl_device_get_binding+0x8>
	for (dev = __device_start; dev != __device_end; dev++) {
    5554:	3418      	adds	r4, #24
    5556:	e7eb      	b.n	5530 <z_impl_device_get_binding+0x18>
		if (z_device_ready(dev) && (strcmp(name, dev->name) == 0)) {
    5558:	6821      	ldr	r1, [r4, #0]
    555a:	4628      	mov	r0, r5
    555c:	f001 f853 	bl	6606 <strcmp>
    5560:	2800      	cmp	r0, #0
    5562:	d1ee      	bne.n	5542 <z_impl_device_get_binding+0x2a>
    5564:	e7dc      	b.n	5520 <z_impl_device_get_binding+0x8>
    5566:	bf00      	nop
    5568:	0000892c 	.word	0x0000892c
    556c:	000088cc 	.word	0x000088cc

00005570 <z_fatal_error>:
	return 0;
#endif
}

void z_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
{
    5570:	b573      	push	{r0, r1, r4, r5, r6, lr}
    5572:	4604      	mov	r4, r0
    5574:	460d      	mov	r5, r1
	__asm__ volatile(
    5576:	f04f 0320 	mov.w	r3, #32
    557a:	f3ef 8611 	mrs	r6, BASEPRI
    557e:	f383 8812 	msr	BASEPRI_MAX, r3
    5582:	f3bf 8f6f 	isb	sy
	switch (reason) {
    5586:	2804      	cmp	r0, #4
    5588:	bf96      	itet	ls
    558a:	4b12      	ldrls	r3, [pc, #72]	; (55d4 <z_fatal_error+0x64>)
    558c:	4b12      	ldrhi	r3, [pc, #72]	; (55d8 <z_fatal_error+0x68>)
	return 0;
    558e:	f853 3020 	ldrls.w	r3, [r3, r0, lsl #2]
			k_current_get() : NULL;

	/* twister looks for the "ZEPHYR FATAL ERROR" string, don't
	 * change it without also updating twister
	 */
	LOG_ERR(">>> ZEPHYR FATAL ERROR %d: %s on CPU %d", reason,
    5592:	2200      	movs	r2, #0
    5594:	9200      	str	r2, [sp, #0]
    5596:	2145      	movs	r1, #69	; 0x45
    5598:	4602      	mov	r2, r0
    559a:	4810      	ldr	r0, [pc, #64]	; (55dc <z_fatal_error+0x6c>)
    559c:	f000 fcda 	bl	5f54 <z_log_minimal_printk>
	 * an IRQ or exception was being handled, or thread context.
	 *
	 * See #17656
	 */
#if defined(CONFIG_ARCH_HAS_NESTED_EXCEPTION_DETECTION)
	if ((esf != NULL) && arch_is_in_nested_exception(esf)) {
    55a0:	b13d      	cbz	r5, 55b2 <z_fatal_error+0x42>
 * @return true if execution state was in handler mode, before
 *              the current exception occurred, otherwise false.
 */
static ALWAYS_INLINE bool arch_is_in_nested_exception(const z_arch_esf_t *esf)
{
	return (esf->basic.xpsr & IPSR_ISR_Msk) ? (true) : (false);
    55a2:	69eb      	ldr	r3, [r5, #28]
    55a4:	f3c3 0308 	ubfx	r3, r3, #0, #9
    55a8:	b11b      	cbz	r3, 55b2 <z_fatal_error+0x42>
		LOG_ERR("Fault during interrupt handling\n");
    55aa:	480d      	ldr	r0, [pc, #52]	; (55e0 <z_fatal_error+0x70>)
    55ac:	2145      	movs	r1, #69	; 0x45
    55ae:	f000 fcd1 	bl	5f54 <z_log_minimal_printk>
	}
#endif

	LOG_ERR("Current thread: %p (%s)", thread,
    55b2:	4b0c      	ldr	r3, [pc, #48]	; (55e4 <z_fatal_error+0x74>)
    55b4:	480c      	ldr	r0, [pc, #48]	; (55e8 <z_fatal_error+0x78>)
    55b6:	2200      	movs	r2, #0
    55b8:	2145      	movs	r1, #69	; 0x45
    55ba:	f000 fccb 	bl	5f54 <z_log_minimal_printk>
		log_strdup(thread_name_get(thread)));

	coredump(reason, esf, thread);

	k_sys_fatal_error_handler(reason, esf);
    55be:	4629      	mov	r1, r5
    55c0:	4620      	mov	r0, r4
    55c2:	f7fe fd05 	bl	3fd0 <k_sys_fatal_error_handler>
	__asm__ volatile(
    55c6:	f386 8811 	msr	BASEPRI, r6
    55ca:	f3bf 8f6f 	isb	sy
	arch_irq_unlock(key);

	if (IS_ENABLED(CONFIG_MULTITHREADING)) {
		k_thread_abort(thread);
	}
}
    55ce:	b002      	add	sp, #8
    55d0:	bd70      	pop	{r4, r5, r6, pc}
    55d2:	bf00      	nop
    55d4:	00008dec 	.word	0x00008dec
    55d8:	00009c38 	.word	0x00009c38
    55dc:	00009c46 	.word	0x00009c46
    55e0:	00009c73 	.word	0x00009c73
    55e4:	00009c99 	.word	0x00009c99
    55e8:	00009ca1 	.word	0x00009ca1

000055ec <bg_thread_main>:
 *
 * @return N/A
 */
__boot_func
static void bg_thread_main(void *unused1, void *unused2, void *unused3)
{
    55ec:	b508      	push	{r3, lr}
	 * may perform memory management tasks (except for z_phys_map() which
	 * is allowed at any time)
	 */
	z_mem_manage_init();
#endif /* CONFIG_MMU */
	z_sys_post_kernel = true;
    55ee:	4b09      	ldr	r3, [pc, #36]	; (5614 <bg_thread_main+0x28>)
    55f0:	2201      	movs	r2, #1

	z_sys_init_run_level(_SYS_INIT_LEVEL_POST_KERNEL);
    55f2:	2002      	movs	r0, #2
	z_sys_post_kernel = true;
    55f4:	701a      	strb	r2, [r3, #0]
	z_sys_init_run_level(_SYS_INIT_LEVEL_POST_KERNEL);
    55f6:	f7ff ff6f 	bl	54d8 <z_sys_init_run_level>
#if CONFIG_STACK_POINTER_RANDOM
	z_stack_adjust_initialized = 1;
#endif
	boot_banner();
    55fa:	f000 f91f 	bl	583c <boot_banner>
	void z_cpp_init_static(void);
	z_cpp_init_static();
#endif

	/* Final init level before app starts */
	z_sys_init_run_level(_SYS_INIT_LEVEL_APPLICATION);
    55fe:	2003      	movs	r0, #3
    5600:	f7ff ff6a 	bl	54d8 <z_sys_init_run_level>
	z_mem_manage_boot_finish();
#endif /* CONFIG_MMU */

	extern void main(void);

	main();
    5604:	f7fa fee4 	bl	3d0 <main>

	/* Mark nonessenrial since main() has no more work to do */
	z_main_thread.base.user_options &= ~K_ESSENTIAL;
    5608:	4a03      	ldr	r2, [pc, #12]	; (5618 <bg_thread_main+0x2c>)
    560a:	7b13      	ldrb	r3, [r2, #12]
    560c:	f023 0301 	bic.w	r3, r3, #1
    5610:	7313      	strb	r3, [r2, #12]

#ifdef CONFIG_COVERAGE_DUMP
	/* Dump coverage data once the main() has exited. */
	gcov_coverage_dump();
#endif
} /* LCOV_EXCL_LINE ... because we just dumped final coverage data */
    5612:	bd08      	pop	{r3, pc}
    5614:	2000354b 	.word	0x2000354b
    5618:	20000108 	.word	0x20000108

0000561c <z_bss_zero>:
	(void)memset(__bss_start, 0, __bss_end - __bss_start);
    561c:	4802      	ldr	r0, [pc, #8]	; (5628 <z_bss_zero+0xc>)
    561e:	4a03      	ldr	r2, [pc, #12]	; (562c <z_bss_zero+0x10>)
    5620:	2100      	movs	r1, #0
    5622:	1a12      	subs	r2, r2, r0
    5624:	f001 b82d 	b.w	6682 <memset>
    5628:	200000e8 	.word	0x200000e8
    562c:	2000354c 	.word	0x2000354c

00005630 <z_cstart>:
 *
 * @return Does not return
 */
__boot_func
FUNC_NORETURN void z_cstart(void)
{
    5630:	b508      	push	{r3, lr}
 *
 * @return N/A
 */
static ALWAYS_INLINE void z_arm_interrupt_stack_setup(void)
{
	uint32_t msp =
    5632:	4b19      	ldr	r3, [pc, #100]	; (5698 <z_cstart+0x68>)
  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
    5634:	f383 8808 	msr	MSP, r3
	 * for Cortex-M3 and Cortex-M4 (ARMv7-M) MCUs. For the rest
	 * of ARM Cortex-M processors this setting is enforced by
	 * default and it is not configurable.
	 */
#if defined(CONFIG_CPU_CORTEX_M3) || defined(CONFIG_CPU_CORTEX_M4)
	SCB->CCR |= SCB_CCR_STKALIGN_Msk;
    5638:	4c18      	ldr	r4, [pc, #96]	; (569c <z_cstart+0x6c>)
    563a:	6963      	ldr	r3, [r4, #20]
    563c:	f443 7300 	orr.w	r3, r3, #512	; 0x200
    5640:	6163      	str	r3, [r4, #20]
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    5642:	2500      	movs	r5, #0
    5644:	23e0      	movs	r3, #224	; 0xe0
    5646:	f884 3022 	strb.w	r3, [r4, #34]	; 0x22
    564a:	77e5      	strb	r5, [r4, #31]
    564c:	7625      	strb	r5, [r4, #24]
    564e:	7665      	strb	r5, [r4, #25]
    5650:	76a5      	strb	r5, [r4, #26]
    5652:	f884 5020 	strb.w	r5, [r4, #32]
#if defined(CONFIG_ARM_SECURE_FIRMWARE)
	NVIC_SetPriority(SecureFault_IRQn, _EXC_FAULT_PRIO);
#endif /* CONFIG_ARM_SECURE_FIRMWARE */

	/* Enable Usage, Mem, & Bus Faults */
	SCB->SHCSR |= SCB_SHCSR_USGFAULTENA_Msk | SCB_SHCSR_MEMFAULTENA_Msk |
    5656:	6a63      	ldr	r3, [r4, #36]	; 0x24
    5658:	f443 23e0 	orr.w	r3, r3, #458752	; 0x70000
    565c:	6263      	str	r3, [r4, #36]	; 0x24
    565e:	f884 5023 	strb.w	r5, [r4, #35]	; 0x23

static ALWAYS_INLINE void arch_kernel_init(void)
{
	z_arm_interrupt_stack_setup();
	z_arm_exc_setup();
	z_arm_fault_init();
    5662:	f7fd fba1 	bl	2da8 <z_arm_fault_init>
	z_arm_cpu_idle_init();
    5666:	f7fd f8c3 	bl	27f0 <z_arm_cpu_idle_init>
static ALWAYS_INLINE void z_arm_clear_faults(void)
{
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	/* Reset all faults */
	SCB->CFSR = SCB_CFSR_USGFAULTSR_Msk |
    566a:	f04f 33ff 	mov.w	r3, #4294967295
    566e:	62a3      	str	r3, [r4, #40]	; 0x28
		    SCB_CFSR_MEMFAULTSR_Msk |
		    SCB_CFSR_BUSFAULTSR_Msk;

	/* Clear all Hard Faults - HFSR is write-one-to-clear */
	SCB->HFSR = 0xffffffff;
    5670:	62e3      	str	r3, [r4, #44]	; 0x2c
	z_arm_clear_faults();
#if defined(CONFIG_ARM_MPU)
	z_arm_mpu_init();
    5672:	f7fd fc97 	bl	2fa4 <z_arm_mpu_init>
	 * to set up access permissions for fixed memory sections, such
	 * as Application Memory or No-Cacheable SRAM area.
	 *
	 * This function is invoked once, upon system initialization.
	 */
	z_arm_configure_static_mpu_regions();
    5676:	f7fd fc21 	bl	2ebc <z_arm_configure_static_mpu_regions>
	struct k_thread dummy_thread;

	z_dummy_thread_init(&dummy_thread);
#endif
	/* do any necessary initialization of static devices */
	z_device_state_init();
    567a:	f003 f8e7 	bl	884c <z_device_state_init>

	/* perform basic hardware initialization */
	z_sys_init_run_level(_SYS_INIT_LEVEL_PRE_KERNEL_1);
    567e:	4628      	mov	r0, r5
    5680:	f7ff ff2a 	bl	54d8 <z_sys_init_run_level>
	z_sys_init_run_level(_SYS_INIT_LEVEL_PRE_KERNEL_2);
    5684:	2001      	movs	r0, #1
    5686:	f7ff ff27 	bl	54d8 <z_sys_init_run_level>
#else
#ifdef ARCH_SWITCH_TO_MAIN_NO_MULTITHREADING
	/* Custom ARCH-specific routine to switch to main()
	 * in the case of no multi-threading.
	 */
	ARCH_SWITCH_TO_MAIN_NO_MULTITHREADING(bg_thread_main,
    568a:	4805      	ldr	r0, [pc, #20]	; (56a0 <z_cstart+0x70>)
    568c:	462b      	mov	r3, r5
    568e:	462a      	mov	r2, r5
    5690:	4629      	mov	r1, r5
    5692:	f7fd f979 	bl	2988 <z_arm_switch_to_main_no_multithreading>
    5696:	bf00      	nop
    5698:	200065a0 	.word	0x200065a0
    569c:	e000ed00 	.word	0xe000ed00
    56a0:	000055ed 	.word	0x000055ed

000056a4 <z_data_copy>:
 * This routine copies the data section from ROM to RAM.
 *
 * @return N/A
 */
void z_data_copy(void)
{
    56a4:	b508      	push	{r3, lr}
	(void)memcpy(&__data_region_start, &__data_region_load_start,
		 __data_region_end - __data_region_start);
    56a6:	4806      	ldr	r0, [pc, #24]	; (56c0 <z_data_copy+0x1c>)
	(void)memcpy(&__data_region_start, &__data_region_load_start,
    56a8:	4a06      	ldr	r2, [pc, #24]	; (56c4 <z_data_copy+0x20>)
    56aa:	4907      	ldr	r1, [pc, #28]	; (56c8 <z_data_copy+0x24>)
    56ac:	1a12      	subs	r2, r2, r0
    56ae:	f000 ffdd 	bl	666c <memcpy>
#else
	(void)memcpy(&_app_smem_start, &_app_smem_rom_start,
		 _app_smem_end - _app_smem_start);
#endif /* CONFIG_STACK_CANARIES */
#endif /* CONFIG_USERSPACE */
}
    56b2:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
	(void)memcpy(&__ramfunc_start, &__ramfunc_load_start,
    56b6:	4a05      	ldr	r2, [pc, #20]	; (56cc <z_data_copy+0x28>)
    56b8:	4905      	ldr	r1, [pc, #20]	; (56d0 <z_data_copy+0x2c>)
    56ba:	4806      	ldr	r0, [pc, #24]	; (56d4 <z_data_copy+0x30>)
    56bc:	f000 bfd6 	b.w	666c <memcpy>
    56c0:	20000000 	.word	0x20000000
    56c4:	200000e4 	.word	0x200000e4
    56c8:	00009d44 	.word	0x00009d44
    56cc:	00000000 	.word	0x00000000
    56d0:	00009d44 	.word	0x00009d44
    56d4:	20000000 	.word	0x20000000

000056d8 <elapsed>:
	sys_dlist_remove(&t->node);
}

static int32_t elapsed(void)
{
	return announce_remaining == 0 ? sys_clock_elapsed() : 0U;
    56d8:	4b03      	ldr	r3, [pc, #12]	; (56e8 <elapsed+0x10>)
    56da:	681b      	ldr	r3, [r3, #0]
    56dc:	b90b      	cbnz	r3, 56e2 <elapsed+0xa>
    56de:	f7fe bc6d 	b.w	3fbc <sys_clock_elapsed>
}
    56e2:	2000      	movs	r0, #0
    56e4:	4770      	bx	lr
    56e6:	bf00      	nop
    56e8:	20001390 	.word	0x20001390

000056ec <remove_timeout>:
{
    56ec:	b530      	push	{r4, r5, lr}
    56ee:	6803      	ldr	r3, [r0, #0]
 */

static inline sys_dnode_t *sys_dlist_peek_next(sys_dlist_t *list,
					       sys_dnode_t *node)
{
	return (node != NULL) ? sys_dlist_peek_next_no_check(list, node) : NULL;
    56f0:	b168      	cbz	r0, 570e <remove_timeout+0x22>
    56f2:	4a0a      	ldr	r2, [pc, #40]	; (571c <remove_timeout+0x30>)
	return (node == list->tail) ? NULL : node->next;
    56f4:	6852      	ldr	r2, [r2, #4]
    56f6:	4290      	cmp	r0, r2
    56f8:	d009      	beq.n	570e <remove_timeout+0x22>
	if (next(t) != NULL) {
    56fa:	b143      	cbz	r3, 570e <remove_timeout+0x22>
		next(t)->dticks += t->dticks;
    56fc:	e9d3 2104 	ldrd	r2, r1, [r3, #16]
    5700:	e9d0 4504 	ldrd	r4, r5, [r0, #16]
    5704:	1912      	adds	r2, r2, r4
    5706:	eb45 0101 	adc.w	r1, r5, r1
    570a:	e9c3 2104 	strd	r2, r1, [r3, #16]
 * @return N/A
 */

static inline void sys_dlist_remove(sys_dnode_t *node)
{
	sys_dnode_t *const prev = node->prev;
    570e:	6842      	ldr	r2, [r0, #4]
	sys_dnode_t *const next = node->next;

	prev->next = next;
    5710:	6013      	str	r3, [r2, #0]
	next->prev = prev;
    5712:	605a      	str	r2, [r3, #4]
	node->next = NULL;
    5714:	2300      	movs	r3, #0
	node->prev = NULL;
    5716:	e9c0 3300 	strd	r3, r3, [r0]
}
    571a:	bd30      	pop	{r4, r5, pc}
    571c:	200000cc 	.word	0x200000cc

00005720 <next_timeout>:

static int32_t next_timeout(void)
{
    5720:	b538      	push	{r3, r4, r5, lr}
	return list->head == list;
    5722:	4b10      	ldr	r3, [pc, #64]	; (5764 <next_timeout+0x44>)
    5724:	681c      	ldr	r4, [r3, #0]
	return sys_dlist_is_empty(list) ? NULL : list->head;
    5726:	429c      	cmp	r4, r3
    5728:	bf08      	it	eq
    572a:	2400      	moveq	r4, #0
	struct _timeout *to = first();
	int32_t ticks_elapsed = elapsed();
    572c:	f7ff ffd4 	bl	56d8 <elapsed>
    5730:	4605      	mov	r5, r0
	int32_t ret = to == NULL ? MAX_WAIT
    5732:	b18c      	cbz	r4, 5758 <next_timeout+0x38>
		: CLAMP(to->dticks - ticks_elapsed, 0, MAX_WAIT);
    5734:	e9d4 0104 	ldrd	r0, r1, [r4, #16]
    5738:	1b40      	subs	r0, r0, r5
    573a:	eb61 71e5 	sbc.w	r1, r1, r5, asr #31
	int32_t ret = to == NULL ? MAX_WAIT
    573e:	2801      	cmp	r0, #1
    5740:	f171 0300 	sbcs.w	r3, r1, #0
    5744:	db0b      	blt.n	575e <next_timeout+0x3e>
		: CLAMP(to->dticks - ticks_elapsed, 0, MAX_WAIT);
    5746:	f06f 4200 	mvn.w	r2, #2147483648	; 0x80000000
    574a:	2300      	movs	r3, #0
    574c:	4282      	cmp	r2, r0
    574e:	eb73 0401 	sbcs.w	r4, r3, r1
    5752:	da00      	bge.n	5756 <next_timeout+0x36>
    5754:	4610      	mov	r0, r2
	if (_current_cpu->slice_ticks && _current_cpu->slice_ticks < ret) {
		ret = _current_cpu->slice_ticks;
	}
#endif
	return ret;
}
    5756:	bd38      	pop	{r3, r4, r5, pc}
	int32_t ret = to == NULL ? MAX_WAIT
    5758:	f06f 4000 	mvn.w	r0, #2147483648	; 0x80000000
    575c:	e7fb      	b.n	5756 <next_timeout+0x36>
    575e:	2000      	movs	r0, #0
	return ret;
    5760:	e7f9      	b.n	5756 <next_timeout+0x36>
    5762:	bf00      	nop
    5764:	200000cc 	.word	0x200000cc

00005768 <sys_clock_announce>:
		}
	}
}

void sys_clock_announce(int32_t ticks)
{
    5768:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
	__asm__ volatile(
    576c:	f04f 0320 	mov.w	r3, #32
    5770:	f3ef 8411 	mrs	r4, BASEPRI
    5774:	f383 8812 	msr	BASEPRI_MAX, r3
    5778:	f3bf 8f6f 	isb	sy
	z_time_slice(ticks);
#endif

	k_spinlock_key_t key = k_spin_lock(&timeout_lock);

	announce_remaining = ticks;
    577c:	4d2c      	ldr	r5, [pc, #176]	; (5830 <sys_clock_announce+0xc8>)
    577e:	f8df a0b4 	ldr.w	sl, [pc, #180]	; 5834 <sys_clock_announce+0xcc>
	return list->head == list;
    5782:	f8df b0b4 	ldr.w	fp, [pc, #180]	; 5838 <sys_clock_announce+0xd0>
    5786:	6028      	str	r0, [r5, #0]

	while (first() != NULL && first()->dticks <= announce_remaining) {
    5788:	4651      	mov	r1, sl
    578a:	f8d5 c000 	ldr.w	ip, [r5]
    578e:	f8db 0000 	ldr.w	r0, [fp]
    5792:	4662      	mov	r2, ip
    5794:	17d3      	asrs	r3, r2, #31
	return sys_dlist_is_empty(list) ? NULL : list->head;
    5796:	4558      	cmp	r0, fp
    5798:	e9da 8900 	ldrd	r8, r9, [sl]
    579c:	e9cd 2300 	strd	r2, r3, [sp]
    57a0:	d00d      	beq.n	57be <sys_clock_announce+0x56>
    57a2:	b160      	cbz	r0, 57be <sys_clock_announce+0x56>
    57a4:	e9d0 6704 	ldrd	r6, r7, [r0, #16]
    57a8:	45b4      	cmp	ip, r6
    57aa:	41bb      	sbcs	r3, r7
    57ac:	da1e      	bge.n	57ec <sys_clock_announce+0x84>
		t->fn(t);
		key = k_spin_lock(&timeout_lock);
	}

	if (first() != NULL) {
		first()->dticks -= announce_remaining;
    57ae:	9b00      	ldr	r3, [sp, #0]
    57b0:	ebb6 0c03 	subs.w	ip, r6, r3
    57b4:	9b01      	ldr	r3, [sp, #4]
    57b6:	eb67 0603 	sbc.w	r6, r7, r3
    57ba:	e9c0 c604 	strd	ip, r6, [r0, #16]
	}

	curr_tick += announce_remaining;
    57be:	9b00      	ldr	r3, [sp, #0]
    57c0:	eb13 0208 	adds.w	r2, r3, r8
    57c4:	9b01      	ldr	r3, [sp, #4]
	announce_remaining = 0;
    57c6:	f04f 0600 	mov.w	r6, #0
	curr_tick += announce_remaining;
    57ca:	eb43 0309 	adc.w	r3, r3, r9
    57ce:	e9c1 2300 	strd	r2, r3, [r1]
	announce_remaining = 0;
    57d2:	602e      	str	r6, [r5, #0]

	sys_clock_set_timeout(next_timeout(), false);
    57d4:	f7ff ffa4 	bl	5720 <next_timeout>
    57d8:	4631      	mov	r1, r6
    57da:	f7fe fbbf 	bl	3f5c <sys_clock_set_timeout>
	__asm__ volatile(
    57de:	f384 8811 	msr	BASEPRI, r4
    57e2:	f3bf 8f6f 	isb	sy

	k_spin_unlock(&timeout_lock, key);
}
    57e6:	b003      	add	sp, #12
    57e8:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
		curr_tick += dt;
    57ec:	eb18 0806 	adds.w	r8, r8, r6
		t->dticks = 0;
    57f0:	f04f 0200 	mov.w	r2, #0
    57f4:	f04f 0300 	mov.w	r3, #0
		curr_tick += dt;
    57f8:	eb49 79e6 	adc.w	r9, r9, r6, asr #31
		t->dticks = 0;
    57fc:	e9c0 2304 	strd	r2, r3, [r0, #16]
		announce_remaining -= dt;
    5800:	ebac 0606 	sub.w	r6, ip, r6
		curr_tick += dt;
    5804:	e9ca 8900 	strd	r8, r9, [sl]
		announce_remaining -= dt;
    5808:	602e      	str	r6, [r5, #0]
		remove_timeout(t);
    580a:	f7ff ff6f 	bl	56ec <remove_timeout>
    580e:	f384 8811 	msr	BASEPRI, r4
    5812:	f3bf 8f6f 	isb	sy
		t->fn(t);
    5816:	6883      	ldr	r3, [r0, #8]
    5818:	4798      	blx	r3
	__asm__ volatile(
    581a:	f04f 0320 	mov.w	r3, #32
    581e:	f3ef 8411 	mrs	r4, BASEPRI
    5822:	f383 8812 	msr	BASEPRI_MAX, r3
    5826:	f3bf 8f6f 	isb	sy

	/* Note that we need to use the underlying arch-specific lock
	 * implementation.  The "irq_lock()" API in SMP context is
	 * actually a wrapper for a global spinlock!
	 */
	k.key = arch_irq_lock();
    582a:	4902      	ldr	r1, [pc, #8]	; (5834 <sys_clock_announce+0xcc>)
#endif

#ifdef CONFIG_SPIN_VALIDATE
	z_spin_lock_set_owner(l);
#endif
	return k;
    582c:	e7ad      	b.n	578a <sys_clock_announce+0x22>
    582e:	bf00      	nop
    5830:	20001390 	.word	0x20001390
    5834:	20000188 	.word	0x20000188
    5838:	200000cc 	.word	0x200000cc

0000583c <boot_banner>:
		k_busy_wait(CONFIG_BOOT_DELAY * USEC_PER_MSEC);
	}

#if defined(CONFIG_BOOT_BANNER)
#ifdef BUILD_VERSION
	printk("*** Booting Zephyr OS build %s %s ***\n",
    583c:	4a02      	ldr	r2, [pc, #8]	; (5848 <boot_banner+0xc>)
    583e:	4903      	ldr	r1, [pc, #12]	; (584c <boot_banner+0x10>)
    5840:	4803      	ldr	r0, [pc, #12]	; (5850 <boot_banner+0x14>)
    5842:	f000 bace 	b.w	5de2 <printk>
    5846:	bf00      	nop
    5848:	00009c98 	.word	0x00009c98
    584c:	00009d0b 	.word	0x00009d0b
    5850:	00009d1a 	.word	0x00009d1a

00005854 <flash_area_id_from_multi_image_slot>:
    switch (slot) {
    5854:	b129      	cbz	r1, 5862 <flash_area_id_from_multi_image_slot+0xe>
    5856:	2901      	cmp	r1, #1
    5858:	bf14      	ite	ne
    585a:	f06f 0015 	mvnne.w	r0, #21
    585e:	2005      	moveq	r0, #5
    5860:	4770      	bx	lr
    case 0: return FLASH_AREA_IMAGE_PRIMARY(image_index);
    5862:	2002      	movs	r0, #2
}
    5864:	4770      	bx	lr

00005866 <flash_area_get_device_id>:

uint8_t flash_area_get_device_id(const struct flash_area *fa)
{
	(void)fa;
	return FLASH_DEVICE_ID;
}
    5866:	2000      	movs	r0, #0
    5868:	4770      	bx	lr

0000586a <bootutil_tlv_iter_begin>:
 *          -1 on errors
 */
int
bootutil_tlv_iter_begin(struct image_tlv_iter *it, const struct image_header *hdr,
                        const struct flash_area *fap, uint16_t type, bool prot)
{
    586a:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
    586e:	460e      	mov	r6, r1
    5870:	4617      	mov	r7, r2
    5872:	4699      	mov	r9, r3
    uint32_t off_;
    struct image_tlv_info info;

    if (it == NULL || hdr == NULL || fap == NULL) {
    5874:	4604      	mov	r4, r0
    5876:	b928      	cbnz	r0, 5884 <bootutil_tlv_iter_begin+0x1a>
        return -1;
    5878:	f04f 38ff 	mov.w	r8, #4294967295
    it->prot_end = off_ + it->hdr->ih_protect_tlv_size;
    it->tlv_end = off_ + it->hdr->ih_protect_tlv_size + info.it_tlv_tot;
    // position on first TLV
    it->tlv_off = off_ + sizeof(info);
    return 0;
}
    587c:	4640      	mov	r0, r8
    587e:	b003      	add	sp, #12
    5880:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
    if (it == NULL || hdr == NULL || fap == NULL) {
    5884:	2900      	cmp	r1, #0
    5886:	d0f7      	beq.n	5878 <bootutil_tlv_iter_begin+0xe>
    5888:	2a00      	cmp	r2, #0
    588a:	d0f5      	beq.n	5878 <bootutil_tlv_iter_begin+0xe>
    off_ = BOOT_TLV_OFF(hdr);
    588c:	68cb      	ldr	r3, [r1, #12]
    588e:	890d      	ldrh	r5, [r1, #8]
    5890:	441d      	add	r5, r3
    if (LOAD_IMAGE_DATA(hdr, fap, off_, &info, sizeof(info))) {
    5892:	2304      	movs	r3, #4
    5894:	eb0d 0203 	add.w	r2, sp, r3
    5898:	4629      	mov	r1, r5
    589a:	4638      	mov	r0, r7
    589c:	f000 fb68 	bl	5f70 <flash_area_read>
    58a0:	4680      	mov	r8, r0
    58a2:	2800      	cmp	r0, #0
    58a4:	d1e8      	bne.n	5878 <bootutil_tlv_iter_begin+0xe>
    if (info.it_magic == IMAGE_TLV_PROT_INFO_MAGIC) {
    58a6:	f8bd 1004 	ldrh.w	r1, [sp, #4]
    58aa:	8973      	ldrh	r3, [r6, #10]
    58ac:	f646 1208 	movw	r2, #26888	; 0x6908
    58b0:	4291      	cmp	r1, r2
    58b2:	d123      	bne.n	58fc <bootutil_tlv_iter_begin+0x92>
        if (hdr->ih_protect_tlv_size != info.it_tlv_tot) {
    58b4:	f8bd 1006 	ldrh.w	r1, [sp, #6]
    58b8:	4299      	cmp	r1, r3
    58ba:	d1dd      	bne.n	5878 <bootutil_tlv_iter_begin+0xe>
        if (LOAD_IMAGE_DATA(hdr, fap, off_ + info.it_tlv_tot,
    58bc:	2304      	movs	r3, #4
    58be:	eb0d 0203 	add.w	r2, sp, r3
    58c2:	4429      	add	r1, r5
    58c4:	4638      	mov	r0, r7
    58c6:	f000 fb53 	bl	5f70 <flash_area_read>
    58ca:	2800      	cmp	r0, #0
    58cc:	d1d4      	bne.n	5878 <bootutil_tlv_iter_begin+0xe>
    if (info.it_magic != IMAGE_TLV_INFO_MAGIC) {
    58ce:	f8bd 2004 	ldrh.w	r2, [sp, #4]
    58d2:	f646 1307 	movw	r3, #26887	; 0x6907
    58d6:	429a      	cmp	r2, r3
    58d8:	d1ce      	bne.n	5878 <bootutil_tlv_iter_begin+0xe>
    it->prot = prot;
    58da:	f89d 3028 	ldrb.w	r3, [sp, #40]	; 0x28
    58de:	72a3      	strb	r3, [r4, #10]
    it->prot_end = off_ + it->hdr->ih_protect_tlv_size;
    58e0:	8973      	ldrh	r3, [r6, #10]
    it->tlv_end = off_ + it->hdr->ih_protect_tlv_size + info.it_tlv_tot;
    58e2:	f8bd 2006 	ldrh.w	r2, [sp, #6]
    it->type = type;
    58e6:	f8a4 9008 	strh.w	r9, [r4, #8]
    it->prot_end = off_ + it->hdr->ih_protect_tlv_size;
    58ea:	442b      	add	r3, r5
    58ec:	60e3      	str	r3, [r4, #12]
    it->tlv_off = off_ + sizeof(info);
    58ee:	3504      	adds	r5, #4
    it->tlv_end = off_ + it->hdr->ih_protect_tlv_size + info.it_tlv_tot;
    58f0:	4413      	add	r3, r2
    it->fap = fap;
    58f2:	e9c4 6700 	strd	r6, r7, [r4]
    it->tlv_end = off_ + it->hdr->ih_protect_tlv_size + info.it_tlv_tot;
    58f6:	6163      	str	r3, [r4, #20]
    it->tlv_off = off_ + sizeof(info);
    58f8:	6125      	str	r5, [r4, #16]
    return 0;
    58fa:	e7bf      	b.n	587c <bootutil_tlv_iter_begin+0x12>
    } else if (hdr->ih_protect_tlv_size != 0) {
    58fc:	2b00      	cmp	r3, #0
    58fe:	d0e6      	beq.n	58ce <bootutil_tlv_iter_begin+0x64>
    5900:	e7ba      	b.n	5878 <bootutil_tlv_iter_begin+0xe>

00005902 <bootutil_tlv_iter_next>:
 *          -1 on errors
 */
int
bootutil_tlv_iter_next(struct image_tlv_iter *it, uint32_t *off, uint16_t *len,
                       uint16_t *type)
{
    5902:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
    5906:	460f      	mov	r7, r1
    5908:	4690      	mov	r8, r2
    590a:	461e      	mov	r6, r3
    struct image_tlv tlv;
    int rc;

    if (it == NULL || it->hdr == NULL || it->fap == NULL) {
    590c:	4604      	mov	r4, r0
    590e:	b920      	cbnz	r0, 591a <bootutil_tlv_iter_next+0x18>
        return -1;
    5910:	f04f 30ff 	mov.w	r0, #4294967295

        it->tlv_off += sizeof(tlv) + tlv.it_len;
    }

    return 1;
}
    5914:	b003      	add	sp, #12
    5916:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
    if (it == NULL || it->hdr == NULL || it->fap == NULL) {
    591a:	6803      	ldr	r3, [r0, #0]
    591c:	2b00      	cmp	r3, #0
    591e:	d0f7      	beq.n	5910 <bootutil_tlv_iter_next+0xe>
    5920:	6843      	ldr	r3, [r0, #4]
    5922:	2b00      	cmp	r3, #0
    5924:	d0f4      	beq.n	5910 <bootutil_tlv_iter_next+0xe>
        if (it->type == IMAGE_TLV_ANY || tlv.it_type == it->type) {
    5926:	f64f 79ff 	movw	r9, #65535	; 0xffff
    while (it->tlv_off < it->tlv_end) {
    592a:	e9d4 2304 	ldrd	r2, r3, [r4, #16]
    592e:	429a      	cmp	r2, r3
    5930:	d216      	bcs.n	5960 <bootutil_tlv_iter_next+0x5e>
        if (it->hdr->ih_protect_tlv_size > 0 && it->tlv_off == it->prot_end) {
    5932:	6823      	ldr	r3, [r4, #0]
    5934:	895b      	ldrh	r3, [r3, #10]
    5936:	b123      	cbz	r3, 5942 <bootutil_tlv_iter_next+0x40>
    5938:	68e3      	ldr	r3, [r4, #12]
    593a:	4293      	cmp	r3, r2
            it->tlv_off += sizeof(struct image_tlv_info);
    593c:	bf04      	itt	eq
    593e:	3304      	addeq	r3, #4
    5940:	6123      	streq	r3, [r4, #16]
        rc = LOAD_IMAGE_DATA(it->hdr, it->fap, it->tlv_off, &tlv, sizeof tlv);
    5942:	2304      	movs	r3, #4
    5944:	6921      	ldr	r1, [r4, #16]
    5946:	6860      	ldr	r0, [r4, #4]
    5948:	eb0d 0203 	add.w	r2, sp, r3
    594c:	f000 fb10 	bl	5f70 <flash_area_read>
        if (rc) {
    5950:	2800      	cmp	r0, #0
    5952:	d1dd      	bne.n	5910 <bootutil_tlv_iter_next+0xe>
        if (it->prot && it->tlv_off >= it->prot_end) {
    5954:	7aa3      	ldrb	r3, [r4, #10]
    5956:	6925      	ldr	r5, [r4, #16]
    5958:	b123      	cbz	r3, 5964 <bootutil_tlv_iter_next+0x62>
    595a:	68e3      	ldr	r3, [r4, #12]
    595c:	42ab      	cmp	r3, r5
    595e:	d801      	bhi.n	5964 <bootutil_tlv_iter_next+0x62>
            return 1;
    5960:	2001      	movs	r0, #1
    5962:	e7d7      	b.n	5914 <bootutil_tlv_iter_next+0x12>
        if (it->type == IMAGE_TLV_ANY || tlv.it_type == it->type) {
    5964:	8921      	ldrh	r1, [r4, #8]
    5966:	f8bd 3006 	ldrh.w	r3, [sp, #6]
    596a:	4549      	cmp	r1, r9
    596c:	f103 0204 	add.w	r2, r3, #4
    5970:	d003      	beq.n	597a <bootutil_tlv_iter_next+0x78>
    5972:	f8bd c004 	ldrh.w	ip, [sp, #4]
    5976:	458c      	cmp	ip, r1
    5978:	d10b      	bne.n	5992 <bootutil_tlv_iter_next+0x90>
            if (type != NULL) {
    597a:	b116      	cbz	r6, 5982 <bootutil_tlv_iter_next+0x80>
                *type = tlv.it_type;
    597c:	f8bd 1004 	ldrh.w	r1, [sp, #4]
    5980:	8031      	strh	r1, [r6, #0]
            *off = it->tlv_off + sizeof(tlv);
    5982:	3504      	adds	r5, #4
    5984:	603d      	str	r5, [r7, #0]
            *len = tlv.it_len;
    5986:	f8a8 3000 	strh.w	r3, [r8]
            it->tlv_off += sizeof(tlv) + tlv.it_len;
    598a:	6923      	ldr	r3, [r4, #16]
    598c:	4413      	add	r3, r2
    598e:	6123      	str	r3, [r4, #16]
            return 0;
    5990:	e7c0      	b.n	5914 <bootutil_tlv_iter_next+0x12>
        it->tlv_off += sizeof(tlv) + tlv.it_len;
    5992:	4415      	add	r5, r2
    5994:	6125      	str	r5, [r4, #16]
    5996:	e7c8      	b.n	592a <bootutil_tlv_iter_next+0x28>

00005998 <boot_fih_memequal>:
    return memcmp(s1, s2, n);
    5998:	f000 be41 	b.w	661e <memcmp>

0000599c <boot_trailer_sz>:
    return BOOT_STATUS_MAX_ENTRIES * boot_status_entry_sz(min_write_sz);
    599c:	f44f 73c0 	mov.w	r3, #384	; 0x180
    59a0:	4358      	muls	r0, r3
}
    59a2:	3030      	adds	r0, #48	; 0x30
    59a4:	4770      	bx	lr

000059a6 <boot_status_entries>:
    if (flash_area_get_id(fap) == FLASH_AREA_IMAGE_PRIMARY(image_index) ||
    59a6:	780b      	ldrb	r3, [r1, #0]
    59a8:	2b02      	cmp	r3, #2
    59aa:	d006      	beq.n	59ba <boot_status_entries+0x14>
    59ac:	2b05      	cmp	r3, #5
    return -1;
    59ae:	bf0c      	ite	eq
    59b0:	f44f 70c0 	moveq.w	r0, #384	; 0x180
    59b4:	f04f 30ff 	movne.w	r0, #4294967295
    59b8:	4770      	bx	lr
        return BOOT_STATUS_STATE_COUNT * BOOT_STATUS_MAX_ENTRIES;
    59ba:	f44f 70c0 	mov.w	r0, #384	; 0x180
}
    59be:	4770      	bx	lr

000059c0 <boot_status_off>:
{
    59c0:	b510      	push	{r4, lr}
    59c2:	4604      	mov	r4, r0
    elem_sz = flash_area_align(fap);
    59c4:	f000 fb52 	bl	606c <flash_area_align>
    return flash_area_get_size(fap) - off_from_end;
    59c8:	68a2      	ldr	r2, [r4, #8]
    return BOOT_STATUS_MAX_ENTRIES * boot_status_entry_sz(min_write_sz);
    59ca:	b2c3      	uxtb	r3, r0
    return flash_area_get_size(fap) - off_from_end;
    59cc:	3a30      	subs	r2, #48	; 0x30
}
    59ce:	f44f 70c0 	mov.w	r0, #384	; 0x180
    59d2:	fb00 2013 	mls	r0, r0, r3, r2
    59d6:	bd10      	pop	{r4, pc}

000059d8 <boot_write_copy_done>:
    return boot_image_ok_off(fap) - BOOT_MAX_ALIGN;
    59d8:	6881      	ldr	r1, [r0, #8]

    off = boot_copy_done_off(fap);
    BOOT_LOG_DBG("writing copy_done; fa_id=%d off=0x%lx (0x%lx)",
                 flash_area_get_id(fap), (unsigned long)off,
                 (unsigned long)(flash_area_get_off(fap) + off));
    return boot_write_trailer_flag(fap, off, BOOT_FLAG_SET);
    59da:	2201      	movs	r2, #1
    59dc:	3920      	subs	r1, #32
    59de:	f001 b9e6 	b.w	6dae <boot_write_trailer_flag>

000059e2 <boot_write_swap_size>:
}

int
boot_write_swap_size(const struct flash_area *fap, uint32_t swap_size)
{
    59e2:	b513      	push	{r0, r1, r4, lr}
    59e4:	4604      	mov	r4, r0
    59e6:	9101      	str	r1, [sp, #4]
    return boot_swap_info_off(fap) - BOOT_MAX_ALIGN;
    59e8:	f001 f97e 	bl	6ce8 <boot_swap_info_off>

    off = boot_swap_size_off(fap);
    BOOT_LOG_DBG("writing swap_size; fa_id=%d off=0x%lx (0x%lx)",
                 flash_area_get_id(fap), (unsigned long)off,
                 (unsigned long)flash_area_get_off(fap) + off);
    return boot_write_trailer(fap, off, (const uint8_t *) &swap_size, 4);
    59ec:	2304      	movs	r3, #4
    59ee:	f1a0 0108 	sub.w	r1, r0, #8
    59f2:	eb0d 0203 	add.w	r2, sp, r3
    59f6:	4620      	mov	r0, r4
    59f8:	f001 f9aa 	bl	6d50 <boot_write_trailer>
}
    59fc:	b002      	add	sp, #8
    59fe:	bd10      	pop	{r4, pc}

00005a00 <boot_read_image_size>:
{
    5a00:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
    5a02:	4605      	mov	r5, r0
    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
    5a04:	2000      	movs	r0, #0
{
    5a06:	460c      	mov	r4, r1
    5a08:	4617      	mov	r7, r2
    area_id = flash_area_id_from_multi_image_slot(BOOT_CURR_IMG(state), slot);
    5a0a:	f7ff ff23 	bl	5854 <flash_area_id_from_multi_image_slot>
    rc = flash_area_open(area_id, &fap);
    5a0e:	4669      	mov	r1, sp
    5a10:	b2c0      	uxtb	r0, r0
    5a12:	f7fc f969 	bl	1ce8 <flash_area_open>
    if (rc != 0) {
    5a16:	b130      	cbz	r0, 5a26 <boot_read_image_size+0x26>
        rc = BOOT_EFLASH;
    5a18:	2501      	movs	r5, #1
    flash_area_close(fap);
    5a1a:	9800      	ldr	r0, [sp, #0]
    5a1c:	f000 faa7 	bl	5f6e <flash_area_close>
}
    5a20:	4628      	mov	r0, r5
    5a22:	b003      	add	sp, #12
    5a24:	bdf0      	pop	{r4, r5, r6, r7, pc}
    off = BOOT_TLV_OFF(boot_img_hdr(state, slot));
    5a26:	212c      	movs	r1, #44	; 0x2c
    5a28:	fb01 5404 	mla	r4, r1, r4, r5
    if (flash_area_read(fap, off, &info, sizeof(info))) {
    5a2c:	9800      	ldr	r0, [sp, #0]
    off = BOOT_TLV_OFF(boot_img_hdr(state, slot));
    5a2e:	8921      	ldrh	r1, [r4, #8]
    5a30:	68e3      	ldr	r3, [r4, #12]
    5a32:	18ce      	adds	r6, r1, r3
    if (flash_area_read(fap, off, &info, sizeof(info))) {
    5a34:	2304      	movs	r3, #4
    5a36:	eb0d 0203 	add.w	r2, sp, r3
    5a3a:	4631      	mov	r1, r6
    5a3c:	f000 fa98 	bl	5f70 <flash_area_read>
    5a40:	4605      	mov	r5, r0
    5a42:	2800      	cmp	r0, #0
    5a44:	d1e8      	bne.n	5a18 <boot_read_image_size+0x18>
    if (info.it_magic == IMAGE_TLV_PROT_INFO_MAGIC) {
    5a46:	f8bd 2004 	ldrh.w	r2, [sp, #4]
    protect_tlv_size = boot_img_hdr(state, slot)->ih_protect_tlv_size;
    5a4a:	8964      	ldrh	r4, [r4, #10]
    if (info.it_magic == IMAGE_TLV_PROT_INFO_MAGIC) {
    5a4c:	f646 1308 	movw	r3, #26888	; 0x6908
    5a50:	429a      	cmp	r2, r3
    5a52:	d11a      	bne.n	5a8a <boot_read_image_size+0x8a>
        if (protect_tlv_size != info.it_tlv_tot) {
    5a54:	f8bd 3006 	ldrh.w	r3, [sp, #6]
    5a58:	429c      	cmp	r4, r3
    5a5a:	d001      	beq.n	5a60 <boot_read_image_size+0x60>
            rc = BOOT_EBADIMAGE;
    5a5c:	2503      	movs	r5, #3
    5a5e:	e7dc      	b.n	5a1a <boot_read_image_size+0x1a>
        if (flash_area_read(fap, off + info.it_tlv_tot, &info, sizeof(info))) {
    5a60:	2304      	movs	r3, #4
    5a62:	9800      	ldr	r0, [sp, #0]
    5a64:	eb0d 0203 	add.w	r2, sp, r3
    5a68:	19a1      	adds	r1, r4, r6
    5a6a:	f000 fa81 	bl	5f70 <flash_area_read>
    5a6e:	2800      	cmp	r0, #0
    5a70:	d1d2      	bne.n	5a18 <boot_read_image_size+0x18>
    if (info.it_magic != IMAGE_TLV_INFO_MAGIC) {
    5a72:	f8bd 2004 	ldrh.w	r2, [sp, #4]
    5a76:	f646 1307 	movw	r3, #26887	; 0x6907
    5a7a:	429a      	cmp	r2, r3
    5a7c:	d1ee      	bne.n	5a5c <boot_read_image_size+0x5c>
    *size = off + protect_tlv_size + info.it_tlv_tot;
    5a7e:	f8bd 1006 	ldrh.w	r1, [sp, #6]
    5a82:	4421      	add	r1, r4
    5a84:	4431      	add	r1, r6
    5a86:	6039      	str	r1, [r7, #0]
    rc = 0;
    5a88:	e7c7      	b.n	5a1a <boot_read_image_size+0x1a>
    } else if (protect_tlv_size != 0) {
    5a8a:	2c00      	cmp	r4, #0
    5a8c:	d0f1      	beq.n	5a72 <boot_read_image_size+0x72>
    5a8e:	e7e5      	b.n	5a5c <boot_read_image_size+0x5c>

00005a90 <boot_read_image_headers>:
{
    5a90:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
            rc = boot_read_image_header(state, i, boot_img_hdr(state, i), bs);
    5a92:	4613      	mov	r3, r2
{
    5a94:	460f      	mov	r7, r1
    5a96:	4616      	mov	r6, r2
            rc = boot_read_image_header(state, i, boot_img_hdr(state, i), bs);
    5a98:	2100      	movs	r1, #0
    5a9a:	4602      	mov	r2, r0
{
    5a9c:	4605      	mov	r5, r0
            rc = boot_read_image_header(state, i, boot_img_hdr(state, i), bs);
    5a9e:	f7fb f9f1 	bl	e84 <boot_read_image_header>
        if (rc != 0) {
    5aa2:	4604      	mov	r4, r0
    5aa4:	b950      	cbnz	r0, 5abc <boot_read_image_headers+0x2c>
            rc = boot_read_image_header(state, i, boot_img_hdr(state, i), bs);
    5aa6:	4633      	mov	r3, r6
    5aa8:	f105 022c 	add.w	r2, r5, #44	; 0x2c
    5aac:	2101      	movs	r1, #1
    5aae:	4628      	mov	r0, r5
    5ab0:	f7fb f9e8 	bl	e84 <boot_read_image_header>
        if (rc != 0) {
    5ab4:	b110      	cbz	r0, 5abc <boot_read_image_headers+0x2c>
            if (i > 0 && !require_all) {
    5ab6:	2f00      	cmp	r7, #0
    5ab8:	bf18      	it	ne
    5aba:	4604      	movne	r4, r0
}
    5abc:	4620      	mov	r0, r4
    5abe:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

00005ac0 <boot_read_sectors>:
{
    5ac0:	b537      	push	{r0, r1, r2, r4, r5, lr}
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    5ac2:	6a42      	ldr	r2, [r0, #36]	; 0x24
{
    5ac4:	4604      	mov	r4, r0
    uint32_t num_sectors = BOOT_MAX_IMG_SECTORS;
    5ac6:	2580      	movs	r5, #128	; 0x80
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    5ac8:	a901      	add	r1, sp, #4
    5aca:	2002      	movs	r0, #2
    uint32_t num_sectors = BOOT_MAX_IMG_SECTORS;
    5acc:	9501      	str	r5, [sp, #4]
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    5ace:	f7fc f929 	bl	1d24 <flash_area_get_sectors>
    if (rc != 0) {
    5ad2:	b958      	cbnz	r0, 5aec <boot_read_sectors+0x2c>
    *out_num_sectors = num_sectors;
    5ad4:	9b01      	ldr	r3, [sp, #4]
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    5ad6:	6d22      	ldr	r2, [r4, #80]	; 0x50
    *out_num_sectors = num_sectors;
    5ad8:	62a3      	str	r3, [r4, #40]	; 0x28
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    5ada:	a901      	add	r1, sp, #4
    5adc:	2005      	movs	r0, #5
    uint32_t num_sectors = BOOT_MAX_IMG_SECTORS;
    5ade:	9501      	str	r5, [sp, #4]
    rc = flash_area_get_sectors(flash_area, &num_sectors, out_sectors);
    5ae0:	f7fc f920 	bl	1d24 <flash_area_get_sectors>
    if (rc != 0) {
    5ae4:	4605      	mov	r5, r0
    5ae6:	b128      	cbz	r0, 5af4 <boot_read_sectors+0x34>
        return BOOT_EFLASH_SEC;
    5ae8:	2509      	movs	r5, #9
    5aea:	e000      	b.n	5aee <boot_read_sectors+0x2e>
        return BOOT_EFLASH;
    5aec:	2501      	movs	r5, #1
}
    5aee:	4628      	mov	r0, r5
    5af0:	b003      	add	sp, #12
    5af2:	bd30      	pop	{r4, r5, pc}
    *out_num_sectors = num_sectors;
    5af4:	9b01      	ldr	r3, [sp, #4]
    elem_sz = flash_area_align(BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT));
    5af6:	6a20      	ldr	r0, [r4, #32]
    *out_num_sectors = num_sectors;
    5af8:	6563      	str	r3, [r4, #84]	; 0x54
    elem_sz = flash_area_align(BOOT_IMG_AREA(state, BOOT_PRIMARY_SLOT));
    5afa:	f000 fab7 	bl	606c <flash_area_align>
    BOOT_WRITE_SZ(state) = boot_write_sz(state);
    5afe:	65e0      	str	r0, [r4, #92]	; 0x5c
    return 0;
    5b00:	e7f5      	b.n	5aee <boot_read_sectors+0x2e>

00005b02 <boot_status_reset>:
    bs->idx = BOOT_STATUS_IDX_0;
    5b02:	2301      	movs	r3, #1
    5b04:	6003      	str	r3, [r0, #0]
    bs->state = BOOT_STATUS_STATE_0;
    5b06:	f103 2301 	add.w	r3, r3, #16777472	; 0x1000100
    5b0a:	6043      	str	r3, [r0, #4]
    bs->swap_size = 0;
    5b0c:	2300      	movs	r3, #0
    bs->source = 0;
    5b0e:	e9c0 3302 	strd	r3, r3, [r0, #8]
}
    5b12:	4770      	bx	lr

00005b14 <boot_status_is_reset>:
            bs->idx == BOOT_STATUS_IDX_0 &&
    5b14:	7943      	ldrb	r3, [r0, #5]
    5b16:	2b01      	cmp	r3, #1
    5b18:	d107      	bne.n	5b2a <boot_status_is_reset+0x16>
    return (bs->op == BOOT_STATUS_OP_MOVE &&
    5b1a:	6803      	ldr	r3, [r0, #0]
    5b1c:	2b01      	cmp	r3, #1
    5b1e:	d104      	bne.n	5b2a <boot_status_is_reset+0x16>
            bs->idx == BOOT_STATUS_IDX_0 &&
    5b20:	7900      	ldrb	r0, [r0, #4]
    5b22:	1e43      	subs	r3, r0, #1
    5b24:	4258      	negs	r0, r3
    5b26:	4158      	adcs	r0, r3
    5b28:	4770      	bx	lr
    5b2a:	2000      	movs	r0, #0
}
    5b2c:	4770      	bx	lr

00005b2e <boot_write_status>:
{
    5b2e:	b57f      	push	{r0, r1, r2, r3, r4, r5, r6, lr}
    5b30:	4606      	mov	r6, r0
    5b32:	460d      	mov	r5, r1
    rc = flash_area_open(area_id, &fap);
    5b34:	2002      	movs	r0, #2
    5b36:	a901      	add	r1, sp, #4
    5b38:	f7fc f8d6 	bl	1ce8 <flash_area_open>
    if (rc != 0) {
    5b3c:	bb38      	cbnz	r0, 5b8e <boot_write_status+0x60>
    off = boot_status_off(fap) +
    5b3e:	9801      	ldr	r0, [sp, #4]
    5b40:	f7ff ff3e 	bl	59c0 <boot_status_off>
          boot_status_internal_off(bs, BOOT_WRITE_SZ(state));
    5b44:	6df1      	ldr	r1, [r6, #92]	; 0x5c
    off = boot_status_off(fap) +
    5b46:	4604      	mov	r4, r0
          boot_status_internal_off(bs, BOOT_WRITE_SZ(state));
    5b48:	4628      	mov	r0, r5
    5b4a:	f000 f8e5 	bl	5d18 <boot_status_internal_off>
    off = boot_status_off(fap) +
    5b4e:	4404      	add	r4, r0
    align = flash_area_align(fap);
    5b50:	9801      	ldr	r0, [sp, #4]
    5b52:	f000 fa8b 	bl	606c <flash_area_align>
    5b56:	4606      	mov	r6, r0
    erased_val = flash_area_erased_val(fap);
    5b58:	9801      	ldr	r0, [sp, #4]
    5b5a:	f000 fa90 	bl	607e <flash_area_erased_val>
    memset(buf, erased_val, BOOT_MAX_ALIGN);
    5b5e:	2208      	movs	r2, #8
    erased_val = flash_area_erased_val(fap);
    5b60:	4601      	mov	r1, r0
    memset(buf, erased_val, BOOT_MAX_ALIGN);
    5b62:	eb0d 0002 	add.w	r0, sp, r2
    5b66:	f000 fd8c 	bl	6682 <memset>
    buf[0] = bs->state;
    5b6a:	792b      	ldrb	r3, [r5, #4]
    5b6c:	f88d 3008 	strb.w	r3, [sp, #8]
    rc = flash_area_write(fap, off, buf, align);
    5b70:	4621      	mov	r1, r4
    5b72:	9801      	ldr	r0, [sp, #4]
    5b74:	b2f3      	uxtb	r3, r6
    5b76:	aa02      	add	r2, sp, #8
    5b78:	f000 fa16 	bl	5fa8 <flash_area_write>
    if (rc != 0) {
    5b7c:	1e04      	subs	r4, r0, #0
    flash_area_close(fap);
    5b7e:	9801      	ldr	r0, [sp, #4]
    if (rc != 0) {
    5b80:	bf18      	it	ne
    5b82:	2401      	movne	r4, #1
    flash_area_close(fap);
    5b84:	f000 f9f3 	bl	5f6e <flash_area_close>
}
    5b88:	4620      	mov	r0, r4
    5b8a:	b004      	add	sp, #16
    5b8c:	bd70      	pop	{r4, r5, r6, pc}
        return BOOT_EFLASH;
    5b8e:	2401      	movs	r4, #1
    5b90:	e7fa      	b.n	5b88 <boot_write_status+0x5a>

00005b92 <boot_erase_region>:
    return flash_area_erase(fap, off, sz);
    5b92:	f000 ba3c 	b.w	600e <flash_area_erase>

00005b96 <swap_erase_trailer_sectors>:

#if defined(MCUBOOT_SWAP_USING_SCRATCH) || defined(MCUBOOT_SWAP_USING_MOVE)
int
swap_erase_trailer_sectors(const struct boot_loader_state *state,
                           const struct flash_area *fap)
{
    5b96:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    5b9a:	460e      	mov	r6, r1
    int rc;

    BOOT_LOG_DBG("erasing trailer; fa_id=%d", flash_area_get_id(fap));

    image_index = BOOT_CURR_IMG(state);
    fa_id_primary = flash_area_id_from_multi_image_slot(image_index,
    5b9c:	2100      	movs	r1, #0
{
    5b9e:	4607      	mov	r7, r0
    fa_id_primary = flash_area_id_from_multi_image_slot(image_index,
    5ba0:	4608      	mov	r0, r1
    5ba2:	f7ff fe57 	bl	5854 <flash_area_id_from_multi_image_slot>
            BOOT_PRIMARY_SLOT);
    fa_id_secondary = flash_area_id_from_multi_image_slot(image_index,
    5ba6:	2101      	movs	r1, #1
    fa_id_primary = flash_area_id_from_multi_image_slot(image_index,
    5ba8:	4604      	mov	r4, r0
    fa_id_secondary = flash_area_id_from_multi_image_slot(image_index,
    5baa:	2000      	movs	r0, #0
    5bac:	f7ff fe52 	bl	5854 <flash_area_id_from_multi_image_slot>
            BOOT_SECONDARY_SLOT);

    if (flash_area_get_id(fap) == fa_id_primary) {
    5bb0:	7833      	ldrb	r3, [r6, #0]
    5bb2:	429c      	cmp	r4, r3
    5bb4:	d021      	beq.n	5bfa <swap_erase_trailer_sectors+0x64>
        slot = BOOT_PRIMARY_SLOT;
    } else if (flash_area_get_id(fap) == fa_id_secondary) {
    5bb6:	4298      	cmp	r0, r3
    5bb8:	d121      	bne.n	5bfe <swap_erase_trailer_sectors+0x68>
        slot = BOOT_SECONDARY_SLOT;
    5bba:	2401      	movs	r4, #1
    return BOOT_IMG(state, slot).num_sectors;
    5bbc:	232c      	movs	r3, #44	; 0x2c
    5bbe:	fb03 7404 	mla	r4, r3, r4, r7
        return BOOT_EFLASH;
    }

    /* delete starting from last sector and moving to beginning */
    sector = boot_img_num_sectors(state, slot) - 1;
    trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state));
    5bc2:	6df8      	ldr	r0, [r7, #92]	; 0x5c
    sector = boot_img_num_sectors(state, slot) - 1;
    5bc4:	6aa5      	ldr	r5, [r4, #40]	; 0x28
    trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state));
    5bc6:	f7ff fee9 	bl	599c <boot_trailer_sz>
    sector = boot_img_num_sectors(state, slot) - 1;
    5bca:	3d01      	subs	r5, #1
    trailer_sz = boot_trailer_sz(BOOT_WRITE_SZ(state));
    5bcc:	4607      	mov	r7, r0
    total_sz = 0;
    5bce:	f04f 0800 	mov.w	r8, #0
    return flash_sector_get_size(&BOOT_IMG(state, slot).sectors[sector]);
    5bd2:	6a63      	ldr	r3, [r4, #36]	; 0x24
    5bd4:	eb03 02c5 	add.w	r2, r3, r5, lsl #3
    return flash_sector_get_off(&BOOT_IMG(state, slot).sectors[sector]) -
    5bd8:	f853 1035 	ldr.w	r1, [r3, r5, lsl #3]
    return flash_sector_get_size(&BOOT_IMG(state, slot).sectors[sector]);
    5bdc:	f8d2 9004 	ldr.w	r9, [r2, #4]
    return flash_sector_get_off(&BOOT_IMG(state, slot).sectors[sector]) -
    5be0:	681b      	ldr	r3, [r3, #0]
    do {
        sz = boot_img_sector_size(state, slot, sector);
        off = boot_img_sector_off(state, slot, sector);
        rc = boot_erase_region(fap, off, sz);
    5be2:	464a      	mov	r2, r9
    5be4:	1ac9      	subs	r1, r1, r3
    5be6:	4630      	mov	r0, r6
        assert(rc == 0);

        sector--;
        total_sz += sz;
    5be8:	44c8      	add	r8, r9
        rc = boot_erase_region(fap, off, sz);
    5bea:	f7ff ffd2 	bl	5b92 <boot_erase_region>
    } while (total_sz < trailer_sz);
    5bee:	45b8      	cmp	r8, r7
        sector--;
    5bf0:	f105 35ff 	add.w	r5, r5, #4294967295
    } while (total_sz < trailer_sz);
    5bf4:	d3ed      	bcc.n	5bd2 <swap_erase_trailer_sectors+0x3c>

    return rc;
}
    5bf6:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
        slot = BOOT_PRIMARY_SLOT;
    5bfa:	2400      	movs	r4, #0
    5bfc:	e7de      	b.n	5bbc <swap_erase_trailer_sectors+0x26>
        return BOOT_EFLASH;
    5bfe:	2001      	movs	r0, #1
    5c00:	e7f9      	b.n	5bf6 <swap_erase_trailer_sectors+0x60>

00005c02 <swap_status_init>:

int
swap_status_init(const struct boot_loader_state *state,
                 const struct flash_area *fap,
                 const struct boot_status *bs)
{
    5c02:	b537      	push	{r0, r1, r2, r4, r5, lr}
    5c04:	4615      	mov	r5, r2
    5c06:	460c      	mov	r4, r1

    image_index = BOOT_CURR_IMG(state);

    BOOT_LOG_DBG("initializing status; fa_id=%d", flash_area_get_id(fap));

    rc = boot_read_swap_state_by_id(FLASH_AREA_IMAGE_SECONDARY(image_index),
    5c08:	2005      	movs	r0, #5
    5c0a:	4669      	mov	r1, sp
    5c0c:	f001 f8e2 	bl	6dd4 <boot_read_swap_state_by_id>
            &swap_state);
    assert(rc == 0);

    if (bs->swap_type != BOOT_SWAP_TYPE_NONE) {
    5c10:	79e9      	ldrb	r1, [r5, #7]
    5c12:	2901      	cmp	r1, #1
    5c14:	d003      	beq.n	5c1e <swap_status_init+0x1c>
        rc = boot_write_swap_info(fap, bs->swap_type, image_index);
    5c16:	2200      	movs	r2, #0
    5c18:	4620      	mov	r0, r4
    5c1a:	f001 f8ef 	bl	6dfc <boot_write_swap_info>
        assert(rc == 0);
    }

    if (swap_state.image_ok == BOOT_FLAG_SET) {
    5c1e:	f89d 3003 	ldrb.w	r3, [sp, #3]
    5c22:	2b01      	cmp	r3, #1
    5c24:	d102      	bne.n	5c2c <swap_status_init+0x2a>
        rc = boot_write_image_ok(fap);
    5c26:	4620      	mov	r0, r4
    5c28:	f001 f8cb 	bl	6dc2 <boot_write_image_ok>
        assert(rc == 0);
    }

    rc = boot_write_swap_size(fap, bs->swap_size);
    5c2c:	68a9      	ldr	r1, [r5, #8]
    5c2e:	4620      	mov	r0, r4
    5c30:	f7ff fed7 	bl	59e2 <boot_write_swap_size>

    rc = boot_write_enc_key(fap, 1, bs);
    assert(rc == 0);
#endif

    rc = boot_write_magic(fap);
    5c34:	4620      	mov	r0, r4
    5c36:	f7fe f9d5 	bl	3fe4 <boot_write_magic>
    assert(rc == 0);

    return 0;
}
    5c3a:	2000      	movs	r0, #0
    5c3c:	b003      	add	sp, #12
    5c3e:	bd30      	pop	{r4, r5, pc}

00005c40 <swap_read_status>:

int
swap_read_status(struct boot_loader_state *state, struct boot_status *bs)
{
    5c40:	b573      	push	{r0, r1, r4, r5, r6, lr}
    5c42:	460d      	mov	r5, r1
    5c44:	4606      	mov	r6, r0
    uint32_t off;
    uint8_t swap_info;
    int area_id;
    int rc;

    bs->source = swap_status_source(state);
    5c46:	f7fb fa05 	bl	1054 <swap_status_source>
    5c4a:	4604      	mov	r4, r0
    5c4c:	60e8      	str	r0, [r5, #12]
    switch (bs->source) {
    5c4e:	b350      	cbz	r0, 5ca6 <swap_read_status+0x66>
    5c50:	2802      	cmp	r0, #2
    5c52:	d12d      	bne.n	5cb0 <swap_read_status+0x70>
    default:
        assert(0);
        return BOOT_EBADARGS;
    }

    rc = flash_area_open(area_id, &fap);
    5c54:	a901      	add	r1, sp, #4
    5c56:	f7fc f847 	bl	1ce8 <flash_area_open>
    if (rc != 0) {
    5c5a:	bb58      	cbnz	r0, 5cb4 <swap_read_status+0x74>
        return BOOT_EFLASH;
    }

    rc = swap_read_status_bytes(fap, state, bs);
    5c5c:	9801      	ldr	r0, [sp, #4]
    5c5e:	462a      	mov	r2, r5
    5c60:	4631      	mov	r1, r6
    5c62:	f7fb f95d 	bl	f20 <swap_read_status_bytes>
    if (rc == 0) {
    5c66:	4604      	mov	r4, r0
    5c68:	b9d0      	cbnz	r0, 5ca0 <swap_read_status+0x60>
        off = boot_swap_info_off(fap);
    5c6a:	9801      	ldr	r0, [sp, #4]
    5c6c:	f001 f83c 	bl	6ce8 <boot_swap_info_off>
        rc = flash_area_read(fap, off, &swap_info, sizeof swap_info);
    5c70:	2301      	movs	r3, #1
        off = boot_swap_info_off(fap);
    5c72:	4601      	mov	r1, r0
        rc = flash_area_read(fap, off, &swap_info, sizeof swap_info);
    5c74:	f10d 0203 	add.w	r2, sp, #3
    5c78:	9801      	ldr	r0, [sp, #4]
    5c7a:	f000 f979 	bl	5f70 <flash_area_read>
        if (rc != 0) {
    5c7e:	4604      	mov	r4, r0
    5c80:	b9a0      	cbnz	r0, 5cac <swap_read_status+0x6c>
            rc = BOOT_EFLASH;
            goto done;
        }

        if (bootutil_buffer_is_erased(fap, &swap_info, sizeof swap_info)) {
    5c82:	9801      	ldr	r0, [sp, #4]
    5c84:	2201      	movs	r2, #1
    5c86:	f10d 0103 	add.w	r1, sp, #3
    5c8a:	f001 f83e 	bl	6d0a <bootutil_buffer_is_erased>
    5c8e:	b110      	cbz	r0, 5c96 <swap_read_status+0x56>
            BOOT_SET_SWAP_INFO(swap_info, 0, BOOT_SWAP_TYPE_NONE);
    5c90:	2301      	movs	r3, #1
    5c92:	f88d 3003 	strb.w	r3, [sp, #3]
            rc = 0;
        }

        /* Extract the swap type info */
        bs->swap_type = BOOT_GET_SWAP_TYPE(swap_info);
    5c96:	f89d 3003 	ldrb.w	r3, [sp, #3]
    5c9a:	f003 030f 	and.w	r3, r3, #15
    5c9e:	71eb      	strb	r3, [r5, #7]
    }

done:
    flash_area_close(fap);
    5ca0:	9801      	ldr	r0, [sp, #4]
    5ca2:	f000 f964 	bl	5f6e <flash_area_close>

    return rc;
}
    5ca6:	4620      	mov	r0, r4
    5ca8:	b002      	add	sp, #8
    5caa:	bd70      	pop	{r4, r5, r6, pc}
            rc = BOOT_EFLASH;
    5cac:	2401      	movs	r4, #1
    5cae:	e7f7      	b.n	5ca0 <swap_read_status+0x60>
    switch (bs->source) {
    5cb0:	2407      	movs	r4, #7
    5cb2:	e7f8      	b.n	5ca6 <swap_read_status+0x66>
        return BOOT_EFLASH;
    5cb4:	2401      	movs	r4, #1
    5cb6:	e7f6      	b.n	5ca6 <swap_read_status+0x66>

00005cb8 <swap_set_copy_done>:

int
swap_set_copy_done(uint8_t image_index)
{
    5cb8:	b513      	push	{r0, r1, r4, lr}
    const struct flash_area *fap;
    int rc;

    rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(image_index),
    5cba:	2002      	movs	r0, #2
    5cbc:	a901      	add	r1, sp, #4
    5cbe:	f7fc f813 	bl	1ce8 <flash_area_open>
            &fap);
    if (rc != 0) {
    5cc2:	b948      	cbnz	r0, 5cd8 <swap_set_copy_done+0x20>
        return BOOT_EFLASH;
    }

    rc = boot_write_copy_done(fap);
    5cc4:	9801      	ldr	r0, [sp, #4]
    5cc6:	f7ff fe87 	bl	59d8 <boot_write_copy_done>
    5cca:	4604      	mov	r4, r0
    flash_area_close(fap);
    5ccc:	9801      	ldr	r0, [sp, #4]
    5cce:	f000 f94e 	bl	5f6e <flash_area_close>
    return rc;
}
    5cd2:	4620      	mov	r0, r4
    5cd4:	b002      	add	sp, #8
    5cd6:	bd10      	pop	{r4, pc}
        return BOOT_EFLASH;
    5cd8:	2401      	movs	r4, #1
    5cda:	e7fa      	b.n	5cd2 <swap_set_copy_done+0x1a>

00005cdc <swap_set_image_ok>:

int
swap_set_image_ok(uint8_t image_index)
{
    5cdc:	b51f      	push	{r0, r1, r2, r3, r4, lr}
    const struct flash_area *fap;
    struct boot_swap_state state;
    int rc;

    rc = flash_area_open(FLASH_AREA_IMAGE_PRIMARY(image_index),
    5cde:	2002      	movs	r0, #2
    5ce0:	a901      	add	r1, sp, #4
    5ce2:	f7fc f801 	bl	1ce8 <flash_area_open>
            &fap);
    if (rc != 0) {
    5ce6:	b9a8      	cbnz	r0, 5d14 <swap_set_image_ok+0x38>
        return BOOT_EFLASH;
    }

    rc = boot_read_swap_state(fap, &state);
    5ce8:	9801      	ldr	r0, [sp, #4]
    5cea:	a902      	add	r1, sp, #8
    5cec:	f7fe f988 	bl	4000 <boot_read_swap_state>
    if (rc != 0) {
    5cf0:	4604      	mov	r4, r0
    5cf2:	b968      	cbnz	r0, 5d10 <swap_set_image_ok+0x34>
        rc = BOOT_EFLASH;
        goto out;
    }

    if (state.image_ok == BOOT_FLAG_UNSET) {
    5cf4:	f89d 300b 	ldrb.w	r3, [sp, #11]
    5cf8:	2b03      	cmp	r3, #3
    5cfa:	d103      	bne.n	5d04 <swap_set_image_ok+0x28>
        rc = boot_write_image_ok(fap);
    5cfc:	9801      	ldr	r0, [sp, #4]
    5cfe:	f001 f860 	bl	6dc2 <boot_write_image_ok>
    5d02:	4604      	mov	r4, r0
    }

out:
    flash_area_close(fap);
    5d04:	9801      	ldr	r0, [sp, #4]
    5d06:	f000 f932 	bl	5f6e <flash_area_close>
    return rc;
}
    5d0a:	4620      	mov	r0, r4
    5d0c:	b004      	add	sp, #16
    5d0e:	bd10      	pop	{r4, pc}
        rc = BOOT_EFLASH;
    5d10:	2401      	movs	r4, #1
    5d12:	e7f7      	b.n	5d04 <swap_set_image_ok+0x28>
        return BOOT_EFLASH;
    5d14:	2401      	movs	r4, #1
    5d16:	e7f8      	b.n	5d0a <swap_set_image_ok+0x2e>

00005d18 <boot_status_internal_off>:
{
    5d18:	b530      	push	{r4, r5, lr}
    idx_sz = elem_sz * ((bs->op == BOOT_STATUS_OP_MOVE) ?
    5d1a:	7943      	ldrb	r3, [r0, #5]
           (bs->idx - BOOT_STATUS_IDX_0) * idx_sz +
    5d1c:	6804      	ldr	r4, [r0, #0]
            BOOT_STATUS_MOVE_STATE_COUNT : BOOT_STATUS_SWAP_STATE_COUNT);
    5d1e:	2b01      	cmp	r3, #1
    5d20:	bf08      	it	eq
    5d22:	2201      	moveq	r2, #1
           (bs->state - BOOT_STATUS_STATE_0) * elem_sz;
    5d24:	7903      	ldrb	r3, [r0, #4]
            BOOT_STATUS_MOVE_STATE_COUNT : BOOT_STATUS_SWAP_STATE_COUNT);
    5d26:	bf18      	it	ne
    5d28:	2202      	movne	r2, #2
    idx_sz = elem_sz * ((bs->op == BOOT_STATUS_OP_MOVE) ?
    5d2a:	fb01 f202 	mul.w	r2, r1, r2
           (bs->idx - BOOT_STATUS_IDX_0) * idx_sz +
    5d2e:	f104 34ff 	add.w	r4, r4, #4294967295
           (bs->state - BOOT_STATUS_STATE_0) * elem_sz;
    5d32:	f103 33ff 	add.w	r3, r3, #4294967295
           (bs->idx - BOOT_STATUS_IDX_0) * idx_sz +
    5d36:	fb02 f204 	mul.w	r2, r2, r4
               0 : (BOOT_MAX_IMG_SECTORS * BOOT_STATUS_MOVE_STATE_COUNT * elem_sz)) +
    5d3a:	bf14      	ite	ne
    5d3c:	01cd      	lslne	r5, r1, #7
    5d3e:	2500      	moveq	r5, #0
           (bs->idx - BOOT_STATUS_IDX_0) * idx_sz +
    5d40:	fb01 2103 	mla	r1, r1, r3, r2
}
    5d44:	1948      	adds	r0, r1, r5
    5d46:	bd30      	pop	{r4, r5, pc}

00005d48 <crc16>:

#include <sys/crc.h>

uint16_t crc16(const uint8_t *src, size_t len, uint16_t polynomial,
	    uint16_t initial_value, bool pad)
{
    5d48:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
	uint16_t crc = initial_value;
	size_t padding = pad ? sizeof(crc) : 0;
    5d4c:	f89d 4018 	ldrb.w	r4, [sp, #24]
    5d50:	2c00      	cmp	r4, #0
    5d52:	bf14      	ite	ne
    5d54:	2402      	movne	r4, #2
    5d56:	2400      	moveq	r4, #0
	size_t i, b;

	/* src length + padding (if required) */
	for (i = 0; i < len + padding; i++) {
    5d58:	4605      	mov	r5, r0
    5d5a:	1867      	adds	r7, r4, r1
	uint16_t crc = initial_value;
    5d5c:	4618      	mov	r0, r3

			crc = (crc << 1U);

			/* choose input bytes or implicit trailing zeros */
			if (i < len) {
				crc |= !!(src[i] & (0x80U >> b));
    5d5e:	f04f 0c80 	mov.w	ip, #128	; 0x80
	for (i = 0; i < len + padding; i++) {
    5d62:	2300      	movs	r3, #0
    5d64:	429f      	cmp	r7, r3
    5d66:	d81a      	bhi.n	5d9e <crc16+0x56>
			}
		}
	}

	return crc;
}
    5d68:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
    5d6c:	4620      	mov	r0, r4
			crc = (crc << 1U);
    5d6e:	0044      	lsls	r4, r0, #1
			if (i < len) {
    5d70:	428b      	cmp	r3, r1
			crc = (crc << 1U);
    5d72:	b2a4      	uxth	r4, r4
			if (i < len) {
    5d74:	d208      	bcs.n	5d88 <crc16+0x40>
				crc |= !!(src[i] & (0x80U >> b));
    5d76:	f895 8000 	ldrb.w	r8, [r5]
    5d7a:	fa2c fe06 	lsr.w	lr, ip, r6
    5d7e:	ea18 0f0e 	tst.w	r8, lr
    5d82:	bf18      	it	ne
    5d84:	f044 0401 	orrne.w	r4, r4, #1
			if (divide != 0U) {
    5d88:	0400      	lsls	r0, r0, #16
		for (b = 0; b < 8; b++) {
    5d8a:	f106 0601 	add.w	r6, r6, #1
				crc = crc ^ polynomial;
    5d8e:	bf48      	it	mi
    5d90:	4054      	eormi	r4, r2
		for (b = 0; b < 8; b++) {
    5d92:	2e08      	cmp	r6, #8
    5d94:	d1ea      	bne.n	5d6c <crc16+0x24>
	for (i = 0; i < len + padding; i++) {
    5d96:	3301      	adds	r3, #1
    5d98:	3501      	adds	r5, #1
    5d9a:	4620      	mov	r0, r4
    5d9c:	e7e2      	b.n	5d64 <crc16+0x1c>
		for (b = 0; b < 8; b++) {
    5d9e:	2600      	movs	r6, #0
    5da0:	e7e5      	b.n	5d6e <crc16+0x26>

00005da2 <sys_notify_validate>:

int sys_notify_validate(struct sys_notify *notify)
{
	int rv = 0;

	if (notify == NULL) {
    5da2:	4603      	mov	r3, r0
    5da4:	b158      	cbz	r0, 5dbe <sys_notify_validate+0x1c>
	uint32_t method = notify->flags >> SYS_NOTIFY_METHOD_POS;
    5da6:	6842      	ldr	r2, [r0, #4]
	return method & SYS_NOTIFY_METHOD_MASK;
    5da8:	f002 0203 	and.w	r2, r2, #3
		return -EINVAL;
	}

	/* Validate configuration based on mode */
	switch (sys_notify_get_method(notify)) {
    5dac:	2a01      	cmp	r2, #1
    5dae:	d003      	beq.n	5db8 <sys_notify_validate+0x16>
    5db0:	2a03      	cmp	r2, #3
    5db2:	d104      	bne.n	5dbe <sys_notify_validate+0x1c>
	case SYS_NOTIFY_METHOD_SPINWAIT:
		break;
	case SYS_NOTIFY_METHOD_CALLBACK:
		if (notify->method.callback == NULL) {
    5db4:	6802      	ldr	r2, [r0, #0]
    5db6:	b112      	cbz	r2, 5dbe <sys_notify_validate+0x1c>
		break;
	}

	/* Clear the result here instead of in all callers. */
	if (rv == 0) {
		notify->result = 0;
    5db8:	2000      	movs	r0, #0
    5dba:	6098      	str	r0, [r3, #8]
    5dbc:	4770      	bx	lr
		return -EINVAL;
    5dbe:	f06f 0015 	mvn.w	r0, #21
	}

	return rv;
}
    5dc2:	4770      	bx	lr

00005dc4 <sys_notify_finalize>:
	uint32_t method = notify->flags >> SYS_NOTIFY_METHOD_POS;
    5dc4:	6842      	ldr	r2, [r0, #4]
	uint32_t method = sys_notify_get_method(notify);

	/* Store the result and capture secondary notification
	 * information.
	 */
	notify->result = res;
    5dc6:	6081      	str	r1, [r0, #8]
	return method & SYS_NOTIFY_METHOD_MASK;
    5dc8:	f002 0203 	and.w	r2, r2, #3
	switch (method) {
    5dcc:	2a03      	cmp	r2, #3
    5dce:	f04f 0200 	mov.w	r2, #0
{
    5dd2:	4603      	mov	r3, r0
	case SYS_NOTIFY_METHOD_SPINWAIT:
		break;
	case SYS_NOTIFY_METHOD_CALLBACK:
		rv = notify->method.callback;
    5dd4:	bf0c      	ite	eq
    5dd6:	6800      	ldreq	r0, [r0, #0]
	sys_notify_generic_callback rv = NULL;
    5dd8:	4610      	movne	r0, r2
	/* Mark completion by clearing the flags field to the
	 * completed state, releasing any spin-waiters, then complete
	 * secondary notification.
	 */
	compiler_barrier();
	notify->flags = SYS_NOTIFY_METHOD_COMPLETED;
    5dda:	605a      	str	r2, [r3, #4]
	if (IS_ENABLED(CONFIG_POLL) && (sig != NULL)) {
		k_poll_signal_raise(sig, res);
	}

	return rv;
}
    5ddc:	4770      	bx	lr

00005dde <arch_printk_char_out>:
}
    5dde:	2000      	movs	r0, #0
    5de0:	4770      	bx	lr

00005de2 <printk>:
 *
 * @return N/A
 */

void printk(const char *fmt, ...)
{
    5de2:	b40f      	push	{r0, r1, r2, r3}
    5de4:	b507      	push	{r0, r1, r2, lr}
    5de6:	a904      	add	r1, sp, #16
    5de8:	f851 0b04 	ldr.w	r0, [r1], #4
	va_list ap;

	va_start(ap, fmt);
    5dec:	9101      	str	r1, [sp, #4]

	if (IS_ENABLED(CONFIG_LOG_PRINTK)) {
		log_printk(fmt, ap);
	} else {
		vprintk(fmt, ap);
    5dee:	f7fb fc3b 	bl	1668 <vprintk>
	}
	va_end(ap);
}
    5df2:	b003      	add	sp, #12
    5df4:	f85d eb04 	ldr.w	lr, [sp], #4
    5df8:	b004      	add	sp, #16
    5dfa:	4770      	bx	lr

00005dfc <process_recheck>:
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    5dfc:	8b03      	ldrh	r3, [r0, #24]
	if ((state == ONOFF_STATE_OFF)
    5dfe:	f013 0307 	ands.w	r3, r3, #7
    5e02:	d105      	bne.n	5e10 <process_recheck+0x14>
	    && !sys_slist_is_empty(&mgr->clients)) {
    5e04:	6803      	ldr	r3, [r0, #0]
    5e06:	2b00      	cmp	r3, #0
		evt = EVT_START;
    5e08:	bf0c      	ite	eq
    5e0a:	2000      	moveq	r0, #0
    5e0c:	2003      	movne	r0, #3
    5e0e:	4770      	bx	lr
	} else if ((state == ONOFF_STATE_ON)
    5e10:	2b02      	cmp	r3, #2
    5e12:	d105      	bne.n	5e20 <process_recheck+0x24>
		   && (mgr->refs == 0U)) {
    5e14:	8b43      	ldrh	r3, [r0, #26]
    5e16:	2b00      	cmp	r3, #0
		evt = EVT_STOP;
    5e18:	bf14      	ite	ne
    5e1a:	2000      	movne	r0, #0
    5e1c:	2004      	moveq	r0, #4
    5e1e:	4770      	bx	lr
	} else if ((state == ONOFF_STATE_ERROR)
    5e20:	2b01      	cmp	r3, #1
    5e22:	d105      	bne.n	5e30 <process_recheck+0x34>
		   && !sys_slist_is_empty(&mgr->clients)) {
    5e24:	6803      	ldr	r3, [r0, #0]
    5e26:	2b00      	cmp	r3, #0
		evt = EVT_RESET;
    5e28:	bf0c      	ite	eq
    5e2a:	2000      	moveq	r0, #0
    5e2c:	2005      	movne	r0, #5
    5e2e:	4770      	bx	lr
	int evt = EVT_NOP;
    5e30:	2000      	movs	r0, #0
}
    5e32:	4770      	bx	lr

00005e34 <notify_one>:
{
    5e34:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    5e38:	460d      	mov	r5, r1
    5e3a:	4607      	mov	r7, r0
		(onoff_client_callback)sys_notify_finalize(&cli->notify, res);
    5e3c:	4619      	mov	r1, r3
    5e3e:	1d28      	adds	r0, r5, #4
{
    5e40:	4690      	mov	r8, r2
    5e42:	461e      	mov	r6, r3
		(onoff_client_callback)sys_notify_finalize(&cli->notify, res);
    5e44:	f7ff ffbe 	bl	5dc4 <sys_notify_finalize>
	if (cb) {
    5e48:	4604      	mov	r4, r0
    5e4a:	b138      	cbz	r0, 5e5c <notify_one+0x28>
		cb(mgr, cli, state, res);
    5e4c:	4633      	mov	r3, r6
    5e4e:	4642      	mov	r2, r8
    5e50:	4629      	mov	r1, r5
    5e52:	4638      	mov	r0, r7
    5e54:	46a4      	mov	ip, r4
}
    5e56:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
		cb(mgr, cli, state, res);
    5e5a:	4760      	bx	ip
}
    5e5c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

00005e60 <transition_complete>:
{
    5e60:	b410      	push	{r4}
    5e62:	f04f 0420 	mov.w	r4, #32
    5e66:	f3ef 8211 	mrs	r2, BASEPRI
    5e6a:	f384 8812 	msr	BASEPRI_MAX, r4
    5e6e:	f3bf 8f6f 	isb	sy
	mgr->last_res = res;
    5e72:	6141      	str	r1, [r0, #20]
}
    5e74:	bc10      	pop	{r4}
	process_event(mgr, EVT_COMPLETE, key);
    5e76:	2101      	movs	r1, #1
    5e78:	f7fb bc04 	b.w	1684 <process_event>

00005e7c <validate_args>:
{
    5e7c:	b510      	push	{r4, lr}
    5e7e:	460c      	mov	r4, r1
	if ((mgr == NULL) || (cli == NULL)) {
    5e80:	b140      	cbz	r0, 5e94 <validate_args+0x18>
    5e82:	b139      	cbz	r1, 5e94 <validate_args+0x18>
	int rv = sys_notify_validate(&cli->notify);
    5e84:	1d08      	adds	r0, r1, #4
    5e86:	f7ff ff8c 	bl	5da2 <sys_notify_validate>
	if ((rv == 0)
    5e8a:	b928      	cbnz	r0, 5e98 <validate_args+0x1c>
	    && ((cli->notify.flags
    5e8c:	68a3      	ldr	r3, [r4, #8]
    5e8e:	f033 0303 	bics.w	r3, r3, #3
    5e92:	d001      	beq.n	5e98 <validate_args+0x1c>
		rv = -EINVAL;
    5e94:	f06f 0015 	mvn.w	r0, #21
}
    5e98:	bd10      	pop	{r4, pc}

00005e9a <onoff_manager_init>:
{
    5e9a:	b538      	push	{r3, r4, r5, lr}
    5e9c:	460c      	mov	r4, r1
	if ((mgr == NULL)
    5e9e:	4605      	mov	r5, r0
    5ea0:	b158      	cbz	r0, 5eba <onoff_manager_init+0x20>
	    || (transitions == NULL)
    5ea2:	b151      	cbz	r1, 5eba <onoff_manager_init+0x20>
	    || (transitions->start == NULL)
    5ea4:	680b      	ldr	r3, [r1, #0]
    5ea6:	b143      	cbz	r3, 5eba <onoff_manager_init+0x20>
	    || (transitions->stop == NULL)) {
    5ea8:	684b      	ldr	r3, [r1, #4]
    5eaa:	b133      	cbz	r3, 5eba <onoff_manager_init+0x20>
	*mgr = (struct onoff_manager)ONOFF_MANAGER_INITIALIZER(transitions);
    5eac:	221c      	movs	r2, #28
    5eae:	2100      	movs	r1, #0
    5eb0:	f000 fbe7 	bl	6682 <memset>
    5eb4:	612c      	str	r4, [r5, #16]
	return 0;
    5eb6:	2000      	movs	r0, #0
}
    5eb8:	bd38      	pop	{r3, r4, r5, pc}
		return -EINVAL;
    5eba:	f06f 0015 	mvn.w	r0, #21
    5ebe:	e7fb      	b.n	5eb8 <onoff_manager_init+0x1e>

00005ec0 <onoff_request>:

int onoff_request(struct onoff_manager *mgr,
		  struct onoff_client *cli)
{
    5ec0:	b570      	push	{r4, r5, r6, lr}
    5ec2:	4604      	mov	r4, r0
    5ec4:	460e      	mov	r6, r1
	bool add_client = false;        /* add client to pending list */
	bool start = false;             /* trigger a start transition */
	bool notify = false;            /* do client notification */
	int rv = validate_args(mgr, cli);
    5ec6:	f7ff ffd9 	bl	5e7c <validate_args>

	if (rv < 0) {
    5eca:	1e05      	subs	r5, r0, #0
    5ecc:	db31      	blt.n	5f32 <onoff_request+0x72>
    5ece:	f04f 0320 	mov.w	r3, #32
    5ed2:	f3ef 8111 	mrs	r1, BASEPRI
    5ed6:	f383 8812 	msr	BASEPRI_MAX, r3
    5eda:	f3bf 8f6f 	isb	sy

	k_spinlock_key_t key = k_spin_lock(&mgr->lock);
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;

	/* Reject if this would overflow the reference count. */
	if (mgr->refs == SERVICE_REFS_MAX) {
    5ede:	8b63      	ldrh	r3, [r4, #26]
	uint32_t state = mgr->flags & ONOFF_STATE_MASK;
    5ee0:	8b20      	ldrh	r0, [r4, #24]
	if (mgr->refs == SERVICE_REFS_MAX) {
    5ee2:	f64f 75ff 	movw	r5, #65535	; 0xffff
    5ee6:	42ab      	cmp	r3, r5
    5ee8:	f000 0207 	and.w	r2, r0, #7
    5eec:	d02e      	beq.n	5f4c <onoff_request+0x8c>
		rv = -EAGAIN;
		goto out;
	}

	rv = state;
	if (state == ONOFF_STATE_ON) {
    5eee:	2a02      	cmp	r2, #2
    5ef0:	d10e      	bne.n	5f10 <onoff_request+0x50>
		/* Increment reference count, notify in exit */
		notify = true;
		mgr->refs += 1U;
    5ef2:	3301      	adds	r3, #1
    5ef4:	8363      	strh	r3, [r4, #26]
	rv = state;
    5ef6:	4615      	mov	r5, r2
		notify = true;
    5ef8:	2301      	movs	r3, #1
	__asm__ volatile(
    5efa:	f381 8811 	msr	BASEPRI, r1
    5efe:	f3bf 8f6f 	isb	sy
	if (start) {
		process_event(mgr, EVT_RECHECK, key);
	} else {
		k_spin_unlock(&mgr->lock, key);

		if (notify) {
    5f02:	b1b3      	cbz	r3, 5f32 <onoff_request+0x72>
			notify_one(mgr, cli, state, 0);
    5f04:	2300      	movs	r3, #0
    5f06:	4631      	mov	r1, r6
    5f08:	4620      	mov	r0, r4
    5f0a:	f7ff ff93 	bl	5e34 <notify_one>
    5f0e:	e010      	b.n	5f32 <onoff_request+0x72>
	} else if ((state == ONOFF_STATE_OFF)
    5f10:	0783      	lsls	r3, r0, #30
    5f12:	d001      	beq.n	5f18 <onoff_request+0x58>
		   || (state == ONOFF_STATE_TO_ON)) {
    5f14:	2a06      	cmp	r2, #6
    5f16:	d10e      	bne.n	5f36 <onoff_request+0x76>
	parent->next = child;
    5f18:	2300      	movs	r3, #0
    5f1a:	6033      	str	r3, [r6, #0]
Z_GENLIST_APPEND(slist, snode)
    5f1c:	6863      	ldr	r3, [r4, #4]
    5f1e:	b993      	cbnz	r3, 5f46 <onoff_request+0x86>
	list->head = node;
    5f20:	e9c4 6600 	strd	r6, r6, [r4]
	if (start) {
    5f24:	4615      	mov	r5, r2
    5f26:	b962      	cbnz	r2, 5f42 <onoff_request+0x82>
		process_event(mgr, EVT_RECHECK, key);
    5f28:	460a      	mov	r2, r1
    5f2a:	4620      	mov	r0, r4
    5f2c:	2102      	movs	r1, #2
    5f2e:	f7fb fba9 	bl	1684 <process_event>
		}
	}

	return rv;
}
    5f32:	4628      	mov	r0, r5
    5f34:	bd70      	pop	{r4, r5, r6, pc}
		rv = -EIO;
    5f36:	2a05      	cmp	r2, #5
    5f38:	bf0c      	ite	eq
    5f3a:	f06f 0585 	mvneq.w	r5, #133	; 0x85
    5f3e:	f06f 0504 	mvnne.w	r5, #4
    5f42:	2300      	movs	r3, #0
    5f44:	e7d9      	b.n	5efa <onoff_request+0x3a>
	parent->next = child;
    5f46:	601e      	str	r6, [r3, #0]
	list->tail = node;
    5f48:	6066      	str	r6, [r4, #4]
}
    5f4a:	e7eb      	b.n	5f24 <onoff_request+0x64>
		rv = -EAGAIN;
    5f4c:	f06f 050a 	mvn.w	r5, #10
    5f50:	e7f7      	b.n	5f42 <onoff_request+0x82>

00005f52 <_ConfigAbsSyms>:
GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_OUTPUT_PRINT_MEMORY_USAGE, 1);
GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BUILD_OUTPUT_BIN, 1);
GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_BUILD_OUTPUT_META, 1);
GEN_ABSOLUTE_SYM_KCONFIG(CONFIG_COMPAT_INCLUDES, 1);

GEN_ABS_SYM_END
    5f52:	4770      	bx	lr

00005f54 <z_log_minimal_printk>:
#include <sys/printk.h>

#define HEXDUMP_BYTES_IN_LINE 8U

void z_log_minimal_printk(const char *fmt, ...)
{
    5f54:	b40f      	push	{r0, r1, r2, r3}
    5f56:	b507      	push	{r0, r1, r2, lr}
    5f58:	a904      	add	r1, sp, #16
    5f5a:	f851 0b04 	ldr.w	r0, [r1], #4
	va_list ap;

	va_start(ap, fmt);
    5f5e:	9101      	str	r1, [sp, #4]
	vprintk(fmt, ap);
    5f60:	f7fb fb82 	bl	1668 <vprintk>
	va_end(ap);
}
    5f64:	b003      	add	sp, #12
    5f66:	f85d eb04 	ldr.w	lr, [sp], #4
    5f6a:	b004      	add	sp, #16
    5f6c:	4770      	bx	lr

00005f6e <flash_area_close>:

void flash_area_close(const struct flash_area *fa)
{
	/* nothing to do for now */
}
    5f6e:	4770      	bx	lr

00005f70 <flash_area_read>:

int flash_area_read(const struct flash_area *fa, off_t off, void *dst,
		    size_t len)
{
    5f70:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}


static inline bool is_in_flash_area_bounds(const struct flash_area *fa,
					   off_t off, size_t len)
{
	return (off >= 0) && ((off + len) <= fa->fa_size);
    5f74:	1e0c      	subs	r4, r1, #0
    5f76:	4605      	mov	r5, r0
    5f78:	4617      	mov	r7, r2
    5f7a:	461e      	mov	r6, r3
    5f7c:	db10      	blt.n	5fa0 <flash_area_read+0x30>
    5f7e:	6882      	ldr	r2, [r0, #8]
    5f80:	18e3      	adds	r3, r4, r3
    5f82:	4293      	cmp	r3, r2
    5f84:	d80c      	bhi.n	5fa0 <flash_area_read+0x30>

	if (!is_in_flash_area_bounds(fa, off, len)) {
		return -EINVAL;
	}

	dev = device_get_binding(fa->fa_dev_name);
    5f86:	68c0      	ldr	r0, [r0, #12]
    5f88:	f7ff fac6 	bl	5518 <z_impl_device_get_binding>

	return flash_read(dev, fa->fa_off + off, dst, len);
    5f8c:	6869      	ldr	r1, [r5, #4]
    5f8e:	4421      	add	r1, r4
				    size_t len)
{
	const struct flash_driver_api *api =
		(const struct flash_driver_api *)dev->api;

	return api->read(dev, offset, data, len);
    5f90:	6883      	ldr	r3, [r0, #8]
    5f92:	681c      	ldr	r4, [r3, #0]
    5f94:	463a      	mov	r2, r7
    5f96:	4633      	mov	r3, r6
    5f98:	46a4      	mov	ip, r4
}
    5f9a:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
    5f9e:	4760      	bx	ip
    5fa0:	f06f 0015 	mvn.w	r0, #21
    5fa4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

00005fa8 <flash_area_write>:

int flash_area_write(const struct flash_area *fa, off_t off, const void *src,
		     size_t len)
{
    5fa8:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    5fac:	f1b1 0900 	subs.w	r9, r1, #0
    5fb0:	4680      	mov	r8, r0
    5fb2:	4617      	mov	r7, r2
    5fb4:	461e      	mov	r6, r3
    5fb6:	db27      	blt.n	6008 <flash_area_write+0x60>
    5fb8:	6882      	ldr	r2, [r0, #8]
    5fba:	444b      	add	r3, r9
    5fbc:	4293      	cmp	r3, r2
    5fbe:	d823      	bhi.n	6008 <flash_area_write+0x60>

	if (!is_in_flash_area_bounds(fa, off, len)) {
		return -EINVAL;
	}

	flash_dev = device_get_binding(fa->fa_dev_name);
    5fc0:	68c0      	ldr	r0, [r0, #12]
    5fc2:	f7ff faa9 	bl	5518 <z_impl_device_get_binding>

	rc = flash_write(flash_dev, fa->fa_off + off, (void *)src, len);
    5fc6:	f8d8 1004 	ldr.w	r1, [r8, #4]
    5fca:	4605      	mov	r5, r0
    5fcc:	4489      	add	r9, r1
			  size_t len);

static inline int z_impl_flash_write(const struct device *dev, off_t offset,
				     const void *data, size_t len)
{
	const struct flash_driver_api *api =
    5fce:	f8d0 8008 	ldr.w	r8, [r0, #8]
	/* write protection management in this function exists for keeping
	 * compatibility with out-of-tree drivers which are not aligned jet
	 * with write-protection API depreciation.
	 * This will be removed with flash_api_write_protection handler type.
	 */
	if (api->write_protection != NULL) {
    5fd2:	f8d8 300c 	ldr.w	r3, [r8, #12]
    5fd6:	b96b      	cbnz	r3, 5ff4 <flash_area_write+0x4c>
		if (rc) {
			return rc;
		}
	}

	rc = api->write(dev, offset, data, len);
    5fd8:	f8d8 4004 	ldr.w	r4, [r8, #4]
    5fdc:	4633      	mov	r3, r6
    5fde:	463a      	mov	r2, r7
    5fe0:	4649      	mov	r1, r9
    5fe2:	4628      	mov	r0, r5
    5fe4:	47a0      	blx	r4

	if (api->write_protection != NULL) {
    5fe6:	f8d8 300c 	ldr.w	r3, [r8, #12]
	rc = api->write(dev, offset, data, len);
    5fea:	4604      	mov	r4, r0
	if (api->write_protection != NULL) {
    5fec:	b943      	cbnz	r3, 6000 <flash_area_write+0x58>

	return rc;
}
    5fee:	4620      	mov	r0, r4
    5ff0:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
		rc = api->write_protection(dev, false);
    5ff4:	2100      	movs	r1, #0
    5ff6:	4798      	blx	r3
		if (rc) {
    5ff8:	4604      	mov	r4, r0
    5ffa:	2800      	cmp	r0, #0
    5ffc:	d0ec      	beq.n	5fd8 <flash_area_write+0x30>
    5ffe:	e7f6      	b.n	5fee <flash_area_write+0x46>
		(void) api->write_protection(dev, true);
    6000:	2101      	movs	r1, #1
    6002:	4628      	mov	r0, r5
    6004:	4798      	blx	r3
    6006:	e7f2      	b.n	5fee <flash_area_write+0x46>
		return -EINVAL;
    6008:	f06f 0415 	mvn.w	r4, #21
    600c:	e7ef      	b.n	5fee <flash_area_write+0x46>

0000600e <flash_area_erase>:

int flash_area_erase(const struct flash_area *fa, off_t off, size_t len)
{
    600e:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    6012:	1e0c      	subs	r4, r1, #0
    6014:	4605      	mov	r5, r0
    6016:	4617      	mov	r7, r2
    6018:	db25      	blt.n	6066 <flash_area_erase+0x58>
    601a:	18a3      	adds	r3, r4, r2
    601c:	6882      	ldr	r2, [r0, #8]
    601e:	4293      	cmp	r3, r2
    6020:	d821      	bhi.n	6066 <flash_area_erase+0x58>

	if (!is_in_flash_area_bounds(fa, off, len)) {
		return -EINVAL;
	}

	flash_dev = device_get_binding(fa->fa_dev_name);
    6022:	68c0      	ldr	r0, [r0, #12]
    6024:	f7ff fa78 	bl	5518 <z_impl_device_get_binding>

	rc = flash_erase(flash_dev, fa->fa_off + off, len);
    6028:	686d      	ldr	r5, [r5, #4]
    602a:	4606      	mov	r6, r0
    602c:	4425      	add	r5, r4
__syscall int flash_erase(const struct device *dev, off_t offset, size_t size);

static inline int z_impl_flash_erase(const struct device *dev, off_t offset,
				     size_t size)
{
	const struct flash_driver_api *api =
    602e:	f8d0 8008 	ldr.w	r8, [r0, #8]
	/* write protection management in this function exists for keeping
	 * compatibility with out-of-tree drivers which are not aligned jet
	 * with write-protection API depreciation.
	 * This will be removed with flash_api_write_protection handler type.
	 */
	if (api->write_protection != NULL) {
    6032:	f8d8 300c 	ldr.w	r3, [r8, #12]
    6036:	b963      	cbnz	r3, 6052 <flash_area_erase+0x44>
		if (rc) {
			return rc;
		}
	}

	rc = api->erase(dev, offset, size);
    6038:	f8d8 3008 	ldr.w	r3, [r8, #8]
    603c:	463a      	mov	r2, r7
    603e:	4629      	mov	r1, r5
    6040:	4630      	mov	r0, r6
    6042:	4798      	blx	r3

	if (api->write_protection != NULL) {
    6044:	f8d8 300c 	ldr.w	r3, [r8, #12]
	rc = api->erase(dev, offset, size);
    6048:	4604      	mov	r4, r0
	if (api->write_protection != NULL) {
    604a:	b943      	cbnz	r3, 605e <flash_area_erase+0x50>

	return rc;
}
    604c:	4620      	mov	r0, r4
    604e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
		rc = api->write_protection(dev, false);
    6052:	2100      	movs	r1, #0
    6054:	4798      	blx	r3
		if (rc) {
    6056:	4604      	mov	r4, r0
    6058:	2800      	cmp	r0, #0
    605a:	d0ed      	beq.n	6038 <flash_area_erase+0x2a>
    605c:	e7f6      	b.n	604c <flash_area_erase+0x3e>
		(void) api->write_protection(dev, true);
    605e:	2101      	movs	r1, #1
    6060:	4630      	mov	r0, r6
    6062:	4798      	blx	r3
    6064:	e7f2      	b.n	604c <flash_area_erase+0x3e>
		return -EINVAL;
    6066:	f06f 0415 	mvn.w	r4, #21
    606a:	e7ef      	b.n	604c <flash_area_erase+0x3e>

0000606c <flash_area_align>:

uint32_t flash_area_align(const struct flash_area *fa)
{
    606c:	b508      	push	{r3, lr}
	const struct device *dev;

	dev = device_get_binding(fa->fa_dev_name);
    606e:	68c0      	ldr	r0, [r0, #12]
    6070:	f7ff fa52 	bl	5518 <z_impl_device_get_binding>
static inline size_t z_impl_flash_get_write_block_size(const struct device *dev)
{
	const struct flash_driver_api *api =
		(const struct flash_driver_api *)dev->api;

	return api->get_parameters(dev)->write_block_size;
    6074:	6883      	ldr	r3, [r0, #8]
    6076:	691b      	ldr	r3, [r3, #16]
    6078:	4798      	blx	r3

	return flash_get_write_block_size(dev);
}
    607a:	6800      	ldr	r0, [r0, #0]
    607c:	bd08      	pop	{r3, pc}

0000607e <flash_area_erased_val>:
{
	return device_get_binding(fa->fa_dev_name);
}

uint8_t flash_area_erased_val(const struct flash_area *fa)
{
    607e:	b508      	push	{r3, lr}
	const struct flash_parameters *param;

	param = flash_get_parameters(device_get_binding(fa->fa_dev_name));
    6080:	68c0      	ldr	r0, [r0, #12]
    6082:	f7ff fa49 	bl	5518 <z_impl_device_get_binding>
static inline const struct flash_parameters *z_impl_flash_get_parameters(const struct device *dev)
{
	const struct flash_driver_api *api =
		(const struct flash_driver_api *)dev->api;

	return api->get_parameters(dev);
    6086:	6883      	ldr	r3, [r0, #8]
    6088:	691b      	ldr	r3, [r3, #16]
    608a:	4798      	blx	r3

	return param->erase_value;
}
    608c:	7900      	ldrb	r0, [r0, #4]
    608e:	bd08      	pop	{r3, pc}

00006090 <get_sectors_cb>:
{
    6090:	b570      	push	{r4, r5, r6, lr}
	if (info->start_offset < data->area_off) {
    6092:	6802      	ldr	r2, [r0, #0]
    6094:	684c      	ldr	r4, [r1, #4]
    6096:	42a2      	cmp	r2, r4
    6098:	d316      	bcc.n	60c8 <get_sectors_cb+0x38>
	} else if (info->start_offset >= data->area_off + data->area_len) {
    609a:	688b      	ldr	r3, [r1, #8]
    609c:	4423      	add	r3, r4
    609e:	429a      	cmp	r2, r3
    60a0:	d206      	bcs.n	60b0 <get_sectors_cb+0x20>
	} else if (data->ret_idx >= data->ret_len) {
    60a2:	e9d1 3504 	ldrd	r3, r5, [r1, #16]
    60a6:	42ab      	cmp	r3, r5
    60a8:	d304      	bcc.n	60b4 <get_sectors_cb+0x24>
		data->status = -ENOMEM;
    60aa:	f06f 030b 	mvn.w	r3, #11
    60ae:	618b      	str	r3, [r1, #24]
		*bail_value = false;
    60b0:	2000      	movs	r0, #0
    60b2:	e00a      	b.n	60ca <get_sectors_cb+0x3a>
	ret[data->ret_idx].fs_off = info->start_offset - data->area_off;
    60b4:	68cd      	ldr	r5, [r1, #12]
    60b6:	1b12      	subs	r2, r2, r4
    60b8:	eb05 06c3 	add.w	r6, r5, r3, lsl #3
    60bc:	f845 2033 	str.w	r2, [r5, r3, lsl #3]
	ret[data->ret_idx].fs_size = info->size;
    60c0:	6842      	ldr	r2, [r0, #4]
    60c2:	6072      	str	r2, [r6, #4]
	data->ret_idx++;
    60c4:	3301      	adds	r3, #1
    60c6:	610b      	str	r3, [r1, #16]
		*bail_value = true;
    60c8:	2001      	movs	r0, #1
}
    60ca:	bd70      	pop	{r4, r5, r6, pc}

000060cc <console_write>:
{
    60cc:	b570      	push	{r4, r5, r6, lr}
    60ce:	4606      	mov	r6, r0
    60d0:	460d      	mov	r5, r1
	for (i = 0; i < cnt; i++) {
    60d2:	2400      	movs	r4, #0
    60d4:	42ac      	cmp	r4, r5
    60d6:	db00      	blt.n	60da <console_write+0xe>
}
    60d8:	bd70      	pop	{r4, r5, r6, pc}
		if (console_out((int)str[i]) == EOF) {
    60da:	5d30      	ldrb	r0, [r6, r4]
    60dc:	f7fb feb0 	bl	1e40 <console_out>
    60e0:	3001      	adds	r0, #1
    60e2:	d0f9      	beq.n	60d8 <console_write+0xc>
	for (i = 0; i < cnt; i++) {
    60e4:	3401      	adds	r4, #1
    60e6:	e7f5      	b.n	60d4 <console_write+0x8>

000060e8 <u32toa>:
{
    60e8:	b5f0      	push	{r4, r5, r6, r7, lr}
    uint32_t d = 1;
    60ea:	2301      	movs	r3, #1
        d *= 10;
    60ec:	240a      	movs	r4, #10
    while (val / d >= 10) {
    60ee:	fbb1 f2f3 	udiv	r2, r1, r3
    60f2:	2a09      	cmp	r2, #9
    60f4:	d806      	bhi.n	6104 <u32toa+0x1c>
    dst = tgt;
    60f6:	4602      	mov	r2, r0
    int n = 0;
    60f8:	2500      	movs	r5, #0
        d /= 10;
    60fa:	260a      	movs	r6, #10
    while (d) {
    60fc:	b923      	cbnz	r3, 6108 <u32toa+0x20>
    *dst = '\0';
    60fe:	7013      	strb	r3, [r2, #0]
}
    6100:	1a10      	subs	r0, r2, r0
    6102:	bdf0      	pop	{r4, r5, r6, r7, pc}
        d *= 10;
    6104:	4363      	muls	r3, r4
    6106:	e7f2      	b.n	60ee <u32toa+0x6>
        dgt = val / d;
    6108:	fbb1 f4f3 	udiv	r4, r1, r3
        d /= 10;
    610c:	fbb3 fcf6 	udiv	ip, r3, r6
        val %= d;
    6110:	fb03 1714 	mls	r7, r3, r4, r1
        if (n || dgt > 0 || d == 0) {
    6114:	b91d      	cbnz	r5, 611e <u32toa+0x36>
    6116:	4299      	cmp	r1, r3
    6118:	d201      	bcs.n	611e <u32toa+0x36>
    611a:	2b09      	cmp	r3, #9
    611c:	d803      	bhi.n	6126 <u32toa+0x3e>
            *dst++ = dgt + '0';
    611e:	3430      	adds	r4, #48	; 0x30
    6120:	f802 4b01 	strb.w	r4, [r2], #1
            ++n;
    6124:	3501      	adds	r5, #1
            *dst++ = dgt + '0';
    6126:	4663      	mov	r3, ip
    6128:	4639      	mov	r1, r7
    612a:	e7e7      	b.n	60fc <u32toa+0x14>

0000612c <value_extract>:
 *          CBOR values are always big-endian, so this function converts from
 *          big to little-endian if necessary (@ref CONFIG_BIG_ENDIAN).
 */
static bool value_extract(cbor_state_t *state,
		void *const result, uint32_t result_len)
{
    612c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    612e:	4604      	mov	r4, r0
	cbor_trace();
	cbor_assert(result_len != 0, "0-length result not supported.\n");
	cbor_assert(result != NULL, NULL);

	FAIL_IF((state->elem_count == 0) \
    6130:	6880      	ldr	r0, [r0, #8]
{
    6132:	460d      	mov	r5, r1
    6134:	4617      	mov	r7, r2
	FAIL_IF((state->elem_count == 0) \
    6136:	b1a0      	cbz	r0, 6162 <value_extract+0x36>
    6138:	6823      	ldr	r3, [r4, #0]
    613a:	68e1      	ldr	r1, [r4, #12]
    613c:	428b      	cmp	r3, r1
    613e:	d21d      	bcs.n	617c <value_extract+0x50>
		|| (state->payload >= state->payload_end));

	uint8_t *u8_result  = (uint8_t *)result;
	uint8_t additional = ADDITIONAL(*state->payload);
    6140:	781e      	ldrb	r6, [r3, #0]

	state->payload_bak = state->payload;
    6142:	6063      	str	r3, [r4, #4]
	(state->payload)++;
    6144:	3301      	adds	r3, #1
	uint8_t additional = ADDITIONAL(*state->payload);
    6146:	f006 061f 	and.w	r6, r6, #31
	(state->payload)++;
    614a:	6023      	str	r3, [r4, #0]

	memset(result, 0, result_len);
    614c:	2100      	movs	r1, #0
    614e:	4628      	mov	r0, r5
    6150:	f000 fa97 	bl	6682 <memset>
	if (additional <= VALUE_IN_HEADER) {
    6154:	2e17      	cmp	r6, #23
    6156:	d805      	bhi.n	6164 <value_extract+0x38>
#ifdef CONFIG_BIG_ENDIAN
		u8_result[result_len - 1] = additional;
#else
		u8_result[0] = additional;
    6158:	702e      	strb	r6, [r5, #0]
#endif /* CONFIG_BIG_ENDIAN */

		(state->payload) += len;
	}

	(state->elem_count)--;
    615a:	68a3      	ldr	r3, [r4, #8]
    615c:	3b01      	subs	r3, #1
    615e:	60a3      	str	r3, [r4, #8]
	return true;
    6160:	2001      	movs	r0, #1
}
    6162:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	if (24 <= additional && additional <= 27) {
    6164:	3e18      	subs	r6, #24
    6166:	b2f3      	uxtb	r3, r6
    6168:	2b03      	cmp	r3, #3
    616a:	6822      	ldr	r2, [r4, #0]
    616c:	d808      	bhi.n	6180 <value_extract+0x54>
		return 1 << (additional - 24);
    616e:	2301      	movs	r3, #1
    6170:	fa03 f606 	lsl.w	r6, r3, r6
		FAIL_AND_DECR_IF(len > result_len);
    6174:	42b7      	cmp	r7, r6
    6176:	d204      	bcs.n	6182 <value_extract+0x56>
		FAIL_AND_DECR_IF((state->payload + len)
    6178:	3a01      	subs	r2, #1
    617a:	6022      	str	r2, [r4, #0]
	FAIL_IF((state->elem_count == 0) \
    617c:	2000      	movs	r0, #0
    617e:	e7f0      	b.n	6162 <value_extract+0x36>
	return 0;
    6180:	2600      	movs	r6, #0
		FAIL_AND_DECR_IF((state->payload + len)
    6182:	68e1      	ldr	r1, [r4, #12]
    6184:	1993      	adds	r3, r2, r6
    6186:	4299      	cmp	r1, r3
    6188:	d3f6      	bcc.n	6178 <value_extract+0x4c>
    618a:	1e72      	subs	r2, r6, #1
    618c:	3d01      	subs	r5, #1
		for (uint32_t i = 0; i < len; i++) {
    618e:	1c51      	adds	r1, r2, #1
    6190:	6823      	ldr	r3, [r4, #0]
    6192:	d102      	bne.n	619a <value_extract+0x6e>
		(state->payload) += len;
    6194:	441e      	add	r6, r3
    6196:	6026      	str	r6, [r4, #0]
    6198:	e7df      	b.n	615a <value_extract+0x2e>
			u8_result[i] = (state->payload)[len - i - 1];
    619a:	5c9b      	ldrb	r3, [r3, r2]
    619c:	f805 3f01 	strb.w	r3, [r5, #1]!
		for (uint32_t i = 0; i < len; i++) {
    61a0:	3a01      	subs	r2, #1
    61a2:	e7f4      	b.n	618e <value_extract+0x62>

000061a4 <uint32_decode>:
}


static bool uint32_decode(cbor_state_t *state, uint32_t *result)
{
	if (!value_extract(state, result, 4)) {
    61a4:	2204      	movs	r2, #4
    61a6:	f7ff bfc1 	b.w	612c <value_extract>

000061aa <strx_start_decode>:
}


static bool strx_start_decode(cbor_state_t *state,
		cbor_string_type_t *result, cbor_major_type_t exp_major_type)
{
    61aa:	b538      	push	{r3, r4, r5, lr}
	FAIL_IF(state->payload >= state->payload_end);
    61ac:	6803      	ldr	r3, [r0, #0]
{
    61ae:	460d      	mov	r5, r1
	FAIL_IF(state->payload >= state->payload_end);
    61b0:	68c1      	ldr	r1, [r0, #12]
    61b2:	428b      	cmp	r3, r1
{
    61b4:	4604      	mov	r4, r0
	FAIL_IF(state->payload >= state->payload_end);
    61b6:	d301      	bcc.n	61bc <strx_start_decode+0x12>

	if (result->len > (state->payload_end - state->payload)) {
		cbor_print("error: 0x%x > 0x%x\r\n",
		(uint32_t)result->len,
		(uint32_t)(state->payload_end - state->payload));
		FAIL_RESTORE();
    61b8:	2000      	movs	r0, #0
	}

	result->value = state->payload;
	return true;
}
    61ba:	bd38      	pop	{r3, r4, r5, pc}
	uint8_t major_type = MAJOR_TYPE(*state->payload);
    61bc:	781b      	ldrb	r3, [r3, #0]
	if (major_type != exp_major_type) {
    61be:	ebb2 1f53 	cmp.w	r2, r3, lsr #5
    61c2:	d1f9      	bne.n	61b8 <strx_start_decode+0xe>
	if (!uint32_decode(state, &result->len)) {
    61c4:	1d29      	adds	r1, r5, #4
    61c6:	f7ff ffed 	bl	61a4 <uint32_decode>
    61ca:	2800      	cmp	r0, #0
    61cc:	d0f4      	beq.n	61b8 <strx_start_decode+0xe>
	if (result->len > (state->payload_end - state->payload)) {
    61ce:	6822      	ldr	r2, [r4, #0]
    61d0:	68e3      	ldr	r3, [r4, #12]
    61d2:	6869      	ldr	r1, [r5, #4]
    61d4:	1a9b      	subs	r3, r3, r2
    61d6:	4299      	cmp	r1, r3
    61d8:	d905      	bls.n	61e6 <strx_start_decode+0x3c>
		FAIL_RESTORE();
    61da:	6863      	ldr	r3, [r4, #4]
    61dc:	6023      	str	r3, [r4, #0]
    61de:	68a3      	ldr	r3, [r4, #8]
    61e0:	3301      	adds	r3, #1
    61e2:	60a3      	str	r3, [r4, #8]
    61e4:	e7e8      	b.n	61b8 <strx_start_decode+0xe>
	result->value = state->payload;
    61e6:	602a      	str	r2, [r5, #0]
	return true;
    61e8:	e7e7      	b.n	61ba <strx_start_decode+0x10>

000061ea <list_map_start_decode>:


static bool list_map_start_decode(cbor_state_t *state,
		cbor_major_type_t exp_major_type)
{
	FAIL_IF(state->payload >= state->payload_end);
    61ea:	6803      	ldr	r3, [r0, #0]
    61ec:	68c2      	ldr	r2, [r0, #12]
    61ee:	4293      	cmp	r3, r2
{
    61f0:	b513      	push	{r0, r1, r4, lr}
    61f2:	4604      	mov	r4, r0
	FAIL_IF(state->payload >= state->payload_end);
    61f4:	d302      	bcc.n	61fc <list_map_start_decode+0x12>
    61f6:	2000      	movs	r0, #0
	if (!new_backup(state, new_elem_count)) {
		FAIL_RESTORE();
	}

	return true;
}
    61f8:	b002      	add	sp, #8
    61fa:	bd10      	pop	{r4, pc}
	uint8_t major_type = MAJOR_TYPE(*state->payload);
    61fc:	781b      	ldrb	r3, [r3, #0]
	if (major_type != exp_major_type) {
    61fe:	ebb1 1f53 	cmp.w	r1, r3, lsr #5
    6202:	d1f8      	bne.n	61f6 <list_map_start_decode+0xc>
	if (!uint32_decode(state, &new_elem_count)) {
    6204:	a901      	add	r1, sp, #4
    6206:	f7ff ffcd 	bl	61a4 <uint32_decode>
    620a:	2800      	cmp	r0, #0
    620c:	d0f3      	beq.n	61f6 <list_map_start_decode+0xc>
	if (!new_backup(state, new_elem_count)) {
    620e:	9901      	ldr	r1, [sp, #4]
    6210:	4620      	mov	r0, r4
    6212:	f000 f961 	bl	64d8 <new_backup>
    6216:	2800      	cmp	r0, #0
    6218:	d1ee      	bne.n	61f8 <list_map_start_decode+0xe>
		FAIL_RESTORE();
    621a:	6863      	ldr	r3, [r4, #4]
    621c:	6023      	str	r3, [r4, #0]
    621e:	68a3      	ldr	r3, [r4, #8]
    6220:	3301      	adds	r3, #1
    6222:	60a3      	str	r3, [r4, #8]
    6224:	e7e8      	b.n	61f8 <list_map_start_decode+0xe>

00006226 <intx32_decode>:
	FAIL_IF(state->payload >= state->payload_end);
    6226:	6803      	ldr	r3, [r0, #0]
    6228:	68c2      	ldr	r2, [r0, #12]
    622a:	4293      	cmp	r3, r2
{
    622c:	b573      	push	{r0, r1, r4, r5, r6, lr}
    622e:	4604      	mov	r4, r0
    6230:	460d      	mov	r5, r1
	FAIL_IF(state->payload >= state->payload_end);
    6232:	d212      	bcs.n	625a <intx32_decode+0x34>
	uint8_t major_type = MAJOR_TYPE(*state->payload);
    6234:	781b      	ldrb	r3, [r3, #0]
	if (major_type != CBOR_MAJOR_TYPE_PINT
    6236:	2b3f      	cmp	r3, #63	; 0x3f
	uint8_t major_type = MAJOR_TYPE(*state->payload);
    6238:	ea4f 1653 	mov.w	r6, r3, lsr #5
	if (major_type != CBOR_MAJOR_TYPE_PINT
    623c:	d80d      	bhi.n	625a <intx32_decode+0x34>
	if (!value_extract(state, &uint_result, 4)) {
    623e:	2204      	movs	r2, #4
    6240:	eb0d 0102 	add.w	r1, sp, r2
    6244:	f7ff ff72 	bl	612c <value_extract>
    6248:	b168      	cbz	r0, 6266 <intx32_decode+0x40>
	if (uint_result >= (1 << (8*sizeof(uint_result)-1))) {
    624a:	9b01      	ldr	r3, [sp, #4]
    624c:	2b00      	cmp	r3, #0
    624e:	da06      	bge.n	625e <intx32_decode+0x38>
		FAIL_RESTORE();
    6250:	6863      	ldr	r3, [r4, #4]
    6252:	6023      	str	r3, [r4, #0]
    6254:	68a3      	ldr	r3, [r4, #8]
    6256:	3301      	adds	r3, #1
    6258:	60a3      	str	r3, [r4, #8]
	FAIL_IF(state->payload >= state->payload_end);
    625a:	2000      	movs	r0, #0
    625c:	e003      	b.n	6266 <intx32_decode+0x40>
	if (major_type == CBOR_MAJOR_TYPE_NINT) {
    625e:	2e01      	cmp	r6, #1
		int_result = -1 - uint_result;
    6260:	bf08      	it	eq
    6262:	43db      	mvneq	r3, r3
	*result = int_result;
    6264:	602b      	str	r3, [r5, #0]
}
    6266:	b002      	add	sp, #8
    6268:	bd70      	pop	{r4, r5, r6, pc}

0000626a <strx_decode>:
{
    626a:	b538      	push	{r3, r4, r5, lr}
    626c:	4604      	mov	r4, r0
    626e:	460d      	mov	r5, r1
	if (!strx_start_decode(state, result, exp_major_type)) {
    6270:	f7ff ff9b 	bl	61aa <strx_start_decode>
    6274:	b118      	cbz	r0, 627e <strx_decode+0x14>
	(state->payload) += result->len;
    6276:	6823      	ldr	r3, [r4, #0]
    6278:	686a      	ldr	r2, [r5, #4]
    627a:	4413      	add	r3, r2
    627c:	6023      	str	r3, [r4, #0]
}
    627e:	bd38      	pop	{r3, r4, r5, pc}

00006280 <strx_expect>:
{
    6280:	b573      	push	{r0, r1, r4, r5, r6, lr}
    6282:	460e      	mov	r6, r1
	if (!strx_decode(state, &tmp_result, exp_major_type)) {
    6284:	4669      	mov	r1, sp
{
    6286:	4604      	mov	r4, r0
	if (!strx_decode(state, &tmp_result, exp_major_type)) {
    6288:	f7ff ffef 	bl	626a <strx_decode>
    628c:	4605      	mov	r5, r0
    628e:	b148      	cbz	r0, 62a4 <strx_expect+0x24>
	if ((tmp_result.len != result->len)
    6290:	9a01      	ldr	r2, [sp, #4]
    6292:	6873      	ldr	r3, [r6, #4]
    6294:	429a      	cmp	r2, r3
    6296:	d008      	beq.n	62aa <strx_expect+0x2a>
		FAIL_RESTORE();
    6298:	6863      	ldr	r3, [r4, #4]
    629a:	6023      	str	r3, [r4, #0]
    629c:	68a3      	ldr	r3, [r4, #8]
    629e:	3301      	adds	r3, #1
    62a0:	60a3      	str	r3, [r4, #8]
    62a2:	2500      	movs	r5, #0
}
    62a4:	4628      	mov	r0, r5
    62a6:	b002      	add	sp, #8
    62a8:	bd70      	pop	{r4, r5, r6, pc}
			|| memcmp(result->value, tmp_result.value, tmp_result.len)) {
    62aa:	9900      	ldr	r1, [sp, #0]
    62ac:	6830      	ldr	r0, [r6, #0]
    62ae:	f000 f9b6 	bl	661e <memcmp>
    62b2:	2800      	cmp	r0, #0
    62b4:	d0f6      	beq.n	62a4 <strx_expect+0x24>
    62b6:	e7ef      	b.n	6298 <strx_expect+0x18>

000062b8 <bstrx_decode>:
	return strx_decode(state, result, CBOR_MAJOR_TYPE_BSTR);
    62b8:	2202      	movs	r2, #2
    62ba:	f7ff bfd6 	b.w	626a <strx_decode>

000062be <tstrx_expect>:
	return strx_expect(state, result, CBOR_MAJOR_TYPE_TSTR);
    62be:	2203      	movs	r2, #3
    62c0:	f7ff bfde 	b.w	6280 <strx_expect>

000062c4 <map_start_decode>:
	return list_map_start_decode(state, CBOR_MAJOR_TYPE_LIST);
}


bool map_start_decode(cbor_state_t *state)
{
    62c4:	b510      	push	{r4, lr}
	bool ret = list_map_start_decode(state, CBOR_MAJOR_TYPE_MAP);
    62c6:	2105      	movs	r1, #5
{
    62c8:	4604      	mov	r4, r0
	bool ret = list_map_start_decode(state, CBOR_MAJOR_TYPE_MAP);
    62ca:	f7ff ff8e 	bl	61ea <list_map_start_decode>

	if (ret) {
    62ce:	b110      	cbz	r0, 62d6 <map_start_decode+0x12>
		state->elem_count *= 2;
    62d0:	68a3      	ldr	r3, [r4, #8]
    62d2:	005b      	lsls	r3, r3, #1
    62d4:	60a3      	str	r3, [r4, #8]
	}
	return ret;
}
    62d6:	bd10      	pop	{r4, pc}

000062d8 <list_map_end_decode>:


bool list_map_end_decode(cbor_state_t *state)
{
	if (!restore_backup(state,
    62d8:	2200      	movs	r2, #0
    62da:	2107      	movs	r1, #7
    62dc:	f000 b912 	b.w	6504 <restore_backup>

000062e0 <map_end_decode>:
    62e0:	f7ff bffa 	b.w	62d8 <list_map_end_decode>

000062e4 <multi_decode>:
		uint32_t *num_decode,
		cbor_decoder_t decoder,
		cbor_state_t *state,
		void *result,
		uint32_t result_len)
{
    62e4:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
    62e8:	e9dd 570c 	ldrd	r5, r7, [sp, #48]	; 0x30
    62ec:	4682      	mov	sl, r0
    62ee:	4688      	mov	r8, r1
    62f0:	4616      	mov	r6, r2
    62f2:	469b      	mov	fp, r3
	for (uint32_t i = 0; i < max_decode; i++) {
    62f4:	2400      	movs	r4, #0
    62f6:	4544      	cmp	r4, r8
    62f8:	d102      	bne.n	6300 <multi_decode+0x1c>
			}
			return true;
		}
	}
	cbor_print("Found %zu elements.\n", max_decode);
	*num_decode = max_decode;
    62fa:	6034      	str	r4, [r6, #0]
	return true;
    62fc:	2001      	movs	r0, #1
    62fe:	e013      	b.n	6328 <multi_decode+0x44>
		uint8_t const *payload_bak = state->payload;
    6300:	682a      	ldr	r2, [r5, #0]
    6302:	9201      	str	r2, [sp, #4]
		if (!decoder(state,
    6304:	4639      	mov	r1, r7
    6306:	4628      	mov	r0, r5
		uint32_t elem_count_bak = state->elem_count;
    6308:	f8d5 9008 	ldr.w	r9, [r5, #8]
		if (!decoder(state,
    630c:	47d8      	blx	fp
    630e:	9b0e      	ldr	r3, [sp, #56]	; 0x38
    6310:	9a01      	ldr	r2, [sp, #4]
    6312:	441f      	add	r7, r3
    6314:	b958      	cbnz	r0, 632e <multi_decode+0x4a>
			if (i < min_decode) {
    6316:	4554      	cmp	r4, sl
			*num_decode = i;
    6318:	6034      	str	r4, [r6, #0]
			if (i < min_decode) {
    631a:	bf38      	it	cc
    631c:	2000      	movcc	r0, #0
			state->payload = payload_bak;
    631e:	602a      	str	r2, [r5, #0]
			state->elem_count = elem_count_bak;
    6320:	f8c5 9008 	str.w	r9, [r5, #8]
			if (i < min_decode) {
    6324:	bf28      	it	cs
    6326:	2001      	movcs	r0, #1
}
    6328:	b003      	add	sp, #12
    632a:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
	for (uint32_t i = 0; i < max_decode; i++) {
    632e:	3401      	adds	r4, #1
    6330:	e7e1      	b.n	62f6 <multi_decode+0x12>

00006332 <get_result_len>:
	return true;
}


static uint32_t get_result_len(const void *const input, uint32_t max_result_len)
{
    6332:	b510      	push	{r4, lr}
    6334:	4603      	mov	r3, r0
	uint8_t *u8_result  = (uint8_t *)input;
	size_t i;

	for (i = 0; i < max_result_len; i++) {
    6336:	2200      	movs	r2, #0
    6338:	4408      	add	r0, r1
#ifdef CONFIG_BIG_ENDIAN
		size_t idx = i;
#else
		size_t idx = max_result_len - 1 - i;
#endif
		if (u8_result[idx] != 0) {
    633a:	f810 4d01 	ldrb.w	r4, [r0, #-1]!
    633e:	b914      	cbnz	r4, 6346 <get_result_len+0x14>
	for (i = 0; i < max_result_len; i++) {
    6340:	3201      	adds	r2, #1
    6342:	4291      	cmp	r1, r2
    6344:	d1f9      	bne.n	633a <get_result_len+0x8>
			break;
		}
	}
	max_result_len -= i;
    6346:	1a89      	subs	r1, r1, r2

	/* According to specification result length can be encoded on 1, 2, 4
	 * or 8 bytes.
	 */
	cbor_assert(max_result_len <= 8, "Up to 8 bytes can be used to encode length.\n");
	size_t encode_byte_cnt = 1;
    6348:	2001      	movs	r0, #1
	max_result_len -= i;
    634a:	2204      	movs	r2, #4

	for (size_t i = 0; i <= 3; i++) {
		if (max_result_len <= encode_byte_cnt) {
    634c:	4281      	cmp	r1, r0
    634e:	d904      	bls.n	635a <get_result_len+0x28>
	for (size_t i = 0; i <= 3; i++) {
    6350:	3a01      	subs	r2, #1
			max_result_len = encode_byte_cnt;
			break;
		}

		encode_byte_cnt *= 2;
    6352:	ea4f 0040 	mov.w	r0, r0, lsl #1
	for (size_t i = 0; i <= 3; i++) {
    6356:	d1f9      	bne.n	634c <get_result_len+0x1a>
    6358:	4608      	mov	r0, r1
	}

	if ((max_result_len == 1) && (u8_result[0] <= VALUE_IN_HEADER)) {
    635a:	2801      	cmp	r0, #1
    635c:	d104      	bne.n	6368 <get_result_len+0x36>
    635e:	7818      	ldrb	r0, [r3, #0]
    6360:	2817      	cmp	r0, #23
    6362:	bf94      	ite	ls
    6364:	2000      	movls	r0, #0
    6366:	2001      	movhi	r0, #1
		max_result_len = 0;
	}

	return max_result_len;
}
    6368:	bd10      	pop	{r4, pc}

0000636a <get_additional>:
	switch(len) {
    636a:	2808      	cmp	r0, #8
    636c:	d80f      	bhi.n	638e <get_additional+0x24>
    636e:	e8df f000 	tbb	[pc, r0]
    6372:	0506      	.short	0x0506
    6374:	0a0a0808 	.word	0x0a0a0808
    6378:	0a0a      	.short	0x0a0a
    637a:	0c          	.byte	0x0c
    637b:	00          	.byte	0x00
		case 4: return 26;
    637c:	2118      	movs	r1, #24
}
    637e:	4608      	mov	r0, r1
    6380:	4770      	bx	lr
		case 2: return 25;
    6382:	2119      	movs	r1, #25
    6384:	e7fb      	b.n	637e <get_additional+0x14>
		case 4: return 26;
    6386:	211a      	movs	r1, #26
    6388:	e7f9      	b.n	637e <get_additional+0x14>
		case 8: return 27;
    638a:	211b      	movs	r1, #27
    638c:	e7f7      	b.n	637e <get_additional+0x14>
	return 0;
    638e:	2100      	movs	r1, #0
    6390:	e7f5      	b.n	637e <get_additional+0x14>

00006392 <value_encode>:


static bool value_encode(cbor_state_t *state, cbor_major_type_t major_type,
		const void *const input, uint32_t max_result_len)
{
    6392:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    6396:	4604      	mov	r4, r0
    6398:	460f      	mov	r7, r1
	cbor_assert(max_result_len != 0, "0-length result not supported.\n");
	return value_encode_len(state, major_type, input,
    639a:	4610      	mov	r0, r2
    639c:	4619      	mov	r1, r3
{
    639e:	4616      	mov	r6, r2
	return value_encode_len(state, major_type, input,
    63a0:	f7ff ffc7 	bl	6332 <get_result_len>
	if ((state->payload + 1 + result_len) > state->payload_end) {
    63a4:	6822      	ldr	r2, [r4, #0]
    63a6:	68e1      	ldr	r1, [r4, #12]
    63a8:	1c43      	adds	r3, r0, #1
    63aa:	4413      	add	r3, r2
    63ac:	4299      	cmp	r1, r3
	return value_encode_len(state, major_type, input,
    63ae:	4605      	mov	r5, r0
	if ((state->payload + 1 + result_len) > state->payload_end) {
    63b0:	d31d      	bcc.n	63ee <value_encode+0x5c>
	if ((state->payload + 1) > state->payload_end) {
    63b2:	f102 0801 	add.w	r8, r2, #1
    63b6:	4541      	cmp	r1, r8
    63b8:	d319      	bcc.n	63ee <value_encode+0x5c>
	if (!encode_header_byte(state, major_type,
    63ba:	7831      	ldrb	r1, [r6, #0]
    63bc:	f7ff ffd5 	bl	636a <get_additional>
	*(state->payload_mut++) = (major_type << 5) | (additional & 0x1F);
    63c0:	f000 001f 	and.w	r0, r0, #31
    63c4:	ea40 1147 	orr.w	r1, r0, r7, lsl #5
    63c8:	f8c4 8000 	str.w	r8, [r4]
    63cc:	1970      	adds	r0, r6, r5
    63ce:	7011      	strb	r1, [r2, #0]
	for (; result_len > 0; result_len--) {
    63d0:	42b0      	cmp	r0, r6
    63d2:	d105      	bne.n	63e0 <value_encode+0x4e>
	state->elem_count++;
    63d4:	68a3      	ldr	r3, [r4, #8]
    63d6:	3301      	adds	r3, #1
    63d8:	60a3      	str	r3, [r4, #8]
	return true;
    63da:	2001      	movs	r0, #1
				get_result_len(input, max_result_len));
}
    63dc:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
		*(state->payload_mut++) = u8_result[result_len - 1];
    63e0:	6823      	ldr	r3, [r4, #0]
    63e2:	1c5a      	adds	r2, r3, #1
    63e4:	6022      	str	r2, [r4, #0]
    63e6:	f810 2d01 	ldrb.w	r2, [r0, #-1]!
    63ea:	701a      	strb	r2, [r3, #0]
	for (; result_len > 0; result_len--) {
    63ec:	e7f0      	b.n	63d0 <value_encode+0x3e>
		FAIL();
    63ee:	2000      	movs	r0, #0
    63f0:	e7f4      	b.n	63dc <value_encode+0x4a>

000063f2 <uint32_encode>:
}


static bool uint32_encode(cbor_state_t *state, const uint32_t *input,
		cbor_major_type_t major_type)
{
    63f2:	b410      	push	{r4}
    63f4:	460c      	mov	r4, r1
	if (!value_encode(state, major_type, input, 4)) {
    63f6:	2304      	movs	r3, #4
{
    63f8:	4611      	mov	r1, r2
	if (!value_encode(state, major_type, input, 4)) {
    63fa:	4622      	mov	r2, r4
		FAIL();
	}
	return true;
}
    63fc:	bc10      	pop	{r4}
	if (!value_encode(state, major_type, input, 4)) {
    63fe:	f7ff bfc8 	b.w	6392 <value_encode>

00006402 <strx_start_encode>:
}


static bool strx_start_encode(cbor_state_t *state,
		const cbor_string_type_t *input, cbor_major_type_t major_type)
{
    6402:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    6404:	460d      	mov	r5, r1
    6406:	4604      	mov	r4, r0
	if (input->value && ((get_result_len(&input->len, sizeof(input->len))
    6408:	f855 3b04 	ldr.w	r3, [r5], #4
{
    640c:	460e      	mov	r6, r1
    640e:	4617      	mov	r7, r2
	if (input->value && ((get_result_len(&input->len, sizeof(input->len))
    6410:	b15b      	cbz	r3, 642a <strx_start_encode+0x28>
    6412:	2104      	movs	r1, #4
    6414:	4628      	mov	r0, r5
    6416:	f7ff ff8c 	bl	6332 <get_result_len>
			+ 1 + input->len + (size_t)state->payload)
    641a:	6872      	ldr	r2, [r6, #4]
    641c:	6823      	ldr	r3, [r4, #0]
    641e:	4413      	add	r3, r2
    6420:	3301      	adds	r3, #1
	if (input->value && ((get_result_len(&input->len, sizeof(input->len))
    6422:	68e2      	ldr	r2, [r4, #12]
			+ 1 + input->len + (size_t)state->payload)
    6424:	4403      	add	r3, r0
	if (input->value && ((get_result_len(&input->len, sizeof(input->len))
    6426:	429a      	cmp	r2, r3
    6428:	d306      	bcc.n	6438 <strx_start_encode+0x36>
			> (size_t)state->payload_end)) {
		FAIL();
	}
	if (!uint32_encode(state, &input->len, major_type)) {
    642a:	463a      	mov	r2, r7
    642c:	4629      	mov	r1, r5
    642e:	4620      	mov	r0, r4
		FAIL();
	}

	return true;
}
    6430:	e8bd 40f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, lr}
	if (!uint32_encode(state, &input->len, major_type)) {
    6434:	f7ff bfdd 	b.w	63f2 <uint32_encode>
}
    6438:	2000      	movs	r0, #0
    643a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

0000643c <uintx32_put>:
{
    643c:	b507      	push	{r0, r1, r2, lr}
	if (!uint32_encode(state, &input, CBOR_MAJOR_TYPE_PINT)) {
    643e:	2200      	movs	r2, #0
{
    6440:	9101      	str	r1, [sp, #4]
	if (!uint32_encode(state, &input, CBOR_MAJOR_TYPE_PINT)) {
    6442:	a901      	add	r1, sp, #4
    6444:	f7ff ffd5 	bl	63f2 <uint32_encode>
}
    6448:	b003      	add	sp, #12
    644a:	f85d fb04 	ldr.w	pc, [sp], #4

0000644e <tstrx_encode>:
	return strx_encode(state, input, CBOR_MAJOR_TYPE_BSTR);
}


bool tstrx_encode(cbor_state_t *state, const cbor_string_type_t *input)
{
    644e:	b570      	push	{r4, r5, r6, lr}
	if (!strx_start_encode(state, input, major_type)) {
    6450:	2203      	movs	r2, #3
{
    6452:	4604      	mov	r4, r0
    6454:	460e      	mov	r6, r1
	if (!strx_start_encode(state, input, major_type)) {
    6456:	f7ff ffd4 	bl	6402 <strx_start_encode>
    645a:	4605      	mov	r5, r0
    645c:	b170      	cbz	r0, 647c <tstrx_encode+0x2e>
	if (input->len > (state->payload_end - state->payload)) {
    645e:	6820      	ldr	r0, [r4, #0]
    6460:	68e3      	ldr	r3, [r4, #12]
    6462:	6872      	ldr	r2, [r6, #4]
    6464:	1a1b      	subs	r3, r3, r0
    6466:	429a      	cmp	r2, r3
    6468:	d80a      	bhi.n	6480 <tstrx_encode+0x32>
	if (state->payload_mut != input->value) {
    646a:	6831      	ldr	r1, [r6, #0]
    646c:	4288      	cmp	r0, r1
    646e:	d001      	beq.n	6474 <tstrx_encode+0x26>
		memmove(state->payload_mut, input->value, input->len);
    6470:	f000 f8e5 	bl	663e <memmove>
	state->payload += input->len;
    6474:	6823      	ldr	r3, [r4, #0]
    6476:	6872      	ldr	r2, [r6, #4]
    6478:	4413      	add	r3, r2
    647a:	6023      	str	r3, [r4, #0]
	return strx_encode(state, input, CBOR_MAJOR_TYPE_TSTR);
}
    647c:	4628      	mov	r0, r5
    647e:	bd70      	pop	{r4, r5, r6, pc}
		FAIL();
    6480:	2500      	movs	r5, #0
    6482:	e7fb      	b.n	647c <tstrx_encode+0x2e>

00006484 <list_start_encode>:
	if ((state->payload + 1) > state->payload_end) {
    6484:	6803      	ldr	r3, [r0, #0]
    6486:	68c1      	ldr	r1, [r0, #12]
    6488:	1c5a      	adds	r2, r3, #1
    648a:	428a      	cmp	r2, r1
	*(state->payload_mut++) = (major_type << 5) | (additional & 0x1F);
    648c:	bf9f      	itttt	ls
    648e:	6002      	strls	r2, [r0, #0]
    6490:	229f      	movls	r2, #159	; 0x9f
#else
	if (!encode_header_byte(state, major_type, 31)) {
		FAIL();
	}
#endif
	return true;
    6492:	2001      	movls	r0, #1
	*(state->payload_mut++) = (major_type << 5) | (additional & 0x1F);
    6494:	701a      	strbls	r2, [r3, #0]
		FAIL();
    6496:	bf88      	it	hi
    6498:	2000      	movhi	r0, #0


bool list_start_encode(cbor_state_t *state, uint32_t max_num)
{
	return list_map_start_encode(state, max_num, CBOR_MAJOR_TYPE_LIST);
}
    649a:	4770      	bx	lr

0000649c <map_start_encode>:
	if ((state->payload + 1) > state->payload_end) {
    649c:	6803      	ldr	r3, [r0, #0]
    649e:	68c1      	ldr	r1, [r0, #12]
    64a0:	1c5a      	adds	r2, r3, #1
    64a2:	428a      	cmp	r2, r1
	*(state->payload_mut++) = (major_type << 5) | (additional & 0x1F);
    64a4:	bf9f      	itttt	ls
    64a6:	6002      	strls	r2, [r0, #0]
    64a8:	22bf      	movls	r2, #191	; 0xbf
	return true;
    64aa:	2001      	movls	r0, #1
	*(state->payload_mut++) = (major_type << 5) | (additional & 0x1F);
    64ac:	701a      	strbls	r2, [r3, #0]
		FAIL();
    64ae:	bf88      	it	hi
    64b0:	2000      	movhi	r0, #0


bool map_start_encode(cbor_state_t *state, uint32_t max_num)
{
	return list_map_start_encode(state, max_num, CBOR_MAJOR_TYPE_MAP);
}
    64b2:	4770      	bx	lr

000064b4 <list_map_end_encode>:
	if ((state->payload + 1) > state->payload_end) {
    64b4:	6803      	ldr	r3, [r0, #0]
    64b6:	68c1      	ldr	r1, [r0, #12]
    64b8:	1c5a      	adds	r2, r3, #1
    64ba:	428a      	cmp	r2, r1
	*(state->payload_mut++) = (major_type << 5) | (additional & 0x1F);
    64bc:	bf9f      	itttt	ls
    64be:	6002      	strls	r2, [r0, #0]
    64c0:	22ff      	movls	r2, #255	; 0xff
#else
	if (!encode_header_byte(state, CBOR_MAJOR_TYPE_PRIM, 31)) {
		FAIL();
	}
#endif
	return true;
    64c2:	2001      	movls	r0, #1
	*(state->payload_mut++) = (major_type << 5) | (additional & 0x1F);
    64c4:	701a      	strbls	r2, [r3, #0]
		FAIL();
    64c6:	bf88      	it	hi
    64c8:	2000      	movhi	r0, #0
}
    64ca:	4770      	bx	lr

000064cc <list_end_encode>:


bool list_end_encode(cbor_state_t *state, uint32_t max_num)
{
	return list_map_end_encode(state, max_num, CBOR_MAJOR_TYPE_LIST);
    64cc:	2204      	movs	r2, #4
    64ce:	f7ff bff1 	b.w	64b4 <list_map_end_encode>

000064d2 <map_end_encode>:
}


bool map_end_encode(cbor_state_t *state, uint32_t max_num)
{
	return list_map_end_encode(state, max_num, CBOR_MAJOR_TYPE_MAP);
    64d2:	2205      	movs	r2, #5
    64d4:	f7ff bfee 	b.w	64b4 <list_map_end_encode>

000064d8 <new_backup>:
_Static_assert((sizeof(size_t) == sizeof(void *)),
	"This code needs size_t to be the same length as pointers.");

bool new_backup(cbor_state_t *state, uint32_t new_elem_count)
{
	if ((state->backups->current_backup + 1)
    64d8:	6902      	ldr	r2, [r0, #16]
{
    64da:	b538      	push	{r3, r4, r5, lr}
	if ((state->backups->current_backup + 1)
    64dc:	6853      	ldr	r3, [r2, #4]
{
    64de:	460d      	mov	r5, r1
	if ((state->backups->current_backup + 1)
    64e0:	6891      	ldr	r1, [r2, #8]
    64e2:	3301      	adds	r3, #1
    64e4:	428b      	cmp	r3, r1
{
    64e6:	4604      	mov	r4, r0
	if ((state->backups->current_backup + 1)
    64e8:	d20a      	bcs.n	6500 <new_backup+0x28>
		>= state->backups->num_backups) {
		FAIL();
	}

	uint32_t i = ++(state->backups->current_backup);
	memcpy(&state->backups->backup_list[i], state,
    64ea:	6810      	ldr	r0, [r2, #0]
	uint32_t i = ++(state->backups->current_backup);
    64ec:	6053      	str	r3, [r2, #4]
	memcpy(&state->backups->backup_list[i], state,
    64ee:	2214      	movs	r2, #20
    64f0:	4621      	mov	r1, r4
    64f2:	fb02 0003 	mla	r0, r2, r3, r0
    64f6:	f000 f8b9 	bl	666c <memcpy>
		sizeof(cbor_state_t));

	state->elem_count = new_elem_count;
    64fa:	60a5      	str	r5, [r4, #8]

	return true;
    64fc:	2001      	movs	r0, #1
}
    64fe:	bd38      	pop	{r3, r4, r5, pc}
		FAIL();
    6500:	2000      	movs	r0, #0
    6502:	e7fc      	b.n	64fe <new_backup+0x26>

00006504 <restore_backup>:


bool restore_backup(cbor_state_t *state, uint32_t flags,
		uint32_t max_elem_count)
{
    6504:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    6508:	4616      	mov	r6, r2
	const uint8_t *payload = state->payload;
	const uint32_t elem_count = state->elem_count;

	if (state->backups->current_backup == 0) {
    650a:	6902      	ldr	r2, [r0, #16]
    650c:	6853      	ldr	r3, [r2, #4]
{
    650e:	4604      	mov	r4, r0
    6510:	460d      	mov	r5, r1
	if (state->backups->current_backup == 0) {
    6512:	b913      	cbnz	r3, 651a <restore_backup+0x16>
		FAIL();
    6514:	2000      	movs	r0, #0
	if (flags & FLAG_TRANSFER_PAYLOAD) {
		state->payload = payload;
	}

	return true;
}
    6516:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
	if (flags & FLAG_RESTORE) {
    651a:	07e9      	lsls	r1, r5, #31
	const uint8_t *payload = state->payload;
    651c:	6807      	ldr	r7, [r0, #0]
	const uint32_t elem_count = state->elem_count;
    651e:	f8d0 8008 	ldr.w	r8, [r0, #8]
	if (flags & FLAG_RESTORE) {
    6522:	d505      	bpl.n	6530 <restore_backup+0x2c>
		memcpy(state, &state->backups->backup_list[i],
    6524:	6811      	ldr	r1, [r2, #0]
    6526:	2214      	movs	r2, #20
    6528:	fb02 1103 	mla	r1, r2, r3, r1
    652c:	f000 f89e 	bl	666c <memcpy>
	if (flags & FLAG_DISCARD) {
    6530:	07aa      	lsls	r2, r5, #30
		state->backups->current_backup--;
    6532:	bf41      	itttt	mi
    6534:	6922      	ldrmi	r2, [r4, #16]
    6536:	6853      	ldrmi	r3, [r2, #4]
    6538:	f103 33ff 	addmi.w	r3, r3, #4294967295
    653c:	6053      	strmi	r3, [r2, #4]
	if (elem_count > max_elem_count) {
    653e:	45b0      	cmp	r8, r6
    6540:	d8e8      	bhi.n	6514 <restore_backup+0x10>
	if (flags & FLAG_TRANSFER_PAYLOAD) {
    6542:	076b      	lsls	r3, r5, #29
		state->payload = payload;
    6544:	bf48      	it	mi
    6546:	6027      	strmi	r7, [r4, #0]
	return true;
    6548:	2001      	movs	r0, #1
    654a:	e7e4      	b.n	6516 <restore_backup+0x12>

0000654c <union_start_code>:


bool union_start_code(cbor_state_t *state)
{
	if (!new_backup(state, state->elem_count)) {
    654c:	6881      	ldr	r1, [r0, #8]
    654e:	f7ff bfc3 	b.w	64d8 <new_backup>

00006552 <union_elem_code>:
}


bool union_elem_code(cbor_state_t *state)
{
	if (!restore_backup(state, FLAG_RESTORE, state->elem_count)) {
    6552:	6882      	ldr	r2, [r0, #8]
    6554:	2101      	movs	r1, #1
    6556:	f7ff bfd5 	b.w	6504 <restore_backup>

0000655a <union_end_code>:
	return true;
}

bool union_end_code(cbor_state_t *state)
{
	if (!restore_backup(state, FLAG_DISCARD, state->elem_count)) {
    655a:	6882      	ldr	r2, [r0, #8]
    655c:	2102      	movs	r1, #2
    655e:	f7ff bfd1 	b.w	6504 <restore_backup>

00006562 <entry_function>:
}

bool entry_function(const uint8_t *payload, uint32_t payload_len,
		const void *struct_ptr, uint32_t *payload_len_out,
		cbor_encoder_t func, uint32_t elem_count, uint32_t num_backups)
{
    6562:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    6566:	b088      	sub	sp, #32
    6568:	af00      	add	r7, sp, #0
    656a:	4605      	mov	r5, r0
    656c:	6c38      	ldr	r0, [r7, #64]	; 0x40
		.backup_list = state_backups,
		.current_backup = 0,
		.num_backups = num_backups + 1,
	};

	state.backups = &backups;
    656e:	61ff      	str	r7, [r7, #28]
	cbor_state_t state_backups[num_backups + 1];
    6570:	2414      	movs	r4, #20
{
    6572:	460e      	mov	r6, r1
	cbor_state_t state_backups[num_backups + 1];
    6574:	fb00 4404 	mla	r4, r0, r4, r4
	cbor_state_t state = {
    6578:	6bf9      	ldr	r1, [r7, #60]	; 0x3c
    657a:	6179      	str	r1, [r7, #20]
	cbor_state_t state_backups[num_backups + 1];
    657c:	3407      	adds	r4, #7
		.payload_end = payload + payload_len,
    657e:	19a9      	adds	r1, r5, r6
{
    6580:	4698      	mov	r8, r3
	cbor_state_t state = {
    6582:	61b9      	str	r1, [r7, #24]
    6584:	2300      	movs	r3, #0
	cbor_state_t state_backups[num_backups + 1];
    6586:	1c41      	adds	r1, r0, #1
    6588:	f024 0407 	bic.w	r4, r4, #7
	cbor_state_backups_t backups = {
    658c:	e9c7 3101 	strd	r3, r1, [r7, #4]
	cbor_state_t state = {
    6590:	e9c7 5303 	strd	r5, r3, [r7, #12]
	cbor_state_t state_backups[num_backups + 1];
    6594:	ebad 0d04 	sub.w	sp, sp, r4

	bool result = func(&state, struct_ptr);
    6598:	6bbb      	ldr	r3, [r7, #56]	; 0x38
	cbor_state_backups_t backups = {
    659a:	f8c7 d000 	str.w	sp, [r7]
	bool result = func(&state, struct_ptr);
    659e:	4611      	mov	r1, r2
    65a0:	f107 000c 	add.w	r0, r7, #12
    65a4:	4798      	blx	r3

	if (result && (payload_len_out != NULL)) {
    65a6:	b150      	cbz	r0, 65be <entry_function+0x5c>
    65a8:	f1b8 0f00 	cmp.w	r8, #0
    65ac:	d007      	beq.n	65be <entry_function+0x5c>
		*payload_len_out = MIN(payload_len,
    65ae:	68fb      	ldr	r3, [r7, #12]
    65b0:	1b5d      	subs	r5, r3, r5
    65b2:	42b5      	cmp	r5, r6
    65b4:	bf94      	ite	ls
    65b6:	f8c8 5000 	strls.w	r5, [r8]
    65ba:	f8c8 6000 	strhi.w	r6, [r8]
				(size_t)state.payload - (size_t)payload);
	}
	return result;
}
    65be:	3720      	adds	r7, #32
    65c0:	46bd      	mov	sp, r7
    65c2:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

000065c6 <z_do_kernel_oops>:
 *   fault handler will executed insted of the SVC.
 *
 * @param esf exception frame
 */
void z_do_kernel_oops(const z_arch_esf_t *esf)
{
    65c6:	4601      	mov	r1, r0
	}

#endif /* CONFIG_USERSPACE */

#if !defined(CONFIG_EXTRA_EXCEPTION_INFO)
	z_arm_fatal_error(reason, esf);
    65c8:	6800      	ldr	r0, [r0, #0]
    65ca:	f7fc b92f 	b.w	282c <z_arm_fatal_error>

000065ce <z_irq_spurious>:
 */
void z_irq_spurious(const void *unused)
{
	ARG_UNUSED(unused);

	z_arm_fatal_error(K_ERR_SPURIOUS_IRQ, NULL);
    65ce:	2100      	movs	r1, #0
    65d0:	2001      	movs	r0, #1
    65d2:	f7fc b92b 	b.w	282c <z_arm_fatal_error>

000065d6 <z_arm_nmi>:
 *
 * @return N/A
 */

void z_arm_nmi(void)
{
    65d6:	b508      	push	{r3, lr}
	handler();
    65d8:	f7fc f98c 	bl	28f4 <z_SysNmiOnReset>
	z_arm_int_exit();
}
    65dc:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
	z_arm_int_exit();
    65e0:	f7fc b9fe 	b.w	29e0 <z_arm_exc_exit>

000065e4 <strcpy>:

char *strcpy(char *ZRESTRICT d, const char *ZRESTRICT s)
{
	char *dest = d;

	while (*s != '\0') {
    65e4:	3901      	subs	r1, #1
    65e6:	4603      	mov	r3, r0
    65e8:	f811 2f01 	ldrb.w	r2, [r1, #1]!
    65ec:	b90a      	cbnz	r2, 65f2 <strcpy+0xe>
		*d = *s;
		d++;
		s++;
	}

	*d = '\0';
    65ee:	701a      	strb	r2, [r3, #0]

	return dest;
}
    65f0:	4770      	bx	lr
		*d = *s;
    65f2:	f803 2b01 	strb.w	r2, [r3], #1
		s++;
    65f6:	e7f7      	b.n	65e8 <strcpy+0x4>

000065f8 <strlen>:
 *
 * @return number of bytes in string <s>
 */

size_t strlen(const char *s)
{
    65f8:	4603      	mov	r3, r0
	size_t n = 0;
    65fa:	2000      	movs	r0, #0

	while (*s != '\0') {
    65fc:	5c1a      	ldrb	r2, [r3, r0]
    65fe:	b902      	cbnz	r2, 6602 <strlen+0xa>
		s++;
		n++;
	}

	return n;
}
    6600:	4770      	bx	lr
		n++;
    6602:	3001      	adds	r0, #1
    6604:	e7fa      	b.n	65fc <strlen+0x4>

00006606 <strcmp>:
 * @return negative # if <s1> < <s2>, 0 if <s1> == <s2>, else positive #
 */

int strcmp(const char *s1, const char *s2)
{
	while ((*s1 == *s2) && (*s1 != '\0')) {
    6606:	1e43      	subs	r3, r0, #1
    6608:	3901      	subs	r1, #1
    660a:	f813 2f01 	ldrb.w	r2, [r3, #1]!
    660e:	f811 0f01 	ldrb.w	r0, [r1, #1]!
    6612:	4282      	cmp	r2, r0
    6614:	d101      	bne.n	661a <strcmp+0x14>
    6616:	2a00      	cmp	r2, #0
    6618:	d1f7      	bne.n	660a <strcmp+0x4>
		s1++;
		s2++;
	}

	return *s1 - *s2;
}
    661a:	1a10      	subs	r0, r2, r0
    661c:	4770      	bx	lr

0000661e <memcmp>:
 * @brief Compare two memory areas
 *
 * @return negative # if <m1> < <m2>, 0 if <m1> == <m2>, else positive #
 */
int memcmp(const void *m1, const void *m2, size_t n)
{
    661e:	b510      	push	{r4, lr}
	const char *c1 = m1;
	const char *c2 = m2;

	if (!n) {
    6620:	b15a      	cbz	r2, 663a <memcmp+0x1c>
    6622:	3901      	subs	r1, #1
    6624:	1884      	adds	r4, r0, r2
		return 0;
	}

	while ((--n > 0) && (*c1 == *c2)) {
    6626:	f810 2b01 	ldrb.w	r2, [r0], #1
    662a:	f811 3f01 	ldrb.w	r3, [r1, #1]!
    662e:	42a0      	cmp	r0, r4
    6630:	d001      	beq.n	6636 <memcmp+0x18>
    6632:	429a      	cmp	r2, r3
    6634:	d0f7      	beq.n	6626 <memcmp+0x8>
		c1++;
		c2++;
	}

	return *c1 - *c2;
    6636:	1ad0      	subs	r0, r2, r3
}
    6638:	bd10      	pop	{r4, pc}
		return 0;
    663a:	4610      	mov	r0, r2
    663c:	e7fc      	b.n	6638 <memcmp+0x1a>

0000663e <memmove>:
void *memmove(void *d, const void *s, size_t n)
{
	char *dest = d;
	const char *src  = s;

	if ((size_t) (dest - src) < n) {
    663e:	1a43      	subs	r3, r0, r1
    6640:	4293      	cmp	r3, r2
{
    6642:	b510      	push	{r4, lr}
    6644:	eb00 0302 	add.w	r3, r0, r2
	if ((size_t) (dest - src) < n) {
    6648:	d308      	bcc.n	665c <memmove+0x1e>
    664a:	3901      	subs	r1, #1
	char *dest = d;
    664c:	4602      	mov	r2, r0
			n--;
			dest[n] = src[n];
		}
	} else {
		/* It is safe to perform a forward-copy */
		while (n > 0) {
    664e:	429a      	cmp	r2, r3
    6650:	d00b      	beq.n	666a <memmove+0x2c>
			*dest = *src;
    6652:	f811 4f01 	ldrb.w	r4, [r1, #1]!
    6656:	f802 4b01 	strb.w	r4, [r2], #1
			dest++;
			src++;
			n--;
    665a:	e7f8      	b.n	664e <memmove+0x10>
    665c:	440a      	add	r2, r1
			dest[n] = src[n];
    665e:	f812 4d01 	ldrb.w	r4, [r2, #-1]!
    6662:	f803 4d01 	strb.w	r4, [r3, #-1]!
		while (n > 0) {
    6666:	428a      	cmp	r2, r1
    6668:	d1f9      	bne.n	665e <memmove+0x20>
		}
	}

	return d;
}
    666a:	bd10      	pop	{r4, pc}

0000666c <memcpy>:
 *
 * @return pointer to start of destination buffer
 */

void *memcpy(void *ZRESTRICT d, const void *ZRESTRICT s, size_t n)
{
    666c:	b510      	push	{r4, lr}
    666e:	1e43      	subs	r3, r0, #1
    6670:	440a      	add	r2, r1
	}
#endif

	/* do byte-sized copying until finished */

	while (n > 0) {
    6672:	4291      	cmp	r1, r2
    6674:	d100      	bne.n	6678 <memcpy+0xc>
		*(d_byte++) = *(s_byte++);
		n--;
	}

	return d;
}
    6676:	bd10      	pop	{r4, pc}
		*(d_byte++) = *(s_byte++);
    6678:	f811 4b01 	ldrb.w	r4, [r1], #1
    667c:	f803 4f01 	strb.w	r4, [r3, #1]!
		n--;
    6680:	e7f7      	b.n	6672 <memcpy+0x6>

00006682 <memset>:
void *memset(void *buf, int c, size_t n)
{
	/* do byte-sized initialization until word-aligned or finished */

	unsigned char *d_byte = (unsigned char *)buf;
	unsigned char c_byte = (unsigned char)c;
    6682:	b2c9      	uxtb	r1, r1
	/* do byte-sized initialization until finished */

	d_byte = (unsigned char *)d_word;
#endif

	while (n > 0) {
    6684:	4402      	add	r2, r0
	unsigned char *d_byte = (unsigned char *)buf;
    6686:	4603      	mov	r3, r0
	while (n > 0) {
    6688:	4293      	cmp	r3, r2
    668a:	d100      	bne.n	668e <memset+0xc>
		*(d_byte++) = c_byte;
		n--;
	}

	return buf;
}
    668c:	4770      	bx	lr
		*(d_byte++) = c_byte;
    668e:	f803 1b01 	strb.w	r1, [r3], #1
		n--;
    6692:	e7f9      	b.n	6688 <memset+0x6>

00006694 <_stdout_hook_default>:
}
    6694:	f04f 30ff 	mov.w	r0, #4294967295
    6698:	4770      	bx	lr

0000669a <get_status>:
	return GET_STATUS(get_sub_data(dev, type)->flags);
    669a:	6902      	ldr	r2, [r0, #16]
    669c:	b2cb      	uxtb	r3, r1
    669e:	210c      	movs	r1, #12
    66a0:	fb03 2101 	mla	r1, r3, r1, r2
    66a4:	6c08      	ldr	r0, [r1, #64]	; 0x40
}
    66a6:	f000 0007 	and.w	r0, r0, #7
    66aa:	4770      	bx	lr

000066ac <set_off_state>:
	__asm__ volatile(
    66ac:	f04f 0320 	mov.w	r3, #32
    66b0:	f3ef 8211 	mrs	r2, BASEPRI
    66b4:	f383 8812 	msr	BASEPRI_MAX, r3
    66b8:	f3bf 8f6f 	isb	sy
	uint32_t current_ctx = GET_CTX(*flags);
    66bc:	6803      	ldr	r3, [r0, #0]
	if ((current_ctx != 0) && (current_ctx != ctx)) {
    66be:	f013 03c0 	ands.w	r3, r3, #192	; 0xc0
    66c2:	d001      	beq.n	66c8 <set_off_state+0x1c>
    66c4:	428b      	cmp	r3, r1
    66c6:	d107      	bne.n	66d8 <set_off_state+0x2c>
		*flags = CLOCK_CONTROL_STATUS_OFF;
    66c8:	2301      	movs	r3, #1
    66ca:	6003      	str	r3, [r0, #0]
	int err = 0;
    66cc:	2000      	movs	r0, #0
	__asm__ volatile(
    66ce:	f382 8811 	msr	BASEPRI, r2
    66d2:	f3bf 8f6f 	isb	sy
}
    66d6:	4770      	bx	lr
		err = -EPERM;
    66d8:	f04f 30ff 	mov.w	r0, #4294967295
    66dc:	e7f7      	b.n	66ce <set_off_state+0x22>

000066de <set_starting_state>:
{
    66de:	b510      	push	{r4, lr}
	__asm__ volatile(
    66e0:	f04f 0320 	mov.w	r3, #32
    66e4:	f3ef 8211 	mrs	r2, BASEPRI
    66e8:	f383 8812 	msr	BASEPRI_MAX, r3
    66ec:	f3bf 8f6f 	isb	sy
	uint32_t current_ctx = GET_CTX(*flags);
    66f0:	6803      	ldr	r3, [r0, #0]
	if ((*flags & (STATUS_MASK)) == CLOCK_CONTROL_STATUS_OFF) {
    66f2:	f003 0407 	and.w	r4, r3, #7
    66f6:	2c01      	cmp	r4, #1
    66f8:	d106      	bne.n	6708 <set_starting_state+0x2a>
		*flags = CLOCK_CONTROL_STATUS_STARTING | ctx;
    66fa:	6001      	str	r1, [r0, #0]
	int err = 0;
    66fc:	2000      	movs	r0, #0
	__asm__ volatile(
    66fe:	f382 8811 	msr	BASEPRI, r2
    6702:	f3bf 8f6f 	isb	sy
}
    6706:	bd10      	pop	{r4, pc}
	uint32_t current_ctx = GET_CTX(*flags);
    6708:	f003 03c0 	and.w	r3, r3, #192	; 0xc0
	} else if (current_ctx != ctx) {
    670c:	428b      	cmp	r3, r1
		err = -EALREADY;
    670e:	bf14      	ite	ne
    6710:	f04f 30ff 	movne.w	r0, #4294967295
    6714:	f06f 0077 	mvneq.w	r0, #119	; 0x77
    6718:	e7f1      	b.n	66fe <set_starting_state+0x20>

0000671a <set_on_state>:
	__asm__ volatile(
    671a:	f04f 0320 	mov.w	r3, #32
    671e:	f3ef 8211 	mrs	r2, BASEPRI
    6722:	f383 8812 	msr	BASEPRI_MAX, r3
    6726:	f3bf 8f6f 	isb	sy
	*flags = CLOCK_CONTROL_STATUS_ON | GET_CTX(*flags);
    672a:	6803      	ldr	r3, [r0, #0]
    672c:	f003 03c0 	and.w	r3, r3, #192	; 0xc0
    6730:	f043 0302 	orr.w	r3, r3, #2
    6734:	6003      	str	r3, [r0, #0]
	__asm__ volatile(
    6736:	f382 8811 	msr	BASEPRI, r2
    673a:	f3bf 8f6f 	isb	sy
}
    673e:	4770      	bx	lr

00006740 <api_blocking_start>:
}
    6740:	f06f 0085 	mvn.w	r0, #133	; 0x85
    6744:	4770      	bx	lr

00006746 <onoff_started_callback>:
	return &data->mgr[type];
    6746:	6900      	ldr	r0, [r0, #16]
{
    6748:	b410      	push	{r4}
	return &data->mgr[type];
    674a:	b2cb      	uxtb	r3, r1
	notify(mgr, 0);
    674c:	241c      	movs	r4, #28
    674e:	fb03 0004 	mla	r0, r3, r4, r0
    6752:	2100      	movs	r1, #0
}
    6754:	bc10      	pop	{r4}
	notify(mgr, 0);
    6756:	4710      	bx	r2

00006758 <lfclk_stop>:
    nrfx_clock_stop(NRF_CLOCK_DOMAIN_LFCLK);
    6758:	2000      	movs	r0, #0
    675a:	f7fe ba83 	b.w	4c64 <nrfx_clock_stop>

0000675e <api_stop>:
{
    675e:	b538      	push	{r3, r4, r5, lr}
    6760:	b2c9      	uxtb	r1, r1
	err = set_off_state(&subdata->flags, ctx);
    6762:	240c      	movs	r4, #12
    6764:	434c      	muls	r4, r1
{
    6766:	4605      	mov	r5, r0
	err = set_off_state(&subdata->flags, ctx);
    6768:	6900      	ldr	r0, [r0, #16]
    676a:	f104 0340 	add.w	r3, r4, #64	; 0x40
    676e:	2180      	movs	r1, #128	; 0x80
    6770:	4418      	add	r0, r3
    6772:	f7ff ff9b 	bl	66ac <set_off_state>
	if (err < 0) {
    6776:	2800      	cmp	r0, #0
    6778:	db04      	blt.n	6784 <api_stop+0x26>
	get_sub_config(dev, type)->stop();
    677a:	6869      	ldr	r1, [r5, #4]
    677c:	440c      	add	r4, r1
    677e:	6863      	ldr	r3, [r4, #4]
    6780:	4798      	blx	r3
	return 0;
    6782:	2000      	movs	r0, #0
}
    6784:	bd38      	pop	{r3, r4, r5, pc}

00006786 <api_start>:
{
    6786:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    678a:	b2c9      	uxtb	r1, r1
	err = set_starting_state(&subdata->flags, ctx);
    678c:	240c      	movs	r4, #12
	struct nrf_clock_control_sub_data *subdata = get_sub_data(dev, type);
    678e:	6905      	ldr	r5, [r0, #16]
	err = set_starting_state(&subdata->flags, ctx);
    6790:	434c      	muls	r4, r1
{
    6792:	4606      	mov	r6, r0
	err = set_starting_state(&subdata->flags, ctx);
    6794:	f104 0040 	add.w	r0, r4, #64	; 0x40
    6798:	2180      	movs	r1, #128	; 0x80
    679a:	4428      	add	r0, r5
{
    679c:	4690      	mov	r8, r2
    679e:	461f      	mov	r7, r3
	err = set_starting_state(&subdata->flags, ctx);
    67a0:	f7ff ff9d 	bl	66de <set_starting_state>
	if (err < 0) {
    67a4:	2800      	cmp	r0, #0
    67a6:	db06      	blt.n	67b6 <api_start+0x30>
	subdata->cb = cb;
    67a8:	4425      	add	r5, r4
	subdata->user_data = user_data;
    67aa:	e9c5 870e 	strd	r8, r7, [r5, #56]	; 0x38
	 get_sub_config(dev, type)->start();
    67ae:	6873      	ldr	r3, [r6, #4]
    67b0:	591b      	ldr	r3, [r3, r4]
    67b2:	4798      	blx	r3
	return 0;
    67b4:	2000      	movs	r0, #0
}
    67b6:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

000067ba <gpio_nrfx_port_get_raw>:
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    67ba:	6843      	ldr	r3, [r0, #4]
    67bc:	685b      	ldr	r3, [r3, #4]
    return p_reg->IN;
    67be:	f8d3 3510 	ldr.w	r3, [r3, #1296]	; 0x510
	*value = nrf_gpio_port_in_read(reg);
    67c2:	600b      	str	r3, [r1, #0]
}
    67c4:	2000      	movs	r0, #0
    67c6:	4770      	bx	lr

000067c8 <gpio_nrfx_port_set_masked_raw>:
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    67c8:	6843      	ldr	r3, [r0, #4]
    67ca:	685b      	ldr	r3, [r3, #4]
    return p_reg->OUT;
    67cc:	f8d3 0504 	ldr.w	r0, [r3, #1284]	; 0x504
	nrf_gpio_port_out_write(reg, value_tmp | (mask & value));
    67d0:	4042      	eors	r2, r0
    67d2:	400a      	ands	r2, r1
    67d4:	4042      	eors	r2, r0
    p_reg->OUT = value;
    67d6:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
}
    67da:	2000      	movs	r0, #0
    67dc:	4770      	bx	lr

000067de <gpio_nrfx_port_set_bits_raw>:
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    67de:	6843      	ldr	r3, [r0, #4]
    67e0:	685b      	ldr	r3, [r3, #4]
}
    67e2:	2000      	movs	r0, #0
    p_reg->OUTSET = set_mask;
    67e4:	f8c3 1508 	str.w	r1, [r3, #1288]	; 0x508
    67e8:	4770      	bx	lr

000067ea <gpio_nrfx_port_clear_bits_raw>:
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    67ea:	6843      	ldr	r3, [r0, #4]
    67ec:	685b      	ldr	r3, [r3, #4]
}
    67ee:	2000      	movs	r0, #0
    p_reg->OUTCLR = clr_mask;
    67f0:	f8c3 150c 	str.w	r1, [r3, #1292]	; 0x50c
    67f4:	4770      	bx	lr

000067f6 <gpio_nrfx_port_toggle_bits>:
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    67f6:	6843      	ldr	r3, [r0, #4]
    67f8:	685a      	ldr	r2, [r3, #4]
    return p_reg->OUT;
    67fa:	f8d2 3504 	ldr.w	r3, [r2, #1284]	; 0x504
	nrf_gpio_port_out_write(reg, value ^ mask);
    67fe:	404b      	eors	r3, r1
    p_reg->OUT = value;
    6800:	f8c2 3504 	str.w	r3, [r2, #1284]	; 0x504
}
    6804:	2000      	movs	r0, #0
    6806:	4770      	bx	lr

00006808 <gpio_nrfx_manage_callback>:
	return gpio_manage_callback(&get_port_data(port)->callbacks,
    6808:	6903      	ldr	r3, [r0, #16]
Z_GENLIST_IS_EMPTY(slist)
    680a:	6858      	ldr	r0, [r3, #4]
{
    680c:	b530      	push	{r4, r5, lr}
	if (!sys_slist_is_empty(callbacks)) {
    680e:	b158      	cbz	r0, 6828 <gpio_nrfx_manage_callback+0x20>
 */
static inline bool sys_slist_find_and_remove(sys_slist_t *list,
					     sys_snode_t *node);

/** @} */
Z_GENLIST_FIND_AND_REMOVE(slist, snode)
    6810:	2400      	movs	r4, #0
    6812:	4281      	cmp	r1, r0
    6814:	d113      	bne.n	683e <gpio_nrfx_manage_callback+0x36>
Z_GENLIST_REMOVE(slist, snode)
    6816:	6808      	ldr	r0, [r1, #0]
    6818:	b95c      	cbnz	r4, 6832 <gpio_nrfx_manage_callback+0x2a>
    681a:	689c      	ldr	r4, [r3, #8]
	list->head = node;
    681c:	6058      	str	r0, [r3, #4]
Z_GENLIST_REMOVE(slist, snode)
    681e:	42a1      	cmp	r1, r4
    6820:	d100      	bne.n	6824 <gpio_nrfx_manage_callback+0x1c>
	list->tail = node;
    6822:	6098      	str	r0, [r3, #8]
	parent->next = child;
    6824:	2000      	movs	r0, #0
    6826:	6008      	str	r0, [r1, #0]
	if (set) {
    6828:	b972      	cbnz	r2, 6848 <gpio_nrfx_manage_callback+0x40>
	return 0;
    682a:	2000      	movs	r0, #0
}
    682c:	bd30      	pop	{r4, r5, pc}
    682e:	4628      	mov	r0, r5
    6830:	e7ef      	b.n	6812 <gpio_nrfx_manage_callback+0xa>
    6832:	6020      	str	r0, [r4, #0]
Z_GENLIST_REMOVE(slist, snode)
    6834:	6898      	ldr	r0, [r3, #8]
    6836:	4281      	cmp	r1, r0
	list->tail = node;
    6838:	bf08      	it	eq
    683a:	609c      	streq	r4, [r3, #8]
}
    683c:	e7f2      	b.n	6824 <gpio_nrfx_manage_callback+0x1c>
Z_GENLIST_PEEK_NEXT_NO_CHECK(slist, snode)
    683e:	6805      	ldr	r5, [r0, #0]
Z_GENLIST_FIND_AND_REMOVE(slist, snode)
    6840:	4604      	mov	r4, r0
    6842:	2d00      	cmp	r5, #0
    6844:	d1f3      	bne.n	682e <gpio_nrfx_manage_callback+0x26>
			if (!set) {
    6846:	b13a      	cbz	r2, 6858 <gpio_nrfx_manage_callback+0x50>
Z_GENLIST_PREPEND(slist, snode)
    6848:	685a      	ldr	r2, [r3, #4]
	parent->next = child;
    684a:	600a      	str	r2, [r1, #0]
Z_GENLIST_PREPEND(slist, snode)
    684c:	6898      	ldr	r0, [r3, #8]
	list->head = node;
    684e:	6059      	str	r1, [r3, #4]
Z_GENLIST_PREPEND(slist, snode)
    6850:	2800      	cmp	r0, #0
    6852:	d1ea      	bne.n	682a <gpio_nrfx_manage_callback+0x22>
	list->tail = node;
    6854:	6099      	str	r1, [r3, #8]
}
    6856:	e7e9      	b.n	682c <gpio_nrfx_manage_callback+0x24>
				return -EINVAL;
    6858:	f06f 0015 	mvn.w	r0, #21
	return gpio_manage_callback(&get_port_data(port)->callbacks,
    685c:	e7e6      	b.n	682c <gpio_nrfx_manage_callback+0x24>

0000685e <is_regular_addr_valid>:
{
    685e:	b538      	push	{r3, r4, r5, lr}
    6860:	4604      	mov	r4, r0
    6862:	460d      	mov	r5, r1
	size_t flash_size = nrfx_nvmc_flash_size_get();
    6864:	f001 ff85 	bl	8772 <nrfx_nvmc_flash_size_get>
	if (addr >= flash_size ||
    6868:	4284      	cmp	r4, r0
    686a:	d209      	bcs.n	6880 <is_regular_addr_valid+0x22>
    686c:	2c00      	cmp	r4, #0
    686e:	db07      	blt.n	6880 <is_regular_addr_valid+0x22>
	    addr < 0 ||
    6870:	42a8      	cmp	r0, r5
    6872:	d305      	bcc.n	6880 <is_regular_addr_valid+0x22>
	    (addr) + len > flash_size) {
    6874:	442c      	add	r4, r5
	    len > flash_size ||
    6876:	4284      	cmp	r4, r0
    6878:	bf8c      	ite	hi
    687a:	2000      	movhi	r0, #0
    687c:	2001      	movls	r0, #1
}
    687e:	bd38      	pop	{r3, r4, r5, pc}
		return false;
    6880:	2000      	movs	r0, #0
    6882:	e7fc      	b.n	687e <is_regular_addr_valid+0x20>

00006884 <flash_get_page_info>:

#include <drivers/flash.h>

static int flash_get_page_info(const struct device *dev, off_t offs,
			       uint32_t index, struct flash_pages_info *info)
{
    6884:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
    6888:	461c      	mov	r4, r3
	const struct flash_driver_api *api = dev->api;
    688a:	6883      	ldr	r3, [r0, #8]
	const struct flash_pages_layout *layout;
	size_t layout_size;
	uint32_t index_jmp;

	info->start_offset = 0;
    688c:	2500      	movs	r5, #0
	info->index = 0U;

	api->page_layout(dev, &layout, &layout_size);
    688e:	695b      	ldr	r3, [r3, #20]
	info->start_offset = 0;
    6890:	6025      	str	r5, [r4, #0]
{
    6892:	460e      	mov	r6, r1
    6894:	4617      	mov	r7, r2
	api->page_layout(dev, &layout, &layout_size);
    6896:	4669      	mov	r1, sp
	info->index = 0U;
    6898:	60a5      	str	r5, [r4, #8]
	api->page_layout(dev, &layout, &layout_size);
    689a:	aa01      	add	r2, sp, #4
    689c:	4798      	blx	r3

	while (layout_size--) {
    689e:	e9dd 1c00 	ldrd	r1, ip, [sp]
    68a2:	4628      	mov	r0, r5
		info->size = layout->pages_size;
    68a4:	f101 0e04 	add.w	lr, r1, #4
	while (layout_size--) {
    68a8:	4560      	cmp	r0, ip
    68aa:	d104      	bne.n	68b6 <flash_get_page_info+0x32>
		}

		layout++;
	}

	return -EINVAL; /* page at offs or idx doesn't exist */
    68ac:	f06f 0015 	mvn.w	r0, #21
}
    68b0:	b003      	add	sp, #12
    68b2:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
		info->size = layout->pages_size;
    68b6:	f85e 5030 	ldr.w	r5, [lr, r0, lsl #3]
    68ba:	68a2      	ldr	r2, [r4, #8]
    68bc:	f8d4 9000 	ldr.w	r9, [r4]
    68c0:	6065      	str	r5, [r4, #4]
		if (offs == 0) {
    68c2:	b986      	cbnz	r6, 68e6 <flash_get_page_info+0x62>
			index_jmp = index - info->index;
    68c4:	1abb      	subs	r3, r7, r2
		index_jmp = MIN(index_jmp, layout->pages_count);
    68c6:	f851 8030 	ldr.w	r8, [r1, r0, lsl #3]
    68ca:	4543      	cmp	r3, r8
    68cc:	bf28      	it	cs
    68ce:	4643      	movcs	r3, r8
		info->start_offset += (index_jmp * info->size);
    68d0:	fb03 9505 	mla	r5, r3, r5, r9
		info->index += index_jmp;
    68d4:	441a      	add	r2, r3
		if (index_jmp < layout->pages_count) {
    68d6:	4598      	cmp	r8, r3
		info->start_offset += (index_jmp * info->size);
    68d8:	6025      	str	r5, [r4, #0]
		info->index += index_jmp;
    68da:	60a2      	str	r2, [r4, #8]
		if (index_jmp < layout->pages_count) {
    68dc:	f100 0001 	add.w	r0, r0, #1
    68e0:	d9e2      	bls.n	68a8 <flash_get_page_info+0x24>
			return 0;
    68e2:	2000      	movs	r0, #0
    68e4:	e7e4      	b.n	68b0 <flash_get_page_info+0x2c>
			index_jmp = (offs - info->start_offset) / info->size;
    68e6:	eba6 0309 	sub.w	r3, r6, r9
    68ea:	fbb3 f3f5 	udiv	r3, r3, r5
    68ee:	e7ea      	b.n	68c6 <flash_get_page_info+0x42>

000068f0 <z_impl_flash_get_page_info_by_offs>:

int z_impl_flash_get_page_info_by_offs(const struct device *dev, off_t offs,
				       struct flash_pages_info *info)
{
    68f0:	4613      	mov	r3, r2
	return flash_get_page_info(dev, offs, 0U, info);
    68f2:	2200      	movs	r2, #0
    68f4:	f7ff bfc6 	b.w	6884 <flash_get_page_info>

000068f8 <flash_page_foreach>:
	return count;
}

void flash_page_foreach(const struct device *dev, flash_page_cb cb,
			void *data)
{
    68f8:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
	const struct flash_pages_layout *layout;
	struct flash_pages_info page_info;
	size_t block, num_blocks, page = 0, i;
	off_t off = 0;

	api->page_layout(dev, &layout, &num_blocks);
    68fc:	6883      	ldr	r3, [r0, #8]
{
    68fe:	b086      	sub	sp, #24
	api->page_layout(dev, &layout, &num_blocks);
    6900:	695b      	ldr	r3, [r3, #20]
{
    6902:	4688      	mov	r8, r1
    6904:	4691      	mov	r9, r2
	api->page_layout(dev, &layout, &num_blocks);
    6906:	a901      	add	r1, sp, #4
    6908:	aa02      	add	r2, sp, #8
    690a:	4798      	blx	r3
	off_t off = 0;
    690c:	2400      	movs	r4, #0
	size_t block, num_blocks, page = 0, i;
    690e:	46a2      	mov	sl, r4

	for (block = 0; block < num_blocks; block++) {
    6910:	4625      	mov	r5, r4
    6912:	9b02      	ldr	r3, [sp, #8]
    6914:	42ab      	cmp	r3, r5
    6916:	d802      	bhi.n	691e <flash_page_foreach+0x26>

			off += page_info.size;
			page++;
		}
	}
}
    6918:	b006      	add	sp, #24
    691a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
		const struct flash_pages_layout *l = &layout[block];
    691e:	9f01      	ldr	r7, [sp, #4]
    6920:	eb07 07c5 	add.w	r7, r7, r5, lsl #3
		for (i = 0; i < l->pages_count; i++) {
    6924:	2600      	movs	r6, #0
		page_info.size = l->pages_size;
    6926:	687b      	ldr	r3, [r7, #4]
    6928:	9304      	str	r3, [sp, #16]
		for (i = 0; i < l->pages_count; i++) {
    692a:	683a      	ldr	r2, [r7, #0]
    692c:	42b2      	cmp	r2, r6
    692e:	eb0a 0306 	add.w	r3, sl, r6
    6932:	d802      	bhi.n	693a <flash_page_foreach+0x42>
	for (block = 0; block < num_blocks; block++) {
    6934:	3501      	adds	r5, #1
    6936:	469a      	mov	sl, r3
    6938:	e7eb      	b.n	6912 <flash_page_foreach+0x1a>
			if (!cb(&page_info, data)) {
    693a:	4649      	mov	r1, r9
    693c:	a803      	add	r0, sp, #12
			page_info.start_offset = off;
    693e:	9403      	str	r4, [sp, #12]
			page_info.index = page;
    6940:	9305      	str	r3, [sp, #20]
			if (!cb(&page_info, data)) {
    6942:	47c0      	blx	r8
    6944:	2800      	cmp	r0, #0
    6946:	d0e7      	beq.n	6918 <flash_page_foreach+0x20>
			off += page_info.size;
    6948:	9b04      	ldr	r3, [sp, #16]
		for (i = 0; i < l->pages_count; i++) {
    694a:	3601      	adds	r6, #1
			off += page_info.size;
    694c:	441c      	add	r4, r3
		for (i = 0; i < l->pages_count; i++) {
    694e:	e7ec      	b.n	692a <flash_page_foreach+0x32>

00006950 <uarte_nrfx_isr_int>:
	return config->uarte_regs;
    6950:	6843      	ldr	r3, [r0, #4]
    6952:	681b      	ldr	r3, [r3, #0]
    return p_reg->INTENSET & mask;
    6954:	f8d3 2304 	ldr.w	r2, [r3, #772]	; 0x304
	if (nrf_uarte_int_enable_check(uarte, NRF_UARTE_INT_ENDTX_MASK) &&
    6958:	05d1      	lsls	r1, r2, #23
{
    695a:	b410      	push	{r4}
	if (nrf_uarte_int_enable_check(uarte, NRF_UARTE_INT_ENDTX_MASK) &&
    695c:	d518      	bpl.n	6990 <uarte_nrfx_isr_int+0x40>
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    695e:	f8d3 2120 	ldr.w	r2, [r3, #288]	; 0x120
    6962:	b1aa      	cbz	r2, 6990 <uarte_nrfx_isr_int+0x40>
	__asm__ volatile(
    6964:	f04f 0120 	mov.w	r1, #32
    6968:	f3ef 8211 	mrs	r2, BASEPRI
    696c:	f381 8812 	msr	BASEPRI_MAX, r1
    6970:	f3bf 8f6f 	isb	sy
    6974:	f8d3 1120 	ldr.w	r1, [r3, #288]	; 0x120
	if (nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDTX)) {
    6978:	b131      	cbz	r1, 6988 <uarte_nrfx_isr_int+0x38>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    697a:	2100      	movs	r1, #0
    697c:	f8c3 1120 	str.w	r1, [r3, #288]	; 0x120
    6980:	f8d3 1120 	ldr.w	r1, [r3, #288]	; 0x120
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    6984:	2101      	movs	r1, #1
    6986:	60d9      	str	r1, [r3, #12]
	__asm__ volatile(
    6988:	f382 8811 	msr	BASEPRI, r2
    698c:	f3bf 8f6f 	isb	sy
	if (get_dev_config(dev)->flags & UARTE_CFG_FLAG_LOW_POWER) {
    6990:	6842      	ldr	r2, [r0, #4]
    6992:	6852      	ldr	r2, [r2, #4]
    6994:	06d2      	lsls	r2, r2, #27
    6996:	d51a      	bpl.n	69ce <uarte_nrfx_isr_int+0x7e>
	__asm__ volatile(
    6998:	f04f 0220 	mov.w	r2, #32
    699c:	f3ef 8111 	mrs	r1, BASEPRI
    69a0:	f382 8812 	msr	BASEPRI_MAX, r2
    69a4:	f3bf 8f6f 	isb	sy
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    69a8:	f8d3 2158 	ldr.w	r2, [r3, #344]	; 0x158
		if (nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED)) {
    69ac:	b112      	cbz	r2, 69b4 <uarte_nrfx_isr_int+0x64>
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
    69ae:	2200      	movs	r2, #0
    69b0:	f8c3 2500 	str.w	r2, [r3, #1280]	; 0x500
		if (!data->int_driven || data->int_driven->fifo_fill_lock == 0)
    69b4:	6902      	ldr	r2, [r0, #16]
    69b6:	68d2      	ldr	r2, [r2, #12]
    69b8:	b10a      	cbz	r2, 69be <uarte_nrfx_isr_int+0x6e>
    69ba:	6912      	ldr	r2, [r2, #16]
    69bc:	b91a      	cbnz	r2, 69c6 <uarte_nrfx_isr_int+0x76>
    p_reg->INTENCLR = mask;
    69be:	f44f 0280 	mov.w	r2, #4194304	; 0x400000
    69c2:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
	__asm__ volatile(
    69c6:	f381 8811 	msr	BASEPRI, r1
    69ca:	f3bf 8f6f 	isb	sy
	if (!data->int_driven) {
    69ce:	6902      	ldr	r2, [r0, #16]
    69d0:	68d2      	ldr	r2, [r2, #12]
    69d2:	b15a      	cbz	r2, 69ec <uarte_nrfx_isr_int+0x9c>
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    69d4:	f8d3 1158 	ldr.w	r1, [r3, #344]	; 0x158
	if (nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED)) {
    69d8:	b151      	cbz	r1, 69f0 <uarte_nrfx_isr_int+0xa0>
		if (data->int_driven->disable_tx_irq) {
    69da:	7b94      	ldrb	r4, [r2, #14]
		data->int_driven->fifo_fill_lock = 0;
    69dc:	2100      	movs	r1, #0
    69de:	6111      	str	r1, [r2, #16]
		if (data->int_driven->disable_tx_irq) {
    69e0:	b134      	cbz	r4, 69f0 <uarte_nrfx_isr_int+0xa0>
    p_reg->INTENCLR = mask;
    69e2:	f44f 0080 	mov.w	r0, #4194304	; 0x400000
    69e6:	f8c3 0308 	str.w	r0, [r3, #776]	; 0x308
			data->int_driven->disable_tx_irq = false;
    69ea:	7391      	strb	r1, [r2, #14]
}
    69ec:	bc10      	pop	{r4}
    69ee:	4770      	bx	lr
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    69f0:	f8d3 1124 	ldr.w	r1, [r3, #292]	; 0x124
	if (nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ERROR)) {
    69f4:	b121      	cbz	r1, 6a00 <uarte_nrfx_isr_int+0xb0>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    69f6:	2100      	movs	r1, #0
    69f8:	f8c3 1124 	str.w	r1, [r3, #292]	; 0x124
    69fc:	f8d3 3124 	ldr.w	r3, [r3, #292]	; 0x124
	if (data->int_driven->cb) {
    6a00:	6813      	ldr	r3, [r2, #0]
    6a02:	2b00      	cmp	r3, #0
    6a04:	d0f2      	beq.n	69ec <uarte_nrfx_isr_int+0x9c>
		data->int_driven->cb(dev, data->int_driven->cb_data);
    6a06:	6851      	ldr	r1, [r2, #4]
}
    6a08:	bc10      	pop	{r4}
		data->int_driven->cb(dev, data->int_driven->cb_data);
    6a0a:	4718      	bx	r3

00006a0c <uarte_nrfx_config_get>:
	*cfg = get_dev_data(dev)->uart_config;
    6a0c:	6902      	ldr	r2, [r0, #16]
{
    6a0e:	460b      	mov	r3, r1
	*cfg = get_dev_data(dev)->uart_config;
    6a10:	e9d2 0101 	ldrd	r0, r1, [r2, #4]
    6a14:	e883 0003 	stmia.w	r3, {r0, r1}
}
    6a18:	2000      	movs	r0, #0
    6a1a:	4770      	bx	lr

00006a1c <uarte_nrfx_err_check>:
	return config->uarte_regs;
    6a1c:	6843      	ldr	r3, [r0, #4]
    6a1e:	681b      	ldr	r3, [r3, #0]
    uint32_t errsrc_mask = p_reg->ERRORSRC;
    6a20:	f8d3 0480 	ldr.w	r0, [r3, #1152]	; 0x480
    p_reg->ERRORSRC = errsrc_mask;
    6a24:	f8c3 0480 	str.w	r0, [r3, #1152]	; 0x480
}
    6a28:	4770      	bx	lr

00006a2a <is_tx_ready>:
	const struct uarte_nrfx_config *config = get_dev_config(dev);
    6a2a:	6842      	ldr	r2, [r0, #4]
	return config->uarte_regs;
    6a2c:	6813      	ldr	r3, [r2, #0]
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    6a2e:	f8d3 0158 	ldr.w	r0, [r3, #344]	; 0x158
	return nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED) ||
    6a32:	b940      	cbnz	r0, 6a46 <is_tx_ready+0x1c>
	bool ppi_endtx = get_dev_config(dev)->flags & UARTE_CFG_FLAG_PPI_ENDTX;
    6a34:	6852      	ldr	r2, [r2, #4]
	return nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED) ||
    6a36:	0792      	lsls	r2, r2, #30
    6a38:	d406      	bmi.n	6a48 <is_tx_ready+0x1e>
    6a3a:	f8d3 0120 	ldr.w	r0, [r3, #288]	; 0x120
    6a3e:	3800      	subs	r0, #0
    6a40:	bf18      	it	ne
    6a42:	2001      	movne	r0, #1
    6a44:	4770      	bx	lr
    6a46:	2001      	movs	r0, #1
}
    6a48:	4770      	bx	lr

00006a4a <uarte_nrfx_poll_in>:
	return config->uarte_regs;
    6a4a:	6843      	ldr	r3, [r0, #4]
	const struct uarte_nrfx_data *data = get_dev_data(dev);
    6a4c:	6902      	ldr	r2, [r0, #16]
	return config->uarte_regs;
    6a4e:	681b      	ldr	r3, [r3, #0]
    6a50:	f8d3 0110 	ldr.w	r0, [r3, #272]	; 0x110
	if (!nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDRX)) {
    6a54:	b148      	cbz	r0, 6a6a <uarte_nrfx_poll_in+0x20>
	*c = data->rx_data;
    6a56:	7d52      	ldrb	r2, [r2, #21]
    6a58:	700a      	strb	r2, [r1, #0]
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    6a5a:	2000      	movs	r0, #0
    6a5c:	f8c3 0110 	str.w	r0, [r3, #272]	; 0x110
    6a60:	f8d3 2110 	ldr.w	r2, [r3, #272]	; 0x110
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    6a64:	2201      	movs	r2, #1
    6a66:	601a      	str	r2, [r3, #0]
	return 0;
    6a68:	4770      	bx	lr
		return -1;
    6a6a:	f04f 30ff 	mov.w	r0, #4294967295
}
    6a6e:	4770      	bx	lr

00006a70 <uarte_nrfx_fifo_read>:
	if (size > 0 && nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDRX)) {
    6a70:	2a00      	cmp	r2, #0
{
    6a72:	b510      	push	{r4, lr}
    6a74:	4604      	mov	r4, r0
	if (size > 0 && nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDRX)) {
    6a76:	dd0f      	ble.n	6a98 <uarte_nrfx_fifo_read+0x28>
	return config->uarte_regs;
    6a78:	6843      	ldr	r3, [r0, #4]
    6a7a:	681b      	ldr	r3, [r3, #0]
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    6a7c:	f8d3 0110 	ldr.w	r0, [r3, #272]	; 0x110
	if (size > 0 && nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDRX)) {
    6a80:	b148      	cbz	r0, 6a96 <uarte_nrfx_fifo_read+0x26>
	const struct uarte_nrfx_data *data = get_dev_data(dev);
    6a82:	6922      	ldr	r2, [r4, #16]
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    6a84:	2000      	movs	r0, #0
    6a86:	f8c3 0110 	str.w	r0, [r3, #272]	; 0x110
    6a8a:	f8d3 0110 	ldr.w	r0, [r3, #272]	; 0x110
		rx_data[num_rx++] = (uint8_t)data->rx_data;
    6a8e:	7d52      	ldrb	r2, [r2, #21]
    6a90:	700a      	strb	r2, [r1, #0]
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    6a92:	2001      	movs	r0, #1
    6a94:	6018      	str	r0, [r3, #0]
}
    6a96:	bd10      	pop	{r4, pc}
	int num_rx = 0;
    6a98:	2000      	movs	r0, #0
    6a9a:	e7fc      	b.n	6a96 <uarte_nrfx_fifo_read+0x26>

00006a9c <uarte_nrfx_irq_tx_enable>:
	return config->uarte_regs;
    6a9c:	6843      	ldr	r3, [r0, #4]
	struct uarte_nrfx_data *data = get_dev_data(dev);
    6a9e:	6901      	ldr	r1, [r0, #16]
	return config->uarte_regs;
    6aa0:	681a      	ldr	r2, [r3, #0]
	__asm__ volatile(
    6aa2:	f04f 0020 	mov.w	r0, #32
    6aa6:	f3ef 8311 	mrs	r3, BASEPRI
    6aaa:	f380 8812 	msr	BASEPRI_MAX, r0
    6aae:	f3bf 8f6f 	isb	sy
	data->int_driven->disable_tx_irq = false;
    6ab2:	68c9      	ldr	r1, [r1, #12]
    6ab4:	2000      	movs	r0, #0
    6ab6:	7388      	strb	r0, [r1, #14]
    p_reg->INTENSET = mask;
    6ab8:	f44f 0180 	mov.w	r1, #4194304	; 0x400000
    6abc:	f8c2 1304 	str.w	r1, [r2, #772]	; 0x304
	__asm__ volatile(
    6ac0:	f383 8811 	msr	BASEPRI, r3
    6ac4:	f3bf 8f6f 	isb	sy
}
    6ac8:	4770      	bx	lr

00006aca <uarte_nrfx_irq_tx_disable>:
	data->int_driven->disable_tx_irq = true;
    6aca:	6903      	ldr	r3, [r0, #16]
    6acc:	68db      	ldr	r3, [r3, #12]
    6ace:	2201      	movs	r2, #1
    6ad0:	739a      	strb	r2, [r3, #14]
}
    6ad2:	4770      	bx	lr

00006ad4 <uarte_nrfx_irq_tx_ready_complete>:
	bool ready = !data->int_driven->disable_tx_irq &&
    6ad4:	6903      	ldr	r3, [r0, #16]
    6ad6:	68db      	ldr	r3, [r3, #12]
    6ad8:	7b9a      	ldrb	r2, [r3, #14]
		     nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED) &&
    6ada:	f002 01ff 	and.w	r1, r2, #255	; 0xff
    6ade:	b962      	cbnz	r2, 6afa <uarte_nrfx_irq_tx_ready_complete+0x26>
	return config->uarte_regs;
    6ae0:	6842      	ldr	r2, [r0, #4]
    6ae2:	6812      	ldr	r2, [r2, #0]
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    6ae4:	f8d2 0158 	ldr.w	r0, [r2, #344]	; 0x158
	bool ready = !data->int_driven->disable_tx_irq &&
    6ae8:	b140      	cbz	r0, 6afc <uarte_nrfx_irq_tx_ready_complete+0x28>
    return p_reg->INTENSET & mask;
    6aea:	f8d2 0304 	ldr.w	r0, [r2, #772]	; 0x304
	if (ready) {
    6aee:	f410 0080 	ands.w	r0, r0, #4194304	; 0x400000
    6af2:	d003      	beq.n	6afc <uarte_nrfx_irq_tx_ready_complete+0x28>
		data->int_driven->fifo_fill_lock = 0;
    6af4:	6119      	str	r1, [r3, #16]
		     nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_TXSTOPPED) &&
    6af6:	2001      	movs	r0, #1
    6af8:	4770      	bx	lr
    6afa:	2000      	movs	r0, #0
}
    6afc:	4770      	bx	lr

00006afe <uarte_nrfx_irq_rx_ready>:
	return config->uarte_regs;
    6afe:	6843      	ldr	r3, [r0, #4]
    6b00:	681b      	ldr	r3, [r3, #0]
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    6b02:	f8d3 0110 	ldr.w	r0, [r3, #272]	; 0x110
}
    6b06:	3800      	subs	r0, #0
    6b08:	bf18      	it	ne
    6b0a:	2001      	movne	r0, #1
    6b0c:	4770      	bx	lr

00006b0e <uarte_nrfx_irq_rx_enable>:
	return config->uarte_regs;
    6b0e:	6843      	ldr	r3, [r0, #4]
    6b10:	681b      	ldr	r3, [r3, #0]
    p_reg->INTENSET = mask;
    6b12:	2210      	movs	r2, #16
    6b14:	f8c3 2304 	str.w	r2, [r3, #772]	; 0x304
}
    6b18:	4770      	bx	lr

00006b1a <uarte_nrfx_irq_rx_disable>:
	return config->uarte_regs;
    6b1a:	6843      	ldr	r3, [r0, #4]
    6b1c:	681b      	ldr	r3, [r3, #0]
    p_reg->INTENCLR = mask;
    6b1e:	2210      	movs	r2, #16
    6b20:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
}
    6b24:	4770      	bx	lr

00006b26 <uarte_nrfx_irq_err_enable>:
	return config->uarte_regs;
    6b26:	6843      	ldr	r3, [r0, #4]
    6b28:	681b      	ldr	r3, [r3, #0]
    p_reg->INTENSET = mask;
    6b2a:	f44f 7200 	mov.w	r2, #512	; 0x200
    6b2e:	f8c3 2304 	str.w	r2, [r3, #772]	; 0x304
}
    6b32:	4770      	bx	lr

00006b34 <uarte_nrfx_irq_err_disable>:
	return config->uarte_regs;
    6b34:	6843      	ldr	r3, [r0, #4]
    6b36:	681b      	ldr	r3, [r3, #0]
    p_reg->INTENCLR = mask;
    6b38:	f44f 7200 	mov.w	r2, #512	; 0x200
    6b3c:	f8c3 2308 	str.w	r2, [r3, #776]	; 0x308
}
    6b40:	4770      	bx	lr

00006b42 <uarte_nrfx_irq_update>:
}
    6b42:	2001      	movs	r0, #1
    6b44:	4770      	bx	lr

00006b46 <uarte_nrfx_irq_callback_set>:
	data->int_driven->cb = cb;
    6b46:	6903      	ldr	r3, [r0, #16]
    6b48:	68db      	ldr	r3, [r3, #12]
	data->int_driven->cb_data = cb_data;
    6b4a:	e9c3 1200 	strd	r1, r2, [r3]
}
    6b4e:	4770      	bx	lr

00006b50 <tx_start>:
	const struct uarte_nrfx_config *config = get_dev_config(dev);
    6b50:	6840      	ldr	r0, [r0, #4]
	return config->uarte_regs;
    6b52:	6803      	ldr	r3, [r0, #0]
    p_reg->TXD.PTR    = (uint32_t)p_buffer;
    6b54:	f8c3 1544 	str.w	r1, [r3, #1348]	; 0x544
    p_reg->TXD.MAXCNT = length;
    6b58:	f8c3 2548 	str.w	r2, [r3, #1352]	; 0x548
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    6b5c:	2200      	movs	r2, #0
    6b5e:	f8c3 2120 	str.w	r2, [r3, #288]	; 0x120
    6b62:	f8d3 1120 	ldr.w	r1, [r3, #288]	; 0x120
    6b66:	f8c3 2158 	str.w	r2, [r3, #344]	; 0x158
    6b6a:	f8d3 2158 	ldr.w	r2, [r3, #344]	; 0x158
	if (get_dev_config(dev)->flags & UARTE_CFG_FLAG_LOW_POWER) {
    6b6e:	6842      	ldr	r2, [r0, #4]
    6b70:	06d2      	lsls	r2, r2, #27
    p_reg->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
    6b72:	bf41      	itttt	mi
    6b74:	2208      	movmi	r2, #8
    6b76:	f8c3 2500 	strmi.w	r2, [r3, #1280]	; 0x500
    p_reg->INTENSET = mask;
    6b7a:	f44f 0280 	movmi.w	r2, #4194304	; 0x400000
    6b7e:	f8c3 2304 	strmi.w	r2, [r3, #772]	; 0x304
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    6b82:	2201      	movs	r2, #1
    6b84:	609a      	str	r2, [r3, #8]
}
    6b86:	4770      	bx	lr

00006b88 <uarte_nrfx_fifo_fill>:
{
    6b88:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
	struct uarte_nrfx_data *data = get_dev_data(dev);
    6b8a:	6906      	ldr	r6, [r0, #16]
	len = MIN(len, data->int_driven->tx_buff_size);
    6b8c:	68f3      	ldr	r3, [r6, #12]
    6b8e:	899c      	ldrh	r4, [r3, #12]
    6b90:	f3bf 8f5b 	dmb	ish
    6b94:	4294      	cmp	r4, r2
    6b96:	bfa8      	it	ge
    6b98:	4614      	movge	r4, r2
{
    6b9a:	4605      	mov	r5, r0
    6b9c:	3310      	adds	r3, #16
    6b9e:	2201      	movs	r2, #1
    6ba0:	e853 0f00 	ldrex	r0, [r3]
    6ba4:	2800      	cmp	r0, #0
    6ba6:	d103      	bne.n	6bb0 <uarte_nrfx_fifo_fill+0x28>
    6ba8:	e843 2700 	strex	r7, r2, [r3]
    6bac:	2f00      	cmp	r7, #0
    6bae:	d1f7      	bne.n	6ba0 <uarte_nrfx_fifo_fill+0x18>
    6bb0:	f3bf 8f5b 	dmb	ish
    6bb4:	bf0c      	ite	eq
    6bb6:	4613      	moveq	r3, r2
    6bb8:	2300      	movne	r3, #0
	if (!atomic_cas(&data->int_driven->fifo_fill_lock, 0, 1)) {
    6bba:	d01d      	beq.n	6bf8 <uarte_nrfx_fifo_fill+0x70>
		return 0;
    6bbc:	461c      	mov	r4, r3
}
    6bbe:	4620      	mov	r0, r4
    6bc0:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
		data->int_driven->tx_buffer[i] = tx_data[i];
    6bc2:	68f2      	ldr	r2, [r6, #12]
    6bc4:	5cc8      	ldrb	r0, [r1, r3]
    6bc6:	6892      	ldr	r2, [r2, #8]
    6bc8:	54d0      	strb	r0, [r2, r3]
	for (int i = 0; i < len; i++) {
    6bca:	3301      	adds	r3, #1
    6bcc:	42a3      	cmp	r3, r4
    6bce:	dbf8      	blt.n	6bc2 <uarte_nrfx_fifo_fill+0x3a>
	__asm__ volatile(
    6bd0:	f04f 0320 	mov.w	r3, #32
    6bd4:	f3ef 8711 	mrs	r7, BASEPRI
    6bd8:	f383 8812 	msr	BASEPRI_MAX, r3
    6bdc:	f3bf 8f6f 	isb	sy
	if (!is_tx_ready(dev)) {
    6be0:	4628      	mov	r0, r5
    6be2:	f7ff ff22 	bl	6a2a <is_tx_ready>
    6be6:	68f3      	ldr	r3, [r6, #12]
    6be8:	b940      	cbnz	r0, 6bfc <uarte_nrfx_fifo_fill+0x74>
		data->int_driven->fifo_fill_lock = 0;
    6bea:	6118      	str	r0, [r3, #16]
		len = 0;
    6bec:	4604      	mov	r4, r0
	__asm__ volatile(
    6bee:	f387 8811 	msr	BASEPRI, r7
    6bf2:	f3bf 8f6f 	isb	sy
	return len;
    6bf6:	e7e2      	b.n	6bbe <uarte_nrfx_fifo_fill+0x36>
	for (int i = 0; i < len; i++) {
    6bf8:	2300      	movs	r3, #0
    6bfa:	e7e7      	b.n	6bcc <uarte_nrfx_fifo_fill+0x44>
		tx_start(dev, data->int_driven->tx_buffer, len);
    6bfc:	6899      	ldr	r1, [r3, #8]
    6bfe:	4622      	mov	r2, r4
    6c00:	4628      	mov	r0, r5
    6c02:	f7ff ffa5 	bl	6b50 <tx_start>
    6c06:	e7f2      	b.n	6bee <uarte_nrfx_fifo_fill+0x66>

00006c08 <uarte_nrfx_irq_is_pending>:
{
    6c08:	b538      	push	{r3, r4, r5, lr}
	return config->uarte_regs;
    6c0a:	6843      	ldr	r3, [r0, #4]
    6c0c:	681d      	ldr	r5, [r3, #0]
    return p_reg->INTENSET & mask;
    6c0e:	f8d5 3304 	ldr.w	r3, [r5, #772]	; 0x304
		||
    6c12:	025b      	lsls	r3, r3, #9
{
    6c14:	4604      	mov	r4, r0
		||
    6c16:	d405      	bmi.n	6c24 <uarte_nrfx_irq_is_pending+0x1c>
    6c18:	f8d5 0304 	ldr.w	r0, [r5, #772]	; 0x304
    6c1c:	f010 0010 	ands.w	r0, r0, #16
    6c20:	d106      	bne.n	6c30 <uarte_nrfx_irq_is_pending+0x28>
}
    6c22:	bd38      	pop	{r3, r4, r5, pc}
		 uarte_nrfx_irq_tx_ready_complete(dev))
    6c24:	f7ff ff56 	bl	6ad4 <uarte_nrfx_irq_tx_ready_complete>
					    NRF_UARTE_INT_TXSTOPPED_MASK) &&
    6c28:	2800      	cmp	r0, #0
    6c2a:	d0f5      	beq.n	6c18 <uarte_nrfx_irq_is_pending+0x10>
		||
    6c2c:	2001      	movs	r0, #1
    6c2e:	e7f8      	b.n	6c22 <uarte_nrfx_irq_is_pending+0x1a>
		 uarte_nrfx_irq_rx_ready(dev)));
    6c30:	4620      	mov	r0, r4
    6c32:	f7ff ff64 	bl	6afe <uarte_nrfx_irq_rx_ready>
					    NRF_UARTE_INT_ENDRX_MASK) &&
    6c36:	3800      	subs	r0, #0
    6c38:	bf18      	it	ne
    6c3a:	2001      	movne	r0, #1
    6c3c:	e7f1      	b.n	6c22 <uarte_nrfx_irq_is_pending+0x1a>

00006c3e <fprotect_area>:
#define ENABLE_IN_DEBUG false
#endif


int fprotect_area(uint32_t start, size_t length)
{
    6c3e:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
}

NRF_STATIC_INLINE void nrf_bprot_nvm_protection_in_debug_set(NRF_BPROT_Type * p_reg,
                                                             bool             enable)
{
    p_reg->DISABLEINDEBUG =
    6c42:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    6c46:	4604      	mov	r4, r0
    6c48:	4688      	mov	r8, r1
    6c4a:	b085      	sub	sp, #20
    6c4c:	2601      	movs	r6, #1
	uint32_t block_end   = (start + length) / BPROT_REGIONS_SIZE;
	uint32_t block_mask[BPROT_CONFIGS_NUM] = {0};

	BUILD_ASSERT(BPROT_REGIONS_SIZE == CONFIG_FPROTECT_BLOCK_SIZE);

	if ((start % BPROT_REGIONS_SIZE) ||
    6c4e:	ea44 0408 	orr.w	r4, r4, r8
	uint32_t block_end   = (start + length) / BPROT_REGIONS_SIZE;
    6c52:	eb00 0901 	add.w	r9, r0, r1
    6c56:	f8c3 6608 	str.w	r6, [r3, #1544]	; 0x608
	uint32_t block_start = start / BPROT_REGIONS_SIZE;
    6c5a:	0b05      	lsrs	r5, r0, #12
	uint32_t block_mask[BPROT_CONFIGS_NUM] = {0};
    6c5c:	2210      	movs	r2, #16
    6c5e:	2100      	movs	r1, #0
    6c60:	4668      	mov	r0, sp
	if ((start % BPROT_REGIONS_SIZE) ||
    6c62:	f3c4 040b 	ubfx	r4, r4, #0, #12
	uint32_t block_mask[BPROT_CONFIGS_NUM] = {0};
    6c66:	f7ff fd0c 	bl	6682 <memset>
	uint32_t block_end   = (start + length) / BPROT_REGIONS_SIZE;
    6c6a:	ea4f 3719 	mov.w	r7, r9, lsr #12
	if ((start % BPROT_REGIONS_SIZE) ||
    6c6e:	bb3c      	cbnz	r4, 6cc0 <fprotect_area+0x82>
	    (length % BPROT_REGIONS_SIZE) ||
    6c70:	f5b9 2f01 	cmp.w	r9, #528384	; 0x81000
    6c74:	d224      	bcs.n	6cc0 <fprotect_area+0x82>
	    (block_end > BPROT_REGIONS_NUM) ||
    6c76:	42bd      	cmp	r5, r7
    6c78:	d822      	bhi.n	6cc0 <fprotect_area+0x82>
		 * flash.
		 */
		return -EINVAL;
	}

	for (uint32_t i = block_start; i < block_end; i++) {
    6c7a:	42bd      	cmp	r5, r7
    6c7c:	d111      	bne.n	6ca2 <fprotect_area+0x64>
            p_reg->CONFIG0 = block_mask;
    6c7e:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    6c82:	9a00      	ldr	r2, [sp, #0]
    6c84:	f8c3 2600 	str.w	r2, [r3, #1536]	; 0x600
		block_mask[i / BITS_PER_LONG] |= BIT(i % BITS_PER_LONG);
	}

	for (uint32_t i = 0; i < BPROT_CONFIGS_NUM; i++) {
		PROTECT(NRF_BPROT, i, block_mask[i]);
    6c88:	9a01      	ldr	r2, [sp, #4]
            p_reg->CONFIG1 = block_mask;
    6c8a:	f8c3 2604 	str.w	r2, [r3, #1540]	; 0x604
    6c8e:	9a02      	ldr	r2, [sp, #8]
            p_reg->CONFIG2 = block_mask;
    6c90:	f8c3 2610 	str.w	r2, [r3, #1552]	; 0x610
    6c94:	9a03      	ldr	r2, [sp, #12]
            p_reg->CONFIG3 = block_mask;
    6c96:	f8c3 2614 	str.w	r2, [r3, #1556]	; 0x614
	}

	return 0;
    6c9a:	2000      	movs	r0, #0
}
    6c9c:	b005      	add	sp, #20
    6c9e:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
		block_mask[i / BITS_PER_LONG] |= BIT(i % BITS_PER_LONG);
    6ca2:	096a      	lsrs	r2, r5, #5
    6ca4:	ab04      	add	r3, sp, #16
    6ca6:	eb03 0282 	add.w	r2, r3, r2, lsl #2
    6caa:	f005 031f 	and.w	r3, r5, #31
    6cae:	f852 1c10 	ldr.w	r1, [r2, #-16]
    6cb2:	fa06 f303 	lsl.w	r3, r6, r3
    6cb6:	430b      	orrs	r3, r1
    6cb8:	f842 3c10 	str.w	r3, [r2, #-16]
	for (uint32_t i = block_start; i < block_end; i++) {
    6cbc:	3501      	adds	r5, #1
    6cbe:	e7dc      	b.n	6c7a <fprotect_area+0x3c>
		return -EINVAL;
    6cc0:	f06f 0015 	mvn.w	r0, #21
    6cc4:	e7ea      	b.n	6c9c <fprotect_area+0x5e>

00006cc6 <bootutil_buffer_is_erased.part.0>:
bool bootutil_buffer_is_erased(const struct flash_area *area,
    6cc6:	b538      	push	{r3, r4, r5, lr}
    6cc8:	460c      	mov	r4, r1
    6cca:	4615      	mov	r5, r2
    6ccc:	4425      	add	r5, r4
    erased_val = flash_area_erased_val(area);
    6cce:	f7ff f9d6 	bl	607e <flash_area_erased_val>
    for (i = 0, u8b = (uint8_t *)buffer; i < len; i++) {
    6cd2:	4621      	mov	r1, r4
    6cd4:	42a9      	cmp	r1, r5
    6cd6:	d101      	bne.n	6cdc <bootutil_buffer_is_erased.part.0+0x16>
    return true;
    6cd8:	2001      	movs	r0, #1
}
    6cda:	bd38      	pop	{r3, r4, r5, pc}
        if (u8b[i] != erased_val) {
    6cdc:	f811 3b01 	ldrb.w	r3, [r1], #1
    6ce0:	4298      	cmp	r0, r3
    6ce2:	d0f7      	beq.n	6cd4 <bootutil_buffer_is_erased.part.0+0xe>
            return false;
    6ce4:	2000      	movs	r0, #0
    6ce6:	e7f8      	b.n	6cda <bootutil_buffer_is_erased.part.0+0x14>

00006ce8 <boot_swap_info_off>:
    return boot_copy_done_off(fap) - BOOT_MAX_ALIGN;
    6ce8:	6880      	ldr	r0, [r0, #8]
}
    6cea:	3828      	subs	r0, #40	; 0x28
    6cec:	4770      	bx	lr

00006cee <boot_magic_compatible_check>:
    switch (tbl_val) {
    6cee:	2804      	cmp	r0, #4
    6cf0:	d009      	beq.n	6d06 <boot_magic_compatible_check+0x18>
    6cf2:	2805      	cmp	r0, #5
    6cf4:	d103      	bne.n	6cfe <boot_magic_compatible_check+0x10>
        return val != BOOT_MAGIC_GOOD;
    6cf6:	1e48      	subs	r0, r1, #1
    6cf8:	bf18      	it	ne
    6cfa:	2001      	movne	r0, #1
    6cfc:	4770      	bx	lr
        return tbl_val == val;
    6cfe:	1a43      	subs	r3, r0, r1
    6d00:	4258      	negs	r0, r3
    6d02:	4158      	adcs	r0, r3
    6d04:	4770      	bx	lr
    switch (tbl_val) {
    6d06:	2001      	movs	r0, #1
}
    6d08:	4770      	bx	lr

00006d0a <bootutil_buffer_is_erased>:
    if (buffer == NULL || len == 0) {
    6d0a:	b111      	cbz	r1, 6d12 <bootutil_buffer_is_erased+0x8>
    6d0c:	b10a      	cbz	r2, 6d12 <bootutil_buffer_is_erased+0x8>
    6d0e:	f7ff bfda 	b.w	6cc6 <bootutil_buffer_is_erased.part.0>
}
    6d12:	2000      	movs	r0, #0
    6d14:	4770      	bx	lr

00006d16 <boot_read_flag>:
{
    6d16:	b538      	push	{r3, r4, r5, lr}
    6d18:	460c      	mov	r4, r1
    rc = flash_area_read(fap, off, flag, sizeof *flag);
    6d1a:	2301      	movs	r3, #1
{
    6d1c:	4611      	mov	r1, r2
    rc = flash_area_read(fap, off, flag, sizeof *flag);
    6d1e:	4622      	mov	r2, r4
{
    6d20:	4605      	mov	r5, r0
    rc = flash_area_read(fap, off, flag, sizeof *flag);
    6d22:	f7ff f925 	bl	5f70 <flash_area_read>
    if (rc < 0) {
    6d26:	2800      	cmp	r0, #0
    6d28:	db10      	blt.n	6d4c <boot_read_flag+0x36>
    if (bootutil_buffer_is_erased(fap, flag, sizeof *flag)) {
    6d2a:	2201      	movs	r2, #1
    6d2c:	4621      	mov	r1, r4
    6d2e:	4628      	mov	r0, r5
    6d30:	f7ff ffeb 	bl	6d0a <bootutil_buffer_is_erased>
    6d34:	b118      	cbz	r0, 6d3e <boot_read_flag+0x28>
        *flag = BOOT_FLAG_UNSET;
    6d36:	2303      	movs	r3, #3
    6d38:	7023      	strb	r3, [r4, #0]
    return 0;
    6d3a:	2000      	movs	r0, #0
}
    6d3c:	bd38      	pop	{r3, r4, r5, pc}
    if (flag != BOOT_FLAG_SET) {
    6d3e:	7823      	ldrb	r3, [r4, #0]
    6d40:	2b01      	cmp	r3, #1
        return BOOT_FLAG_BAD;
    6d42:	bf0c      	ite	eq
    6d44:	2301      	moveq	r3, #1
    6d46:	2302      	movne	r3, #2
        *flag = boot_flag_decode(*flag);
    6d48:	7023      	strb	r3, [r4, #0]
    6d4a:	e7f7      	b.n	6d3c <boot_read_flag+0x26>
        return BOOT_EFLASH;
    6d4c:	2001      	movs	r0, #1
    6d4e:	e7f5      	b.n	6d3c <boot_read_flag+0x26>

00006d50 <boot_write_trailer>:
{
    6d50:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
    6d54:	461d      	mov	r5, r3
    6d56:	4606      	mov	r6, r0
    6d58:	460f      	mov	r7, r1
    6d5a:	4690      	mov	r8, r2
    align = flash_area_align(fap);
    6d5c:	f7ff f986 	bl	606c <flash_area_align>
    6d60:	b2c3      	uxtb	r3, r0
    align = (inlen + align - 1) & ~(align - 1);
    6d62:	fa55 f480 	uxtab	r4, r5, r0
    6d66:	3c01      	subs	r4, #1
    6d68:	425b      	negs	r3, r3
    6d6a:	401c      	ands	r4, r3
    6d6c:	b2e4      	uxtb	r4, r4
    if (align > BOOT_MAX_ALIGN) {
    6d6e:	2c08      	cmp	r4, #8
    6d70:	d81a      	bhi.n	6da8 <boot_write_trailer+0x58>
    erased_val = flash_area_erased_val(fap);
    6d72:	4630      	mov	r0, r6
    6d74:	f7ff f983 	bl	607e <flash_area_erased_val>
    memcpy(buf, inbuf, inlen);
    6d78:	462a      	mov	r2, r5
    erased_val = flash_area_erased_val(fap);
    6d7a:	4681      	mov	r9, r0
    memcpy(buf, inbuf, inlen);
    6d7c:	4641      	mov	r1, r8
    6d7e:	4668      	mov	r0, sp
    6d80:	f7ff fc74 	bl	666c <memcpy>
    memset(&buf[inlen], erased_val, align - inlen);
    6d84:	1b62      	subs	r2, r4, r5
    6d86:	4649      	mov	r1, r9
    6d88:	eb0d 0005 	add.w	r0, sp, r5
    6d8c:	f7ff fc79 	bl	6682 <memset>
    rc = flash_area_write(fap, off, buf, align);
    6d90:	4623      	mov	r3, r4
    6d92:	466a      	mov	r2, sp
    6d94:	4639      	mov	r1, r7
    6d96:	4630      	mov	r0, r6
    6d98:	f7ff f906 	bl	5fa8 <flash_area_write>
    if (rc != 0) {
    6d9c:	3800      	subs	r0, #0
    6d9e:	bf18      	it	ne
    6da0:	2001      	movne	r0, #1
}
    6da2:	b003      	add	sp, #12
    6da4:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
        return -1;
    6da8:	f04f 30ff 	mov.w	r0, #4294967295
    6dac:	e7f9      	b.n	6da2 <boot_write_trailer+0x52>

00006dae <boot_write_trailer_flag>:
{
    6dae:	b507      	push	{r0, r1, r2, lr}
    return boot_write_trailer(fap, off, buf, 1);
    6db0:	2301      	movs	r3, #1
    const uint8_t buf[1] = { flag_val };
    6db2:	f88d 2004 	strb.w	r2, [sp, #4]
    return boot_write_trailer(fap, off, buf, 1);
    6db6:	aa01      	add	r2, sp, #4
    6db8:	f7ff ffca 	bl	6d50 <boot_write_trailer>
}
    6dbc:	b003      	add	sp, #12
    6dbe:	f85d fb04 	ldr.w	pc, [sp], #4

00006dc2 <boot_write_image_ok>:
    return boot_magic_off(fap) - BOOT_MAX_ALIGN;
    6dc2:	6881      	ldr	r1, [r0, #8]
    return boot_write_trailer_flag(fap, off, BOOT_FLAG_SET);
    6dc4:	2201      	movs	r2, #1
    6dc6:	3918      	subs	r1, #24
    6dc8:	f7ff bff1 	b.w	6dae <boot_write_trailer_flag>

00006dcc <boot_read_image_ok>:
    return boot_magic_off(fap) - BOOT_MAX_ALIGN;
    6dcc:	6882      	ldr	r2, [r0, #8]
    return boot_read_flag(fap, image_ok, boot_image_ok_off(fap));
    6dce:	3a18      	subs	r2, #24
    6dd0:	f7ff bfa1 	b.w	6d16 <boot_read_flag>

00006dd4 <boot_read_swap_state_by_id>:
{
    6dd4:	b513      	push	{r0, r1, r4, lr}
    6dd6:	460c      	mov	r4, r1
    rc = flash_area_open(flash_area_id, &fap);
    6dd8:	b2c0      	uxtb	r0, r0
    6dda:	a901      	add	r1, sp, #4
    6ddc:	f7fa ff84 	bl	1ce8 <flash_area_open>
    if (rc != 0) {
    6de0:	b950      	cbnz	r0, 6df8 <boot_read_swap_state_by_id+0x24>
    rc = boot_read_swap_state(fap, state);
    6de2:	4621      	mov	r1, r4
    6de4:	9801      	ldr	r0, [sp, #4]
    6de6:	f7fd f90b 	bl	4000 <boot_read_swap_state>
    6dea:	4604      	mov	r4, r0
    flash_area_close(fap);
    6dec:	9801      	ldr	r0, [sp, #4]
    6dee:	f7ff f8be 	bl	5f6e <flash_area_close>
}
    6df2:	4620      	mov	r0, r4
    6df4:	b002      	add	sp, #8
    6df6:	bd10      	pop	{r4, pc}
        return BOOT_EFLASH;
    6df8:	2401      	movs	r4, #1
    6dfa:	e7fa      	b.n	6df2 <boot_read_swap_state_by_id+0x1e>

00006dfc <boot_write_swap_info>:
{
    6dfc:	b507      	push	{r0, r1, r2, lr}
    BOOT_SET_SWAP_INFO(swap_info, image_num, swap_type);
    6dfe:	ea41 1102 	orr.w	r1, r1, r2, lsl #4
    6e02:	f88d 1007 	strb.w	r1, [sp, #7]
    return boot_copy_done_off(fap) - BOOT_MAX_ALIGN;
    6e06:	6881      	ldr	r1, [r0, #8]
    return boot_write_trailer(fap, off, (const uint8_t *) &swap_info, 1);
    6e08:	2301      	movs	r3, #1
    6e0a:	f10d 0207 	add.w	r2, sp, #7
    6e0e:	3928      	subs	r1, #40	; 0x28
    6e10:	f7ff ff9e 	bl	6d50 <boot_write_trailer>
}
    6e14:	b003      	add	sp, #12
    6e16:	f85d fb04 	ldr.w	pc, [sp], #4

00006e1a <_mbedtls_init>:
	ARG_UNUSED(device);

	init_heap();

	return 0;
}
    6e1a:	2000      	movs	r0, #0
    6e1c:	4770      	bx	lr

00006e1e <mbedtls_asn1_get_len>:
 */
int mbedtls_asn1_get_len( unsigned char **p,
                  const unsigned char *end,
                  size_t *len )
{
    if( ( end - *p ) < 1 )
    6e1e:	6803      	ldr	r3, [r0, #0]
{
    6e20:	b570      	push	{r4, r5, r6, lr}
    if( ( end - *p ) < 1 )
    6e22:	1acd      	subs	r5, r1, r3
    6e24:	2d00      	cmp	r5, #0
    6e26:	dd0d      	ble.n	6e44 <mbedtls_asn1_get_len+0x26>
        return( MBEDTLS_ERR_ASN1_OUT_OF_DATA );

    if( ( **p & 0x80 ) == 0 )
    6e28:	f993 6000 	ldrsb.w	r6, [r3]
    6e2c:	781c      	ldrb	r4, [r3, #0]
    6e2e:	2e00      	cmp	r6, #0
    6e30:	db0b      	blt.n	6e4a <mbedtls_asn1_get_len+0x2c>
        *len = *(*p)++;
    6e32:	1c5c      	adds	r4, r3, #1
    6e34:	6004      	str	r4, [r0, #0]
    6e36:	781b      	ldrb	r3, [r3, #0]
    6e38:	6013      	str	r3, [r2, #0]
        default:
            return( MBEDTLS_ERR_ASN1_INVALID_LENGTH );
        }
    }

    if( *len > (size_t) ( end - *p ) )
    6e3a:	6803      	ldr	r3, [r0, #0]
    6e3c:	1ac9      	subs	r1, r1, r3
    6e3e:	6813      	ldr	r3, [r2, #0]
    6e40:	428b      	cmp	r3, r1
    6e42:	d932      	bls.n	6eaa <mbedtls_asn1_get_len+0x8c>
        return( MBEDTLS_ERR_ASN1_OUT_OF_DATA );
    6e44:	f06f 005f 	mvn.w	r0, #95	; 0x5f

    return( 0 );
}
    6e48:	bd70      	pop	{r4, r5, r6, pc}
        switch( **p & 0x7F )
    6e4a:	f004 047f 	and.w	r4, r4, #127	; 0x7f
    6e4e:	3c01      	subs	r4, #1
    6e50:	2c03      	cmp	r4, #3
    6e52:	d827      	bhi.n	6ea4 <mbedtls_asn1_get_len+0x86>
    6e54:	e8df f004 	tbb	[pc, r4]
    6e58:	1e120902 	.word	0x1e120902
            if( ( end - *p ) < 2 )
    6e5c:	2d01      	cmp	r5, #1
    6e5e:	d0f1      	beq.n	6e44 <mbedtls_asn1_get_len+0x26>
            *len = (*p)[1];
    6e60:	785c      	ldrb	r4, [r3, #1]
    6e62:	6014      	str	r4, [r2, #0]
            (*p) += 2;
    6e64:	3302      	adds	r3, #2
            (*p) += 5;
    6e66:	6003      	str	r3, [r0, #0]
            break;
    6e68:	e7e7      	b.n	6e3a <mbedtls_asn1_get_len+0x1c>
            if( ( end - *p ) < 3 )
    6e6a:	2d02      	cmp	r5, #2
    6e6c:	ddea      	ble.n	6e44 <mbedtls_asn1_get_len+0x26>
            *len = ( (size_t)(*p)[1] << 8 ) | (*p)[2];
    6e6e:	f8b3 4001 	ldrh.w	r4, [r3, #1]
    6e72:	ba64      	rev16	r4, r4
    6e74:	b2a4      	uxth	r4, r4
    6e76:	6014      	str	r4, [r2, #0]
            (*p) += 3;
    6e78:	3303      	adds	r3, #3
    6e7a:	e7f4      	b.n	6e66 <mbedtls_asn1_get_len+0x48>
            if( ( end - *p ) < 4 )
    6e7c:	2d03      	cmp	r5, #3
    6e7e:	dde1      	ble.n	6e44 <mbedtls_asn1_get_len+0x26>
                   ( (size_t)(*p)[2] << 8  ) | (*p)[3];
    6e80:	789c      	ldrb	r4, [r3, #2]
            *len = ( (size_t)(*p)[1] << 16 ) |
    6e82:	785d      	ldrb	r5, [r3, #1]
                   ( (size_t)(*p)[2] << 8  ) | (*p)[3];
    6e84:	0224      	lsls	r4, r4, #8
            *len = ( (size_t)(*p)[1] << 16 ) |
    6e86:	ea44 4405 	orr.w	r4, r4, r5, lsl #16
                   ( (size_t)(*p)[2] << 8  ) | (*p)[3];
    6e8a:	78dd      	ldrb	r5, [r3, #3]
    6e8c:	432c      	orrs	r4, r5
            *len = ( (size_t)(*p)[1] << 16 ) |
    6e8e:	6014      	str	r4, [r2, #0]
            (*p) += 4;
    6e90:	3304      	adds	r3, #4
    6e92:	e7e8      	b.n	6e66 <mbedtls_asn1_get_len+0x48>
            if( ( end - *p ) < 5 )
    6e94:	2d04      	cmp	r5, #4
    6e96:	ddd5      	ble.n	6e44 <mbedtls_asn1_get_len+0x26>
            *len = ( (size_t)(*p)[1] << 24 ) | ( (size_t)(*p)[2] << 16 ) |
    6e98:	f8d3 4001 	ldr.w	r4, [r3, #1]
    6e9c:	ba24      	rev	r4, r4
    6e9e:	6014      	str	r4, [r2, #0]
            (*p) += 5;
    6ea0:	3305      	adds	r3, #5
    6ea2:	e7e0      	b.n	6e66 <mbedtls_asn1_get_len+0x48>
    if( ( **p & 0x80 ) == 0 )
    6ea4:	f06f 0063 	mvn.w	r0, #99	; 0x63
    6ea8:	e7ce      	b.n	6e48 <mbedtls_asn1_get_len+0x2a>
    return( 0 );
    6eaa:	2000      	movs	r0, #0
    6eac:	e7cc      	b.n	6e48 <mbedtls_asn1_get_len+0x2a>

00006eae <mbedtls_asn1_get_tag>:

int mbedtls_asn1_get_tag( unsigned char **p,
                  const unsigned char *end,
                  size_t *len, int tag )
{
    6eae:	b470      	push	{r4, r5, r6}
    if( ( end - *p ) < 1 )
    6eb0:	6804      	ldr	r4, [r0, #0]
    6eb2:	1b0e      	subs	r6, r1, r4
    6eb4:	2e00      	cmp	r6, #0
    6eb6:	dd07      	ble.n	6ec8 <mbedtls_asn1_get_tag+0x1a>
        return( MBEDTLS_ERR_ASN1_OUT_OF_DATA );

    if( **p != tag )
    6eb8:	7826      	ldrb	r6, [r4, #0]
    6eba:	429e      	cmp	r6, r3
    6ebc:	d108      	bne.n	6ed0 <mbedtls_asn1_get_tag+0x22>
        return( MBEDTLS_ERR_ASN1_UNEXPECTED_TAG );

    (*p)++;
    6ebe:	3401      	adds	r4, #1
    6ec0:	6004      	str	r4, [r0, #0]

    return( mbedtls_asn1_get_len( p, end, len ) );
}
    6ec2:	bc70      	pop	{r4, r5, r6}
    return( mbedtls_asn1_get_len( p, end, len ) );
    6ec4:	f7ff bfab 	b.w	6e1e <mbedtls_asn1_get_len>
        return( MBEDTLS_ERR_ASN1_OUT_OF_DATA );
    6ec8:	f06f 005f 	mvn.w	r0, #95	; 0x5f
}
    6ecc:	bc70      	pop	{r4, r5, r6}
    6ece:	4770      	bx	lr
        return( MBEDTLS_ERR_ASN1_UNEXPECTED_TAG );
    6ed0:	f06f 0061 	mvn.w	r0, #97	; 0x61
    6ed4:	e7fa      	b.n	6ecc <mbedtls_asn1_get_tag+0x1e>

00006ed6 <mbedtls_asn1_get_mpi>:

#if defined(MBEDTLS_BIGNUM_C)
int mbedtls_asn1_get_mpi( unsigned char **p,
                  const unsigned char *end,
                  mbedtls_mpi *X )
{
    6ed6:	b537      	push	{r0, r1, r2, r4, r5, lr}
    int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED;
    size_t len;

    if( ( ret = mbedtls_asn1_get_tag( p, end, &len, MBEDTLS_ASN1_INTEGER ) ) != 0 )
    6ed8:	2302      	movs	r3, #2
{
    6eda:	4615      	mov	r5, r2
    if( ( ret = mbedtls_asn1_get_tag( p, end, &len, MBEDTLS_ASN1_INTEGER ) ) != 0 )
    6edc:	aa01      	add	r2, sp, #4
{
    6ede:	4604      	mov	r4, r0
    if( ( ret = mbedtls_asn1_get_tag( p, end, &len, MBEDTLS_ASN1_INTEGER ) ) != 0 )
    6ee0:	f7ff ffe5 	bl	6eae <mbedtls_asn1_get_tag>
    6ee4:	b940      	cbnz	r0, 6ef8 <mbedtls_asn1_get_mpi+0x22>
        return( ret );

    ret = mbedtls_mpi_read_binary( X, *p, len );
    6ee6:	9a01      	ldr	r2, [sp, #4]
    6ee8:	6821      	ldr	r1, [r4, #0]
    6eea:	4628      	mov	r0, r5
    6eec:	f000 fc27 	bl	773e <mbedtls_mpi_read_binary>

    *p += len;
    6ef0:	6823      	ldr	r3, [r4, #0]
    6ef2:	9a01      	ldr	r2, [sp, #4]
    6ef4:	4413      	add	r3, r2
    6ef6:	6023      	str	r3, [r4, #0]

    return( ret );
}
    6ef8:	b003      	add	sp, #12
    6efa:	bd30      	pop	{r4, r5, pc}

00006efc <mpi_safe_cond_assign>:
 */
static void mpi_safe_cond_assign( size_t n,
                                  mbedtls_mpi_uint *dest,
                                  const mbedtls_mpi_uint *src,
                                  unsigned char assign )
{
    6efc:	b5f0      	push	{r4, r5, r6, r7, lr}
#pragma warning( push )
#pragma warning( disable : 4146 )
#endif

    /* all-bits 1 if assign is 1, all-bits 0 if assign is 0 */
    const mbedtls_mpi_uint mask = -assign;
    6efe:	425f      	negs	r7, r3

#if defined(_MSC_VER)
#pragma warning( pop )
#endif

    for( i = 0; i < n; i++ )
    6f00:	2400      	movs	r4, #0
        dest[i] = ( src[i] & mask ) | ( dest[i] & ~mask );
    6f02:	3b01      	subs	r3, #1
    for( i = 0; i < n; i++ )
    6f04:	4284      	cmp	r4, r0
    6f06:	d100      	bne.n	6f0a <mpi_safe_cond_assign+0xe>
}
    6f08:	bdf0      	pop	{r4, r5, r6, r7, pc}
        dest[i] = ( src[i] & mask ) | ( dest[i] & ~mask );
    6f0a:	f851 5024 	ldr.w	r5, [r1, r4, lsl #2]
    6f0e:	f852 6024 	ldr.w	r6, [r2, r4, lsl #2]
    6f12:	401d      	ands	r5, r3
    6f14:	403e      	ands	r6, r7
    6f16:	4335      	orrs	r5, r6
    6f18:	f841 5024 	str.w	r5, [r1, r4, lsl #2]
    for( i = 0; i < n; i++ )
    6f1c:	3401      	adds	r4, #1
    6f1e:	e7f1      	b.n	6f04 <mpi_safe_cond_assign+0x8>

00006f20 <mpi_mul_hlp>:
#endif
void mpi_mul_hlp( size_t i,
                  const mbedtls_mpi_uint *s,
                  mbedtls_mpi_uint *d,
                  mbedtls_mpi_uint b )
{
    6f20:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
        MULADDC_INIT
        MULADDC_CORE
        MULADDC_STOP
    }
#else /* MULADDC_HUIT */
    for( ; i >= 16; i -= 16 )
    6f24:	4684      	mov	ip, r0
    6f26:	460d      	mov	r5, r1
    6f28:	4614      	mov	r4, r2
    mbedtls_mpi_uint c = 0, t = 0;
    6f2a:	f04f 0e00 	mov.w	lr, #0
    for( ; i >= 16; i -= 16 )
    6f2e:	f1bc 0f0f 	cmp.w	ip, #15
    6f32:	f105 0540 	add.w	r5, r5, #64	; 0x40
    6f36:	f104 0440 	add.w	r4, r4, #64	; 0x40
    6f3a:	f200 80aa 	bhi.w	7092 <CONFIG_PM_PARTITION_SIZE_B0_IMAGE+0x92>
    6f3e:	0904      	lsrs	r4, r0, #4
    6f40:	f06f 050f 	mvn.w	r5, #15
    6f44:	fb05 0004 	mla	r0, r5, r4, r0
        MULADDC_CORE   MULADDC_CORE
        MULADDC_CORE   MULADDC_CORE
        MULADDC_STOP
    }

    for( ; i >= 8; i -= 8 )
    6f48:	2807      	cmp	r0, #7
    6f4a:	ea4f 1c84 	mov.w	ip, r4, lsl #6
    6f4e:	eb01 1584 	add.w	r5, r1, r4, lsl #6
    6f52:	eb02 1484 	add.w	r4, r2, r4, lsl #6
    6f56:	f240 808d 	bls.w	7074 <CONFIG_PM_PARTITION_SIZE_B0_IMAGE+0x74>
    {
        MULADDC_INIT
        MULADDC_CORE   MULADDC_CORE
    6f5a:	f851 600c 	ldr.w	r6, [r1, ip]
    6f5e:	f852 100c 	ldr.w	r1, [r2, ip]
    6f62:	fba3 6706 	umull	r6, r7, r3, r6
    6f66:	eb1e 0e06 	adds.w	lr, lr, r6
    6f6a:	bf2c      	ite	cs
    6f6c:	f04f 0801 	movcs.w	r8, #1
    6f70:	f04f 0800 	movcc.w	r8, #0
    6f74:	eb1e 0101 	adds.w	r1, lr, r1
    6f78:	f842 100c 	str.w	r1, [r2, ip]
    6f7c:	686e      	ldr	r6, [r5, #4]
    6f7e:	44b8      	add	r8, r7
    6f80:	bf2c      	ite	cs
    6f82:	2201      	movcs	r2, #1
    6f84:	2200      	movcc	r2, #0
    6f86:	fba3 6706 	umull	r6, r7, r3, r6
    6f8a:	4442      	add	r2, r8
    6f8c:	1992      	adds	r2, r2, r6
    6f8e:	bf2c      	ite	cs
    6f90:	2101      	movcs	r1, #1
    6f92:	2100      	movcc	r1, #0
    6f94:	eb01 0c07 	add.w	ip, r1, r7
    6f98:	6861      	ldr	r1, [r4, #4]
    6f9a:	1852      	adds	r2, r2, r1
    6f9c:	6062      	str	r2, [r4, #4]
        MULADDC_CORE   MULADDC_CORE
    6f9e:	68ae      	ldr	r6, [r5, #8]
        MULADDC_CORE   MULADDC_CORE
    6fa0:	bf2c      	ite	cs
    6fa2:	2101      	movcs	r1, #1
    6fa4:	2100      	movcc	r1, #0
        MULADDC_CORE   MULADDC_CORE
    6fa6:	fba3 6706 	umull	r6, r7, r3, r6
        MULADDC_CORE   MULADDC_CORE
    6faa:	4461      	add	r1, ip
        MULADDC_CORE   MULADDC_CORE
    6fac:	1989      	adds	r1, r1, r6
    6fae:	bf2c      	ite	cs
    6fb0:	2201      	movcs	r2, #1
    6fb2:	2200      	movcc	r2, #0
    6fb4:	eb02 0c07 	add.w	ip, r2, r7
    6fb8:	68a2      	ldr	r2, [r4, #8]
    6fba:	1889      	adds	r1, r1, r2
    6fbc:	60a1      	str	r1, [r4, #8]
    6fbe:	68ee      	ldr	r6, [r5, #12]
    6fc0:	bf2c      	ite	cs
    6fc2:	2201      	movcs	r2, #1
    6fc4:	2200      	movcc	r2, #0
    6fc6:	fba3 6706 	umull	r6, r7, r3, r6
    6fca:	4462      	add	r2, ip
    6fcc:	1992      	adds	r2, r2, r6
    6fce:	bf2c      	ite	cs
    6fd0:	2101      	movcs	r1, #1
    6fd2:	2100      	movcc	r1, #0
    6fd4:	eb01 0c07 	add.w	ip, r1, r7
    6fd8:	68e1      	ldr	r1, [r4, #12]
    6fda:	1852      	adds	r2, r2, r1
    6fdc:	60e2      	str	r2, [r4, #12]

        MULADDC_CORE   MULADDC_CORE
    6fde:	692e      	ldr	r6, [r5, #16]
        MULADDC_CORE   MULADDC_CORE
    6fe0:	bf2c      	ite	cs
    6fe2:	2101      	movcs	r1, #1
    6fe4:	2100      	movcc	r1, #0
        MULADDC_CORE   MULADDC_CORE
    6fe6:	fba3 6706 	umull	r6, r7, r3, r6
        MULADDC_CORE   MULADDC_CORE
    6fea:	4461      	add	r1, ip
        MULADDC_CORE   MULADDC_CORE
    6fec:	1989      	adds	r1, r1, r6
    6fee:	bf2c      	ite	cs
    6ff0:	2201      	movcs	r2, #1
    6ff2:	2200      	movcc	r2, #0
    6ff4:	eb02 0c07 	add.w	ip, r2, r7
    6ff8:	6922      	ldr	r2, [r4, #16]
    6ffa:	1889      	adds	r1, r1, r2
    6ffc:	6121      	str	r1, [r4, #16]
    6ffe:	696e      	ldr	r6, [r5, #20]
    7000:	bf2c      	ite	cs
    7002:	2201      	movcs	r2, #1
    7004:	2200      	movcc	r2, #0
    7006:	fba3 6706 	umull	r6, r7, r3, r6
    700a:	4462      	add	r2, ip
    700c:	1992      	adds	r2, r2, r6
    700e:	bf2c      	ite	cs
    7010:	2101      	movcs	r1, #1
    7012:	2100      	movcc	r1, #0
    7014:	eb01 0c07 	add.w	ip, r1, r7
    7018:	6961      	ldr	r1, [r4, #20]
    701a:	1852      	adds	r2, r2, r1
    701c:	6162      	str	r2, [r4, #20]
        MULADDC_CORE   MULADDC_CORE
    701e:	69ae      	ldr	r6, [r5, #24]
        MULADDC_CORE   MULADDC_CORE
    7020:	bf2c      	ite	cs
    7022:	2101      	movcs	r1, #1
    7024:	2100      	movcc	r1, #0
        MULADDC_CORE   MULADDC_CORE
    7026:	fba3 6706 	umull	r6, r7, r3, r6
        MULADDC_CORE   MULADDC_CORE
    702a:	4461      	add	r1, ip
        MULADDC_CORE   MULADDC_CORE
    702c:	1989      	adds	r1, r1, r6
    702e:	bf2c      	ite	cs
    7030:	2201      	movcs	r2, #1
    7032:	2200      	movcc	r2, #0
    7034:	eb02 0c07 	add.w	ip, r2, r7
    7038:	69a2      	ldr	r2, [r4, #24]
    703a:	1889      	adds	r1, r1, r2
    703c:	61a1      	str	r1, [r4, #24]
    703e:	69ee      	ldr	r6, [r5, #28]
    7040:	bf2c      	ite	cs
    7042:	2201      	movcs	r2, #1
    7044:	2200      	movcc	r2, #0
    7046:	fba3 6706 	umull	r6, r7, r3, r6
    704a:	4462      	add	r2, ip
    704c:	1992      	adds	r2, r2, r6
    704e:	69e6      	ldr	r6, [r4, #28]
    7050:	bf2c      	ite	cs
    7052:	f04f 0e01 	movcs.w	lr, #1
    7056:	f04f 0e00 	movcc.w	lr, #0
    705a:	1992      	adds	r2, r2, r6
    705c:	eb0e 0107 	add.w	r1, lr, r7
    7060:	bf2c      	ite	cs
    7062:	f04f 0e01 	movcs.w	lr, #1
    7066:	f04f 0e00 	movcc.w	lr, #0
    706a:	61e2      	str	r2, [r4, #28]
    706c:	448e      	add	lr, r1
    for( ; i >= 8; i -= 8 )
    706e:	3808      	subs	r0, #8
        MULADDC_CORE   MULADDC_CORE
    7070:	3420      	adds	r4, #32
    7072:	3520      	adds	r5, #32
    7074:	ea4f 0c80 	mov.w	ip, r0, lsl #2
    7078:	4621      	mov	r1, r4
    707a:	eb05 0080 	add.w	r0, r5, r0, lsl #2
        MULADDC_STOP
    }

    for( ; i > 0; i-- )
    707e:	4285      	cmp	r5, r0
    7080:	f040 8199 	bne.w	73b6 <CONFIG_PM_PARTITION_SIZE_B0_IMAGE+0x3b6>
    7084:	4464      	add	r4, ip
    }
#endif /* MULADDC_HUIT */

    t++;

    while( c != 0 )
    7086:	f1be 0f00 	cmp.w	lr, #0
    708a:	f040 81aa 	bne.w	73e2 <CONFIG_PM_PARTITION_SIZE_B0_IMAGE+0x3e2>
    {
        *d += c; c = ( *d < c ); d++;
    }
}
    708e:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
        MULADDC_CORE   MULADDC_CORE
    7092:	f855 6c40 	ldr.w	r6, [r5, #-64]
    7096:	fba3 6706 	umull	r6, r7, r3, r6
    709a:	eb1e 0e06 	adds.w	lr, lr, r6
    709e:	bf2c      	ite	cs
    70a0:	f04f 0801 	movcs.w	r8, #1
    70a4:	f04f 0800 	movcc.w	r8, #0
    70a8:	eb08 0907 	add.w	r9, r8, r7
    70ac:	f854 7c40 	ldr.w	r7, [r4, #-64]
    70b0:	eb17 070e 	adds.w	r7, r7, lr
    70b4:	f844 7c40 	str.w	r7, [r4, #-64]
    70b8:	f855 6c3c 	ldr.w	r6, [r5, #-60]
    70bc:	bf2c      	ite	cs
    70be:	f04f 0801 	movcs.w	r8, #1
    70c2:	f04f 0800 	movcc.w	r8, #0
    70c6:	fba3 6706 	umull	r6, r7, r3, r6
    70ca:	44c8      	add	r8, r9
    70cc:	eb18 0806 	adds.w	r8, r8, r6
    70d0:	f854 6c3c 	ldr.w	r6, [r4, #-60]
    70d4:	bf2c      	ite	cs
    70d6:	f04f 0e01 	movcs.w	lr, #1
    70da:	f04f 0e00 	movcc.w	lr, #0
    70de:	eb16 0608 	adds.w	r6, r6, r8
    70e2:	f844 6c3c 	str.w	r6, [r4, #-60]
        MULADDC_CORE   MULADDC_CORE
    70e6:	f855 6c38 	ldr.w	r6, [r5, #-56]
        MULADDC_CORE   MULADDC_CORE
    70ea:	eb0e 0907 	add.w	r9, lr, r7
    70ee:	bf2c      	ite	cs
    70f0:	f04f 0e01 	movcs.w	lr, #1
    70f4:	f04f 0e00 	movcc.w	lr, #0
        MULADDC_CORE   MULADDC_CORE
    70f8:	fba3 6706 	umull	r6, r7, r3, r6
        MULADDC_CORE   MULADDC_CORE
    70fc:	44ce      	add	lr, r9
        MULADDC_CORE   MULADDC_CORE
    70fe:	eb1e 0e06 	adds.w	lr, lr, r6
    7102:	bf2c      	ite	cs
    7104:	f04f 0801 	movcs.w	r8, #1
    7108:	f04f 0800 	movcc.w	r8, #0
    710c:	eb08 0907 	add.w	r9, r8, r7
    7110:	f854 7c38 	ldr.w	r7, [r4, #-56]
    7114:	eb17 070e 	adds.w	r7, r7, lr
    7118:	f844 7c38 	str.w	r7, [r4, #-56]
    711c:	f855 6c34 	ldr.w	r6, [r5, #-52]
    7120:	bf2c      	ite	cs
    7122:	f04f 0801 	movcs.w	r8, #1
    7126:	f04f 0800 	movcc.w	r8, #0
    712a:	fba3 6706 	umull	r6, r7, r3, r6
    712e:	44c8      	add	r8, r9
    7130:	eb18 0806 	adds.w	r8, r8, r6
    7134:	f854 6c34 	ldr.w	r6, [r4, #-52]
    7138:	bf2c      	ite	cs
    713a:	f04f 0e01 	movcs.w	lr, #1
    713e:	f04f 0e00 	movcc.w	lr, #0
    7142:	eb16 0608 	adds.w	r6, r6, r8
    7146:	f844 6c34 	str.w	r6, [r4, #-52]
        MULADDC_CORE   MULADDC_CORE
    714a:	f855 6c30 	ldr.w	r6, [r5, #-48]
        MULADDC_CORE   MULADDC_CORE
    714e:	eb0e 0907 	add.w	r9, lr, r7
    7152:	bf2c      	ite	cs
    7154:	f04f 0e01 	movcs.w	lr, #1
    7158:	f04f 0e00 	movcc.w	lr, #0
        MULADDC_CORE   MULADDC_CORE
    715c:	fba3 6706 	umull	r6, r7, r3, r6
        MULADDC_CORE   MULADDC_CORE
    7160:	44ce      	add	lr, r9
        MULADDC_CORE   MULADDC_CORE
    7162:	eb1e 0e06 	adds.w	lr, lr, r6
    7166:	bf2c      	ite	cs
    7168:	f04f 0801 	movcs.w	r8, #1
    716c:	f04f 0800 	movcc.w	r8, #0
    7170:	eb08 0907 	add.w	r9, r8, r7
    7174:	f854 7c30 	ldr.w	r7, [r4, #-48]
    7178:	eb17 070e 	adds.w	r7, r7, lr
    717c:	f844 7c30 	str.w	r7, [r4, #-48]
    7180:	f855 6c2c 	ldr.w	r6, [r5, #-44]
    7184:	bf2c      	ite	cs
    7186:	f04f 0801 	movcs.w	r8, #1
    718a:	f04f 0800 	movcc.w	r8, #0
    718e:	fba3 6706 	umull	r6, r7, r3, r6
    7192:	44c8      	add	r8, r9
    7194:	eb18 0806 	adds.w	r8, r8, r6
    7198:	f854 6c2c 	ldr.w	r6, [r4, #-44]
    719c:	bf2c      	ite	cs
    719e:	f04f 0e01 	movcs.w	lr, #1
    71a2:	f04f 0e00 	movcc.w	lr, #0
    71a6:	eb16 0608 	adds.w	r6, r6, r8
    71aa:	f844 6c2c 	str.w	r6, [r4, #-44]
        MULADDC_CORE   MULADDC_CORE
    71ae:	f855 6c28 	ldr.w	r6, [r5, #-40]
        MULADDC_CORE   MULADDC_CORE
    71b2:	eb0e 0907 	add.w	r9, lr, r7
    71b6:	bf2c      	ite	cs
    71b8:	f04f 0e01 	movcs.w	lr, #1
    71bc:	f04f 0e00 	movcc.w	lr, #0
        MULADDC_CORE   MULADDC_CORE
    71c0:	fba3 6706 	umull	r6, r7, r3, r6
        MULADDC_CORE   MULADDC_CORE
    71c4:	44ce      	add	lr, r9
        MULADDC_CORE   MULADDC_CORE
    71c6:	eb1e 0e06 	adds.w	lr, lr, r6
    71ca:	bf2c      	ite	cs
    71cc:	f04f 0801 	movcs.w	r8, #1
    71d0:	f04f 0800 	movcc.w	r8, #0
    71d4:	eb08 0907 	add.w	r9, r8, r7
    71d8:	f854 7c28 	ldr.w	r7, [r4, #-40]
    71dc:	eb17 070e 	adds.w	r7, r7, lr
    71e0:	f844 7c28 	str.w	r7, [r4, #-40]
    71e4:	f855 6c24 	ldr.w	r6, [r5, #-36]
    71e8:	bf2c      	ite	cs
    71ea:	f04f 0801 	movcs.w	r8, #1
    71ee:	f04f 0800 	movcc.w	r8, #0
    71f2:	fba3 6706 	umull	r6, r7, r3, r6
    71f6:	44c8      	add	r8, r9
    71f8:	eb18 0806 	adds.w	r8, r8, r6
    71fc:	f854 6c24 	ldr.w	r6, [r4, #-36]
    7200:	bf2c      	ite	cs
    7202:	f04f 0e01 	movcs.w	lr, #1
    7206:	f04f 0e00 	movcc.w	lr, #0
    720a:	eb16 0608 	adds.w	r6, r6, r8
    720e:	f844 6c24 	str.w	r6, [r4, #-36]
        MULADDC_CORE   MULADDC_CORE
    7212:	f855 6c20 	ldr.w	r6, [r5, #-32]
        MULADDC_CORE   MULADDC_CORE
    7216:	eb0e 0907 	add.w	r9, lr, r7
    721a:	bf2c      	ite	cs
    721c:	f04f 0e01 	movcs.w	lr, #1
    7220:	f04f 0e00 	movcc.w	lr, #0
        MULADDC_CORE   MULADDC_CORE
    7224:	fba3 6706 	umull	r6, r7, r3, r6
        MULADDC_CORE   MULADDC_CORE
    7228:	44ce      	add	lr, r9
        MULADDC_CORE   MULADDC_CORE
    722a:	eb1e 0e06 	adds.w	lr, lr, r6
    722e:	bf2c      	ite	cs
    7230:	f04f 0801 	movcs.w	r8, #1
    7234:	f04f 0800 	movcc.w	r8, #0
    7238:	eb08 0907 	add.w	r9, r8, r7
    723c:	f854 7c20 	ldr.w	r7, [r4, #-32]
    7240:	eb17 070e 	adds.w	r7, r7, lr
    7244:	f844 7c20 	str.w	r7, [r4, #-32]
    7248:	f855 6c1c 	ldr.w	r6, [r5, #-28]
    724c:	bf2c      	ite	cs
    724e:	f04f 0801 	movcs.w	r8, #1
    7252:	f04f 0800 	movcc.w	r8, #0
    7256:	fba3 6706 	umull	r6, r7, r3, r6
    725a:	44c8      	add	r8, r9
    725c:	eb18 0806 	adds.w	r8, r8, r6
    7260:	f854 6c1c 	ldr.w	r6, [r4, #-28]
    7264:	bf2c      	ite	cs
    7266:	f04f 0e01 	movcs.w	lr, #1
    726a:	f04f 0e00 	movcc.w	lr, #0
    726e:	eb16 0608 	adds.w	r6, r6, r8
    7272:	f844 6c1c 	str.w	r6, [r4, #-28]
        MULADDC_CORE   MULADDC_CORE
    7276:	f855 6c18 	ldr.w	r6, [r5, #-24]
        MULADDC_CORE   MULADDC_CORE
    727a:	eb0e 0907 	add.w	r9, lr, r7
    727e:	bf2c      	ite	cs
    7280:	f04f 0e01 	movcs.w	lr, #1
    7284:	f04f 0e00 	movcc.w	lr, #0
        MULADDC_CORE   MULADDC_CORE
    7288:	fba3 6706 	umull	r6, r7, r3, r6
        MULADDC_CORE   MULADDC_CORE
    728c:	44ce      	add	lr, r9
        MULADDC_CORE   MULADDC_CORE
    728e:	eb1e 0e06 	adds.w	lr, lr, r6
    7292:	bf2c      	ite	cs
    7294:	f04f 0801 	movcs.w	r8, #1
    7298:	f04f 0800 	movcc.w	r8, #0
    729c:	eb08 0907 	add.w	r9, r8, r7
    72a0:	f854 7c18 	ldr.w	r7, [r4, #-24]
    72a4:	eb17 070e 	adds.w	r7, r7, lr
    72a8:	f844 7c18 	str.w	r7, [r4, #-24]
    72ac:	f855 6c14 	ldr.w	r6, [r5, #-20]
    72b0:	bf2c      	ite	cs
    72b2:	f04f 0801 	movcs.w	r8, #1
    72b6:	f04f 0800 	movcc.w	r8, #0
    72ba:	fba3 6706 	umull	r6, r7, r3, r6
    72be:	44c8      	add	r8, r9
    72c0:	eb18 0806 	adds.w	r8, r8, r6
    72c4:	f854 6c14 	ldr.w	r6, [r4, #-20]
    72c8:	bf2c      	ite	cs
    72ca:	f04f 0e01 	movcs.w	lr, #1
    72ce:	f04f 0e00 	movcc.w	lr, #0
    72d2:	eb16 0608 	adds.w	r6, r6, r8
    72d6:	f844 6c14 	str.w	r6, [r4, #-20]
        MULADDC_CORE   MULADDC_CORE
    72da:	f855 6c10 	ldr.w	r6, [r5, #-16]
        MULADDC_CORE   MULADDC_CORE
    72de:	eb0e 0907 	add.w	r9, lr, r7
    72e2:	bf2c      	ite	cs
    72e4:	f04f 0e01 	movcs.w	lr, #1
    72e8:	f04f 0e00 	movcc.w	lr, #0
        MULADDC_CORE   MULADDC_CORE
    72ec:	fba3 6706 	umull	r6, r7, r3, r6
        MULADDC_CORE   MULADDC_CORE
    72f0:	44ce      	add	lr, r9
        MULADDC_CORE   MULADDC_CORE
    72f2:	eb1e 0e06 	adds.w	lr, lr, r6
    72f6:	bf2c      	ite	cs
    72f8:	f04f 0801 	movcs.w	r8, #1
    72fc:	f04f 0800 	movcc.w	r8, #0
    7300:	eb08 0907 	add.w	r9, r8, r7
    7304:	f854 7c10 	ldr.w	r7, [r4, #-16]
    7308:	eb17 070e 	adds.w	r7, r7, lr
    730c:	f844 7c10 	str.w	r7, [r4, #-16]
    7310:	f855 6c0c 	ldr.w	r6, [r5, #-12]
    7314:	bf2c      	ite	cs
    7316:	f04f 0801 	movcs.w	r8, #1
    731a:	f04f 0800 	movcc.w	r8, #0
    731e:	fba3 6706 	umull	r6, r7, r3, r6
    7322:	44c8      	add	r8, r9
    7324:	eb18 0806 	adds.w	r8, r8, r6
    7328:	f854 6c0c 	ldr.w	r6, [r4, #-12]
    732c:	bf2c      	ite	cs
    732e:	f04f 0e01 	movcs.w	lr, #1
    7332:	f04f 0e00 	movcc.w	lr, #0
    7336:	eb16 0608 	adds.w	r6, r6, r8
    733a:	f844 6c0c 	str.w	r6, [r4, #-12]
        MULADDC_CORE   MULADDC_CORE
    733e:	f855 6c08 	ldr.w	r6, [r5, #-8]
        MULADDC_CORE   MULADDC_CORE
    7342:	eb0e 0907 	add.w	r9, lr, r7
    7346:	bf2c      	ite	cs
    7348:	f04f 0e01 	movcs.w	lr, #1
    734c:	f04f 0e00 	movcc.w	lr, #0
        MULADDC_CORE   MULADDC_CORE
    7350:	fba3 6706 	umull	r6, r7, r3, r6
        MULADDC_CORE   MULADDC_CORE
    7354:	44ce      	add	lr, r9
        MULADDC_CORE   MULADDC_CORE
    7356:	eb1e 0e06 	adds.w	lr, lr, r6
    735a:	bf2c      	ite	cs
    735c:	f04f 0801 	movcs.w	r8, #1
    7360:	f04f 0800 	movcc.w	r8, #0
    7364:	eb08 0907 	add.w	r9, r8, r7
    7368:	f854 7c08 	ldr.w	r7, [r4, #-8]
    736c:	eb17 070e 	adds.w	r7, r7, lr
    7370:	f844 7c08 	str.w	r7, [r4, #-8]
    7374:	f855 6c04 	ldr.w	r6, [r5, #-4]
    7378:	bf2c      	ite	cs
    737a:	f04f 0801 	movcs.w	r8, #1
    737e:	f04f 0800 	movcc.w	r8, #0
    7382:	fba3 6706 	umull	r6, r7, r3, r6
    7386:	44c8      	add	r8, r9
    7388:	eb18 0806 	adds.w	r8, r8, r6
    738c:	f854 6c04 	ldr.w	r6, [r4, #-4]
    7390:	bf2c      	ite	cs
    7392:	f04f 0e01 	movcs.w	lr, #1
    7396:	f04f 0e00 	movcc.w	lr, #0
    739a:	eb16 0608 	adds.w	r6, r6, r8
    739e:	4477      	add	r7, lr
    73a0:	bf2c      	ite	cs
    73a2:	f04f 0e01 	movcs.w	lr, #1
    73a6:	f04f 0e00 	movcc.w	lr, #0
    73aa:	44be      	add	lr, r7
    73ac:	f844 6c04 	str.w	r6, [r4, #-4]
    for( ; i >= 16; i -= 16 )
    73b0:	f1ac 0c10 	sub.w	ip, ip, #16
    73b4:	e5bb      	b.n	6f2e <mpi_mul_hlp+0xe>
        MULADDC_CORE
    73b6:	f855 6b04 	ldr.w	r6, [r5], #4
    73ba:	680a      	ldr	r2, [r1, #0]
    73bc:	fba3 7806 	umull	r7, r8, r3, r6
    73c0:	eb1e 0e07 	adds.w	lr, lr, r7
    73c4:	bf2c      	ite	cs
    73c6:	2601      	movcs	r6, #1
    73c8:	2600      	movcc	r6, #0
    73ca:	eb12 020e 	adds.w	r2, r2, lr
    73ce:	4446      	add	r6, r8
    73d0:	bf2c      	ite	cs
    73d2:	f04f 0e01 	movcs.w	lr, #1
    73d6:	f04f 0e00 	movcc.w	lr, #0
    73da:	f841 2b04 	str.w	r2, [r1], #4
    73de:	44b6      	add	lr, r6
    for( ; i > 0; i-- )
    73e0:	e64d      	b.n	707e <CONFIG_PM_PARTITION_SIZE_B0_IMAGE+0x7e>
        *d += c; c = ( *d < c ); d++;
    73e2:	6823      	ldr	r3, [r4, #0]
    73e4:	eb13 030e 	adds.w	r3, r3, lr
    73e8:	f844 3b04 	str.w	r3, [r4], #4
    73ec:	bf2c      	ite	cs
    73ee:	f04f 0e01 	movcs.w	lr, #1
    73f2:	f04f 0e00 	movcc.w	lr, #0
    73f6:	e646      	b.n	7086 <CONFIG_PM_PARTITION_SIZE_B0_IMAGE+0x86>

000073f8 <mpi_bigendian_to_host.part.0>:
static void mpi_bigendian_to_host( mbedtls_mpi_uint * const p, size_t limbs )
    73f8:	b573      	push	{r0, r1, r4, r5, r6, lr}
    for( cur_limb_left = p, cur_limb_right = p + ( limbs - 1 );
    73fa:	f101 4180 	add.w	r1, r1, #1073741824	; 0x40000000
    73fe:	3901      	subs	r1, #1
    7400:	eb00 0181 	add.w	r1, r0, r1, lsl #2
    7404:	4281      	cmp	r1, r0
    7406:	d201      	bcs.n	740c <mpi_bigendian_to_host.part.0+0x14>
}
    7408:	b002      	add	sp, #8
    740a:	bd70      	pop	{r4, r5, r6, pc}
    return( mpi_uint_bigendian_to_host_c( x ) );
    740c:	6803      	ldr	r3, [r0, #0]
    740e:	9301      	str	r3, [sp, #4]
        tmp             = mpi_uint_bigendian_to_host( *cur_limb_left  );
    7410:	2304      	movs	r3, #4
    for( i = 0, x_ptr = (unsigned char*) &x; i < ciL; i++, x_ptr++ )
    7412:	eb0d 0203 	add.w	r2, sp, r3
    mbedtls_mpi_uint tmp = 0;
    7416:	2500      	movs	r5, #0
    7418:	4614      	mov	r4, r2
        tmp |= (mbedtls_mpi_uint) *x_ptr;
    741a:	f812 6b01 	ldrb.w	r6, [r2], #1
    741e:	3b01      	subs	r3, #1
    for( i = 0, x_ptr = (unsigned char*) &x; i < ciL; i++, x_ptr++ )
    7420:	f013 03ff 	ands.w	r3, r3, #255	; 0xff
        tmp |= (mbedtls_mpi_uint) *x_ptr;
    7424:	ea46 2505 	orr.w	r5, r6, r5, lsl #8
    for( i = 0, x_ptr = (unsigned char*) &x; i < ciL; i++, x_ptr++ )
    7428:	d1f7      	bne.n	741a <mpi_bigendian_to_host.part.0+0x22>
    return( mpi_uint_bigendian_to_host_c( x ) );
    742a:	680a      	ldr	r2, [r1, #0]
    742c:	9201      	str	r2, [sp, #4]
        *cur_limb_left  = mpi_uint_bigendian_to_host( *cur_limb_right );
    742e:	2204      	movs	r2, #4
        tmp |= (mbedtls_mpi_uint) *x_ptr;
    7430:	f814 6b01 	ldrb.w	r6, [r4], #1
    7434:	3a01      	subs	r2, #1
    for( i = 0, x_ptr = (unsigned char*) &x; i < ciL; i++, x_ptr++ )
    7436:	f012 02ff 	ands.w	r2, r2, #255	; 0xff
        tmp |= (mbedtls_mpi_uint) *x_ptr;
    743a:	ea46 2303 	orr.w	r3, r6, r3, lsl #8
    for( i = 0, x_ptr = (unsigned char*) &x; i < ciL; i++, x_ptr++ )
    743e:	d1f7      	bne.n	7430 <mpi_bigendian_to_host.part.0+0x38>
        *cur_limb_left  = mpi_uint_bigendian_to_host( *cur_limb_right );
    7440:	f840 3b04 	str.w	r3, [r0], #4
        *cur_limb_right = tmp;
    7444:	f841 5904 	str.w	r5, [r1], #-4
         cur_limb_left++, cur_limb_right-- )
    7448:	e7dc      	b.n	7404 <mpi_bigendian_to_host.part.0+0xc>

0000744a <mpi_montmul.isra.0>:
 *                      Its initial content is unused and
 *                      its final content is indeterminate.
 *                      Note that unlike the usual convention in the library
 *                      for `const mbedtls_mpi*`, the content of T can change.
 */
static void mpi_montmul( mbedtls_mpi *A, const mbedtls_mpi *B, const mbedtls_mpi *N, mbedtls_mpi_uint mm,
    744a:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    744e:	b085      	sub	sp, #20
    7450:	4617      	mov	r7, r2
    7452:	9c0e      	ldr	r4, [sp, #56]	; 0x38
    7454:	9000      	str	r0, [sp, #0]
                         const mbedtls_mpi *T )
{
    size_t i, n, m;
    mbedtls_mpi_uint u0, u1, *d;

    memset( T->p, 0, T->n * ciL );
    7456:	6862      	ldr	r2, [r4, #4]
    7458:	68a0      	ldr	r0, [r4, #8]
static void mpi_montmul( mbedtls_mpi *A, const mbedtls_mpi *B, const mbedtls_mpi *N, mbedtls_mpi_uint mm,
    745a:	9303      	str	r3, [sp, #12]
    745c:	468a      	mov	sl, r1
    memset( T->p, 0, T->n * ciL );
    745e:	0092      	lsls	r2, r2, #2
    7460:	2100      	movs	r1, #0
    7462:	f7ff f90e 	bl	6682 <memset>

    d = T->p;
    n = N->n;
    7466:	f8d7 9004 	ldr.w	r9, [r7, #4]
    m = ( B->n < n ) ? B->n : n;
    746a:	f8da 3004 	ldr.w	r3, [sl, #4]
    d = T->p;
    746e:	68a6      	ldr	r6, [r4, #8]
    m = ( B->n < n ) ? B->n : n;
    7470:	454b      	cmp	r3, r9
    7472:	bf28      	it	cs
    7474:	464b      	movcs	r3, r9
        u1 = ( d[0] + u0 * B->p[0] ) * mm;

        mpi_mul_hlp( m, B->p, d, u0 );
        mpi_mul_hlp( n, N->p, d, u1 );

        *d++ = u0; d[n + 1] = 0;
    7476:	f109 0401 	add.w	r4, r9, #1
    m = ( B->n < n ) ? B->n : n;
    747a:	9301      	str	r3, [sp, #4]
        *d++ = u0; d[n + 1] = 0;
    747c:	00a4      	lsls	r4, r4, #2
    d = T->p;
    747e:	46b0      	mov	r8, r6
    for( i = 0; i < n; i++ )
    7480:	2500      	movs	r5, #0
    7482:	9b00      	ldr	r3, [sp, #0]
    7484:	45a9      	cmp	r9, r5
    7486:	6818      	ldr	r0, [r3, #0]
    7488:	d120      	bne.n	74cc <mpi_montmul.isra.0+0x82>
    748a:	3c04      	subs	r4, #4
    748c:	eb06 0804 	add.w	r8, r6, r4
     * plus N. We now potentially subtract N, avoiding leaking whether the
     * subtraction is performed through side channels. */

    /* Copy the n least significant limbs of d to A, so that
     * A = d if d < N (recall that N has n limbs). */
    memcpy( A->p, d, n * ciL );
    7490:	4622      	mov	r2, r4
    7492:	4641      	mov	r1, r8
    7494:	f7ff f8ea 	bl	666c <memcpy>
    /* If d >= N then we want to set A to d - N. To prevent timing attacks,
     * do the calculation without using conditional tests. */
    /* Set d to d0 + (2^biL)^n - N where d0 is the current value of d. */
    d[n] += 1;
    7498:	f856 3014 	ldr.w	r3, [r6, r4, lsl #1]
    d[n] -= mpi_sub_hlp( n, d, d, N->p );
    749c:	f8d7 c008 	ldr.w	ip, [r7, #8]
    d[n] += 1;
    74a0:	3301      	adds	r3, #1
    74a2:	f846 3014 	str.w	r3, [r6, r4, lsl #1]
    mbedtls_mpi_uint c = 0, t, z;
    74a6:	2300      	movs	r3, #0
    for( i = 0; i < n; i++ )
    74a8:	461a      	mov	r2, r3
    74aa:	4295      	cmp	r5, r2
    74ac:	d12c      	bne.n	7508 <mpi_montmul.isra.0+0xbe>
    d[n] -= mpi_sub_hlp( n, d, d, N->p );
    74ae:	f856 2014 	ldr.w	r2, [r6, r4, lsl #1]
     * so d[n] == 0 and we want to keep A as it is.
     * If d0 >= N then d >= (2^biL)^n, and d <= (2^biL)^n + N < 2 * (2^biL)^n
     * so d[n] == 1 and we want to set A to the result of the subtraction
     * which is d - (2^biL)^n, i.e. the n least significant limbs of d.
     * This exactly corresponds to a conditional assignment. */
    mpi_safe_cond_assign( n, A->p, d, (unsigned char) d[n] );
    74b2:	9900      	ldr	r1, [sp, #0]
    d[n] -= mpi_sub_hlp( n, d, d, N->p );
    74b4:	1ad3      	subs	r3, r2, r3
    mpi_safe_cond_assign( n, A->p, d, (unsigned char) d[n] );
    74b6:	6809      	ldr	r1, [r1, #0]
    d[n] -= mpi_sub_hlp( n, d, d, N->p );
    74b8:	f846 3014 	str.w	r3, [r6, r4, lsl #1]
    mpi_safe_cond_assign( n, A->p, d, (unsigned char) d[n] );
    74bc:	4642      	mov	r2, r8
    74be:	b2db      	uxtb	r3, r3
    74c0:	4628      	mov	r0, r5
}
    74c2:	b005      	add	sp, #20
    74c4:	e8bd 4ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    mpi_safe_cond_assign( n, A->p, d, (unsigned char) d[n] );
    74c8:	f7ff bd18 	b.w	6efc <mpi_safe_cond_assign>
        u1 = ( d[0] + u0 * B->p[0] ) * mm;
    74cc:	f8da 1008 	ldr.w	r1, [sl, #8]
        u0 = A->p[i];
    74d0:	f850 b025 	ldr.w	fp, [r0, r5, lsl #2]
        u1 = ( d[0] + u0 * B->p[0] ) * mm;
    74d4:	680b      	ldr	r3, [r1, #0]
    74d6:	f8d8 0000 	ldr.w	r0, [r8]
    74da:	9a03      	ldr	r2, [sp, #12]
    74dc:	fb03 030b 	mla	r3, r3, fp, r0
    74e0:	4353      	muls	r3, r2
        mpi_mul_hlp( m, B->p, d, u0 );
    74e2:	9801      	ldr	r0, [sp, #4]
        u1 = ( d[0] + u0 * B->p[0] ) * mm;
    74e4:	9302      	str	r3, [sp, #8]
        mpi_mul_hlp( m, B->p, d, u0 );
    74e6:	4642      	mov	r2, r8
    74e8:	465b      	mov	r3, fp
    74ea:	f7ff fd19 	bl	6f20 <mpi_mul_hlp>
        mpi_mul_hlp( n, N->p, d, u1 );
    74ee:	9b02      	ldr	r3, [sp, #8]
    74f0:	68b9      	ldr	r1, [r7, #8]
    74f2:	4642      	mov	r2, r8
    74f4:	4648      	mov	r0, r9
    74f6:	f7ff fd13 	bl	6f20 <mpi_mul_hlp>
        *d++ = u0; d[n + 1] = 0;
    74fa:	f848 bb04 	str.w	fp, [r8], #4
    74fe:	2300      	movs	r3, #0
    7500:	f848 3004 	str.w	r3, [r8, r4]
    for( i = 0; i < n; i++ )
    7504:	3501      	adds	r5, #1
    7506:	e7bc      	b.n	7482 <mpi_montmul.isra.0+0x38>
        z = ( l[i] <  c );    t = l[i] - c;
    7508:	f858 7022 	ldr.w	r7, [r8, r2, lsl #2]
        c = ( t < r[i] ) + z; d[i] = t - r[i];
    750c:	f85c 0022 	ldr.w	r0, [ip, r2, lsl #2]
        z = ( l[i] <  c );    t = l[i] - c;
    7510:	1af9      	subs	r1, r7, r3
        c = ( t < r[i] ) + z; d[i] = t - r[i];
    7512:	4281      	cmp	r1, r0
    7514:	bf2c      	ite	cs
    7516:	f04f 0e00 	movcs.w	lr, #0
    751a:	f04f 0e01 	movcc.w	lr, #1
    751e:	1a09      	subs	r1, r1, r0
    7520:	f848 1022 	str.w	r1, [r8, r2, lsl #2]
    7524:	429f      	cmp	r7, r3
    7526:	bf2c      	ite	cs
    7528:	4673      	movcs	r3, lr
    752a:	f10e 0301 	addcc.w	r3, lr, #1
    for( i = 0; i < n; i++ )
    752e:	3201      	adds	r2, #1
    7530:	e7bb      	b.n	74aa <mpi_montmul.isra.0+0x60>

00007532 <mbedtls_mpi_init>:
    X->n = 0;
    7532:	2300      	movs	r3, #0
    7534:	2201      	movs	r2, #1
    7536:	e9c0 2300 	strd	r2, r3, [r0]
    X->p = NULL;
    753a:	6083      	str	r3, [r0, #8]
}
    753c:	4770      	bx	lr

0000753e <mbedtls_mpi_free>:
{
    753e:	b510      	push	{r4, lr}
    if( X == NULL )
    7540:	4604      	mov	r4, r0
    7542:	b168      	cbz	r0, 7560 <mbedtls_mpi_free+0x22>
    if( X->p != NULL )
    7544:	6880      	ldr	r0, [r0, #8]
    7546:	b130      	cbz	r0, 7556 <mbedtls_mpi_free+0x18>
    mbedtls_platform_zeroize( v, ciL * n );
    7548:	6861      	ldr	r1, [r4, #4]
    754a:	0089      	lsls	r1, r1, #2
    754c:	f7fc ffbc 	bl	44c8 <mbedtls_platform_zeroize>
        mbedtls_free( X->p );
    7550:	68a0      	ldr	r0, [r4, #8]
    7552:	f7fc ffa9 	bl	44a8 <mbedtls_free>
    X->n = 0;
    7556:	2300      	movs	r3, #0
    7558:	2201      	movs	r2, #1
    755a:	e9c4 2300 	strd	r2, r3, [r4]
    X->p = NULL;
    755e:	60a3      	str	r3, [r4, #8]
}
    7560:	bd10      	pop	{r4, pc}

00007562 <mbedtls_mpi_grow>:
    if( nblimbs > MBEDTLS_MPI_MAX_LIMBS )
    7562:	f242 7310 	movw	r3, #10000	; 0x2710
    7566:	4299      	cmp	r1, r3
{
    7568:	b570      	push	{r4, r5, r6, lr}
    756a:	4604      	mov	r4, r0
    756c:	460d      	mov	r5, r1
    if( nblimbs > MBEDTLS_MPI_MAX_LIMBS )
    756e:	d902      	bls.n	7576 <mbedtls_mpi_grow+0x14>
        return( MBEDTLS_ERR_MPI_ALLOC_FAILED );
    7570:	f06f 000f 	mvn.w	r0, #15
}
    7574:	bd70      	pop	{r4, r5, r6, pc}
    if( X->n < nblimbs )
    7576:	6843      	ldr	r3, [r0, #4]
    7578:	428b      	cmp	r3, r1
    757a:	d216      	bcs.n	75aa <mbedtls_mpi_grow+0x48>
        if( ( p = (mbedtls_mpi_uint*)mbedtls_calloc( nblimbs, ciL ) ) == NULL )
    757c:	2104      	movs	r1, #4
    757e:	4628      	mov	r0, r5
    7580:	f7fc ff8c 	bl	449c <mbedtls_calloc>
    7584:	4606      	mov	r6, r0
    7586:	2800      	cmp	r0, #0
    7588:	d0f2      	beq.n	7570 <mbedtls_mpi_grow+0xe>
        if( X->p != NULL )
    758a:	68a1      	ldr	r1, [r4, #8]
    758c:	b159      	cbz	r1, 75a6 <mbedtls_mpi_grow+0x44>
            memcpy( p, X->p, X->n * ciL );
    758e:	6862      	ldr	r2, [r4, #4]
    7590:	0092      	lsls	r2, r2, #2
    7592:	f7ff f86b 	bl	666c <memcpy>
    mbedtls_platform_zeroize( v, ciL * n );
    7596:	6861      	ldr	r1, [r4, #4]
    7598:	68a0      	ldr	r0, [r4, #8]
    759a:	0089      	lsls	r1, r1, #2
    759c:	f7fc ff94 	bl	44c8 <mbedtls_platform_zeroize>
            mbedtls_free( X->p );
    75a0:	68a0      	ldr	r0, [r4, #8]
    75a2:	f7fc ff81 	bl	44a8 <mbedtls_free>
        X->p = p;
    75a6:	e9c4 5601 	strd	r5, r6, [r4, #4]
    return( 0 );
    75aa:	2000      	movs	r0, #0
    75ac:	e7e2      	b.n	7574 <mbedtls_mpi_grow+0x12>

000075ae <mbedtls_mpi_resize_clear>:
{
    75ae:	b538      	push	{r3, r4, r5, lr}
    75b0:	4604      	mov	r4, r0
    if( limbs == 0 )
    75b2:	460d      	mov	r5, r1
    75b4:	b919      	cbnz	r1, 75be <mbedtls_mpi_resize_clear+0x10>
        mbedtls_mpi_free( X );
    75b6:	f7ff ffc2 	bl	753e <mbedtls_mpi_free>
}
    75ba:	2000      	movs	r0, #0
    75bc:	bd38      	pop	{r3, r4, r5, pc}
    else if( X->n == limbs )
    75be:	6842      	ldr	r2, [r0, #4]
    75c0:	428a      	cmp	r2, r1
    75c2:	d107      	bne.n	75d4 <mbedtls_mpi_resize_clear+0x26>
        memset( X->p, 0, limbs * ciL );
    75c4:	6880      	ldr	r0, [r0, #8]
    75c6:	0092      	lsls	r2, r2, #2
    75c8:	2100      	movs	r1, #0
    75ca:	f7ff f85a 	bl	6682 <memset>
        X->s = 1;
    75ce:	2301      	movs	r3, #1
    75d0:	6023      	str	r3, [r4, #0]
        return( 0 );
    75d2:	e7f2      	b.n	75ba <mbedtls_mpi_resize_clear+0xc>
        mbedtls_mpi_free( X );
    75d4:	f7ff ffb3 	bl	753e <mbedtls_mpi_free>
        return( mbedtls_mpi_grow( X, limbs ) );
    75d8:	4629      	mov	r1, r5
    75da:	4620      	mov	r0, r4
}
    75dc:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
        return( mbedtls_mpi_grow( X, limbs ) );
    75e0:	f7ff bfbf 	b.w	7562 <mbedtls_mpi_grow>

000075e4 <mbedtls_mpi_copy>:
    if( X == Y )
    75e4:	4288      	cmp	r0, r1
{
    75e6:	b570      	push	{r4, r5, r6, lr}
    75e8:	4605      	mov	r5, r0
    75ea:	460e      	mov	r6, r1
    if( X == Y )
    75ec:	d00a      	beq.n	7604 <mbedtls_mpi_copy+0x20>
    if( Y->n == 0 )
    75ee:	684c      	ldr	r4, [r1, #4]
    75f0:	6840      	ldr	r0, [r0, #4]
    75f2:	b96c      	cbnz	r4, 7610 <mbedtls_mpi_copy+0x2c>
        if( X->n != 0 )
    75f4:	b1c8      	cbz	r0, 762a <mbedtls_mpi_copy+0x46>
            X->s = 1;
    75f6:	2301      	movs	r3, #1
            memset( X->p, 0, X->n * ciL );
    75f8:	0082      	lsls	r2, r0, #2
            X->s = 1;
    75fa:	602b      	str	r3, [r5, #0]
            memset( X->p, 0, X->n * ciL );
    75fc:	68a8      	ldr	r0, [r5, #8]
    75fe:	4621      	mov	r1, r4
    7600:	f7ff f83f 	bl	6682 <memset>
        return( 0 );
    7604:	2000      	movs	r0, #0
    7606:	e010      	b.n	762a <mbedtls_mpi_copy+0x46>
        if( Y->p[i] != 0 )
    7608:	68b3      	ldr	r3, [r6, #8]
    760a:	f853 3024 	ldr.w	r3, [r3, r4, lsl #2]
    760e:	b913      	cbnz	r3, 7616 <mbedtls_mpi_copy+0x32>
    for( i = Y->n - 1; i > 0; i-- )
    7610:	3c01      	subs	r4, #1
    7612:	2c00      	cmp	r4, #0
    7614:	d1f8      	bne.n	7608 <mbedtls_mpi_copy+0x24>
    i++;
    7616:	3401      	adds	r4, #1
    X->s = Y->s;
    7618:	6833      	ldr	r3, [r6, #0]
    761a:	602b      	str	r3, [r5, #0]
    if( X->n < i )
    761c:	4284      	cmp	r4, r0
    761e:	d905      	bls.n	762c <mbedtls_mpi_copy+0x48>
        MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, i ) );
    7620:	4621      	mov	r1, r4
    7622:	4628      	mov	r0, r5
    7624:	f7ff ff9d 	bl	7562 <mbedtls_mpi_grow>
    7628:	b140      	cbz	r0, 763c <mbedtls_mpi_copy+0x58>
}
    762a:	bd70      	pop	{r4, r5, r6, pc}
        memset( X->p + i, 0, ( X->n - i ) * ciL );
    762c:	1b02      	subs	r2, r0, r4
    762e:	68a8      	ldr	r0, [r5, #8]
    7630:	0092      	lsls	r2, r2, #2
    7632:	2100      	movs	r1, #0
    7634:	eb00 0084 	add.w	r0, r0, r4, lsl #2
    7638:	f7ff f823 	bl	6682 <memset>
    memcpy( X->p, Y->p, i * ciL );
    763c:	68b1      	ldr	r1, [r6, #8]
    763e:	68a8      	ldr	r0, [r5, #8]
    7640:	00a2      	lsls	r2, r4, #2
    7642:	f7ff f813 	bl	666c <memcpy>
    7646:	e7dd      	b.n	7604 <mbedtls_mpi_copy+0x20>

00007648 <mbedtls_mpi_safe_cond_assign>:
{
    7648:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    764a:	460e      	mov	r6, r1
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, Y->n ) );
    764c:	6849      	ldr	r1, [r1, #4]
{
    764e:	4605      	mov	r5, r0
    7650:	4614      	mov	r4, r2
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, Y->n ) );
    7652:	f7ff ff86 	bl	7562 <mbedtls_mpi_grow>
    7656:	4607      	mov	r7, r0
    7658:	b9c0      	cbnz	r0, 768c <mbedtls_mpi_safe_cond_assign+0x44>
    assign = (assign | (unsigned char)-assign) >> (sizeof( assign ) * 8 - 1);
    765a:	4263      	negs	r3, r4
    765c:	431c      	orrs	r4, r3
    unsigned ua = a + 1;
    765e:	682b      	ldr	r3, [r5, #0]
    mpi_safe_cond_assign( Y->n, X->p, Y->p, assign );
    7660:	68a9      	ldr	r1, [r5, #8]
    7662:	6870      	ldr	r0, [r6, #4]
    unsigned ua = a + 1;
    7664:	1c5a      	adds	r2, r3, #1
    unsigned ub = b + 1;
    7666:	6833      	ldr	r3, [r6, #0]
    7668:	3301      	adds	r3, #1
    assign = (assign | (unsigned char)-assign) >> (sizeof( assign ) * 8 - 1);
    766a:	f3c4 14c0 	ubfx	r4, r4, #7, #1
    unsigned ur = ( ua & ~mask ) | ( ub & mask );
    766e:	4053      	eors	r3, r2
    7670:	ea03 0344 	and.w	r3, r3, r4, lsl #1
    7674:	4053      	eors	r3, r2
    return( (int) ur - 1 );
    7676:	3b01      	subs	r3, #1
    X->s = mpi_safe_cond_select_sign( X->s, Y->s, assign );
    7678:	602b      	str	r3, [r5, #0]
    mpi_safe_cond_assign( Y->n, X->p, Y->p, assign );
    767a:	68b2      	ldr	r2, [r6, #8]
    767c:	4623      	mov	r3, r4
    767e:	f7ff fc3d 	bl	6efc <mpi_safe_cond_assign>
    for( i = Y->n; i < X->n; i++ )
    7682:	6871      	ldr	r1, [r6, #4]
        X->p[i] &= ~limb_mask;
    7684:	3c01      	subs	r4, #1
    for( i = Y->n; i < X->n; i++ )
    7686:	686b      	ldr	r3, [r5, #4]
    7688:	428b      	cmp	r3, r1
    768a:	d801      	bhi.n	7690 <mbedtls_mpi_safe_cond_assign+0x48>
}
    768c:	4638      	mov	r0, r7
    768e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
        X->p[i] &= ~limb_mask;
    7690:	68aa      	ldr	r2, [r5, #8]
    7692:	f852 3021 	ldr.w	r3, [r2, r1, lsl #2]
    7696:	4023      	ands	r3, r4
    7698:	f842 3021 	str.w	r3, [r2, r1, lsl #2]
    for( i = Y->n; i < X->n; i++ )
    769c:	3101      	adds	r1, #1
    769e:	e7f2      	b.n	7686 <mbedtls_mpi_safe_cond_assign+0x3e>

000076a0 <mbedtls_mpi_lset>:
{
    76a0:	b570      	push	{r4, r5, r6, lr}
    76a2:	460e      	mov	r6, r1
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, 1 ) );
    76a4:	2101      	movs	r1, #1
{
    76a6:	4604      	mov	r4, r0
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, 1 ) );
    76a8:	f7ff ff5b 	bl	7562 <mbedtls_mpi_grow>
    76ac:	4605      	mov	r5, r0
    76ae:	b988      	cbnz	r0, 76d4 <mbedtls_mpi_lset+0x34>
    memset( X->p, 0, X->n * ciL );
    76b0:	6862      	ldr	r2, [r4, #4]
    76b2:	4601      	mov	r1, r0
    76b4:	0092      	lsls	r2, r2, #2
    76b6:	68a0      	ldr	r0, [r4, #8]
    76b8:	f7fe ffe3 	bl	6682 <memset>
    X->p[0] = ( z < 0 ) ? -z : z;
    76bc:	68a3      	ldr	r3, [r4, #8]
    76be:	ea86 72e6 	eor.w	r2, r6, r6, asr #31
    X->s    = ( z < 0 ) ? -1 : 1;
    76c2:	2e00      	cmp	r6, #0
    X->p[0] = ( z < 0 ) ? -z : z;
    76c4:	eba2 72e6 	sub.w	r2, r2, r6, asr #31
    76c8:	601a      	str	r2, [r3, #0]
    X->s    = ( z < 0 ) ? -1 : 1;
    76ca:	bfb4      	ite	lt
    76cc:	f04f 33ff 	movlt.w	r3, #4294967295
    76d0:	2301      	movge	r3, #1
    76d2:	6023      	str	r3, [r4, #0]
}
    76d4:	4628      	mov	r0, r5
    76d6:	bd70      	pop	{r4, r5, r6, pc}

000076d8 <mbedtls_mpi_get_bit>:
    if( X->n * biL <= pos )
    76d8:	6843      	ldr	r3, [r0, #4]
    76da:	ebb1 1f43 	cmp.w	r1, r3, lsl #5
    return( ( X->p[pos / biL] >> ( pos % biL ) ) & 0x01 );
    76de:	bf3f      	itttt	cc
    76e0:	094a      	lsrcc	r2, r1, #5
    76e2:	6883      	ldrcc	r3, [r0, #8]
    76e4:	f853 0022 	ldrcc.w	r0, [r3, r2, lsl #2]
    76e8:	f001 011f 	andcc.w	r1, r1, #31
    76ec:	bf3a      	itte	cc
    76ee:	fa20 f101 	lsrcc.w	r1, r0, r1
    76f2:	f001 0001 	andcc.w	r0, r1, #1
        return( 0 );
    76f6:	2000      	movcs	r0, #0
}
    76f8:	4770      	bx	lr

000076fa <mbedtls_mpi_bitlen>:
{
    76fa:	4602      	mov	r2, r0
    if( X->n == 0 )
    76fc:	6840      	ldr	r0, [r0, #4]
    76fe:	b188      	cbz	r0, 7724 <mbedtls_mpi_bitlen+0x2a>
    for( i = X->n - 1; i > 0; i-- )
    7700:	6892      	ldr	r2, [r2, #8]
    7702:	1e43      	subs	r3, r0, #1
    7704:	b97b      	cbnz	r3, 7726 <mbedtls_mpi_bitlen+0x2c>
    j = biL - mbedtls_clz( X->p[i] );
    7706:	f852 1023 	ldr.w	r1, [r2, r3, lsl #2]
    for( j = 0; j < biL; j++ )
    770a:	2000      	movs	r0, #0
    mbedtls_mpi_uint mask = (mbedtls_mpi_uint) 1 << (biL - 1);
    770c:	f04f 4200 	mov.w	r2, #2147483648	; 0x80000000
        if( x & mask ) break;
    7710:	4211      	tst	r1, r2
    7712:	d104      	bne.n	771e <mbedtls_mpi_bitlen+0x24>
    for( j = 0; j < biL; j++ )
    7714:	3001      	adds	r0, #1
    7716:	2820      	cmp	r0, #32
        mask >>= 1;
    7718:	ea4f 0252 	mov.w	r2, r2, lsr #1
    for( j = 0; j < biL; j++ )
    771c:	d1f8      	bne.n	7710 <mbedtls_mpi_bitlen+0x16>
    return( ( i * biL ) + j );
    771e:	3301      	adds	r3, #1
    7720:	ebc0 1043 	rsb	r0, r0, r3, lsl #5
}
    7724:	4770      	bx	lr
        if( X->p[i] != 0 )
    7726:	f852 1023 	ldr.w	r1, [r2, r3, lsl #2]
    772a:	2900      	cmp	r1, #0
    772c:	d1eb      	bne.n	7706 <mbedtls_mpi_bitlen+0xc>
    for( i = X->n - 1; i > 0; i-- )
    772e:	3b01      	subs	r3, #1
    7730:	e7e8      	b.n	7704 <mbedtls_mpi_bitlen+0xa>

00007732 <mbedtls_mpi_size>:
{
    7732:	b508      	push	{r3, lr}
    return( ( mbedtls_mpi_bitlen( X ) + 7 ) >> 3 );
    7734:	f7ff ffe1 	bl	76fa <mbedtls_mpi_bitlen>
    7738:	3007      	adds	r0, #7
}
    773a:	08c0      	lsrs	r0, r0, #3
    773c:	bd08      	pop	{r3, pc}

0000773e <mbedtls_mpi_read_binary>:
{
    773e:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    size_t const limbs    = CHARS_TO_LIMBS( buflen );
    7742:	f012 0403 	ands.w	r4, r2, #3
    7746:	bf18      	it	ne
    7748:	2401      	movne	r4, #1
    774a:	eb04 0492 	add.w	r4, r4, r2, lsr #2
{
    774e:	4688      	mov	r8, r1
    MBEDTLS_MPI_CHK( mbedtls_mpi_resize_clear( X, limbs ) );
    7750:	4621      	mov	r1, r4
{
    7752:	4607      	mov	r7, r0
    7754:	4615      	mov	r5, r2
    MBEDTLS_MPI_CHK( mbedtls_mpi_resize_clear( X, limbs ) );
    7756:	f7ff ff2a 	bl	75ae <mbedtls_mpi_resize_clear>
    775a:	4606      	mov	r6, r0
    775c:	b968      	cbnz	r0, 777a <mbedtls_mpi_read_binary+0x3c>
    if( buflen != 0 )
    775e:	b165      	cbz	r5, 777a <mbedtls_mpi_read_binary+0x3c>
        memcpy( Xp + overhead, buf, buflen );
    7760:	68bb      	ldr	r3, [r7, #8]
    size_t const overhead = ( limbs * ciL ) - buflen;
    7762:	ebc5 0084 	rsb	r0, r5, r4, lsl #2
        memcpy( Xp + overhead, buf, buflen );
    7766:	462a      	mov	r2, r5
    7768:	4641      	mov	r1, r8
    776a:	4418      	add	r0, r3
    776c:	f7fe ff7e 	bl	666c <memcpy>
    if( limbs == 0 )
    7770:	b11c      	cbz	r4, 777a <mbedtls_mpi_read_binary+0x3c>
    7772:	68b8      	ldr	r0, [r7, #8]
    7774:	4621      	mov	r1, r4
    7776:	f7ff fe3f 	bl	73f8 <mpi_bigendian_to_host.part.0>
}
    777a:	4630      	mov	r0, r6
    777c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

00007780 <mbedtls_mpi_write_binary>:
{
    7780:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    7782:	4604      	mov	r4, r0
    7784:	4608      	mov	r0, r1
    stored_bytes = X->n * ciL;
    7786:	6863      	ldr	r3, [r4, #4]
    if( stored_bytes < buflen )
    7788:	ebb2 0f83 	cmp.w	r2, r3, lsl #2
    stored_bytes = X->n * ciL;
    778c:	ea4f 0583 	mov.w	r5, r3, lsl #2
    if( stored_bytes < buflen )
    7790:	d91c      	bls.n	77cc <mbedtls_mpi_write_binary+0x4c>
        p = buf + buflen - stored_bytes;
    7792:	1b52      	subs	r2, r2, r5
    7794:	188e      	adds	r6, r1, r2
        memset( buf, 0, buflen - stored_bytes );
    7796:	2100      	movs	r1, #0
    7798:	f7fe ff73 	bl	6682 <memset>
        p = buf + buflen - stored_bytes;
    779c:	4630      	mov	r0, r6
    779e:	462a      	mov	r2, r5
    for( i = 0; i < bytes_to_copy; i++ )
    77a0:	1881      	adds	r1, r0, r2
    77a2:	2300      	movs	r3, #0
    77a4:	429a      	cmp	r2, r3
    77a6:	d113      	bne.n	77d0 <mbedtls_mpi_write_binary+0x50>
    return( 0 );
    77a8:	2000      	movs	r0, #0
}
    77aa:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
            if( GET_BYTE( X, i ) != 0 )
    77ac:	68a7      	ldr	r7, [r4, #8]
    77ae:	f023 0c03 	bic.w	ip, r3, #3
    77b2:	f003 0103 	and.w	r1, r3, #3
    77b6:	00ce      	lsls	r6, r1, #3
    77b8:	f857 100c 	ldr.w	r1, [r7, ip]
    77bc:	40f1      	lsrs	r1, r6
    77be:	f011 0fff 	tst.w	r1, #255	; 0xff
    77c2:	d111      	bne.n	77e8 <mbedtls_mpi_write_binary+0x68>
        for( i = bytes_to_copy; i < stored_bytes; i++ )
    77c4:	3301      	adds	r3, #1
    77c6:	42ab      	cmp	r3, r5
    77c8:	d1f0      	bne.n	77ac <mbedtls_mpi_write_binary+0x2c>
    77ca:	e7e9      	b.n	77a0 <mbedtls_mpi_write_binary+0x20>
    77cc:	4613      	mov	r3, r2
    77ce:	e7fa      	b.n	77c6 <mbedtls_mpi_write_binary+0x46>
        p[bytes_to_copy - i - 1] = GET_BYTE( X, i );
    77d0:	68a7      	ldr	r7, [r4, #8]
    77d2:	f023 0603 	bic.w	r6, r3, #3
    77d6:	f003 0003 	and.w	r0, r3, #3
    77da:	00c5      	lsls	r5, r0, #3
    77dc:	59b8      	ldr	r0, [r7, r6]
    77de:	40e8      	lsrs	r0, r5
    77e0:	f801 0d01 	strb.w	r0, [r1, #-1]!
    for( i = 0; i < bytes_to_copy; i++ )
    77e4:	3301      	adds	r3, #1
    77e6:	e7dd      	b.n	77a4 <mbedtls_mpi_write_binary+0x24>
                return( MBEDTLS_ERR_MPI_BUFFER_TOO_SMALL );
    77e8:	f06f 0007 	mvn.w	r0, #7
    77ec:	e7dd      	b.n	77aa <mbedtls_mpi_write_binary+0x2a>

000077ee <mbedtls_mpi_shift_l>:
{
    77ee:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    77f0:	4604      	mov	r4, r0
    77f2:	460e      	mov	r6, r1
    v0 = count / (biL    );
    77f4:	094d      	lsrs	r5, r1, #5
    t1 = count & (biL - 1);
    77f6:	f001 071f 	and.w	r7, r1, #31
    i = mbedtls_mpi_bitlen( X ) + count;
    77fa:	f7ff ff7e 	bl	76fa <mbedtls_mpi_bitlen>
    if( X->n * biL < i )
    77fe:	6863      	ldr	r3, [r4, #4]
    i = mbedtls_mpi_bitlen( X ) + count;
    7800:	4430      	add	r0, r6
    if( X->n * biL < i )
    7802:	ebb0 1f43 	cmp.w	r0, r3, lsl #5
    7806:	d805      	bhi.n	7814 <mbedtls_mpi_shift_l+0x26>
    if( v0 > 0 )
    7808:	2e1f      	cmp	r6, #31
    780a:	d80f      	bhi.n	782c <mbedtls_mpi_shift_l+0x3e>
    if( t1 > 0 )
    780c:	2f00      	cmp	r7, #0
    780e:	d13a      	bne.n	7886 <mbedtls_mpi_shift_l+0x98>
    ret = 0;
    7810:	2000      	movs	r0, #0
    7812:	e00a      	b.n	782a <mbedtls_mpi_shift_l+0x3c>
        MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, BITS_TO_LIMBS( i ) ) );
    7814:	f010 011f 	ands.w	r1, r0, #31
    7818:	bf18      	it	ne
    781a:	2101      	movne	r1, #1
    781c:	eb01 1150 	add.w	r1, r1, r0, lsr #5
    7820:	4620      	mov	r0, r4
    7822:	f7ff fe9e 	bl	7562 <mbedtls_mpi_grow>
    7826:	2800      	cmp	r0, #0
    7828:	d0ee      	beq.n	7808 <mbedtls_mpi_shift_l+0x1a>
}
    782a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
        for( i = X->n; i > v0; i-- )
    782c:	6863      	ldr	r3, [r4, #4]
    782e:	f06f 0003 	mvn.w	r0, #3
    7832:	009a      	lsls	r2, r3, #2
    7834:	4368      	muls	r0, r5
    7836:	4619      	mov	r1, r3
    7838:	42a9      	cmp	r1, r5
    783a:	f1a2 0204 	sub.w	r2, r2, #4
    783e:	d80a      	bhi.n	7856 <mbedtls_mpi_shift_l+0x68>
    7840:	42ab      	cmp	r3, r5
    7842:	bf28      	it	cs
    7844:	462b      	movcs	r3, r5
    7846:	009b      	lsls	r3, r3, #2
            X->p[i - 1] = 0;
    7848:	2200      	movs	r2, #0
        for( ; i > 0; i-- )
    784a:	3b04      	subs	r3, #4
    784c:	1d19      	adds	r1, r3, #4
    784e:	d0dd      	beq.n	780c <mbedtls_mpi_shift_l+0x1e>
            X->p[i - 1] = 0;
    7850:	68a1      	ldr	r1, [r4, #8]
    7852:	50ca      	str	r2, [r1, r3]
        for( ; i > 0; i-- )
    7854:	e7f9      	b.n	784a <mbedtls_mpi_shift_l+0x5c>
            X->p[i - 1] = X->p[i - v0 - 1];
    7856:	68a6      	ldr	r6, [r4, #8]
    7858:	eb06 0c02 	add.w	ip, r6, r2
        for( i = X->n; i > v0; i-- )
    785c:	3901      	subs	r1, #1
            X->p[i - 1] = X->p[i - v0 - 1];
    785e:	f85c c000 	ldr.w	ip, [ip, r0]
    7862:	f846 c002 	str.w	ip, [r6, r2]
        for( i = X->n; i > v0; i-- )
    7866:	e7e7      	b.n	7838 <mbedtls_mpi_shift_l+0x4a>
            r1 = X->p[i] >> (biL - t1);
    7868:	68a0      	ldr	r0, [r4, #8]
    786a:	f850 1025 	ldr.w	r1, [r0, r5, lsl #2]
            X->p[i] <<= t1;
    786e:	fa01 f307 	lsl.w	r3, r1, r7
            X->p[i] |= r0;
    7872:	4313      	orrs	r3, r2
    7874:	f840 3025 	str.w	r3, [r0, r5, lsl #2]
            r0 = r1;
    7878:	fa21 f206 	lsr.w	r2, r1, r6
        for( i = v0; i < X->n; i++ )
    787c:	3501      	adds	r5, #1
    787e:	6863      	ldr	r3, [r4, #4]
    7880:	42ab      	cmp	r3, r5
    7882:	d8f1      	bhi.n	7868 <mbedtls_mpi_shift_l+0x7a>
    7884:	e7c4      	b.n	7810 <mbedtls_mpi_shift_l+0x22>
    mbedtls_mpi_uint r0 = 0, r1;
    7886:	2200      	movs	r2, #0
            r1 = X->p[i] >> (biL - t1);
    7888:	f1c7 0620 	rsb	r6, r7, #32
    788c:	e7f7      	b.n	787e <mbedtls_mpi_shift_l+0x90>

0000788e <mbedtls_mpi_shift_r>:
    if( v0 > X->n || ( v0 == X->n && v1 > 0 ) )
    788e:	6843      	ldr	r3, [r0, #4]
{
    7890:	b4f0      	push	{r4, r5, r6, r7}
    v0 = count /  biL;
    7892:	094c      	lsrs	r4, r1, #5
    if( v0 > X->n || ( v0 == X->n && v1 > 0 ) )
    7894:	42a3      	cmp	r3, r4
    v1 = count & (biL - 1);
    7896:	f001 021f 	and.w	r2, r1, #31
    if( v0 > X->n || ( v0 == X->n && v1 > 0 ) )
    789a:	d301      	bcc.n	78a0 <mbedtls_mpi_shift_r+0x12>
    789c:	d104      	bne.n	78a8 <mbedtls_mpi_shift_r+0x1a>
    789e:	b36a      	cbz	r2, 78fc <mbedtls_mpi_shift_r+0x6e>
}
    78a0:	bcf0      	pop	{r4, r5, r6, r7}
        return mbedtls_mpi_lset( X, 0 );
    78a2:	2100      	movs	r1, #0
    78a4:	f7ff befc 	b.w	76a0 <mbedtls_mpi_lset>
    if( v0 > 0 )
    78a8:	291f      	cmp	r1, #31
    78aa:	d829      	bhi.n	7900 <mbedtls_mpi_shift_r+0x72>
    if( v1 > 0 )
    78ac:	b9aa      	cbnz	r2, 78da <mbedtls_mpi_shift_r+0x4c>
}
    78ae:	2000      	movs	r0, #0
    78b0:	bcf0      	pop	{r4, r5, r6, r7}
    78b2:	4770      	bx	lr
            X->p[i] = X->p[i + v0];
    78b4:	6885      	ldr	r5, [r0, #8]
    78b6:	586e      	ldr	r6, [r5, r1]
    78b8:	f845 6023 	str.w	r6, [r5, r3, lsl #2]
        for( i = 0; i < X->n - v0; i++ )
    78bc:	3104      	adds	r1, #4
    78be:	3301      	adds	r3, #1
    78c0:	6845      	ldr	r5, [r0, #4]
    78c2:	1b2d      	subs	r5, r5, r4
    78c4:	429d      	cmp	r5, r3
    78c6:	d8f5      	bhi.n	78b4 <mbedtls_mpi_shift_r+0x26>
            X->p[i] = 0;
    78c8:	2400      	movs	r4, #0
        for( ; i < X->n; i++ )
    78ca:	6841      	ldr	r1, [r0, #4]
    78cc:	4299      	cmp	r1, r3
    78ce:	d9ed      	bls.n	78ac <mbedtls_mpi_shift_r+0x1e>
            X->p[i] = 0;
    78d0:	6881      	ldr	r1, [r0, #8]
    78d2:	f841 4023 	str.w	r4, [r1, r3, lsl #2]
        for( ; i < X->n; i++ )
    78d6:	3301      	adds	r3, #1
    78d8:	e7f7      	b.n	78ca <mbedtls_mpi_shift_r+0x3c>
        for( i = X->n; i > 0; i-- )
    78da:	6843      	ldr	r3, [r0, #4]
    mbedtls_mpi_uint r0 = 0, r1;
    78dc:	2400      	movs	r4, #0
            r1 = X->p[i - 1] << (biL - v1);
    78de:	f1c2 0720 	rsb	r7, r2, #32
        for( i = X->n; i > 0; i-- )
    78e2:	3b01      	subs	r3, #1
    78e4:	d3e3      	bcc.n	78ae <mbedtls_mpi_shift_r+0x20>
            r1 = X->p[i - 1] << (biL - v1);
    78e6:	6886      	ldr	r6, [r0, #8]
    78e8:	f856 5023 	ldr.w	r5, [r6, r3, lsl #2]
            X->p[i - 1] >>= v1;
    78ec:	fa25 f102 	lsr.w	r1, r5, r2
            X->p[i - 1] |= r0;
    78f0:	4321      	orrs	r1, r4
    78f2:	f846 1023 	str.w	r1, [r6, r3, lsl #2]
            r0 = r1;
    78f6:	fa05 f407 	lsl.w	r4, r5, r7
    78fa:	e7f2      	b.n	78e2 <mbedtls_mpi_shift_r+0x54>
    if( v0 > 0 )
    78fc:	291f      	cmp	r1, #31
    78fe:	d9d6      	bls.n	78ae <mbedtls_mpi_shift_r+0x20>
    7900:	00a1      	lsls	r1, r4, #2
{
    7902:	2300      	movs	r3, #0
    7904:	e7dc      	b.n	78c0 <mbedtls_mpi_shift_r+0x32>

00007906 <mbedtls_mpi_cmp_abs>:
{
    7906:	b530      	push	{r4, r5, lr}
    for( i = X->n; i > 0; i-- )
    7908:	6843      	ldr	r3, [r0, #4]
    790a:	b92b      	cbnz	r3, 7918 <mbedtls_mpi_cmp_abs+0x12>
    for( j = Y->n; j > 0; j-- )
    790c:	684a      	ldr	r2, [r1, #4]
    790e:	b962      	cbnz	r2, 792a <mbedtls_mpi_cmp_abs+0x24>
    if( i == 0 && j == 0 )
    7910:	1e18      	subs	r0, r3, #0
    7912:	bf18      	it	ne
    7914:	2001      	movne	r0, #1
    7916:	e028      	b.n	796a <mbedtls_mpi_cmp_abs+0x64>
        if( X->p[i - 1] != 0 )
    7918:	6882      	ldr	r2, [r0, #8]
    791a:	eb02 0283 	add.w	r2, r2, r3, lsl #2
    791e:	f852 2c04 	ldr.w	r2, [r2, #-4]
    7922:	2a00      	cmp	r2, #0
    7924:	d1f2      	bne.n	790c <mbedtls_mpi_cmp_abs+0x6>
    for( i = X->n; i > 0; i-- )
    7926:	3b01      	subs	r3, #1
    7928:	e7ef      	b.n	790a <mbedtls_mpi_cmp_abs+0x4>
        if( Y->p[j - 1] != 0 )
    792a:	688c      	ldr	r4, [r1, #8]
    792c:	eb04 0582 	add.w	r5, r4, r2, lsl #2
    7930:	f855 5c04 	ldr.w	r5, [r5, #-4]
    7934:	b985      	cbnz	r5, 7958 <mbedtls_mpi_cmp_abs+0x52>
    for( j = Y->n; j > 0; j-- )
    7936:	3a01      	subs	r2, #1
    7938:	e7e9      	b.n	790e <mbedtls_mpi_cmp_abs+0x8>
        if( X->p[i - 1] > Y->p[i - 1] ) return(  1 );
    793a:	6882      	ldr	r2, [r0, #8]
    793c:	f852 1023 	ldr.w	r1, [r2, r3, lsl #2]
    7940:	f854 2023 	ldr.w	r2, [r4, r3, lsl #2]
    7944:	4291      	cmp	r1, r2
    7946:	d805      	bhi.n	7954 <mbedtls_mpi_cmp_abs+0x4e>
        if( X->p[i - 1] < Y->p[i - 1] ) return( -1 );
    7948:	f103 33ff 	add.w	r3, r3, #4294967295
    794c:	d20a      	bcs.n	7964 <mbedtls_mpi_cmp_abs+0x5e>
    if( j > i ) return( -1 );
    794e:	f04f 30ff 	mov.w	r0, #4294967295
    7952:	e00a      	b.n	796a <mbedtls_mpi_cmp_abs+0x64>
    if( i > j ) return(  1 );
    7954:	2001      	movs	r0, #1
    7956:	e008      	b.n	796a <mbedtls_mpi_cmp_abs+0x64>
    if( i == 0 && j == 0 )
    7958:	b10b      	cbz	r3, 795e <mbedtls_mpi_cmp_abs+0x58>
    if( i > j ) return(  1 );
    795a:	4293      	cmp	r3, r2
    795c:	d8fa      	bhi.n	7954 <mbedtls_mpi_cmp_abs+0x4e>
    if( j > i ) return( -1 );
    795e:	4293      	cmp	r3, r2
    7960:	d3f5      	bcc.n	794e <mbedtls_mpi_cmp_abs+0x48>
    7962:	3b01      	subs	r3, #1
    for( ; i > 0; i-- )
    7964:	1c5a      	adds	r2, r3, #1
    7966:	d1e8      	bne.n	793a <mbedtls_mpi_cmp_abs+0x34>
    return( 0 );
    7968:	2000      	movs	r0, #0
}
    796a:	bd30      	pop	{r4, r5, pc}

0000796c <mbedtls_mpi_cmp_mpi>:
{
    796c:	b530      	push	{r4, r5, lr}
    for( i = X->n; i > 0; i-- )
    796e:	6843      	ldr	r3, [r0, #4]
{
    7970:	4602      	mov	r2, r0
    for( i = X->n; i > 0; i-- )
    7972:	b923      	cbnz	r3, 797e <mbedtls_mpi_cmp_mpi+0x12>
    for( j = Y->n; j > 0; j-- )
    7974:	6848      	ldr	r0, [r1, #4]
    7976:	b958      	cbnz	r0, 7990 <mbedtls_mpi_cmp_mpi+0x24>
    if( i == 0 && j == 0 )
    7978:	2b00      	cmp	r3, #0
    797a:	d138      	bne.n	79ee <mbedtls_mpi_cmp_mpi+0x82>
    797c:	e031      	b.n	79e2 <mbedtls_mpi_cmp_mpi+0x76>
        if( X->p[i - 1] != 0 )
    797e:	6890      	ldr	r0, [r2, #8]
    7980:	eb00 0083 	add.w	r0, r0, r3, lsl #2
    7984:	f850 0c04 	ldr.w	r0, [r0, #-4]
    7988:	2800      	cmp	r0, #0
    798a:	d1f3      	bne.n	7974 <mbedtls_mpi_cmp_mpi+0x8>
    for( i = X->n; i > 0; i-- )
    798c:	3b01      	subs	r3, #1
    798e:	e7f0      	b.n	7972 <mbedtls_mpi_cmp_mpi+0x6>
        if( Y->p[j - 1] != 0 )
    7990:	688c      	ldr	r4, [r1, #8]
    7992:	eb04 0580 	add.w	r5, r4, r0, lsl #2
    7996:	f855 5c04 	ldr.w	r5, [r5, #-4]
    799a:	bb25      	cbnz	r5, 79e6 <mbedtls_mpi_cmp_mpi+0x7a>
    for( j = Y->n; j > 0; j-- )
    799c:	3801      	subs	r0, #1
    799e:	e7ea      	b.n	7976 <mbedtls_mpi_cmp_mpi+0xa>
    if( j > i ) return( -Y->s );
    79a0:	4283      	cmp	r3, r0
    79a2:	6809      	ldr	r1, [r1, #0]
    79a4:	d201      	bcs.n	79aa <mbedtls_mpi_cmp_mpi+0x3e>
    79a6:	4248      	negs	r0, r1
    79a8:	e022      	b.n	79f0 <mbedtls_mpi_cmp_mpi+0x84>
    if( X->s > 0 && Y->s < 0 ) return(  1 );
    79aa:	6810      	ldr	r0, [r2, #0]
    79ac:	2800      	cmp	r0, #0
    79ae:	dd03      	ble.n	79b8 <mbedtls_mpi_cmp_mpi+0x4c>
    79b0:	2900      	cmp	r1, #0
    79b2:	da13      	bge.n	79dc <mbedtls_mpi_cmp_mpi+0x70>
    79b4:	2001      	movs	r0, #1
    79b6:	e01b      	b.n	79f0 <mbedtls_mpi_cmp_mpi+0x84>
    if( Y->s > 0 && X->s < 0 ) return( -1 );
    79b8:	2900      	cmp	r1, #0
    79ba:	dd0f      	ble.n	79dc <mbedtls_mpi_cmp_mpi+0x70>
    79bc:	b170      	cbz	r0, 79dc <mbedtls_mpi_cmp_mpi+0x70>
    79be:	f04f 30ff 	mov.w	r0, #4294967295
    79c2:	e015      	b.n	79f0 <mbedtls_mpi_cmp_mpi+0x84>
        if( X->p[i - 1] > Y->p[i - 1] ) return(  X->s );
    79c4:	6891      	ldr	r1, [r2, #8]
    79c6:	f851 5023 	ldr.w	r5, [r1, r3, lsl #2]
    79ca:	f854 1023 	ldr.w	r1, [r4, r3, lsl #2]
    79ce:	428d      	cmp	r5, r1
    79d0:	d80e      	bhi.n	79f0 <mbedtls_mpi_cmp_mpi+0x84>
        if( X->p[i - 1] < Y->p[i - 1] ) return( -X->s );
    79d2:	f103 33ff 	add.w	r3, r3, #4294967295
    79d6:	d202      	bcs.n	79de <mbedtls_mpi_cmp_mpi+0x72>
    79d8:	4240      	negs	r0, r0
    79da:	e009      	b.n	79f0 <mbedtls_mpi_cmp_mpi+0x84>
    79dc:	3b01      	subs	r3, #1
    for( ; i > 0; i-- )
    79de:	1c59      	adds	r1, r3, #1
    79e0:	d1f0      	bne.n	79c4 <mbedtls_mpi_cmp_mpi+0x58>
    return( 0 );
    79e2:	2000      	movs	r0, #0
    79e4:	e004      	b.n	79f0 <mbedtls_mpi_cmp_mpi+0x84>
    if( i == 0 && j == 0 )
    79e6:	2b00      	cmp	r3, #0
    79e8:	d0da      	beq.n	79a0 <mbedtls_mpi_cmp_mpi+0x34>
    if( i > j ) return(  X->s );
    79ea:	4283      	cmp	r3, r0
    79ec:	d9d8      	bls.n	79a0 <mbedtls_mpi_cmp_mpi+0x34>
    79ee:	6810      	ldr	r0, [r2, #0]
}
    79f0:	bd30      	pop	{r4, r5, pc}

000079f2 <mbedtls_mpi_cmp_int>:
{
    79f2:	b51f      	push	{r0, r1, r2, r3, r4, lr}
    *p  = ( z < 0 ) ? -z : z;
    79f4:	ea81 73e1 	eor.w	r3, r1, r1, asr #31
    79f8:	eba3 73e1 	sub.w	r3, r3, r1, asr #31
    Y.s = ( z < 0 ) ? -1 : 1;
    79fc:	2900      	cmp	r1, #0
    *p  = ( z < 0 ) ? -z : z;
    79fe:	9300      	str	r3, [sp, #0]
    Y.s = ( z < 0 ) ? -1 : 1;
    7a00:	bfb4      	ite	lt
    7a02:	f04f 33ff 	movlt.w	r3, #4294967295
    7a06:	2301      	movge	r3, #1
    7a08:	9301      	str	r3, [sp, #4]
    return( mbedtls_mpi_cmp_mpi( X, &Y ) );
    7a0a:	a901      	add	r1, sp, #4
    Y.n = 1;
    7a0c:	2301      	movs	r3, #1
    7a0e:	9302      	str	r3, [sp, #8]
    Y.p = p;
    7a10:	f8cd d00c 	str.w	sp, [sp, #12]
    return( mbedtls_mpi_cmp_mpi( X, &Y ) );
    7a14:	f7ff ffaa 	bl	796c <mbedtls_mpi_cmp_mpi>
}
    7a18:	b005      	add	sp, #20
    7a1a:	f85d fb04 	ldr.w	pc, [sp], #4

00007a1e <mbedtls_mpi_add_abs>:
    if( X == B )
    7a1e:	4290      	cmp	r0, r2
{
    7a20:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    7a24:	4607      	mov	r7, r0
    7a26:	460d      	mov	r5, r1
    7a28:	4616      	mov	r6, r2
    if( X == B )
    7a2a:	d002      	beq.n	7a32 <mbedtls_mpi_add_abs+0x14>
    if( X != A )
    7a2c:	4288      	cmp	r0, r1
    7a2e:	d129      	bne.n	7a84 <mbedtls_mpi_add_abs+0x66>
{
    7a30:	4635      	mov	r5, r6
    X->s = 1;
    7a32:	2301      	movs	r3, #1
    for( j = B->n; j > 0; j-- )
    7a34:	686e      	ldr	r6, [r5, #4]
    X->s = 1;
    7a36:	603b      	str	r3, [r7, #0]
    for( j = B->n; j > 0; j-- )
    7a38:	bb66      	cbnz	r6, 7a94 <mbedtls_mpi_add_abs+0x76>
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, j ) );
    7a3a:	4631      	mov	r1, r6
    7a3c:	4638      	mov	r0, r7
    7a3e:	f7ff fd90 	bl	7562 <mbedtls_mpi_grow>
    7a42:	4604      	mov	r4, r0
    7a44:	bb18      	cbnz	r0, 7a8e <mbedtls_mpi_add_abs+0x70>
    o = B->p; p = X->p; c = 0;
    7a46:	68bb      	ldr	r3, [r7, #8]
    7a48:	68a9      	ldr	r1, [r5, #8]
    7a4a:	4605      	mov	r5, r0
    for( i = 0; i < j; i++, o++, p++ )
    7a4c:	4286      	cmp	r6, r0
    7a4e:	d12a      	bne.n	7aa6 <mbedtls_mpi_add_abs+0x88>
    7a50:	eb03 0386 	add.w	r3, r3, r6, lsl #2
    while( c != 0 )
    7a54:	b1dd      	cbz	r5, 7a8e <mbedtls_mpi_add_abs+0x70>
        if( i >= X->n )
    7a56:	687a      	ldr	r2, [r7, #4]
    7a58:	42b2      	cmp	r2, r6
    7a5a:	f106 0801 	add.w	r8, r6, #1
    7a5e:	d808      	bhi.n	7a72 <mbedtls_mpi_add_abs+0x54>
            MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, i + 1 ) );
    7a60:	4641      	mov	r1, r8
    7a62:	4638      	mov	r0, r7
    7a64:	f7ff fd7d 	bl	7562 <mbedtls_mpi_grow>
    7a68:	2800      	cmp	r0, #0
    7a6a:	d12f      	bne.n	7acc <mbedtls_mpi_add_abs+0xae>
            p = X->p + i;
    7a6c:	68bb      	ldr	r3, [r7, #8]
    7a6e:	eb03 0386 	add.w	r3, r3, r6, lsl #2
        *p += c; c = ( *p < c ); i++; p++;
    7a72:	681a      	ldr	r2, [r3, #0]
    7a74:	1955      	adds	r5, r2, r5
    7a76:	f843 5b04 	str.w	r5, [r3], #4
    7a7a:	4646      	mov	r6, r8
    7a7c:	bf2c      	ite	cs
    7a7e:	2501      	movcs	r5, #1
    7a80:	2500      	movcc	r5, #0
    7a82:	e7e7      	b.n	7a54 <mbedtls_mpi_add_abs+0x36>
        MBEDTLS_MPI_CHK( mbedtls_mpi_copy( X, A ) );
    7a84:	f7ff fdae 	bl	75e4 <mbedtls_mpi_copy>
    7a88:	4604      	mov	r4, r0
    7a8a:	2800      	cmp	r0, #0
    7a8c:	d0d0      	beq.n	7a30 <mbedtls_mpi_add_abs+0x12>
}
    7a8e:	4620      	mov	r0, r4
    7a90:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
        if( B->p[j - 1] != 0 )
    7a94:	68ab      	ldr	r3, [r5, #8]
    7a96:	eb03 0386 	add.w	r3, r3, r6, lsl #2
    7a9a:	f853 3c04 	ldr.w	r3, [r3, #-4]
    7a9e:	2b00      	cmp	r3, #0
    7aa0:	d1cb      	bne.n	7a3a <mbedtls_mpi_add_abs+0x1c>
    for( j = B->n; j > 0; j-- )
    7aa2:	3e01      	subs	r6, #1
    7aa4:	e7c8      	b.n	7a38 <mbedtls_mpi_add_abs+0x1a>
        *p +=  c; c  = ( *p <  c );
    7aa6:	f853 2020 	ldr.w	r2, [r3, r0, lsl #2]
    7aaa:	eb12 0c05 	adds.w	ip, r2, r5
    7aae:	f851 2020 	ldr.w	r2, [r1, r0, lsl #2]
    7ab2:	bf2c      	ite	cs
    7ab4:	2501      	movcs	r5, #1
    7ab6:	2500      	movcc	r5, #0
        *p += tmp; c += ( *p < tmp );
    7ab8:	eb1c 0202 	adds.w	r2, ip, r2
    7abc:	f843 2020 	str.w	r2, [r3, r0, lsl #2]
    7ac0:	bf2c      	ite	cs
    7ac2:	2201      	movcs	r2, #1
    7ac4:	2200      	movcc	r2, #0
    7ac6:	4415      	add	r5, r2
    for( i = 0; i < j; i++, o++, p++ )
    7ac8:	3001      	adds	r0, #1
    7aca:	e7bf      	b.n	7a4c <mbedtls_mpi_add_abs+0x2e>
            MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, i + 1 ) );
    7acc:	4604      	mov	r4, r0
    return( ret );
    7ace:	e7de      	b.n	7a8e <mbedtls_mpi_add_abs+0x70>

00007ad0 <mbedtls_mpi_sub_abs>:
{
    7ad0:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    for( n = B->n; n > 0; n-- )
    7ad4:	6854      	ldr	r4, [r2, #4]
{
    7ad6:	4605      	mov	r5, r0
    7ad8:	460e      	mov	r6, r1
    7ada:	4690      	mov	r8, r2
    for( n = B->n; n > 0; n-- )
    7adc:	b93c      	cbnz	r4, 7aee <mbedtls_mpi_sub_abs+0x1e>
    if( n > A->n )
    7ade:	6871      	ldr	r1, [r6, #4]
    7ae0:	42a1      	cmp	r1, r4
    7ae2:	d20e      	bcs.n	7b02 <mbedtls_mpi_sub_abs+0x32>
        ret = MBEDTLS_ERR_MPI_NEGATIVE_VALUE;
    7ae4:	f06f 0709 	mvn.w	r7, #9
}
    7ae8:	4638      	mov	r0, r7
    7aea:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
        if( B->p[n - 1] != 0 )
    7aee:	f8d8 3008 	ldr.w	r3, [r8, #8]
    7af2:	eb03 0384 	add.w	r3, r3, r4, lsl #2
    7af6:	f853 3c04 	ldr.w	r3, [r3, #-4]
    7afa:	2b00      	cmp	r3, #0
    7afc:	d1ef      	bne.n	7ade <mbedtls_mpi_sub_abs+0xe>
    for( n = B->n; n > 0; n-- )
    7afe:	3c01      	subs	r4, #1
    7b00:	e7ec      	b.n	7adc <mbedtls_mpi_sub_abs+0xc>
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, A->n ) );
    7b02:	4628      	mov	r0, r5
    7b04:	f7ff fd2d 	bl	7562 <mbedtls_mpi_grow>
    7b08:	4607      	mov	r7, r0
    7b0a:	2800      	cmp	r0, #0
    7b0c:	d1ec      	bne.n	7ae8 <mbedtls_mpi_sub_abs+0x18>
    if( A->n > n )
    7b0e:	6872      	ldr	r2, [r6, #4]
    7b10:	42a2      	cmp	r2, r4
    7b12:	d909      	bls.n	7b28 <mbedtls_mpi_sub_abs+0x58>
        memcpy( X->p + n, A->p + n, ( A->n - n ) * ciL );
    7b14:	68b1      	ldr	r1, [r6, #8]
    7b16:	68a8      	ldr	r0, [r5, #8]
    7b18:	1b12      	subs	r2, r2, r4
    7b1a:	0092      	lsls	r2, r2, #2
    7b1c:	eb01 0184 	add.w	r1, r1, r4, lsl #2
    7b20:	eb00 0084 	add.w	r0, r0, r4, lsl #2
    7b24:	f7fe fda2 	bl	666c <memcpy>
    if( X->n > A->n )
    7b28:	686a      	ldr	r2, [r5, #4]
    7b2a:	6870      	ldr	r0, [r6, #4]
    7b2c:	4282      	cmp	r2, r0
    7b2e:	d907      	bls.n	7b40 <mbedtls_mpi_sub_abs+0x70>
        memset( X->p + A->n, 0, ( X->n - A->n ) * ciL );
    7b30:	68ab      	ldr	r3, [r5, #8]
    7b32:	1a12      	subs	r2, r2, r0
    7b34:	0092      	lsls	r2, r2, #2
    7b36:	2100      	movs	r1, #0
    7b38:	eb03 0080 	add.w	r0, r3, r0, lsl #2
    7b3c:	f7fe fda1 	bl	6682 <memset>
    mbedtls_mpi_uint c = 0, t, z;
    7b40:	2200      	movs	r2, #0
    carry = mpi_sub_hlp( n, X->p, A->p, B->p );
    7b42:	68a9      	ldr	r1, [r5, #8]
    7b44:	f8d6 e008 	ldr.w	lr, [r6, #8]
    7b48:	f8d8 8008 	ldr.w	r8, [r8, #8]
    for( i = 0; i < n; i++ )
    7b4c:	4613      	mov	r3, r2
    7b4e:	42a3      	cmp	r3, r4
    7b50:	d110      	bne.n	7b74 <mbedtls_mpi_sub_abs+0xa4>
    if( carry != 0 )
    7b52:	b162      	cbz	r2, 7b6e <mbedtls_mpi_sub_abs+0x9e>
            --X->p[n];
    7b54:	f04f 32ff 	mov.w	r2, #4294967295
        for( ; n < X->n && X->p[n] == 0; n++ )
    7b58:	686b      	ldr	r3, [r5, #4]
    7b5a:	42a3      	cmp	r3, r4
    7b5c:	d924      	bls.n	7ba8 <mbedtls_mpi_sub_abs+0xd8>
    7b5e:	f851 3024 	ldr.w	r3, [r1, r4, lsl #2]
    7b62:	b1eb      	cbz	r3, 7ba0 <mbedtls_mpi_sub_abs+0xd0>
        --X->p[n];
    7b64:	f851 3024 	ldr.w	r3, [r1, r4, lsl #2]
    7b68:	3b01      	subs	r3, #1
    7b6a:	f841 3024 	str.w	r3, [r1, r4, lsl #2]
    X->s = 1;
    7b6e:	2301      	movs	r3, #1
    7b70:	602b      	str	r3, [r5, #0]
    return( ret );
    7b72:	e7b9      	b.n	7ae8 <mbedtls_mpi_sub_abs+0x18>
        z = ( l[i] <  c );    t = l[i] - c;
    7b74:	f85e c023 	ldr.w	ip, [lr, r3, lsl #2]
        c = ( t < r[i] ) + z; d[i] = t - r[i];
    7b78:	f858 6023 	ldr.w	r6, [r8, r3, lsl #2]
        z = ( l[i] <  c );    t = l[i] - c;
    7b7c:	ebac 0002 	sub.w	r0, ip, r2
        c = ( t < r[i] ) + z; d[i] = t - r[i];
    7b80:	42b0      	cmp	r0, r6
    7b82:	bf2c      	ite	cs
    7b84:	f04f 0900 	movcs.w	r9, #0
    7b88:	f04f 0901 	movcc.w	r9, #1
    7b8c:	1b80      	subs	r0, r0, r6
    7b8e:	f841 0023 	str.w	r0, [r1, r3, lsl #2]
    7b92:	4594      	cmp	ip, r2
    7b94:	bf2c      	ite	cs
    7b96:	464a      	movcs	r2, r9
    7b98:	f109 0201 	addcc.w	r2, r9, #1
    for( i = 0; i < n; i++ )
    7b9c:	3301      	adds	r3, #1
    7b9e:	e7d6      	b.n	7b4e <mbedtls_mpi_sub_abs+0x7e>
            --X->p[n];
    7ba0:	f841 2024 	str.w	r2, [r1, r4, lsl #2]
        for( ; n < X->n && X->p[n] == 0; n++ )
    7ba4:	3401      	adds	r4, #1
    7ba6:	e7d7      	b.n	7b58 <mbedtls_mpi_sub_abs+0x88>
        if( n == X->n )
    7ba8:	d1dc      	bne.n	7b64 <mbedtls_mpi_sub_abs+0x94>
    7baa:	e79b      	b.n	7ae4 <mbedtls_mpi_sub_abs+0x14>

00007bac <mbedtls_mpi_add_mpi>:
{
    7bac:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    s = A->s;
    7bae:	680d      	ldr	r5, [r1, #0]
    if( A->s * B->s < 0 )
    7bb0:	6813      	ldr	r3, [r2, #0]
    7bb2:	436b      	muls	r3, r5
{
    7bb4:	4604      	mov	r4, r0
    7bb6:	460f      	mov	r7, r1
    7bb8:	4616      	mov	r6, r2
    if( A->s * B->s < 0 )
    7bba:	d516      	bpl.n	7bea <mbedtls_mpi_add_mpi+0x3e>
        if( mbedtls_mpi_cmp_abs( A, B ) >= 0 )
    7bbc:	4611      	mov	r1, r2
    7bbe:	4638      	mov	r0, r7
    7bc0:	f7ff fea1 	bl	7906 <mbedtls_mpi_cmp_abs>
    7bc4:	2800      	cmp	r0, #0
    7bc6:	db06      	blt.n	7bd6 <mbedtls_mpi_add_mpi+0x2a>
            MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( X, A, B ) );
    7bc8:	4632      	mov	r2, r6
    7bca:	4639      	mov	r1, r7
    7bcc:	4620      	mov	r0, r4
    7bce:	f7ff ff7f 	bl	7ad0 <mbedtls_mpi_sub_abs>
        MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( X, A, B ) );
    7bd2:	b140      	cbz	r0, 7be6 <mbedtls_mpi_add_mpi+0x3a>
}
    7bd4:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
            MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( X, B, A ) );
    7bd6:	463a      	mov	r2, r7
    7bd8:	4631      	mov	r1, r6
    7bda:	4620      	mov	r0, r4
    7bdc:	f7ff ff78 	bl	7ad0 <mbedtls_mpi_sub_abs>
    7be0:	2800      	cmp	r0, #0
    7be2:	d1f7      	bne.n	7bd4 <mbedtls_mpi_add_mpi+0x28>
            X->s = -s;
    7be4:	426d      	negs	r5, r5
        X->s = s;
    7be6:	6025      	str	r5, [r4, #0]
    return( ret );
    7be8:	e7f4      	b.n	7bd4 <mbedtls_mpi_add_mpi+0x28>
        MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( X, A, B ) );
    7bea:	f7ff ff18 	bl	7a1e <mbedtls_mpi_add_abs>
    7bee:	e7f0      	b.n	7bd2 <mbedtls_mpi_add_mpi+0x26>

00007bf0 <mbedtls_mpi_sub_mpi>:
{
    7bf0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    s = A->s;
    7bf2:	680d      	ldr	r5, [r1, #0]
    if( A->s * B->s > 0 )
    7bf4:	6813      	ldr	r3, [r2, #0]
    7bf6:	436b      	muls	r3, r5
    7bf8:	2b00      	cmp	r3, #0
{
    7bfa:	4604      	mov	r4, r0
    7bfc:	460f      	mov	r7, r1
    7bfe:	4616      	mov	r6, r2
    if( A->s * B->s > 0 )
    7c00:	dd16      	ble.n	7c30 <mbedtls_mpi_sub_mpi+0x40>
        if( mbedtls_mpi_cmp_abs( A, B ) >= 0 )
    7c02:	4611      	mov	r1, r2
    7c04:	4638      	mov	r0, r7
    7c06:	f7ff fe7e 	bl	7906 <mbedtls_mpi_cmp_abs>
    7c0a:	2800      	cmp	r0, #0
    7c0c:	db06      	blt.n	7c1c <mbedtls_mpi_sub_mpi+0x2c>
            MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( X, A, B ) );
    7c0e:	4632      	mov	r2, r6
    7c10:	4639      	mov	r1, r7
    7c12:	4620      	mov	r0, r4
    7c14:	f7ff ff5c 	bl	7ad0 <mbedtls_mpi_sub_abs>
        MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( X, A, B ) );
    7c18:	b140      	cbz	r0, 7c2c <mbedtls_mpi_sub_mpi+0x3c>
}
    7c1a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
            MBEDTLS_MPI_CHK( mbedtls_mpi_sub_abs( X, B, A ) );
    7c1c:	463a      	mov	r2, r7
    7c1e:	4631      	mov	r1, r6
    7c20:	4620      	mov	r0, r4
    7c22:	f7ff ff55 	bl	7ad0 <mbedtls_mpi_sub_abs>
    7c26:	2800      	cmp	r0, #0
    7c28:	d1f7      	bne.n	7c1a <mbedtls_mpi_sub_mpi+0x2a>
            X->s = -s;
    7c2a:	426d      	negs	r5, r5
        X->s = s;
    7c2c:	6025      	str	r5, [r4, #0]
    return( ret );
    7c2e:	e7f4      	b.n	7c1a <mbedtls_mpi_sub_mpi+0x2a>
        MBEDTLS_MPI_CHK( mbedtls_mpi_add_abs( X, A, B ) );
    7c30:	f7ff fef5 	bl	7a1e <mbedtls_mpi_add_abs>
    7c34:	e7f0      	b.n	7c18 <mbedtls_mpi_sub_mpi+0x28>

00007c36 <mbedtls_mpi_mul_int>:
{
    7c36:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    size_t n = A->n;
    7c3a:	684e      	ldr	r6, [r1, #4]
{
    7c3c:	4605      	mov	r5, r0
    7c3e:	460f      	mov	r7, r1
    7c40:	4690      	mov	r8, r2
    while( n > 0 && A->p[n - 1] == 0 )
    7c42:	b146      	cbz	r6, 7c56 <mbedtls_mpi_mul_int+0x20>
    7c44:	68bb      	ldr	r3, [r7, #8]
    7c46:	eb03 0386 	add.w	r3, r3, r6, lsl #2
    7c4a:	f853 3c04 	ldr.w	r3, [r3, #-4]
    7c4e:	b143      	cbz	r3, 7c62 <mbedtls_mpi_mul_int+0x2c>
    if( b == 0 || n == 0 )
    7c50:	f1b8 0f00 	cmp.w	r8, #0
    7c54:	d107      	bne.n	7c66 <mbedtls_mpi_mul_int+0x30>
        return( mbedtls_mpi_lset( X, 0 ) );
    7c56:	4628      	mov	r0, r5
    7c58:	2100      	movs	r1, #0
}
    7c5a:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
        return( mbedtls_mpi_lset( X, 0 ) );
    7c5e:	f7ff bd1f 	b.w	76a0 <mbedtls_mpi_lset>
        --n;
    7c62:	3e01      	subs	r6, #1
    7c64:	e7ed      	b.n	7c42 <mbedtls_mpi_mul_int+0xc>
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, n + 1 ) );
    7c66:	1c71      	adds	r1, r6, #1
    7c68:	4628      	mov	r0, r5
    7c6a:	f7ff fc7a 	bl	7562 <mbedtls_mpi_grow>
    7c6e:	4604      	mov	r4, r0
    7c70:	b960      	cbnz	r0, 7c8c <mbedtls_mpi_mul_int+0x56>
    MBEDTLS_MPI_CHK( mbedtls_mpi_copy( X, A ) );
    7c72:	4639      	mov	r1, r7
    7c74:	4628      	mov	r0, r5
    7c76:	f7ff fcb5 	bl	75e4 <mbedtls_mpi_copy>
    7c7a:	4604      	mov	r4, r0
    7c7c:	b930      	cbnz	r0, 7c8c <mbedtls_mpi_mul_int+0x56>
    mpi_mul_hlp( n, A->p, X->p, b - 1 );
    7c7e:	68aa      	ldr	r2, [r5, #8]
    7c80:	68b9      	ldr	r1, [r7, #8]
    7c82:	f108 33ff 	add.w	r3, r8, #4294967295
    7c86:	4630      	mov	r0, r6
    7c88:	f7ff f94a 	bl	6f20 <mpi_mul_hlp>
}
    7c8c:	4620      	mov	r0, r4
    7c8e:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

00007c92 <mbedtls_mpi_div_mpi>:
{
    7c92:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    7c96:	b09b      	sub	sp, #108	; 0x6c
    7c98:	4689      	mov	r9, r1
    7c9a:	9000      	str	r0, [sp, #0]
    if( mbedtls_mpi_cmp_int( B, 0 ) == 0 )
    7c9c:	2100      	movs	r1, #0
    7c9e:	4618      	mov	r0, r3
{
    7ca0:	4617      	mov	r7, r2
    7ca2:	9302      	str	r3, [sp, #8]
    if( mbedtls_mpi_cmp_int( B, 0 ) == 0 )
    7ca4:	f7ff fea5 	bl	79f2 <mbedtls_mpi_cmp_int>
    7ca8:	2800      	cmp	r0, #0
    7caa:	f000 8191 	beq.w	7fd0 <mbedtls_mpi_div_mpi+0x33e>
    T2.n = sizeof( TP2 ) / sizeof( *TP2 );
    7cae:	2303      	movs	r3, #3
    X->n = 0;
    7cb0:	2400      	movs	r4, #0
    7cb2:	2501      	movs	r5, #1
    T2.n = sizeof( TP2 ) / sizeof( *TP2 );
    7cb4:	9315      	str	r3, [sp, #84]	; 0x54
    if( mbedtls_mpi_cmp_abs( A, B ) < 0 )
    7cb6:	9902      	ldr	r1, [sp, #8]
    T2.s = 1;
    7cb8:	9514      	str	r5, [sp, #80]	; 0x50
    T2.p = TP2;
    7cba:	ab17      	add	r3, sp, #92	; 0x5c
    if( mbedtls_mpi_cmp_abs( A, B ) < 0 )
    7cbc:	4638      	mov	r0, r7
    X->n = 0;
    7cbe:	e9cd 5408 	strd	r5, r4, [sp, #32]
    X->s = 1;
    7cc2:	e9cd 450a 	strd	r4, r5, [sp, #40]	; 0x28
    X->p = NULL;
    7cc6:	e9cd 440c 	strd	r4, r4, [sp, #48]	; 0x30
    X->n = 0;
    7cca:	e9cd 540e 	strd	r5, r4, [sp, #56]	; 0x38
    X->s = 1;
    7cce:	e9cd 4510 	strd	r4, r5, [sp, #64]	; 0x40
    X->p = NULL;
    7cd2:	e9cd 4412 	strd	r4, r4, [sp, #72]	; 0x48
    T2.p = TP2;
    7cd6:	9316      	str	r3, [sp, #88]	; 0x58
    if( mbedtls_mpi_cmp_abs( A, B ) < 0 )
    7cd8:	f7ff fe15 	bl	7906 <mbedtls_mpi_cmp_abs>
    7cdc:	42a0      	cmp	r0, r4
    7cde:	da29      	bge.n	7d34 <mbedtls_mpi_div_mpi+0xa2>
        if( Q != NULL ) MBEDTLS_MPI_CHK( mbedtls_mpi_lset( Q, 0 ) );
    7ce0:	9b00      	ldr	r3, [sp, #0]
    7ce2:	b93b      	cbnz	r3, 7cf4 <mbedtls_mpi_div_mpi+0x62>
        if( R != NULL ) MBEDTLS_MPI_CHK( mbedtls_mpi_copy( R, A ) );
    7ce4:	f1b9 0f00 	cmp.w	r9, #0
    7ce8:	d11c      	bne.n	7d24 <mbedtls_mpi_div_mpi+0x92>
        return( 0 );
    7cea:	2400      	movs	r4, #0
}
    7cec:	4620      	mov	r0, r4
    7cee:	b01b      	add	sp, #108	; 0x6c
    7cf0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
        if( Q != NULL ) MBEDTLS_MPI_CHK( mbedtls_mpi_lset( Q, 0 ) );
    7cf4:	4621      	mov	r1, r4
    7cf6:	9800      	ldr	r0, [sp, #0]
    7cf8:	f7ff fcd2 	bl	76a0 <mbedtls_mpi_lset>
    7cfc:	4604      	mov	r4, r0
    7cfe:	2800      	cmp	r0, #0
    7d00:	d0f0      	beq.n	7ce4 <mbedtls_mpi_div_mpi+0x52>
    mbedtls_mpi_free( &X ); mbedtls_mpi_free( &Y ); mbedtls_mpi_free( &Z );
    7d02:	a808      	add	r0, sp, #32
    7d04:	f7ff fc1b 	bl	753e <mbedtls_mpi_free>
    7d08:	a80b      	add	r0, sp, #44	; 0x2c
    7d0a:	f7ff fc18 	bl	753e <mbedtls_mpi_free>
    7d0e:	a80e      	add	r0, sp, #56	; 0x38
    7d10:	f7ff fc15 	bl	753e <mbedtls_mpi_free>
    mbedtls_mpi_free( &T1 );
    7d14:	a811      	add	r0, sp, #68	; 0x44
    7d16:	f7ff fc12 	bl	753e <mbedtls_mpi_free>
    mbedtls_platform_zeroize( TP2, sizeof( TP2 ) );
    7d1a:	210c      	movs	r1, #12
    7d1c:	a817      	add	r0, sp, #92	; 0x5c
    7d1e:	f7fc fbd3 	bl	44c8 <mbedtls_platform_zeroize>
    return( ret );
    7d22:	e7e3      	b.n	7cec <mbedtls_mpi_div_mpi+0x5a>
        if( R != NULL ) MBEDTLS_MPI_CHK( mbedtls_mpi_copy( R, A ) );
    7d24:	4639      	mov	r1, r7
    7d26:	4648      	mov	r0, r9
    7d28:	f7ff fc5c 	bl	75e4 <mbedtls_mpi_copy>
    7d2c:	4604      	mov	r4, r0
    7d2e:	2800      	cmp	r0, #0
    7d30:	d1e7      	bne.n	7d02 <mbedtls_mpi_div_mpi+0x70>
    7d32:	e7da      	b.n	7cea <mbedtls_mpi_div_mpi+0x58>
    MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &X, A ) );
    7d34:	4639      	mov	r1, r7
    7d36:	a808      	add	r0, sp, #32
    7d38:	f7ff fc54 	bl	75e4 <mbedtls_mpi_copy>
    7d3c:	4604      	mov	r4, r0
    7d3e:	2800      	cmp	r0, #0
    7d40:	d1df      	bne.n	7d02 <mbedtls_mpi_div_mpi+0x70>
    MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &Y, B ) );
    7d42:	f10d 082c 	add.w	r8, sp, #44	; 0x2c
    7d46:	9902      	ldr	r1, [sp, #8]
    7d48:	4640      	mov	r0, r8
    7d4a:	f7ff fc4b 	bl	75e4 <mbedtls_mpi_copy>
    7d4e:	4604      	mov	r4, r0
    7d50:	2800      	cmp	r0, #0
    7d52:	d1d6      	bne.n	7d02 <mbedtls_mpi_div_mpi+0x70>
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &Z, A->n + 2 ) );
    7d54:	6879      	ldr	r1, [r7, #4]
    X.s = Y.s = 1;
    7d56:	950b      	str	r5, [sp, #44]	; 0x2c
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &Z, A->n + 2 ) );
    7d58:	3102      	adds	r1, #2
    7d5a:	a80e      	add	r0, sp, #56	; 0x38
    X.s = Y.s = 1;
    7d5c:	9508      	str	r5, [sp, #32]
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &Z, A->n + 2 ) );
    7d5e:	f7ff fc00 	bl	7562 <mbedtls_mpi_grow>
    7d62:	4604      	mov	r4, r0
    7d64:	2800      	cmp	r0, #0
    7d66:	d1cc      	bne.n	7d02 <mbedtls_mpi_div_mpi+0x70>
    MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &Z,  0 ) );
    7d68:	4601      	mov	r1, r0
    7d6a:	a80e      	add	r0, sp, #56	; 0x38
    7d6c:	f7ff fc98 	bl	76a0 <mbedtls_mpi_lset>
    7d70:	4604      	mov	r4, r0
    7d72:	2800      	cmp	r0, #0
    7d74:	d1c5      	bne.n	7d02 <mbedtls_mpi_div_mpi+0x70>
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &T1, A->n + 2 ) );
    7d76:	6879      	ldr	r1, [r7, #4]
    7d78:	a811      	add	r0, sp, #68	; 0x44
    7d7a:	3102      	adds	r1, #2
    7d7c:	f7ff fbf1 	bl	7562 <mbedtls_mpi_grow>
    7d80:	4604      	mov	r4, r0
    7d82:	2800      	cmp	r0, #0
    7d84:	d1bd      	bne.n	7d02 <mbedtls_mpi_div_mpi+0x70>
    k = mbedtls_mpi_bitlen( &Y ) % biL;
    7d86:	4640      	mov	r0, r8
    7d88:	f7ff fcb7 	bl	76fa <mbedtls_mpi_bitlen>
    7d8c:	f000 001f 	and.w	r0, r0, #31
    if( k < biL - 1 )
    7d90:	281f      	cmp	r0, #31
    7d92:	d06b      	beq.n	7e6c <mbedtls_mpi_div_mpi+0x1da>
        k = biL - 1 - k;
    7d94:	f1c0 0a1f 	rsb	sl, r0, #31
        MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &X, k ) );
    7d98:	4651      	mov	r1, sl
    7d9a:	a808      	add	r0, sp, #32
    7d9c:	f7ff fd27 	bl	77ee <mbedtls_mpi_shift_l>
    7da0:	4604      	mov	r4, r0
    7da2:	2800      	cmp	r0, #0
    7da4:	d1ad      	bne.n	7d02 <mbedtls_mpi_div_mpi+0x70>
        MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &Y, k ) );
    7da6:	4651      	mov	r1, sl
    7da8:	4640      	mov	r0, r8
    7daa:	f7ff fd20 	bl	77ee <mbedtls_mpi_shift_l>
    7dae:	4604      	mov	r4, r0
    7db0:	2800      	cmp	r0, #0
    7db2:	d1a6      	bne.n	7d02 <mbedtls_mpi_div_mpi+0x70>
    n = X.n - 1;
    7db4:	9e09      	ldr	r6, [sp, #36]	; 0x24
    t = Y.n - 1;
    7db6:	9d0c      	ldr	r5, [sp, #48]	; 0x30
    MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &Y, biL * ( n - t ) ) );
    7db8:	1b73      	subs	r3, r6, r5
    7dba:	ea4f 1b43 	mov.w	fp, r3, lsl #5
    7dbe:	4659      	mov	r1, fp
    7dc0:	4640      	mov	r0, r8
    7dc2:	9301      	str	r3, [sp, #4]
    7dc4:	f7ff fd13 	bl	77ee <mbedtls_mpi_shift_l>
    7dc8:	4604      	mov	r4, r0
    7dca:	2800      	cmp	r0, #0
    7dcc:	d199      	bne.n	7d02 <mbedtls_mpi_div_mpi+0x70>
        Z.p[n - t]++;
    7dce:	9b01      	ldr	r3, [sp, #4]
    7dd0:	009b      	lsls	r3, r3, #2
    while( mbedtls_mpi_cmp_mpi( &X, &Y ) >= 0 )
    7dd2:	4641      	mov	r1, r8
    7dd4:	a808      	add	r0, sp, #32
    7dd6:	9301      	str	r3, [sp, #4]
    7dd8:	f7ff fdc8 	bl	796c <mbedtls_mpi_cmp_mpi>
    7ddc:	2800      	cmp	r0, #0
    7dde:	9b01      	ldr	r3, [sp, #4]
    7de0:	da46      	bge.n	7e70 <mbedtls_mpi_div_mpi+0x1de>
    MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &Y, biL * ( n - t ) ) );
    7de2:	4659      	mov	r1, fp
    7de4:	4640      	mov	r0, r8
    7de6:	f7ff fd52 	bl	788e <mbedtls_mpi_shift_r>
    7dea:	4604      	mov	r4, r0
    7dec:	2800      	cmp	r0, #0
    7dee:	d188      	bne.n	7d02 <mbedtls_mpi_div_mpi+0x70>
    t = Y.n - 1;
    7df0:	1e6b      	subs	r3, r5, #1
    7df2:	9301      	str	r3, [sp, #4]
        if( X.p[i] >= Y.p[t] )
    7df4:	009b      	lsls	r3, r3, #2
    n = X.n - 1;
    7df6:	f106 3bff 	add.w	fp, r6, #4294967295
        if( X.p[i] >= Y.p[t] )
    7dfa:	9303      	str	r3, [sp, #12]
    7dfc:	f106 4680 	add.w	r6, r6, #1073741824	; 0x40000000
            T1.p[0] = ( t < 1 ) ? 0 : Y.p[t - 1];
    7e00:	f105 4380 	add.w	r3, r5, #1073741824	; 0x40000000
    7e04:	3b02      	subs	r3, #2
    7e06:	3e01      	subs	r6, #1
    7e08:	009b      	lsls	r3, r3, #2
    7e0a:	1b75      	subs	r5, r6, r5
    7e0c:	9307      	str	r3, [sp, #28]
    7e0e:	00ad      	lsls	r5, r5, #2
    for( i = n; i > t ; i-- )
    7e10:	9b01      	ldr	r3, [sp, #4]
    7e12:	459b      	cmp	fp, r3
    7e14:	d83b      	bhi.n	7e8e <mbedtls_mpi_div_mpi+0x1fc>
    if( Q != NULL )
    7e16:	9b00      	ldr	r3, [sp, #0]
    7e18:	b153      	cbz	r3, 7e30 <mbedtls_mpi_div_mpi+0x19e>
        MBEDTLS_MPI_CHK( mbedtls_mpi_copy( Q, &Z ) );
    7e1a:	a90e      	add	r1, sp, #56	; 0x38
    7e1c:	4618      	mov	r0, r3
    7e1e:	f7ff fbe1 	bl	75e4 <mbedtls_mpi_copy>
    7e22:	bb08      	cbnz	r0, 7e68 <mbedtls_mpi_div_mpi+0x1d6>
        Q->s = A->s * B->s;
    7e24:	9b02      	ldr	r3, [sp, #8]
    7e26:	683a      	ldr	r2, [r7, #0]
    7e28:	681b      	ldr	r3, [r3, #0]
    7e2a:	4353      	muls	r3, r2
    7e2c:	9a00      	ldr	r2, [sp, #0]
    7e2e:	6013      	str	r3, [r2, #0]
    if( R != NULL )
    7e30:	f1b9 0f00 	cmp.w	r9, #0
    7e34:	f43f af65 	beq.w	7d02 <mbedtls_mpi_div_mpi+0x70>
        MBEDTLS_MPI_CHK( mbedtls_mpi_shift_r( &X, k ) );
    7e38:	4651      	mov	r1, sl
    7e3a:	a808      	add	r0, sp, #32
    7e3c:	f7ff fd27 	bl	788e <mbedtls_mpi_shift_r>
    7e40:	b990      	cbnz	r0, 7e68 <mbedtls_mpi_div_mpi+0x1d6>
        X.s = A->s;
    7e42:	683b      	ldr	r3, [r7, #0]
    7e44:	9308      	str	r3, [sp, #32]
        MBEDTLS_MPI_CHK( mbedtls_mpi_copy( R, &X ) );
    7e46:	a908      	add	r1, sp, #32
    7e48:	4648      	mov	r0, r9
    7e4a:	f7ff fbcb 	bl	75e4 <mbedtls_mpi_copy>
    7e4e:	4601      	mov	r1, r0
    7e50:	2800      	cmp	r0, #0
    7e52:	f040 80bb 	bne.w	7fcc <mbedtls_mpi_div_mpi+0x33a>
        if( mbedtls_mpi_cmp_int( R, 0 ) == 0 )
    7e56:	4648      	mov	r0, r9
    7e58:	f7ff fdcb 	bl	79f2 <mbedtls_mpi_cmp_int>
    7e5c:	2800      	cmp	r0, #0
    7e5e:	f47f af50 	bne.w	7d02 <mbedtls_mpi_div_mpi+0x70>
            R->s = 1;
    7e62:	2301      	movs	r3, #1
    7e64:	f8c9 3000 	str.w	r3, [r9]
    7e68:	4604      	mov	r4, r0
    7e6a:	e74a      	b.n	7d02 <mbedtls_mpi_div_mpi+0x70>
    else k = 0;
    7e6c:	46a2      	mov	sl, r4
    7e6e:	e7a1      	b.n	7db4 <mbedtls_mpi_div_mpi+0x122>
        Z.p[n - t]++;
    7e70:	9910      	ldr	r1, [sp, #64]	; 0x40
    7e72:	9301      	str	r3, [sp, #4]
    7e74:	58ca      	ldr	r2, [r1, r3]
    7e76:	3201      	adds	r2, #1
    7e78:	50ca      	str	r2, [r1, r3]
        MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &X, &X, &Y ) );
    7e7a:	a908      	add	r1, sp, #32
    7e7c:	4642      	mov	r2, r8
    7e7e:	4608      	mov	r0, r1
    7e80:	f7ff feb6 	bl	7bf0 <mbedtls_mpi_sub_mpi>
    7e84:	9b01      	ldr	r3, [sp, #4]
    7e86:	4604      	mov	r4, r0
    7e88:	2800      	cmp	r0, #0
    7e8a:	d0a2      	beq.n	7dd2 <mbedtls_mpi_div_mpi+0x140>
    7e8c:	e739      	b.n	7d02 <mbedtls_mpi_div_mpi+0x70>
        if( X.p[i] >= Y.p[t] )
    7e8e:	9e0a      	ldr	r6, [sp, #40]	; 0x28
    7e90:	9a03      	ldr	r2, [sp, #12]
    7e92:	f856 102b 	ldr.w	r1, [r6, fp, lsl #2]
    7e96:	ea4f 038b 	mov.w	r3, fp, lsl #2
    7e9a:	9304      	str	r3, [sp, #16]
    7e9c:	eb06 038b 	add.w	r3, r6, fp, lsl #2
    7ea0:	9306      	str	r3, [sp, #24]
    7ea2:	9b0d      	ldr	r3, [sp, #52]	; 0x34
    7ea4:	589a      	ldr	r2, [r3, r2]
    7ea6:	9b04      	ldr	r3, [sp, #16]
    7ea8:	3b04      	subs	r3, #4
    7eaa:	9305      	str	r3, [sp, #20]
    7eac:	9b10      	ldr	r3, [sp, #64]	; 0x40
    7eae:	4291      	cmp	r1, r2
    7eb0:	eb03 0805 	add.w	r8, r3, r5
    7eb4:	d372      	bcc.n	7f9c <mbedtls_mpi_div_mpi+0x30a>
            Z.p[i - t - 1] = ~0;
    7eb6:	f04f 32ff 	mov.w	r2, #4294967295
    7eba:	515a      	str	r2, [r3, r5]
        T2.p[0] = ( i < 2 ) ? 0 : X.p[i - 2];
    7ebc:	f1bb 0f01 	cmp.w	fp, #1
    7ec0:	bf16      	itet	ne
    7ec2:	9b06      	ldrne	r3, [sp, #24]
    7ec4:	2300      	moveq	r3, #0
    7ec6:	f853 3c08 	ldrne.w	r3, [r3, #-8]
    7eca:	9317      	str	r3, [sp, #92]	; 0x5c
        T2.p[1] = ( i < 1 ) ? 0 : X.p[i - 1];
    7ecc:	9b05      	ldr	r3, [sp, #20]
    7ece:	58f3      	ldr	r3, [r6, r3]
    7ed0:	9318      	str	r3, [sp, #96]	; 0x60
        T2.p[2] = X.p[i];
    7ed2:	9b04      	ldr	r3, [sp, #16]
    7ed4:	58f3      	ldr	r3, [r6, r3]
    7ed6:	9319      	str	r3, [sp, #100]	; 0x64
        Z.p[i - t - 1]++;
    7ed8:	f8d8 3000 	ldr.w	r3, [r8]
    7edc:	3301      	adds	r3, #1
    7ede:	f8c8 3000 	str.w	r3, [r8]
            Z.p[i - t - 1]--;
    7ee2:	9a10      	ldr	r2, [sp, #64]	; 0x40
    7ee4:	5953      	ldr	r3, [r2, r5]
    7ee6:	3b01      	subs	r3, #1
    7ee8:	5153      	str	r3, [r2, r5]
            MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &T1, 0 ) );
    7eea:	2100      	movs	r1, #0
    7eec:	a811      	add	r0, sp, #68	; 0x44
    7eee:	f7ff fbd7 	bl	76a0 <mbedtls_mpi_lset>
    7ef2:	2800      	cmp	r0, #0
    7ef4:	d1b8      	bne.n	7e68 <mbedtls_mpi_div_mpi+0x1d6>
            T1.p[0] = ( t < 1 ) ? 0 : Y.p[t - 1];
    7ef6:	9b01      	ldr	r3, [sp, #4]
    7ef8:	9a0d      	ldr	r2, [sp, #52]	; 0x34
    7efa:	2b00      	cmp	r3, #0
    7efc:	d064      	beq.n	7fc8 <mbedtls_mpi_div_mpi+0x336>
    7efe:	9b07      	ldr	r3, [sp, #28]
    7f00:	58d1      	ldr	r1, [r2, r3]
    7f02:	9b13      	ldr	r3, [sp, #76]	; 0x4c
    7f04:	6019      	str	r1, [r3, #0]
            T1.p[1] = Y.p[t];
    7f06:	9903      	ldr	r1, [sp, #12]
    7f08:	5852      	ldr	r2, [r2, r1]
    7f0a:	605a      	str	r2, [r3, #4]
            MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &T1, &T1, Z.p[i - t - 1] ) );
    7f0c:	9b10      	ldr	r3, [sp, #64]	; 0x40
    7f0e:	a911      	add	r1, sp, #68	; 0x44
    7f10:	595a      	ldr	r2, [r3, r5]
    7f12:	4608      	mov	r0, r1
    7f14:	f7ff fe8f 	bl	7c36 <mbedtls_mpi_mul_int>
    7f18:	2800      	cmp	r0, #0
    7f1a:	d1a5      	bne.n	7e68 <mbedtls_mpi_div_mpi+0x1d6>
        while( mbedtls_mpi_cmp_mpi( &T1, &T2 ) > 0 );
    7f1c:	a914      	add	r1, sp, #80	; 0x50
    7f1e:	a811      	add	r0, sp, #68	; 0x44
    7f20:	f7ff fd24 	bl	796c <mbedtls_mpi_cmp_mpi>
    7f24:	2800      	cmp	r0, #0
    7f26:	dcdc      	bgt.n	7ee2 <mbedtls_mpi_div_mpi+0x250>
        MBEDTLS_MPI_CHK( mbedtls_mpi_mul_int( &T1, &Y, Z.p[i - t - 1] ) );
    7f28:	9b10      	ldr	r3, [sp, #64]	; 0x40
    7f2a:	a90b      	add	r1, sp, #44	; 0x2c
    7f2c:	595a      	ldr	r2, [r3, r5]
    7f2e:	a811      	add	r0, sp, #68	; 0x44
    7f30:	f7ff fe81 	bl	7c36 <mbedtls_mpi_mul_int>
    7f34:	2800      	cmp	r0, #0
    7f36:	d197      	bne.n	7e68 <mbedtls_mpi_div_mpi+0x1d6>
        MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &T1,  biL * ( i - t - 1 ) ) );
    7f38:	00ee      	lsls	r6, r5, #3
    7f3a:	4631      	mov	r1, r6
    7f3c:	a811      	add	r0, sp, #68	; 0x44
    7f3e:	f7ff fc56 	bl	77ee <mbedtls_mpi_shift_l>
    7f42:	2800      	cmp	r0, #0
    7f44:	d190      	bne.n	7e68 <mbedtls_mpi_div_mpi+0x1d6>
        MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( &X, &X, &T1 ) );
    7f46:	a908      	add	r1, sp, #32
    7f48:	4608      	mov	r0, r1
    7f4a:	aa11      	add	r2, sp, #68	; 0x44
    7f4c:	f7ff fe50 	bl	7bf0 <mbedtls_mpi_sub_mpi>
    7f50:	4601      	mov	r1, r0
    7f52:	2800      	cmp	r0, #0
    7f54:	d13a      	bne.n	7fcc <mbedtls_mpi_div_mpi+0x33a>
        if( mbedtls_mpi_cmp_int( &X, 0 ) < 0 )
    7f56:	a808      	add	r0, sp, #32
    7f58:	f7ff fd4b 	bl	79f2 <mbedtls_mpi_cmp_int>
    7f5c:	2800      	cmp	r0, #0
    7f5e:	da19      	bge.n	7f94 <mbedtls_mpi_div_mpi+0x302>
            MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &T1, &Y ) );
    7f60:	a90b      	add	r1, sp, #44	; 0x2c
    7f62:	a811      	add	r0, sp, #68	; 0x44
    7f64:	f7ff fb3e 	bl	75e4 <mbedtls_mpi_copy>
    7f68:	2800      	cmp	r0, #0
    7f6a:	f47f af7d 	bne.w	7e68 <mbedtls_mpi_div_mpi+0x1d6>
            MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &T1, biL * ( i - t - 1 ) ) );
    7f6e:	4631      	mov	r1, r6
    7f70:	a811      	add	r0, sp, #68	; 0x44
    7f72:	f7ff fc3c 	bl	77ee <mbedtls_mpi_shift_l>
    7f76:	2800      	cmp	r0, #0
    7f78:	f47f af76 	bne.w	7e68 <mbedtls_mpi_div_mpi+0x1d6>
            MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( &X, &X, &T1 ) );
    7f7c:	a908      	add	r1, sp, #32
    7f7e:	aa11      	add	r2, sp, #68	; 0x44
    7f80:	4608      	mov	r0, r1
    7f82:	f7ff fe13 	bl	7bac <mbedtls_mpi_add_mpi>
    7f86:	2800      	cmp	r0, #0
    7f88:	f47f af6e 	bne.w	7e68 <mbedtls_mpi_div_mpi+0x1d6>
            Z.p[i - t - 1]--;
    7f8c:	9a10      	ldr	r2, [sp, #64]	; 0x40
    7f8e:	5953      	ldr	r3, [r2, r5]
    7f90:	3b01      	subs	r3, #1
    7f92:	5153      	str	r3, [r2, r5]
    for( i = n; i > t ; i-- )
    7f94:	f10b 3bff 	add.w	fp, fp, #4294967295
    7f98:	3d04      	subs	r5, #4
    7f9a:	e739      	b.n	7e10 <mbedtls_mpi_div_mpi+0x17e>
            Z.p[i - t - 1] = mbedtls_int_div_int( X.p[i], X.p[i - 1],
    7f9c:	9b05      	ldr	r3, [sp, #20]
    7f9e:	58f0      	ldr	r0, [r6, r3]
    if( 0 == d || u1 >= d )
    7fa0:	b17a      	cbz	r2, 7fc2 <mbedtls_mpi_div_mpi+0x330>
    quotient = dividend / d;
    7fa2:	2300      	movs	r3, #0
    7fa4:	f7f8 f89a 	bl	dc <__aeabi_uldivmod>
    7fa8:	460b      	mov	r3, r1
    return (mbedtls_mpi_uint) quotient;
    7faa:	2100      	movs	r1, #0
    quotient = dividend / d;
    7fac:	4602      	mov	r2, r0
    return (mbedtls_mpi_uint) quotient;
    7fae:	4299      	cmp	r1, r3
    7fb0:	f04f 30ff 	mov.w	r0, #4294967295
    7fb4:	bf08      	it	eq
    7fb6:	4290      	cmpeq	r0, r2
    7fb8:	d200      	bcs.n	7fbc <mbedtls_mpi_div_mpi+0x32a>
    7fba:	4602      	mov	r2, r0
            Z.p[i - t - 1] = mbedtls_int_div_int( X.p[i], X.p[i - 1],
    7fbc:	f8c8 2000 	str.w	r2, [r8]
    7fc0:	e77c      	b.n	7ebc <mbedtls_mpi_div_mpi+0x22a>
        return ( ~0 );
    7fc2:	f04f 32ff 	mov.w	r2, #4294967295
    7fc6:	e7f9      	b.n	7fbc <mbedtls_mpi_div_mpi+0x32a>
            T1.p[0] = ( t < 1 ) ? 0 : Y.p[t - 1];
    7fc8:	9901      	ldr	r1, [sp, #4]
    7fca:	e79a      	b.n	7f02 <mbedtls_mpi_div_mpi+0x270>
    7fcc:	460c      	mov	r4, r1
    7fce:	e698      	b.n	7d02 <mbedtls_mpi_div_mpi+0x70>
        return( MBEDTLS_ERR_MPI_DIVISION_BY_ZERO );
    7fd0:	f06f 040b 	mvn.w	r4, #11
    7fd4:	e68a      	b.n	7cec <mbedtls_mpi_div_mpi+0x5a>

00007fd6 <mbedtls_mpi_mod_mpi>:
{
    7fd6:	b570      	push	{r4, r5, r6, lr}
    7fd8:	4604      	mov	r4, r0
    7fda:	460d      	mov	r5, r1
    if( mbedtls_mpi_cmp_int( B, 0 ) < 0 )
    7fdc:	4610      	mov	r0, r2
    7fde:	2100      	movs	r1, #0
{
    7fe0:	4616      	mov	r6, r2
    if( mbedtls_mpi_cmp_int( B, 0 ) < 0 )
    7fe2:	f7ff fd06 	bl	79f2 <mbedtls_mpi_cmp_int>
    7fe6:	2800      	cmp	r0, #0
    7fe8:	db24      	blt.n	8034 <CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC+0x34>
    MBEDTLS_MPI_CHK( mbedtls_mpi_div_mpi( NULL, R, A, B ) );
    7fea:	462a      	mov	r2, r5
    7fec:	4633      	mov	r3, r6
    7fee:	4621      	mov	r1, r4
    7ff0:	2000      	movs	r0, #0
    7ff2:	f7ff fe4e 	bl	7c92 <mbedtls_mpi_div_mpi>
    7ff6:	4605      	mov	r5, r0
    7ff8:	b138      	cbz	r0, 800a <CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC+0xa>
}
    7ffa:	4628      	mov	r0, r5
    7ffc:	bd70      	pop	{r4, r5, r6, pc}
      MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( R, R, B ) );
    7ffe:	4632      	mov	r2, r6
    8000:	4621      	mov	r1, r4
    8002:	4620      	mov	r0, r4
    8004:	f7ff fdd2 	bl	7bac <mbedtls_mpi_add_mpi>
    8008:	b990      	cbnz	r0, 8030 <CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC+0x30>
    while( mbedtls_mpi_cmp_int( R, 0 ) < 0 )
    800a:	2100      	movs	r1, #0
    800c:	4620      	mov	r0, r4
    800e:	f7ff fcf0 	bl	79f2 <mbedtls_mpi_cmp_int>
    8012:	2800      	cmp	r0, #0
    8014:	dbf3      	blt.n	7ffe <mbedtls_mpi_mod_mpi+0x28>
    while( mbedtls_mpi_cmp_mpi( R, B ) >= 0 )
    8016:	4631      	mov	r1, r6
    8018:	4620      	mov	r0, r4
    801a:	f7ff fca7 	bl	796c <mbedtls_mpi_cmp_mpi>
    801e:	2800      	cmp	r0, #0
    8020:	dbeb      	blt.n	7ffa <mbedtls_mpi_mod_mpi+0x24>
      MBEDTLS_MPI_CHK( mbedtls_mpi_sub_mpi( R, R, B ) );
    8022:	4632      	mov	r2, r6
    8024:	4621      	mov	r1, r4
    8026:	4620      	mov	r0, r4
    8028:	f7ff fde2 	bl	7bf0 <mbedtls_mpi_sub_mpi>
    802c:	2800      	cmp	r0, #0
    802e:	d0f2      	beq.n	8016 <CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC+0x16>
    8030:	4605      	mov	r5, r0
    8032:	e7e2      	b.n	7ffa <mbedtls_mpi_mod_mpi+0x24>
        return( MBEDTLS_ERR_MPI_NEGATIVE_VALUE );
    8034:	f06f 0509 	mvn.w	r5, #9
    8038:	e7df      	b.n	7ffa <mbedtls_mpi_mod_mpi+0x24>

0000803a <mbedtls_mpi_exp_mod>:
 * Sliding-window exponentiation: X = A^E mod N  (HAC 14.85)
 */
int mbedtls_mpi_exp_mod( mbedtls_mpi *X, const mbedtls_mpi *A,
                         const mbedtls_mpi *E, const mbedtls_mpi *N,
                         mbedtls_mpi *_RR )
{
    803a:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    803e:	f5ad 7d5b 	sub.w	sp, sp, #876	; 0x36c
    8042:	4683      	mov	fp, r0
    8044:	460f      	mov	r7, r1
    MPI_VALIDATE_RET( X != NULL );
    MPI_VALIDATE_RET( A != NULL );
    MPI_VALIDATE_RET( E != NULL );
    MPI_VALIDATE_RET( N != NULL );

    if( mbedtls_mpi_cmp_int( N, 0 ) <= 0 || ( N->p[0] & 1 ) == 0 )
    8046:	4618      	mov	r0, r3
    8048:	2100      	movs	r1, #0
{
    804a:	9204      	str	r2, [sp, #16]
    804c:	461d      	mov	r5, r3
    if( mbedtls_mpi_cmp_int( N, 0 ) <= 0 || ( N->p[0] & 1 ) == 0 )
    804e:	f7ff fcd0 	bl	79f2 <mbedtls_mpi_cmp_int>
    8052:	2800      	cmp	r0, #0
    8054:	f340 8220 	ble.w	8498 <mbedtls_mpi_exp_mod+0x45e>
    8058:	68ab      	ldr	r3, [r5, #8]
    805a:	681c      	ldr	r4, [r3, #0]
    805c:	f014 0301 	ands.w	r3, r4, #1
    8060:	9307      	str	r3, [sp, #28]
    8062:	f000 8219 	beq.w	8498 <mbedtls_mpi_exp_mod+0x45e>
        return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA );

    if( mbedtls_mpi_cmp_int( E, 0 ) < 0 )
    8066:	9804      	ldr	r0, [sp, #16]
    8068:	2100      	movs	r1, #0
    806a:	f7ff fcc2 	bl	79f2 <mbedtls_mpi_cmp_int>
    806e:	2800      	cmp	r0, #0
    8070:	f2c0 8212 	blt.w	8498 <mbedtls_mpi_exp_mod+0x45e>
        return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA );

    if( mbedtls_mpi_bitlen( E ) > MBEDTLS_MPI_MAX_BITS ||
    8074:	9804      	ldr	r0, [sp, #16]
    8076:	f7ff fb40 	bl	76fa <mbedtls_mpi_bitlen>
    807a:	f5b0 6f00 	cmp.w	r0, #2048	; 0x800
    807e:	f200 820b 	bhi.w	8498 <mbedtls_mpi_exp_mod+0x45e>
        mbedtls_mpi_bitlen( N ) > MBEDTLS_MPI_MAX_BITS )
    8082:	4628      	mov	r0, r5
    8084:	f7ff fb39 	bl	76fa <mbedtls_mpi_bitlen>
    if( mbedtls_mpi_bitlen( E ) > MBEDTLS_MPI_MAX_BITS ||
    8088:	f5b0 6f00 	cmp.w	r0, #2048	; 0x800
    808c:	f200 8204 	bhi.w	8498 <mbedtls_mpi_exp_mod+0x45e>
    x += ( ( m0 + 2 ) & 4 ) << 1;
    8090:	1ca6      	adds	r6, r4, #2
    8092:	0076      	lsls	r6, r6, #1
    8094:	f006 0608 	and.w	r6, r6, #8
    8098:	4426      	add	r6, r4
    809a:	2103      	movs	r1, #3
        x *= ( 2 - ( m0 * x ) );
    809c:	fb06 f304 	mul.w	r3, r6, r4
    80a0:	f1c3 0302 	rsb	r3, r3, #2
    for( i = biL; i >= 8; i /= 2 )
    80a4:	3901      	subs	r1, #1
        x *= ( 2 - ( m0 * x ) );
    80a6:	fb03 f606 	mul.w	r6, r3, r6
    for( i = biL; i >= 8; i /= 2 )
    80aa:	d1f7      	bne.n	809c <mbedtls_mpi_exp_mod+0x62>
    X->s = 1;
    80ac:	2301      	movs	r3, #1
     */
    mpi_montg_init( &mm, N );
    mbedtls_mpi_init( &RR ); mbedtls_mpi_init( &T );
    mbedtls_mpi_init( &Apos );
    mbedtls_mpi_init( &WW );
    memset( W, 0, sizeof( W ) );
    80ae:	f44f 7240 	mov.w	r2, #768	; 0x300
    80b2:	a81a      	add	r0, sp, #104	; 0x68
    X->n = 0;
    80b4:	e9cd 310b 	strd	r3, r1, [sp, #44]	; 0x2c
    X->s = 1;
    80b8:	e9cd 130d 	strd	r1, r3, [sp, #52]	; 0x34
    X->p = NULL;
    80bc:	e9cd 110f 	strd	r1, r1, [sp, #60]	; 0x3c
    X->n = 0;
    80c0:	e9cd 3114 	strd	r3, r1, [sp, #80]	; 0x50
    80c4:	e9cd 3111 	strd	r3, r1, [sp, #68]	; 0x44
    X->p = NULL;
    80c8:	9116      	str	r1, [sp, #88]	; 0x58
    80ca:	9113      	str	r1, [sp, #76]	; 0x4c
    memset( W, 0, sizeof( W ) );
    80cc:	f7fe fad9 	bl	6682 <memset>

    i = mbedtls_mpi_bitlen( E );
    80d0:	9804      	ldr	r0, [sp, #16]
    80d2:	f7ff fb12 	bl	76fa <mbedtls_mpi_bitlen>

    wsize = ( i > 671 ) ? 6 : ( i > 239 ) ? 5 :
    80d6:	f5b0 7f28 	cmp.w	r0, #672	; 0x2a0
    80da:	f080 80f9 	bcs.w	82d0 <mbedtls_mpi_exp_mod+0x296>
    80de:	28ef      	cmp	r0, #239	; 0xef
    80e0:	f200 80f8 	bhi.w	82d4 <mbedtls_mpi_exp_mod+0x29a>
    80e4:	284f      	cmp	r0, #79	; 0x4f
    80e6:	f200 80f7 	bhi.w	82d8 <mbedtls_mpi_exp_mod+0x29e>
    80ea:	2817      	cmp	r0, #23
    80ec:	9b07      	ldr	r3, [sp, #28]
    80ee:	bf88      	it	hi
    80f0:	2303      	movhi	r3, #3
#if( MBEDTLS_MPI_WINDOW_SIZE < 6 )
    if( wsize > MBEDTLS_MPI_WINDOW_SIZE )
        wsize = MBEDTLS_MPI_WINDOW_SIZE;
#endif

    j = N->n + 1;
    80f2:	6869      	ldr	r1, [r5, #4]
    wsize = ( i > 671 ) ? 6 : ( i > 239 ) ? 5 :
    80f4:	9302      	str	r3, [sp, #8]
    j = N->n + 1;
    80f6:	f101 0801 	add.w	r8, r1, #1
    /* All W[i] and X must have at least N->n limbs for the mpi_montmul()
     * and mpi_montred() calls later. Here we ensure that W[1] and X are
     * large enough, and later we'll grow other W[i] to the same length.
     * They must not be shrunk midway through this function!
     */
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( X, j ) );
    80fa:	4641      	mov	r1, r8
    80fc:	4658      	mov	r0, fp
    80fe:	f7ff fa30 	bl	7562 <mbedtls_mpi_grow>
    8102:	4604      	mov	r4, r0
    8104:	2800      	cmp	r0, #0
    8106:	f040 80bf 	bne.w	8288 <mbedtls_mpi_exp_mod+0x24e>
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &W[1],  j ) );
    810a:	4641      	mov	r1, r8
    810c:	a81d      	add	r0, sp, #116	; 0x74
    810e:	f7ff fa28 	bl	7562 <mbedtls_mpi_grow>
    8112:	4604      	mov	r4, r0
    8114:	2800      	cmp	r0, #0
    8116:	f040 80b7 	bne.w	8288 <mbedtls_mpi_exp_mod+0x24e>
    MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &T, j * 2 ) );
    811a:	ea4f 0148 	mov.w	r1, r8, lsl #1
    811e:	a80e      	add	r0, sp, #56	; 0x38
    8120:	f7ff fa1f 	bl	7562 <mbedtls_mpi_grow>
    8124:	4604      	mov	r4, r0
    8126:	2800      	cmp	r0, #0
    8128:	f040 80ae 	bne.w	8288 <mbedtls_mpi_exp_mod+0x24e>

    /*
     * Compensate for negative A (and correct at the end)
     */
    neg = ( A->s == -1 );
    812c:	683b      	ldr	r3, [r7, #0]
    812e:	9306      	str	r3, [sp, #24]
    if( neg )
    8130:	3301      	adds	r3, #1
    8132:	d10a      	bne.n	814a <mbedtls_mpi_exp_mod+0x110>
    {
        MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &Apos, A ) );
    8134:	4639      	mov	r1, r7
    8136:	a814      	add	r0, sp, #80	; 0x50
    8138:	f7ff fa54 	bl	75e4 <mbedtls_mpi_copy>
    813c:	4604      	mov	r4, r0
    813e:	2800      	cmp	r0, #0
    8140:	f040 80a2 	bne.w	8288 <mbedtls_mpi_exp_mod+0x24e>
        Apos.s = 1;
    8144:	2301      	movs	r3, #1
    8146:	9314      	str	r3, [sp, #80]	; 0x50
        A = &Apos;
    8148:	af14      	add	r7, sp, #80	; 0x50
    }

    /*
     * If 1st call, pre-compute R^2 mod N
     */
    if( _RR == NULL || _RR->p == NULL )
    814a:	9be4      	ldr	r3, [sp, #912]	; 0x390
    814c:	b11b      	cbz	r3, 8156 <mbedtls_mpi_exp_mod+0x11c>
    814e:	689b      	ldr	r3, [r3, #8]
    8150:	2b00      	cmp	r3, #0
    8152:	f040 80c3 	bne.w	82dc <mbedtls_mpi_exp_mod+0x2a2>
    {
        MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &RR, 1 ) );
    8156:	2101      	movs	r1, #1
    8158:	a80b      	add	r0, sp, #44	; 0x2c
    815a:	f7ff faa1 	bl	76a0 <mbedtls_mpi_lset>
    815e:	4604      	mov	r4, r0
    8160:	2800      	cmp	r0, #0
    8162:	f040 8091 	bne.w	8288 <mbedtls_mpi_exp_mod+0x24e>
        MBEDTLS_MPI_CHK( mbedtls_mpi_shift_l( &RR, N->n * 2 * biL ) );
    8166:	6869      	ldr	r1, [r5, #4]
    8168:	a80b      	add	r0, sp, #44	; 0x2c
    816a:	0189      	lsls	r1, r1, #6
    816c:	f7ff fb3f 	bl	77ee <mbedtls_mpi_shift_l>
    8170:	4604      	mov	r4, r0
    8172:	2800      	cmp	r0, #0
    8174:	f040 8088 	bne.w	8288 <mbedtls_mpi_exp_mod+0x24e>
        MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &RR, &RR, N ) );
    8178:	a90b      	add	r1, sp, #44	; 0x2c
    817a:	462a      	mov	r2, r5
    817c:	4608      	mov	r0, r1
    817e:	f7ff ff2a 	bl	7fd6 <mbedtls_mpi_mod_mpi>
    8182:	4604      	mov	r4, r0
    8184:	2800      	cmp	r0, #0
    8186:	d17f      	bne.n	8288 <mbedtls_mpi_exp_mod+0x24e>

        if( _RR != NULL )
    8188:	9be4      	ldr	r3, [sp, #912]	; 0x390
    818a:	b123      	cbz	r3, 8196 <mbedtls_mpi_exp_mod+0x15c>
            memcpy( _RR, &RR, sizeof( mbedtls_mpi ) );
    818c:	220c      	movs	r2, #12
    818e:	a90b      	add	r1, sp, #44	; 0x2c
    8190:	4618      	mov	r0, r3
    }
    else
        memcpy( &RR, _RR, sizeof( mbedtls_mpi ) );
    8192:	f7fe fa6b 	bl	666c <memcpy>

    /*
     * W[1] = A * R^2 * R^-1 mod N = A * R mod N
     */
    if( mbedtls_mpi_cmp_mpi( A, N ) >= 0 )
    8196:	4629      	mov	r1, r5
    8198:	4638      	mov	r0, r7
    819a:	f7ff fbe7 	bl	796c <mbedtls_mpi_cmp_mpi>
    819e:	2800      	cmp	r0, #0
    81a0:	f2c0 80a0 	blt.w	82e4 <mbedtls_mpi_exp_mod+0x2aa>
    {
        MBEDTLS_MPI_CHK( mbedtls_mpi_mod_mpi( &W[1], A, N ) );
    81a4:	462a      	mov	r2, r5
    81a6:	4639      	mov	r1, r7
    81a8:	a81d      	add	r0, sp, #116	; 0x74
    81aa:	f7ff ff14 	bl	7fd6 <mbedtls_mpi_mod_mpi>
    81ae:	4604      	mov	r4, r0
    81b0:	2800      	cmp	r0, #0
    81b2:	d169      	bne.n	8288 <mbedtls_mpi_exp_mod+0x24e>
        /* This should be a no-op because W[1] is already that large before
         * mbedtls_mpi_mod_mpi(), but it's necessary to avoid an overflow
         * in mpi_montmul() below, so let's make sure. */
        MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &W[1], N->n + 1 ) );
    81b4:	6869      	ldr	r1, [r5, #4]
    81b6:	a81d      	add	r0, sp, #116	; 0x74
    81b8:	3101      	adds	r1, #1
    81ba:	f7ff f9d2 	bl	7562 <mbedtls_mpi_grow>
    81be:	4604      	mov	r4, r0
    81c0:	2800      	cmp	r0, #0
    81c2:	d161      	bne.n	8288 <mbedtls_mpi_exp_mod+0x24e>
    *mm = ~x + 1;
    81c4:	4276      	negs	r6, r6
    else
        MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[1], A ) );

    /* Note that this is safe because W[1] always has at least N->n limbs
     * (it grew above and was preserved by mbedtls_mpi_copy()). */
    mpi_montmul( &W[1], &RR, N, mm, &T );
    81c6:	f10d 0838 	add.w	r8, sp, #56	; 0x38
    81ca:	4633      	mov	r3, r6
    81cc:	462a      	mov	r2, r5
    81ce:	a90b      	add	r1, sp, #44	; 0x2c
    81d0:	a81f      	add	r0, sp, #124	; 0x7c
    81d2:	f8cd 8000 	str.w	r8, [sp]
    81d6:	f7ff f938 	bl	744a <mpi_montmul.isra.0>

    /*
     * X = R^2 * R^-1 mod N = R mod N
     */
    MBEDTLS_MPI_CHK( mbedtls_mpi_copy( X, &RR ) );
    81da:	a90b      	add	r1, sp, #44	; 0x2c
    81dc:	4658      	mov	r0, fp
    81de:	f7ff fa01 	bl	75e4 <mbedtls_mpi_copy>
    81e2:	4604      	mov	r4, r0
    81e4:	2800      	cmp	r0, #0
    81e6:	d14f      	bne.n	8288 <mbedtls_mpi_exp_mod+0x24e>
    mbedtls_mpi_uint z = 1;
    81e8:	ab0a      	add	r3, sp, #40	; 0x28
    81ea:	f10b 0908 	add.w	r9, fp, #8
    81ee:	2701      	movs	r7, #1
    U.p = &z;
    81f0:	9319      	str	r3, [sp, #100]	; 0x64
    mpi_montmul( A, &U, N, mm, T );
    81f2:	f8cd 8000 	str.w	r8, [sp]
    81f6:	4633      	mov	r3, r6
    81f8:	462a      	mov	r2, r5
    81fa:	a917      	add	r1, sp, #92	; 0x5c
    81fc:	4648      	mov	r0, r9
    U.n = U.s = (int) z;
    81fe:	e9cd 7717 	strd	r7, r7, [sp, #92]	; 0x5c
    mbedtls_mpi_uint z = 1;
    8202:	970a      	str	r7, [sp, #40]	; 0x28
    mpi_montmul( A, &U, N, mm, T );
    8204:	f7ff f921 	bl	744a <mpi_montmul.isra.0>
    mpi_montred( X, N, mm, &T );

    if( wsize > 1 )
    8208:	9b02      	ldr	r3, [sp, #8]
    820a:	42bb      	cmp	r3, r7
    820c:	d16f      	bne.n	82ee <mbedtls_mpi_exp_mod+0x2b4>

            mpi_montmul( &W[i], &W[1], N, mm, &T );
        }
    }

    nblimbs = E->n;
    820e:	9b04      	ldr	r3, [sp, #16]
    bufsize = 0;
    nbits   = 0;
    wbits   = 0;
    state   = 0;
    8210:	f04f 0a00 	mov.w	sl, #0
    nblimbs = E->n;
    8214:	685b      	ldr	r3, [r3, #4]
    8216:	9303      	str	r3, [sp, #12]
    nbits   = 0;
    8218:	4657      	mov	r7, sl
    bufsize = 0;
    821a:	f8cd a014 	str.w	sl, [sp, #20]
    wbits   = 0;
    821e:	46d0      	mov	r8, sl

    while( 1 )
    {
        if( bufsize == 0 )
    8220:	9b05      	ldr	r3, [sp, #20]
    8222:	2b00      	cmp	r3, #0
    8224:	f040 80bb 	bne.w	839e <mbedtls_mpi_exp_mod+0x364>
        {
            if( nblimbs == 0 )
    8228:	9b03      	ldr	r3, [sp, #12]
    822a:	2b00      	cmp	r3, #0
    822c:	f040 80b2 	bne.w	8394 <mbedtls_mpi_exp_mod+0x35a>
    {
        mpi_montmul( X, X, N, mm, &T );

        wbits <<= 1;

        if( ( wbits & ( one << wsize ) ) != 0 )
    8230:	9a02      	ldr	r2, [sp, #8]
    8232:	2301      	movs	r3, #1
    8234:	4093      	lsls	r3, r2
    8236:	9305      	str	r3, [sp, #20]
    8238:	f10d 0a38 	add.w	sl, sp, #56	; 0x38
    for( i = 0; i < nbits; i++ )
    823c:	9b03      	ldr	r3, [sp, #12]
    823e:	42bb      	cmp	r3, r7
    8240:	f040 8107 	bne.w	8452 <mbedtls_mpi_exp_mod+0x418>
    mbedtls_mpi_uint z = 1;
    8244:	2301      	movs	r3, #1
    8246:	aa0a      	add	r2, sp, #40	; 0x28
    U.n = U.s = (int) z;
    8248:	e9cd 3317 	strd	r3, r3, [sp, #92]	; 0x5c
    mbedtls_mpi_uint z = 1;
    824c:	930a      	str	r3, [sp, #40]	; 0x28
    U.p = &z;
    824e:	9219      	str	r2, [sp, #100]	; 0x64
    mpi_montmul( A, &U, N, mm, T );
    8250:	4633      	mov	r3, r6
    8252:	f8cd a000 	str.w	sl, [sp]
    8256:	462a      	mov	r2, r5
    8258:	a917      	add	r1, sp, #92	; 0x5c
    825a:	4648      	mov	r0, r9
    825c:	f7ff f8f5 	bl	744a <mpi_montmul.isra.0>
    /*
     * X = A^E * R * R^-1 mod N = A^E mod N
     */
    mpi_montred( X, N, mm, &T );

    if( neg && E->n != 0 && ( E->p[0] & 1 ) != 0 )
    8260:	9b06      	ldr	r3, [sp, #24]
    8262:	3301      	adds	r3, #1
    8264:	d110      	bne.n	8288 <mbedtls_mpi_exp_mod+0x24e>
    8266:	9b04      	ldr	r3, [sp, #16]
    8268:	685b      	ldr	r3, [r3, #4]
    826a:	b16b      	cbz	r3, 8288 <mbedtls_mpi_exp_mod+0x24e>
    826c:	9b04      	ldr	r3, [sp, #16]
    826e:	689b      	ldr	r3, [r3, #8]
    8270:	681b      	ldr	r3, [r3, #0]
    8272:	07db      	lsls	r3, r3, #31
    8274:	d508      	bpl.n	8288 <mbedtls_mpi_exp_mod+0x24e>
    {
        X->s = -1;
    8276:	9b06      	ldr	r3, [sp, #24]
    8278:	f8cb 3000 	str.w	r3, [fp]
        MBEDTLS_MPI_CHK( mbedtls_mpi_add_mpi( X, N, X ) );
    827c:	465a      	mov	r2, fp
    827e:	4629      	mov	r1, r5
    8280:	4658      	mov	r0, fp
    8282:	f7ff fc93 	bl	7bac <mbedtls_mpi_add_mpi>
            MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[i], &W[i - 1] ) );
    8286:	4604      	mov	r4, r0
    }

cleanup:

    for( i = ( one << ( wsize - 1 ) ); i < ( one << wsize ); i++ )
    8288:	9b02      	ldr	r3, [sp, #8]
    828a:	9a02      	ldr	r2, [sp, #8]
    828c:	1e5d      	subs	r5, r3, #1
    828e:	2301      	movs	r3, #1
    8290:	fa03 f505 	lsl.w	r5, r3, r5
    8294:	fa03 f602 	lsl.w	r6, r3, r2
        mbedtls_mpi_free( &W[i] );
    8298:	270c      	movs	r7, #12
    for( i = ( one << ( wsize - 1 ) ); i < ( one << wsize ); i++ )
    829a:	42ae      	cmp	r6, r5
    829c:	f200 80f5 	bhi.w	848a <mbedtls_mpi_exp_mod+0x450>

    mbedtls_mpi_free( &W[1] ); mbedtls_mpi_free( &T ); mbedtls_mpi_free( &Apos );
    82a0:	a81d      	add	r0, sp, #116	; 0x74
    82a2:	f7ff f94c 	bl	753e <mbedtls_mpi_free>
    82a6:	a80e      	add	r0, sp, #56	; 0x38
    82a8:	f7ff f949 	bl	753e <mbedtls_mpi_free>
    82ac:	a814      	add	r0, sp, #80	; 0x50
    82ae:	f7ff f946 	bl	753e <mbedtls_mpi_free>
    mbedtls_mpi_free( &WW );
    82b2:	a811      	add	r0, sp, #68	; 0x44
    82b4:	f7ff f943 	bl	753e <mbedtls_mpi_free>

    if( _RR == NULL || _RR->p == NULL )
    82b8:	9be4      	ldr	r3, [sp, #912]	; 0x390
    82ba:	b10b      	cbz	r3, 82c0 <mbedtls_mpi_exp_mod+0x286>
    82bc:	689b      	ldr	r3, [r3, #8]
    82be:	b913      	cbnz	r3, 82c6 <mbedtls_mpi_exp_mod+0x28c>
        mbedtls_mpi_free( &RR );
    82c0:	a80b      	add	r0, sp, #44	; 0x2c
    82c2:	f7ff f93c 	bl	753e <mbedtls_mpi_free>

    return( ret );
}
    82c6:	4620      	mov	r0, r4
    82c8:	f50d 7d5b 	add.w	sp, sp, #876	; 0x36c
    82cc:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
    wsize = ( i > 671 ) ? 6 : ( i > 239 ) ? 5 :
    82d0:	2306      	movs	r3, #6
    82d2:	e70e      	b.n	80f2 <mbedtls_mpi_exp_mod+0xb8>
    82d4:	2305      	movs	r3, #5
    82d6:	e70c      	b.n	80f2 <mbedtls_mpi_exp_mod+0xb8>
    82d8:	2304      	movs	r3, #4
    82da:	e70a      	b.n	80f2 <mbedtls_mpi_exp_mod+0xb8>
        memcpy( &RR, _RR, sizeof( mbedtls_mpi ) );
    82dc:	99e4      	ldr	r1, [sp, #912]	; 0x390
    82de:	220c      	movs	r2, #12
    82e0:	a80b      	add	r0, sp, #44	; 0x2c
    82e2:	e756      	b.n	8192 <mbedtls_mpi_exp_mod+0x158>
        MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[1], A ) );
    82e4:	4639      	mov	r1, r7
    82e6:	a81d      	add	r0, sp, #116	; 0x74
    82e8:	f7ff f97c 	bl	75e4 <mbedtls_mpi_copy>
    82ec:	e767      	b.n	81be <mbedtls_mpi_exp_mod+0x184>
    82ee:	9b02      	ldr	r3, [sp, #8]
        MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &W[j], N->n + 1 ) );
    82f0:	6869      	ldr	r1, [r5, #4]
    82f2:	f103 3aff 	add.w	sl, r3, #4294967295
    82f6:	fa07 f30a 	lsl.w	r3, r7, sl
    82fa:	270c      	movs	r7, #12
    82fc:	9305      	str	r3, [sp, #20]
    82fe:	fa07 f70a 	lsl.w	r7, r7, sl
    8302:	ab1a      	add	r3, sp, #104	; 0x68
    8304:	441f      	add	r7, r3
    8306:	3101      	adds	r1, #1
    8308:	4638      	mov	r0, r7
    830a:	f7ff f92a 	bl	7562 <mbedtls_mpi_grow>
    830e:	2800      	cmp	r0, #0
    8310:	d1b9      	bne.n	8286 <mbedtls_mpi_exp_mod+0x24c>
        MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[j], &W[1]    ) );
    8312:	a91d      	add	r1, sp, #116	; 0x74
    8314:	4638      	mov	r0, r7
    8316:	f7ff f965 	bl	75e4 <mbedtls_mpi_copy>
    831a:	2800      	cmp	r0, #0
    831c:	d1b3      	bne.n	8286 <mbedtls_mpi_exp_mod+0x24c>
        for( i = 0; i < wsize - 1; i++ )
    831e:	9403      	str	r4, [sp, #12]
            mpi_montmul( &W[j], &W[j], N, mm, &T );
    8320:	f107 0008 	add.w	r0, r7, #8
    8324:	4633      	mov	r3, r6
    8326:	f8cd 8000 	str.w	r8, [sp]
    832a:	462a      	mov	r2, r5
    832c:	4639      	mov	r1, r7
    832e:	9008      	str	r0, [sp, #32]
    8330:	f7ff f88b 	bl	744a <mpi_montmul.isra.0>
        for( i = 0; i < wsize - 1; i++ )
    8334:	9b03      	ldr	r3, [sp, #12]
    8336:	9808      	ldr	r0, [sp, #32]
    8338:	3301      	adds	r3, #1
    833a:	4553      	cmp	r3, sl
    833c:	9303      	str	r3, [sp, #12]
    833e:	d3f1      	bcc.n	8324 <mbedtls_mpi_exp_mod+0x2ea>
        for( i = j + 1; i < ( one << wsize ); i++ )
    8340:	9b05      	ldr	r3, [sp, #20]
    8342:	9a02      	ldr	r2, [sp, #8]
    8344:	f103 0801 	add.w	r8, r3, #1
    8348:	2301      	movs	r3, #1
    834a:	4093      	lsls	r3, r2
    834c:	9303      	str	r3, [sp, #12]
    834e:	9b03      	ldr	r3, [sp, #12]
    8350:	4543      	cmp	r3, r8
    8352:	f67f af5c 	bls.w	820e <mbedtls_mpi_exp_mod+0x1d4>
            MBEDTLS_MPI_CHK( mbedtls_mpi_grow( &W[i], N->n + 1 ) );
    8356:	6869      	ldr	r1, [r5, #4]
    8358:	f107 0a0c 	add.w	sl, r7, #12
    835c:	3101      	adds	r1, #1
    835e:	4650      	mov	r0, sl
    8360:	f7ff f8ff 	bl	7562 <mbedtls_mpi_grow>
    8364:	2800      	cmp	r0, #0
    8366:	d18e      	bne.n	8286 <mbedtls_mpi_exp_mod+0x24c>
            MBEDTLS_MPI_CHK( mbedtls_mpi_copy( &W[i], &W[i - 1] ) );
    8368:	4639      	mov	r1, r7
    836a:	4650      	mov	r0, sl
    836c:	f7ff f93a 	bl	75e4 <mbedtls_mpi_copy>
    8370:	2800      	cmp	r0, #0
    8372:	d188      	bne.n	8286 <mbedtls_mpi_exp_mod+0x24c>
            mpi_montmul( &W[i], &W[1], N, mm, &T );
    8374:	ab0e      	add	r3, sp, #56	; 0x38
    8376:	9300      	str	r3, [sp, #0]
    8378:	f107 0014 	add.w	r0, r7, #20
    837c:	4633      	mov	r3, r6
    837e:	462a      	mov	r2, r5
    8380:	a91d      	add	r1, sp, #116	; 0x74
    8382:	f7ff f862 	bl	744a <mpi_montmul.isra.0>
        for( i = j + 1; i < ( one << wsize ); i++ )
    8386:	f108 0801 	add.w	r8, r8, #1
    838a:	4657      	mov	r7, sl
    838c:	e7df      	b.n	834e <mbedtls_mpi_exp_mod+0x314>
        state = 2;
    838e:	f04f 0a02 	mov.w	sl, #2
    8392:	e745      	b.n	8220 <mbedtls_mpi_exp_mod+0x1e6>
            nblimbs--;
    8394:	9b03      	ldr	r3, [sp, #12]
    8396:	3b01      	subs	r3, #1
    8398:	9303      	str	r3, [sp, #12]
            bufsize = sizeof( mbedtls_mpi_uint ) << 3;
    839a:	2320      	movs	r3, #32
    839c:	9305      	str	r3, [sp, #20]
        bufsize--;
    839e:	9b05      	ldr	r3, [sp, #20]
        ei = (E->p[nblimbs] >> bufsize) & 1;
    83a0:	9a03      	ldr	r2, [sp, #12]
        bufsize--;
    83a2:	3b01      	subs	r3, #1
    83a4:	9305      	str	r3, [sp, #20]
        ei = (E->p[nblimbs] >> bufsize) & 1;
    83a6:	9b04      	ldr	r3, [sp, #16]
    83a8:	689b      	ldr	r3, [r3, #8]
    83aa:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
    83ae:	9a05      	ldr	r2, [sp, #20]
    83b0:	40d3      	lsrs	r3, r2
        if( ei == 0 && state == 0 )
    83b2:	f013 0301 	ands.w	r3, r3, #1
    83b6:	d10f      	bne.n	83d8 <mbedtls_mpi_exp_mod+0x39e>
    83b8:	f1ba 0f00 	cmp.w	sl, #0
    83bc:	f43f af30 	beq.w	8220 <mbedtls_mpi_exp_mod+0x1e6>
        if( ei == 0 && state == 1 )
    83c0:	f1ba 0f01 	cmp.w	sl, #1
    83c4:	d108      	bne.n	83d8 <mbedtls_mpi_exp_mod+0x39e>
            mpi_montmul( X, X, N, mm, &T );
    83c6:	ab0e      	add	r3, sp, #56	; 0x38
    83c8:	9300      	str	r3, [sp, #0]
    83ca:	462a      	mov	r2, r5
    83cc:	4633      	mov	r3, r6
    83ce:	4659      	mov	r1, fp
    83d0:	4648      	mov	r0, r9
    83d2:	f7ff f83a 	bl	744a <mpi_montmul.isra.0>
            continue;
    83d6:	e723      	b.n	8220 <mbedtls_mpi_exp_mod+0x1e6>
        wbits |= ( ei << ( wsize - nbits ) );
    83d8:	9a02      	ldr	r2, [sp, #8]
        nbits++;
    83da:	3701      	adds	r7, #1
        wbits |= ( ei << ( wsize - nbits ) );
    83dc:	1bd2      	subs	r2, r2, r7
    83de:	4093      	lsls	r3, r2
    83e0:	ea48 0803 	orr.w	r8, r8, r3
        if( nbits == wsize )
    83e4:	9b02      	ldr	r3, [sp, #8]
    83e6:	42bb      	cmp	r3, r7
    83e8:	d1d1      	bne.n	838e <mbedtls_mpi_exp_mod+0x354>
            for( i = 0; i < wsize; i++ )
    83ea:	f04f 0a00 	mov.w	sl, #0
                mpi_montmul( X, X, N, mm, &T );
    83ee:	ab0e      	add	r3, sp, #56	; 0x38
    83f0:	9300      	str	r3, [sp, #0]
    83f2:	462a      	mov	r2, r5
    83f4:	4633      	mov	r3, r6
    83f6:	4659      	mov	r1, fp
    83f8:	4648      	mov	r0, r9
            for( i = 0; i < wsize; i++ )
    83fa:	f10a 0a01 	add.w	sl, sl, #1
                mpi_montmul( X, X, N, mm, &T );
    83fe:	f7ff f824 	bl	744a <mpi_montmul.isra.0>
            for( i = 0; i < wsize; i++ )
    8402:	4557      	cmp	r7, sl
    8404:	d8f3      	bhi.n	83ee <mbedtls_mpi_exp_mod+0x3b4>
            MBEDTLS_MPI_CHK( mpi_select( &WW, W, (size_t) 1 << wsize, wbits ) );
    8406:	2301      	movs	r3, #1
    8408:	40bb      	lsls	r3, r7
    840a:	9308      	str	r3, [sp, #32]
    for( size_t i = 0; i < T_size; i++ )
    840c:	a91a      	add	r1, sp, #104	; 0x68
    840e:	f04f 0a00 	mov.w	sl, #0
    const size_t diff = x ^ y;
    8412:	ea88 030a 	eor.w	r3, r8, sl
    const size_t diff_msb = ( diff | (size_t) -diff );
    8416:	425a      	negs	r2, r3
    8418:	431a      	orrs	r2, r3
        MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_assign( R, &T[i],
    841a:	43d2      	mvns	r2, r2
    841c:	0fd2      	lsrs	r2, r2, #31
    841e:	a811      	add	r0, sp, #68	; 0x44
    8420:	9109      	str	r1, [sp, #36]	; 0x24
    8422:	f7ff f911 	bl	7648 <mbedtls_mpi_safe_cond_assign>
    8426:	4607      	mov	r7, r0
    8428:	bb68      	cbnz	r0, 8486 <mbedtls_mpi_exp_mod+0x44c>
    for( size_t i = 0; i < T_size; i++ )
    842a:	9b08      	ldr	r3, [sp, #32]
    842c:	9909      	ldr	r1, [sp, #36]	; 0x24
    842e:	f10a 0a01 	add.w	sl, sl, #1
    8432:	4553      	cmp	r3, sl
    8434:	f101 010c 	add.w	r1, r1, #12
    8438:	d1eb      	bne.n	8412 <mbedtls_mpi_exp_mod+0x3d8>
            mpi_montmul( X, &WW, N, mm, &T );
    843a:	ab0e      	add	r3, sp, #56	; 0x38
    843c:	9300      	str	r3, [sp, #0]
    843e:	462a      	mov	r2, r5
    8440:	4633      	mov	r3, r6
    8442:	a911      	add	r1, sp, #68	; 0x44
    8444:	4648      	mov	r0, r9
    8446:	f7ff f800 	bl	744a <mpi_montmul.isra.0>
            nbits = 0;
    844a:	46b8      	mov	r8, r7
            state--;
    844c:	f8dd a01c 	ldr.w	sl, [sp, #28]
    8450:	e6e6      	b.n	8220 <mbedtls_mpi_exp_mod+0x1e6>
        mpi_montmul( X, X, N, mm, &T );
    8452:	4633      	mov	r3, r6
    8454:	f8cd a000 	str.w	sl, [sp]
    8458:	462a      	mov	r2, r5
    845a:	4659      	mov	r1, fp
    845c:	4648      	mov	r0, r9
    845e:	f7fe fff4 	bl	744a <mpi_montmul.isra.0>
        if( ( wbits & ( one << wsize ) ) != 0 )
    8462:	9b05      	ldr	r3, [sp, #20]
        wbits <<= 1;
    8464:	ea4f 0848 	mov.w	r8, r8, lsl #1
        if( ( wbits & ( one << wsize ) ) != 0 )
    8468:	ea13 0f08 	tst.w	r3, r8
    846c:	d007      	beq.n	847e <mbedtls_mpi_exp_mod+0x444>
            mpi_montmul( X, &W[1], N, mm, &T );
    846e:	f8cd a000 	str.w	sl, [sp]
    8472:	4633      	mov	r3, r6
    8474:	462a      	mov	r2, r5
    8476:	a91d      	add	r1, sp, #116	; 0x74
    8478:	4648      	mov	r0, r9
    847a:	f7fe ffe6 	bl	744a <mpi_montmul.isra.0>
    for( i = 0; i < nbits; i++ )
    847e:	9b03      	ldr	r3, [sp, #12]
    8480:	3301      	adds	r3, #1
    8482:	9303      	str	r3, [sp, #12]
    8484:	e6da      	b.n	823c <mbedtls_mpi_exp_mod+0x202>
        MBEDTLS_MPI_CHK( mbedtls_mpi_safe_cond_assign( R, &T[i],
    8486:	4604      	mov	r4, r0
    8488:	e6fe      	b.n	8288 <mbedtls_mpi_exp_mod+0x24e>
        mbedtls_mpi_free( &W[i] );
    848a:	ab1a      	add	r3, sp, #104	; 0x68
    848c:	fb07 3005 	mla	r0, r7, r5, r3
    8490:	f7ff f855 	bl	753e <mbedtls_mpi_free>
    for( i = ( one << ( wsize - 1 ) ); i < ( one << wsize ); i++ )
    8494:	3501      	adds	r5, #1
    8496:	e700      	b.n	829a <mbedtls_mpi_exp_mod+0x260>
        return( MBEDTLS_ERR_MPI_BAD_INPUT_DATA );
    8498:	f06f 0403 	mvn.w	r4, #3
    849c:	e713      	b.n	82c6 <mbedtls_mpi_exp_mod+0x28c>

0000849e <platform_calloc_uninit>:
}
    849e:	2000      	movs	r0, #0
    84a0:	4770      	bx	lr

000084a2 <platform_exit_uninit>:
 * Make dummy function to prevent NULL pointer dereferences
 */
static void platform_exit_uninit( int status )
{
    ((void) status);
}
    84a2:	4770      	bx	lr

000084a4 <platform_free_uninit>:
    84a4:	4770      	bx	lr

000084a6 <mbedtls_rsa_import>:
{
    84a6:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    84aa:	4605      	mov	r5, r0
    84ac:	e9dd 7608 	ldrd	r7, r6, [sp, #32]
    84b0:	4691      	mov	r9, r2
    84b2:	4698      	mov	r8, r3
    if( ( N != NULL && ( ret = mbedtls_mpi_copy( &ctx->N, N ) ) != 0 ) ||
    84b4:	460c      	mov	r4, r1
    84b6:	b979      	cbnz	r1, 84d8 <mbedtls_rsa_import+0x32>
    84b8:	f1b9 0f00 	cmp.w	r9, #0
    84bc:	d115      	bne.n	84ea <mbedtls_rsa_import+0x44>
        ( P != NULL && ( ret = mbedtls_mpi_copy( &ctx->P, P ) ) != 0 ) ||
    84be:	f1b8 0f00 	cmp.w	r8, #0
    84c2:	d11a      	bne.n	84fa <mbedtls_rsa_import+0x54>
        ( Q != NULL && ( ret = mbedtls_mpi_copy( &ctx->Q, Q ) ) != 0 ) ||
    84c4:	bb0f      	cbnz	r7, 850a <mbedtls_rsa_import+0x64>
        ( D != NULL && ( ret = mbedtls_mpi_copy( &ctx->D, D ) ) != 0 ) ||
    84c6:	bb46      	cbnz	r6, 851a <mbedtls_rsa_import+0x74>
    if( N != NULL )
    84c8:	b37c      	cbz	r4, 852a <mbedtls_rsa_import+0x84>
        ctx->len = mbedtls_mpi_size( &ctx->N );
    84ca:	f105 0008 	add.w	r0, r5, #8
    84ce:	f7ff f930 	bl	7732 <mbedtls_mpi_size>
    84d2:	6068      	str	r0, [r5, #4]
    return( 0 );
    84d4:	2000      	movs	r0, #0
    84d6:	e006      	b.n	84e6 <mbedtls_rsa_import+0x40>
    if( ( N != NULL && ( ret = mbedtls_mpi_copy( &ctx->N, N ) ) != 0 ) ||
    84d8:	3008      	adds	r0, #8
    84da:	f7ff f883 	bl	75e4 <mbedtls_mpi_copy>
    84de:	2800      	cmp	r0, #0
    84e0:	d0ea      	beq.n	84b8 <mbedtls_rsa_import+0x12>
    84e2:	f5a0 4081 	sub.w	r0, r0, #16512	; 0x4080
}
    84e6:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
        ( P != NULL && ( ret = mbedtls_mpi_copy( &ctx->P, P ) ) != 0 ) ||
    84ea:	4649      	mov	r1, r9
    84ec:	f105 002c 	add.w	r0, r5, #44	; 0x2c
    84f0:	f7ff f878 	bl	75e4 <mbedtls_mpi_copy>
    84f4:	2800      	cmp	r0, #0
    84f6:	d0e2      	beq.n	84be <mbedtls_rsa_import+0x18>
    84f8:	e7f3      	b.n	84e2 <mbedtls_rsa_import+0x3c>
        ( Q != NULL && ( ret = mbedtls_mpi_copy( &ctx->Q, Q ) ) != 0 ) ||
    84fa:	4641      	mov	r1, r8
    84fc:	f105 0038 	add.w	r0, r5, #56	; 0x38
    8500:	f7ff f870 	bl	75e4 <mbedtls_mpi_copy>
    8504:	2800      	cmp	r0, #0
    8506:	d0dd      	beq.n	84c4 <mbedtls_rsa_import+0x1e>
    8508:	e7eb      	b.n	84e2 <mbedtls_rsa_import+0x3c>
        ( D != NULL && ( ret = mbedtls_mpi_copy( &ctx->D, D ) ) != 0 ) ||
    850a:	4639      	mov	r1, r7
    850c:	f105 0020 	add.w	r0, r5, #32
    8510:	f7ff f868 	bl	75e4 <mbedtls_mpi_copy>
    8514:	2800      	cmp	r0, #0
    8516:	d0d6      	beq.n	84c6 <mbedtls_rsa_import+0x20>
    8518:	e7e3      	b.n	84e2 <mbedtls_rsa_import+0x3c>
        ( E != NULL && ( ret = mbedtls_mpi_copy( &ctx->E, E ) ) != 0 ) )
    851a:	4631      	mov	r1, r6
    851c:	f105 0014 	add.w	r0, r5, #20
    8520:	f7ff f860 	bl	75e4 <mbedtls_mpi_copy>
    8524:	2800      	cmp	r0, #0
    8526:	d0cf      	beq.n	84c8 <mbedtls_rsa_import+0x22>
    8528:	e7db      	b.n	84e2 <mbedtls_rsa_import+0x3c>
    return( 0 );
    852a:	4620      	mov	r0, r4
    852c:	e7db      	b.n	84e6 <mbedtls_rsa_import+0x40>

0000852e <mbedtls_rsa_init>:
{
    852e:	b510      	push	{r4, lr}
    memset( ctx, 0, sizeof( mbedtls_rsa_context ) );
    8530:	22ac      	movs	r2, #172	; 0xac
    8532:	2100      	movs	r1, #0
{
    8534:	4604      	mov	r4, r0
    memset( ctx, 0, sizeof( mbedtls_rsa_context ) );
    8536:	f7fe f8a4 	bl	6682 <memset>
    ctx->padding = MBEDTLS_RSA_PKCS_V15;
    853a:	2300      	movs	r3, #0
    ctx->hash_id = MBEDTLS_MD_NONE;
    853c:	e9c4 3329 	strd	r3, r3, [r4, #164]	; 0xa4
}
    8540:	bd10      	pop	{r4, pc}

00008542 <mbedtls_rsa_free>:

/*
 * Free the components of an RSA key
 */
void mbedtls_rsa_free( mbedtls_rsa_context *ctx )
{
    8542:	b510      	push	{r4, lr}
    if( ctx == NULL )
    8544:	4604      	mov	r4, r0
    8546:	b3a0      	cbz	r0, 85b2 <mbedtls_rsa_free+0x70>
        return;

    mbedtls_mpi_free( &ctx->Vi );
    8548:	308c      	adds	r0, #140	; 0x8c
    854a:	f7fe fff8 	bl	753e <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->Vf );
    854e:	f104 0098 	add.w	r0, r4, #152	; 0x98
    8552:	f7fe fff4 	bl	753e <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->RN );
    8556:	f104 0068 	add.w	r0, r4, #104	; 0x68
    855a:	f7fe fff0 	bl	753e <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->D  );
    855e:	f104 0020 	add.w	r0, r4, #32
    8562:	f7fe ffec 	bl	753e <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->Q  );
    8566:	f104 0038 	add.w	r0, r4, #56	; 0x38
    856a:	f7fe ffe8 	bl	753e <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->P  );
    856e:	f104 002c 	add.w	r0, r4, #44	; 0x2c
    8572:	f7fe ffe4 	bl	753e <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->E  );
    8576:	f104 0014 	add.w	r0, r4, #20
    857a:	f7fe ffe0 	bl	753e <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->N  );
    857e:	f104 0008 	add.w	r0, r4, #8
    8582:	f7fe ffdc 	bl	753e <mbedtls_mpi_free>

#if !defined(MBEDTLS_RSA_NO_CRT)
    mbedtls_mpi_free( &ctx->RQ );
    8586:	f104 0080 	add.w	r0, r4, #128	; 0x80
    858a:	f7fe ffd8 	bl	753e <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->RP );
    858e:	f104 0074 	add.w	r0, r4, #116	; 0x74
    8592:	f7fe ffd4 	bl	753e <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->QP );
    8596:	f104 005c 	add.w	r0, r4, #92	; 0x5c
    859a:	f7fe ffd0 	bl	753e <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->DQ );
    859e:	f104 0050 	add.w	r0, r4, #80	; 0x50
    85a2:	f7fe ffcc 	bl	753e <mbedtls_mpi_free>
    mbedtls_mpi_free( &ctx->DP );
    85a6:	f104 0044 	add.w	r0, r4, #68	; 0x44
    {
        mbedtls_mutex_free( &ctx->mutex );
        ctx->ver = 0;
    }
#endif
}
    85aa:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    mbedtls_mpi_free( &ctx->DP );
    85ae:	f7fe bfc6 	b.w	753e <mbedtls_mpi_free>
}
    85b2:	bd10      	pop	{r4, pc}

000085b4 <mbedtls_sha256_init>:
    memset( ctx, 0, sizeof( mbedtls_sha256_context ) );
    85b4:	226c      	movs	r2, #108	; 0x6c
    85b6:	2100      	movs	r1, #0
    85b8:	f7fe b863 	b.w	6682 <memset>

000085bc <mbedtls_sha256_update>:
 * SHA-256 process buffer
 */
int mbedtls_sha256_update( mbedtls_sha256_context *ctx,
                               const unsigned char *input,
                               size_t ilen )
{
    85bc:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    85c0:	4605      	mov	r5, r0
    85c2:	460e      	mov	r6, r1
    uint32_t left;

    SHA256_VALIDATE_RET( ctx != NULL );
    SHA256_VALIDATE_RET( ilen == 0 || input != NULL );

    if( ilen == 0 )
    85c4:	4614      	mov	r4, r2
    85c6:	b912      	cbnz	r2, 85ce <mbedtls_sha256_update+0x12>
    }

    if( ilen > 0 )
        memcpy( (void *) (ctx->buffer + left), input, ilen );

    return( 0 );
    85c8:	2000      	movs	r0, #0
}
    85ca:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
    left = ctx->total[0] & 0x3F;
    85ce:	6803      	ldr	r3, [r0, #0]
    85d0:	f003 073f 	and.w	r7, r3, #63	; 0x3f
    ctx->total[0] += (uint32_t) ilen;
    85d4:	18d3      	adds	r3, r2, r3
    85d6:	6003      	str	r3, [r0, #0]
        ctx->total[1]++;
    85d8:	bf22      	ittt	cs
    85da:	6843      	ldrcs	r3, [r0, #4]
    85dc:	3301      	addcs	r3, #1
    85de:	6043      	strcs	r3, [r0, #4]
    if( left && ilen >= fill )
    85e0:	b1a7      	cbz	r7, 860c <mbedtls_sha256_update+0x50>
    fill = 64 - left;
    85e2:	f1c7 0940 	rsb	r9, r7, #64	; 0x40
    if( left && ilen >= fill )
    85e6:	454a      	cmp	r2, r9
    85e8:	d310      	bcc.n	860c <mbedtls_sha256_update+0x50>
        memcpy( (void *) (ctx->buffer + left), input, fill );
    85ea:	f100 0828 	add.w	r8, r0, #40	; 0x28
    85ee:	464a      	mov	r2, r9
    85f0:	eb08 0007 	add.w	r0, r8, r7
    85f4:	f7fe f83a 	bl	666c <memcpy>
        if( ( ret = mbedtls_internal_sha256_process( ctx, ctx->buffer ) ) != 0 )
    85f8:	4641      	mov	r1, r8
    85fa:	4628      	mov	r0, r5
    85fc:	f7fc f87e 	bl	46fc <mbedtls_internal_sha256_process>
    8600:	2800      	cmp	r0, #0
    8602:	d1e2      	bne.n	85ca <mbedtls_sha256_update+0xe>
        ilen  -= fill;
    8604:	443c      	add	r4, r7
        input += fill;
    8606:	444e      	add	r6, r9
        ilen  -= fill;
    8608:	3c40      	subs	r4, #64	; 0x40
        left = 0;
    860a:	4607      	mov	r7, r0
    860c:	4426      	add	r6, r4
    860e:	e005      	b.n	861c <mbedtls_sha256_update+0x60>
        if( ( ret = mbedtls_internal_sha256_process( ctx, input ) ) != 0 )
    8610:	4628      	mov	r0, r5
    8612:	f7fc f873 	bl	46fc <mbedtls_internal_sha256_process>
    8616:	2800      	cmp	r0, #0
    8618:	d1d7      	bne.n	85ca <mbedtls_sha256_update+0xe>
        ilen  -= 64;
    861a:	3c40      	subs	r4, #64	; 0x40
    while( ilen >= 64 )
    861c:	2c3f      	cmp	r4, #63	; 0x3f
    861e:	eba6 0104 	sub.w	r1, r6, r4
    8622:	d8f5      	bhi.n	8610 <mbedtls_sha256_update+0x54>
    if( ilen > 0 )
    8624:	2c00      	cmp	r4, #0
    8626:	d0cf      	beq.n	85c8 <mbedtls_sha256_update+0xc>
        memcpy( (void *) (ctx->buffer + left), input, ilen );
    8628:	f105 0028 	add.w	r0, r5, #40	; 0x28
    862c:	4622      	mov	r2, r4
    862e:	4438      	add	r0, r7
    8630:	f7fe f81c 	bl	666c <memcpy>
    8634:	e7c8      	b.n	85c8 <mbedtls_sha256_update+0xc>

00008636 <mbedtls_sha256_finish>:
    SHA256_VALIDATE_RET( (unsigned char *)output != NULL );

    /*
     * Add padding: 0x80 then 0x00 until 8 bytes remain for the length
     */
    used = ctx->total[0] & 0x3F;
    8636:	6803      	ldr	r3, [r0, #0]
    8638:	f003 033f 	and.w	r3, r3, #63	; 0x3f

    ctx->buffer[used++] = 0x80;
    863c:	1c5a      	adds	r2, r3, #1
    863e:	4403      	add	r3, r0
{
    8640:	b570      	push	{r4, r5, r6, lr}

    if( used <= 56 )
    8642:	2a38      	cmp	r2, #56	; 0x38
{
    8644:	460d      	mov	r5, r1
    8646:	f100 0628 	add.w	r6, r0, #40	; 0x28
    ctx->buffer[used++] = 0x80;
    864a:	f04f 0180 	mov.w	r1, #128	; 0x80
{
    864e:	4604      	mov	r4, r0
    ctx->buffer[used++] = 0x80;
    8650:	f883 1028 	strb.w	r1, [r3, #40]	; 0x28
    if( used <= 56 )
    8654:	eb06 0002 	add.w	r0, r6, r2
    8658:	d861      	bhi.n	871e <mbedtls_sha256_finish+0xe8>
    {
        /* Enough room for padding + length in current block */
        memset( ctx->buffer + used, 0, 56 - used );
    865a:	f1c2 0238 	rsb	r2, r2, #56	; 0x38
    865e:	2100      	movs	r1, #0
        memset( ctx->buffer + used, 0, 64 - used );

        if( ( ret = mbedtls_internal_sha256_process( ctx, ctx->buffer ) ) != 0 )
            return( ret );

        memset( ctx->buffer, 0, 56 );
    8660:	f7fe f80f 	bl	6682 <memset>

    /*
     * Add message length
     */
    high = ( ctx->total[0] >> 29 )
         | ( ctx->total[1] <<  3 );
    8664:	e9d4 3100 	ldrd	r3, r1, [r4]
    high = ( ctx->total[0] >> 29 )
    8668:	0f5a      	lsrs	r2, r3, #29
    866a:	ea42 02c1 	orr.w	r2, r2, r1, lsl #3
    low  = ( ctx->total[0] <<  3 );
    866e:	00db      	lsls	r3, r3, #3
    8670:	ba12      	rev	r2, r2
    8672:	ba1b      	rev	r3, r3

    PUT_UINT32_BE( high, ctx->buffer, 56 );
    8674:	6622      	str	r2, [r4, #96]	; 0x60
    PUT_UINT32_BE( low,  ctx->buffer, 60 );
    8676:	6663      	str	r3, [r4, #100]	; 0x64

    if( ( ret = mbedtls_internal_sha256_process( ctx, ctx->buffer ) ) != 0 )
    8678:	4631      	mov	r1, r6
    867a:	4620      	mov	r0, r4
    867c:	f7fc f83e 	bl	46fc <mbedtls_internal_sha256_process>
    8680:	2800      	cmp	r0, #0
    8682:	d14b      	bne.n	871c <mbedtls_sha256_finish+0xe6>
        return( ret );

    /*
     * Output final state
     */
    PUT_UINT32_BE( ctx->state[0], output,  0 );
    8684:	7ae3      	ldrb	r3, [r4, #11]
    8686:	702b      	strb	r3, [r5, #0]
    8688:	8963      	ldrh	r3, [r4, #10]
    868a:	706b      	strb	r3, [r5, #1]
    868c:	68a3      	ldr	r3, [r4, #8]
    868e:	0a1b      	lsrs	r3, r3, #8
    8690:	70ab      	strb	r3, [r5, #2]
    8692:	68a3      	ldr	r3, [r4, #8]
    8694:	70eb      	strb	r3, [r5, #3]
    PUT_UINT32_BE( ctx->state[1], output,  4 );
    8696:	7be3      	ldrb	r3, [r4, #15]
    8698:	712b      	strb	r3, [r5, #4]
    869a:	89e3      	ldrh	r3, [r4, #14]
    869c:	716b      	strb	r3, [r5, #5]
    869e:	68e3      	ldr	r3, [r4, #12]
    86a0:	0a1b      	lsrs	r3, r3, #8
    86a2:	71ab      	strb	r3, [r5, #6]
    86a4:	68e3      	ldr	r3, [r4, #12]
    86a6:	71eb      	strb	r3, [r5, #7]
    PUT_UINT32_BE( ctx->state[2], output,  8 );
    86a8:	7ce3      	ldrb	r3, [r4, #19]
    86aa:	722b      	strb	r3, [r5, #8]
    86ac:	8a63      	ldrh	r3, [r4, #18]
    86ae:	726b      	strb	r3, [r5, #9]
    86b0:	6923      	ldr	r3, [r4, #16]
    86b2:	0a1b      	lsrs	r3, r3, #8
    86b4:	72ab      	strb	r3, [r5, #10]
    86b6:	6923      	ldr	r3, [r4, #16]
    86b8:	72eb      	strb	r3, [r5, #11]
    PUT_UINT32_BE( ctx->state[3], output, 12 );
    86ba:	7de3      	ldrb	r3, [r4, #23]
    86bc:	732b      	strb	r3, [r5, #12]
    86be:	8ae3      	ldrh	r3, [r4, #22]
    86c0:	736b      	strb	r3, [r5, #13]
    86c2:	6963      	ldr	r3, [r4, #20]
    86c4:	0a1b      	lsrs	r3, r3, #8
    86c6:	73ab      	strb	r3, [r5, #14]
    86c8:	6963      	ldr	r3, [r4, #20]
    86ca:	73eb      	strb	r3, [r5, #15]
    PUT_UINT32_BE( ctx->state[4], output, 16 );
    86cc:	7ee3      	ldrb	r3, [r4, #27]
    86ce:	742b      	strb	r3, [r5, #16]
    86d0:	8b63      	ldrh	r3, [r4, #26]
    86d2:	746b      	strb	r3, [r5, #17]
    86d4:	69a3      	ldr	r3, [r4, #24]
    86d6:	0a1b      	lsrs	r3, r3, #8
    86d8:	74ab      	strb	r3, [r5, #18]
    86da:	69a3      	ldr	r3, [r4, #24]
    86dc:	74eb      	strb	r3, [r5, #19]
    PUT_UINT32_BE( ctx->state[5], output, 20 );
    86de:	7fe3      	ldrb	r3, [r4, #31]
    86e0:	752b      	strb	r3, [r5, #20]
    86e2:	8be3      	ldrh	r3, [r4, #30]
    86e4:	756b      	strb	r3, [r5, #21]
    86e6:	69e3      	ldr	r3, [r4, #28]
    86e8:	0a1b      	lsrs	r3, r3, #8
    86ea:	75ab      	strb	r3, [r5, #22]
    86ec:	69e3      	ldr	r3, [r4, #28]
    86ee:	75eb      	strb	r3, [r5, #23]
    PUT_UINT32_BE( ctx->state[6], output, 24 );
    86f0:	f894 3023 	ldrb.w	r3, [r4, #35]	; 0x23
    86f4:	762b      	strb	r3, [r5, #24]
    86f6:	8c63      	ldrh	r3, [r4, #34]	; 0x22
    86f8:	766b      	strb	r3, [r5, #25]
    86fa:	6a23      	ldr	r3, [r4, #32]
    86fc:	0a1b      	lsrs	r3, r3, #8
    86fe:	76ab      	strb	r3, [r5, #26]
    8700:	6a23      	ldr	r3, [r4, #32]
    8702:	76eb      	strb	r3, [r5, #27]

#if defined(MBEDTLS_SHA224_C)
    if( ctx->is224 == 0 )
    8704:	6ea3      	ldr	r3, [r4, #104]	; 0x68
    8706:	b94b      	cbnz	r3, 871c <mbedtls_sha256_finish+0xe6>
#endif
        PUT_UINT32_BE( ctx->state[7], output, 28 );
    8708:	f894 3027 	ldrb.w	r3, [r4, #39]	; 0x27
    870c:	772b      	strb	r3, [r5, #28]
    870e:	8ce3      	ldrh	r3, [r4, #38]	; 0x26
    8710:	776b      	strb	r3, [r5, #29]
    8712:	6a63      	ldr	r3, [r4, #36]	; 0x24
    8714:	0a1b      	lsrs	r3, r3, #8
    8716:	77ab      	strb	r3, [r5, #30]
    8718:	6a63      	ldr	r3, [r4, #36]	; 0x24
    871a:	77eb      	strb	r3, [r5, #31]

    return( 0 );
}
    871c:	bd70      	pop	{r4, r5, r6, pc}
        memset( ctx->buffer + used, 0, 64 - used );
    871e:	2100      	movs	r1, #0
    8720:	f1c2 0240 	rsb	r2, r2, #64	; 0x40
    8724:	f7fd ffad 	bl	6682 <memset>
        if( ( ret = mbedtls_internal_sha256_process( ctx, ctx->buffer ) ) != 0 )
    8728:	4631      	mov	r1, r6
    872a:	4620      	mov	r0, r4
    872c:	f7fb ffe6 	bl	46fc <mbedtls_internal_sha256_process>
    8730:	2800      	cmp	r0, #0
    8732:	d1f3      	bne.n	871c <mbedtls_sha256_finish+0xe6>
        memset( ctx->buffer, 0, 56 );
    8734:	4601      	mov	r1, r0
    8736:	2238      	movs	r2, #56	; 0x38
    8738:	4630      	mov	r0, r6
    873a:	e791      	b.n	8660 <mbedtls_sha256_finish+0x2a>

0000873c <nrfx_isr>:
#include <nrfx.h>
#include <kernel.h>

void nrfx_isr(const void *irq_handler)
{
	((nrfx_irq_handler_t)irq_handler)();
    873c:	4700      	bx	r0

0000873e <nrfx_busy_wait>:
    873e:	f000 b896 	b.w	886e <z_impl_k_busy_wait>

00008742 <nrfx_clock_enable>:
{
    8742:	b508      	push	{r3, lr}
    priority = NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY;
#else
    #error "This code is not supposed to be compiled when neither POWER nor CLOCK is enabled."
#endif

    if (!NRFX_IRQ_IS_ENABLED(nrfx_get_irq_number(NRF_CLOCK)))
    8744:	2000      	movs	r0, #0
    8746:	f7fa f8af 	bl	28a8 <arch_irq_is_enabled>
    874a:	b918      	cbnz	r0, 8754 <nrfx_clock_enable+0x12>
}
    874c:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
    {
        NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(NRF_CLOCK), priority);
        NRFX_IRQ_ENABLE(nrfx_get_irq_number(NRF_CLOCK));
    8750:	f7fa b89a 	b.w	2888 <arch_irq_enable>
    8754:	bd08      	pop	{r3, pc}

00008756 <nrf_gpio_cfg_sense_set>:
    *p_pin = pin_number & 0x1F;
    8756:	f000 001f 	and.w	r0, r0, #31
    875a:	0080      	lsls	r0, r0, #2
    875c:	f100 40a0 	add.w	r0, r0, #1342177280	; 0x50000000
    uint32_t cnf = reg->PIN_CNF[pin_number];
    8760:	f8d0 3700 	ldr.w	r3, [r0, #1792]	; 0x700
    cnf &= ~to_update;
    8764:	f423 3340 	bic.w	r3, r3, #196608	; 0x30000
    cnf |= ((uint32_t)(p_dir   ? *p_dir   : 0) << GPIO_PIN_CNF_DIR_Pos)   |
    8768:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
    reg->PIN_CNF[pin_number] = cnf;
    876c:	f8c0 3700 	str.w	r3, [r0, #1792]	; 0x700
}
    8770:	4770      	bx	lr

00008772 <nrfx_nvmc_flash_size_get>:
    8772:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
    8776:	691a      	ldr	r2, [r3, #16]
NRF_STATIC_INLINE uint32_t nrf_ficr_codesize_get(NRF_FICR_Type const * p_reg)
{
#if defined(FICR_INFO_CODESIZE_CODESIZE_Msk)
    return p_reg->INFO.CODESIZE;
#else
    return p_reg->CODESIZE;
    8778:	6958      	ldr	r0, [r3, #20]
}

uint32_t nrfx_nvmc_flash_size_get(void)
{
    return flash_total_size_get();
}
    877a:	4350      	muls	r0, r2
    877c:	4770      	bx	lr

0000877e <nrfx_nvmc_flash_page_size_get>:
    return p_reg->CODEPAGESIZE;
    877e:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
    8782:	6918      	ldr	r0, [r3, #16]

uint32_t nrfx_nvmc_flash_page_size_get(void)
{
    return flash_page_size_get();
}
    8784:	4770      	bx	lr

00008786 <nrfx_nvmc_flash_page_count_get>:
    return p_reg->CODESIZE;
    8786:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
    878a:	6958      	ldr	r0, [r3, #20]

uint32_t nrfx_nvmc_flash_page_count_get(void)
{
    return flash_page_count_get();
}
    878c:	4770      	bx	lr

0000878e <_GetAvailWriteSpace>:
  RdOff = pRing->RdOff;
    878e:	6903      	ldr	r3, [r0, #16]
  WrOff = pRing->WrOff;
    8790:	68c1      	ldr	r1, [r0, #12]
  if (RdOff <= WrOff) {
    8792:	428b      	cmp	r3, r1
    r = pRing->SizeOfBuffer - 1u - WrOff + RdOff;
    8794:	bf9d      	ittte	ls
    8796:	6882      	ldrls	r2, [r0, #8]
    8798:	18d2      	addls	r2, r2, r3
    879a:	f102 32ff 	addls.w	r2, r2, #4294967295
    r = RdOff - WrOff - 1u;
    879e:	f103 33ff 	addhi.w	r3, r3, #4294967295
    r = pRing->SizeOfBuffer - 1u - WrOff + RdOff;
    87a2:	bf94      	ite	ls
    87a4:	1a50      	subls	r0, r2, r1
    r = RdOff - WrOff - 1u;
    87a6:	1a58      	subhi	r0, r3, r1
}
    87a8:	4770      	bx	lr

000087aa <_WriteNoCheck>:
static void _WriteNoCheck(SEGGER_RTT_BUFFER_UP* pRing, const char* pData, unsigned NumBytes) {
    87aa:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
  Rem = pRing->SizeOfBuffer - WrOff;
    87ae:	e9d0 9402 	ldrd	r9, r4, [r0, #8]
static void _WriteNoCheck(SEGGER_RTT_BUFFER_UP* pRing, const char* pData, unsigned NumBytes) {
    87b2:	4605      	mov	r5, r0
  Rem = pRing->SizeOfBuffer - WrOff;
    87b4:	eba9 0804 	sub.w	r8, r9, r4
  if (Rem > NumBytes) {
    87b8:	6840      	ldr	r0, [r0, #4]
    87ba:	4590      	cmp	r8, r2
    87bc:	4420      	add	r0, r4
static void _WriteNoCheck(SEGGER_RTT_BUFFER_UP* pRing, const char* pData, unsigned NumBytes) {
    87be:	460f      	mov	r7, r1
    87c0:	4414      	add	r4, r2
  if (Rem > NumBytes) {
    87c2:	d906      	bls.n	87d2 <_WriteNoCheck+0x28>
    SEGGER_RTT_MEMCPY((void*)pDst, pData + Rem, NumBytesAtOnce);
    87c4:	f7fd ff52 	bl	666c <memcpy>
    RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
    87c8:	f3bf 8f5f 	dmb	sy
    pRing->WrOff = NumBytesAtOnce;
    87cc:	60ec      	str	r4, [r5, #12]
}
    87ce:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
    SEGGER_RTT_MEMCPY((void*)pDst, pData, NumBytesAtOnce);
    87d2:	4642      	mov	r2, r8
    NumBytesAtOnce = NumBytes - Rem;
    87d4:	eba4 0409 	sub.w	r4, r4, r9
    SEGGER_RTT_MEMCPY((void*)pDst, pData, NumBytesAtOnce);
    87d8:	f7fd ff48 	bl	666c <memcpy>
    SEGGER_RTT_MEMCPY((void*)pDst, pData + Rem, NumBytesAtOnce);
    87dc:	6868      	ldr	r0, [r5, #4]
    87de:	4622      	mov	r2, r4
    87e0:	eb07 0108 	add.w	r1, r7, r8
    87e4:	e7ee      	b.n	87c4 <_WriteNoCheck+0x1a>

000087e6 <_WriteBlocking>:
static unsigned _WriteBlocking(SEGGER_RTT_BUFFER_UP* pRing, const char* pBuffer, unsigned NumBytes) {
    87e6:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
  WrOff = pRing->WrOff;
    87ea:	68c5      	ldr	r5, [r0, #12]
static unsigned _WriteBlocking(SEGGER_RTT_BUFFER_UP* pRing, const char* pBuffer, unsigned NumBytes) {
    87ec:	4606      	mov	r6, r0
    87ee:	4689      	mov	r9, r1
    87f0:	4617      	mov	r7, r2
  NumBytesWritten = 0u;
    87f2:	f04f 0800 	mov.w	r8, #0
    RdOff = pRing->RdOff;                         // May be changed by host (debug probe) in the meantime
    87f6:	6934      	ldr	r4, [r6, #16]
    if (RdOff > WrOff) {
    87f8:	68b3      	ldr	r3, [r6, #8]
    pDst = (pRing->pBuffer + WrOff) + SEGGER_RTT_UNCACHED_OFF;
    87fa:	6870      	ldr	r0, [r6, #4]
    if (RdOff > WrOff) {
    87fc:	42a5      	cmp	r5, r4
      NumBytesToWrite = pRing->SizeOfBuffer - (WrOff - RdOff + 1u);
    87fe:	bf28      	it	cs
    8800:	18e4      	addcs	r4, r4, r3
    8802:	3c01      	subs	r4, #1
    8804:	1b62      	subs	r2, r4, r5
    NumBytesToWrite = MIN(NumBytesToWrite, (pRing->SizeOfBuffer - WrOff));      // Number of bytes that can be written until buffer wrap-around
    8806:	1b5c      	subs	r4, r3, r5
    NumBytesToWrite = MIN(NumBytesToWrite, NumBytes);
    8808:	42bc      	cmp	r4, r7
    880a:	bf28      	it	cs
    880c:	463c      	movcs	r4, r7
    880e:	4294      	cmp	r4, r2
    8810:	bf28      	it	cs
    8812:	4614      	movcs	r4, r2
    SEGGER_RTT_MEMCPY((void*)pDst, pBuffer, NumBytesToWrite);
    8814:	4649      	mov	r1, r9
    8816:	4622      	mov	r2, r4
    8818:	4428      	add	r0, r5
    881a:	f7fd ff27 	bl	666c <memcpy>
    if (WrOff == pRing->SizeOfBuffer) {
    881e:	68b3      	ldr	r3, [r6, #8]
    WrOff           += NumBytesToWrite;
    8820:	4425      	add	r5, r4
    NumBytesWritten += NumBytesToWrite;
    8822:	44a0      	add	r8, r4
    pBuffer         += NumBytesToWrite;
    8824:	44a1      	add	r9, r4
    NumBytes        -= NumBytesToWrite;
    8826:	1b3f      	subs	r7, r7, r4
      WrOff = 0u;
    8828:	42ab      	cmp	r3, r5
    882a:	bf08      	it	eq
    882c:	2500      	moveq	r5, #0
    RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
    882e:	f3bf 8f5f 	dmb	sy
    pRing->WrOff = WrOff;
    8832:	60f5      	str	r5, [r6, #12]
  } while (NumBytes);
    8834:	2f00      	cmp	r7, #0
    8836:	d1de      	bne.n	87f6 <_WriteBlocking+0x10>
}
    8838:	4640      	mov	r0, r8
    883a:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}

0000883e <SEGGER_RTT_Init>:
*    Initializes the RTT Control Block.
*    Should be used in RAM targets, at start of the application.
*
*/
void SEGGER_RTT_Init (void) {
  _DoInit();
    883e:	f7fc bde1 	b.w	5404 <_DoInit>

00008842 <rtt_init>:
 */

K_MUTEX_DEFINE(rtt_term_mutex);

static int rtt_init(const struct device *unused)
{
    8842:	b508      	push	{r3, lr}
	ARG_UNUSED(unused);

	SEGGER_RTT_Init();
    8844:	f7ff fffb 	bl	883e <SEGGER_RTT_Init>

	return 0;
}
    8848:	2000      	movs	r0, #0
    884a:	bd08      	pop	{r3, pc}

0000884c <z_device_state_init>:
}
    884c:	4770      	bx	lr

0000884e <z_device_ready>:
{
	/*
	 * if an invalid device pointer is passed as argument, this call
	 * reports the `device` as not ready for usage.
	 */
	if (dev == NULL) {
    884e:	b138      	cbz	r0, 8860 <z_device_ready+0x12>
		return false;
	}

	return dev->state->initialized && (dev->state->init_res == 0U);
    8850:	68c3      	ldr	r3, [r0, #12]
    8852:	8818      	ldrh	r0, [r3, #0]
    8854:	f3c0 0008 	ubfx	r0, r0, #0, #9
    8858:	f5a0 7380 	sub.w	r3, r0, #256	; 0x100
    885c:	4258      	negs	r0, r3
    885e:	4158      	adcs	r0, r3
}
    8860:	4770      	bx	lr

00008862 <k_is_in_isr>:
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
    8862:	f3ef 8005 	mrs	r0, IPSR
}

bool k_is_in_isr(void)
{
	return arch_is_in_isr();
}
    8866:	3800      	subs	r0, #0
    8868:	bf18      	it	ne
    886a:	2001      	movne	r0, #1
    886c:	4770      	bx	lr

0000886e <z_impl_k_busy_wait>:
#endif

void z_impl_k_busy_wait(uint32_t usec_to_wait)
{
	SYS_PORT_TRACING_FUNC_ENTER(k_thread, busy_wait, usec_to_wait);
	if (usec_to_wait == 0U) {
    886e:	b108      	cbz	r0, 8874 <z_impl_k_busy_wait+0x6>
		if ((current_cycles - start_cycles) >= cycles_to_wait) {
			break;
		}
	}
#else
	arch_busy_wait(usec_to_wait);
    8870:	f7fa bbfa 	b.w	3068 <arch_busy_wait>
#endif /* CONFIG_ARCH_HAS_CUSTOM_BUSY_WAIT */
	SYS_PORT_TRACING_FUNC_EXIT(k_thread, busy_wait, usec_to_wait);
}
    8874:	4770      	bx	lr

00008876 <_OffsetAbsSyms>:

#include <gen_offset.h>

#include "offsets_aarch32.c"

GEN_ABS_SYM_END
    8876:	4770      	bx	lr

00008878 <z_arm_platform_init>:
	 */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
	ldr r0, =SystemInit
	bx r0
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	b SystemInit
    8878:	f7fc b81a 	b.w	48b0 <SystemInit>
