LCOV - code coverage report
Current view: top level - arch/arm/core/aarch32/cortex_m - irq_init.c (source / functions) Hit Total Coverage
Test: coverage.info Lines: 5 5 100.0 %
Date: 2022-08-18 11:36:24 Functions: 1 1 100.0 %
Legend: Lines: hit not hit | Branches: + taken - not taken # not executed Branches: 2 2 100.0 %

           Branch data     Line data    Source code
       1                 :            : /*
       2                 :            :  * Copyright (c) 2014 Wind River Systems, Inc.
       3                 :            :  *
       4                 :            :  * SPDX-License-Identifier: Apache-2.0
       5                 :            :  */
       6                 :            : 
       7                 :            : /**
       8                 :            :  * @file
       9                 :            :  * @brief ARM Cortex-M interrupt initialization
      10                 :            :  *
      11                 :            :  */
      12                 :            : 
      13                 :            : #include <arch/cpu.h>
      14                 :            : #include <arch/arm/aarch32/cortex_m/cmsis.h>
      15                 :            : 
      16                 :            : /**
      17                 :            :  *
      18                 :            :  * @brief Initialize interrupts
      19                 :            :  *
      20                 :            :  * Ensures all interrupts have their priority set to _EXC_IRQ_DEFAULT_PRIO and
      21                 :            :  * not 0, which they have it set to when coming out of reset. This ensures that
      22                 :            :  * interrupt locking via BASEPRI works as expected.
      23                 :            :  *
      24                 :            :  */
      25                 :            : 
      26                 :          1 : void z_arm_interrupt_init(void)
      27                 :            : {
      28                 :          1 :         int irq = 0;
      29                 :            : 
      30         [ +  + ]:         70 :         for (; irq < CONFIG_NUM_IRQS; irq++) {
      31                 :         69 :                 NVIC_SetPriority((IRQn_Type)irq, _IRQ_PRIO_OFFSET);
      32                 :            :         }
      33                 :          1 : }

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