LCOV - code coverage report
Current view: top level - home/jason/ncs-2.0.0/modules/hal/nordic/nrfx/hal - nrf_dppi.h (source / functions) Hit Total Coverage
Test: coverage.info Lines: 3 23 13.0 %
Date: 2022-08-18 11:36:24 Functions: 1 7 14.3 %
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           Branch data     Line data    Source code
       1                 :            : /*
       2                 :            :  * Copyright (c) 2018 - 2022, Nordic Semiconductor ASA
       3                 :            :  * All rights reserved.
       4                 :            :  *
       5                 :            :  * SPDX-License-Identifier: BSD-3-Clause
       6                 :            :  *
       7                 :            :  * Redistribution and use in source and binary forms, with or without
       8                 :            :  * modification, are permitted provided that the following conditions are met:
       9                 :            :  *
      10                 :            :  * 1. Redistributions of source code must retain the above copyright notice, this
      11                 :            :  *    list of conditions and the following disclaimer.
      12                 :            :  *
      13                 :            :  * 2. Redistributions in binary form must reproduce the above copyright
      14                 :            :  *    notice, this list of conditions and the following disclaimer in the
      15                 :            :  *    documentation and/or other materials provided with the distribution.
      16                 :            :  *
      17                 :            :  * 3. Neither the name of the copyright holder nor the names of its
      18                 :            :  *    contributors may be used to endorse or promote products derived from this
      19                 :            :  *    software without specific prior written permission.
      20                 :            :  *
      21                 :            :  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
      22                 :            :  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
      23                 :            :  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
      24                 :            :  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
      25                 :            :  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
      26                 :            :  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
      27                 :            :  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
      28                 :            :  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
      29                 :            :  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
      30                 :            :  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
      31                 :            :  * POSSIBILITY OF SUCH DAMAGE.
      32                 :            :  */
      33                 :            : 
      34                 :            : #ifndef NRF_DPPI_H__
      35                 :            : #define NRF_DPPI_H__
      36                 :            : 
      37                 :            : #include <nrfx.h>
      38                 :            : 
      39                 :            : #ifdef __cplusplus
      40                 :            : extern "C" {
      41                 :            : #endif
      42                 :            : 
      43                 :            : /**
      44                 :            :  * @defgroup nrf_dppi_hal DPPI Controller HAL
      45                 :            :  * @{
      46                 :            :  * @ingroup nrf_dppi
      47                 :            :  * @brief   Hardware access layer for managing the Distributed Programmable Peripheral
      48                 :            :  *          Interconnect Controller (DPPIC).
      49                 :            :  */
      50                 :            : 
      51                 :            : /** @brief DPPI channel groups. */
      52                 :            : typedef enum
      53                 :            : {
      54                 :            :     NRF_DPPI_CHANNEL_GROUP0 = 0, /**< Channel group 0. */
      55                 :            :     NRF_DPPI_CHANNEL_GROUP1 = 1, /**< Channel group 1. */
      56                 :            :     NRF_DPPI_CHANNEL_GROUP2 = 2, /**< Channel group 2. */
      57                 :            :     NRF_DPPI_CHANNEL_GROUP3 = 3, /**< Channel group 3. */
      58                 :            :     NRF_DPPI_CHANNEL_GROUP4 = 4, /**< Channel group 4. */
      59                 :            :     NRF_DPPI_CHANNEL_GROUP5 = 5  /**< Channel group 5. */
      60                 :            : } nrf_dppi_channel_group_t;
      61                 :            : 
      62                 :            : /** @brief DPPI tasks. */
      63                 :            : typedef enum
      64                 :            : {
      65                 :            :     NRF_DPPI_TASK_CHG0_EN  = offsetof(NRF_DPPIC_Type, TASKS_CHG[0].EN),  /**< Enable channel group 0. */
      66                 :            :     NRF_DPPI_TASK_CHG0_DIS = offsetof(NRF_DPPIC_Type, TASKS_CHG[0].DIS), /**< Disable channel group 0. */
      67                 :            :     NRF_DPPI_TASK_CHG1_EN  = offsetof(NRF_DPPIC_Type, TASKS_CHG[1].EN),  /**< Enable channel group 1. */
      68                 :            :     NRF_DPPI_TASK_CHG1_DIS = offsetof(NRF_DPPIC_Type, TASKS_CHG[1].DIS), /**< Disable channel group 1. */
      69                 :            :     NRF_DPPI_TASK_CHG2_EN  = offsetof(NRF_DPPIC_Type, TASKS_CHG[2].EN),  /**< Enable channel group 2. */
      70                 :            :     NRF_DPPI_TASK_CHG2_DIS = offsetof(NRF_DPPIC_Type, TASKS_CHG[2].DIS), /**< Disable channel group 2. */
      71                 :            :     NRF_DPPI_TASK_CHG3_EN  = offsetof(NRF_DPPIC_Type, TASKS_CHG[3].EN),  /**< Enable channel group 3. */
      72                 :            :     NRF_DPPI_TASK_CHG3_DIS = offsetof(NRF_DPPIC_Type, TASKS_CHG[3].DIS), /**< Disable channel group 3. */
      73                 :            :     NRF_DPPI_TASK_CHG4_EN  = offsetof(NRF_DPPIC_Type, TASKS_CHG[4].EN),  /**< Enable channel group 4. */
      74                 :            :     NRF_DPPI_TASK_CHG4_DIS = offsetof(NRF_DPPIC_Type, TASKS_CHG[4].DIS), /**< Disable channel group 4. */
      75                 :            :     NRF_DPPI_TASK_CHG5_EN  = offsetof(NRF_DPPIC_Type, TASKS_CHG[5].EN),  /**< Enable channel group 5. */
      76                 :            :     NRF_DPPI_TASK_CHG5_DIS = offsetof(NRF_DPPIC_Type, TASKS_CHG[5].DIS)  /**< Disable channel group 5. */
      77                 :            : } nrf_dppi_task_t;
      78                 :            : 
      79                 :            : /**
      80                 :            :  * @brief Function for activating a DPPI task.
      81                 :            :  *
      82                 :            :  * @param[in] p_reg     Pointer to the structure of registers of the peripheral.
      83                 :            :  * @param[in] dppi_task Task to be activated.
      84                 :            :  */
      85                 :            : NRF_STATIC_INLINE void nrf_dppi_task_trigger(NRF_DPPIC_Type * p_reg, nrf_dppi_task_t dppi_task);
      86                 :            : 
      87                 :            : /**
      88                 :            :  * @brief Function for getting the address of the specified DPPI task register.
      89                 :            :  *
      90                 :            :  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
      91                 :            :  * @param[in] task  Requested task.
      92                 :            :  *
      93                 :            :  * @return Address of the specified task register.
      94                 :            :  */
      95                 :            : NRF_STATIC_INLINE uint32_t nrf_dppi_task_address_get(NRF_DPPIC_Type const * p_reg,
      96                 :            :                                                      nrf_dppi_task_t        task);
      97                 :            : 
      98                 :            : /**
      99                 :            :  * @brief Function for checking the state of a specific DPPI channel.
     100                 :            :  *
     101                 :            :  * @param[in] p_reg   Pointer to the structure of registers of the peripheral.
     102                 :            :  * @param[in] channel Channel to be checked.
     103                 :            :  *
     104                 :            :  * @retval true  The channel is enabled.
     105                 :            :  * @retval false The channel is not enabled.
     106                 :            :  */
     107                 :            : NRF_STATIC_INLINE bool nrf_dppi_channel_check(NRF_DPPIC_Type const * p_reg, uint8_t channel);
     108                 :            : 
     109                 :            : /**
     110                 :            :  * @brief Function for enabling multiple DPPI channels.
     111                 :            :  *
     112                 :            :  * The bits in @c mask value correspond to particular channels. It means that
     113                 :            :  * writing 1 to bit 0 enables channel 0, writing 1 to bit 1 enables channel 1 etc.
     114                 :            :  *
     115                 :            :  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
     116                 :            :  * @param[in] mask  Channel mask.
     117                 :            :  */
     118                 :            : NRF_STATIC_INLINE void nrf_dppi_channels_enable(NRF_DPPIC_Type * p_reg, uint32_t mask);
     119                 :            : 
     120                 :            : /**
     121                 :            :  * @brief Function for disabling multiple DPPI channels.
     122                 :            :  *
     123                 :            :  * The bits in @c mask value correspond to particular channels. It means that
     124                 :            :  * writing 1 to bit 0 disables channel 0, writing 1 to bit 1 disables channel 1 etc.
     125                 :            :  *
     126                 :            :  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
     127                 :            :  * @param[in] mask  Channel mask.
     128                 :            :  */
     129                 :            : NRF_STATIC_INLINE void nrf_dppi_channels_disable(NRF_DPPIC_Type * p_reg, uint32_t mask);
     130                 :            : 
     131                 :            : /**
     132                 :            :  * @brief Function for disabling all DPPI channels.
     133                 :            :  *
     134                 :            :  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
     135                 :            :  */
     136                 :            : NRF_STATIC_INLINE void nrf_dppi_channels_disable_all(NRF_DPPIC_Type * p_reg);
     137                 :            : 
     138                 :            : /**
     139                 :            :  * @brief Function for setting the subscribe configuration for a given
     140                 :            :  *        DPPI task.
     141                 :            :  *
     142                 :            :  * @warning After setting the subscription for a given task, channel group configuration
     143                 :            :  *          associated with this task cannot be modified until @ref nrf_dppi_subscribe_clear is used.
     144                 :            :  *
     145                 :            :  * @param[in] p_reg   Pointer to the structure of registers of the peripheral.
     146                 :            :  * @param[in] task    Task for which to set the configuration.
     147                 :            :  * @param[in] channel Channel through which to subscribe events.
     148                 :            :  */
     149                 :            : NRF_STATIC_INLINE void nrf_dppi_subscribe_set(NRF_DPPIC_Type * p_reg,
     150                 :            :                                               nrf_dppi_task_t  task,
     151                 :            :                                               uint8_t          channel);
     152                 :            : 
     153                 :            : /**
     154                 :            :  * @brief Function for clearing the subscribe configuration for a given
     155                 :            :  *        DPPI task.
     156                 :            :  *
     157                 :            :  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
     158                 :            :  * @param[in] task  Task for which to clear the configuration.
     159                 :            :  */
     160                 :            : NRF_STATIC_INLINE void nrf_dppi_subscribe_clear(NRF_DPPIC_Type * p_reg, nrf_dppi_task_t task);
     161                 :            : 
     162                 :            : /**
     163                 :            :  * @brief Function for including multiple DPPI channels in a channel group.
     164                 :            :  *
     165                 :            :  * @details This function adds all specified channels to the group.
     166                 :            :  * The bits in @p channel_mask value correspond to particular channels. It means that
     167                 :            :  * writing 1 to bit 0 includes channel 0, writing 1 to bit 1 includes channel 1 etc.
     168                 :            :  *
     169                 :            :  * @warning Channel group configuration can be modified only if subscriptions for tasks
     170                 :            :  *          associated with this group are disabled.
     171                 :            :  *
     172                 :            :  * @param[in] p_reg         Pointer to the structure of registers of the peripheral.
     173                 :            :  * @param[in] channel_mask  Channels to be included in the group.
     174                 :            :  * @param[in] channel_group Channel group.
     175                 :            :  */
     176                 :            : NRF_STATIC_INLINE void nrf_dppi_channels_include_in_group(NRF_DPPIC_Type *         p_reg,
     177                 :            :                                                           uint32_t                 channel_mask,
     178                 :            :                                                           nrf_dppi_channel_group_t channel_group);
     179                 :            : 
     180                 :            : /**
     181                 :            :  * @brief Function for removing multiple DPPI channels from a channel group.
     182                 :            :  *
     183                 :            :  * @details This function removes all specified channels from the group.
     184                 :            :  * The bits in @c channel_mask value correspond to particular channels. It means that
     185                 :            :  * writing 1 to bit 0 removes channel 0, writing 1 to bit 1 removes channel 1 etc.
     186                 :            :  *
     187                 :            :  * @warning Channel group configuration can be modified only if subscriptions for tasks
     188                 :            :  *          associated with this group are disabled.
     189                 :            :  *
     190                 :            :  * @param[in] p_reg         Pointer to the structure of registers of the peripheral.
     191                 :            :  * @param[in] channel_mask  Channels to be removed from the group.
     192                 :            :  * @param[in] channel_group Channel group.
     193                 :            :  */
     194                 :            : NRF_STATIC_INLINE void nrf_dppi_channels_remove_from_group(NRF_DPPIC_Type *         p_reg,
     195                 :            :                                                            uint32_t                 channel_mask,
     196                 :            :                                                            nrf_dppi_channel_group_t channel_group);
     197                 :            : 
     198                 :            : /**
     199                 :            :  * @brief Function for removing all DPPI channels from a channel group.
     200                 :            :  *
     201                 :            :  * @warning Channel group configuration can be modified only if subscriptions for tasks
     202                 :            :  *          associated with this group are disabled.
     203                 :            :  *
     204                 :            :  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
     205                 :            :  * @param[in] group Channel group.
     206                 :            :  */
     207                 :            : NRF_STATIC_INLINE void nrf_dppi_group_clear(NRF_DPPIC_Type *         p_reg,
     208                 :            :                                             nrf_dppi_channel_group_t group);
     209                 :            : 
     210                 :            : /**
     211                 :            :  * @brief Function for enabling a channel group.
     212                 :            :  *
     213                 :            :  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
     214                 :            :  * @param[in] group Channel group.
     215                 :            :  */
     216                 :            : NRF_STATIC_INLINE void nrf_dppi_group_enable(NRF_DPPIC_Type *         p_reg,
     217                 :            :                                              nrf_dppi_channel_group_t group);
     218                 :            : 
     219                 :            : /**
     220                 :            :  * @brief Function for disabling a channel group.
     221                 :            :  *
     222                 :            :  * @param[in] p_reg Pointer to the structure of registers of the peripheral.
     223                 :            :  * @param[in] group Channel group.
     224                 :            :  */
     225                 :            : NRF_STATIC_INLINE void nrf_dppi_group_disable(NRF_DPPIC_Type *         p_reg,
     226                 :            :                                               nrf_dppi_channel_group_t group);
     227                 :            : 
     228                 :            : /**
     229                 :            :  * @brief Function for getting the ENABLE task associated with the specified channel group.
     230                 :            :  *
     231                 :            :  * @param[in] index Channel group index.
     232                 :            :  *
     233                 :            :  * @return Requested ENABLE task.
     234                 :            :  */
     235                 :            : NRF_STATIC_INLINE nrf_dppi_task_t nrf_dppi_group_enable_task_get(uint8_t index);
     236                 :            : 
     237                 :            : /**
     238                 :            :  * @brief Function for getting the DISABLE task associated with the specified channel group.
     239                 :            :  *
     240                 :            :  * @param[in] index Channel group index.
     241                 :            :  *
     242                 :            :  * @return Requested DISABLE task.
     243                 :            :  */
     244                 :            : NRF_STATIC_INLINE nrf_dppi_task_t nrf_dppi_group_disable_task_get(uint8_t index);
     245                 :            : 
     246                 :            : #ifndef NRF_DECLARE_ONLY
     247                 :            : 
     248                 :            : NRF_STATIC_INLINE void nrf_dppi_task_trigger(NRF_DPPIC_Type * p_reg, nrf_dppi_task_t dppi_task)
     249                 :            : {
     250                 :            :     *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) dppi_task)) = 1;
     251                 :            : }
     252                 :            : 
     253                 :            : NRF_STATIC_INLINE uint32_t nrf_dppi_task_address_get(NRF_DPPIC_Type const * p_reg,
     254                 :            :                                                      nrf_dppi_task_t        task)
     255                 :            : {
     256                 :            :     return (uint32_t) ((uint8_t *) p_reg + (uint32_t ) task);
     257                 :            : }
     258                 :            : 
     259                 :            : NRF_STATIC_INLINE bool nrf_dppi_channel_check(NRF_DPPIC_Type const * p_reg, uint8_t channel)
     260                 :            : {
     261                 :            :     NRFX_ASSERT(channel < DPPI_CH_NUM);
     262                 :            :     return ((p_reg->CHEN & (DPPIC_CHEN_CH0_Enabled << (DPPIC_CHEN_CH0_Pos + channel))) != 0);
     263                 :            : }
     264                 :            : 
     265                 :            : NRF_STATIC_INLINE void nrf_dppi_channels_disable_all(NRF_DPPIC_Type * p_reg)
     266                 :            : {
     267                 :            :     p_reg->CHENCLR = 0xFFFFFFFFuL;
     268                 :            : }
     269                 :            : 
     270                 :          1 : NRF_STATIC_INLINE void nrf_dppi_channels_enable(NRF_DPPIC_Type * p_reg, uint32_t mask)
     271                 :            : {
     272                 :          1 :     p_reg->CHENSET = mask;
     273                 :          1 : }
     274                 :            : 
     275                 :          0 : NRF_STATIC_INLINE void nrf_dppi_channels_disable(NRF_DPPIC_Type * p_reg, uint32_t mask)
     276                 :            : {
     277                 :          0 :     p_reg->CHENCLR = mask;
     278                 :          0 : }
     279                 :            : 
     280                 :            : NRF_STATIC_INLINE void nrf_dppi_subscribe_set(NRF_DPPIC_Type * p_reg,
     281                 :            :                                               nrf_dppi_task_t  task,
     282                 :            :                                               uint8_t          channel)
     283                 :            : {
     284                 :            :     NRFX_ASSERT(channel < DPPI_CH_NUM);
     285                 :            :     *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
     286                 :            :             ((uint32_t)channel | DPPIC_SUBSCRIBE_CHG_EN_EN_Msk);
     287                 :            : }
     288                 :            : 
     289                 :            : NRF_STATIC_INLINE void nrf_dppi_subscribe_clear(NRF_DPPIC_Type * p_reg, nrf_dppi_task_t task)
     290                 :            : {
     291                 :            :     *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
     292                 :            : }
     293                 :            : 
     294                 :          0 : NRF_STATIC_INLINE void nrf_dppi_channels_include_in_group(NRF_DPPIC_Type *         p_reg,
     295                 :            :                                                           uint32_t                 channel_mask,
     296                 :            :                                                           nrf_dppi_channel_group_t channel_group)
     297                 :            : {
     298                 :          0 :     p_reg->CHG[(uint32_t) channel_group] =
     299                 :          0 :         p_reg->CHG[(uint32_t) channel_group] | (channel_mask);
     300                 :          0 : }
     301                 :            : 
     302                 :          0 : NRF_STATIC_INLINE void nrf_dppi_channels_remove_from_group(NRF_DPPIC_Type *         p_reg,
     303                 :            :                                                            uint32_t                 channel_mask,
     304                 :            :                                                            nrf_dppi_channel_group_t channel_group)
     305                 :            : {
     306                 :          0 :     p_reg->CHG[(uint32_t) channel_group] =
     307                 :          0 :         p_reg->CHG[(uint32_t) channel_group] & ~(channel_mask);
     308                 :          0 : }
     309                 :            : 
     310                 :          0 : NRF_STATIC_INLINE void nrf_dppi_group_clear(NRF_DPPIC_Type *         p_reg,
     311                 :            :                                             nrf_dppi_channel_group_t group)
     312                 :            : {
     313                 :          0 :     p_reg->CHG[(uint32_t) group] = 0;
     314                 :          0 : }
     315                 :            : 
     316                 :          0 : NRF_STATIC_INLINE void nrf_dppi_group_enable(NRF_DPPIC_Type * p_reg, nrf_dppi_channel_group_t group)
     317                 :            : {
     318                 :          0 :     p_reg->TASKS_CHG[(uint32_t) group].EN = 1;
     319                 :          0 : }
     320                 :            : 
     321                 :          0 : NRF_STATIC_INLINE void nrf_dppi_group_disable(NRF_DPPIC_Type *         p_reg,
     322                 :            :                                               nrf_dppi_channel_group_t group)
     323                 :            : {
     324                 :          0 :     p_reg->TASKS_CHG[(uint32_t) group].DIS = 1;
     325                 :          0 : }
     326                 :            : 
     327                 :            : NRF_STATIC_INLINE nrf_dppi_task_t nrf_dppi_group_enable_task_get(uint8_t index)
     328                 :            : {
     329                 :            :     NRFX_ASSERT(index < DPPI_GROUP_NUM);
     330                 :            :     return (nrf_dppi_task_t)NRFX_OFFSETOF(NRF_DPPIC_Type, TASKS_CHG[index].EN);
     331                 :            : }
     332                 :            : 
     333                 :            : NRF_STATIC_INLINE nrf_dppi_task_t nrf_dppi_group_disable_task_get(uint8_t index)
     334                 :            : {
     335                 :            :     NRFX_ASSERT(index < DPPI_GROUP_NUM);
     336                 :            :     return (nrf_dppi_task_t)NRFX_OFFSETOF(NRF_DPPIC_Type, TASKS_CHG[index].DIS);
     337                 :            : }
     338                 :            : 
     339                 :            : #endif // NRF_DECLARE_ONLY
     340                 :            : 
     341                 :            : /** @} */
     342                 :            : 
     343                 :            : #ifdef __cplusplus
     344                 :            : }
     345                 :            : #endif
     346                 :            : 
     347                 :            : #endif // NRF_DPPIC_H__

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