SoftDevice NVIC internal definitions

Macros
#define	__NRF_NVIC_NVMC_IRQn   (30)
#define	__NRF_NVIC_ISER_COUNT   (2)
#define	__NRF_NVIC_SD_IRQS_0
	Interrupts used by the SoftDevice, with IRQn in the range 0-31. More...
#define	__NRF_NVIC_SD_IRQS_1   ((uint32_t)0)
	Interrupts used by the SoftDevice, with IRQn in the range 32-63.
#define	__NRF_NVIC_APP_IRQS_0   (~__NRF_NVIC_SD_IRQS_0)
	Interrupts available for to application, with IRQn in the range 0-31.
#define	__NRF_NVIC_APP_IRQS_1   (~__NRF_NVIC_SD_IRQS_1)
	Interrupts available for to application, with IRQn in the range 32-63.

Detailed Description

Macro Definition Documentation

#define __NRF_NVIC_ISER_COUNT   (2)

The number of ISER/ICER registers in the NVIC that are used.

Definition at line 75 of file nrf_nvic.h.

#define __NRF_NVIC_NVMC_IRQn   (30)

The peripheral ID of the NVMC. IRQ numbers are used to identify peripherals, but the NVMC doesn't have an IRQ number in the MDK.

Definition at line 73 of file nrf_nvic.h.

#define __NRF_NVIC_SD_IRQS_0

Value:

((uint32_t)( \
      (1U << POWER_CLOCK_IRQn) \
    | (1U << RADIO_IRQn) \
    | (1U << RTC0_IRQn) \
    | (1U << TIMER0_IRQn) \
    | (1U << RNG_IRQn) \
    | (1U << ECB_IRQn) \
    | (1U << CCM_AAR_IRQn) \
    | (1U << TEMP_IRQn) \
    | (1U << __NRF_NVIC_NVMC_IRQn) \
    | (1U << (uint32_t)SWI5_EGU5_IRQn) \
  ))

Interrupts used by the SoftDevice, with IRQn in the range 0-31.

Definition at line 78 of file nrf_nvic.h.