#
# Copyright (c) 2023 Nordic Semiconductor
#
# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
#

# SD Controller builds:
# - < 20260312 (reduced RAM):
# - CONFIG_HEAP_MEM_POOL=8192
# - CONFIG_BT_BUF_CMD_TX_COUNT=4 (not used by Controller)
# - CONFIG_BT_BUF_EVT_RX_COUNT=4
# - CONFIG_BT_ISO_MAX_CHAN=3
# - CONFIG_BT_ISO_TX_MTU=200 (2 48_2_1 channels)
# - CONFIG_BT_ISO_RX_MTU=200 (2 48_2_1 channels)
# - CONFIG_BT_ISO_TX_BUF_COUNT=2
# - CONFIG_BT_CTLR_ISO_TX_BUFFERS=4
# - CONFIG_BT_ISO_RX_BUF_COUNT=2
#
# - > 202603xx (decreased heap):
# - CONFIG_HEAP_MEM_POOL=4096
# - PaWR
# - CONFIG_BT_BUF_EVT_RX_COUNT=8
# - CONFIG_BT_ISO_MAX_CHAN=3
# - CONFIG_BT_ISO_TX_MTU=200 (TEST: not yet 2 48_2_6 channels)
# - CONFIG_BT_ISO_RX_MTU=200 (TEST: not yet 2 48_2_6 channels)
# - CONFIG_BT_ISO_TX_BUF_COUNT=3
# - CONFIG_BT_ISO_RX_BUF_COUNT=4

# see https://devzone.nordicsemi.com/f/nordic-q-a/125656/choice-of-controller-configurations-in-ble-throughput-sample#:~:text=The%208%20KB%20heap%20is%20simply%20a%20safe,demonstrate%20throughput%2C%20not%20serve%20as%20a%20tuning%20guide.
CONFIG_HEAP_MEM_POOL_SIZE=4096
#CONFIG_HEAP_MEM_POOL_SIZE=8192
# TEST - see if crash disappears
CONFIG_MAIN_STACK_SIZE=2048
#CONFIG_MAIN_STACK_SIZE=3072
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=2048

# TEST - reduce mem
CONFIG_CONSOLE=n

CONFIG_MBOX=y
CONFIG_IPC_SERVICE=y

CONFIG_BT=y
CONFIG_BT_HCI_RAW=y
CONFIG_BT_CTLR_ASSERT_HANDLER=y

CONFIG_ASSERT=y

CONFIG_IPC_RADIO_BT=y
CONFIG_IPC_RADIO_BT_HCI_IPC=y

# TEST - for use qith Zephyr
# Workaround: Unable to allocate command buffer when using K_NO_WAIT since
# Host number of completed commands does not follow normal flow control.
# TEST - reduce RAM (not used by Controller)
#CONFIG_BT_BUF_CMD_TX_COUNT=10
#CONFIG_BT_BUF_CMD_TX_COUNT=4

# TEST - reduce RAM
#CONFIG_BT_BUF_EVT_RX_COUNT=16
CONFIG_BT_BUF_EVT_RX_COUNT=8
# N.B. ncs v3.1.0 - satisfy ASSERT
#CONFIG_BT_BUF_ACL_TX_COUNT=7
#CONFIG_BT_BUF_ACL_TX_COUNT=3
#CONFIG_BT_BUF_EVT_RX_COUNT=7
#CONFIG_BT_BUF_EVT_RX_COUNT=4
CONFIG_BT_CTLR_FAL_SIZE=0

CONFIG_BT_BUF_EVT_RX_SIZE=255
CONFIG_BT_BUF_ACL_RX_SIZE=255
CONFIG_BT_BUF_ACL_TX_SIZE=251
CONFIG_BT_BUF_CMD_TX_SIZE=255

# Host features
CONFIG_BT_EXT_ADV=y
CONFIG_BT_PER_ADV=y
CONFIG_BT_PER_ADV_SYNC=y
#CONFIG_BT_PER_ADV_SYNC_MAX=1
# TBD: PaWR support
CONFIG_BT_PER_ADV_RSP=y
CONFIG_BT_PER_ADV_SYNC_RSP=y
CONFIG_BT_PER_ADV_SYNC_TRANSFER_RECEIVER=y
CONFIG_BT_PER_ADV_SYNC_TRANSFER_SENDER=y
CONFIG_BT_PER_ADV_SYNC_MAX=3
# N.B. not a Controller parameter
#CONFIG_BT_PER_ADV_SYNC_BUF_SIZE=255
# N.B. if PaWR enable, all PerAdv trains counted as if PaWRs...
CONFIG_BT_CTLR_SDC_PAWR_ADV_COUNT=3
#CONFIG_BT_CTLR_SDC_PERIODIC_ADV_RSP_TX_MAX_DATA_SIZE=100
#CONFIG_BT_CTLR_SDC_PERIODIC_ADV_RSP_RX_FAILURE_REPORTING=y

# Broadcast and Connected ISO
CONFIG_BT_ISO_BROADCASTER=y
CONFIG_BT_ISO_SYNC_RECEIVER=y
# TBD: remove CIS support if PaWR
CONFIG_BT_ISO_CENTRAL=y
#CONFIG_BT_ISO_PERIPHERAL=y

# ISO Streams
# reduce RAM
#CONFIG_BT_ISO_MAX_CHAN=4
CONFIG_BT_ISO_MAX_CHAN=3
CONFIG_BT_ISO_MAX_BIG=2

CONFIG_BT_CTLR_DATA_LENGTH_MAX=251

# Coded PHY support
CONFIG_BT_CTLR_PHY_CODED=y

# Advertising Sets and Extended Scanning
CONFIG_BT_CTLR_ADV_EXT=y
# TEST - 2 devices or 3 (PaWR)?
#CONFIG_BT_EXT_ADV_MAX_ADV_SET=2
CONFIG_BT_EXT_ADV_MAX_ADV_SET=3
CONFIG_BT_CTLR_ADV_SET=3
#CONFIG_BT_CTLR_ADV_SET=2
CONFIG_BT_CTLR_ADV_DATA_LEN_MAX=191


CONFIG_BT_CTLR_ADV_RESERVE_MAX=n
CONFIG_BT_CTLR_CENTRAL_RESERVE_MAX=n
CONFIG_BT_CTLR_SLOT_RESERVATION_UPDATE=n


# ISO Broadcaster Controller
CONFIG_BT_CTLR_ADV_EXT=y
CONFIG_BT_CTLR_ADV_PERIODIC=y
CONFIG_BT_CTLR_ADV_ISO=y
CONFIG_BT_CTLR_ADV_ISO_SET=2
CONFIG_BT_CTLR_ADV_ISO_PDU_LEN_MAX=247
# Broadcast ISO streams per Broadcast ISO Group
CONFIG_BT_CTLR_ADV_ISO_STREAM_MAX=2
# N.B. default is CONFIG_BT_ISO_MAX_CHAN
#CONFIG_BT_CTLR_ADV_ISO_STREAM_COUNT=2

# ISO Receive Controller
CONFIG_BT_CTLR_ADV_EXT=y
CONFIG_BT_CTLR_SYNC_PERIODIC=y
CONFIG_BT_CTLR_SYNC_ISO=y
CONFIG_BT_CTLR_SCAN_SYNC_ISO_SET=2
CONFIG_BT_CTLR_SYNC_ISO_PDU_LEN_MAX=251
# TEST - 4 streams possible?
CONFIG_BT_CTLR_SYNC_ISO_STREAM_MAX=2
# N.B. default is CONFIG_BT_ISO_MAX_CHAN
#CONFIG_BT_CTLR_SYNC_ISO_STREAM_COUNT=4

# ISO Connection Oriented
# TBD: remove CIS support if PaWR
#CONFIG_BT_CTLR_CENTRAL_ISO=y
CONFIG_BT_CTLR_CENTRAL_ISO=n
#CONFIG_BT_CTLR_PERIPHERAL_ISO=y
# TEST - 4 streams possible? RAM oflo 3348B
#CONFIG_BT_CTLR_CONN_ISO_STREAMS=2
# TEST - 4 streams possible? RAM oflo 3348B
#CONFIG_BT_CTLR_CONN_ISO_STREAMS=4
CONFIG_BT_CTLR_CONN_ISO_STREAMS=1
#CONFIG_BT_CTLR_CONN_ISO_STREAMS_PER_GROUP=2
#CONFIG_BT_CTLR_CONN_ISO_SDU_LEN_MAX=247
CONFIG_BT_CTLR_CONN_ISO_PDU_LEN_MAX=251


# ISO Transmissions
# TBD: PaWR support (reduce RAM) - only 2 LC3 channels/BIS@100B each
#CONFIG_BT_ISO_TX_MTU=310
CONFIG_BT_ISO_TX_MTU=200
#CONFIG_BT_ISO_TX_MTU=155
# TBD: used by SDC?
CONFIG_BT_ISO_TX_BUF_COUNT=3
#CONFIG_BT_ISO_TX_BUF_COUNT=2
#CONFIG_BT_CTLR_ISO_TX_BUFFERS=8
CONFIG_BT_CTLR_ISO_TX_BUFFERS=4
#CONFIG_BT_CTLR_ISO_TX_BUFFER_SIZE=255
CONFIG_BT_CTLR_ISO_TX_BUFFER_SIZE=163

# TEST - check if reduces iso read tx timestamp errors - NO
##CONFIG_BT_CTLR_SDC_ISO_TX_HCI_BUFFER_COUNT=4
##CONFIG_BT_CTLR_SDC_ISO_TX_PDU_BUFFER_PER_STREAM_COUNT=4
# TEST - check if reduces iso latency
##CONFIG_BT_CTLR_SDC_ISO_TX_HCI_BUFFER_COUNT=1
##CONFIG_BT_CTLR_SDC_ISO_TX_PDU_BUFFER_PER_STREAM_COUNT=1

# ISO Receptions
# TEST - reduce RAM
# TBD: PaWR support (reduce RAM) - only 2 LC3 channels/BIS@100B each
#CONFIG_BT_ISO_RX_MTU=310
CONFIG_BT_ISO_RX_MTU=200
#CONFIG_BT_ISO_RX_MTU=155
# TBD: used by SDC?
#CONFIG_BT_ISO_RX_BUF_COUNT=2
CONFIG_BT_ISO_RX_BUF_COUNT=4

# Tx Power Dynamic Control
CONFIG_BT_CTLR_TX_PWR_DYNAMIC_CONTROL=y

# TEST - seems to be neded to avoid conn create status 0x0d
#CONFIG_BT_MAX_CONN=3
#CONFIG_BT_CTLR_SDC_PERIPHERAL_COUNT=2
CONFIG_BT_MAX_CONN=1
CONFIG_BT_CTLR_SDC_PERIPHERAL_COUNT=1
# TEST: REDUCE RAM?
CONFIG_CBPRINTF_COMPLETE=n


# TBD: from example
# #FEM EKEK
# CONFIG_MPSL_FEM=y
# CONFIG_MPSL=y
# CONFIG_MPSL_FEM_NRF21540_GPIO=y
# # CONFIG_MPSL_FEM_NRF21540_GPIO_SPI=y EK???
# CONFIG_BT_CTLR_TX_PWR_DYNAMIC_CONTROL=y
# CONFIG_MPSL_FEM_NRF21540_TX_GAIN_DB=20
# CONFIG_MPSL_FEM_NRF21540_RX_GAIN_DB=13
# CONFIG_BT_CTLR_TX_PWR_ANTENNA=20

#FEM general
##CONFIG_MPSL_FEM_ANY_SUPPORT=y
##CONFIG_MPSL_FEM_NRF21540_GPIO_SUPPORT=y
##CONFIG_MPSL_FEM_NRF21540_GPIO_SPI_SUPPORT=y
##CONFIG_MPSL_FEM_NCS_SUPPORTED_FEM_USED=y
##CONFIG_MPSL_FEM_API_AVAILABLE=y
#
#CONFIG_MPSL_FEM=y
#CONFIG_MPSL=y
#CONFIG_MPSL_FEM_NRF21540_GPIO=y
#CONFIG_MPSL_FEM_NRF21540_GPIO_SPI=y
#CONFIG_BT_CTLR_TX_PWR_DYNAMIC_CONTROL=y
#CONFIG_MPSL_FEM_NRF21540_TX_GAIN_DB=20
#CONFIG_MPSL_FEM_NRF21540_RX_GAIN_DB=13
#CONFIG_MPSL_FEM_NRF21540_RUNTIME_PA_GAIN_CONTROL=y
#CONFIG_BT_CTLR_TX_PWR_ANTENNA=22
#
#CONFIG_MPSL_FEM_POWER_MODEL=y
#CONFIG_MPSL_FEM_POWER_MODEL_NRF21540_USE_BUILTIN=y
#CONFIG_MPSL_FEM_BUILTIN_POWER_MODEL_UPDATE_PERIOD=2000
#CONFIG_MPSL_FEM_DEVICE_CONFIG_254=y
#CONFIG_MPSL_FEM_INIT_PRIORITY=50
#CONFIG_MPSL_THREAD_COOP_PRIO=6
#CONFIG_MPSL_TIMESLOT_SESSION_COUNT=0
## CONFIG_MPSL_ASSERT_HANDLER is not set
## CONFIG_MPSL_TRIGGER_IPC_TASK_ON_RTC_START is not set
#CONFIG_MPSL_LOW_PRIO_IRQN=26
#
# audio_sync_timer.c - sync APP and NET CORE
# To present the audio at the right point in time, we need the controller and
# audio clock to be synchronized
CONFIG_MPSL_TRIGGER_IPC_TASK_ON_RTC_START=y
CONFIG_MPSL_TRIGGER_IPC_TASK_ON_RTC_START_CHANNEL=4
