
zephyr.elf:     file format elf32-littlearm


Disassembly of section rom_start:

00000000 <_vector_table>:

	return fd_entry->obj;
}

int z_reserve_fd(void)
{
   0:	200013d0 	.word	0x200013d0
	if (z_syscall_trap()) {
		return (int) arch_syscall_invoke2(*(uintptr_t *)&mutex, *(uintptr_t *)&timeout, K_SYSCALL_K_MUTEX_LOCK);
	}
#endif
	compiler_barrier();
	return z_impl_k_mutex_lock(mutex, timeout);
   4:	00001949 	.word	0x00001949
   8:	00005421 	.word	0x00005421
		if (fdtable[fd].obj == NULL) {
   c:	0000181d 	.word	0x0000181d
  10:	0000181d 	.word	0x0000181d
  14:	0000181d 	.word	0x0000181d
	for (fd = 0; fd < ARRAY_SIZE(fdtable); fd++) {
  18:	0000181d 	.word	0x0000181d
	if (z_syscall_trap()) {
		return (int *) arch_syscall_invoke0(K_SYSCALL_Z_ERRNO);
	}
#endif
	compiler_barrier();
	return z_impl_z_errno();
  1c:	0000181d 	.word	0x0000181d
	errno = ENFILE;
  20:	0000181d 	.word	0x0000181d
	return -1;
  24:	0000181d 	.word	0x0000181d
	if (z_syscall_trap()) {
		return (int) arch_syscall_invoke1(*(uintptr_t *)&mutex, K_SYSCALL_K_MUTEX_UNLOCK);
	}
#endif
	compiler_barrier();
	return z_impl_k_mutex_unlock(mutex);
  28:	0000181d 	.word	0x0000181d
  2c:	00001715 	.word	0x00001715
	}

	k_mutex_unlock(&fdtable_lock);

	return fd;
}
  30:	0000181d 	.word	0x0000181d
		fdtable[fd].obj = FD_OBJ_RESERVED;
  34:	0000181d 	.word	0x0000181d
  38:	000016c1 	.word	0x000016c1
  3c:	00005401 	.word	0x00005401

00000040 <_irq_vector_table>:
  40:	00001909 00001909 00001909 00001909     ................
		sys_pm_notify_power_state_exit(pm_state);
		_sys_pm_power_state_exit_post_ops(pm_state);
	}

	return pm_state;
}
  50:	00001909 00001909 00001909 00001909     ................
  60:	00001909 00001909 00001909 00001909     ................
  70:	00001909 00001909 00001909 00001909     ................
  80:	00001909 00001909 00001909 00001909     ................
  90:	00001909 00001909 00001909 00001909     ................
  a0:	00001909 00001909 00001909 00001909     ................
  b0:	00001909 00001909 00001909 00001909     ................
  c0:	00001909 00001909 00001909 00001909     ................
  d0:	00001909 00001909 00001909 00001909     ................
  e0:	00001909 00001909 00001909 00001909     ................
  f0:	00001909 00001909 00001909 00001909     ................

Disassembly of section text:

00000100 <__aeabi_uldivmod>:
     100:	b953      	cbnz	r3, 118 <__aeabi_uldivmod+0x18>
     102:	b94a      	cbnz	r2, 118 <__aeabi_uldivmod+0x18>
     104:	2900      	cmp	r1, #0
     106:	bf08      	it	eq
     108:	2800      	cmpeq	r0, #0
     10a:	bf1c      	itt	ne
     10c:	f04f 31ff 	movne.w	r1, #4294967295
     110:	f04f 30ff 	movne.w	r0, #4294967295
     114:	f000 b974 	b.w	400 <__aeabi_idiv0>
     118:	f1ad 0c08 	sub.w	ip, sp, #8
     11c:	e96d ce04 	strd	ip, lr, [sp, #-16]!
     120:	f000 f806 	bl	130 <__udivmoddi4>
     124:	f8dd e004 	ldr.w	lr, [sp, #4]
     128:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
     12c:	b004      	add	sp, #16
     12e:	4770      	bx	lr

00000130 <__udivmoddi4>:
     130:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
     134:	9e08      	ldr	r6, [sp, #32]
     136:	4604      	mov	r4, r0
     138:	4688      	mov	r8, r1
     13a:	2b00      	cmp	r3, #0
     13c:	f040 8085 	bne.w	24a <CONFIG_IDLE_STACK_SIZE+0x10a>
     140:	428a      	cmp	r2, r1
     142:	4615      	mov	r5, r2
     144:	d948      	bls.n	1d8 <CONFIG_IDLE_STACK_SIZE+0x98>
     146:	fab2 f282 	clz	r2, r2
     14a:	b14a      	cbz	r2, 160 <CONFIG_IDLE_STACK_SIZE+0x20>
     14c:	f1c2 0720 	rsb	r7, r2, #32
     150:	fa01 f302 	lsl.w	r3, r1, r2
     154:	fa20 f707 	lsr.w	r7, r0, r7
     158:	4095      	lsls	r5, r2
     15a:	ea47 0803 	orr.w	r8, r7, r3
     15e:	4094      	lsls	r4, r2
     160:	ea4f 4e15 	mov.w	lr, r5, lsr #16
     164:	0c23      	lsrs	r3, r4, #16
     166:	fbb8 f7fe 	udiv	r7, r8, lr
     16a:	fa1f fc85 	uxth.w	ip, r5
     16e:	fb0e 8817 	mls	r8, lr, r7, r8
     172:	ea43 4308 	orr.w	r3, r3, r8, lsl #16
     176:	fb07 f10c 	mul.w	r1, r7, ip
     17a:	4299      	cmp	r1, r3
     17c:	d909      	bls.n	192 <CONFIG_IDLE_STACK_SIZE+0x52>
     17e:	18eb      	adds	r3, r5, r3
     180:	f107 30ff 	add.w	r0, r7, #4294967295
     184:	f080 80e3 	bcs.w	34e <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0x4e>
     188:	4299      	cmp	r1, r3
     18a:	f240 80e0 	bls.w	34e <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0x4e>
     18e:	3f02      	subs	r7, #2
     190:	442b      	add	r3, r5
     192:	1a5b      	subs	r3, r3, r1
     194:	b2a4      	uxth	r4, r4
     196:	fbb3 f0fe 	udiv	r0, r3, lr
     19a:	fb0e 3310 	mls	r3, lr, r0, r3
     19e:	ea44 4403 	orr.w	r4, r4, r3, lsl #16
     1a2:	fb00 fc0c 	mul.w	ip, r0, ip
     1a6:	45a4      	cmp	ip, r4
     1a8:	d909      	bls.n	1be <CONFIG_IDLE_STACK_SIZE+0x7e>
     1aa:	192c      	adds	r4, r5, r4
     1ac:	f100 33ff 	add.w	r3, r0, #4294967295
     1b0:	f080 80cb 	bcs.w	34a <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0x4a>
     1b4:	45a4      	cmp	ip, r4
     1b6:	f240 80c8 	bls.w	34a <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0x4a>
     1ba:	3802      	subs	r0, #2
     1bc:	442c      	add	r4, r5
     1be:	ea40 4007 	orr.w	r0, r0, r7, lsl #16
     1c2:	eba4 040c 	sub.w	r4, r4, ip
     1c6:	2700      	movs	r7, #0
     1c8:	b11e      	cbz	r6, 1d2 <CONFIG_IDLE_STACK_SIZE+0x92>
     1ca:	40d4      	lsrs	r4, r2
     1cc:	2300      	movs	r3, #0
     1ce:	e9c6 4300 	strd	r4, r3, [r6]
     1d2:	4639      	mov	r1, r7
     1d4:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
     1d8:	2a00      	cmp	r2, #0
     1da:	d053      	beq.n	284 <CONFIG_IDLE_STACK_SIZE+0x144>
     1dc:	fab2 f282 	clz	r2, r2
     1e0:	2a00      	cmp	r2, #0
     1e2:	f040 80b6 	bne.w	352 <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0x52>
     1e6:	1b49      	subs	r1, r1, r5
     1e8:	ea4f 4e15 	mov.w	lr, r5, lsr #16
     1ec:	fa1f f885 	uxth.w	r8, r5
     1f0:	2701      	movs	r7, #1
     1f2:	fbb1 fcfe 	udiv	ip, r1, lr
     1f6:	0c23      	lsrs	r3, r4, #16
     1f8:	fb0e 111c 	mls	r1, lr, ip, r1
     1fc:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
     200:	fb08 f10c 	mul.w	r1, r8, ip
     204:	4299      	cmp	r1, r3
     206:	d907      	bls.n	218 <CONFIG_IDLE_STACK_SIZE+0xd8>
     208:	18eb      	adds	r3, r5, r3
     20a:	f10c 30ff 	add.w	r0, ip, #4294967295
     20e:	d202      	bcs.n	216 <CONFIG_IDLE_STACK_SIZE+0xd6>
     210:	4299      	cmp	r1, r3
     212:	f200 80ec 	bhi.w	3ee <CONFIG_LOG_PROCESS_THREAD_SLEEP_MS+0x6>
     216:	4684      	mov	ip, r0
     218:	1a59      	subs	r1, r3, r1
     21a:	b2a3      	uxth	r3, r4
     21c:	fbb1 f0fe 	udiv	r0, r1, lr
     220:	fb0e 1410 	mls	r4, lr, r0, r1
     224:	ea43 4404 	orr.w	r4, r3, r4, lsl #16
     228:	fb08 f800 	mul.w	r8, r8, r0
     22c:	45a0      	cmp	r8, r4
     22e:	d907      	bls.n	240 <CONFIG_IDLE_STACK_SIZE+0x100>
     230:	192c      	adds	r4, r5, r4
     232:	f100 33ff 	add.w	r3, r0, #4294967295
     236:	d202      	bcs.n	23e <CONFIG_IDLE_STACK_SIZE+0xfe>
     238:	45a0      	cmp	r8, r4
     23a:	f200 80dc 	bhi.w	3f6 <CONFIG_LOG_PROCESS_THREAD_SLEEP_MS+0xe>
     23e:	4618      	mov	r0, r3
     240:	eba4 0408 	sub.w	r4, r4, r8
     244:	ea40 400c 	orr.w	r0, r0, ip, lsl #16
     248:	e7be      	b.n	1c8 <CONFIG_IDLE_STACK_SIZE+0x88>
     24a:	428b      	cmp	r3, r1
     24c:	d908      	bls.n	260 <CONFIG_IDLE_STACK_SIZE+0x120>
     24e:	2e00      	cmp	r6, #0
     250:	d078      	beq.n	344 <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0x44>
     252:	2700      	movs	r7, #0
     254:	e9c6 0100 	strd	r0, r1, [r6]
     258:	4638      	mov	r0, r7
     25a:	4639      	mov	r1, r7
     25c:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
     260:	fab3 f783 	clz	r7, r3
     264:	b97f      	cbnz	r7, 286 <CONFIG_IDLE_STACK_SIZE+0x146>
     266:	428b      	cmp	r3, r1
     268:	d302      	bcc.n	270 <CONFIG_IDLE_STACK_SIZE+0x130>
     26a:	4282      	cmp	r2, r0
     26c:	f200 80bd 	bhi.w	3ea <CONFIG_LOG_PROCESS_THREAD_SLEEP_MS+0x2>
     270:	1a84      	subs	r4, r0, r2
     272:	eb61 0303 	sbc.w	r3, r1, r3
     276:	2001      	movs	r0, #1
     278:	4698      	mov	r8, r3
     27a:	2e00      	cmp	r6, #0
     27c:	d0a9      	beq.n	1d2 <CONFIG_IDLE_STACK_SIZE+0x92>
     27e:	e9c6 4800 	strd	r4, r8, [r6]
     282:	e7a6      	b.n	1d2 <CONFIG_IDLE_STACK_SIZE+0x92>
     284:	deff      	udf	#255	; 0xff
     286:	f1c7 0520 	rsb	r5, r7, #32
     28a:	40bb      	lsls	r3, r7
     28c:	fa22 fc05 	lsr.w	ip, r2, r5
     290:	ea4c 0c03 	orr.w	ip, ip, r3
     294:	fa01 f407 	lsl.w	r4, r1, r7
     298:	fa20 f805 	lsr.w	r8, r0, r5
     29c:	fa21 f305 	lsr.w	r3, r1, r5
     2a0:	ea4f 4e1c 	mov.w	lr, ip, lsr #16
     2a4:	ea48 0404 	orr.w	r4, r8, r4
     2a8:	fbb3 f9fe 	udiv	r9, r3, lr
     2ac:	0c21      	lsrs	r1, r4, #16
     2ae:	fb0e 3319 	mls	r3, lr, r9, r3
     2b2:	fa1f f88c 	uxth.w	r8, ip
     2b6:	ea41 4303 	orr.w	r3, r1, r3, lsl #16
     2ba:	fb09 fa08 	mul.w	sl, r9, r8
     2be:	459a      	cmp	sl, r3
     2c0:	fa02 f207 	lsl.w	r2, r2, r7
     2c4:	fa00 f107 	lsl.w	r1, r0, r7
     2c8:	d90b      	bls.n	2e2 <CONFIG_IDLE_STACK_SIZE+0x1a2>
     2ca:	eb1c 0303 	adds.w	r3, ip, r3
     2ce:	f109 30ff 	add.w	r0, r9, #4294967295
     2d2:	f080 8088 	bcs.w	3e6 <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0xe6>
     2d6:	459a      	cmp	sl, r3
     2d8:	f240 8085 	bls.w	3e6 <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0xe6>
     2dc:	f1a9 0902 	sub.w	r9, r9, #2
     2e0:	4463      	add	r3, ip
     2e2:	eba3 030a 	sub.w	r3, r3, sl
     2e6:	b2a4      	uxth	r4, r4
     2e8:	fbb3 f0fe 	udiv	r0, r3, lr
     2ec:	fb0e 3310 	mls	r3, lr, r0, r3
     2f0:	ea44 4403 	orr.w	r4, r4, r3, lsl #16
     2f4:	fb00 f808 	mul.w	r8, r0, r8
     2f8:	45a0      	cmp	r8, r4
     2fa:	d908      	bls.n	30e <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0xe>
     2fc:	eb1c 0404 	adds.w	r4, ip, r4
     300:	f100 33ff 	add.w	r3, r0, #4294967295
     304:	d26b      	bcs.n	3de <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0xde>
     306:	45a0      	cmp	r8, r4
     308:	d969      	bls.n	3de <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0xde>
     30a:	3802      	subs	r0, #2
     30c:	4464      	add	r4, ip
     30e:	ea40 4009 	orr.w	r0, r0, r9, lsl #16
     312:	eba4 0408 	sub.w	r4, r4, r8
     316:	fba0 8902 	umull	r8, r9, r0, r2
     31a:	454c      	cmp	r4, r9
     31c:	46c6      	mov	lr, r8
     31e:	464b      	mov	r3, r9
     320:	d354      	bcc.n	3cc <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0xcc>
     322:	d051      	beq.n	3c8 <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0xc8>
     324:	2e00      	cmp	r6, #0
     326:	d069      	beq.n	3fc <CONFIG_LOG_PROCESS_THREAD_SLEEP_MS+0x14>
     328:	ebb1 020e 	subs.w	r2, r1, lr
     32c:	eb64 0403 	sbc.w	r4, r4, r3
     330:	fa04 f505 	lsl.w	r5, r4, r5
     334:	fa22 f307 	lsr.w	r3, r2, r7
     338:	40fc      	lsrs	r4, r7
     33a:	431d      	orrs	r5, r3
     33c:	e9c6 5400 	strd	r5, r4, [r6]
     340:	2700      	movs	r7, #0
     342:	e746      	b.n	1d2 <CONFIG_IDLE_STACK_SIZE+0x92>
     344:	4637      	mov	r7, r6
     346:	4630      	mov	r0, r6
     348:	e743      	b.n	1d2 <CONFIG_IDLE_STACK_SIZE+0x92>
     34a:	4618      	mov	r0, r3
     34c:	e737      	b.n	1be <CONFIG_IDLE_STACK_SIZE+0x7e>
     34e:	4607      	mov	r7, r0
     350:	e71f      	b.n	192 <CONFIG_IDLE_STACK_SIZE+0x52>
     352:	f1c2 0320 	rsb	r3, r2, #32
     356:	fa20 f703 	lsr.w	r7, r0, r3
     35a:	4095      	lsls	r5, r2
     35c:	fa01 f002 	lsl.w	r0, r1, r2
     360:	fa21 f303 	lsr.w	r3, r1, r3
     364:	ea4f 4e15 	mov.w	lr, r5, lsr #16
     368:	4338      	orrs	r0, r7
     36a:	0c01      	lsrs	r1, r0, #16
     36c:	fbb3 f7fe 	udiv	r7, r3, lr
     370:	fa1f f885 	uxth.w	r8, r5
     374:	fb0e 3317 	mls	r3, lr, r7, r3
     378:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
     37c:	fb07 f308 	mul.w	r3, r7, r8
     380:	428b      	cmp	r3, r1
     382:	fa04 f402 	lsl.w	r4, r4, r2
     386:	d907      	bls.n	398 <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0x98>
     388:	1869      	adds	r1, r5, r1
     38a:	f107 3cff 	add.w	ip, r7, #4294967295
     38e:	d228      	bcs.n	3e2 <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0xe2>
     390:	428b      	cmp	r3, r1
     392:	d926      	bls.n	3e2 <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0xe2>
     394:	3f02      	subs	r7, #2
     396:	4429      	add	r1, r5
     398:	1acb      	subs	r3, r1, r3
     39a:	b281      	uxth	r1, r0
     39c:	fbb3 f0fe 	udiv	r0, r3, lr
     3a0:	fb0e 3310 	mls	r3, lr, r0, r3
     3a4:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
     3a8:	fb00 f308 	mul.w	r3, r0, r8
     3ac:	428b      	cmp	r3, r1
     3ae:	d907      	bls.n	3c0 <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0xc0>
     3b0:	1869      	adds	r1, r5, r1
     3b2:	f100 3cff 	add.w	ip, r0, #4294967295
     3b6:	d210      	bcs.n	3da <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0xda>
     3b8:	428b      	cmp	r3, r1
     3ba:	d90e      	bls.n	3da <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0xda>
     3bc:	3802      	subs	r0, #2
     3be:	4429      	add	r1, r5
     3c0:	1ac9      	subs	r1, r1, r3
     3c2:	ea40 4707 	orr.w	r7, r0, r7, lsl #16
     3c6:	e714      	b.n	1f2 <CONFIG_IDLE_STACK_SIZE+0xb2>
     3c8:	4541      	cmp	r1, r8
     3ca:	d2ab      	bcs.n	324 <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0x24>
     3cc:	ebb8 0e02 	subs.w	lr, r8, r2
     3d0:	eb69 020c 	sbc.w	r2, r9, ip
     3d4:	3801      	subs	r0, #1
     3d6:	4613      	mov	r3, r2
     3d8:	e7a4      	b.n	324 <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0x24>
     3da:	4660      	mov	r0, ip
     3dc:	e7f0      	b.n	3c0 <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0xc0>
     3de:	4618      	mov	r0, r3
     3e0:	e795      	b.n	30e <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0xe>
     3e2:	4667      	mov	r7, ip
     3e4:	e7d8      	b.n	398 <CONFIG_LOG_PROCESS_THREAD_STACK_SIZE+0x98>
     3e6:	4681      	mov	r9, r0
     3e8:	e77b      	b.n	2e2 <CONFIG_IDLE_STACK_SIZE+0x1a2>
     3ea:	4638      	mov	r0, r7
     3ec:	e745      	b.n	27a <CONFIG_IDLE_STACK_SIZE+0x13a>
     3ee:	f1ac 0c02 	sub.w	ip, ip, #2
     3f2:	442b      	add	r3, r5
     3f4:	e710      	b.n	218 <CONFIG_IDLE_STACK_SIZE+0xd8>
     3f6:	3802      	subs	r0, #2
     3f8:	442c      	add	r4, r5
     3fa:	e721      	b.n	240 <CONFIG_IDLE_STACK_SIZE+0x100>
     3fc:	4637      	mov	r7, r6
     3fe:	e6e8      	b.n	1d2 <CONFIG_IDLE_STACK_SIZE+0x92>

00000400 <__aeabi_idiv0>:
     400:	4770      	bx	lr
     402:	bf00      	nop

00000404 <wdt_callback>:
#define WDT_DEV_NAME DT_WDT_0_NAME
#endif
#endif

static void wdt_callback(struct device *wdt_dev, int channel_id)
{
     404:	b510      	push	{r4, lr}
	static bool handled_event;

	if (handled_event) {
     406:	4c06      	ldr	r4, [pc, #24]	; (420 <wdt_callback+0x1c>)
     408:	7822      	ldrb	r2, [r4, #0]
     40a:	b93a      	cbnz	r2, 41c <wdt_callback+0x18>
static inline int z_impl_wdt_feed(struct device *dev, int channel_id)
{
	const struct wdt_driver_api *api =
		(const struct wdt_driver_api *)dev->driver_api;

	return api->feed(dev, channel_id);
     40c:	6843      	ldr	r3, [r0, #4]
     40e:	68db      	ldr	r3, [r3, #12]
     410:	4798      	blx	r3
		return;
	}

	wdt_feed(wdt_dev, channel_id);

	printk("Handled things..ready to reset\n");
     412:	4804      	ldr	r0, [pc, #16]	; (424 <wdt_callback+0x20>)
     414:	f004 fbd7 	bl	4bc6 <printk>
	handled_event = true;
     418:	2301      	movs	r3, #1
     41a:	7023      	strb	r3, [r4, #0]
}
     41c:	bd10      	pop	{r4, pc}
     41e:	bf00      	nop
     420:	200008a4 	.word	0x200008a4
     424:	000060bc 	.word	0x000060bc

00000428 <main>:

void main(void)
{
     428:	b5f0      	push	{r4, r5, r6, r7, lr}
	int wdt_channel_id;
	int wdt_channel_id2;
	struct device *wdt;
	struct wdt_timeout_cfg wdt_config;

	printk("Watchdog sample application\n");
     42a:	4828      	ldr	r0, [pc, #160]	; (4cc <main+0xa4>)
{
     42c:	b085      	sub	sp, #20
	printk("Watchdog sample application\n");
     42e:	f004 fbca 	bl	4bc6 <printk>
	if (z_syscall_trap()) {
		return (struct device *) arch_syscall_invoke1(*(uintptr_t *)&name, K_SYSCALL_DEVICE_GET_BINDING);
	}
#endif
	compiler_barrier();
	return z_impl_device_get_binding(name);
     432:	4827      	ldr	r0, [pc, #156]	; (4d0 <main+0xa8>)
     434:	f002 fffe 	bl	3434 <z_impl_device_get_binding>

	wdt = device_get_binding(WDT_DEV_NAME);
	if (!wdt) {
     438:	4604      	mov	r4, r0
     43a:	b920      	cbnz	r0, 446 <main+0x1e>
		printk("Cannot get WDT device\n");
     43c:	4825      	ldr	r0, [pc, #148]	; (4d4 <main+0xac>)
		return;
	}

	err = wdt_setup(wdt, 0);
	if (err < 0) {
		printk("Watchdog setup error\n");
     43e:	f004 fbc2 	bl	4bc6 <printk>
	/* Waiting for the SoC reset. */
	printk("Waiting for reset...\n");
	while (1) {
		k_yield();
	}
}
     442:	b005      	add	sp, #20
     444:	bdf0      	pop	{r4, r5, r6, r7, pc}
	wdt_config.flags = WDT_FLAG_RESET_SOC;
     446:	2302      	movs	r3, #2
     448:	f88d 300c 	strb.w	r3, [sp, #12]
	wdt_config.window.max = 1000U;
     44c:	2600      	movs	r6, #0
     44e:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
     452:	e9cd 6300 	strd	r6, r3, [sp]
	wdt_channel_id = wdt_install_timeout(wdt, &wdt_config);
     456:	4669      	mov	r1, sp
	wdt_config.callback = wdt_callback;
     458:	4b1f      	ldr	r3, [pc, #124]	; (4d8 <main+0xb0>)
     45a:	9302      	str	r3, [sp, #8]
	wdt_channel_id = wdt_install_timeout(wdt, &wdt_config);
     45c:	f004 f9ea 	bl	4834 <wdt_install_timeout>
	if (wdt_channel_id == -ENOTSUP) {
     460:	f110 0f23 	cmn.w	r0, #35	; 0x23
	wdt_channel_id = wdt_install_timeout(wdt, &wdt_config);
     464:	4605      	mov	r5, r0
	if (wdt_channel_id == -ENOTSUP) {
     466:	d105      	bne.n	474 <main+0x4c>
		wdt_channel_id = wdt_install_timeout(wdt, &wdt_config);
     468:	4669      	mov	r1, sp
     46a:	4620      	mov	r0, r4
		wdt_config.callback = NULL;
     46c:	9602      	str	r6, [sp, #8]
		wdt_channel_id = wdt_install_timeout(wdt, &wdt_config);
     46e:	f004 f9e1 	bl	4834 <wdt_install_timeout>
     472:	4605      	mov	r5, r0
	if (wdt_channel_id < 0) {
     474:	2d00      	cmp	r5, #0
     476:	da01      	bge.n	47c <main+0x54>
		printk("Watchdog install error\n");
     478:	4818      	ldr	r0, [pc, #96]	; (4dc <main+0xb4>)
     47a:	e7e0      	b.n	43e <main+0x16>
	wdt_channel_id2 = wdt_install_timeout(wdt, &wdt_config);
     47c:	4669      	mov	r1, sp
     47e:	4620      	mov	r0, r4
     480:	f004 f9d8 	bl	4834 <wdt_install_timeout>
	if (wdt_channel_id2 < 0) {
     484:	2800      	cmp	r0, #0
     486:	dbf7      	blt.n	478 <main+0x50>
	return api->setup(dev, options);
     488:	6863      	ldr	r3, [r4, #4]
     48a:	2100      	movs	r1, #0
     48c:	681b      	ldr	r3, [r3, #0]
     48e:	4620      	mov	r0, r4
     490:	4798      	blx	r3
	if (err < 0) {
     492:	2800      	cmp	r0, #0
     494:	da01      	bge.n	49a <main+0x72>
		printk("Watchdog setup error\n");
     496:	4812      	ldr	r0, [pc, #72]	; (4e0 <main+0xb8>)
     498:	e7d1      	b.n	43e <main+0x16>
	printk("Feeding watchdog %d times\n", WDT_FEED_TRIES);
     49a:	2105      	movs	r1, #5
     49c:	4811      	ldr	r0, [pc, #68]	; (4e4 <main+0xbc>)
		printk("Feeding watchdog...\n");
     49e:	4f12      	ldr	r7, [pc, #72]	; (4e8 <main+0xc0>)
	printk("Feeding watchdog %d times\n", WDT_FEED_TRIES);
     4a0:	f004 fb91 	bl	4bc6 <printk>
     4a4:	2605      	movs	r6, #5
		printk("Feeding watchdog...\n");
     4a6:	4638      	mov	r0, r7
     4a8:	f004 fb8d 	bl	4bc6 <printk>
	return api->feed(dev, channel_id);
     4ac:	6863      	ldr	r3, [r4, #4]
     4ae:	4629      	mov	r1, r5
     4b0:	68db      	ldr	r3, [r3, #12]
     4b2:	4620      	mov	r0, r4
     4b4:	4798      	blx	r3
	return z_impl_k_sleep(ms);
     4b6:	2032      	movs	r0, #50	; 0x32
     4b8:	f003 fd7e 	bl	3fb8 <z_impl_k_sleep>
	for (int i = 0; i < WDT_FEED_TRIES; ++i) {
     4bc:	3e01      	subs	r6, #1
     4be:	d1f2      	bne.n	4a6 <main+0x7e>
	printk("Waiting for reset...\n");
     4c0:	480a      	ldr	r0, [pc, #40]	; (4ec <main+0xc4>)
     4c2:	f004 fb80 	bl	4bc6 <printk>
	z_impl_k_yield();
     4c6:	f003 fd2b 	bl	3f20 <z_impl_k_yield>
     4ca:	e7fc      	b.n	4c6 <main+0x9e>
     4cc:	00006010 	.word	0x00006010
     4d0:	0000602d 	.word	0x0000602d
     4d4:	00006031 	.word	0x00006031
     4d8:	00000405 	.word	0x00000405
     4dc:	00006048 	.word	0x00006048
     4e0:	00006060 	.word	0x00006060
     4e4:	00006076 	.word	0x00006076
     4e8:	00006091 	.word	0x00006091
     4ec:	000060a6 	.word	0x000060a6

000004f0 <char_out>:

static int char_out(int c, void *ctx_p)
{
	struct out_context *ctx = ctx_p;

	ctx->count++;
     4f0:	680b      	ldr	r3, [r1, #0]
     4f2:	3301      	adds	r3, #1
     4f4:	600b      	str	r3, [r1, #0]
	return _char_out(c);
     4f6:	4b01      	ldr	r3, [pc, #4]	; (4fc <char_out+0xc>)
     4f8:	681b      	ldr	r3, [r3, #0]
     4fa:	4718      	bx	r3
     4fc:	200021b0 	.word	0x200021b0

00000500 <_printk_dec_ulong>:
 * @return N/A
 */
static void _printk_dec_ulong(out_func_t out, void *ctx,
			      const unsigned long num, enum pad_type padding,
			      int min_width)
{
     500:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
     504:	b085      	sub	sp, #20
     506:	469b      	mov	fp, r3
     508:	9c0e      	ldr	r4, [sp, #56]	; 0x38
     50a:	f8df 9088 	ldr.w	r9, [pc, #136]	; 594 <_printk_dec_ulong+0x94>
     50e:	2c01      	cmp	r4, #1
     510:	bfb8      	it	lt
     512:	2401      	movlt	r4, #1
     514:	2b01      	cmp	r3, #1
     516:	bf0c      	ite	eq
     518:	2330      	moveq	r3, #48	; 0x30
     51a:	2320      	movne	r3, #32
     51c:	4616      	mov	r6, r2
     51e:	4682      	mov	sl, r0
     520:	4688      	mov	r8, r1
     522:	9302      	str	r3, [sp, #8]
     524:	2501      	movs	r5, #1
     526:	270a      	movs	r7, #10
     528:	2200      	movs	r2, #0
	if (min_width <= 0) {
		min_width = 1;
	}

	while (pos >= 10) {
		if (found_largest_digit != 0 || remainder >= pos) {
     52a:	fbb6 f3f9 	udiv	r3, r6, r9
     52e:	9301      	str	r3, [sp, #4]
     530:	b90a      	cbnz	r2, 536 <_printk_dec_ulong+0x36>
     532:	45b1      	cmp	r9, r6
     534:	d81d      	bhi.n	572 <_printk_dec_ulong+0x72>
			found_largest_digit = 1;
			out((int)(remainder / pos + 48), ctx);
     536:	9b01      	ldr	r3, [sp, #4]
     538:	4641      	mov	r1, r8
     53a:	f103 0030 	add.w	r0, r3, #48	; 0x30
     53e:	47d0      	blx	sl
			digits++;
     540:	3501      	adds	r5, #1
			found_largest_digit = 1;
     542:	2201      	movs	r2, #1
				&& padding < PAD_SPACE_AFTER) {
			out((int)(padding == PAD_ZERO_BEFORE ? '0' : ' '), ctx);
			digits++;
		}
		remaining--;
		remainder %= pos;
     544:	9b01      	ldr	r3, [sp, #4]
		remaining--;
     546:	3f01      	subs	r7, #1
	while (pos >= 10) {
     548:	2f01      	cmp	r7, #1
		remainder %= pos;
     54a:	fb09 6613 	mls	r6, r9, r3, r6
		pos /= 10;
     54e:	f04f 030a 	mov.w	r3, #10
     552:	fbb9 f9f3 	udiv	r9, r9, r3
	while (pos >= 10) {
     556:	d1e8      	bne.n	52a <_printk_dec_ulong+0x2a>
	}
	out((int)(remainder + 48), ctx);
     558:	4641      	mov	r1, r8
     55a:	f106 0030 	add.w	r0, r6, #48	; 0x30
     55e:	47d0      	blx	sl

	if (padding == PAD_SPACE_AFTER) {
     560:	f1bb 0f03 	cmp.w	fp, #3
     564:	d102      	bne.n	56c <_printk_dec_ulong+0x6c>
		remaining = min_width - digits;
     566:	1b64      	subs	r4, r4, r5
		while (remaining-- > 0) {
     568:	2c00      	cmp	r4, #0
     56a:	dc0e      	bgt.n	58a <_printk_dec_ulong+0x8a>
			out(' ', ctx);
		}
	}
}
     56c:	b005      	add	sp, #20
     56e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
		} else if (remaining <= min_width
     572:	42bc      	cmp	r4, r7
     574:	dbe6      	blt.n	544 <_printk_dec_ulong+0x44>
				&& padding < PAD_SPACE_AFTER) {
     576:	f1bb 0f02 	cmp.w	fp, #2
     57a:	d8e3      	bhi.n	544 <_printk_dec_ulong+0x44>
			out((int)(padding == PAD_ZERO_BEFORE ? '0' : ' '), ctx);
     57c:	4641      	mov	r1, r8
     57e:	9802      	ldr	r0, [sp, #8]
     580:	9203      	str	r2, [sp, #12]
			digits++;
     582:	3501      	adds	r5, #1
			out((int)(padding == PAD_ZERO_BEFORE ? '0' : ' '), ctx);
     584:	47d0      	blx	sl
			digits++;
     586:	9a03      	ldr	r2, [sp, #12]
     588:	e7dc      	b.n	544 <_printk_dec_ulong+0x44>
			out(' ', ctx);
     58a:	4641      	mov	r1, r8
     58c:	2020      	movs	r0, #32
     58e:	47d0      	blx	sl
     590:	3c01      	subs	r4, #1
     592:	e7e9      	b.n	568 <_printk_dec_ulong+0x68>
     594:	3b9aca00 	.word	0x3b9aca00

00000598 <__printk_hook_install>:
	_char_out = fn;
     598:	4b01      	ldr	r3, [pc, #4]	; (5a0 <__printk_hook_install+0x8>)
     59a:	6018      	str	r0, [r3, #0]
}
     59c:	4770      	bx	lr
     59e:	bf00      	nop
     5a0:	200021b0 	.word	0x200021b0

000005a4 <vprintk>:
{
     5a4:	b507      	push	{r0, r1, r2, lr}
	struct out_context ctx = { 0 };
     5a6:	2300      	movs	r3, #0
     5a8:	9301      	str	r3, [sp, #4]
	z_vprintk(char_out, &ctx, fmt, ap);
     5aa:	4602      	mov	r2, r0
     5ac:	460b      	mov	r3, r1
     5ae:	4803      	ldr	r0, [pc, #12]	; (5bc <vprintk+0x18>)
     5b0:	a901      	add	r1, sp, #4
     5b2:	f004 f998 	bl	48e6 <z_vprintk>
}
     5b6:	b003      	add	sp, #12
     5b8:	f85d fb04 	ldr.w	pc, [sp], #4
     5bc:	000004f1 	.word	0x000004f1

000005c0 <enable_logger>:

K_THREAD_STACK_DEFINE(logging_stack, CONFIG_LOG_PROCESS_THREAD_STACK_SIZE);
struct k_thread logging_thread;

static int enable_logger(struct device *arg)
{
     5c0:	b530      	push	{r4, r5, lr}
	ARG_UNUSED(arg);

	if (IS_ENABLED(CONFIG_LOG_PROCESS_THREAD)) {
		k_timer_init(&log_process_thread_timer,
     5c2:	2200      	movs	r2, #0
{
     5c4:	b087      	sub	sp, #28
		k_timer_init(&log_process_thread_timer,
     5c6:	490d      	ldr	r1, [pc, #52]	; (5fc <enable_logger+0x3c>)
     5c8:	480d      	ldr	r0, [pc, #52]	; (600 <enable_logger+0x40>)
     5ca:	f005 fa9d 	bl	5b08 <k_timer_init>
	return z_impl_k_thread_create(new_thread, stack, stack_size, entry, p1, p2, p3, prio, options, delay);
     5ce:	4d0d      	ldr	r5, [pc, #52]	; (604 <enable_logger+0x44>)
     5d0:	490d      	ldr	r1, [pc, #52]	; (608 <enable_logger+0x48>)
     5d2:	2400      	movs	r4, #0
     5d4:	230e      	movs	r3, #14
     5d6:	e9cd 4302 	strd	r4, r3, [sp, #8]
     5da:	e9cd 4404 	strd	r4, r4, [sp, #16]
     5de:	e9cd 4400 	strd	r4, r4, [sp]
     5e2:	4b0a      	ldr	r3, [pc, #40]	; (60c <enable_logger+0x4c>)
     5e4:	f44f 7240 	mov.w	r2, #768	; 0x300
     5e8:	4628      	mov	r0, r5
     5ea:	f003 fd99 	bl	4120 <z_impl_k_thread_create>
	return z_impl_k_thread_name_set(thread_id, value);
     5ee:	4908      	ldr	r1, [pc, #32]	; (610 <enable_logger+0x50>)
     5f0:	4628      	mov	r0, r5
     5f2:	f005 fa31 	bl	5a58 <z_impl_k_thread_name_set>
	} else {
		log_init();
	}

	return 0;
}
     5f6:	4620      	mov	r0, r4
     5f8:	b007      	add	sp, #28
     5fa:	bd30      	pop	{r4, r5, pc}
     5fc:	00000615 	.word	0x00000615
     600:	2000001c 	.word	0x2000001c
     604:	20000064 	.word	0x20000064
     608:	20000cd0 	.word	0x20000cd0
     60c:	00000a05 	.word	0x00000a05
     610:	000060dc 	.word	0x000060dc

00000614 <log_process_thread_timer_expiry_fn>:
		arch_syscall_invoke1(*(uintptr_t *)&sem, K_SYSCALL_K_SEM_GIVE);
		return;
	}
#endif
	compiler_barrier();
	z_impl_k_sem_give(sem);
     614:	4801      	ldr	r0, [pc, #4]	; (61c <log_process_thread_timer_expiry_fn+0x8>)
     616:	f003 bcfd 	b.w	4014 <z_impl_k_sem_give>
     61a:	bf00      	nop
     61c:	200022d8 	.word	0x200022d8

00000620 <log_core_init>:
{
     620:	b508      	push	{r3, lr}
		log_msg_pool_init();
     622:	f000 fa4f 	bl	ac4 <log_msg_pool_init>
		log_list_init(&list);
     626:	4809      	ldr	r0, [pc, #36]	; (64c <log_core_init+0x2c>)
     628:	f004 fae5 	bl	4bf6 <log_list_init>
		k_mem_slab_init(&log_strdup_pool, log_strdup_pool_buf,
     62c:	2304      	movs	r3, #4
     62e:	2228      	movs	r2, #40	; 0x28
     630:	4907      	ldr	r1, [pc, #28]	; (650 <log_core_init+0x30>)
     632:	4808      	ldr	r0, [pc, #32]	; (654 <log_core_init+0x34>)
     634:	f005 f935 	bl	58a2 <k_mem_slab_init>
		timestamp_func = k_cycle_get_32_wrapper;
     638:	4b07      	ldr	r3, [pc, #28]	; (658 <log_core_init+0x38>)
     63a:	4a08      	ldr	r2, [pc, #32]	; (65c <log_core_init+0x3c>)
     63c:	601a      	str	r2, [r3, #0]
	log_output_timestamp_freq_set(freq);
     63e:	f44f 4000 	mov.w	r0, #32768	; 0x8000
}
     642:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
	log_output_timestamp_freq_set(freq);
     646:	f000 bc7d 	b.w	f44 <log_output_timestamp_freq_set>
     64a:	bf00      	nop
     64c:	20000014 	.word	0x20000014
     650:	20001d10 	.word	0x20001d10
     654:	20000048 	.word	0x20000048
     658:	200021b4 	.word	0x200021b4
     65c:	00004c35 	.word	0x00004c35

00000660 <dropped_notify>:
{
     660:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
{
	/* This builtin, as described by Intel, is not a traditional
	 * test-and-set operation, but rather an atomic exchange operation. It
	 * writes value into *ptr, and returns the previous contents of *ptr.
	 */
	return __atomic_exchange_n(target, value, __ATOMIC_SEQ_CST);
     662:	4b0f      	ldr	r3, [pc, #60]	; (6a0 <dropped_notify+0x40>)
     664:	f3bf 8f5b 	dmb	ish
     668:	2500      	movs	r5, #0
     66a:	e853 7f00 	ldrex	r7, [r3]
     66e:	e843 5200 	strex	r2, r5, [r3]
     672:	2a00      	cmp	r2, #0
     674:	d1f9      	bne.n	66a <dropped_notify+0xa>
     676:	f3bf 8f5b 	dmb	ish
 *
 * @return Number of backends.
 */
static inline int log_backend_count_get(void)
{
	return __log_backends_end - __log_backends_start;
     67a:	4c0a      	ldr	r4, [pc, #40]	; (6a4 <dropped_notify+0x44>)
     67c:	4e0a      	ldr	r6, [pc, #40]	; (6a8 <dropped_notify+0x48>)
     67e:	1b36      	subs	r6, r6, r4
     680:	1136      	asrs	r6, r6, #4
	for (int i = 0; i < log_backend_count_get(); i++) {
     682:	42b5      	cmp	r5, r6
     684:	db00      	blt.n	688 <dropped_notify+0x28>
}
     686:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 */
static inline bool log_backend_is_active(
				const struct log_backend *const backend)
{
	__ASSERT_NO_MSG(backend != NULL);
	return backend->cb->active;
     688:	6863      	ldr	r3, [r4, #4]
		if (log_backend_is_active(backend)) {
     68a:	795b      	ldrb	r3, [r3, #5]
     68c:	b12b      	cbz	r3, 69a <dropped_notify+0x3a>
	if (backend->api->dropped != NULL) {
     68e:	6823      	ldr	r3, [r4, #0]
     690:	68db      	ldr	r3, [r3, #12]
     692:	b113      	cbz	r3, 69a <dropped_notify+0x3a>
		backend->api->dropped(backend, cnt);
     694:	4639      	mov	r1, r7
     696:	4620      	mov	r0, r4
     698:	4798      	blx	r3
	for (int i = 0; i < log_backend_count_get(); i++) {
     69a:	3501      	adds	r5, #1
     69c:	3410      	adds	r4, #16
     69e:	e7f0      	b.n	682 <dropped_notify+0x22>
     6a0:	2000000c 	.word	0x2000000c
     6a4:	00005de0 	.word	0x00005de0
     6a8:	00005e00 	.word	0x00005e00

000006ac <log_dropped>:
	return __atomic_fetch_add(target, value, __ATOMIC_SEQ_CST);
     6ac:	4b06      	ldr	r3, [pc, #24]	; (6c8 <log_dropped+0x1c>)
     6ae:	f3bf 8f5b 	dmb	ish
     6b2:	e853 2f00 	ldrex	r2, [r3]
     6b6:	3201      	adds	r2, #1
     6b8:	e843 2100 	strex	r1, r2, [r3]
     6bc:	2900      	cmp	r1, #0
     6be:	d1f8      	bne.n	6b2 <log_dropped+0x6>
     6c0:	f3bf 8f5b 	dmb	ish
}
     6c4:	4770      	bx	lr
     6c6:	bf00      	nop
     6c8:	2000000c 	.word	0x2000000c

000006cc <log_source_name_get>:
 * @return Source ID.
 */
static inline u32_t log_const_source_id(
				const struct log_source_const_data *data)
{
	return ((u8_t *)data - (u8_t *)__log_const_start)/
     6cc:	4a04      	ldr	r2, [pc, #16]	; (6e0 <log_source_name_get+0x14>)
     6ce:	4b05      	ldr	r3, [pc, #20]	; (6e4 <log_source_name_get+0x18>)
     6d0:	1a9b      	subs	r3, r3, r2
	return src_id < log_sources_count() ? log_name_get(src_id) : NULL;
     6d2:	ebb1 0fd3 	cmp.w	r1, r3, lsr #3
	return __log_const_start[source_id].name;
     6d6:	bf34      	ite	cc
     6d8:	f852 0031 	ldrcc.w	r0, [r2, r1, lsl #3]
     6dc:	2000      	movcs	r0, #0
}
     6de:	4770      	bx	lr
     6e0:	00005da0 	.word	0x00005da0
     6e4:	00005de0 	.word	0x00005de0

000006e8 <log_backend_enable>:
	id += backend - log_backend_get(0);
     6e8:	4b09      	ldr	r3, [pc, #36]	; (710 <log_backend_enable+0x28>)
	log_backend_id_set(backend, id);
     6ea:	6842      	ldr	r2, [r0, #4]
	id += backend - log_backend_get(0);
     6ec:	1ac3      	subs	r3, r0, r3
     6ee:	111b      	asrs	r3, r3, #4
     6f0:	3301      	adds	r3, #1
{
     6f2:	b510      	push	{r4, lr}
	log_backend_id_set(backend, id);
     6f4:	7113      	strb	r3, [r2, #4]
	log_backend_activate(backend, ctx);
     6f6:	6843      	ldr	r3, [r0, #4]
	if (!backend_attached) {
     6f8:	4c06      	ldr	r4, [pc, #24]	; (714 <log_backend_enable+0x2c>)
	backend->cb->ctx = ctx;
     6fa:	6019      	str	r1, [r3, #0]
	backend->cb->active = true;
     6fc:	2201      	movs	r2, #1
     6fe:	715a      	strb	r2, [r3, #5]
     700:	7822      	ldrb	r2, [r4, #0]
     702:	b912      	cbnz	r2, 70a <log_backend_enable+0x22>
     704:	4804      	ldr	r0, [pc, #16]	; (718 <log_backend_enable+0x30>)
     706:	f003 fc85 	bl	4014 <z_impl_k_sem_give>
	backend_attached = true;
     70a:	2301      	movs	r3, #1
     70c:	7023      	strb	r3, [r4, #0]
}
     70e:	bd10      	pop	{r4, pc}
     710:	00005de0 	.word	0x00005de0
     714:	200008a5 	.word	0x200008a5
     718:	200022d8 	.word	0x200022d8

0000071c <log_init>:
{
     71c:	b570      	push	{r4, r5, r6, lr}
     71e:	4b11      	ldr	r3, [pc, #68]	; (764 <log_init+0x48>)
     720:	f3bf 8f5b 	dmb	ish
     724:	e853 5f00 	ldrex	r5, [r3]
     728:	1c6a      	adds	r2, r5, #1
     72a:	e843 2100 	strex	r1, r2, [r3]
     72e:	2900      	cmp	r1, #0
     730:	d1f8      	bne.n	724 <log_init+0x8>
     732:	f3bf 8f5b 	dmb	ish
	if (atomic_inc(&initialized) != 0) {
     736:	b92d      	cbnz	r5, 744 <log_init+0x28>
	return __log_backends_end - __log_backends_start;
     738:	4c0b      	ldr	r4, [pc, #44]	; (768 <log_init+0x4c>)
     73a:	4e0c      	ldr	r6, [pc, #48]	; (76c <log_init+0x50>)
     73c:	1b36      	subs	r6, r6, r4
     73e:	1136      	asrs	r6, r6, #4
	for (i = 0; i < log_backend_count_get(); i++) {
     740:	42b5      	cmp	r5, r6
     742:	db00      	blt.n	746 <log_init+0x2a>
}
     744:	bd70      	pop	{r4, r5, r6, pc}
		if (backend->autostart) {
     746:	7b23      	ldrb	r3, [r4, #12]
     748:	b143      	cbz	r3, 75c <log_init+0x40>
			if (backend->api->init != NULL) {
     74a:	6823      	ldr	r3, [r4, #0]
     74c:	695b      	ldr	r3, [r3, #20]
     74e:	b103      	cbz	r3, 752 <log_init+0x36>
				backend->api->init();
     750:	4798      	blx	r3
			log_backend_enable(backend, NULL, CONFIG_LOG_MAX_LEVEL);
     752:	2204      	movs	r2, #4
     754:	2100      	movs	r1, #0
     756:	4620      	mov	r0, r4
     758:	f7ff ffc6 	bl	6e8 <log_backend_enable>
	for (i = 0; i < log_backend_count_get(); i++) {
     75c:	3501      	adds	r5, #1
     75e:	3410      	adds	r4, #16
     760:	e7ee      	b.n	740 <log_init+0x24>
     762:	bf00      	nop
     764:	20000010 	.word	0x20000010
     768:	00005de0 	.word	0x00005de0
     76c:	00005e00 	.word	0x00005e00

00000770 <log_strdup>:
	return (((const char *)addr >= (const char *)RO_START) &&
     770:	4b16      	ldr	r3, [pc, #88]	; (7cc <log_strdup+0x5c>)
     772:	4298      	cmp	r0, r3
{
     774:	b537      	push	{r0, r1, r2, r4, r5, lr}
     776:	4604      	mov	r4, r0
	return (((const char *)addr >= (const char *)RO_START) &&
     778:	d302      	bcc.n	780 <log_strdup+0x10>
	if (IS_ENABLED(CONFIG_LOG_IMMEDIATE) ||
     77a:	4b15      	ldr	r3, [pc, #84]	; (7d0 <log_strdup+0x60>)
     77c:	4298      	cmp	r0, r3
     77e:	d31f      	bcc.n	7c0 <log_strdup+0x50>
	err = k_mem_slab_alloc(&log_strdup_pool, (void **)&dup, K_NO_WAIT);
     780:	2200      	movs	r2, #0
     782:	a901      	add	r1, sp, #4
     784:	4813      	ldr	r0, [pc, #76]	; (7d4 <log_strdup+0x64>)
     786:	f002 ffeb 	bl	3760 <k_mem_slab_alloc>
	if (err != 0) {
     78a:	4605      	mov	r5, r0
     78c:	b9d8      	cbnz	r0, 7c6 <log_strdup+0x56>
	return __atomic_exchange_n(target, value, __ATOMIC_SEQ_CST);
     78e:	2201      	movs	r2, #1
     790:	9b01      	ldr	r3, [sp, #4]
     792:	f3bf 8f5b 	dmb	ish
     796:	e853 1f00 	ldrex	r1, [r3]
     79a:	e843 2000 	strex	r0, r2, [r3]
     79e:	2800      	cmp	r0, #0
     7a0:	d1f9      	bne.n	796 <log_strdup+0x26>
     7a2:	f3bf 8f5b 	dmb	ish
	strncpy(dup->buf, str, sizeof(dup->buf) - 2);
     7a6:	9801      	ldr	r0, [sp, #4]
     7a8:	4621      	mov	r1, r4
     7aa:	221f      	movs	r2, #31
     7ac:	3004      	adds	r0, #4
     7ae:	f004 fe50 	bl	5452 <strncpy>
	dup->buf[sizeof(dup->buf) - 2] = '~';
     7b2:	9c01      	ldr	r4, [sp, #4]
     7b4:	237e      	movs	r3, #126	; 0x7e
     7b6:	f884 3023 	strb.w	r3, [r4, #35]	; 0x23
	dup->buf[sizeof(dup->buf) - 1] = '\0';
     7ba:	f884 5024 	strb.w	r5, [r4, #36]	; 0x24
	return dup->buf;
     7be:	3404      	adds	r4, #4
}
     7c0:	4620      	mov	r0, r4
     7c2:	b003      	add	sp, #12
     7c4:	bd30      	pop	{r4, r5, pc}
		return (char *)log_strdup_fail_msg;
     7c6:	4c04      	ldr	r4, [pc, #16]	; (7d8 <log_strdup+0x68>)
     7c8:	e7fa      	b.n	7c0 <log_strdup+0x50>
     7ca:	bf00      	nop
     7cc:	00005b78 	.word	0x00005b78
     7d0:	000067fc 	.word	0x000067fc
     7d4:	20000048 	.word	0x20000048
     7d8:	000060e4 	.word	0x000060e4

000007dc <log_is_strdup>:
	return PART_OF_ARRAY(log_strdup_pool_buf, (u8_t *)buf);
     7dc:	b148      	cbz	r0, 7f2 <log_is_strdup+0x16>
     7de:	4b05      	ldr	r3, [pc, #20]	; (7f4 <log_is_strdup+0x18>)
     7e0:	4298      	cmp	r0, r3
     7e2:	d305      	bcc.n	7f0 <log_is_strdup+0x14>
     7e4:	33a0      	adds	r3, #160	; 0xa0
     7e6:	4298      	cmp	r0, r3
     7e8:	bf2c      	ite	cs
     7ea:	2000      	movcs	r0, #0
     7ec:	2001      	movcc	r0, #1
     7ee:	4770      	bx	lr
     7f0:	2000      	movs	r0, #0
}
     7f2:	4770      	bx	lr
     7f4:	20001d10 	.word	0x20001d10

000007f8 <z_impl_log_process>:
{
     7f8:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
	if (!backend_attached && !bypass) {
     7fc:	4b46      	ldr	r3, [pc, #280]	; (918 <CONFIG_ISR_STACK_SIZE+0x118>)
     7fe:	781b      	ldrb	r3, [r3, #0]
{
     800:	4605      	mov	r5, r0
	if (!backend_attached && !bypass) {
     802:	b903      	cbnz	r3, 806 <CONFIG_ISR_STACK_SIZE+0x6>
     804:	b360      	cbz	r0, 860 <CONFIG_ISR_STACK_SIZE+0x60>
		:
		: "memory");
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	unsigned int tmp;

	__asm__ volatile(
     806:	f04f 0320 	mov.w	r3, #32
     80a:	f3ef 8611 	mrs	r6, BASEPRI
     80e:	f383 8811 	msr	BASEPRI, r3
     812:	f3bf 8f6f 	isb	sy
	msg = log_list_head_get(&list);
     816:	4841      	ldr	r0, [pc, #260]	; (91c <CONFIG_ISR_STACK_SIZE+0x11c>)
     818:	f004 f9fd 	bl	4c16 <log_list_head_get>
     81c:	4604      	mov	r4, r0
	__asm__ volatile(
		"cpsie i;"
		"isb"
		: : : "memory");
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	__asm__ volatile(
     81e:	f386 8811 	msr	BASEPRI, r6
     822:	f3bf 8f6f 	isb	sy
	if (msg != NULL) {
     826:	b178      	cbz	r0, 848 <CONFIG_ISR_STACK_SIZE+0x48>
	return __atomic_fetch_sub(target, value, __ATOMIC_SEQ_CST);
     828:	f3bf 8f5b 	dmb	ish
     82c:	4b3c      	ldr	r3, [pc, #240]	; (920 <CONFIG_ISR_STACK_SIZE+0x120>)
     82e:	e853 2f00 	ldrex	r2, [r3]
     832:	3a01      	subs	r2, #1
     834:	e843 2100 	strex	r1, r2, [r3]
     838:	2900      	cmp	r1, #0
     83a:	d1f8      	bne.n	82e <CONFIG_ISR_STACK_SIZE+0x2e>
     83c:	f3bf 8f5b 	dmb	ish
	if (!bypass) {
     840:	b18d      	cbz	r5, 866 <CONFIG_ISR_STACK_SIZE+0x66>
	log_msg_put(msg);
     842:	4620      	mov	r0, r4
     844:	f004 faed 	bl	4e22 <log_msg_put>
	if (!bypass && dropped_cnt) {
     848:	b925      	cbnz	r5, 854 <CONFIG_ISR_STACK_SIZE+0x54>
     84a:	4b36      	ldr	r3, [pc, #216]	; (924 <CONFIG_ISR_STACK_SIZE+0x124>)
     84c:	681b      	ldr	r3, [r3, #0]
     84e:	b10b      	cbz	r3, 854 <CONFIG_ISR_STACK_SIZE+0x54>
		dropped_notify();
     850:	f7ff ff06 	bl	660 <dropped_notify>
	return (log_list_head_peek(&list) != NULL);
     854:	4831      	ldr	r0, [pc, #196]	; (91c <CONFIG_ISR_STACK_SIZE+0x11c>)
     856:	f004 f9dc 	bl	4c12 <log_list_head_peek>
     85a:	1c05      	adds	r5, r0, #0
     85c:	bf18      	it	ne
     85e:	2501      	movne	r5, #1
}
     860:	4628      	mov	r0, r5
     862:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
		    !panic_mode) {
     866:	4b30      	ldr	r3, [pc, #192]	; (928 <CONFIG_ISR_STACK_SIZE+0x128>)
		if (IS_ENABLED(CONFIG_LOG_DETECT_MISSED_STRDUP) &&
     868:	781b      	ldrb	r3, [r3, #0]
     86a:	b9ab      	cbnz	r3, 898 <CONFIG_ISR_STACK_SIZE+0x98>
 * @retval true  Standard message.
 * @retval false Hexdump message.
 */
static inline bool log_msg_is_std(struct log_msg *msg)
{
	return  (msg->hdr.params.generic.type == LOG_MSG_TYPE_STD);
     86c:	7a23      	ldrb	r3, [r4, #8]
	if (!log_msg_is_std(msg)) {
     86e:	07db      	lsls	r3, r3, #31
     870:	d412      	bmi.n	898 <CONFIG_ISR_STACK_SIZE+0x98>
	msg_str = log_msg_str_get(msg);
     872:	f004 fae9 	bl	4e48 <log_msg_str_get>
     876:	4681      	mov	r9, r0
	mask = z_log_get_s_mask(msg_str, log_msg_nargs_get(msg));
     878:	4620      	mov	r0, r4
     87a:	f004 fab2 	bl	4de2 <log_msg_nargs_get>
     87e:	4601      	mov	r1, r0
     880:	4648      	mov	r0, r9
     882:	f004 f9db 	bl	4c3c <z_log_get_s_mask>
	return ((u8_t *)data - (u8_t *)__log_const_start)/
     886:	4b29      	ldr	r3, [pc, #164]	; (92c <CONFIG_ISR_STACK_SIZE+0x12c>)
				LOG_ERR(ERR_MSG, idx, msg_str);
     888:	4a29      	ldr	r2, [pc, #164]	; (930 <CONFIG_ISR_STACK_SIZE+0x130>)
     88a:	f8df b0bc 	ldr.w	fp, [pc, #188]	; 948 <CONFIG_ISR_STACK_SIZE+0x148>
     88e:	1a9b      	subs	r3, r3, r2
	mask = z_log_get_s_mask(msg_str, log_msg_nargs_get(msg));
     890:	4607      	mov	r7, r0
				LOG_ERR(ERR_MSG, idx, msg_str);
     892:	f3c3 0ac9 	ubfx	sl, r3, #3, #10
	while (mask) {
     896:	b937      	cbnz	r7, 8a6 <CONFIG_ISR_STACK_SIZE+0xa6>
     898:	4e26      	ldr	r6, [pc, #152]	; (934 <CONFIG_ISR_STACK_SIZE+0x134>)
     89a:	4f27      	ldr	r7, [pc, #156]	; (938 <CONFIG_ISR_STACK_SIZE+0x138>)
     89c:	1bbf      	subs	r7, r7, r6
     89e:	113f      	asrs	r7, r7, #4
     8a0:	f04f 0800 	mov.w	r8, #0
     8a4:	e034      	b.n	910 <CONFIG_ISR_STACK_SIZE+0x110>
		idx = 31 - __builtin_clz(mask);
     8a6:	fab7 f687 	clz	r6, r7
     8aa:	f1c6 061f 	rsb	r6, r6, #31
		str = (const char *)log_msg_arg_get(msg, idx);
     8ae:	4631      	mov	r1, r6
     8b0:	4620      	mov	r0, r4
     8b2:	f004 fa99 	bl	4de8 <log_msg_arg_get>
	return (((const char *)addr >= (const char *)RO_START) &&
     8b6:	4b21      	ldr	r3, [pc, #132]	; (93c <CONFIG_ISR_STACK_SIZE+0x13c>)
     8b8:	4298      	cmp	r0, r3
		str = (const char *)log_msg_arg_get(msg, idx);
     8ba:	4602      	mov	r2, r0
	return (((const char *)addr >= (const char *)RO_START) &&
     8bc:	d302      	bcc.n	8c4 <CONFIG_ISR_STACK_SIZE+0xc4>
		if (!is_rodata(str) && !log_is_strdup(str) &&
     8be:	4b20      	ldr	r3, [pc, #128]	; (940 <CONFIG_ISR_STACK_SIZE+0x140>)
     8c0:	4298      	cmp	r0, r3
     8c2:	d314      	bcc.n	8ee <CONFIG_ISR_STACK_SIZE+0xee>
     8c4:	4610      	mov	r0, r2
     8c6:	f7ff ff89 	bl	7dc <log_is_strdup>
     8ca:	b980      	cbnz	r0, 8ee <CONFIG_ISR_STACK_SIZE+0xee>
     8cc:	4b1d      	ldr	r3, [pc, #116]	; (944 <CONFIG_ISR_STACK_SIZE+0x144>)
     8ce:	429a      	cmp	r2, r3
     8d0:	d00d      	beq.n	8ee <CONFIG_ISR_STACK_SIZE+0xee>
				LOG_ERR(ERR_MSG, idx, msg_str);
     8d2:	f028 033f 	bic.w	r3, r8, #63	; 0x3f
     8d6:	f043 0301 	orr.w	r3, r3, #1
     8da:	f363 0807 	bfi	r8, r3, #0, #8
     8de:	f36a 188f 	bfi	r8, sl, #6, #10
     8e2:	4643      	mov	r3, r8
     8e4:	464a      	mov	r2, r9
     8e6:	4631      	mov	r1, r6
     8e8:	4658      	mov	r0, fp
     8ea:	f004 f9e8 	bl	4cbe <log_2>
		mask &= ~BIT(idx);
     8ee:	2301      	movs	r3, #1
     8f0:	fa03 f606 	lsl.w	r6, r3, r6
     8f4:	ea27 0706 	bic.w	r7, r7, r6
     8f8:	e7cd      	b.n	896 <CONFIG_ISR_STACK_SIZE+0x96>
	return backend->cb->active;
     8fa:	6873      	ldr	r3, [r6, #4]
			if (log_backend_is_active(backend) &&
     8fc:	795b      	ldrb	r3, [r3, #5]
     8fe:	b123      	cbz	r3, 90a <CONFIG_ISR_STACK_SIZE+0x10a>
	backend->api->put(backend, msg);
     900:	6833      	ldr	r3, [r6, #0]
     902:	4621      	mov	r1, r4
     904:	681b      	ldr	r3, [r3, #0]
     906:	4630      	mov	r0, r6
     908:	4798      	blx	r3
		for (int i = 0; i < log_backend_count_get(); i++) {
     90a:	f108 0801 	add.w	r8, r8, #1
     90e:	3610      	adds	r6, #16
     910:	45b8      	cmp	r8, r7
     912:	dbf2      	blt.n	8fa <CONFIG_ISR_STACK_SIZE+0xfa>
     914:	e795      	b.n	842 <CONFIG_ISR_STACK_SIZE+0x42>
     916:	bf00      	nop
     918:	200008a5 	.word	0x200008a5
     91c:	20000014 	.word	0x20000014
     920:	20000008 	.word	0x20000008
     924:	2000000c 	.word	0x2000000c
     928:	200008a6 	.word	0x200008a6
     92c:	00005db0 	.word	0x00005db0
     930:	00005da0 	.word	0x00005da0
     934:	00005de0 	.word	0x00005de0
     938:	00005e00 	.word	0x00005e00
     93c:	00005b78 	.word	0x00005b78
     940:	000067fc 	.word	0x000067fc
     944:	000060e4 	.word	0x000060e4
     948:	00006102 	.word	0x00006102

0000094c <msg_finalize>:
	msg->hdr.timestamp = timestamp_func();
     94c:	4b26      	ldr	r3, [pc, #152]	; (9e8 <msg_finalize+0x9c>)
{
     94e:	b570      	push	{r4, r5, r6, lr}
	msg->hdr.timestamp = timestamp_func();
     950:	681b      	ldr	r3, [r3, #0]
	msg->hdr.ids = src_level;
     952:	8141      	strh	r1, [r0, #10]
{
     954:	4605      	mov	r5, r0
	msg->hdr.timestamp = timestamp_func();
     956:	4798      	blx	r3
	return __atomic_fetch_add(target, value, __ATOMIC_SEQ_CST);
     958:	4c24      	ldr	r4, [pc, #144]	; (9ec <msg_finalize+0xa0>)
     95a:	60e8      	str	r0, [r5, #12]
     95c:	f3bf 8f5b 	dmb	ish
     960:	e854 3f00 	ldrex	r3, [r4]
     964:	3301      	adds	r3, #1
     966:	e844 3200 	strex	r2, r3, [r4]
     96a:	2a00      	cmp	r2, #0
     96c:	d1f8      	bne.n	960 <msg_finalize+0x14>
     96e:	f3bf 8f5b 	dmb	ish
	__asm__ volatile(
     972:	f04f 0320 	mov.w	r3, #32
     976:	f3ef 8611 	mrs	r6, BASEPRI
     97a:	f383 8811 	msr	BASEPRI, r3
     97e:	f3bf 8f6f 	isb	sy
	log_list_add_tail(&list, msg);
     982:	481b      	ldr	r0, [pc, #108]	; (9f0 <msg_finalize+0xa4>)
     984:	4629      	mov	r1, r5
     986:	f004 f93a 	bl	4bfe <log_list_add_tail>
	__asm__ volatile(
     98a:	f386 8811 	msr	BASEPRI, r6
     98e:	f3bf 8f6f 	isb	sy
	if (panic_mode) {
     992:	4b18      	ldr	r3, [pc, #96]	; (9f4 <msg_finalize+0xa8>)
     994:	781a      	ldrb	r2, [r3, #0]
     996:	b17a      	cbz	r2, 9b8 <msg_finalize+0x6c>
	__asm__ volatile(
     998:	f04f 0320 	mov.w	r3, #32
     99c:	f3ef 8411 	mrs	r4, BASEPRI
     9a0:	f383 8811 	msr	BASEPRI, r3
     9a4:	f3bf 8f6f 	isb	sy
	if (z_syscall_trap()) {
		return (bool) arch_syscall_invoke1(*(uintptr_t *)&bypass, K_SYSCALL_LOG_PROCESS);
	}
#endif
	compiler_barrier();
	return z_impl_log_process(bypass);
     9a8:	2000      	movs	r0, #0
     9aa:	f7ff ff25 	bl	7f8 <z_impl_log_process>
	__asm__ volatile(
     9ae:	f384 8811 	msr	BASEPRI, r4
     9b2:	f3bf 8f6f 	isb	sy
}
     9b6:	bd70      	pop	{r4, r5, r6, pc}
	} else if (proc_tid != NULL && buffered_cnt == 1) {
     9b8:	490f      	ldr	r1, [pc, #60]	; (9f8 <msg_finalize+0xac>)
     9ba:	6823      	ldr	r3, [r4, #0]
     9bc:	6809      	ldr	r1, [r1, #0]
     9be:	2900      	cmp	r1, #0
     9c0:	d0f9      	beq.n	9b6 <msg_finalize+0x6a>
     9c2:	2b01      	cmp	r3, #1
     9c4:	d106      	bne.n	9d4 <msg_finalize+0x88>
	z_impl_k_timer_start(timer, duration, period);
     9c6:	f44f 717a 	mov.w	r1, #1000	; 0x3e8
     9ca:	480c      	ldr	r0, [pc, #48]	; (9fc <msg_finalize+0xb0>)
}
     9cc:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
     9d0:	f003 bd64 	b.w	449c <z_impl_k_timer_start>
		if ((buffered_cnt == CONFIG_LOG_PROCESS_TRIGGER_THRESHOLD) &&
     9d4:	2b0a      	cmp	r3, #10
     9d6:	d1ee      	bne.n	9b6 <msg_finalize+0x6a>
	z_impl_k_timer_stop(timer);
     9d8:	4808      	ldr	r0, [pc, #32]	; (9fc <msg_finalize+0xb0>)
     9da:	f005 f8a1 	bl	5b20 <z_impl_k_timer_stop>
	z_impl_k_sem_give(sem);
     9de:	4808      	ldr	r0, [pc, #32]	; (a00 <msg_finalize+0xb4>)
}
     9e0:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
     9e4:	f003 bb16 	b.w	4014 <z_impl_k_sem_give>
     9e8:	200021b4 	.word	0x200021b4
     9ec:	20000008 	.word	0x20000008
     9f0:	20000014 	.word	0x20000014
     9f4:	200008a6 	.word	0x200008a6
     9f8:	200000d0 	.word	0x200000d0
     9fc:	2000001c 	.word	0x2000001c
     a00:	200022d8 	.word	0x200022d8

00000a04 <log_process_thread_func>:
{
     a04:	b508      	push	{r3, lr}
	log_init();
     a06:	f7ff fe89 	bl	71c <log_init>
	return z_impl_k_current_get();
     a0a:	f003 fafd 	bl	4008 <z_impl_k_current_get>
	proc_tid = process_tid;
     a0e:	4b0b      	ldr	r3, [pc, #44]	; (a3c <log_process_thread_func+0x38>)
     a10:	6018      	str	r0, [r3, #0]
	if (CONFIG_LOG_PROCESS_TRIGGER_THRESHOLD &&
     a12:	b130      	cbz	r0, a22 <log_process_thread_func+0x1e>
	    buffered_cnt >= CONFIG_LOG_PROCESS_TRIGGER_THRESHOLD) {
     a14:	4b0a      	ldr	r3, [pc, #40]	; (a40 <log_process_thread_func+0x3c>)
	    process_tid &&
     a16:	681b      	ldr	r3, [r3, #0]
     a18:	2b09      	cmp	r3, #9
     a1a:	dd02      	ble.n	a22 <log_process_thread_func+0x1e>
	z_impl_k_sem_give(sem);
     a1c:	4809      	ldr	r0, [pc, #36]	; (a44 <log_process_thread_func+0x40>)
     a1e:	f003 faf9 	bl	4014 <z_impl_k_sem_give>
	return z_impl_k_sem_take(sem, timeout);
     a22:	4c08      	ldr	r4, [pc, #32]	; (a44 <log_process_thread_func+0x40>)
     a24:	2000      	movs	r0, #0
     a26:	f7ff fee7 	bl	7f8 <z_impl_log_process>
		if (log_process(false) == false) {
     a2a:	2800      	cmp	r0, #0
     a2c:	d1fa      	bne.n	a24 <log_process_thread_func+0x20>
     a2e:	f04f 31ff 	mov.w	r1, #4294967295
     a32:	4620      	mov	r0, r4
     a34:	f003 fb14 	bl	4060 <z_impl_k_sem_take>
     a38:	e7f4      	b.n	a24 <log_process_thread_func+0x20>
     a3a:	bf00      	nop
     a3c:	200000d0 	.word	0x200000d0
     a40:	20000008 	.word	0x20000008
     a44:	200022d8 	.word	0x200022d8

00000a48 <z_impl_log_panic>:
{
     a48:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
	if (panic_mode) {
     a4a:	4f0e      	ldr	r7, [pc, #56]	; (a84 <z_impl_log_panic+0x3c>)
     a4c:	783d      	ldrb	r5, [r7, #0]
     a4e:	b975      	cbnz	r5, a6e <z_impl_log_panic+0x26>
	return __log_backends_end - __log_backends_start;
     a50:	4c0d      	ldr	r4, [pc, #52]	; (a88 <z_impl_log_panic+0x40>)
     a52:	4e0e      	ldr	r6, [pc, #56]	; (a8c <z_impl_log_panic+0x44>)
	log_init();
     a54:	f7ff fe62 	bl	71c <log_init>
     a58:	1b36      	subs	r6, r6, r4
     a5a:	1136      	asrs	r6, r6, #4
	for (int i = 0; i < log_backend_count_get(); i++) {
     a5c:	42b5      	cmp	r5, r6
     a5e:	db07      	blt.n	a70 <z_impl_log_panic+0x28>
     a60:	2000      	movs	r0, #0
     a62:	f7ff fec9 	bl	7f8 <z_impl_log_process>
		while (log_process(false) == true) {
     a66:	2800      	cmp	r0, #0
     a68:	d1fa      	bne.n	a60 <z_impl_log_panic+0x18>
	panic_mode = true;
     a6a:	2301      	movs	r3, #1
     a6c:	703b      	strb	r3, [r7, #0]
}
     a6e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	return backend->cb->active;
     a70:	6863      	ldr	r3, [r4, #4]
		if (log_backend_is_active(backend)) {
     a72:	795b      	ldrb	r3, [r3, #5]
     a74:	b11b      	cbz	r3, a7e <z_impl_log_panic+0x36>
	backend->api->panic(backend);
     a76:	6823      	ldr	r3, [r4, #0]
     a78:	4620      	mov	r0, r4
     a7a:	691b      	ldr	r3, [r3, #16]
     a7c:	4798      	blx	r3
	for (int i = 0; i < log_backend_count_get(); i++) {
     a7e:	3501      	adds	r5, #1
     a80:	3410      	adds	r4, #16
     a82:	e7eb      	b.n	a5c <z_impl_log_panic+0x14>
     a84:	200008a6 	.word	0x200008a6
     a88:	00005de0 	.word	0x00005de0
     a8c:	00005e00 	.word	0x00005e00

00000a90 <log_free>:
{
     a90:	b507      	push	{r0, r1, r2, lr}
	struct log_strdup_buf *dup = CONTAINER_OF(str, struct log_strdup_buf,
     a92:	3804      	subs	r0, #4
     a94:	9001      	str	r0, [sp, #4]
	return __atomic_fetch_sub(target, value, __ATOMIC_SEQ_CST);
     a96:	f3bf 8f5b 	dmb	ish
     a9a:	e850 3f00 	ldrex	r3, [r0]
     a9e:	1e5a      	subs	r2, r3, #1
     aa0:	e840 2100 	strex	r1, r2, [r0]
     aa4:	2900      	cmp	r1, #0
     aa6:	d1f8      	bne.n	a9a <log_free+0xa>
     aa8:	f3bf 8f5b 	dmb	ish
	if (atomic_dec(&dup->refcount) == 1) {
     aac:	2b01      	cmp	r3, #1
     aae:	d103      	bne.n	ab8 <log_free+0x28>
		k_mem_slab_free(&log_strdup_pool, (void **)&dup);
     ab0:	a901      	add	r1, sp, #4
     ab2:	4803      	ldr	r0, [pc, #12]	; (ac0 <log_free+0x30>)
     ab4:	f002 fe80 	bl	37b8 <k_mem_slab_free>
}
     ab8:	b003      	add	sp, #12
     aba:	f85d fb04 	ldr.w	pc, [sp], #4
     abe:	bf00      	nop
     ac0:	20000048 	.word	0x20000048

00000ac4 <log_msg_pool_init>:
static u8_t __noinit __aligned(sizeof(void *))
		log_msg_pool_buf[CONFIG_LOG_BUFFER_SIZE];

void log_msg_pool_init(void)
{
	k_mem_slab_init(&log_msg_pool, log_msg_pool_buf, MSG_SIZE, NUM_OF_MSGS);
     ac4:	2320      	movs	r3, #32
     ac6:	461a      	mov	r2, r3
     ac8:	4901      	ldr	r1, [pc, #4]	; (ad0 <log_msg_pool_init+0xc>)
     aca:	4802      	ldr	r0, [pc, #8]	; (ad4 <log_msg_pool_init+0x10>)
     acc:	f004 bee9 	b.w	58a2 <k_mem_slab_init>
     ad0:	20001db0 	.word	0x20001db0
     ad4:	200000d4 	.word	0x200000d4

00000ad8 <log_msg_no_space_handle>:

	k_mem_slab_free(&log_msg_pool, (void **)&msg);
}

union log_msg_chunk *log_msg_no_space_handle(void)
{
     ad8:	b537      	push	{r0, r1, r2, r4, r5, lr}
	union log_msg_chunk *msg = NULL;
     ada:	2300      	movs	r3, #0

	if (IS_ENABLED(CONFIG_LOG_MODE_OVERFLOW)) {
		do {
			more = log_process(true);
			log_dropped();
			err = k_mem_slab_alloc(&log_msg_pool,
     adc:	4d09      	ldr	r5, [pc, #36]	; (b04 <log_msg_no_space_handle+0x2c>)
	union log_msg_chunk *msg = NULL;
     ade:	9301      	str	r3, [sp, #4]
     ae0:	2001      	movs	r0, #1
     ae2:	f7ff fe89 	bl	7f8 <z_impl_log_process>
     ae6:	4604      	mov	r4, r0
			log_dropped();
     ae8:	f7ff fde0 	bl	6ac <log_dropped>
			err = k_mem_slab_alloc(&log_msg_pool,
     aec:	2200      	movs	r2, #0
     aee:	a901      	add	r1, sp, #4
     af0:	4628      	mov	r0, r5
     af2:	f002 fe35 	bl	3760 <k_mem_slab_alloc>
					       (void **)&msg,
					       K_NO_WAIT);
		} while ((err != 0) && more);
     af6:	b108      	cbz	r0, afc <log_msg_no_space_handle+0x24>
     af8:	2c00      	cmp	r4, #0
     afa:	d1f1      	bne.n	ae0 <log_msg_no_space_handle+0x8>
	} else {
		log_dropped();
	}
	return msg;

}
     afc:	9801      	ldr	r0, [sp, #4]
     afe:	b003      	add	sp, #12
     b00:	bd30      	pop	{r4, r5, pc}
     b02:	bf00      	nop
     b04:	200000d4 	.word	0x200000d4

00000b08 <log_msg_chunk_alloc>:
{
     b08:	b507      	push	{r0, r1, r2, lr}
	union log_msg_chunk *msg = NULL;
     b0a:	2200      	movs	r2, #0
	int err = k_mem_slab_alloc(&log_msg_pool, (void **)&msg,
     b0c:	a901      	add	r1, sp, #4
     b0e:	4806      	ldr	r0, [pc, #24]	; (b28 <log_msg_chunk_alloc+0x20>)
	union log_msg_chunk *msg = NULL;
     b10:	9201      	str	r2, [sp, #4]
	int err = k_mem_slab_alloc(&log_msg_pool, (void **)&msg,
     b12:	f002 fe25 	bl	3760 <k_mem_slab_alloc>
	if (err != 0) {
     b16:	b110      	cbz	r0, b1e <log_msg_chunk_alloc+0x16>
		msg = log_msg_no_space_handle();
     b18:	f7ff ffde 	bl	ad8 <log_msg_no_space_handle>
     b1c:	9001      	str	r0, [sp, #4]
}
     b1e:	9801      	ldr	r0, [sp, #4]
     b20:	b003      	add	sp, #12
     b22:	f85d fb04 	ldr.w	pc, [sp], #4
     b26:	bf00      	nop
     b28:	200000d4 	.word	0x200000d4

00000b2c <msg_free>:
{
     b2c:	b5f0      	push	{r4, r5, r6, r7, lr}
     b2e:	7a04      	ldrb	r4, [r0, #8]
	}
}

u32_t log_msg_nargs_get(struct log_msg *msg)
{
	return msg->hdr.params.std.nargs;
     b30:	7a46      	ldrb	r6, [r0, #9]
{
     b32:	b085      	sub	sp, #20
	if (log_msg_is_std(msg) && nargs) {
     b34:	f014 0401 	ands.w	r4, r4, #1
{
     b38:	9001      	str	r0, [sp, #4]
	return msg->hdr.params.std.nargs;
     b3a:	ea4f 1616 	mov.w	r6, r6, lsr #4
	if (log_msg_is_std(msg) && nargs) {
     b3e:	d00e      	beq.n	b5e <msg_free+0x32>
	if (msg->hdr.params.generic.ext == 1) {
     b40:	9b01      	ldr	r3, [sp, #4]
     b42:	7a1a      	ldrb	r2, [r3, #8]
     b44:	0792      	lsls	r2, r2, #30
     b46:	d504      	bpl.n	b52 <msg_free+0x26>
		cont_free(msg->payload.ext.next);
     b48:	695b      	ldr	r3, [r3, #20]
		k_mem_slab_free(&log_msg_pool, (void **)&cont);
     b4a:	4c18      	ldr	r4, [pc, #96]	; (bac <msg_free+0x80>)
     b4c:	9303      	str	r3, [sp, #12]
	while (cont != NULL) {
     b4e:	9b03      	ldr	r3, [sp, #12]
     b50:	bb2b      	cbnz	r3, b9e <msg_free+0x72>
	k_mem_slab_free(&log_msg_pool, (void **)&msg);
     b52:	a901      	add	r1, sp, #4
     b54:	4815      	ldr	r0, [pc, #84]	; (bac <msg_free+0x80>)
     b56:	f002 fe2f 	bl	37b8 <k_mem_slab_free>
}
     b5a:	b005      	add	sp, #20
     b5c:	bdf0      	pop	{r4, r5, r6, r7, pc}
	if (log_msg_is_std(msg) && nargs) {
     b5e:	2e00      	cmp	r6, #0
     b60:	d0ee      	beq.n	b40 <msg_free+0x14>
		for (i = 0; i < nargs; i++) {
     b62:	4625      	mov	r5, r4
     b64:	e017      	b.n	b96 <msg_free+0x6a>
			void *buf = (void *)log_msg_arg_get(msg, i);
     b66:	4629      	mov	r1, r5
     b68:	f004 f93e 	bl	4de8 <log_msg_arg_get>
     b6c:	4607      	mov	r7, r0
			if (log_is_strdup(buf)) {
     b6e:	f7ff fe35 	bl	7dc <log_is_strdup>
     b72:	b178      	cbz	r0, b94 <msg_free+0x68>
				if (smask == 0) {
     b74:	b93c      	cbnz	r4, b86 <msg_free+0x5a>
					smask = z_log_get_s_mask(
     b76:	9b01      	ldr	r3, [sp, #4]
     b78:	4631      	mov	r1, r6
     b7a:	6918      	ldr	r0, [r3, #16]
     b7c:	f004 f85e 	bl	4c3c <z_log_get_s_mask>
					if (smask == 0) {
     b80:	4604      	mov	r4, r0
     b82:	2800      	cmp	r0, #0
     b84:	d0dc      	beq.n	b40 <msg_free+0x14>
				if (smask & BIT(i)) {
     b86:	fa24 f305 	lsr.w	r3, r4, r5
     b8a:	07db      	lsls	r3, r3, #31
     b8c:	d502      	bpl.n	b94 <msg_free+0x68>
					log_free(buf);
     b8e:	4638      	mov	r0, r7
     b90:	f7ff ff7e 	bl	a90 <log_free>
		for (i = 0; i < nargs; i++) {
     b94:	3501      	adds	r5, #1
     b96:	42ae      	cmp	r6, r5
     b98:	9801      	ldr	r0, [sp, #4]
     b9a:	d8e4      	bhi.n	b66 <msg_free+0x3a>
     b9c:	e7d0      	b.n	b40 <msg_free+0x14>
		next = cont->next;
     b9e:	681d      	ldr	r5, [r3, #0]
		k_mem_slab_free(&log_msg_pool, (void **)&cont);
     ba0:	a903      	add	r1, sp, #12
     ba2:	4620      	mov	r0, r4
     ba4:	f002 fe08 	bl	37b8 <k_mem_slab_free>
		cont = next;
     ba8:	9503      	str	r5, [sp, #12]
     baa:	e7d0      	b.n	b4e <msg_free+0x22>
     bac:	200000d4 	.word	0x200000d4

00000bb0 <print_formatted>:
	return 0;
}

static int print_formatted(const struct log_output *log_output,
			   const char *fmt, ...)
{
     bb0:	b40e      	push	{r1, r2, r3}
     bb2:	b503      	push	{r0, r1, lr}
     bb4:	ab03      	add	r3, sp, #12
	va_start(args, fmt);
#if !defined(CONFIG_NEWLIB_LIBC) && !defined(CONFIG_ARCH_POSIX) && \
    defined(CONFIG_LOG_ENABLE_FANCY_OUTPUT_FORMATTING)
	length = z_prf(out_func, (void *)log_output, (char *)fmt, args);
#else
	z_vprintk(out_func, (void *)log_output, fmt, args);
     bb6:	4601      	mov	r1, r0
{
     bb8:	f853 2b04 	ldr.w	r2, [r3], #4
	z_vprintk(out_func, (void *)log_output, fmt, args);
     bbc:	4804      	ldr	r0, [pc, #16]	; (bd0 <print_formatted+0x20>)
	va_start(args, fmt);
     bbe:	9301      	str	r3, [sp, #4]
	z_vprintk(out_func, (void *)log_output, fmt, args);
     bc0:	f003 fe91 	bl	48e6 <z_vprintk>
#endif
	va_end(args);

	return length;
}
     bc4:	2000      	movs	r0, #0
     bc6:	b002      	add	sp, #8
     bc8:	f85d eb04 	ldr.w	lr, [sp], #4
     bcc:	b003      	add	sp, #12
     bce:	4770      	bx	lr
     bd0:	00005149 	.word	0x00005149

00000bd4 <prefix_print>:
}

static u32_t prefix_print(const struct log_output *log_output,
			 u32_t flags, bool func_on, u32_t timestamp, u8_t level,
			 u8_t domain_id, u16_t source_id)
{
     bd4:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
     bd8:	b085      	sub	sp, #20
			"<%d>1 ",
			facility * 8 +
			level_to_rfc5424_severity(level));
	}

	if (stamp) {
     bda:	f011 0402 	ands.w	r4, r1, #2
{
     bde:	4606      	mov	r6, r0
     be0:	4690      	mov	r8, r2
     be2:	f89d 7038 	ldrb.w	r7, [sp, #56]	; 0x38
	bool colors_on = flags & LOG_OUTPUT_FLAG_COLORS;
     be6:	f001 0901 	and.w	r9, r1, #1
	bool level_on = flags & LOG_OUTPUT_FLAG_LEVEL;
     bea:	f001 0508 	and.w	r5, r1, #8
	if (stamp) {
     bee:	d007      	beq.n	c00 <prefix_print+0x2c>
	if (!format) {
     bf0:	f011 0f44 	tst.w	r1, #68	; 0x44
     bf4:	d137      	bne.n	c66 <prefix_print+0x92>
		length = print_formatted(log_output, "[%08lu] ", timestamp);
     bf6:	461a      	mov	r2, r3
     bf8:	4932      	ldr	r1, [pc, #200]	; (cc4 <prefix_print+0xf0>)
     bfa:	f7ff ffd9 	bl	bb0 <print_formatted>
		length += timestamp_print(log_output, flags, timestamp);
     bfe:	4604      	mov	r4, r0
	if (color) {
     c00:	f1b9 0f00 	cmp.w	r9, #0
     c04:	d00a      	beq.n	c1c <prefix_print+0x48>
		const char *color = start && (colors[level] != NULL) ?
     c06:	4b30      	ldr	r3, [pc, #192]	; (cc8 <prefix_print+0xf4>)
		print_formatted(log_output, "%s", color);
     c08:	4930      	ldr	r1, [pc, #192]	; (ccc <prefix_print+0xf8>)
		const char *color = start && (colors[level] != NULL) ?
     c0a:	f853 2027 	ldr.w	r2, [r3, r7, lsl #2]
		print_formatted(log_output, "%s", color);
     c0e:	4b30      	ldr	r3, [pc, #192]	; (cd0 <prefix_print+0xfc>)
     c10:	4630      	mov	r0, r6
     c12:	2a00      	cmp	r2, #0
     c14:	bf08      	it	eq
     c16:	461a      	moveq	r2, r3
     c18:	f7ff ffca 	bl	bb0 <print_formatted>
	if (level_on) {
     c1c:	b13d      	cbz	r5, c2e <prefix_print+0x5a>
		total += print_formatted(log_output, "<%s> ", severity[level]);
     c1e:	4b2d      	ldr	r3, [pc, #180]	; (cd4 <prefix_print+0x100>)
     c20:	492d      	ldr	r1, [pc, #180]	; (cd8 <prefix_print+0x104>)
     c22:	f853 2027 	ldr.w	r2, [r3, r7, lsl #2]
     c26:	4630      	mov	r0, r6
     c28:	f7ff ffc2 	bl	bb0 <print_formatted>
     c2c:	4605      	mov	r5, r0
	total += print_formatted(log_output,
     c2e:	f1b8 0f00 	cmp.w	r8, #0
     c32:	d044      	beq.n	cbe <prefix_print+0xea>
				((1 << level) & LOG_FUNCTION_PREFIX_MASK)) ?
     c34:	2301      	movs	r3, #1
     c36:	fa03 f707 	lsl.w	r7, r3, r7
	total += print_formatted(log_output,
     c3a:	4b28      	ldr	r3, [pc, #160]	; (cdc <prefix_print+0x108>)
     c3c:	f017 0f10 	tst.w	r7, #16
     c40:	4f27      	ldr	r7, [pc, #156]	; (ce0 <prefix_print+0x10c>)
     c42:	bf18      	it	ne
     c44:	461f      	movne	r7, r3
     c46:	f8bd 1040 	ldrh.w	r1, [sp, #64]	; 0x40
     c4a:	f89d 003c 	ldrb.w	r0, [sp, #60]	; 0x3c
     c4e:	f7ff fd3d 	bl	6cc <log_source_name_get>
     c52:	4639      	mov	r1, r7
     c54:	4602      	mov	r2, r0
     c56:	4630      	mov	r0, r6
     c58:	f7ff ffaa 	bl	bb0 <print_formatted>
     c5c:	4428      	add	r0, r5
		length += ids_print(log_output, level_on, func_on,
				    domain_id, source_id, level);
	}

	return length;
}
     c5e:	4420      	add	r0, r4
     c60:	b005      	add	sp, #20
     c62:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
	} else if (freq != 0U) {
     c66:	4a1f      	ldr	r2, [pc, #124]	; (ce4 <prefix_print+0x110>)
     c68:	6811      	ldr	r1, [r2, #0]
     c6a:	b331      	cbz	r1, cba <prefix_print+0xe6>
		timestamp /= timestamp_div;
     c6c:	4a1e      	ldr	r2, [pc, #120]	; (ce8 <prefix_print+0x114>)
     c6e:	f44f 6e61 	mov.w	lr, #3600	; 0xe10
     c72:	6814      	ldr	r4, [r2, #0]
     c74:	fbb3 f3f4 	udiv	r3, r3, r4
		ms = (remainder * 1000U) / freq;
     c78:	f44f 7c7a 	mov.w	ip, #1000	; 0x3e8
		seconds = timestamp / freq;
     c7c:	fbb3 f4f1 	udiv	r4, r3, r1
		seconds -= hours * 3600U;
     c80:	fbb4 f2fe 	udiv	r2, r4, lr
     c84:	fb0e 4e12 	mls	lr, lr, r2, r4
		remainder = timestamp % freq;
     c88:	fb01 3414 	mls	r4, r1, r4, r3
		ms = (remainder * 1000U) / freq;
     c8c:	fb0c f404 	mul.w	r4, ip, r4
		mins = seconds / 60U;
     c90:	f04f 0a3c 	mov.w	sl, #60	; 0x3c
		us = (1000 * (remainder * 1000U - (ms * freq))) / freq;
     c94:	fbb4 fbf1 	udiv	fp, r4, r1
     c98:	fb01 441b 	mls	r4, r1, fp, r4
		mins = seconds / 60U;
     c9c:	fbbe f3fa 	udiv	r3, lr, sl
		us = (1000 * (remainder * 1000U - (ms * freq))) / freq;
     ca0:	fb0c f404 	mul.w	r4, ip, r4
     ca4:	fbb4 f1f1 	udiv	r1, r4, r1
			length = print_formatted(log_output,
     ca8:	e9cd b101 	strd	fp, r1, [sp, #4]
     cac:	fb0a e113 	mls	r1, sl, r3, lr
     cb0:	9100      	str	r1, [sp, #0]
     cb2:	490e      	ldr	r1, [pc, #56]	; (cec <prefix_print+0x118>)
     cb4:	f7ff ff7c 	bl	bb0 <print_formatted>
     cb8:	e7a1      	b.n	bfe <prefix_print+0x2a>
		length = 0;
     cba:	4608      	mov	r0, r1
     cbc:	e79f      	b.n	bfe <prefix_print+0x2a>
	total += print_formatted(log_output,
     cbe:	4f08      	ldr	r7, [pc, #32]	; (ce0 <prefix_print+0x10c>)
     cc0:	e7c1      	b.n	c46 <prefix_print+0x72>
     cc2:	bf00      	nop
     cc4:	00006182 	.word	0x00006182
     cc8:	00005e08 	.word	0x00005e08
     ccc:	000061a7 	.word	0x000061a7
     cd0:	00006174 	.word	0x00006174
     cd4:	00005e1c 	.word	0x00005e1c
     cd8:	000061aa 	.word	0x000061aa
     cdc:	0000617e 	.word	0x0000617e
     ce0:	00006179 	.word	0x00006179
     ce4:	200000f0 	.word	0x200000f0
     ce8:	200000f4 	.word	0x200000f4
     cec:	0000618b 	.word	0x0000618b

00000cf0 <postfix_print>:

static void postfix_print(const struct log_output *log_output,
			  u32_t flags, u8_t level)
{
     cf0:	b538      	push	{r3, r4, r5, lr}
     cf2:	460c      	mov	r4, r1
	if (color) {
     cf4:	07e1      	lsls	r1, r4, #31
{
     cf6:	4605      	mov	r5, r0
	if (color) {
     cf8:	d503      	bpl.n	d02 <postfix_print+0x12>
		print_formatted(log_output, "%s", color);
     cfa:	4a08      	ldr	r2, [pc, #32]	; (d1c <postfix_print+0x2c>)
     cfc:	4908      	ldr	r1, [pc, #32]	; (d20 <postfix_print+0x30>)
     cfe:	f7ff ff57 	bl	bb0 <print_formatted>
	if ((flags & LOG_OUTPUT_FLAG_CRLF_NONE) != 0U) {
     d02:	06e2      	lsls	r2, r4, #27
     d04:	d408      	bmi.n	d18 <postfix_print+0x28>
	if ((flags & LOG_OUTPUT_FLAG_CRLF_LFONLY) != 0U) {
     d06:	06a3      	lsls	r3, r4, #26
		print_formatted(ctx, "\r\n");
     d08:	4628      	mov	r0, r5
		print_formatted(ctx, "\n");
     d0a:	bf4c      	ite	mi
     d0c:	4905      	ldrmi	r1, [pc, #20]	; (d24 <postfix_print+0x34>)
		print_formatted(ctx, "\r\n");
     d0e:	4906      	ldrpl	r1, [pc, #24]	; (d28 <postfix_print+0x38>)
	color_postfix(log_output, (flags & LOG_OUTPUT_FLAG_COLORS),
			      level);
	newline_print(log_output, flags);
}
     d10:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
		print_formatted(ctx, "\r\n");
     d14:	f7ff bf4c 	b.w	bb0 <print_formatted>
}
     d18:	bd38      	pop	{r3, r4, r5, pc}
     d1a:	bf00      	nop
     d1c:	00006174 	.word	0x00006174
     d20:	000061a7 	.word	0x000061a7
     d24:	00006166 	.word	0x00006166
     d28:	00006165 	.word	0x00006165

00000d2c <hexdump_line_print>:
{
     d2c:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
     d30:	4698      	mov	r8, r3
     d32:	9b08      	ldr	r3, [sp, #32]
	if ((flags & LOG_OUTPUT_FLAG_CRLF_NONE) != 0U) {
     d34:	06dd      	lsls	r5, r3, #27
{
     d36:	4604      	mov	r4, r0
     d38:	460e      	mov	r6, r1
     d3a:	4617      	mov	r7, r2
	if ((flags & LOG_OUTPUT_FLAG_CRLF_NONE) != 0U) {
     d3c:	d405      	bmi.n	d4a <hexdump_line_print+0x1e>
	if ((flags & LOG_OUTPUT_FLAG_CRLF_LFONLY) != 0U) {
     d3e:	0699      	lsls	r1, r3, #26
		print_formatted(ctx, "\n");
     d40:	bf4c      	ite	mi
     d42:	4929      	ldrmi	r1, [pc, #164]	; (de8 <hexdump_line_print+0xbc>)
		print_formatted(ctx, "\r\n");
     d44:	4929      	ldrpl	r1, [pc, #164]	; (dec <hexdump_line_print+0xc0>)
     d46:	f7ff ff33 	bl	bb0 <print_formatted>
		print_formatted(log_output, " ");
     d4a:	f8df 90a8 	ldr.w	r9, [pc, #168]	; df4 <hexdump_line_print+0xc8>
{
     d4e:	2500      	movs	r5, #0
	for (int i = 0; i < prefix_offset; i++) {
     d50:	4545      	cmp	r5, r8
     d52:	db2a      	blt.n	daa <hexdump_line_print+0x7e>
			print_formatted(log_output, "   ");
     d54:	f8df 80a0 	ldr.w	r8, [pc, #160]	; df8 <hexdump_line_print+0xcc>
			print_formatted(log_output, "%02x ", data[i]);
     d58:	f8df 90a0 	ldr.w	r9, [pc, #160]	; dfc <hexdump_line_print+0xd0>
			print_formatted(log_output, " ");
     d5c:	f8df a094 	ldr.w	sl, [pc, #148]	; df4 <hexdump_line_print+0xc8>
	for (int i = 0; i < HEXDUMP_BYTES_IN_LINE; i++) {
     d60:	2500      	movs	r5, #0
		if (i < length) {
     d62:	42bd      	cmp	r5, r7
     d64:	d22e      	bcs.n	dc4 <hexdump_line_print+0x98>
			print_formatted(log_output, "%02x ", data[i]);
     d66:	5d72      	ldrb	r2, [r6, r5]
     d68:	4649      	mov	r1, r9
     d6a:	4620      	mov	r0, r4
     d6c:	f7ff ff20 	bl	bb0 <print_formatted>
	for (int i = 0; i < HEXDUMP_BYTES_IN_LINE; i++) {
     d70:	3501      	adds	r5, #1
     d72:	2d10      	cmp	r5, #16
     d74:	d11f      	bne.n	db6 <hexdump_line_print+0x8a>
	print_formatted(log_output, "|");
     d76:	491e      	ldr	r1, [pc, #120]	; (df0 <hexdump_line_print+0xc4>)
			print_formatted(log_output, " ");
     d78:	f8df 8078 	ldr.w	r8, [pc, #120]	; df4 <hexdump_line_print+0xc8>
			print_formatted(log_output, "%c",
     d7c:	f8df 9080 	ldr.w	r9, [pc, #128]	; e00 <hexdump_line_print+0xd4>
	print_formatted(log_output, "|");
     d80:	4620      	mov	r0, r4
     d82:	f7ff ff15 	bl	bb0 <print_formatted>
	for (int i = 0; i < HEXDUMP_BYTES_IN_LINE; i++) {
     d86:	2500      	movs	r5, #0
		if (i < length) {
     d88:	42af      	cmp	r7, r5
     d8a:	d927      	bls.n	ddc <hexdump_line_print+0xb0>
			      isprint((int)c) ? c : '.');
     d8c:	5d72      	ldrb	r2, [r6, r5]
			(((unsigned)c) <= (unsigned)'~'));
}

static inline int isprint(int c)
{
	return (int)((((unsigned)c) >= ' ') &&
     d8e:	f1a2 0320 	sub.w	r3, r2, #32
			print_formatted(log_output, "%c",
     d92:	2b5f      	cmp	r3, #95	; 0x5f
     d94:	bf28      	it	cs
     d96:	222e      	movcs	r2, #46	; 0x2e
     d98:	4649      	mov	r1, r9
     d9a:	4620      	mov	r0, r4
     d9c:	f7ff ff08 	bl	bb0 <print_formatted>
	for (int i = 0; i < HEXDUMP_BYTES_IN_LINE; i++) {
     da0:	3501      	adds	r5, #1
     da2:	2d10      	cmp	r5, #16
     da4:	d113      	bne.n	dce <hexdump_line_print+0xa2>
}
     da6:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
		print_formatted(log_output, " ");
     daa:	4649      	mov	r1, r9
     dac:	4620      	mov	r0, r4
     dae:	f7ff feff 	bl	bb0 <print_formatted>
	for (int i = 0; i < prefix_offset; i++) {
     db2:	3501      	adds	r5, #1
     db4:	e7cc      	b.n	d50 <hexdump_line_print+0x24>
		if (i > 0 && !(i % 8)) {
     db6:	076a      	lsls	r2, r5, #29
     db8:	d1d3      	bne.n	d62 <hexdump_line_print+0x36>
			print_formatted(log_output, " ");
     dba:	4651      	mov	r1, sl
     dbc:	4620      	mov	r0, r4
     dbe:	f7ff fef7 	bl	bb0 <print_formatted>
     dc2:	e7ce      	b.n	d62 <hexdump_line_print+0x36>
			print_formatted(log_output, "   ");
     dc4:	4641      	mov	r1, r8
     dc6:	4620      	mov	r0, r4
     dc8:	f7ff fef2 	bl	bb0 <print_formatted>
     dcc:	e7d0      	b.n	d70 <hexdump_line_print+0x44>
		if (i > 0 && !(i % 8)) {
     dce:	076b      	lsls	r3, r5, #29
     dd0:	d1da      	bne.n	d88 <hexdump_line_print+0x5c>
			print_formatted(log_output, " ");
     dd2:	4641      	mov	r1, r8
     dd4:	4620      	mov	r0, r4
     dd6:	f7ff feeb 	bl	bb0 <print_formatted>
     dda:	e7d5      	b.n	d88 <hexdump_line_print+0x5c>
			print_formatted(log_output, " ");
     ddc:	4641      	mov	r1, r8
     dde:	4620      	mov	r0, r4
     de0:	f7ff fee6 	bl	bb0 <print_formatted>
     de4:	e7dc      	b.n	da0 <hexdump_line_print+0x74>
     de6:	bf00      	nop
     de8:	00006166 	.word	0x00006166
     dec:	00006165 	.word	0x00006165
     df0:	00006142 	.word	0x00006142
     df4:	00006140 	.word	0x00006140
     df8:	0000613e 	.word	0x0000613e
     dfc:	00006138 	.word	0x00006138
     e00:	00006144 	.word	0x00006144

00000e04 <log_output_msg_process>:

void log_output_msg_process(const struct log_output *log_output,
			    struct log_msg *msg,
			    u32_t flags)
{
     e04:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
	return msg->hdr.ids.level;
     e08:	7a8b      	ldrb	r3, [r1, #10]
		log_output_msg_syst_process(log_output, msg, flags);
		return;
	}

	prefix_offset = raw_string ?
			0 : prefix_print(log_output, flags, std_msg, timestamp,
     e0a:	f013 0407 	ands.w	r4, r3, #7
{
     e0e:	4617      	mov	r7, r2
     e10:	b08a      	sub	sp, #40	; 0x28
     e12:	4605      	mov	r5, r0
     e14:	460e      	mov	r6, r1
	return  (msg->hdr.params.generic.type == LOG_MSG_TYPE_STD);
     e16:	7a0a      	ldrb	r2, [r1, #8]
			0 : prefix_print(log_output, flags, std_msg, timestamp,
     e18:	d01c      	beq.n	e54 <log_output_msg_process+0x50>
	return msg->hdr.ids.source_id;
     e1a:	8949      	ldrh	r1, [r1, #10]
     e1c:	f3c3 03c2 	ubfx	r3, r3, #3, #3
     e20:	0989      	lsrs	r1, r1, #6
	return  (msg->hdr.params.generic.type == LOG_MSG_TYPE_STD);
     e22:	43d2      	mvns	r2, r2
     e24:	9102      	str	r1, [sp, #8]
     e26:	e9cd 4300 	strd	r4, r3, [sp]
     e2a:	f002 0201 	and.w	r2, r2, #1
     e2e:	68f3      	ldr	r3, [r6, #12]
     e30:	4639      	mov	r1, r7
     e32:	f7ff fecf 	bl	bd4 <prefix_print>
     e36:	4681      	mov	r9, r0
     e38:	7a33      	ldrb	r3, [r6, #8]
					 level, domain_id, source_id);

	if (log_msg_is_std(msg)) {
     e3a:	07da      	lsls	r2, r3, #31
     e3c:	d40c      	bmi.n	e58 <log_output_msg_process+0x54>
		std_print(msg, log_output);
     e3e:	4629      	mov	r1, r5
     e40:	4630      	mov	r0, r6
     e42:	f004 f817 	bl	4e74 <std_print>
		raw_string_print(msg, log_output);
	} else {
		hexdump_print(msg, log_output, prefix_offset, flags);
	}

	if (!raw_string) {
     e46:	b34c      	cbz	r4, e9c <log_output_msg_process+0x98>
		postfix_print(log_output, flags, level);
     e48:	4622      	mov	r2, r4
     e4a:	4639      	mov	r1, r7
     e4c:	4628      	mov	r0, r5
     e4e:	f7ff ff4f 	bl	cf0 <postfix_print>
     e52:	e023      	b.n	e9c <log_output_msg_process+0x98>
			0 : prefix_print(log_output, flags, std_msg, timestamp,
     e54:	46a1      	mov	r9, r4
     e56:	e7ef      	b.n	e38 <log_output_msg_process+0x34>
	} else if (raw_string) {
     e58:	bb34      	cbnz	r4, ea8 <log_output_msg_process+0xa4>
	size_t offset = 0;
     e5a:	4627      	mov	r7, r4
		length = log_output->size;
     e5c:	68eb      	ldr	r3, [r5, #12]
     e5e:	9306      	str	r3, [sp, #24]
		log_msg_hexdump_data_get(msg, log_output->buf, &length, offset);
     e60:	aa06      	add	r2, sp, #24
     e62:	463b      	mov	r3, r7
     e64:	68a9      	ldr	r1, [r5, #8]
     e66:	4630      	mov	r0, r6
     e68:	f003 fff0 	bl	4e4c <log_msg_hexdump_data_get>
		log_output->control_block->offset = length;
     e6c:	9a06      	ldr	r2, [sp, #24]
     e6e:	686b      	ldr	r3, [r5, #4]
     e70:	601a      	str	r2, [r3, #0]
		if (length != 0) {
     e72:	b13a      	cbz	r2, e84 <log_output_msg_process+0x80>
			eol = (log_output->buf[length - 1] == '\n');
     e74:	68ab      	ldr	r3, [r5, #8]
     e76:	4413      	add	r3, r2
     e78:	f813 4c01 	ldrb.w	r4, [r3, #-1]
     e7c:	f1a4 030a 	sub.w	r3, r4, #10
     e80:	425c      	negs	r4, r3
     e82:	415c      	adcs	r4, r3
		log_output_flush(log_output);
     e84:	4628      	mov	r0, r5
     e86:	f004 f952 	bl	512e <log_output_flush>
		offset += length;
     e8a:	9b06      	ldr	r3, [sp, #24]
     e8c:	441f      	add	r7, r3
	} while (length > 0);
     e8e:	2b00      	cmp	r3, #0
     e90:	d1e4      	bne.n	e5c <log_output_msg_process+0x58>
	if (eol) {
     e92:	b11c      	cbz	r4, e9c <log_output_msg_process+0x98>
		print_formatted(log_output, "\r");
     e94:	4914      	ldr	r1, [pc, #80]	; (ee8 <log_output_msg_process+0xe4>)
     e96:	4628      	mov	r0, r5
     e98:	f7ff fe8a 	bl	bb0 <print_formatted>
	}

	log_output_flush(log_output);
     e9c:	4628      	mov	r0, r5
     e9e:	f004 f946 	bl	512e <log_output_flush>
}
     ea2:	b00a      	add	sp, #40	; 0x28
     ea4:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
	print_formatted(log_output, "%s", log_msg_str_get(msg));
     ea8:	4630      	mov	r0, r6
     eaa:	f003 ffcd 	bl	4e48 <log_msg_str_get>
     eae:	490f      	ldr	r1, [pc, #60]	; (eec <log_output_msg_process+0xe8>)
     eb0:	4602      	mov	r2, r0
     eb2:	4628      	mov	r0, r5
     eb4:	f7ff fe7c 	bl	bb0 <print_formatted>
	u32_t offset = 0U;
     eb8:	f04f 0800 	mov.w	r8, #0
		length = sizeof(buf);
     ebc:	f04f 0a10 	mov.w	sl, #16
		log_msg_hexdump_data_get(msg, buf, &length, offset);
     ec0:	aa05      	add	r2, sp, #20
     ec2:	4643      	mov	r3, r8
     ec4:	a906      	add	r1, sp, #24
     ec6:	4630      	mov	r0, r6
		length = sizeof(buf);
     ec8:	f8cd a014 	str.w	sl, [sp, #20]
		log_msg_hexdump_data_get(msg, buf, &length, offset);
     ecc:	f003 ffbe 	bl	4e4c <log_msg_hexdump_data_get>
		if (length) {
     ed0:	9a05      	ldr	r2, [sp, #20]
     ed2:	2a00      	cmp	r2, #0
     ed4:	d0b8      	beq.n	e48 <log_output_msg_process+0x44>
			hexdump_line_print(log_output, buf, length,
     ed6:	464b      	mov	r3, r9
     ed8:	9700      	str	r7, [sp, #0]
     eda:	a906      	add	r1, sp, #24
     edc:	4628      	mov	r0, r5
     ede:	f7ff ff25 	bl	d2c <hexdump_line_print>
			offset += length;
     ee2:	9b05      	ldr	r3, [sp, #20]
     ee4:	4498      	add	r8, r3
     ee6:	e7eb      	b.n	ec0 <log_output_msg_process+0xbc>
     ee8:	00006147 	.word	0x00006147
     eec:	000061a7 	.word	0x000061a7

00000ef0 <log_output_dropped_process>:
	postfix_print(log_output, flags, level);
	log_output_flush(log_output);
}

void log_output_dropped_process(const struct log_output *log_output, u32_t cnt)
{
     ef0:	b573      	push	{r0, r1, r4, r5, r6, lr}
	int len;
	static const char prefix[] = DROPPED_COLOR_PREFIX "--- ";
	static const char postfix[] =
			" messages dropped ---\r\n" DROPPED_COLOR_POSTFIX;
	log_output_func_t outf = log_output->func;
	struct device *dev = (struct device *)log_output->control_block->ctx;
     ef2:	e9d0 4300 	ldrd	r4, r3, [r0]
     ef6:	685d      	ldr	r5, [r3, #4]

	cnt = MIN(cnt, 9999);
	len = snprintf(buf, sizeof(buf), "%d", cnt);
     ef8:	4a0f      	ldr	r2, [pc, #60]	; (f38 <log_output_dropped_process+0x48>)
     efa:	f242 730f 	movw	r3, #9999	; 0x270f
     efe:	428b      	cmp	r3, r1
     f00:	bf28      	it	cs
     f02:	460b      	movcs	r3, r1
     f04:	4668      	mov	r0, sp
     f06:	2105      	movs	r1, #5
     f08:	f001 fda2 	bl	2a50 <snprintf>

	buffer_write(outf, (u8_t *)prefix, sizeof(prefix) - 1, dev);
     f0c:	462b      	mov	r3, r5
	len = snprintf(buf, sizeof(buf), "%d", cnt);
     f0e:	4606      	mov	r6, r0
	buffer_write(outf, (u8_t *)prefix, sizeof(prefix) - 1, dev);
     f10:	220b      	movs	r2, #11
     f12:	4620      	mov	r0, r4
     f14:	4909      	ldr	r1, [pc, #36]	; (f3c <log_output_dropped_process+0x4c>)
     f16:	f003 ffa0 	bl	4e5a <buffer_write>
	buffer_write(outf, buf, len, dev);
     f1a:	462b      	mov	r3, r5
     f1c:	4632      	mov	r2, r6
     f1e:	4669      	mov	r1, sp
     f20:	4620      	mov	r0, r4
     f22:	f003 ff9a 	bl	4e5a <buffer_write>
	buffer_write(outf, (u8_t *)postfix, sizeof(postfix) - 1, dev);
     f26:	462b      	mov	r3, r5
     f28:	221b      	movs	r2, #27
     f2a:	4905      	ldr	r1, [pc, #20]	; (f40 <log_output_dropped_process+0x50>)
     f2c:	4620      	mov	r0, r4
     f2e:	f003 ff94 	bl	4e5a <buffer_write>
}
     f32:	b002      	add	sp, #8
     f34:	bd70      	pop	{r4, r5, r6, pc}
     f36:	bf00      	nop
     f38:	0000677f 	.word	0x0000677f
     f3c:	00006168 	.word	0x00006168
     f40:	00006149 	.word	0x00006149

00000f44 <log_output_timestamp_freq_set>:

void log_output_timestamp_freq_set(u32_t frequency)
{
	timestamp_div = 1U;
     f44:	4a08      	ldr	r2, [pc, #32]	; (f68 <log_output_timestamp_freq_set+0x24>)
{
     f46:	b510      	push	{r4, lr}
	timestamp_div = 1U;
     f48:	2301      	movs	r3, #1
	/* There is no point to have frequency higher than 1MHz (ns are not
	 * printed) and too high frequency leads to overflows in calculations.
	 */
	while (frequency > 1000000) {
     f4a:	4c08      	ldr	r4, [pc, #32]	; (f6c <log_output_timestamp_freq_set+0x28>)
	timestamp_div = 1U;
     f4c:	6013      	str	r3, [r2, #0]
	while (frequency > 1000000) {
     f4e:	2100      	movs	r1, #0
     f50:	42a0      	cmp	r0, r4
     f52:	d804      	bhi.n	f5e <log_output_timestamp_freq_set+0x1a>
     f54:	b101      	cbz	r1, f58 <log_output_timestamp_freq_set+0x14>
     f56:	6013      	str	r3, [r2, #0]
		frequency /= 2U;
		timestamp_div *= 2U;
	}

	freq = frequency;
     f58:	4b05      	ldr	r3, [pc, #20]	; (f70 <log_output_timestamp_freq_set+0x2c>)
     f5a:	6018      	str	r0, [r3, #0]
}
     f5c:	bd10      	pop	{r4, pc}
		frequency /= 2U;
     f5e:	0840      	lsrs	r0, r0, #1
		timestamp_div *= 2U;
     f60:	005b      	lsls	r3, r3, #1
     f62:	2101      	movs	r1, #1
     f64:	e7f4      	b.n	f50 <log_output_timestamp_freq_set+0xc>
     f66:	bf00      	nop
     f68:	200000f4 	.word	0x200000f4
     f6c:	000f4240 	.word	0x000f4240
     f70:	200000f0 	.word	0x200000f0

00000f74 <panic>:
 * @param log_output	Log output instance.
 */
static inline void
log_backend_std_panic(const struct log_output *const log_output)
{
	log_output_flush(log_output);
     f74:	4801      	ldr	r0, [pc, #4]	; (f7c <panic+0x8>)
     f76:	f004 b8da 	b.w	512e <log_output_flush>
     f7a:	bf00      	nop
     f7c:	00005e48 	.word	0x00005e48

00000f80 <dropped>:
 * @param cnt		Number of dropped messages.
 */
static inline void
log_backend_std_dropped(const struct log_output *const log_output, u32_t cnt)
{
	log_output_dropped_process(log_output, cnt);
     f80:	4801      	ldr	r0, [pc, #4]	; (f88 <dropped+0x8>)
     f82:	f7ff bfb5 	b.w	ef0 <log_output_dropped_process>
     f86:	bf00      	nop
     f88:	00005e48 	.word	0x00005e48

00000f8c <log_backend_uart_init>:

	log_backend_std_put(&log_output, flag, msg);
}

static void log_backend_uart_init(void)
{
     f8c:	b508      	push	{r3, lr}
     f8e:	4803      	ldr	r0, [pc, #12]	; (f9c <log_backend_uart_init+0x10>)
     f90:	f002 fa50 	bl	3434 <z_impl_device_get_binding>
 * @param ctx		User context.
 */
static inline void log_output_ctx_set(const struct log_output *log_output,
				      void *ctx)
{
	log_output->control_block->ctx = ctx;
     f94:	4b02      	ldr	r3, [pc, #8]	; (fa0 <log_backend_uart_init+0x14>)
     f96:	6058      	str	r0, [r3, #4]

	dev = device_get_binding(CONFIG_UART_CONSOLE_ON_DEV_NAME);
	assert(dev);

	log_output_ctx_set(&log_output, dev);
}
     f98:	bd08      	pop	{r3, pc}
     f9a:	bf00      	nop
     f9c:	000061d0 	.word	0x000061d0
     fa0:	20000100 	.word	0x20000100

00000fa4 <put>:
{
     fa4:	b510      	push	{r4, lr}
	log_msg_get(msg);
     fa6:	4608      	mov	r0, r1
     fa8:	460c      	mov	r4, r1
     faa:	f003 ff0d 	bl	4dc8 <log_msg_get>
	log_output_msg_process(log_output, msg, flags);
     fae:	4621      	mov	r1, r4
     fb0:	4804      	ldr	r0, [pc, #16]	; (fc4 <put+0x20>)
     fb2:	220f      	movs	r2, #15
     fb4:	f7ff ff26 	bl	e04 <log_output_msg_process>
	log_msg_put(msg);
     fb8:	4620      	mov	r0, r4
}
     fba:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
     fbe:	f003 bf30 	b.w	4e22 <log_msg_put>
     fc2:	bf00      	nop
     fc4:	00005e48 	.word	0x00005e48

00000fc8 <log_backend_rtt_init>:
{
	if (CONFIG_LOG_BACKEND_RTT_BUFFER > 0) {
		log_backend_rtt_cfg();
	}

	host_present = true;
     fc8:	4b01      	ldr	r3, [pc, #4]	; (fd0 <log_backend_rtt_init+0x8>)
     fca:	2201      	movs	r2, #1
     fcc:	701a      	strb	r2, [r3, #0]
	line_pos = line_buf;
}
     fce:	4770      	bx	lr
     fd0:	200008b8 	.word	0x200008b8

00000fd4 <panic>:

static void panic(struct log_backend const *const backend)
{
     fd4:	b508      	push	{r3, lr}
	log_output_flush(log_output);
     fd6:	4803      	ldr	r0, [pc, #12]	; (fe4 <panic+0x10>)
     fd8:	f004 f8a9 	bl	512e <log_output_flush>
	log_backend_std_panic(&log_output);
	panic_mode = true;
     fdc:	4b02      	ldr	r3, [pc, #8]	; (fe8 <panic+0x14>)
     fde:	2201      	movs	r2, #1
     fe0:	701a      	strb	r2, [r3, #0]
}
     fe2:	bd08      	pop	{r3, pc}
     fe4:	00005e70 	.word	0x00005e70
     fe8:	200008b9 	.word	0x200008b9

00000fec <dropped>:
	log_output_dropped_process(log_output, cnt);
     fec:	4801      	ldr	r0, [pc, #4]	; (ff4 <dropped+0x8>)
     fee:	f7ff bf7f 	b.w	ef0 <log_output_dropped_process>
     ff2:	bf00      	nop
     ff4:	00005e70 	.word	0x00005e70

00000ff8 <put>:
{
     ff8:	b510      	push	{r4, lr}
	log_msg_get(msg);
     ffa:	4608      	mov	r0, r1
     ffc:	460c      	mov	r4, r1
     ffe:	f003 fee3 	bl	4dc8 <log_msg_get>
	log_output_msg_process(log_output, msg, flags);
    1002:	4621      	mov	r1, r4
    1004:	4804      	ldr	r0, [pc, #16]	; (1018 <put+0x20>)
    1006:	220f      	movs	r2, #15
    1008:	f7ff fefc 	bl	e04 <log_output_msg_process>
	log_msg_put(msg);
    100c:	4620      	mov	r0, r4
}
    100e:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    1012:	f003 bf06 	b.w	4e22 <log_msg_put>
    1016:	bf00      	nop
    1018:	00005e70 	.word	0x00005e70

0000101c <on_failed_write.part.0>:
	return IS_ENABLED(CONFIG_LOG_IMMEDIATE) || panic_mode;
    101c:	4b04      	ldr	r3, [pc, #16]	; (1030 <on_failed_write.part.0+0x14>)
	} else if (is_sync_mode()) {
    101e:	781b      	ldrb	r3, [r3, #0]
    1020:	b11b      	cbz	r3, 102a <on_failed_write.part.0+0xe>
	z_impl_k_busy_wait(usec_to_wait);
    1022:	f241 3088 	movw	r0, #5000	; 0x1388
    1026:	f004 bd15 	b.w	5a54 <z_impl_k_busy_wait>
	return z_impl_k_sleep(ms);
    102a:	2005      	movs	r0, #5
    102c:	f002 bfc4 	b.w	3fb8 <z_impl_k_sleep>
    1030:	200008b9 	.word	0x200008b9

00001034 <data_out_block_mode>:
{
    1034:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
	return IS_ENABLED(CONFIG_LOG_IMMEDIATE) || panic_mode;
    1038:	4f21      	ldr	r7, [pc, #132]	; (10c0 <data_out_block_mode+0x8c>)
	return z_impl_k_mutex_lock(mutex, timeout);
    103a:	f8df 908c 	ldr.w	r9, [pc, #140]	; 10c8 <data_out_block_mode+0x94>
{
    103e:	4682      	mov	sl, r0
    1040:	460e      	mov	r6, r1
	int retry_cnt = CONFIG_LOG_BACKEND_RTT_RETRY_CNT;
    1042:	2404      	movs	r4, #4
    1044:	46b8      	mov	r8, r7
		if (!is_sync_mode()) {
    1046:	783b      	ldrb	r3, [r7, #0]
    1048:	b923      	cbnz	r3, 1054 <data_out_block_mode+0x20>
    104a:	f04f 31ff 	mov.w	r1, #4294967295
    104e:	4648      	mov	r0, r9
    1050:	f002 fbe0 	bl	3814 <z_impl_k_mutex_lock>
		ret = SEGGER_RTT_WriteSkipNoLock(CONFIG_LOG_BACKEND_RTT_BUFFER,
    1054:	4632      	mov	r2, r6
    1056:	4651      	mov	r1, sl
    1058:	2000      	movs	r0, #0
    105a:	f000 fa1d 	bl	1498 <SEGGER_RTT_WriteSkipNoLock>
		if (!is_sync_mode()) {
    105e:	f898 3000 	ldrb.w	r3, [r8]
		ret = SEGGER_RTT_WriteSkipNoLock(CONFIG_LOG_BACKEND_RTT_BUFFER,
    1062:	4683      	mov	fp, r0
		if (!is_sync_mode()) {
    1064:	b913      	cbnz	r3, 106c <data_out_block_mode+0x38>
	return z_impl_k_mutex_unlock(mutex);
    1066:	4648      	mov	r0, r9
    1068:	f002 fc46 	bl	38f8 <z_impl_k_mutex_unlock>
		if (ret) {
    106c:	4d15      	ldr	r5, [pc, #84]	; (10c4 <data_out_block_mode+0x90>)
    106e:	f1bb 0f00 	cmp.w	fp, #0
    1072:	d018      	beq.n	10a6 <data_out_block_mode+0x72>
	host_present = true;
    1074:	2301      	movs	r3, #1
    1076:	702b      	strb	r3, [r5, #0]
	if (is_panic_mode()) {
    1078:	f898 3000 	ldrb.w	r3, [r8]
    107c:	b933      	cbnz	r3, 108c <data_out_block_mode+0x58>
}
    107e:	4630      	mov	r0, r6
    1080:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
	if (retry_cnt == 0) {
    1084:	b95c      	cbnz	r4, 109e <data_out_block_mode+0x6a>
		host_present = false;
    1086:	702c      	strb	r4, [r5, #0]
    1088:	f04f 34ff 	mov.w	r4, #4294967295
		while (SEGGER_RTT_HasDataUp(CONFIG_LOG_BACKEND_RTT_BUFFER) &&
    108c:	2000      	movs	r0, #0
    108e:	f000 fa4f 	bl	1530 <SEGGER_RTT_HasDataUp>
    1092:	2800      	cmp	r0, #0
    1094:	d0f3      	beq.n	107e <data_out_block_mode+0x4a>
    1096:	782b      	ldrb	r3, [r5, #0]
    1098:	2b00      	cmp	r3, #0
    109a:	d1f3      	bne.n	1084 <data_out_block_mode+0x50>
    109c:	e7ef      	b.n	107e <data_out_block_mode+0x4a>
			on_failed_write(retry_cnt--);
    109e:	3c01      	subs	r4, #1
    10a0:	f7ff ffbc 	bl	101c <on_failed_write.part.0>
    10a4:	e7f2      	b.n	108c <data_out_block_mode+0x58>
		} else if (host_present) {
    10a6:	782b      	ldrb	r3, [r5, #0]
    10a8:	b113      	cbz	r3, 10b0 <data_out_block_mode+0x7c>
	if (retry_cnt == 0) {
    10aa:	3c01      	subs	r4, #1
    10ac:	d104      	bne.n	10b8 <data_out_block_mode+0x84>
		host_present = false;
    10ae:	702c      	strb	r4, [r5, #0]
	} while ((ret == 0) && host_present);
    10b0:	782b      	ldrb	r3, [r5, #0]
    10b2:	2b00      	cmp	r3, #0
    10b4:	d1c7      	bne.n	1046 <data_out_block_mode+0x12>
    10b6:	e7e2      	b.n	107e <data_out_block_mode+0x4a>
    10b8:	f7ff ffb0 	bl	101c <on_failed_write.part.0>
    10bc:	e7f8      	b.n	10b0 <data_out_block_mode+0x7c>
    10be:	bf00      	nop
    10c0:	200008b9 	.word	0x200008b9
    10c4:	200008b8 	.word	0x200008b8
    10c8:	200022fc 	.word	0x200022fc

000010cc <console_out>:
		return c;
	}

#endif  /* CONFIG_UART_CONSOLE_DEBUG_SERVER_HOOKS */

	if ('\n' == c) {
    10cc:	280a      	cmp	r0, #10
{
    10ce:	b538      	push	{r3, r4, r5, lr}
    10d0:	4604      	mov	r4, r0
    10d2:	4d07      	ldr	r5, [pc, #28]	; (10f0 <console_out+0x24>)
	if ('\n' == c) {
    10d4:	d104      	bne.n	10e0 <console_out+0x14>
    10d6:	6828      	ldr	r0, [r5, #0]
						unsigned char out_char)
{
	const struct uart_driver_api *api =
		(const struct uart_driver_api *)dev->driver_api;

	api->poll_out(dev, out_char);
    10d8:	6843      	ldr	r3, [r0, #4]
    10da:	210d      	movs	r1, #13
    10dc:	685b      	ldr	r3, [r3, #4]
    10de:	4798      	blx	r3
		uart_poll_out(uart_console_dev, '\r');
	}
	uart_poll_out(uart_console_dev, c);
    10e0:	6828      	ldr	r0, [r5, #0]
    10e2:	6843      	ldr	r3, [r0, #4]
    10e4:	b2e1      	uxtb	r1, r4
    10e6:	685b      	ldr	r3, [r3, #4]
    10e8:	4798      	blx	r3

	return c;
}
    10ea:	4620      	mov	r0, r4
    10ec:	bd38      	pop	{r3, r4, r5, pc}
    10ee:	bf00      	nop
    10f0:	20000120 	.word	0x20000120

000010f4 <uart_console_hook_install>:
 *
 * @return N/A
 */

void uart_console_hook_install(void)
{
    10f4:	b510      	push	{r4, lr}
	__stdout_hook_install(console_out);
    10f6:	4c04      	ldr	r4, [pc, #16]	; (1108 <uart_console_hook_install+0x14>)
    10f8:	4620      	mov	r0, r4
    10fa:	f001 fca3 	bl	2a44 <__stdout_hook_install>
	__printk_hook_install(console_out);
    10fe:	4620      	mov	r0, r4
}
    1100:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
	__printk_hook_install(console_out);
    1104:	f7ff ba48 	b.w	598 <__printk_hook_install>
    1108:	000010cd 	.word	0x000010cd

0000110c <uart_console_init>:
 * @brief Initialize one UART as the console/debug port
 *
 * @return 0 if successful, otherwise failed.
 */
static int uart_console_init(struct device *arg)
{
    110c:	b508      	push	{r3, lr}
    110e:	4804      	ldr	r0, [pc, #16]	; (1120 <uart_console_init+0x14>)
    1110:	f002 f990 	bl	3434 <z_impl_device_get_binding>

	ARG_UNUSED(arg);

	uart_console_dev = device_get_binding(CONFIG_UART_CONSOLE_ON_DEV_NAME);
    1114:	4b03      	ldr	r3, [pc, #12]	; (1124 <uart_console_init+0x18>)
    1116:	6018      	str	r0, [r3, #0]
		}
	}
	k_busy_wait(1000000);
#endif

	uart_console_hook_install();
    1118:	f7ff ffec 	bl	10f4 <uart_console_hook_install>

	return 0;
}
    111c:	2000      	movs	r0, #0
    111e:	bd08      	pop	{r3, pc}
    1120:	000061d0 	.word	0x000061d0
    1124:	20000120 	.word	0x20000120

00001128 <nrf_power_clock_isr>:
#endif
}

NRF_STATIC_INLINE bool nrf_clock_event_check(NRF_CLOCK_Type const * p_reg, nrf_clock_event_t event)
{
    return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + event));
    1128:	4b16      	ldr	r3, [pc, #88]	; (1184 <nrf_power_clock_isr+0x5c>)
	}
#endif
}

void nrf_power_clock_isr(void *arg)
{
    112a:	b507      	push	{r0, r1, r2, lr}
    112c:	681a      	ldr	r2, [r3, #0]
	bool ret = nrf_clock_event_check(NRF_CLOCK, evt) &&
    112e:	b182      	cbz	r2, 1152 <nrf_power_clock_isr+0x2a>
    return p_reg->INTENSET & mask;
    1130:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
    1134:	f8d2 2304 	ldr.w	r2, [r2, #772]	; 0x304
	if (ret) {
    1138:	07d1      	lsls	r1, r2, #31
    113a:	d50a      	bpl.n	1152 <nrf_power_clock_isr+0x2a>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    113c:	2200      	movs	r2, #0
    113e:	601a      	str	r2, [r3, #0]
    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
    1140:	681b      	ldr	r3, [r3, #0]
	struct device *dev = DEVICE_GET(clock_nrf);

	if (clock_event_check_and_clean(NRF_CLOCK_EVENT_HFCLKSTARTED,
					NRF_CLOCK_INT_HF_STARTED_MASK)) {
		struct nrf_clock_control_sub_data *data =
				get_sub_data(dev, CLOCK_CONTROL_NRF_TYPE_HFCLK);
    1142:	4811      	ldr	r0, [pc, #68]	; (1188 <nrf_power_clock_isr+0x60>)
    1144:	9300      	str	r3, [sp, #0]
    (void)dummy;
    1146:	9b00      	ldr	r3, [sp, #0]

		/* Check needed due to anomaly 201:
		 * HFCLKSTARTED may be generated twice.
		 */
		if (!data->started) {
    1148:	6883      	ldr	r3, [r0, #8]
    114a:	7a59      	ldrb	r1, [r3, #9]
    114c:	b909      	cbnz	r1, 1152 <nrf_power_clock_isr+0x2a>
			clkstarted_handle(dev, CLOCK_CONTROL_NRF_TYPE_HFCLK);
    114e:	f004 f834 	bl	51ba <clkstarted_handle>
    return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + event));
    1152:	4b0e      	ldr	r3, [pc, #56]	; (118c <nrf_power_clock_isr+0x64>)
    1154:	681a      	ldr	r2, [r3, #0]
	bool ret = nrf_clock_event_check(NRF_CLOCK, evt) &&
    1156:	b18a      	cbz	r2, 117c <nrf_power_clock_isr+0x54>
    return p_reg->INTENSET & mask;
    1158:	f04f 4280 	mov.w	r2, #1073741824	; 0x40000000
    115c:	f8d2 2304 	ldr.w	r2, [r2, #772]	; 0x304
	if (ret) {
    1160:	0792      	lsls	r2, r2, #30
    1162:	d50b      	bpl.n	117c <nrf_power_clock_isr+0x54>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    1164:	2200      	movs	r2, #0
    1166:	601a      	str	r2, [r3, #0]
    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
    1168:	681b      	ldr	r3, [r3, #0]
    116a:	9301      	str	r3, [sp, #4]
    (void)dummy;
    116c:	9b01      	ldr	r3, [sp, #4]
					NRF_CLOCK_INT_LF_STARTED_MASK)) {
		if (IS_ENABLED(
			CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION)) {
			z_nrf_clock_calibration_lfclk_started(dev);
		}
		clkstarted_handle(dev, CLOCK_CONTROL_NRF_TYPE_LFCLK);
    116e:	4806      	ldr	r0, [pc, #24]	; (1188 <nrf_power_clock_isr+0x60>)
    1170:	2101      	movs	r1, #1
	usb_power_isr();

	if (IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION)) {
		z_nrf_clock_calibration_isr();
	}
}
    1172:	b003      	add	sp, #12
    1174:	f85d eb04 	ldr.w	lr, [sp], #4
		clkstarted_handle(dev, CLOCK_CONTROL_NRF_TYPE_LFCLK);
    1178:	f004 b81f 	b.w	51ba <clkstarted_handle>
}
    117c:	b003      	add	sp, #12
    117e:	f85d fb04 	ldr.w	pc, [sp], #4
    1182:	bf00      	nop
    1184:	40000100 	.word	0x40000100
    1188:	2000226c 	.word	0x2000226c
    118c:	40000104 	.word	0x40000104

00001190 <wdt_nrf_install_timeout>:
	return -EPERM;
}

static int wdt_nrf_install_timeout(struct device *dev,
				   const struct wdt_timeout_cfg *cfg)
{
    1190:	b537      	push	{r0, r1, r2, r4, r5, lr}
	nrfx_err_t err_code;
	nrfx_wdt_channel_id channel_id;

	if (cfg->flags != WDT_FLAG_RESET_SOC) {
    1192:	7b0b      	ldrb	r3, [r1, #12]
    1194:	2b02      	cmp	r3, #2
{
    1196:	4604      	mov	r4, r0
    1198:	460d      	mov	r5, r1
	if (cfg->flags != WDT_FLAG_RESET_SOC) {
    119a:	d129      	bne.n	11f0 <wdt_nrf_install_timeout+0x60>
		return -ENOTSUP;
	}

	if (cfg->window.min != 0U) {
    119c:	680b      	ldr	r3, [r1, #0]
    119e:	bb23      	cbnz	r3, 11ea <wdt_nrf_install_timeout+0x5a>
		return -EINVAL;
	}

	if (get_dev_data(dev)->m_allocated_channels == 0U) {
    11a0:	6882      	ldr	r2, [r0, #8]
	return dev->driver_data;
    11a2:	684b      	ldr	r3, [r1, #4]
	if (get_dev_data(dev)->m_allocated_channels == 0U) {
    11a4:	f892 1024 	ldrb.w	r1, [r2, #36]	; 0x24
    11a8:	b9e1      	cbnz	r1, 11e4 <wdt_nrf_install_timeout+0x54>
		 * in all nRF chips can use reload values (determining
		 * the timeout) from range 0xF-0xFFFFFFFF given in 32768 Hz
		 * clock ticks. This makes the allowed range of 0x1-0x07CFFFFF
		 * in milliseconds. Check if the provided value is within
		 * this range. */
		if ((cfg->window.max == 0U) || (cfg->window.max > 0x07CFFFFF)) {
    11aa:	4914      	ldr	r1, [pc, #80]	; (11fc <wdt_nrf_install_timeout+0x6c>)
    11ac:	1e58      	subs	r0, r3, #1
    11ae:	4288      	cmp	r0, r1
    11b0:	d81b      	bhi.n	11ea <wdt_nrf_install_timeout+0x5a>
			return -EINVAL;
		}

		/* Save timeout value from first registered watchdog channel. */
		get_dev_data(dev)->m_timeout = cfg->window.max;
    11b2:	6213      	str	r3, [r2, #32]
	return dev->config->config_info;
    11b4:	6823      	ldr	r3, [r4, #0]
	} else if (cfg->window.max != get_dev_data(dev)->m_timeout) {
		return -EINVAL;
	}

	err_code = nrfx_wdt_channel_alloc(&get_dev_config(dev)->wdt,
    11b6:	f10d 0107 	add.w	r1, sp, #7
    11ba:	6898      	ldr	r0, [r3, #8]
    11bc:	f002 f8de 	bl	337c <nrfx_wdt_channel_alloc>
					  &channel_id);

	if (err_code == NRFX_ERROR_NO_MEM) {
    11c0:	4b0f      	ldr	r3, [pc, #60]	; (1200 <wdt_nrf_install_timeout+0x70>)
    11c2:	4298      	cmp	r0, r3
    11c4:	d017      	beq.n	11f6 <wdt_nrf_install_timeout+0x66>
		return -ENOMEM;
	}

	if (cfg->callback != NULL) {
    11c6:	68ab      	ldr	r3, [r5, #8]
    11c8:	f89d 0007 	ldrb.w	r0, [sp, #7]
    11cc:	b113      	cbz	r3, 11d4 <wdt_nrf_install_timeout+0x44>
    11ce:	68a2      	ldr	r2, [r4, #8]
		get_dev_data(dev)->m_callbacks[channel_id] = cfg->callback;
    11d0:	f842 3020 	str.w	r3, [r2, r0, lsl #2]
	}

	get_dev_data(dev)->m_allocated_channels++;
    11d4:	68a2      	ldr	r2, [r4, #8]
    11d6:	f892 3024 	ldrb.w	r3, [r2, #36]	; 0x24
    11da:	3301      	adds	r3, #1
    11dc:	f882 3024 	strb.w	r3, [r2, #36]	; 0x24
	return channel_id;
}
    11e0:	b003      	add	sp, #12
    11e2:	bd30      	pop	{r4, r5, pc}
	} else if (cfg->window.max != get_dev_data(dev)->m_timeout) {
    11e4:	6a12      	ldr	r2, [r2, #32]
    11e6:	429a      	cmp	r2, r3
    11e8:	d0e4      	beq.n	11b4 <wdt_nrf_install_timeout+0x24>
		return -EINVAL;
    11ea:	f06f 0015 	mvn.w	r0, #21
    11ee:	e7f7      	b.n	11e0 <wdt_nrf_install_timeout+0x50>
		return -ENOTSUP;
    11f0:	f06f 0022 	mvn.w	r0, #34	; 0x22
    11f4:	e7f4      	b.n	11e0 <wdt_nrf_install_timeout+0x50>
		return -ENOMEM;
    11f6:	f06f 000b 	mvn.w	r0, #11
    11fa:	e7f1      	b.n	11e0 <wdt_nrf_install_timeout+0x50>
    11fc:	07cffffe 	.word	0x07cffffe
    1200:	0bad0002 	.word	0x0bad0002

00001204 <wdt_0_init>:
			    &wdt_##idx##z_config,			       \
			    PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,  \
			    &wdt_nrfx_driver_api)

#ifdef CONFIG_NRFX_WDT0
WDT_NRFX_WDT_DEVICE(0);
    1204:	b510      	push	{r4, lr}
    1206:	4604      	mov	r4, r0
    1208:	2200      	movs	r2, #0
    120a:	2101      	movs	r1, #1
    120c:	2010      	movs	r0, #16
    120e:	f000 faa1 	bl	1754 <z_arm_irq_priority_set>
	return dev->config->config_info;
    1212:	6823      	ldr	r3, [r4, #0]
WDT_NRFX_WDT_DEVICE(0);
    1214:	4a06      	ldr	r2, [pc, #24]	; (1230 <wdt_0_init+0x2c>)
	return dev->config->config_info;
    1216:	6898      	ldr	r0, [r3, #8]
WDT_NRFX_WDT_DEVICE(0);
    1218:	f100 0108 	add.w	r1, r0, #8
    121c:	f002 f876 	bl	330c <nrfx_wdt_init>
    1220:	4b04      	ldr	r3, [pc, #16]	; (1234 <wdt_0_init+0x30>)
    1222:	4298      	cmp	r0, r3
    1224:	bf14      	ite	ne
    1226:	f06f 000f 	mvnne.w	r0, #15
    122a:	2000      	moveq	r0, #0
    122c:	bd10      	pop	{r4, pc}
    122e:	bf00      	nop
    1230:	00001239 	.word	0x00001239
    1234:	0bad0000 	.word	0x0bad0000

00001238 <wdt_0_event_handler>:
    1238:	b538      	push	{r3, r4, r5, lr}
	for (i = 0; i < get_dev_data(dev)->m_allocated_channels; ++i) {
    123a:	4d0c      	ldr	r5, [pc, #48]	; (126c <wdt_0_event_handler+0x34>)
    123c:	2400      	movs	r4, #0
    123e:	68aa      	ldr	r2, [r5, #8]
    1240:	f892 3024 	ldrb.w	r3, [r2, #36]	; 0x24
    1244:	429c      	cmp	r4, r3
    1246:	db00      	blt.n	124a <wdt_0_event_handler+0x12>
WDT_NRFX_WDT_DEVICE(0);
    1248:	bd38      	pop	{r3, r4, r5, pc}
	return dev->config->config_info;
    124a:	682b      	ldr	r3, [r5, #0]
		if (nrf_wdt_request_status(get_dev_config(dev)->wdt.p_reg,
    124c:	689b      	ldr	r3, [r3, #8]
    124e:	681b      	ldr	r3, [r3, #0]
}

NRF_STATIC_INLINE bool nrf_wdt_request_status(NRF_WDT_Type const *  p_reg,
                                              nrf_wdt_rr_register_t rr_register)
{
    return (bool)(((p_reg->REQSTATUS) >> rr_register) & 0x1UL);
    1250:	f8d3 3404 	ldr.w	r3, [r3, #1028]	; 0x404
    1254:	40e3      	lsrs	r3, r4
    1256:	07db      	lsls	r3, r3, #31
    1258:	d505      	bpl.n	1266 <wdt_0_event_handler+0x2e>
			if (get_dev_data(dev)->m_callbacks[i]) {
    125a:	f852 3024 	ldr.w	r3, [r2, r4, lsl #2]
    125e:	b113      	cbz	r3, 1266 <wdt_0_event_handler+0x2e>
				get_dev_data(dev)->m_callbacks[i](dev, i);
    1260:	4621      	mov	r1, r4
    1262:	4628      	mov	r0, r5
    1264:	4798      	blx	r3
	for (i = 0; i < get_dev_data(dev)->m_allocated_channels; ++i) {
    1266:	3401      	adds	r4, #1
    1268:	e7e9      	b.n	123e <wdt_0_event_handler+0x6>
    126a:	bf00      	nop
    126c:	20002278 	.word	0x20002278

00001270 <rtc1_nrf_isr>:
 * symbol.
 */
void rtc1_nrf_isr(void *arg)
{
	ARG_UNUSED(arg);
	RTC->EVENTS_COMPARE[0] = 0;
    1270:	4b0d      	ldr	r3, [pc, #52]	; (12a8 <rtc1_nrf_isr+0x38>)
    1272:	2200      	movs	r2, #0
    1274:	f8c3 2140 	str.w	r2, [r3, #320]	; 0x140
	__asm__ volatile(
    1278:	f04f 0220 	mov.w	r2, #32
    127c:	f3ef 8111 	mrs	r1, BASEPRI
    1280:	f382 8811 	msr	BASEPRI, r2
    1284:	f3bf 8f6f 	isb	sy

	k_spinlock_key_t key = k_spin_lock(&lock);
	u32_t t = counter();
	u32_t dticks = counter_sub(t, last_count) / CYC_PER_TICK;
    1288:	4a08      	ldr	r2, [pc, #32]	; (12ac <rtc1_nrf_isr+0x3c>)
#endif
}

NRF_STATIC_INLINE uint32_t nrf_rtc_counter_get(NRF_RTC_Type const * p_reg)
{
     return p_reg->COUNTER;
    128a:	f8d3 0504 	ldr.w	r0, [r3, #1284]	; 0x504
    128e:	6813      	ldr	r3, [r2, #0]
	return (a - b) & COUNTER_MAX;
    1290:	1ac0      	subs	r0, r0, r3
    1292:	f020 407f 	bic.w	r0, r0, #4278190080	; 0xff000000

	last_count += dticks * CYC_PER_TICK;
    1296:	4403      	add	r3, r0
    1298:	6013      	str	r3, [r2, #0]
	__asm__ volatile(
    129a:	f381 8811 	msr	BASEPRI, r1
    129e:	f3bf 8f6f 	isb	sy
		}
		set_comparator(next);
	}

	k_spin_unlock(&lock, key);
	z_clock_announce(IS_ENABLED(CONFIG_TICKLESS_KERNEL) ? dticks : 1);
    12a2:	f003 b863 	b.w	436c <z_clock_announce>
    12a6:	bf00      	nop
    12a8:	40011000 	.word	0x40011000
    12ac:	20000164 	.word	0x20000164

000012b0 <z_clock_driver_init>:
}

int z_clock_driver_init(struct device *device)
{
    12b0:	b573      	push	{r0, r1, r4, r5, r6, lr}
    12b2:	4818      	ldr	r0, [pc, #96]	; (1314 <z_clock_driver_init+0x64>)
    12b4:	f002 f8be 	bl	3434 <z_impl_device_get_binding>
	struct device *clock;

	ARG_UNUSED(device);

	clock = device_get_binding(DT_INST_0_NORDIC_NRF_CLOCK_LABEL);
	if (!clock) {
    12b8:	b348      	cbz	r0, 130e <z_clock_driver_init+0x5e>
				   clock_control_subsys_t sys)
{
	const struct clock_control_driver_api *api =
		(const struct clock_control_driver_api *)dev->driver_api;

	return api->on(dev, sys);
    12ba:	6843      	ldr	r3, [r0, #4]
}

NRF_STATIC_INLINE void nrf_rtc_prescaler_set(NRF_RTC_Type * p_reg, uint32_t val)
{
    NRFX_ASSERT(val <= (RTC_PRESCALER_PRESCALER_Msk >> RTC_PRESCALER_PRESCALER_Pos));
    p_reg->PRESCALER = val;
    12bc:	4d16      	ldr	r5, [pc, #88]	; (1318 <z_clock_driver_init+0x68>)
    12be:	681b      	ldr	r3, [r3, #0]
    12c0:	2101      	movs	r1, #1
    12c2:	4798      	blx	r3
    12c4:	2400      	movs	r4, #0
    p_reg->CC[ch] = cc_val;
    12c6:	2601      	movs	r6, #1
    p_reg->INTENSET = mask;
    12c8:	f44f 3380 	mov.w	r3, #65536	; 0x10000
    p_reg->PRESCALER = val;
    12cc:	f8c5 4508 	str.w	r4, [r5, #1288]	; 0x508
    p_reg->CC[ch] = cc_val;
    12d0:	f8c5 6540 	str.w	r6, [r5, #1344]	; 0x540
    p_reg->INTENSET = mask;
    12d4:	f8c5 3304 	str.w	r3, [r5, #772]	; 0x304
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
    12d8:	f103 4380 	add.w	r3, r3, #1073741824	; 0x40000000
    12dc:	f503 538a 	add.w	r3, r3, #4416	; 0x1140
 */
__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
  if ((int32_t)(IRQn) >= 0)
  {
    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    12e0:	f44f 3200 	mov.w	r2, #131072	; 0x20000
    12e4:	601c      	str	r4, [r3, #0]
    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
    12e6:	681b      	ldr	r3, [r3, #0]
    12e8:	9301      	str	r3, [sp, #4]
    (void)dummy;
    12ea:	9b01      	ldr	r3, [sp, #4]
    12ec:	4b0b      	ldr	r3, [pc, #44]	; (131c <z_clock_driver_init+0x6c>)

	/* Clear the event flag and possible pending interrupt */
	nrf_rtc_event_clear(RTC, NRF_RTC_EVENT_COMPARE_0);
	NVIC_ClearPendingIRQ(RTC1_IRQn);

	IRQ_CONNECT(RTC1_IRQn, 1, rtc1_nrf_isr, 0, 0);
    12ee:	4631      	mov	r1, r6
    12f0:	f8c3 2180 	str.w	r2, [r3, #384]	; 0x180
    12f4:	2011      	movs	r0, #17
    12f6:	4622      	mov	r2, r4
    12f8:	f000 fa2c 	bl	1754 <z_arm_irq_priority_set>
	irq_enable(RTC1_IRQn);
    12fc:	2011      	movs	r0, #17
    12fe:	f000 fa19 	bl	1734 <arch_irq_enable>
    return (uint32_t)p_reg + task;
}

NRF_STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_reg, nrf_rtc_task_t task)
{
    *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
    1302:	4b07      	ldr	r3, [pc, #28]	; (1320 <z_clock_driver_init+0x70>)

	if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
		set_comparator(counter() + CYC_PER_TICK);
	}

	return 0;
    1304:	4620      	mov	r0, r4
    1306:	601e      	str	r6, [r3, #0]
    1308:	602e      	str	r6, [r5, #0]
}
    130a:	b002      	add	sp, #8
    130c:	bd70      	pop	{r4, r5, r6, pc}
		return -1;
    130e:	f04f 30ff 	mov.w	r0, #4294967295
    1312:	e7fa      	b.n	130a <z_clock_driver_init+0x5a>
    1314:	000061fe 	.word	0x000061fe
    1318:	40011000 	.word	0x40011000
    131c:	e000e100 	.word	0xe000e100
    1320:	40011008 	.word	0x40011008

00001324 <z_clock_set_timeout>:

void z_clock_set_timeout(s32_t ticks, bool idle)
{
    1324:	b5f0      	push	{r4, r5, r6, r7, lr}
	ARG_UNUSED(idle);

#ifdef CONFIG_TICKLESS_KERNEL
	ticks = (ticks == K_FOREVER) ? MAX_TICKS : ticks;
    1326:	4e25      	ldr	r6, [pc, #148]	; (13bc <z_clock_set_timeout+0x98>)
    1328:	f1b0 3fff 	cmp.w	r0, #4294967295
    132c:	bf08      	it	eq
    132e:	4630      	moveq	r0, r6
	__asm__ volatile(
    1330:	f04f 0320 	mov.w	r3, #32
    1334:	f3ef 8511 	mrs	r5, BASEPRI
    1338:	f383 8811 	msr	BASEPRI, r3
    133c:	f3bf 8f6f 	isb	sy
     return p_reg->COUNTER;
    1340:	491f      	ldr	r1, [pc, #124]	; (13c0 <z_clock_set_timeout+0x9c>)
	ticks = MAX(MIN(ticks - 1, (s32_t)MAX_TICKS), 0);

	k_spinlock_key_t key = k_spin_lock(&lock);
	u32_t cyc, dt, t = counter();
	u32_t unannounced = counter_sub(t, last_count);
    1342:	4b20      	ldr	r3, [pc, #128]	; (13c4 <z_clock_set_timeout+0xa0>)
    1344:	f8d1 4504 	ldr.w	r4, [r1, #1284]	; 0x504
    1348:	681b      	ldr	r3, [r3, #0]
	return (a - b) & COUNTER_MAX;
    134a:	1ae2      	subs	r2, r4, r3
    134c:	f022 477f 	bic.w	r7, r2, #4278190080	; 0xff000000
	/* If we haven't announced for more than half the 24-bit wrap
	 * duration, then force an announce to avoid loss of a wrap
	 * event.  This can happen if new timeouts keep being set
	 * before the existing one triggers the interrupt.
	 */
	if (unannounced >= COUNTER_HALF_SPAN) {
    1350:	0212      	lsls	r2, r2, #8
    1352:	d419      	bmi.n	1388 <z_clock_set_timeout+0x64>
	ticks = MAX(MIN(ticks - 1, (s32_t)MAX_TICKS), 0);
    1354:	1e42      	subs	r2, r0, #1
    1356:	ea22 72e2 	bic.w	r2, r2, r2, asr #31
    135a:	42b2      	cmp	r2, r6
    135c:	bfa8      	it	ge
    135e:	4632      	movge	r2, r6
	}

	/* Get the cycles from last_count to the tick boundary after
	 * the requested ticks have passed starting now.
	 */
	cyc = ticks * CYC_PER_TICK + 1 + unannounced;
    1360:	1c78      	adds	r0, r7, #1
    1362:	4410      	add	r0, r2
	 */
	if (cyc > MAX_CYCLES) {
		cyc = MAX_CYCLES;
	}

	cyc += last_count;
    1364:	42b0      	cmp	r0, r6
    1366:	bf94      	ite	ls
    1368:	1818      	addls	r0, r3, r0
    136a:	1998      	addhi	r0, r3, r6
	return (a - b) & COUNTER_MAX;
    136c:	1b04      	subs	r4, r0, r4
    136e:	f024 447f 	bic.w	r4, r4, #4278190080	; 0xff000000
    1372:	f020 437f 	bic.w	r3, r0, #4278190080	; 0xff000000
	 * least on nRF52.  Some experimentation on nrf52840 shows
	 * that you need to be early by about 400 processor cycles
	 * (about 1/5th of a RTC cycle) in order to reliably get the
	 * interrupt.  The docs say two cycles, they mean two cycles.
	 */
	if (counter_sub(cyc, t) > 2) {
    1376:	2c02      	cmp	r4, #2
    p_reg->CC[ch] = cc_val;
    1378:	f8c1 3540 	str.w	r3, [r1, #1344]	; 0x540
    137c:	d906      	bls.n	138c <z_clock_set_timeout+0x68>
	__asm__ volatile(
    137e:	f385 8811 	msr	BASEPRI, r5
    1382:	f3bf 8f6f 	isb	sy
	}
#endif

	k_spin_unlock(&lock, key);
#endif /* CONFIG_TICKLESS_KERNEL */
}
    1386:	bdf0      	pop	{r4, r5, r6, r7, pc}
		ticks = 0;
    1388:	2200      	movs	r2, #0
    138a:	e7e9      	b.n	1360 <z_clock_set_timeout+0x3c>
     return p_reg->COUNTER;
    138c:	f8d1 3504 	ldr.w	r3, [r1, #1284]	; 0x504
		if (dt == 0 || dt > 0x7fffff) {
    1390:	4a0d      	ldr	r2, [pc, #52]	; (13c8 <z_clock_set_timeout+0xa4>)
	return (a - b) & COUNTER_MAX;
    1392:	1ac3      	subs	r3, r0, r3
    1394:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
		if (dt == 0 || dt > 0x7fffff) {
    1398:	1e5c      	subs	r4, r3, #1
    139a:	4294      	cmp	r4, r2
    139c:	d905      	bls.n	13aa <z_clock_set_timeout+0x86>
    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    139e:	4b0b      	ldr	r3, [pc, #44]	; (13cc <z_clock_set_timeout+0xa8>)
    13a0:	f44f 3200 	mov.w	r2, #131072	; 0x20000
    13a4:	f8c3 2100 	str.w	r2, [r3, #256]	; 0x100
    13a8:	e7e9      	b.n	137e <z_clock_set_timeout+0x5a>
		} else if (dt == 1) {
    13aa:	2b01      	cmp	r3, #1
			set_comparator(cyc + 2);
    13ac:	bf02      	ittt	eq
    13ae:	3002      	addeq	r0, #2
	nrf_rtc_cc_set(RTC, 0, cyc & COUNTER_MAX);
    13b0:	f020 407f 	biceq.w	r0, r0, #4278190080	; 0xff000000
    p_reg->CC[ch] = cc_val;
    13b4:	f8c1 0540 	streq.w	r0, [r1, #1344]	; 0x540
    13b8:	e7e1      	b.n	137e <z_clock_set_timeout+0x5a>
    13ba:	bf00      	nop
    13bc:	00fffffe 	.word	0x00fffffe
    13c0:	40011000 	.word	0x40011000
    13c4:	20000164 	.word	0x20000164
    13c8:	007ffffe 	.word	0x007ffffe
    13cc:	e000e100 	.word	0xe000e100

000013d0 <z_clock_elapsed>:
	__asm__ volatile(
    13d0:	f04f 0220 	mov.w	r2, #32
    13d4:	f3ef 8311 	mrs	r3, BASEPRI
    13d8:	f382 8811 	msr	BASEPRI, r2
    13dc:	f3bf 8f6f 	isb	sy
     return p_reg->COUNTER;
    13e0:	4a06      	ldr	r2, [pc, #24]	; (13fc <z_clock_elapsed+0x2c>)
    13e2:	f8d2 0504 	ldr.w	r0, [r2, #1284]	; 0x504
	if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
		return 0;
	}

	k_spinlock_key_t key = k_spin_lock(&lock);
	u32_t ret = counter_sub(counter(), last_count) / CYC_PER_TICK;
    13e6:	4a06      	ldr	r2, [pc, #24]	; (1400 <z_clock_elapsed+0x30>)
	return (a - b) & COUNTER_MAX;
    13e8:	6812      	ldr	r2, [r2, #0]
    13ea:	1a80      	subs	r0, r0, r2
    13ec:	f020 407f 	bic.w	r0, r0, #4278190080	; 0xff000000
	__asm__ volatile(
    13f0:	f383 8811 	msr	BASEPRI, r3
    13f4:	f3bf 8f6f 	isb	sy

	k_spin_unlock(&lock, key);
	return ret;
}
    13f8:	4770      	bx	lr
    13fa:	bf00      	nop
    13fc:	40011000 	.word	0x40011000
    1400:	20000164 	.word	0x20000164

00001404 <z_timer_cycle_get_32>:
	__asm__ volatile(
    1404:	f04f 0320 	mov.w	r3, #32
    1408:	f3ef 8211 	mrs	r2, BASEPRI
    140c:	f383 8811 	msr	BASEPRI, r3
    1410:	f3bf 8f6f 	isb	sy

u32_t z_timer_cycle_get_32(void)
{
	k_spinlock_key_t key = k_spin_lock(&lock);
	u32_t ret = counter_sub(counter(), last_count) + last_count;
    1414:	4906      	ldr	r1, [pc, #24]	; (1430 <z_timer_cycle_get_32+0x2c>)
    1416:	4b07      	ldr	r3, [pc, #28]	; (1434 <z_timer_cycle_get_32+0x30>)
    1418:	6808      	ldr	r0, [r1, #0]
    141a:	f8d3 3504 	ldr.w	r3, [r3, #1284]	; 0x504
	__asm__ volatile(
    141e:	f382 8811 	msr	BASEPRI, r2
    1422:	f3bf 8f6f 	isb	sy
	return (a - b) & COUNTER_MAX;
    1426:	1a1b      	subs	r3, r3, r0
    1428:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000

	k_spin_unlock(&lock, key);
	return ret;
}
    142c:	4418      	add	r0, r3
    142e:	4770      	bx	lr
    1430:	20000164 	.word	0x20000164
    1434:	40011000 	.word	0x40011000

00001438 <_DoInit>:
*
*/
#define INIT()  do {                                            \
                  if (_SEGGER_RTT.acID[0] == '\0') { _DoInit(); }  \
                } while (0)
static void _DoInit(void) {
    1438:	b510      	push	{r4, lr}
  SEGGER_RTT_CB* p;
  //
  // Initialize control block
  //
  p = &_SEGGER_RTT;
  p->MaxNumUpBuffers    = SEGGER_RTT_MAX_NUM_UP_BUFFERS;
    143a:	4c11      	ldr	r4, [pc, #68]	; (1480 <_DoInit+0x48>)
  p->MaxNumDownBuffers  = SEGGER_RTT_MAX_NUM_DOWN_BUFFERS;
  //
  // Initialize up buffer 0
  //
  p->aUp[0].sName         = "Terminal";
    143c:	4a11      	ldr	r2, [pc, #68]	; (1484 <_DoInit+0x4c>)
    143e:	61a2      	str	r2, [r4, #24]
  p->MaxNumUpBuffers    = SEGGER_RTT_MAX_NUM_UP_BUFFERS;
    1440:	2303      	movs	r3, #3
  p->MaxNumDownBuffers  = SEGGER_RTT_MAX_NUM_DOWN_BUFFERS;
    1442:	e9c4 3304 	strd	r3, r3, [r4, #16]
  p->aUp[0].pBuffer       = _acUpBuffer;
    1446:	4b10      	ldr	r3, [pc, #64]	; (1488 <_DoInit+0x50>)
    1448:	61e3      	str	r3, [r4, #28]
  p->aUp[0].WrOff         = 0u;
  p->aUp[0].Flags         = SEGGER_RTT_MODE_DEFAULT;
  //
  // Initialize down buffer 0
  //
  p->aDown[0].sName         = "Terminal";
    144a:	6622      	str	r2, [r4, #96]	; 0x60
  p->aUp[0].SizeOfBuffer  = sizeof(_acUpBuffer);
    144c:	f44f 6380 	mov.w	r3, #1024	; 0x400
  p->aDown[0].pBuffer       = _acDownBuffer;
    1450:	4a0e      	ldr	r2, [pc, #56]	; (148c <_DoInit+0x54>)
  p->aUp[0].SizeOfBuffer  = sizeof(_acUpBuffer);
    1452:	6223      	str	r3, [r4, #32]
  p->aDown[0].pBuffer       = _acDownBuffer;
    1454:	6662      	str	r2, [r4, #100]	; 0x64
  p->aUp[0].RdOff         = 0u;
    1456:	2300      	movs	r3, #0
  p->aDown[0].SizeOfBuffer  = sizeof(_acDownBuffer);
    1458:	2210      	movs	r2, #16
  //
  // Finish initialization of the control block.
  // Copy Id string in three steps to make sure "SEGGER RTT" is not found
  // in initializer memory (usually flash) by J-Link
  //
  strcpy(&p->acID[7], "RTT");
    145a:	490d      	ldr	r1, [pc, #52]	; (1490 <_DoInit+0x58>)
  p->aUp[0].RdOff         = 0u;
    145c:	62a3      	str	r3, [r4, #40]	; 0x28
  strcpy(&p->acID[7], "RTT");
    145e:	1de0      	adds	r0, r4, #7
  p->aUp[0].WrOff         = 0u;
    1460:	6263      	str	r3, [r4, #36]	; 0x24
  p->aUp[0].Flags         = SEGGER_RTT_MODE_DEFAULT;
    1462:	62e3      	str	r3, [r4, #44]	; 0x2c
  p->aDown[0].RdOff         = 0u;
    1464:	6723      	str	r3, [r4, #112]	; 0x70
  p->aDown[0].WrOff         = 0u;
    1466:	66e3      	str	r3, [r4, #108]	; 0x6c
  p->aDown[0].Flags         = SEGGER_RTT_MODE_DEFAULT;
    1468:	6763      	str	r3, [r4, #116]	; 0x74
  p->aDown[0].SizeOfBuffer  = sizeof(_acDownBuffer);
    146a:	66a2      	str	r2, [r4, #104]	; 0x68
  strcpy(&p->acID[7], "RTT");
    146c:	f003 ffe7 	bl	543e <strcpy>
  strcpy(&p->acID[0], "SEGGER");
    1470:	4908      	ldr	r1, [pc, #32]	; (1494 <_DoInit+0x5c>)
    1472:	4620      	mov	r0, r4
    1474:	f003 ffe3 	bl	543e <strcpy>
  p->acID[6] = ' ';
    1478:	2320      	movs	r3, #32
    147a:	71a3      	strb	r3, [r4, #6]
}
    147c:	bd10      	pop	{r4, pc}
    147e:	bf00      	nop
    1480:	20000168 	.word	0x20000168
    1484:	00006231 	.word	0x00006231
    1488:	200008ca 	.word	0x200008ca
    148c:	200008ba 	.word	0x200008ba
    1490:	0000623a 	.word	0x0000623a
    1494:	0000623e 	.word	0x0000623e

00001498 <SEGGER_RTT_WriteSkipNoLock>:
*    (2) For performance reasons this function does not call Init()
*        and may only be called after RTT has been initialized.
*        Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
*/
#if (RTT_USE_ASM == 0)
unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
    1498:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
  //
  // 1) is the most common case for large buffers and assuming that J-Link reads the data fast enough
  //
  pData = (const char *)pBuffer;
  pRing = &_SEGGER_RTT.aUp[BufferIndex];
  RdOff = pRing->RdOff;
    149c:	4e23      	ldr	r6, [pc, #140]	; (152c <SEGGER_RTT_WriteSkipNoLock+0x94>)
    149e:	f04f 0b18 	mov.w	fp, #24
unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
    14a2:	4614      	mov	r4, r2
  RdOff = pRing->RdOff;
    14a4:	fb0b 6200 	mla	r2, fp, r0, r6
unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
    14a8:	4607      	mov	r7, r0
  RdOff = pRing->RdOff;
    14aa:	6a93      	ldr	r3, [r2, #40]	; 0x28
  WrOff = pRing->WrOff;
    14ac:	6a55      	ldr	r5, [r2, #36]	; 0x24
  if (RdOff <= WrOff) {                                 // Case 1), 2) or 3)
    14ae:	42ab      	cmp	r3, r5
unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
    14b0:	4688      	mov	r8, r1
  if (RdOff <= WrOff) {                                 // Case 1), 2) or 3)
    14b2:	d834      	bhi.n	151e <SEGGER_RTT_WriteSkipNoLock+0x86>
    Avail = pRing->SizeOfBuffer - WrOff - 1u;           // Space until wrap-around (assume 1 byte not usable for case that RdOff == 0)
    14b4:	f8d2 a020 	ldr.w	sl, [r2, #32]
    14b8:	ebaa 0905 	sub.w	r9, sl, r5
    14bc:	f109 32ff 	add.w	r2, r9, #4294967295
    if (Avail >= NumBytes) {                            // Case 1)?
    14c0:	42a2      	cmp	r2, r4
    14c2:	d311      	bcc.n	14e8 <SEGGER_RTT_WriteSkipNoLock+0x50>
CopyStraight:
      memcpy(pRing->pBuffer + WrOff, pData, NumBytes);
    14c4:	f04f 0918 	mov.w	r9, #24
    14c8:	fb07 9309 	mla	r3, r7, r9, r9
    14cc:	4433      	add	r3, r6
    14ce:	4622      	mov	r2, r4
    14d0:	6858      	ldr	r0, [r3, #4]
    14d2:	4641      	mov	r1, r8
    14d4:	4428      	add	r0, r5
    14d6:	f003 ffe9 	bl	54ac <memcpy>
      pRing->WrOff = WrOff + NumBytes;
    14da:	fb09 6607 	mla	r6, r9, r7, r6
    14de:	442c      	add	r4, r5
      // Therefore, check if 2nd memcpy is necessary at all
      //
      if (NumBytes) {
        memcpy(pRing->pBuffer, pData + Rem, NumBytes);
      }
      pRing->WrOff = NumBytes;
    14e0:	6274      	str	r4, [r6, #36]	; 0x24
      return 1;
    14e2:	2001      	movs	r0, #1
    if (Avail >= NumBytes) {                           // Case 4)? => If not, we have case 5) (does not fit)
      goto CopyStraight;
    }
  }
  return 0;     // No space in buffer
}
    14e4:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
    Avail += RdOff;                                     // Space incl. wrap-around
    14e8:	4413      	add	r3, r2
    if (Avail >= NumBytes) {                            // Case 2? => If not, we have case 3) (does not fit)
    14ea:	429c      	cmp	r4, r3
    14ec:	d81b      	bhi.n	1526 <SEGGER_RTT_WriteSkipNoLock+0x8e>
      memcpy(pRing->pBuffer + WrOff, pData, Rem);       // Copy 1st chunk
    14ee:	fb00 bb0b 	mla	fp, r0, fp, fp
    14f2:	44b3      	add	fp, r6
    14f4:	464a      	mov	r2, r9
    14f6:	f8db 0004 	ldr.w	r0, [fp, #4]
    14fa:	442c      	add	r4, r5
    14fc:	4428      	add	r0, r5
    14fe:	f003 ffd5 	bl	54ac <memcpy>
      if (NumBytes) {
    1502:	ebb4 040a 	subs.w	r4, r4, sl
    1506:	d006      	beq.n	1516 <SEGGER_RTT_WriteSkipNoLock+0x7e>
        memcpy(pRing->pBuffer, pData + Rem, NumBytes);
    1508:	4622      	mov	r2, r4
    150a:	eb08 0109 	add.w	r1, r8, r9
    150e:	f8db 0004 	ldr.w	r0, [fp, #4]
    1512:	f003 ffcb 	bl	54ac <memcpy>
      pRing->WrOff = NumBytes;
    1516:	2318      	movs	r3, #24
    1518:	fb03 6607 	mla	r6, r3, r7, r6
    151c:	e7e0      	b.n	14e0 <SEGGER_RTT_WriteSkipNoLock+0x48>
    Avail = RdOff - WrOff - 1u;
    151e:	3b01      	subs	r3, #1
    1520:	1b5b      	subs	r3, r3, r5
    if (Avail >= NumBytes) {                           // Case 4)? => If not, we have case 5) (does not fit)
    1522:	429c      	cmp	r4, r3
    1524:	d9ce      	bls.n	14c4 <SEGGER_RTT_WriteSkipNoLock+0x2c>
  return 0;     // No space in buffer
    1526:	2000      	movs	r0, #0
    1528:	e7dc      	b.n	14e4 <SEGGER_RTT_WriteSkipNoLock+0x4c>
    152a:	bf00      	nop
    152c:	20000168 	.word	0x20000168

00001530 <SEGGER_RTT_HasDataUp>:
unsigned SEGGER_RTT_HasDataUp(unsigned BufferIndex) {
  SEGGER_RTT_BUFFER_UP* pRing;
  unsigned                v;

  pRing = &_SEGGER_RTT.aUp[BufferIndex];
  v = pRing->RdOff;
    1530:	4a03      	ldr	r2, [pc, #12]	; (1540 <SEGGER_RTT_HasDataUp+0x10>)
    1532:	2318      	movs	r3, #24
    1534:	fb03 2300 	mla	r3, r3, r0, r2
    1538:	6a9a      	ldr	r2, [r3, #40]	; 0x28
  return pRing->WrOff - v;
    153a:	6a58      	ldr	r0, [r3, #36]	; 0x24
}
    153c:	1a80      	subs	r0, r0, r2
    153e:	4770      	bx	lr
    1540:	20000168 	.word	0x20000168

00001544 <nrf_cc310_platform_abort_init>:

/** @brief Function to initialize the nrf_cc310_platform abort APIs.
 */
void nrf_cc310_platform_abort_init(void)
{
	nrf_cc310_platform_set_abort(&apis);
    1544:	4801      	ldr	r0, [pc, #4]	; (154c <nrf_cc310_platform_abort_init+0x8>)
    1546:	f003 b81d 	b.w	4584 <nrf_cc310_platform_set_abort>
    154a:	bf00      	nop
    154c:	00005ed8 	.word	0x00005ed8

00001550 <mutex_unlock>:
}


/** @brief Static function to unlock a mutex
 */
static int32_t mutex_unlock(nrf_cc310_platform_mutex_t *mutex) {
    1550:	b508      	push	{r3, lr}
    struct k_mutex * p_mutex;

    /* Ensure that the mutex param is valid (not NULL) */
    if(mutex == NULL) {
    1552:	b130      	cbz	r0, 1562 <mutex_unlock+0x12>
        return NRF_CC310_PLATFORM_ERROR_PARAM_NULL;
    }

    /* Ensure that the mutex has been initialized */
    if (mutex->flags == NRF_CC310_PLATFORM_MUTEX_MASK_INVALID) {
    1554:	6843      	ldr	r3, [r0, #4]
    1556:	b13b      	cbz	r3, 1568 <mutex_unlock+0x18>
        return NRF_CC310_PLATFORM_ERROR_MUTEX_NOT_INITIALIZED;
    }

    p_mutex = (struct k_mutex *)mutex->mutex;
    1558:	6800      	ldr	r0, [r0, #0]
    155a:	f002 f9cd 	bl	38f8 <z_impl_k_mutex_unlock>

    k_mutex_unlock(p_mutex);
    return NRF_CC310_PLATFORM_SUCCESS;
    155e:	2000      	movs	r0, #0
}
    1560:	bd08      	pop	{r3, pc}
        return NRF_CC310_PLATFORM_ERROR_PARAM_NULL;
    1562:	f46f 40e0 	mvn.w	r0, #28672	; 0x7000
    1566:	e7fb      	b.n	1560 <mutex_unlock+0x10>
        return NRF_CC310_PLATFORM_ERROR_MUTEX_NOT_INITIALIZED;
    1568:	4800      	ldr	r0, [pc, #0]	; (156c <mutex_unlock+0x1c>)
    156a:	e7f9      	b.n	1560 <mutex_unlock+0x10>
    156c:	ffff8fea 	.word	0xffff8fea

00001570 <mutex_free>:
static void mutex_free(nrf_cc310_platform_mutex_t *mutex) {
    1570:	b538      	push	{r3, r4, r5, lr}
    if (mutex == NULL) {
    1572:	4604      	mov	r4, r0
    1574:	b918      	cbnz	r0, 157e <mutex_free+0xe>
        platform_abort_apis.abort_fn(
    1576:	4b0b      	ldr	r3, [pc, #44]	; (15a4 <mutex_free+0x34>)
    1578:	480b      	ldr	r0, [pc, #44]	; (15a8 <mutex_free+0x38>)
    157a:	685b      	ldr	r3, [r3, #4]
    157c:	4798      	blx	r3
    if (mutex->flags == NRF_CC310_PLATFORM_MUTEX_MASK_INVALID) {
    157e:	6865      	ldr	r5, [r4, #4]
    1580:	b155      	cbz	r5, 1598 <mutex_free+0x28>
    if ((mutex->flags & NRF_CC310_PLATFORM_MUTEX_MASK_IS_ALLOCATED) == 0) {
    1582:	f015 0502 	ands.w	r5, r5, #2
    1586:	6820      	ldr	r0, [r4, #0]
    1588:	d107      	bne.n	159a <mutex_free+0x2a>
        k_mem_slab_free(&mutex_slab, mutex->mutex);
    158a:	4601      	mov	r1, r0
    158c:	4807      	ldr	r0, [pc, #28]	; (15ac <mutex_free+0x3c>)
    158e:	f002 f913 	bl	37b8 <k_mem_slab_free>
        mutex->mutex = NULL;
    1592:	6025      	str	r5, [r4, #0]
    mutex->flags = NRF_CC310_PLATFORM_MUTEX_MASK_INVALID;
    1594:	2300      	movs	r3, #0
    1596:	6063      	str	r3, [r4, #4]
}
    1598:	bd38      	pop	{r3, r4, r5, pc}
        memset(mutex->mutex, 0, sizeof(struct k_mutex));
    159a:	2214      	movs	r2, #20
    159c:	2100      	movs	r1, #0
    159e:	f003 ffaf 	bl	5500 <memset>
    15a2:	e7f7      	b.n	1594 <mutex_free+0x24>
    15a4:	200021f0 	.word	0x200021f0
    15a8:	00006245 	.word	0x00006245
    15ac:	20000210 	.word	0x20000210

000015b0 <mutex_init>:
static void mutex_init(nrf_cc310_platform_mutex_t *mutex) {
    15b0:	b510      	push	{r4, lr}
    if (mutex == NULL) {
    15b2:	4604      	mov	r4, r0
    15b4:	b918      	cbnz	r0, 15be <mutex_init+0xe>
        platform_abort_apis.abort_fn(
    15b6:	4b13      	ldr	r3, [pc, #76]	; (1604 <mutex_init+0x54>)
    15b8:	4813      	ldr	r0, [pc, #76]	; (1608 <mutex_init+0x58>)
    15ba:	685b      	ldr	r3, [r3, #4]
    15bc:	4798      	blx	r3
    if (mutex->flags == NRF_CC310_PLATFORM_MUTEX_MASK_INVALID &&
    15be:	6863      	ldr	r3, [r4, #4]
    15c0:	b9bb      	cbnz	r3, 15f2 <mutex_init+0x42>
    15c2:	6823      	ldr	r3, [r4, #0]
    15c4:	b9ab      	cbnz	r3, 15f2 <mutex_init+0x42>
        ret = k_mem_slab_alloc(&mutex_slab, &mutex->mutex, K_FOREVER);
    15c6:	f04f 32ff 	mov.w	r2, #4294967295
    15ca:	4621      	mov	r1, r4
    15cc:	480f      	ldr	r0, [pc, #60]	; (160c <mutex_init+0x5c>)
    15ce:	f002 f8c7 	bl	3760 <k_mem_slab_alloc>
        if(ret != 0 || mutex->mutex == NULL)
    15d2:	b908      	cbnz	r0, 15d8 <mutex_init+0x28>
    15d4:	6823      	ldr	r3, [r4, #0]
    15d6:	b91b      	cbnz	r3, 15e0 <mutex_init+0x30>
            platform_abort_apis.abort_fn(
    15d8:	4b0a      	ldr	r3, [pc, #40]	; (1604 <mutex_init+0x54>)
    15da:	480d      	ldr	r0, [pc, #52]	; (1610 <mutex_init+0x60>)
    15dc:	685b      	ldr	r3, [r3, #4]
    15de:	4798      	blx	r3
        memset(mutex->mutex, 0, sizeof(struct k_mutex));
    15e0:	2214      	movs	r2, #20
    15e2:	2100      	movs	r1, #0
    15e4:	6820      	ldr	r0, [r4, #0]
    15e6:	f003 ff8b 	bl	5500 <memset>
        mutex->flags |= NRF_CC310_PLATFORM_MUTEX_MASK_IS_ALLOCATED;
    15ea:	6863      	ldr	r3, [r4, #4]
    15ec:	f043 0302 	orr.w	r3, r3, #2
    15f0:	6063      	str	r3, [r4, #4]
    p_mutex = (struct k_mutex *)mutex->mutex;
    15f2:	6820      	ldr	r0, [r4, #0]
	return z_impl_k_mutex_init(mutex);
    15f4:	f004 f970 	bl	58d8 <z_impl_k_mutex_init>
    mutex->flags |= NRF_CC310_PLATFORM_MUTEX_MASK_IS_VALID;
    15f8:	6863      	ldr	r3, [r4, #4]
    15fa:	f043 0301 	orr.w	r3, r3, #1
    15fe:	6063      	str	r3, [r4, #4]
}
    1600:	bd10      	pop	{r4, pc}
    1602:	bf00      	nop
    1604:	200021f0 	.word	0x200021f0
    1608:	00006245 	.word	0x00006245
    160c:	20000210 	.word	0x20000210
    1610:	0000626b 	.word	0x0000626b

00001614 <mutex_lock>:
static int32_t mutex_lock(nrf_cc310_platform_mutex_t *mutex) {
    1614:	b508      	push	{r3, lr}
    if(mutex == NULL) {
    1616:	b158      	cbz	r0, 1630 <mutex_lock+0x1c>
    if (mutex->flags == NRF_CC310_PLATFORM_MUTEX_MASK_INVALID) {
    1618:	6843      	ldr	r3, [r0, #4]
    161a:	b163      	cbz	r3, 1636 <mutex_lock+0x22>
    p_mutex = (struct k_mutex *)mutex->mutex;
    161c:	6800      	ldr	r0, [r0, #0]
	return z_impl_k_mutex_lock(mutex, timeout);
    161e:	f04f 31ff 	mov.w	r1, #4294967295
    1622:	f002 f8f7 	bl	3814 <z_impl_k_mutex_lock>
        return NRF_CC310_PLATFORM_ERROR_MUTEX_FAILED;
    1626:	4b05      	ldr	r3, [pc, #20]	; (163c <mutex_lock+0x28>)
    if (ret == 0) {
    1628:	2800      	cmp	r0, #0
        return NRF_CC310_PLATFORM_ERROR_MUTEX_FAILED;
    162a:	bf18      	it	ne
    162c:	4618      	movne	r0, r3
}
    162e:	bd08      	pop	{r3, pc}
        return NRF_CC310_PLATFORM_ERROR_PARAM_NULL;
    1630:	f46f 40e0 	mvn.w	r0, #28672	; 0x7000
    1634:	e7fb      	b.n	162e <mutex_lock+0x1a>
        return NRF_CC310_PLATFORM_ERROR_MUTEX_NOT_INITIALIZED;
    1636:	4802      	ldr	r0, [pc, #8]	; (1640 <mutex_lock+0x2c>)
    1638:	e7f9      	b.n	162e <mutex_lock+0x1a>
    163a:	bf00      	nop
    163c:	ffff8fe9 	.word	0xffff8fe9
    1640:	ffff8fea 	.word	0xffff8fea

00001644 <nrf_cc310_platform_mutex_init>:
};

/** @brief Function to initialize the nrf_cc310_platform mutex APIs
 */
void nrf_cc310_platform_mutex_init(void)
{
    1644:	b508      	push	{r3, lr}
    k_mem_slab_init(&mutex_slab,
    1646:	4906      	ldr	r1, [pc, #24]	; (1660 <nrf_cc310_platform_mutex_init+0x1c>)
    1648:	4806      	ldr	r0, [pc, #24]	; (1664 <nrf_cc310_platform_mutex_init+0x20>)
    164a:	2340      	movs	r3, #64	; 0x40
    164c:	2214      	movs	r2, #20
    164e:	f004 f928 	bl	58a2 <k_mem_slab_init>
            mutex_slab_buffer,
            sizeof(struct k_mutex),
            NUM_MUTEXES);

    nrf_cc310_platform_set_mutexes(&mutex_apis, &mutexes);
    1652:	4905      	ldr	r1, [pc, #20]	; (1668 <nrf_cc310_platform_mutex_init+0x24>)
    1654:	4805      	ldr	r0, [pc, #20]	; (166c <nrf_cc310_platform_mutex_init+0x28>)
}
    1656:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
    nrf_cc310_platform_set_mutexes(&mutex_apis, &mutexes);
    165a:	f002 bfcf 	b.w	45fc <nrf_cc310_platform_set_mutexes>
    165e:	bf00      	nop
    1660:	2000022c 	.word	0x2000022c
    1664:	20000210 	.word	0x20000210
    1668:	00005ef0 	.word	0x00005ef0
    166c:	00005ee0 	.word	0x00005ee0

00001670 <z_arm_exc_exit>:
    /* r0 contains the caller mode */
    push {r0, lr}
#endif

#ifdef CONFIG_PREEMPT_ENABLED
    ldr r0, =_kernel
    1670:	4804      	ldr	r0, [pc, #16]	; (1684 <_EXIT_EXC+0x2>)

    ldr r1, [r0, #_kernel_offset_to_current]
    1672:	6881      	ldr	r1, [r0, #8]

    ldr r0, [r0, #_kernel_offset_to_ready_q_cache]
    1674:	6a40      	ldr	r0, [r0, #36]	; 0x24
    cmp r0, r1
    1676:	4288      	cmp	r0, r1
    beq _EXIT_EXC
    1678:	d003      	beq.n	1682 <_EXIT_EXC>

#if defined(CONFIG_CPU_CORTEX_M)
    /* context switch required, pend the PendSV exception */
    ldr r1, =_SCS_ICSR
    167a:	4903      	ldr	r1, [pc, #12]	; (1688 <_EXIT_EXC+0x6>)
    ldr r2, =_SCS_ICSR_PENDSV
    167c:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
    str r2, [r1]
    1680:	600a      	str	r2, [r1, #0]

00001682 <_EXIT_EXC>:
    bl z_check_stack_sentinel
#endif /* CONFIG_CPU_CORTEX_M */
#endif /* CONFIG_STACK_SENTINEL */

#if defined(CONFIG_CPU_CORTEX_M)
    bx lr
    1682:	4770      	bx	lr
    ldr r0, =_kernel
    1684:	2000084c 	.word	0x2000084c
    ldr r1, =_SCS_ICSR
    1688:	e000ed04 	.word	0xe000ed04

0000168c <arch_swap>:
#ifdef CONFIG_EXECUTION_BENCHMARKING
	read_timer_start_of_swap();
#endif

	/* store off key and return value */
	_current->arch.basepri = key;
    168c:	4a09      	ldr	r2, [pc, #36]	; (16b4 <arch_swap+0x28>)
	_current->arch.swap_return_value = _k_neg_eagain;
    168e:	490a      	ldr	r1, [pc, #40]	; (16b8 <arch_swap+0x2c>)
	_current->arch.basepri = key;
    1690:	6893      	ldr	r3, [r2, #8]
	_current->arch.swap_return_value = _k_neg_eagain;
    1692:	6809      	ldr	r1, [r1, #0]
    1694:	6699      	str	r1, [r3, #104]	; 0x68

#if defined(CONFIG_CPU_CORTEX_M)
	/* set pending bit to make sure we will take a PendSV exception */
	SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk;
    1696:	4909      	ldr	r1, [pc, #36]	; (16bc <arch_swap+0x30>)
	_current->arch.basepri = key;
    1698:	6658      	str	r0, [r3, #100]	; 0x64
	SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk;
    169a:	684b      	ldr	r3, [r1, #4]
    169c:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
    16a0:	604b      	str	r3, [r1, #4]
    16a2:	2300      	movs	r3, #0
    16a4:	f383 8811 	msr	BASEPRI, r3
    16a8:	f3bf 8f6f 	isb	sy
#endif

	/* Context switch is performed here. Returning implies the
	 * thread has been context-switched-in again.
	 */
	return _current->arch.swap_return_value;
    16ac:	6893      	ldr	r3, [r2, #8]
}
    16ae:	6e98      	ldr	r0, [r3, #104]	; 0x68
    16b0:	4770      	bx	lr
    16b2:	bf00      	nop
    16b4:	2000084c 	.word	0x2000084c
    16b8:	00005f78 	.word	0x00005f78
    16bc:	e000ed00 	.word	0xe000ed00

000016c0 <z_arm_pendsv>:
    pop {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
#endif /* CONFIG_TRACING */

    /* load _kernel into r1 and current k_thread into r2 */
    ldr r1, =_kernel
    16c0:	4912      	ldr	r1, [pc, #72]	; (170c <z_arm_pendsv+0x4c>)
    ldr r2, [r1, #_kernel_offset_to_current]
    16c2:	688a      	ldr	r2, [r1, #8]

    /* addr of callee-saved regs in thread in r0 */
    ldr r0, =_thread_offset_to_callee_saved
    16c4:	f04f 0028 	mov.w	r0, #40	; 0x28
    add r0, r2
    16c8:	4410      	add	r0, r2

    /* save callee-saved + psp in thread */
#if defined(CONFIG_CPU_CORTEX_M)
    mrs ip, PSP
    16ca:	f3ef 8c09 	mrs	ip, PSP
    mov r6, r11
    mov r7, ip
    /* store r8-12 */
    stmea r0!, {r3-r7}
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    stmia r0, {v1-v8, ip}
    16ce:	e880 1ff0 	stmia.w	r0, {r4, r5, r6, r7, r8, r9, sl, fp, ip}

    /* Protect the kernel state while we play with the thread lists */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
    cpsid i
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    movs.n r0, #_EXC_IRQ_DEFAULT_PRIO
    16d2:	2020      	movs	r0, #32
    msr BASEPRI, r0
    16d4:	f380 8811 	msr	BASEPRI, r0
    isb /* Make the effect of disabling interrupts be realized immediately */
    16d8:	f3bf 8f6f 	isb	sy
     * the new thread is context-switched in since all decisions
     * to pend PendSV have been taken with the current kernel
     * state and this is what we're handling currently.
     */
#if defined(CONFIG_CPU_CORTEX_M)
    ldr v4, =_SCS_ICSR
    16dc:	4f0c      	ldr	r7, [pc, #48]	; (1710 <z_arm_pendsv+0x50>)
    ldr v3, =_SCS_ICSR_UNPENDSV
    16de:	f04f 6600 	mov.w	r6, #134217728	; 0x8000000
#endif

    /* _kernel is still in r1 */

    /* fetch the thread to run from the ready queue cache */
    ldr r2, [r1, #_kernel_offset_to_ready_q_cache]
    16e2:	6a4a      	ldr	r2, [r1, #36]	; 0x24

    str r2, [r1, #_kernel_offset_to_current]
    16e4:	608a      	str	r2, [r1, #8]
     * has been handled.
     */

    /* _SCS_ICSR is still in v4 and _SCS_ICSR_UNPENDSV in v3 */
#if defined(CONFIG_CPU_CORTEX_M)
    str v3, [v4, #0]
    16e6:	603e      	str	r6, [r7, #0]

    ldr r0, [r4]
    movs.n r3, #0
    str r3, [r4]
#else
    ldr r0, [r2, #_thread_offset_to_basepri]
    16e8:	6e50      	ldr	r0, [r2, #100]	; 0x64
    movs r3, #0
    16ea:	2300      	movs	r3, #0
    str r3, [r2, #_thread_offset_to_basepri]
    16ec:	6653      	str	r3, [r2, #100]	; 0x64
    /* restore r4-r7, go back 9*4 bytes to the start of the stored block */
    subs r0, #36
    ldmia r0!, {r4-r7}
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    /* restore BASEPRI for the incoming thread */
    msr BASEPRI, r0
    16ee:	f380 8811 	msr	BASEPRI, r0
    isb
#endif

#if defined (CONFIG_ARM_MPU)
    /* Re-program dynamic memory map */
    push {r2,lr}
    16f2:	b504      	push	{r2, lr}
    mov r0, r2 /* _current thread */
    16f4:	4610      	mov	r0, r2
    bl z_arm_configure_dynamic_mpu_regions
    16f6:	f003 fe9a 	bl	542e <z_arm_configure_dynamic_mpu_regions>
    pop {r2,lr}
    16fa:	e8bd 4004 	ldmia.w	sp!, {r2, lr}
    isb

#endif

    /* load callee-saved + psp from thread */
    add r0, r2, #_thread_offset_to_callee_saved
    16fe:	f102 0028 	add.w	r0, r2, #40	; 0x28
    ldmia r0, {v1-v8, ip}
    1702:	e890 1ff0 	ldmia.w	r0, {r4, r5, r6, r7, r8, r9, sl, fp, ip}
    mov r0, #0
    msr PSPLIM, r0
#endif /* CONFIG_BUILTIN_STACK_GUARD */

#if defined(CONFIG_CPU_CORTEX_M)
    msr PSP, ip
    1706:	f38c 8809 	msr	PSP, ip

    /*
     * Cortex-M: return from PendSV exception
     * Cortex-R: return to the caller (_IntExit or z_arm_svc)
     */
    bx lr
    170a:	4770      	bx	lr
    ldr r1, =_kernel
    170c:	2000084c 	.word	0x2000084c
    ldr v4, =_SCS_ICSR
    1710:	e000ed04 	.word	0xe000ed04

00001714 <z_arm_svc>:
  bne _stack_frame_endif
_stack_frame_msp:
  mrs r0, MSP
_stack_frame_endif:
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    tst lr, #0x4    /* did we come from thread mode ? */
    1714:	f01e 0f04 	tst.w	lr, #4
    ite eq  /* if zero (equal), came from handler mode */
    1718:	bf0c      	ite	eq
        mrseq r0, MSP   /* handler mode, stack frame is on MSP */
    171a:	f3ef 8008 	mrseq	r0, MSP
        mrsne r0, PSP   /* thread mode, stack frame is on PSP */
    171e:	f3ef 8009 	mrsne	r0, PSP
#endif


    /* Figure out what SVC call number was invoked */

    ldr r1, [r0, #24]   /* grab address of PC from stack frame */
    1722:	6981      	ldr	r1, [r0, #24]
     */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
    subs r1, r1, #2
    ldrb r1, [r1]
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    ldrb r1, [r1, #-2]
    1724:	f811 1c02 	ldrb.w	r1, [r1, #-2]
#endif
    bne _oops

#endif /* CONFIG_USERSPACE */

    cmp r1, #2
    1728:	2902      	cmp	r1, #2
    beq _oops
    172a:	d0ff      	beq.n	172c <_oops>

0000172c <_oops>:
    /* exception return is done in z_arm_int_exit() */
    b z_arm_int_exit
#endif

_oops:
    push {r0, lr}
    172c:	b501      	push	{r0, lr}
    bl z_do_kernel_oops
    172e:	f003 fe73 	bl	5418 <z_do_kernel_oops>
    /* return from SVC exception is done here */
    pop {r0, pc}
    1732:	bd01      	pop	{r0, pc}

00001734 <arch_irq_enable>:
#define REG_FROM_IRQ(irq) (irq / NUM_IRQS_PER_REG)
#define BIT_FROM_IRQ(irq) (irq % NUM_IRQS_PER_REG)

void arch_irq_enable(unsigned int irq)
{
	NVIC_EnableIRQ((IRQn_Type)irq);
    1734:	b243      	sxtb	r3, r0
  if ((int32_t)(IRQn) >= 0)
    1736:	2b00      	cmp	r3, #0
    1738:	db08      	blt.n	174c <arch_irq_enable+0x18>
    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
    173a:	2201      	movs	r2, #1
    173c:	f000 001f 	and.w	r0, r0, #31
    1740:	fa02 f000 	lsl.w	r0, r2, r0
    1744:	095b      	lsrs	r3, r3, #5
    1746:	4a02      	ldr	r2, [pc, #8]	; (1750 <arch_irq_enable+0x1c>)
    1748:	f842 0023 	str.w	r0, [r2, r3, lsl #2]
}
    174c:	4770      	bx	lr
    174e:	bf00      	nop
    1750:	e000e100 	.word	0xe000e100

00001754 <z_arm_irq_priority_set>:
	 */
	__ASSERT(prio <= (BIT(DT_NUM_IRQ_PRIO_BITS) - 1),
		 "invalid priority %d! values must be less than %lu\n",
		 prio - _IRQ_PRIO_OFFSET,
		 BIT(DT_NUM_IRQ_PRIO_BITS) - (_IRQ_PRIO_OFFSET));
	NVIC_SetPriority((IRQn_Type)irq, prio);
    1754:	b243      	sxtb	r3, r0
  \param [in]  priority  Priority to set.
  \note    The priority cannot be set for every processor exception.
 */
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
  if ((int32_t)(IRQn) >= 0)
    1756:	2b00      	cmp	r3, #0
  {
    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    1758:	bfa8      	it	ge
    175a:	f103 4360 	addge.w	r3, r3, #3758096384	; 0xe0000000
	prio += _IRQ_PRIO_OFFSET;
    175e:	f101 0101 	add.w	r1, r1, #1
    1762:	ea4f 1141 	mov.w	r1, r1, lsl #5
    1766:	bfae      	itee	ge
    1768:	f503 4361 	addge.w	r3, r3, #57600	; 0xe100
  }
  else
  {
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    176c:	f000 000f 	andlt.w	r0, r0, #15
    1770:	4b03      	ldrlt	r3, [pc, #12]	; (1780 <z_arm_irq_priority_set+0x2c>)
    1772:	b2c9      	uxtb	r1, r1
    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    1774:	bfac      	ite	ge
    1776:	f883 1300 	strbge.w	r1, [r3, #768]	; 0x300
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    177a:	5419      	strblt	r1, [r3, r0]
}
    177c:	4770      	bx	lr
    177e:	bf00      	nop
    1780:	e000ed14 	.word	0xe000ed14

00001784 <arch_new_thread>:
 */
void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
		     size_t stackSize, k_thread_entry_t pEntry,
		     void *parameter1, void *parameter2, void *parameter3,
		     int priority, unsigned int options)
{
    1784:	b573      	push	{r0, r1, r4, r5, r6, lr}
    1786:	461e      	mov	r6, r3
#endif
	stackEnd = pStackMem + stackSize;

	struct __esf *pInitCtx;

	z_new_thread_init(thread, pStackMem, stackSize, priority,
    1788:	9b0a      	ldr	r3, [sp, #40]	; 0x28
    178a:	9300      	str	r3, [sp, #0]
	stackEnd = pStackMem + stackSize;
    178c:	188c      	adds	r4, r1, r2
	z_new_thread_init(thread, pStackMem, stackSize, priority,
    178e:	9b09      	ldr	r3, [sp, #36]	; 0x24
{
    1790:	4605      	mov	r5, r0
	z_new_thread_init(thread, pStackMem, stackSize, priority,
    1792:	f004 f966 	bl	5a62 <z_new_thread_init>
	 *
	 * The initial carved stack frame only needs to contain the basic
	 * stack frame (state context), because no FP operations have been
	 * performed yet for this thread.
	 */
	pInitCtx = (struct __esf *)(STACK_ROUND_DOWN(stackEnd -
    1796:	f1a4 0320 	sub.w	r3, r4, #32
	pInitCtx->basic.pc = (u32_t)z_thread_entry;
#endif

#if defined(CONFIG_CPU_CORTEX_M)
	/* force ARM mode by clearing LSB of address */
	pInitCtx->basic.pc &= 0xfffffffe;
    179a:	4a0a      	ldr	r2, [pc, #40]	; (17c4 <arch_new_thread+0x40>)
	pInitCtx = (struct __esf *)(STACK_ROUND_DOWN(stackEnd -
    179c:	f023 0307 	bic.w	r3, r3, #7
	pInitCtx->basic.pc &= 0xfffffffe;
    17a0:	f022 0201 	bic.w	r2, r2, #1
    17a4:	619a      	str	r2, [r3, #24]
#endif

	pInitCtx->basic.a1 = (u32_t)pEntry;
	pInitCtx->basic.a2 = (u32_t)parameter1;
    17a6:	9a06      	ldr	r2, [sp, #24]
    17a8:	605a      	str	r2, [r3, #4]
	pInitCtx->basic.a3 = (u32_t)parameter2;
    17aa:	9a07      	ldr	r2, [sp, #28]
    17ac:	609a      	str	r2, [r3, #8]
	pInitCtx->basic.a4 = (u32_t)parameter3;
    17ae:	9a08      	ldr	r2, [sp, #32]
    17b0:	60da      	str	r2, [r3, #12]
	pInitCtx->basic.xpsr =
    17b2:	f04f 7280 	mov.w	r2, #16777216	; 0x1000000
	pInitCtx->basic.a1 = (u32_t)pEntry;
    17b6:	601e      	str	r6, [r3, #0]
	pInitCtx->basic.xpsr =
    17b8:	61da      	str	r2, [r3, #28]
		0x01000000UL; /* clear all, thumb bit is 1, even if RO */

	thread->callee_saved.psp = (u32_t)pInitCtx;
    17ba:	64ab      	str	r3, [r5, #72]	; 0x48
#if defined(CONFIG_CPU_CORTEX_R)
	pInitCtx->basic.lr = (u32_t)pInitCtx->basic.pc;
	thread->callee_saved.spsr = A_BIT | T_BIT | MODE_SYS;
	thread->callee_saved.lr = (u32_t)pInitCtx->basic.pc;
#endif
	thread->arch.basepri = 0;
    17bc:	2300      	movs	r3, #0
    17be:	666b      	str	r3, [r5, #100]	; 0x64

	/*
	 * initial values in all other registers/thread entries are
	 * irrelevant.
	 */
}
    17c0:	b002      	add	sp, #8
    17c2:	bd70      	pop	{r4, r5, r6, pc}
    17c4:	00004be1 	.word	0x00004be1

000017c8 <arch_switch_to_main_thread>:

void arch_switch_to_main_thread(struct k_thread *main_thread,
				k_thread_stack_t *main_stack,
				size_t main_stack_size,
				k_thread_entry_t _main)
{
    17c8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    17ca:	4605      	mov	r5, r0
    17cc:	460c      	mov	r4, r1
    17ce:	4617      	mov	r7, r2
    17d0:	461e      	mov	r6, r3
	 * to set up access permissions for fixed memory sections, such
	 * as Application Memory or No-Cacheable SRAM area.
	 *
	 * This function is invoked once, upon system initialization.
	 */
	z_arm_configure_static_mpu_regions();
    17d2:	f000 fb93 	bl	1efc <z_arm_configure_static_mpu_regions>
	start_of_main_stack =
		Z_THREAD_STACK_BUFFER(main_stack) + main_stack_size;

	start_of_main_stack = (char *)STACK_ROUND_DOWN(start_of_main_stack);

	_current = main_thread;
    17d6:	4b0a      	ldr	r3, [pc, #40]	; (1800 <arch_switch_to_main_thread+0x38>)
	start_of_main_stack =
    17d8:	443c      	add	r4, r7
#ifdef CONFIG_ARM_MPU
	/*
	 * If stack protection is enabled, make sure to set it
	 * before jumping to thread entry function
	 */
	z_arm_configure_dynamic_mpu_regions(main_thread);
    17da:	4628      	mov	r0, r5
	_current = main_thread;
    17dc:	609d      	str	r5, [r3, #8]
	start_of_main_stack = (char *)STACK_ROUND_DOWN(start_of_main_stack);
    17de:	f024 0407 	bic.w	r4, r4, #7
	z_arm_configure_dynamic_mpu_regions(main_thread);
    17e2:	f003 fe24 	bl	542e <z_arm_configure_dynamic_mpu_regions>

	/*
	 * Set PSP to the highest address of the main stack
	 * before enabling interrupts and jumping to main.
	 */
	__asm__ volatile (
    17e6:	4630      	mov	r0, r6
    17e8:	f384 8809 	msr	PSP, r4
    17ec:	2100      	movs	r1, #0
    17ee:	b663      	cpsie	if
    17f0:	f381 8811 	msr	BASEPRI, r1
    17f4:	f3bf 8f6f 	isb	sy
    17f8:	2200      	movs	r2, #0
    17fa:	2300      	movs	r3, #0
    17fc:	f003 f9f0 	bl	4be0 <z_thread_entry>
	:
	: "r" (_main), "r" (start_of_main_stack)
	: "r0" /* not to be overwritten by msr PSP, %1 */
	);

	CODE_UNREACHABLE;
    1800:	2000084c 	.word	0x2000084c

00001804 <z_arm_cpu_idle_init>:
 * void z_arm_cpu_idle_init(void);
 */

SECTION_FUNC(TEXT, z_arm_cpu_idle_init)
#if defined(CONFIG_CPU_CORTEX_M)
	ldr r1, =_SCB_SCR
    1804:	4901      	ldr	r1, [pc, #4]	; (180c <z_arm_cpu_idle_init+0x8>)
	movs.n r2, #_SCR_INIT_BITS
    1806:	2210      	movs	r2, #16
	str r2, [r1]
    1808:	600a      	str	r2, [r1, #0]
#endif
	bx lr
    180a:	4770      	bx	lr
	ldr r1, =_SCB_SCR
    180c:	e000ed10 	.word	0xe000ed10

00001810 <arch_cpu_idle>:
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) \
	|| defined(CONFIG_ARMV7_R)
	cpsie i
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	/* clear BASEPRI so wfi is awakened by incoming interrupts */
	eors.n r0, r0
    1810:	4040      	eors	r0, r0
	msr BASEPRI, r0
    1812:	f380 8811 	msr	BASEPRI, r0
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */

	wfi
    1816:	bf30      	wfi

	bx lr
    1818:	4770      	bx	lr
    181a:	bf00      	nop

0000181c <z_arm_bus_fault>:
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
SECTION_SUBSEC_FUNC(TEXT,__fault,z_arm_reserved)

#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) || \
	defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	mrs r0, MSP
    181c:	f3ef 8008 	mrs	r0, MSP
	mrs r1, PSP
    1820:	f3ef 8109 	mrs	r1, PSP
	mov r2, lr /* EXC_RETURN */
    1824:	4672      	mov	r2, lr

	push {r0, lr}
    1826:	b501      	push	{r0, lr}
	mov r0, #0
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE || CONFIG_ARMv7_M_ARMV8_M_MAINLINE */

	bl z_arm_fault
    1828:	f000 fa46 	bl	1cb8 <z_arm_fault>

#if defined(CONFIG_CPU_CORTEX_M)
	pop {r0, pc}
    182c:	bd01      	pop	{r0, pc}
    182e:	bf00      	nop

00001830 <z_arm_fatal_error>:
	LOG_ERR("Faulting instruction address (r15/pc): 0x%08x",
		esf->basic.pc);
}

void z_arm_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
{
    1830:	b573      	push	{r0, r1, r4, r5, r6, lr}
    1832:	4606      	mov	r6, r0

	if (esf != NULL) {
    1834:	460c      	mov	r4, r1
    1836:	2900      	cmp	r1, #0
    1838:	d038      	beq.n	18ac <z_arm_fatal_error+0x7c>
	LOG_ERR("r0/a1:  0x%08x  r1/a2:  0x%08x  r2/a3:  0x%08x",
    183a:	2201      	movs	r2, #1
    183c:	f04f 0300 	mov.w	r3, #0
    1840:	f362 0307 	bfi	r3, r2, #0, #8
    1844:	4d1d      	ldr	r5, [pc, #116]	; (18bc <z_arm_fatal_error+0x8c>)
    1846:	4a1e      	ldr	r2, [pc, #120]	; (18c0 <z_arm_fatal_error+0x90>)
    1848:	481e      	ldr	r0, [pc, #120]	; (18c4 <z_arm_fatal_error+0x94>)
    184a:	1aad      	subs	r5, r5, r2
    184c:	f3c5 05c9 	ubfx	r5, r5, #3, #10
    1850:	f365 138f 	bfi	r3, r5, #6, #10
    1854:	f8ad 3000 	strh.w	r3, [sp]
    1858:	e9d1 2301 	ldrd	r2, r3, [r1, #4]
    185c:	6809      	ldr	r1, [r1, #0]
    185e:	f003 fa46 	bl	4cee <log_3>
	LOG_ERR("r3/a4:  0x%08x r12/ip:  0x%08x r14/lr:  0x%08x",
    1862:	2201      	movs	r2, #1
    1864:	f04f 0300 	mov.w	r3, #0
    1868:	f362 0307 	bfi	r3, r2, #0, #8
    186c:	f365 138f 	bfi	r3, r5, #6, #10
    1870:	f8ad 3000 	strh.w	r3, [sp]
    1874:	e9d4 2304 	ldrd	r2, r3, [r4, #16]
    1878:	68e1      	ldr	r1, [r4, #12]
    187a:	4813      	ldr	r0, [pc, #76]	; (18c8 <z_arm_fatal_error+0x98>)
    187c:	f003 fa37 	bl	4cee <log_3>
	LOG_ERR(" xpsr:  0x%08x", esf->basic.xpsr);
    1880:	2301      	movs	r3, #1
    1882:	f04f 0200 	mov.w	r2, #0
    1886:	f363 0207 	bfi	r2, r3, #0, #8
    188a:	f365 128f 	bfi	r2, r5, #6, #10
    188e:	69e1      	ldr	r1, [r4, #28]
    1890:	480e      	ldr	r0, [pc, #56]	; (18cc <z_arm_fatal_error+0x9c>)
    1892:	f003 fa00 	bl	4c96 <log_1>
	LOG_ERR("Faulting instruction address (r15/pc): 0x%08x",
    1896:	f04f 0200 	mov.w	r2, #0
    189a:	2301      	movs	r3, #1
    189c:	f363 0207 	bfi	r2, r3, #0, #8
    18a0:	f365 128f 	bfi	r2, r5, #6, #10
    18a4:	69a1      	ldr	r1, [r4, #24]
    18a6:	480a      	ldr	r0, [pc, #40]	; (18d0 <z_arm_fatal_error+0xa0>)
    18a8:	f003 f9f5 	bl	4c96 <log_1>
		esf_dump(esf);
	}
	z_fatal_error(reason, esf);
    18ac:	4621      	mov	r1, r4
    18ae:	4630      	mov	r0, r6
}
    18b0:	b002      	add	sp, #8
    18b2:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
	z_fatal_error(reason, esf);
    18b6:	f001 bde3 	b.w	3480 <z_fatal_error>
    18ba:	bf00      	nop
    18bc:	00005dc0 	.word	0x00005dc0
    18c0:	00005da0 	.word	0x00005da0
    18c4:	00006298 	.word	0x00006298
    18c8:	000062c7 	.word	0x000062c7
    18cc:	000062f6 	.word	0x000062f6
    18d0:	00006305 	.word	0x00006305

000018d4 <z_SysNmiOnReset>:
_ASM_FILE_PROLOGUE

GTEXT(z_SysNmiOnReset)

SECTION_FUNC(TEXT, z_SysNmiOnReset)
    wfi
    18d4:	bf30      	wfi
    b z_SysNmiOnReset
    18d6:	f7ff bffd 	b.w	18d4 <z_SysNmiOnReset>
    18da:	bf00      	nop

000018dc <z_arm_prep_c>:
 * This routine prepares for the execution of and runs C code.
 *
 * @return N/A
 */
void z_arm_prep_c(void)
{
    18dc:	b508      	push	{r3, lr}
	SCB->VTOR = VECTOR_ADDRESS & SCB_VTOR_TBLOFF_Msk;
    18de:	4b08      	ldr	r3, [pc, #32]	; (1900 <z_arm_prep_c+0x24>)
    18e0:	4a08      	ldr	r2, [pc, #32]	; (1904 <z_arm_prep_c+0x28>)
    18e2:	f023 037f 	bic.w	r3, r3, #127	; 0x7f
    18e6:	6093      	str	r3, [r2, #8]
  \details Acts as a special kind of Data Memory Barrier.
           It completes when all explicit memory accesses before this instruction complete.
 */
__STATIC_FORCEINLINE void __DSB(void)
{
  __ASM volatile ("dsb 0xF":::"memory");
    18e8:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("isb 0xF":::"memory");
    18ec:	f3bf 8f6f 	isb	sy
	relocate_vector_table();
	enable_floating_point();
	z_bss_zero();
    18f0:	f001 fe44 	bl	357c <z_bss_zero>
	z_data_copy();
    18f4:	f001 fe4c 	bl	3590 <z_data_copy>
#if defined(CONFIG_ARMV7_R) && defined(CONFIG_INIT_STACKS)
	z_arm_init_stacks();
#endif
	z_arm_int_lib_init();
    18f8:	f000 face 	bl	1e98 <z_arm_int_lib_init>
	z_cstart();
    18fc:	f001 fe86 	bl	360c <z_cstart>
    1900:	00000000 	.word	0x00000000
    1904:	e000ed00 	.word	0xe000ed00

00001908 <_isr_wrapper>:
 * @return N/A
 */
SECTION_FUNC(TEXT, _isr_wrapper)

#if defined(CONFIG_CPU_CORTEX_M)
	push {r0,lr}		/* r0, lr are now the first items on the stack */
    1908:	b501      	push	{r0, lr}
      * FIXME: Remove the Cortex-M conditional compilation checks for `cpsid i`
      *        and `cpsie i` after the Cortex-R port is updated to support
      *        interrupt nesting.  For more details, refer to the issue #21758.
      */
#if defined(CONFIG_CPU_CORTEX_M)
	cpsid i  /* PRIMASK = 1 */
    190a:	b672      	cpsid	i
#endif

	/* is this a wakeup from idle ? */
	ldr r2, =_kernel
    190c:	4a0b      	ldr	r2, [pc, #44]	; (193c <_isr_wrapper+0x34>)
	/* requested idle duration, in ticks */
	ldr r0, [r2, #_kernel_offset_to_idle]
    190e:	6a10      	ldr	r0, [r2, #32]
	cmp r0, #0
    1910:	2800      	cmp	r0, #0
	str r1, [r2, #_kernel_offset_to_idle]
	bl z_sys_power_save_idle_exit
_idle_state_cleared:

#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	ittt ne
    1912:	bf1e      	ittt	ne
	movne	r1, #0
    1914:	2100      	movne	r1, #0
		/* clear kernel idle state */
		strne	r1, [r2, #_kernel_offset_to_idle]
    1916:	6211      	strne	r1, [r2, #32]
		blne	z_sys_power_save_idle_exit
    1918:	f003 ffc1 	blne	589e <z_sys_power_save_idle_exit>
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */

#if defined(CONFIG_CPU_CORTEX_M)
	cpsie i		/* re-enable interrupts (PRIMASK = 0) */
    191c:	b662      	cpsie	i
#endif

#endif /* CONFIG_SYS_POWER_MANAGEMENT */

#if defined(CONFIG_CPU_CORTEX_M)
	mrs r0, IPSR	/* get exception number */
    191e:	f3ef 8005 	mrs	r0, IPSR
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
	ldr r1, =16
	subs r0, r1	/* get IRQ number */
	lsls r0, #3	/* table is 8-byte wide */
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	sub r0, r0, #16	/* get IRQ number */
    1922:	f1a0 0010 	sub.w	r0, r0, #16
	lsl r0, r0, #3	/* table is 8-byte wide */
    1926:	ea4f 00c0 	mov.w	r0, r0, lsl #3
	 */
	mov r0, #0
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
	ldr r1, =_sw_isr_table
    192a:	4905      	ldr	r1, [pc, #20]	; (1940 <_isr_wrapper+0x38>)
	add r1, r1, r0	/* table entry: ISRs must have their MSB set to stay
    192c:	4401      	add	r1, r0
			 * in thumb mode */

	ldm r1!,{r0,r3}	/* arg in r0, ISR in r3 */
    192e:	c909      	ldmia	r1!, {r0, r3}
#else
	pop {r0, lr}
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
	ldm sp!,{r0-r3} /* Restore r0 to r3 regs */
#endif /* CONFIG_EXECUTION_BENCHMARKING */
	blx r3		/* call ISR */
    1930:	4798      	blx	r3

#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
	pop {r0, r3}
	mov lr, r3
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	pop {r0, lr}
    1932:	e8bd 4001 	ldmia.w	sp!, {r0, lr}
#endif

	/* Use 'bx' instead of 'b' because 'bx' can jump further, and use
	 * 'bx' instead of 'blx' because exception return is done in
	 * z_arm_int_exit() */
	ldr r1, =z_arm_int_exit
    1936:	4903      	ldr	r1, [pc, #12]	; (1944 <_isr_wrapper+0x3c>)
	bx r1
    1938:	4708      	bx	r1
    193a:	0000      	.short	0x0000
	ldr r2, =_kernel
    193c:	2000084c 	.word	0x2000084c
	ldr r1, =_sw_isr_table
    1940:	00005b78 	.word	0x00005b78
	ldr r1, =z_arm_int_exit
    1944:	00001671 	.word	0x00001671

00001948 <__start>:
 * search for a __start symbol instead, so create that alias here.
 */
SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)

#if defined(CONFIG_PLATFORM_SPECIFIC_INIT)
    bl z_platform_init
    1948:	f003 fe83 	bl	5652 <z_platform_init>

    /* lock interrupts: will get unlocked when switch to main task */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
    cpsid i
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
    movs.n r0, #_EXC_IRQ_DEFAULT_PRIO
    194c:	2020      	movs	r0, #32
    msr BASEPRI, r0
    194e:	f380 8811 	msr	BASEPRI, r0

    /*
     * Set PSP and use it to boot without using MSP, so that it
     * gets set to _interrupt_stack during initialization.
     */
    ldr r0, =_interrupt_stack
    1952:	4808      	ldr	r0, [pc, #32]	; (1974 <__start+0x2c>)
    ldr r1, =CONFIG_ISR_STACK_SIZE
    1954:	f44f 6100 	mov.w	r1, #2048	; 0x800
    adds r0, r0, r1
    1958:	1840      	adds	r0, r0, r1
    msr PSP, r0
    195a:	f380 8809 	msr	PSP, r0
    mrs r0, CONTROL
    195e:	f3ef 8014 	mrs	r0, CONTROL
    movs r1, #2
    1962:	2102      	movs	r1, #2
    orrs r0, r1 /* CONTROL_SPSEL_Msk */
    1964:	4308      	orrs	r0, r1
    msr CONTROL, r0
    1966:	f380 8814 	msr	CONTROL, r0
    /*
     * When changing the stack pointer, software must use an ISB instruction
     * immediately after the MSR instruction. This ensures that instructions
     * after the ISB instruction execute using the new stack pointer.
     */
    isb
    196a:	f3bf 8f6f 	isb	sy
    /*
     * 'bl' jumps the furthest of the branch instructions that are
     * supported on all platforms. So it is used when jumping to z_arm_prep_c
     * (even though we do not intend to return).
     */
    bl z_arm_prep_c
    196e:	f7ff ffb5 	bl	18dc <z_arm_prep_c>
    1972:	0000      	.short	0x0000
    ldr r0, =_interrupt_stack
    1974:	20001510 	.word	0x20001510

00001978 <usage_fault.isra.2>:
 */
static u32_t usage_fault(const z_arch_esf_t *esf)
{
	u32_t reason = K_ERR_CPU_EXCEPTION;

	PR_FAULT_INFO("***** USAGE FAULT *****");
    1978:	2301      	movs	r3, #1
    197a:	f04f 0100 	mov.w	r1, #0
static u32_t usage_fault(const z_arch_esf_t *esf)
    197e:	b510      	push	{r4, lr}
	PR_FAULT_INFO("***** USAGE FAULT *****");
    1980:	f363 0107 	bfi	r1, r3, #0, #8
    1984:	4c33      	ldr	r4, [pc, #204]	; (1a54 <usage_fault.isra.2+0xdc>)
    1986:	4b34      	ldr	r3, [pc, #208]	; (1a58 <usage_fault.isra.2+0xe0>)
    1988:	4834      	ldr	r0, [pc, #208]	; (1a5c <usage_fault.isra.2+0xe4>)
    198a:	1ae4      	subs	r4, r4, r3
    198c:	f3c4 04c9 	ubfx	r4, r4, #3, #10
    1990:	f364 118f 	bfi	r1, r4, #6, #10
    1994:	f003 f972 	bl	4c7c <log_0>

	/* bits are sticky: they stack and must be reset */
	if ((SCB->CFSR & SCB_CFSR_DIVBYZERO_Msk) != 0) {
    1998:	4b31      	ldr	r3, [pc, #196]	; (1a60 <usage_fault.isra.2+0xe8>)
    199a:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    199c:	019a      	lsls	r2, r3, #6
    199e:	d509      	bpl.n	19b4 <usage_fault.isra.2+0x3c>
		PR_FAULT_INFO("  Division by zero");
    19a0:	f04f 0100 	mov.w	r1, #0
    19a4:	2301      	movs	r3, #1
    19a6:	f363 0107 	bfi	r1, r3, #0, #8
    19aa:	f364 118f 	bfi	r1, r4, #6, #10
    19ae:	482d      	ldr	r0, [pc, #180]	; (1a64 <usage_fault.isra.2+0xec>)
    19b0:	f003 f964 	bl	4c7c <log_0>
	}
	if ((SCB->CFSR & SCB_CFSR_UNALIGNED_Msk) != 0) {
    19b4:	4b2a      	ldr	r3, [pc, #168]	; (1a60 <usage_fault.isra.2+0xe8>)
    19b6:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    19b8:	01db      	lsls	r3, r3, #7
    19ba:	d509      	bpl.n	19d0 <usage_fault.isra.2+0x58>
		PR_FAULT_INFO("  Unaligned memory access");
    19bc:	f04f 0100 	mov.w	r1, #0
    19c0:	2301      	movs	r3, #1
    19c2:	f363 0107 	bfi	r1, r3, #0, #8
    19c6:	f364 118f 	bfi	r1, r4, #6, #10
    19ca:	4827      	ldr	r0, [pc, #156]	; (1a68 <usage_fault.isra.2+0xf0>)
    19cc:	f003 f956 	bl	4c7c <log_0>
		 */
		reason = K_ERR_STACK_CHK_FAIL;
#endif /* CONFIG_BUILTIN_STACK_GUARD */
	}
#endif /* CONFIG_ARMV8_M_MAINLINE */
	if ((SCB->CFSR & SCB_CFSR_NOCP_Msk) != 0) {
    19d0:	4b23      	ldr	r3, [pc, #140]	; (1a60 <usage_fault.isra.2+0xe8>)
    19d2:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    19d4:	0318      	lsls	r0, r3, #12
    19d6:	d509      	bpl.n	19ec <usage_fault.isra.2+0x74>
		PR_FAULT_INFO("  No coprocessor instructions");
    19d8:	f04f 0100 	mov.w	r1, #0
    19dc:	2301      	movs	r3, #1
    19de:	f363 0107 	bfi	r1, r3, #0, #8
    19e2:	f364 118f 	bfi	r1, r4, #6, #10
    19e6:	4821      	ldr	r0, [pc, #132]	; (1a6c <usage_fault.isra.2+0xf4>)
    19e8:	f003 f948 	bl	4c7c <log_0>
	}
	if ((SCB->CFSR & SCB_CFSR_INVPC_Msk) != 0) {
    19ec:	4b1c      	ldr	r3, [pc, #112]	; (1a60 <usage_fault.isra.2+0xe8>)
    19ee:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    19f0:	0359      	lsls	r1, r3, #13
    19f2:	d509      	bpl.n	1a08 <usage_fault.isra.2+0x90>
		PR_FAULT_INFO("  Illegal load of EXC_RETURN into PC");
    19f4:	f04f 0100 	mov.w	r1, #0
    19f8:	2301      	movs	r3, #1
    19fa:	f363 0107 	bfi	r1, r3, #0, #8
    19fe:	f364 118f 	bfi	r1, r4, #6, #10
    1a02:	481b      	ldr	r0, [pc, #108]	; (1a70 <usage_fault.isra.2+0xf8>)
    1a04:	f003 f93a 	bl	4c7c <log_0>
	}
	if ((SCB->CFSR & SCB_CFSR_INVSTATE_Msk) != 0) {
    1a08:	4b15      	ldr	r3, [pc, #84]	; (1a60 <usage_fault.isra.2+0xe8>)
    1a0a:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    1a0c:	039a      	lsls	r2, r3, #14
    1a0e:	d509      	bpl.n	1a24 <usage_fault.isra.2+0xac>
		PR_FAULT_INFO("  Illegal use of the EPSR");
    1a10:	f04f 0100 	mov.w	r1, #0
    1a14:	2301      	movs	r3, #1
    1a16:	f363 0107 	bfi	r1, r3, #0, #8
    1a1a:	f364 118f 	bfi	r1, r4, #6, #10
    1a1e:	4815      	ldr	r0, [pc, #84]	; (1a74 <usage_fault.isra.2+0xfc>)
    1a20:	f003 f92c 	bl	4c7c <log_0>
	}
	if ((SCB->CFSR & SCB_CFSR_UNDEFINSTR_Msk) != 0) {
    1a24:	4b0e      	ldr	r3, [pc, #56]	; (1a60 <usage_fault.isra.2+0xe8>)
    1a26:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    1a28:	03db      	lsls	r3, r3, #15
    1a2a:	d509      	bpl.n	1a40 <usage_fault.isra.2+0xc8>
		PR_FAULT_INFO("  Attempt to execute undefined instruction");
    1a2c:	f04f 0100 	mov.w	r1, #0
    1a30:	2301      	movs	r3, #1
    1a32:	f363 0107 	bfi	r1, r3, #0, #8
    1a36:	f364 118f 	bfi	r1, r4, #6, #10
    1a3a:	480f      	ldr	r0, [pc, #60]	; (1a78 <usage_fault.isra.2+0x100>)
    1a3c:	f003 f91e 	bl	4c7c <log_0>
	}

	/* clear UFSR sticky bits */
	SCB->CFSR |= SCB_CFSR_USGFAULTSR_Msk;
    1a40:	4a07      	ldr	r2, [pc, #28]	; (1a60 <usage_fault.isra.2+0xe8>)
    1a42:	6a93      	ldr	r3, [r2, #40]	; 0x28
    1a44:	ea6f 4303 	mvn.w	r3, r3, lsl #16
    1a48:	ea6f 4313 	mvn.w	r3, r3, lsr #16
    1a4c:	6293      	str	r3, [r2, #40]	; 0x28

	return reason;
}
    1a4e:	2000      	movs	r0, #0
    1a50:	bd10      	pop	{r4, pc}
    1a52:	bf00      	nop
    1a54:	00005dc0 	.word	0x00005dc0
    1a58:	00005da0 	.word	0x00005da0
    1a5c:	00006493 	.word	0x00006493
    1a60:	e000ed00 	.word	0xe000ed00
    1a64:	000064ab 	.word	0x000064ab
    1a68:	000064be 	.word	0x000064be
    1a6c:	000064d8 	.word	0x000064d8
    1a70:	000064f6 	.word	0x000064f6
    1a74:	0000651b 	.word	0x0000651b
    1a78:	00006535 	.word	0x00006535

00001a7c <mem_manage_fault.isra.4>:
static u32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault,
    1a7c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
	PR_FAULT_INFO("***** MPU FAULT *****");
    1a7e:	2301      	movs	r3, #1
static u32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault,
    1a80:	460e      	mov	r6, r1
	PR_FAULT_INFO("***** MPU FAULT *****");
    1a82:	f04f 0100 	mov.w	r1, #0
    1a86:	f363 0107 	bfi	r1, r3, #0, #8
    1a8a:	4c36      	ldr	r4, [pc, #216]	; (1b64 <mem_manage_fault.isra.4+0xe8>)
    1a8c:	4b36      	ldr	r3, [pc, #216]	; (1b68 <mem_manage_fault.isra.4+0xec>)
    1a8e:	1ae4      	subs	r4, r4, r3
    1a90:	f3c4 04c9 	ubfx	r4, r4, #3, #10
    1a94:	f364 118f 	bfi	r1, r4, #6, #10
static u32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault,
    1a98:	4607      	mov	r7, r0
	PR_FAULT_INFO("***** MPU FAULT *****");
    1a9a:	4834      	ldr	r0, [pc, #208]	; (1b6c <mem_manage_fault.isra.4+0xf0>)
    1a9c:	f003 f8ee 	bl	4c7c <log_0>
	if ((SCB->CFSR & SCB_CFSR_MSTKERR_Msk) != 0) {
    1aa0:	4b33      	ldr	r3, [pc, #204]	; (1b70 <mem_manage_fault.isra.4+0xf4>)
    1aa2:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    1aa4:	06d9      	lsls	r1, r3, #27
    1aa6:	d509      	bpl.n	1abc <mem_manage_fault.isra.4+0x40>
		PR_FAULT_INFO("  Stacking error (context area might be"
    1aa8:	f04f 0100 	mov.w	r1, #0
    1aac:	2301      	movs	r3, #1
    1aae:	f363 0107 	bfi	r1, r3, #0, #8
    1ab2:	f364 118f 	bfi	r1, r4, #6, #10
    1ab6:	482f      	ldr	r0, [pc, #188]	; (1b74 <mem_manage_fault.isra.4+0xf8>)
    1ab8:	f003 f8e0 	bl	4c7c <log_0>
	if ((SCB->CFSR & SCB_CFSR_MUNSTKERR_Msk) != 0) {
    1abc:	4b2c      	ldr	r3, [pc, #176]	; (1b70 <mem_manage_fault.isra.4+0xf4>)
    1abe:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    1ac0:	071a      	lsls	r2, r3, #28
    1ac2:	d509      	bpl.n	1ad8 <mem_manage_fault.isra.4+0x5c>
		PR_FAULT_INFO("  Unstacking error");
    1ac4:	f04f 0100 	mov.w	r1, #0
    1ac8:	2301      	movs	r3, #1
    1aca:	f363 0107 	bfi	r1, r3, #0, #8
    1ace:	f364 118f 	bfi	r1, r4, #6, #10
    1ad2:	4829      	ldr	r0, [pc, #164]	; (1b78 <mem_manage_fault.isra.4+0xfc>)
    1ad4:	f003 f8d2 	bl	4c7c <log_0>
	if ((SCB->CFSR & SCB_CFSR_DACCVIOL_Msk) != 0) {
    1ad8:	4d25      	ldr	r5, [pc, #148]	; (1b70 <mem_manage_fault.isra.4+0xf4>)
    1ada:	6aab      	ldr	r3, [r5, #40]	; 0x28
    1adc:	079b      	lsls	r3, r3, #30
    1ade:	d51c      	bpl.n	1b1a <mem_manage_fault.isra.4+0x9e>
		PR_FAULT_INFO("  Data Access Violation");
    1ae0:	2301      	movs	r3, #1
    1ae2:	f04f 0100 	mov.w	r1, #0
    1ae6:	f363 0107 	bfi	r1, r3, #0, #8
    1aea:	f364 118f 	bfi	r1, r4, #6, #10
    1aee:	4823      	ldr	r0, [pc, #140]	; (1b7c <mem_manage_fault.isra.4+0x100>)
    1af0:	f003 f8c4 	bl	4c7c <log_0>
		mmfar = SCB->MMFAR;
    1af4:	6b69      	ldr	r1, [r5, #52]	; 0x34
		if ((SCB->CFSR & SCB_CFSR_MMARVALID_Msk) != 0) {
    1af6:	6aab      	ldr	r3, [r5, #40]	; 0x28
    1af8:	0618      	lsls	r0, r3, #24
    1afa:	d50e      	bpl.n	1b1a <mem_manage_fault.isra.4+0x9e>
			PR_EXC("  MMFAR Address: 0x%x", mmfar);
    1afc:	f04f 0200 	mov.w	r2, #0
    1b00:	2301      	movs	r3, #1
    1b02:	f363 0207 	bfi	r2, r3, #0, #8
    1b06:	f364 128f 	bfi	r2, r4, #6, #10
    1b0a:	481d      	ldr	r0, [pc, #116]	; (1b80 <mem_manage_fault.isra.4+0x104>)
    1b0c:	f003 f8c3 	bl	4c96 <log_1>
			if (from_hard_fault) {
    1b10:	b11f      	cbz	r7, 1b1a <mem_manage_fault.isra.4+0x9e>
				SCB->CFSR &= ~SCB_CFSR_MMARVALID_Msk;
    1b12:	6aab      	ldr	r3, [r5, #40]	; 0x28
    1b14:	f023 0380 	bic.w	r3, r3, #128	; 0x80
    1b18:	62ab      	str	r3, [r5, #40]	; 0x28
	if ((SCB->CFSR & SCB_CFSR_IACCVIOL_Msk) != 0) {
    1b1a:	4b15      	ldr	r3, [pc, #84]	; (1b70 <mem_manage_fault.isra.4+0xf4>)
    1b1c:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    1b1e:	07da      	lsls	r2, r3, #31
    1b20:	d509      	bpl.n	1b36 <mem_manage_fault.isra.4+0xba>
		PR_FAULT_INFO("  Instruction Access Violation");
    1b22:	f04f 0100 	mov.w	r1, #0
    1b26:	2301      	movs	r3, #1
    1b28:	f363 0107 	bfi	r1, r3, #0, #8
    1b2c:	f364 118f 	bfi	r1, r4, #6, #10
    1b30:	4814      	ldr	r0, [pc, #80]	; (1b84 <mem_manage_fault.isra.4+0x108>)
    1b32:	f003 f8a3 	bl	4c7c <log_0>
	if ((SCB->CFSR & SCB_CFSR_MLSPERR_Msk) != 0) {
    1b36:	4b0e      	ldr	r3, [pc, #56]	; (1b70 <mem_manage_fault.isra.4+0xf4>)
    1b38:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    1b3a:	069b      	lsls	r3, r3, #26
    1b3c:	d509      	bpl.n	1b52 <mem_manage_fault.isra.4+0xd6>
		PR_FAULT_INFO(
    1b3e:	f04f 0100 	mov.w	r1, #0
    1b42:	2301      	movs	r3, #1
    1b44:	f363 0107 	bfi	r1, r3, #0, #8
    1b48:	f364 118f 	bfi	r1, r4, #6, #10
    1b4c:	480e      	ldr	r0, [pc, #56]	; (1b88 <mem_manage_fault.isra.4+0x10c>)
    1b4e:	f003 f895 	bl	4c7c <log_0>
	if (SCB->CFSR & SCB_CFSR_MSTKERR_Msk) {
    1b52:	4b07      	ldr	r3, [pc, #28]	; (1b70 <mem_manage_fault.isra.4+0xf4>)
    1b54:	6a9a      	ldr	r2, [r3, #40]	; 0x28
	SCB->CFSR |= SCB_CFSR_MEMFAULTSR_Msk;
    1b56:	6a9a      	ldr	r2, [r3, #40]	; 0x28
	*recoverable = memory_fault_recoverable(esf);
    1b58:	2000      	movs	r0, #0
	SCB->CFSR |= SCB_CFSR_MEMFAULTSR_Msk;
    1b5a:	f042 02ff 	orr.w	r2, r2, #255	; 0xff
    1b5e:	629a      	str	r2, [r3, #40]	; 0x28
	*recoverable = memory_fault_recoverable(esf);
    1b60:	7030      	strb	r0, [r6, #0]
}
    1b62:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    1b64:	00005dc0 	.word	0x00005dc0
    1b68:	00005da0 	.word	0x00005da0
    1b6c:	000063bb 	.word	0x000063bb
    1b70:	e000ed00 	.word	0xe000ed00
    1b74:	000063d1 	.word	0x000063d1
    1b78:	00006404 	.word	0x00006404
    1b7c:	00006417 	.word	0x00006417
    1b80:	0000642f 	.word	0x0000642f
    1b84:	00006445 	.word	0x00006445
    1b88:	00006464 	.word	0x00006464

00001b8c <bus_fault.isra.5>:
static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable)
    1b8c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
	PR_FAULT_INFO("***** BUS FAULT *****");
    1b8e:	2301      	movs	r3, #1
static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable)
    1b90:	460e      	mov	r6, r1
	PR_FAULT_INFO("***** BUS FAULT *****");
    1b92:	f04f 0100 	mov.w	r1, #0
    1b96:	f363 0107 	bfi	r1, r3, #0, #8
    1b9a:	4c3c      	ldr	r4, [pc, #240]	; (1c8c <bus_fault.isra.5+0x100>)
    1b9c:	4b3c      	ldr	r3, [pc, #240]	; (1c90 <bus_fault.isra.5+0x104>)
    1b9e:	1ae4      	subs	r4, r4, r3
    1ba0:	f3c4 04c9 	ubfx	r4, r4, #3, #10
    1ba4:	f364 118f 	bfi	r1, r4, #6, #10
static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable)
    1ba8:	4607      	mov	r7, r0
	PR_FAULT_INFO("***** BUS FAULT *****");
    1baa:	483a      	ldr	r0, [pc, #232]	; (1c94 <bus_fault.isra.5+0x108>)
    1bac:	f003 f866 	bl	4c7c <log_0>
	if (SCB->CFSR & SCB_CFSR_STKERR_Msk) {
    1bb0:	4b39      	ldr	r3, [pc, #228]	; (1c98 <bus_fault.isra.5+0x10c>)
    1bb2:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    1bb4:	04d9      	lsls	r1, r3, #19
    1bb6:	d509      	bpl.n	1bcc <bus_fault.isra.5+0x40>
		PR_FAULT_INFO("  Stacking error");
    1bb8:	f04f 0100 	mov.w	r1, #0
    1bbc:	2301      	movs	r3, #1
    1bbe:	f363 0107 	bfi	r1, r3, #0, #8
    1bc2:	f364 118f 	bfi	r1, r4, #6, #10
    1bc6:	4835      	ldr	r0, [pc, #212]	; (1c9c <bus_fault.isra.5+0x110>)
    1bc8:	f003 f858 	bl	4c7c <log_0>
	if (SCB->CFSR & SCB_CFSR_UNSTKERR_Msk) {
    1bcc:	4b32      	ldr	r3, [pc, #200]	; (1c98 <bus_fault.isra.5+0x10c>)
    1bce:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    1bd0:	051a      	lsls	r2, r3, #20
    1bd2:	d509      	bpl.n	1be8 <bus_fault.isra.5+0x5c>
		PR_FAULT_INFO("  Unstacking error");
    1bd4:	f04f 0100 	mov.w	r1, #0
    1bd8:	2301      	movs	r3, #1
    1bda:	f363 0107 	bfi	r1, r3, #0, #8
    1bde:	f364 118f 	bfi	r1, r4, #6, #10
    1be2:	482f      	ldr	r0, [pc, #188]	; (1ca0 <bus_fault.isra.5+0x114>)
    1be4:	f003 f84a 	bl	4c7c <log_0>
	if (SCB->CFSR & SCB_CFSR_PRECISERR_Msk) {
    1be8:	4d2b      	ldr	r5, [pc, #172]	; (1c98 <bus_fault.isra.5+0x10c>)
    1bea:	6aab      	ldr	r3, [r5, #40]	; 0x28
    1bec:	059b      	lsls	r3, r3, #22
    1bee:	d51c      	bpl.n	1c2a <bus_fault.isra.5+0x9e>
		PR_FAULT_INFO("  Precise data bus error");
    1bf0:	2301      	movs	r3, #1
    1bf2:	f04f 0100 	mov.w	r1, #0
    1bf6:	f363 0107 	bfi	r1, r3, #0, #8
    1bfa:	f364 118f 	bfi	r1, r4, #6, #10
    1bfe:	4829      	ldr	r0, [pc, #164]	; (1ca4 <bus_fault.isra.5+0x118>)
    1c00:	f003 f83c 	bl	4c7c <log_0>
		STORE_xFAR(bfar, SCB->BFAR);
    1c04:	6ba9      	ldr	r1, [r5, #56]	; 0x38
		if ((SCB->CFSR & SCB_CFSR_BFARVALID_Msk) != 0) {
    1c06:	6aab      	ldr	r3, [r5, #40]	; 0x28
    1c08:	0418      	lsls	r0, r3, #16
    1c0a:	d50e      	bpl.n	1c2a <bus_fault.isra.5+0x9e>
			PR_EXC("  BFAR Address: 0x%x", bfar);
    1c0c:	f04f 0200 	mov.w	r2, #0
    1c10:	2301      	movs	r3, #1
    1c12:	f363 0207 	bfi	r2, r3, #0, #8
    1c16:	f364 128f 	bfi	r2, r4, #6, #10
    1c1a:	4823      	ldr	r0, [pc, #140]	; (1ca8 <bus_fault.isra.5+0x11c>)
    1c1c:	f003 f83b 	bl	4c96 <log_1>
			if (from_hard_fault) {
    1c20:	b11f      	cbz	r7, 1c2a <bus_fault.isra.5+0x9e>
				SCB->CFSR &= ~SCB_CFSR_BFARVALID_Msk;
    1c22:	6aab      	ldr	r3, [r5, #40]	; 0x28
    1c24:	f423 4300 	bic.w	r3, r3, #32768	; 0x8000
    1c28:	62ab      	str	r3, [r5, #40]	; 0x28
	if (SCB->CFSR & SCB_CFSR_IMPRECISERR_Msk) {
    1c2a:	4b1b      	ldr	r3, [pc, #108]	; (1c98 <bus_fault.isra.5+0x10c>)
    1c2c:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    1c2e:	0559      	lsls	r1, r3, #21
    1c30:	d509      	bpl.n	1c46 <bus_fault.isra.5+0xba>
		PR_FAULT_INFO("  Imprecise data bus error");
    1c32:	f04f 0100 	mov.w	r1, #0
    1c36:	2301      	movs	r3, #1
    1c38:	f363 0107 	bfi	r1, r3, #0, #8
    1c3c:	f364 118f 	bfi	r1, r4, #6, #10
    1c40:	481a      	ldr	r0, [pc, #104]	; (1cac <bus_fault.isra.5+0x120>)
    1c42:	f003 f81b 	bl	4c7c <log_0>
	if ((SCB->CFSR & SCB_CFSR_IBUSERR_Msk) != 0) {
    1c46:	4b14      	ldr	r3, [pc, #80]	; (1c98 <bus_fault.isra.5+0x10c>)
    1c48:	6a9a      	ldr	r2, [r3, #40]	; 0x28
    1c4a:	05d2      	lsls	r2, r2, #23
    1c4c:	d511      	bpl.n	1c72 <bus_fault.isra.5+0xe6>
		PR_FAULT_INFO("  Instruction bus error");
    1c4e:	f04f 0100 	mov.w	r1, #0
    1c52:	2301      	movs	r3, #1
    1c54:	f363 0107 	bfi	r1, r3, #0, #8
    1c58:	4815      	ldr	r0, [pc, #84]	; (1cb0 <bus_fault.isra.5+0x124>)
    1c5a:	f364 118f 	bfi	r1, r4, #6, #10
		PR_FAULT_INFO("  Floating-point lazy state preservation error");
    1c5e:	f003 f80d 	bl	4c7c <log_0>
	SCB->CFSR |= SCB_CFSR_BUSFAULTSR_Msk;
    1c62:	4a0d      	ldr	r2, [pc, #52]	; (1c98 <bus_fault.isra.5+0x10c>)
    1c64:	6a93      	ldr	r3, [r2, #40]	; 0x28
	*recoverable = memory_fault_recoverable(esf);
    1c66:	2000      	movs	r0, #0
	SCB->CFSR |= SCB_CFSR_BUSFAULTSR_Msk;
    1c68:	f443 437f 	orr.w	r3, r3, #65280	; 0xff00
    1c6c:	6293      	str	r3, [r2, #40]	; 0x28
	*recoverable = memory_fault_recoverable(esf);
    1c6e:	7030      	strb	r0, [r6, #0]
}
    1c70:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	} else if (SCB->CFSR & SCB_CFSR_LSPERR_Msk) {
    1c72:	6a9b      	ldr	r3, [r3, #40]	; 0x28
    1c74:	049b      	lsls	r3, r3, #18
    1c76:	d5f4      	bpl.n	1c62 <bus_fault.isra.5+0xd6>
		PR_FAULT_INFO("  Floating-point lazy state preservation error");
    1c78:	f04f 0100 	mov.w	r1, #0
    1c7c:	2301      	movs	r3, #1
    1c7e:	f363 0107 	bfi	r1, r3, #0, #8
    1c82:	f364 118f 	bfi	r1, r4, #6, #10
    1c86:	480b      	ldr	r0, [pc, #44]	; (1cb4 <bus_fault.isra.5+0x128>)
    1c88:	e7e9      	b.n	1c5e <bus_fault.isra.5+0xd2>
    1c8a:	bf00      	nop
    1c8c:	00005dc0 	.word	0x00005dc0
    1c90:	00005da0 	.word	0x00005da0
    1c94:	00006333 	.word	0x00006333
    1c98:	e000ed00 	.word	0xe000ed00
    1c9c:	00006349 	.word	0x00006349
    1ca0:	00006404 	.word	0x00006404
    1ca4:	0000635a 	.word	0x0000635a
    1ca8:	00006373 	.word	0x00006373
    1cac:	00006388 	.word	0x00006388
    1cb0:	000063a3 	.word	0x000063a3
    1cb4:	00006464 	.word	0x00006464

00001cb8 <z_arm_fault>:
 * @param psp PSP value immediately after the exception occurred
 * @param exc_return EXC_RETURN value present in LR after exception entry.
 *
 */
void z_arm_fault(u32_t msp, u32_t psp, u32_t exc_return)
{
    1cb8:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
	u32_t reason = K_ERR_CPU_EXCEPTION;
	int fault = SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk;
    1cbc:	4b64      	ldr	r3, [pc, #400]	; (1e50 <z_arm_fault+0x198>)
    1cbe:	685e      	ldr	r6, [r3, #4]
{
    1cc0:	b08a      	sub	sp, #40	; 0x28
	int fault = SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk;
    1cc2:	f3c6 0408 	ubfx	r4, r6, #0, #9
    1cc6:	2500      	movs	r5, #0
    1cc8:	f385 8811 	msr	BASEPRI, r5
    1ccc:	f3bf 8f6f 	isb	sy
	if ((exc_return & EXC_RETURN_INDICATOR_PREFIX) !=
    1cd0:	f002 437f 	and.w	r3, r2, #4278190080	; 0xff000000
    1cd4:	f1b3 4f7f 	cmp.w	r3, #4278190080	; 0xff000000
    1cd8:	d111      	bne.n	1cfe <z_arm_fault+0x46>
	if ((exc_return & EXC_RETURN_MODE_THREAD) &&
    1cda:	f002 030c 	and.w	r3, r2, #12
    1cde:	2b08      	cmp	r3, #8
    1ce0:	d10f      	bne.n	1d02 <z_arm_fault+0x4a>
		PR_EXC("SPSEL in thread mode does not indicate PSP");
    1ce2:	2301      	movs	r3, #1
    1ce4:	f04f 0100 	mov.w	r1, #0
    1ce8:	f363 0107 	bfi	r1, r3, #0, #8
    1cec:	4a59      	ldr	r2, [pc, #356]	; (1e54 <z_arm_fault+0x19c>)
    1cee:	4b5a      	ldr	r3, [pc, #360]	; (1e58 <z_arm_fault+0x1a0>)
    1cf0:	485a      	ldr	r0, [pc, #360]	; (1e5c <z_arm_fault+0x1a4>)
    1cf2:	1a9b      	subs	r3, r3, r2
    1cf4:	08db      	lsrs	r3, r3, #3
    1cf6:	f363 118f 	bfi	r1, r3, #6, #10
    1cfa:	f002 ffbf 	bl	4c7c <log_0>
		return NULL;
    1cfe:	462f      	mov	r7, r5
    1d00:	e004      	b.n	1d0c <z_arm_fault+0x54>
		if (exc_return & EXC_RETURN_MODE_THREAD) {
    1d02:	0712      	lsls	r2, r2, #28
			ptr_esf =  (z_arch_esf_t *)psp;
    1d04:	bf4e      	itee	mi
    1d06:	460f      	movmi	r7, r1
			ptr_esf = (z_arch_esf_t *)msp;
    1d08:	4607      	movpl	r7, r0
			*nested_exc = true;
    1d0a:	2501      	movpl	r5, #1
	*recoverable = false;
    1d0c:	2300      	movs	r3, #0
    1d0e:	f88d 3007 	strb.w	r3, [sp, #7]
	switch (fault) {
    1d12:	1ee3      	subs	r3, r4, #3
    1d14:	2b09      	cmp	r3, #9
    1d16:	d87f      	bhi.n	1e18 <z_arm_fault+0x160>
    1d18:	e8df f003 	tbb	[pc, r3]
    1d1c:	4c6d6905 	.word	0x4c6d6905
    1d20:	7e7e7e7e 	.word	0x7e7e7e7e
    1d24:	717e      	.short	0x717e
	PR_FAULT_INFO("***** HARD FAULT *****");
    1d26:	2301      	movs	r3, #1
    1d28:	f04f 0100 	mov.w	r1, #0
    1d2c:	f363 0107 	bfi	r1, r3, #0, #8
    1d30:	4e49      	ldr	r6, [pc, #292]	; (1e58 <z_arm_fault+0x1a0>)
    1d32:	4b48      	ldr	r3, [pc, #288]	; (1e54 <z_arm_fault+0x19c>)
    1d34:	484a      	ldr	r0, [pc, #296]	; (1e60 <z_arm_fault+0x1a8>)
    1d36:	1af6      	subs	r6, r6, r3
    1d38:	f3c6 06c9 	ubfx	r6, r6, #3, #10
    1d3c:	f366 118f 	bfi	r1, r6, #6, #10
    1d40:	f002 ff9c 	bl	4c7c <log_0>
	if ((SCB->HFSR & SCB_HFSR_VECTTBL_Msk) != 0) {
    1d44:	4b42      	ldr	r3, [pc, #264]	; (1e50 <z_arm_fault+0x198>)
    1d46:	6adc      	ldr	r4, [r3, #44]	; 0x2c
	*recoverable = false;
    1d48:	f04f 0800 	mov.w	r8, #0
	if ((SCB->HFSR & SCB_HFSR_VECTTBL_Msk) != 0) {
    1d4c:	f014 0402 	ands.w	r4, r4, #2
	*recoverable = false;
    1d50:	f88d 8007 	strb.w	r8, [sp, #7]
	if ((SCB->HFSR & SCB_HFSR_VECTTBL_Msk) != 0) {
    1d54:	d00b      	beq.n	1d6e <z_arm_fault+0xb6>
		PR_EXC("  Bus fault on vector table read");
    1d56:	f04f 0100 	mov.w	r1, #0
    1d5a:	2301      	movs	r3, #1
    1d5c:	f363 0107 	bfi	r1, r3, #0, #8
    1d60:	4840      	ldr	r0, [pc, #256]	; (1e64 <z_arm_fault+0x1ac>)
    1d62:	f366 118f 	bfi	r1, r6, #6, #10
	PR_FAULT_INFO(
    1d66:	f002 ff89 	bl	4c7c <log_0>
	u32_t reason = K_ERR_CPU_EXCEPTION;
    1d6a:	2400      	movs	r4, #0
    1d6c:	e025      	b.n	1dba <z_arm_fault+0x102>
	} else if ((SCB->HFSR & SCB_HFSR_FORCED_Msk) != 0) {
    1d6e:	6adb      	ldr	r3, [r3, #44]	; 0x2c
    1d70:	005b      	lsls	r3, r3, #1
    1d72:	d522      	bpl.n	1dba <z_arm_fault+0x102>
		PR_EXC("  Fault escalation (see below)");
    1d74:	2301      	movs	r3, #1
    1d76:	f04f 0100 	mov.w	r1, #0
    1d7a:	f363 0107 	bfi	r1, r3, #0, #8
    1d7e:	f366 118f 	bfi	r1, r6, #6, #10
    1d82:	4839      	ldr	r0, [pc, #228]	; (1e68 <z_arm_fault+0x1b0>)
    1d84:	f002 ff7a 	bl	4c7c <log_0>
		if (SCB_MMFSR != 0) {
    1d88:	4b38      	ldr	r3, [pc, #224]	; (1e6c <z_arm_fault+0x1b4>)
    1d8a:	781b      	ldrb	r3, [r3, #0]
    1d8c:	b12b      	cbz	r3, 1d9a <z_arm_fault+0xe2>
			reason = mem_manage_fault(esf, 1, recoverable);
    1d8e:	f10d 0107 	add.w	r1, sp, #7
    1d92:	2001      	movs	r0, #1
		reason = mem_manage_fault(esf, 0, recoverable);
    1d94:	f7ff fe72 	bl	1a7c <mem_manage_fault.isra.4>
    1d98:	e00e      	b.n	1db8 <z_arm_fault+0x100>
		} else if (SCB_BFSR != 0) {
    1d9a:	4b35      	ldr	r3, [pc, #212]	; (1e70 <z_arm_fault+0x1b8>)
    1d9c:	781b      	ldrb	r3, [r3, #0]
    1d9e:	b12b      	cbz	r3, 1dac <z_arm_fault+0xf4>
			reason = bus_fault(esf, 1, recoverable);
    1da0:	f10d 0107 	add.w	r1, sp, #7
    1da4:	2001      	movs	r0, #1
		reason = bus_fault(esf, 0, recoverable);
    1da6:	f7ff fef1 	bl	1b8c <bus_fault.isra.5>
    1daa:	e005      	b.n	1db8 <z_arm_fault+0x100>
		} else if (SCB_UFSR != 0) {
    1dac:	4b31      	ldr	r3, [pc, #196]	; (1e74 <z_arm_fault+0x1bc>)
    1dae:	881b      	ldrh	r3, [r3, #0]
    1db0:	b29b      	uxth	r3, r3
    1db2:	b113      	cbz	r3, 1dba <z_arm_fault+0x102>
			reason = usage_fault(esf);
    1db4:	f7ff fde0 	bl	1978 <usage_fault.isra.2>
    1db8:	4604      	mov	r4, r0
	 esf = get_esf(msp, psp, exc_return, &nested_exc);
	__ASSERT(esf != NULL,
		"ESF could not be retrieved successfully. Shall never occur.");

	reason = fault_handle(esf, fault, &recoverable);
	if (recoverable) {
    1dba:	f89d 3007 	ldrb.w	r3, [sp, #7]
    1dbe:	b99b      	cbnz	r3, 1de8 <z_arm_fault+0x130>
		return;
	}

	/* Copy ESF */
	memcpy(&esf_copy, esf, sizeof(z_arch_esf_t));
    1dc0:	2220      	movs	r2, #32
    1dc2:	4639      	mov	r1, r7
    1dc4:	a802      	add	r0, sp, #8
    1dc6:	f003 fb71 	bl	54ac <memcpy>
	/* Overwrite stacked IPSR to mark a nested exception,
	 * or a return to Thread mode. Note that this may be
	 * required, if the retrieved ESF contents are invalid
	 * due to, for instance, a stacking error.
	 */
	if (nested_exc) {
    1dca:	9b09      	ldr	r3, [sp, #36]	; 0x24
    1dcc:	2d00      	cmp	r5, #0
    1dce:	d03a      	beq.n	1e46 <z_arm_fault+0x18e>
		if ((esf_copy.basic.xpsr & IPSR_ISR_Msk) == 0) {
    1dd0:	f3c3 0208 	ubfx	r2, r3, #0, #9
    1dd4:	b922      	cbnz	r2, 1de0 <z_arm_fault+0x128>
			esf_copy.basic.xpsr |= IPSR_ISR_Msk;
    1dd6:	ea6f 2353 	mvn.w	r3, r3, lsr #9
    1dda:	ea6f 2343 	mvn.w	r3, r3, lsl #9
		}
	} else {
		esf_copy.basic.xpsr &= ~(IPSR_ISR_Msk);
    1dde:	9309      	str	r3, [sp, #36]	; 0x24
	}

	z_arm_fatal_error(reason, &esf_copy);
    1de0:	a902      	add	r1, sp, #8
    1de2:	4620      	mov	r0, r4
    1de4:	f7ff fd24 	bl	1830 <z_arm_fatal_error>
}
    1de8:	b00a      	add	sp, #40	; 0x28
    1dea:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
		reason = mem_manage_fault(esf, 0, recoverable);
    1dee:	f10d 0107 	add.w	r1, sp, #7
    1df2:	2000      	movs	r0, #0
    1df4:	e7ce      	b.n	1d94 <z_arm_fault+0xdc>
		reason = bus_fault(esf, 0, recoverable);
    1df6:	f10d 0107 	add.w	r1, sp, #7
    1dfa:	2000      	movs	r0, #0
    1dfc:	e7d3      	b.n	1da6 <z_arm_fault+0xee>
	PR_FAULT_INFO(
    1dfe:	2301      	movs	r3, #1
    1e00:	f04f 0100 	mov.w	r1, #0
    1e04:	f363 0107 	bfi	r1, r3, #0, #8
    1e08:	4a12      	ldr	r2, [pc, #72]	; (1e54 <z_arm_fault+0x19c>)
    1e0a:	4b13      	ldr	r3, [pc, #76]	; (1e58 <z_arm_fault+0x1a0>)
    1e0c:	481a      	ldr	r0, [pc, #104]	; (1e78 <z_arm_fault+0x1c0>)
    1e0e:	1a9b      	subs	r3, r3, r2
    1e10:	08db      	lsrs	r3, r3, #3
    1e12:	f363 118f 	bfi	r1, r3, #6, #10
    1e16:	e7a6      	b.n	1d66 <z_arm_fault+0xae>
	PR_FAULT_INFO("***** %s %d) *****",
    1e18:	2201      	movs	r2, #1
    1e1a:	f04f 0300 	mov.w	r3, #0
    1e1e:	f362 0307 	bfi	r3, r2, #0, #8
    1e22:	490d      	ldr	r1, [pc, #52]	; (1e58 <z_arm_fault+0x1a0>)
    1e24:	4a0b      	ldr	r2, [pc, #44]	; (1e54 <z_arm_fault+0x19c>)
    1e26:	4815      	ldr	r0, [pc, #84]	; (1e7c <z_arm_fault+0x1c4>)
    1e28:	1a89      	subs	r1, r1, r2
    1e2a:	08c9      	lsrs	r1, r1, #3
    1e2c:	f416 7ff8 	tst.w	r6, #496	; 0x1f0
    1e30:	f361 138f 	bfi	r3, r1, #6, #10
    1e34:	f1a4 0210 	sub.w	r2, r4, #16
    1e38:	4911      	ldr	r1, [pc, #68]	; (1e80 <z_arm_fault+0x1c8>)
    1e3a:	bf18      	it	ne
    1e3c:	4601      	movne	r1, r0
    1e3e:	4811      	ldr	r0, [pc, #68]	; (1e84 <z_arm_fault+0x1cc>)
    1e40:	f002 ff3d 	bl	4cbe <log_2>
    1e44:	e791      	b.n	1d6a <z_arm_fault+0xb2>
		esf_copy.basic.xpsr &= ~(IPSR_ISR_Msk);
    1e46:	f423 73ff 	bic.w	r3, r3, #510	; 0x1fe
    1e4a:	f023 0301 	bic.w	r3, r3, #1
    1e4e:	e7c6      	b.n	1dde <z_arm_fault+0x126>
    1e50:	e000ed00 	.word	0xe000ed00
    1e54:	00005da0 	.word	0x00005da0
    1e58:	00005dc0 	.word	0x00005dc0
    1e5c:	00006560 	.word	0x00006560
    1e60:	0000658b 	.word	0x0000658b
    1e64:	000065a2 	.word	0x000065a2
    1e68:	000065c3 	.word	0x000065c3
    1e6c:	e000ed28 	.word	0xe000ed28
    1e70:	e000ed29 	.word	0xe000ed29
    1e74:	e000ed2a 	.word	0xe000ed2a
    1e78:	000065e2 	.word	0x000065e2
    1e7c:	0000662d 	.word	0x0000662d
    1e80:	00006618 	.word	0x00006618
    1e84:	00006646 	.word	0x00006646

00001e88 <z_arm_fault_init>:
 */
void z_arm_fault_init(void)
{
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	SCB->CCR |= SCB_CCR_DIV_0_TRP_Msk;
    1e88:	4a02      	ldr	r2, [pc, #8]	; (1e94 <z_arm_fault_init+0xc>)
    1e8a:	6953      	ldr	r3, [r2, #20]
    1e8c:	f043 0310 	orr.w	r3, r3, #16
    1e90:	6153      	str	r3, [r2, #20]
	 * Stack to attempt to descend into secure region, in which case a
	 * Secure Hard Fault will occur and we can track the fault from there.
	 */
	SCB->CCR |= SCB_CCR_STKOFHFNMIGN_Msk;
#endif /* CONFIG_BUILTIN_STACK_GUARD */
}
    1e92:	4770      	bx	lr
    1e94:	e000ed00 	.word	0xe000ed00

00001e98 <z_arm_int_lib_init>:
    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    1e98:	4804      	ldr	r0, [pc, #16]	; (1eac <z_arm_int_lib_init+0x14>)
 * @return N/A
 */

void z_arm_int_lib_init(void)
{
	int irq = 0;
    1e9a:	2300      	movs	r3, #0
    1e9c:	2120      	movs	r1, #32
    1e9e:	18c2      	adds	r2, r0, r3

	for (; irq < CONFIG_NUM_IRQS; irq++) {
    1ea0:	3301      	adds	r3, #1
    1ea2:	2b30      	cmp	r3, #48	; 0x30
    1ea4:	f882 1300 	strb.w	r1, [r2, #768]	; 0x300
    1ea8:	d1f9      	bne.n	1e9e <z_arm_int_lib_init+0x6>
		NVIC_SetPriority((IRQn_Type)irq, _IRQ_PRIO_OFFSET);
	}
}
    1eaa:	4770      	bx	lr
    1eac:	e000e100 	.word	0xe000e100

00001eb0 <z_impl_k_thread_abort>:
#include <sys/__assert.h>

extern void z_thread_single_abort(struct k_thread *thread);

void z_impl_k_thread_abort(k_tid_t thread)
{
    1eb0:	b538      	push	{r3, r4, r5, lr}
    1eb2:	4605      	mov	r5, r0
	__asm__ volatile(
    1eb4:	f04f 0320 	mov.w	r3, #32
    1eb8:	f3ef 8411 	mrs	r4, BASEPRI
    1ebc:	f383 8811 	msr	BASEPRI, r3
    1ec0:	f3bf 8f6f 	isb	sy
	key = irq_lock();

	__ASSERT(!(thread->base.user_options & K_ESSENTIAL),
		 "essential thread aborted");

	z_thread_single_abort(thread);
    1ec4:	f001 feee 	bl	3ca4 <z_thread_single_abort>
	z_thread_monitor_exit(thread);

	if (_current == thread) {
    1ec8:	4b0a      	ldr	r3, [pc, #40]	; (1ef4 <z_impl_k_thread_abort+0x44>)
    1eca:	689b      	ldr	r3, [r3, #8]
    1ecc:	42ab      	cmp	r3, r5
    1ece:	d10b      	bne.n	1ee8 <z_impl_k_thread_abort+0x38>
		if ((SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) == 0) {
    1ed0:	4b09      	ldr	r3, [pc, #36]	; (1ef8 <z_impl_k_thread_abort+0x48>)
    1ed2:	685a      	ldr	r2, [r3, #4]
    1ed4:	f3c2 0208 	ubfx	r2, r2, #0, #9
    1ed8:	b912      	cbnz	r2, 1ee0 <z_impl_k_thread_abort+0x30>
	int ret;
	z_check_stack_sentinel();
#ifndef CONFIG_ARM
	sys_trace_thread_switched_out();
#endif
	ret = arch_swap(key);
    1eda:	4620      	mov	r0, r4
    1edc:	f7ff fbd6 	bl	168c <arch_swap>
			(void)z_swap_irqlock(key);
			CODE_UNREACHABLE;
		} else {
			SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk;
    1ee0:	685a      	ldr	r2, [r3, #4]
    1ee2:	f042 5280 	orr.w	r2, r2, #268435456	; 0x10000000
    1ee6:	605a      	str	r2, [r3, #4]
		}
	}

	/* The abort handler might have altered the ready queue. */
	z_reschedule_irqlock(key);
    1ee8:	4620      	mov	r0, r4
}
    1eea:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
	z_reschedule_irqlock(key);
    1eee:	f003 bd37 	b.w	5960 <z_reschedule_irqlock>
    1ef2:	bf00      	nop
    1ef4:	2000084c 	.word	0x2000084c
    1ef8:	e000ed00 	.word	0xe000ed00

00001efc <z_arm_configure_static_mpu_regions>:
 *
 * For some MPU architectures, such as the unmodified ARMv8-M MPU,
 * the function must execute with MPU enabled.
 */
void z_arm_configure_static_mpu_regions(void)
{
    1efc:	b51f      	push	{r0, r1, r2, r3, r4, lr}
		.size = (u32_t)&_nocache_ram_size,
		.attr = K_MEM_PARTITION_P_RW_U_NA_NOCACHE,
		};
#endif /* CONFIG_NOCACHE_MEMORY */
#if defined(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT)
		const struct k_mem_partition ramfunc_region =
    1efe:	4b08      	ldr	r3, [pc, #32]	; (1f20 <z_arm_configure_static_mpu_regions+0x24>)
    1f00:	9301      	str	r3, [sp, #4]
    1f02:	4b08      	ldr	r3, [pc, #32]	; (1f24 <z_arm_configure_static_mpu_regions+0x28>)
    1f04:	9302      	str	r3, [sp, #8]
    1f06:	4b08      	ldr	r3, [pc, #32]	; (1f28 <z_arm_configure_static_mpu_regions+0x2c>)
    1f08:	9303      	str	r3, [sp, #12]

	/* Define a constant array of k_mem_partition objects
	 * to hold the configuration of the respective static
	 * MPU regions.
	 */
	const struct k_mem_partition *static_regions[] = {
    1f0a:	ab01      	add	r3, sp, #4
    1f0c:	9300      	str	r3, [sp, #0]
	/* Configure the static MPU regions within firmware SRAM boundaries.
	 * Start address of the image is given by _image_ram_start. The end
	 * of the firmware SRAM area is marked by __kernel_ram_end, taking
	 * into account the unused SRAM area, as well.
	 */
	arm_core_mpu_configure_static_mpu_regions(static_regions,
    1f0e:	4a07      	ldr	r2, [pc, #28]	; (1f2c <z_arm_configure_static_mpu_regions+0x30>)
    1f10:	4b07      	ldr	r3, [pc, #28]	; (1f30 <z_arm_configure_static_mpu_regions+0x34>)
    1f12:	2101      	movs	r1, #1
    1f14:	4668      	mov	r0, sp
    1f16:	f000 f8b5 	bl	2084 <arm_core_mpu_configure_static_mpu_regions>
	};

	arm_core_mpu_mark_areas_for_dynamic_regions(dyn_region_areas,
		ARRAY_SIZE(dyn_region_areas));
#endif /* CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS */
}
    1f1a:	b005      	add	sp, #20
    1f1c:	f85d fb04 	ldr.w	pc, [sp], #4
    1f20:	20000000 	.word	0x20000000
    1f24:	00000000 	.word	0x00000000
    1f28:	060b0000 	.word	0x060b0000
    1f2c:	20000000 	.word	0x20000000
    1f30:	20040000 	.word	0x20040000

00001f34 <mpu_configure_regions>:
 * sanity check of the memory regions to be programmed.
 */
static int mpu_configure_regions(const struct k_mem_partition
	*regions[], u8_t regions_num, u8_t start_reg_index,
	bool do_sanity_check)
{
    1f34:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 */
static void region_init(const u32_t index,
	const struct arm_mpu_region *region_conf)
{
	/* Select the region you want to access */
	MPU->RNR = index;
    1f36:	4f2e      	ldr	r7, [pc, #184]	; (1ff0 <mpu_configure_regions+0xbc>)
    1f38:	460e      	mov	r6, r1
	int i;
	int reg_index = start_reg_index;

	for (i = 0; i < regions_num; i++) {
    1f3a:	2100      	movs	r1, #0
    1f3c:	42b1      	cmp	r1, r6
    1f3e:	da22      	bge.n	1f86 <mpu_configure_regions+0x52>
		if (regions[i]->size == 0U) {
    1f40:	f850 c021 	ldr.w	ip, [r0, r1, lsl #2]
    1f44:	f8dc 4004 	ldr.w	r4, [ip, #4]
    1f48:	2c00      	cmp	r4, #0
    1f4a:	d04f      	beq.n	1fec <mpu_configure_regions+0xb8>
			continue;
		}
		/* Non-empty region. */

		if (do_sanity_check &&
    1f4c:	b1eb      	cbz	r3, 1f8a <mpu_configure_regions+0x56>
	 * and greater or equal to the minimum
	 * MPU region size. Start address of the
	 * partition must align with size.
	 */
	int partition_is_valid =
		((part->size & (part->size - 1)) == 0U)
    1f4e:	f104 3eff 	add.w	lr, r4, #4294967295
		&&
		(part->size >= CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE)
		&&
    1f52:	ea14 0f0e 	tst.w	r4, lr
    1f56:	d106      	bne.n	1f66 <mpu_configure_regions+0x32>
		&&
    1f58:	2c1f      	cmp	r4, #31
    1f5a:	d904      	bls.n	1f66 <mpu_configure_regions+0x32>
		((part->start & (part->size - 1)) == 0U);
    1f5c:	f8dc 5000 	ldr.w	r5, [ip]
		&&
    1f60:	ea1e 0f05 	tst.w	lr, r5
    1f64:	d011      	beq.n	1f8a <mpu_configure_regions+0x56>
				(!mpu_partition_is_valid(regions[i]))) {
			LOG_ERR("Partition %u: sanity check failed.", i);
    1f66:	2301      	movs	r3, #1
    1f68:	f04f 0200 	mov.w	r2, #0
    1f6c:	f363 0207 	bfi	r2, r3, #0, #8
    1f70:	4820      	ldr	r0, [pc, #128]	; (1ff4 <mpu_configure_regions+0xc0>)
    1f72:	4b21      	ldr	r3, [pc, #132]	; (1ff8 <mpu_configure_regions+0xc4>)
    1f74:	1a1b      	subs	r3, r3, r0
    1f76:	08db      	lsrs	r3, r3, #3
    1f78:	4820      	ldr	r0, [pc, #128]	; (1ffc <mpu_configure_regions+0xc8>)
    1f7a:	f363 128f 	bfi	r2, r3, #6, #10
		LOG_ERR("Failed to allocate new MPU region %u\n", index);
    1f7e:	f002 fe8a 	bl	4c96 <log_1>
			return -EINVAL;
		}

		reg_index = mpu_configure_region(reg_index, regions[i]);
    1f82:	f06f 0215 	mvn.w	r2, #21
		/* Increment number of programmed MPU indices. */
		reg_index++;
	}

	return reg_index;
}
    1f86:	4610      	mov	r0, r2
    1f88:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 * to that power-of-two value.
 */
static inline u32_t size_to_mpu_rasr_size(u32_t size)
{
	/* The minimal supported region size is 32 bytes */
	if (size <= 32U) {
    1f8a:	2c20      	cmp	r4, #32
		reg_index = mpu_configure_region(reg_index, regions[i]);
    1f8c:	b2d5      	uxtb	r5, r2
	region_conf.base = new_region->start;
    1f8e:	f8dc 2000 	ldr.w	r2, [ip]
	get_region_attr_from_k_mem_partition_info(&region_conf.attr,
    1f92:	f8dc c008 	ldr.w	ip, [ip, #8]
    1f96:	d91a      	bls.n	1fce <mpu_configure_regions+0x9a>
	/*
	 * A size value greater than 2^31 could not be handled by
	 * round_up_to_next_power_of_two() properly. We handle
	 * it separately here.
	 */
	if (size > (1UL << 31)) {
    1f98:	f1b4 4f00 	cmp.w	r4, #2147483648	; 0x80000000
    1f9c:	d819      	bhi.n	1fd2 <mpu_configure_regions+0x9e>
		return REGION_4G;
	}

	return ((32 - __builtin_clz(size - 1) - 2 + 1) << MPU_RASR_SIZE_Pos) &
    1f9e:	3c01      	subs	r4, #1
    1fa0:	fab4 f484 	clz	r4, r4
    1fa4:	f1c4 041f 	rsb	r4, r4, #31
    1fa8:	0064      	lsls	r4, r4, #1
	if (index > (get_num_regions() - 1)) {
    1faa:	2d07      	cmp	r5, #7
	/* in ARMv7-M MPU the base address is not required
	 * to determine region attributes
	 */
	(void) base;

	p_attr->rasr = attr->rasr_attr | size_to_mpu_rasr_size(size);
    1fac:	ea4c 0404 	orr.w	r4, ip, r4
    1fb0:	d911      	bls.n	1fd6 <mpu_configure_regions+0xa2>
		LOG_ERR("Failed to allocate new MPU region %u\n", index);
    1fb2:	2301      	movs	r3, #1
    1fb4:	f04f 0200 	mov.w	r2, #0
    1fb8:	f363 0207 	bfi	r2, r3, #0, #8
    1fbc:	490d      	ldr	r1, [pc, #52]	; (1ff4 <mpu_configure_regions+0xc0>)
    1fbe:	4b0e      	ldr	r3, [pc, #56]	; (1ff8 <mpu_configure_regions+0xc4>)
    1fc0:	480f      	ldr	r0, [pc, #60]	; (2000 <mpu_configure_regions+0xcc>)
    1fc2:	1a5b      	subs	r3, r3, r1
    1fc4:	08db      	lsrs	r3, r3, #3
    1fc6:	f363 128f 	bfi	r2, r3, #6, #10
    1fca:	4629      	mov	r1, r5
    1fcc:	e7d7      	b.n	1f7e <mpu_configure_regions+0x4a>
		return REGION_32B;
    1fce:	2408      	movs	r4, #8
    1fd0:	e7eb      	b.n	1faa <mpu_configure_regions+0x76>
		return REGION_4G;
    1fd2:	243e      	movs	r4, #62	; 0x3e
    1fd4:	e7e9      	b.n	1faa <mpu_configure_regions+0x76>
	MPU->RBAR = (region_conf->base & MPU_RBAR_ADDR_Msk)
    1fd6:	f022 021f 	bic.w	r2, r2, #31
				| MPU_RBAR_VALID_Msk | index;
    1fda:	432a      	orrs	r2, r5
    1fdc:	f042 0210 	orr.w	r2, r2, #16
	MPU->RASR = region_conf->attr.rasr | MPU_RASR_ENABLE_Msk;
    1fe0:	f044 0401 	orr.w	r4, r4, #1
	MPU->RNR = index;
    1fe4:	60bd      	str	r5, [r7, #8]
	MPU->RBAR = (region_conf->base & MPU_RBAR_ADDR_Msk)
    1fe6:	60fa      	str	r2, [r7, #12]
	MPU->RASR = region_conf->attr.rasr | MPU_RASR_ENABLE_Msk;
    1fe8:	613c      	str	r4, [r7, #16]
		reg_index++;
    1fea:	1c6a      	adds	r2, r5, #1
	for (i = 0; i < regions_num; i++) {
    1fec:	3101      	adds	r1, #1
    1fee:	e7a5      	b.n	1f3c <mpu_configure_regions+0x8>
    1ff0:	e000ed90 	.word	0xe000ed90
    1ff4:	00005da0 	.word	0x00005da0
    1ff8:	00005db8 	.word	0x00005db8
    1ffc:	0000665d 	.word	0x0000665d
    2000:	00006680 	.word	0x00006680

00002004 <arm_core_mpu_enable>:
void arm_core_mpu_enable(void)
{
	/* Enable MPU and use the default memory map as a
	 * background region for privileged software access.
	 */
	MPU->CTRL = MPU_CTRL_ENABLE_Msk | MPU_CTRL_PRIVDEFENA_Msk;
    2004:	4b03      	ldr	r3, [pc, #12]	; (2014 <arm_core_mpu_enable+0x10>)
    2006:	2205      	movs	r2, #5
    2008:	605a      	str	r2, [r3, #4]
  __ASM volatile ("dsb 0xF":::"memory");
    200a:	f3bf 8f4f 	dsb	sy
  __ASM volatile ("isb 0xF":::"memory");
    200e:	f3bf 8f6f 	isb	sy

	/* Make sure that all the registers are set before proceeding */
	__DSB();
	__ISB();
}
    2012:	4770      	bx	lr
    2014:	e000ed90 	.word	0xe000ed90

00002018 <arm_core_mpu_disable>:
  \details Ensures the apparent order of the explicit memory operations before
           and after the instruction, without ensuring their completion.
 */
__STATIC_FORCEINLINE void __DMB(void)
{
  __ASM volatile ("dmb 0xF":::"memory");
    2018:	f3bf 8f5f 	dmb	sy
{
	/* Force any outstanding transfers to complete before disabling MPU */
	__DMB();

	/* Disable MPU */
	MPU->CTRL = 0;
    201c:	4b01      	ldr	r3, [pc, #4]	; (2024 <arm_core_mpu_disable+0xc>)
    201e:	2200      	movs	r2, #0
    2020:	605a      	str	r2, [r3, #4]
}
    2022:	4770      	bx	lr
    2024:	e000ed90 	.word	0xe000ed90

00002028 <arm_mpu_init>:
 */
static int arm_mpu_init(struct device *arg)
{
	u32_t r_index;

	if (mpu_config.num_regions > get_num_regions()) {
    2028:	4913      	ldr	r1, [pc, #76]	; (2078 <arm_mpu_init+0x50>)
    202a:	6808      	ldr	r0, [r1, #0]
    202c:	2808      	cmp	r0, #8
{
    202e:	b510      	push	{r4, lr}
	if (mpu_config.num_regions > get_num_regions()) {
    2030:	d81e      	bhi.n	2070 <arm_mpu_init+0x48>
		return -1;
	}

	LOG_DBG("total region count: %d", get_num_regions());

	arm_core_mpu_disable();
    2032:	f7ff fff1 	bl	2018 <arm_core_mpu_disable>
	MPU->RNR = index;
    2036:	4c11      	ldr	r4, [pc, #68]	; (207c <arm_mpu_init+0x54>)
    2038:	6849      	ldr	r1, [r1, #4]

	/* Architecture-specific configuration */
	mpu_init();

	/* Program fixed regions configured at SOC definition. */
	for (r_index = 0U; r_index < mpu_config.num_regions; r_index++) {
    203a:	2200      	movs	r2, #0
    203c:	4290      	cmp	r0, r2
    203e:	f101 010c 	add.w	r1, r1, #12
    2042:	d105      	bne.n	2050 <arm_mpu_init+0x28>
		region_init(r_index, &mpu_config.mpu_regions[r_index]);
	}

	/* Update the number of programmed MPU regions. */
	static_regions_num = mpu_config.num_regions;
    2044:	4b0e      	ldr	r3, [pc, #56]	; (2080 <arm_mpu_init+0x58>)
    2046:	7018      	strb	r0, [r3, #0]


	arm_core_mpu_enable();
    2048:	f7ff ffdc 	bl	2004 <arm_core_mpu_enable>
	__ASSERT(
		(MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos ==
		DT_NUM_MPU_REGIONS,
		"Invalid number of MPU regions\n");
#endif /* CORTEX_M0PLUS || CPU_CORTEX_M3 || CPU_CORTEX_M4 */
	return 0;
    204c:	2000      	movs	r0, #0
}
    204e:	bd10      	pop	{r4, pc}
    2050:	60a2      	str	r2, [r4, #8]
	MPU->RBAR = (region_conf->base & MPU_RBAR_ADDR_Msk)
    2052:	f851 3c0c 	ldr.w	r3, [r1, #-12]
    2056:	f023 031f 	bic.w	r3, r3, #31
				| MPU_RBAR_VALID_Msk | index;
    205a:	4313      	orrs	r3, r2
    205c:	f043 0310 	orr.w	r3, r3, #16
	MPU->RBAR = (region_conf->base & MPU_RBAR_ADDR_Msk)
    2060:	60e3      	str	r3, [r4, #12]
	MPU->RASR = region_conf->attr.rasr | MPU_RASR_ENABLE_Msk;
    2062:	f851 3c04 	ldr.w	r3, [r1, #-4]
    2066:	f043 0301 	orr.w	r3, r3, #1
    206a:	6123      	str	r3, [r4, #16]
	for (r_index = 0U; r_index < mpu_config.num_regions; r_index++) {
    206c:	3201      	adds	r2, #1
    206e:	e7e5      	b.n	203c <arm_mpu_init+0x14>
		return -1;
    2070:	f04f 30ff 	mov.w	r0, #4294967295
    2074:	e7eb      	b.n	204e <arm_mpu_init+0x26>
    2076:	bf00      	nop
    2078:	00005f04 	.word	0x00005f04
    207c:	e000ed90 	.word	0xe000ed90
    2080:	20000cca 	.word	0x20000cca

00002084 <arm_core_mpu_configure_static_mpu_regions>:
{
    2084:	b510      	push	{r4, lr}
static int mpu_configure_static_mpu_regions(const struct k_mem_partition
	*static_regions[], const u8_t regions_num,
	const u32_t background_area_base,
	const u32_t background_area_end)
{
	int mpu_reg_index = static_regions_num;
    2086:	4c03      	ldr	r4, [pc, #12]	; (2094 <arm_core_mpu_configure_static_mpu_regions+0x10>)
	 * programmed on top of SRAM region configuration.
	 */
	ARG_UNUSED(background_area_base);
	ARG_UNUSED(background_area_end);

	mpu_reg_index = mpu_configure_regions(static_regions,
    2088:	2301      	movs	r3, #1
    208a:	7822      	ldrb	r2, [r4, #0]
    208c:	f7ff ff52 	bl	1f34 <mpu_configure_regions>
		regions_num, mpu_reg_index, true);

	static_regions_num = mpu_reg_index;
    2090:	7020      	strb	r0, [r4, #0]
}
    2092:	bd10      	pop	{r4, pc}
    2094:	20000cca 	.word	0x20000cca

00002098 <arm_core_mpu_configure_dynamic_mpu_regions>:
{
    2098:	b508      	push	{r3, lr}

	/* In ARMv7-M architecture the dynamic regions are
	 * programmed on top of existing SRAM region configuration.
	 */

	mpu_reg_index = mpu_configure_regions(dynamic_regions,
    209a:	4a08      	ldr	r2, [pc, #32]	; (20bc <arm_core_mpu_configure_dynamic_mpu_regions+0x24>)
    209c:	2300      	movs	r3, #0
    209e:	7812      	ldrb	r2, [r2, #0]
    20a0:	f7ff ff48 	bl	1f34 <mpu_configure_regions>
		regions_num, mpu_reg_index, false);

	if (mpu_reg_index != -EINVAL) {
    20a4:	f110 0f16 	cmn.w	r0, #22
    20a8:	d003      	beq.n	20b2 <arm_core_mpu_configure_dynamic_mpu_regions+0x1a>
/** Clear and disable the given MPU region.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
{
  MPU->RNR = rnr;
    20aa:	4b05      	ldr	r3, [pc, #20]	; (20c0 <arm_core_mpu_configure_dynamic_mpu_regions+0x28>)
  MPU->RASR = 0U;
    20ac:	2200      	movs	r2, #0

		/* Disable the non-programmed MPU regions. */
		for (int i = mpu_reg_index; i < get_num_regions(); i++) {
    20ae:	2807      	cmp	r0, #7
    20b0:	dd00      	ble.n	20b4 <arm_core_mpu_configure_dynamic_mpu_regions+0x1c>
}
    20b2:	bd08      	pop	{r3, pc}
  MPU->RNR = rnr;
    20b4:	6098      	str	r0, [r3, #8]
  MPU->RASR = 0U;
    20b6:	611a      	str	r2, [r3, #16]
    20b8:	3001      	adds	r0, #1
    20ba:	e7f8      	b.n	20ae <arm_core_mpu_configure_dynamic_mpu_regions+0x16>
    20bc:	20000cca 	.word	0x20000cca
    20c0:	e000ed90 	.word	0xe000ed90

000020c4 <z_prf>:
	*sptr = p;
	return i;
}

int z_prf(int (*func)(), void *dest, const char *format, va_list vargs)
{
    20c4:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    20c8:	b0a3      	sub	sp, #140	; 0x8c
    20ca:	e9cd 0102 	strd	r0, r1, [sp, #8]
    20ce:	461e      	mov	r6, r3
	struct zero_padding zero;
	VALTYPE val;

#define PUTC(c)	do { if ((*func)(c, dest) == EOF) return EOF; } while (false)

	count = 0;
    20d0:	2300      	movs	r3, #0
    20d2:	9301      	str	r3, [sp, #4]

	while ((c = *format++)) {
    20d4:	4613      	mov	r3, r2
    20d6:	f813 0b01 	ldrb.w	r0, [r3], #1
    20da:	9308      	str	r3, [sp, #32]
    20dc:	b158      	cbz	r0, 20f6 <z_prf+0x32>
		if (c != '%') {
    20de:	2825      	cmp	r0, #37	; 0x25
    20e0:	f000 8085 	beq.w	21ee <z_prf+0x12a>
			PUTC(c);
    20e4:	9903      	ldr	r1, [sp, #12]
    20e6:	9b02      	ldr	r3, [sp, #8]
    20e8:	4798      	blx	r3
    20ea:	3001      	adds	r0, #1
    20ec:	f040 8416 	bne.w	291c <z_prf+0x858>
    20f0:	f04f 33ff 	mov.w	r3, #4294967295
    20f4:	9301      	str	r3, [sp, #4]
		}
	}
	return count;

#undef PUTC
}
    20f6:	9801      	ldr	r0, [sp, #4]
    20f8:	b023      	add	sp, #140	; 0x8c
    20fa:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
				switch (c) {
    20fe:	2c23      	cmp	r4, #35	; 0x23
    2100:	d06c      	beq.n	21dc <z_prf+0x118>
    2102:	d861      	bhi.n	21c8 <z_prf+0x104>
    2104:	2c00      	cmp	r4, #0
    2106:	d0f6      	beq.n	20f6 <z_prf+0x32>
					fspace = true;
    2108:	2c20      	cmp	r4, #32
    210a:	9b0e      	ldr	r3, [sp, #56]	; 0x38
    210c:	bf08      	it	eq
    210e:	2301      	moveq	r3, #1
    2110:	930e      	str	r3, [sp, #56]	; 0x38
					fminus = true;
    2112:	f8cd 8020 	str.w	r8, [sp, #32]
			while (strchr("-+ #0", (c = *format++)) != NULL) {
    2116:	f8dd 8020 	ldr.w	r8, [sp, #32]
    211a:	48b7      	ldr	r0, [pc, #732]	; (23f8 <z_prf+0x334>)
    211c:	f818 4b01 	ldrb.w	r4, [r8], #1
    2120:	4621      	mov	r1, r4
    2122:	f003 f9a9 	bl	5478 <strchr>
    2126:	2800      	cmp	r0, #0
    2128:	d1e9      	bne.n	20fe <z_prf+0x3a>
			if (c == '*') {
    212a:	2c2a      	cmp	r4, #42	; 0x2a
    212c:	d166      	bne.n	21fc <z_prf+0x138>
				width = va_arg(vargs, int);
    212e:	f856 3b04 	ldr.w	r3, [r6], #4
    2132:	9309      	str	r3, [sp, #36]	; 0x24
				if (width < 0) {
    2134:	2b00      	cmp	r3, #0
					width = -width;
    2136:	bfbf      	itttt	lt
    2138:	425b      	neglt	r3, r3
    213a:	9309      	strlt	r3, [sp, #36]	; 0x24
					fminus = true;
    213c:	2301      	movlt	r3, #1
    213e:	930f      	strlt	r3, [sp, #60]	; 0x3c
				c = *format++;
    2140:	9b08      	ldr	r3, [sp, #32]
    2142:	f898 4000 	ldrb.w	r4, [r8]
    2146:	f103 0802 	add.w	r8, r3, #2
			if (c == '.') {
    214a:	2c2e      	cmp	r4, #46	; 0x2e
    214c:	d17b      	bne.n	2246 <z_prf+0x182>
				if (c == '*') {
    214e:	f898 3000 	ldrb.w	r3, [r8]
    2152:	2b2a      	cmp	r3, #42	; 0x2a
    2154:	d174      	bne.n	2240 <z_prf+0x17c>
					precision = va_arg(vargs, int);
    2156:	f856 5b04 	ldr.w	r5, [r6], #4
				c = *format++;
    215a:	f108 0801 	add.w	r8, r8, #1
				c = *format++;
    215e:	f818 4b01 	ldrb.w	r4, [r8], #1
			if (strchr("hlz", c) != NULL) {
    2162:	48a6      	ldr	r0, [pc, #664]	; (23fc <z_prf+0x338>)
    2164:	4621      	mov	r1, r4
    2166:	4627      	mov	r7, r4
    2168:	f003 f986 	bl	5478 <strchr>
    216c:	2800      	cmp	r0, #0
    216e:	d06d      	beq.n	224c <z_prf+0x188>
				c = *format++;
    2170:	4643      	mov	r3, r8
				} else if (i == 'h' && c == 'h') {
    2172:	2f68      	cmp	r7, #104	; 0x68
				c = *format++;
    2174:	f813 4b01 	ldrb.w	r4, [r3], #1
    2178:	9308      	str	r3, [sp, #32]
				} else if (i == 'h' && c == 'h') {
    217a:	d107      	bne.n	218c <z_prf+0xc8>
    217c:	2c68      	cmp	r4, #104	; 0x68
    217e:	d105      	bne.n	218c <z_prf+0xc8>
					c = *format++;
    2180:	f108 0302 	add.w	r3, r8, #2
    2184:	f898 4001 	ldrb.w	r4, [r8, #1]
    2188:	9308      	str	r3, [sp, #32]
					i = 'H';
    218a:	2748      	movs	r7, #72	; 0x48
			switch (c) {
    218c:	2c67      	cmp	r4, #103	; 0x67
    218e:	d87b      	bhi.n	2288 <z_prf+0x1c4>
    2190:	2c65      	cmp	r4, #101	; 0x65
    2192:	f080 8135 	bcs.w	2400 <z_prf+0x33c>
    2196:	2c47      	cmp	r4, #71	; 0x47
    2198:	d85c      	bhi.n	2254 <z_prf+0x190>
    219a:	2c45      	cmp	r4, #69	; 0x45
    219c:	f080 8130 	bcs.w	2400 <z_prf+0x33c>
    21a0:	2c00      	cmp	r4, #0
    21a2:	d0a8      	beq.n	20f6 <z_prf+0x32>
    21a4:	2c25      	cmp	r4, #37	; 0x25
    21a6:	f000 83b5 	beq.w	2914 <z_prf+0x850>
				PUTC('%');
    21aa:	9903      	ldr	r1, [sp, #12]
    21ac:	9b02      	ldr	r3, [sp, #8]
    21ae:	2025      	movs	r0, #37	; 0x25
    21b0:	4798      	blx	r3
    21b2:	3001      	adds	r0, #1
    21b4:	d09c      	beq.n	20f0 <z_prf+0x2c>
				PUTC(c);
    21b6:	9903      	ldr	r1, [sp, #12]
    21b8:	9b02      	ldr	r3, [sp, #8]
    21ba:	4620      	mov	r0, r4
    21bc:	4798      	blx	r3
    21be:	3001      	adds	r0, #1
    21c0:	d096      	beq.n	20f0 <z_prf+0x2c>
				count += 2;
    21c2:	9b01      	ldr	r3, [sp, #4]
    21c4:	3302      	adds	r3, #2
    21c6:	e3ab      	b.n	2920 <z_prf+0x85c>
				switch (c) {
    21c8:	2c2d      	cmp	r4, #45	; 0x2d
    21ca:	d00a      	beq.n	21e2 <z_prf+0x11e>
    21cc:	2c30      	cmp	r4, #48	; 0x30
    21ce:	d00b      	beq.n	21e8 <z_prf+0x124>
					fplus = true;
    21d0:	2c2b      	cmp	r4, #43	; 0x2b
    21d2:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
    21d4:	bf08      	it	eq
    21d6:	2301      	moveq	r3, #1
    21d8:	930b      	str	r3, [sp, #44]	; 0x2c
    21da:	e79a      	b.n	2112 <z_prf+0x4e>
					falt = true;
    21dc:	f04f 0b01 	mov.w	fp, #1
    21e0:	e797      	b.n	2112 <z_prf+0x4e>
					fminus = true;
    21e2:	2301      	movs	r3, #1
    21e4:	930f      	str	r3, [sp, #60]	; 0x3c
    21e6:	e794      	b.n	2112 <z_prf+0x4e>
					fzero = true;
    21e8:	2301      	movs	r3, #1
    21ea:	930a      	str	r3, [sp, #40]	; 0x28
    21ec:	e791      	b.n	2112 <z_prf+0x4e>
			fminus = fplus = fspace = falt = fzero = false;
    21ee:	2300      	movs	r3, #0
    21f0:	930a      	str	r3, [sp, #40]	; 0x28
    21f2:	930e      	str	r3, [sp, #56]	; 0x38
    21f4:	930b      	str	r3, [sp, #44]	; 0x2c
    21f6:	930f      	str	r3, [sp, #60]	; 0x3c
    21f8:	469b      	mov	fp, r3
    21fa:	e78c      	b.n	2116 <z_prf+0x52>
			(((unsigned)c) <= (unsigned)'~'));
}

static inline int isdigit(int a)
{
	return (int)(((unsigned)(a)-(unsigned)'0') < 10U);
    21fc:	f1a4 0330 	sub.w	r3, r4, #48	; 0x30
			} else if (!isdigit(c)) {
    2200:	2b09      	cmp	r3, #9
				width = 0;
    2202:	9009      	str	r0, [sp, #36]	; 0x24
			} else if (!isdigit(c)) {
    2204:	d8a1      	bhi.n	214a <z_prf+0x86>
		i = 10 * i + *p++ - '0';
    2206:	220a      	movs	r2, #10
	while (isdigit(*p)) {
    2208:	f8dd 8020 	ldr.w	r8, [sp, #32]
    220c:	f818 4b01 	ldrb.w	r4, [r8], #1
    2210:	f1a4 0330 	sub.w	r3, r4, #48	; 0x30
    2214:	2b09      	cmp	r3, #9
    2216:	d898      	bhi.n	214a <z_prf+0x86>
		i = 10 * i + *p++ - '0';
    2218:	9b09      	ldr	r3, [sp, #36]	; 0x24
    221a:	fb02 4403 	mla	r4, r2, r3, r4
    221e:	f1a4 0330 	sub.w	r3, r4, #48	; 0x30
    2222:	e9cd 8308 	strd	r8, r3, [sp, #32]
    2226:	e7ef      	b.n	2208 <z_prf+0x144>
    2228:	fb01 3505 	mla	r5, r1, r5, r3
    222c:	3d30      	subs	r5, #48	; 0x30
    222e:	4690      	mov	r8, r2
	while (isdigit(*p)) {
    2230:	4642      	mov	r2, r8
    2232:	f812 3b01 	ldrb.w	r3, [r2], #1
    2236:	f1a3 0030 	sub.w	r0, r3, #48	; 0x30
    223a:	2809      	cmp	r0, #9
    223c:	d9f4      	bls.n	2228 <z_prf+0x164>
    223e:	e78e      	b.n	215e <z_prf+0x9a>
	int i = 0;
    2240:	2500      	movs	r5, #0
		i = 10 * i + *p++ - '0';
    2242:	210a      	movs	r1, #10
    2244:	e7f4      	b.n	2230 <z_prf+0x16c>
			precision = -1;
    2246:	f04f 35ff 	mov.w	r5, #4294967295
    224a:	e78a      	b.n	2162 <z_prf+0x9e>
    224c:	f8cd 8020 	str.w	r8, [sp, #32]
			i = 0;
    2250:	4607      	mov	r7, r0
    2252:	e79b      	b.n	218c <z_prf+0xc8>
			switch (c) {
    2254:	2c63      	cmp	r4, #99	; 0x63
    2256:	d059      	beq.n	230c <z_prf+0x248>
    2258:	d820      	bhi.n	229c <z_prf+0x1d8>
    225a:	2c58      	cmp	r4, #88	; 0x58
    225c:	d1a5      	bne.n	21aa <z_prf+0xe6>
				if (c == 'o') {
    225e:	2c6f      	cmp	r4, #111	; 0x6f
    2260:	f106 0904 	add.w	r9, r6, #4
    2264:	6831      	ldr	r1, [r6, #0]
    2266:	f040 8327 	bne.w	28b8 <z_prf+0x7f4>
	if (alt_form) {
    226a:	f1bb 0f00 	cmp.w	fp, #0
    226e:	f000 8316 	beq.w	289e <z_prf+0x7da>
		*buf++ = '0';
    2272:	2330      	movs	r3, #48	; 0x30
    2274:	f88d 306c 	strb.w	r3, [sp, #108]	; 0x6c
		if (!value) {
    2278:	2900      	cmp	r1, #0
    227a:	f040 831a 	bne.w	28b2 <z_prf+0x7ee>
			*buf++ = 0;
    227e:	f88d 106d 	strb.w	r1, [sp, #109]	; 0x6d
			prefix = 0;
    2282:	460f      	mov	r7, r1
			return 1;
    2284:	2601      	movs	r6, #1
    2286:	e025      	b.n	22d4 <z_prf+0x210>
			switch (c) {
    2288:	2c70      	cmp	r4, #112	; 0x70
    228a:	f000 82f4 	beq.w	2876 <z_prf+0x7b2>
    228e:	d827      	bhi.n	22e0 <z_prf+0x21c>
    2290:	2c6e      	cmp	r4, #110	; 0x6e
    2292:	f000 82dd 	beq.w	2850 <z_prf+0x78c>
    2296:	d8e2      	bhi.n	225e <z_prf+0x19a>
    2298:	2c69      	cmp	r4, #105	; 0x69
    229a:	d186      	bne.n	21aa <z_prf+0xe6>
				switch (i) {
    229c:	6837      	ldr	r7, [r6, #0]
	if (value < 0) {
    229e:	2f00      	cmp	r7, #0
    22a0:	f106 0904 	add.w	r9, r6, #4
    22a4:	f280 809a 	bge.w	23dc <z_prf+0x318>
		*buf++ = '-';
    22a8:	232d      	movs	r3, #45	; 0x2d
    22aa:	f88d 306c 	strb.w	r3, [sp, #108]	; 0x6c
		value = -value;
    22ae:	4279      	negs	r1, r7
		*buf++ = ' ';
    22b0:	f10d 066d 	add.w	r6, sp, #109	; 0x6d
	return _to_x(buf, value, 10);
    22b4:	4630      	mov	r0, r6
    22b6:	220a      	movs	r2, #10
    22b8:	f003 f944 	bl	5544 <_to_x>
				if (fplus || fspace || val < 0) {
    22bc:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
	return (buf + _to_udec(buf, value)) - start;
    22be:	4406      	add	r6, r0
    22c0:	a81b      	add	r0, sp, #108	; 0x6c
    22c2:	1a36      	subs	r6, r6, r0
				if (fplus || fspace || val < 0) {
    22c4:	2b00      	cmp	r3, #0
    22c6:	f040 832e 	bne.w	2926 <z_prf+0x862>
    22ca:	9b0e      	ldr	r3, [sp, #56]	; 0x38
    22cc:	2b00      	cmp	r3, #0
    22ce:	f040 832a 	bne.w	2926 <z_prf+0x862>
    22d2:	0fff      	lsrs	r7, r7, #31
			if (precision >= 0) {
    22d4:	2d00      	cmp	r5, #0
    22d6:	da21      	bge.n	231c <z_prf+0x258>
			zero.predot = zero.postdot = zero.trail = 0;
    22d8:	2500      	movs	r5, #0
    22da:	46ab      	mov	fp, r5
    22dc:	46a8      	mov	r8, r5
    22de:	e0e1      	b.n	24a4 <z_prf+0x3e0>
			switch (c) {
    22e0:	2c75      	cmp	r4, #117	; 0x75
    22e2:	d0bc      	beq.n	225e <z_prf+0x19a>
    22e4:	2c78      	cmp	r4, #120	; 0x78
    22e6:	d0ba      	beq.n	225e <z_prf+0x19a>
    22e8:	2c73      	cmp	r4, #115	; 0x73
    22ea:	f47f af5e 	bne.w	21aa <z_prf+0xe6>
				cptr = va_arg(vargs, char *);
    22ee:	46b1      	mov	r9, r6
					precision = INT_MAX;
    22f0:	2d00      	cmp	r5, #0
				cptr = va_arg(vargs, char *);
    22f2:	f859 3b04 	ldr.w	r3, [r9], #4
					precision = INT_MAX;
    22f6:	bfb8      	it	lt
    22f8:	f06f 4500 	mvnlt.w	r5, #2147483648	; 0x80000000
				for (clen = 0; clen < precision; clen++) {
    22fc:	2600      	movs	r6, #0
    22fe:	42b5      	cmp	r5, r6
    2300:	f040 82c8 	bne.w	2894 <z_prf+0x7d0>
    2304:	462e      	mov	r6, r5
    2306:	2500      	movs	r5, #0
    2308:	462f      	mov	r7, r5
    230a:	e008      	b.n	231e <z_prf+0x25a>
				buf[0] = va_arg(vargs, int);
    230c:	46b1      	mov	r9, r6
				break;
    230e:	2700      	movs	r7, #0
				buf[0] = va_arg(vargs, int);
    2310:	f859 3b04 	ldr.w	r3, [r9], #4
    2314:	f88d 306c 	strb.w	r3, [sp, #108]	; 0x6c
				clen = 1;
    2318:	2601      	movs	r6, #1
				break;
    231a:	463d      	mov	r5, r7
    231c:	ab1b      	add	r3, sp, #108	; 0x6c
				zero_head = precision - clen + prefix;
    231e:	19ea      	adds	r2, r5, r7
			zero.predot = zero.postdot = zero.trail = 0;
    2320:	2500      	movs	r5, #0
				zero_head = precision - clen + prefix;
    2322:	1b92      	subs	r2, r2, r6
			zero.predot = zero.postdot = zero.trail = 0;
    2324:	46ab      	mov	fp, r5
    2326:	46a8      	mov	r8, r5
			if (zero_head < 0) {
    2328:	ea22 72e2 	bic.w	r2, r2, r2, asr #31
			width -= clen + zero_head;
    232c:	1991      	adds	r1, r2, r6
    232e:	9106      	str	r1, [sp, #24]
    2330:	9909      	ldr	r1, [sp, #36]	; 0x24
    2332:	1990      	adds	r0, r2, r6
    2334:	1a0c      	subs	r4, r1, r0
			if (!fminus && width > 0) {
    2336:	990f      	ldr	r1, [sp, #60]	; 0x3c
    2338:	b911      	cbnz	r1, 2340 <z_prf+0x27c>
    233a:	2c00      	cmp	r4, #0
    233c:	f300 8310 	bgt.w	2960 <z_prf+0x89c>
			while (prefix-- > 0) {
    2340:	eb03 0a07 	add.w	sl, r3, r7
    2344:	4553      	cmp	r3, sl
    2346:	f040 830f 	bne.w	2968 <z_prf+0x8a4>
			while (zero_head-- > 0) {
    234a:	f112 32ff 	adds.w	r2, r2, #4294967295
    234e:	f080 8319 	bcs.w	2984 <z_prf+0x8c0>
			clen -= prefix;
    2352:	1bf6      	subs	r6, r6, r7
			if (zero.predot) {
    2354:	f1b8 0f00 	cmp.w	r8, #0
    2358:	d011      	beq.n	237e <z_prf+0x2ba>
				c = *cptr;
    235a:	f89a 0000 	ldrb.w	r0, [sl]
				while (isdigit(c)) {
    235e:	eb0a 0706 	add.w	r7, sl, r6
    2362:	f1a0 0330 	sub.w	r3, r0, #48	; 0x30
    2366:	2b09      	cmp	r3, #9
    2368:	eba7 060a 	sub.w	r6, r7, sl
    236c:	f240 8315 	bls.w	299a <z_prf+0x8d6>
    2370:	4647      	mov	r7, r8
				while (zero.predot-- > 0) {
    2372:	f117 37ff 	adds.w	r7, r7, #4294967295
    2376:	f080 8319 	bcs.w	29ac <z_prf+0x8e8>
				clen -= zero.predot;
    237a:	eba6 0608 	sub.w	r6, r6, r8
			if (zero.postdot) {
    237e:	f1bb 0f00 	cmp.w	fp, #0
    2382:	d015      	beq.n	23b0 <z_prf+0x2ec>
    2384:	eb0a 0706 	add.w	r7, sl, r6
					c = *cptr++;
    2388:	f81a 8b01 	ldrb.w	r8, [sl], #1
					PUTC(c);
    238c:	9903      	ldr	r1, [sp, #12]
    238e:	9b02      	ldr	r3, [sp, #8]
    2390:	4640      	mov	r0, r8
    2392:	4798      	blx	r3
    2394:	3001      	adds	r0, #1
    2396:	f43f aeab 	beq.w	20f0 <z_prf+0x2c>
				} while (c != '.');
    239a:	f1b8 0f2e 	cmp.w	r8, #46	; 0x2e
    239e:	eba7 060a 	sub.w	r6, r7, sl
    23a2:	d1f1      	bne.n	2388 <z_prf+0x2c4>
				while (zero.postdot-- > 0) {
    23a4:	465f      	mov	r7, fp
    23a6:	2f00      	cmp	r7, #0
    23a8:	f300 8309 	bgt.w	29be <z_prf+0x8fa>
				clen -= zero.postdot;
    23ac:	eba6 060b 	sub.w	r6, r6, fp
			if (zero.trail) {
    23b0:	b195      	cbz	r5, 23d8 <z_prf+0x314>
				c = *cptr;
    23b2:	f89a 0000 	ldrb.w	r0, [sl]
				while (isdigit(c) || c == '.') {
    23b6:	eb0a 0706 	add.w	r7, sl, r6
    23ba:	f1a0 0330 	sub.w	r3, r0, #48	; 0x30
    23be:	2b09      	cmp	r3, #9
    23c0:	eba7 060a 	sub.w	r6, r7, sl
    23c4:	f240 8306 	bls.w	29d4 <z_prf+0x910>
    23c8:	282e      	cmp	r0, #46	; 0x2e
    23ca:	f000 8303 	beq.w	29d4 <z_prf+0x910>
				while (zero.trail-- > 0) {
    23ce:	462f      	mov	r7, r5
    23d0:	2f00      	cmp	r7, #0
    23d2:	f300 8308 	bgt.w	29e6 <z_prf+0x922>
				clen -= zero.trail;
    23d6:	1b76      	subs	r6, r6, r5
    23d8:	4456      	add	r6, sl
    23da:	e317      	b.n	2a0c <z_prf+0x948>
	} else if (fplus) {
    23dc:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
    23de:	b123      	cbz	r3, 23ea <z_prf+0x326>
		*buf++ = '+';
    23e0:	232b      	movs	r3, #43	; 0x2b
		*buf++ = ' ';
    23e2:	f88d 306c 	strb.w	r3, [sp, #108]	; 0x6c
    23e6:	4639      	mov	r1, r7
    23e8:	e762      	b.n	22b0 <z_prf+0x1ec>
	} else if (fspace) {
    23ea:	9b0e      	ldr	r3, [sp, #56]	; 0x38
    23ec:	b10b      	cbz	r3, 23f2 <z_prf+0x32e>
		*buf++ = ' ';
    23ee:	2320      	movs	r3, #32
    23f0:	e7f7      	b.n	23e2 <z_prf+0x31e>
	} else if (fspace) {
    23f2:	4639      	mov	r1, r7
    23f4:	ae1b      	add	r6, sp, #108	; 0x6c
    23f6:	e75d      	b.n	22b4 <z_prf+0x1f0>
    23f8:	000066a6 	.word	0x000066a6
    23fc:	000066ac 	.word	0x000066ac
				u.d = va_arg(vargs, double);
    2400:	f106 0907 	add.w	r9, r6, #7
    2404:	f029 0907 	bic.w	r9, r9, #7
    2408:	e8f9 2302 	ldrd	r2, r3, [r9], #8
	fract = (double_temp << 11) & ~HIGHBIT64;
    240c:	02d8      	lsls	r0, r3, #11
    240e:	ea40 5052 	orr.w	r0, r0, r2, lsr #21
    2412:	02d6      	lsls	r6, r2, #11
    2414:	f020 4000 	bic.w	r0, r0, #2147483648	; 0x80000000
    2418:	9604      	str	r6, [sp, #16]
    241a:	9005      	str	r0, [sp, #20]
    241c:	e9dd 6704 	ldrd	r6, r7, [sp, #16]
	if (sign) {
    2420:	2a00      	cmp	r2, #0
	exp = double_temp >> 52 & 0x7ff;
    2422:	f3c3 510a 	ubfx	r1, r3, #20, #11
	if (sign) {
    2426:	f173 0300 	sbcs.w	r3, r3, #0
	fract = (double_temp << 11) & ~HIGHBIT64;
    242a:	e9cd 6716 	strd	r6, r7, [sp, #88]	; 0x58
	if (sign) {
    242e:	da41      	bge.n	24b4 <z_prf+0x3f0>
		*buf++ = '-';
    2430:	232d      	movs	r3, #45	; 0x2d
		*buf++ = ' ';
    2432:	f88d 306c 	strb.w	r3, [sp, #108]	; 0x6c
    2436:	f10d 076d 	add.w	r7, sp, #109	; 0x6d
	if (exp == 0x7ff) {
    243a:	f240 73ff 	movw	r3, #2047	; 0x7ff
    243e:	4299      	cmp	r1, r3
    2440:	d153      	bne.n	24ea <z_prf+0x426>
		if (!fract) {
    2442:	e9dd 1204 	ldrd	r1, r2, [sp, #16]
    2446:	430a      	orrs	r2, r1
    2448:	f1a4 0441 	sub.w	r4, r4, #65	; 0x41
    244c:	f107 0303 	add.w	r3, r7, #3
    2450:	d140      	bne.n	24d4 <z_prf+0x410>
			if (isupper(c)) {
    2452:	2c19      	cmp	r4, #25
    2454:	d838      	bhi.n	24c8 <z_prf+0x404>
				*buf++ = 'I';
    2456:	2249      	movs	r2, #73	; 0x49
    2458:	703a      	strb	r2, [r7, #0]
				*buf++ = 'N';
    245a:	224e      	movs	r2, #78	; 0x4e
    245c:	707a      	strb	r2, [r7, #1]
				*buf++ = 'F';
    245e:	2246      	movs	r2, #70	; 0x46
		*buf = 0;
    2460:	2500      	movs	r5, #0
		return buf - start;
    2462:	ae1b      	add	r6, sp, #108	; 0x6c
				*buf++ = 'n';
    2464:	70ba      	strb	r2, [r7, #2]
		*buf = 0;
    2466:	70fd      	strb	r5, [r7, #3]
		return buf - start;
    2468:	1b9b      	subs	r3, r3, r6
			zero.predot = zero.postdot = zero.trail = 0;
    246a:	46ab      	mov	fp, r5
    246c:	46a8      	mov	r8, r5
				if (fplus || fspace || (buf[0] == '-')) {
    246e:	9a0b      	ldr	r2, [sp, #44]	; 0x2c
    2470:	2a00      	cmp	r2, #0
    2472:	f040 81eb 	bne.w	284c <z_prf+0x788>
    2476:	9a0e      	ldr	r2, [sp, #56]	; 0x38
    2478:	2a00      	cmp	r2, #0
    247a:	f040 81e7 	bne.w	284c <z_prf+0x788>
    247e:	f89d 706c 	ldrb.w	r7, [sp, #108]	; 0x6c
    2482:	f1a7 022d 	sub.w	r2, r7, #45	; 0x2d
    2486:	4257      	negs	r7, r2
    2488:	4157      	adcs	r7, r2
				clen += zero.predot + zero.postdot + zero.trail;
    248a:	eb05 0608 	add.w	r6, r5, r8
    248e:	4433      	add	r3, r6
    2490:	eb03 060b 	add.w	r6, r3, fp
				if (!isdigit(buf[prefix])) {
    2494:	ab22      	add	r3, sp, #136	; 0x88
    2496:	443b      	add	r3, r7
    2498:	f813 3c1c 	ldrb.w	r3, [r3, #-28]
    249c:	3b30      	subs	r3, #48	; 0x30
    249e:	2b09      	cmp	r3, #9
    24a0:	f200 8245 	bhi.w	292e <z_prf+0x86a>
			} else if (fzero) {
    24a4:	9b0a      	ldr	r3, [sp, #40]	; 0x28
    24a6:	2b00      	cmp	r3, #0
    24a8:	f000 8244 	beq.w	2934 <z_prf+0x870>
    24ac:	9b09      	ldr	r3, [sp, #36]	; 0x24
    24ae:	1b9a      	subs	r2, r3, r6
    24b0:	ab1b      	add	r3, sp, #108	; 0x6c
    24b2:	e739      	b.n	2328 <z_prf+0x264>
	} else if (fplus) {
    24b4:	9b0b      	ldr	r3, [sp, #44]	; 0x2c
    24b6:	b10b      	cbz	r3, 24bc <z_prf+0x3f8>
		*buf++ = '+';
    24b8:	232b      	movs	r3, #43	; 0x2b
    24ba:	e7ba      	b.n	2432 <z_prf+0x36e>
	} else if (fspace) {
    24bc:	9b0e      	ldr	r3, [sp, #56]	; 0x38
    24be:	b10b      	cbz	r3, 24c4 <z_prf+0x400>
		*buf++ = ' ';
    24c0:	2320      	movs	r3, #32
    24c2:	e7b6      	b.n	2432 <z_prf+0x36e>
	} else if (fspace) {
    24c4:	af1b      	add	r7, sp, #108	; 0x6c
    24c6:	e7b8      	b.n	243a <z_prf+0x376>
				*buf++ = 'i';
    24c8:	2269      	movs	r2, #105	; 0x69
    24ca:	703a      	strb	r2, [r7, #0]
				*buf++ = 'n';
    24cc:	226e      	movs	r2, #110	; 0x6e
    24ce:	707a      	strb	r2, [r7, #1]
				*buf++ = 'f';
    24d0:	2266      	movs	r2, #102	; 0x66
    24d2:	e7c5      	b.n	2460 <z_prf+0x39c>
			if (isupper(c)) {
    24d4:	2c19      	cmp	r4, #25
				*buf++ = 'N';
    24d6:	bf99      	ittee	ls
    24d8:	224e      	movls	r2, #78	; 0x4e
				*buf++ = 'A';
    24da:	2141      	movls	r1, #65	; 0x41
				*buf++ = 'n';
    24dc:	226e      	movhi	r2, #110	; 0x6e
				*buf++ = 'a';
    24de:	2161      	movhi	r1, #97	; 0x61
				*buf++ = 'N';
    24e0:	bf94      	ite	ls
    24e2:	703a      	strbls	r2, [r7, #0]
				*buf++ = 'n';
    24e4:	703a      	strbhi	r2, [r7, #0]
				*buf++ = 'a';
    24e6:	7079      	strb	r1, [r7, #1]
    24e8:	e7ba      	b.n	2460 <z_prf+0x39c>
	if ((exp | fract) != 0) {
    24ea:	9b04      	ldr	r3, [sp, #16]
    24ec:	9805      	ldr	r0, [sp, #20]
    24ee:	430b      	orrs	r3, r1
    24f0:	9310      	str	r3, [sp, #64]	; 0x40
    24f2:	17cb      	asrs	r3, r1, #31
    24f4:	4303      	orrs	r3, r0
    24f6:	9311      	str	r3, [sp, #68]	; 0x44
    24f8:	e9dd 2310 	ldrd	r2, r3, [sp, #64]	; 0x40
		c = 'f';
    24fc:	2c46      	cmp	r4, #70	; 0x46
    24fe:	bf08      	it	eq
    2500:	2466      	moveq	r4, #102	; 0x66
	if ((exp | fract) != 0) {
    2502:	4313      	orrs	r3, r2
    2504:	f000 8111 	beq.w	272a <z_prf+0x666>
		if (exp == 0) {
    2508:	2900      	cmp	r1, #0
    250a:	f000 809b 	beq.w	2644 <z_prf+0x580>
		fract |= HIGHBIT64;
    250e:	9b17      	ldr	r3, [sp, #92]	; 0x5c
    2510:	f043 4300 	orr.w	r3, r3, #2147483648	; 0x80000000
		exp -= (1023 - 1);	/* +1 since .1 vs 1. */
    2514:	f2a1 38fe 	subw	r8, r1, #1022	; 0x3fe
		fract |= HIGHBIT64;
    2518:	9317      	str	r3, [sp, #92]	; 0x5c
    251a:	2600      	movs	r6, #0
	while (exp <= -3) {
    251c:	f118 0f02 	cmn.w	r8, #2
    2520:	f2c0 80a4 	blt.w	266c <z_prf+0x5a8>
	while (exp > 0) {
    2524:	f1b8 0f00 	cmp.w	r8, #0
    2528:	f300 80dd 	bgt.w	26e6 <z_prf+0x622>
		_rlrshift(&fract);
    252c:	a816      	add	r0, sp, #88	; 0x58
		exp++;
    252e:	f108 0801 	add.w	r8, r8, #1
		_rlrshift(&fract);
    2532:	f003 f829 	bl	5588 <_rlrshift>
	while (exp < (0 + 4)) {
    2536:	f1b8 0f04 	cmp.w	r8, #4
    253a:	d1f7      	bne.n	252c <z_prf+0x468>
		precision = 6;		/* Default precision if none given */
    253c:	2d00      	cmp	r5, #0
	if ((c == 'g') || (c == 'G')) {
    253e:	f004 03df 	and.w	r3, r4, #223	; 0xdf
		precision = 6;		/* Default precision if none given */
    2542:	bfb8      	it	lt
    2544:	2506      	movlt	r5, #6
	if ((c == 'g') || (c == 'G')) {
    2546:	2b47      	cmp	r3, #71	; 0x47
    2548:	f040 80f8 	bne.w	273c <z_prf+0x678>
		if (decexp < (-4 + 1) || decexp > precision) {
    254c:	1cf1      	adds	r1, r6, #3
    254e:	db02      	blt.n	2556 <z_prf+0x492>
    2550:	42b5      	cmp	r5, r6
    2552:	f280 80ed 	bge.w	2730 <z_prf+0x66c>
			c += 'e' - 'g';
    2556:	3c02      	subs	r4, #2
    2558:	b2e4      	uxtb	r4, r4
			if (precision > 0) {
    255a:	2d00      	cmp	r5, #0
    255c:	f000 80f4 	beq.w	2748 <z_prf+0x684>
				precision--;
    2560:	3d01      	subs	r5, #1
		if (!falt && (precision > 0)) {
    2562:	f1bb 0f00 	cmp.w	fp, #0
    2566:	f040 80ef 	bne.w	2748 <z_prf+0x684>
    256a:	2d00      	cmp	r5, #0
    256c:	bfd4      	ite	le
    256e:	f04f 0a00 	movle.w	sl, #0
    2572:	f04f 0a01 	movgt.w	sl, #1
	if (c == 'f') {
    2576:	2c66      	cmp	r4, #102	; 0x66
    2578:	f040 80e8 	bne.w	274c <z_prf+0x688>
		if (exp < 0) {
    257c:	eb15 0806 	adds.w	r8, r5, r6
    2580:	f140 80ec 	bpl.w	275c <z_prf+0x698>
	digit_count = 16;
    2584:	2310      	movs	r3, #16
    2586:	9315      	str	r3, [sp, #84]	; 0x54
    2588:	2466      	movs	r4, #102	; 0x66
			exp = 0;
    258a:	f04f 0800 	mov.w	r8, #0
	ltemp = 0x0800000000000000;
    258e:	2200      	movs	r2, #0
    2590:	f04f 6300 	mov.w	r3, #134217728	; 0x8000000
    2594:	e9cd 2318 	strd	r2, r3, [sp, #96]	; 0x60
	while (exp--) {
    2598:	f118 38ff 	adds.w	r8, r8, #4294967295
    259c:	f080 80e0 	bcs.w	2760 <z_prf+0x69c>
	fract += ltemp;
    25a0:	9b16      	ldr	r3, [sp, #88]	; 0x58
    25a2:	9a18      	ldr	r2, [sp, #96]	; 0x60
    25a4:	9919      	ldr	r1, [sp, #100]	; 0x64
    25a6:	189b      	adds	r3, r3, r2
    25a8:	9a17      	ldr	r2, [sp, #92]	; 0x5c
    25aa:	eb41 0202 	adc.w	r2, r1, r2
    25ae:	e9cd 3216 	strd	r3, r2, [sp, #88]	; 0x58
	if ((fract >> 32) & 0xF0000000) {
    25b2:	f002 4370 	and.w	r3, r2, #4026531840	; 0xf0000000
    25b6:	9312      	str	r3, [sp, #72]	; 0x48
    25b8:	2300      	movs	r3, #0
    25ba:	9313      	str	r3, [sp, #76]	; 0x4c
    25bc:	e9dd 2312 	ldrd	r2, r3, [sp, #72]	; 0x48
    25c0:	4313      	orrs	r3, r2
    25c2:	d006      	beq.n	25d2 <z_prf+0x50e>
		_ldiv5(&fract);
    25c4:	a816      	add	r0, sp, #88	; 0x58
    25c6:	f002 fff1 	bl	55ac <_ldiv5>
		_rlrshift(&fract);
    25ca:	a816      	add	r0, sp, #88	; 0x58
    25cc:	f002 ffdc 	bl	5588 <_rlrshift>
		decexp++;
    25d0:	3601      	adds	r6, #1
	if (c == 'f') {
    25d2:	2c66      	cmp	r4, #102	; 0x66
    25d4:	f040 80e1 	bne.w	279a <z_prf+0x6d6>
		if (decexp > 0) {
    25d8:	2e00      	cmp	r6, #0
    25da:	f340 80c8 	ble.w	276e <z_prf+0x6aa>
			while (decexp > 0 && digit_count > 0) {
    25de:	9b15      	ldr	r3, [sp, #84]	; 0x54
    25e0:	2b00      	cmp	r3, #0
    25e2:	dd07      	ble.n	25f4 <z_prf+0x530>
				*buf++ = _get_digit(&fract, &digit_count);
    25e4:	a915      	add	r1, sp, #84	; 0x54
    25e6:	a816      	add	r0, sp, #88	; 0x58
    25e8:	f003 f80c 	bl	5604 <_get_digit>
			while (decexp > 0 && digit_count > 0) {
    25ec:	3e01      	subs	r6, #1
				*buf++ = _get_digit(&fract, &digit_count);
    25ee:	f807 0b01 	strb.w	r0, [r7], #1
			while (decexp > 0 && digit_count > 0) {
    25f2:	d1f4      	bne.n	25de <z_prf+0x51a>
			zp->predot = decexp;
    25f4:	46b0      	mov	r8, r6
    25f6:	463b      	mov	r3, r7
			decexp = 0;
    25f8:	2600      	movs	r6, #0
		if (falt || (precision > 0)) {
    25fa:	f1bb 0f00 	cmp.w	fp, #0
    25fe:	d101      	bne.n	2604 <z_prf+0x540>
    2600:	2d00      	cmp	r5, #0
    2602:	dd15      	ble.n	2630 <z_prf+0x56c>
			*buf++ = '.';
    2604:	222e      	movs	r2, #46	; 0x2e
    2606:	f803 2b01 	strb.w	r2, [r3], #1
		if (decexp < 0 && precision > 0) {
    260a:	2e00      	cmp	r6, #0
    260c:	f000 80c0 	beq.w	2790 <z_prf+0x6cc>
    2610:	2d00      	cmp	r5, #0
    2612:	f340 80bf 	ble.w	2794 <z_prf+0x6d0>
			zp->postdot = -decexp;
    2616:	f1c6 0b00 	rsb	fp, r6, #0
    261a:	45ab      	cmp	fp, r5
    261c:	bfa8      	it	ge
    261e:	46ab      	movge	fp, r5
			precision -= zp->postdot;
    2620:	eba5 050b 	sub.w	r5, r5, fp
		while (precision > 0 && digit_count > 0) {
    2624:	2d00      	cmp	r5, #0
    2626:	dd03      	ble.n	2630 <z_prf+0x56c>
    2628:	9a15      	ldr	r2, [sp, #84]	; 0x54
    262a:	2a00      	cmp	r2, #0
    262c:	f300 80a6 	bgt.w	277c <z_prf+0x6b8>
	if (prune_zero) {
    2630:	f1ba 0f00 	cmp.w	sl, #0
    2634:	f040 80c6 	bne.w	27c4 <z_prf+0x700>
	*buf = 0;
    2638:	2200      	movs	r2, #0
	return buf - start;
    263a:	ae1b      	add	r6, sp, #108	; 0x6c
	*buf = 0;
    263c:	701a      	strb	r2, [r3, #0]
	return buf - start;
    263e:	1b9b      	subs	r3, r3, r6
    2640:	e715      	b.n	246e <z_prf+0x3aa>
				exp--;
    2642:	3901      	subs	r1, #1
			while (((fract <<= 1) & HIGHBIT64) == 0) {
    2644:	9b04      	ldr	r3, [sp, #16]
    2646:	18db      	adds	r3, r3, r3
    2648:	9304      	str	r3, [sp, #16]
    264a:	9b05      	ldr	r3, [sp, #20]
    264c:	415b      	adcs	r3, r3
    264e:	9305      	str	r3, [sp, #20]
    2650:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
    2654:	2a00      	cmp	r2, #0
    2656:	f173 0300 	sbcs.w	r3, r3, #0
    265a:	daf2      	bge.n	2642 <z_prf+0x57e>
    265c:	e9dd 2304 	ldrd	r2, r3, [sp, #16]
    2660:	e9cd 2316 	strd	r2, r3, [sp, #88]	; 0x58
    2664:	e753      	b.n	250e <z_prf+0x44a>
			_rlrshift(&fract);
    2666:	a816      	add	r0, sp, #88	; 0x58
    2668:	f002 ff8e 	bl	5588 <_rlrshift>
		while ((fract >> 32) >= (MAXFP1 / 5)) {
    266c:	e9dd ec16 	ldrd	lr, ip, [sp, #88]	; 0x58
    2670:	2300      	movs	r3, #0
    2672:	f8cd c030 	str.w	ip, [sp, #48]	; 0x30
    2676:	930d      	str	r3, [sp, #52]	; 0x34
    2678:	e9dd 230c 	ldrd	r2, r3, [sp, #48]	; 0x30
    267c:	48b9      	ldr	r0, [pc, #740]	; (2964 <z_prf+0x8a0>)
    267e:	2100      	movs	r1, #0
    2680:	4299      	cmp	r1, r3
    2682:	bf08      	it	eq
    2684:	4290      	cmpeq	r0, r2
    2686:	f108 0801 	add.w	r8, r8, #1
    268a:	d3ec      	bcc.n	2666 <z_prf+0x5a2>
		fract *= 5U;
    268c:	2005      	movs	r0, #5
    268e:	fbae 2300 	umull	r2, r3, lr, r0
    2692:	e9cd 2306 	strd	r2, r3, [sp, #24]
    2696:	9b07      	ldr	r3, [sp, #28]
    2698:	fb00 330c 	mla	r3, r0, ip, r3
    269c:	9307      	str	r3, [sp, #28]
    269e:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
    26a2:	e9cd 2316 	strd	r2, r3, [sp, #88]	; 0x58
		decexp--;
    26a6:	3e01      	subs	r6, #1
    26a8:	f04f 0c00 	mov.w	ip, #0
		while ((fract >> 32) <= (MAXFP1 / 2)) {
    26ac:	9807      	ldr	r0, [sp, #28]
    26ae:	2100      	movs	r1, #0
    26b0:	2300      	movs	r3, #0
    26b2:	f06f 4200 	mvn.w	r2, #2147483648	; 0x80000000
    26b6:	428b      	cmp	r3, r1
    26b8:	bf08      	it	eq
    26ba:	4282      	cmpeq	r2, r0
    26bc:	d208      	bcs.n	26d0 <z_prf+0x60c>
    26be:	f1bc 0f00 	cmp.w	ip, #0
    26c2:	f43f af2b 	beq.w	251c <z_prf+0x458>
    26c6:	e9dd 2306 	ldrd	r2, r3, [sp, #24]
    26ca:	e9cd 2316 	strd	r2, r3, [sp, #88]	; 0x58
    26ce:	e725      	b.n	251c <z_prf+0x458>
			fract <<= 1;
    26d0:	9b06      	ldr	r3, [sp, #24]
    26d2:	18db      	adds	r3, r3, r3
    26d4:	9306      	str	r3, [sp, #24]
    26d6:	9b07      	ldr	r3, [sp, #28]
    26d8:	415b      	adcs	r3, r3
    26da:	9307      	str	r3, [sp, #28]
			exp--;
    26dc:	f108 38ff 	add.w	r8, r8, #4294967295
    26e0:	f04f 0c01 	mov.w	ip, #1
    26e4:	e7e2      	b.n	26ac <z_prf+0x5e8>
		_ldiv5(&fract);
    26e6:	a816      	add	r0, sp, #88	; 0x58
    26e8:	f002 ff60 	bl	55ac <_ldiv5>
		exp--;
    26ec:	e9dd ae16 	ldrd	sl, lr, [sp, #88]	; 0x58
    26f0:	f108 38ff 	add.w	r8, r8, #4294967295
		decexp++;
    26f4:	3601      	adds	r6, #1
    26f6:	f04f 0c00 	mov.w	ip, #0
		while ((fract >> 32) <= (MAXFP1 / 2)) {
    26fa:	2300      	movs	r3, #0
    26fc:	2100      	movs	r1, #0
    26fe:	f06f 4000 	mvn.w	r0, #2147483648	; 0x80000000
    2702:	4299      	cmp	r1, r3
    2704:	bf08      	it	eq
    2706:	4570      	cmpeq	r0, lr
    2708:	d206      	bcs.n	2718 <z_prf+0x654>
    270a:	f1bc 0f00 	cmp.w	ip, #0
    270e:	f43f af09 	beq.w	2524 <z_prf+0x460>
    2712:	e9cd ae16 	strd	sl, lr, [sp, #88]	; 0x58
    2716:	e705      	b.n	2524 <z_prf+0x460>
			fract <<= 1;
    2718:	eb1a 0a0a 	adds.w	sl, sl, sl
    271c:	eb4e 0e0e 	adc.w	lr, lr, lr
			exp--;
    2720:	f108 38ff 	add.w	r8, r8, #4294967295
    2724:	f04f 0c01 	mov.w	ip, #1
    2728:	e7e7      	b.n	26fa <z_prf+0x636>
	if ((exp | fract) != 0) {
    272a:	2600      	movs	r6, #0
    272c:	46b0      	mov	r8, r6
    272e:	e6fd      	b.n	252c <z_prf+0x468>
			precision -= decexp;
    2730:	1bad      	subs	r5, r5, r6
		if (!falt && (precision > 0)) {
    2732:	f1bb 0f00 	cmp.w	fp, #0
    2736:	d104      	bne.n	2742 <z_prf+0x67e>
			c = 'f';
    2738:	2466      	movs	r4, #102	; 0x66
    273a:	e716      	b.n	256a <z_prf+0x4a6>
	prune_zero = false;		/* Assume trailing 0's allowed     */
    273c:	f04f 0a00 	mov.w	sl, #0
    2740:	e719      	b.n	2576 <z_prf+0x4b2>
    2742:	f04f 0a00 	mov.w	sl, #0
    2746:	e719      	b.n	257c <z_prf+0x4b8>
    2748:	f04f 0a00 	mov.w	sl, #0
		exp = precision + 1;
    274c:	f105 0801 	add.w	r8, r5, #1
	digit_count = 16;
    2750:	2310      	movs	r3, #16
    2752:	4598      	cmp	r8, r3
    2754:	9315      	str	r3, [sp, #84]	; 0x54
	if (exp > 16) {
    2756:	bfa8      	it	ge
    2758:	4698      	movge	r8, r3
    275a:	e718      	b.n	258e <z_prf+0x4ca>
		if (exp < 0) {
    275c:	2466      	movs	r4, #102	; 0x66
    275e:	e7f7      	b.n	2750 <z_prf+0x68c>
		_ldiv5(&ltemp);
    2760:	a818      	add	r0, sp, #96	; 0x60
    2762:	f002 ff23 	bl	55ac <_ldiv5>
		_rlrshift(&ltemp);
    2766:	a818      	add	r0, sp, #96	; 0x60
    2768:	f002 ff0e 	bl	5588 <_rlrshift>
    276c:	e714      	b.n	2598 <z_prf+0x4d4>
			*buf++ = '0';
    276e:	463b      	mov	r3, r7
    2770:	2230      	movs	r2, #48	; 0x30
    2772:	f803 2b01 	strb.w	r2, [r3], #1
			zero.predot = zero.postdot = zero.trail = 0;
    2776:	f04f 0800 	mov.w	r8, #0
    277a:	e73e      	b.n	25fa <z_prf+0x536>
			*buf++ = _get_digit(&fract, &digit_count);
    277c:	a915      	add	r1, sp, #84	; 0x54
    277e:	a816      	add	r0, sp, #88	; 0x58
    2780:	9306      	str	r3, [sp, #24]
    2782:	f002 ff3f 	bl	5604 <_get_digit>
    2786:	9b06      	ldr	r3, [sp, #24]
			precision--;
    2788:	3d01      	subs	r5, #1
			*buf++ = _get_digit(&fract, &digit_count);
    278a:	f803 0b01 	strb.w	r0, [r3], #1
			precision--;
    278e:	e749      	b.n	2624 <z_prf+0x560>
			zero.predot = zero.postdot = zero.trail = 0;
    2790:	46b3      	mov	fp, r6
    2792:	e747      	b.n	2624 <z_prf+0x560>
    2794:	f04f 0b00 	mov.w	fp, #0
    2798:	e74a      	b.n	2630 <z_prf+0x56c>
		*buf = _get_digit(&fract, &digit_count);
    279a:	a915      	add	r1, sp, #84	; 0x54
    279c:	a816      	add	r0, sp, #88	; 0x58
    279e:	f002 ff31 	bl	5604 <_get_digit>
		if (*buf++ != '0') {
    27a2:	2830      	cmp	r0, #48	; 0x30
		*buf = _get_digit(&fract, &digit_count);
    27a4:	7038      	strb	r0, [r7, #0]
			decexp--;
    27a6:	bf18      	it	ne
    27a8:	f106 36ff 	addne.w	r6, r6, #4294967295
		if (falt || (precision > 0)) {
    27ac:	f1bb 0f00 	cmp.w	fp, #0
    27b0:	d137      	bne.n	2822 <z_prf+0x75e>
    27b2:	2d00      	cmp	r5, #0
    27b4:	dc35      	bgt.n	2822 <z_prf+0x75e>
		if (*buf++ != '0') {
    27b6:	1c7b      	adds	r3, r7, #1
	if (prune_zero) {
    27b8:	f1ba 0f00 	cmp.w	sl, #0
    27bc:	d043      	beq.n	2846 <z_prf+0x782>
			zero.predot = zero.postdot = zero.trail = 0;
    27be:	f04f 0b00 	mov.w	fp, #0
    27c2:	46d8      	mov	r8, fp
		while (*--buf == '0')
    27c4:	461a      	mov	r2, r3
    27c6:	f813 1d01 	ldrb.w	r1, [r3, #-1]!
    27ca:	2930      	cmp	r1, #48	; 0x30
    27cc:	d0fa      	beq.n	27c4 <z_prf+0x700>
		if (*buf != '.') {
    27ce:	292e      	cmp	r1, #46	; 0x2e
    27d0:	bf18      	it	ne
    27d2:	4613      	movne	r3, r2
    27d4:	2500      	movs	r5, #0
	if ((c == 'e') || (c == 'E')) {
    27d6:	f004 02df 	and.w	r2, r4, #223	; 0xdf
    27da:	2a45      	cmp	r2, #69	; 0x45
    27dc:	f47f af2c 	bne.w	2638 <z_prf+0x574>
		if (decexp < 0) {
    27e0:	2e00      	cmp	r6, #0
		*buf++ = c;
    27e2:	4619      	mov	r1, r3
			decexp = -decexp;
    27e4:	bfba      	itte	lt
    27e6:	4276      	neglt	r6, r6
			*buf++ = '-';
    27e8:	222d      	movlt	r2, #45	; 0x2d
			*buf++ = '+';
    27ea:	222b      	movge	r2, #43	; 0x2b
		if (decexp >= 100) {
    27ec:	2e63      	cmp	r6, #99	; 0x63
		*buf++ = c;
    27ee:	f801 4b02 	strb.w	r4, [r1], #2
			*buf++ = '-';
    27f2:	705a      	strb	r2, [r3, #1]
		if (decexp >= 100) {
    27f4:	dd08      	ble.n	2808 <z_prf+0x744>
			*buf++ = (decexp / 100) + '0';
    27f6:	2064      	movs	r0, #100	; 0x64
    27f8:	fb96 f2f0 	sdiv	r2, r6, r0
    27fc:	f102 0430 	add.w	r4, r2, #48	; 0x30
    2800:	1cd9      	adds	r1, r3, #3
    2802:	709c      	strb	r4, [r3, #2]
			decexp %= 100;
    2804:	fb00 6612 	mls	r6, r0, r2, r6
		*buf++ = (decexp / 10) + '0';
    2808:	200a      	movs	r0, #10
    280a:	460b      	mov	r3, r1
    280c:	fb96 f2f0 	sdiv	r2, r6, r0
		decexp %= 10;
    2810:	fb00 6612 	mls	r6, r0, r2, r6
		*buf++ = (decexp / 10) + '0';
    2814:	f102 0430 	add.w	r4, r2, #48	; 0x30
		*buf++ = decexp + '0';
    2818:	3630      	adds	r6, #48	; 0x30
		*buf++ = (decexp / 10) + '0';
    281a:	f803 4b02 	strb.w	r4, [r3], #2
		*buf++ = decexp + '0';
    281e:	704e      	strb	r6, [r1, #1]
    2820:	e70a      	b.n	2638 <z_prf+0x574>
			*buf++ = '.';
    2822:	222e      	movs	r2, #46	; 0x2e
    2824:	1cbb      	adds	r3, r7, #2
    2826:	707a      	strb	r2, [r7, #1]
		while (precision > 0 && digit_count > 0) {
    2828:	2d00      	cmp	r5, #0
    282a:	ddc5      	ble.n	27b8 <z_prf+0x6f4>
    282c:	9a15      	ldr	r2, [sp, #84]	; 0x54
    282e:	2a00      	cmp	r2, #0
    2830:	ddc2      	ble.n	27b8 <z_prf+0x6f4>
			*buf++ = _get_digit(&fract, &digit_count);
    2832:	a915      	add	r1, sp, #84	; 0x54
    2834:	a816      	add	r0, sp, #88	; 0x58
    2836:	9306      	str	r3, [sp, #24]
    2838:	f002 fee4 	bl	5604 <_get_digit>
    283c:	9b06      	ldr	r3, [sp, #24]
			precision--;
    283e:	3d01      	subs	r5, #1
			*buf++ = _get_digit(&fract, &digit_count);
    2840:	f803 0b01 	strb.w	r0, [r3], #1
			precision--;
    2844:	e7f0      	b.n	2828 <z_prf+0x764>
			zero.predot = zero.postdot = zero.trail = 0;
    2846:	46d3      	mov	fp, sl
    2848:	46d0      	mov	r8, sl
    284a:	e7c4      	b.n	27d6 <z_prf+0x712>
					prefix = 1;
    284c:	2701      	movs	r7, #1
    284e:	e61c      	b.n	248a <z_prf+0x3c6>
				switch (i) {
    2850:	46b1      	mov	r9, r6
    2852:	2f68      	cmp	r7, #104	; 0x68
    2854:	f859 3b04 	ldr.w	r3, [r9], #4
    2858:	d005      	beq.n	2866 <z_prf+0x7a2>
    285a:	dc01      	bgt.n	2860 <z_prf+0x79c>
    285c:	2f48      	cmp	r7, #72	; 0x48
    285e:	d007      	beq.n	2870 <z_prf+0x7ac>
					*va_arg(vargs, int *) = count;
    2860:	9a01      	ldr	r2, [sp, #4]
    2862:	601a      	str	r2, [r3, #0]
					break;
    2864:	e001      	b.n	286a <z_prf+0x7a6>
					*va_arg(vargs, short *) = count;
    2866:	9a01      	ldr	r2, [sp, #4]
    2868:	801a      	strh	r2, [r3, #0]
				continue;
    286a:	464e      	mov	r6, r9
    286c:	9a08      	ldr	r2, [sp, #32]
    286e:	e431      	b.n	20d4 <z_prf+0x10>
					*va_arg(vargs, char *) = count;
    2870:	9a01      	ldr	r2, [sp, #4]
    2872:	701a      	strb	r2, [r3, #0]
					break;
    2874:	e7f9      	b.n	286a <z_prf+0x7a6>
				val = (uintptr_t) va_arg(vargs, void *);
    2876:	46b1      	mov	r9, r6
		*buf++ = '0';
    2878:	f647 0330 	movw	r3, #30768	; 0x7830
	len = _to_x(buf, value, 16);
    287c:	2210      	movs	r2, #16
    287e:	f859 1b04 	ldr.w	r1, [r9], #4
		*buf++ = '0';
    2882:	f8ad 306c 	strh.w	r3, [sp, #108]	; 0x6c
	len = _to_x(buf, value, 16);
    2886:	f10d 006e 	add.w	r0, sp, #110	; 0x6e
    288a:	f002 fe5b 	bl	5544 <_to_x>
				prefix = 2;
    288e:	2702      	movs	r7, #2
	return len + (buf - buf0);
    2890:	1c86      	adds	r6, r0, #2
				break;
    2892:	e51f      	b.n	22d4 <z_prf+0x210>
					if (cptr[clen] == '\0') {
    2894:	5d9a      	ldrb	r2, [r3, r6]
    2896:	2a00      	cmp	r2, #0
    2898:	d047      	beq.n	292a <z_prf+0x866>
				for (clen = 0; clen < precision; clen++) {
    289a:	3601      	adds	r6, #1
    289c:	e52f      	b.n	22fe <z_prf+0x23a>
	if (alt_form) {
    289e:	ac1b      	add	r4, sp, #108	; 0x6c
	return (buf - buf0) + _to_x(buf, value, 8);
    28a0:	2208      	movs	r2, #8
    28a2:	4620      	mov	r0, r4
    28a4:	f002 fe4e 	bl	5544 <_to_x>
    28a8:	ae1b      	add	r6, sp, #108	; 0x6c
    28aa:	1ba6      	subs	r6, r4, r6
    28ac:	4406      	add	r6, r0
			prefix = 0;
    28ae:	2700      	movs	r7, #0
    28b0:	e510      	b.n	22d4 <z_prf+0x210>
		*buf++ = '0';
    28b2:	f10d 046d 	add.w	r4, sp, #109	; 0x6d
    28b6:	e7f3      	b.n	28a0 <z_prf+0x7dc>
				} else if (c == 'u') {
    28b8:	2c75      	cmp	r4, #117	; 0x75
    28ba:	d105      	bne.n	28c8 <z_prf+0x804>
	return _to_x(buf, value, 10);
    28bc:	220a      	movs	r2, #10
    28be:	a81b      	add	r0, sp, #108	; 0x6c
    28c0:	f002 fe40 	bl	5544 <_to_x>
    28c4:	4606      	mov	r6, r0
    28c6:	e7f2      	b.n	28ae <z_prf+0x7ea>
	if (alt_form) {
    28c8:	f1bb 0f00 	cmp.w	fp, #0
    28cc:	d012      	beq.n	28f4 <z_prf+0x830>
		*buf++ = '0';
    28ce:	f647 0330 	movw	r3, #30768	; 0x7830
    28d2:	f8ad 306c 	strh.w	r3, [sp, #108]	; 0x6c
		*buf++ = 'x';
    28d6:	f10d 086e 	add.w	r8, sp, #110	; 0x6e
	len = _to_x(buf, value, 16);
    28da:	2210      	movs	r2, #16
    28dc:	4640      	mov	r0, r8
    28de:	f002 fe31 	bl	5544 <_to_x>
	if (prefix == 'X') {
    28e2:	2c58      	cmp	r4, #88	; 0x58
    28e4:	d009      	beq.n	28fa <z_prf+0x836>
	return len + (buf - buf0);
    28e6:	ae1b      	add	r6, sp, #108	; 0x6c
    28e8:	eba8 0606 	sub.w	r6, r8, r6
    28ec:	4406      	add	r6, r0
						prefix = 2;
    28ee:	ea4f 074b 	mov.w	r7, fp, lsl #1
    28f2:	e4ef      	b.n	22d4 <z_prf+0x210>
	if (alt_form) {
    28f4:	f10d 086c 	add.w	r8, sp, #108	; 0x6c
    28f8:	e7ef      	b.n	28da <z_prf+0x816>
	if (prefix == 'X') {
    28fa:	aa1b      	add	r2, sp, #108	; 0x6c
		if (*buf >= 'a' && *buf <= 'z') {
    28fc:	7813      	ldrb	r3, [r2, #0]
    28fe:	f1a3 0161 	sub.w	r1, r3, #97	; 0x61
    2902:	2919      	cmp	r1, #25
			*buf += 'A' - 'a';
    2904:	bf9c      	itt	ls
    2906:	3b20      	subls	r3, #32
    2908:	7013      	strbls	r3, [r2, #0]
	} while (*buf++);
    290a:	f812 3b01 	ldrb.w	r3, [r2], #1
    290e:	2b00      	cmp	r3, #0
    2910:	d1f4      	bne.n	28fc <z_prf+0x838>
    2912:	e7e8      	b.n	28e6 <z_prf+0x822>
				PUTC('%');
    2914:	9903      	ldr	r1, [sp, #12]
    2916:	4620      	mov	r0, r4
    2918:	f7ff bbe5 	b.w	20e6 <z_prf+0x22>
				count++;
    291c:	9b01      	ldr	r3, [sp, #4]
    291e:	3301      	adds	r3, #1
				count += 2;
    2920:	9301      	str	r3, [sp, #4]
				continue;
    2922:	46b1      	mov	r9, r6
    2924:	e7a1      	b.n	286a <z_prf+0x7a6>
					prefix = 1;
    2926:	2701      	movs	r7, #1
    2928:	e4d4      	b.n	22d4 <z_prf+0x210>
    292a:	4615      	mov	r5, r2
    292c:	e4ec      	b.n	2308 <z_prf+0x244>
			cptr = buf;
    292e:	ab1b      	add	r3, sp, #108	; 0x6c
				zero_head = 0;
    2930:	2200      	movs	r2, #0
    2932:	e4fb      	b.n	232c <z_prf+0x268>
    2934:	ab1b      	add	r3, sp, #108	; 0x6c
    2936:	9a0a      	ldr	r2, [sp, #40]	; 0x28
    2938:	e4f8      	b.n	232c <z_prf+0x268>
    293a:	e9cd 3209 	strd	r3, r2, [sp, #36]	; 0x24
					PUTC(' ');
    293e:	9903      	ldr	r1, [sp, #12]
    2940:	9b02      	ldr	r3, [sp, #8]
    2942:	2020      	movs	r0, #32
    2944:	4798      	blx	r3
    2946:	3001      	adds	r0, #1
    2948:	e9dd 3209 	ldrd	r3, r2, [sp, #36]	; 0x24
    294c:	f43f abd0 	beq.w	20f0 <z_prf+0x2c>
				while (width-- > 0) {
    2950:	f11a 3aff 	adds.w	sl, sl, #4294967295
    2954:	d2f1      	bcs.n	293a <z_prf+0x876>
				count += width;
    2956:	9901      	ldr	r1, [sp, #4]
    2958:	4421      	add	r1, r4
    295a:	9101      	str	r1, [sp, #4]
				while (width-- > 0) {
    295c:	4654      	mov	r4, sl
    295e:	e4ef      	b.n	2340 <z_prf+0x27c>
    2960:	46a2      	mov	sl, r4
    2962:	e7f5      	b.n	2950 <z_prf+0x88c>
    2964:	33333332 	.word	0x33333332
				PUTC(*cptr++);
    2968:	f813 0b01 	ldrb.w	r0, [r3], #1
    296c:	9309      	str	r3, [sp, #36]	; 0x24
    296e:	9903      	ldr	r1, [sp, #12]
    2970:	9b02      	ldr	r3, [sp, #8]
    2972:	920a      	str	r2, [sp, #40]	; 0x28
    2974:	4798      	blx	r3
    2976:	3001      	adds	r0, #1
    2978:	e9dd 3209 	ldrd	r3, r2, [sp, #36]	; 0x24
    297c:	f47f ace2 	bne.w	2344 <z_prf+0x280>
    2980:	f7ff bbb6 	b.w	20f0 <z_prf+0x2c>
				PUTC('0');
    2984:	9903      	ldr	r1, [sp, #12]
    2986:	9b02      	ldr	r3, [sp, #8]
    2988:	9209      	str	r2, [sp, #36]	; 0x24
    298a:	2030      	movs	r0, #48	; 0x30
    298c:	4798      	blx	r3
    298e:	3001      	adds	r0, #1
    2990:	9a09      	ldr	r2, [sp, #36]	; 0x24
    2992:	f47f acda 	bne.w	234a <z_prf+0x286>
    2996:	f7ff bbab 	b.w	20f0 <z_prf+0x2c>
					PUTC(c);
    299a:	e9dd 3102 	ldrd	r3, r1, [sp, #8]
    299e:	4798      	blx	r3
    29a0:	3001      	adds	r0, #1
    29a2:	f43f aba5 	beq.w	20f0 <z_prf+0x2c>
					c = *++cptr;
    29a6:	f81a 0f01 	ldrb.w	r0, [sl, #1]!
    29aa:	e4da      	b.n	2362 <z_prf+0x29e>
					PUTC('0');
    29ac:	9903      	ldr	r1, [sp, #12]
    29ae:	9b02      	ldr	r3, [sp, #8]
    29b0:	2030      	movs	r0, #48	; 0x30
    29b2:	4798      	blx	r3
    29b4:	3001      	adds	r0, #1
    29b6:	f47f acdc 	bne.w	2372 <z_prf+0x2ae>
    29ba:	f7ff bb99 	b.w	20f0 <z_prf+0x2c>
					PUTC('0');
    29be:	9903      	ldr	r1, [sp, #12]
    29c0:	9b02      	ldr	r3, [sp, #8]
    29c2:	2030      	movs	r0, #48	; 0x30
    29c4:	4798      	blx	r3
    29c6:	3001      	adds	r0, #1
    29c8:	f107 37ff 	add.w	r7, r7, #4294967295
    29cc:	f47f aceb 	bne.w	23a6 <z_prf+0x2e2>
    29d0:	f7ff bb8e 	b.w	20f0 <z_prf+0x2c>
					PUTC(c);
    29d4:	e9dd 3102 	ldrd	r3, r1, [sp, #8]
    29d8:	4798      	blx	r3
    29da:	3001      	adds	r0, #1
    29dc:	f43f ab88 	beq.w	20f0 <z_prf+0x2c>
					c = *++cptr;
    29e0:	f81a 0f01 	ldrb.w	r0, [sl, #1]!
    29e4:	e4e9      	b.n	23ba <z_prf+0x2f6>
					PUTC('0');
    29e6:	9903      	ldr	r1, [sp, #12]
    29e8:	9b02      	ldr	r3, [sp, #8]
    29ea:	2030      	movs	r0, #48	; 0x30
    29ec:	4798      	blx	r3
    29ee:	3001      	adds	r0, #1
    29f0:	f107 37ff 	add.w	r7, r7, #4294967295
    29f4:	f47f acec 	bne.w	23d0 <z_prf+0x30c>
    29f8:	f7ff bb7a 	b.w	20f0 <z_prf+0x2c>
				PUTC(*cptr++);
    29fc:	9903      	ldr	r1, [sp, #12]
    29fe:	f81a 0b01 	ldrb.w	r0, [sl], #1
    2a02:	9b02      	ldr	r3, [sp, #8]
    2a04:	4798      	blx	r3
    2a06:	3001      	adds	r0, #1
    2a08:	f43f ab72 	beq.w	20f0 <z_prf+0x2c>
    2a0c:	eba6 030a 	sub.w	r3, r6, sl
			while (clen-- > 0) {
    2a10:	2b00      	cmp	r3, #0
    2a12:	dcf3      	bgt.n	29fc <z_prf+0x938>
			count += clen;
    2a14:	9b01      	ldr	r3, [sp, #4]
    2a16:	9a06      	ldr	r2, [sp, #24]
			if (width > 0) {
    2a18:	2c00      	cmp	r4, #0
			count += clen;
    2a1a:	4413      	add	r3, r2
    2a1c:	9301      	str	r3, [sp, #4]
			if (width > 0) {
    2a1e:	f77f af24 	ble.w	286a <z_prf+0x7a6>
    2a22:	4625      	mov	r5, r4
    2a24:	e006      	b.n	2a34 <z_prf+0x970>
					PUTC(' ');
    2a26:	9903      	ldr	r1, [sp, #12]
    2a28:	9b02      	ldr	r3, [sp, #8]
    2a2a:	2020      	movs	r0, #32
    2a2c:	4798      	blx	r3
    2a2e:	3001      	adds	r0, #1
    2a30:	f43f ab5e 	beq.w	20f0 <z_prf+0x2c>
				while (width-- > 0) {
    2a34:	f115 35ff 	adds.w	r5, r5, #4294967295
    2a38:	d2f5      	bcs.n	2a26 <z_prf+0x962>
				count += width;
    2a3a:	9b01      	ldr	r3, [sp, #4]
    2a3c:	4423      	add	r3, r4
    2a3e:	9301      	str	r3, [sp, #4]
    2a40:	e713      	b.n	286a <z_prf+0x7a6>
    2a42:	bf00      	nop

00002a44 <__stdout_hook_install>:

static int (*_stdout_hook)(int) = _stdout_hook_default;

void __stdout_hook_install(int (*hook)(int))
{
	_stdout_hook = hook;
    2a44:	4b01      	ldr	r3, [pc, #4]	; (2a4c <__stdout_hook_install+0x8>)
    2a46:	6018      	str	r0, [r3, #0]
}
    2a48:	4770      	bx	lr
    2a4a:	bf00      	nop
    2a4c:	200021d8 	.word	0x200021d8

00002a50 <snprintf>:
	return 0; /* indicate keep going so we get the total count */
}

int snprintf(char *_MLIBC_RESTRICT s, size_t len,
	     const char *_MLIBC_RESTRICT format, ...)
{
    2a50:	b40c      	push	{r2, r3}
    2a52:	b51f      	push	{r0, r1, r2, r3, r4, lr}

	struct emitter p;
	int     r;
	char    dummy;

	if (len == 0) {
    2a54:	b909      	cbnz	r1, 2a5a <snprintf+0xa>
		s = &dummy; /* write final NUL to dummy, can't change *s */
    2a56:	f10d 0003 	add.w	r0, sp, #3
	}

	p.ptr = s;
	p.len = (int) len;
    2a5a:	e9cd 0102 	strd	r0, r1, [sp, #8]

	va_start(vargs, format);
    2a5e:	ab07      	add	r3, sp, #28
	r = z_prf(sprintf_out, (void *) (&p), format, vargs);
    2a60:	9a06      	ldr	r2, [sp, #24]
    2a62:	4806      	ldr	r0, [pc, #24]	; (2a7c <snprintf+0x2c>)
	va_start(vargs, format);
    2a64:	9301      	str	r3, [sp, #4]
	r = z_prf(sprintf_out, (void *) (&p), format, vargs);
    2a66:	a902      	add	r1, sp, #8
    2a68:	f7ff fb2c 	bl	20c4 <z_prf>
	va_end(vargs);

	*(p.ptr) = 0;
    2a6c:	9b02      	ldr	r3, [sp, #8]
    2a6e:	2200      	movs	r2, #0
    2a70:	701a      	strb	r2, [r3, #0]
	return r;
}
    2a72:	b005      	add	sp, #20
    2a74:	f85d eb04 	ldr.w	lr, [sp], #4
    2a78:	b002      	add	sp, #8
    2a7a:	4770      	bx	lr
    2a7c:	00005639 	.word	0x00005639

00002a80 <nordicsemi_nrf52_init>:
    2a80:	f04f 0320 	mov.w	r3, #32
    2a84:	f3ef 8211 	mrs	r2, BASEPRI
    2a88:	f383 8811 	msr	BASEPRI, r3
    2a8c:	f3bf 8f6f 	isb	sy

	key = irq_lock();

#ifdef CONFIG_NRF_ENABLE_ICACHE
	/* Enable the instruction cache */
	NRF_NVMC->ICACHECNF = NVMC_ICACHECNF_CACHEEN_Msk;
    2a90:	4906      	ldr	r1, [pc, #24]	; (2aac <nordicsemi_nrf52_init+0x2c>)
    2a92:	2301      	movs	r3, #1
    2a94:	f8c1 3540 	str.w	r3, [r1, #1344]	; 0x540
#endif

#if NRF_POWER_HAS_DCDCEN
NRF_STATIC_INLINE void nrf_power_dcdcen_set(NRF_POWER_Type * p_reg, bool enable)
{
    p_reg->DCDCEN = (enable ? POWER_DCDCEN_DCDCEN_Enabled : POWER_DCDCEN_DCDCEN_Disabled) <<
    2a98:	f04f 4180 	mov.w	r1, #1073741824	; 0x40000000
    2a9c:	f8c1 3578 	str.w	r3, [r1, #1400]	; 0x578
	__asm__ volatile(
    2aa0:	f382 8811 	msr	BASEPRI, r2
    2aa4:	f3bf 8f6f 	isb	sy
	NMI_INIT();

	irq_unlock(key);

	return 0;
}
    2aa8:	2000      	movs	r0, #0
    2aaa:	4770      	bx	lr
    2aac:	4001e000 	.word	0x4001e000

00002ab0 <sys_arch_reboot>:
    *p_gpregret = val;
    2ab0:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    2ab4:	b2c0      	uxtb	r0, r0
    2ab6:	f8c3 051c 	str.w	r0, [r3, #1308]	; 0x51c
  __ASM volatile ("dsb 0xF":::"memory");
    2aba:	f3bf 8f4f 	dsb	sy
__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
{
  __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                       buffered write are completed before reset */
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
    2abe:	4905      	ldr	r1, [pc, #20]	; (2ad4 <sys_arch_reboot+0x24>)
    2ac0:	4b05      	ldr	r3, [pc, #20]	; (2ad8 <sys_arch_reboot+0x28>)
    2ac2:	68ca      	ldr	r2, [r1, #12]
    2ac4:	f402 62e0 	and.w	r2, r2, #1792	; 0x700
    2ac8:	4313      	orrs	r3, r2
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
    2aca:	60cb      	str	r3, [r1, #12]
    2acc:	f3bf 8f4f 	dsb	sy
                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
  __DSB();                                                          /* Ensure completion of memory access */

  for(;;)                                                           /* wait until reset */
  {
    __NOP();
    2ad0:	bf00      	nop
    2ad2:	e7fd      	b.n	2ad0 <sys_arch_reboot+0x20>
    2ad4:	e000ed00 	.word	0xe000ed00
    2ad8:	05fa0004 	.word	0x05fa0004

00002adc <arch_busy_wait>:

#else // NRFX_CHECK(NRFX_DELAY_DWT_BASED)

NRF_STATIC_INLINE void nrfx_coredep_delay_us(uint32_t time_us)
{
    if (time_us == 0)
    2adc:	b120      	cbz	r0, 2ae8 <arch_busy_wait+0xc>
    };

    typedef void (* delay_func_t)(uint32_t);
    const delay_func_t delay_cycles =
        // Set LSB to 1 to execute the code in the Thumb mode.
        (delay_func_t)((((uint32_t)delay_machine_code) | 1));
    2ade:	4b03      	ldr	r3, [pc, #12]	; (2aec <arch_busy_wait+0x10>)
    uint32_t cycles = time_us * NRFX_DELAY_CPU_FREQ_MHZ;
    delay_cycles(cycles);
    2ae0:	0180      	lsls	r0, r0, #6
    2ae2:	f043 0301 	orr.w	r3, r3, #1
    2ae6:	4718      	bx	r3

void arch_busy_wait(u32_t time_us)
{
	nrfx_coredep_delay_us(time_us);
}
    2ae8:	4770      	bx	lr
    2aea:	bf00      	nop
    2aec:	00005e00 	.word	0x00005e00

00002af0 <gpio_nrfx_init>:
#endif
	}
}

static int gpio_nrfx_init(struct device *port)
{
    2af0:	b508      	push	{r3, lr}
	static bool gpio_initialized;

	if (!gpio_initialized) {
    2af2:	4b09      	ldr	r3, [pc, #36]	; (2b18 <gpio_nrfx_init+0x28>)
    2af4:	781a      	ldrb	r2, [r3, #0]
    2af6:	b96a      	cbnz	r2, 2b14 <gpio_nrfx_init+0x24>
		gpio_initialized = true;
    2af8:	2101      	movs	r1, #1
    2afa:	7019      	strb	r1, [r3, #0]
		IRQ_CONNECT(DT_NORDIC_NRF_GPIOTE_GPIOTE_0_IRQ_0,
    2afc:	2006      	movs	r0, #6
    2afe:	2105      	movs	r1, #5
    2b00:	f7fe fe28 	bl	1754 <z_arm_irq_priority_set>
			    DT_NORDIC_NRF_GPIOTE_GPIOTE_0_IRQ_0_PRIORITY,
			    gpiote_event_handler, NULL, 0);

		irq_enable(DT_NORDIC_NRF_GPIOTE_GPIOTE_0_IRQ_0);
    2b04:	2006      	movs	r0, #6
    2b06:	f7fe fe15 	bl	1734 <arch_irq_enable>
    return ((uint32_t)p_reg + event);
}

NRF_STATIC_INLINE void nrf_gpiote_int_enable(NRF_GPIOTE_Type * p_reg, uint32_t mask)
{
    p_reg->INTENSET = mask;
    2b0a:	4b04      	ldr	r3, [pc, #16]	; (2b1c <gpio_nrfx_init+0x2c>)
    2b0c:	f04f 4200 	mov.w	r2, #2147483648	; 0x80000000
    2b10:	f8c3 2304 	str.w	r2, [r3, #772]	; 0x304
		nrf_gpiote_int_enable(NRF_GPIOTE, NRF_GPIOTE_INT_PORT_MASK);
	}

	return 0;
}
    2b14:	2000      	movs	r0, #0
    2b16:	bd08      	pop	{r3, pc}
    2b18:	20000ccb 	.word	0x20000ccb
    2b1c:	40006000 	.word	0x40006000

00002b20 <nrf_gpio_cfg_sense_set>:
{
    NRFX_ASSERT(*p_pin < NUMBER_OF_PINS);
#if (GPIO_COUNT == 1)
    return NRF_P0;
#else
    if (*p_pin < P0_PIN_NUM)
    2b20:	281f      	cmp	r0, #31
        return NRF_P0;
    }
    else
    {
        *p_pin = *p_pin & (P0_PIN_NUM - 1);
        return NRF_P1;
    2b22:	bf86      	itte	hi
    2b24:	4b07      	ldrhi	r3, [pc, #28]	; (2b44 <nrf_gpio_cfg_sense_set+0x24>)
        *p_pin = *p_pin & (P0_PIN_NUM - 1);
    2b26:	f000 001f 	andhi.w	r0, r0, #31
        return NRF_P0;
    2b2a:	f04f 43a0 	movls.w	r3, #1342177280	; 0x50000000
NRF_STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t             pin_number,
                                              nrf_gpio_pin_sense_t sense_config)
{
    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
    /*lint -e{845} // A zero has been given as right argument to operator '|'" */
    uint32_t cnf = reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_SENSE_Msk;
    2b2e:	eb03 0380 	add.w	r3, r3, r0, lsl #2
    2b32:	f8d3 2700 	ldr.w	r2, [r3, #1792]	; 0x700
    2b36:	f422 3240 	bic.w	r2, r2, #196608	; 0x30000

    reg->PIN_CNF[pin_number] = cnf | (sense_config << GPIO_PIN_CNF_SENSE_Pos);
    2b3a:	ea42 4201 	orr.w	r2, r2, r1, lsl #16
    2b3e:	f8c3 2700 	str.w	r2, [r3, #1792]	; 0x700
}
    2b42:	4770      	bx	lr
    2b44:	50000300 	.word	0x50000300

00002b48 <gpiote_pin_int_cfg>:
{
    2b48:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
	return port->config->config_info;
    2b4a:	6803      	ldr	r3, [r0, #0]
	struct gpio_nrfx_data *data = get_port_data(port);
    2b4c:	6887      	ldr	r7, [r0, #8]
	u32_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
    2b4e:	689b      	ldr	r3, [r3, #8]
    2b50:	f001 051f 	and.w	r5, r1, #31
{
    2b54:	460e      	mov	r6, r1
    p_reg->INTENCLR = mask;
}

NRF_STATIC_INLINE uint32_t nrf_gpiote_int_enable_check(NRF_GPIOTE_Type const * p_reg, uint32_t mask)
{
    return p_reg->INTENSET & mask;
    2b56:	494e      	ldr	r1, [pc, #312]	; (2c90 <gpiote_pin_int_cfg+0x148>)
	u32_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
    2b58:	791b      	ldrb	r3, [r3, #4]
    2b5a:	f8d1 2304 	ldr.w	r2, [r1, #772]	; 0x304
    2b5e:	ea45 1543 	orr.w	r5, r5, r3, lsl #5
    2b62:	b2d2      	uxtb	r2, r2
	for (size_t i = 0; i < GPIOTE_CH_NUM; i++) {
    2b64:	2300      	movs	r3, #0
                        ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk);
}

NRF_STATIC_INLINE uint32_t nrf_gpiote_event_pin_get(NRF_GPIOTE_Type const * p_reg, uint32_t idx)
{
    return ((p_reg->CONFIG[idx] & GPIOTE_CONFIG_PORT_PIN_Msk) >> GPIOTE_CONFIG_PSEL_Pos);
    2b66:	f503 70a2 	add.w	r0, r3, #324	; 0x144
    2b6a:	f851 0020 	ldr.w	r0, [r1, r0, lsl #2]
    2b6e:	f3c0 2005 	ubfx	r0, r0, #8, #6
		if ((nrf_gpiote_event_pin_get(NRF_GPIOTE, i) == abs_pin)
    2b72:	4285      	cmp	r5, r0
    2b74:	d170      	bne.n	2c58 <gpiote_pin_int_cfg+0x110>
		    && (intenset & BIT(i))) {
    2b76:	fa22 f003 	lsr.w	r0, r2, r3
    2b7a:	07c0      	lsls	r0, r0, #31
    2b7c:	d56c      	bpl.n	2c58 <gpiote_pin_int_cfg+0x110>
   p_reg->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Event;
    2b7e:	009a      	lsls	r2, r3, #2
    2b80:	f102 4280 	add.w	r2, r2, #1073741824	; 0x40000000
    2b84:	f502 42c0 	add.w	r2, r2, #24576	; 0x6000
    2b88:	f8d2 0510 	ldr.w	r0, [r2, #1296]	; 0x510
    2b8c:	f020 0001 	bic.w	r0, r0, #1
    2b90:	f8c2 0510 	str.w	r0, [r2, #1296]	; 0x510
			nrf_gpiote_int_disable(NRF_GPIOTE, BIT(i));
    2b94:	2201      	movs	r2, #1
    2b96:	fa02 f303 	lsl.w	r3, r2, r3
    p_reg->INTENCLR = mask;
    2b9a:	f8c1 3308 	str.w	r3, [r1, #776]	; 0x308
	nrf_gpio_cfg_sense_set(abs_pin, NRF_GPIO_PIN_NOSENSE);
    2b9e:	4628      	mov	r0, r5
    2ba0:	2100      	movs	r1, #0
    2ba2:	f7ff ffbd 	bl	2b20 <nrf_gpio_cfg_sense_set>
	if ((data->pin_int_en & BIT(pin)) && (data->int_en & BIT(pin))) {
    2ba6:	68b8      	ldr	r0, [r7, #8]
    2ba8:	40f0      	lsrs	r0, r6
    2baa:	f010 0001 	ands.w	r0, r0, #1
    2bae:	d051      	beq.n	2c54 <gpiote_pin_int_cfg+0x10c>
    2bb0:	68f8      	ldr	r0, [r7, #12]
    2bb2:	40f0      	lsrs	r0, r6
    2bb4:	f010 0001 	ands.w	r0, r0, #1
    2bb8:	d04c      	beq.n	2c54 <gpiote_pin_int_cfg+0x10c>
		if (data->trig_edge & BIT(pin)) {
    2bba:	6978      	ldr	r0, [r7, #20]
    2bbc:	40f0      	lsrs	r0, r6
    2bbe:	f010 0401 	ands.w	r4, r0, #1
    2bc2:	d055      	beq.n	2c70 <gpiote_pin_int_cfg+0x128>
			if (data->double_edge & BIT(pin)) {
    2bc4:	69bb      	ldr	r3, [r7, #24]
    2bc6:	40f3      	lsrs	r3, r6
    2bc8:	07db      	lsls	r3, r3, #31
    2bca:	d449      	bmi.n	2c60 <gpiote_pin_int_cfg+0x118>
			} else if (((data->active_level & BIT(pin)) != 0U)
    2bcc:	693b      	ldr	r3, [r7, #16]
				   ^ ((BIT(pin) & data->inverted) != 0)) {
    2bce:	69fa      	ldr	r2, [r7, #28]
			} else if (((data->active_level & BIT(pin)) != 0U)
    2bd0:	40f3      	lsrs	r3, r6
				   ^ ((BIT(pin) & data->inverted) != 0)) {
    2bd2:	fa22 f606 	lsr.w	r6, r2, r6
			} else if (((data->active_level & BIT(pin)) != 0U)
    2bd6:	f003 0301 	and.w	r3, r3, #1
    2bda:	f006 0601 	and.w	r6, r6, #1
				pol = NRF_GPIOTE_POLARITY_HITOLO;
    2bde:	42b3      	cmp	r3, r6
    2be0:	bf14      	ite	ne
    2be2:	2601      	movne	r6, #1
    2be4:	2602      	moveq	r6, #2
    p_reg->CONFIG[idx] = 0;
}

NRF_STATIC_INLINE bool nrf_gpiote_te_is_enabled(NRF_GPIOTE_Type const * p_reg, uint32_t idx)
{
    return (p_reg->CONFIG[idx] & GPIOTE_CONFIG_MODE_Msk) != GPIOTE_CONFIG_MODE_Disabled;
    2be6:	4c2a      	ldr	r4, [pc, #168]	; (2c90 <gpiote_pin_int_cfg+0x148>)
    2be8:	2100      	movs	r1, #0
    2bea:	f501 73a2 	add.w	r3, r1, #324	; 0x144
    2bee:	f854 0023 	ldr.w	r0, [r4, r3, lsl #2]
		if (!nrf_gpiote_te_is_enabled(NRF_GPIOTE, channel)) {
    2bf2:	f010 0003 	ands.w	r0, r0, #3
    2bf6:	d135      	bne.n	2c64 <gpiote_pin_int_cfg+0x11c>
  p_reg->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk | GPIOTE_CONFIG_POLARITY_Msk);
    2bf8:	008b      	lsls	r3, r1, #2
    2bfa:	f103 4380 	add.w	r3, r3, #1073741824	; 0x40000000
    2bfe:	f503 43c0 	add.w	r3, r3, #24576	; 0x6000
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    2c02:	022d      	lsls	r5, r5, #8
  p_reg->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk | GPIOTE_CONFIG_POLARITY_Msk);
    2c04:	f8d3 2510 	ldr.w	r2, [r3, #1296]	; 0x510
    2c08:	f422 324f 	bic.w	r2, r2, #211968	; 0x33c00
    2c0c:	f422 7240 	bic.w	r2, r2, #768	; 0x300
    2c10:	f8c3 2510 	str.w	r2, [r3, #1296]	; 0x510
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    2c14:	f8d3 2510 	ldr.w	r2, [r3, #1296]	; 0x510
    2c18:	f405 557c 	and.w	r5, r5, #16128	; 0x3f00
    2c1c:	ea45 4606 	orr.w	r6, r5, r6, lsl #16
    2c20:	4316      	orrs	r6, r2
			nrf_gpiote_event_t evt =
    2c22:	f101 0240 	add.w	r2, r1, #64	; 0x40
    2c26:	0092      	lsls	r2, r2, #2
    return ((uint32_t)p_reg + event);
    2c28:	b292      	uxth	r2, r2
    2c2a:	f102 4280 	add.w	r2, r2, #1073741824	; 0x40000000
    2c2e:	f502 42c0 	add.w	r2, r2, #24576	; 0x6000
  p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
    2c32:	f8c3 6510 	str.w	r6, [r3, #1296]	; 0x510
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    2c36:	6010      	str	r0, [r2, #0]
    volatile uint32_t dummy = *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event));
    2c38:	6812      	ldr	r2, [r2, #0]
    2c3a:	9201      	str	r2, [sp, #4]
    (void)dummy;
    2c3c:	9a01      	ldr	r2, [sp, #4]
   p_reg->CONFIG[idx] |= GPIOTE_CONFIG_MODE_Event;
    2c3e:	f8d3 2510 	ldr.w	r2, [r3, #1296]	; 0x510
    2c42:	f042 0201 	orr.w	r2, r2, #1
    2c46:	f8c3 2510 	str.w	r2, [r3, #1296]	; 0x510
			nrf_gpiote_int_enable(NRF_GPIOTE, BIT(channel));
    2c4a:	2301      	movs	r3, #1
    2c4c:	fa03 f101 	lsl.w	r1, r3, r1
    p_reg->INTENSET = mask;
    2c50:	f8c4 1304 	str.w	r1, [r4, #772]	; 0x304
}
    2c54:	b003      	add	sp, #12
    2c56:	bdf0      	pop	{r4, r5, r6, r7, pc}
	for (size_t i = 0; i < GPIOTE_CH_NUM; i++) {
    2c58:	3301      	adds	r3, #1
    2c5a:	2b08      	cmp	r3, #8
    2c5c:	d183      	bne.n	2b66 <gpiote_pin_int_cfg+0x1e>
    2c5e:	e79e      	b.n	2b9e <gpiote_pin_int_cfg+0x56>
				pol = NRF_GPIOTE_POLARITY_TOGGLE;
    2c60:	2603      	movs	r6, #3
    2c62:	e7c0      	b.n	2be6 <gpiote_pin_int_cfg+0x9e>
    2c64:	3101      	adds	r1, #1
	for (u8_t channel = 0; channel < GPIOTE_CH_NUM; ++channel) {
    2c66:	2908      	cmp	r1, #8
    2c68:	d1bf      	bne.n	2bea <gpiote_pin_int_cfg+0xa2>
	return -ENODEV;
    2c6a:	f06f 0012 	mvn.w	r0, #18
    2c6e:	e7f1      	b.n	2c54 <gpiote_pin_int_cfg+0x10c>
	if ((BIT(pin) & (data->active_level ^ data->inverted)) != 0) {
    2c70:	693b      	ldr	r3, [r7, #16]
    2c72:	69fa      	ldr	r2, [r7, #28]
    2c74:	4053      	eors	r3, r2
    2c76:	fa23 f606 	lsr.w	r6, r3, r6
		return NRF_GPIO_PIN_SENSE_HIGH;
    2c7a:	f016 0f01 	tst.w	r6, #1
			nrf_gpio_cfg_sense_set(abs_pin, sense);
    2c7e:	4628      	mov	r0, r5
    2c80:	bf0c      	ite	eq
    2c82:	2103      	moveq	r1, #3
    2c84:	2102      	movne	r1, #2
    2c86:	f7ff ff4b 	bl	2b20 <nrf_gpio_cfg_sense_set>
	int res = 0;
    2c8a:	4620      	mov	r0, r4
    2c8c:	e7e2      	b.n	2c54 <gpiote_pin_int_cfg+0x10c>
    2c8e:	bf00      	nop
    2c90:	40006000 	.word	0x40006000

00002c94 <gpio_nrfx_config>:
{
    2c94:	e92d 4ff8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
    2c98:	4607      	mov	r7, r0
	struct gpio_nrfx_data *data = get_port_data(port);
    2c9a:	6885      	ldr	r5, [r0, #8]
	switch (flags & (GPIO_DS_LOW_MASK | GPIO_DS_HIGH_MASK)) {
    2c9c:	f403 4070 	and.w	r0, r3, #61440	; 0xf000
    2ca0:	f5b0 4f80 	cmp.w	r0, #16384	; 0x4000
{
    2ca4:	461e      	mov	r6, r3
	switch (flags & (GPIO_DS_LOW_MASK | GPIO_DS_HIGH_MASK)) {
    2ca6:	d03e      	beq.n	2d26 <gpio_nrfx_config+0x92>
    2ca8:	dc09      	bgt.n	2cbe <gpio_nrfx_config+0x2a>
    2caa:	f5b0 5f80 	cmp.w	r0, #4096	; 0x1000
    2cae:	d03c      	beq.n	2d2a <gpio_nrfx_config+0x96>
    2cb0:	f5b0 5f40 	cmp.w	r0, #12288	; 0x3000
    2cb4:	d03b      	beq.n	2d2e <gpio_nrfx_config+0x9a>
    2cb6:	b190      	cbz	r0, 2cde <gpio_nrfx_config+0x4a>
		return -EINVAL;
    2cb8:	f06f 0015 	mvn.w	r0, #21
    2cbc:	e031      	b.n	2d22 <gpio_nrfx_config+0x8e>
	switch (flags & (GPIO_DS_LOW_MASK | GPIO_DS_HIGH_MASK)) {
    2cbe:	f5b0 4fe0 	cmp.w	r0, #28672	; 0x7000
    2cc2:	d036      	beq.n	2d32 <gpio_nrfx_config+0x9e>
    2cc4:	dc04      	bgt.n	2cd0 <gpio_nrfx_config+0x3c>
    2cc6:	f5b0 4fa0 	cmp.w	r0, #20480	; 0x5000
    2cca:	d1f5      	bne.n	2cb8 <gpio_nrfx_config+0x24>
		drive = NRF_GPIO_PIN_H0H1;
    2ccc:	2003      	movs	r0, #3
    2cce:	e006      	b.n	2cde <gpio_nrfx_config+0x4a>
	switch (flags & (GPIO_DS_LOW_MASK | GPIO_DS_HIGH_MASK)) {
    2cd0:	f5b0 4f40 	cmp.w	r0, #49152	; 0xc000
    2cd4:	d02f      	beq.n	2d36 <gpio_nrfx_config+0xa2>
    2cd6:	f5b0 4f50 	cmp.w	r0, #53248	; 0xd000
    2cda:	d1ed      	bne.n	2cb8 <gpio_nrfx_config+0x24>
		drive = NRF_GPIO_PIN_H0D1;
    2cdc:	2007      	movs	r0, #7
	if ((flags & GPIO_PUD_MASK) == GPIO_PUD_PULL_UP) {
    2cde:	f406 7840 	and.w	r8, r6, #768	; 0x300
    2ce2:	f5b8 7f80 	cmp.w	r8, #256	; 0x100
    2ce6:	d028      	beq.n	2d3a <gpio_nrfx_config+0xa6>
		pull = NRF_GPIO_PIN_NOPULL;
    2ce8:	f5a8 7400 	sub.w	r4, r8, #512	; 0x200
    2cec:	4263      	negs	r3, r4
    2cee:	4163      	adcs	r3, r4
	dir = ((flags & GPIO_DIR_MASK) == GPIO_DIR_OUT)
    2cf0:	f006 0c01 	and.w	ip, r6, #1
                               | ((uint32_t)input << GPIO_PIN_CNF_INPUT_Pos)
    2cf4:	ea4f 084c 	mov.w	r8, ip, lsl #1
	if (access_op == GPIO_ACCESS_BY_PORT) {
    2cf8:	2901      	cmp	r1, #1
                               | ((uint32_t)drive << GPIO_PIN_CNF_DRIVE_Pos)
    2cfa:	ea48 080c 	orr.w	r8, r8, ip
		from_pin = pin;
    2cfe:	bf18      	it	ne
    2d00:	b2d4      	uxtbne	r4, r2
    2d02:	ea48 2000 	orr.w	r0, r8, r0, lsl #8
        return NRF_P1;
    2d06:	f8df a0b0 	ldr.w	sl, [pc, #176]	; 2db8 <gpio_nrfx_config+0x124>
		to_pin   = pin;
    2d0a:	bf12      	itee	ne
    2d0c:	46a1      	movne	r9, r4
		to_pin   = 31U;
    2d0e:	f04f 091f 	moveq.w	r9, #31
		from_pin = 0U;
    2d12:	2400      	moveq	r4, #0
                               | ((uint32_t)drive << GPIO_PIN_CNF_DRIVE_Pos)
    2d14:	ea40 0883 	orr.w	r8, r0, r3, lsl #2
    2d18:	f04f 0b01 	mov.w	fp, #1
	for (u8_t curr_pin = from_pin; curr_pin <= to_pin; ++curr_pin) {
    2d1c:	45a1      	cmp	r9, r4
    2d1e:	d20e      	bcs.n	2d3e <gpio_nrfx_config+0xaa>
	return 0;
    2d20:	2000      	movs	r0, #0
}
    2d22:	e8bd 8ff8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
		drive = NRF_GPIO_PIN_S0H1;
    2d26:	2002      	movs	r0, #2
    2d28:	e7d9      	b.n	2cde <gpio_nrfx_config+0x4a>
		drive = NRF_GPIO_PIN_H0S1;
    2d2a:	2001      	movs	r0, #1
    2d2c:	e7d7      	b.n	2cde <gpio_nrfx_config+0x4a>
		drive = NRF_GPIO_PIN_D0S1;
    2d2e:	2004      	movs	r0, #4
    2d30:	e7d5      	b.n	2cde <gpio_nrfx_config+0x4a>
		drive = NRF_GPIO_PIN_D0H1;
    2d32:	2005      	movs	r0, #5
    2d34:	e7d3      	b.n	2cde <gpio_nrfx_config+0x4a>
		drive = NRF_GPIO_PIN_S0D1;
    2d36:	2006      	movs	r0, #6
    2d38:	e7d1      	b.n	2cde <gpio_nrfx_config+0x4a>
		pull = NRF_GPIO_PIN_PULLUP;
    2d3a:	2303      	movs	r3, #3
    2d3c:	e7d8      	b.n	2cf0 <gpio_nrfx_config+0x5c>
	return port->config->config_info;
    2d3e:	683b      	ldr	r3, [r7, #0]
		nrf_gpio_cfg(NRF_GPIO_PIN_MAP(get_port_cfg(port)->port_num,
    2d40:	689b      	ldr	r3, [r3, #8]
    2d42:	791a      	ldrb	r2, [r3, #4]
    2d44:	f004 031f 	and.w	r3, r4, #31
    2d48:	ea43 1342 	orr.w	r3, r3, r2, lsl #5
    if (*p_pin < P0_PIN_NUM)
    2d4c:	2b1f      	cmp	r3, #31
        *p_pin = *p_pin & (P0_PIN_NUM - 1);
    2d4e:	bfc6      	itte	gt
    2d50:	f003 031f 	andgt.w	r3, r3, #31
        return NRF_P1;
    2d54:	4652      	movgt	r2, sl
        return NRF_P0;
    2d56:	f04f 42a0 	movle.w	r2, #1342177280	; 0x50000000
    reg->PIN_CNF[pin_number] = ((uint32_t)dir << GPIO_PIN_CNF_DIR_Pos)
    2d5a:	f503 73e0 	add.w	r3, r3, #448	; 0x1c0
		WRITE_BIT(data->pin_int_en, curr_pin, flags & GPIO_INT);
    2d5e:	07b1      	lsls	r1, r6, #30
    2d60:	f842 8023 	str.w	r8, [r2, r3, lsl #2]
    2d64:	68ab      	ldr	r3, [r5, #8]
    2d66:	fa0b f204 	lsl.w	r2, fp, r4
    2d6a:	bf4c      	ite	mi
    2d6c:	4313      	orrmi	r3, r2
    2d6e:	4393      	bicpl	r3, r2
    2d70:	60ab      	str	r3, [r5, #8]
		WRITE_BIT(data->trig_edge, curr_pin, flags & GPIO_INT_EDGE);
    2d72:	696b      	ldr	r3, [r5, #20]
    2d74:	06b0      	lsls	r0, r6, #26
    2d76:	bf4c      	ite	mi
    2d78:	4313      	orrmi	r3, r2
    2d7a:	4393      	bicpl	r3, r2
    2d7c:	616b      	str	r3, [r5, #20]
		WRITE_BIT(data->double_edge, curr_pin,
    2d7e:	69ab      	ldr	r3, [r5, #24]
    2d80:	0671      	lsls	r1, r6, #25
    2d82:	bf4c      	ite	mi
    2d84:	4313      	orrmi	r3, r2
    2d86:	4393      	bicpl	r3, r2
    2d88:	61ab      	str	r3, [r5, #24]
		WRITE_BIT(data->active_level, curr_pin,
    2d8a:	692b      	ldr	r3, [r5, #16]
    2d8c:	0770      	lsls	r0, r6, #29
    2d8e:	bf4c      	ite	mi
    2d90:	4313      	orrmi	r3, r2
    2d92:	4393      	bicpl	r3, r2
    2d94:	612b      	str	r3, [r5, #16]
		WRITE_BIT(data->inverted, curr_pin, flags & GPIO_POL_INV);
    2d96:	69eb      	ldr	r3, [r5, #28]
    2d98:	0631      	lsls	r1, r6, #24
    2d9a:	bf4c      	ite	mi
    2d9c:	431a      	orrmi	r2, r3
    2d9e:	ea23 0202 	bicpl.w	r2, r3, r2
    2da2:	61ea      	str	r2, [r5, #28]
		res = gpiote_pin_int_cfg(port, curr_pin);
    2da4:	4621      	mov	r1, r4
    2da6:	4638      	mov	r0, r7
    2da8:	f7ff fece 	bl	2b48 <gpiote_pin_int_cfg>
		if (res != 0) {
    2dac:	2800      	cmp	r0, #0
    2dae:	d1b8      	bne.n	2d22 <gpio_nrfx_config+0x8e>
	for (u8_t curr_pin = from_pin; curr_pin <= to_pin; ++curr_pin) {
    2db0:	3401      	adds	r4, #1
    2db2:	b2e4      	uxtb	r4, r4
    2db4:	e7b2      	b.n	2d1c <gpio_nrfx_config+0x88>
    2db6:	bf00      	nop
    2db8:	50000300 	.word	0x50000300

00002dbc <gpiote_event_handler>:
{
    2dbc:	b5f0      	push	{r4, r5, r6, r7, lr}
	u32_t fired_triggers[GPIO_COUNT] = {0};
    2dbe:	2600      	movs	r6, #0
{
    2dc0:	b085      	sub	sp, #20
	u32_t fired_triggers[GPIO_COUNT] = {0};
    2dc2:	e9cd 6602 	strd	r6, r6, [sp, #8]
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    2dc6:	4d28      	ldr	r5, [pc, #160]	; (2e68 <gpiote_event_handler+0xac>)
    2dc8:	682c      	ldr	r4, [r5, #0]
	if (port_event) {
    2dca:	b15c      	cbz	r4, 2de4 <gpiote_event_handler+0x28>
			check_level_trigger_pins(DEVICE_GET(gpio_nrfx_p0));
    2dcc:	4827      	ldr	r0, [pc, #156]	; (2e6c <gpiote_event_handler+0xb0>)
    2dce:	f002 fcb8 	bl	5742 <check_level_trigger_pins>
		fired_triggers[0] =
    2dd2:	9002      	str	r0, [sp, #8]
			check_level_trigger_pins(DEVICE_GET(gpio_nrfx_p1));
    2dd4:	4826      	ldr	r0, [pc, #152]	; (2e70 <gpiote_event_handler+0xb4>)
    2dd6:	f002 fcb4 	bl	5742 <check_level_trigger_pins>
		fired_triggers[1] =
    2dda:	9003      	str	r0, [sp, #12]
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    2ddc:	602e      	str	r6, [r5, #0]
    volatile uint32_t dummy = *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event));
    2dde:	682b      	ldr	r3, [r5, #0]
    2de0:	9300      	str	r3, [sp, #0]
    (void)dummy;
    2de2:	9b00      	ldr	r3, [sp, #0]
    return p_reg->INTENSET & mask;
    2de4:	4d23      	ldr	r5, [pc, #140]	; (2e74 <gpiote_event_handler+0xb8>)
{
    2de6:	2200      	movs	r2, #0
		if (nrf_gpiote_int_enable_check(NRF_GPIOTE, BIT(i)) &&
    2de8:	2601      	movs	r6, #1
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    2dea:	4694      	mov	ip, r2
    return p_reg->INTENSET & mask;
    2dec:	f8d5 3304 	ldr.w	r3, [r5, #772]	; 0x304
    2df0:	fa06 f102 	lsl.w	r1, r6, r2
    2df4:	4219      	tst	r1, r3
    2df6:	d01d      	beq.n	2e34 <gpiote_event_handler+0x78>
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    2df8:	0091      	lsls	r1, r2, #2
    2dfa:	f101 4180 	add.w	r1, r1, #1073741824	; 0x40000000
    2dfe:	f501 41c2 	add.w	r1, r1, #24832	; 0x6100
    2e02:	680b      	ldr	r3, [r1, #0]
    2e04:	b1b3      	cbz	r3, 2e34 <gpiote_event_handler+0x78>
    return ((p_reg->CONFIG[idx] & GPIOTE_CONFIG_PORT_PIN_Msk) >> GPIOTE_CONFIG_PSEL_Pos);
    2e06:	f502 73a2 	add.w	r3, r2, #324	; 0x144
			fired_triggers[abs_pin / 32U] |= BIT(abs_pin % 32);
    2e0a:	af04      	add	r7, sp, #16
    2e0c:	f855 3023 	ldr.w	r3, [r5, r3, lsl #2]
    *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event)) = 0;
    2e10:	f8c1 c000 	str.w	ip, [r1]
    2e14:	f3c3 3040 	ubfx	r0, r3, #13, #1
    2e18:	eb07 0080 	add.w	r0, r7, r0, lsl #2
    2e1c:	f3c3 2304 	ubfx	r3, r3, #8, #5
    2e20:	f850 7c08 	ldr.w	r7, [r0, #-8]
    2e24:	fa06 f303 	lsl.w	r3, r6, r3
    2e28:	433b      	orrs	r3, r7
    2e2a:	f840 3c08 	str.w	r3, [r0, #-8]
    volatile uint32_t dummy = *((volatile uint32_t *)nrf_gpiote_event_address_get(p_reg, event));
    2e2e:	680b      	ldr	r3, [r1, #0]
    2e30:	9301      	str	r3, [sp, #4]
    (void)dummy;
    2e32:	9b01      	ldr	r3, [sp, #4]
	for (size_t i = 0; i < GPIOTE_CH_NUM; i++) {
    2e34:	3201      	adds	r2, #1
    2e36:	2a08      	cmp	r2, #8
    2e38:	d1d8      	bne.n	2dec <gpiote_event_handler+0x30>
	if (fired_triggers[0]) {
    2e3a:	9902      	ldr	r1, [sp, #8]
    2e3c:	b111      	cbz	r1, 2e44 <gpiote_event_handler+0x88>
		fire_callbacks(DEVICE_GET(gpio_nrfx_p0), fired_triggers[0]);
    2e3e:	480b      	ldr	r0, [pc, #44]	; (2e6c <gpiote_event_handler+0xb0>)
    2e40:	f002 fc6a 	bl	5718 <fire_callbacks>
	if (fired_triggers[1]) {
    2e44:	9903      	ldr	r1, [sp, #12]
    2e46:	b111      	cbz	r1, 2e4e <gpiote_event_handler+0x92>
		fire_callbacks(DEVICE_GET(gpio_nrfx_p1), fired_triggers[1]);
    2e48:	4809      	ldr	r0, [pc, #36]	; (2e70 <gpiote_event_handler+0xb4>)
    2e4a:	f002 fc65 	bl	5718 <fire_callbacks>
	if (port_event) {
    2e4e:	b144      	cbz	r4, 2e62 <gpiote_event_handler+0xa6>
		cfg_level_pins(DEVICE_GET(gpio_nrfx_p0));
    2e50:	4806      	ldr	r0, [pc, #24]	; (2e6c <gpiote_event_handler+0xb0>)
    2e52:	f002 fcc5 	bl	57e0 <cfg_level_pins>
		cfg_level_pins(DEVICE_GET(gpio_nrfx_p1));
    2e56:	4806      	ldr	r0, [pc, #24]	; (2e70 <gpiote_event_handler+0xb4>)
}
    2e58:	b005      	add	sp, #20
    2e5a:	e8bd 40f0 	ldmia.w	sp!, {r4, r5, r6, r7, lr}
		cfg_level_pins(DEVICE_GET(gpio_nrfx_p1));
    2e5e:	f002 bcbf 	b.w	57e0 <cfg_level_pins>
}
    2e62:	b005      	add	sp, #20
    2e64:	bdf0      	pop	{r4, r5, r6, r7, pc}
    2e66:	bf00      	nop
    2e68:	4000617c 	.word	0x4000617c
    2e6c:	200022b4 	.word	0x200022b4
    2e70:	200022c0 	.word	0x200022c0
    2e74:	40006000 	.word	0x40006000

00002e78 <uart_nrfx_err_check>:
    p_reg->INTENCLR = mask;
}

NRF_STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg)
{
    uint32_t errsrc_mask = p_reg->ERRORSRC;
    2e78:	4b02      	ldr	r3, [pc, #8]	; (2e84 <uart_nrfx_err_check+0xc>)
    2e7a:	f8d3 0480 	ldr.w	r0, [r3, #1152]	; 0x480
    p_reg->ERRORSRC = errsrc_mask;
    2e7e:	f8c3 0480 	str.w	r0, [r3, #1152]	; 0x480
/** Console I/O function */
static int uart_nrfx_err_check(struct device *dev)
{
	/* register bitfields maps to the defines in uart.h */
	return nrf_uart_errorsrc_get_and_clear(uart0_addr);
}
    2e82:	4770      	bx	lr
    2e84:	40002000 	.word	0x40002000

00002e88 <uart_nrfx_configure>:

static int uart_nrfx_configure(struct device *dev,
			       const struct uart_config *cfg)
{
    2e88:	b570      	push	{r4, r5, r6, lr}
	nrf_uart_config_t uart_cfg;

#if defined(UART_CONFIG_STOP_Msk)
	switch (cfg->stop_bits) {
    2e8a:	794b      	ldrb	r3, [r1, #5]
    2e8c:	2b01      	cmp	r3, #1
    2e8e:	d026      	beq.n	2ede <uart_nrfx_configure+0x56>
    2e90:	2b03      	cmp	r3, #3
    2e92:	d121      	bne.n	2ed8 <uart_nrfx_configure+0x50>
	case UART_CFG_STOP_BITS_1:
		uart_cfg.stop = NRF_UART_STOP_ONE;
		break;
	case UART_CFG_STOP_BITS_2:
		uart_cfg.stop = NRF_UART_STOP_TWO;
    2e94:	2610      	movs	r6, #16
	if (cfg->stop_bits != UART_CFG_STOP_BITS_1) {
		return -ENOTSUP;
	}
#endif

	if (cfg->data_bits != UART_CFG_DATA_BITS_8) {
    2e96:	798b      	ldrb	r3, [r1, #6]
    2e98:	2b03      	cmp	r3, #3
    2e9a:	d11d      	bne.n	2ed8 <uart_nrfx_configure+0x50>
		return -ENOTSUP;
	}

	switch (cfg->flow_ctrl) {
    2e9c:	79cc      	ldrb	r4, [r1, #7]
    2e9e:	b12c      	cbz	r4, 2eac <uart_nrfx_configure+0x24>
    2ea0:	2c01      	cmp	r4, #1
    2ea2:	d119      	bne.n	2ed8 <uart_nrfx_configure+0x50>
	return dev->config->config_info;
    2ea4:	6803      	ldr	r3, [r0, #0]
	case UART_CFG_FLOW_CTRL_NONE:
		uart_cfg.hwfc = NRF_UART_HWFC_DISABLED;
		break;
	case UART_CFG_FLOW_CTRL_RTS_CTS:
		if (get_dev_config(dev)->rts_cts_pins_set) {
    2ea6:	689b      	ldr	r3, [r3, #8]
    2ea8:	781b      	ldrb	r3, [r3, #0]
    2eaa:	b1ab      	cbz	r3, 2ed8 <uart_nrfx_configure+0x50>
	}

#if defined(UART_CONFIG_PARITYTYPE_Msk)
	uart_cfg.paritytype = NRF_UART_PARITYTYPE_EVEN;
#endif
	switch (cfg->parity) {
    2eac:	790a      	ldrb	r2, [r1, #4]
    2eae:	b112      	cbz	r2, 2eb6 <uart_nrfx_configure+0x2e>
    2eb0:	2a02      	cmp	r2, #2
    2eb2:	d111      	bne.n	2ed8 <uart_nrfx_configure+0x50>
	case UART_CFG_PARITY_NONE:
		uart_cfg.parity = NRF_UART_PARITY_EXCLUDED;
		break;
	case UART_CFG_PARITY_EVEN:
		uart_cfg.parity = NRF_UART_PARITY_INCLUDED;
    2eb4:	220e      	movs	r2, #14
#endif
	default:
		return -ENOTSUP;
	}

	if (baudrate_set(dev, cfg->baudrate) != 0) {
    2eb6:	680b      	ldr	r3, [r1, #0]
	switch (baudrate) {
    2eb8:	f647 2512 	movw	r5, #31250	; 0x7a12
    2ebc:	42ab      	cmp	r3, r5
    2ebe:	d062      	beq.n	2f86 <uart_nrfx_configure+0xfe>
    2ec0:	d829      	bhi.n	2f16 <uart_nrfx_configure+0x8e>
    2ec2:	f5b3 5f96 	cmp.w	r3, #4800	; 0x12c0
    2ec6:	d061      	beq.n	2f8c <uart_nrfx_configure+0x104>
    2ec8:	d814      	bhi.n	2ef4 <uart_nrfx_configure+0x6c>
    2eca:	f5b3 7f16 	cmp.w	r3, #600	; 0x258
    2ece:	d05f      	beq.n	2f90 <uart_nrfx_configure+0x108>
    2ed0:	d807      	bhi.n	2ee2 <uart_nrfx_configure+0x5a>
    2ed2:	f5b3 7f96 	cmp.w	r3, #300	; 0x12c
    2ed6:	d05e      	beq.n	2f96 <uart_nrfx_configure+0x10e>
		return -ENOTSUP;
    2ed8:	f06f 0022 	mvn.w	r0, #34	; 0x22
    2edc:	e052      	b.n	2f84 <uart_nrfx_configure+0xfc>
		uart_cfg.stop = NRF_UART_STOP_ONE;
    2ede:	2600      	movs	r6, #0
    2ee0:	e7d9      	b.n	2e96 <uart_nrfx_configure+0xe>
	switch (baudrate) {
    2ee2:	f5b3 6f96 	cmp.w	r3, #1200	; 0x4b0
    2ee6:	d059      	beq.n	2f9c <uart_nrfx_configure+0x114>
    2ee8:	f5b3 6f16 	cmp.w	r3, #2400	; 0x960
    2eec:	d1f4      	bne.n	2ed8 <uart_nrfx_configure+0x50>
		nrf_baudrate = NRF_UART_BAUDRATE_2400;
    2eee:	f44f 231d 	mov.w	r3, #643072	; 0x9d000
    2ef2:	e03b      	b.n	2f6c <uart_nrfx_configure+0xe4>
	switch (baudrate) {
    2ef4:	f5b3 5f61 	cmp.w	r3, #14400	; 0x3840
    2ef8:	d053      	beq.n	2fa2 <uart_nrfx_configure+0x11a>
    2efa:	d804      	bhi.n	2f06 <uart_nrfx_configure+0x7e>
    2efc:	f5b3 5f16 	cmp.w	r3, #9600	; 0x2580
    2f00:	d1ea      	bne.n	2ed8 <uart_nrfx_configure+0x50>
		nrf_baudrate = NRF_UART_BAUDRATE_9600;
    2f02:	4b31      	ldr	r3, [pc, #196]	; (2fc8 <uart_nrfx_configure+0x140>)
    2f04:	e032      	b.n	2f6c <uart_nrfx_configure+0xe4>
	switch (baudrate) {
    2f06:	f5b3 4f96 	cmp.w	r3, #19200	; 0x4b00
    2f0a:	d04d      	beq.n	2fa8 <uart_nrfx_configure+0x120>
    2f0c:	f5b3 4fe1 	cmp.w	r3, #28800	; 0x7080
    2f10:	d1e2      	bne.n	2ed8 <uart_nrfx_configure+0x50>
		nrf_baudrate = NRF_UART_BAUDRATE_28800;
    2f12:	4b2e      	ldr	r3, [pc, #184]	; (2fcc <uart_nrfx_configure+0x144>)
    2f14:	e02a      	b.n	2f6c <uart_nrfx_configure+0xe4>
	switch (baudrate) {
    2f16:	f5b3 3fe1 	cmp.w	r3, #115200	; 0x1c200
    2f1a:	d047      	beq.n	2fac <uart_nrfx_configure+0x124>
    2f1c:	d811      	bhi.n	2f42 <uart_nrfx_configure+0xba>
    2f1e:	f64d 25c0 	movw	r5, #56000	; 0xdac0
    2f22:	42ab      	cmp	r3, r5
    2f24:	d044      	beq.n	2fb0 <uart_nrfx_configure+0x128>
    2f26:	d804      	bhi.n	2f32 <uart_nrfx_configure+0xaa>
    2f28:	f5b3 4f16 	cmp.w	r3, #38400	; 0x9600
    2f2c:	d1d4      	bne.n	2ed8 <uart_nrfx_configure+0x50>
		nrf_baudrate = NRF_UART_BAUDRATE_38400;
    2f2e:	4b28      	ldr	r3, [pc, #160]	; (2fd0 <uart_nrfx_configure+0x148>)
    2f30:	e01c      	b.n	2f6c <uart_nrfx_configure+0xe4>
	switch (baudrate) {
    2f32:	f5b3 4f61 	cmp.w	r3, #57600	; 0xe100
    2f36:	d03e      	beq.n	2fb6 <uart_nrfx_configure+0x12e>
    2f38:	f5b3 3f96 	cmp.w	r3, #76800	; 0x12c00
    2f3c:	d1cc      	bne.n	2ed8 <uart_nrfx_configure+0x50>
		nrf_baudrate = NRF_UART_BAUDRATE_76800;
    2f3e:	4b25      	ldr	r3, [pc, #148]	; (2fd4 <uart_nrfx_configure+0x14c>)
    2f40:	e014      	b.n	2f6c <uart_nrfx_configure+0xe4>
	switch (baudrate) {
    2f42:	f5b3 2fe1 	cmp.w	r3, #460800	; 0x70800
    2f46:	d038      	beq.n	2fba <uart_nrfx_configure+0x132>
    2f48:	d808      	bhi.n	2f5c <uart_nrfx_configure+0xd4>
    2f4a:	f5b3 3f61 	cmp.w	r3, #230400	; 0x38400
    2f4e:	d036      	beq.n	2fbe <uart_nrfx_configure+0x136>
    2f50:	4d21      	ldr	r5, [pc, #132]	; (2fd8 <uart_nrfx_configure+0x150>)
    2f52:	42ab      	cmp	r3, r5
    2f54:	d1c0      	bne.n	2ed8 <uart_nrfx_configure+0x50>
		nrf_baudrate = NRF_UART_BAUDRATE_250000;
    2f56:	f04f 6380 	mov.w	r3, #67108864	; 0x4000000
    2f5a:	e007      	b.n	2f6c <uart_nrfx_configure+0xe4>
	switch (baudrate) {
    2f5c:	f5b3 2f61 	cmp.w	r3, #921600	; 0xe1000
    2f60:	d02f      	beq.n	2fc2 <uart_nrfx_configure+0x13a>
    2f62:	4d1e      	ldr	r5, [pc, #120]	; (2fdc <uart_nrfx_configure+0x154>)
    2f64:	42ab      	cmp	r3, r5
    2f66:	d1b7      	bne.n	2ed8 <uart_nrfx_configure+0x50>
		nrf_baudrate = NRF_UART_BAUDRATE_1000000;
    2f68:	f04f 5380 	mov.w	r3, #268435456	; 0x10000000
                    | (uint32_t)p_cfg->hwfc;
}

NRF_STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type * p_reg, nrf_uart_baudrate_t baudrate)
{
    p_reg->BAUDRATE = baudrate;
    2f6c:	4d1c      	ldr	r5, [pc, #112]	; (2fe0 <uart_nrfx_configure+0x158>)
                    | (uint32_t)p_cfg->hwfc;
    2f6e:	4334      	orrs	r4, r6
    2f70:	4322      	orrs	r2, r4
    p_reg->BAUDRATE = baudrate;
    2f72:	f8c5 3524 	str.w	r3, [r5, #1316]	; 0x524
    p_reg->CONFIG = (uint32_t)p_cfg->parity
    2f76:	f8c5 256c 	str.w	r2, [r5, #1388]	; 0x56c
		return -ENOTSUP;
	}

	nrf_uart_configure(uart0_addr, &uart_cfg);

	get_dev_data(dev)->uart_config = *cfg;
    2f7a:	6883      	ldr	r3, [r0, #8]
    2f7c:	c903      	ldmia	r1, {r0, r1}
    2f7e:	e883 0003 	stmia.w	r3, {r0, r1}

	return 0;
    2f82:	2000      	movs	r0, #0
}
    2f84:	bd70      	pop	{r4, r5, r6, pc}
		nrf_baudrate = NRF_UART_BAUDRATE_31250;
    2f86:	f44f 0300 	mov.w	r3, #8388608	; 0x800000
    2f8a:	e7ef      	b.n	2f6c <uart_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UART_BAUDRATE_4800;
    2f8c:	4b15      	ldr	r3, [pc, #84]	; (2fe4 <uart_nrfx_configure+0x15c>)
    2f8e:	e7ed      	b.n	2f6c <uart_nrfx_configure+0xe4>
		nrf_baudrate = 0x00027000;
    2f90:	f44f 331c 	mov.w	r3, #159744	; 0x27000
    2f94:	e7ea      	b.n	2f6c <uart_nrfx_configure+0xe4>
		nrf_baudrate = 0x00014000;
    2f96:	f44f 33a0 	mov.w	r3, #81920	; 0x14000
    2f9a:	e7e7      	b.n	2f6c <uart_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UART_BAUDRATE_1200;
    2f9c:	f44f 239e 	mov.w	r3, #323584	; 0x4f000
    2fa0:	e7e4      	b.n	2f6c <uart_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UART_BAUDRATE_14400;
    2fa2:	f44f 136c 	mov.w	r3, #3866624	; 0x3b0000
    2fa6:	e7e1      	b.n	2f6c <uart_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UART_BAUDRATE_19200;
    2fa8:	4b0f      	ldr	r3, [pc, #60]	; (2fe8 <uart_nrfx_configure+0x160>)
    2faa:	e7df      	b.n	2f6c <uart_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UART_BAUDRATE_115200;
    2fac:	4b0f      	ldr	r3, [pc, #60]	; (2fec <uart_nrfx_configure+0x164>)
    2fae:	e7dd      	b.n	2f6c <uart_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UART_BAUDRATE_56000;
    2fb0:	f44f 0365 	mov.w	r3, #15007744	; 0xe50000
    2fb4:	e7da      	b.n	2f6c <uart_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UART_BAUDRATE_57600;
    2fb6:	4b0e      	ldr	r3, [pc, #56]	; (2ff0 <uart_nrfx_configure+0x168>)
    2fb8:	e7d8      	b.n	2f6c <uart_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UART_BAUDRATE_460800;
    2fba:	4b0e      	ldr	r3, [pc, #56]	; (2ff4 <uart_nrfx_configure+0x16c>)
    2fbc:	e7d6      	b.n	2f6c <uart_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UART_BAUDRATE_230400;
    2fbe:	4b0e      	ldr	r3, [pc, #56]	; (2ff8 <uart_nrfx_configure+0x170>)
    2fc0:	e7d4      	b.n	2f6c <uart_nrfx_configure+0xe4>
		nrf_baudrate = NRF_UART_BAUDRATE_921600;
    2fc2:	4b0e      	ldr	r3, [pc, #56]	; (2ffc <uart_nrfx_configure+0x174>)
    2fc4:	e7d2      	b.n	2f6c <uart_nrfx_configure+0xe4>
    2fc6:	bf00      	nop
    2fc8:	00275000 	.word	0x00275000
    2fcc:	0075f000 	.word	0x0075f000
    2fd0:	009d5000 	.word	0x009d5000
    2fd4:	013a9000 	.word	0x013a9000
    2fd8:	0003d090 	.word	0x0003d090
    2fdc:	000f4240 	.word	0x000f4240
    2fe0:	40002000 	.word	0x40002000
    2fe4:	0013b000 	.word	0x0013b000
    2fe8:	004ea000 	.word	0x004ea000
    2fec:	01d7e000 	.word	0x01d7e000
    2ff0:	00ebf000 	.word	0x00ebf000
    2ff4:	075f7000 	.word	0x075f7000
    2ff8:	03afb000 	.word	0x03afb000
    2ffc:	0ebed000 	.word	0x0ebed000

00003000 <uart_nrfx_poll_in>:
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    3000:	4b08      	ldr	r3, [pc, #32]	; (3024 <uart_nrfx_poll_in+0x24>)
    3002:	681a      	ldr	r2, [r3, #0]
{
    3004:	b082      	sub	sp, #8
	if (!nrf_uart_event_check(uart0_addr, NRF_UART_EVENT_RXDRDY)) {
    3006:	b152      	cbz	r2, 301e <uart_nrfx_poll_in+0x1e>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    3008:	2000      	movs	r0, #0
    300a:	6018      	str	r0, [r3, #0]
    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
    300c:	681b      	ldr	r3, [r3, #0]
    300e:	9301      	str	r3, [sp, #4]
    (void)dummy;
    3010:	9b01      	ldr	r3, [sp, #4]
    return p_reg->RXD;
    3012:	4b05      	ldr	r3, [pc, #20]	; (3028 <uart_nrfx_poll_in+0x28>)
    3014:	f8d3 3518 	ldr.w	r3, [r3, #1304]	; 0x518
    3018:	700b      	strb	r3, [r1, #0]
}
    301a:	b002      	add	sp, #8
    301c:	4770      	bx	lr
		return -1;
    301e:	f04f 30ff 	mov.w	r0, #4294967295
    3022:	e7fa      	b.n	301a <uart_nrfx_poll_in+0x1a>
    3024:	40002108 	.word	0x40002108
    3028:	40002000 	.word	0x40002000

0000302c <uart_nrfx_poll_out>:
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    302c:	4b09      	ldr	r3, [pc, #36]	; (3054 <uart_nrfx_poll_out+0x28>)
    302e:	2200      	movs	r2, #0
    3030:	601a      	str	r2, [r3, #0]
{
    3032:	b082      	sub	sp, #8
    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
    3034:	681a      	ldr	r2, [r3, #0]
    3036:	9201      	str	r2, [sp, #4]
    (void)dummy;
    3038:	9a01      	ldr	r2, [sp, #4]
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    303a:	4a07      	ldr	r2, [pc, #28]	; (3058 <uart_nrfx_poll_out+0x2c>)
    303c:	2001      	movs	r0, #1
    303e:	6010      	str	r0, [r2, #0]
    p_reg->TXD = txd;
    3040:	f8c2 1514 	str.w	r1, [r2, #1300]	; 0x514
    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
    3044:	681a      	ldr	r2, [r3, #0]
	while (!event_txdrdy_check()) {
    3046:	2a00      	cmp	r2, #0
    3048:	d0fc      	beq.n	3044 <uart_nrfx_poll_out+0x18>
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    304a:	4b04      	ldr	r3, [pc, #16]	; (305c <uart_nrfx_poll_out+0x30>)
    304c:	2201      	movs	r2, #1
    304e:	601a      	str	r2, [r3, #0]
}
    3050:	b002      	add	sp, #8
    3052:	4770      	bx	lr
    3054:	4000211c 	.word	0x4000211c
    3058:	40002008 	.word	0x40002008
    305c:	4000200c 	.word	0x4000200c

00003060 <uart_nrfx_init>:
}


NRF_STATIC_INLINE void nrf_gpio_port_out_set(NRF_GPIO_Type * p_reg, uint32_t set_mask)
{
    p_reg->OUTSET = set_mask;
    3060:	f04f 43a0 	mov.w	r3, #1342177280	; 0x50000000
 * @param dev UART device struct
 *
 * @return 0 on success
 */
static int uart_nrfx_init(struct device *dev)
{
    3064:	b537      	push	{r0, r1, r2, r4, r5, lr}
    p_reg->PSEL.RXD = pselrxd;
    3066:	4c16      	ldr	r4, [pc, #88]	; (30c0 <uart_nrfx_init+0x60>)
    3068:	2240      	movs	r2, #64	; 0x40
    306a:	f8c3 2508 	str.w	r2, [r3, #1288]	; 0x508
    reg->PIN_CNF[pin_number] = ((uint32_t)dir << GPIO_PIN_CNF_DIR_Pos)
    306e:	2103      	movs	r1, #3
    3070:	2200      	movs	r2, #0
    3072:	2508      	movs	r5, #8
    3074:	f8c3 1718 	str.w	r1, [r3, #1816]	; 0x718
    3078:	f8c3 2720 	str.w	r2, [r3, #1824]	; 0x720
    307c:	f8c4 5514 	str.w	r5, [r4, #1300]	; 0x514
    p_reg->PSEL.TXD = pseltxd;
    3080:	2506      	movs	r5, #6
    3082:	f8c4 550c 	str.w	r5, [r4, #1292]	; 0x50c
    p_reg->OUTSET = set_mask;
    3086:	2520      	movs	r5, #32
    3088:	f8c3 5508 	str.w	r5, [r3, #1288]	; 0x508
    reg->PIN_CNF[pin_number] = ((uint32_t)dir << GPIO_PIN_CNF_DIR_Pos)
    308c:	f8c3 1714 	str.w	r1, [r3, #1812]	; 0x714
    3090:	f8c3 271c 	str.w	r2, [r3, #1820]	; 0x71c
    p_reg->PSEL.RTS = pselrts;
    3094:	2305      	movs	r3, #5
    3096:	f8c4 3508 	str.w	r3, [r4, #1288]	; 0x508
    p_reg->PSEL.CTS = pselcts;
    309a:	2307      	movs	r3, #7
    309c:	f8c4 3510 	str.w	r3, [r4, #1296]	; 0x510
			       DT_NORDIC_NRF_UART_UART_0_RTS_PIN,
			       DT_NORDIC_NRF_UART_UART_0_CTS_PIN);
#endif

	/* Set initial configuration */
	err = uart_nrfx_configure(dev, &get_dev_data(dev)->uart_config);
    30a0:	6881      	ldr	r1, [r0, #8]
    30a2:	f7ff fef1 	bl	2e88 <uart_nrfx_configure>
	if (err) {
    30a6:	b948      	cbnz	r0, 30bc <uart_nrfx_init+0x5c>
    p_reg->ENABLE = UART_ENABLE_ENABLE_Enabled;
    30a8:	2304      	movs	r3, #4
    30aa:	f8c4 3500 	str.w	r3, [r4, #1280]	; 0x500
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    30ae:	4b05      	ldr	r3, [pc, #20]	; (30c4 <uart_nrfx_init+0x64>)
    30b0:	6018      	str	r0, [r3, #0]
    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
    30b2:	681b      	ldr	r3, [r3, #0]
    30b4:	9301      	str	r3, [sp, #4]
    (void)dummy;
    30b6:	9b01      	ldr	r3, [sp, #4]
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    30b8:	2301      	movs	r3, #1
    30ba:	6023      	str	r3, [r4, #0]
	defined(DT_NORDIC_NRF_UART_UART_0_CTS_PIN)
	k_delayed_work_init(&uart0_cb.tx_timeout_work, tx_timeout);
#endif
#endif
	return 0;
}
    30bc:	b003      	add	sp, #12
    30be:	bd30      	pop	{r4, r5, pc}
    30c0:	40002000 	.word	0x40002000
    30c4:	40002108 	.word	0x40002108

000030c8 <k_sys_fatal_error_handler>:

extern void sys_arch_reboot(int type);

void k_sys_fatal_error_handler(unsigned int reason,
			       const z_arch_esf_t *esf)
{
    30c8:	b508      	push	{r3, lr}
	z_impl_log_panic();
    30ca:	f7fd fcbd 	bl	a48 <z_impl_log_panic>
	ARG_UNUSED(esf);
	ARG_UNUSED(reason);

	LOG_PANIC();

	LOG_ERR("Resetting system");
    30ce:	2301      	movs	r3, #1
    30d0:	f04f 0100 	mov.w	r1, #0
    30d4:	f363 0107 	bfi	r1, r3, #0, #8
    30d8:	4a05      	ldr	r2, [pc, #20]	; (30f0 <k_sys_fatal_error_handler+0x28>)
    30da:	4b06      	ldr	r3, [pc, #24]	; (30f4 <k_sys_fatal_error_handler+0x2c>)
    30dc:	4806      	ldr	r0, [pc, #24]	; (30f8 <k_sys_fatal_error_handler+0x30>)
    30de:	1a9b      	subs	r3, r3, r2
    30e0:	08db      	lsrs	r3, r3, #3
    30e2:	f363 118f 	bfi	r1, r3, #6, #10
    30e6:	f001 fdc9 	bl	4c7c <log_0>
	sys_arch_reboot(0);
    30ea:	2000      	movs	r0, #0
    30ec:	f7ff fce0 	bl	2ab0 <sys_arch_reboot>

	CODE_UNREACHABLE;
    30f0:	00005da0 	.word	0x00005da0
    30f4:	00005da8 	.word	0x00005da8
    30f8:	000066d2 	.word	0x000066d2

000030fc <nrf52_errata_136>:
         || defined (NRF52833_XXAA) || defined (DEVELOP_IN_NRF52833)\
         || defined (NRF52840_XXAA) || defined (DEVELOP_IN_NRF52840)
            uint32_t var1;
            uint32_t var2;

            if (*(uint32_t *)0x10000130ul == 0xFFFFFFFF)
    30fc:	4b0a      	ldr	r3, [pc, #40]	; (3128 <nrf52_errata_136+0x2c>)
    30fe:	681b      	ldr	r3, [r3, #0]
    3100:	1c5a      	adds	r2, r3, #1
            {
                var1 = ((*(uint32_t *)0xF0000FE0ul) & 0x000000FFul);
    3102:	bf05      	ittet	eq
    3104:	4b09      	ldreq	r3, [pc, #36]	; (312c <nrf52_errata_136+0x30>)
                var2 = ((*(uint32_t *)0xF0000FE8ul) & 0x000000F0ul) >> 4;
    3106:	4a0a      	ldreq	r2, [pc, #40]	; (3130 <nrf52_errata_136+0x34>)
            }
            else
            {
                var1 = *(uint32_t *)0x10000130ul;
                var2 = *(uint32_t *)0x10000134ul;
    3108:	4a0a      	ldrne	r2, [pc, #40]	; (3134 <nrf52_errata_136+0x38>)
                var2 = ((*(uint32_t *)0xF0000FE8ul) & 0x000000F0ul) >> 4;
    310a:	6810      	ldreq	r0, [r2, #0]
                var1 = ((*(uint32_t *)0xF0000FE0ul) & 0x000000FFul);
    310c:	bf0a      	itet	eq
    310e:	781b      	ldrbeq	r3, [r3, #0]
                var2 = *(uint32_t *)0x10000134ul;
    3110:	6810      	ldrne	r0, [r2, #0]
                var2 = ((*(uint32_t *)0xF0000FE8ul) & 0x000000F0ul) >> 4;
    3112:	f3c0 1003 	ubfxeq	r0, r0, #4, #4
                        return true;
                }
            }
        #endif
        #if defined (NRF52840_XXAA) || defined (DEVELOP_IN_NRF52840)
            if (var1 == 0x08)
    3116:	2b08      	cmp	r3, #8
    3118:	d104      	bne.n	3124 <nrf52_errata_136+0x28>
            {
                switch(var2)
    311a:	2803      	cmp	r0, #3
    311c:	bf8c      	ite	hi
    311e:	2000      	movhi	r0, #0
    3120:	2001      	movls	r0, #1
    3122:	4770      	bx	lr
                    case 0x00ul:
                        return true;
                }
            }
        #endif
        return false;
    3124:	2000      	movs	r0, #0
    #endif
}
    3126:	4770      	bx	lr
    3128:	10000130 	.word	0x10000130
    312c:	f0000fe0 	.word	0xf0000fe0
    3130:	f0000fe8 	.word	0xf0000fe8
    3134:	10000134 	.word	0x10000134

00003138 <nrf52_errata_103>:
    #ifndef NRF52_SERIES
        return false;
    #else
        #if defined (NRF52840_XXAA) || defined (DEVELOP_IN_NRF52840)
            uint32_t var1 = *(uint32_t *)0x10000130ul;
            uint32_t var2 = *(uint32_t *)0x10000134ul;
    3138:	4b05      	ldr	r3, [pc, #20]	; (3150 <nrf52_errata_103+0x18>)
    313a:	6818      	ldr	r0, [r3, #0]
            uint32_t var1 = *(uint32_t *)0x10000130ul;
    313c:	3b04      	subs	r3, #4
        #endif
        #if defined (NRF52840_XXAA) || defined (DEVELOP_IN_NRF52840)
            if (var1 == 0x08)
    313e:	681b      	ldr	r3, [r3, #0]
    3140:	2b08      	cmp	r3, #8
            {
                switch(var2)
    3142:	bf06      	itte	eq
    3144:	fab0 f080 	clzeq	r0, r0
    3148:	0940      	lsreq	r0, r0, #5
                    case 0x03ul:
                        return false;
                }
            }
        #endif
        return false;
    314a:	2000      	movne	r0, #0
    #endif
}
    314c:	4770      	bx	lr
    314e:	bf00      	nop
    3150:	10000134 	.word	0x10000134

00003154 <SystemInit>:
{
    SystemCoreClock = __SYSTEM_CLOCK_64M;
}

void SystemInit(void)
{
    3154:	b508      	push	{r3, lr}
        NRF_P1->PIN_CNF[9]  = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
    #endif
    
    /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
       for your device located at https://infocenter.nordicsemi.com/index.jsp  */
    if (nrf52_errata_36()){
    3156:	f7ff ffd1 	bl	30fc <nrf52_errata_136>
    315a:	b140      	cbz	r0, 316e <SystemInit+0x1a>
        NRF_CLOCK->EVENTS_DONE = 0;
    315c:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    3160:	2200      	movs	r2, #0
    3162:	f8c3 210c 	str.w	r2, [r3, #268]	; 0x10c
        NRF_CLOCK->EVENTS_CTTO = 0;
    3166:	f8c3 2110 	str.w	r2, [r3, #272]	; 0x110
        NRF_CLOCK->CTIV = 0;
    316a:	f8c3 2538 	str.w	r2, [r3, #1336]	; 0x538
    }
    
    /* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
       for your device located at https://infocenter.nordicsemi.com/index.jsp  */
    if (nrf52_errata_66()){
    316e:	f7ff ffc5 	bl	30fc <nrf52_errata_136>
    3172:	2800      	cmp	r0, #0
    3174:	d046      	beq.n	3204 <SystemInit+0xb0>
        NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
    3176:	f04f 5280 	mov.w	r2, #268435456	; 0x10000000
    317a:	4b58      	ldr	r3, [pc, #352]	; (32dc <SystemInit+0x188>)
    317c:	f8d2 1404 	ldr.w	r1, [r2, #1028]	; 0x404
    3180:	f8c3 1520 	str.w	r1, [r3, #1312]	; 0x520
        NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
    3184:	f8d2 1408 	ldr.w	r1, [r2, #1032]	; 0x408
    3188:	f8c3 1524 	str.w	r1, [r3, #1316]	; 0x524
        NRF_TEMP->A2 = NRF_FICR->TEMP.A2;
    318c:	f8d2 140c 	ldr.w	r1, [r2, #1036]	; 0x40c
    3190:	f8c3 1528 	str.w	r1, [r3, #1320]	; 0x528
        NRF_TEMP->A3 = NRF_FICR->TEMP.A3;
    3194:	f8d2 1410 	ldr.w	r1, [r2, #1040]	; 0x410
    3198:	f8c3 152c 	str.w	r1, [r3, #1324]	; 0x52c
        NRF_TEMP->A4 = NRF_FICR->TEMP.A4;
    319c:	f8d2 1414 	ldr.w	r1, [r2, #1044]	; 0x414
    31a0:	f8c3 1530 	str.w	r1, [r3, #1328]	; 0x530
        NRF_TEMP->A5 = NRF_FICR->TEMP.A5;
    31a4:	f8d2 1418 	ldr.w	r1, [r2, #1048]	; 0x418
    31a8:	f8c3 1534 	str.w	r1, [r3, #1332]	; 0x534
        NRF_TEMP->B0 = NRF_FICR->TEMP.B0;
    31ac:	f8d2 141c 	ldr.w	r1, [r2, #1052]	; 0x41c
    31b0:	f8c3 1540 	str.w	r1, [r3, #1344]	; 0x540
        NRF_TEMP->B1 = NRF_FICR->TEMP.B1;
    31b4:	f8d2 1420 	ldr.w	r1, [r2, #1056]	; 0x420
    31b8:	f8c3 1544 	str.w	r1, [r3, #1348]	; 0x544
        NRF_TEMP->B2 = NRF_FICR->TEMP.B2;
    31bc:	f8d2 1424 	ldr.w	r1, [r2, #1060]	; 0x424
    31c0:	f8c3 1548 	str.w	r1, [r3, #1352]	; 0x548
        NRF_TEMP->B3 = NRF_FICR->TEMP.B3;
    31c4:	f8d2 1428 	ldr.w	r1, [r2, #1064]	; 0x428
    31c8:	f8c3 154c 	str.w	r1, [r3, #1356]	; 0x54c
        NRF_TEMP->B4 = NRF_FICR->TEMP.B4;
    31cc:	f8d2 142c 	ldr.w	r1, [r2, #1068]	; 0x42c
    31d0:	f8c3 1550 	str.w	r1, [r3, #1360]	; 0x550
        NRF_TEMP->B5 = NRF_FICR->TEMP.B5;
    31d4:	f8d2 1430 	ldr.w	r1, [r2, #1072]	; 0x430
    31d8:	f8c3 1554 	str.w	r1, [r3, #1364]	; 0x554
        NRF_TEMP->T0 = NRF_FICR->TEMP.T0;
    31dc:	f8d2 1434 	ldr.w	r1, [r2, #1076]	; 0x434
    31e0:	f8c3 1560 	str.w	r1, [r3, #1376]	; 0x560
        NRF_TEMP->T1 = NRF_FICR->TEMP.T1;
    31e4:	f8d2 1438 	ldr.w	r1, [r2, #1080]	; 0x438
    31e8:	f8c3 1564 	str.w	r1, [r3, #1380]	; 0x564
        NRF_TEMP->T2 = NRF_FICR->TEMP.T2;
    31ec:	f8d2 143c 	ldr.w	r1, [r2, #1084]	; 0x43c
    31f0:	f8c3 1568 	str.w	r1, [r3, #1384]	; 0x568
        NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
    31f4:	f8d2 1440 	ldr.w	r1, [r2, #1088]	; 0x440
    31f8:	f8c3 156c 	str.w	r1, [r3, #1388]	; 0x56c
        NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
    31fc:	f8d2 2444 	ldr.w	r2, [r2, #1092]	; 0x444
    3200:	f8c3 2570 	str.w	r2, [r3, #1392]	; 0x570
    }
    
    /* Workaround for Errata 98 "NFCT: Not able to communicate with the peer" found at the Errata document
       for your device located at https://infocenter.nordicsemi.com/index.jsp  */
    if (nrf52_errata_98()){
    3204:	f7ff ff98 	bl	3138 <nrf52_errata_103>
    3208:	b110      	cbz	r0, 3210 <SystemInit+0xbc>
        *(volatile uint32_t *)0x4000568Cul = 0x00038148ul;
    320a:	4b35      	ldr	r3, [pc, #212]	; (32e0 <SystemInit+0x18c>)
    320c:	4a35      	ldr	r2, [pc, #212]	; (32e4 <SystemInit+0x190>)
    320e:	601a      	str	r2, [r3, #0]
    }
    
    /* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document
       for your device located at https://infocenter.nordicsemi.com/index.jsp  */
    if (nrf52_errata_103()){
    3210:	f7ff ff92 	bl	3138 <nrf52_errata_103>
    3214:	b118      	cbz	r0, 321e <SystemInit+0xca>
        NRF_CCM->MAXPACKETSIZE = 0xFBul;
    3216:	4b34      	ldr	r3, [pc, #208]	; (32e8 <SystemInit+0x194>)
    3218:	22fb      	movs	r2, #251	; 0xfb
    321a:	f8c3 2518 	str.w	r2, [r3, #1304]	; 0x518
    }
    
    /* Workaround for Errata 115 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
       for your device located at https://infocenter.nordicsemi.com/index.jsp  */
    if (nrf52_errata_115()){
    321e:	f7ff ff8b 	bl	3138 <nrf52_errata_103>
    3222:	b148      	cbz	r0, 3238 <SystemInit+0xe4>
        *(volatile uint32_t *)0x40000EE4ul = (*(volatile uint32_t *)0x40000EE4ul & 0xFFFFFFF0ul) | (*(uint32_t *)0x10000258ul & 0x0000000Ful);
    3224:	4931      	ldr	r1, [pc, #196]	; (32ec <SystemInit+0x198>)
    3226:	4b32      	ldr	r3, [pc, #200]	; (32f0 <SystemInit+0x19c>)
    3228:	680a      	ldr	r2, [r1, #0]
    322a:	681b      	ldr	r3, [r3, #0]
    322c:	f022 020f 	bic.w	r2, r2, #15
    3230:	f003 030f 	and.w	r3, r3, #15
    3234:	4313      	orrs	r3, r2
    3236:	600b      	str	r3, [r1, #0]
    }
    
    /* Workaround for Errata 120 "QSPI: Data read or written is corrupted" found at the Errata document
       for your device located at https://infocenter.nordicsemi.com/index.jsp  */
    if (nrf52_errata_120()){
    3238:	f7ff ff7e 	bl	3138 <nrf52_errata_103>
    323c:	b118      	cbz	r0, 3246 <SystemInit+0xf2>
        *(volatile uint32_t *)0x40029640ul = 0x200ul;
    323e:	4b2d      	ldr	r3, [pc, #180]	; (32f4 <SystemInit+0x1a0>)
    3240:	f44f 7200 	mov.w	r2, #512	; 0x200
    3244:	601a      	str	r2, [r3, #0]
    }
    
    /* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
       for your device located at https://infocenter.nordicsemi.com/index.jsp  */
    if (nrf52_errata_136()){
    3246:	f7ff ff59 	bl	30fc <nrf52_errata_136>
    324a:	b148      	cbz	r0, 3260 <SystemInit+0x10c>
        if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
    324c:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    3250:	f8d3 2400 	ldr.w	r2, [r3, #1024]	; 0x400
    3254:	07d2      	lsls	r2, r2, #31
            NRF_POWER->RESETREAS =  ~POWER_RESETREAS_RESETPIN_Msk;
    3256:	bf44      	itt	mi
    3258:	f06f 0201 	mvnmi.w	r2, #1
    325c:	f8c3 2400 	strmi.w	r2, [r3, #1024]	; 0x400

    /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
      defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
      reserved for PinReset and not available as normal GPIO. */
    #if defined (CONFIG_GPIO_AS_PINRESET)
        if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
    3260:	f04f 2310 	mov.w	r3, #268439552	; 0x10001000
    3264:	f8d3 2200 	ldr.w	r2, [r3, #512]	; 0x200
    3268:	2a00      	cmp	r2, #0
    326a:	db03      	blt.n	3274 <SystemInit+0x120>
            ((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
    326c:	f8d3 3204 	ldr.w	r3, [r3, #516]	; 0x204
        if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
    3270:	2b00      	cmp	r3, #0
    3272:	da2f      	bge.n	32d4 <SystemInit+0x180>
            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
    3274:	4b20      	ldr	r3, [pc, #128]	; (32f8 <SystemInit+0x1a4>)
    3276:	2201      	movs	r2, #1
    3278:	f8c3 2504 	str.w	r2, [r3, #1284]	; 0x504
            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
    327c:	f8d3 2400 	ldr.w	r2, [r3, #1024]	; 0x400
    3280:	2a00      	cmp	r2, #0
    3282:	d0fb      	beq.n	327c <SystemInit+0x128>
            NRF_UICR->PSELRESET[0] = 18;
    3284:	f04f 2210 	mov.w	r2, #268439552	; 0x10001000
    3288:	2112      	movs	r1, #18
    328a:	f8c2 1200 	str.w	r1, [r2, #512]	; 0x200
            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
    328e:	f8d3 2400 	ldr.w	r2, [r3, #1024]	; 0x400
    3292:	2a00      	cmp	r2, #0
    3294:	d0fb      	beq.n	328e <SystemInit+0x13a>
            NRF_UICR->PSELRESET[1] = 18;
    3296:	f04f 2310 	mov.w	r3, #268439552	; 0x10001000
    329a:	2212      	movs	r2, #18
    329c:	f8c3 2204 	str.w	r2, [r3, #516]	; 0x204
            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
    32a0:	4b15      	ldr	r3, [pc, #84]	; (32f8 <SystemInit+0x1a4>)
    32a2:	461a      	mov	r2, r3
    32a4:	f8d3 1400 	ldr.w	r1, [r3, #1024]	; 0x400
    32a8:	2900      	cmp	r1, #0
    32aa:	d0fb      	beq.n	32a4 <SystemInit+0x150>
            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
    32ac:	2100      	movs	r1, #0
    32ae:	f8c3 1504 	str.w	r1, [r3, #1284]	; 0x504
            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
    32b2:	f8d2 3400 	ldr.w	r3, [r2, #1024]	; 0x400
    32b6:	2b00      	cmp	r3, #0
    32b8:	d0fb      	beq.n	32b2 <SystemInit+0x15e>
    32ba:	f3bf 8f4f 	dsb	sy
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
    32be:	490f      	ldr	r1, [pc, #60]	; (32fc <SystemInit+0x1a8>)
    32c0:	4b0f      	ldr	r3, [pc, #60]	; (3300 <SystemInit+0x1ac>)
    32c2:	68ca      	ldr	r2, [r1, #12]
    32c4:	f402 62e0 	and.w	r2, r2, #1792	; 0x700
    32c8:	4313      	orrs	r3, r2
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
    32ca:	60cb      	str	r3, [r1, #12]
    32cc:	f3bf 8f4f 	dsb	sy
    __NOP();
    32d0:	bf00      	nop
    32d2:	e7fd      	b.n	32d0 <SystemInit+0x17c>
    SystemCoreClock = __SYSTEM_CLOCK_64M;
    32d4:	4b0b      	ldr	r3, [pc, #44]	; (3304 <SystemInit+0x1b0>)
    32d6:	4a0c      	ldr	r2, [pc, #48]	; (3308 <SystemInit+0x1b4>)
    32d8:	601a      	str	r2, [r3, #0]
            NVIC_SystemReset();
        }
    #endif

    SystemCoreClockUpdate();
}
    32da:	bd08      	pop	{r3, pc}
    32dc:	4000c000 	.word	0x4000c000
    32e0:	4000568c 	.word	0x4000568c
    32e4:	00038148 	.word	0x00038148
    32e8:	4000f000 	.word	0x4000f000
    32ec:	40000ee4 	.word	0x40000ee4
    32f0:	10000258 	.word	0x10000258
    32f4:	40029640 	.word	0x40029640
    32f8:	4001e000 	.word	0x4001e000
    32fc:	e000ed00 	.word	0xe000ed00
    3300:	05fa0004 	.word	0x05fa0004
    3304:	200021e4 	.word	0x200021e4
    3308:	03d09000 	.word	0x03d09000

0000330c <nrfx_wdt_init>:
static wdt_control_block_t m_cb[NRFX_WDT_ENABLED_COUNT];

nrfx_err_t nrfx_wdt_init(nrfx_wdt_t const *        p_instance,
                         nrfx_wdt_config_t const * p_config,
                         nrfx_wdt_event_handler_t  wdt_event_handler)
{
    330c:	b570      	push	{r4, r5, r6, lr}
    wdt_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];

#if NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ)
    (void)wdt_event_handler;
#else
    p_cb->wdt_event_handler = wdt_event_handler;
    330e:	4b12      	ldr	r3, [pc, #72]	; (3358 <nrfx_wdt_init+0x4c>)
{
    3310:	4616      	mov	r6, r2
    wdt_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
    3312:	7902      	ldrb	r2, [r0, #4]
    p_cb->wdt_event_handler = wdt_event_handler;
    3314:	eb03 04c2 	add.w	r4, r3, r2, lsl #3
    3318:	6066      	str	r6, [r4, #4]
#endif

    if (p_cb->state == NRFX_DRV_STATE_UNINITIALIZED)
    331a:	f813 4032 	ldrb.w	r4, [r3, r2, lsl #3]
    331e:	b9cc      	cbnz	r4, 3354 <nrfx_wdt_init+0x48>
    {
        p_cb->state = NRFX_DRV_STATE_INITIALIZED;
    3320:	2501      	movs	r5, #1
    3322:	f803 5032 	strb.w	r5, [r3, r2, lsl #3]
                         __func__,
                         NRFX_LOG_ERROR_STRING_GET(err_code));
        return err_code;
    }

    nrf_wdt_behaviour_set(p_instance->p_reg, p_config->behaviour);
    3326:	6804      	ldr	r4, [r0, #0]
    p_reg->CONFIG = behaviour;
    3328:	780b      	ldrb	r3, [r1, #0]

    uint64_t ticks = (p_config->reload_value * 32768ULL) / 1000;
    332a:	6849      	ldr	r1, [r1, #4]
    332c:	f8c4 350c 	str.w	r3, [r4, #1292]	; 0x50c
    3330:	03c8      	lsls	r0, r1, #15
    3332:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
    3336:	2300      	movs	r3, #0
    3338:	0c49      	lsrs	r1, r1, #17
    333a:	f7fc fee1 	bl	100 <__aeabi_uldivmod>
}

NRF_STATIC_INLINE void nrf_wdt_reload_value_set(NRF_WDT_Type * p_reg, uint32_t reload_value)
{
    p_reg->CRV = reload_value;
    333e:	f8c4 0504 	str.w	r0, [r4, #1284]	; 0x504
    NRFX_ASSERT(ticks <= UINT32_MAX);

    nrf_wdt_reload_value_set(p_instance->p_reg, (uint32_t) ticks);

#if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ)
    if (wdt_event_handler)
    3342:	b12e      	cbz	r6, 3350 <nrfx_wdt_init+0x44>
    p_reg->INTENSET = mask;
    3344:	f8c4 5304 	str.w	r5, [r4, #772]	; 0x304
    {
        nrf_wdt_int_enable(p_instance->p_reg, NRF_WDT_INT_TIMEOUT_MASK);
        NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_instance->p_reg), p_config->interrupt_priority);
        NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_instance->p_reg));
    3348:	f344 3007 	sbfx	r0, r4, #12, #8
    334c:	f7fe f9f2 	bl	1734 <arch_irq_enable>
    }
#endif

    err_code = NRFX_SUCCESS;
    NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
    return err_code;
    3350:	4802      	ldr	r0, [pc, #8]	; (335c <nrfx_wdt_init+0x50>)
    3352:	e000      	b.n	3356 <nrfx_wdt_init+0x4a>
        return err_code;
    3354:	4802      	ldr	r0, [pc, #8]	; (3360 <nrfx_wdt_init+0x54>)
}
    3356:	bd70      	pop	{r4, r5, r6, pc}
    3358:	2000076c 	.word	0x2000076c
    335c:	0bad0000 	.word	0x0bad0000
    3360:	0bad0005 	.word	0x0bad0005

00003364 <nrfx_wdt_enable>:
void nrfx_wdt_enable(nrfx_wdt_t const * p_instance)
{
    wdt_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
    NRFX_ASSERT(p_cb->alloc_index != 0);
    NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED);
    nrf_wdt_task_trigger(p_instance->p_reg, NRF_WDT_TASK_START);
    3364:	6803      	ldr	r3, [r0, #0]
    wdt_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
    3366:	7902      	ldrb	r2, [r0, #4]
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x01UL;
    3368:	2101      	movs	r1, #1
    336a:	6019      	str	r1, [r3, #0]
    p_cb->state = NRFX_DRV_STATE_POWERED_ON;
    336c:	4b02      	ldr	r3, [pc, #8]	; (3378 <nrfx_wdt_enable+0x14>)
    336e:	2102      	movs	r1, #2
    3370:	f803 1032 	strb.w	r1, [r3, r2, lsl #3]
    NRFX_LOG_INFO("Enabled.");
}
    3374:	4770      	bx	lr
    3376:	bf00      	nop
    3378:	2000076c 	.word	0x2000076c

0000337c <nrfx_wdt_channel_alloc>:
        nrf_wdt_reload_request_set(p_instance->p_reg, (nrf_wdt_rr_register_t)(NRF_WDT_RR0 + i));
    }
}

nrfx_err_t nrfx_wdt_channel_alloc(nrfx_wdt_t const * p_instance, nrfx_wdt_channel_id * p_channel_id)
{
    337c:	b510      	push	{r4, lr}
    nrfx_err_t result;
    wdt_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
    337e:	7902      	ldrb	r2, [r0, #4]
	__asm__ volatile(
    3380:	f04f 0320 	mov.w	r3, #32
    3384:	f3ef 8411 	mrs	r4, BASEPRI
    3388:	f383 8811 	msr	BASEPRI, r3
    338c:	f3bf 8f6f 	isb	sy

    NRFX_ASSERT(p_channel_id);
    NRFX_ASSERT(p_cb->state == NRFX_DRV_STATE_INITIALIZED);

    NRFX_CRITICAL_SECTION_ENTER();
    if (p_cb->alloc_index < NRF_WDT_CHANNEL_NUMBER)
    3390:	4b0c      	ldr	r3, [pc, #48]	; (33c4 <nrfx_wdt_channel_alloc+0x48>)
    3392:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
    3396:	785a      	ldrb	r2, [r3, #1]
    3398:	2a07      	cmp	r2, #7
    339a:	d810      	bhi.n	33be <nrfx_wdt_channel_alloc+0x42>
    {
        *p_channel_id = (nrfx_wdt_channel_id)(NRF_WDT_RR0 + p_cb->alloc_index);
    339c:	700a      	strb	r2, [r1, #0]
        p_cb->alloc_index++;
    339e:	1c51      	adds	r1, r2, #1
    33a0:	7059      	strb	r1, [r3, #1]
        nrf_wdt_reload_request_enable(p_instance->p_reg, *p_channel_id);
    33a2:	6801      	ldr	r1, [r0, #0]
}

NRF_STATIC_INLINE void nrf_wdt_reload_request_enable(NRF_WDT_Type *        p_reg,
                                                     nrf_wdt_rr_register_t rr_register)
{
    p_reg->RREN |= 0x1UL << rr_register;
    33a4:	2301      	movs	r3, #1
    33a6:	f8d1 0508 	ldr.w	r0, [r1, #1288]	; 0x508
    33aa:	4093      	lsls	r3, r2
    33ac:	4303      	orrs	r3, r0
        result = NRFX_SUCCESS;
    33ae:	4806      	ldr	r0, [pc, #24]	; (33c8 <nrfx_wdt_channel_alloc+0x4c>)
    33b0:	f8c1 3508 	str.w	r3, [r1, #1288]	; 0x508
	__asm__ volatile(
    33b4:	f384 8811 	msr	BASEPRI, r4
    33b8:	f3bf 8f6f 	isb	sy
        result = NRFX_ERROR_NO_MEM;
    }
    NRFX_CRITICAL_SECTION_EXIT();
    NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(result));
    return result;
}
    33bc:	bd10      	pop	{r4, pc}
        result = NRFX_ERROR_NO_MEM;
    33be:	4803      	ldr	r0, [pc, #12]	; (33cc <nrfx_wdt_channel_alloc+0x50>)
    33c0:	e7f8      	b.n	33b4 <nrfx_wdt_channel_alloc+0x38>
    33c2:	bf00      	nop
    33c4:	2000076c 	.word	0x2000076c
    33c8:	0bad0000 	.word	0x0bad0000
    33cc:	0bad0002 	.word	0x0bad0002

000033d0 <nrfx_wdt_channel_feed>:

void nrfx_wdt_channel_feed(nrfx_wdt_t const * p_instance, nrfx_wdt_channel_id channel_id)
{
    NRFX_ASSERT(m_cb[p_instance->drv_inst_idx].state == NRFX_DRV_STATE_POWERED_ON);
    nrf_wdt_reload_request_set(p_instance->p_reg, channel_id);
    33d0:	6803      	ldr	r3, [r0, #0]
}

NRF_STATIC_INLINE void nrf_wdt_reload_request_set(NRF_WDT_Type *        p_reg,
                                                  nrf_wdt_rr_register_t rr_register)
{
    p_reg->RR[rr_register] = NRF_WDT_RR_VALUE;
    33d2:	4a03      	ldr	r2, [pc, #12]	; (33e0 <nrfx_wdt_channel_feed+0x10>)
    33d4:	f501 71c0 	add.w	r1, r1, #384	; 0x180
    33d8:	f843 2021 	str.w	r2, [r3, r1, lsl #2]
}
    33dc:	4770      	bx	lr
    33de:	bf00      	nop
    33e0:	6e524635 	.word	0x6e524635

000033e4 <nrfx_wdt_0_irq_handler>:

#if NRFX_CHECK(NRFX_WDT0_ENABLED) && !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ)
void nrfx_wdt_0_irq_handler(void)
{
    33e4:	b513      	push	{r0, r1, r4, lr}
    return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
    33e6:	4c06      	ldr	r4, [pc, #24]	; (3400 <nrfx_wdt_0_irq_handler+0x1c>)
    33e8:	6823      	ldr	r3, [r4, #0]
    if (nrf_wdt_event_check(NRF_WDT0, NRF_WDT_EVENT_TIMEOUT))
    33ea:	b13b      	cbz	r3, 33fc <nrfx_wdt_0_irq_handler+0x18>
    {
        m_cb[NRFX_WDT0_INST_IDX].wdt_event_handler();
    33ec:	4b05      	ldr	r3, [pc, #20]	; (3404 <nrfx_wdt_0_irq_handler+0x20>)
    33ee:	685b      	ldr	r3, [r3, #4]
    33f0:	4798      	blx	r3
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    33f2:	2300      	movs	r3, #0
    33f4:	6023      	str	r3, [r4, #0]
    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
    33f6:	6823      	ldr	r3, [r4, #0]
    33f8:	9301      	str	r3, [sp, #4]
    (void)dummy;
    33fa:	9b01      	ldr	r3, [sp, #4]
        nrf_wdt_event_clear(NRF_WDT0, NRF_WDT_EVENT_TIMEOUT);
    }
}
    33fc:	b002      	add	sp, #8
    33fe:	bd10      	pop	{r4, pc}
    3400:	40010100 	.word	0x40010100
    3404:	2000076c 	.word	0x2000076c

00003408 <z_sys_device_do_config_level>:
		__device_APPLICATION_start,
		/* End marker */
		__device_init_end,
	};

	for (info = config_levels[level]; info < config_levels[level+1];
    3408:	4b09      	ldr	r3, [pc, #36]	; (3430 <z_sys_device_do_config_level+0x28>)
{
    340a:	b570      	push	{r4, r5, r6, lr}
	for (info = config_levels[level]; info < config_levels[level+1];
    340c:	f853 4020 	ldr.w	r4, [r3, r0, lsl #2]
    3410:	3001      	adds	r0, #1
		retval = device_conf->init(info);
		if (retval != 0) {
			/* Initialization failed. Clear the API struct so that
			 * device_get_binding() will not succeed for it.
			 */
			info->driver_api = NULL;
    3412:	2600      	movs	r6, #0
	for (info = config_levels[level]; info < config_levels[level+1];
    3414:	f853 5020 	ldr.w	r5, [r3, r0, lsl #2]
    3418:	42a5      	cmp	r5, r4
    341a:	d800      	bhi.n	341e <z_sys_device_do_config_level+0x16>
		} else {
			z_object_init(info);
		}
	}
}
    341c:	bd70      	pop	{r4, r5, r6, pc}
		retval = device_conf->init(info);
    341e:	6823      	ldr	r3, [r4, #0]
    3420:	4620      	mov	r0, r4
    3422:	685b      	ldr	r3, [r3, #4]
    3424:	4798      	blx	r3
		if (retval != 0) {
    3426:	b100      	cbz	r0, 342a <z_sys_device_do_config_level+0x22>
			info->driver_api = NULL;
    3428:	6066      	str	r6, [r4, #4]
								info++) {
    342a:	340c      	adds	r4, #12
    342c:	e7f4      	b.n	3418 <z_sys_device_do_config_level+0x10>
    342e:	bf00      	nop
    3430:	00005f64 	.word	0x00005f64

00003434 <z_impl_device_get_binding>:
	/* Split the search into two loops: in the common scenario, where
	 * device names are stored in ROM (and are referenced by the user
	 * with CONFIG_* macros), only cheap pointer comparisons will be
	 * performed.  Reserve string comparisons for a fallback.
	 */
	for (info = __device_init_start; info != __device_init_end; info++) {
    3434:	4b10      	ldr	r3, [pc, #64]	; (3478 <z_impl_device_get_binding+0x44>)
{
    3436:	b570      	push	{r4, r5, r6, lr}
	for (info = __device_init_start; info != __device_init_end; info++) {
    3438:	4c10      	ldr	r4, [pc, #64]	; (347c <z_impl_device_get_binding+0x48>)
{
    343a:	4605      	mov	r5, r0
    343c:	461e      	mov	r6, r3
	for (info = __device_init_start; info != __device_init_end; info++) {
    343e:	429c      	cmp	r4, r3
    3440:	d104      	bne.n	344c <z_impl_device_get_binding+0x18>
		    (info->config->name == name)) {
			return info;
		}
	}

	for (info = __device_init_start; info != __device_init_end; info++) {
    3442:	4c0e      	ldr	r4, [pc, #56]	; (347c <z_impl_device_get_binding+0x48>)
    3444:	42b4      	cmp	r4, r6
    3446:	d109      	bne.n	345c <z_impl_device_get_binding+0x28>
		if (strcmp(name, info->config->name) == 0) {
			return info;
		}
	}

	return NULL;
    3448:	2400      	movs	r4, #0
    344a:	e012      	b.n	3472 <z_impl_device_get_binding+0x3e>
		if ((info->driver_api != NULL) &&
    344c:	6862      	ldr	r2, [r4, #4]
    344e:	b11a      	cbz	r2, 3458 <z_impl_device_get_binding+0x24>
		    (info->config->name == name)) {
    3450:	6822      	ldr	r2, [r4, #0]
		if ((info->driver_api != NULL) &&
    3452:	6812      	ldr	r2, [r2, #0]
    3454:	42aa      	cmp	r2, r5
    3456:	d00c      	beq.n	3472 <z_impl_device_get_binding+0x3e>
	for (info = __device_init_start; info != __device_init_end; info++) {
    3458:	340c      	adds	r4, #12
    345a:	e7f0      	b.n	343e <z_impl_device_get_binding+0xa>
		if (info->driver_api == NULL) {
    345c:	6863      	ldr	r3, [r4, #4]
    345e:	b90b      	cbnz	r3, 3464 <z_impl_device_get_binding+0x30>
	for (info = __device_init_start; info != __device_init_end; info++) {
    3460:	340c      	adds	r4, #12
    3462:	e7ef      	b.n	3444 <z_impl_device_get_binding+0x10>
		if (strcmp(name, info->config->name) == 0) {
    3464:	6823      	ldr	r3, [r4, #0]
    3466:	4628      	mov	r0, r5
    3468:	6819      	ldr	r1, [r3, #0]
    346a:	f002 f813 	bl	5494 <strcmp>
    346e:	2800      	cmp	r0, #0
    3470:	d1f6      	bne.n	3460 <z_impl_device_get_binding+0x2c>
}
    3472:	4620      	mov	r0, r4
    3474:	bd70      	pop	{r4, r5, r6, pc}
    3476:	bf00      	nop
    3478:	200022d8 	.word	0x200022d8
    347c:	20002230 	.word	0x20002230

00003480 <z_fatal_error>:
	return 0;
#endif
}

void z_fatal_error(unsigned int reason, const z_arch_esf_t *esf)
{
    3480:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
    3484:	4605      	mov	r5, r0
    3486:	4688      	mov	r8, r1
	return z_impl_k_current_get();
    3488:	f000 fdbe 	bl	4008 <z_impl_k_current_get>
	struct k_thread *thread = k_current_get();

	/* sanitycheck looks for the "ZEPHYR FATAL ERROR" string, don't
	 * change it without also updating sanitycheck
	 */
	LOG_ERR(">>> ZEPHYR FATAL ERROR %d: %s on CPU %d", reason,
    348c:	2201      	movs	r2, #1
    348e:	f04f 0300 	mov.w	r3, #0
    3492:	f362 0307 	bfi	r3, r2, #0, #8
    3496:	4c24      	ldr	r4, [pc, #144]	; (3528 <z_fatal_error+0xa8>)
    3498:	4a24      	ldr	r2, [pc, #144]	; (352c <z_fatal_error+0xac>)
    349a:	2d04      	cmp	r5, #4
    349c:	eba4 0402 	sub.w	r4, r4, r2
    34a0:	f3c4 04c9 	ubfx	r4, r4, #3, #10
    34a4:	bf96      	itet	ls
    34a6:	4a22      	ldrls	r2, [pc, #136]	; (3530 <z_fatal_error+0xb0>)
    34a8:	4a22      	ldrhi	r2, [pc, #136]	; (3534 <z_fatal_error+0xb4>)
    34aa:	f852 2025 	ldrls.w	r2, [r2, r5, lsl #2]
    34ae:	f364 138f 	bfi	r3, r4, #6, #10
    34b2:	f8ad 3000 	strh.w	r3, [sp]
    34b6:	4606      	mov	r6, r0
    34b8:	2300      	movs	r3, #0
    34ba:	4629      	mov	r1, r5
    34bc:	481e      	ldr	r0, [pc, #120]	; (3538 <z_fatal_error+0xb8>)
    34be:	f001 fc16 	bl	4cee <log_3>
 * @return true if execution state was in handler mode, before
 *              the current exception occurred, otherwise false.
 */
static ALWAYS_INLINE bool arch_is_in_nested_exception(const z_arch_esf_t *esf)
{
	return (esf->basic.xpsr & IPSR_ISR_Msk) ? (true) : (false);
    34c2:	f8d8 301c 	ldr.w	r3, [r8, #28]
    34c6:	f3c3 0308 	ubfx	r3, r3, #0, #9
	 * an IRQ or exception was being handled, or thread context.
	 *
	 * See #17656
	 */
#if defined(CONFIG_ARCH_HAS_NESTED_EXCEPTION_DETECTION)
	if (arch_is_in_nested_exception(esf)) {
    34ca:	b14b      	cbz	r3, 34e0 <z_fatal_error+0x60>
		LOG_ERR("Fault during interrupt handling\n");
    34cc:	f04f 0100 	mov.w	r1, #0
    34d0:	2301      	movs	r3, #1
    34d2:	f363 0107 	bfi	r1, r3, #0, #8
    34d6:	f364 118f 	bfi	r1, r4, #6, #10
    34da:	4818      	ldr	r0, [pc, #96]	; (353c <z_fatal_error+0xbc>)
    34dc:	f001 fbce 	bl	4c7c <log_0>
	}
#endif

	LOG_ERR("Current thread: %p (%s)", thread,
    34e0:	f04f 0700 	mov.w	r7, #0
    34e4:	2301      	movs	r3, #1
    34e6:	f363 0707 	bfi	r7, r3, #0, #8
	const char *thread_name = k_thread_name_get(thread);
    34ea:	4630      	mov	r0, r6
	LOG_ERR("Current thread: %p (%s)", thread,
    34ec:	f364 178f 	bfi	r7, r4, #6, #10
	const char *thread_name = k_thread_name_get(thread);
    34f0:	f002 fab5 	bl	5a5e <k_thread_name_get>
	if (thread_name == NULL || thread_name[0] == '\0') {
    34f4:	b1b0      	cbz	r0, 3524 <z_fatal_error+0xa4>
    34f6:	7802      	ldrb	r2, [r0, #0]
		thread_name = "unknown";
    34f8:	4b11      	ldr	r3, [pc, #68]	; (3540 <z_fatal_error+0xc0>)
    34fa:	2a00      	cmp	r2, #0
    34fc:	bf08      	it	eq
    34fe:	4618      	moveq	r0, r3
	LOG_ERR("Current thread: %p (%s)", thread,
    3500:	f7fd f936 	bl	770 <log_strdup>
    3504:	463b      	mov	r3, r7
    3506:	4602      	mov	r2, r0
    3508:	4631      	mov	r1, r6
    350a:	480e      	ldr	r0, [pc, #56]	; (3544 <z_fatal_error+0xc4>)
    350c:	f001 fbd7 	bl	4cbe <log_2>
		log_strdup(thread_name_get(thread)));

	k_sys_fatal_error_handler(reason, esf);
    3510:	4641      	mov	r1, r8
    3512:	4628      	mov	r0, r5
    3514:	f7ff fdd8 	bl	30c8 <k_sys_fatal_error_handler>
	z_impl_k_thread_abort(thread);
    3518:	4630      	mov	r0, r6
			}
#endif /*CONFIG_ARCH_HAS_NESTED_EXCEPTION_DETECTION */
	}

	k_thread_abort(thread);
}
    351a:	b002      	add	sp, #8
    351c:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
    3520:	f7fe bcc6 	b.w	1eb0 <z_impl_k_thread_abort>
		thread_name = "unknown";
    3524:	4806      	ldr	r0, [pc, #24]	; (3540 <z_fatal_error+0xc0>)
    3526:	e7eb      	b.n	3500 <z_fatal_error+0x80>
    3528:	00005dc0 	.word	0x00005dc0
    352c:	00005da0 	.word	0x00005da0
    3530:	00005f7c 	.word	0x00005f7c
    3534:	00006744 	.word	0x00006744
    3538:	0000675a 	.word	0x0000675a
    353c:	00006782 	.word	0x00006782
    3540:	00006752 	.word	0x00006752
    3544:	000067a3 	.word	0x000067a3

00003548 <idle>:
#else
#define IDLE_YIELD_IF_COOP() do { } while (false)
#endif

void idle(void *unused1, void *unused2, void *unused3)
{
    3548:	b508      	push	{r3, lr}
	_kernel.idle = ticks;
    354a:	4d0b      	ldr	r5, [pc, #44]	; (3578 <idle+0x30>)
	__asm__ volatile(
    354c:	f04f 0220 	mov.w	r2, #32
    3550:	f3ef 8311 	mrs	r3, BASEPRI
    3554:	f382 8811 	msr	BASEPRI, r2
    3558:	f3bf 8f6f 	isb	sy
	s32_t ticks = z_get_next_timeout_expiry();
    355c:	f002 faa6 	bl	5aac <z_get_next_timeout_expiry>
	z_set_timeout_expiry((ticks < IDLE_THRESH) ? 1 : ticks, true);
    3560:	2101      	movs	r1, #1
    3562:	2802      	cmp	r0, #2
	s32_t ticks = z_get_next_timeout_expiry();
    3564:	4604      	mov	r4, r0
	z_set_timeout_expiry((ticks < IDLE_THRESH) ? 1 : ticks, true);
    3566:	bfd8      	it	le
    3568:	4608      	movle	r0, r1
    356a:	f002 faaf 	bl	5acc <z_set_timeout_expiry>
	_kernel.idle = ticks;
    356e:	622c      	str	r4, [r5, #32]
 * @return N/A
 * @req K-CPU-IDLE-001
 */
static inline void k_cpu_idle(void)
{
	arch_cpu_idle();
    3570:	f7fe f94e 	bl	1810 <arch_cpu_idle>
    3574:	e7ea      	b.n	354c <idle+0x4>
    3576:	bf00      	nop
    3578:	2000084c 	.word	0x2000084c

0000357c <z_bss_zero>:
 *
 * @return N/A
 */
void z_bss_zero(void)
{
	(void)memset(__bss_start, 0, __bss_end - __bss_start);
    357c:	4802      	ldr	r0, [pc, #8]	; (3588 <z_bss_zero+0xc>)
    357e:	4a03      	ldr	r2, [pc, #12]	; (358c <z_bss_zero+0x10>)
    3580:	2100      	movs	r1, #0
    3582:	1a12      	subs	r2, r2, r0
    3584:	f001 bfbc 	b.w	5500 <memset>
    3588:	20000000 	.word	0x20000000
    358c:	20000cd0 	.word	0x20000cd0

00003590 <z_data_copy>:
 * This routine copies the data section from ROM to RAM.
 *
 * @return N/A
 */
void z_data_copy(void)
{
    3590:	b508      	push	{r3, lr}
	(void)memcpy(&__data_ram_start, &__data_rom_start,
		 __data_ram_end - __data_ram_start);
    3592:	4806      	ldr	r0, [pc, #24]	; (35ac <z_data_copy+0x1c>)
	(void)memcpy(&__data_ram_start, &__data_rom_start,
    3594:	4a06      	ldr	r2, [pc, #24]	; (35b0 <z_data_copy+0x20>)
    3596:	4907      	ldr	r1, [pc, #28]	; (35b4 <z_data_copy+0x24>)
    3598:	1a12      	subs	r2, r2, r0
    359a:	f001 ff87 	bl	54ac <memcpy>
#ifdef CONFIG_ARCH_HAS_RAMFUNC_SUPPORT
	(void)memcpy(&_ramfunc_ram_start, &_ramfunc_rom_start,
    359e:	4a06      	ldr	r2, [pc, #24]	; (35b8 <z_data_copy+0x28>)
    35a0:	4906      	ldr	r1, [pc, #24]	; (35bc <z_data_copy+0x2c>)
    35a2:	4807      	ldr	r0, [pc, #28]	; (35c0 <z_data_copy+0x30>)
#else
	(void)memcpy(&_app_smem_start, &_app_smem_rom_start,
		 _app_smem_end - _app_smem_start);
#endif /* CONFIG_STACK_CANARIES */
#endif /* CONFIG_USERSPACE */
}
    35a4:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
	(void)memcpy(&_ramfunc_ram_start, &_ramfunc_rom_start,
    35a8:	f001 bf80 	b.w	54ac <memcpy>
    35ac:	200021b0 	.word	0x200021b0
    35b0:	20002360 	.word	0x20002360
    35b4:	000067fc 	.word	0x000067fc
    35b8:	00000000 	.word	0x00000000
    35bc:	000067fc 	.word	0x000067fc
    35c0:	20000000 	.word	0x20000000

000035c4 <bg_thread_main>:
 * init functions, then invokes application's main() routine.
 *
 * @return N/A
 */
static void bg_thread_main(void *unused1, void *unused2, void *unused3)
{
    35c4:	b508      	push	{r3, lr}
	static const unsigned int boot_delay = CONFIG_BOOT_DELAY;
#else
	static const unsigned int boot_delay;
#endif

	z_sys_post_kernel = true;
    35c6:	4b0c      	ldr	r3, [pc, #48]	; (35f8 <bg_thread_main+0x34>)
    35c8:	2201      	movs	r2, #1

	z_sys_device_do_config_level(_SYS_INIT_LEVEL_POST_KERNEL);
    35ca:	2002      	movs	r0, #2
	z_sys_post_kernel = true;
    35cc:	701a      	strb	r2, [r3, #0]
	z_sys_device_do_config_level(_SYS_INIT_LEVEL_POST_KERNEL);
    35ce:	f7ff ff1b 	bl	3408 <z_sys_device_do_config_level>
		k_busy_wait(CONFIG_BOOT_DELAY * USEC_PER_MSEC);
	}

#if defined(CONFIG_BOOT_BANNER)
#ifdef BUILD_VERSION
	printk("*** Booting Zephyr OS build %s %s ***\n",
    35d2:	4a0a      	ldr	r2, [pc, #40]	; (35fc <bg_thread_main+0x38>)
    35d4:	490a      	ldr	r1, [pc, #40]	; (3600 <bg_thread_main+0x3c>)
    35d6:	480b      	ldr	r0, [pc, #44]	; (3604 <bg_thread_main+0x40>)
    35d8:	f001 faf5 	bl	4bc6 <printk>
			KERNEL_VERSION_STRING, BOOT_DELAY_BANNER);
#endif
#endif

	/* Final init level before app starts */
	z_sys_device_do_config_level(_SYS_INIT_LEVEL_APPLICATION);
    35dc:	2003      	movs	r0, #3
    35de:	f7ff ff13 	bl	3408 <z_sys_device_do_config_level>
	extern void __do_init_array_aux(void);
	__do_global_ctors_aux();
	__do_init_array_aux();
#endif

	z_init_static_threads();
    35e2:	f000 fded 	bl	41c0 <z_init_static_threads>
	z_timestamp_main = k_cycle_get_32();
#endif

	extern void main(void);

	main();
    35e6:	f7fc ff1f 	bl	428 <main>

	/* Mark nonessenrial since main() has no more work to do */
	z_main_thread.base.user_options &= ~K_ESSENTIAL;
    35ea:	4a07      	ldr	r2, [pc, #28]	; (3608 <bg_thread_main+0x44>)
    35ec:	7b13      	ldrb	r3, [r2, #12]
    35ee:	f023 0301 	bic.w	r3, r3, #1
    35f2:	7313      	strb	r3, [r2, #12]

	/* Dump coverage data once the main() has exited. */
	gcov_coverage_dump();
} /* LCOV_EXCL_LINE ... because we just dumped final coverage data */
    35f4:	bd08      	pop	{r3, pc}
    35f6:	bf00      	nop
    35f8:	20000ccc 	.word	0x20000ccc
    35fc:	00006167 	.word	0x00006167
    3600:	000067bb 	.word	0x000067bb
    3604:	000067c8 	.word	0x000067c8
    3608:	200007e0 	.word	0x200007e0

0000360c <z_cstart>:
 * cleared/zeroed.
 *
 * @return Does not return
 */
FUNC_NORETURN void z_cstart(void)
{
    360c:	b580      	push	{r7, lr}
    360e:	b0a2      	sub	sp, #136	; 0x88
#endif	/* CONFIG_STACK_CANARIES */

	/* gcov hook needed to get the coverage report.*/
	gcov_static_init();

	LOG_CORE_INIT();
    3610:	f7fd f806 	bl	620 <log_core_init>
 *
 * @return N/A
 */
static ALWAYS_INLINE void z_arm_interrupt_stack_setup(void)
{
	u32_t msp = (u32_t)(Z_THREAD_STACK_BUFFER(_interrupt_stack)) +
    3614:	4b35      	ldr	r3, [pc, #212]	; (36ec <z_cstart+0xe0>)
  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
    3616:	f383 8808 	msr	MSP, r3
	 * for Cortex-M3 and Cortex-M4 (ARMv7-M) MCUs. For the rest
	 * of ARM Cortex-M processors this setting is enforced by
	 * default and it is not configurable.
	 */
#if defined(CONFIG_CPU_CORTEX_M3) || defined(CONFIG_CPU_CORTEX_M4)
	SCB->CCR |= SCB_CCR_STKALIGN_Msk;
    361a:	4c35      	ldr	r4, [pc, #212]	; (36f0 <z_cstart+0xe4>)
	_kernel.ready_q.cache = &z_main_thread;
    361c:	4e35      	ldr	r6, [pc, #212]	; (36f4 <z_cstart+0xe8>)
    361e:	6963      	ldr	r3, [r4, #20]
    3620:	f443 7300 	orr.w	r3, r3, #512	; 0x200
    3624:	6163      	str	r3, [r4, #20]
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
    3626:	2500      	movs	r5, #0
    3628:	23e0      	movs	r3, #224	; 0xe0
    362a:	f884 3022 	strb.w	r3, [r4, #34]	; 0x22
    362e:	77e5      	strb	r5, [r4, #31]
    3630:	7625      	strb	r5, [r4, #24]
    3632:	7665      	strb	r5, [r4, #25]
    3634:	76a5      	strb	r5, [r4, #26]
#if defined(CONFIG_ARM_SECURE_FIRMWARE)
	NVIC_SetPriority(SecureFault_IRQn, _EXC_FAULT_PRIO);
#endif /* CONFIG_ARM_SECURE_FIRMWARE */

	/* Enable Usage, Mem, & Bus Faults */
	SCB->SHCSR |= SCB_SHCSR_USGFAULTENA_Msk | SCB_SHCSR_MEMFAULTENA_Msk |
    3636:	6a63      	ldr	r3, [r4, #36]	; 0x24
    3638:	f443 23e0 	orr.w	r3, r3, #458752	; 0x70000
    363c:	6263      	str	r3, [r4, #36]	; 0x24

static ALWAYS_INLINE void arch_kernel_init(void)
{
	z_arm_interrupt_stack_setup();
	z_arm_exc_setup();
	z_arm_fault_init();
    363e:	f7fe fc23 	bl	1e88 <z_arm_fault_init>
	z_arm_cpu_idle_init();
    3642:	f7fe f8df 	bl	1804 <z_arm_cpu_idle_init>
static ALWAYS_INLINE void z_arm_clear_faults(void)
{
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	/* Reset all faults */
	SCB->CFSR = SCB_CFSR_USGFAULTSR_Msk |
    3646:	f04f 33ff 	mov.w	r3, #4294967295
    364a:	62a3      	str	r3, [r4, #40]	; 0x28
		    SCB_CFSR_MEMFAULTSR_Msk |
		    SCB_CFSR_BUSFAULTSR_Msk;

	/* Clear all Hard Faults - HFSR is write-one-to-clear */
	SCB->HFSR = 0xffffffff;
    364c:	62e3      	str	r3, [r4, #44]	; 0x2c

	/* perform any architecture-specific initialization */
	arch_kernel_init();

#ifdef CONFIG_MULTITHREADING
	struct k_thread dummy_thread = {
    364e:	ab07      	add	r3, sp, #28
    3650:	226c      	movs	r2, #108	; 0x6c
    3652:	4629      	mov	r1, r5
    3654:	4618      	mov	r0, r3
    3656:	f001 ff53 	bl	5500 <memset>
# ifdef CONFIG_SCHED_CPU_MASK
		 .base.cpu_mask = -1,
# endif
	};

	_current = &dummy_thread;
    365a:	4c27      	ldr	r4, [pc, #156]	; (36f8 <z_cstart+0xec>)
	struct k_thread dummy_thread = {
    365c:	2701      	movs	r7, #1
	_current = &dummy_thread;
    365e:	60a0      	str	r0, [r4, #8]
#ifdef CONFIG_USERSPACE
	z_app_shmem_bss_zero();
#endif

	/* perform basic hardware initialization */
	z_sys_device_do_config_level(_SYS_INIT_LEVEL_PRE_KERNEL_1);
    3660:	4628      	mov	r0, r5
	struct k_thread dummy_thread = {
    3662:	f88d 7029 	strb.w	r7, [sp, #41]	; 0x29
	z_sys_device_do_config_level(_SYS_INIT_LEVEL_PRE_KERNEL_1);
    3666:	f7ff fecf 	bl	3408 <z_sys_device_do_config_level>
	z_sys_device_do_config_level(_SYS_INIT_LEVEL_PRE_KERNEL_2);
    366a:	4638      	mov	r0, r7
    366c:	f7ff fecc 	bl	3408 <z_sys_device_do_config_level>
	z_sched_init();
    3670:	f000 fc4a 	bl	3f08 <z_sched_init>
	z_setup_new_thread(&z_main_thread, z_main_stack,
    3674:	4b21      	ldr	r3, [pc, #132]	; (36fc <z_cstart+0xf0>)
	_kernel.ready_q.cache = &z_main_thread;
    3676:	6266      	str	r6, [r4, #36]	; 0x24
	z_setup_new_thread(&z_main_thread, z_main_stack,
    3678:	f44f 6280 	mov.w	r2, #1024	; 0x400
    367c:	e9cd 7304 	strd	r7, r3, [sp, #16]
    3680:	e9cd 5502 	strd	r5, r5, [sp, #8]
    3684:	4b1e      	ldr	r3, [pc, #120]	; (3700 <z_cstart+0xf4>)
    3686:	491f      	ldr	r1, [pc, #124]	; (3704 <z_cstart+0xf8>)
    3688:	e9cd 5500 	strd	r5, r5, [sp]
    368c:	4630      	mov	r0, r6
    368e:	f000 fd2f 	bl	40f0 <z_setup_new_thread>
	sys_trace_thread_resume(thread);
}

static inline void z_mark_thread_as_started(struct k_thread *thread)
{
	thread->base.thread_state &= ~_THREAD_PRESTART;
    3692:	7b73      	ldrb	r3, [r6, #13]
    3694:	f023 0204 	bic.w	r2, r3, #4
	return !((z_is_thread_prevented_from_running(thread)) != 0 ||
    3698:	f013 0f1b 	tst.w	r3, #27
	thread->base.thread_state &= ~_THREAD_PRESTART;
    369c:	7372      	strb	r2, [r6, #13]
	return !((z_is_thread_prevented_from_running(thread)) != 0 ||
    369e:	d104      	bne.n	36aa <z_cstart+0x9e>
	return true;
}

static ALWAYS_INLINE void z_ready_thread(struct k_thread *thread)
{
	if (z_is_thread_ready(thread)) {
    36a0:	69b3      	ldr	r3, [r6, #24]
    36a2:	b913      	cbnz	r3, 36aa <z_cstart+0x9e>
		z_add_thread_to_ready_q(thread);
    36a4:	4630      	mov	r0, r6
    36a6:	f000 fa19 	bl	3adc <z_add_thread_to_ready_q>
	z_setup_new_thread(thread, stack,
    36aa:	4b17      	ldr	r3, [pc, #92]	; (3708 <z_cstart+0xfc>)
    36ac:	4d17      	ldr	r5, [pc, #92]	; (370c <z_cstart+0x100>)
    36ae:	9305      	str	r3, [sp, #20]
    36b0:	2201      	movs	r2, #1
    36b2:	230f      	movs	r3, #15
    36b4:	e9cd 3203 	strd	r3, r2, [sp, #12]
    36b8:	2300      	movs	r3, #0
    36ba:	e9cd 3301 	strd	r3, r3, [sp, #4]
    36be:	9300      	str	r3, [sp, #0]
    36c0:	f44f 72a0 	mov.w	r2, #320	; 0x140
    36c4:	4b12      	ldr	r3, [pc, #72]	; (3710 <z_cstart+0x104>)
    36c6:	4913      	ldr	r1, [pc, #76]	; (3714 <z_cstart+0x108>)
    36c8:	4628      	mov	r0, r5
    36ca:	f000 fd11 	bl	40f0 <z_setup_new_thread>
	thread->base.thread_state &= ~_THREAD_PRESTART;
    36ce:	7b6b      	ldrb	r3, [r5, #13]
	_kernel.cpus[0].idle_thread = &z_idle_thread;
    36d0:	60e5      	str	r5, [r4, #12]
    36d2:	f023 0304 	bic.w	r3, r3, #4
    36d6:	736b      	strb	r3, [r5, #13]
 * @return N/A
 */

static inline void sys_dlist_init(sys_dlist_t *list)
{
	list->head = (sys_dnode_t *)list;
    36d8:	4b0f      	ldr	r3, [pc, #60]	; (3718 <z_cstart+0x10c>)
	arch_switch_to_main_thread(&z_main_thread, z_main_stack,
    36da:	490a      	ldr	r1, [pc, #40]	; (3704 <z_cstart+0xf8>)
    36dc:	4805      	ldr	r0, [pc, #20]	; (36f4 <z_cstart+0xe8>)
	list->tail = (sys_dnode_t *)list;
    36de:	e9c4 3306 	strd	r3, r3, [r4, #24]
    36e2:	f44f 6280 	mov.w	r2, #1024	; 0x400
    36e6:	4b06      	ldr	r3, [pc, #24]	; (3700 <z_cstart+0xf4>)
    36e8:	f7fe f86e 	bl	17c8 <arch_switch_to_main_thread>
	CODE_UNREACHABLE; /* LCOV_EXCL_LINE */
    36ec:	20001d10 	.word	0x20001d10
    36f0:	e000ed00 	.word	0xe000ed00
    36f4:	200007e0 	.word	0x200007e0
    36f8:	2000084c 	.word	0x2000084c
    36fc:	000067f2 	.word	0x000067f2
    3700:	000035c5 	.word	0x000035c5
    3704:	20000fd0 	.word	0x20000fd0
    3708:	000067f7 	.word	0x000067f7
    370c:	20000774 	.word	0x20000774
    3710:	00003549 	.word	0x00003549
    3714:	200013d0 	.word	0x200013d0
    3718:	20000864 	.word	0x20000864

0000371c <init_mem_slab_module>:
 * Perform any initialization that wasn't done at build time.
 *
 * @return N/A
 */
static int init_mem_slab_module(struct device *dev)
{
    371c:	b570      	push	{r4, r5, r6, lr}
	int rc = 0;
	ARG_UNUSED(dev);

	Z_STRUCT_SECTION_FOREACH(k_mem_slab, slab) {
    371e:	4b0e      	ldr	r3, [pc, #56]	; (3758 <init_mem_slab_module+0x3c>)
    3720:	4c0e      	ldr	r4, [pc, #56]	; (375c <init_mem_slab_module+0x40>)
    3722:	42a3      	cmp	r3, r4
    3724:	d301      	bcc.n	372a <init_mem_slab_module+0xe>
		}
		SYS_TRACING_OBJ_INIT(k_mem_slab, slab);
		z_object_init(slab);
	}

out:
    3726:	2000      	movs	r0, #0
	return rc;
}
    3728:	bd70      	pop	{r4, r5, r6, pc}
	CHECKIF(((slab->block_size | (uintptr_t)slab->buffer) &
    372a:	e9d3 0103 	ldrd	r0, r1, [r3, #12]
    372e:	ea41 0200 	orr.w	r2, r1, r0
    3732:	f012 0203 	ands.w	r2, r2, #3
    3736:	d10b      	bne.n	3750 <init_mem_slab_module+0x34>
	for (j = 0U; j < slab->num_blocks; j++) {
    3738:	689d      	ldr	r5, [r3, #8]
	slab->free_list = NULL;
    373a:	615a      	str	r2, [r3, #20]
	for (j = 0U; j < slab->num_blocks; j++) {
    373c:	42aa      	cmp	r2, r5
    373e:	d101      	bne.n	3744 <init_mem_slab_module+0x28>
	Z_STRUCT_SECTION_FOREACH(k_mem_slab, slab) {
    3740:	331c      	adds	r3, #28
    3742:	e7ee      	b.n	3722 <init_mem_slab_module+0x6>
		*(char **)p = slab->free_list;
    3744:	695e      	ldr	r6, [r3, #20]
    3746:	600e      	str	r6, [r1, #0]
	for (j = 0U; j < slab->num_blocks; j++) {
    3748:	3201      	adds	r2, #1
		slab->free_list = p;
    374a:	6159      	str	r1, [r3, #20]
		p += slab->block_size;
    374c:	4401      	add	r1, r0
    374e:	e7f5      	b.n	373c <init_mem_slab_module+0x20>
		return -EINVAL;
    3750:	f06f 0015 	mvn.w	r0, #21
	return rc;
    3754:	e7e8      	b.n	3728 <init_mem_slab_module+0xc>
    3756:	bf00      	nop
    3758:	200022d8 	.word	0x200022d8
    375c:	200022d8 	.word	0x200022d8

00003760 <k_mem_slab_alloc>:
out:
	return rc;
}

int k_mem_slab_alloc(struct k_mem_slab *slab, void **mem, s32_t timeout)
{
    3760:	b510      	push	{r4, lr}
    3762:	4613      	mov	r3, r2
    3764:	460c      	mov	r4, r1
    3766:	f04f 0220 	mov.w	r2, #32
    376a:	f3ef 8111 	mrs	r1, BASEPRI
    376e:	f382 8811 	msr	BASEPRI, r2
    3772:	f3bf 8f6f 	isb	sy
	k_spinlock_key_t key = k_spin_lock(&lock);
	int result;

	if (slab->free_list != NULL) {
    3776:	6942      	ldr	r2, [r0, #20]
    3778:	b15a      	cbz	r2, 3792 <k_mem_slab_alloc+0x32>
		/* take a free block */
		*mem = slab->free_list;
    377a:	6022      	str	r2, [r4, #0]
		slab->free_list = *(char **)(slab->free_list);
    377c:	6813      	ldr	r3, [r2, #0]
    377e:	6143      	str	r3, [r0, #20]
		slab->num_used++;
    3780:	6983      	ldr	r3, [r0, #24]
    3782:	3301      	adds	r3, #1
    3784:	6183      	str	r3, [r0, #24]
		result = 0;
    3786:	2000      	movs	r0, #0
	__asm__ volatile(
    3788:	f381 8811 	msr	BASEPRI, r1
    378c:	f3bf 8f6f 	isb	sy
		return result;
	}

	k_spin_unlock(&lock, key);

	return result;
    3790:	e00d      	b.n	37ae <k_mem_slab_alloc+0x4e>
	} else if (timeout == K_NO_WAIT) {
    3792:	b91b      	cbnz	r3, 379c <k_mem_slab_alloc+0x3c>
		*mem = NULL;
    3794:	6023      	str	r3, [r4, #0]
		result = -ENOMEM;
    3796:	f06f 000b 	mvn.w	r0, #11
    379a:	e7f5      	b.n	3788 <k_mem_slab_alloc+0x28>
		result = z_pend_curr(&lock, key, &slab->wait_q, timeout);
    379c:	4602      	mov	r2, r0
    379e:	4804      	ldr	r0, [pc, #16]	; (37b0 <k_mem_slab_alloc+0x50>)
    37a0:	f000 fb2e 	bl	3e00 <z_pend_curr>
		if (result == 0) {
    37a4:	b918      	cbnz	r0, 37ae <k_mem_slab_alloc+0x4e>
			*mem = _current->base.swap_data;
    37a6:	4b03      	ldr	r3, [pc, #12]	; (37b4 <k_mem_slab_alloc+0x54>)
    37a8:	689b      	ldr	r3, [r3, #8]
    37aa:	695b      	ldr	r3, [r3, #20]
    37ac:	6023      	str	r3, [r4, #0]
}
    37ae:	bd10      	pop	{r4, pc}
    37b0:	20000ccd 	.word	0x20000ccd
    37b4:	2000084c 	.word	0x2000084c

000037b8 <k_mem_slab_free>:

void k_mem_slab_free(struct k_mem_slab *slab, void **mem)
{
    37b8:	b570      	push	{r4, r5, r6, lr}
    37ba:	4604      	mov	r4, r0
    37bc:	460d      	mov	r5, r1
	__asm__ volatile(
    37be:	f04f 0320 	mov.w	r3, #32
    37c2:	f3ef 8611 	mrs	r6, BASEPRI
    37c6:	f383 8811 	msr	BASEPRI, r3
    37ca:	f3bf 8f6f 	isb	sy
	k_spinlock_key_t key = k_spin_lock(&lock);
	struct k_thread *pending_thread = z_unpend_first_thread(&slab->wait_q);
    37ce:	f002 f914 	bl	59fa <z_unpend_first_thread>

	if (pending_thread != NULL) {
    37d2:	b180      	cbz	r0, 37f6 <k_mem_slab_free+0x3e>
		z_thread_return_value_set_with_data(pending_thread, 0, *mem);
    37d4:	682a      	ldr	r2, [r5, #0]
z_thread_return_value_set_with_data(struct k_thread *thread,
				   unsigned int value,
				   void *data)
{
	arch_thread_return_value_set(thread, value);
	thread->base.swap_data = data;
    37d6:	6142      	str	r2, [r0, #20]
	return !((z_is_thread_prevented_from_running(thread)) != 0 ||
    37d8:	7b42      	ldrb	r2, [r0, #13]
}

static ALWAYS_INLINE void
arch_thread_return_value_set(struct k_thread *thread, unsigned int value)
{
	thread->arch.swap_return_value = value;
    37da:	2100      	movs	r1, #0
    37dc:	06d2      	lsls	r2, r2, #27
    37de:	6681      	str	r1, [r0, #104]	; 0x68
    37e0:	d103      	bne.n	37ea <k_mem_slab_free+0x32>
	if (z_is_thread_ready(thread)) {
    37e2:	6983      	ldr	r3, [r0, #24]
    37e4:	b90b      	cbnz	r3, 37ea <k_mem_slab_free+0x32>
		z_add_thread_to_ready_q(thread);
    37e6:	f000 f979 	bl	3adc <z_add_thread_to_ready_q>
		z_ready_thread(pending_thread);
		z_reschedule(&lock, key);
    37ea:	4631      	mov	r1, r6
    37ec:	4808      	ldr	r0, [pc, #32]	; (3810 <k_mem_slab_free+0x58>)
		**(char ***)mem = slab->free_list;
		slab->free_list = *(char **)mem;
		slab->num_used--;
		k_spin_unlock(&lock, key);
	}
}
    37ee:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
		z_reschedule(&lock, key);
    37f2:	f002 b8aa 	b.w	594a <z_reschedule>
		**(char ***)mem = slab->free_list;
    37f6:	682b      	ldr	r3, [r5, #0]
    37f8:	6962      	ldr	r2, [r4, #20]
    37fa:	601a      	str	r2, [r3, #0]
		slab->free_list = *(char **)mem;
    37fc:	682b      	ldr	r3, [r5, #0]
    37fe:	6163      	str	r3, [r4, #20]
		slab->num_used--;
    3800:	69a3      	ldr	r3, [r4, #24]
    3802:	3b01      	subs	r3, #1
    3804:	61a3      	str	r3, [r4, #24]
	__asm__ volatile(
    3806:	f386 8811 	msr	BASEPRI, r6
    380a:	f3bf 8f6f 	isb	sy
}
    380e:	bd70      	pop	{r4, r5, r6, pc}
    3810:	20000ccd 	.word	0x20000ccd

00003814 <z_impl_k_mutex_lock>:
	}
	return false;
}

int z_impl_k_mutex_lock(struct k_mutex *mutex, s32_t timeout)
{
    3814:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    3816:	4604      	mov	r4, r0
    3818:	460f      	mov	r7, r1
	__asm__ volatile(
    381a:	f04f 0320 	mov.w	r3, #32
    381e:	f3ef 8511 	mrs	r5, BASEPRI
    3822:	f383 8811 	msr	BASEPRI, r3
    3826:	f3bf 8f6f 	isb	sy
	bool resched = false;

	sys_trace_void(SYS_TRACE_ID_MUTEX_LOCK);
	key = k_spin_lock(&lock);

	if (likely((mutex->lock_count == 0U) || (mutex->owner == _current))) {
    382a:	68c2      	ldr	r2, [r0, #12]
    382c:	4930      	ldr	r1, [pc, #192]	; (38f0 <z_impl_k_mutex_lock+0xdc>)
    382e:	b15a      	cbz	r2, 3848 <z_impl_k_mutex_lock+0x34>
    3830:	6880      	ldr	r0, [r0, #8]
    3832:	688e      	ldr	r6, [r1, #8]
    3834:	42b0      	cmp	r0, r6
    3836:	d015      	beq.n	3864 <z_impl_k_mutex_lock+0x50>
		sys_trace_end_call(SYS_TRACE_ID_MUTEX_LOCK);

		return 0;
	}

	if (unlikely(timeout == (s32_t)K_NO_WAIT)) {
    3838:	b9b7      	cbnz	r7, 3868 <z_impl_k_mutex_lock+0x54>
	__asm__ volatile(
    383a:	f385 8811 	msr	BASEPRI, r5
    383e:	f3bf 8f6f 	isb	sy
		k_spin_unlock(&lock, key);
		sys_trace_end_call(SYS_TRACE_ID_MUTEX_LOCK);
		return -EBUSY;
    3842:	f06f 000f 	mvn.w	r0, #15
    3846:	e00c      	b.n	3862 <z_impl_k_mutex_lock+0x4e>
					_current->base.prio :
    3848:	688b      	ldr	r3, [r1, #8]
    384a:	f993 300e 	ldrsb.w	r3, [r3, #14]
		mutex->owner_orig_prio = (mutex->lock_count == 0U) ?
    384e:	6123      	str	r3, [r4, #16]
		mutex->lock_count++;
    3850:	3201      	adds	r2, #1
		mutex->owner = _current;
    3852:	688b      	ldr	r3, [r1, #8]
		mutex->lock_count++;
    3854:	60e2      	str	r2, [r4, #12]
		mutex->owner = _current;
    3856:	60a3      	str	r3, [r4, #8]
    3858:	f385 8811 	msr	BASEPRI, r5
    385c:	f3bf 8f6f 	isb	sy
		return 0;
    3860:	2000      	movs	r0, #0
		k_spin_unlock(&lock, key);
	}

	sys_trace_end_call(SYS_TRACE_ID_MUTEX_LOCK);
	return -EAGAIN;
}
    3862:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
					_current->base.prio :
    3864:	6923      	ldr	r3, [r4, #16]
    3866:	e7f2      	b.n	384e <z_impl_k_mutex_lock+0x3a>
	new_prio = new_prio_for_inheritance(_current->base.prio,
    3868:	f990 300e 	ldrsb.w	r3, [r0, #14]
    386c:	f996 100e 	ldrsb.w	r1, [r6, #14]
    3870:	4299      	cmp	r1, r3
    3872:	bfa8      	it	ge
    3874:	4619      	movge	r1, r3
    3876:	ea21 71e1 	bic.w	r1, r1, r1, asr #31
	if (z_is_prio_higher(new_prio, mutex->owner->base.prio)) {
    387a:	4299      	cmp	r1, r3
    387c:	da2b      	bge.n	38d6 <z_impl_k_mutex_lock+0xc2>
		return z_set_prio(mutex->owner, new_prio);
    387e:	f000 fb01 	bl	3e84 <z_set_prio>
    3882:	4606      	mov	r6, r0
	int got_mutex = z_pend_curr(&lock, key, &mutex->wait_q, timeout);
    3884:	463b      	mov	r3, r7
    3886:	4622      	mov	r2, r4
    3888:	4629      	mov	r1, r5
    388a:	481a      	ldr	r0, [pc, #104]	; (38f4 <z_impl_k_mutex_lock+0xe0>)
    388c:	f000 fab8 	bl	3e00 <z_pend_curr>
	if (got_mutex == 0) {
    3890:	2800      	cmp	r0, #0
    3892:	d0e6      	beq.n	3862 <z_impl_k_mutex_lock+0x4e>
	__asm__ volatile(
    3894:	f04f 0320 	mov.w	r3, #32
    3898:	f3ef 8511 	mrs	r5, BASEPRI
    389c:	f383 8811 	msr	BASEPRI, r3
    38a0:	f3bf 8f6f 	isb	sy
 * @return true if empty, false otherwise
 */

static inline bool sys_dlist_is_empty(sys_dlist_t *list)
{
	return list->head == list;
    38a4:	6823      	ldr	r3, [r4, #0]
    38a6:	6921      	ldr	r1, [r4, #16]
 * @return a pointer to the head element, NULL if list is empty
 */

static inline sys_dnode_t *sys_dlist_peek_head(sys_dlist_t *list)
{
	return sys_dlist_is_empty(list) ? NULL : list->head;
    38a8:	429c      	cmp	r4, r3
    38aa:	d007      	beq.n	38bc <z_impl_k_mutex_lock+0xa8>
		new_prio_for_inheritance(waiter->base.prio, mutex->owner_orig_prio) :
    38ac:	b133      	cbz	r3, 38bc <z_impl_k_mutex_lock+0xa8>
    38ae:	f993 300e 	ldrsb.w	r3, [r3, #14]
    38b2:	4299      	cmp	r1, r3
    38b4:	bfa8      	it	ge
    38b6:	4619      	movge	r1, r3
    38b8:	ea21 71e1 	bic.w	r1, r1, r1, asr #31
	resched = adjust_owner_prio(mutex, new_prio) || resched;
    38bc:	68a0      	ldr	r0, [r4, #8]
	if (mutex->owner->base.prio != new_prio) {
    38be:	f990 300e 	ldrsb.w	r3, [r0, #14]
    38c2:	4299      	cmp	r1, r3
    38c4:	d109      	bne.n	38da <z_impl_k_mutex_lock+0xc6>
	if (resched) {
    38c6:	b16e      	cbz	r6, 38e4 <z_impl_k_mutex_lock+0xd0>
		z_reschedule(&lock, key);
    38c8:	4629      	mov	r1, r5
    38ca:	480a      	ldr	r0, [pc, #40]	; (38f4 <z_impl_k_mutex_lock+0xe0>)
    38cc:	f002 f83d 	bl	594a <z_reschedule>
	return -EAGAIN;
    38d0:	f06f 000a 	mvn.w	r0, #10
    38d4:	e7c5      	b.n	3862 <z_impl_k_mutex_lock+0x4e>
	bool resched = false;
    38d6:	2600      	movs	r6, #0
    38d8:	e7d4      	b.n	3884 <z_impl_k_mutex_lock+0x70>
		return z_set_prio(mutex->owner, new_prio);
    38da:	f000 fad3 	bl	3e84 <z_set_prio>
	resched = adjust_owner_prio(mutex, new_prio) || resched;
    38de:	2800      	cmp	r0, #0
    38e0:	d1f2      	bne.n	38c8 <z_impl_k_mutex_lock+0xb4>
    38e2:	e7f0      	b.n	38c6 <z_impl_k_mutex_lock+0xb2>
	__asm__ volatile(
    38e4:	f385 8811 	msr	BASEPRI, r5
    38e8:	f3bf 8f6f 	isb	sy
    38ec:	e7f0      	b.n	38d0 <z_impl_k_mutex_lock+0xbc>
    38ee:	bf00      	nop
    38f0:	2000084c 	.word	0x2000084c
    38f4:	20000ccd 	.word	0x20000ccd

000038f8 <z_impl_k_mutex_unlock>:
}
#include <syscalls/k_mutex_lock_mrsh.c>
#endif

int z_impl_k_mutex_unlock(struct k_mutex *mutex)
{
    38f8:	b538      	push	{r3, r4, r5, lr}
	struct k_thread *new_owner;

	CHECKIF(mutex->owner == NULL) {
    38fa:	6883      	ldr	r3, [r0, #8]
{
    38fc:	4604      	mov	r4, r0
	CHECKIF(mutex->owner == NULL) {
    38fe:	2b00      	cmp	r3, #0
    3900:	d03b      	beq.n	397a <z_impl_k_mutex_unlock+0x82>
		return -EINVAL;
	}
	/*
	 * The current thread does not own the mutex.
	 */
	CHECKIF(mutex->owner != _current) {
    3902:	4a21      	ldr	r2, [pc, #132]	; (3988 <z_impl_k_mutex_unlock+0x90>)
    3904:	6892      	ldr	r2, [r2, #8]
    3906:	4293      	cmp	r3, r2
    3908:	d13a      	bne.n	3980 <z_impl_k_mutex_unlock+0x88>
{
#ifdef CONFIG_PREEMPT_ENABLED
	__ASSERT(!arch_is_in_isr(), "");
	__ASSERT(_current->base.sched_locked != 1, "");

	--_current->base.sched_locked;
    390a:	7bda      	ldrb	r2, [r3, #15]
    390c:	3a01      	subs	r2, #1
    390e:	73da      	strb	r2, [r3, #15]

	/*
	 * If we are the owner and count is greater than 1, then decrement
	 * the count and return and keep current thread as the owner.
	 */
	if (mutex->lock_count - 1U != 0U) {
    3910:	68c3      	ldr	r3, [r0, #12]
    3912:	2b01      	cmp	r3, #1
    3914:	d005      	beq.n	3922 <z_impl_k_mutex_unlock+0x2a>
		mutex->lock_count--;
    3916:	3b01      	subs	r3, #1
    3918:	60c3      	str	r3, [r0, #12]
		k_spin_unlock(&lock, key);
	}


k_mutex_unlock_return:
	k_sched_unlock();
    391a:	f000 f8c3 	bl	3aa4 <k_sched_unlock>
	sys_trace_end_call(SYS_TRACE_ID_MUTEX_UNLOCK);

	return 0;
    391e:	2000      	movs	r0, #0
}
    3920:	bd38      	pop	{r3, r4, r5, pc}
	__asm__ volatile(
    3922:	f04f 0320 	mov.w	r3, #32
    3926:	f3ef 8511 	mrs	r5, BASEPRI
    392a:	f383 8811 	msr	BASEPRI, r3
    392e:	f3bf 8f6f 	isb	sy
	adjust_owner_prio(mutex, mutex->owner_orig_prio);
    3932:	6901      	ldr	r1, [r0, #16]
    3934:	6880      	ldr	r0, [r0, #8]
	if (mutex->owner->base.prio != new_prio) {
    3936:	f990 300e 	ldrsb.w	r3, [r0, #14]
    393a:	4299      	cmp	r1, r3
    393c:	d001      	beq.n	3942 <z_impl_k_mutex_unlock+0x4a>
		return z_set_prio(mutex->owner, new_prio);
    393e:	f000 faa1 	bl	3e84 <z_set_prio>
	new_owner = z_unpend_first_thread(&mutex->wait_q);
    3942:	4620      	mov	r0, r4
    3944:	f002 f859 	bl	59fa <z_unpend_first_thread>
	mutex->owner = new_owner;
    3948:	60a0      	str	r0, [r4, #8]
	if (new_owner != NULL) {
    394a:	b180      	cbz	r0, 396e <z_impl_k_mutex_unlock+0x76>
		mutex->owner_orig_prio = new_owner->base.prio;
    394c:	f990 200e 	ldrsb.w	r2, [r0, #14]
    3950:	6122      	str	r2, [r4, #16]
    3952:	2200      	movs	r2, #0
    3954:	6682      	str	r2, [r0, #104]	; 0x68
	return !((z_is_thread_prevented_from_running(thread)) != 0 ||
    3956:	7b42      	ldrb	r2, [r0, #13]
    3958:	06d2      	lsls	r2, r2, #27
    395a:	d103      	bne.n	3964 <z_impl_k_mutex_unlock+0x6c>
	if (z_is_thread_ready(thread)) {
    395c:	6983      	ldr	r3, [r0, #24]
    395e:	b90b      	cbnz	r3, 3964 <z_impl_k_mutex_unlock+0x6c>
		z_add_thread_to_ready_q(thread);
    3960:	f000 f8bc 	bl	3adc <z_add_thread_to_ready_q>
		z_reschedule(&lock, key);
    3964:	4629      	mov	r1, r5
    3966:	4809      	ldr	r0, [pc, #36]	; (398c <z_impl_k_mutex_unlock+0x94>)
    3968:	f001 ffef 	bl	594a <z_reschedule>
    396c:	e7d5      	b.n	391a <z_impl_k_mutex_unlock+0x22>
		mutex->lock_count = 0U;
    396e:	60e0      	str	r0, [r4, #12]
	__asm__ volatile(
    3970:	f385 8811 	msr	BASEPRI, r5
    3974:	f3bf 8f6f 	isb	sy
    3978:	e7cf      	b.n	391a <z_impl_k_mutex_unlock+0x22>
		return -EINVAL;
    397a:	f06f 0015 	mvn.w	r0, #21
    397e:	e7cf      	b.n	3920 <z_impl_k_mutex_unlock+0x28>
		return -EPERM;
    3980:	f04f 30ff 	mov.w	r0, #4294967295
    3984:	e7cc      	b.n	3920 <z_impl_k_mutex_unlock+0x28>
    3986:	bf00      	nop
    3988:	2000084c 	.word	0x2000084c
    398c:	20000ccd 	.word	0x20000ccd

00003990 <z_reset_time_slice>:
 */
static struct k_thread *pending_current;
#endif

void z_reset_time_slice(void)
{
    3990:	b510      	push	{r4, lr}
	/* Add the elapsed time since the last announced tick to the
	 * slice count, as we'll see those "expired" ticks arrive in a
	 * FUTURE z_time_slice() call.
	 */
	if (slice_time != 0) {
    3992:	4c08      	ldr	r4, [pc, #32]	; (39b4 <z_reset_time_slice+0x24>)
    3994:	6823      	ldr	r3, [r4, #0]
    3996:	b15b      	cbz	r3, 39b0 <z_reset_time_slice+0x20>
		_current_cpu->slice_ticks = slice_time + z_clock_elapsed();
    3998:	f7fd fd1a 	bl	13d0 <z_clock_elapsed>
    399c:	6823      	ldr	r3, [r4, #0]
    399e:	4a06      	ldr	r2, [pc, #24]	; (39b8 <z_reset_time_slice+0x28>)
    39a0:	4418      	add	r0, r3
    39a2:	6110      	str	r0, [r2, #16]
		z_set_timeout_expiry(slice_time, false);
    39a4:	2100      	movs	r1, #0
    39a6:	4618      	mov	r0, r3
	}
}
    39a8:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
		z_set_timeout_expiry(slice_time, false);
    39ac:	f002 b88e 	b.w	5acc <z_set_timeout_expiry>
}
    39b0:	bd10      	pop	{r4, pc}
    39b2:	bf00      	nop
    39b4:	20000884 	.word	0x20000884
    39b8:	2000084c 	.word	0x2000084c

000039bc <k_sched_time_slice_set>:

void k_sched_time_slice_set(s32_t slice, int prio)
{
    39bc:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    39be:	460d      	mov	r5, r1
	__asm__ volatile(
    39c0:	f04f 0320 	mov.w	r3, #32
    39c4:	f3ef 8411 	mrs	r4, BASEPRI
    39c8:	f383 8811 	msr	BASEPRI, r3
    39cc:	f3bf 8f6f 	isb	sy
	LOCKED(&sched_spinlock) {
		_current_cpu->slice_ticks = 0;
    39d0:	4b0d      	ldr	r3, [pc, #52]	; (3a08 <k_sched_time_slice_set+0x4c>)
		} else {
			return t * (to_hz / from_hz);
		}
	} else {
		if (result32) {
			return (u32_t)((t * to_hz + off) / from_hz);
    39d2:	f44f 4100 	mov.w	r1, #32768	; 0x8000
    39d6:	f240 36e7 	movw	r6, #999	; 0x3e7
    39da:	2700      	movs	r7, #0
    39dc:	fbe1 6700 	umlal	r6, r7, r1, r0
    39e0:	2200      	movs	r2, #0
    39e2:	611a      	str	r2, [r3, #16]
    39e4:	4630      	mov	r0, r6
    39e6:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
    39ea:	2300      	movs	r3, #0
    39ec:	4639      	mov	r1, r7
    39ee:	f7fc fb87 	bl	100 <__aeabi_uldivmod>
		slice_time = k_ms_to_ticks_ceil32(slice);
    39f2:	4b06      	ldr	r3, [pc, #24]	; (3a0c <k_sched_time_slice_set+0x50>)
    39f4:	6018      	str	r0, [r3, #0]
		slice_max_prio = prio;
    39f6:	4b06      	ldr	r3, [pc, #24]	; (3a10 <k_sched_time_slice_set+0x54>)
    39f8:	601d      	str	r5, [r3, #0]
		z_reset_time_slice();
    39fa:	f7ff ffc9 	bl	3990 <z_reset_time_slice>
	__asm__ volatile(
    39fe:	f384 8811 	msr	BASEPRI, r4
    3a02:	f3bf 8f6f 	isb	sy
	}
}
    3a06:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    3a08:	2000084c 	.word	0x2000084c
    3a0c:	20000884 	.word	0x20000884
    3a10:	20000880 	.word	0x20000880

00003a14 <k_sched_lock>:
	__asm__ volatile(
    3a14:	f04f 0320 	mov.w	r3, #32
    3a18:	f3ef 8111 	mrs	r1, BASEPRI
    3a1c:	f383 8811 	msr	BASEPRI, r3
    3a20:	f3bf 8f6f 	isb	sy
	--_current->base.sched_locked;
    3a24:	4b04      	ldr	r3, [pc, #16]	; (3a38 <k_sched_lock+0x24>)
    3a26:	689a      	ldr	r2, [r3, #8]
    3a28:	7bd3      	ldrb	r3, [r2, #15]
    3a2a:	3b01      	subs	r3, #1
    3a2c:	73d3      	strb	r3, [r2, #15]
	__asm__ volatile(
    3a2e:	f381 8811 	msr	BASEPRI, r1
    3a32:	f3bf 8f6f 	isb	sy
void k_sched_lock(void)
{
	LOCKED(&sched_spinlock) {
		z_sched_lock();
	}
}
    3a36:	4770      	bx	lr
    3a38:	2000084c 	.word	0x2000084c

00003a3c <z_priq_dumb_remove>:
}

void z_priq_dumb_remove(sys_dlist_t *pq, struct k_thread *thread)
{
#if defined(CONFIG_SWAP_NONATOMIC) && defined(CONFIG_SCHED_DUMB)
	if (pq == &_kernel.ready_q.runq && thread == _current &&
    3a3c:	4b09      	ldr	r3, [pc, #36]	; (3a64 <z_priq_dumb_remove+0x28>)
    3a3e:	f103 0228 	add.w	r2, r3, #40	; 0x28
    3a42:	4282      	cmp	r2, r0
    3a44:	d105      	bne.n	3a52 <z_priq_dumb_remove+0x16>
    3a46:	689b      	ldr	r3, [r3, #8]
    3a48:	428b      	cmp	r3, r1
    3a4a:	d102      	bne.n	3a52 <z_priq_dumb_remove+0x16>
    3a4c:	7b4b      	ldrb	r3, [r1, #13]
    3a4e:	06db      	lsls	r3, r3, #27
    3a50:	d106      	bne.n	3a60 <z_priq_dumb_remove+0x24>
 * @return N/A
 */

static inline void sys_dlist_remove(sys_dnode_t *node)
{
	node->prev->next = node->next;
    3a52:	e9d1 3200 	ldrd	r3, r2, [r1]
    3a56:	6013      	str	r3, [r2, #0]
	node->next->prev = node->prev;
    3a58:	605a      	str	r2, [r3, #4]
	node->next = NULL;
    3a5a:	2300      	movs	r3, #0
	node->prev = NULL;
    3a5c:	e9c1 3300 	strd	r3, r3, [r1]
#endif

	__ASSERT_NO_MSG(!z_is_idle_thread_object(thread));

	sys_dlist_remove(&thread->base.qnode_dlist);
}
    3a60:	4770      	bx	lr
    3a62:	bf00      	nop
    3a64:	2000084c 	.word	0x2000084c

00003a68 <update_cache>:
{
    3a68:	b538      	push	{r3, r4, r5, lr}
	struct k_thread *thread = _priq_run_best(&_kernel.ready_q.runq);
    3a6a:	4c0d      	ldr	r4, [pc, #52]	; (3aa0 <update_cache+0x38>)
{
    3a6c:	4602      	mov	r2, r0
	struct k_thread *thread = _priq_run_best(&_kernel.ready_q.runq);
    3a6e:	f104 0028 	add.w	r0, r4, #40	; 0x28
    3a72:	f001 ff8b 	bl	598c <z_priq_dumb_best>
	return thread ? thread : _current_cpu->idle_thread;
    3a76:	4605      	mov	r5, r0
    3a78:	b900      	cbnz	r0, 3a7c <update_cache+0x14>
    3a7a:	68e5      	ldr	r5, [r4, #12]
	if (preempt_ok != 0) {
    3a7c:	68a3      	ldr	r3, [r4, #8]
    3a7e:	b94a      	cbnz	r2, 3a94 <update_cache+0x2c>
	if (z_is_thread_prevented_from_running(_current)) {
    3a80:	7b5a      	ldrb	r2, [r3, #13]
    3a82:	06d2      	lsls	r2, r2, #27
    3a84:	d106      	bne.n	3a94 <update_cache+0x2c>
	if (IS_ENABLED(CONFIG_SWAP_NONATOMIC)
    3a86:	69aa      	ldr	r2, [r5, #24]
    3a88:	b922      	cbnz	r2, 3a94 <update_cache+0x2c>
	if (is_preempt(_current) || is_metairq(thread)) {
    3a8a:	89da      	ldrh	r2, [r3, #14]
    3a8c:	2a7f      	cmp	r2, #127	; 0x7f
    3a8e:	d901      	bls.n	3a94 <update_cache+0x2c>
		_kernel.ready_q.cache = _current;
    3a90:	6263      	str	r3, [r4, #36]	; 0x24
}
    3a92:	bd38      	pop	{r3, r4, r5, pc}
		if (thread != _current) {
    3a94:	429d      	cmp	r5, r3
    3a96:	d001      	beq.n	3a9c <update_cache+0x34>
			z_reset_time_slice();
    3a98:	f7ff ff7a 	bl	3990 <z_reset_time_slice>
		_kernel.ready_q.cache = thread;
    3a9c:	6265      	str	r5, [r4, #36]	; 0x24
}
    3a9e:	e7f8      	b.n	3a92 <update_cache+0x2a>
    3aa0:	2000084c 	.word	0x2000084c

00003aa4 <k_sched_unlock>:
{
    3aa4:	b510      	push	{r4, lr}
	__asm__ volatile(
    3aa6:	f04f 0320 	mov.w	r3, #32
    3aaa:	f3ef 8411 	mrs	r4, BASEPRI
    3aae:	f383 8811 	msr	BASEPRI, r3
    3ab2:	f3bf 8f6f 	isb	sy
		++_current->base.sched_locked;
    3ab6:	4b08      	ldr	r3, [pc, #32]	; (3ad8 <k_sched_unlock+0x34>)
    3ab8:	689a      	ldr	r2, [r3, #8]
    3aba:	7bd3      	ldrb	r3, [r2, #15]
    3abc:	3301      	adds	r3, #1
    3abe:	73d3      	strb	r3, [r2, #15]
		update_cache(0);
    3ac0:	2000      	movs	r0, #0
    3ac2:	f7ff ffd1 	bl	3a68 <update_cache>
	__asm__ volatile(
    3ac6:	f384 8811 	msr	BASEPRI, r4
    3aca:	f3bf 8f6f 	isb	sy
}
    3ace:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
	z_reschedule_unlocked();
    3ad2:	f001 bf51 	b.w	5978 <z_reschedule_unlocked>
    3ad6:	bf00      	nop
    3ad8:	2000084c 	.word	0x2000084c

00003adc <z_add_thread_to_ready_q>:
{
    3adc:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
	__asm__ volatile(
    3ade:	f04f 0320 	mov.w	r3, #32
    3ae2:	f3ef 8411 	mrs	r4, BASEPRI
    3ae6:	f383 8811 	msr	BASEPRI, r3
    3aea:	f3bf 8f6f 	isb	sy
	return list->head == list;
    3aee:	4a15      	ldr	r2, [pc, #84]	; (3b44 <z_add_thread_to_ready_q+0x68>)
    3af0:	4611      	mov	r1, r2
    3af2:	f851 3f28 	ldr.w	r3, [r1, #40]!
	return sys_dlist_is_empty(list) ? NULL : list->head;
    3af6:	428b      	cmp	r3, r1
    3af8:	d01d      	beq.n	3b36 <z_add_thread_to_ready_q+0x5a>
	SYS_DLIST_FOR_EACH_CONTAINER(pq, t, base.qnode_dlist) {
    3afa:	b1e3      	cbz	r3, 3b36 <z_add_thread_to_ready_q+0x5a>
    3afc:	6ad6      	ldr	r6, [r2, #44]	; 0x2c
	if (thread_1->base.prio < thread_2->base.prio) {
    3afe:	f990 500e 	ldrsb.w	r5, [r0, #14]
    3b02:	f993 700e 	ldrsb.w	r7, [r3, #14]
    3b06:	42af      	cmp	r7, r5
    3b08:	dd10      	ble.n	3b2c <z_add_thread_to_ready_q+0x50>
	node->prev = successor->prev;
    3b0a:	685a      	ldr	r2, [r3, #4]
	node->next = successor;
    3b0c:	e9c0 3200 	strd	r3, r2, [r0]
	successor->prev->next = node;
    3b10:	6010      	str	r0, [r2, #0]
	successor->prev = node;
    3b12:	6058      	str	r0, [r3, #4]
	thread->base.thread_state |= states;
    3b14:	7b43      	ldrb	r3, [r0, #13]
    3b16:	f063 037f 	orn	r3, r3, #127	; 0x7f
    3b1a:	7343      	strb	r3, [r0, #13]
		update_cache(0);
    3b1c:	2000      	movs	r0, #0
    3b1e:	f7ff ffa3 	bl	3a68 <update_cache>
	__asm__ volatile(
    3b22:	f384 8811 	msr	BASEPRI, r4
    3b26:	f3bf 8f6f 	isb	sy
}
    3b2a:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	return (node == list->tail) ? NULL : node->next;
    3b2c:	42b3      	cmp	r3, r6
    3b2e:	d002      	beq.n	3b36 <z_add_thread_to_ready_q+0x5a>
    3b30:	681b      	ldr	r3, [r3, #0]
	SYS_DLIST_FOR_EACH_CONTAINER(pq, t, base.qnode_dlist) {
    3b32:	2b00      	cmp	r3, #0
    3b34:	d1e5      	bne.n	3b02 <z_add_thread_to_ready_q+0x26>
	node->prev = list->tail;
    3b36:	6ad3      	ldr	r3, [r2, #44]	; 0x2c
    3b38:	6043      	str	r3, [r0, #4]
	list->tail->next = node;
    3b3a:	6ad3      	ldr	r3, [r2, #44]	; 0x2c
	node->next = list;
    3b3c:	6001      	str	r1, [r0, #0]
	list->tail->next = node;
    3b3e:	6018      	str	r0, [r3, #0]
	list->tail = node;
    3b40:	62d0      	str	r0, [r2, #44]	; 0x2c
    3b42:	e7e7      	b.n	3b14 <z_add_thread_to_ready_q+0x38>
    3b44:	2000084c 	.word	0x2000084c

00003b48 <z_move_thread_to_end_of_prio_q>:
{
    3b48:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    3b4a:	4604      	mov	r4, r0
	__asm__ volatile(
    3b4c:	f04f 0320 	mov.w	r3, #32
    3b50:	f3ef 8511 	mrs	r5, BASEPRI
    3b54:	f383 8811 	msr	BASEPRI, r3
    3b58:	f3bf 8f6f 	isb	sy
		if (z_is_thread_queued(thread)) {
    3b5c:	f990 300d 	ldrsb.w	r3, [r0, #13]
    3b60:	2b00      	cmp	r3, #0
    3b62:	da03      	bge.n	3b6c <z_move_thread_to_end_of_prio_q+0x24>
			_priq_run_remove(&_kernel.ready_q.runq, thread);
    3b64:	4601      	mov	r1, r0
    3b66:	4818      	ldr	r0, [pc, #96]	; (3bc8 <z_move_thread_to_end_of_prio_q+0x80>)
    3b68:	f7ff ff68 	bl	3a3c <z_priq_dumb_remove>
	return list->head == list;
    3b6c:	4a17      	ldr	r2, [pc, #92]	; (3bcc <z_move_thread_to_end_of_prio_q+0x84>)
    3b6e:	e9d2 300a 	ldrd	r3, r0, [r2, #40]	; 0x28
	return sys_dlist_is_empty(list) ? NULL : list->head;
    3b72:	f102 0128 	add.w	r1, r2, #40	; 0x28
    3b76:	428b      	cmp	r3, r1
    3b78:	d01f      	beq.n	3bba <z_move_thread_to_end_of_prio_q+0x72>
	SYS_DLIST_FOR_EACH_CONTAINER(pq, t, base.qnode_dlist) {
    3b7a:	b1f3      	cbz	r3, 3bba <z_move_thread_to_end_of_prio_q+0x72>
	if (thread_1->base.prio < thread_2->base.prio) {
    3b7c:	f994 600e 	ldrsb.w	r6, [r4, #14]
    3b80:	f993 700e 	ldrsb.w	r7, [r3, #14]
    3b84:	42b7      	cmp	r7, r6
    3b86:	dd13      	ble.n	3bb0 <z_move_thread_to_end_of_prio_q+0x68>
	node->prev = successor->prev;
    3b88:	6859      	ldr	r1, [r3, #4]
	node->next = successor;
    3b8a:	e9c4 3100 	strd	r3, r1, [r4]
	successor->prev->next = node;
    3b8e:	600c      	str	r4, [r1, #0]
	successor->prev = node;
    3b90:	605c      	str	r4, [r3, #4]
    3b92:	7b63      	ldrb	r3, [r4, #13]
		update_cache(thread == _current);
    3b94:	6890      	ldr	r0, [r2, #8]
    3b96:	f063 037f 	orn	r3, r3, #127	; 0x7f
    3b9a:	7363      	strb	r3, [r4, #13]
    3b9c:	1b03      	subs	r3, r0, r4
    3b9e:	4258      	negs	r0, r3
    3ba0:	4158      	adcs	r0, r3
    3ba2:	f7ff ff61 	bl	3a68 <update_cache>
	__asm__ volatile(
    3ba6:	f385 8811 	msr	BASEPRI, r5
    3baa:	f3bf 8f6f 	isb	sy
}
    3bae:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	return (node == list->tail) ? NULL : node->next;
    3bb0:	4298      	cmp	r0, r3
    3bb2:	d002      	beq.n	3bba <z_move_thread_to_end_of_prio_q+0x72>
    3bb4:	681b      	ldr	r3, [r3, #0]
	SYS_DLIST_FOR_EACH_CONTAINER(pq, t, base.qnode_dlist) {
    3bb6:	2b00      	cmp	r3, #0
    3bb8:	d1e2      	bne.n	3b80 <z_move_thread_to_end_of_prio_q+0x38>
	node->prev = list->tail;
    3bba:	e9c4 1000 	strd	r1, r0, [r4]
	list->tail->next = node;
    3bbe:	6ad3      	ldr	r3, [r2, #44]	; 0x2c
    3bc0:	601c      	str	r4, [r3, #0]
	list->tail = node;
    3bc2:	62d4      	str	r4, [r2, #44]	; 0x2c
    3bc4:	e7e5      	b.n	3b92 <z_move_thread_to_end_of_prio_q+0x4a>
    3bc6:	bf00      	nop
    3bc8:	20000874 	.word	0x20000874
    3bcc:	2000084c 	.word	0x2000084c

00003bd0 <z_time_slice>:
	if (pending_current == _current) {
    3bd0:	4a15      	ldr	r2, [pc, #84]	; (3c28 <z_time_slice+0x58>)
    3bd2:	4916      	ldr	r1, [pc, #88]	; (3c2c <z_time_slice+0x5c>)
{
    3bd4:	b538      	push	{r3, r4, r5, lr}
	if (pending_current == _current) {
    3bd6:	680c      	ldr	r4, [r1, #0]
    3bd8:	6893      	ldr	r3, [r2, #8]
    3bda:	42a3      	cmp	r3, r4
    3bdc:	4614      	mov	r4, r2
    3bde:	d103      	bne.n	3be8 <z_time_slice+0x18>
}
    3be0:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
			z_reset_time_slice();
    3be4:	f7ff bed4 	b.w	3990 <z_reset_time_slice>
	pending_current = NULL;
    3be8:	2500      	movs	r5, #0
    3bea:	600d      	str	r5, [r1, #0]
	if (slice_time && sliceable(_current)) {
    3bec:	4910      	ldr	r1, [pc, #64]	; (3c30 <z_time_slice+0x60>)
    3bee:	6809      	ldr	r1, [r1, #0]
    3bf0:	b1b9      	cbz	r1, 3c22 <z_time_slice+0x52>
		&& !z_is_thread_timeout_active(thread);
    3bf2:	89d9      	ldrh	r1, [r3, #14]
    3bf4:	297f      	cmp	r1, #127	; 0x7f
    3bf6:	d814      	bhi.n	3c22 <z_time_slice+0x52>
		&& !z_is_prio_higher(thread->base.prio, slice_max_prio)
    3bf8:	490e      	ldr	r1, [pc, #56]	; (3c34 <z_time_slice+0x64>)
    3bfa:	f993 500e 	ldrsb.w	r5, [r3, #14]
    3bfe:	6809      	ldr	r1, [r1, #0]
    3c00:	428d      	cmp	r5, r1
    3c02:	db0e      	blt.n	3c22 <z_time_slice+0x52>
		&& !z_is_idle_thread_object(thread)
    3c04:	490c      	ldr	r1, [pc, #48]	; (3c38 <z_time_slice+0x68>)
    3c06:	428b      	cmp	r3, r1
    3c08:	d00b      	beq.n	3c22 <z_time_slice+0x52>
		&& !z_is_thread_timeout_active(thread);
    3c0a:	6999      	ldr	r1, [r3, #24]
    3c0c:	b949      	cbnz	r1, 3c22 <z_time_slice+0x52>
		if (ticks >= _current_cpu->slice_ticks) {
    3c0e:	6911      	ldr	r1, [r2, #16]
    3c10:	4281      	cmp	r1, r0
    3c12:	dc03      	bgt.n	3c1c <z_time_slice+0x4c>
			z_move_thread_to_end_of_prio_q(_current);
    3c14:	4618      	mov	r0, r3
    3c16:	f7ff ff97 	bl	3b48 <z_move_thread_to_end_of_prio_q>
    3c1a:	e7e1      	b.n	3be0 <z_time_slice+0x10>
			_current_cpu->slice_ticks -= ticks;
    3c1c:	1a09      	subs	r1, r1, r0
    3c1e:	6111      	str	r1, [r2, #16]
}
    3c20:	bd38      	pop	{r3, r4, r5, pc}
		_current_cpu->slice_ticks = 0;
    3c22:	2300      	movs	r3, #0
    3c24:	6123      	str	r3, [r4, #16]
    3c26:	e7fb      	b.n	3c20 <z_time_slice+0x50>
    3c28:	2000084c 	.word	0x2000084c
    3c2c:	2000087c 	.word	0x2000087c
    3c30:	20000884 	.word	0x20000884
    3c34:	20000880 	.word	0x20000880
    3c38:	20000774 	.word	0x20000774

00003c3c <z_thread_single_suspend>:
{
    3c3c:	b570      	push	{r4, r5, r6, lr}
    3c3e:	4604      	mov	r4, r0
	z_add_timeout(&th->base.timeout, z_thread_timeout, ticks);
}

static inline int z_abort_thread_timeout(struct k_thread *thread)
{
	return z_abort_timeout(&thread->base.timeout);
    3c40:	3018      	adds	r0, #24
    3c42:	f001 ff1d 	bl	5a80 <z_abort_timeout>
	__asm__ volatile(
    3c46:	f04f 0320 	mov.w	r3, #32
    3c4a:	f3ef 8611 	mrs	r6, BASEPRI
    3c4e:	f383 8811 	msr	BASEPRI, r3
    3c52:	f3bf 8f6f 	isb	sy
		if (z_is_thread_queued(thread)) {
    3c56:	f994 300d 	ldrsb.w	r3, [r4, #13]
    3c5a:	2b00      	cmp	r3, #0
    3c5c:	da07      	bge.n	3c6e <z_thread_single_suspend+0x32>
			_priq_run_remove(&_kernel.ready_q.runq, thread);
    3c5e:	4621      	mov	r1, r4
    3c60:	480e      	ldr	r0, [pc, #56]	; (3c9c <z_thread_single_suspend+0x60>)
    3c62:	f7ff feeb 	bl	3a3c <z_priq_dumb_remove>
	thread->base.thread_state &= ~states;
    3c66:	7b63      	ldrb	r3, [r4, #13]
    3c68:	f003 037f 	and.w	r3, r3, #127	; 0x7f
    3c6c:	7363      	strb	r3, [r4, #13]
		update_cache(thread == _current);
    3c6e:	4d0c      	ldr	r5, [pc, #48]	; (3ca0 <z_thread_single_suspend+0x64>)
	thread->base.thread_state |= _THREAD_SUSPENDED;
    3c70:	7b63      	ldrb	r3, [r4, #13]
    3c72:	68a8      	ldr	r0, [r5, #8]
    3c74:	f043 0310 	orr.w	r3, r3, #16
    3c78:	7363      	strb	r3, [r4, #13]
    3c7a:	1b03      	subs	r3, r0, r4
    3c7c:	4258      	negs	r0, r3
    3c7e:	4158      	adcs	r0, r3
    3c80:	f7ff fef2 	bl	3a68 <update_cache>
	__asm__ volatile(
    3c84:	f386 8811 	msr	BASEPRI, r6
    3c88:	f3bf 8f6f 	isb	sy
	if (thread == _current) {
    3c8c:	68ab      	ldr	r3, [r5, #8]
    3c8e:	42a3      	cmp	r3, r4
    3c90:	d103      	bne.n	3c9a <z_thread_single_suspend+0x5e>
}
    3c92:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
		z_reschedule_unlocked();
    3c96:	f001 be6f 	b.w	5978 <z_reschedule_unlocked>
}
    3c9a:	bd70      	pop	{r4, r5, r6, pc}
    3c9c:	20000874 	.word	0x20000874
    3ca0:	2000084c 	.word	0x2000084c

00003ca4 <z_thread_single_abort>:
	if (thread->fn_abort != NULL) {
    3ca4:	6d03      	ldr	r3, [r0, #80]	; 0x50
{
    3ca6:	b570      	push	{r4, r5, r6, lr}
    3ca8:	4604      	mov	r4, r0
	if (thread->fn_abort != NULL) {
    3caa:	b103      	cbz	r3, 3cae <z_thread_single_abort+0xa>
		thread->fn_abort();
    3cac:	4798      	blx	r3
    3cae:	f104 0018 	add.w	r0, r4, #24
    3cb2:	f001 fee5 	bl	5a80 <z_abort_timeout>
	__asm__ volatile(
    3cb6:	f04f 0320 	mov.w	r3, #32
    3cba:	f3ef 8511 	mrs	r5, BASEPRI
    3cbe:	f383 8811 	msr	BASEPRI, r3
    3cc2:	f3bf 8f6f 	isb	sy
		if (z_is_thread_ready(thread)) {
    3cc6:	4620      	mov	r0, r4
    3cc8:	f001 fe0d 	bl	58e6 <z_is_thread_ready>
    3ccc:	4606      	mov	r6, r0
    3cce:	b1d8      	cbz	r0, 3d08 <z_thread_single_abort+0x64>
			if (z_is_thread_queued(thread)) {
    3cd0:	f994 300d 	ldrsb.w	r3, [r4, #13]
    3cd4:	2b00      	cmp	r3, #0
    3cd6:	da07      	bge.n	3ce8 <z_thread_single_abort+0x44>
				_priq_run_remove(&_kernel.ready_q.runq,
    3cd8:	4621      	mov	r1, r4
    3cda:	4812      	ldr	r0, [pc, #72]	; (3d24 <z_thread_single_abort+0x80>)
    3cdc:	f7ff feae 	bl	3a3c <z_priq_dumb_remove>
	thread->base.thread_state &= ~states;
    3ce0:	7b63      	ldrb	r3, [r4, #13]
    3ce2:	f003 037f 	and.w	r3, r3, #127	; 0x7f
    3ce6:	7363      	strb	r3, [r4, #13]
			update_cache(thread == _current);
    3ce8:	4b0f      	ldr	r3, [pc, #60]	; (3d28 <z_thread_single_abort+0x84>)
    3cea:	6898      	ldr	r0, [r3, #8]
    3cec:	1b02      	subs	r2, r0, r4
    3cee:	4250      	negs	r0, r2
    3cf0:	4150      	adcs	r0, r2
    3cf2:	f7ff feb9 	bl	3a68 <update_cache>
		thread->base.thread_state |= mask;
    3cf6:	7b63      	ldrb	r3, [r4, #13]
    3cf8:	f043 0308 	orr.w	r3, r3, #8
    3cfc:	7363      	strb	r3, [r4, #13]
	__asm__ volatile(
    3cfe:	f385 8811 	msr	BASEPRI, r5
    3d02:	f3bf 8f6f 	isb	sy
}
    3d06:	bd70      	pop	{r4, r5, r6, pc}
			if (z_is_thread_pending(thread)) {
    3d08:	7b63      	ldrb	r3, [r4, #13]
    3d0a:	079b      	lsls	r3, r3, #30
    3d0c:	d5f3      	bpl.n	3cf6 <z_thread_single_abort+0x52>
				_priq_wait_remove(&pended_on(thread)->waitq,
    3d0e:	4621      	mov	r1, r4
    3d10:	68a0      	ldr	r0, [r4, #8]
    3d12:	f7ff fe93 	bl	3a3c <z_priq_dumb_remove>
	thread->base.thread_state &= ~_THREAD_PENDING;
    3d16:	7b63      	ldrb	r3, [r4, #13]
				thread->base.pended_on = NULL;
    3d18:	60a6      	str	r6, [r4, #8]
    3d1a:	f023 0302 	bic.w	r3, r3, #2
    3d1e:	7363      	strb	r3, [r4, #13]
    3d20:	e7e9      	b.n	3cf6 <z_thread_single_abort+0x52>
    3d22:	bf00      	nop
    3d24:	20000874 	.word	0x20000874
    3d28:	2000084c 	.word	0x2000084c

00003d2c <z_remove_thread_from_ready_q>:
{
    3d2c:	b538      	push	{r3, r4, r5, lr}
    3d2e:	4604      	mov	r4, r0
	__asm__ volatile(
    3d30:	f04f 0320 	mov.w	r3, #32
    3d34:	f3ef 8511 	mrs	r5, BASEPRI
    3d38:	f383 8811 	msr	BASEPRI, r3
    3d3c:	f3bf 8f6f 	isb	sy
		if (z_is_thread_queued(thread)) {
    3d40:	f990 300d 	ldrsb.w	r3, [r0, #13]
    3d44:	2b00      	cmp	r3, #0
    3d46:	da07      	bge.n	3d58 <z_remove_thread_from_ready_q+0x2c>
			_priq_run_remove(&_kernel.ready_q.runq, thread);
    3d48:	4601      	mov	r1, r0
    3d4a:	4809      	ldr	r0, [pc, #36]	; (3d70 <z_remove_thread_from_ready_q+0x44>)
    3d4c:	f7ff fe76 	bl	3a3c <z_priq_dumb_remove>
	thread->base.thread_state &= ~states;
    3d50:	7b63      	ldrb	r3, [r4, #13]
    3d52:	f003 037f 	and.w	r3, r3, #127	; 0x7f
    3d56:	7363      	strb	r3, [r4, #13]
		update_cache(thread == _current);
    3d58:	4b06      	ldr	r3, [pc, #24]	; (3d74 <z_remove_thread_from_ready_q+0x48>)
    3d5a:	6898      	ldr	r0, [r3, #8]
    3d5c:	1b03      	subs	r3, r0, r4
    3d5e:	4258      	negs	r0, r3
    3d60:	4158      	adcs	r0, r3
    3d62:	f7ff fe81 	bl	3a68 <update_cache>
	__asm__ volatile(
    3d66:	f385 8811 	msr	BASEPRI, r5
    3d6a:	f3bf 8f6f 	isb	sy
}
    3d6e:	bd38      	pop	{r3, r4, r5, pc}
    3d70:	20000874 	.word	0x20000874
    3d74:	2000084c 	.word	0x2000084c

00003d78 <pend>:
{
    3d78:	b570      	push	{r4, r5, r6, lr}
    3d7a:	4604      	mov	r4, r0
    3d7c:	460d      	mov	r5, r1
    3d7e:	4616      	mov	r6, r2
	z_remove_thread_from_ready_q(thread);
    3d80:	f7ff ffd4 	bl	3d2c <z_remove_thread_from_ready_q>
	thread->base.thread_state |= _THREAD_PENDING;
    3d84:	7b63      	ldrb	r3, [r4, #13]
    3d86:	f043 0302 	orr.w	r3, r3, #2
    3d8a:	7363      	strb	r3, [r4, #13]
	if (wait_q != NULL) {
    3d8c:	b17d      	cbz	r5, 3dae <pend+0x36>
	return list->head == list;
    3d8e:	682b      	ldr	r3, [r5, #0]
		thread->base.pended_on = wait_q;
    3d90:	60a5      	str	r5, [r4, #8]
	return sys_dlist_is_empty(list) ? NULL : list->head;
    3d92:	429d      	cmp	r5, r3
    3d94:	d029      	beq.n	3dea <pend+0x72>
	SYS_DLIST_FOR_EACH_CONTAINER(pq, t, base.qnode_dlist) {
    3d96:	b343      	cbz	r3, 3dea <pend+0x72>
	if (thread_1->base.prio < thread_2->base.prio) {
    3d98:	f994 200e 	ldrsb.w	r2, [r4, #14]
    3d9c:	f993 100e 	ldrsb.w	r1, [r3, #14]
    3da0:	4291      	cmp	r1, r2
    3da2:	dd1c      	ble.n	3dde <pend+0x66>
	node->prev = successor->prev;
    3da4:	685a      	ldr	r2, [r3, #4]
	node->next = successor;
    3da6:	e9c4 3200 	strd	r3, r2, [r4]
	successor->prev->next = node;
    3daa:	6014      	str	r4, [r2, #0]
	successor->prev = node;
    3dac:	605c      	str	r4, [r3, #4]
	if (timeout != K_FOREVER) {
    3dae:	1c73      	adds	r3, r6, #1
    3db0:	d022      	beq.n	3df8 <pend+0x80>
    3db2:	ea26 76e6 	bic.w	r6, r6, r6, asr #31
    3db6:	f44f 4500 	mov.w	r5, #32768	; 0x8000
    3dba:	f240 30e7 	movw	r0, #999	; 0x3e7
    3dbe:	2100      	movs	r1, #0
    3dc0:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
    3dc4:	fbc5 0106 	smlal	r0, r1, r5, r6
    3dc8:	2300      	movs	r3, #0
    3dca:	f7fc f999 	bl	100 <__aeabi_uldivmod>
	z_add_timeout(&th->base.timeout, z_thread_timeout, ticks);
    3dce:	490b      	ldr	r1, [pc, #44]	; (3dfc <pend+0x84>)
    3dd0:	1c42      	adds	r2, r0, #1
    3dd2:	f104 0018 	add.w	r0, r4, #24
}
    3dd6:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
    3dda:	f000 ba85 	b.w	42e8 <z_add_timeout>
	return (node == list->tail) ? NULL : node->next;
    3dde:	6869      	ldr	r1, [r5, #4]
    3de0:	428b      	cmp	r3, r1
    3de2:	d002      	beq.n	3dea <pend+0x72>
    3de4:	681b      	ldr	r3, [r3, #0]
	SYS_DLIST_FOR_EACH_CONTAINER(pq, t, base.qnode_dlist) {
    3de6:	2b00      	cmp	r3, #0
    3de8:	d1d8      	bne.n	3d9c <pend+0x24>
	node->prev = list->tail;
    3dea:	686b      	ldr	r3, [r5, #4]
    3dec:	6063      	str	r3, [r4, #4]
	list->tail->next = node;
    3dee:	686b      	ldr	r3, [r5, #4]
	node->next = list;
    3df0:	6025      	str	r5, [r4, #0]
	list->tail->next = node;
    3df2:	601c      	str	r4, [r3, #0]
	list->tail = node;
    3df4:	606c      	str	r4, [r5, #4]
    3df6:	e7da      	b.n	3dae <pend+0x36>
}
    3df8:	bd70      	pop	{r4, r5, r6, pc}
    3dfa:	bf00      	nop
    3dfc:	00005999 	.word	0x00005999

00003e00 <z_pend_curr>:
{
    3e00:	b510      	push	{r4, lr}
    3e02:	460c      	mov	r4, r1
    3e04:	4611      	mov	r1, r2
	pending_current = _current;
    3e06:	4a06      	ldr	r2, [pc, #24]	; (3e20 <z_pend_curr+0x20>)
    3e08:	6890      	ldr	r0, [r2, #8]
    3e0a:	4a06      	ldr	r2, [pc, #24]	; (3e24 <z_pend_curr+0x24>)
    3e0c:	6010      	str	r0, [r2, #0]
	pend(_current, wait_q, timeout);
    3e0e:	461a      	mov	r2, r3
    3e10:	f7ff ffb2 	bl	3d78 <pend>
    3e14:	4620      	mov	r0, r4
}
    3e16:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
    3e1a:	f7fd bc37 	b.w	168c <arch_swap>
    3e1e:	bf00      	nop
    3e20:	2000084c 	.word	0x2000084c
    3e24:	2000087c 	.word	0x2000087c

00003e28 <z_tick_sleep.part.19>:
	z_impl_k_yield();
}
#include <syscalls/k_yield_mrsh.c>
#endif

static s32_t z_tick_sleep(s32_t ticks)
    3e28:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
	if (ticks == 0) {
		k_yield();
		return 0;
	}

	ticks += _TICK_ALIGN;
    3e2a:	1c46      	adds	r6, r0, #1
	expected_wakeup_time = ticks + z_tick_get_32();
    3e2c:	f001 fe68 	bl	5b00 <z_tick_get_32>
    3e30:	1834      	adds	r4, r6, r0
	__asm__ volatile(
    3e32:	f04f 0320 	mov.w	r3, #32
    3e36:	f3ef 8711 	mrs	r7, BASEPRI
    3e3a:	f383 8811 	msr	BASEPRI, r3
    3e3e:	f3bf 8f6f 	isb	sy
	 */
	struct k_spinlock local_lock = {};
	k_spinlock_key_t key = k_spin_lock(&local_lock);

#if defined(CONFIG_TIMESLICING) && defined(CONFIG_SWAP_NONATOMIC)
	pending_current = _current;
    3e42:	4d0d      	ldr	r5, [pc, #52]	; (3e78 <z_tick_sleep.part.19+0x50>)
    3e44:	4b0d      	ldr	r3, [pc, #52]	; (3e7c <z_tick_sleep.part.19+0x54>)
    3e46:	68a8      	ldr	r0, [r5, #8]
    3e48:	6018      	str	r0, [r3, #0]
#endif
	z_remove_thread_from_ready_q(_current);
    3e4a:	f7ff ff6f 	bl	3d2c <z_remove_thread_from_ready_q>
    3e4e:	68a8      	ldr	r0, [r5, #8]
    3e50:	490b      	ldr	r1, [pc, #44]	; (3e80 <z_tick_sleep.part.19+0x58>)
    3e52:	4632      	mov	r2, r6
    3e54:	3018      	adds	r0, #24
    3e56:	f000 fa47 	bl	42e8 <z_add_timeout>
	z_add_thread_timeout(_current, ticks);
	z_mark_thread_as_suspended(_current);
    3e5a:	68aa      	ldr	r2, [r5, #8]
	thread->base.thread_state |= _THREAD_SUSPENDED;
    3e5c:	7b53      	ldrb	r3, [r2, #13]
    3e5e:	f043 0310 	orr.w	r3, r3, #16
    3e62:	7353      	strb	r3, [r2, #13]
    3e64:	4638      	mov	r0, r7
    3e66:	f7fd fc11 	bl	168c <arch_swap>

	(void)z_swap(&local_lock, key);

	__ASSERT(!z_is_thread_state_set(_current, _THREAD_SUSPENDED), "");

	ticks = expected_wakeup_time - z_tick_get_32();
    3e6a:	f001 fe49 	bl	5b00 <z_tick_get_32>
    3e6e:	1a20      	subs	r0, r4, r0
		return ticks;
	}
#endif

	return 0;
}
    3e70:	ea20 70e0 	bic.w	r0, r0, r0, asr #31
    3e74:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    3e76:	bf00      	nop
    3e78:	2000084c 	.word	0x2000084c
    3e7c:	2000087c 	.word	0x2000087c
    3e80:	00005999 	.word	0x00005999

00003e84 <z_set_prio>:
{
    3e84:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    3e88:	4604      	mov	r4, r0
    3e8a:	f04f 0320 	mov.w	r3, #32
    3e8e:	f3ef 8911 	mrs	r9, BASEPRI
    3e92:	f383 8811 	msr	BASEPRI, r3
    3e96:	f3bf 8f6f 	isb	sy
		need_sched = z_is_thread_ready(thread);
    3e9a:	f001 fd24 	bl	58e6 <z_is_thread_ready>
		if (need_sched) {
    3e9e:	b24e      	sxtb	r6, r1
    3ea0:	4680      	mov	r8, r0
    3ea2:	b360      	cbz	r0, 3efe <z_set_prio+0x7a>
				_priq_run_remove(&_kernel.ready_q.runq, thread);
    3ea4:	4d17      	ldr	r5, [pc, #92]	; (3f04 <z_set_prio+0x80>)
    3ea6:	f105 0728 	add.w	r7, r5, #40	; 0x28
    3eaa:	4621      	mov	r1, r4
    3eac:	4638      	mov	r0, r7
    3eae:	f7ff fdc5 	bl	3a3c <z_priq_dumb_remove>
	return list->head == list;
    3eb2:	6aab      	ldr	r3, [r5, #40]	; 0x28
				thread->base.prio = prio;
    3eb4:	73a6      	strb	r6, [r4, #14]
	return sys_dlist_is_empty(list) ? NULL : list->head;
    3eb6:	42bb      	cmp	r3, r7
    3eb8:	462a      	mov	r2, r5
    3eba:	d019      	beq.n	3ef0 <z_set_prio+0x6c>
	SYS_DLIST_FOR_EACH_CONTAINER(pq, t, base.qnode_dlist) {
    3ebc:	b1c3      	cbz	r3, 3ef0 <z_set_prio+0x6c>
    3ebe:	6ae9      	ldr	r1, [r5, #44]	; 0x2c
	if (thread_1->base.prio < thread_2->base.prio) {
    3ec0:	f993 000e 	ldrsb.w	r0, [r3, #14]
    3ec4:	42b0      	cmp	r0, r6
    3ec6:	dd0e      	ble.n	3ee6 <z_set_prio+0x62>
	node->prev = successor->prev;
    3ec8:	685a      	ldr	r2, [r3, #4]
	node->next = successor;
    3eca:	e9c4 3200 	strd	r3, r2, [r4]
	successor->prev->next = node;
    3ece:	6014      	str	r4, [r2, #0]
	successor->prev = node;
    3ed0:	605c      	str	r4, [r3, #4]
			update_cache(1);
    3ed2:	2001      	movs	r0, #1
    3ed4:	f7ff fdc8 	bl	3a68 <update_cache>
	__asm__ volatile(
    3ed8:	f389 8811 	msr	BASEPRI, r9
    3edc:	f3bf 8f6f 	isb	sy
}
    3ee0:	4640      	mov	r0, r8
    3ee2:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
	return (node == list->tail) ? NULL : node->next;
    3ee6:	4299      	cmp	r1, r3
    3ee8:	d002      	beq.n	3ef0 <z_set_prio+0x6c>
    3eea:	681b      	ldr	r3, [r3, #0]
	SYS_DLIST_FOR_EACH_CONTAINER(pq, t, base.qnode_dlist) {
    3eec:	2b00      	cmp	r3, #0
    3eee:	d1e7      	bne.n	3ec0 <z_set_prio+0x3c>
	node->prev = list->tail;
    3ef0:	6ad3      	ldr	r3, [r2, #44]	; 0x2c
    3ef2:	6063      	str	r3, [r4, #4]
	list->tail->next = node;
    3ef4:	6ad3      	ldr	r3, [r2, #44]	; 0x2c
	node->next = list;
    3ef6:	6027      	str	r7, [r4, #0]
	list->tail->next = node;
    3ef8:	601c      	str	r4, [r3, #0]
	list->tail = node;
    3efa:	62d4      	str	r4, [r2, #44]	; 0x2c
    3efc:	e7e9      	b.n	3ed2 <z_set_prio+0x4e>
			thread->base.prio = prio;
    3efe:	73a6      	strb	r6, [r4, #14]
    3f00:	e7ea      	b.n	3ed8 <z_set_prio+0x54>
    3f02:	bf00      	nop
    3f04:	2000084c 	.word	0x2000084c

00003f08 <z_sched_init>:
	list->head = (sys_dnode_t *)list;
    3f08:	4b04      	ldr	r3, [pc, #16]	; (3f1c <z_sched_init+0x14>)
	k_sched_time_slice_set(CONFIG_TIMESLICE_SIZE,
    3f0a:	2100      	movs	r1, #0
    3f0c:	f103 0228 	add.w	r2, r3, #40	; 0x28
	list->tail = (sys_dnode_t *)list;
    3f10:	e9c3 220a 	strd	r2, r2, [r3, #40]	; 0x28
    3f14:	4608      	mov	r0, r1
    3f16:	f7ff bd51 	b.w	39bc <k_sched_time_slice_set>
    3f1a:	bf00      	nop
    3f1c:	2000084c 	.word	0x2000084c

00003f20 <z_impl_k_yield>:
{
    3f20:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
	if (!z_is_idle_thread_object(_current)) {
    3f22:	4c23      	ldr	r4, [pc, #140]	; (3fb0 <z_impl_k_yield+0x90>)
    3f24:	4b23      	ldr	r3, [pc, #140]	; (3fb4 <z_impl_k_yield+0x94>)
    3f26:	68a2      	ldr	r2, [r4, #8]
    3f28:	429a      	cmp	r2, r3
    3f2a:	d029      	beq.n	3f80 <z_impl_k_yield+0x60>
	__asm__ volatile(
    3f2c:	f04f 0320 	mov.w	r3, #32
    3f30:	f3ef 8611 	mrs	r6, BASEPRI
    3f34:	f383 8811 	msr	BASEPRI, r3
    3f38:	f3bf 8f6f 	isb	sy
				_priq_run_remove(&_kernel.ready_q.runq,
    3f3c:	f104 0528 	add.w	r5, r4, #40	; 0x28
    3f40:	68a1      	ldr	r1, [r4, #8]
    3f42:	4628      	mov	r0, r5
    3f44:	f7ff fd7a 	bl	3a3c <z_priq_dumb_remove>
	return list->head == list;
    3f48:	6aa2      	ldr	r2, [r4, #40]	; 0x28
			_priq_run_add(&_kernel.ready_q.runq, _current);
    3f4a:	68a3      	ldr	r3, [r4, #8]
	return sys_dlist_is_empty(list) ? NULL : list->head;
    3f4c:	42aa      	cmp	r2, r5
    3f4e:	d028      	beq.n	3fa2 <z_impl_k_yield+0x82>
	SYS_DLIST_FOR_EACH_CONTAINER(pq, t, base.qnode_dlist) {
    3f50:	b33a      	cbz	r2, 3fa2 <z_impl_k_yield+0x82>
    3f52:	6ae0      	ldr	r0, [r4, #44]	; 0x2c
	if (thread_1->base.prio < thread_2->base.prio) {
    3f54:	f993 100e 	ldrsb.w	r1, [r3, #14]
    3f58:	f992 700e 	ldrsb.w	r7, [r2, #14]
    3f5c:	428f      	cmp	r7, r1
    3f5e:	dd1b      	ble.n	3f98 <z_impl_k_yield+0x78>
	node->prev = successor->prev;
    3f60:	6851      	ldr	r1, [r2, #4]
	node->next = successor;
    3f62:	e9c3 2100 	strd	r2, r1, [r3]
	successor->prev->next = node;
    3f66:	600b      	str	r3, [r1, #0]
	successor->prev = node;
    3f68:	6053      	str	r3, [r2, #4]
	thread->base.thread_state |= states;
    3f6a:	7b5a      	ldrb	r2, [r3, #13]
    3f6c:	f062 027f 	orn	r2, r2, #127	; 0x7f
    3f70:	735a      	strb	r2, [r3, #13]
			update_cache(1);
    3f72:	2001      	movs	r0, #1
    3f74:	f7ff fd78 	bl	3a68 <update_cache>
	__asm__ volatile(
    3f78:	f386 8811 	msr	BASEPRI, r6
    3f7c:	f3bf 8f6f 	isb	sy
	__asm__ volatile(
    3f80:	f04f 0320 	mov.w	r3, #32
    3f84:	f3ef 8011 	mrs	r0, BASEPRI
    3f88:	f383 8811 	msr	BASEPRI, r3
    3f8c:	f3bf 8f6f 	isb	sy
}
    3f90:	e8bd 40f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, lr}
    3f94:	f7fd bb7a 	b.w	168c <arch_swap>
	return (node == list->tail) ? NULL : node->next;
    3f98:	4282      	cmp	r2, r0
    3f9a:	d002      	beq.n	3fa2 <z_impl_k_yield+0x82>
    3f9c:	6812      	ldr	r2, [r2, #0]
	SYS_DLIST_FOR_EACH_CONTAINER(pq, t, base.qnode_dlist) {
    3f9e:	2a00      	cmp	r2, #0
    3fa0:	d1da      	bne.n	3f58 <z_impl_k_yield+0x38>
	node->prev = list->tail;
    3fa2:	6ae2      	ldr	r2, [r4, #44]	; 0x2c
    3fa4:	605a      	str	r2, [r3, #4]
	list->tail->next = node;
    3fa6:	6ae2      	ldr	r2, [r4, #44]	; 0x2c
	node->next = list;
    3fa8:	601d      	str	r5, [r3, #0]
	list->tail->next = node;
    3faa:	6013      	str	r3, [r2, #0]
	list->tail = node;
    3fac:	62e3      	str	r3, [r4, #44]	; 0x2c
    3fae:	e7dc      	b.n	3f6a <z_impl_k_yield+0x4a>
    3fb0:	2000084c 	.word	0x2000084c
    3fb4:	20000774 	.word	0x20000774

00003fb8 <z_impl_k_sleep>:

s32_t z_impl_k_sleep(int ms)
{
    3fb8:	b538      	push	{r3, r4, r5, lr}
	s32_t ticks;

	__ASSERT(!arch_is_in_isr(), "");

	if (ms == K_FOREVER) {
    3fba:	1c43      	adds	r3, r0, #1
{
    3fbc:	4604      	mov	r4, r0
	if (ms == K_FOREVER) {
    3fbe:	d105      	bne.n	3fcc <z_impl_k_sleep+0x14>
		k_thread_suspend(_current);
    3fc0:	4b10      	ldr	r3, [pc, #64]	; (4004 <z_impl_k_sleep+0x4c>)
    3fc2:	6898      	ldr	r0, [r3, #8]
	z_impl_k_thread_suspend(thread);
    3fc4:	f000 f8dc 	bl	4180 <z_impl_k_thread_suspend>
	}

	ticks = k_ms_to_ticks_ceil32(ms);
	ticks = z_tick_sleep(ticks);
	return k_ticks_to_ms_floor64(ticks);
}
    3fc8:	4620      	mov	r0, r4
    3fca:	bd38      	pop	{r3, r4, r5, pc}
    3fcc:	f44f 4500 	mov.w	r5, #32768	; 0x8000
    3fd0:	f240 30e7 	movw	r0, #999	; 0x3e7
    3fd4:	2100      	movs	r1, #0
    3fd6:	fbe5 0104 	umlal	r0, r1, r5, r4
    3fda:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
    3fde:	2300      	movs	r3, #0
    3fe0:	f7fc f88e 	bl	100 <__aeabi_uldivmod>
	if (ticks == 0) {
    3fe4:	4604      	mov	r4, r0
    3fe6:	b948      	cbnz	r0, 3ffc <z_impl_k_sleep+0x44>
	z_impl_k_yield();
    3fe8:	f7ff ff9a 	bl	3f20 <z_impl_k_yield>
		} else {
			return (t * to_hz + off) / from_hz;
    3fec:	f44f 707a 	mov.w	r0, #1000	; 0x3e8
    3ff0:	fb84 0100 	smull	r0, r1, r4, r0
    3ff4:	0bc4      	lsrs	r4, r0, #15
    3ff6:	ea44 4441 	orr.w	r4, r4, r1, lsl #17
	return k_ticks_to_ms_floor64(ticks);
    3ffa:	e7e5      	b.n	3fc8 <z_impl_k_sleep+0x10>
    3ffc:	f7ff ff14 	bl	3e28 <z_tick_sleep.part.19>
    4000:	4604      	mov	r4, r0
    4002:	e7f3      	b.n	3fec <z_impl_k_sleep+0x34>
    4004:	2000084c 	.word	0x2000084c

00004008 <z_impl_k_current_get>:
#endif

k_tid_t z_impl_k_current_get(void)
{
	return _current;
}
    4008:	4b01      	ldr	r3, [pc, #4]	; (4010 <z_impl_k_current_get+0x8>)
    400a:	6898      	ldr	r0, [r3, #8]
    400c:	4770      	bx	lr
    400e:	bf00      	nop
    4010:	2000084c 	.word	0x2000084c

00004014 <z_impl_k_sem_give>:
	ARG_UNUSED(sem);
#endif
}

void z_impl_k_sem_give(struct k_sem *sem)
{
    4014:	b570      	push	{r4, r5, r6, lr}
    4016:	4604      	mov	r4, r0
    4018:	f04f 0320 	mov.w	r3, #32
    401c:	f3ef 8611 	mrs	r6, BASEPRI
    4020:	f383 8811 	msr	BASEPRI, r3
    4024:	f3bf 8f6f 	isb	sy
	k_spinlock_key_t key = k_spin_lock(&lock);
	struct k_thread *thread = z_unpend_first_thread(&sem->wait_q);
    4028:	f001 fce7 	bl	59fa <z_unpend_first_thread>

	sys_trace_void(SYS_TRACE_ID_SEMA_GIVE);

	if (thread != NULL) {
    402c:	4605      	mov	r5, r0
    402e:	b170      	cbz	r0, 404e <z_impl_k_sem_give+0x3a>
	return !((z_is_thread_prevented_from_running(thread)) != 0 ||
    4030:	7b43      	ldrb	r3, [r0, #13]
    4032:	06db      	lsls	r3, r3, #27
    4034:	d103      	bne.n	403e <z_impl_k_sem_give+0x2a>
	if (z_is_thread_ready(thread)) {
    4036:	6983      	ldr	r3, [r0, #24]
    4038:	b90b      	cbnz	r3, 403e <z_impl_k_sem_give+0x2a>
		z_add_thread_to_ready_q(thread);
    403a:	f7ff fd4f 	bl	3adc <z_add_thread_to_ready_q>
    403e:	2300      	movs	r3, #0
    4040:	66ab      	str	r3, [r5, #104]	; 0x68
		sem->count += (sem->count != sem->limit) ? 1U : 0U;
		handle_poll_events(sem);
	}

	sys_trace_end_call(SYS_TRACE_ID_SEMA_GIVE);
	z_reschedule(&lock, key);
    4042:	4631      	mov	r1, r6
    4044:	4805      	ldr	r0, [pc, #20]	; (405c <z_impl_k_sem_give+0x48>)
}
    4046:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
	z_reschedule(&lock, key);
    404a:	f001 bc7e 	b.w	594a <z_reschedule>
		sem->count += (sem->count != sem->limit) ? 1U : 0U;
    404e:	e9d4 3202 	ldrd	r3, r2, [r4, #8]
    4052:	429a      	cmp	r2, r3
    4054:	bf18      	it	ne
    4056:	3301      	addne	r3, #1
    4058:	60a3      	str	r3, [r4, #8]
		handle_poll_events(sem);
    405a:	e7f2      	b.n	4042 <z_impl_k_sem_give+0x2e>
    405c:	20000ccd 	.word	0x20000ccd

00004060 <z_impl_k_sem_take>:
}
#include <syscalls/k_sem_give_mrsh.c>
#endif

int z_impl_k_sem_take(struct k_sem *sem, s32_t timeout)
{
    4060:	b410      	push	{r4}
    4062:	4602      	mov	r2, r0
    4064:	460b      	mov	r3, r1
    4066:	f04f 0020 	mov.w	r0, #32
    406a:	f3ef 8111 	mrs	r1, BASEPRI
    406e:	f380 8811 	msr	BASEPRI, r0
    4072:	f3bf 8f6f 	isb	sy
	__ASSERT(((arch_is_in_isr() == false) || (timeout == K_NO_WAIT)), "");

	sys_trace_void(SYS_TRACE_ID_SEMA_TAKE);
	k_spinlock_key_t key = k_spin_lock(&lock);

	if (likely(sem->count > 0U)) {
    4076:	6894      	ldr	r4, [r2, #8]
    4078:	b144      	cbz	r4, 408c <z_impl_k_sem_take+0x2c>
		sem->count--;
    407a:	3c01      	subs	r4, #1
    407c:	6094      	str	r4, [r2, #8]
	__asm__ volatile(
    407e:	f381 8811 	msr	BASEPRI, r1
    4082:	f3bf 8f6f 	isb	sy
		k_spin_unlock(&lock, key);
		ret = 0;
    4086:	2000      	movs	r0, #0
	ret = z_pend_curr(&lock, key, &sem->wait_q, timeout);

out:
	sys_trace_end_call(SYS_TRACE_ID_SEMA_TAKE);
	return ret;
}
    4088:	bc10      	pop	{r4}
    408a:	4770      	bx	lr
	if (timeout == K_NO_WAIT) {
    408c:	b933      	cbnz	r3, 409c <z_impl_k_sem_take+0x3c>
    408e:	f381 8811 	msr	BASEPRI, r1
    4092:	f3bf 8f6f 	isb	sy
		ret = -EBUSY;
    4096:	f06f 000f 	mvn.w	r0, #15
		goto out;
    409a:	e7f5      	b.n	4088 <z_impl_k_sem_take+0x28>
	ret = z_pend_curr(&lock, key, &sem->wait_q, timeout);
    409c:	4801      	ldr	r0, [pc, #4]	; (40a4 <z_impl_k_sem_take+0x44>)
}
    409e:	bc10      	pop	{r4}
	ret = z_pend_curr(&lock, key, &sem->wait_q, timeout);
    40a0:	f7ff beae 	b.w	3e00 <z_pend_curr>
    40a4:	20000ccd 	.word	0x20000ccd

000040a8 <z_impl_k_thread_start>:
}
#endif

#ifdef CONFIG_MULTITHREADING
void z_impl_k_thread_start(struct k_thread *thread)
{
    40a8:	b510      	push	{r4, lr}
	__asm__ volatile(
    40aa:	f04f 0220 	mov.w	r2, #32
    40ae:	f3ef 8411 	mrs	r4, BASEPRI
    40b2:	f382 8811 	msr	BASEPRI, r2
    40b6:	f3bf 8f6f 	isb	sy
	k_spinlock_key_t key = k_spin_lock(&lock); /* protect kernel queues */

	if (z_has_thread_started(thread)) {
    40ba:	7b42      	ldrb	r2, [r0, #13]
    40bc:	0751      	lsls	r1, r2, #29
    40be:	d404      	bmi.n	40ca <z_impl_k_thread_start+0x22>
	__asm__ volatile(
    40c0:	f384 8811 	msr	BASEPRI, r4
    40c4:	f3bf 8f6f 	isb	sy
	}

	z_mark_thread_as_started(thread);
	z_ready_thread(thread);
	z_reschedule(&lock, key);
}
    40c8:	bd10      	pop	{r4, pc}
	thread->base.thread_state &= ~_THREAD_PRESTART;
    40ca:	f022 0104 	bic.w	r1, r2, #4
	return !((z_is_thread_prevented_from_running(thread)) != 0 ||
    40ce:	f012 0f1b 	tst.w	r2, #27
	thread->base.thread_state &= ~_THREAD_PRESTART;
    40d2:	7341      	strb	r1, [r0, #13]
	return !((z_is_thread_prevented_from_running(thread)) != 0 ||
    40d4:	d103      	bne.n	40de <z_impl_k_thread_start+0x36>
	if (z_is_thread_ready(thread)) {
    40d6:	6983      	ldr	r3, [r0, #24]
    40d8:	b90b      	cbnz	r3, 40de <z_impl_k_thread_start+0x36>
		z_add_thread_to_ready_q(thread);
    40da:	f7ff fcff 	bl	3adc <z_add_thread_to_ready_q>
	z_reschedule(&lock, key);
    40de:	4621      	mov	r1, r4
    40e0:	4802      	ldr	r0, [pc, #8]	; (40ec <z_impl_k_thread_start+0x44>)
}
    40e2:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
	z_reschedule(&lock, key);
    40e6:	f001 bc30 	b.w	594a <z_reschedule>
    40ea:	bf00      	nop
    40ec:	20000ccd 	.word	0x20000ccd

000040f0 <z_setup_new_thread>:
void z_setup_new_thread(struct k_thread *new_thread,
		       k_thread_stack_t *stack, size_t stack_size,
		       k_thread_entry_t entry,
		       void *p1, void *p2, void *p3,
		       int prio, u32_t options, const char *name)
{
    40f0:	b530      	push	{r4, r5, lr}
    40f2:	b087      	sub	sp, #28
    40f4:	4604      	mov	r4, r0
	stack_size = STACK_ROUND_DOWN(stack_size
			- sizeof(*new_thread->userspace_local_data));
#endif
#endif

	arch_new_thread(new_thread, stack, stack_size, entry, p1, p2, p3,
    40f6:	9d0e      	ldr	r5, [sp, #56]	; 0x38
    40f8:	9504      	str	r5, [sp, #16]
    40fa:	9d0d      	ldr	r5, [sp, #52]	; 0x34
    40fc:	9503      	str	r5, [sp, #12]
    40fe:	9d0c      	ldr	r5, [sp, #48]	; 0x30
    4100:	9502      	str	r5, [sp, #8]
    4102:	9d0b      	ldr	r5, [sp, #44]	; 0x2c
    4104:	9501      	str	r5, [sp, #4]
    4106:	9d0a      	ldr	r5, [sp, #40]	; 0x28
    4108:	9500      	str	r5, [sp, #0]
    410a:	f7fd fb3b 	bl	1784 <arch_new_thread>
#ifdef CONFIG_SCHED_CPU_MASK
	new_thread->base.cpu_mask = -1;
#endif
#ifdef CONFIG_ARCH_HAS_CUSTOM_SWAP_TO_MAIN
	/* _current may be null if the dummy thread is not used */
	if (!_current) {
    410e:	4b03      	ldr	r3, [pc, #12]	; (411c <z_setup_new_thread+0x2c>)
    4110:	689b      	ldr	r3, [r3, #8]
    4112:	b103      	cbz	r3, 4116 <z_setup_new_thread+0x26>
	}
#endif
#ifdef CONFIG_SCHED_DEADLINE
	new_thread->base.prio_deadline = 0;
#endif
	new_thread->resource_pool = _current->resource_pool;
    4114:	6e1b      	ldr	r3, [r3, #96]	; 0x60
    4116:	6623      	str	r3, [r4, #96]	; 0x60
	sys_trace_thread_create(new_thread);
}
    4118:	b007      	add	sp, #28
    411a:	bd30      	pop	{r4, r5, pc}
    411c:	2000084c 	.word	0x2000084c

00004120 <z_impl_k_thread_create>:
k_tid_t z_impl_k_thread_create(struct k_thread *new_thread,
			      k_thread_stack_t *stack,
			      size_t stack_size, k_thread_entry_t entry,
			      void *p1, void *p2, void *p3,
			      int prio, u32_t options, s32_t delay)
{
    4120:	b570      	push	{r4, r5, r6, lr}
    4122:	b086      	sub	sp, #24
	__ASSERT((options & K_USER) == 0,
		 "Platform is capable of user mode, and test thread created with K_USER option,"
		 " but neither CONFIG_TEST_USERSPACE nor CONFIG_USERSPACE is set\n");
#endif

	z_setup_new_thread(new_thread, stack, stack_size, entry, p1, p2, p3,
    4124:	2600      	movs	r6, #0
    4126:	9605      	str	r6, [sp, #20]
    4128:	9e0e      	ldr	r6, [sp, #56]	; 0x38
    412a:	9604      	str	r6, [sp, #16]
    412c:	9e0d      	ldr	r6, [sp, #52]	; 0x34
    412e:	9603      	str	r6, [sp, #12]
    4130:	9e0c      	ldr	r6, [sp, #48]	; 0x30
    4132:	9602      	str	r6, [sp, #8]
    4134:	9e0b      	ldr	r6, [sp, #44]	; 0x2c
{
    4136:	9d0f      	ldr	r5, [sp, #60]	; 0x3c
	z_setup_new_thread(new_thread, stack, stack_size, entry, p1, p2, p3,
    4138:	9601      	str	r6, [sp, #4]
    413a:	9e0a      	ldr	r6, [sp, #40]	; 0x28
    413c:	9600      	str	r6, [sp, #0]
{
    413e:	4604      	mov	r4, r0
	z_setup_new_thread(new_thread, stack, stack_size, entry, p1, p2, p3,
    4140:	f7ff ffd6 	bl	40f0 <z_setup_new_thread>
			  prio, options, NULL);

	if (delay != K_FOREVER) {
    4144:	1c6b      	adds	r3, r5, #1
    4146:	d003      	beq.n	4150 <z_impl_k_thread_create+0x30>
	if (delay == 0) {
    4148:	b92d      	cbnz	r5, 4156 <z_impl_k_thread_create+0x36>
	z_impl_k_thread_start(thread);
    414a:	4620      	mov	r0, r4
    414c:	f7ff ffac 	bl	40a8 <z_impl_k_thread_start>
		schedule_new_thread(new_thread, delay);
	}

	return new_thread;
}
    4150:	4620      	mov	r0, r4
    4152:	b006      	add	sp, #24
    4154:	bd70      	pop	{r4, r5, r6, pc}
			return (u32_t)((t * to_hz + off) / from_hz);
    4156:	f44f 4600 	mov.w	r6, #32768	; 0x8000
    415a:	f240 30e7 	movw	r0, #999	; 0x3e7
    415e:	2100      	movs	r1, #0
    4160:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
    4164:	2300      	movs	r3, #0
    4166:	fbe6 0105 	umlal	r0, r1, r6, r5
    416a:	f7fb ffc9 	bl	100 <__aeabi_uldivmod>
    416e:	4903      	ldr	r1, [pc, #12]	; (417c <z_impl_k_thread_create+0x5c>)
    4170:	1c42      	adds	r2, r0, #1
    4172:	f104 0018 	add.w	r0, r4, #24
    4176:	f000 f8b7 	bl	42e8 <z_add_timeout>
    417a:	e7e9      	b.n	4150 <z_impl_k_thread_create+0x30>
    417c:	00005999 	.word	0x00005999

00004180 <z_impl_k_thread_suspend>:
#endif /* CONFIG_MULTITHREADING */

extern void z_thread_single_suspend(struct k_thread *thread);

void z_impl_k_thread_suspend(struct k_thread *thread)
{
    4180:	b538      	push	{r3, r4, r5, lr}
    4182:	4605      	mov	r5, r0
	__asm__ volatile(
    4184:	f04f 0320 	mov.w	r3, #32
    4188:	f3ef 8411 	mrs	r4, BASEPRI
    418c:	f383 8811 	msr	BASEPRI, r3
    4190:	f3bf 8f6f 	isb	sy
	k_spinlock_key_t key = k_spin_lock(&lock);

	z_thread_single_suspend(thread);
    4194:	f7ff fd52 	bl	3c3c <z_thread_single_suspend>

	if (thread == _current) {
    4198:	4b07      	ldr	r3, [pc, #28]	; (41b8 <z_impl_k_thread_suspend+0x38>)
    419a:	689b      	ldr	r3, [r3, #8]
    419c:	42ab      	cmp	r3, r5
    419e:	d105      	bne.n	41ac <z_impl_k_thread_suspend+0x2c>
		z_reschedule(&lock, key);
    41a0:	4621      	mov	r1, r4
    41a2:	4806      	ldr	r0, [pc, #24]	; (41bc <z_impl_k_thread_suspend+0x3c>)
	} else {
		k_spin_unlock(&lock, key);
	}
}
    41a4:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
		z_reschedule(&lock, key);
    41a8:	f001 bbcf 	b.w	594a <z_reschedule>
	__asm__ volatile(
    41ac:	f384 8811 	msr	BASEPRI, r4
    41b0:	f3bf 8f6f 	isb	sy
}
    41b4:	bd38      	pop	{r3, r4, r5, pc}
    41b6:	bf00      	nop
    41b8:	2000084c 	.word	0x2000084c
    41bc:	20000ccd 	.word	0x20000ccd

000041c0 <z_init_static_threads>:
	}
}
#endif /* CONFIG_USERSPACE */

void z_init_static_threads(void)
{
    41c0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
	_FOREACH_STATIC_THREAD(thread_data) {
    41c4:	4e28      	ldr	r6, [pc, #160]	; (4268 <z_init_static_threads+0xa8>)
    41c6:	4d29      	ldr	r5, [pc, #164]	; (426c <z_init_static_threads+0xac>)
{
    41c8:	b087      	sub	sp, #28
    41ca:	46b0      	mov	r8, r6
	_FOREACH_STATIC_THREAD(thread_data) {
    41cc:	42b5      	cmp	r5, r6
    41ce:	f105 0430 	add.w	r4, r5, #48	; 0x30
    41d2:	d310      	bcc.n	41f6 <z_init_static_threads+0x36>
	 * until they are all started.
	 *
	 * Note that static threads defined using the legacy API have a
	 * delay of K_FOREVER.
	 */
	k_sched_lock();
    41d4:	f7ff fc1e 	bl	3a14 <k_sched_lock>
	_FOREACH_STATIC_THREAD(thread_data) {
    41d8:	4c24      	ldr	r4, [pc, #144]	; (426c <z_init_static_threads+0xac>)
    41da:	f8df a094 	ldr.w	sl, [pc, #148]	; 4270 <z_init_static_threads+0xb0>
    41de:	f44f 4900 	mov.w	r9, #32768	; 0x8000
    41e2:	f240 36e7 	movw	r6, #999	; 0x3e7
    41e6:	2700      	movs	r7, #0
    41e8:	4544      	cmp	r4, r8
    41ea:	d321      	bcc.n	4230 <z_init_static_threads+0x70>
			schedule_new_thread(thread_data->init_thread,
					    thread_data->init_delay);
		}
	}
	k_sched_unlock();
}
    41ec:	b007      	add	sp, #28
    41ee:	e8bd 4ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
	k_sched_unlock();
    41f2:	f7ff bc57 	b.w	3aa4 <k_sched_unlock>
		z_setup_new_thread(
    41f6:	f854 3c04 	ldr.w	r3, [r4, #-4]
    41fa:	9305      	str	r3, [sp, #20]
    41fc:	f854 3c10 	ldr.w	r3, [r4, #-16]
    4200:	9304      	str	r3, [sp, #16]
    4202:	f854 3c14 	ldr.w	r3, [r4, #-20]
    4206:	9303      	str	r3, [sp, #12]
    4208:	f854 3c18 	ldr.w	r3, [r4, #-24]
    420c:	9302      	str	r3, [sp, #8]
    420e:	f854 3c1c 	ldr.w	r3, [r4, #-28]
    4212:	9301      	str	r3, [sp, #4]
    4214:	f854 3c20 	ldr.w	r3, [r4, #-32]
    4218:	9300      	str	r3, [sp, #0]
    421a:	e954 230a 	ldrd	r2, r3, [r4, #-40]	; 0x28
    421e:	e954 010c 	ldrd	r0, r1, [r4, #-48]	; 0x30
    4222:	f7ff ff65 	bl	40f0 <z_setup_new_thread>
		thread_data->init_thread->init_data = thread_data;
    4226:	f854 3c30 	ldr.w	r3, [r4, #-48]
    422a:	64dd      	str	r5, [r3, #76]	; 0x4c
    422c:	4625      	mov	r5, r4
    422e:	e7cd      	b.n	41cc <z_init_static_threads+0xc>
		if (thread_data->init_delay != K_FOREVER) {
    4230:	6a61      	ldr	r1, [r4, #36]	; 0x24
    4232:	1c4b      	adds	r3, r1, #1
    4234:	d004      	beq.n	4240 <z_init_static_threads+0x80>
			schedule_new_thread(thread_data->init_thread,
    4236:	6825      	ldr	r5, [r4, #0]
	if (delay == 0) {
    4238:	b921      	cbnz	r1, 4244 <z_init_static_threads+0x84>
    423a:	4628      	mov	r0, r5
    423c:	f7ff ff34 	bl	40a8 <z_impl_k_thread_start>
	_FOREACH_STATIC_THREAD(thread_data) {
    4240:	3430      	adds	r4, #48	; 0x30
    4242:	e7d1      	b.n	41e8 <z_init_static_threads+0x28>
    4244:	46b3      	mov	fp, r6
    4246:	46bc      	mov	ip, r7
    4248:	fbe9 bc01 	umlal	fp, ip, r9, r1
    424c:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
    4250:	2300      	movs	r3, #0
    4252:	4658      	mov	r0, fp
    4254:	4661      	mov	r1, ip
    4256:	f7fb ff53 	bl	100 <__aeabi_uldivmod>
    425a:	4651      	mov	r1, sl
    425c:	1c42      	adds	r2, r0, #1
    425e:	f105 0018 	add.w	r0, r5, #24
    4262:	f000 f841 	bl	42e8 <z_add_timeout>
    4266:	e7eb      	b.n	4240 <z_init_static_threads+0x80>
    4268:	200022d8 	.word	0x200022d8
    426c:	200022d8 	.word	0x200022d8
    4270:	00005999 	.word	0x00005999

00004274 <elapsed>:
	sys_dlist_remove(&t->node);
}

static s32_t elapsed(void)
{
	return announce_remaining == 0 ? z_clock_elapsed() : 0;
    4274:	4b03      	ldr	r3, [pc, #12]	; (4284 <elapsed+0x10>)
    4276:	681b      	ldr	r3, [r3, #0]
    4278:	b90b      	cbnz	r3, 427e <elapsed+0xa>
    427a:	f7fd b8a9 	b.w	13d0 <z_clock_elapsed>
}
    427e:	2000      	movs	r0, #0
    4280:	4770      	bx	lr
    4282:	bf00      	nop
    4284:	20000888 	.word	0x20000888

00004288 <remove_timeout>:
	return (node != NULL) ? sys_dlist_peek_next_no_check(list, node) : NULL;
    4288:	6803      	ldr	r3, [r0, #0]
    428a:	b140      	cbz	r0, 429e <remove_timeout+0x16>
    428c:	4a07      	ldr	r2, [pc, #28]	; (42ac <remove_timeout+0x24>)
	return (node == list->tail) ? NULL : node->next;
    428e:	6852      	ldr	r2, [r2, #4]
    4290:	4290      	cmp	r0, r2
    4292:	d004      	beq.n	429e <remove_timeout+0x16>
	if (next(t) != NULL) {
    4294:	b11b      	cbz	r3, 429e <remove_timeout+0x16>
		next(t)->dticks += t->dticks;
    4296:	689a      	ldr	r2, [r3, #8]
    4298:	6881      	ldr	r1, [r0, #8]
    429a:	440a      	add	r2, r1
    429c:	609a      	str	r2, [r3, #8]
	node->prev->next = node->next;
    429e:	6842      	ldr	r2, [r0, #4]
    42a0:	6013      	str	r3, [r2, #0]
	node->next->prev = node->prev;
    42a2:	605a      	str	r2, [r3, #4]
	node->next = NULL;
    42a4:	2300      	movs	r3, #0
	node->prev = NULL;
    42a6:	e9c0 3300 	strd	r3, r3, [r0]
}
    42aa:	4770      	bx	lr
    42ac:	200021e8 	.word	0x200021e8

000042b0 <next_timeout>:
	return list->head == list;
    42b0:	4b0b      	ldr	r3, [pc, #44]	; (42e0 <next_timeout+0x30>)

static s32_t next_timeout(void)
{
    42b2:	b510      	push	{r4, lr}
    42b4:	681c      	ldr	r4, [r3, #0]
	return sys_dlist_is_empty(list) ? NULL : list->head;
    42b6:	429c      	cmp	r4, r3
    42b8:	bf08      	it	eq
    42ba:	2400      	moveq	r4, #0
	struct _timeout *to = first();
	s32_t ticks_elapsed = elapsed();
    42bc:	f7ff ffda 	bl	4274 <elapsed>
	s32_t ret = to == NULL ? MAX_WAIT : MAX(0, to->dticks - ticks_elapsed);
    42c0:	b154      	cbz	r4, 42d8 <next_timeout+0x28>
    42c2:	68a3      	ldr	r3, [r4, #8]
    42c4:	1a18      	subs	r0, r3, r0
    42c6:	ea20 70e0 	bic.w	r0, r0, r0, asr #31

#ifdef CONFIG_TIMESLICING
	if (_current_cpu->slice_ticks && _current_cpu->slice_ticks < ret) {
    42ca:	4b06      	ldr	r3, [pc, #24]	; (42e4 <next_timeout+0x34>)
    42cc:	691b      	ldr	r3, [r3, #16]
    42ce:	b113      	cbz	r3, 42d6 <next_timeout+0x26>
    42d0:	4298      	cmp	r0, r3
    42d2:	bfa8      	it	ge
    42d4:	4618      	movge	r0, r3
		ret = _current_cpu->slice_ticks;
	}
#endif
	return ret;
}
    42d6:	bd10      	pop	{r4, pc}
	s32_t ret = to == NULL ? MAX_WAIT : MAX(0, to->dticks - ticks_elapsed);
    42d8:	f06f 4000 	mvn.w	r0, #2147483648	; 0x80000000
    42dc:	e7f5      	b.n	42ca <next_timeout+0x1a>
    42de:	bf00      	nop
    42e0:	200021e8 	.word	0x200021e8
    42e4:	2000084c 	.word	0x2000084c

000042e8 <z_add_timeout>:

void z_add_timeout(struct _timeout *to, _timeout_func_t fn, s32_t ticks)
{
    42e8:	b570      	push	{r4, r5, r6, lr}
    42ea:	4604      	mov	r4, r0
    42ec:	4616      	mov	r6, r2
	__ASSERT(!sys_dnode_is_linked(&to->node), "");
	to->fn = fn;
    42ee:	60c1      	str	r1, [r0, #12]
	__asm__ volatile(
    42f0:	f04f 0320 	mov.w	r3, #32
    42f4:	f3ef 8511 	mrs	r5, BASEPRI
    42f8:	f383 8811 	msr	BASEPRI, r3
    42fc:	f3bf 8f6f 	isb	sy
	ticks = MAX(1, ticks);

	LOCKED(&timeout_lock) {
		struct _timeout *t;

		to->dticks = ticks + elapsed();
    4300:	f7ff ffb8 	bl	4274 <elapsed>
	return list->head == list;
    4304:	4b18      	ldr	r3, [pc, #96]	; (4368 <z_add_timeout+0x80>)
    4306:	681a      	ldr	r2, [r3, #0]
    4308:	2e01      	cmp	r6, #1
    430a:	bfac      	ite	ge
    430c:	1980      	addge	r0, r0, r6
    430e:	3001      	addlt	r0, #1
	return sys_dlist_is_empty(list) ? NULL : list->head;
    4310:	429a      	cmp	r2, r3
    4312:	60a0      	str	r0, [r4, #8]
    4314:	d001      	beq.n	431a <z_add_timeout+0x32>
	return (node != NULL) ? sys_dlist_peek_next_no_check(list, node) : NULL;
    4316:	685e      	ldr	r6, [r3, #4]
		for (t = first(); t != NULL; t = next(t)) {
    4318:	b932      	cbnz	r2, 4328 <z_add_timeout+0x40>
	node->prev = list->tail;
    431a:	685a      	ldr	r2, [r3, #4]
    431c:	6062      	str	r2, [r4, #4]
	list->tail->next = node;
    431e:	685a      	ldr	r2, [r3, #4]
	node->next = list;
    4320:	6023      	str	r3, [r4, #0]
	list->tail->next = node;
    4322:	6014      	str	r4, [r2, #0]
	list->tail = node;
    4324:	605c      	str	r4, [r3, #4]
    4326:	e00a      	b.n	433e <z_add_timeout+0x56>
			__ASSERT(t->dticks >= 0, "");

			if (t->dticks > to->dticks) {
    4328:	6890      	ldr	r0, [r2, #8]
    432a:	68a1      	ldr	r1, [r4, #8]
    432c:	4288      	cmp	r0, r1
    432e:	dd15      	ble.n	435c <z_add_timeout+0x74>
				t->dticks -= to->dticks;
    4330:	1a41      	subs	r1, r0, r1
    4332:	6091      	str	r1, [r2, #8]
	node->prev = successor->prev;
    4334:	6851      	ldr	r1, [r2, #4]
	node->next = successor;
    4336:	e9c4 2100 	strd	r2, r1, [r4]
	successor->prev->next = node;
    433a:	600c      	str	r4, [r1, #0]
	successor->prev = node;
    433c:	6054      	str	r4, [r2, #4]
	return list->head == list;
    433e:	681a      	ldr	r2, [r3, #0]
	return sys_dlist_is_empty(list) ? NULL : list->head;
    4340:	429a      	cmp	r2, r3
    4342:	d006      	beq.n	4352 <z_add_timeout+0x6a>

		if (t == NULL) {
			sys_dlist_append(&timeout_list, &to->node);
		}

		if (to == first()) {
    4344:	4294      	cmp	r4, r2
    4346:	d104      	bne.n	4352 <z_add_timeout+0x6a>
			z_clock_set_timeout(next_timeout(), false);
    4348:	f7ff ffb2 	bl	42b0 <next_timeout>
    434c:	2100      	movs	r1, #0
    434e:	f7fc ffe9 	bl	1324 <z_clock_set_timeout>
	__asm__ volatile(
    4352:	f385 8811 	msr	BASEPRI, r5
    4356:	f3bf 8f6f 	isb	sy
		}
	}
}
    435a:	bd70      	pop	{r4, r5, r6, pc}
			to->dticks -= t->dticks;
    435c:	1a09      	subs	r1, r1, r0
	return (node == list->tail) ? NULL : node->next;
    435e:	4296      	cmp	r6, r2
    4360:	60a1      	str	r1, [r4, #8]
    4362:	d0da      	beq.n	431a <z_add_timeout+0x32>
    4364:	6812      	ldr	r2, [r2, #0]
    4366:	e7d7      	b.n	4318 <z_add_timeout+0x30>
    4368:	200021e8 	.word	0x200021e8

0000436c <z_clock_announce>:
		}
	}
}

void z_clock_announce(s32_t ticks)
{
    436c:	e92d 4bf0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, fp, lr}
    4370:	4604      	mov	r4, r0
#ifdef CONFIG_TIMESLICING
	z_time_slice(ticks);
    4372:	f7ff fc2d 	bl	3bd0 <z_time_slice>
	__asm__ volatile(
    4376:	f04f 0320 	mov.w	r3, #32
    437a:	f3ef 8511 	mrs	r5, BASEPRI
    437e:	f383 8811 	msr	BASEPRI, r3
    4382:	f3bf 8f6f 	isb	sy
#endif

	k_spinlock_key_t key = k_spin_lock(&timeout_lock);

	announce_remaining = ticks;
    4386:	4e21      	ldr	r6, [pc, #132]	; (440c <z_clock_announce+0xa0>)
    4388:	4f21      	ldr	r7, [pc, #132]	; (4410 <z_clock_announce+0xa4>)
	return list->head == list;
    438a:	f8df 9088 	ldr.w	r9, [pc, #136]	; 4414 <z_clock_announce+0xa8>
    438e:	6034      	str	r4, [r6, #0]

	while (first() != NULL && first()->dticks <= announce_remaining) {
    4390:	46b8      	mov	r8, r7
    4392:	f8d9 4000 	ldr.w	r4, [r9]
    4396:	6832      	ldr	r2, [r6, #0]
	return sys_dlist_is_empty(list) ? NULL : list->head;
    4398:	454c      	cmp	r4, r9
    439a:	e9d7 bc00 	ldrd	fp, ip, [r7]
    439e:	d005      	beq.n	43ac <z_clock_announce+0x40>
    43a0:	b124      	cbz	r4, 43ac <z_clock_announce+0x40>
    43a2:	68a3      	ldr	r3, [r4, #8]
    43a4:	4293      	cmp	r3, r2
    43a6:	dd14      	ble.n	43d2 <z_clock_announce+0x66>
		t->fn(t);
		key = k_spin_lock(&timeout_lock);
	}

	if (first() != NULL) {
		first()->dticks -= announce_remaining;
    43a8:	1a9b      	subs	r3, r3, r2
    43aa:	60a3      	str	r3, [r4, #8]
	}

	curr_tick += announce_remaining;
    43ac:	eb1b 0002 	adds.w	r0, fp, r2
    43b0:	eb4c 71e2 	adc.w	r1, ip, r2, asr #31
	announce_remaining = 0;
    43b4:	2400      	movs	r4, #0
	curr_tick += announce_remaining;
    43b6:	e9c8 0100 	strd	r0, r1, [r8]
	announce_remaining = 0;
    43ba:	6034      	str	r4, [r6, #0]

	z_clock_set_timeout(next_timeout(), false);
    43bc:	f7ff ff78 	bl	42b0 <next_timeout>
    43c0:	4621      	mov	r1, r4
    43c2:	f7fc ffaf 	bl	1324 <z_clock_set_timeout>
	__asm__ volatile(
    43c6:	f385 8811 	msr	BASEPRI, r5
    43ca:	f3bf 8f6f 	isb	sy

	k_spin_unlock(&timeout_lock, key);
}
    43ce:	e8bd 8bf0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, fp, pc}
		curr_tick += dt;
    43d2:	eb1b 0003 	adds.w	r0, fp, r3
    43d6:	eb4c 71e3 	adc.w	r1, ip, r3, asr #31
		announce_remaining -= dt;
    43da:	1ad3      	subs	r3, r2, r3
    43dc:	6033      	str	r3, [r6, #0]
		t->dticks = 0;
    43de:	2300      	movs	r3, #0
		curr_tick += dt;
    43e0:	e9c7 0100 	strd	r0, r1, [r7]
		t->dticks = 0;
    43e4:	60a3      	str	r3, [r4, #8]
		remove_timeout(t);
    43e6:	4620      	mov	r0, r4
    43e8:	f7ff ff4e 	bl	4288 <remove_timeout>
    43ec:	f385 8811 	msr	BASEPRI, r5
    43f0:	f3bf 8f6f 	isb	sy
		t->fn(t);
    43f4:	68e3      	ldr	r3, [r4, #12]
    43f6:	4798      	blx	r3
	__asm__ volatile(
    43f8:	f04f 0320 	mov.w	r3, #32
    43fc:	f3ef 8511 	mrs	r5, BASEPRI
    4400:	f383 8811 	msr	BASEPRI, r3
    4404:	f3bf 8f6f 	isb	sy
#endif

#ifdef CONFIG_SPIN_VALIDATE
	z_spin_lock_set_owner(l);
#endif
	return k;
    4408:	e7c3      	b.n	4392 <z_clock_announce+0x26>
    440a:	bf00      	nop
    440c:	20000888 	.word	0x20000888
    4410:	20000000 	.word	0x20000000
    4414:	200021e8 	.word	0x200021e8

00004418 <z_tick_get>:

s64_t z_tick_get(void)
{
    4418:	e92d 4818 	stmdb	sp!, {r3, r4, fp, lr}
    441c:	f04f 0320 	mov.w	r3, #32
    4420:	f3ef 8411 	mrs	r4, BASEPRI
    4424:	f383 8811 	msr	BASEPRI, r3
    4428:	f3bf 8f6f 	isb	sy
	u64_t t = 0U;

	LOCKED(&timeout_lock) {
		t = curr_tick + z_clock_elapsed();
    442c:	f7fc ffd0 	bl	13d0 <z_clock_elapsed>
    4430:	4b07      	ldr	r3, [pc, #28]	; (4450 <z_tick_get+0x38>)
    4432:	e9d3 2300 	ldrd	r2, r3, [r3]
    4436:	eb12 0b00 	adds.w	fp, r2, r0
    443a:	f143 0c00 	adc.w	ip, r3, #0
    443e:	4658      	mov	r0, fp
    4440:	4661      	mov	r1, ip
	__asm__ volatile(
    4442:	f384 8811 	msr	BASEPRI, r4
    4446:	f3bf 8f6f 	isb	sy
	}
	return t;
}
    444a:	e8bd 8818 	ldmia.w	sp!, {r3, r4, fp, pc}
    444e:	bf00      	nop
    4450:	20000000 	.word	0x20000000

00004454 <z_timer_expiration_handler>:

	/*
	 * if the timer is periodic, start it again; don't add _TICK_ALIGN
	 * since we're already aligned to a tick boundary
	 */
	if (timer->period > 0) {
    4454:	6a02      	ldr	r2, [r0, #32]
    4456:	2a00      	cmp	r2, #0
{
    4458:	b538      	push	{r3, r4, r5, lr}
    445a:	4604      	mov	r4, r0
	if (timer->period > 0) {
    445c:	dd02      	ble.n	4464 <z_timer_expiration_handler+0x10>
		z_add_timeout(&timer->timeout, z_timer_expiration_handler,
    445e:	490e      	ldr	r1, [pc, #56]	; (4498 <z_timer_expiration_handler+0x44>)
    4460:	f7ff ff42 	bl	42e8 <z_add_timeout>
			     timer->period);
	}

	/* update timer's status */
	timer->status += 1U;
    4464:	6a63      	ldr	r3, [r4, #36]	; 0x24
    4466:	3301      	adds	r3, #1
    4468:	6263      	str	r3, [r4, #36]	; 0x24

	/* invoke timer expiry function */
	if (timer->expiry_fn != NULL) {
    446a:	69a3      	ldr	r3, [r4, #24]
    446c:	b10b      	cbz	r3, 4472 <z_timer_expiration_handler+0x1e>
		timer->expiry_fn(timer);
    446e:	4620      	mov	r0, r4
    4470:	4798      	blx	r3
	return list->head == list;
    4472:	f854 5f10 	ldr.w	r5, [r4, #16]!
	return sys_dlist_is_empty(list) ? NULL : list->head;
    4476:	42a5      	cmp	r5, r4
    4478:	d00d      	beq.n	4496 <z_timer_expiration_handler+0x42>
	}

	thread = z_waitq_head(&timer->wait_q);

	if (thread == NULL) {
    447a:	b165      	cbz	r5, 4496 <z_timer_expiration_handler+0x42>
	 * place a thread can be taken off this pend queue, and b) the
	 * only place a thread can be put on the pend queue is at
	 * thread level, which of course cannot interrupt the current
	 * context.
	 */
	z_unpend_thread_no_timeout(thread);
    447c:	4628      	mov	r0, r5
    447e:	f001 fa4b 	bl	5918 <z_unpend_thread_no_timeout>
	return !((z_is_thread_prevented_from_running(thread)) != 0 ||
    4482:	7b6b      	ldrb	r3, [r5, #13]
    4484:	06db      	lsls	r3, r3, #27
    4486:	d104      	bne.n	4492 <z_timer_expiration_handler+0x3e>
	if (z_is_thread_ready(thread)) {
    4488:	69ab      	ldr	r3, [r5, #24]
    448a:	b913      	cbnz	r3, 4492 <z_timer_expiration_handler+0x3e>
		z_add_thread_to_ready_q(thread);
    448c:	4628      	mov	r0, r5
    448e:	f7ff fb25 	bl	3adc <z_add_thread_to_ready_q>
    4492:	2300      	movs	r3, #0
    4494:	66ab      	str	r3, [r5, #104]	; 0x68

	z_ready_thread(thread);

	arch_thread_return_value_set(thread, 0);
}
    4496:	bd38      	pop	{r3, r4, r5, pc}
    4498:	00004455 	.word	0x00004455

0000449c <z_impl_k_timer_start>:
	z_object_init(timer);
}


void z_impl_k_timer_start(struct k_timer *timer, s32_t duration, s32_t period)
{
    449c:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
    44a0:	f240 36e7 	movw	r6, #999	; 0x3e7
    44a4:	2700      	movs	r7, #0
    44a6:	4604      	mov	r4, r0
    44a8:	4688      	mov	r8, r1
    44aa:	f44f 4500 	mov.w	r5, #32768	; 0x8000
    44ae:	4630      	mov	r0, r6
    44b0:	4639      	mov	r1, r7
    44b2:	fbe5 0102 	umlal	r0, r1, r5, r2
    44b6:	2300      	movs	r3, #0
    44b8:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
    44bc:	f7fb fe20 	bl	100 <__aeabi_uldivmod>
    44c0:	4639      	mov	r1, r7
	__ASSERT(duration >= 0 && period >= 0 &&
		 (duration != 0 || period != 0), "invalid parameters\n");

	volatile s32_t period_in_ticks, duration_in_ticks;

	period_in_ticks = k_ms_to_ticks_ceil32(period);
    44c2:	9000      	str	r0, [sp, #0]
    44c4:	4630      	mov	r0, r6
    44c6:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
    44ca:	2300      	movs	r3, #0
    44cc:	fbe5 0108 	umlal	r0, r1, r5, r8
    44d0:	f7fb fe16 	bl	100 <__aeabi_uldivmod>
	duration_in_ticks = k_ms_to_ticks_ceil32(duration);
    44d4:	9001      	str	r0, [sp, #4]

	(void)z_abort_timeout(&timer->timeout);
    44d6:	4620      	mov	r0, r4
    44d8:	f001 fad2 	bl	5a80 <z_abort_timeout>
	timer->period = period_in_ticks;
    44dc:	9b00      	ldr	r3, [sp, #0]
	timer->status = 0U;
	z_add_timeout(&timer->timeout, z_timer_expiration_handler,
    44de:	4905      	ldr	r1, [pc, #20]	; (44f4 <z_impl_k_timer_start+0x58>)
    44e0:	9a01      	ldr	r2, [sp, #4]
	timer->period = period_in_ticks;
    44e2:	6223      	str	r3, [r4, #32]
	z_add_timeout(&timer->timeout, z_timer_expiration_handler,
    44e4:	4620      	mov	r0, r4
	timer->status = 0U;
    44e6:	2300      	movs	r3, #0
    44e8:	6263      	str	r3, [r4, #36]	; 0x24
		     duration_in_ticks);
}
    44ea:	b002      	add	sp, #8
    44ec:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
	z_add_timeout(&timer->timeout, z_timer_expiration_handler,
    44f0:	f7ff befa 	b.w	42e8 <z_add_timeout>
    44f4:	00004455 	.word	0x00004455

000044f8 <init_static_pools>:
	z_waitq_init(&p->wait_q);
	z_sys_mem_pool_base_init(&p->base);
}

int init_static_pools(struct device *unused)
{
    44f8:	b538      	push	{r3, r4, r5, lr}
	ARG_UNUSED(unused);

	Z_STRUCT_SECTION_FOREACH(k_mem_pool, p) {
    44fa:	4c07      	ldr	r4, [pc, #28]	; (4518 <init_static_pools+0x20>)
    44fc:	4d07      	ldr	r5, [pc, #28]	; (451c <init_static_pools+0x24>)
    44fe:	42ac      	cmp	r4, r5
    4500:	d301      	bcc.n	4506 <init_static_pools+0xe>
		k_mem_pool_init(p);
	}

	return 0;
}
    4502:	2000      	movs	r0, #0
    4504:	bd38      	pop	{r3, r4, r5, pc}
	SYS_DLIST_FOR_EACH_CONTAINER(&((wq)->waitq), thread_ptr, \
				     base.qnode_dlist)

static inline void z_waitq_init(_wait_q_t *w)
{
	sys_dlist_init(&w->waitq);
    4506:	f104 0314 	add.w	r3, r4, #20
	z_sys_mem_pool_base_init(&p->base);
    450a:	4620      	mov	r0, r4
	list->tail = (sys_dnode_t *)list;
    450c:	e9c4 3305 	strd	r3, r3, [r4, #20]
    4510:	f000 f993 	bl	483a <z_sys_mem_pool_base_init>
	Z_STRUCT_SECTION_FOREACH(k_mem_pool, p) {
    4514:	341c      	adds	r4, #28
    4516:	e7f2      	b.n	44fe <init_static_pools+0x6>
    4518:	200022d8 	.word	0x200022d8
    451c:	200022d8 	.word	0x200022d8

00004520 <nrf_cc310_platform_init_no_rng>:
    4520:	b510      	push	{r4, lr}
    4522:	4c09      	ldr	r4, [pc, #36]	; (4548 <nrf_cc310_platform_init_no_rng+0x28>)
    4524:	6823      	ldr	r3, [r4, #0]
    4526:	b11b      	cbz	r3, 4530 <nrf_cc310_platform_init_no_rng+0x10>
    4528:	2301      	movs	r3, #1
    452a:	6023      	str	r3, [r4, #0]
    452c:	2000      	movs	r0, #0
    452e:	bd10      	pop	{r4, pc}
    4530:	f000 f880 	bl	4634 <CC_LibInitNoRng>
    4534:	2800      	cmp	r0, #0
    4536:	d0f7      	beq.n	4528 <nrf_cc310_platform_init_no_rng+0x8>
    4538:	3801      	subs	r0, #1
    453a:	2806      	cmp	r0, #6
    453c:	bf96      	itet	ls
    453e:	4b03      	ldrls	r3, [pc, #12]	; (454c <nrf_cc310_platform_init_no_rng+0x2c>)
    4540:	4803      	ldrhi	r0, [pc, #12]	; (4550 <nrf_cc310_platform_init_no_rng+0x30>)
    4542:	f853 0020 	ldrls.w	r0, [r3, r0, lsl #2]
    4546:	bd10      	pop	{r4, pc}
    4548:	2000088c 	.word	0x2000088c
    454c:	00005f90 	.word	0x00005f90
    4550:	ffff8ffe 	.word	0xffff8ffe

00004554 <nrf_cc310_platform_abort>:
    4554:	f3bf 8f4f 	dsb	sy
    4558:	4905      	ldr	r1, [pc, #20]	; (4570 <nrf_cc310_platform_abort+0x1c>)
    455a:	4b06      	ldr	r3, [pc, #24]	; (4574 <nrf_cc310_platform_abort+0x20>)
    455c:	68ca      	ldr	r2, [r1, #12]
    455e:	f402 62e0 	and.w	r2, r2, #1792	; 0x700
    4562:	4313      	orrs	r3, r2
    4564:	60cb      	str	r3, [r1, #12]
    4566:	f3bf 8f4f 	dsb	sy
    456a:	bf00      	nop
    456c:	e7fd      	b.n	456a <nrf_cc310_platform_abort+0x16>
    456e:	bf00      	nop
    4570:	e000ed00 	.word	0xe000ed00
    4574:	05fa0004 	.word	0x05fa0004

00004578 <CC_PalAbort>:
    4578:	4b01      	ldr	r3, [pc, #4]	; (4580 <CC_PalAbort+0x8>)
    457a:	685b      	ldr	r3, [r3, #4]
    457c:	4718      	bx	r3
    457e:	bf00      	nop
    4580:	200021f0 	.word	0x200021f0

00004584 <nrf_cc310_platform_set_abort>:
    4584:	e9d0 1200 	ldrd	r1, r2, [r0]
    4588:	4b01      	ldr	r3, [pc, #4]	; (4590 <nrf_cc310_platform_set_abort+0xc>)
    458a:	e9c3 1200 	strd	r1, r2, [r3]
    458e:	4770      	bx	lr
    4590:	200021f0 	.word	0x200021f0

00004594 <mutex_free>:
    4594:	4770      	bx	lr
    4596:	bf00      	nop

00004598 <mutex_unlock>:
    4598:	b510      	push	{r4, lr}
    459a:	4604      	mov	r4, r0
    459c:	b120      	cbz	r0, 45a8 <mutex_unlock+0x10>
    459e:	f3bf 8f5f 	dmb	sy
    45a2:	2000      	movs	r0, #0
    45a4:	6020      	str	r0, [r4, #0]
    45a6:	bd10      	pop	{r4, pc}
    45a8:	4803      	ldr	r0, [pc, #12]	; (45b8 <mutex_unlock+0x20>)
    45aa:	f7ff ffe5 	bl	4578 <CC_PalAbort>
    45ae:	f3bf 8f5f 	dmb	sy
    45b2:	2000      	movs	r0, #0
    45b4:	6020      	str	r0, [r4, #0]
    45b6:	bd10      	pop	{r4, pc}
    45b8:	00005fd0 	.word	0x00005fd0

000045bc <mutex_init>:
    45bc:	b510      	push	{r4, lr}
    45be:	4604      	mov	r4, r0
    45c0:	b110      	cbz	r0, 45c8 <mutex_init+0xc>
    45c2:	2300      	movs	r3, #0
    45c4:	6023      	str	r3, [r4, #0]
    45c6:	bd10      	pop	{r4, pc}
    45c8:	4802      	ldr	r0, [pc, #8]	; (45d4 <mutex_init+0x18>)
    45ca:	f7ff ffd5 	bl	4578 <CC_PalAbort>
    45ce:	2300      	movs	r3, #0
    45d0:	6023      	str	r3, [r4, #0]
    45d2:	bd10      	pop	{r4, pc}
    45d4:	00005fac 	.word	0x00005fac

000045d8 <mutex_lock>:
    45d8:	b170      	cbz	r0, 45f8 <mutex_lock+0x20>
    45da:	2201      	movs	r2, #1
    45dc:	f3bf 8f5b 	dmb	ish
    45e0:	e850 3f00 	ldrex	r3, [r0]
    45e4:	e840 2100 	strex	r1, r2, [r0]
    45e8:	2900      	cmp	r1, #0
    45ea:	d1f9      	bne.n	45e0 <mutex_lock+0x8>
    45ec:	f3bf 8f5b 	dmb	ish
    45f0:	2b01      	cmp	r3, #1
    45f2:	d0f3      	beq.n	45dc <mutex_lock+0x4>
    45f4:	f3bf 8f5f 	dmb	sy
    45f8:	2000      	movs	r0, #0
    45fa:	4770      	bx	lr

000045fc <nrf_cc310_platform_set_mutexes>:
    45fc:	b470      	push	{r4, r5, r6}
    45fe:	e9d0 6500 	ldrd	r6, r5, [r0]
    4602:	e9d0 4202 	ldrd	r4, r2, [r0, #8]
    4606:	4b09      	ldr	r3, [pc, #36]	; (462c <nrf_cc310_platform_set_mutexes+0x30>)
    4608:	e9c3 4202 	strd	r4, r2, [r3, #8]
    460c:	e9c3 6500 	strd	r6, r5, [r3]
    4610:	e9d1 4002 	ldrd	r4, r0, [r1, #8]
    4614:	e9d1 6500 	ldrd	r6, r5, [r1]
    4618:	4b05      	ldr	r3, [pc, #20]	; (4630 <nrf_cc310_platform_set_mutexes+0x34>)
    461a:	690a      	ldr	r2, [r1, #16]
    461c:	611a      	str	r2, [r3, #16]
    461e:	e9c3 6500 	strd	r6, r5, [r3]
    4622:	e9c3 4002 	strd	r4, r0, [r3, #8]
    4626:	bc70      	pop	{r4, r5, r6}
    4628:	4770      	bx	lr
    462a:	bf00      	nop
    462c:	200021f8 	.word	0x200021f8
    4630:	20002208 	.word	0x20002208

00004634 <CC_LibInitNoRng>:
    4634:	b510      	push	{r4, lr}
    4636:	f000 f833 	bl	46a0 <CC_HalInit>
    463a:	b970      	cbnz	r0, 465a <CC_LibInitNoRng+0x26>
    463c:	f000 f83a 	bl	46b4 <CC_PalInit>
    4640:	b980      	cbnz	r0, 4664 <CC_LibInitNoRng+0x30>
    4642:	f000 f8b5 	bl	47b0 <CC_PalPowerSaveModeSelect>
    4646:	b980      	cbnz	r0, 466a <CC_LibInitNoRng+0x36>
    4648:	4b11      	ldr	r3, [pc, #68]	; (4690 <CC_LibInitNoRng+0x5c>)
    464a:	681b      	ldr	r3, [r3, #0]
    464c:	0e1b      	lsrs	r3, r3, #24
    464e:	2bf0      	cmp	r3, #240	; 0xf0
    4650:	d00d      	beq.n	466e <CC_LibInitNoRng+0x3a>
    4652:	2406      	movs	r4, #6
    4654:	f000 f826 	bl	46a4 <CC_HalTerminate>
    4658:	e000      	b.n	465c <CC_LibInitNoRng+0x28>
    465a:	2403      	movs	r4, #3
    465c:	f000 f858 	bl	4710 <CC_PalTerminate>
    4660:	4620      	mov	r0, r4
    4662:	bd10      	pop	{r4, pc}
    4664:	2404      	movs	r4, #4
    4666:	4620      	mov	r0, r4
    4668:	bd10      	pop	{r4, pc}
    466a:	2400      	movs	r4, #0
    466c:	e7f2      	b.n	4654 <CC_LibInitNoRng+0x20>
    466e:	4a09      	ldr	r2, [pc, #36]	; (4694 <CC_LibInitNoRng+0x60>)
    4670:	4b09      	ldr	r3, [pc, #36]	; (4698 <CC_LibInitNoRng+0x64>)
    4672:	6812      	ldr	r2, [r2, #0]
    4674:	429a      	cmp	r2, r3
    4676:	d001      	beq.n	467c <CC_LibInitNoRng+0x48>
    4678:	2407      	movs	r4, #7
    467a:	e7eb      	b.n	4654 <CC_LibInitNoRng+0x20>
    467c:	2001      	movs	r0, #1
    467e:	f000 f897 	bl	47b0 <CC_PalPowerSaveModeSelect>
    4682:	2800      	cmp	r0, #0
    4684:	d1f1      	bne.n	466a <CC_LibInitNoRng+0x36>
    4686:	4b05      	ldr	r3, [pc, #20]	; (469c <CC_LibInitNoRng+0x68>)
    4688:	4604      	mov	r4, r0
    468a:	6018      	str	r0, [r3, #0]
    468c:	e7e8      	b.n	4660 <CC_LibInitNoRng+0x2c>
    468e:	bf00      	nop
    4690:	5002b928 	.word	0x5002b928
    4694:	5002ba24 	.word	0x5002ba24
    4698:	20e00000 	.word	0x20e00000
    469c:	5002ba0c 	.word	0x5002ba0c

000046a0 <CC_HalInit>:
    46a0:	2000      	movs	r0, #0
    46a2:	4770      	bx	lr

000046a4 <CC_HalTerminate>:
    46a4:	2000      	movs	r0, #0
    46a6:	4770      	bx	lr

000046a8 <CC_HalMaskInterrupt>:
    46a8:	4b01      	ldr	r3, [pc, #4]	; (46b0 <CC_HalMaskInterrupt+0x8>)
    46aa:	6018      	str	r0, [r3, #0]
    46ac:	4770      	bx	lr
    46ae:	bf00      	nop
    46b0:	5002ba04 	.word	0x5002ba04

000046b4 <CC_PalInit>:
    46b4:	b510      	push	{r4, lr}
    46b6:	4811      	ldr	r0, [pc, #68]	; (46fc <CC_PalInit+0x48>)
    46b8:	f000 f848 	bl	474c <CC_PalMutexCreate>
    46bc:	b100      	cbz	r0, 46c0 <CC_PalInit+0xc>
    46be:	bd10      	pop	{r4, pc}
    46c0:	480f      	ldr	r0, [pc, #60]	; (4700 <CC_PalInit+0x4c>)
    46c2:	f000 f843 	bl	474c <CC_PalMutexCreate>
    46c6:	2800      	cmp	r0, #0
    46c8:	d1f9      	bne.n	46be <CC_PalInit+0xa>
    46ca:	4c0e      	ldr	r4, [pc, #56]	; (4704 <CC_PalInit+0x50>)
    46cc:	4620      	mov	r0, r4
    46ce:	f000 f83d 	bl	474c <CC_PalMutexCreate>
    46d2:	2800      	cmp	r0, #0
    46d4:	d1f3      	bne.n	46be <CC_PalInit+0xa>
    46d6:	4b0c      	ldr	r3, [pc, #48]	; (4708 <CC_PalInit+0x54>)
    46d8:	480c      	ldr	r0, [pc, #48]	; (470c <CC_PalInit+0x58>)
    46da:	601c      	str	r4, [r3, #0]
    46dc:	f000 f836 	bl	474c <CC_PalMutexCreate>
    46e0:	4601      	mov	r1, r0
    46e2:	2800      	cmp	r0, #0
    46e4:	d1eb      	bne.n	46be <CC_PalInit+0xa>
    46e6:	f000 f82d 	bl	4744 <CC_PalDmaInit>
    46ea:	4604      	mov	r4, r0
    46ec:	b108      	cbz	r0, 46f2 <CC_PalInit+0x3e>
    46ee:	4620      	mov	r0, r4
    46f0:	bd10      	pop	{r4, pc}
    46f2:	f000 f83f 	bl	4774 <CC_PalPowerSaveModeInit>
    46f6:	4620      	mov	r0, r4
    46f8:	e7fa      	b.n	46f0 <CC_PalInit+0x3c>
    46fa:	bf00      	nop
    46fc:	20002228 	.word	0x20002228
    4700:	2000221c 	.word	0x2000221c
    4704:	20002224 	.word	0x20002224
    4708:	2000222c 	.word	0x2000222c
    470c:	20002220 	.word	0x20002220

00004710 <CC_PalTerminate>:
    4710:	b508      	push	{r3, lr}
    4712:	4808      	ldr	r0, [pc, #32]	; (4734 <CC_PalTerminate+0x24>)
    4714:	f000 f824 	bl	4760 <CC_PalMutexDestroy>
    4718:	4807      	ldr	r0, [pc, #28]	; (4738 <CC_PalTerminate+0x28>)
    471a:	f000 f821 	bl	4760 <CC_PalMutexDestroy>
    471e:	4807      	ldr	r0, [pc, #28]	; (473c <CC_PalTerminate+0x2c>)
    4720:	f000 f81e 	bl	4760 <CC_PalMutexDestroy>
    4724:	4806      	ldr	r0, [pc, #24]	; (4740 <CC_PalTerminate+0x30>)
    4726:	f000 f81b 	bl	4760 <CC_PalMutexDestroy>
    472a:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
    472e:	f000 b80b 	b.w	4748 <CC_PalDmaTerminate>
    4732:	bf00      	nop
    4734:	20002228 	.word	0x20002228
    4738:	2000221c 	.word	0x2000221c
    473c:	20002224 	.word	0x20002224
    4740:	20002220 	.word	0x20002220

00004744 <CC_PalDmaInit>:
    4744:	2000      	movs	r0, #0
    4746:	4770      	bx	lr

00004748 <CC_PalDmaTerminate>:
    4748:	4770      	bx	lr
    474a:	bf00      	nop

0000474c <CC_PalMutexCreate>:
    474c:	b508      	push	{r3, lr}
    474e:	4b03      	ldr	r3, [pc, #12]	; (475c <CC_PalMutexCreate+0x10>)
    4750:	6802      	ldr	r2, [r0, #0]
    4752:	681b      	ldr	r3, [r3, #0]
    4754:	6810      	ldr	r0, [r2, #0]
    4756:	4798      	blx	r3
    4758:	2000      	movs	r0, #0
    475a:	bd08      	pop	{r3, pc}
    475c:	200021f8 	.word	0x200021f8

00004760 <CC_PalMutexDestroy>:
    4760:	b508      	push	{r3, lr}
    4762:	4b03      	ldr	r3, [pc, #12]	; (4770 <CC_PalMutexDestroy+0x10>)
    4764:	6802      	ldr	r2, [r0, #0]
    4766:	685b      	ldr	r3, [r3, #4]
    4768:	6810      	ldr	r0, [r2, #0]
    476a:	4798      	blx	r3
    476c:	2000      	movs	r0, #0
    476e:	bd08      	pop	{r3, pc}
    4770:	200021f8 	.word	0x200021f8

00004774 <CC_PalPowerSaveModeInit>:
    4774:	b570      	push	{r4, r5, r6, lr}
    4776:	4c09      	ldr	r4, [pc, #36]	; (479c <CC_PalPowerSaveModeInit+0x28>)
    4778:	4d09      	ldr	r5, [pc, #36]	; (47a0 <CC_PalPowerSaveModeInit+0x2c>)
    477a:	6920      	ldr	r0, [r4, #16]
    477c:	68ab      	ldr	r3, [r5, #8]
    477e:	4798      	blx	r3
    4780:	b118      	cbz	r0, 478a <CC_PalPowerSaveModeInit+0x16>
    4782:	4b08      	ldr	r3, [pc, #32]	; (47a4 <CC_PalPowerSaveModeInit+0x30>)
    4784:	4808      	ldr	r0, [pc, #32]	; (47a8 <CC_PalPowerSaveModeInit+0x34>)
    4786:	685b      	ldr	r3, [r3, #4]
    4788:	4798      	blx	r3
    478a:	4a08      	ldr	r2, [pc, #32]	; (47ac <CC_PalPowerSaveModeInit+0x38>)
    478c:	68eb      	ldr	r3, [r5, #12]
    478e:	6920      	ldr	r0, [r4, #16]
    4790:	2100      	movs	r1, #0
    4792:	6011      	str	r1, [r2, #0]
    4794:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
    4798:	4718      	bx	r3
    479a:	bf00      	nop
    479c:	20002208 	.word	0x20002208
    47a0:	200021f8 	.word	0x200021f8
    47a4:	200021f0 	.word	0x200021f0
    47a8:	00005ff0 	.word	0x00005ff0
    47ac:	200008a0 	.word	0x200008a0

000047b0 <CC_PalPowerSaveModeSelect>:
    47b0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    47b2:	4c1a      	ldr	r4, [pc, #104]	; (481c <CC_PalPowerSaveModeSelect+0x6c>)
    47b4:	4d1a      	ldr	r5, [pc, #104]	; (4820 <CC_PalPowerSaveModeSelect+0x70>)
    47b6:	4607      	mov	r7, r0
    47b8:	68ab      	ldr	r3, [r5, #8]
    47ba:	6920      	ldr	r0, [r4, #16]
    47bc:	4798      	blx	r3
    47be:	b9e8      	cbnz	r0, 47fc <CC_PalPowerSaveModeSelect+0x4c>
    47c0:	4e18      	ldr	r6, [pc, #96]	; (4824 <CC_PalPowerSaveModeSelect+0x74>)
    47c2:	6833      	ldr	r3, [r6, #0]
    47c4:	b97f      	cbnz	r7, 47e6 <CC_PalPowerSaveModeSelect+0x36>
    47c6:	b93b      	cbnz	r3, 47d8 <CC_PalPowerSaveModeSelect+0x28>
    47c8:	4a17      	ldr	r2, [pc, #92]	; (4828 <CC_PalPowerSaveModeSelect+0x78>)
    47ca:	4918      	ldr	r1, [pc, #96]	; (482c <CC_PalPowerSaveModeSelect+0x7c>)
    47cc:	2001      	movs	r0, #1
    47ce:	f8c2 0500 	str.w	r0, [r2, #1280]	; 0x500
    47d2:	680a      	ldr	r2, [r1, #0]
    47d4:	2a00      	cmp	r2, #0
    47d6:	d1fc      	bne.n	47d2 <CC_PalPowerSaveModeSelect+0x22>
    47d8:	3301      	adds	r3, #1
    47da:	6033      	str	r3, [r6, #0]
    47dc:	68eb      	ldr	r3, [r5, #12]
    47de:	6920      	ldr	r0, [r4, #16]
    47e0:	4798      	blx	r3
    47e2:	2000      	movs	r0, #0
    47e4:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    47e6:	2b00      	cmp	r3, #0
    47e8:	d0f8      	beq.n	47dc <CC_PalPowerSaveModeSelect+0x2c>
    47ea:	2b01      	cmp	r3, #1
    47ec:	d008      	beq.n	4800 <CC_PalPowerSaveModeSelect+0x50>
    47ee:	3b01      	subs	r3, #1
    47f0:	6033      	str	r3, [r6, #0]
    47f2:	6920      	ldr	r0, [r4, #16]
    47f4:	68eb      	ldr	r3, [r5, #12]
    47f6:	4798      	blx	r3
    47f8:	2000      	movs	r0, #0
    47fa:	e7f3      	b.n	47e4 <CC_PalPowerSaveModeSelect+0x34>
    47fc:	480c      	ldr	r0, [pc, #48]	; (4830 <CC_PalPowerSaveModeSelect+0x80>)
    47fe:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
    4800:	4a0a      	ldr	r2, [pc, #40]	; (482c <CC_PalPowerSaveModeSelect+0x7c>)
    4802:	6813      	ldr	r3, [r2, #0]
    4804:	2b00      	cmp	r3, #0
    4806:	d1fc      	bne.n	4802 <CC_PalPowerSaveModeSelect+0x52>
    4808:	4a07      	ldr	r2, [pc, #28]	; (4828 <CC_PalPowerSaveModeSelect+0x78>)
    480a:	f06f 407e 	mvn.w	r0, #4261412864	; 0xfe000000
    480e:	f8c2 3500 	str.w	r3, [r2, #1280]	; 0x500
    4812:	f7ff ff49 	bl	46a8 <CC_HalMaskInterrupt>
    4816:	6833      	ldr	r3, [r6, #0]
    4818:	e7e9      	b.n	47ee <CC_PalPowerSaveModeSelect+0x3e>
    481a:	bf00      	nop
    481c:	20002208 	.word	0x20002208
    4820:	200021f8 	.word	0x200021f8
    4824:	200008a0 	.word	0x200008a0
    4828:	5002a000 	.word	0x5002a000
    482c:	5002b910 	.word	0x5002b910
    4830:	ffff8fe9 	.word	0xffff8fe9

00004834 <wdt_install_timeout>:
	return api->install_timeout(dev, cfg);
    4834:	6843      	ldr	r3, [r0, #4]
    4836:	689b      	ldr	r3, [r3, #8]
    4838:	4718      	bx	r3

0000483a <z_sys_mem_pool_base_init>:

	return (*word >> (4*(bit / 4))) & 0xf;
}

void z_sys_mem_pool_base_init(struct sys_mem_pool_base *p)
{
    483a:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
	int i;
	size_t buflen = p->n_max * p->max_sz, sz = p->max_sz;
    483e:	6846      	ldr	r6, [r0, #4]
    4840:	8907      	ldrh	r7, [r0, #8]
	u32_t *bits = (u32_t *)((u8_t *)p->buf + buflen);
    4842:	6801      	ldr	r1, [r0, #0]

	p->max_inline_level = -1;

	for (i = 0; i < p->n_levels; i++) {
    4844:	f890 800a 	ldrb.w	r8, [r0, #10]
	p->max_inline_level = -1;
    4848:	23ff      	movs	r3, #255	; 0xff
	size_t buflen = p->n_max * p->max_sz, sz = p->max_sz;
    484a:	fb06 fc07 	mul.w	ip, r6, r7
	p->max_inline_level = -1;
    484e:	72c3      	strb	r3, [r0, #11]
	u32_t *bits = (u32_t *)((u8_t *)p->buf + buflen);
    4850:	4461      	add	r1, ip
	size_t buflen = p->n_max * p->max_sz, sz = p->max_sz;
    4852:	4632      	mov	r2, r6
	for (i = 0; i < p->n_levels; i++) {
    4854:	2300      	movs	r3, #0
		int nblocks = buflen / sz;

		sys_dlist_init(&p->levels[i].free_list);
    4856:	f04f 090c 	mov.w	r9, #12
	for (i = 0; i < p->n_levels; i++) {
    485a:	4598      	cmp	r8, r3
    485c:	dc05      	bgt.n	486a <z_sys_mem_pool_base_init+0x30>
    485e:	2300      	movs	r3, #0
		}

		sz = WB_DN(sz / 4);
	}

	for (i = 0; i < p->n_max; i++) {
    4860:	4619      	mov	r1, r3
    4862:	428f      	cmp	r7, r1
    4864:	dc20      	bgt.n	48a8 <z_sys_mem_pool_base_init+0x6e>
		void *block = block_ptr(p, p->max_sz, i);

		sys_dlist_append(&p->levels[0].free_list, block);
	}
}
    4866:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
		sys_dlist_init(&p->levels[i].free_list);
    486a:	f8d0 a00c 	ldr.w	sl, [r0, #12]
		int nblocks = buflen / sz;
    486e:	fbbc f5f2 	udiv	r5, ip, r2
		sys_dlist_init(&p->levels[i].free_list);
    4872:	fb09 fe03 	mul.w	lr, r9, r3
    4876:	eb0a 040e 	add.w	r4, sl, lr
    487a:	f104 0b04 	add.w	fp, r4, #4
		if (nblocks <= sizeof(p->levels[i].bits)*8) {
    487e:	2d20      	cmp	r5, #32
    4880:	e9c4 bb01 	strd	fp, fp, [r4, #4]
    4884:	d805      	bhi.n	4892 <z_sys_mem_pool_base_init+0x58>
			p->max_inline_level = i;
    4886:	72c3      	strb	r3, [r0, #11]
		sz = WB_DN(sz / 4);
    4888:	0892      	lsrs	r2, r2, #2
    488a:	f022 0203 	bic.w	r2, r2, #3
	for (i = 0; i < p->n_levels; i++) {
    488e:	3301      	adds	r3, #1
    4890:	e7e3      	b.n	485a <z_sys_mem_pool_base_init+0x20>
			bits += (nblocks + 31)/32;
    4892:	f115 041f 	adds.w	r4, r5, #31
    4896:	bf48      	it	mi
    4898:	f105 043e 	addmi.w	r4, r5, #62	; 0x3e
    489c:	1164      	asrs	r4, r4, #5
			p->levels[i].bits_p = bits;
    489e:	f84a 100e 	str.w	r1, [sl, lr]
			bits += (nblocks + 31)/32;
    48a2:	eb01 0184 	add.w	r1, r1, r4, lsl #2
    48a6:	e7ef      	b.n	4888 <z_sys_mem_pool_base_init+0x4e>
		sys_dlist_append(&p->levels[0].free_list, block);
    48a8:	68c2      	ldr	r2, [r0, #12]
	return (u8_t *)p->buf + lsz * block;
    48aa:	6805      	ldr	r5, [r0, #0]
		sys_dlist_append(&p->levels[0].free_list, block);
    48ac:	f102 0c04 	add.w	ip, r2, #4
	return (u8_t *)p->buf + lsz * block;
    48b0:	18ec      	adds	r4, r5, r3
	node->next = list;
    48b2:	f845 c003 	str.w	ip, [r5, r3]
	node->prev = list->tail;
    48b6:	6895      	ldr	r5, [r2, #8]
    48b8:	6065      	str	r5, [r4, #4]
	list->tail->next = node;
    48ba:	6895      	ldr	r5, [r2, #8]
	for (i = 0; i < p->n_max; i++) {
    48bc:	3101      	adds	r1, #1
    48be:	602c      	str	r4, [r5, #0]
	list->tail = node;
    48c0:	4433      	add	r3, r6
    48c2:	6094      	str	r4, [r2, #8]
    48c4:	e7cd      	b.n	4862 <z_sys_mem_pool_base_init+0x28>

000048c6 <arch_printk_char_out>:
}
    48c6:	2000      	movs	r0, #0
    48c8:	4770      	bx	lr

000048ca <print_err>:
{
    48ca:	b570      	push	{r4, r5, r6, lr}
    48cc:	4604      	mov	r4, r0
    48ce:	460d      	mov	r5, r1
	out('E', ctx);
    48d0:	2045      	movs	r0, #69	; 0x45
    48d2:	47a0      	blx	r4
	out('R', ctx);
    48d4:	4629      	mov	r1, r5
    48d6:	2052      	movs	r0, #82	; 0x52
    48d8:	47a0      	blx	r4
	out('R', ctx);
    48da:	4629      	mov	r1, r5
    48dc:	4623      	mov	r3, r4
    48de:	2052      	movs	r0, #82	; 0x52
}
    48e0:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
	out('R', ctx);
    48e4:	4718      	bx	r3

000048e6 <z_vprintk>:
{
    48e6:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
    48ea:	b08b      	sub	sp, #44	; 0x2c
	char length_mod = 0;
    48ec:	f04f 0800 	mov.w	r8, #0
{
    48f0:	4606      	mov	r6, r0
    48f2:	460f      	mov	r7, r1
    48f4:	9202      	str	r2, [sp, #8]
    48f6:	461c      	mov	r4, r3
	int min_width = -1;
    48f8:	f04f 3aff 	mov.w	sl, #4294967295
	enum pad_type padding = PAD_NONE;
    48fc:	46c1      	mov	r9, r8
	int might_format = 0; /* 1 if encountered a '%' */
    48fe:	4645      	mov	r5, r8
	while (*fmt) {
    4900:	9b02      	ldr	r3, [sp, #8]
    4902:	7818      	ldrb	r0, [r3, #0]
    4904:	b910      	cbnz	r0, 490c <z_vprintk+0x26>
}
    4906:	b00b      	add	sp, #44	; 0x2c
    4908:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
		if (!might_format) {
    490c:	b945      	cbnz	r5, 4920 <z_vprintk+0x3a>
			if (*fmt != '%') {
    490e:	2825      	cmp	r0, #37	; 0x25
    4910:	f000 814b 	beq.w	4baa <z_vprintk+0x2c4>
				out((int)*fmt, ctx);
    4914:	4639      	mov	r1, r7
    4916:	47b0      	blx	r6
		++fmt;
    4918:	9b02      	ldr	r3, [sp, #8]
    491a:	3301      	adds	r3, #1
    491c:	9302      	str	r3, [sp, #8]
    491e:	e7ef      	b.n	4900 <z_vprintk+0x1a>
			switch (*fmt) {
    4920:	2864      	cmp	r0, #100	; 0x64
    4922:	d06d      	beq.n	4a00 <z_vprintk+0x11a>
    4924:	d819      	bhi.n	495a <z_vprintk+0x74>
    4926:	2839      	cmp	r0, #57	; 0x39
    4928:	d80a      	bhi.n	4940 <z_vprintk+0x5a>
    492a:	2831      	cmp	r0, #49	; 0x31
    492c:	d25f      	bcs.n	49ee <z_vprintk+0x108>
    492e:	282d      	cmp	r0, #45	; 0x2d
    4930:	f000 8141 	beq.w	4bb6 <z_vprintk+0x2d0>
    4934:	2830      	cmp	r0, #48	; 0x30
    4936:	d04b      	beq.n	49d0 <z_vprintk+0xea>
    4938:	2825      	cmp	r0, #37	; 0x25
    493a:	d107      	bne.n	494c <z_vprintk+0x66>
				out((int)'%', ctx);
    493c:	4639      	mov	r1, r7
    493e:	e132      	b.n	4ba6 <z_vprintk+0x2c0>
			switch (*fmt) {
    4940:	2858      	cmp	r0, #88	; 0x58
    4942:	f000 80bb 	beq.w	4abc <z_vprintk+0x1d6>
    4946:	2863      	cmp	r0, #99	; 0x63
    4948:	f000 812a 	beq.w	4ba0 <z_vprintk+0x2ba>
				out((int)'%', ctx);
    494c:	4639      	mov	r1, r7
    494e:	2025      	movs	r0, #37	; 0x25
    4950:	47b0      	blx	r6
				out((int)*fmt, ctx);
    4952:	9b02      	ldr	r3, [sp, #8]
    4954:	4639      	mov	r1, r7
    4956:	7818      	ldrb	r0, [r3, #0]
    4958:	e125      	b.n	4ba6 <z_vprintk+0x2c0>
			switch (*fmt) {
    495a:	2870      	cmp	r0, #112	; 0x70
    495c:	f000 80a4 	beq.w	4aa8 <z_vprintk+0x1c2>
    4960:	d811      	bhi.n	4986 <z_vprintk+0xa0>
    4962:	2869      	cmp	r0, #105	; 0x69
    4964:	d04c      	beq.n	4a00 <z_vprintk+0x11a>
    4966:	286c      	cmp	r0, #108	; 0x6c
    4968:	d105      	bne.n	4976 <z_vprintk+0x90>
				} else if (*fmt == 'l' && length_mod == 'l') {
    496a:	f1b8 0f6c 	cmp.w	r8, #108	; 0x6c
    496e:	d12a      	bne.n	49c6 <z_vprintk+0xe0>
					length_mod = 'L';
    4970:	f04f 084c 	mov.w	r8, #76	; 0x4c
    4974:	e7d0      	b.n	4918 <z_vprintk+0x32>
			switch (*fmt) {
    4976:	2868      	cmp	r0, #104	; 0x68
    4978:	d1e8      	bne.n	494c <z_vprintk+0x66>
				if (*fmt == 'h' && length_mod == 'h') {
    497a:	f1b8 0f68 	cmp.w	r8, #104	; 0x68
    497e:	d122      	bne.n	49c6 <z_vprintk+0xe0>
					length_mod = 'H';
    4980:	f04f 0848 	mov.w	r8, #72	; 0x48
    4984:	e7c8      	b.n	4918 <z_vprintk+0x32>
			switch (*fmt) {
    4986:	2875      	cmp	r0, #117	; 0x75
    4988:	d072      	beq.n	4a70 <z_vprintk+0x18a>
    498a:	d818      	bhi.n	49be <z_vprintk+0xd8>
    498c:	2873      	cmp	r0, #115	; 0x73
    498e:	d1dd      	bne.n	494c <z_vprintk+0x66>
				char *s = va_arg(ap, char *);
    4990:	f854 5b04 	ldr.w	r5, [r4], #4
				while (*s) {
    4994:	46ab      	mov	fp, r5
    4996:	465b      	mov	r3, fp
    4998:	f81b 0b01 	ldrb.w	r0, [fp], #1
    499c:	2800      	cmp	r0, #0
    499e:	f040 80fc 	bne.w	4b9a <z_vprintk+0x2b4>
				if (padding == PAD_SPACE_AFTER) {
    49a2:	f1b9 0f03 	cmp.w	r9, #3
    49a6:	f040 810c 	bne.w	4bc2 <z_vprintk+0x2dc>
					int remaining = min_width - (s - start);
    49aa:	1b5d      	subs	r5, r3, r5
    49ac:	ebaa 0505 	sub.w	r5, sl, r5
					while (remaining-- > 0) {
    49b0:	2d00      	cmp	r5, #0
    49b2:	dd49      	ble.n	4a48 <z_vprintk+0x162>
						out(' ', ctx);
    49b4:	4639      	mov	r1, r7
    49b6:	2020      	movs	r0, #32
    49b8:	47b0      	blx	r6
    49ba:	3d01      	subs	r5, #1
    49bc:	e7f8      	b.n	49b0 <z_vprintk+0xca>
			switch (*fmt) {
    49be:	2878      	cmp	r0, #120	; 0x78
    49c0:	d07c      	beq.n	4abc <z_vprintk+0x1d6>
    49c2:	287a      	cmp	r0, #122	; 0x7a
    49c4:	d1c2      	bne.n	494c <z_vprintk+0x66>
				} else if (length_mod == 0) {
    49c6:	f1b8 0f00 	cmp.w	r8, #0
    49ca:	d1bf      	bne.n	494c <z_vprintk+0x66>
    49cc:	4680      	mov	r8, r0
    49ce:	e7a3      	b.n	4918 <z_vprintk+0x32>
				if (min_width < 0 && padding == PAD_NONE) {
    49d0:	f1ba 0f00 	cmp.w	sl, #0
    49d4:	da0e      	bge.n	49f4 <z_vprintk+0x10e>
    49d6:	f1b9 0f00 	cmp.w	r9, #0
    49da:	f000 80ef 	beq.w	4bbc <z_vprintk+0x2d6>
					min_width = *fmt - '0';
    49de:	f1a0 0a30 	sub.w	sl, r0, #48	; 0x30
					padding = PAD_SPACE_BEFORE;
    49e2:	f1b9 0f00 	cmp.w	r9, #0
    49e6:	bf08      	it	eq
    49e8:	f04f 0902 	moveq.w	r9, #2
    49ec:	e794      	b.n	4918 <z_vprintk+0x32>
				if (min_width < 0) {
    49ee:	f1ba 0f00 	cmp.w	sl, #0
    49f2:	dbf4      	blt.n	49de <z_vprintk+0xf8>
					min_width = 10 * min_width + *fmt - '0';
    49f4:	230a      	movs	r3, #10
    49f6:	fb03 0a0a 	mla	sl, r3, sl, r0
    49fa:	f1aa 0a30 	sub.w	sl, sl, #48	; 0x30
    49fe:	e7f0      	b.n	49e2 <z_vprintk+0xfc>
				if (length_mod == 'z') {
    4a00:	f1b8 0f7a 	cmp.w	r8, #122	; 0x7a
    4a04:	d102      	bne.n	4a0c <z_vprintk+0x126>
					d = va_arg(ap, int);
    4a06:	f854 5b04 	ldr.w	r5, [r4], #4
    4a0a:	e020      	b.n	4a4e <z_vprintk+0x168>
				} else if (length_mod == 'l') {
    4a0c:	f1b8 0f6c 	cmp.w	r8, #108	; 0x6c
    4a10:	d0f9      	beq.n	4a06 <z_vprintk+0x120>
				} else if (length_mod == 'L') {
    4a12:	f1b8 0f4c 	cmp.w	r8, #76	; 0x4c
    4a16:	d1f6      	bne.n	4a06 <z_vprintk+0x120>
					long long lld = va_arg(ap, long long);
    4a18:	3407      	adds	r4, #7
    4a1a:	f024 0407 	bic.w	r4, r4, #7
    4a1e:	e8f4 2302 	ldrd	r2, r3, [r4], #8
					if (lld > __LONG_MAX__ ||
    4a22:	f112 4100 	adds.w	r1, r2, #2147483648	; 0x80000000
    4a26:	9106      	str	r1, [sp, #24]
    4a28:	f143 0100 	adc.w	r1, r3, #0
    4a2c:	9107      	str	r1, [sp, #28]
    4a2e:	e9dd bc06 	ldrd	fp, ip, [sp, #24]
    4a32:	2100      	movs	r1, #0
    4a34:	f04f 30ff 	mov.w	r0, #4294967295
    4a38:	4561      	cmp	r1, ip
    4a3a:	bf08      	it	eq
    4a3c:	4558      	cmpeq	r0, fp
    4a3e:	d205      	bcs.n	4a4c <z_vprintk+0x166>
						print_err(out, ctx);
    4a40:	4639      	mov	r1, r7
    4a42:	4630      	mov	r0, r6
    4a44:	f7ff ff41 	bl	48ca <print_err>
			might_format = 0;
    4a48:	2500      	movs	r5, #0
				break;
    4a4a:	e765      	b.n	4918 <z_vprintk+0x32>
					d = lld;
    4a4c:	4615      	mov	r5, r2
				if (d < 0) {
    4a4e:	2d00      	cmp	r5, #0
    4a50:	da05      	bge.n	4a5e <z_vprintk+0x178>
					out((int)'-', ctx);
    4a52:	4639      	mov	r1, r7
    4a54:	202d      	movs	r0, #45	; 0x2d
    4a56:	47b0      	blx	r6
					d = -d;
    4a58:	426d      	negs	r5, r5
					min_width--;
    4a5a:	f10a 3aff 	add.w	sl, sl, #4294967295
				_printk_dec_ulong(out, ctx, d, padding,
    4a5e:	f8cd a000 	str.w	sl, [sp]
    4a62:	464b      	mov	r3, r9
    4a64:	462a      	mov	r2, r5
				_printk_dec_ulong(out, ctx, u, padding,
    4a66:	4639      	mov	r1, r7
    4a68:	4630      	mov	r0, r6
    4a6a:	f7fb fd49 	bl	500 <_printk_dec_ulong>
				break;
    4a6e:	e7eb      	b.n	4a48 <z_vprintk+0x162>
				if (length_mod == 'z') {
    4a70:	f1b8 0f7a 	cmp.w	r8, #122	; 0x7a
    4a74:	d102      	bne.n	4a7c <z_vprintk+0x196>
					u = va_arg(ap, unsigned int);
    4a76:	f854 2b04 	ldr.w	r2, [r4], #4
    4a7a:	e011      	b.n	4aa0 <z_vprintk+0x1ba>
				} else if (length_mod == 'l') {
    4a7c:	f1b8 0f6c 	cmp.w	r8, #108	; 0x6c
    4a80:	d0f9      	beq.n	4a76 <z_vprintk+0x190>
				} else if (length_mod == 'L') {
    4a82:	f1b8 0f4c 	cmp.w	r8, #76	; 0x4c
    4a86:	d1f6      	bne.n	4a76 <z_vprintk+0x190>
					unsigned long long llu =
    4a88:	3407      	adds	r4, #7
    4a8a:	f024 0407 	bic.w	r4, r4, #7
    4a8e:	e8f4 2302 	ldrd	r2, r3, [r4], #8
					if (llu > ~0UL) {
    4a92:	2100      	movs	r1, #0
    4a94:	f04f 30ff 	mov.w	r0, #4294967295
    4a98:	4299      	cmp	r1, r3
    4a9a:	bf08      	it	eq
    4a9c:	4290      	cmpeq	r0, r2
    4a9e:	d3cf      	bcc.n	4a40 <z_vprintk+0x15a>
				_printk_dec_ulong(out, ctx, u, padding,
    4aa0:	f8cd a000 	str.w	sl, [sp]
    4aa4:	464b      	mov	r3, r9
    4aa6:	e7de      	b.n	4a66 <z_vprintk+0x180>
				out('0', ctx);
    4aa8:	4639      	mov	r1, r7
    4aaa:	2030      	movs	r0, #48	; 0x30
    4aac:	47b0      	blx	r6
				out('x', ctx);
    4aae:	4639      	mov	r1, r7
    4ab0:	2078      	movs	r0, #120	; 0x78
    4ab2:	47b0      	blx	r6
					min_width = 8;
    4ab4:	f04f 0a08 	mov.w	sl, #8
				padding = PAD_ZERO_BEFORE;
    4ab8:	f04f 0901 	mov.w	r9, #1
				if (*fmt == 'p') {
    4abc:	9b02      	ldr	r3, [sp, #8]
    4abe:	781b      	ldrb	r3, [r3, #0]
    4ac0:	2b70      	cmp	r3, #112	; 0x70
    4ac2:	d104      	bne.n	4ace <z_vprintk+0x1e8>
					x = va_arg(ap, unsigned int);
    4ac4:	f854 3b04 	ldr.w	r3, [r4], #4
    4ac8:	9304      	str	r3, [sp, #16]
    4aca:	2300      	movs	r3, #0
    4acc:	e00d      	b.n	4aea <z_vprintk+0x204>
				} else if (length_mod == 'l') {
    4ace:	f1b8 0f6c 	cmp.w	r8, #108	; 0x6c
    4ad2:	d0f7      	beq.n	4ac4 <z_vprintk+0x1de>
				} else if (length_mod == 'L') {
    4ad4:	f1b8 0f4c 	cmp.w	r8, #76	; 0x4c
    4ad8:	d1f4      	bne.n	4ac4 <z_vprintk+0x1de>
					x = va_arg(ap, unsigned long long);
    4ada:	3407      	adds	r4, #7
    4adc:	f024 0307 	bic.w	r3, r4, #7
    4ae0:	461c      	mov	r4, r3
    4ae2:	685b      	ldr	r3, [r3, #4]
    4ae4:	f854 2b08 	ldr.w	r2, [r4], #8
    4ae8:	9204      	str	r2, [sp, #16]
	int digits = 0;
    4aea:	2100      	movs	r1, #0
	int remaining = 16; /* 16 digits max */
    4aec:	2210      	movs	r2, #16
	int digits = 0;
    4aee:	9103      	str	r1, [sp, #12]
	int found_largest_digit = 0;
    4af0:	9105      	str	r1, [sp, #20]
	int shift = sizeof(num) * 8;
    4af2:	f04f 0b40 	mov.w	fp, #64	; 0x40
		shift -= 4;
    4af6:	f1ab 0b04 	sub.w	fp, fp, #4
		nibble = (num >> shift) & 0xf;
    4afa:	9804      	ldr	r0, [sp, #16]
    4afc:	f1cb 0c20 	rsb	ip, fp, #32
    4b00:	f1ab 0120 	sub.w	r1, fp, #32
    4b04:	fa20 f00b 	lsr.w	r0, r0, fp
    4b08:	fa03 fc0c 	lsl.w	ip, r3, ip
    4b0c:	ea40 000c 	orr.w	r0, r0, ip
    4b10:	fa23 f101 	lsr.w	r1, r3, r1
    4b14:	4308      	orrs	r0, r1
		if (nibble != 0 || found_largest_digit != 0 || shift == 0) {
    4b16:	f010 000f 	ands.w	r0, r0, #15
    4b1a:	d106      	bne.n	4b2a <z_vprintk+0x244>
    4b1c:	9905      	ldr	r1, [sp, #20]
    4b1e:	b911      	cbnz	r1, 4b26 <z_vprintk+0x240>
    4b20:	f1bb 0f00 	cmp.w	fp, #0
    4b24:	d122      	bne.n	4b6c <z_vprintk+0x286>
			nibble += nibble > 9 ? 87 : 48;
    4b26:	2130      	movs	r1, #48	; 0x30
    4b28:	e003      	b.n	4b32 <z_vprintk+0x24c>
    4b2a:	2809      	cmp	r0, #9
    4b2c:	bf8c      	ite	hi
    4b2e:	2157      	movhi	r1, #87	; 0x57
    4b30:	2130      	movls	r1, #48	; 0x30
    4b32:	4408      	add	r0, r1
			out((int)nibble, ctx);
    4b34:	b240      	sxtb	r0, r0
    4b36:	4639      	mov	r1, r7
    4b38:	9308      	str	r3, [sp, #32]
    4b3a:	9205      	str	r2, [sp, #20]
    4b3c:	47b0      	blx	r6
			digits++;
    4b3e:	9b03      	ldr	r3, [sp, #12]
	while (shift >= 4) {
    4b40:	9a05      	ldr	r2, [sp, #20]
			digits++;
    4b42:	3301      	adds	r3, #1
    4b44:	9303      	str	r3, [sp, #12]
	while (shift >= 4) {
    4b46:	9b08      	ldr	r3, [sp, #32]
    4b48:	f1bb 0f00 	cmp.w	fp, #0
    4b4c:	d123      	bne.n	4b96 <z_vprintk+0x2b0>
	if (padding == PAD_SPACE_AFTER) {
    4b4e:	f1b9 0f03 	cmp.w	r9, #3
    4b52:	f47f af79 	bne.w	4a48 <z_vprintk+0x162>
		remaining = min_width * 2 - digits;
    4b56:	9b03      	ldr	r3, [sp, #12]
    4b58:	ebc3 054a 	rsb	r5, r3, sl, lsl #1
		while (remaining-- > 0) {
    4b5c:	2d00      	cmp	r5, #0
    4b5e:	f77f af73 	ble.w	4a48 <z_vprintk+0x162>
			out(' ', ctx);
    4b62:	4639      	mov	r1, r7
    4b64:	2020      	movs	r0, #32
    4b66:	47b0      	blx	r6
    4b68:	3d01      	subs	r5, #1
    4b6a:	e7f7      	b.n	4b5c <z_vprintk+0x276>
		if (remaining-- <= min_width) {
    4b6c:	1e51      	subs	r1, r2, #1
    4b6e:	4592      	cmp	sl, r2
    4b70:	9108      	str	r1, [sp, #32]
    4b72:	db07      	blt.n	4b84 <z_vprintk+0x29e>
			if (padding == PAD_ZERO_BEFORE) {
    4b74:	f1b9 0f01 	cmp.w	r9, #1
    4b78:	d106      	bne.n	4b88 <z_vprintk+0x2a2>
    4b7a:	9309      	str	r3, [sp, #36]	; 0x24
				out('0', ctx);
    4b7c:	4639      	mov	r1, r7
    4b7e:	2030      	movs	r0, #48	; 0x30
				out(' ', ctx);
    4b80:	47b0      	blx	r6
    4b82:	9b09      	ldr	r3, [sp, #36]	; 0x24
			nibble += nibble > 9 ? 87 : 48;
    4b84:	9a08      	ldr	r2, [sp, #32]
    4b86:	e7b6      	b.n	4af6 <z_vprintk+0x210>
			} else if (padding == PAD_SPACE_BEFORE) {
    4b88:	f1b9 0f02 	cmp.w	r9, #2
    4b8c:	d1fa      	bne.n	4b84 <z_vprintk+0x29e>
    4b8e:	9309      	str	r3, [sp, #36]	; 0x24
				out(' ', ctx);
    4b90:	4639      	mov	r1, r7
    4b92:	2020      	movs	r0, #32
    4b94:	e7f4      	b.n	4b80 <z_vprintk+0x29a>
			found_largest_digit = 1;
    4b96:	9505      	str	r5, [sp, #20]
    4b98:	e7ad      	b.n	4af6 <z_vprintk+0x210>
					out((int)(*s++), ctx);
    4b9a:	4639      	mov	r1, r7
    4b9c:	47b0      	blx	r6
    4b9e:	e6fa      	b.n	4996 <z_vprintk+0xb0>
				out(c, ctx);
    4ba0:	f854 0b04 	ldr.w	r0, [r4], #4
    4ba4:	4639      	mov	r1, r7
				out((int)'%', ctx);
    4ba6:	47b0      	blx	r6
    4ba8:	e74e      	b.n	4a48 <z_vprintk+0x162>
				length_mod = 0;
    4baa:	46a8      	mov	r8, r5
				padding = PAD_NONE;
    4bac:	46a9      	mov	r9, r5
				min_width = -1;
    4bae:	f04f 3aff 	mov.w	sl, #4294967295
				might_format = 1;
    4bb2:	2501      	movs	r5, #1
    4bb4:	e6b0      	b.n	4918 <z_vprintk+0x32>
				padding = PAD_SPACE_AFTER;
    4bb6:	f04f 0903 	mov.w	r9, #3
    4bba:	e6ad      	b.n	4918 <z_vprintk+0x32>
					padding = PAD_ZERO_BEFORE;
    4bbc:	f04f 0901 	mov.w	r9, #1
    4bc0:	e6aa      	b.n	4918 <z_vprintk+0x32>
			might_format = 0;
    4bc2:	4605      	mov	r5, r0
    4bc4:	e6a8      	b.n	4918 <z_vprintk+0x32>

00004bc6 <printk>:
{
    4bc6:	b40f      	push	{r0, r1, r2, r3}
    4bc8:	b507      	push	{r0, r1, r2, lr}
    4bca:	a904      	add	r1, sp, #16
    4bcc:	f851 0b04 	ldr.w	r0, [r1], #4
	va_start(ap, fmt);
    4bd0:	9101      	str	r1, [sp, #4]
		vprintk(fmt, ap);
    4bd2:	f7fb fce7 	bl	5a4 <vprintk>
}
    4bd6:	b003      	add	sp, #12
    4bd8:	f85d eb04 	ldr.w	lr, [sp], #4
    4bdc:	b004      	add	sp, #16
    4bde:	4770      	bx	lr

00004be0 <z_thread_entry>:
 * This routine does not return, and is marked as such so the compiler won't
 * generate preamble code that is only used by functions that actually return.
 */
FUNC_NORETURN void z_thread_entry(k_thread_entry_t entry,
				 void *p1, void *p2, void *p3)
{
    4be0:	4604      	mov	r4, r0
    4be2:	b508      	push	{r3, lr}
    4be4:	4608      	mov	r0, r1
    4be6:	4611      	mov	r1, r2
	entry(p1, p2, p3);
    4be8:	461a      	mov	r2, r3
    4bea:	47a0      	blx	r4
	return z_impl_k_current_get();
    4bec:	f7ff fa0c 	bl	4008 <z_impl_k_current_get>
	z_impl_k_thread_abort(thread);
    4bf0:	f7fd f95e 	bl	1eb0 <z_impl_k_thread_abort>

00004bf4 <_ConfigAbsSyms>:
GEN_ABSOLUTE_SYM(CONFIG_OUTPUT_DISASSEMBLY, 1);
GEN_ABSOLUTE_SYM(CONFIG_OUTPUT_PRINT_MEMORY_USAGE, 1);
GEN_ABSOLUTE_SYM(CONFIG_BUILD_OUTPUT_BIN, 1);
GEN_ABSOLUTE_SYM(CONFIG_COMPAT_INCLUDES, 1);

GEN_ABS_SYM_END
    4bf4:	4770      	bx	lr

00004bf6 <log_list_init>:

#include "log_list.h"

void log_list_init(struct log_list_t *list)
{
	list->tail = NULL;
    4bf6:	2300      	movs	r3, #0
	list->head = NULL;
    4bf8:	e9c0 3300 	strd	r3, r3, [r0]
}
    4bfc:	4770      	bx	lr

00004bfe <log_list_add_tail>:

void log_list_add_tail(struct log_list_t *list, struct log_msg *msg)
{
	if (list->head == NULL) {
    4bfe:	6803      	ldr	r3, [r0, #0]
    4c00:	b923      	cbnz	r3, 4c0c <log_list_add_tail+0xe>
		list->head = msg;
    4c02:	6001      	str	r1, [r0, #0]
	} else {
		list->tail->next = msg;
	}

	list->tail = msg;
	msg->next = NULL;
    4c04:	2300      	movs	r3, #0
	list->tail = msg;
    4c06:	6041      	str	r1, [r0, #4]
	msg->next = NULL;
    4c08:	600b      	str	r3, [r1, #0]
}
    4c0a:	4770      	bx	lr
		list->tail->next = msg;
    4c0c:	6843      	ldr	r3, [r0, #4]
    4c0e:	6019      	str	r1, [r3, #0]
    4c10:	e7f8      	b.n	4c04 <log_list_add_tail+0x6>

00004c12 <log_list_head_peek>:

struct log_msg *log_list_head_peek(struct log_list_t *list)
{
	return list->head;
}
    4c12:	6800      	ldr	r0, [r0, #0]
    4c14:	4770      	bx	lr

00004c16 <log_list_head_get>:

struct log_msg *log_list_head_get(struct log_list_t *list)
{
	struct log_msg *msg = list->head;
    4c16:	6803      	ldr	r3, [r0, #0]

	if (list->head != NULL) {
    4c18:	b10b      	cbz	r3, 4c1e <log_list_head_get+0x8>
		list->head = list->head->next;
    4c1a:	681a      	ldr	r2, [r3, #0]
    4c1c:	6002      	str	r2, [r0, #0]
	}

	return msg;
}
    4c1e:	4618      	mov	r0, r3
    4c20:	4770      	bx	lr

00004c22 <z_log_msg_std_alloc>:
/** @brief Allocate chunk for standard log message.
 *
 *  @return Allocated chunk of NULL.
 */
static inline struct log_msg *z_log_msg_std_alloc(void)
{
    4c22:	b508      	push	{r3, lr}
	struct  log_msg *msg = (struct  log_msg *)log_msg_chunk_alloc();
    4c24:	f7fb ff70 	bl	b08 <log_msg_chunk_alloc>

	if (msg != NULL) {
    4c28:	b118      	cbz	r0, 4c32 <z_log_msg_std_alloc+0x10>
		/* all fields reset to 0, reference counter to 1 */
		msg->hdr.ref_cnt = 1;
    4c2a:	2301      	movs	r3, #1
    4c2c:	6043      	str	r3, [r0, #4]
		msg->hdr.params.raw = 0U;
    4c2e:	2300      	movs	r3, #0
    4c30:	8103      	strh	r3, [r0, #8]
		msg->hdr.params.std.type = LOG_MSG_TYPE_STD;
	}

	return msg;
}
    4c32:	bd08      	pop	{r3, pc}

00004c34 <k_cycle_get_32_wrapper>:
#ifndef _ASMLANGUAGE
extern u32_t z_timer_cycle_get_32(void);

static inline u32_t arch_k_cycle_get_32(void)
{
	return z_timer_cycle_get_32();
    4c34:	f7fc bbe6 	b.w	1404 <z_timer_cycle_get_32>

00004c38 <dummy_timestamp>:
    4c38:	2000      	movs	r0, #0
    4c3a:	4770      	bx	lr

00004c3c <z_log_get_s_mask>:
	u32_t mask = 0;
    4c3c:	2300      	movs	r3, #0
{
    4c3e:	b5f0      	push	{r4, r5, r6, r7, lr}
	u32_t arg = 0;
    4c40:	461a      	mov	r2, r3
	bool arm = false;
    4c42:	461c      	mov	r4, r3
				mask |= BIT(arg);
    4c44:	2701      	movs	r7, #1
	while ((curr = *str++) && arg < nargs) {
    4c46:	f810 5b01 	ldrb.w	r5, [r0], #1
    4c4a:	b10d      	cbz	r5, 4c50 <z_log_get_s_mask+0x14>
    4c4c:	428a      	cmp	r2, r1
    4c4e:	d301      	bcc.n	4c54 <z_log_get_s_mask+0x18>
}
    4c50:	4618      	mov	r0, r3
    4c52:	bdf0      	pop	{r4, r5, r6, r7, pc}
		if (curr == '%') {
    4c54:	2d25      	cmp	r5, #37	; 0x25
    4c56:	d102      	bne.n	4c5e <z_log_get_s_mask+0x22>
			arm = !arm;
    4c58:	f084 0401 	eor.w	r4, r4, #1
    4c5c:	e7f3      	b.n	4c46 <z_log_get_s_mask+0xa>
		} else if (arm && isalpha((int)curr)) {
    4c5e:	2c00      	cmp	r4, #0
    4c60:	d0f1      	beq.n	4c46 <z_log_get_s_mask+0xa>
	return (int)((((unsigned)c|32u)-(unsigned)'a') < 26U);
    4c62:	f045 0620 	orr.w	r6, r5, #32
    4c66:	3e61      	subs	r6, #97	; 0x61
    4c68:	2e19      	cmp	r6, #25
    4c6a:	d8ec      	bhi.n	4c46 <z_log_get_s_mask+0xa>
			if (curr == 's') {
    4c6c:	2d73      	cmp	r5, #115	; 0x73
				mask |= BIT(arg);
    4c6e:	bf04      	itt	eq
    4c70:	fa07 f402 	lsleq.w	r4, r7, r2
    4c74:	4323      	orreq	r3, r4
			arg++;
    4c76:	3201      	adds	r2, #1
			arm = false;
    4c78:	2400      	movs	r4, #0
    4c7a:	e7e4      	b.n	4c46 <z_log_get_s_mask+0xa>

00004c7c <log_0>:
{
    4c7c:	b538      	push	{r3, r4, r5, lr}
    4c7e:	4605      	mov	r5, r0
    4c80:	460c      	mov	r4, r1
 *
 *  @return Pointer to allocated head of the message or NULL.
 */
static inline struct log_msg *log_msg_create_0(const char *str)
{
	struct log_msg *msg = z_log_msg_std_alloc();
    4c82:	f7ff ffce 	bl	4c22 <z_log_msg_std_alloc>

	if (msg != NULL) {
    4c86:	b128      	cbz	r0, 4c94 <log_0+0x18>
		msg->str = str;
    4c88:	6105      	str	r5, [r0, #16]
		msg_finalize(msg, src_level);
    4c8a:	4621      	mov	r1, r4
}
    4c8c:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
		msg_finalize(msg, src_level);
    4c90:	f7fb be5c 	b.w	94c <msg_finalize>
}
    4c94:	bd38      	pop	{r3, r4, r5, pc}

00004c96 <log_1>:
{
    4c96:	b570      	push	{r4, r5, r6, lr}
    4c98:	4604      	mov	r4, r0
    4c9a:	460e      	mov	r6, r1
    4c9c:	4615      	mov	r5, r2
 *  @return Pointer to allocated head of the message or NULL.
 */
static inline struct log_msg *log_msg_create_1(const char *str,
					       log_arg_t arg1)
{
	struct  log_msg *msg = z_log_msg_std_alloc();
    4c9e:	f7ff ffc0 	bl	4c22 <z_log_msg_std_alloc>

	if (msg != NULL) {
    4ca2:	b158      	cbz	r0, 4cbc <log_1+0x26>
		msg->str = str;
    4ca4:	6104      	str	r4, [r0, #16]
		msg->hdr.params.std.nargs = 1U;
    4ca6:	7a44      	ldrb	r4, [r0, #9]
		msg->payload.single.args[0] = arg1;
    4ca8:	6146      	str	r6, [r0, #20]
		msg->hdr.params.std.nargs = 1U;
    4caa:	2201      	movs	r2, #1
    4cac:	f362 1407 	bfi	r4, r2, #4, #4
    4cb0:	7244      	strb	r4, [r0, #9]
		msg_finalize(msg, src_level);
    4cb2:	4629      	mov	r1, r5
}
    4cb4:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
		msg_finalize(msg, src_level);
    4cb8:	f7fb be48 	b.w	94c <msg_finalize>
}
    4cbc:	bd70      	pop	{r4, r5, r6, pc}

00004cbe <log_2>:
{
    4cbe:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    4cc2:	4605      	mov	r5, r0
    4cc4:	4688      	mov	r8, r1
    4cc6:	4617      	mov	r7, r2
    4cc8:	461e      	mov	r6, r3
 */
static inline struct log_msg *log_msg_create_2(const char *str,
					       log_arg_t arg1,
					       log_arg_t arg2)
{
	struct  log_msg *msg = z_log_msg_std_alloc();
    4cca:	f7ff ffaa 	bl	4c22 <z_log_msg_std_alloc>

	if (msg != NULL) {
    4cce:	b160      	cbz	r0, 4cea <log_2+0x2c>
		msg->str = str;
    4cd0:	6105      	str	r5, [r0, #16]
		msg->hdr.params.std.nargs = 2U;
    4cd2:	7a45      	ldrb	r5, [r0, #9]
    4cd4:	2302      	movs	r3, #2
    4cd6:	f363 1507 	bfi	r5, r3, #4, #4
    4cda:	7245      	strb	r5, [r0, #9]
		msg->payload.single.args[0] = arg1;
		msg->payload.single.args[1] = arg2;
    4cdc:	e9c0 8705 	strd	r8, r7, [r0, #20]
		msg_finalize(msg, src_level);
    4ce0:	4631      	mov	r1, r6
}
    4ce2:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
		msg_finalize(msg, src_level);
    4ce6:	f7fb be31 	b.w	94c <msg_finalize>
}
    4cea:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

00004cee <log_3>:
{
    4cee:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    4cf2:	4605      	mov	r5, r0
    4cf4:	4689      	mov	r9, r1
    4cf6:	4690      	mov	r8, r2
    4cf8:	461f      	mov	r7, r3
    4cfa:	f8bd 6020 	ldrh.w	r6, [sp, #32]
static inline struct log_msg *log_msg_create_3(const char *str,
					       log_arg_t arg1,
					       log_arg_t arg2,
					       log_arg_t arg3)
{
	struct  log_msg *msg = z_log_msg_std_alloc();
    4cfe:	f7ff ff90 	bl	4c22 <z_log_msg_std_alloc>

	if (msg != NULL) {
    4d02:	b168      	cbz	r0, 4d20 <log_3+0x32>
		msg->str = str;
    4d04:	6105      	str	r5, [r0, #16]
		msg->hdr.params.std.nargs = 3U;
    4d06:	7a45      	ldrb	r5, [r0, #9]
		msg->payload.single.args[0] = arg1;
		msg->payload.single.args[1] = arg2;
		msg->payload.single.args[2] = arg3;
    4d08:	61c7      	str	r7, [r0, #28]
		msg->hdr.params.std.nargs = 3U;
    4d0a:	2303      	movs	r3, #3
    4d0c:	f363 1507 	bfi	r5, r3, #4, #4
    4d10:	7245      	strb	r5, [r0, #9]
		msg->payload.single.args[1] = arg2;
    4d12:	e9c0 9805 	strd	r9, r8, [r0, #20]
		msg_finalize(msg, src_level);
    4d16:	4631      	mov	r1, r6
}
    4d18:	e8bd 43f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
		msg_finalize(msg, src_level);
    4d1c:	f7fb be16 	b.w	94c <msg_finalize>
}
    4d20:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}

00004d24 <log_msg_hexdump_data_op>:
static void log_msg_hexdump_data_op(struct log_msg *msg,
				    u8_t *data,
				    size_t *length,
				    size_t offset,
				    bool put_op)
{
    4d24:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
    4d28:	461c      	mov	r4, r3
	u32_t available_len = msg->hdr.params.hexdump.length;
    4d2a:	8903      	ldrh	r3, [r0, #8]
{
    4d2c:	f89d 7020 	ldrb.w	r7, [sp, #32]
	u32_t available_len = msg->hdr.params.hexdump.length;
    4d30:	089b      	lsrs	r3, r3, #2
	u8_t *head_data;
	u32_t chunk_len;
	u32_t req_len;
	u32_t cpy_len;

	if (offset >= available_len) {
    4d32:	42a3      	cmp	r3, r4
{
    4d34:	460e      	mov	r6, r1
	if (offset >= available_len) {
    4d36:	d803      	bhi.n	4d40 <log_msg_hexdump_data_op+0x1c>
		*length = 0;
    4d38:	2300      	movs	r3, #0
    4d3a:	6013      	str	r3, [r2, #0]
		offset = 0;
		cont = cont->next;
		req_len -= cpy_len;
		data += cpy_len;
	}
}
    4d3c:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
	if ((offset + *length) > available_len) {
    4d40:	6811      	ldr	r1, [r2, #0]
    4d42:	4421      	add	r1, r4
    4d44:	4299      	cmp	r1, r3
		*length = available_len - offset;
    4d46:	bf84      	itt	hi
    4d48:	1b19      	subhi	r1, r3, r4
    4d4a:	6011      	strhi	r1, [r2, #0]
	if (available_len > LOG_MSG_HEXDUMP_BYTES_SINGLE_CHUNK) {
    4d4c:	2b0c      	cmp	r3, #12
	req_len = *length;
    4d4e:	f8d2 9000 	ldr.w	r9, [r2]
	if (available_len > LOG_MSG_HEXDUMP_BYTES_SINGLE_CHUNK) {
    4d52:	d928      	bls.n	4da6 <log_msg_hexdump_data_op+0x82>
	if (offset < chunk_len) {
    4d54:	2c07      	cmp	r4, #7
		cont = msg->payload.ext.next;
    4d56:	f8d0 8014 	ldr.w	r8, [r0, #20]
	if (offset < chunk_len) {
    4d5a:	d82b      	bhi.n	4db4 <log_msg_hexdump_data_op+0x90>
		head_data = msg->payload.ext.data.bytes;
    4d5c:	3018      	adds	r0, #24
		chunk_len = LOG_MSG_HEXDUMP_BYTES_HEAD_CHUNK;
    4d5e:	2308      	movs	r3, #8
		cpy_len = req_len > chunk_len ? chunk_len : req_len;
    4d60:	454b      	cmp	r3, r9
    4d62:	bf28      	it	cs
    4d64:	464b      	movcs	r3, r9
    4d66:	461d      	mov	r5, r3
		if (put_op) {
    4d68:	4420      	add	r0, r4
			(void)memcpy(&head_data[offset], data, cpy_len);
    4d6a:	461a      	mov	r2, r3
		if (put_op) {
    4d6c:	b1ff      	cbz	r7, 4dae <log_msg_hexdump_data_op+0x8a>
			(void)memcpy(&head_data[offset], data, cpy_len);
    4d6e:	4631      	mov	r1, r6
			(void)memcpy(data, &head_data[offset], cpy_len);
    4d70:	f000 fb9c 	bl	54ac <memcpy>
		req_len -= cpy_len;
    4d74:	eba9 0905 	sub.w	r9, r9, r5
		data += cpy_len;
    4d78:	442e      	add	r6, r5
	while (req_len > 0) {
    4d7a:	f1b9 0f00 	cmp.w	r9, #0
    4d7e:	d0dd      	beq.n	4d3c <log_msg_hexdump_data_op+0x18>
		chunk_len = HEXDUMP_BYTES_CONT_MSG - offset;
    4d80:	f1c4 051c 	rsb	r5, r4, #28
		cpy_len = req_len > chunk_len ? chunk_len : req_len;
    4d84:	454d      	cmp	r5, r9
    4d86:	bf28      	it	cs
    4d88:	464d      	movcs	r5, r9
		if (put_op) {
    4d8a:	1d20      	adds	r0, r4, #4
    4d8c:	4440      	add	r0, r8
			(void)memcpy(&cont->payload.bytes[offset],
    4d8e:	462a      	mov	r2, r5
		if (put_op) {
    4d90:	b1bf      	cbz	r7, 4dc2 <log_msg_hexdump_data_op+0x9e>
			(void)memcpy(&cont->payload.bytes[offset],
    4d92:	4631      	mov	r1, r6
			(void)memcpy(data, &cont->payload.bytes[offset],
    4d94:	f000 fb8a 	bl	54ac <memcpy>
		req_len -= cpy_len;
    4d98:	eba9 0905 	sub.w	r9, r9, r5
		cont = cont->next;
    4d9c:	f8d8 8000 	ldr.w	r8, [r8]
		data += cpy_len;
    4da0:	442e      	add	r6, r5
		offset = 0;
    4da2:	2400      	movs	r4, #0
    4da4:	e7e9      	b.n	4d7a <log_msg_hexdump_data_op+0x56>
		head_data = msg->payload.single.bytes;
    4da6:	3014      	adds	r0, #20
	struct log_msg_cont *cont = NULL;
    4da8:	f04f 0800 	mov.w	r8, #0
    4dac:	e7d8      	b.n	4d60 <log_msg_hexdump_data_op+0x3c>
			(void)memcpy(data, &head_data[offset], cpy_len);
    4dae:	4601      	mov	r1, r0
    4db0:	4630      	mov	r0, r6
    4db2:	e7dd      	b.n	4d70 <log_msg_hexdump_data_op+0x4c>
		offset -= chunk_len;
    4db4:	3c08      	subs	r4, #8
		while (offset >= chunk_len) {
    4db6:	2c1b      	cmp	r4, #27
    4db8:	d9df      	bls.n	4d7a <log_msg_hexdump_data_op+0x56>
			cont = cont->next;
    4dba:	f8d8 8000 	ldr.w	r8, [r8]
			offset -= chunk_len;
    4dbe:	3c1c      	subs	r4, #28
    4dc0:	e7f9      	b.n	4db6 <log_msg_hexdump_data_op+0x92>
			(void)memcpy(data, &cont->payload.bytes[offset],
    4dc2:	4601      	mov	r1, r0
    4dc4:	4630      	mov	r0, r6
    4dc6:	e7e5      	b.n	4d94 <log_msg_hexdump_data_op+0x70>

00004dc8 <log_msg_get>:
	return __atomic_fetch_add(target, value, __ATOMIC_SEQ_CST);
    4dc8:	3004      	adds	r0, #4
    4dca:	f3bf 8f5b 	dmb	ish
    4dce:	e850 3f00 	ldrex	r3, [r0]
    4dd2:	3301      	adds	r3, #1
    4dd4:	e840 3200 	strex	r2, r3, [r0]
    4dd8:	2a00      	cmp	r2, #0
    4dda:	d1f8      	bne.n	4dce <log_msg_get+0x6>
    4ddc:	f3bf 8f5b 	dmb	ish
}
    4de0:	4770      	bx	lr

00004de2 <log_msg_nargs_get>:
	return msg->hdr.params.std.nargs;
    4de2:	7a40      	ldrb	r0, [r0, #9]
}
    4de4:	0900      	lsrs	r0, r0, #4
    4de6:	4770      	bx	lr

00004de8 <log_msg_arg_get>:
	if (arg_idx >= msg->hdr.params.std.nargs) {
    4de8:	7a43      	ldrb	r3, [r0, #9]
    4dea:	091b      	lsrs	r3, r3, #4
    4dec:	428b      	cmp	r3, r1
    4dee:	d916      	bls.n	4e1e <log_msg_arg_get+0x36>
	if (msg->hdr.params.std.nargs <= LOG_MSG_NARGS_SINGLE_CHUNK) {
    4df0:	2b03      	cmp	r3, #3
    4df2:	d803      	bhi.n	4dfc <log_msg_arg_get+0x14>
		arg = msg->payload.single.args[arg_idx];
    4df4:	eb00 0181 	add.w	r1, r0, r1, lsl #2
    4df8:	6948      	ldr	r0, [r1, #20]
    4dfa:	4770      	bx	lr
	if (arg_idx < LOG_MSG_NARGS_HEAD_CHUNK) {
    4dfc:	2901      	cmp	r1, #1
    4dfe:	d803      	bhi.n	4e08 <log_msg_arg_get+0x20>
		return msg->payload.ext.data.args[arg_idx];
    4e00:	eb00 0181 	add.w	r1, r0, r1, lsl #2
    4e04:	6988      	ldr	r0, [r1, #24]
    4e06:	4770      	bx	lr
	cont = msg->payload.ext.next;
    4e08:	6943      	ldr	r3, [r0, #20]
	arg_idx -= LOG_MSG_NARGS_HEAD_CHUNK;
    4e0a:	3902      	subs	r1, #2
	while (arg_idx >= ARGS_CONT_MSG) {
    4e0c:	2906      	cmp	r1, #6
    4e0e:	d803      	bhi.n	4e18 <log_msg_arg_get+0x30>
	return cont->payload.args[arg_idx];
    4e10:	eb03 0181 	add.w	r1, r3, r1, lsl #2
    4e14:	6848      	ldr	r0, [r1, #4]
    4e16:	4770      	bx	lr
		arg_idx -= ARGS_CONT_MSG;
    4e18:	3907      	subs	r1, #7
		cont = cont->next;
    4e1a:	681b      	ldr	r3, [r3, #0]
    4e1c:	e7f6      	b.n	4e0c <log_msg_arg_get+0x24>
		return 0;
    4e1e:	2000      	movs	r0, #0
}
    4e20:	4770      	bx	lr

00004e22 <log_msg_put>:
{
    4e22:	4603      	mov	r3, r0
	return __atomic_fetch_sub(target, value, __ATOMIC_SEQ_CST);
    4e24:	1d02      	adds	r2, r0, #4
    4e26:	f3bf 8f5b 	dmb	ish
    4e2a:	e852 1f00 	ldrex	r1, [r2]
    4e2e:	3901      	subs	r1, #1
    4e30:	e842 1c00 	strex	ip, r1, [r2]
    4e34:	f1bc 0f00 	cmp.w	ip, #0
    4e38:	d1f7      	bne.n	4e2a <log_msg_put+0x8>
    4e3a:	f3bf 8f5b 	dmb	ish
	if (msg->hdr.ref_cnt == 0) {
    4e3e:	685b      	ldr	r3, [r3, #4]
    4e40:	b90b      	cbnz	r3, 4e46 <log_msg_put+0x24>
		msg_free(msg);
    4e42:	f7fb be73 	b.w	b2c <msg_free>
}
    4e46:	4770      	bx	lr

00004e48 <log_msg_str_get>:
}
    4e48:	6900      	ldr	r0, [r0, #16]
    4e4a:	4770      	bx	lr

00004e4c <log_msg_hexdump_data_get>:

void log_msg_hexdump_data_get(struct log_msg *msg,
			      u8_t *data,
			      size_t *length,
			      size_t offset)
{
    4e4c:	b513      	push	{r0, r1, r4, lr}
	log_msg_hexdump_data_op(msg, data, length, offset, false);
    4e4e:	2400      	movs	r4, #0
    4e50:	9400      	str	r4, [sp, #0]
    4e52:	f7ff ff67 	bl	4d24 <log_msg_hexdump_data_op>
}
    4e56:	b002      	add	sp, #8
    4e58:	bd10      	pop	{r4, pc}

00004e5a <buffer_write>:
{
    4e5a:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    4e5c:	4606      	mov	r6, r0
    4e5e:	460d      	mov	r5, r1
    4e60:	4614      	mov	r4, r2
    4e62:	461f      	mov	r7, r3
		processed = outf(buf, len, ctx);
    4e64:	4621      	mov	r1, r4
    4e66:	4628      	mov	r0, r5
    4e68:	463a      	mov	r2, r7
    4e6a:	47b0      	blx	r6
	} while (len != 0);
    4e6c:	1a24      	subs	r4, r4, r0
		buf += processed;
    4e6e:	4405      	add	r5, r0
	} while (len != 0);
    4e70:	d1f8      	bne.n	4e64 <buffer_write+0xa>
}
    4e72:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

00004e74 <std_print>:
{
    4e74:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
    4e78:	b08e      	sub	sp, #56	; 0x38
    4e7a:	af0e      	add	r7, sp, #56	; 0x38
    4e7c:	4681      	mov	r9, r0
    4e7e:	460d      	mov	r5, r1
	const char *str = log_msg_str_get(msg);
    4e80:	f7ff ffe2 	bl	4e48 <log_msg_str_get>
    4e84:	4606      	mov	r6, r0
	u32_t nargs = log_msg_nargs_get(msg);
    4e86:	4648      	mov	r0, r9
    4e88:	f7ff ffab 	bl	4de2 <log_msg_nargs_get>
	u32_t *args = alloca(sizeof(u32_t)*nargs);
    4e8c:	0083      	lsls	r3, r0, #2
    4e8e:	3307      	adds	r3, #7
    4e90:	f023 0307 	bic.w	r3, r3, #7
    4e94:	ebad 0d03 	sub.w	sp, sp, r3
	u32_t nargs = log_msg_nargs_get(msg);
    4e98:	4682      	mov	sl, r0
	u32_t *args = alloca(sizeof(u32_t)*nargs);
    4e9a:	ac0e      	add	r4, sp, #56	; 0x38
	for (i = 0; i < nargs; i++) {
    4e9c:	f04f 0800 	mov.w	r8, #0
    4ea0:	45d0      	cmp	r8, sl
    4ea2:	d116      	bne.n	4ed2 <std_print+0x5e>
	switch (log_msg_nargs_get(msg)) {
    4ea4:	4648      	mov	r0, r9
    4ea6:	f7ff ff9c 	bl	4de2 <log_msg_nargs_get>
    4eaa:	280f      	cmp	r0, #15
    4eac:	d81e      	bhi.n	4eec <std_print+0x78>
    4eae:	e8df f010 	tbh	[pc, r0, lsl #1]
    4eb2:	0019      	.short	0x0019
    4eb4:	00260020 	.word	0x00260020
    4eb8:	0036002d 	.word	0x0036002d
    4ebc:	004e0041 	.word	0x004e0041
    4ec0:	006e005d 	.word	0x006e005d
    4ec4:	00960081 	.word	0x00960081
    4ec8:	00c600ad 	.word	0x00c600ad
    4ecc:	00fe00e1 	.word	0x00fe00e1
    4ed0:	011d      	.short	0x011d
		args[i] = log_msg_arg_get(msg, i);
    4ed2:	4641      	mov	r1, r8
    4ed4:	4648      	mov	r0, r9
    4ed6:	f7ff ff87 	bl	4de8 <log_msg_arg_get>
    4eda:	f844 0028 	str.w	r0, [r4, r8, lsl #2]
	for (i = 0; i < nargs; i++) {
    4ede:	f108 0801 	add.w	r8, r8, #1
    4ee2:	e7dd      	b.n	4ea0 <std_print+0x2c>
		print_formatted(log_output, str);
    4ee4:	4631      	mov	r1, r6
    4ee6:	4628      	mov	r0, r5
    4ee8:	f7fb fe62 	bl	bb0 <print_formatted>
}
    4eec:	46bd      	mov	sp, r7
    4eee:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
		print_formatted(log_output, str, args[0]);
    4ef2:	6822      	ldr	r2, [r4, #0]
    4ef4:	4631      	mov	r1, r6
    4ef6:	4628      	mov	r0, r5
    4ef8:	f7fb fe5a 	bl	bb0 <print_formatted>
		break;
    4efc:	e7f6      	b.n	4eec <std_print+0x78>
		print_formatted(log_output, str, args[0], args[1]);
    4efe:	e9d4 2300 	ldrd	r2, r3, [r4]
    4f02:	4631      	mov	r1, r6
    4f04:	4628      	mov	r0, r5
    4f06:	f7fb fe53 	bl	bb0 <print_formatted>
		break;
    4f0a:	e7ef      	b.n	4eec <std_print+0x78>
		print_formatted(log_output, str, args[0], args[1], args[2]);
    4f0c:	68a3      	ldr	r3, [r4, #8]
    4f0e:	9300      	str	r3, [sp, #0]
    4f10:	e9d4 2300 	ldrd	r2, r3, [r4]
    4f14:	4631      	mov	r1, r6
    4f16:	4628      	mov	r0, r5
    4f18:	f7fb fe4a 	bl	bb0 <print_formatted>
		break;
    4f1c:	e7e6      	b.n	4eec <std_print+0x78>
		print_formatted(log_output, str, args[0], args[1], args[2],
    4f1e:	68e3      	ldr	r3, [r4, #12]
    4f20:	9301      	str	r3, [sp, #4]
    4f22:	68a3      	ldr	r3, [r4, #8]
    4f24:	9300      	str	r3, [sp, #0]
    4f26:	e9d4 2300 	ldrd	r2, r3, [r4]
    4f2a:	4631      	mov	r1, r6
    4f2c:	4628      	mov	r0, r5
    4f2e:	f7fb fe3f 	bl	bb0 <print_formatted>
		break;
    4f32:	e7db      	b.n	4eec <std_print+0x78>
		print_formatted(log_output, str, args[0], args[1], args[2],
    4f34:	6923      	ldr	r3, [r4, #16]
    4f36:	9302      	str	r3, [sp, #8]
    4f38:	68e3      	ldr	r3, [r4, #12]
    4f3a:	9301      	str	r3, [sp, #4]
    4f3c:	68a3      	ldr	r3, [r4, #8]
    4f3e:	9300      	str	r3, [sp, #0]
    4f40:	e9d4 2300 	ldrd	r2, r3, [r4]
    4f44:	4631      	mov	r1, r6
    4f46:	4628      	mov	r0, r5
    4f48:	f7fb fe32 	bl	bb0 <print_formatted>
		break;
    4f4c:	e7ce      	b.n	4eec <std_print+0x78>
		print_formatted(log_output, str, args[0], args[1], args[2],
    4f4e:	6963      	ldr	r3, [r4, #20]
    4f50:	9303      	str	r3, [sp, #12]
    4f52:	6923      	ldr	r3, [r4, #16]
    4f54:	9302      	str	r3, [sp, #8]
    4f56:	68e3      	ldr	r3, [r4, #12]
    4f58:	9301      	str	r3, [sp, #4]
    4f5a:	68a3      	ldr	r3, [r4, #8]
    4f5c:	9300      	str	r3, [sp, #0]
    4f5e:	e9d4 2300 	ldrd	r2, r3, [r4]
    4f62:	4631      	mov	r1, r6
    4f64:	4628      	mov	r0, r5
    4f66:	f7fb fe23 	bl	bb0 <print_formatted>
		break;
    4f6a:	e7bf      	b.n	4eec <std_print+0x78>
		print_formatted(log_output, str, args[0], args[1], args[2],
    4f6c:	69a3      	ldr	r3, [r4, #24]
    4f6e:	9304      	str	r3, [sp, #16]
    4f70:	6963      	ldr	r3, [r4, #20]
    4f72:	9303      	str	r3, [sp, #12]
    4f74:	6923      	ldr	r3, [r4, #16]
    4f76:	9302      	str	r3, [sp, #8]
    4f78:	68e3      	ldr	r3, [r4, #12]
    4f7a:	9301      	str	r3, [sp, #4]
    4f7c:	68a3      	ldr	r3, [r4, #8]
    4f7e:	9300      	str	r3, [sp, #0]
    4f80:	e9d4 2300 	ldrd	r2, r3, [r4]
    4f84:	4631      	mov	r1, r6
    4f86:	4628      	mov	r0, r5
    4f88:	f7fb fe12 	bl	bb0 <print_formatted>
		break;
    4f8c:	e7ae      	b.n	4eec <std_print+0x78>
		print_formatted(log_output, str, args[0], args[1], args[2],
    4f8e:	69e3      	ldr	r3, [r4, #28]
    4f90:	9305      	str	r3, [sp, #20]
    4f92:	69a3      	ldr	r3, [r4, #24]
    4f94:	9304      	str	r3, [sp, #16]
    4f96:	6963      	ldr	r3, [r4, #20]
    4f98:	9303      	str	r3, [sp, #12]
    4f9a:	6923      	ldr	r3, [r4, #16]
    4f9c:	9302      	str	r3, [sp, #8]
    4f9e:	68e3      	ldr	r3, [r4, #12]
    4fa0:	9301      	str	r3, [sp, #4]
    4fa2:	68a3      	ldr	r3, [r4, #8]
    4fa4:	9300      	str	r3, [sp, #0]
    4fa6:	e9d4 2300 	ldrd	r2, r3, [r4]
    4faa:	4631      	mov	r1, r6
    4fac:	4628      	mov	r0, r5
    4fae:	f7fb fdff 	bl	bb0 <print_formatted>
		break;
    4fb2:	e79b      	b.n	4eec <std_print+0x78>
		print_formatted(log_output, str, args[0], args[1], args[2],
    4fb4:	6a23      	ldr	r3, [r4, #32]
    4fb6:	9306      	str	r3, [sp, #24]
    4fb8:	69e3      	ldr	r3, [r4, #28]
    4fba:	9305      	str	r3, [sp, #20]
    4fbc:	69a3      	ldr	r3, [r4, #24]
    4fbe:	9304      	str	r3, [sp, #16]
    4fc0:	6963      	ldr	r3, [r4, #20]
    4fc2:	9303      	str	r3, [sp, #12]
    4fc4:	6923      	ldr	r3, [r4, #16]
    4fc6:	9302      	str	r3, [sp, #8]
    4fc8:	68e3      	ldr	r3, [r4, #12]
    4fca:	9301      	str	r3, [sp, #4]
    4fcc:	68a3      	ldr	r3, [r4, #8]
    4fce:	9300      	str	r3, [sp, #0]
    4fd0:	e9d4 2300 	ldrd	r2, r3, [r4]
    4fd4:	4631      	mov	r1, r6
    4fd6:	4628      	mov	r0, r5
    4fd8:	f7fb fdea 	bl	bb0 <print_formatted>
		break;
    4fdc:	e786      	b.n	4eec <std_print+0x78>
		print_formatted(log_output, str, args[0], args[1], args[2],
    4fde:	6a63      	ldr	r3, [r4, #36]	; 0x24
    4fe0:	9307      	str	r3, [sp, #28]
    4fe2:	6a23      	ldr	r3, [r4, #32]
    4fe4:	9306      	str	r3, [sp, #24]
    4fe6:	69e3      	ldr	r3, [r4, #28]
    4fe8:	9305      	str	r3, [sp, #20]
    4fea:	69a3      	ldr	r3, [r4, #24]
    4fec:	9304      	str	r3, [sp, #16]
    4fee:	6963      	ldr	r3, [r4, #20]
    4ff0:	9303      	str	r3, [sp, #12]
    4ff2:	6923      	ldr	r3, [r4, #16]
    4ff4:	9302      	str	r3, [sp, #8]
    4ff6:	68e3      	ldr	r3, [r4, #12]
    4ff8:	9301      	str	r3, [sp, #4]
    4ffa:	68a3      	ldr	r3, [r4, #8]
    4ffc:	9300      	str	r3, [sp, #0]
    4ffe:	e9d4 2300 	ldrd	r2, r3, [r4]
    5002:	4631      	mov	r1, r6
    5004:	4628      	mov	r0, r5
    5006:	f7fb fdd3 	bl	bb0 <print_formatted>
		break;
    500a:	e76f      	b.n	4eec <std_print+0x78>
		print_formatted(log_output, str, args[0], args[1], args[2],
    500c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    500e:	9308      	str	r3, [sp, #32]
    5010:	6a63      	ldr	r3, [r4, #36]	; 0x24
    5012:	9307      	str	r3, [sp, #28]
    5014:	6a23      	ldr	r3, [r4, #32]
    5016:	9306      	str	r3, [sp, #24]
    5018:	69e3      	ldr	r3, [r4, #28]
    501a:	9305      	str	r3, [sp, #20]
    501c:	69a3      	ldr	r3, [r4, #24]
    501e:	9304      	str	r3, [sp, #16]
    5020:	6963      	ldr	r3, [r4, #20]
    5022:	9303      	str	r3, [sp, #12]
    5024:	6923      	ldr	r3, [r4, #16]
    5026:	9302      	str	r3, [sp, #8]
    5028:	68e3      	ldr	r3, [r4, #12]
    502a:	9301      	str	r3, [sp, #4]
    502c:	68a3      	ldr	r3, [r4, #8]
    502e:	9300      	str	r3, [sp, #0]
    5030:	e9d4 2300 	ldrd	r2, r3, [r4]
    5034:	4631      	mov	r1, r6
    5036:	4628      	mov	r0, r5
    5038:	f7fb fdba 	bl	bb0 <print_formatted>
		break;
    503c:	e756      	b.n	4eec <std_print+0x78>
		print_formatted(log_output, str, args[0], args[1], args[2],
    503e:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
    5040:	9309      	str	r3, [sp, #36]	; 0x24
    5042:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    5044:	9308      	str	r3, [sp, #32]
    5046:	6a63      	ldr	r3, [r4, #36]	; 0x24
    5048:	9307      	str	r3, [sp, #28]
    504a:	6a23      	ldr	r3, [r4, #32]
    504c:	9306      	str	r3, [sp, #24]
    504e:	69e3      	ldr	r3, [r4, #28]
    5050:	9305      	str	r3, [sp, #20]
    5052:	69a3      	ldr	r3, [r4, #24]
    5054:	9304      	str	r3, [sp, #16]
    5056:	6963      	ldr	r3, [r4, #20]
    5058:	9303      	str	r3, [sp, #12]
    505a:	6923      	ldr	r3, [r4, #16]
    505c:	9302      	str	r3, [sp, #8]
    505e:	68e3      	ldr	r3, [r4, #12]
    5060:	9301      	str	r3, [sp, #4]
    5062:	68a3      	ldr	r3, [r4, #8]
    5064:	9300      	str	r3, [sp, #0]
    5066:	e9d4 2300 	ldrd	r2, r3, [r4]
    506a:	4631      	mov	r1, r6
    506c:	4628      	mov	r0, r5
    506e:	f7fb fd9f 	bl	bb0 <print_formatted>
		break;
    5072:	e73b      	b.n	4eec <std_print+0x78>
		print_formatted(log_output, str, args[0], args[1], args[2],
    5074:	6b23      	ldr	r3, [r4, #48]	; 0x30
    5076:	930a      	str	r3, [sp, #40]	; 0x28
    5078:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
    507a:	9309      	str	r3, [sp, #36]	; 0x24
    507c:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    507e:	9308      	str	r3, [sp, #32]
    5080:	6a63      	ldr	r3, [r4, #36]	; 0x24
    5082:	9307      	str	r3, [sp, #28]
    5084:	6a23      	ldr	r3, [r4, #32]
    5086:	9306      	str	r3, [sp, #24]
    5088:	69e3      	ldr	r3, [r4, #28]
    508a:	9305      	str	r3, [sp, #20]
    508c:	69a3      	ldr	r3, [r4, #24]
    508e:	9304      	str	r3, [sp, #16]
    5090:	6963      	ldr	r3, [r4, #20]
    5092:	9303      	str	r3, [sp, #12]
    5094:	6923      	ldr	r3, [r4, #16]
    5096:	9302      	str	r3, [sp, #8]
    5098:	68e3      	ldr	r3, [r4, #12]
    509a:	9301      	str	r3, [sp, #4]
    509c:	68a3      	ldr	r3, [r4, #8]
    509e:	9300      	str	r3, [sp, #0]
    50a0:	e9d4 2300 	ldrd	r2, r3, [r4]
    50a4:	4631      	mov	r1, r6
    50a6:	4628      	mov	r0, r5
    50a8:	f7fb fd82 	bl	bb0 <print_formatted>
		break;
    50ac:	e71e      	b.n	4eec <std_print+0x78>
		print_formatted(log_output, str, args[0], args[1], args[2],
    50ae:	6b63      	ldr	r3, [r4, #52]	; 0x34
    50b0:	930b      	str	r3, [sp, #44]	; 0x2c
    50b2:	6b23      	ldr	r3, [r4, #48]	; 0x30
    50b4:	930a      	str	r3, [sp, #40]	; 0x28
    50b6:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
    50b8:	9309      	str	r3, [sp, #36]	; 0x24
    50ba:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    50bc:	9308      	str	r3, [sp, #32]
    50be:	6a63      	ldr	r3, [r4, #36]	; 0x24
    50c0:	9307      	str	r3, [sp, #28]
    50c2:	6a23      	ldr	r3, [r4, #32]
    50c4:	9306      	str	r3, [sp, #24]
    50c6:	69e3      	ldr	r3, [r4, #28]
    50c8:	9305      	str	r3, [sp, #20]
    50ca:	69a3      	ldr	r3, [r4, #24]
    50cc:	9304      	str	r3, [sp, #16]
    50ce:	6963      	ldr	r3, [r4, #20]
    50d0:	9303      	str	r3, [sp, #12]
    50d2:	6923      	ldr	r3, [r4, #16]
    50d4:	9302      	str	r3, [sp, #8]
    50d6:	68e3      	ldr	r3, [r4, #12]
    50d8:	9301      	str	r3, [sp, #4]
    50da:	68a3      	ldr	r3, [r4, #8]
    50dc:	9300      	str	r3, [sp, #0]
    50de:	e9d4 2300 	ldrd	r2, r3, [r4]
    50e2:	4631      	mov	r1, r6
    50e4:	4628      	mov	r0, r5
    50e6:	f7fb fd63 	bl	bb0 <print_formatted>
		break;
    50ea:	e6ff      	b.n	4eec <std_print+0x78>
		print_formatted(log_output, str, args[0], args[1], args[2],
    50ec:	6ba3      	ldr	r3, [r4, #56]	; 0x38
    50ee:	930c      	str	r3, [sp, #48]	; 0x30
    50f0:	6b63      	ldr	r3, [r4, #52]	; 0x34
    50f2:	930b      	str	r3, [sp, #44]	; 0x2c
    50f4:	6b23      	ldr	r3, [r4, #48]	; 0x30
    50f6:	930a      	str	r3, [sp, #40]	; 0x28
    50f8:	6ae3      	ldr	r3, [r4, #44]	; 0x2c
    50fa:	9309      	str	r3, [sp, #36]	; 0x24
    50fc:	6aa3      	ldr	r3, [r4, #40]	; 0x28
    50fe:	9308      	str	r3, [sp, #32]
    5100:	6a63      	ldr	r3, [r4, #36]	; 0x24
    5102:	9307      	str	r3, [sp, #28]
    5104:	6a23      	ldr	r3, [r4, #32]
    5106:	9306      	str	r3, [sp, #24]
    5108:	69e3      	ldr	r3, [r4, #28]
    510a:	9305      	str	r3, [sp, #20]
    510c:	69a3      	ldr	r3, [r4, #24]
    510e:	9304      	str	r3, [sp, #16]
    5110:	6963      	ldr	r3, [r4, #20]
    5112:	9303      	str	r3, [sp, #12]
    5114:	6923      	ldr	r3, [r4, #16]
    5116:	9302      	str	r3, [sp, #8]
    5118:	68e3      	ldr	r3, [r4, #12]
    511a:	9301      	str	r3, [sp, #4]
    511c:	68a3      	ldr	r3, [r4, #8]
    511e:	9300      	str	r3, [sp, #0]
    5120:	e9d4 2300 	ldrd	r2, r3, [r4]
    5124:	4631      	mov	r1, r6
    5126:	4628      	mov	r0, r5
    5128:	f7fb fd42 	bl	bb0 <print_formatted>
}
    512c:	e6de      	b.n	4eec <std_print+0x78>

0000512e <log_output_flush>:
		     log_output->control_block->offset,
    512e:	6842      	ldr	r2, [r0, #4]
	buffer_write(log_output->func, log_output->buf,
    5130:	6881      	ldr	r1, [r0, #8]
{
    5132:	b510      	push	{r4, lr}
    5134:	4604      	mov	r4, r0
	buffer_write(log_output->func, log_output->buf,
    5136:	e9d2 2300 	ldrd	r2, r3, [r2]
    513a:	6800      	ldr	r0, [r0, #0]
    513c:	f7ff fe8d 	bl	4e5a <buffer_write>
	log_output->control_block->offset = 0;
    5140:	6863      	ldr	r3, [r4, #4]
    5142:	2200      	movs	r2, #0
    5144:	601a      	str	r2, [r3, #0]
}
    5146:	bd10      	pop	{r4, pc}

00005148 <out_func>:
{
    5148:	b538      	push	{r3, r4, r5, lr}
	if (out_ctx->control_block->offset == out_ctx->size) {
    514a:	684b      	ldr	r3, [r1, #4]
    514c:	681a      	ldr	r2, [r3, #0]
    514e:	68cb      	ldr	r3, [r1, #12]
    5150:	429a      	cmp	r2, r3
{
    5152:	4605      	mov	r5, r0
    5154:	460c      	mov	r4, r1
	if (out_ctx->control_block->offset == out_ctx->size) {
    5156:	d102      	bne.n	515e <out_func+0x16>
		log_output_flush(out_ctx);
    5158:	4608      	mov	r0, r1
    515a:	f7ff ffe8 	bl	512e <log_output_flush>
	return __atomic_fetch_add(target, value, __ATOMIC_SEQ_CST);
    515e:	6863      	ldr	r3, [r4, #4]
    5160:	f3bf 8f5b 	dmb	ish
    5164:	e853 2f00 	ldrex	r2, [r3]
    5168:	1c51      	adds	r1, r2, #1
    516a:	e843 1000 	strex	r0, r1, [r3]
    516e:	2800      	cmp	r0, #0
    5170:	d1f8      	bne.n	5164 <out_func+0x1c>
    5172:	f3bf 8f5b 	dmb	ish
	out_ctx->buf[idx] = (u8_t)c;
    5176:	68a3      	ldr	r3, [r4, #8]
    5178:	549d      	strb	r5, [r3, r2]
}
    517a:	2000      	movs	r0, #0
    517c:	bd38      	pop	{r3, r4, r5, pc}

0000517e <char_out>:
{
    517e:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
    5180:	460d      	mov	r5, r1
    5182:	4616      	mov	r6, r2
	for (size_t i = 0; i < length; i++) {
    5184:	4604      	mov	r4, r0
    5186:	1847      	adds	r7, r0, r1
    5188:	42bc      	cmp	r4, r7
    518a:	d101      	bne.n	5190 <char_out+0x12>
}
    518c:	4628      	mov	r0, r5
    518e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
		uart_poll_out(dev, data[i]);
    5190:	f814 1b01 	ldrb.w	r1, [r4], #1
    5194:	6873      	ldr	r3, [r6, #4]
    5196:	4630      	mov	r0, r6
    5198:	685b      	ldr	r3, [r3, #4]
    519a:	4798      	blx	r3
    519c:	e7f4      	b.n	5188 <char_out+0xa>

0000519e <get_status>:
	data = get_sub_data(dev, type);
    519e:	6883      	ldr	r3, [r0, #8]
	return &data->subsys[type];
    51a0:	b2c9      	uxtb	r1, r1
	if (data->started) {
    51a2:	220c      	movs	r2, #12
    51a4:	fb02 3101 	mla	r1, r2, r1, r3
    51a8:	7a4b      	ldrb	r3, [r1, #9]
    51aa:	b923      	cbnz	r3, 51b6 <get_status+0x18>
	if (data->ref > 0) {
    51ac:	7a08      	ldrb	r0, [r1, #8]
		return CLOCK_CONTROL_STATUS_ON;
    51ae:	fab0 f080 	clz	r0, r0
    51b2:	0940      	lsrs	r0, r0, #5
    51b4:	4770      	bx	lr
    51b6:	2002      	movs	r0, #2
}
    51b8:	4770      	bx	lr

000051ba <clkstarted_handle>:
{
    51ba:	b538      	push	{r3, r4, r5, lr}
	struct nrf_clock_control_sub_data *sub_data = get_sub_data(dev, type);
    51bc:	6883      	ldr	r3, [r0, #8]
	sub_data->started = true;
    51be:	240c      	movs	r4, #12
    51c0:	fb04 3401 	mla	r4, r4, r1, r3
    51c4:	2301      	movs	r3, #1
{
    51c6:	4605      	mov	r5, r0
	sub_data->started = true;
    51c8:	7263      	strb	r3, [r4, #9]
	__asm__ volatile(
    51ca:	f04f 0320 	mov.w	r3, #32
    51ce:	f3ef 8111 	mrs	r1, BASEPRI
    51d2:	f383 8811 	msr	BASEPRI, r3
    51d6:	f3bf 8f6f 	isb	sy
 *
 * @return a boolean, true if it's empty, false otherwise
 */
static inline bool sys_slist_is_empty(sys_slist_t *list);

Z_GENLIST_IS_EMPTY(slist)
    51da:	6823      	ldr	r3, [r4, #0]
 *
 * @return A pointer to the first node of the list (or NULL if empty)
 */
static inline sys_snode_t *sys_slist_get(sys_slist_t *list);

Z_GENLIST_GET(slist, snode)
    51dc:	b12b      	cbz	r3, 51ea <clkstarted_handle+0x30>
Z_GENLIST_GET_NOT_EMPTY(slist, snode)
    51de:	6860      	ldr	r0, [r4, #4]
    51e0:	681a      	ldr	r2, [r3, #0]
	list->head = node;
    51e2:	6022      	str	r2, [r4, #0]
Z_GENLIST_GET_NOT_EMPTY(slist, snode)
    51e4:	4283      	cmp	r3, r0
	list->tail = node;
    51e6:	bf08      	it	eq
    51e8:	6062      	streq	r2, [r4, #4]
	__asm__ volatile(
    51ea:	f381 8811 	msr	BASEPRI, r1
    51ee:	f3bf 8f6f 	isb	sy
	while ((async_data = list_get(&sub_data->list)) != NULL) {
    51f2:	b903      	cbnz	r3, 51f6 <clkstarted_handle+0x3c>
}
    51f4:	bd38      	pop	{r3, r4, r5, pc}
		async_data->cb(dev, async_data->user_data);
    51f6:	e9d3 2101 	ldrd	r2, r1, [r3, #4]
    51fa:	4628      	mov	r0, r5
    51fc:	4790      	blx	r2
    51fe:	e7e4      	b.n	51ca <clkstarted_handle+0x10>

00005200 <clock_async_start>:
	const struct nrf_clock_control_config *config =
    5200:	6803      	ldr	r3, [r0, #0]
	clk_data = get_sub_data(dev, type);
    5202:	f8d0 c008 	ldr.w	ip, [r0, #8]
{
    5206:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
    520a:	4605      	mov	r5, r0
	const struct nrf_clock_control_config *config =
    520c:	689f      	ldr	r7, [r3, #8]
	return &config->subsys[type];
    520e:	b2ce      	uxtb	r6, r1
	if ((data != NULL)
    5210:	b14a      	cbz	r2, 5226 <clock_async_start+0x26>
	sys_snode_t *item = sys_slist_peek_head(list);
    5212:	230c      	movs	r3, #12
    5214:	4373      	muls	r3, r6
    5216:	f85c 3003 	ldr.w	r3, [ip, r3]
		if (item == node) {
    521a:	429a      	cmp	r2, r3
    521c:	d05b      	beq.n	52d6 <clock_async_start+0xd6>
Z_GENLIST_PEEK_NEXT(slist, snode)
    521e:	b113      	cbz	r3, 5226 <clock_async_start+0x26>
Z_GENLIST_PEEK_NEXT_NO_CHECK(slist, snode)
    5220:	681b      	ldr	r3, [r3, #0]
	} while (item);
    5222:	2b00      	cmp	r3, #0
    5224:	d1f9      	bne.n	521a <clock_async_start+0x1a>
	__asm__ volatile(
    5226:	f04f 0320 	mov.w	r3, #32
    522a:	f3ef 8011 	mrs	r0, BASEPRI
    522e:	f383 8811 	msr	BASEPRI, r3
    5232:	f3bf 8f6f 	isb	sy
	ref = ++clk_data->ref;
    5236:	210c      	movs	r1, #12
    5238:	4371      	muls	r1, r6
    523a:	eb0c 0301 	add.w	r3, ip, r1
    523e:	7a1c      	ldrb	r4, [r3, #8]
    5240:	3401      	adds	r4, #1
    5242:	b2e4      	uxtb	r4, r4
    5244:	721c      	strb	r4, [r3, #8]
	__asm__ volatile(
    5246:	f380 8811 	msr	BASEPRI, r0
    524a:	f3bf 8f6f 	isb	sy
	if (data) {
    524e:	b332      	cbz	r2, 529e <clock_async_start+0x9e>
    p_reg->INTENCLR = mask;
    5250:	f04f 4080 	mov.w	r0, #1073741824	; 0x40000000
    5254:	f04f 0e03 	mov.w	lr, #3
    5258:	f8c0 e308 	str.w	lr, [r0, #776]	; 0x308
		already_started = clk_data->started;
    525c:	7a58      	ldrb	r0, [r3, #9]
		if (!already_started) {
    525e:	b9a0      	cbnz	r0, 528a <clock_async_start+0x8a>
	__asm__ volatile(
    5260:	f04f 0e20 	mov.w	lr, #32
    5264:	f3ef 8811 	mrs	r8, BASEPRI
    5268:	f38e 8811 	msr	BASEPRI, lr
    526c:	f3bf 8f6f 	isb	sy
	parent->next = child;
    5270:	6010      	str	r0, [r2, #0]
Z_GENLIST_APPEND(slist, snode)
    5272:	f8d3 e004 	ldr.w	lr, [r3, #4]
    5276:	f1be 0f00 	cmp.w	lr, #0
    527a:	d11f      	bne.n	52bc <clock_async_start+0xbc>
	list->tail = node;
    527c:	605a      	str	r2, [r3, #4]
	list->head = node;
    527e:	f84c 2001 	str.w	r2, [ip, r1]
	__asm__ volatile(
    5282:	f388 8811 	msr	BASEPRI, r8
    5286:	f3bf 8f6f 	isb	sy
    p_reg->INTENSET = mask;
    528a:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    528e:	2103      	movs	r1, #3
    5290:	f8c3 1304 	str.w	r1, [r3, #772]	; 0x304
		if (already_started) {
    5294:	b118      	cbz	r0, 529e <clock_async_start+0x9e>
			data->cb(dev, data->user_data);
    5296:	e9d2 3101 	ldrd	r3, r1, [r2, #4]
    529a:	4628      	mov	r0, r5
    529c:	4798      	blx	r3
	if (ref == 1) {
    529e:	2c01      	cmp	r4, #1
    52a0:	d10a      	bne.n	52b8 <clock_async_start+0xb8>
		do_start =  (config->start_handler) ?
    52a2:	ea4f 1806 	mov.w	r8, r6, lsl #4
    52a6:	f857 3008 	ldr.w	r3, [r7, r8]
				config->start_handler(dev) : true;
    52aa:	b95b      	cbnz	r3, 52c4 <clock_async_start+0xc4>
			nrf_clock_task_trigger(NRF_CLOCK,
    52ac:	4447      	add	r7, r8
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    52ae:	2201      	movs	r2, #1
    52b0:	7abb      	ldrb	r3, [r7, #10]
    52b2:	f103 4380 	add.w	r3, r3, #1073741824	; 0x40000000
    52b6:	601a      	str	r2, [r3, #0]
	return 0;
    52b8:	2000      	movs	r0, #0
    52ba:	e00e      	b.n	52da <clock_async_start+0xda>
	parent->next = child;
    52bc:	f8ce 2000 	str.w	r2, [lr]
	list->tail = node;
    52c0:	605a      	str	r2, [r3, #4]
    52c2:	e7de      	b.n	5282 <clock_async_start+0x82>
				config->start_handler(dev) : true;
    52c4:	4628      	mov	r0, r5
    52c6:	4798      	blx	r3
    52c8:	2800      	cmp	r0, #0
    52ca:	d1ef      	bne.n	52ac <clock_async_start+0xac>
			clkstarted_handle(dev, type);
    52cc:	4631      	mov	r1, r6
    52ce:	4628      	mov	r0, r5
    52d0:	f7ff ff73 	bl	51ba <clkstarted_handle>
    52d4:	e7f0      	b.n	52b8 <clock_async_start+0xb8>
		return -EBUSY;
    52d6:	f06f 000f 	mvn.w	r0, #15
}
    52da:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}

000052de <clock_start>:
	return clock_async_start(dev, sub_system, NULL);
    52de:	2200      	movs	r2, #0
    52e0:	f7ff bf8e 	b.w	5200 <clock_async_start>

000052e4 <clk_init>:
	IRQ_CONNECT(DT_INST_0_NORDIC_NRF_CLOCK_IRQ_0,
    52e4:	2200      	movs	r2, #0
{
    52e6:	b510      	push	{r4, lr}
	IRQ_CONNECT(DT_INST_0_NORDIC_NRF_CLOCK_IRQ_0,
    52e8:	2101      	movs	r1, #1
{
    52ea:	4604      	mov	r4, r0
	IRQ_CONNECT(DT_INST_0_NORDIC_NRF_CLOCK_IRQ_0,
    52ec:	4610      	mov	r0, r2
    52ee:	f7fc fa31 	bl	1754 <z_arm_irq_priority_set>
	irq_enable(DT_INST_0_NORDIC_NRF_CLOCK_IRQ_0);
    52f2:	2000      	movs	r0, #0
    52f4:	f7fc fa1e 	bl	1734 <arch_irq_enable>
    return false;
}

NRF_STATIC_INLINE void nrf_clock_lf_src_set(NRF_CLOCK_Type * p_reg, nrf_clock_lfclk_t source)
{
    p_reg->LFCLKSRC = (uint32_t)(source);
    52f8:	f04f 4380 	mov.w	r3, #1073741824	; 0x40000000
    52fc:	2201      	movs	r2, #1
    52fe:	f8c3 2518 	str.w	r2, [r3, #1304]	; 0x518
    p_reg->INTENSET = mask;
    5302:	2203      	movs	r2, #3
    5304:	f8c3 2304 	str.w	r2, [r3, #772]	; 0x304
		sys_slist_init(&(get_sub_data(dev, i)->list));
    5308:	68a3      	ldr	r3, [r4, #8]
	list->head = NULL;
    530a:	2000      	movs	r0, #0
	list->tail = NULL;
    530c:	e9c3 0000 	strd	r0, r0, [r3]
    5310:	68a3      	ldr	r3, [r4, #8]
    5312:	e9c3 0003 	strd	r0, r0, [r3, #12]
}
    5316:	bd10      	pop	{r4, pc}

00005318 <clock_stop>:
	const struct nrf_clock_control_config *config =
    5318:	6802      	ldr	r2, [r0, #0]
{
    531a:	e92d 41f3 	stmdb	sp!, {r0, r1, r4, r5, r6, r7, r8, lr}
	const struct nrf_clock_control_config *config =
    531e:	f8d2 8008 	ldr.w	r8, [r2, #8]
	data = get_sub_data(dev, type);
    5322:	6887      	ldr	r7, [r0, #8]
    5324:	b2cc      	uxtb	r4, r1
	__asm__ volatile(
    5326:	f04f 0320 	mov.w	r3, #32
    532a:	f3ef 8611 	mrs	r6, BASEPRI
    532e:	f383 8811 	msr	BASEPRI, r3
    5332:	f3bf 8f6f 	isb	sy
	if (data->ref == 0) {
    5336:	220c      	movs	r2, #12
    5338:	4362      	muls	r2, r4
    533a:	18b9      	adds	r1, r7, r2
    533c:	7a0b      	ldrb	r3, [r1, #8]
    533e:	b343      	cbz	r3, 5392 <clock_stop+0x7a>
	data->ref--;
    5340:	3b01      	subs	r3, #1
    5342:	b2db      	uxtb	r3, r3
    5344:	720b      	strb	r3, [r1, #8]
	if (data->ref == 0) {
    5346:	bb3b      	cbnz	r3, 5398 <clock_stop+0x80>
		do_stop =  (config->stop_handler) ?
    5348:	0125      	lsls	r5, r4, #4
	list->head = NULL;
    534a:	50bb      	str	r3, [r7, r2]
	list->tail = NULL;
    534c:	604b      	str	r3, [r1, #4]
    534e:	eb08 0305 	add.w	r3, r8, r5
    5352:	685b      	ldr	r3, [r3, #4]
				config->stop_handler(dev) : true;
    5354:	b9cb      	cbnz	r3, 538a <clock_stop+0x72>
			nrf_clock_task_trigger(NRF_CLOCK, config->stop_tsk);
    5356:	4445      	add	r5, r8
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
    5358:	2201      	movs	r2, #1
    535a:	7aeb      	ldrb	r3, [r5, #11]
    535c:	f103 4380 	add.w	r3, r3, #1073741824	; 0x40000000
    5360:	601a      	str	r2, [r3, #0]
    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
    5362:	892b      	ldrh	r3, [r5, #8]
    5364:	f103 4380 	add.w	r3, r3, #1073741824	; 0x40000000
    5368:	2200      	movs	r2, #0
    536a:	601a      	str	r2, [r3, #0]
    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
    536c:	681b      	ldr	r3, [r3, #0]
    536e:	9301      	str	r3, [sp, #4]
    (void)dummy;
    5370:	9b01      	ldr	r3, [sp, #4]
		data->started = false;
    5372:	210c      	movs	r1, #12
    5374:	fb01 7404 	mla	r4, r1, r4, r7
    5378:	2000      	movs	r0, #0
    537a:	7260      	strb	r0, [r4, #9]
	__asm__ volatile(
    537c:	f386 8811 	msr	BASEPRI, r6
    5380:	f3bf 8f6f 	isb	sy
}
    5384:	b002      	add	sp, #8
    5386:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
				config->stop_handler(dev) : true;
    538a:	4798      	blx	r3
    538c:	2800      	cmp	r0, #0
    538e:	d1e2      	bne.n	5356 <clock_stop+0x3e>
    5390:	e7ef      	b.n	5372 <clock_stop+0x5a>
		err = -EALREADY;
    5392:	f06f 0044 	mvn.w	r0, #68	; 0x44
    5396:	e7f1      	b.n	537c <clock_stop+0x64>
	int err = 0;
    5398:	2000      	movs	r0, #0
    539a:	e7ef      	b.n	537c <clock_stop+0x64>

0000539c <wdt_nrf_disable>:
}
    539c:	f04f 30ff 	mov.w	r0, #4294967295
    53a0:	4770      	bx	lr

000053a2 <wdt_nrf_feed>:
{
    53a2:	b508      	push	{r3, lr}
	if (channel_id > get_dev_data(dev)->m_allocated_channels) {
    53a4:	6883      	ldr	r3, [r0, #8]
    53a6:	f893 3024 	ldrb.w	r3, [r3, #36]	; 0x24
    53aa:	428b      	cmp	r3, r1
    53ac:	db06      	blt.n	53bc <wdt_nrf_feed+0x1a>
	return dev->config->config_info;
    53ae:	6803      	ldr	r3, [r0, #0]
	nrfx_wdt_channel_feed(&get_dev_config(dev)->wdt,
    53b0:	b2c9      	uxtb	r1, r1
    53b2:	6898      	ldr	r0, [r3, #8]
    53b4:	f7fe f80c 	bl	33d0 <nrfx_wdt_channel_feed>
	return 0;
    53b8:	2000      	movs	r0, #0
}
    53ba:	bd08      	pop	{r3, pc}
		return -EINVAL;
    53bc:	f06f 0015 	mvn.w	r0, #21
    53c0:	e7fb      	b.n	53ba <wdt_nrf_feed+0x18>

000053c2 <wdt_nrf_setup>:
		behaviour &= ~NRF_WDT_BEHAVIOUR_RUN_SLEEP;
    53c2:	f011 0f01 	tst.w	r1, #1
{
    53c6:	b538      	push	{r3, r4, r5, lr}
		behaviour &= ~NRF_WDT_BEHAVIOUR_RUN_SLEEP;
    53c8:	bf0c      	ite	eq
    53ca:	2309      	moveq	r3, #9
    53cc:	2308      	movne	r3, #8
	if (options & WDT_OPT_PAUSE_HALTED_BY_DBG) {
    53ce:	078a      	lsls	r2, r1, #30
	return dev->config->config_info;
    53d0:	6802      	ldr	r2, [r0, #0]
    53d2:	6894      	ldr	r4, [r2, #8]
	nrf_wdt_behaviour_set(get_dev_config(dev)->wdt.p_reg, behaviour);
    53d4:	6825      	ldr	r5, [r4, #0]
		behaviour &= ~NRF_WDT_BEHAVIOUR_RUN_HALT;
    53d6:	bf48      	it	mi
    53d8:	f003 0301 	andmi.w	r3, r3, #1
    p_reg->CONFIG = behaviour;
    53dc:	f8c5 350c 	str.w	r3, [r5, #1292]	; 0x50c
		(uint32_t)(((uint64_t)get_dev_data(dev)->m_timeout * 32768U)
    53e0:	6883      	ldr	r3, [r0, #8]
    53e2:	6a19      	ldr	r1, [r3, #32]
			   / 1000));
    53e4:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
    53e8:	2300      	movs	r3, #0
    53ea:	03c8      	lsls	r0, r1, #15
    53ec:	0c49      	lsrs	r1, r1, #17
    53ee:	f7fa fe87 	bl	100 <__aeabi_uldivmod>
    p_reg->CRV = reload_value;
    53f2:	f8c5 0504 	str.w	r0, [r5, #1284]	; 0x504
	nrfx_wdt_enable(&get_dev_config(dev)->wdt);
    53f6:	4620      	mov	r0, r4
    53f8:	f7fd ffb4 	bl	3364 <nrfx_wdt_enable>
}
    53fc:	2000      	movs	r0, #0
    53fe:	bd38      	pop	{r3, r4, r5, pc}

00005400 <z_clock_isr>:
/* Weak-linked noop defaults for optional driver interfaces: */

void __weak z_clock_isr(void *arg)
{
	__ASSERT_NO_MSG(false);
}
    5400:	4770      	bx	lr

00005402 <z_clock_idle_exit>:
{
}

void __weak z_clock_idle_exit(void)
{
}
    5402:	4770      	bx	lr

00005404 <SEGGER_RTT_Init>:
*    Initializes the RTT Control Block.
*    Should be used in RAM targets, at start of the application.
*
*/
void SEGGER_RTT_Init (void) {
  _DoInit();
    5404:	f7fc b818 	b.w	1438 <_DoInit>

00005408 <rtt_init>:
 */

K_MUTEX_DEFINE(rtt_term_mutex);

static int rtt_init(struct device *unused)
{
    5408:	b508      	push	{r3, lr}
	ARG_UNUSED(unused);

	SEGGER_RTT_Init();
    540a:	f7ff fffb 	bl	5404 <SEGGER_RTT_Init>

	return 0;
}
    540e:	2000      	movs	r0, #0
    5410:	bd08      	pop	{r3, pc}

00005412 <abort_function>:
	while(1);
    5412:	e7fe      	b.n	5412 <abort_function>

00005414 <z_irq_spurious>:
 * @return N/A
 */
void z_irq_spurious(void *unused)
{
	ARG_UNUSED(unused);
	z_arm_reserved();
    5414:	f7fc ba02 	b.w	181c <z_arm_bus_fault>

00005418 <z_do_kernel_oops>:
 *   fault handler will executed insted of the SVC.
 *
 * @param esf exception frame
 */
void z_do_kernel_oops(const z_arch_esf_t *esf)
{
    5418:	4601      	mov	r1, r0
			reason = K_ERR_KERNEL_OOPS;
		}
	}

#endif /* CONFIG_USERSPACE */
	z_arm_fatal_error(reason, esf);
    541a:	6800      	ldr	r0, [r0, #0]
    541c:	f7fc ba08 	b.w	1830 <z_arm_fatal_error>

00005420 <z_arm_nmi>:
 *
 * @return N/A
 */

void z_arm_nmi(void)
{
    5420:	b508      	push	{r3, lr}
	handler();
    5422:	f7fc fa57 	bl	18d4 <z_SysNmiOnReset>
	z_arm_exc_exit();
}
    5426:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
	z_arm_exc_exit();
    542a:	f7fc b921 	b.w	1670 <z_arm_exc_exit>

0000542e <z_arm_configure_dynamic_mpu_regions>:
 *
 * For some MPU architectures, such as the unmodified ARMv8-M MPU,
 * the function must execute with MPU enabled.
 */
void z_arm_configure_dynamic_mpu_regions(struct k_thread *thread)
{
    542e:	b507      	push	{r0, r1, r2, lr}

	region_num++;
#endif /* CONFIG_MPU_STACK_GUARD */

	/* Configure the dynamic MPU regions */
	arm_core_mpu_configure_dynamic_mpu_regions(
    5430:	2100      	movs	r1, #0
    5432:	a801      	add	r0, sp, #4
    5434:	f7fc fe30 	bl	2098 <arm_core_mpu_configure_dynamic_mpu_regions>
		(const struct k_mem_partition **)dynamic_regions,
		region_num);
}
    5438:	b003      	add	sp, #12
    543a:	f85d fb04 	ldr.w	pc, [sp], #4

0000543e <strcpy>:

char *strcpy(char *_MLIBC_RESTRICT d, const char *_MLIBC_RESTRICT s)
{
	char *dest = d;

	while (*s != '\0') {
    543e:	3901      	subs	r1, #1
    5440:	4603      	mov	r3, r0
    5442:	f811 2f01 	ldrb.w	r2, [r1, #1]!
    5446:	b90a      	cbnz	r2, 544c <strcpy+0xe>
		*d = *s;
		d++;
		s++;
	}

	*d = '\0';
    5448:	701a      	strb	r2, [r3, #0]

	return dest;
}
    544a:	4770      	bx	lr
		*d = *s;
    544c:	f803 2b01 	strb.w	r2, [r3], #1
		s++;
    5450:	e7f7      	b.n	5442 <strcpy+0x4>

00005452 <strncpy>:
 *
 * @return pointer to destination buffer <d>
 */

char *strncpy(char *_MLIBC_RESTRICT d, const char *_MLIBC_RESTRICT s, size_t n)
{
    5452:	b570      	push	{r4, r5, r6, lr}
    5454:	3901      	subs	r1, #1
    5456:	4605      	mov	r5, r0
    5458:	462c      	mov	r4, r5
	char *dest = d;

	while ((n > 0) && *s != '\0') {
    545a:	b142      	cbz	r2, 546e <strncpy+0x1c>
    545c:	f811 3f01 	ldrb.w	r3, [r1, #1]!
    5460:	1e56      	subs	r6, r2, #1
    5462:	b92b      	cbnz	r3, 5470 <strncpy+0x1e>
    5464:	442a      	add	r2, r5
		d++;
		n--;
	}

	while (n > 0) {
		*d = '\0';
    5466:	f804 3b01 	strb.w	r3, [r4], #1
	while (n > 0) {
    546a:	42a2      	cmp	r2, r4
    546c:	d1fb      	bne.n	5466 <strncpy+0x14>
		d++;
		n--;
	}

	return dest;
}
    546e:	bd70      	pop	{r4, r5, r6, pc}
		*d = *s;
    5470:	f805 3b01 	strb.w	r3, [r5], #1
		n--;
    5474:	4632      	mov	r2, r6
    5476:	e7ef      	b.n	5458 <strncpy+0x6>

00005478 <strchr>:
 * @return pointer to 1st instance of found byte, or NULL if not found
 */

char *strchr(const char *s, int c)
{
	char tmp = (char) c;
    5478:	b2c9      	uxtb	r1, r1

	while ((*s != tmp) && (*s != '\0')) {
    547a:	7802      	ldrb	r2, [r0, #0]
    547c:	428a      	cmp	r2, r1
    547e:	4603      	mov	r3, r0
    5480:	f100 0001 	add.w	r0, r0, #1
    5484:	d004      	beq.n	5490 <strchr+0x18>
    5486:	2a00      	cmp	r2, #0
    5488:	d1f7      	bne.n	547a <strchr+0x2>
		s++;
	}

	return (*s == tmp) ? (char *) s : NULL;
    548a:	2900      	cmp	r1, #0
    548c:	bf18      	it	ne
    548e:	2300      	movne	r3, #0
}
    5490:	4618      	mov	r0, r3
    5492:	4770      	bx	lr

00005494 <strcmp>:
 * @return negative # if <s1> < <s2>, 0 if <s1> == <s2>, else positive #
 */

int strcmp(const char *s1, const char *s2)
{
	while ((*s1 == *s2) && (*s1 != '\0')) {
    5494:	3801      	subs	r0, #1
    5496:	3901      	subs	r1, #1
    5498:	f810 3f01 	ldrb.w	r3, [r0, #1]!
    549c:	f811 2f01 	ldrb.w	r2, [r1, #1]!
    54a0:	4293      	cmp	r3, r2
    54a2:	d101      	bne.n	54a8 <strcmp+0x14>
    54a4:	2b00      	cmp	r3, #0
    54a6:	d1f7      	bne.n	5498 <strcmp+0x4>
		s1++;
		s2++;
	}

	return *s1 - *s2;
}
    54a8:	1a98      	subs	r0, r3, r2
    54aa:	4770      	bx	lr

000054ac <memcpy>:
 *
 * @return pointer to start of destination buffer
 */

void *memcpy(void *_MLIBC_RESTRICT d, const void *_MLIBC_RESTRICT s, size_t n)
{
    54ac:	b5f0      	push	{r4, r5, r6, r7, lr}

	unsigned char *d_byte = (unsigned char *)d;
	const unsigned char *s_byte = (const unsigned char *)s;
	const uintptr_t mask = sizeof(mem_word_t) - 1;

	if ((((uintptr_t)d ^ (uintptr_t)s_byte) & mask) == 0) {
    54ae:	ea81 0400 	eor.w	r4, r1, r0
    54b2:	07a5      	lsls	r5, r4, #30
    54b4:	4603      	mov	r3, r0
    54b6:	d00b      	beq.n	54d0 <memcpy+0x24>
    54b8:	3b01      	subs	r3, #1
    54ba:	440a      	add	r2, r1
		s_byte = (unsigned char *)s_word;
	}

	/* do byte-sized copying until finished */

	while (n > 0) {
    54bc:	4291      	cmp	r1, r2
    54be:	d11a      	bne.n	54f6 <memcpy+0x4a>
		*(d_byte++) = *(s_byte++);
		n--;
	}

	return d;
}
    54c0:	bdf0      	pop	{r4, r5, r6, r7, pc}
			if (n == 0) {
    54c2:	2a00      	cmp	r2, #0
    54c4:	d0fc      	beq.n	54c0 <memcpy+0x14>
			*(d_byte++) = *(s_byte++);
    54c6:	f811 4b01 	ldrb.w	r4, [r1], #1
    54ca:	f803 4b01 	strb.w	r4, [r3], #1
			n--;
    54ce:	3a01      	subs	r2, #1
		while (((uintptr_t)d_byte) & mask) {
    54d0:	079c      	lsls	r4, r3, #30
    54d2:	d1f6      	bne.n	54c2 <memcpy+0x16>
    54d4:	0895      	lsrs	r5, r2, #2
    54d6:	00ac      	lsls	r4, r5, #2
    54d8:	1f1e      	subs	r6, r3, #4
    54da:	190f      	adds	r7, r1, r4
		while (n >= sizeof(mem_word_t)) {
    54dc:	42b9      	cmp	r1, r7
    54de:	d105      	bne.n	54ec <memcpy+0x40>
    54e0:	f06f 0603 	mvn.w	r6, #3
    54e4:	fb06 2205 	mla	r2, r6, r5, r2
    54e8:	4423      	add	r3, r4
    54ea:	e7e5      	b.n	54b8 <memcpy+0xc>
			*(d_word++) = *(s_word++);
    54ec:	f851 cb04 	ldr.w	ip, [r1], #4
    54f0:	f846 cf04 	str.w	ip, [r6, #4]!
			n -= sizeof(mem_word_t);
    54f4:	e7f2      	b.n	54dc <memcpy+0x30>
		*(d_byte++) = *(s_byte++);
    54f6:	f811 4b01 	ldrb.w	r4, [r1], #1
    54fa:	f803 4f01 	strb.w	r4, [r3, #1]!
		n--;
    54fe:	e7dd      	b.n	54bc <memcpy+0x10>

00005500 <memset>:
 *
 * @return pointer to start of buffer
 */

void *memset(void *buf, int c, size_t n)
{
    5500:	b570      	push	{r4, r5, r6, lr}
	/* do byte-sized initialization until word-aligned or finished */

	unsigned char *d_byte = (unsigned char *)buf;
	unsigned char c_byte = (unsigned char)c;
    5502:	b2c9      	uxtb	r1, r1
	unsigned char *d_byte = (unsigned char *)buf;
    5504:	4603      	mov	r3, r0

	while (((uintptr_t)d_byte) & (sizeof(mem_word_t) - 1)) {
    5506:	079c      	lsls	r4, r3, #30
    5508:	d110      	bne.n	552c <memset+0x2c>
	/* do word-sized initialization as long as possible */

	mem_word_t *d_word = (mem_word_t *)d_byte;
	mem_word_t c_word = (mem_word_t)c_byte;

	c_word |= c_word << 8;
    550a:	ea41 2401 	orr.w	r4, r1, r1, lsl #8
	c_word |= c_word << 16;
    550e:	ea44 4504 	orr.w	r5, r4, r4, lsl #16
#if Z_MEM_WORD_T_WIDTH > 32
	c_word |= c_word << 32;
#endif

	while (n >= sizeof(mem_word_t)) {
    5512:	0894      	lsrs	r4, r2, #2
    5514:	eb03 0684 	add.w	r6, r3, r4, lsl #2
    5518:	42b3      	cmp	r3, r6
    551a:	d10d      	bne.n	5538 <memset+0x38>
    551c:	f06f 0503 	mvn.w	r5, #3
    5520:	fb05 2404 	mla	r4, r5, r4, r2
    5524:	441c      	add	r4, r3

	/* do byte-sized initialization until finished */

	d_byte = (unsigned char *)d_word;

	while (n > 0) {
    5526:	42a3      	cmp	r3, r4
    5528:	d109      	bne.n	553e <memset+0x3e>
		*(d_byte++) = c_byte;
		n--;
	}

	return buf;
}
    552a:	bd70      	pop	{r4, r5, r6, pc}
		if (n == 0) {
    552c:	2a00      	cmp	r2, #0
    552e:	d0fc      	beq.n	552a <memset+0x2a>
		*(d_byte++) = c_byte;
    5530:	f803 1b01 	strb.w	r1, [r3], #1
		n--;
    5534:	3a01      	subs	r2, #1
    5536:	e7e6      	b.n	5506 <memset+0x6>
		*(d_word++) = c_word;
    5538:	f843 5b04 	str.w	r5, [r3], #4
		n -= sizeof(mem_word_t);
    553c:	e7ec      	b.n	5518 <memset+0x18>
		*(d_byte++) = c_byte;
    553e:	f803 1b01 	strb.w	r1, [r3], #1
		n--;
    5542:	e7f0      	b.n	5526 <memset+0x26>

00005544 <_to_x>:
{
    5544:	b5f0      	push	{r4, r5, r6, r7, lr}
    5546:	4603      	mov	r3, r0
		unsigned int d = n % base;
    5548:	fbb1 f7f2 	udiv	r7, r1, r2
    554c:	fb02 1517 	mls	r5, r2, r7, r1
		*buf++ = '0' + d + (d > 9 ? ('a' - '0' - 10) : 0);
    5550:	2d09      	cmp	r5, #9
    5552:	bf8c      	ite	hi
    5554:	2627      	movhi	r6, #39	; 0x27
    5556:	2600      	movls	r6, #0
    5558:	461c      	mov	r4, r3
    555a:	3530      	adds	r5, #48	; 0x30
    555c:	4435      	add	r5, r6
	} while (n);
    555e:	4291      	cmp	r1, r2
		*buf++ = '0' + d + (d > 9 ? ('a' - '0' - 10) : 0);
    5560:	f804 5b01 	strb.w	r5, [r4], #1
	} while (n);
    5564:	d206      	bcs.n	5574 <_to_x+0x30>
	*buf = 0;
    5566:	2200      	movs	r2, #0
    5568:	7022      	strb	r2, [r4, #0]
	len = buf - start;
    556a:	1a24      	subs	r4, r4, r0
	for (buf--; buf > start; buf--, start++) {
    556c:	4283      	cmp	r3, r0
    556e:	d804      	bhi.n	557a <_to_x+0x36>
}
    5570:	4620      	mov	r0, r4
    5572:	bdf0      	pop	{r4, r5, r6, r7, pc}
		n /= base;
    5574:	4639      	mov	r1, r7
    5576:	4623      	mov	r3, r4
    5578:	e7e6      	b.n	5548 <_to_x+0x4>
		char tmp = *buf;
    557a:	781a      	ldrb	r2, [r3, #0]
		*buf = *start;
    557c:	7801      	ldrb	r1, [r0, #0]
    557e:	f803 1901 	strb.w	r1, [r3], #-1
		*start = tmp;
    5582:	f800 2b01 	strb.w	r2, [r0], #1
    5586:	e7f1      	b.n	556c <_to_x+0x28>

00005588 <_rlrshift>:
{
    5588:	b570      	push	{r4, r5, r6, lr}
	*v = (*v & 1) + (*v >> 1);
    558a:	e9d0 6500 	ldrd	r6, r5, [r0]
    558e:	0872      	lsrs	r2, r6, #1
    5590:	f006 0301 	and.w	r3, r6, #1
    5594:	ea42 72c5 	orr.w	r2, r2, r5, lsl #31
    5598:	189b      	adds	r3, r3, r2
    559a:	f04f 0100 	mov.w	r1, #0
    559e:	ea4f 0455 	mov.w	r4, r5, lsr #1
    55a2:	eb44 0101 	adc.w	r1, r4, r1
    55a6:	e9c0 3100 	strd	r3, r1, [r0]
}
    55aa:	bd70      	pop	{r4, r5, r6, pc}

000055ac <_ldiv5>:
	uint64_t rem = *v, quot = 0U, q;
    55ac:	e9d0 3200 	ldrd	r3, r2, [r0]
{
    55b0:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
	rem += 2U;
    55b4:	3302      	adds	r3, #2
		q = (uint64_t)(hi / 5U) << shifts[i];
    55b6:	f04f 0705 	mov.w	r7, #5
    55ba:	f04f 0c00 	mov.w	ip, #0
	rem += 2U;
    55be:	f142 0200 	adc.w	r2, r2, #0
		rem -= q * 5U;
    55c2:	ebb3 060c 	subs.w	r6, r3, ip
		q = (uint64_t)(hi / 5U) << shifts[i];
    55c6:	fbb2 fef7 	udiv	lr, r2, r7
		rem -= q * 5U;
    55ca:	fb07 f10e 	mul.w	r1, r7, lr
    55ce:	eb62 0101 	sbc.w	r1, r2, r1
		hi = rem >> shifts[i];
    55d2:	08f2      	lsrs	r2, r6, #3
    55d4:	ea42 7241 	orr.w	r2, r2, r1, lsl #29
		q = (uint64_t)(hi / 5U) << shifts[i];
    55d8:	fbb2 f1f7 	udiv	r1, r2, r7
    55dc:	00ca      	lsls	r2, r1, #3
		quot += q;
    55de:	eb1c 0802 	adds.w	r8, ip, r2
		q = (uint64_t)(hi / 5U) << shifts[i];
    55e2:	ea4f 7351 	mov.w	r3, r1, lsr #29
		quot += q;
    55e6:	eb4e 0903 	adc.w	r9, lr, r3
		rem -= q * 5U;
    55ea:	fba2 2307 	umull	r2, r3, r2, r7
    55ee:	1ab3      	subs	r3, r6, r2
		q = (uint64_t)(hi / 5U) << shifts[i];
    55f0:	fbb3 f3f7 	udiv	r3, r3, r7
		quot += q;
    55f4:	eb18 0403 	adds.w	r4, r8, r3
    55f8:	f149 0500 	adc.w	r5, r9, #0
	*v = quot;
    55fc:	e9c0 4500 	strd	r4, r5, [r0]
}
    5600:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}

00005604 <_get_digit>:
	if (*digit_count > 0) {
    5604:	680b      	ldr	r3, [r1, #0]
    5606:	2b00      	cmp	r3, #0
{
    5608:	b570      	push	{r4, r5, r6, lr}
	if (*digit_count > 0) {
    560a:	dd10      	ble.n	562e <_get_digit+0x2a>
		*digit_count -= 1;
    560c:	3b01      	subs	r3, #1
		*fr = *fr * 10U;
    560e:	6802      	ldr	r2, [r0, #0]
		*digit_count -= 1;
    5610:	600b      	str	r3, [r1, #0]
		*fr = *fr * 10U;
    5612:	6844      	ldr	r4, [r0, #4]
    5614:	210a      	movs	r1, #10
    5616:	fba2 5601 	umull	r5, r6, r2, r1
    561a:	fb01 6604 	mla	r6, r1, r4, r6
		*fr &= 0x0FFFFFFFFFFFFFFFull;
    561e:	f026 4370 	bic.w	r3, r6, #4026531840	; 0xf0000000
    5622:	e9c0 5300 	strd	r5, r3, [r0]
		rval = ((*fr >> 60) & 0xF) + '0';
    5626:	0f31      	lsrs	r1, r6, #28
    5628:	3130      	adds	r1, #48	; 0x30
}
    562a:	4608      	mov	r0, r1
    562c:	bd70      	pop	{r4, r5, r6, pc}
		rval = '0';
    562e:	2130      	movs	r1, #48	; 0x30
    5630:	e7fb      	b.n	562a <_get_digit+0x26>

00005632 <_stdout_hook_default>:
}
    5632:	f04f 30ff 	mov.w	r0, #4294967295
    5636:	4770      	bx	lr

00005638 <sprintf_out>:
	if (p->len > 1) { /* need to reserve a byte for EOS */
    5638:	684b      	ldr	r3, [r1, #4]
    563a:	2b01      	cmp	r3, #1
    563c:	dd07      	ble.n	564e <sprintf_out+0x16>
		*(p->ptr) = c;
    563e:	680b      	ldr	r3, [r1, #0]
    5640:	7018      	strb	r0, [r3, #0]
		p->ptr += 1;
    5642:	680b      	ldr	r3, [r1, #0]
    5644:	3301      	adds	r3, #1
    5646:	600b      	str	r3, [r1, #0]
		p->len -= 1;
    5648:	684b      	ldr	r3, [r1, #4]
    564a:	3b01      	subs	r3, #1
    564c:	604b      	str	r3, [r1, #4]
}
    564e:	2000      	movs	r0, #0
    5650:	4770      	bx	lr

00005652 <z_platform_init>:

void z_platform_init(void)
{
	SystemInit();
    5652:	f7fd bd7f 	b.w	3154 <SystemInit>

00005656 <gpio_nrfx_write>:
{
    5656:	b510      	push	{r4, lr}
	return port->config->config_info;
    5658:	6804      	ldr	r4, [r0, #0]
    565a:	6880      	ldr	r0, [r0, #8]
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    565c:	68a4      	ldr	r4, [r4, #8]
    565e:	69c0      	ldr	r0, [r0, #28]
    5660:	6824      	ldr	r4, [r4, #0]
	if (access_op == GPIO_ACCESS_BY_PORT) {
    5662:	2901      	cmp	r1, #1
    5664:	d104      	bne.n	5670 <gpio_nrfx_write+0x1a>
		nrf_gpio_port_out_write(reg, value ^ data->inverted);
    5666:	4058      	eors	r0, r3
    p_reg->OUT = value;
    5668:	f8c4 0504 	str.w	r0, [r4, #1284]	; 0x504
}
    566c:	2000      	movs	r0, #0
    566e:	bd10      	pop	{r4, pc}
		if ((value > 0) ^ ((BIT(pin) & data->inverted) != 0)) {
    5670:	3300      	adds	r3, #0
    5672:	fa20 f002 	lsr.w	r0, r0, r2
    5676:	f04f 0101 	mov.w	r1, #1
    567a:	bf18      	it	ne
    567c:	2301      	movne	r3, #1
    567e:	f000 0001 	and.w	r0, r0, #1
    5682:	4091      	lsls	r1, r2
    5684:	4283      	cmp	r3, r0
    p_reg->OUTSET = set_mask;
    5686:	bf14      	ite	ne
    5688:	f8c4 1508 	strne.w	r1, [r4, #1288]	; 0x508
}


NRF_STATIC_INLINE void nrf_gpio_port_out_clear(NRF_GPIO_Type * p_reg, uint32_t clr_mask)
{
    p_reg->OUTCLR = clr_mask;
    568c:	f8c4 150c 	streq.w	r1, [r4, #1292]	; 0x50c
    5690:	e7ec      	b.n	566c <gpio_nrfx_write+0x16>

00005692 <gpio_nrfx_read>:
{
    5692:	b570      	push	{r4, r5, r6, lr}
	return port->config->config_info;
    5694:	6804      	ldr	r4, [r0, #0]
	u32_t port_val = (port_in | port_out) ^ data->inverted;
    5696:	6880      	ldr	r0, [r0, #8]
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    5698:	68a4      	ldr	r4, [r4, #8]
	u32_t port_val = (port_in | port_out) ^ data->inverted;
    569a:	69c0      	ldr	r0, [r0, #28]
	NRF_GPIO_Type *reg = get_port_cfg(port)->port;
    569c:	6825      	ldr	r5, [r4, #0]
    return p_reg->DIR;
    569e:	f8d5 6514 	ldr.w	r6, [r5, #1300]	; 0x514
    return p_reg->IN;
    56a2:	f8d5 4510 	ldr.w	r4, [r5, #1296]	; 0x510
    return p_reg->OUT;
    56a6:	f8d5 5504 	ldr.w	r5, [r5, #1284]	; 0x504
	u32_t port_val = (port_in | port_out) ^ data->inverted;
    56aa:	4060      	eors	r0, r4
    56ac:	406c      	eors	r4, r5
    56ae:	4034      	ands	r4, r6
    56b0:	4060      	eors	r0, r4
	if (access_op == GPIO_ACCESS_BY_PORT) {
    56b2:	2901      	cmp	r1, #1
		*value = (port_val & BIT(pin)) ? 1 : 0;
    56b4:	bf1c      	itt	ne
    56b6:	40d0      	lsrne	r0, r2
    56b8:	f000 0001 	andne.w	r0, r0, #1
    56bc:	6018      	str	r0, [r3, #0]
}
    56be:	2000      	movs	r0, #0
    56c0:	bd70      	pop	{r4, r5, r6, pc}

000056c2 <gpio_nrfx_manage_callback>:
	return gpio_manage_callback(&get_port_data(port)->callbacks,
    56c2:	6883      	ldr	r3, [r0, #8]
Z_GENLIST_IS_EMPTY(slist)
    56c4:	6818      	ldr	r0, [r3, #0]
{
    56c6:	b530      	push	{r4, r5, lr}
					bool set)
{
	__ASSERT(callback, "No callback!");
	__ASSERT(callback->handler, "No callback handler!");

	if (!sys_slist_is_empty(callbacks)) {
    56c8:	b158      	cbz	r0, 56e2 <gpio_nrfx_manage_callback+0x20>
 * @return true if node was removed
 */
static inline bool sys_slist_find_and_remove(sys_slist_t *list,
					     sys_snode_t *node);

Z_GENLIST_FIND_AND_REMOVE(slist, snode)
    56ca:	2400      	movs	r4, #0
    56cc:	4281      	cmp	r1, r0
    56ce:	d113      	bne.n	56f8 <gpio_nrfx_manage_callback+0x36>
Z_GENLIST_REMOVE(slist, snode)
    56d0:	6808      	ldr	r0, [r1, #0]
    56d2:	b95c      	cbnz	r4, 56ec <gpio_nrfx_manage_callback+0x2a>
    56d4:	685c      	ldr	r4, [r3, #4]
	list->head = node;
    56d6:	6018      	str	r0, [r3, #0]
Z_GENLIST_REMOVE(slist, snode)
    56d8:	42a1      	cmp	r1, r4
    56da:	d100      	bne.n	56de <gpio_nrfx_manage_callback+0x1c>
	list->tail = node;
    56dc:	6058      	str	r0, [r3, #4]
	parent->next = child;
    56de:	2000      	movs	r0, #0
    56e0:	6008      	str	r0, [r1, #0]
				return -EINVAL;
			}
		}
	}

	if (set) {
    56e2:	b972      	cbnz	r2, 5702 <gpio_nrfx_manage_callback+0x40>
		sys_slist_prepend(callbacks, &callback->node);
	}

	return 0;
    56e4:	2000      	movs	r0, #0
}
    56e6:	bd30      	pop	{r4, r5, pc}
Z_GENLIST_FIND_AND_REMOVE(slist, snode)
    56e8:	4628      	mov	r0, r5
    56ea:	e7ef      	b.n	56cc <gpio_nrfx_manage_callback+0xa>
	parent->next = child;
    56ec:	6020      	str	r0, [r4, #0]
Z_GENLIST_REMOVE(slist, snode)
    56ee:	6858      	ldr	r0, [r3, #4]
    56f0:	4281      	cmp	r1, r0
	list->tail = node;
    56f2:	bf08      	it	eq
    56f4:	605c      	streq	r4, [r3, #4]
    56f6:	e7f2      	b.n	56de <gpio_nrfx_manage_callback+0x1c>
Z_GENLIST_PEEK_NEXT_NO_CHECK(slist, snode)
    56f8:	6805      	ldr	r5, [r0, #0]
	return node->next;
    56fa:	4604      	mov	r4, r0
Z_GENLIST_FIND_AND_REMOVE(slist, snode)
    56fc:	2d00      	cmp	r5, #0
    56fe:	d1f3      	bne.n	56e8 <gpio_nrfx_manage_callback+0x26>
			if (!set) {
    5700:	b13a      	cbz	r2, 5712 <gpio_nrfx_manage_callback+0x50>
Z_GENLIST_PREPEND(slist, snode)
    5702:	681a      	ldr	r2, [r3, #0]
	parent->next = child;
    5704:	600a      	str	r2, [r1, #0]
Z_GENLIST_PREPEND(slist, snode)
    5706:	6858      	ldr	r0, [r3, #4]
	list->head = node;
    5708:	6019      	str	r1, [r3, #0]
Z_GENLIST_PREPEND(slist, snode)
    570a:	2800      	cmp	r0, #0
    570c:	d1ea      	bne.n	56e4 <gpio_nrfx_manage_callback+0x22>
	list->tail = node;
    570e:	6059      	str	r1, [r3, #4]
    5710:	e7e9      	b.n	56e6 <gpio_nrfx_manage_callback+0x24>
				return -EINVAL;
    5712:	f06f 0015 	mvn.w	r0, #21
	return gpio_manage_callback(&get_port_data(port)->callbacks,
    5716:	e7e6      	b.n	56e6 <gpio_nrfx_manage_callback+0x24>

00005718 <fire_callbacks>:
{
    5718:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
	struct gpio_nrfx_data *data = get_port_data(port);
    571a:	6885      	ldr	r5, [r0, #8]
{
    571c:	460f      	mov	r7, r1
	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(list, cb, tmp, node) {
    571e:	6829      	ldr	r1, [r5, #0]
{
    5720:	4606      	mov	r6, r0
	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(list, cb, tmp, node) {
    5722:	b169      	cbz	r1, 5740 <fire_callbacks+0x28>
Z_GENLIST_PEEK_NEXT_NO_CHECK(slist, snode)
    5724:	680c      	ldr	r4, [r1, #0]
		if ((cb->pin_mask & pins) & data->int_en) {
    5726:	68eb      	ldr	r3, [r5, #12]
    5728:	688a      	ldr	r2, [r1, #8]
    572a:	403b      	ands	r3, r7
    572c:	4213      	tst	r3, r2
    572e:	d003      	beq.n	5738 <fire_callbacks+0x20>
			cb->handler(port, cb, pins);
    5730:	684b      	ldr	r3, [r1, #4]
    5732:	463a      	mov	r2, r7
    5734:	4630      	mov	r0, r6
    5736:	4798      	blx	r3
	SYS_SLIST_FOR_EACH_CONTAINER_SAFE(list, cb, tmp, node) {
    5738:	b114      	cbz	r4, 5740 <fire_callbacks+0x28>
    573a:	4621      	mov	r1, r4
    573c:	6824      	ldr	r4, [r4, #0]
    573e:	e7f2      	b.n	5726 <fire_callbacks+0xe>
}
    5740:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}

00005742 <check_level_trigger_pins>:
	struct gpio_nrfx_data *data = get_port_data(port);
    5742:	6883      	ldr	r3, [r0, #8]
	return port->config->config_info;
    5744:	6802      	ldr	r2, [r0, #0]
{
    5746:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
	return port->config->config_info;
    574a:	f8d2 8008 	ldr.w	r8, [r2, #8]
	u32_t pin_states = ~(port_in ^ data->inverted ^ data->active_level);
    574e:	69dd      	ldr	r5, [r3, #28]
	u32_t out = data->int_en & data->pin_int_en;
    5750:	e9d3 2402 	ldrd	r2, r4, [r3, #8]
    5754:	4014      	ands	r4, r2
	out &= ~data->trig_edge & ~data->double_edge;
    5756:	e9d3 2105 	ldrd	r2, r1, [r3, #20]
    575a:	430a      	orrs	r2, r1
    575c:	ea24 0402 	bic.w	r4, r4, r2
	u32_t port_in = nrf_gpio_port_in_read(cfg->port);
    5760:	f8d8 2000 	ldr.w	r2, [r8]
	u32_t pin_states = ~(port_in ^ data->inverted ^ data->active_level);
    5764:	691b      	ldr	r3, [r3, #16]
    return p_reg->IN;
    5766:	f8d2 2510 	ldr.w	r2, [r2, #1296]	; 0x510
    576a:	405d      	eors	r5, r3
    576c:	4055      	eors	r5, r2
	u32_t out = pin_states & level_pins;
    576e:	ea24 0505 	bic.w	r5, r4, r5
	u32_t bit = 1U << pin;
    5772:	2601      	movs	r6, #1
	u32_t pin = 0U;
    5774:	2700      	movs	r7, #0
	while (level_pins) {
    5776:	b914      	cbnz	r4, 577e <check_level_trigger_pins+0x3c>
}
    5778:	4628      	mov	r0, r5
    577a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
		if (level_pins & bit) {
    577e:	4234      	tst	r4, r6
    5780:	d00a      	beq.n	5798 <check_level_trigger_pins+0x56>
			u32_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
    5782:	f898 3004 	ldrb.w	r3, [r8, #4]
    5786:	f007 001f 	and.w	r0, r7, #31
			nrf_gpio_cfg_sense_set(abs_pin, NRF_GPIO_PIN_NOSENSE);
    578a:	2100      	movs	r1, #0
    578c:	ea40 1043 	orr.w	r0, r0, r3, lsl #5
    5790:	f7fd f9c6 	bl	2b20 <nrf_gpio_cfg_sense_set>
			level_pins &= ~bit;
    5794:	ea24 0406 	bic.w	r4, r4, r6
		++pin;
    5798:	3701      	adds	r7, #1
		bit <<= 1;
    579a:	0076      	lsls	r6, r6, #1
    579c:	e7eb      	b.n	5776 <check_level_trigger_pins+0x34>

0000579e <gpio_nrfx_pin_disable_callback>:
	if (access_op == GPIO_ACCESS_BY_PORT) {
    579e:	2901      	cmp	r1, #1
{
    57a0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
		from_pin = pin;
    57a4:	bf18      	it	ne
    57a6:	b2d4      	uxtbne	r4, r2
	struct gpio_nrfx_data *data = get_port_data(port);
    57a8:	6887      	ldr	r7, [r0, #8]
{
    57aa:	4606      	mov	r6, r0
		to_pin   = pin;
    57ac:	bf12      	itee	ne
    57ae:	4625      	movne	r5, r4
		to_pin   = 31U;
    57b0:	251f      	moveq	r5, #31
		from_pin = 0U;
    57b2:	2400      	moveq	r4, #0
		WRITE_BIT(data->int_en, curr_pin, enable);
    57b4:	f04f 0801 	mov.w	r8, #1
	for (u8_t curr_pin = from_pin; curr_pin <= to_pin; ++curr_pin) {
    57b8:	42ac      	cmp	r4, r5
    57ba:	d902      	bls.n	57c2 <gpio_nrfx_pin_disable_callback+0x24>
	return res;
    57bc:	2000      	movs	r0, #0
}
    57be:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
		WRITE_BIT(data->int_en, curr_pin, enable);
    57c2:	68fb      	ldr	r3, [r7, #12]
    57c4:	fa08 f204 	lsl.w	r2, r8, r4
    57c8:	ea23 0302 	bic.w	r3, r3, r2
    57cc:	60fb      	str	r3, [r7, #12]
		res = gpiote_pin_int_cfg(port, curr_pin);
    57ce:	4621      	mov	r1, r4
    57d0:	4630      	mov	r0, r6
    57d2:	f7fd f9b9 	bl	2b48 <gpiote_pin_int_cfg>
		if (res != 0) {
    57d6:	2800      	cmp	r0, #0
    57d8:	d1f1      	bne.n	57be <gpio_nrfx_pin_disable_callback+0x20>
	for (u8_t curr_pin = from_pin; curr_pin <= to_pin; ++curr_pin) {
    57da:	3401      	adds	r4, #1
    57dc:	b2e4      	uxtb	r4, r4
    57de:	e7eb      	b.n	57b8 <gpio_nrfx_pin_disable_callback+0x1a>

000057e0 <cfg_level_pins>:
{
    57e0:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
	return port->config->config_info;
    57e4:	6803      	ldr	r3, [r0, #0]
	const struct gpio_nrfx_data *data = get_port_data(port);
    57e6:	6885      	ldr	r5, [r0, #8]
	return port->config->config_info;
    57e8:	689e      	ldr	r6, [r3, #8]
	u32_t out = data->int_en & data->pin_int_en;
    57ea:	e9d5 3402 	ldrd	r3, r4, [r5, #8]
    57ee:	401c      	ands	r4, r3
	out &= ~data->trig_edge & ~data->double_edge;
    57f0:	e9d5 3205 	ldrd	r3, r2, [r5, #20]
    57f4:	4313      	orrs	r3, r2
    57f6:	ea24 0403 	bic.w	r4, r4, r3
	u32_t bit = 1U << pin;
    57fa:	f04f 0801 	mov.w	r8, #1
	u32_t pin = 0U;
    57fe:	2700      	movs	r7, #0
	while (level_pins) {
    5800:	b90c      	cbnz	r4, 5806 <cfg_level_pins+0x26>
}
    5802:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
		if (level_pins & bit) {
    5806:	ea18 0f04 	tst.w	r8, r4
    580a:	d012      	beq.n	5832 <cfg_level_pins+0x52>
	if ((BIT(pin) & (data->active_level ^ data->inverted)) != 0) {
    580c:	692b      	ldr	r3, [r5, #16]
    580e:	69ea      	ldr	r2, [r5, #28]
			u32_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
    5810:	f896 c004 	ldrb.w	ip, [r6, #4]
	if ((BIT(pin) & (data->active_level ^ data->inverted)) != 0) {
    5814:	4053      	eors	r3, r2
    5816:	40fb      	lsrs	r3, r7
		return NRF_GPIO_PIN_SENSE_HIGH;
    5818:	f013 0f01 	tst.w	r3, #1
			u32_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin);
    581c:	f007 001f 	and.w	r0, r7, #31
			nrf_gpio_cfg_sense_set(abs_pin, sense);
    5820:	bf0c      	ite	eq
    5822:	2103      	moveq	r1, #3
    5824:	2102      	movne	r1, #2
    5826:	ea40 104c 	orr.w	r0, r0, ip, lsl #5
    582a:	f7fd f979 	bl	2b20 <nrf_gpio_cfg_sense_set>
			level_pins &= ~bit;
    582e:	ea24 0408 	bic.w	r4, r4, r8
		++pin;
    5832:	3701      	adds	r7, #1
		bit <<= 1;
    5834:	ea4f 0848 	mov.w	r8, r8, lsl #1
    5838:	e7e2      	b.n	5800 <cfg_level_pins+0x20>

0000583a <gpio_nrfx_pin_enable_callback>:
	if (access_op == GPIO_ACCESS_BY_PORT) {
    583a:	2901      	cmp	r1, #1
{
    583c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
		from_pin = pin;
    5840:	bf18      	it	ne
    5842:	b2d4      	uxtbne	r4, r2
	struct gpio_nrfx_data *data = get_port_data(port);
    5844:	6887      	ldr	r7, [r0, #8]
{
    5846:	4606      	mov	r6, r0
		to_pin   = pin;
    5848:	bf12      	itee	ne
    584a:	4625      	movne	r5, r4
		to_pin   = 31U;
    584c:	251f      	moveq	r5, #31
		from_pin = 0U;
    584e:	2400      	moveq	r4, #0
		WRITE_BIT(data->int_en, curr_pin, enable);
    5850:	f04f 0801 	mov.w	r8, #1
	for (u8_t curr_pin = from_pin; curr_pin <= to_pin; ++curr_pin) {
    5854:	42ac      	cmp	r4, r5
    5856:	d902      	bls.n	585e <gpio_nrfx_pin_enable_callback+0x24>
	return res;
    5858:	2000      	movs	r0, #0
}
    585a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
		WRITE_BIT(data->int_en, curr_pin, enable);
    585e:	68fb      	ldr	r3, [r7, #12]
    5860:	fa08 f204 	lsl.w	r2, r8, r4
    5864:	4313      	orrs	r3, r2
    5866:	60fb      	str	r3, [r7, #12]
		res = gpiote_pin_int_cfg(port, curr_pin);
    5868:	4621      	mov	r1, r4
    586a:	4630      	mov	r0, r6
    586c:	f7fd f96c 	bl	2b48 <gpiote_pin_int_cfg>
		if (res != 0) {
    5870:	2800      	cmp	r0, #0
    5872:	d1f2      	bne.n	585a <gpio_nrfx_pin_enable_callback+0x20>
	for (u8_t curr_pin = from_pin; curr_pin <= to_pin; ++curr_pin) {
    5874:	3401      	adds	r4, #1
    5876:	b2e4      	uxtb	r4, r4
    5878:	e7ec      	b.n	5854 <gpio_nrfx_pin_enable_callback+0x1a>

0000587a <uart_nrfx_config_get>:
	*cfg = get_dev_data(dev)->uart_config;
    587a:	6882      	ldr	r2, [r0, #8]
{
    587c:	460b      	mov	r3, r1
	*cfg = get_dev_data(dev)->uart_config;
    587e:	e892 0003 	ldmia.w	r2, {r0, r1}
    5882:	e883 0003 	stmia.w	r3, {r0, r1}
}
    5886:	2000      	movs	r0, #0
    5888:	4770      	bx	lr

0000588a <hw_cc310_init>:
#include <nrf_cc310_platform.h>

#if CONFIG_HW_CC310

static int hw_cc310_init(struct device *dev)
{
    588a:	b508      	push	{r3, lr}
	int res;

	__ASSERT_NO_MSG(dev != NULL);

	/* Set the RTOS abort APIs */
	nrf_cc310_platform_abort_init();
    588c:	f7fb fe5a 	bl	1544 <nrf_cc310_platform_abort_init>

	/* Set the RTOS mutex APIs */
	nrf_cc310_platform_mutex_init();
    5890:	f7fb fed8 	bl	1644 <nrf_cc310_platform_mutex_init>
	res = nrf_cc310_platform_init();
#else
	res = nrf_cc310_platform_init_no_rng();
#endif
	return res;
}
    5894:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
	res = nrf_cc310_platform_init_no_rng();
    5898:	f7fe be42 	b.w	4520 <nrf_cc310_platform_init_no_rng>

0000589c <nrfx_isr>:
#include <nrfx.h>
#include <kernel.h>

void nrfx_isr(void *irq_handler)
{
	((nrfx_irq_handler_t)irq_handler)();
    589c:	4700      	bx	r0

0000589e <z_sys_power_save_idle_exit>:
	z_clock_idle_exit();
    589e:	f7ff bdb0 	b.w	5402 <z_clock_idle_exit>

000058a2 <k_mem_slab_init>:
{
    58a2:	b530      	push	{r4, r5, lr}
	slab->num_used = 0U;
    58a4:	2400      	movs	r4, #0
    58a6:	6184      	str	r4, [r0, #24]
	CHECKIF(((slab->block_size | (uintptr_t)slab->buffer) &
    58a8:	ea41 0402 	orr.w	r4, r1, r2
    58ac:	f014 0403 	ands.w	r4, r4, #3
	slab->block_size = block_size;
    58b0:	e9c0 3202 	strd	r3, r2, [r0, #8]
	slab->buffer = buffer;
    58b4:	6101      	str	r1, [r0, #16]
	CHECKIF(((slab->block_size | (uintptr_t)slab->buffer) &
    58b6:	d10c      	bne.n	58d2 <k_mem_slab_init+0x30>
	slab->free_list = NULL;
    58b8:	6144      	str	r4, [r0, #20]
	for (j = 0U; j < slab->num_blocks; j++) {
    58ba:	42a3      	cmp	r3, r4
    58bc:	d103      	bne.n	58c6 <k_mem_slab_init+0x24>
	list->tail = (sys_dnode_t *)list;
    58be:	e9c0 0000 	strd	r0, r0, [r0]
    58c2:	2000      	movs	r0, #0
}
    58c4:	bd30      	pop	{r4, r5, pc}
		*(char **)p = slab->free_list;
    58c6:	6945      	ldr	r5, [r0, #20]
    58c8:	600d      	str	r5, [r1, #0]
	for (j = 0U; j < slab->num_blocks; j++) {
    58ca:	3401      	adds	r4, #1
		slab->free_list = p;
    58cc:	6141      	str	r1, [r0, #20]
		p += slab->block_size;
    58ce:	4411      	add	r1, r2
    58d0:	e7f3      	b.n	58ba <k_mem_slab_init+0x18>
		return -EINVAL;
    58d2:	f06f 0015 	mvn.w	r0, #21
	return rc;
    58d6:	e7f5      	b.n	58c4 <k_mem_slab_init+0x22>

000058d8 <z_impl_k_mutex_init>:
{
    58d8:	4603      	mov	r3, r0
	mutex->owner = NULL;
    58da:	2000      	movs	r0, #0
	mutex->lock_count = 0U;
    58dc:	e9c3 0002 	strd	r0, r0, [r3, #8]
    58e0:	e9c3 3300 	strd	r3, r3, [r3]
}
    58e4:	4770      	bx	lr

000058e6 <z_is_thread_ready>:
	return !((z_is_thread_prevented_from_running(thread)) != 0 ||
    58e6:	7b43      	ldrb	r3, [r0, #13]
    58e8:	06db      	lsls	r3, r3, #27
    58ea:	bf03      	ittte	eq
    58ec:	6980      	ldreq	r0, [r0, #24]
    58ee:	fab0 f080 	clzeq	r0, r0
    58f2:	0940      	lsreq	r0, r0, #5
    58f4:	2000      	movne	r0, #0
}
    58f6:	4770      	bx	lr

000058f8 <z_find_first_thread_to_unpend>:
{
    58f8:	b510      	push	{r4, lr}
	__asm__ volatile(
    58fa:	f04f 0320 	mov.w	r3, #32
    58fe:	f3ef 8411 	mrs	r4, BASEPRI
    5902:	f383 8811 	msr	BASEPRI, r3
    5906:	f3bf 8f6f 	isb	sy
		ret = _priq_wait_best(&wait_q->waitq);
    590a:	f000 f83f 	bl	598c <z_priq_dumb_best>
	__asm__ volatile(
    590e:	f384 8811 	msr	BASEPRI, r4
    5912:	f3bf 8f6f 	isb	sy
}
    5916:	bd10      	pop	{r4, pc}

00005918 <z_unpend_thread_no_timeout>:
{
    5918:	b538      	push	{r3, r4, r5, lr}
    591a:	4604      	mov	r4, r0
	__asm__ volatile(
    591c:	f04f 0320 	mov.w	r3, #32
    5920:	f3ef 8511 	mrs	r5, BASEPRI
    5924:	f383 8811 	msr	BASEPRI, r3
    5928:	f3bf 8f6f 	isb	sy
		_priq_wait_remove(&pended_on(thread)->waitq, thread);
    592c:	4601      	mov	r1, r0
    592e:	6880      	ldr	r0, [r0, #8]
    5930:	f7fe f884 	bl	3a3c <z_priq_dumb_remove>
	thread->base.thread_state &= ~_THREAD_PENDING;
    5934:	7b63      	ldrb	r3, [r4, #13]
    5936:	f023 0302 	bic.w	r3, r3, #2
    593a:	7363      	strb	r3, [r4, #13]
	__asm__ volatile(
    593c:	f385 8811 	msr	BASEPRI, r5
    5940:	f3bf 8f6f 	isb	sy
	thread->base.pended_on = NULL;
    5944:	2300      	movs	r3, #0
    5946:	60a3      	str	r3, [r4, #8]
}
    5948:	bd38      	pop	{r3, r4, r5, pc}

0000594a <z_reschedule>:
	return arch_irq_unlocked(key) && !arch_is_in_isr();
    594a:	b921      	cbnz	r1, 5956 <z_reschedule+0xc>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
    594c:	f3ef 8005 	mrs	r0, IPSR
    5950:	b908      	cbnz	r0, 5956 <z_reschedule+0xc>
    5952:	f7fb be9b 	b.w	168c <arch_swap>
    5956:	f381 8811 	msr	BASEPRI, r1
    595a:	f3bf 8f6f 	isb	sy
}
    595e:	4770      	bx	lr

00005960 <z_reschedule_irqlock>:
	return arch_irq_unlocked(key) && !arch_is_in_isr();
    5960:	4603      	mov	r3, r0
    5962:	b920      	cbnz	r0, 596e <z_reschedule_irqlock+0xe>
    5964:	f3ef 8205 	mrs	r2, IPSR
    5968:	b90a      	cbnz	r2, 596e <z_reschedule_irqlock+0xe>
    596a:	f7fb be8f 	b.w	168c <arch_swap>
    596e:	f383 8811 	msr	BASEPRI, r3
    5972:	f3bf 8f6f 	isb	sy
}
    5976:	4770      	bx	lr

00005978 <z_reschedule_unlocked>:
	__asm__ volatile(
    5978:	f04f 0320 	mov.w	r3, #32
    597c:	f3ef 8011 	mrs	r0, BASEPRI
    5980:	f383 8811 	msr	BASEPRI, r3
    5984:	f3bf 8f6f 	isb	sy
	(void) z_reschedule_irqlock(arch_irq_lock());
    5988:	f7ff bfea 	b.w	5960 <z_reschedule_irqlock>

0000598c <z_priq_dumb_best>:
	return list->head == list;
    598c:	6803      	ldr	r3, [r0, #0]
}
    598e:	4298      	cmp	r0, r3
    5990:	bf14      	ite	ne
    5992:	4618      	movne	r0, r3
    5994:	2000      	moveq	r0, #0
    5996:	4770      	bx	lr

00005998 <z_thread_timeout>:
	if (thread->base.pended_on != NULL) {
    5998:	f850 3c10 	ldr.w	r3, [r0, #-16]
{
    599c:	b570      	push	{r4, r5, r6, lr}
    599e:	4604      	mov	r4, r0
	struct k_thread *thread = CONTAINER_OF(timeout,
    59a0:	f1a0 0518 	sub.w	r5, r0, #24
	if (thread->base.pended_on != NULL) {
    59a4:	b1cb      	cbz	r3, 59da <z_thread_timeout+0x42>
    59a6:	f04f 0320 	mov.w	r3, #32
    59aa:	f3ef 8611 	mrs	r6, BASEPRI
    59ae:	f383 8811 	msr	BASEPRI, r3
    59b2:	f3bf 8f6f 	isb	sy
		_priq_wait_remove(&pended_on(thread)->waitq, thread);
    59b6:	4629      	mov	r1, r5
    59b8:	f850 0c10 	ldr.w	r0, [r0, #-16]
    59bc:	f7fe f83e 	bl	3a3c <z_priq_dumb_remove>
	thread->base.thread_state &= ~_THREAD_PENDING;
    59c0:	f814 3c0b 	ldrb.w	r3, [r4, #-11]
    59c4:	f023 0302 	bic.w	r3, r3, #2
    59c8:	f804 3c0b 	strb.w	r3, [r4, #-11]
	__asm__ volatile(
    59cc:	f386 8811 	msr	BASEPRI, r6
    59d0:	f3bf 8f6f 	isb	sy
	thread->base.pended_on = NULL;
    59d4:	2300      	movs	r3, #0
    59d6:	f844 3c10 	str.w	r3, [r4, #-16]
	thread->base.thread_state &= ~_THREAD_SUSPENDED;
    59da:	f814 3c0b 	ldrb.w	r3, [r4, #-11]
    59de:	f023 0314 	bic.w	r3, r3, #20
    59e2:	f804 3c0b 	strb.w	r3, [r4, #-11]
	if (z_is_thread_ready(thread)) {
    59e6:	4628      	mov	r0, r5
    59e8:	f7ff ff7d 	bl	58e6 <z_is_thread_ready>
    59ec:	b120      	cbz	r0, 59f8 <z_thread_timeout+0x60>
		z_add_thread_to_ready_q(thread);
    59ee:	4628      	mov	r0, r5
}
    59f0:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
    59f4:	f7fe b872 	b.w	3adc <z_add_thread_to_ready_q>
    59f8:	bd70      	pop	{r4, r5, r6, pc}

000059fa <z_unpend_first_thread>:
{
    59fa:	b538      	push	{r3, r4, r5, lr}
	__asm__ volatile(
    59fc:	f04f 0320 	mov.w	r3, #32
    5a00:	f3ef 8211 	mrs	r2, BASEPRI
    5a04:	f383 8811 	msr	BASEPRI, r3
    5a08:	f3bf 8f6f 	isb	sy
		ret = _priq_wait_best(&wait_q->waitq);
    5a0c:	f7ff ffbe 	bl	598c <z_priq_dumb_best>
    5a10:	4604      	mov	r4, r0
	__asm__ volatile(
    5a12:	f382 8811 	msr	BASEPRI, r2
    5a16:	f3bf 8f6f 	isb	sy

static inline struct k_thread *z_unpend1_no_timeout(_wait_q_t *wait_q)
{
	struct k_thread *thread = z_find_first_thread_to_unpend(wait_q, NULL);

	if (thread != NULL) {
    5a1a:	b1c8      	cbz	r0, 5a50 <z_unpend_first_thread+0x56>
	__asm__ volatile(
    5a1c:	f04f 0320 	mov.w	r3, #32
    5a20:	f3ef 8511 	mrs	r5, BASEPRI
    5a24:	f383 8811 	msr	BASEPRI, r3
    5a28:	f3bf 8f6f 	isb	sy
		_priq_wait_remove(&pended_on(thread)->waitq, thread);
    5a2c:	4601      	mov	r1, r0
    5a2e:	6880      	ldr	r0, [r0, #8]
    5a30:	f7fe f804 	bl	3a3c <z_priq_dumb_remove>
	thread->base.thread_state &= ~_THREAD_PENDING;
    5a34:	7b63      	ldrb	r3, [r4, #13]
    5a36:	f023 0302 	bic.w	r3, r3, #2
    5a3a:	7363      	strb	r3, [r4, #13]
	__asm__ volatile(
    5a3c:	f385 8811 	msr	BASEPRI, r5
    5a40:	f3bf 8f6f 	isb	sy
	thread->base.pended_on = NULL;
    5a44:	2300      	movs	r3, #0
    5a46:	60a3      	str	r3, [r4, #8]
	return z_abort_timeout(&thread->base.timeout);
    5a48:	f104 0018 	add.w	r0, r4, #24
    5a4c:	f000 f818 	bl	5a80 <z_abort_timeout>
}
    5a50:	4620      	mov	r0, r4
    5a52:	bd38      	pop	{r3, r4, r5, pc}

00005a54 <z_impl_k_busy_wait>:
	arch_busy_wait(usec_to_wait);
    5a54:	f7fd b842 	b.w	2adc <arch_busy_wait>

00005a58 <z_impl_k_thread_name_set>:
}
    5a58:	f06f 0046 	mvn.w	r0, #70	; 0x46
    5a5c:	4770      	bx	lr

00005a5e <k_thread_name_get>:
}
    5a5e:	2000      	movs	r0, #0
    5a60:	4770      	bx	lr

00005a62 <z_new_thread_init>:
{
    5a62:	b510      	push	{r4, lr}
void z_init_thread_base(struct _thread_base *thread_base, int priority,
		       u32_t initial_state, unsigned int options)
{
	/* k_q_node is initialized upon first insertion in a list */

	thread_base->user_options = (u8_t)options;
    5a64:	9c02      	ldr	r4, [sp, #8]
    5a66:	7304      	strb	r4, [r0, #12]
	thread_base->thread_state = (u8_t)initial_state;

	thread_base->prio = priority;
    5a68:	7383      	strb	r3, [r0, #14]
	thread_base->thread_state = (u8_t)initial_state;
    5a6a:	2404      	movs	r4, #4

	thread_base->sched_locked = 0U;
    5a6c:	2300      	movs	r3, #0
	thread_base->thread_state = (u8_t)initial_state;
    5a6e:	7344      	strb	r4, [r0, #13]
	thread_base->sched_locked = 0U;
    5a70:	73c3      	strb	r3, [r0, #15]
	node->prev = NULL;
    5a72:	e9c0 3306 	strd	r3, r3, [r0, #24]
	thread->fn_abort = NULL;
    5a76:	e9c0 3313 	strd	r3, r3, [r0, #76]	; 0x4c
	thread->stack_info.size = (u32_t)stackSize;
    5a7a:	e9c0 1216 	strd	r1, r2, [r0, #88]	; 0x58
}
    5a7e:	bd10      	pop	{r4, pc}

00005a80 <z_abort_timeout>:
{
    5a80:	b510      	push	{r4, lr}
	__asm__ volatile(
    5a82:	f04f 0220 	mov.w	r2, #32
    5a86:	f3ef 8411 	mrs	r4, BASEPRI
    5a8a:	f382 8811 	msr	BASEPRI, r2
    5a8e:	f3bf 8f6f 	isb	sy
		if (sys_dnode_is_linked(&to->node)) {
    5a92:	6803      	ldr	r3, [r0, #0]
    5a94:	b13b      	cbz	r3, 5aa6 <z_abort_timeout+0x26>
			remove_timeout(to);
    5a96:	f7fe fbf7 	bl	4288 <remove_timeout>
			ret = 0;
    5a9a:	2000      	movs	r0, #0
	__asm__ volatile(
    5a9c:	f384 8811 	msr	BASEPRI, r4
    5aa0:	f3bf 8f6f 	isb	sy
}
    5aa4:	bd10      	pop	{r4, pc}
	int ret = -EINVAL;
    5aa6:	f06f 0015 	mvn.w	r0, #21
    5aaa:	e7f7      	b.n	5a9c <z_abort_timeout+0x1c>

00005aac <z_get_next_timeout_expiry>:
{
    5aac:	b510      	push	{r4, lr}
	__asm__ volatile(
    5aae:	f04f 0320 	mov.w	r3, #32
    5ab2:	f3ef 8411 	mrs	r4, BASEPRI
    5ab6:	f383 8811 	msr	BASEPRI, r3
    5aba:	f3bf 8f6f 	isb	sy
		ret = next_timeout();
    5abe:	f7fe fbf7 	bl	42b0 <next_timeout>
	__asm__ volatile(
    5ac2:	f384 8811 	msr	BASEPRI, r4
    5ac6:	f3bf 8f6f 	isb	sy
}
    5aca:	bd10      	pop	{r4, pc}

00005acc <z_set_timeout_expiry>:
{
    5acc:	b570      	push	{r4, r5, r6, lr}
    5ace:	4604      	mov	r4, r0
    5ad0:	460e      	mov	r6, r1
	__asm__ volatile(
    5ad2:	f04f 0320 	mov.w	r3, #32
    5ad6:	f3ef 8511 	mrs	r5, BASEPRI
    5ada:	f383 8811 	msr	BASEPRI, r3
    5ade:	f3bf 8f6f 	isb	sy
		int next = next_timeout();
    5ae2:	f7fe fbe5 	bl	42b0 <next_timeout>
		if (!imminent && (sooner || IS_ENABLED(CONFIG_SMP))) {
    5ae6:	2801      	cmp	r0, #1
    5ae8:	dd05      	ble.n	5af6 <z_set_timeout_expiry+0x2a>
    5aea:	42a0      	cmp	r0, r4
    5aec:	dd03      	ble.n	5af6 <z_set_timeout_expiry+0x2a>
			z_clock_set_timeout(ticks, idle);
    5aee:	4631      	mov	r1, r6
    5af0:	4620      	mov	r0, r4
    5af2:	f7fb fc17 	bl	1324 <z_clock_set_timeout>
	__asm__ volatile(
    5af6:	f385 8811 	msr	BASEPRI, r5
    5afa:	f3bf 8f6f 	isb	sy
}
    5afe:	bd70      	pop	{r4, r5, r6, pc}

00005b00 <z_tick_get_32>:

u32_t z_tick_get_32(void)
{
    5b00:	b508      	push	{r3, lr}
#ifdef CONFIG_TICKLESS_KERNEL
	return (u32_t)z_tick_get();
    5b02:	f7fe fc89 	bl	4418 <z_tick_get>
#else
	return (u32_t)curr_tick;
#endif
}
    5b06:	bd08      	pop	{r3, pc}

00005b08 <k_timer_init>:
	timer->status = 0U;
    5b08:	2300      	movs	r3, #0
	timer->stop_fn = stop_fn;
    5b0a:	e9c0 1206 	strd	r1, r2, [r0, #24]
    5b0e:	f100 0210 	add.w	r2, r0, #16
	timer->status = 0U;
    5b12:	6243      	str	r3, [r0, #36]	; 0x24
	list->tail = (sys_dnode_t *)list;
    5b14:	e9c0 2204 	strd	r2, r2, [r0, #16]
	node->prev = NULL;
    5b18:	e9c0 3300 	strd	r3, r3, [r0]
	timer->user_data = NULL;
    5b1c:	6283      	str	r3, [r0, #40]	; 0x28
}
    5b1e:	4770      	bx	lr

00005b20 <z_impl_k_timer_stop>:
}
#include <syscalls/k_timer_start_mrsh.c>
#endif

void z_impl_k_timer_stop(struct k_timer *timer)
{
    5b20:	b510      	push	{r4, lr}
    5b22:	4604      	mov	r4, r0
	int inactive = z_abort_timeout(&timer->timeout) != 0;
    5b24:	f7ff ffac 	bl	5a80 <z_abort_timeout>

	if (inactive) {
    5b28:	bb00      	cbnz	r0, 5b6c <z_impl_k_timer_stop+0x4c>
		return;
	}

	if (timer->stop_fn != NULL) {
    5b2a:	69e3      	ldr	r3, [r4, #28]
    5b2c:	b10b      	cbz	r3, 5b32 <z_impl_k_timer_stop+0x12>
		timer->stop_fn(timer);
    5b2e:	4620      	mov	r0, r4
    5b30:	4798      	blx	r3
	struct k_thread *thread = z_find_first_thread_to_unpend(wait_q, NULL);
    5b32:	f104 0010 	add.w	r0, r4, #16
    5b36:	2100      	movs	r1, #0
    5b38:	f7ff fede 	bl	58f8 <z_find_first_thread_to_unpend>
	if (thread != NULL) {
    5b3c:	4604      	mov	r4, r0
    5b3e:	b1a8      	cbz	r0, 5b6c <z_impl_k_timer_stop+0x4c>
		z_unpend_thread_no_timeout(thread);
    5b40:	f7ff feea 	bl	5918 <z_unpend_thread_no_timeout>
	return !((z_is_thread_prevented_from_running(thread)) != 0 ||
    5b44:	7b63      	ldrb	r3, [r4, #13]
    5b46:	06db      	lsls	r3, r3, #27
    5b48:	d104      	bne.n	5b54 <z_impl_k_timer_stop+0x34>
	if (z_is_thread_ready(thread)) {
    5b4a:	69a3      	ldr	r3, [r4, #24]
    5b4c:	b913      	cbnz	r3, 5b54 <z_impl_k_timer_stop+0x34>
		z_add_thread_to_ready_q(thread);
    5b4e:	4620      	mov	r0, r4
    5b50:	f7fd ffc4 	bl	3adc <z_add_thread_to_ready_q>
	__asm__ volatile(
    5b54:	f04f 0320 	mov.w	r3, #32
    5b58:	f3ef 8011 	mrs	r0, BASEPRI
    5b5c:	f383 8811 	msr	BASEPRI, r3
    5b60:	f3bf 8f6f 	isb	sy

	if (pending_thread != NULL) {
		z_ready_thread(pending_thread);
		z_reschedule_unlocked();
	}
}
    5b64:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
	(void) z_reschedule_irqlock(arch_irq_lock());
    5b68:	f7ff befa 	b.w	5960 <z_reschedule_irqlock>
    5b6c:	bd10      	pop	{r4, pc}

00005b6e <_OffsetAbsSyms>:
					    sizeof(struct _preempt_float));
#else
GEN_ABSOLUTE_SYM(_K_THREAD_NO_FLOAT_SIZEOF, sizeof(struct k_thread));
#endif

GEN_ABS_SYM_END
    5b6e:	4770      	bx	lr
