/*
 * Generated by gen_defines.py
 *
 * DTS input file:
 *   nrf52840_pca10056.dts.pre.tmp
 *
 * Directories with bindings:
 *   $ZEPHYR_BASE\dts\bindings
 *
 * Nodes in dependency order (ordinal and path):
 *   0   /
 *   1   /aliases
 *   2   /buttons
 *   3   /soc
 *   4   /soc/gpio@50000000
 *   5   /buttons/button_0
 *   6   /buttons/button_1
 *   7   /buttons/button_2
 *   8   /buttons/button_3
 *   9   /chosen
 *   10  /connector
 *   11  /cpus
 *   12  /cpus/cpu@0
 *   13  /leds
 *   14  /leds/led_0
 *   15  /leds/led_1
 *   16  /leds/led_2
 *   17  /leds/led_3
 *   18  /pwmleds
 *   19  /soc/interrupt-controller@e000e100
 *   20  /soc/pwm@4001c000
 *   21  /pwmleds/pwm_led_0
 *   22  /soc/adc@40007000
 *   23  /soc/clock@40000000
 *   24  /soc/crypto@5002a000
 *   25  /soc/crypto@5002a000/crypto@5002b000
 *   26  /soc/flash-controller@4001e000
 *   27  /soc/flash-controller@4001e000/flash@0
 *   28  /soc/flash-controller@4001e000/flash@0/partitions
 *   29  /soc/flash-controller@4001e000/flash@0/partitions/partition@0
 *   30  /soc/flash-controller@4001e000/flash@0/partitions/partition@73000
 *   31  /soc/flash-controller@4001e000/flash@0/partitions/partition@c000
 *   32  /soc/flash-controller@4001e000/flash@0/partitions/partition@da000
 *   33  /soc/flash-controller@4001e000/flash@0/partitions/partition@f8000
 *   34  /soc/gpio@50000300
 *   35  /soc/gpiote@40006000
 *   36  /soc/i2c@40003000
 *   37  /soc/i2c@40004000
 *   38  /soc/memory@20000000
 *   39  /soc/pwm@40021000
 *   40  /soc/pwm@40022000
 *   41  /soc/pwm@4002d000
 *   42  /soc/qdec@40012000
 *   43  /soc/qspi@40029000
 *   44  /soc/qspi@40029000/mx25r6435f@0
 *   45  /soc/rtc@4000b000
 *   46  /soc/rtc@40011000
 *   47  /soc/rtc@40024000
 *   48  /soc/spi@40003000
 *   49  /soc/spi@40004000
 *   50  /soc/spi@40023000
 *   51  /soc/spi@4002f000
 *   52  /soc/temp@4000c000
 *   53  /soc/timer@40008000
 *   54  /soc/timer@40009000
 *   55  /soc/timer@4000a000
 *   56  /soc/timer@4001a000
 *   57  /soc/timer@4001b000
 *   58  /soc/timer@e000e010
 *   59  /soc/uart@40002000
 *   60  /soc/uart@40028000
 *   61  /soc/usbd@40027000
 *   62  /soc/watchdog@40010000
 *   63  /sw-pwm
 */

/*
 * Devicetree node:
 *   /soc/interrupt-controller@e000e100
 *
 * Binding (compatible = arm,v7m-nvic):
 *   $ZEPHYR_BASE\dts\bindings\interrupt-controller\arm,v7m-nvic.yaml
 *
 * Dependency Ordinal: 19
 *
 * Requires:
 *   3   /soc
 *
 * Supports:
 *   22  /soc/adc@40007000
 *   23  /soc/clock@40000000
 *   25  /soc/crypto@5002a000/crypto@5002b000
 *   35  /soc/gpiote@40006000
 *   36  /soc/i2c@40003000
 *   37  /soc/i2c@40004000
 *   20  /soc/pwm@4001c000
 *   39  /soc/pwm@40021000
 *   40  /soc/pwm@40022000
 *   41  /soc/pwm@4002d000
 *   42  /soc/qdec@40012000
 *   43  /soc/qspi@40029000
 *   45  /soc/rtc@4000b000
 *   46  /soc/rtc@40011000
 *   47  /soc/rtc@40024000
 *   48  /soc/spi@40003000
 *   49  /soc/spi@40004000
 *   50  /soc/spi@40023000
 *   51  /soc/spi@4002f000
 *   52  /soc/temp@4000c000
 *   53  /soc/timer@40008000
 *   54  /soc/timer@40009000
 *   55  /soc/timer@4000a000
 *   56  /soc/timer@4001a000
 *   57  /soc/timer@4001b000
 *   59  /soc/uart@40002000
 *   60  /soc/uart@40028000
 *   61  /soc/usbd@40027000
 *   62  /soc/watchdog@40010000
 *
 * Description:
 *   ARMv7-M NVIC (Nested Vectored Interrupt Controller)
 */
#define DT_ARM_V7M_NVIC_E000E100_BASE_ADDRESS       0xe000e100
#define DT_INST_0_ARM_V7M_NVIC_BASE_ADDRESS         DT_ARM_V7M_NVIC_E000E100_BASE_ADDRESS
#define DT_ARM_V7M_NVIC_E000E100_SIZE               3072
#define DT_INST_0_ARM_V7M_NVIC_SIZE                 DT_ARM_V7M_NVIC_E000E100_SIZE
/* number of bits of IRQ priorities */
#define DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS 3
#define DT_INST_0_ARM_V7M_NVIC_ARM_NUM_IRQ_PRIORITY_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define DT_INST_0_ARM_V7M_NVIC                      1

/*
 * Devicetree node:
 *   /soc/flash-controller@4001e000
 *
 * Binding (compatible = nordic,nrf52-flash-controller):
 *   $ZEPHYR_BASE\dts\bindings\flash_controller\nordic,nrf52-flash-controller.yaml
 *
 * Dependency Ordinal: 26
 *
 * Requires:
 *   3   /soc
 *
 * Supports:
 *   27  /soc/flash-controller@4001e000/flash@0
 *
 * Description:
 *   Nordic NVMC (Non-Volatile Memory Controller)
 */
#define DT_NORDIC_NRF52_FLASH_CONTROLLER_4001E000_BASE_ADDRESS 0x4001e000
#define DT_INST_0_NORDIC_NRF52_FLASH_CONTROLLER_BASE_ADDRESS DT_NORDIC_NRF52_FLASH_CONTROLLER_4001E000_BASE_ADDRESS
#define DT_NORDIC_NRF52_FLASH_CONTROLLER_4001E000_SIZE 4096
#define DT_INST_0_NORDIC_NRF52_FLASH_CONTROLLER_SIZE DT_NORDIC_NRF52_FLASH_CONTROLLER_4001E000_SIZE
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF52_FLASH_CONTROLLER_4001E000_LABEL "NRF_FLASH_DRV_NAME"
#define DT_INST_0_NORDIC_NRF52_FLASH_CONTROLLER_LABEL DT_NORDIC_NRF52_FLASH_CONTROLLER_4001E000_LABEL
#define DT_INST_0_NORDIC_NRF52_FLASH_CONTROLLER     1

/*
 * Devicetree node:
 *   /soc/flash-controller@4001e000/flash@0
 *
 * Binding (compatible = soc-nv-flash):
 *   $ZEPHYR_BASE\dts\bindings\mtd\soc-nv-flash.yaml
 *
 * Dependency Ordinal: 27
 *
 * Requires:
 *   26  /soc/flash-controller@4001e000
 *
 * Supports:
 *   28  /soc/flash-controller@4001e000/flash@0/partitions
 *
 * Description:
 *   Flash node
 */
#define DT_SOC_NV_FLASH_0_BASE_ADDRESS              0x0
#define DT_INST_0_SOC_NV_FLASH_BASE_ADDRESS         DT_SOC_NV_FLASH_0_BASE_ADDRESS
#define DT_SOC_NV_FLASH_0_SIZE                      1048576
#define DT_INST_0_SOC_NV_FLASH_SIZE                 DT_SOC_NV_FLASH_0_SIZE
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_SOC_NV_FLASH_0_LABEL                     "NRF_FLASH"
#define DT_INST_0_SOC_NV_FLASH_LABEL                DT_SOC_NV_FLASH_0_LABEL
/* address alignment required by flash erase operations */
#define DT_SOC_NV_FLASH_0_ERASE_BLOCK_SIZE          4096
#define DT_INST_0_SOC_NV_FLASH_ERASE_BLOCK_SIZE     DT_SOC_NV_FLASH_0_ERASE_BLOCK_SIZE
/* address alignment required by flash write operations */
#define DT_SOC_NV_FLASH_0_WRITE_BLOCK_SIZE          4
#define DT_INST_0_SOC_NV_FLASH_WRITE_BLOCK_SIZE     DT_SOC_NV_FLASH_0_WRITE_BLOCK_SIZE
#define DT_INST_0_SOC_NV_FLASH                      1

/*
 * Devicetree node:
 *   /soc/memory@20000000
 *
 * Binding (compatible = mmio-sram):
 *   $ZEPHYR_BASE\dts\bindings\sram\mmio-sram.yaml
 *
 * Dependency Ordinal: 38
 *
 * Requires:
 *   3   /soc
 *
 * Description:
 *   Generic on-chip SRAM description
 */
#define DT_MMIO_SRAM_20000000_BASE_ADDRESS          0x20000000
#define DT_INST_0_MMIO_SRAM_BASE_ADDRESS            DT_MMIO_SRAM_20000000_BASE_ADDRESS
#define DT_MMIO_SRAM_20000000_SIZE                  262144
#define DT_INST_0_MMIO_SRAM_SIZE                    DT_MMIO_SRAM_20000000_SIZE
#define DT_INST_0_MMIO_SRAM                         1

/*
 * Devicetree node:
 *   /soc/adc@40007000
 *
 * Binding (compatible = nordic,nrf-saadc):
 *   $ZEPHYR_BASE\dts\bindings\iio\adc\nordic,nrf-saadc.yaml
 *
 * Dependency Ordinal: 22
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic Semiconductor nRF family SAADC node
 */
#define DT_NORDIC_NRF_SAADC_40007000_BASE_ADDRESS   0x40007000
#define DT_ALIAS_ADC_0_BASE_ADDRESS                 DT_NORDIC_NRF_SAADC_40007000_BASE_ADDRESS
#define DT_NORDIC_NRF_SAADC_ADC_0_BASE_ADDRESS      DT_NORDIC_NRF_SAADC_40007000_BASE_ADDRESS
#define DT_INST_0_NORDIC_NRF_SAADC_BASE_ADDRESS     DT_NORDIC_NRF_SAADC_40007000_BASE_ADDRESS
#define DT_NORDIC_NRF_SAADC_40007000_SIZE           4096
#define DT_ALIAS_ADC_0_SIZE                         DT_NORDIC_NRF_SAADC_40007000_SIZE
#define DT_NORDIC_NRF_SAADC_ADC_0_SIZE              DT_NORDIC_NRF_SAADC_40007000_SIZE
#define DT_INST_0_NORDIC_NRF_SAADC_SIZE             DT_NORDIC_NRF_SAADC_40007000_SIZE
#define DT_NORDIC_NRF_SAADC_40007000_IRQ_0          7
#define DT_ALIAS_ADC_0_IRQ_0                        DT_NORDIC_NRF_SAADC_40007000_IRQ_0
#define DT_NORDIC_NRF_SAADC_ADC_0_IRQ_0             DT_NORDIC_NRF_SAADC_40007000_IRQ_0
#define DT_INST_0_NORDIC_NRF_SAADC_IRQ_0            DT_NORDIC_NRF_SAADC_40007000_IRQ_0
#define DT_NORDIC_NRF_SAADC_40007000_IRQ_0_PRIORITY 1
#define DT_ALIAS_ADC_0_IRQ_0_PRIORITY               DT_NORDIC_NRF_SAADC_40007000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_SAADC_ADC_0_IRQ_0_PRIORITY    DT_NORDIC_NRF_SAADC_40007000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_SAADC_IRQ_0_PRIORITY   DT_NORDIC_NRF_SAADC_40007000_IRQ_0_PRIORITY
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_SAADC_40007000_LABEL          "ADC_0"
#define DT_ALIAS_ADC_0_LABEL                        DT_NORDIC_NRF_SAADC_40007000_LABEL
#define DT_NORDIC_NRF_SAADC_ADC_0_LABEL             DT_NORDIC_NRF_SAADC_40007000_LABEL
#define DT_INST_0_NORDIC_NRF_SAADC_LABEL            DT_NORDIC_NRF_SAADC_40007000_LABEL
#define DT_INST_0_NORDIC_NRF_SAADC                  1

/*
 * Devicetree node:
 *   /soc/clock@40000000
 *
 * Binding (compatible = nordic,nrf-clock):
 *   $ZEPHYR_BASE\dts\bindings\clock\nordic,nrf-clock.yaml
 *
 * Dependency Ordinal: 23
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic nRF clock control node
 */
#define DT_NORDIC_NRF_CLOCK_40000000_BASE_ADDRESS   0x40000000
#define DT_INST_0_NORDIC_NRF_CLOCK_BASE_ADDRESS     DT_NORDIC_NRF_CLOCK_40000000_BASE_ADDRESS
#define DT_NORDIC_NRF_CLOCK_40000000_SIZE           4096
#define DT_INST_0_NORDIC_NRF_CLOCK_SIZE             DT_NORDIC_NRF_CLOCK_40000000_SIZE
#define DT_NORDIC_NRF_CLOCK_40000000_IRQ_0          0
#define DT_INST_0_NORDIC_NRF_CLOCK_IRQ_0            DT_NORDIC_NRF_CLOCK_40000000_IRQ_0
#define DT_NORDIC_NRF_CLOCK_40000000_IRQ_0_PRIORITY 1
#define DT_INST_0_NORDIC_NRF_CLOCK_IRQ_0_PRIORITY   DT_NORDIC_NRF_CLOCK_40000000_IRQ_0_PRIORITY
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_CLOCK_40000000_LABEL          "CLOCK"
#define DT_INST_0_NORDIC_NRF_CLOCK_LABEL            DT_NORDIC_NRF_CLOCK_40000000_LABEL
#define DT_INST_0_NORDIC_NRF_CLOCK                  1

/*
 * Devicetree node:
 *   /soc/uart@40002000
 *
 * Binding (compatible = nordic,nrf-uart):
 *   $ZEPHYR_BASE\dts\bindings\serial\nordic,nrf-uart.yaml
 *
 * Dependency Ordinal: 59
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic UART
 */
#define DT_NORDIC_NRF_UART_40002000_BASE_ADDRESS    0x40002000
#define DT_ALIAS_UART_0_BASE_ADDRESS                DT_NORDIC_NRF_UART_40002000_BASE_ADDRESS
#define DT_NORDIC_NRF_UART_UART_0_BASE_ADDRESS      DT_NORDIC_NRF_UART_40002000_BASE_ADDRESS
#define DT_INST_0_NORDIC_NRF_UART_BASE_ADDRESS      DT_NORDIC_NRF_UART_40002000_BASE_ADDRESS
#define DT_NORDIC_NRF_UART_40002000_SIZE            4096
#define DT_ALIAS_UART_0_SIZE                        DT_NORDIC_NRF_UART_40002000_SIZE
#define DT_NORDIC_NRF_UART_UART_0_SIZE              DT_NORDIC_NRF_UART_40002000_SIZE
#define DT_INST_0_NORDIC_NRF_UART_SIZE              DT_NORDIC_NRF_UART_40002000_SIZE
#define DT_NORDIC_NRF_UART_40002000_IRQ_0           2
#define DT_ALIAS_UART_0_IRQ_0                       DT_NORDIC_NRF_UART_40002000_IRQ_0
#define DT_NORDIC_NRF_UART_UART_0_IRQ_0             DT_NORDIC_NRF_UART_40002000_IRQ_0
#define DT_INST_0_NORDIC_NRF_UART_IRQ_0             DT_NORDIC_NRF_UART_40002000_IRQ_0
#define DT_NORDIC_NRF_UART_40002000_IRQ_0_PRIORITY  1
#define DT_ALIAS_UART_0_IRQ_0_PRIORITY              DT_NORDIC_NRF_UART_40002000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_UART_UART_0_IRQ_0_PRIORITY    DT_NORDIC_NRF_UART_40002000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_UART_IRQ_0_PRIORITY    DT_NORDIC_NRF_UART_40002000_IRQ_0_PRIORITY
/* TX pin */
#define DT_NORDIC_NRF_UART_40002000_TX_PIN          6
#define DT_ALIAS_UART_0_TX_PIN                      DT_NORDIC_NRF_UART_40002000_TX_PIN
#define DT_NORDIC_NRF_UART_UART_0_TX_PIN            DT_NORDIC_NRF_UART_40002000_TX_PIN
#define DT_INST_0_NORDIC_NRF_UART_TX_PIN            DT_NORDIC_NRF_UART_40002000_TX_PIN
/* RX pin */
#define DT_NORDIC_NRF_UART_40002000_RX_PIN          8
#define DT_ALIAS_UART_0_RX_PIN                      DT_NORDIC_NRF_UART_40002000_RX_PIN
#define DT_NORDIC_NRF_UART_UART_0_RX_PIN            DT_NORDIC_NRF_UART_40002000_RX_PIN
#define DT_INST_0_NORDIC_NRF_UART_RX_PIN            DT_NORDIC_NRF_UART_40002000_RX_PIN
/* RTS pin */
#define DT_NORDIC_NRF_UART_40002000_RTS_PIN         5
#define DT_ALIAS_UART_0_RTS_PIN                     DT_NORDIC_NRF_UART_40002000_RTS_PIN
#define DT_NORDIC_NRF_UART_UART_0_RTS_PIN           DT_NORDIC_NRF_UART_40002000_RTS_PIN
#define DT_INST_0_NORDIC_NRF_UART_RTS_PIN           DT_NORDIC_NRF_UART_40002000_RTS_PIN
/* CTS pin */
#define DT_NORDIC_NRF_UART_40002000_CTS_PIN         7
#define DT_ALIAS_UART_0_CTS_PIN                     DT_NORDIC_NRF_UART_40002000_CTS_PIN
#define DT_NORDIC_NRF_UART_UART_0_CTS_PIN           DT_NORDIC_NRF_UART_40002000_CTS_PIN
#define DT_INST_0_NORDIC_NRF_UART_CTS_PIN           DT_NORDIC_NRF_UART_40002000_CTS_PIN
/* Initial baud rate setting for UART */
#define DT_NORDIC_NRF_UART_40002000_CURRENT_SPEED   115200
#define DT_ALIAS_UART_0_CURRENT_SPEED               DT_NORDIC_NRF_UART_40002000_CURRENT_SPEED
#define DT_NORDIC_NRF_UART_UART_0_CURRENT_SPEED     DT_NORDIC_NRF_UART_40002000_CURRENT_SPEED
#define DT_INST_0_NORDIC_NRF_UART_CURRENT_SPEED     DT_NORDIC_NRF_UART_40002000_CURRENT_SPEED
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_UART_40002000_LABEL           "UART_0"
#define DT_ALIAS_UART_0_LABEL                       DT_NORDIC_NRF_UART_40002000_LABEL
#define DT_NORDIC_NRF_UART_UART_0_LABEL             DT_NORDIC_NRF_UART_40002000_LABEL
#define DT_INST_0_NORDIC_NRF_UART_LABEL             DT_NORDIC_NRF_UART_40002000_LABEL
/* Set to enable RTS/CTS flow control at boot time */
#define DT_NORDIC_NRF_UART_40002000_HW_FLOW_CONTROL 0
#define DT_ALIAS_UART_0_HW_FLOW_CONTROL             DT_NORDIC_NRF_UART_40002000_HW_FLOW_CONTROL
#define DT_NORDIC_NRF_UART_UART_0_HW_FLOW_CONTROL   DT_NORDIC_NRF_UART_40002000_HW_FLOW_CONTROL
#define DT_INST_0_NORDIC_NRF_UART_HW_FLOW_CONTROL   DT_NORDIC_NRF_UART_40002000_HW_FLOW_CONTROL
#define DT_INST_0_NORDIC_NRF_UART                   1

/*
 * Devicetree node:
 *   /soc/uart@40028000
 *
 * Binding (compatible = nordic,nrf-uarte):
 *   $ZEPHYR_BASE\dts\bindings\serial\nordic,nrf-uarte.yaml
 *
 * Dependency Ordinal: 60
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic UARTE
 */
#define DT_NORDIC_NRF_UARTE_40028000_BASE_ADDRESS   0x40028000
#define DT_ALIAS_UART_1_BASE_ADDRESS                DT_NORDIC_NRF_UARTE_40028000_BASE_ADDRESS
#define DT_NORDIC_NRF_UARTE_UART_1_BASE_ADDRESS     DT_NORDIC_NRF_UARTE_40028000_BASE_ADDRESS
#define DT_INST_0_NORDIC_NRF_UARTE_BASE_ADDRESS     DT_NORDIC_NRF_UARTE_40028000_BASE_ADDRESS
#define DT_NORDIC_NRF_UARTE_40028000_SIZE           4096
#define DT_ALIAS_UART_1_SIZE                        DT_NORDIC_NRF_UARTE_40028000_SIZE
#define DT_NORDIC_NRF_UARTE_UART_1_SIZE             DT_NORDIC_NRF_UARTE_40028000_SIZE
#define DT_INST_0_NORDIC_NRF_UARTE_SIZE             DT_NORDIC_NRF_UARTE_40028000_SIZE
#define DT_NORDIC_NRF_UARTE_40028000_IRQ_0          40
#define DT_ALIAS_UART_1_IRQ_0                       DT_NORDIC_NRF_UARTE_40028000_IRQ_0
#define DT_NORDIC_NRF_UARTE_UART_1_IRQ_0            DT_NORDIC_NRF_UARTE_40028000_IRQ_0
#define DT_INST_0_NORDIC_NRF_UARTE_IRQ_0            DT_NORDIC_NRF_UARTE_40028000_IRQ_0
#define DT_NORDIC_NRF_UARTE_40028000_IRQ_0_PRIORITY 1
#define DT_ALIAS_UART_1_IRQ_0_PRIORITY              DT_NORDIC_NRF_UARTE_40028000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_UARTE_UART_1_IRQ_0_PRIORITY   DT_NORDIC_NRF_UARTE_40028000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_UARTE_IRQ_0_PRIORITY   DT_NORDIC_NRF_UARTE_40028000_IRQ_0_PRIORITY
/* Set to enable RTS/CTS flow control at boot time */
#define DT_NORDIC_NRF_UARTE_40028000_HW_FLOW_CONTROL 0
#define DT_ALIAS_UART_1_HW_FLOW_CONTROL             DT_NORDIC_NRF_UARTE_40028000_HW_FLOW_CONTROL
#define DT_NORDIC_NRF_UARTE_UART_1_HW_FLOW_CONTROL  DT_NORDIC_NRF_UARTE_40028000_HW_FLOW_CONTROL
#define DT_INST_0_NORDIC_NRF_UARTE_HW_FLOW_CONTROL  DT_NORDIC_NRF_UARTE_40028000_HW_FLOW_CONTROL
/* TX pin */
#define DT_NORDIC_NRF_UARTE_40028000_TX_PIN         34
#define DT_ALIAS_UART_1_TX_PIN                      DT_NORDIC_NRF_UARTE_40028000_TX_PIN
#define DT_NORDIC_NRF_UARTE_UART_1_TX_PIN           DT_NORDIC_NRF_UARTE_40028000_TX_PIN
#define DT_INST_0_NORDIC_NRF_UARTE_TX_PIN           DT_NORDIC_NRF_UARTE_40028000_TX_PIN
/* RX pin */
#define DT_NORDIC_NRF_UARTE_40028000_RX_PIN         33
#define DT_ALIAS_UART_1_RX_PIN                      DT_NORDIC_NRF_UARTE_40028000_RX_PIN
#define DT_NORDIC_NRF_UARTE_UART_1_RX_PIN           DT_NORDIC_NRF_UARTE_40028000_RX_PIN
#define DT_INST_0_NORDIC_NRF_UARTE_RX_PIN           DT_NORDIC_NRF_UARTE_40028000_RX_PIN
/* Initial baud rate setting for UART */
#define DT_NORDIC_NRF_UARTE_40028000_CURRENT_SPEED  115200
#define DT_ALIAS_UART_1_CURRENT_SPEED               DT_NORDIC_NRF_UARTE_40028000_CURRENT_SPEED
#define DT_NORDIC_NRF_UARTE_UART_1_CURRENT_SPEED    DT_NORDIC_NRF_UARTE_40028000_CURRENT_SPEED
#define DT_INST_0_NORDIC_NRF_UARTE_CURRENT_SPEED    DT_NORDIC_NRF_UARTE_40028000_CURRENT_SPEED
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_UARTE_40028000_LABEL          "UART_1"
#define DT_ALIAS_UART_1_LABEL                       DT_NORDIC_NRF_UARTE_40028000_LABEL
#define DT_NORDIC_NRF_UARTE_UART_1_LABEL            DT_NORDIC_NRF_UARTE_40028000_LABEL
#define DT_INST_0_NORDIC_NRF_UARTE_LABEL            DT_NORDIC_NRF_UARTE_40028000_LABEL
#define DT_INST_0_NORDIC_NRF_UARTE                  1

/*
 * Devicetree node:
 *   /soc/gpiote@40006000
 *
 * Binding (compatible = nordic,nrf-gpiote):
 *   $ZEPHYR_BASE\dts\bindings\gpio\nordic,nrf-gpiote.yaml
 *
 * Dependency Ordinal: 35
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   NRF5 GPIOTE node
 */
#define DT_NORDIC_NRF_GPIOTE_40006000_BASE_ADDRESS  0x40006000
#define DT_ALIAS_GPIOTE_0_BASE_ADDRESS              DT_NORDIC_NRF_GPIOTE_40006000_BASE_ADDRESS
#define DT_NORDIC_NRF_GPIOTE_GPIOTE_0_BASE_ADDRESS  DT_NORDIC_NRF_GPIOTE_40006000_BASE_ADDRESS
#define DT_INST_0_NORDIC_NRF_GPIOTE_BASE_ADDRESS    DT_NORDIC_NRF_GPIOTE_40006000_BASE_ADDRESS
#define DT_NORDIC_NRF_GPIOTE_40006000_SIZE          4096
#define DT_ALIAS_GPIOTE_0_SIZE                      DT_NORDIC_NRF_GPIOTE_40006000_SIZE
#define DT_NORDIC_NRF_GPIOTE_GPIOTE_0_SIZE          DT_NORDIC_NRF_GPIOTE_40006000_SIZE
#define DT_INST_0_NORDIC_NRF_GPIOTE_SIZE            DT_NORDIC_NRF_GPIOTE_40006000_SIZE
#define DT_NORDIC_NRF_GPIOTE_40006000_IRQ_0         6
#define DT_ALIAS_GPIOTE_0_IRQ_0                     DT_NORDIC_NRF_GPIOTE_40006000_IRQ_0
#define DT_NORDIC_NRF_GPIOTE_GPIOTE_0_IRQ_0         DT_NORDIC_NRF_GPIOTE_40006000_IRQ_0
#define DT_INST_0_NORDIC_NRF_GPIOTE_IRQ_0           DT_NORDIC_NRF_GPIOTE_40006000_IRQ_0
#define DT_NORDIC_NRF_GPIOTE_40006000_IRQ_0_PRIORITY 5
#define DT_ALIAS_GPIOTE_0_IRQ_0_PRIORITY            DT_NORDIC_NRF_GPIOTE_40006000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_GPIOTE_GPIOTE_0_IRQ_0_PRIORITY DT_NORDIC_NRF_GPIOTE_40006000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_GPIOTE_IRQ_0_PRIORITY  DT_NORDIC_NRF_GPIOTE_40006000_IRQ_0_PRIORITY
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_GPIOTE_40006000_LABEL         "GPIOTE_0"
#define DT_ALIAS_GPIOTE_0_LABEL                     DT_NORDIC_NRF_GPIOTE_40006000_LABEL
#define DT_NORDIC_NRF_GPIOTE_GPIOTE_0_LABEL         DT_NORDIC_NRF_GPIOTE_40006000_LABEL
#define DT_INST_0_NORDIC_NRF_GPIOTE_LABEL           DT_NORDIC_NRF_GPIOTE_40006000_LABEL
#define DT_INST_0_NORDIC_NRF_GPIOTE                 1

/*
 * Devicetree node:
 *   /soc/gpio@50000000
 *
 * Binding (compatible = nordic,nrf-gpio):
 *   $ZEPHYR_BASE\dts\bindings\gpio\nordic,nrf-gpio.yaml
 *
 * Dependency Ordinal: 4
 *
 * Requires:
 *   3   /soc
 *
 * Supports:
 *   5   /buttons/button_0
 *   6   /buttons/button_1
 *   7   /buttons/button_2
 *   8   /buttons/button_3
 *   14  /leds/led_0
 *   15  /leds/led_1
 *   16  /leds/led_2
 *   17  /leds/led_3
 *
 * Description:
 *   NRF5 GPIO node
 */
#define DT_NORDIC_NRF_GPIO_50000000_BASE_ADDRESS_0  0x50000000
#define DT_ALIAS_GPIO_0_BASE_ADDRESS_0              DT_NORDIC_NRF_GPIO_50000000_BASE_ADDRESS_0
#define DT_NORDIC_NRF_GPIO_GPIO_0_BASE_ADDRESS_0    DT_NORDIC_NRF_GPIO_50000000_BASE_ADDRESS_0
#define DT_INST_0_NORDIC_NRF_GPIO_BASE_ADDRESS_0    DT_NORDIC_NRF_GPIO_50000000_BASE_ADDRESS_0
#define DT_NORDIC_NRF_GPIO_50000000_SIZE_0          512
#define DT_ALIAS_GPIO_0_SIZE_0                      DT_NORDIC_NRF_GPIO_50000000_SIZE_0
#define DT_NORDIC_NRF_GPIO_GPIO_0_SIZE_0            DT_NORDIC_NRF_GPIO_50000000_SIZE_0
#define DT_INST_0_NORDIC_NRF_GPIO_SIZE_0            DT_NORDIC_NRF_GPIO_50000000_SIZE_0
#define DT_NORDIC_NRF_GPIO_50000000_BASE_ADDRESS_1  0x50000500
#define DT_ALIAS_GPIO_0_BASE_ADDRESS_1              DT_NORDIC_NRF_GPIO_50000000_BASE_ADDRESS_1
#define DT_NORDIC_NRF_GPIO_GPIO_0_BASE_ADDRESS_1    DT_NORDIC_NRF_GPIO_50000000_BASE_ADDRESS_1
#define DT_INST_0_NORDIC_NRF_GPIO_BASE_ADDRESS_1    DT_NORDIC_NRF_GPIO_50000000_BASE_ADDRESS_1
#define DT_NORDIC_NRF_GPIO_50000000_SIZE_1          768
#define DT_ALIAS_GPIO_0_SIZE_1                      DT_NORDIC_NRF_GPIO_50000000_SIZE_1
#define DT_NORDIC_NRF_GPIO_GPIO_0_SIZE_1            DT_NORDIC_NRF_GPIO_50000000_SIZE_1
#define DT_INST_0_NORDIC_NRF_GPIO_SIZE_1            DT_NORDIC_NRF_GPIO_50000000_SIZE_1
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_GPIO_50000000_LABEL           "GPIO_0"
#define DT_ALIAS_GPIO_0_LABEL                       DT_NORDIC_NRF_GPIO_50000000_LABEL
#define DT_NORDIC_NRF_GPIO_GPIO_0_LABEL             DT_NORDIC_NRF_GPIO_50000000_LABEL
#define DT_INST_0_NORDIC_NRF_GPIO_LABEL             DT_NORDIC_NRF_GPIO_50000000_LABEL
#define DT_INST_0_NORDIC_NRF_GPIO                   1

/*
 * Devicetree node:
 *   /soc/gpio@50000300
 *
 * Binding (compatible = nordic,nrf-gpio):
 *   $ZEPHYR_BASE\dts\bindings\gpio\nordic,nrf-gpio.yaml
 *
 * Dependency Ordinal: 34
 *
 * Requires:
 *   3   /soc
 *
 * Description:
 *   NRF5 GPIO node
 */
#define DT_NORDIC_NRF_GPIO_50000300_BASE_ADDRESS_0  0x50000300
#define DT_ALIAS_GPIO_1_BASE_ADDRESS_0              DT_NORDIC_NRF_GPIO_50000300_BASE_ADDRESS_0
#define DT_NORDIC_NRF_GPIO_GPIO_1_BASE_ADDRESS_0    DT_NORDIC_NRF_GPIO_50000300_BASE_ADDRESS_0
#define DT_INST_1_NORDIC_NRF_GPIO_BASE_ADDRESS_0    DT_NORDIC_NRF_GPIO_50000300_BASE_ADDRESS_0
#define DT_NORDIC_NRF_GPIO_50000300_SIZE_0          512
#define DT_ALIAS_GPIO_1_SIZE_0                      DT_NORDIC_NRF_GPIO_50000300_SIZE_0
#define DT_NORDIC_NRF_GPIO_GPIO_1_SIZE_0            DT_NORDIC_NRF_GPIO_50000300_SIZE_0
#define DT_INST_1_NORDIC_NRF_GPIO_SIZE_0            DT_NORDIC_NRF_GPIO_50000300_SIZE_0
#define DT_NORDIC_NRF_GPIO_50000300_BASE_ADDRESS_1  0x50000800
#define DT_ALIAS_GPIO_1_BASE_ADDRESS_1              DT_NORDIC_NRF_GPIO_50000300_BASE_ADDRESS_1
#define DT_NORDIC_NRF_GPIO_GPIO_1_BASE_ADDRESS_1    DT_NORDIC_NRF_GPIO_50000300_BASE_ADDRESS_1
#define DT_INST_1_NORDIC_NRF_GPIO_BASE_ADDRESS_1    DT_NORDIC_NRF_GPIO_50000300_BASE_ADDRESS_1
#define DT_NORDIC_NRF_GPIO_50000300_SIZE_1          768
#define DT_ALIAS_GPIO_1_SIZE_1                      DT_NORDIC_NRF_GPIO_50000300_SIZE_1
#define DT_NORDIC_NRF_GPIO_GPIO_1_SIZE_1            DT_NORDIC_NRF_GPIO_50000300_SIZE_1
#define DT_INST_1_NORDIC_NRF_GPIO_SIZE_1            DT_NORDIC_NRF_GPIO_50000300_SIZE_1
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_GPIO_50000300_LABEL           "GPIO_1"
#define DT_ALIAS_GPIO_1_LABEL                       DT_NORDIC_NRF_GPIO_50000300_LABEL
#define DT_NORDIC_NRF_GPIO_GPIO_1_LABEL             DT_NORDIC_NRF_GPIO_50000300_LABEL
#define DT_INST_1_NORDIC_NRF_GPIO_LABEL             DT_NORDIC_NRF_GPIO_50000300_LABEL
#define DT_INST_1_NORDIC_NRF_GPIO                   1

/*
 * Devicetree node:
 *   /soc/i2c@40003000
 *
 * Binding (compatible = nordic,nrf-twi):
 *   $ZEPHYR_BASE\dts\bindings\i2c\nordic,nrf-twi.yaml
 *
 * Dependency Ordinal: 36
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic nRF family TWI (TWI master)
 */
#define DT_NORDIC_NRF_TWI_40003000_BASE_ADDRESS     0x40003000
#define DT_ALIAS_I2C_0_BASE_ADDRESS                 DT_NORDIC_NRF_TWI_40003000_BASE_ADDRESS
#define DT_NORDIC_NRF_TWI_I2C_0_BASE_ADDRESS        DT_NORDIC_NRF_TWI_40003000_BASE_ADDRESS
#define DT_INST_0_NORDIC_NRF_TWI_BASE_ADDRESS       DT_NORDIC_NRF_TWI_40003000_BASE_ADDRESS
#define DT_NORDIC_NRF_TWI_40003000_SIZE             4096
#define DT_ALIAS_I2C_0_SIZE                         DT_NORDIC_NRF_TWI_40003000_SIZE
#define DT_NORDIC_NRF_TWI_I2C_0_SIZE                DT_NORDIC_NRF_TWI_40003000_SIZE
#define DT_INST_0_NORDIC_NRF_TWI_SIZE               DT_NORDIC_NRF_TWI_40003000_SIZE
#define DT_NORDIC_NRF_TWI_40003000_IRQ_0            3
#define DT_ALIAS_I2C_0_IRQ_0                        DT_NORDIC_NRF_TWI_40003000_IRQ_0
#define DT_NORDIC_NRF_TWI_I2C_0_IRQ_0               DT_NORDIC_NRF_TWI_40003000_IRQ_0
#define DT_INST_0_NORDIC_NRF_TWI_IRQ_0              DT_NORDIC_NRF_TWI_40003000_IRQ_0
#define DT_NORDIC_NRF_TWI_40003000_IRQ_0_PRIORITY   1
#define DT_ALIAS_I2C_0_IRQ_0_PRIORITY               DT_NORDIC_NRF_TWI_40003000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_TWI_I2C_0_IRQ_0_PRIORITY      DT_NORDIC_NRF_TWI_40003000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_TWI_IRQ_0_PRIORITY     DT_NORDIC_NRF_TWI_40003000_IRQ_0_PRIORITY
/* SDA pin */
#define DT_NORDIC_NRF_TWI_40003000_SDA_PIN          26
#define DT_ALIAS_I2C_0_SDA_PIN                      DT_NORDIC_NRF_TWI_40003000_SDA_PIN
#define DT_NORDIC_NRF_TWI_I2C_0_SDA_PIN             DT_NORDIC_NRF_TWI_40003000_SDA_PIN
#define DT_INST_0_NORDIC_NRF_TWI_SDA_PIN            DT_NORDIC_NRF_TWI_40003000_SDA_PIN
/* SCL pin */
#define DT_NORDIC_NRF_TWI_40003000_SCL_PIN          27
#define DT_ALIAS_I2C_0_SCL_PIN                      DT_NORDIC_NRF_TWI_40003000_SCL_PIN
#define DT_NORDIC_NRF_TWI_I2C_0_SCL_PIN             DT_NORDIC_NRF_TWI_40003000_SCL_PIN
#define DT_INST_0_NORDIC_NRF_TWI_SCL_PIN            DT_NORDIC_NRF_TWI_40003000_SCL_PIN
/* Initial clock frequency in Hz */
#define DT_NORDIC_NRF_TWI_40003000_CLOCK_FREQUENCY  100000
#define DT_ALIAS_I2C_0_CLOCK_FREQUENCY              DT_NORDIC_NRF_TWI_40003000_CLOCK_FREQUENCY
#define DT_NORDIC_NRF_TWI_I2C_0_CLOCK_FREQUENCY     DT_NORDIC_NRF_TWI_40003000_CLOCK_FREQUENCY
#define DT_INST_0_NORDIC_NRF_TWI_CLOCK_FREQUENCY    DT_NORDIC_NRF_TWI_40003000_CLOCK_FREQUENCY
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_TWI_40003000_LABEL            "I2C_0"
#define DT_ALIAS_I2C_0_LABEL                        DT_NORDIC_NRF_TWI_40003000_LABEL
#define DT_NORDIC_NRF_TWI_I2C_0_LABEL               DT_NORDIC_NRF_TWI_40003000_LABEL
#define DT_INST_0_NORDIC_NRF_TWI_LABEL              DT_NORDIC_NRF_TWI_40003000_LABEL
#define DT_INST_0_NORDIC_NRF_TWI                    1

/*
 * Devicetree node:
 *   /soc/pwm@4001c000
 *
 * Binding (compatible = nordic,nrf-pwm):
 *   $ZEPHYR_BASE\dts\bindings\pwm\nordic,nrf-pwm.yaml
 *
 * Dependency Ordinal: 20
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Supports:
 *   21  /pwmleds/pwm_led_0
 *
 * Description:
 *   nRF PWM
 */
#define DT_NORDIC_NRF_PWM_4001C000_BASE_ADDRESS     0x4001c000
#define DT_ALIAS_PWM_0_BASE_ADDRESS                 DT_NORDIC_NRF_PWM_4001C000_BASE_ADDRESS
#define DT_NORDIC_NRF_PWM_PWM_0_BASE_ADDRESS        DT_NORDIC_NRF_PWM_4001C000_BASE_ADDRESS
#define DT_INST_0_NORDIC_NRF_PWM_BASE_ADDRESS       DT_NORDIC_NRF_PWM_4001C000_BASE_ADDRESS
#define DT_NORDIC_NRF_PWM_4001C000_SIZE             4096
#define DT_ALIAS_PWM_0_SIZE                         DT_NORDIC_NRF_PWM_4001C000_SIZE
#define DT_NORDIC_NRF_PWM_PWM_0_SIZE                DT_NORDIC_NRF_PWM_4001C000_SIZE
#define DT_INST_0_NORDIC_NRF_PWM_SIZE               DT_NORDIC_NRF_PWM_4001C000_SIZE
#define DT_NORDIC_NRF_PWM_4001C000_IRQ_0            28
#define DT_ALIAS_PWM_0_IRQ_0                        DT_NORDIC_NRF_PWM_4001C000_IRQ_0
#define DT_NORDIC_NRF_PWM_PWM_0_IRQ_0               DT_NORDIC_NRF_PWM_4001C000_IRQ_0
#define DT_INST_0_NORDIC_NRF_PWM_IRQ_0              DT_NORDIC_NRF_PWM_4001C000_IRQ_0
#define DT_NORDIC_NRF_PWM_4001C000_IRQ_0_PRIORITY   1
#define DT_ALIAS_PWM_0_IRQ_0_PRIORITY               DT_NORDIC_NRF_PWM_4001C000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_PWM_PWM_0_IRQ_0_PRIORITY      DT_NORDIC_NRF_PWM_4001C000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_PWM_IRQ_0_PRIORITY     DT_NORDIC_NRF_PWM_4001C000_IRQ_0_PRIORITY
/* Use center-aligned (up and down) counter mode */
#define DT_NORDIC_NRF_PWM_4001C000_CENTER_ALIGNED   0
#define DT_ALIAS_PWM_0_CENTER_ALIGNED               DT_NORDIC_NRF_PWM_4001C000_CENTER_ALIGNED
#define DT_NORDIC_NRF_PWM_PWM_0_CENTER_ALIGNED      DT_NORDIC_NRF_PWM_4001C000_CENTER_ALIGNED
#define DT_INST_0_NORDIC_NRF_PWM_CENTER_ALIGNED     DT_NORDIC_NRF_PWM_4001C000_CENTER_ALIGNED
/* Channel 0 pin */
#define DT_NORDIC_NRF_PWM_4001C000_CH0_PIN          13
#define DT_ALIAS_PWM_0_CH0_PIN                      DT_NORDIC_NRF_PWM_4001C000_CH0_PIN
#define DT_NORDIC_NRF_PWM_PWM_0_CH0_PIN             DT_NORDIC_NRF_PWM_4001C000_CH0_PIN
#define DT_INST_0_NORDIC_NRF_PWM_CH0_PIN            DT_NORDIC_NRF_PWM_4001C000_CH0_PIN
/* Channel 0 inverted */
#define DT_NORDIC_NRF_PWM_4001C000_CH0_INVERTED     1
#define DT_ALIAS_PWM_0_CH0_INVERTED                 DT_NORDIC_NRF_PWM_4001C000_CH0_INVERTED
#define DT_NORDIC_NRF_PWM_PWM_0_CH0_INVERTED        DT_NORDIC_NRF_PWM_4001C000_CH0_INVERTED
#define DT_INST_0_NORDIC_NRF_PWM_CH0_INVERTED       DT_NORDIC_NRF_PWM_4001C000_CH0_INVERTED
/* Channel 1 inverted */
#define DT_NORDIC_NRF_PWM_4001C000_CH1_INVERTED     0
#define DT_ALIAS_PWM_0_CH1_INVERTED                 DT_NORDIC_NRF_PWM_4001C000_CH1_INVERTED
#define DT_NORDIC_NRF_PWM_PWM_0_CH1_INVERTED        DT_NORDIC_NRF_PWM_4001C000_CH1_INVERTED
#define DT_INST_0_NORDIC_NRF_PWM_CH1_INVERTED       DT_NORDIC_NRF_PWM_4001C000_CH1_INVERTED
/* Channel 2 inverted */
#define DT_NORDIC_NRF_PWM_4001C000_CH2_INVERTED     0
#define DT_ALIAS_PWM_0_CH2_INVERTED                 DT_NORDIC_NRF_PWM_4001C000_CH2_INVERTED
#define DT_NORDIC_NRF_PWM_PWM_0_CH2_INVERTED        DT_NORDIC_NRF_PWM_4001C000_CH2_INVERTED
#define DT_INST_0_NORDIC_NRF_PWM_CH2_INVERTED       DT_NORDIC_NRF_PWM_4001C000_CH2_INVERTED
/* Channel 3 inverted */
#define DT_NORDIC_NRF_PWM_4001C000_CH3_INVERTED     0
#define DT_ALIAS_PWM_0_CH3_INVERTED                 DT_NORDIC_NRF_PWM_4001C000_CH3_INVERTED
#define DT_NORDIC_NRF_PWM_PWM_0_CH3_INVERTED        DT_NORDIC_NRF_PWM_4001C000_CH3_INVERTED
#define DT_INST_0_NORDIC_NRF_PWM_CH3_INVERTED       DT_NORDIC_NRF_PWM_4001C000_CH3_INVERTED
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_PWM_4001C000_LABEL            "PWM_0"
#define DT_ALIAS_PWM_0_LABEL                        DT_NORDIC_NRF_PWM_4001C000_LABEL
#define DT_NORDIC_NRF_PWM_PWM_0_LABEL               DT_NORDIC_NRF_PWM_4001C000_LABEL
#define DT_INST_0_NORDIC_NRF_PWM_LABEL              DT_NORDIC_NRF_PWM_4001C000_LABEL
#define DT_INST_0_NORDIC_NRF_PWM                    1

/*
 * Devicetree node:
 *   /soc/spi@40004000
 *
 * Binding (compatible = nordic,nrf-spi):
 *   $ZEPHYR_BASE\dts\bindings\spi\nordic,nrf-spi.yaml
 *
 * Dependency Ordinal: 49
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic nRF family SPI (SPI master)
 */
#define DT_NORDIC_NRF_SPI_40004000_BASE_ADDRESS     0x40004000
#define DT_ALIAS_SPI_1_BASE_ADDRESS                 DT_NORDIC_NRF_SPI_40004000_BASE_ADDRESS
#define DT_NORDIC_NRF_SPI_SPI_1_BASE_ADDRESS        DT_NORDIC_NRF_SPI_40004000_BASE_ADDRESS
#define DT_INST_0_NORDIC_NRF_SPI_BASE_ADDRESS       DT_NORDIC_NRF_SPI_40004000_BASE_ADDRESS
#define DT_NORDIC_NRF_SPI_40004000_SIZE             4096
#define DT_ALIAS_SPI_1_SIZE                         DT_NORDIC_NRF_SPI_40004000_SIZE
#define DT_NORDIC_NRF_SPI_SPI_1_SIZE                DT_NORDIC_NRF_SPI_40004000_SIZE
#define DT_INST_0_NORDIC_NRF_SPI_SIZE               DT_NORDIC_NRF_SPI_40004000_SIZE
#define DT_NORDIC_NRF_SPI_40004000_IRQ_0            4
#define DT_ALIAS_SPI_1_IRQ_0                        DT_NORDIC_NRF_SPI_40004000_IRQ_0
#define DT_NORDIC_NRF_SPI_SPI_1_IRQ_0               DT_NORDIC_NRF_SPI_40004000_IRQ_0
#define DT_INST_0_NORDIC_NRF_SPI_IRQ_0              DT_NORDIC_NRF_SPI_40004000_IRQ_0
#define DT_NORDIC_NRF_SPI_40004000_IRQ_0_PRIORITY   1
#define DT_ALIAS_SPI_1_IRQ_0_PRIORITY               DT_NORDIC_NRF_SPI_40004000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_SPI_SPI_1_IRQ_0_PRIORITY      DT_NORDIC_NRF_SPI_40004000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_SPI_IRQ_0_PRIORITY     DT_NORDIC_NRF_SPI_40004000_IRQ_0_PRIORITY
/* Enable pull-up on MISO line */
#define DT_NORDIC_NRF_SPI_40004000_MISO_PULL_UP     0
#define DT_ALIAS_SPI_1_MISO_PULL_UP                 DT_NORDIC_NRF_SPI_40004000_MISO_PULL_UP
#define DT_NORDIC_NRF_SPI_SPI_1_MISO_PULL_UP        DT_NORDIC_NRF_SPI_40004000_MISO_PULL_UP
#define DT_INST_0_NORDIC_NRF_SPI_MISO_PULL_UP       DT_NORDIC_NRF_SPI_40004000_MISO_PULL_UP
/* Enable pull-down on MISO line */
#define DT_NORDIC_NRF_SPI_40004000_MISO_PULL_DOWN   0
#define DT_ALIAS_SPI_1_MISO_PULL_DOWN               DT_NORDIC_NRF_SPI_40004000_MISO_PULL_DOWN
#define DT_NORDIC_NRF_SPI_SPI_1_MISO_PULL_DOWN      DT_NORDIC_NRF_SPI_40004000_MISO_PULL_DOWN
#define DT_INST_0_NORDIC_NRF_SPI_MISO_PULL_DOWN     DT_NORDIC_NRF_SPI_40004000_MISO_PULL_DOWN
/* SCK pin */
#define DT_NORDIC_NRF_SPI_40004000_SCK_PIN          31
#define DT_ALIAS_SPI_1_SCK_PIN                      DT_NORDIC_NRF_SPI_40004000_SCK_PIN
#define DT_NORDIC_NRF_SPI_SPI_1_SCK_PIN             DT_NORDIC_NRF_SPI_40004000_SCK_PIN
#define DT_INST_0_NORDIC_NRF_SPI_SCK_PIN            DT_NORDIC_NRF_SPI_40004000_SCK_PIN
/* MOSI pin */
#define DT_NORDIC_NRF_SPI_40004000_MOSI_PIN         30
#define DT_ALIAS_SPI_1_MOSI_PIN                     DT_NORDIC_NRF_SPI_40004000_MOSI_PIN
#define DT_NORDIC_NRF_SPI_SPI_1_MOSI_PIN            DT_NORDIC_NRF_SPI_40004000_MOSI_PIN
#define DT_INST_0_NORDIC_NRF_SPI_MOSI_PIN           DT_NORDIC_NRF_SPI_40004000_MOSI_PIN
/* MISO pin */
#define DT_NORDIC_NRF_SPI_40004000_MISO_PIN         40
#define DT_ALIAS_SPI_1_MISO_PIN                     DT_NORDIC_NRF_SPI_40004000_MISO_PIN
#define DT_NORDIC_NRF_SPI_SPI_1_MISO_PIN            DT_NORDIC_NRF_SPI_40004000_MISO_PIN
#define DT_INST_0_NORDIC_NRF_SPI_MISO_PIN           DT_NORDIC_NRF_SPI_40004000_MISO_PIN
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_SPI_40004000_LABEL            "SPI_1"
#define DT_ALIAS_SPI_1_LABEL                        DT_NORDIC_NRF_SPI_40004000_LABEL
#define DT_NORDIC_NRF_SPI_SPI_1_LABEL               DT_NORDIC_NRF_SPI_40004000_LABEL
#define DT_INST_0_NORDIC_NRF_SPI_LABEL              DT_NORDIC_NRF_SPI_40004000_LABEL
#define DT_INST_0_NORDIC_NRF_SPI                    1

/*
 * Devicetree node:
 *   /soc/spi@40023000
 *
 * Binding (compatible = nordic,nrf-spi):
 *   $ZEPHYR_BASE\dts\bindings\spi\nordic,nrf-spi.yaml
 *
 * Dependency Ordinal: 50
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic nRF family SPI (SPI master)
 */
#define DT_NORDIC_NRF_SPI_40023000_BASE_ADDRESS     0x40023000
#define DT_ALIAS_SPI_2_BASE_ADDRESS                 DT_NORDIC_NRF_SPI_40023000_BASE_ADDRESS
#define DT_NORDIC_NRF_SPI_SPI_2_BASE_ADDRESS        DT_NORDIC_NRF_SPI_40023000_BASE_ADDRESS
#define DT_INST_1_NORDIC_NRF_SPI_BASE_ADDRESS       DT_NORDIC_NRF_SPI_40023000_BASE_ADDRESS
#define DT_NORDIC_NRF_SPI_40023000_SIZE             4096
#define DT_ALIAS_SPI_2_SIZE                         DT_NORDIC_NRF_SPI_40023000_SIZE
#define DT_NORDIC_NRF_SPI_SPI_2_SIZE                DT_NORDIC_NRF_SPI_40023000_SIZE
#define DT_INST_1_NORDIC_NRF_SPI_SIZE               DT_NORDIC_NRF_SPI_40023000_SIZE
#define DT_NORDIC_NRF_SPI_40023000_IRQ_0            35
#define DT_ALIAS_SPI_2_IRQ_0                        DT_NORDIC_NRF_SPI_40023000_IRQ_0
#define DT_NORDIC_NRF_SPI_SPI_2_IRQ_0               DT_NORDIC_NRF_SPI_40023000_IRQ_0
#define DT_INST_1_NORDIC_NRF_SPI_IRQ_0              DT_NORDIC_NRF_SPI_40023000_IRQ_0
#define DT_NORDIC_NRF_SPI_40023000_IRQ_0_PRIORITY   1
#define DT_ALIAS_SPI_2_IRQ_0_PRIORITY               DT_NORDIC_NRF_SPI_40023000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_SPI_SPI_2_IRQ_0_PRIORITY      DT_NORDIC_NRF_SPI_40023000_IRQ_0_PRIORITY
#define DT_INST_1_NORDIC_NRF_SPI_IRQ_0_PRIORITY     DT_NORDIC_NRF_SPI_40023000_IRQ_0_PRIORITY
/* Enable pull-up on MISO line */
#define DT_NORDIC_NRF_SPI_40023000_MISO_PULL_UP     0
#define DT_ALIAS_SPI_2_MISO_PULL_UP                 DT_NORDIC_NRF_SPI_40023000_MISO_PULL_UP
#define DT_NORDIC_NRF_SPI_SPI_2_MISO_PULL_UP        DT_NORDIC_NRF_SPI_40023000_MISO_PULL_UP
#define DT_INST_1_NORDIC_NRF_SPI_MISO_PULL_UP       DT_NORDIC_NRF_SPI_40023000_MISO_PULL_UP
/* Enable pull-down on MISO line */
#define DT_NORDIC_NRF_SPI_40023000_MISO_PULL_DOWN   0
#define DT_ALIAS_SPI_2_MISO_PULL_DOWN               DT_NORDIC_NRF_SPI_40023000_MISO_PULL_DOWN
#define DT_NORDIC_NRF_SPI_SPI_2_MISO_PULL_DOWN      DT_NORDIC_NRF_SPI_40023000_MISO_PULL_DOWN
#define DT_INST_1_NORDIC_NRF_SPI_MISO_PULL_DOWN     DT_NORDIC_NRF_SPI_40023000_MISO_PULL_DOWN
/* SCK pin */
#define DT_NORDIC_NRF_SPI_40023000_SCK_PIN          42
#define DT_ALIAS_SPI_2_SCK_PIN                      DT_NORDIC_NRF_SPI_40023000_SCK_PIN
#define DT_NORDIC_NRF_SPI_SPI_2_SCK_PIN             DT_NORDIC_NRF_SPI_40023000_SCK_PIN
#define DT_INST_1_NORDIC_NRF_SPI_SCK_PIN            DT_NORDIC_NRF_SPI_40023000_SCK_PIN
/* MOSI pin */
#define DT_NORDIC_NRF_SPI_40023000_MOSI_PIN         43
#define DT_ALIAS_SPI_2_MOSI_PIN                     DT_NORDIC_NRF_SPI_40023000_MOSI_PIN
#define DT_NORDIC_NRF_SPI_SPI_2_MOSI_PIN            DT_NORDIC_NRF_SPI_40023000_MOSI_PIN
#define DT_INST_1_NORDIC_NRF_SPI_MOSI_PIN           DT_NORDIC_NRF_SPI_40023000_MOSI_PIN
/* MISO pin */
#define DT_NORDIC_NRF_SPI_40023000_MISO_PIN         44
#define DT_ALIAS_SPI_2_MISO_PIN                     DT_NORDIC_NRF_SPI_40023000_MISO_PIN
#define DT_NORDIC_NRF_SPI_SPI_2_MISO_PIN            DT_NORDIC_NRF_SPI_40023000_MISO_PIN
#define DT_INST_1_NORDIC_NRF_SPI_MISO_PIN           DT_NORDIC_NRF_SPI_40023000_MISO_PIN
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_SPI_40023000_LABEL            "SPI_2"
#define DT_ALIAS_SPI_2_LABEL                        DT_NORDIC_NRF_SPI_40023000_LABEL
#define DT_NORDIC_NRF_SPI_SPI_2_LABEL               DT_NORDIC_NRF_SPI_40023000_LABEL
#define DT_INST_1_NORDIC_NRF_SPI_LABEL              DT_NORDIC_NRF_SPI_40023000_LABEL
#define DT_INST_1_NORDIC_NRF_SPI                    1

/*
 * Devicetree node:
 *   /soc/spi@4002f000
 *
 * Binding (compatible = nordic,nrf-spim):
 *   $ZEPHYR_BASE\dts\bindings\spi\nordic,nrf-spim.yaml
 *
 * Dependency Ordinal: 51
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic nRF family SPIM (SPI master with EasyDMA)
 */
#define DT_NORDIC_NRF_SPIM_4002F000_BASE_ADDRESS    0x4002f000
#define DT_ALIAS_SPI_3_BASE_ADDRESS                 DT_NORDIC_NRF_SPIM_4002F000_BASE_ADDRESS
#define DT_NORDIC_NRF_SPIM_SPI_3_BASE_ADDRESS       DT_NORDIC_NRF_SPIM_4002F000_BASE_ADDRESS
#define DT_INST_0_NORDIC_NRF_SPIM_BASE_ADDRESS      DT_NORDIC_NRF_SPIM_4002F000_BASE_ADDRESS
#define DT_NORDIC_NRF_SPIM_4002F000_SIZE            4096
#define DT_ALIAS_SPI_3_SIZE                         DT_NORDIC_NRF_SPIM_4002F000_SIZE
#define DT_NORDIC_NRF_SPIM_SPI_3_SIZE               DT_NORDIC_NRF_SPIM_4002F000_SIZE
#define DT_INST_0_NORDIC_NRF_SPIM_SIZE              DT_NORDIC_NRF_SPIM_4002F000_SIZE
#define DT_NORDIC_NRF_SPIM_4002F000_IRQ_0           47
#define DT_ALIAS_SPI_3_IRQ_0                        DT_NORDIC_NRF_SPIM_4002F000_IRQ_0
#define DT_NORDIC_NRF_SPIM_SPI_3_IRQ_0              DT_NORDIC_NRF_SPIM_4002F000_IRQ_0
#define DT_INST_0_NORDIC_NRF_SPIM_IRQ_0             DT_NORDIC_NRF_SPIM_4002F000_IRQ_0
#define DT_NORDIC_NRF_SPIM_4002F000_IRQ_0_PRIORITY  1
#define DT_ALIAS_SPI_3_IRQ_0_PRIORITY               DT_NORDIC_NRF_SPIM_4002F000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_SPIM_SPI_3_IRQ_0_PRIORITY     DT_NORDIC_NRF_SPIM_4002F000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_SPIM_IRQ_0_PRIORITY    DT_NORDIC_NRF_SPIM_4002F000_IRQ_0_PRIORITY
/* Enable pull-up on MISO line */
#define DT_NORDIC_NRF_SPIM_4002F000_MISO_PULL_UP    0
#define DT_ALIAS_SPI_3_MISO_PULL_UP                 DT_NORDIC_NRF_SPIM_4002F000_MISO_PULL_UP
#define DT_NORDIC_NRF_SPIM_SPI_3_MISO_PULL_UP       DT_NORDIC_NRF_SPIM_4002F000_MISO_PULL_UP
#define DT_INST_0_NORDIC_NRF_SPIM_MISO_PULL_UP      DT_NORDIC_NRF_SPIM_4002F000_MISO_PULL_UP
/* Enable pull-down on MISO line */
#define DT_NORDIC_NRF_SPIM_4002F000_MISO_PULL_DOWN  0
#define DT_ALIAS_SPI_3_MISO_PULL_DOWN               DT_NORDIC_NRF_SPIM_4002F000_MISO_PULL_DOWN
#define DT_NORDIC_NRF_SPIM_SPI_3_MISO_PULL_DOWN     DT_NORDIC_NRF_SPIM_4002F000_MISO_PULL_DOWN
#define DT_INST_0_NORDIC_NRF_SPIM_MISO_PULL_DOWN    DT_NORDIC_NRF_SPIM_4002F000_MISO_PULL_DOWN
/* SCK pin */
#define DT_NORDIC_NRF_SPIM_4002F000_SCK_PIN         47
#define DT_ALIAS_SPI_3_SCK_PIN                      DT_NORDIC_NRF_SPIM_4002F000_SCK_PIN
#define DT_NORDIC_NRF_SPIM_SPI_3_SCK_PIN            DT_NORDIC_NRF_SPIM_4002F000_SCK_PIN
#define DT_INST_0_NORDIC_NRF_SPIM_SCK_PIN           DT_NORDIC_NRF_SPIM_4002F000_SCK_PIN
/* MOSI pin */
#define DT_NORDIC_NRF_SPIM_4002F000_MOSI_PIN        45
#define DT_ALIAS_SPI_3_MOSI_PIN                     DT_NORDIC_NRF_SPIM_4002F000_MOSI_PIN
#define DT_NORDIC_NRF_SPIM_SPI_3_MOSI_PIN           DT_NORDIC_NRF_SPIM_4002F000_MOSI_PIN
#define DT_INST_0_NORDIC_NRF_SPIM_MOSI_PIN          DT_NORDIC_NRF_SPIM_4002F000_MOSI_PIN
/* MISO pin */
#define DT_NORDIC_NRF_SPIM_4002F000_MISO_PIN        46
#define DT_ALIAS_SPI_3_MISO_PIN                     DT_NORDIC_NRF_SPIM_4002F000_MISO_PIN
#define DT_NORDIC_NRF_SPIM_SPI_3_MISO_PIN           DT_NORDIC_NRF_SPIM_4002F000_MISO_PIN
#define DT_INST_0_NORDIC_NRF_SPIM_MISO_PIN          DT_NORDIC_NRF_SPIM_4002F000_MISO_PIN
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_SPIM_4002F000_LABEL           "SPI_3"
#define DT_ALIAS_SPI_3_LABEL                        DT_NORDIC_NRF_SPIM_4002F000_LABEL
#define DT_NORDIC_NRF_SPIM_SPI_3_LABEL              DT_NORDIC_NRF_SPIM_4002F000_LABEL
#define DT_INST_0_NORDIC_NRF_SPIM_LABEL             DT_NORDIC_NRF_SPIM_4002F000_LABEL
#define DT_INST_0_NORDIC_NRF_SPIM                   1

/*
 * Devicetree node:
 *   /soc/qspi@40029000
 *
 * Binding (compatible = nordic,nrf-qspi):
 *   $ZEPHYR_BASE\dts\bindings\flash_controller\nordic,nrf-qspi.yaml
 *
 * Dependency Ordinal: 43
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Supports:
 *   44  /soc/qspi@40029000/mx25r6435f@0
 *
 * Description:
 *   Properties defining the interface for the Nordic QSPI peripheral.
 */
#define DT_NORDIC_NRF_QSPI_40029000_BASE_ADDRESS    0x40029000
#define DT_ALIAS_QSPI_0_BASE_ADDRESS                DT_NORDIC_NRF_QSPI_40029000_BASE_ADDRESS
#define DT_NORDIC_NRF_QSPI_QSPI_0_BASE_ADDRESS      DT_NORDIC_NRF_QSPI_40029000_BASE_ADDRESS
#define DT_INST_0_NORDIC_NRF_QSPI_BASE_ADDRESS      DT_NORDIC_NRF_QSPI_40029000_BASE_ADDRESS
#define DT_NORDIC_NRF_QSPI_40029000_SIZE            4096
#define DT_ALIAS_QSPI_0_SIZE                        DT_NORDIC_NRF_QSPI_40029000_SIZE
#define DT_NORDIC_NRF_QSPI_QSPI_0_SIZE              DT_NORDIC_NRF_QSPI_40029000_SIZE
#define DT_INST_0_NORDIC_NRF_QSPI_SIZE              DT_NORDIC_NRF_QSPI_40029000_SIZE
#define DT_NORDIC_NRF_QSPI_40029000_IRQ_0           41
#define DT_ALIAS_QSPI_0_IRQ_0                       DT_NORDIC_NRF_QSPI_40029000_IRQ_0
#define DT_NORDIC_NRF_QSPI_QSPI_0_IRQ_0             DT_NORDIC_NRF_QSPI_40029000_IRQ_0
#define DT_INST_0_NORDIC_NRF_QSPI_IRQ_0             DT_NORDIC_NRF_QSPI_40029000_IRQ_0
#define DT_NORDIC_NRF_QSPI_40029000_IRQ_0_PRIORITY  1
#define DT_ALIAS_QSPI_0_IRQ_0_PRIORITY              DT_NORDIC_NRF_QSPI_40029000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_QSPI_QSPI_0_IRQ_0_PRIORITY    DT_NORDIC_NRF_QSPI_40029000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_QSPI_IRQ_0_PRIORITY    DT_NORDIC_NRF_QSPI_40029000_IRQ_0_PRIORITY
/* Pin number associated with serial clock pin */
#define DT_NORDIC_NRF_QSPI_40029000_SCK_PIN         19
#define DT_ALIAS_QSPI_0_SCK_PIN                     DT_NORDIC_NRF_QSPI_40029000_SCK_PIN
#define DT_NORDIC_NRF_QSPI_QSPI_0_SCK_PIN           DT_NORDIC_NRF_QSPI_40029000_SCK_PIN
#define DT_INST_0_NORDIC_NRF_QSPI_SCK_PIN           DT_NORDIC_NRF_QSPI_40029000_SCK_PIN
/* Pin numbers associated with IO0 through IO3 signals */
#define DT_NORDIC_NRF_QSPI_40029000_IO_PINS_0       20
#define DT_ALIAS_QSPI_0_IO_PINS_0                   DT_NORDIC_NRF_QSPI_40029000_IO_PINS_0
#define DT_NORDIC_NRF_QSPI_QSPI_0_IO_PINS_0         DT_NORDIC_NRF_QSPI_40029000_IO_PINS_0
#define DT_INST_0_NORDIC_NRF_QSPI_IO_PINS_0         DT_NORDIC_NRF_QSPI_40029000_IO_PINS_0
#define DT_NORDIC_NRF_QSPI_40029000_IO_PINS_1       21
#define DT_ALIAS_QSPI_0_IO_PINS_1                   DT_NORDIC_NRF_QSPI_40029000_IO_PINS_1
#define DT_NORDIC_NRF_QSPI_QSPI_0_IO_PINS_1         DT_NORDIC_NRF_QSPI_40029000_IO_PINS_1
#define DT_INST_0_NORDIC_NRF_QSPI_IO_PINS_1         DT_NORDIC_NRF_QSPI_40029000_IO_PINS_1
#define DT_NORDIC_NRF_QSPI_40029000_IO_PINS_2       22
#define DT_ALIAS_QSPI_0_IO_PINS_2                   DT_NORDIC_NRF_QSPI_40029000_IO_PINS_2
#define DT_NORDIC_NRF_QSPI_QSPI_0_IO_PINS_2         DT_NORDIC_NRF_QSPI_40029000_IO_PINS_2
#define DT_INST_0_NORDIC_NRF_QSPI_IO_PINS_2         DT_NORDIC_NRF_QSPI_40029000_IO_PINS_2
#define DT_NORDIC_NRF_QSPI_40029000_IO_PINS_3       23
#define DT_ALIAS_QSPI_0_IO_PINS_3                   DT_NORDIC_NRF_QSPI_40029000_IO_PINS_3
#define DT_NORDIC_NRF_QSPI_QSPI_0_IO_PINS_3         DT_NORDIC_NRF_QSPI_40029000_IO_PINS_3
#define DT_INST_0_NORDIC_NRF_QSPI_IO_PINS_3         DT_NORDIC_NRF_QSPI_40029000_IO_PINS_3
#define DT_NORDIC_NRF_QSPI_40029000_IO_PINS         {20, 21, 22, 23}
#define DT_ALIAS_QSPI_0_IO_PINS                     DT_NORDIC_NRF_QSPI_40029000_IO_PINS
#define DT_NORDIC_NRF_QSPI_QSPI_0_IO_PINS           DT_NORDIC_NRF_QSPI_40029000_IO_PINS
#define DT_INST_0_NORDIC_NRF_QSPI_IO_PINS           DT_NORDIC_NRF_QSPI_40029000_IO_PINS
/* Pin numbers associated with chip-select signals */
#define DT_NORDIC_NRF_QSPI_40029000_CSN_PINS_0      17
#define DT_ALIAS_QSPI_0_CSN_PINS_0                  DT_NORDIC_NRF_QSPI_40029000_CSN_PINS_0
#define DT_NORDIC_NRF_QSPI_QSPI_0_CSN_PINS_0        DT_NORDIC_NRF_QSPI_40029000_CSN_PINS_0
#define DT_INST_0_NORDIC_NRF_QSPI_CSN_PINS_0        DT_NORDIC_NRF_QSPI_40029000_CSN_PINS_0
#define DT_NORDIC_NRF_QSPI_40029000_CSN_PINS        {17}
#define DT_ALIAS_QSPI_0_CSN_PINS                    DT_NORDIC_NRF_QSPI_40029000_CSN_PINS
#define DT_NORDIC_NRF_QSPI_QSPI_0_CSN_PINS          DT_NORDIC_NRF_QSPI_40029000_CSN_PINS
#define DT_INST_0_NORDIC_NRF_QSPI_CSN_PINS          DT_NORDIC_NRF_QSPI_40029000_CSN_PINS
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_QSPI_40029000_LABEL           "QSPI"
#define DT_ALIAS_QSPI_0_LABEL                       DT_NORDIC_NRF_QSPI_40029000_LABEL
#define DT_NORDIC_NRF_QSPI_QSPI_0_LABEL             DT_NORDIC_NRF_QSPI_40029000_LABEL
#define DT_INST_0_NORDIC_NRF_QSPI_LABEL             DT_NORDIC_NRF_QSPI_40029000_LABEL
#define DT_INST_0_NORDIC_NRF_QSPI                   1

/*
 * Devicetree node:
 *   /soc/qspi@40029000/mx25r6435f@0
 *
 * Binding (compatible = nordic,qspi-nor):
 *   $ZEPHYR_BASE\dts\bindings\mtd\nordic,qspi-nor.yaml
 *
 * Dependency Ordinal: 44
 *
 * Requires:
 *   43  /soc/qspi@40029000
 *
 * Description:
 *   QSPI NOR flash supporting the JEDEC CFI interface.
 */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_BASE_ADDRESS 0x0
#define DT_INST_0_NORDIC_QSPI_NOR_BASE_ADDRESS      DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_BASE_ADDRESS
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_LABEL "MX25R64"
#define DT_INST_0_NORDIC_QSPI_NOR_LABEL             DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_LABEL
/*
 * Specify the number of data lines and opcode used for reading.
 * If not provided fastread will be selected.
 */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_READOC "read4io"
#define DT_INST_0_NORDIC_QSPI_NOR_READOC            DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_READOC
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_READOC_ENUM 4
#define DT_INST_0_NORDIC_QSPI_NOR_READOC_ENUM       DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_READOC_ENUM
/*
 * Specify the number of data lines and opcode used for reading.
 * If not provided pp will be selected.
 */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_WRITEOC "pp4io"
#define DT_INST_0_NORDIC_QSPI_NOR_WRITEOC           DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_WRITEOC
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_WRITEOC_ENUM 3
#define DT_INST_0_NORDIC_QSPI_NOR_WRITEOC_ENUM      DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_WRITEOC_ENUM
/*
 * Set to indicate that 32-bit addressing is to be used.
 * If not specified 24-bit addressing will be used.
 */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_ADDRESS_SIZE_32 0
#define DT_INST_0_NORDIC_QSPI_NOR_ADDRESS_SIZE_32   DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_ADDRESS_SIZE_32
/*
 * Set to indicate that the write opcode operates on 512-byte pages.
 * If not specified the write opcode operates on 256-byte pages.
 */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_PPSIZE_512 0
#define DT_INST_0_NORDIC_QSPI_NOR_PPSIZE_512        DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_PPSIZE_512
/*
 * Number of clock cycles CSn must be asserted before it can go low
 * again, specified in nanoseconds.
 */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_SCK_DELAY 0
#define DT_INST_0_NORDIC_QSPI_NOR_SCK_DELAY         DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_SCK_DELAY
/*
 * Set to indicate phase starts with asserted half-phase (CPHA=1).
 * For this driver using this property requires also using cpol.
 */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_CPHA 0
#define DT_INST_0_NORDIC_QSPI_NOR_CPHA              DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_CPHA
/*
 * Set to indicate clock leading edge is falling (CPOL=1).
 * For this driver using this property requires also using cpha.
 */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_CPOL 0
#define DT_INST_0_NORDIC_QSPI_NOR_CPOL              DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_CPOL
/* Maximum clock speed supported by the device, in Hz. */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_SCK_FREQUENCY 8000000
#define DT_INST_0_NORDIC_QSPI_NOR_SCK_FREQUENCY     DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_SCK_FREQUENCY
/* JEDEC ID as manufacturer ID, memory type, memory density */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_JEDEC_ID {0xc2, 0x28, 0x17}
#define DT_INST_0_NORDIC_QSPI_NOR_JEDEC_ID          DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_JEDEC_ID
/* Indicates the device supports the BE32K (0xD8) command */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_HAS_BE32K 1
#define DT_INST_0_NORDIC_QSPI_NOR_HAS_BE32K         DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_HAS_BE32K
/*
 * Indicates the device requires the ULBPR (0x98) command.
 *
 * Some flash chips such as the Microchip SST26VF series have a block
 * protection register that initializes to write-protected.  Use this
 * property to indicate that the BPR must be unlocked before write
 * operations can proceed.
 */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_REQUIRES_ULBPR 0
#define DT_INST_0_NORDIC_QSPI_NOR_REQUIRES_ULBPR    DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_REQUIRES_ULBPR
/*
 * Indicates the device supports the DPD (0xB9) command.
 *
 * Use this property to indicate the flash chip supports the Deep
 * Power-Down mode that is entered by command 0xB9 to reduce power
 * consumption below normal standby levels.  Use of this property
 * implies that the RDPD (0xAB) Release from Deep Power Down command
 * is also supported.  (On some chips this command functions as Read
 * Electronic Signature; see t-enter-dpd).
 */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_HAS_DPD 1
#define DT_INST_0_NORDIC_QSPI_NOR_HAS_DPD           DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_HAS_DPD
/*
 * Duration required to complete the DPD command.
 *
 * This provides the duration, in nanoseconds, that CSn must be
 * remain deasserted after issuing DPD before the chip will enter
 * deep power down.
 *
 * If not provided the driver does not enforce a delay.
 */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_T_ENTER_DPD 10000
#define DT_INST_0_NORDIC_QSPI_NOR_T_ENTER_DPD       DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_T_ENTER_DPD
/*
 * Duration required to complete the RDPD command.
 *
 * This provides the duration, in nanoseconds, that CSn must be
 * remain deasserted after issuing RDPD before the chip will exit
 * deep power down and be ready to receive additional commands.
 *
 * If not provided the driver does not enforce a delay.
 */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_T_EXIT_DPD 35000
#define DT_INST_0_NORDIC_QSPI_NOR_T_EXIT_DPD        DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_T_EXIT_DPD
/* flash capacity in bits */
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_SIZE 67108864
#define DT_INST_0_NORDIC_QSPI_NOR_SIZE              DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_SIZE
#define DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_BUS_NAME "QSPI"
#define DT_INST_0_NORDIC_QSPI_NOR_BUS_NAME          DT_NORDIC_NRF_QSPI_40029000_NORDIC_QSPI_NOR_0_BUS_NAME
#define DT_NORDIC_QSPI_NOR_BUS_QSPI                 1
#define DT_INST_0_NORDIC_QSPI_NOR                   1

/*
 * Devicetree node:
 *   /soc/rtc@4000b000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   $ZEPHYR_BASE\dts\bindings\rtc\nordic,nrf-rtc.yaml
 *
 * Dependency Ordinal: 45
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic nRF RTC (Real-Time Counter)
 */
#define DT_NORDIC_NRF_RTC_4000B000_BASE_ADDRESS     0x4000b000
#define DT_ALIAS_RTC_0_BASE_ADDRESS                 DT_NORDIC_NRF_RTC_4000B000_BASE_ADDRESS
#define DT_NORDIC_NRF_RTC_RTC_0_BASE_ADDRESS        DT_NORDIC_NRF_RTC_4000B000_BASE_ADDRESS
#define DT_INST_0_NORDIC_NRF_RTC_BASE_ADDRESS       DT_NORDIC_NRF_RTC_4000B000_BASE_ADDRESS
#define DT_NORDIC_NRF_RTC_4000B000_SIZE             4096
#define DT_ALIAS_RTC_0_SIZE                         DT_NORDIC_NRF_RTC_4000B000_SIZE
#define DT_NORDIC_NRF_RTC_RTC_0_SIZE                DT_NORDIC_NRF_RTC_4000B000_SIZE
#define DT_INST_0_NORDIC_NRF_RTC_SIZE               DT_NORDIC_NRF_RTC_4000B000_SIZE
#define DT_NORDIC_NRF_RTC_4000B000_IRQ_0            11
#define DT_ALIAS_RTC_0_IRQ_0                        DT_NORDIC_NRF_RTC_4000B000_IRQ_0
#define DT_NORDIC_NRF_RTC_RTC_0_IRQ_0               DT_NORDIC_NRF_RTC_4000B000_IRQ_0
#define DT_INST_0_NORDIC_NRF_RTC_IRQ_0              DT_NORDIC_NRF_RTC_4000B000_IRQ_0
#define DT_NORDIC_NRF_RTC_4000B000_IRQ_0_PRIORITY   1
#define DT_ALIAS_RTC_0_IRQ_0_PRIORITY               DT_NORDIC_NRF_RTC_4000B000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_RTC_RTC_0_IRQ_0_PRIORITY      DT_NORDIC_NRF_RTC_4000B000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_RTC_IRQ_0_PRIORITY     DT_NORDIC_NRF_RTC_4000B000_IRQ_0_PRIORITY
/* Enable wrapping with PPI */
#define DT_NORDIC_NRF_RTC_4000B000_PPI_WRAP         0
#define DT_ALIAS_RTC_0_PPI_WRAP                     DT_NORDIC_NRF_RTC_4000B000_PPI_WRAP
#define DT_NORDIC_NRF_RTC_RTC_0_PPI_WRAP            DT_NORDIC_NRF_RTC_4000B000_PPI_WRAP
#define DT_INST_0_NORDIC_NRF_RTC_PPI_WRAP           DT_NORDIC_NRF_RTC_4000B000_PPI_WRAP
/* Enable fixed top value */
#define DT_NORDIC_NRF_RTC_4000B000_FIXED_TOP        0
#define DT_ALIAS_RTC_0_FIXED_TOP                    DT_NORDIC_NRF_RTC_4000B000_FIXED_TOP
#define DT_NORDIC_NRF_RTC_RTC_0_FIXED_TOP           DT_NORDIC_NRF_RTC_4000B000_FIXED_TOP
#define DT_INST_0_NORDIC_NRF_RTC_FIXED_TOP          DT_NORDIC_NRF_RTC_4000B000_FIXED_TOP
/* Clock frequency information for RTC operation */
#define DT_NORDIC_NRF_RTC_4000B000_CLOCK_FREQUENCY  32768
#define DT_ALIAS_RTC_0_CLOCK_FREQUENCY              DT_NORDIC_NRF_RTC_4000B000_CLOCK_FREQUENCY
#define DT_NORDIC_NRF_RTC_RTC_0_CLOCK_FREQUENCY     DT_NORDIC_NRF_RTC_4000B000_CLOCK_FREQUENCY
#define DT_INST_0_NORDIC_NRF_RTC_CLOCK_FREQUENCY    DT_NORDIC_NRF_RTC_4000B000_CLOCK_FREQUENCY
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_RTC_4000B000_LABEL            "RTC_0"
#define DT_ALIAS_RTC_0_LABEL                        DT_NORDIC_NRF_RTC_4000B000_LABEL
#define DT_NORDIC_NRF_RTC_RTC_0_LABEL               DT_NORDIC_NRF_RTC_4000B000_LABEL
#define DT_INST_0_NORDIC_NRF_RTC_LABEL              DT_NORDIC_NRF_RTC_4000B000_LABEL
/* RTC frequency equals clock-frequency divided by the prescaler value */
#define DT_NORDIC_NRF_RTC_4000B000_PRESCALER        1
#define DT_ALIAS_RTC_0_PRESCALER                    DT_NORDIC_NRF_RTC_4000B000_PRESCALER
#define DT_NORDIC_NRF_RTC_RTC_0_PRESCALER           DT_NORDIC_NRF_RTC_4000B000_PRESCALER
#define DT_INST_0_NORDIC_NRF_RTC_PRESCALER          DT_NORDIC_NRF_RTC_4000B000_PRESCALER
#define DT_INST_0_NORDIC_NRF_RTC                    1

/*
 * Devicetree node:
 *   /soc/rtc@40011000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   $ZEPHYR_BASE\dts\bindings\rtc\nordic,nrf-rtc.yaml
 *
 * Dependency Ordinal: 46
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic nRF RTC (Real-Time Counter)
 */
#define DT_NORDIC_NRF_RTC_40011000_BASE_ADDRESS     0x40011000
#define DT_ALIAS_RTC_1_BASE_ADDRESS                 DT_NORDIC_NRF_RTC_40011000_BASE_ADDRESS
#define DT_NORDIC_NRF_RTC_RTC_1_BASE_ADDRESS        DT_NORDIC_NRF_RTC_40011000_BASE_ADDRESS
#define DT_INST_1_NORDIC_NRF_RTC_BASE_ADDRESS       DT_NORDIC_NRF_RTC_40011000_BASE_ADDRESS
#define DT_NORDIC_NRF_RTC_40011000_SIZE             4096
#define DT_ALIAS_RTC_1_SIZE                         DT_NORDIC_NRF_RTC_40011000_SIZE
#define DT_NORDIC_NRF_RTC_RTC_1_SIZE                DT_NORDIC_NRF_RTC_40011000_SIZE
#define DT_INST_1_NORDIC_NRF_RTC_SIZE               DT_NORDIC_NRF_RTC_40011000_SIZE
#define DT_NORDIC_NRF_RTC_40011000_IRQ_0            17
#define DT_ALIAS_RTC_1_IRQ_0                        DT_NORDIC_NRF_RTC_40011000_IRQ_0
#define DT_NORDIC_NRF_RTC_RTC_1_IRQ_0               DT_NORDIC_NRF_RTC_40011000_IRQ_0
#define DT_INST_1_NORDIC_NRF_RTC_IRQ_0              DT_NORDIC_NRF_RTC_40011000_IRQ_0
#define DT_NORDIC_NRF_RTC_40011000_IRQ_0_PRIORITY   1
#define DT_ALIAS_RTC_1_IRQ_0_PRIORITY               DT_NORDIC_NRF_RTC_40011000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_RTC_RTC_1_IRQ_0_PRIORITY      DT_NORDIC_NRF_RTC_40011000_IRQ_0_PRIORITY
#define DT_INST_1_NORDIC_NRF_RTC_IRQ_0_PRIORITY     DT_NORDIC_NRF_RTC_40011000_IRQ_0_PRIORITY
/* Enable wrapping with PPI */
#define DT_NORDIC_NRF_RTC_40011000_PPI_WRAP         0
#define DT_ALIAS_RTC_1_PPI_WRAP                     DT_NORDIC_NRF_RTC_40011000_PPI_WRAP
#define DT_NORDIC_NRF_RTC_RTC_1_PPI_WRAP            DT_NORDIC_NRF_RTC_40011000_PPI_WRAP
#define DT_INST_1_NORDIC_NRF_RTC_PPI_WRAP           DT_NORDIC_NRF_RTC_40011000_PPI_WRAP
/* Enable fixed top value */
#define DT_NORDIC_NRF_RTC_40011000_FIXED_TOP        0
#define DT_ALIAS_RTC_1_FIXED_TOP                    DT_NORDIC_NRF_RTC_40011000_FIXED_TOP
#define DT_NORDIC_NRF_RTC_RTC_1_FIXED_TOP           DT_NORDIC_NRF_RTC_40011000_FIXED_TOP
#define DT_INST_1_NORDIC_NRF_RTC_FIXED_TOP          DT_NORDIC_NRF_RTC_40011000_FIXED_TOP
/* Clock frequency information for RTC operation */
#define DT_NORDIC_NRF_RTC_40011000_CLOCK_FREQUENCY  32768
#define DT_ALIAS_RTC_1_CLOCK_FREQUENCY              DT_NORDIC_NRF_RTC_40011000_CLOCK_FREQUENCY
#define DT_NORDIC_NRF_RTC_RTC_1_CLOCK_FREQUENCY     DT_NORDIC_NRF_RTC_40011000_CLOCK_FREQUENCY
#define DT_INST_1_NORDIC_NRF_RTC_CLOCK_FREQUENCY    DT_NORDIC_NRF_RTC_40011000_CLOCK_FREQUENCY
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_RTC_40011000_LABEL            "RTC_1"
#define DT_ALIAS_RTC_1_LABEL                        DT_NORDIC_NRF_RTC_40011000_LABEL
#define DT_NORDIC_NRF_RTC_RTC_1_LABEL               DT_NORDIC_NRF_RTC_40011000_LABEL
#define DT_INST_1_NORDIC_NRF_RTC_LABEL              DT_NORDIC_NRF_RTC_40011000_LABEL
/* RTC frequency equals clock-frequency divided by the prescaler value */
#define DT_NORDIC_NRF_RTC_40011000_PRESCALER        1
#define DT_ALIAS_RTC_1_PRESCALER                    DT_NORDIC_NRF_RTC_40011000_PRESCALER
#define DT_NORDIC_NRF_RTC_RTC_1_PRESCALER           DT_NORDIC_NRF_RTC_40011000_PRESCALER
#define DT_INST_1_NORDIC_NRF_RTC_PRESCALER          DT_NORDIC_NRF_RTC_40011000_PRESCALER
#define DT_INST_1_NORDIC_NRF_RTC                    1

/*
 * Devicetree node:
 *   /soc/rtc@40024000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   $ZEPHYR_BASE\dts\bindings\rtc\nordic,nrf-rtc.yaml
 *
 * Dependency Ordinal: 47
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic nRF RTC (Real-Time Counter)
 */
#define DT_NORDIC_NRF_RTC_40024000_BASE_ADDRESS     0x40024000
#define DT_ALIAS_RTC_2_BASE_ADDRESS                 DT_NORDIC_NRF_RTC_40024000_BASE_ADDRESS
#define DT_NORDIC_NRF_RTC_RTC_2_BASE_ADDRESS        DT_NORDIC_NRF_RTC_40024000_BASE_ADDRESS
#define DT_INST_2_NORDIC_NRF_RTC_BASE_ADDRESS       DT_NORDIC_NRF_RTC_40024000_BASE_ADDRESS
#define DT_NORDIC_NRF_RTC_40024000_SIZE             4096
#define DT_ALIAS_RTC_2_SIZE                         DT_NORDIC_NRF_RTC_40024000_SIZE
#define DT_NORDIC_NRF_RTC_RTC_2_SIZE                DT_NORDIC_NRF_RTC_40024000_SIZE
#define DT_INST_2_NORDIC_NRF_RTC_SIZE               DT_NORDIC_NRF_RTC_40024000_SIZE
#define DT_NORDIC_NRF_RTC_40024000_IRQ_0            36
#define DT_ALIAS_RTC_2_IRQ_0                        DT_NORDIC_NRF_RTC_40024000_IRQ_0
#define DT_NORDIC_NRF_RTC_RTC_2_IRQ_0               DT_NORDIC_NRF_RTC_40024000_IRQ_0
#define DT_INST_2_NORDIC_NRF_RTC_IRQ_0              DT_NORDIC_NRF_RTC_40024000_IRQ_0
#define DT_NORDIC_NRF_RTC_40024000_IRQ_0_PRIORITY   1
#define DT_ALIAS_RTC_2_IRQ_0_PRIORITY               DT_NORDIC_NRF_RTC_40024000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_RTC_RTC_2_IRQ_0_PRIORITY      DT_NORDIC_NRF_RTC_40024000_IRQ_0_PRIORITY
#define DT_INST_2_NORDIC_NRF_RTC_IRQ_0_PRIORITY     DT_NORDIC_NRF_RTC_40024000_IRQ_0_PRIORITY
/* Enable wrapping with PPI */
#define DT_NORDIC_NRF_RTC_40024000_PPI_WRAP         0
#define DT_ALIAS_RTC_2_PPI_WRAP                     DT_NORDIC_NRF_RTC_40024000_PPI_WRAP
#define DT_NORDIC_NRF_RTC_RTC_2_PPI_WRAP            DT_NORDIC_NRF_RTC_40024000_PPI_WRAP
#define DT_INST_2_NORDIC_NRF_RTC_PPI_WRAP           DT_NORDIC_NRF_RTC_40024000_PPI_WRAP
/* Enable fixed top value */
#define DT_NORDIC_NRF_RTC_40024000_FIXED_TOP        0
#define DT_ALIAS_RTC_2_FIXED_TOP                    DT_NORDIC_NRF_RTC_40024000_FIXED_TOP
#define DT_NORDIC_NRF_RTC_RTC_2_FIXED_TOP           DT_NORDIC_NRF_RTC_40024000_FIXED_TOP
#define DT_INST_2_NORDIC_NRF_RTC_FIXED_TOP          DT_NORDIC_NRF_RTC_40024000_FIXED_TOP
/* Clock frequency information for RTC operation */
#define DT_NORDIC_NRF_RTC_40024000_CLOCK_FREQUENCY  32768
#define DT_ALIAS_RTC_2_CLOCK_FREQUENCY              DT_NORDIC_NRF_RTC_40024000_CLOCK_FREQUENCY
#define DT_NORDIC_NRF_RTC_RTC_2_CLOCK_FREQUENCY     DT_NORDIC_NRF_RTC_40024000_CLOCK_FREQUENCY
#define DT_INST_2_NORDIC_NRF_RTC_CLOCK_FREQUENCY    DT_NORDIC_NRF_RTC_40024000_CLOCK_FREQUENCY
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_RTC_40024000_LABEL            "RTC_2"
#define DT_ALIAS_RTC_2_LABEL                        DT_NORDIC_NRF_RTC_40024000_LABEL
#define DT_NORDIC_NRF_RTC_RTC_2_LABEL               DT_NORDIC_NRF_RTC_40024000_LABEL
#define DT_INST_2_NORDIC_NRF_RTC_LABEL              DT_NORDIC_NRF_RTC_40024000_LABEL
/* RTC frequency equals clock-frequency divided by the prescaler value */
#define DT_NORDIC_NRF_RTC_40024000_PRESCALER        1
#define DT_ALIAS_RTC_2_PRESCALER                    DT_NORDIC_NRF_RTC_40024000_PRESCALER
#define DT_NORDIC_NRF_RTC_RTC_2_PRESCALER           DT_NORDIC_NRF_RTC_40024000_PRESCALER
#define DT_INST_2_NORDIC_NRF_RTC_PRESCALER          DT_NORDIC_NRF_RTC_40024000_PRESCALER
#define DT_INST_2_NORDIC_NRF_RTC                    1

/*
 * Devicetree node:
 *   /soc/timer@40008000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * Dependency Ordinal: 53
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic nRF timer node
 */
#define DT_NORDIC_NRF_TIMER_40008000_BASE_ADDRESS   0x40008000
#define DT_ALIAS_TIMER_0_BASE_ADDRESS               DT_NORDIC_NRF_TIMER_40008000_BASE_ADDRESS
#define DT_NORDIC_NRF_TIMER_TIMER_0_BASE_ADDRESS    DT_NORDIC_NRF_TIMER_40008000_BASE_ADDRESS
#define DT_INST_0_NORDIC_NRF_TIMER_BASE_ADDRESS     DT_NORDIC_NRF_TIMER_40008000_BASE_ADDRESS
#define DT_NORDIC_NRF_TIMER_40008000_SIZE           4096
#define DT_ALIAS_TIMER_0_SIZE                       DT_NORDIC_NRF_TIMER_40008000_SIZE
#define DT_NORDIC_NRF_TIMER_TIMER_0_SIZE            DT_NORDIC_NRF_TIMER_40008000_SIZE
#define DT_INST_0_NORDIC_NRF_TIMER_SIZE             DT_NORDIC_NRF_TIMER_40008000_SIZE
#define DT_NORDIC_NRF_TIMER_40008000_IRQ_0          8
#define DT_ALIAS_TIMER_0_IRQ_0                      DT_NORDIC_NRF_TIMER_40008000_IRQ_0
#define DT_NORDIC_NRF_TIMER_TIMER_0_IRQ_0           DT_NORDIC_NRF_TIMER_40008000_IRQ_0
#define DT_INST_0_NORDIC_NRF_TIMER_IRQ_0            DT_NORDIC_NRF_TIMER_40008000_IRQ_0
#define DT_NORDIC_NRF_TIMER_40008000_IRQ_0_PRIORITY 1
#define DT_ALIAS_TIMER_0_IRQ_0_PRIORITY             DT_NORDIC_NRF_TIMER_40008000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_TIMER_TIMER_0_IRQ_0_PRIORITY  DT_NORDIC_NRF_TIMER_40008000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_TIMER_IRQ_0_PRIORITY   DT_NORDIC_NRF_TIMER_40008000_IRQ_0_PRIORITY
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_TIMER_40008000_LABEL          "TIMER_0"
#define DT_ALIAS_TIMER_0_LABEL                      DT_NORDIC_NRF_TIMER_40008000_LABEL
#define DT_NORDIC_NRF_TIMER_TIMER_0_LABEL           DT_NORDIC_NRF_TIMER_40008000_LABEL
#define DT_INST_0_NORDIC_NRF_TIMER_LABEL            DT_NORDIC_NRF_TIMER_40008000_LABEL
/* Prescaler value determines frequency (16MHz/2^prescaler) */
#define DT_NORDIC_NRF_TIMER_40008000_PRESCALER      0
#define DT_ALIAS_TIMER_0_PRESCALER                  DT_NORDIC_NRF_TIMER_40008000_PRESCALER
#define DT_NORDIC_NRF_TIMER_TIMER_0_PRESCALER       DT_NORDIC_NRF_TIMER_40008000_PRESCALER
#define DT_INST_0_NORDIC_NRF_TIMER_PRESCALER        DT_NORDIC_NRF_TIMER_40008000_PRESCALER
#define DT_INST_0_NORDIC_NRF_TIMER                  1

/*
 * Devicetree node:
 *   /soc/timer@40009000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * Dependency Ordinal: 54
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic nRF timer node
 */
#define DT_NORDIC_NRF_TIMER_40009000_BASE_ADDRESS   0x40009000
#define DT_ALIAS_TIMER_1_BASE_ADDRESS               DT_NORDIC_NRF_TIMER_40009000_BASE_ADDRESS
#define DT_NORDIC_NRF_TIMER_TIMER_1_BASE_ADDRESS    DT_NORDIC_NRF_TIMER_40009000_BASE_ADDRESS
#define DT_INST_1_NORDIC_NRF_TIMER_BASE_ADDRESS     DT_NORDIC_NRF_TIMER_40009000_BASE_ADDRESS
#define DT_NORDIC_NRF_TIMER_40009000_SIZE           4096
#define DT_ALIAS_TIMER_1_SIZE                       DT_NORDIC_NRF_TIMER_40009000_SIZE
#define DT_NORDIC_NRF_TIMER_TIMER_1_SIZE            DT_NORDIC_NRF_TIMER_40009000_SIZE
#define DT_INST_1_NORDIC_NRF_TIMER_SIZE             DT_NORDIC_NRF_TIMER_40009000_SIZE
#define DT_NORDIC_NRF_TIMER_40009000_IRQ_0          9
#define DT_ALIAS_TIMER_1_IRQ_0                      DT_NORDIC_NRF_TIMER_40009000_IRQ_0
#define DT_NORDIC_NRF_TIMER_TIMER_1_IRQ_0           DT_NORDIC_NRF_TIMER_40009000_IRQ_0
#define DT_INST_1_NORDIC_NRF_TIMER_IRQ_0            DT_NORDIC_NRF_TIMER_40009000_IRQ_0
#define DT_NORDIC_NRF_TIMER_40009000_IRQ_0_PRIORITY 1
#define DT_ALIAS_TIMER_1_IRQ_0_PRIORITY             DT_NORDIC_NRF_TIMER_40009000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_TIMER_TIMER_1_IRQ_0_PRIORITY  DT_NORDIC_NRF_TIMER_40009000_IRQ_0_PRIORITY
#define DT_INST_1_NORDIC_NRF_TIMER_IRQ_0_PRIORITY   DT_NORDIC_NRF_TIMER_40009000_IRQ_0_PRIORITY
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_TIMER_40009000_LABEL          "TIMER_1"
#define DT_ALIAS_TIMER_1_LABEL                      DT_NORDIC_NRF_TIMER_40009000_LABEL
#define DT_NORDIC_NRF_TIMER_TIMER_1_LABEL           DT_NORDIC_NRF_TIMER_40009000_LABEL
#define DT_INST_1_NORDIC_NRF_TIMER_LABEL            DT_NORDIC_NRF_TIMER_40009000_LABEL
/* Prescaler value determines frequency (16MHz/2^prescaler) */
#define DT_NORDIC_NRF_TIMER_40009000_PRESCALER      0
#define DT_ALIAS_TIMER_1_PRESCALER                  DT_NORDIC_NRF_TIMER_40009000_PRESCALER
#define DT_NORDIC_NRF_TIMER_TIMER_1_PRESCALER       DT_NORDIC_NRF_TIMER_40009000_PRESCALER
#define DT_INST_1_NORDIC_NRF_TIMER_PRESCALER        DT_NORDIC_NRF_TIMER_40009000_PRESCALER
#define DT_INST_1_NORDIC_NRF_TIMER                  1

/*
 * Devicetree node:
 *   /soc/timer@4000a000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * Dependency Ordinal: 55
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic nRF timer node
 */
#define DT_NORDIC_NRF_TIMER_4000A000_BASE_ADDRESS   0x4000a000
#define DT_ALIAS_TIMER_2_BASE_ADDRESS               DT_NORDIC_NRF_TIMER_4000A000_BASE_ADDRESS
#define DT_NORDIC_NRF_TIMER_TIMER_2_BASE_ADDRESS    DT_NORDIC_NRF_TIMER_4000A000_BASE_ADDRESS
#define DT_INST_2_NORDIC_NRF_TIMER_BASE_ADDRESS     DT_NORDIC_NRF_TIMER_4000A000_BASE_ADDRESS
#define DT_NORDIC_NRF_TIMER_4000A000_SIZE           4096
#define DT_ALIAS_TIMER_2_SIZE                       DT_NORDIC_NRF_TIMER_4000A000_SIZE
#define DT_NORDIC_NRF_TIMER_TIMER_2_SIZE            DT_NORDIC_NRF_TIMER_4000A000_SIZE
#define DT_INST_2_NORDIC_NRF_TIMER_SIZE             DT_NORDIC_NRF_TIMER_4000A000_SIZE
#define DT_NORDIC_NRF_TIMER_4000A000_IRQ_0          10
#define DT_ALIAS_TIMER_2_IRQ_0                      DT_NORDIC_NRF_TIMER_4000A000_IRQ_0
#define DT_NORDIC_NRF_TIMER_TIMER_2_IRQ_0           DT_NORDIC_NRF_TIMER_4000A000_IRQ_0
#define DT_INST_2_NORDIC_NRF_TIMER_IRQ_0            DT_NORDIC_NRF_TIMER_4000A000_IRQ_0
#define DT_NORDIC_NRF_TIMER_4000A000_IRQ_0_PRIORITY 1
#define DT_ALIAS_TIMER_2_IRQ_0_PRIORITY             DT_NORDIC_NRF_TIMER_4000A000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_TIMER_TIMER_2_IRQ_0_PRIORITY  DT_NORDIC_NRF_TIMER_4000A000_IRQ_0_PRIORITY
#define DT_INST_2_NORDIC_NRF_TIMER_IRQ_0_PRIORITY   DT_NORDIC_NRF_TIMER_4000A000_IRQ_0_PRIORITY
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_TIMER_4000A000_LABEL          "TIMER_2"
#define DT_ALIAS_TIMER_2_LABEL                      DT_NORDIC_NRF_TIMER_4000A000_LABEL
#define DT_NORDIC_NRF_TIMER_TIMER_2_LABEL           DT_NORDIC_NRF_TIMER_4000A000_LABEL
#define DT_INST_2_NORDIC_NRF_TIMER_LABEL            DT_NORDIC_NRF_TIMER_4000A000_LABEL
/* Prescaler value determines frequency (16MHz/2^prescaler) */
#define DT_NORDIC_NRF_TIMER_4000A000_PRESCALER      0
#define DT_ALIAS_TIMER_2_PRESCALER                  DT_NORDIC_NRF_TIMER_4000A000_PRESCALER
#define DT_NORDIC_NRF_TIMER_TIMER_2_PRESCALER       DT_NORDIC_NRF_TIMER_4000A000_PRESCALER
#define DT_INST_2_NORDIC_NRF_TIMER_PRESCALER        DT_NORDIC_NRF_TIMER_4000A000_PRESCALER
#define DT_INST_2_NORDIC_NRF_TIMER                  1

/*
 * Devicetree node:
 *   /soc/timer@4001a000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * Dependency Ordinal: 56
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic nRF timer node
 */
#define DT_NORDIC_NRF_TIMER_4001A000_BASE_ADDRESS   0x4001a000
#define DT_ALIAS_TIMER_3_BASE_ADDRESS               DT_NORDIC_NRF_TIMER_4001A000_BASE_ADDRESS
#define DT_NORDIC_NRF_TIMER_TIMER_3_BASE_ADDRESS    DT_NORDIC_NRF_TIMER_4001A000_BASE_ADDRESS
#define DT_INST_3_NORDIC_NRF_TIMER_BASE_ADDRESS     DT_NORDIC_NRF_TIMER_4001A000_BASE_ADDRESS
#define DT_NORDIC_NRF_TIMER_4001A000_SIZE           4096
#define DT_ALIAS_TIMER_3_SIZE                       DT_NORDIC_NRF_TIMER_4001A000_SIZE
#define DT_NORDIC_NRF_TIMER_TIMER_3_SIZE            DT_NORDIC_NRF_TIMER_4001A000_SIZE
#define DT_INST_3_NORDIC_NRF_TIMER_SIZE             DT_NORDIC_NRF_TIMER_4001A000_SIZE
#define DT_NORDIC_NRF_TIMER_4001A000_IRQ_0          26
#define DT_ALIAS_TIMER_3_IRQ_0                      DT_NORDIC_NRF_TIMER_4001A000_IRQ_0
#define DT_NORDIC_NRF_TIMER_TIMER_3_IRQ_0           DT_NORDIC_NRF_TIMER_4001A000_IRQ_0
#define DT_INST_3_NORDIC_NRF_TIMER_IRQ_0            DT_NORDIC_NRF_TIMER_4001A000_IRQ_0
#define DT_NORDIC_NRF_TIMER_4001A000_IRQ_0_PRIORITY 1
#define DT_ALIAS_TIMER_3_IRQ_0_PRIORITY             DT_NORDIC_NRF_TIMER_4001A000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_TIMER_TIMER_3_IRQ_0_PRIORITY  DT_NORDIC_NRF_TIMER_4001A000_IRQ_0_PRIORITY
#define DT_INST_3_NORDIC_NRF_TIMER_IRQ_0_PRIORITY   DT_NORDIC_NRF_TIMER_4001A000_IRQ_0_PRIORITY
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_TIMER_4001A000_LABEL          "TIMER_3"
#define DT_ALIAS_TIMER_3_LABEL                      DT_NORDIC_NRF_TIMER_4001A000_LABEL
#define DT_NORDIC_NRF_TIMER_TIMER_3_LABEL           DT_NORDIC_NRF_TIMER_4001A000_LABEL
#define DT_INST_3_NORDIC_NRF_TIMER_LABEL            DT_NORDIC_NRF_TIMER_4001A000_LABEL
/* Prescaler value determines frequency (16MHz/2^prescaler) */
#define DT_NORDIC_NRF_TIMER_4001A000_PRESCALER      0
#define DT_ALIAS_TIMER_3_PRESCALER                  DT_NORDIC_NRF_TIMER_4001A000_PRESCALER
#define DT_NORDIC_NRF_TIMER_TIMER_3_PRESCALER       DT_NORDIC_NRF_TIMER_4001A000_PRESCALER
#define DT_INST_3_NORDIC_NRF_TIMER_PRESCALER        DT_NORDIC_NRF_TIMER_4001A000_PRESCALER
#define DT_INST_3_NORDIC_NRF_TIMER                  1

/*
 * Devicetree node:
 *   /soc/timer@4001b000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * Dependency Ordinal: 57
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic nRF timer node
 */
#define DT_NORDIC_NRF_TIMER_4001B000_BASE_ADDRESS   0x4001b000
#define DT_ALIAS_TIMER_4_BASE_ADDRESS               DT_NORDIC_NRF_TIMER_4001B000_BASE_ADDRESS
#define DT_NORDIC_NRF_TIMER_TIMER_4_BASE_ADDRESS    DT_NORDIC_NRF_TIMER_4001B000_BASE_ADDRESS
#define DT_INST_4_NORDIC_NRF_TIMER_BASE_ADDRESS     DT_NORDIC_NRF_TIMER_4001B000_BASE_ADDRESS
#define DT_NORDIC_NRF_TIMER_4001B000_SIZE           4096
#define DT_ALIAS_TIMER_4_SIZE                       DT_NORDIC_NRF_TIMER_4001B000_SIZE
#define DT_NORDIC_NRF_TIMER_TIMER_4_SIZE            DT_NORDIC_NRF_TIMER_4001B000_SIZE
#define DT_INST_4_NORDIC_NRF_TIMER_SIZE             DT_NORDIC_NRF_TIMER_4001B000_SIZE
#define DT_NORDIC_NRF_TIMER_4001B000_IRQ_0          27
#define DT_ALIAS_TIMER_4_IRQ_0                      DT_NORDIC_NRF_TIMER_4001B000_IRQ_0
#define DT_NORDIC_NRF_TIMER_TIMER_4_IRQ_0           DT_NORDIC_NRF_TIMER_4001B000_IRQ_0
#define DT_INST_4_NORDIC_NRF_TIMER_IRQ_0            DT_NORDIC_NRF_TIMER_4001B000_IRQ_0
#define DT_NORDIC_NRF_TIMER_4001B000_IRQ_0_PRIORITY 1
#define DT_ALIAS_TIMER_4_IRQ_0_PRIORITY             DT_NORDIC_NRF_TIMER_4001B000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_TIMER_TIMER_4_IRQ_0_PRIORITY  DT_NORDIC_NRF_TIMER_4001B000_IRQ_0_PRIORITY
#define DT_INST_4_NORDIC_NRF_TIMER_IRQ_0_PRIORITY   DT_NORDIC_NRF_TIMER_4001B000_IRQ_0_PRIORITY
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_TIMER_4001B000_LABEL          "TIMER_4"
#define DT_ALIAS_TIMER_4_LABEL                      DT_NORDIC_NRF_TIMER_4001B000_LABEL
#define DT_NORDIC_NRF_TIMER_TIMER_4_LABEL           DT_NORDIC_NRF_TIMER_4001B000_LABEL
#define DT_INST_4_NORDIC_NRF_TIMER_LABEL            DT_NORDIC_NRF_TIMER_4001B000_LABEL
/* Prescaler value determines frequency (16MHz/2^prescaler) */
#define DT_NORDIC_NRF_TIMER_4001B000_PRESCALER      0
#define DT_ALIAS_TIMER_4_PRESCALER                  DT_NORDIC_NRF_TIMER_4001B000_PRESCALER
#define DT_NORDIC_NRF_TIMER_TIMER_4_PRESCALER       DT_NORDIC_NRF_TIMER_4001B000_PRESCALER
#define DT_INST_4_NORDIC_NRF_TIMER_PRESCALER        DT_NORDIC_NRF_TIMER_4001B000_PRESCALER
#define DT_INST_4_NORDIC_NRF_TIMER                  1

/*
 * Devicetree node:
 *   /soc/temp@4000c000
 *
 * Binding (compatible = nordic,nrf-temp):
 *   $ZEPHYR_BASE\dts\bindings\sensor\nordic,nrf-temp.yaml
 *
 * Dependency Ordinal: 52
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic nRF family TEMP node
 */
#define DT_NORDIC_NRF_TEMP_4000C000_BASE_ADDRESS    0x4000c000
#define DT_INST_0_NORDIC_NRF_TEMP_BASE_ADDRESS      DT_NORDIC_NRF_TEMP_4000C000_BASE_ADDRESS
#define DT_NORDIC_NRF_TEMP_4000C000_SIZE            4096
#define DT_INST_0_NORDIC_NRF_TEMP_SIZE              DT_NORDIC_NRF_TEMP_4000C000_SIZE
#define DT_NORDIC_NRF_TEMP_4000C000_IRQ_0           12
#define DT_INST_0_NORDIC_NRF_TEMP_IRQ_0             DT_NORDIC_NRF_TEMP_4000C000_IRQ_0
#define DT_NORDIC_NRF_TEMP_4000C000_IRQ_0_PRIORITY  1
#define DT_INST_0_NORDIC_NRF_TEMP_IRQ_0_PRIORITY    DT_NORDIC_NRF_TEMP_4000C000_IRQ_0_PRIORITY
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_TEMP_4000C000_LABEL           "TEMP_0"
#define DT_INST_0_NORDIC_NRF_TEMP_LABEL             DT_NORDIC_NRF_TEMP_4000C000_LABEL
#define DT_INST_0_NORDIC_NRF_TEMP                   1

/*
 * Devicetree node:
 *   /soc/usbd@40027000
 *
 * Binding (compatible = nordic,nrf-usbd):
 *   $ZEPHYR_BASE\dts\bindings\usb\nordic,nrf-usbd.yaml
 *
 * Dependency Ordinal: 61
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic nRF52 USB device controller
 */
#define DT_NORDIC_NRF_USBD_40027000_BASE_ADDRESS    0x40027000
#define DT_ALIAS_USBD_0_BASE_ADDRESS                DT_NORDIC_NRF_USBD_40027000_BASE_ADDRESS
#define DT_NORDIC_NRF_USBD_USBD_0_BASE_ADDRESS      DT_NORDIC_NRF_USBD_40027000_BASE_ADDRESS
#define DT_INST_0_NORDIC_NRF_USBD_BASE_ADDRESS      DT_NORDIC_NRF_USBD_40027000_BASE_ADDRESS
#define DT_NORDIC_NRF_USBD_40027000_SIZE            4096
#define DT_ALIAS_USBD_0_SIZE                        DT_NORDIC_NRF_USBD_40027000_SIZE
#define DT_NORDIC_NRF_USBD_USBD_0_SIZE              DT_NORDIC_NRF_USBD_40027000_SIZE
#define DT_INST_0_NORDIC_NRF_USBD_SIZE              DT_NORDIC_NRF_USBD_40027000_SIZE
#define DT_NORDIC_NRF_USBD_40027000_IRQ_0           39
#define DT_ALIAS_USBD_0_IRQ_0                       DT_NORDIC_NRF_USBD_40027000_IRQ_0
#define DT_NORDIC_NRF_USBD_USBD_0_IRQ_0             DT_NORDIC_NRF_USBD_40027000_IRQ_0
#define DT_INST_0_NORDIC_NRF_USBD_IRQ_0             DT_NORDIC_NRF_USBD_40027000_IRQ_0
#define DT_NORDIC_NRF_USBD_40027000_IRQ_0_PRIORITY  1
#define DT_ALIAS_USBD_0_IRQ_0_PRIORITY              DT_NORDIC_NRF_USBD_40027000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_USBD_USBD_0_IRQ_0_PRIORITY    DT_NORDIC_NRF_USBD_40027000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_USBD_IRQ_0_PRIORITY    DT_NORDIC_NRF_USBD_40027000_IRQ_0_PRIORITY
/* Number of ISOIN endpoints supported by hardware */
#define DT_NORDIC_NRF_USBD_40027000_NUM_ISOIN_ENDPOINTS 1
#define DT_ALIAS_USBD_0_NUM_ISOIN_ENDPOINTS         DT_NORDIC_NRF_USBD_40027000_NUM_ISOIN_ENDPOINTS
#define DT_NORDIC_NRF_USBD_USBD_0_NUM_ISOIN_ENDPOINTS DT_NORDIC_NRF_USBD_40027000_NUM_ISOIN_ENDPOINTS
#define DT_INST_0_NORDIC_NRF_USBD_NUM_ISOIN_ENDPOINTS DT_NORDIC_NRF_USBD_40027000_NUM_ISOIN_ENDPOINTS
/* Number of ISOOUT endpoints supported by hardware */
#define DT_NORDIC_NRF_USBD_40027000_NUM_ISOOUT_ENDPOINTS 1
#define DT_ALIAS_USBD_0_NUM_ISOOUT_ENDPOINTS        DT_NORDIC_NRF_USBD_40027000_NUM_ISOOUT_ENDPOINTS
#define DT_NORDIC_NRF_USBD_USBD_0_NUM_ISOOUT_ENDPOINTS DT_NORDIC_NRF_USBD_40027000_NUM_ISOOUT_ENDPOINTS
#define DT_INST_0_NORDIC_NRF_USBD_NUM_ISOOUT_ENDPOINTS DT_NORDIC_NRF_USBD_40027000_NUM_ISOOUT_ENDPOINTS
/* Number of bi-directional endpoints supported by hardware (including EP0) */
#define DT_NORDIC_NRF_USBD_40027000_NUM_BIDIR_ENDPOINTS 1
#define DT_ALIAS_USBD_0_NUM_BIDIR_ENDPOINTS         DT_NORDIC_NRF_USBD_40027000_NUM_BIDIR_ENDPOINTS
#define DT_NORDIC_NRF_USBD_USBD_0_NUM_BIDIR_ENDPOINTS DT_NORDIC_NRF_USBD_40027000_NUM_BIDIR_ENDPOINTS
#define DT_INST_0_NORDIC_NRF_USBD_NUM_BIDIR_ENDPOINTS DT_NORDIC_NRF_USBD_40027000_NUM_BIDIR_ENDPOINTS
/* Number of IN endpoints supported by hardware (including EP0 IN) */
#define DT_NORDIC_NRF_USBD_40027000_NUM_IN_ENDPOINTS 7
#define DT_ALIAS_USBD_0_NUM_IN_ENDPOINTS            DT_NORDIC_NRF_USBD_40027000_NUM_IN_ENDPOINTS
#define DT_NORDIC_NRF_USBD_USBD_0_NUM_IN_ENDPOINTS  DT_NORDIC_NRF_USBD_40027000_NUM_IN_ENDPOINTS
#define DT_INST_0_NORDIC_NRF_USBD_NUM_IN_ENDPOINTS  DT_NORDIC_NRF_USBD_40027000_NUM_IN_ENDPOINTS
/* Number of OUT endpoints supported by hardware (including EP0 OUT) */
#define DT_NORDIC_NRF_USBD_40027000_NUM_OUT_ENDPOINTS 7
#define DT_ALIAS_USBD_0_NUM_OUT_ENDPOINTS           DT_NORDIC_NRF_USBD_40027000_NUM_OUT_ENDPOINTS
#define DT_NORDIC_NRF_USBD_USBD_0_NUM_OUT_ENDPOINTS DT_NORDIC_NRF_USBD_40027000_NUM_OUT_ENDPOINTS
#define DT_INST_0_NORDIC_NRF_USBD_NUM_OUT_ENDPOINTS DT_NORDIC_NRF_USBD_40027000_NUM_OUT_ENDPOINTS
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_USBD_40027000_LABEL           "USBD"
#define DT_ALIAS_USBD_0_LABEL                       DT_NORDIC_NRF_USBD_40027000_LABEL
#define DT_NORDIC_NRF_USBD_USBD_0_LABEL             DT_NORDIC_NRF_USBD_40027000_LABEL
#define DT_INST_0_NORDIC_NRF_USBD_LABEL             DT_NORDIC_NRF_USBD_40027000_LABEL
#define DT_INST_0_NORDIC_NRF_USBD                   1

/*
 * Devicetree node:
 *   /soc/watchdog@40010000
 *
 * Binding (compatible = nordic,nrf-watchdog):
 *   $ZEPHYR_BASE\dts\bindings\watchdog\nordic,nrf-watchdog.yaml
 *
 * Dependency Ordinal: 62
 *
 * Requires:
 *   3   /soc
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   Nordic Semiconductor nRF watchdog
 */
#define DT_NORDIC_NRF_WATCHDOG_40010000_BASE_ADDRESS 0x40010000
#define DT_ALIAS_WDT_0_BASE_ADDRESS                 DT_NORDIC_NRF_WATCHDOG_40010000_BASE_ADDRESS
#define DT_NORDIC_NRF_WATCHDOG_WDT_0_BASE_ADDRESS   DT_NORDIC_NRF_WATCHDOG_40010000_BASE_ADDRESS
#define DT_INST_0_NORDIC_NRF_WATCHDOG_BASE_ADDRESS  DT_NORDIC_NRF_WATCHDOG_40010000_BASE_ADDRESS
#define DT_NORDIC_NRF_WATCHDOG_40010000_SIZE        4096
#define DT_ALIAS_WDT_0_SIZE                         DT_NORDIC_NRF_WATCHDOG_40010000_SIZE
#define DT_NORDIC_NRF_WATCHDOG_WDT_0_SIZE           DT_NORDIC_NRF_WATCHDOG_40010000_SIZE
#define DT_INST_0_NORDIC_NRF_WATCHDOG_SIZE          DT_NORDIC_NRF_WATCHDOG_40010000_SIZE
#define DT_NORDIC_NRF_WATCHDOG_40010000_IRQ_0       16
#define DT_ALIAS_WDT_0_IRQ_0                        DT_NORDIC_NRF_WATCHDOG_40010000_IRQ_0
#define DT_NORDIC_NRF_WATCHDOG_WDT_0_IRQ_0          DT_NORDIC_NRF_WATCHDOG_40010000_IRQ_0
#define DT_INST_0_NORDIC_NRF_WATCHDOG_IRQ_0         DT_NORDIC_NRF_WATCHDOG_40010000_IRQ_0
#define DT_NORDIC_NRF_WATCHDOG_40010000_IRQ_0_PRIORITY 1
#define DT_ALIAS_WDT_0_IRQ_0_PRIORITY               DT_NORDIC_NRF_WATCHDOG_40010000_IRQ_0_PRIORITY
#define DT_NORDIC_NRF_WATCHDOG_WDT_0_IRQ_0_PRIORITY DT_NORDIC_NRF_WATCHDOG_40010000_IRQ_0_PRIORITY
#define DT_INST_0_NORDIC_NRF_WATCHDOG_IRQ_0_PRIORITY DT_NORDIC_NRF_WATCHDOG_40010000_IRQ_0_PRIORITY
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_WATCHDOG_40010000_LABEL       "WDT"
#define DT_ALIAS_WDT_0_LABEL                        DT_NORDIC_NRF_WATCHDOG_40010000_LABEL
#define DT_NORDIC_NRF_WATCHDOG_WDT_0_LABEL          DT_NORDIC_NRF_WATCHDOG_40010000_LABEL
#define DT_INST_0_NORDIC_NRF_WATCHDOG_LABEL         DT_NORDIC_NRF_WATCHDOG_40010000_LABEL
#define DT_INST_0_NORDIC_NRF_WATCHDOG               1

/*
 * Devicetree node:
 *   /soc/crypto@5002a000
 *
 * Binding (compatible = nordic,nrf-cc310):
 *   $ZEPHYR_BASE\dts\bindings\crypto\nordic,nrf-cc310.yaml
 *
 * Dependency Ordinal: 24
 *
 * Requires:
 *   3   /soc
 *
 * Supports:
 *   25  /soc/crypto@5002a000/crypto@5002b000
 *
 * Description:
 *   Nordic Control Interface for ARM TrustZone CryptoCell 310
 */
#define DT_NORDIC_NRF_CC310_5002A000_BASE_ADDRESS   0x5002a000
#define DT_ALIAS_CC310_BASE_ADDRESS                 DT_NORDIC_NRF_CC310_5002A000_BASE_ADDRESS
#define DT_NORDIC_NRF_CC310_CC310_BASE_ADDRESS      DT_NORDIC_NRF_CC310_5002A000_BASE_ADDRESS
#define DT_INST_0_NORDIC_NRF_CC310_BASE_ADDRESS     DT_NORDIC_NRF_CC310_5002A000_BASE_ADDRESS
#define DT_NORDIC_NRF_CC310_5002A000_SIZE           4096
#define DT_ALIAS_CC310_SIZE                         DT_NORDIC_NRF_CC310_5002A000_SIZE
#define DT_NORDIC_NRF_CC310_CC310_SIZE              DT_NORDIC_NRF_CC310_5002A000_SIZE
#define DT_INST_0_NORDIC_NRF_CC310_SIZE             DT_NORDIC_NRF_CC310_5002A000_SIZE
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_NORDIC_NRF_CC310_5002A000_LABEL          "CRYPTOCELL"
#define DT_ALIAS_CC310_LABEL                        DT_NORDIC_NRF_CC310_5002A000_LABEL
#define DT_NORDIC_NRF_CC310_CC310_LABEL             DT_NORDIC_NRF_CC310_5002A000_LABEL
#define DT_INST_0_NORDIC_NRF_CC310_LABEL            DT_NORDIC_NRF_CC310_5002A000_LABEL
#define DT_INST_0_NORDIC_NRF_CC310                  1

/*
 * Devicetree node:
 *   /soc/crypto@5002a000/crypto@5002b000
 *
 * Binding (compatible = arm,cryptocell-310):
 *   $ZEPHYR_BASE\dts\bindings\crypto\arm,cryptocell-310.yaml
 *
 * Dependency Ordinal: 25
 *
 * Requires:
 *   24  /soc/crypto@5002a000
 *   19  /soc/interrupt-controller@e000e100
 *
 * Description:
 *   ARM TrustZone CryptoCell 310
 */
#define DT_ARM_CRYPTOCELL_310_5002B000_BASE_ADDRESS 0x5002b000
#define DT_ALIAS_ARM_CRYPTOCELL_310_BASE_ADDRESS    DT_ARM_CRYPTOCELL_310_5002B000_BASE_ADDRESS
#define DT_ARM_CRYPTOCELL_310_ARM_CRYPTOCELL_310_BASE_ADDRESS DT_ARM_CRYPTOCELL_310_5002B000_BASE_ADDRESS
#define DT_INST_0_ARM_CRYPTOCELL_310_BASE_ADDRESS   DT_ARM_CRYPTOCELL_310_5002B000_BASE_ADDRESS
#define DT_ARM_CRYPTOCELL_310_5002B000_SIZE         4096
#define DT_ALIAS_ARM_CRYPTOCELL_310_SIZE            DT_ARM_CRYPTOCELL_310_5002B000_SIZE
#define DT_ARM_CRYPTOCELL_310_ARM_CRYPTOCELL_310_SIZE DT_ARM_CRYPTOCELL_310_5002B000_SIZE
#define DT_INST_0_ARM_CRYPTOCELL_310_SIZE           DT_ARM_CRYPTOCELL_310_5002B000_SIZE
#define DT_ARM_CRYPTOCELL_310_5002B000_IRQ_0        42
#define DT_ALIAS_ARM_CRYPTOCELL_310_IRQ_0           DT_ARM_CRYPTOCELL_310_5002B000_IRQ_0
#define DT_ARM_CRYPTOCELL_310_ARM_CRYPTOCELL_310_IRQ_0 DT_ARM_CRYPTOCELL_310_5002B000_IRQ_0
#define DT_INST_0_ARM_CRYPTOCELL_310_IRQ_0          DT_ARM_CRYPTOCELL_310_5002B000_IRQ_0
#define DT_ARM_CRYPTOCELL_310_5002B000_IRQ_0_PRIORITY 1
#define DT_ALIAS_ARM_CRYPTOCELL_310_IRQ_0_PRIORITY  DT_ARM_CRYPTOCELL_310_5002B000_IRQ_0_PRIORITY
#define DT_ARM_CRYPTOCELL_310_ARM_CRYPTOCELL_310_IRQ_0_PRIORITY DT_ARM_CRYPTOCELL_310_5002B000_IRQ_0_PRIORITY
#define DT_INST_0_ARM_CRYPTOCELL_310_IRQ_0_PRIORITY DT_ARM_CRYPTOCELL_310_5002B000_IRQ_0_PRIORITY
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_ARM_CRYPTOCELL_310_5002B000_LABEL        "CRYPTOCELL310"
#define DT_ALIAS_ARM_CRYPTOCELL_310_LABEL           DT_ARM_CRYPTOCELL_310_5002B000_LABEL
#define DT_ARM_CRYPTOCELL_310_ARM_CRYPTOCELL_310_LABEL DT_ARM_CRYPTOCELL_310_5002B000_LABEL
#define DT_INST_0_ARM_CRYPTOCELL_310_LABEL          DT_ARM_CRYPTOCELL_310_5002B000_LABEL
#define DT_INST_0_ARM_CRYPTOCELL_310                1

/*
 * Devicetree node:
 *   /cpus/cpu@0
 *
 * Binding (compatible = arm,cortex-m4f):
 *   $ZEPHYR_BASE\dts\bindings\cpu\arm,cortex-m4f.yaml
 *
 * Dependency Ordinal: 12
 *
 * Requires:
 *   11  /cpus
 *
 * Description:
 *   ARM Cortex-M4F CPU
 */
#define DT_ARM_CORTEX_M4F_0_BASE_ADDRESS            0x0
#define DT_INST_0_ARM_CORTEX_M4F_BASE_ADDRESS       DT_ARM_CORTEX_M4F_0_BASE_ADDRESS
#define DT_INST_0_ARM_CORTEX_M4F                    1

/*
 * Devicetree node:
 *   /leds
 *
 * Binding (compatible = gpio-leds):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-leds.yaml
 *
 * Dependency Ordinal: 13
 *
 * Requires:
 *   0   /
 *
 * Supports:
 *   14  /leds/led_0
 *   15  /leds/led_1
 *   16  /leds/led_2
 *   17  /leds/led_3
 *
 * Description:
 *   GPIO LEDs parent node
 */
#define DT_INST_0_GPIO_LEDS                         1

/*
 * Devicetree node:
 *   /leds/led_0
 *
 * Binding (compatible = gpio-leds):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-leds.yaml
 *
 * Dependency Ordinal: 14
 *
 * Requires:
 *   13  /leds
 *   4   /soc/gpio@50000000
 *
 * Description:
 *   GPIO LED child node
 */
#define DT_GPIO_LEDS_LED_0_GPIOS_CONTROLLER         "GPIO_0"
#define DT_ALIAS_LED0_GPIOS_CONTROLLER              DT_GPIO_LEDS_LED_0_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED0_GPIOS_CONTROLLER          DT_GPIO_LEDS_LED_0_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED_0_GPIOS_PIN                13
#define DT_ALIAS_LED0_GPIOS_PIN                     DT_GPIO_LEDS_LED_0_GPIOS_PIN
#define DT_GPIO_LEDS_LED0_GPIOS_PIN                 DT_GPIO_LEDS_LED_0_GPIOS_PIN
#define DT_GPIO_LEDS_LED_0_GPIOS_FLAGS              0
#define DT_ALIAS_LED0_GPIOS_FLAGS                   DT_GPIO_LEDS_LED_0_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED0_GPIOS_FLAGS               DT_GPIO_LEDS_LED_0_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED_0_GPIOS                    {"GPIO_0", 13, 0}
#define DT_ALIAS_LED0_GPIOS                         DT_GPIO_LEDS_LED_0_GPIOS
#define DT_GPIO_LEDS_LED0_GPIOS                     DT_GPIO_LEDS_LED_0_GPIOS
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_GPIO_LEDS_LED_0_LABEL                    "Green LED 0"
#define DT_ALIAS_LED0_LABEL                         DT_GPIO_LEDS_LED_0_LABEL
#define DT_GPIO_LEDS_LED0_LABEL                     DT_GPIO_LEDS_LED_0_LABEL

/*
 * Devicetree node:
 *   /leds/led_1
 *
 * Binding (compatible = gpio-leds):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-leds.yaml
 *
 * Dependency Ordinal: 15
 *
 * Requires:
 *   13  /leds
 *   4   /soc/gpio@50000000
 *
 * Description:
 *   GPIO LED child node
 */
#define DT_GPIO_LEDS_LED_1_GPIOS_CONTROLLER         "GPIO_0"
#define DT_ALIAS_LED1_GPIOS_CONTROLLER              DT_GPIO_LEDS_LED_1_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED1_GPIOS_CONTROLLER          DT_GPIO_LEDS_LED_1_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED_1_GPIOS_PIN                14
#define DT_ALIAS_LED1_GPIOS_PIN                     DT_GPIO_LEDS_LED_1_GPIOS_PIN
#define DT_GPIO_LEDS_LED1_GPIOS_PIN                 DT_GPIO_LEDS_LED_1_GPIOS_PIN
#define DT_GPIO_LEDS_LED_1_GPIOS_FLAGS              0
#define DT_ALIAS_LED1_GPIOS_FLAGS                   DT_GPIO_LEDS_LED_1_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED1_GPIOS_FLAGS               DT_GPIO_LEDS_LED_1_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED_1_GPIOS                    {"GPIO_0", 14, 0}
#define DT_ALIAS_LED1_GPIOS                         DT_GPIO_LEDS_LED_1_GPIOS
#define DT_GPIO_LEDS_LED1_GPIOS                     DT_GPIO_LEDS_LED_1_GPIOS
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_GPIO_LEDS_LED_1_LABEL                    "Green LED 1"
#define DT_ALIAS_LED1_LABEL                         DT_GPIO_LEDS_LED_1_LABEL
#define DT_GPIO_LEDS_LED1_LABEL                     DT_GPIO_LEDS_LED_1_LABEL

/*
 * Devicetree node:
 *   /leds/led_2
 *
 * Binding (compatible = gpio-leds):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-leds.yaml
 *
 * Dependency Ordinal: 16
 *
 * Requires:
 *   13  /leds
 *   4   /soc/gpio@50000000
 *
 * Description:
 *   GPIO LED child node
 */
#define DT_GPIO_LEDS_LED_2_GPIOS_CONTROLLER         "GPIO_0"
#define DT_ALIAS_LED2_GPIOS_CONTROLLER              DT_GPIO_LEDS_LED_2_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED2_GPIOS_CONTROLLER          DT_GPIO_LEDS_LED_2_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED_2_GPIOS_PIN                15
#define DT_ALIAS_LED2_GPIOS_PIN                     DT_GPIO_LEDS_LED_2_GPIOS_PIN
#define DT_GPIO_LEDS_LED2_GPIOS_PIN                 DT_GPIO_LEDS_LED_2_GPIOS_PIN
#define DT_GPIO_LEDS_LED_2_GPIOS_FLAGS              0
#define DT_ALIAS_LED2_GPIOS_FLAGS                   DT_GPIO_LEDS_LED_2_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED2_GPIOS_FLAGS               DT_GPIO_LEDS_LED_2_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED_2_GPIOS                    {"GPIO_0", 15, 0}
#define DT_ALIAS_LED2_GPIOS                         DT_GPIO_LEDS_LED_2_GPIOS
#define DT_GPIO_LEDS_LED2_GPIOS                     DT_GPIO_LEDS_LED_2_GPIOS
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_GPIO_LEDS_LED_2_LABEL                    "Green LED 2"
#define DT_ALIAS_LED2_LABEL                         DT_GPIO_LEDS_LED_2_LABEL
#define DT_GPIO_LEDS_LED2_LABEL                     DT_GPIO_LEDS_LED_2_LABEL

/*
 * Devicetree node:
 *   /leds/led_3
 *
 * Binding (compatible = gpio-leds):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-leds.yaml
 *
 * Dependency Ordinal: 17
 *
 * Requires:
 *   13  /leds
 *   4   /soc/gpio@50000000
 *
 * Description:
 *   GPIO LED child node
 */
#define DT_GPIO_LEDS_LED_3_GPIOS_CONTROLLER         "GPIO_0"
#define DT_ALIAS_LED3_GPIOS_CONTROLLER              DT_GPIO_LEDS_LED_3_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED3_GPIOS_CONTROLLER          DT_GPIO_LEDS_LED_3_GPIOS_CONTROLLER
#define DT_GPIO_LEDS_LED_3_GPIOS_PIN                16
#define DT_ALIAS_LED3_GPIOS_PIN                     DT_GPIO_LEDS_LED_3_GPIOS_PIN
#define DT_GPIO_LEDS_LED3_GPIOS_PIN                 DT_GPIO_LEDS_LED_3_GPIOS_PIN
#define DT_GPIO_LEDS_LED_3_GPIOS_FLAGS              0
#define DT_ALIAS_LED3_GPIOS_FLAGS                   DT_GPIO_LEDS_LED_3_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED3_GPIOS_FLAGS               DT_GPIO_LEDS_LED_3_GPIOS_FLAGS
#define DT_GPIO_LEDS_LED_3_GPIOS                    {"GPIO_0", 16, 0}
#define DT_ALIAS_LED3_GPIOS                         DT_GPIO_LEDS_LED_3_GPIOS
#define DT_GPIO_LEDS_LED3_GPIOS                     DT_GPIO_LEDS_LED_3_GPIOS
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_GPIO_LEDS_LED_3_LABEL                    "Green LED 3"
#define DT_ALIAS_LED3_LABEL                         DT_GPIO_LEDS_LED_3_LABEL
#define DT_GPIO_LEDS_LED3_LABEL                     DT_GPIO_LEDS_LED_3_LABEL

/*
 * Devicetree node:
 *   /pwmleds
 *
 * Binding (compatible = pwm-leds):
 *   $ZEPHYR_BASE\dts\bindings\led\pwm-leds.yaml
 *
 * Dependency Ordinal: 18
 *
 * Requires:
 *   0   /
 *
 * Supports:
 *   21  /pwmleds/pwm_led_0
 *
 * Description:
 *   PWM LEDs parent node
 */
#define DT_INST_0_PWM_LEDS                          1

/*
 * Devicetree node:
 *   /pwmleds/pwm_led_0
 *
 * Binding (compatible = pwm-leds):
 *   $ZEPHYR_BASE\dts\bindings\led\pwm-leds.yaml
 *
 * Dependency Ordinal: 21
 *
 * Requires:
 *   18  /pwmleds
 *   20  /soc/pwm@4001c000
 *
 * Description:
 *   PWM LED child node
 */
#define DT_PWM_LEDS_PWM_LED_0_PWMS_CONTROLLER       "PWM_0"
#define DT_ALIAS_PWM_LED0_PWMS_CONTROLLER           DT_PWM_LEDS_PWM_LED_0_PWMS_CONTROLLER
#define DT_PWM_LEDS_PWM_LED0_PWMS_CONTROLLER        DT_PWM_LEDS_PWM_LED_0_PWMS_CONTROLLER
#define DT_PWM_LEDS_PWM_LED_0_PWMS_CHANNEL          13
#define DT_ALIAS_PWM_LED0_PWMS_CHANNEL              DT_PWM_LEDS_PWM_LED_0_PWMS_CHANNEL
#define DT_PWM_LEDS_PWM_LED0_PWMS_CHANNEL           DT_PWM_LEDS_PWM_LED_0_PWMS_CHANNEL
#define DT_PWM_LEDS_PWM_LED_0_PWMS                  {"PWM_0", 13}
#define DT_ALIAS_PWM_LED0_PWMS                      DT_PWM_LEDS_PWM_LED_0_PWMS
#define DT_PWM_LEDS_PWM_LED0_PWMS                   DT_PWM_LEDS_PWM_LED_0_PWMS

/*
 * Devicetree node:
 *   /buttons
 *
 * Binding (compatible = gpio-keys):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-keys.yaml
 *
 * Dependency Ordinal: 2
 *
 * Requires:
 *   0   /
 *
 * Supports:
 *   5   /buttons/button_0
 *   6   /buttons/button_1
 *   7   /buttons/button_2
 *   8   /buttons/button_3
 *
 * Description:
 *   GPIO KEYS parent node
 */
#define DT_INST_0_GPIO_KEYS                         1

/*
 * Devicetree node:
 *   /buttons/button_0
 *
 * Binding (compatible = gpio-keys):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-keys.yaml
 *
 * Dependency Ordinal: 5
 *
 * Requires:
 *   2   /buttons
 *   4   /soc/gpio@50000000
 *
 * Description:
 *   GPIO KEYS child node
 */
#define DT_GPIO_KEYS_BUTTON_0_GPIOS_CONTROLLER      "GPIO_0"
#define DT_ALIAS_SW0_GPIOS_CONTROLLER               DT_GPIO_KEYS_BUTTON_0_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_SW0_GPIOS_CONTROLLER           DT_GPIO_KEYS_BUTTON_0_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_BUTTON_0_GPIOS_PIN             11
#define DT_ALIAS_SW0_GPIOS_PIN                      DT_GPIO_KEYS_BUTTON_0_GPIOS_PIN
#define DT_GPIO_KEYS_SW0_GPIOS_PIN                  DT_GPIO_KEYS_BUTTON_0_GPIOS_PIN
#define DT_GPIO_KEYS_BUTTON_0_GPIOS_FLAGS           256
#define DT_ALIAS_SW0_GPIOS_FLAGS                    DT_GPIO_KEYS_BUTTON_0_GPIOS_FLAGS
#define DT_GPIO_KEYS_SW0_GPIOS_FLAGS                DT_GPIO_KEYS_BUTTON_0_GPIOS_FLAGS
#define DT_GPIO_KEYS_BUTTON_0_GPIOS                 {"GPIO_0", 11, 256}
#define DT_ALIAS_SW0_GPIOS                          DT_GPIO_KEYS_BUTTON_0_GPIOS
#define DT_GPIO_KEYS_SW0_GPIOS                      DT_GPIO_KEYS_BUTTON_0_GPIOS
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_GPIO_KEYS_BUTTON_0_LABEL                 "Push button switch 0"
#define DT_ALIAS_SW0_LABEL                          DT_GPIO_KEYS_BUTTON_0_LABEL
#define DT_GPIO_KEYS_SW0_LABEL                      DT_GPIO_KEYS_BUTTON_0_LABEL

/*
 * Devicetree node:
 *   /buttons/button_1
 *
 * Binding (compatible = gpio-keys):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-keys.yaml
 *
 * Dependency Ordinal: 6
 *
 * Requires:
 *   2   /buttons
 *   4   /soc/gpio@50000000
 *
 * Description:
 *   GPIO KEYS child node
 */
#define DT_GPIO_KEYS_BUTTON_1_GPIOS_CONTROLLER      "GPIO_0"
#define DT_ALIAS_SW1_GPIOS_CONTROLLER               DT_GPIO_KEYS_BUTTON_1_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_SW1_GPIOS_CONTROLLER           DT_GPIO_KEYS_BUTTON_1_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_BUTTON_1_GPIOS_PIN             12
#define DT_ALIAS_SW1_GPIOS_PIN                      DT_GPIO_KEYS_BUTTON_1_GPIOS_PIN
#define DT_GPIO_KEYS_SW1_GPIOS_PIN                  DT_GPIO_KEYS_BUTTON_1_GPIOS_PIN
#define DT_GPIO_KEYS_BUTTON_1_GPIOS_FLAGS           256
#define DT_ALIAS_SW1_GPIOS_FLAGS                    DT_GPIO_KEYS_BUTTON_1_GPIOS_FLAGS
#define DT_GPIO_KEYS_SW1_GPIOS_FLAGS                DT_GPIO_KEYS_BUTTON_1_GPIOS_FLAGS
#define DT_GPIO_KEYS_BUTTON_1_GPIOS                 {"GPIO_0", 12, 256}
#define DT_ALIAS_SW1_GPIOS                          DT_GPIO_KEYS_BUTTON_1_GPIOS
#define DT_GPIO_KEYS_SW1_GPIOS                      DT_GPIO_KEYS_BUTTON_1_GPIOS
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_GPIO_KEYS_BUTTON_1_LABEL                 "Push button switch 1"
#define DT_ALIAS_SW1_LABEL                          DT_GPIO_KEYS_BUTTON_1_LABEL
#define DT_GPIO_KEYS_SW1_LABEL                      DT_GPIO_KEYS_BUTTON_1_LABEL

/*
 * Devicetree node:
 *   /buttons/button_2
 *
 * Binding (compatible = gpio-keys):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-keys.yaml
 *
 * Dependency Ordinal: 7
 *
 * Requires:
 *   2   /buttons
 *   4   /soc/gpio@50000000
 *
 * Description:
 *   GPIO KEYS child node
 */
#define DT_GPIO_KEYS_BUTTON_2_GPIOS_CONTROLLER      "GPIO_0"
#define DT_ALIAS_SW2_GPIOS_CONTROLLER               DT_GPIO_KEYS_BUTTON_2_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_SW2_GPIOS_CONTROLLER           DT_GPIO_KEYS_BUTTON_2_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_BUTTON_2_GPIOS_PIN             24
#define DT_ALIAS_SW2_GPIOS_PIN                      DT_GPIO_KEYS_BUTTON_2_GPIOS_PIN
#define DT_GPIO_KEYS_SW2_GPIOS_PIN                  DT_GPIO_KEYS_BUTTON_2_GPIOS_PIN
#define DT_GPIO_KEYS_BUTTON_2_GPIOS_FLAGS           256
#define DT_ALIAS_SW2_GPIOS_FLAGS                    DT_GPIO_KEYS_BUTTON_2_GPIOS_FLAGS
#define DT_GPIO_KEYS_SW2_GPIOS_FLAGS                DT_GPIO_KEYS_BUTTON_2_GPIOS_FLAGS
#define DT_GPIO_KEYS_BUTTON_2_GPIOS                 {"GPIO_0", 24, 256}
#define DT_ALIAS_SW2_GPIOS                          DT_GPIO_KEYS_BUTTON_2_GPIOS
#define DT_GPIO_KEYS_SW2_GPIOS                      DT_GPIO_KEYS_BUTTON_2_GPIOS
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_GPIO_KEYS_BUTTON_2_LABEL                 "Push button switch 2"
#define DT_ALIAS_SW2_LABEL                          DT_GPIO_KEYS_BUTTON_2_LABEL
#define DT_GPIO_KEYS_SW2_LABEL                      DT_GPIO_KEYS_BUTTON_2_LABEL

/*
 * Devicetree node:
 *   /buttons/button_3
 *
 * Binding (compatible = gpio-keys):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-keys.yaml
 *
 * Dependency Ordinal: 8
 *
 * Requires:
 *   2   /buttons
 *   4   /soc/gpio@50000000
 *
 * Description:
 *   GPIO KEYS child node
 */
#define DT_GPIO_KEYS_BUTTON_3_GPIOS_CONTROLLER      "GPIO_0"
#define DT_ALIAS_SW3_GPIOS_CONTROLLER               DT_GPIO_KEYS_BUTTON_3_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_SW3_GPIOS_CONTROLLER           DT_GPIO_KEYS_BUTTON_3_GPIOS_CONTROLLER
#define DT_GPIO_KEYS_BUTTON_3_GPIOS_PIN             25
#define DT_ALIAS_SW3_GPIOS_PIN                      DT_GPIO_KEYS_BUTTON_3_GPIOS_PIN
#define DT_GPIO_KEYS_SW3_GPIOS_PIN                  DT_GPIO_KEYS_BUTTON_3_GPIOS_PIN
#define DT_GPIO_KEYS_BUTTON_3_GPIOS_FLAGS           256
#define DT_ALIAS_SW3_GPIOS_FLAGS                    DT_GPIO_KEYS_BUTTON_3_GPIOS_FLAGS
#define DT_GPIO_KEYS_SW3_GPIOS_FLAGS                DT_GPIO_KEYS_BUTTON_3_GPIOS_FLAGS
#define DT_GPIO_KEYS_BUTTON_3_GPIOS                 {"GPIO_0", 25, 256}
#define DT_ALIAS_SW3_GPIOS                          DT_GPIO_KEYS_BUTTON_3_GPIOS
#define DT_GPIO_KEYS_SW3_GPIOS                      DT_GPIO_KEYS_BUTTON_3_GPIOS
/* Human readable string describing the device (used by Zephyr for API name) */
#define DT_GPIO_KEYS_BUTTON_3_LABEL                 "Push button switch 3"
#define DT_ALIAS_SW3_LABEL                          DT_GPIO_KEYS_BUTTON_3_LABEL
#define DT_GPIO_KEYS_SW3_LABEL                      DT_GPIO_KEYS_BUTTON_3_LABEL

/*
 * Devicetree node:
 *   /connector
 *
 * Binding (compatible = arduino-header-r3):
 *   $ZEPHYR_BASE\dts\bindings\gpio\arduino-header-r3.yaml
 *
 * Dependency Ordinal: 10
 *
 * Requires:
 *   0   /
 *
 * Description:
 *   GPIO pins exposed on Arduino Uno (R3) headers.
 *
 *   The Arduino Uno layout provides four headers, two each along
 *   opposite edges of the board.
 *
 *   Proceeding counter-clockwise:
 *   * An 8-pin Power Supply header.  No pins on this header are exposed
 *     by this binding.
 *   * A 6-pin Analog Input header.  This has analog input signals
 *     labeled from A0 at the top through A5 at the bottom.
 *   * An 8-pin header (opposite Analog Input).  This has digital input
 *     signals labeled from D0 at the bottom D7 at the top;
 *   * A 10-pin header (opposite Power Supply).  This has six additional
 *     digital input signals labelled from D8 at the bottom through D13
 *     towards the top, skipping two pins, then finishing with D14 and
 *     D15 at the top.
 *
 *   This binding provides a nexus mapping for 20 pins where parent pins 0
 *   through 5 correspond to A0 through A5, and parent pins 6 through 21
 *   correspond to D0 through D15, as depicted below:
 *
 *                                D15  21
 *                                D14  20
 *                                AREF -
 *                                GND  -
 *       - N/C                    D13  19
 *       - IOREF                  D12  18
 *       - RESET                  D11  17
 *       - 3V3                    D10  16
 *       - 5V                     D9   15
 *       - GND                    D8   14
 *       - GND
 *       - VIN                    D7   13
 *                                D6   12
 *       0 A0                     D5   11
 *       1 A1                     D4   10
 *       2 A2                     D3    9
 *       3 A3                     D2    8
 *       4 A4                     D1    7
 *       5 A5                     D0    6
 */
#define DT_INST_0_ARDUINO_HEADER_R3                 1

/* Compatibles appearing on enabled nodes */
#define DT_COMPAT_ARDUINO_HEADER_R3                 1
#define DT_COMPAT_ARM_CORTEX_M4F                    1
#define DT_COMPAT_ARM_CRYPTOCELL_310                1
#define DT_COMPAT_ARM_V7M_NVIC                      1
#define DT_COMPAT_FIXED_PARTITIONS                  1
#define DT_COMPAT_GPIO_KEYS                         1
#define DT_COMPAT_GPIO_LEDS                         1
#define DT_COMPAT_MMIO_SRAM                         1
#define DT_COMPAT_NORDIC_NRF52                      1
#define DT_COMPAT_NORDIC_NRF52840                   1
#define DT_COMPAT_NORDIC_NRF52840_QIAA              1
#define DT_COMPAT_NORDIC_NRF_CC310                  1
#define DT_COMPAT_NORDIC_NRF_CLOCK                  1
#define DT_COMPAT_NORDIC_NRF_GPIO                   1
#define DT_COMPAT_NORDIC_NRF_GPIOTE                 1
#define DT_COMPAT_NORDIC_NRF_PWM                    1
#define DT_COMPAT_NORDIC_NRF_QSPI                   1
#define DT_COMPAT_NORDIC_NRF_RTC                    1
#define DT_COMPAT_NORDIC_NRF_SAADC                  1
#define DT_COMPAT_NORDIC_NRF_SPI                    1
#define DT_COMPAT_NORDIC_NRF_SPIM                   1
#define DT_COMPAT_NORDIC_NRF_TEMP                   1
#define DT_COMPAT_NORDIC_NRF_TIMER                  1
#define DT_COMPAT_NORDIC_NRF_TWI                    1
#define DT_COMPAT_NORDIC_NRF_UART                   1
#define DT_COMPAT_NORDIC_NRF_UARTE                  1
#define DT_COMPAT_NORDIC_NRF_USBD                   1
#define DT_COMPAT_NORDIC_NRF_WATCHDOG               1
#define DT_COMPAT_NORDIC_NRF52_FLASH_CONTROLLER     1
#define DT_COMPAT_NORDIC_NRF52840                   1
#define DT_COMPAT_NORDIC_NRF52840_QIAA              1
#define DT_COMPAT_NORDIC_PCA10056_DK                1
#define DT_COMPAT_NORDIC_QSPI_NOR                   1
#define DT_COMPAT_PWM_LEDS                          1
#define DT_COMPAT_SIMPLE_BUS                        1
#define DT_COMPAT_SOC_NV_FLASH                      1

/* /chosen/zephyr,flash (/soc/flash-controller@4001e000/flash@0) */
#define DT_FLASH_BASE_ADDRESS                       0x0
#define DT_FLASH_SIZE                               1024
#define DT_FLASH_ERASE_BLOCK_SIZE                   4096
#define DT_FLASH_WRITE_BLOCK_SIZE                   4

/* /chosen/zephyr,code-partition (/soc/flash-controller@4001e000/flash@0/partitions/partition@c000) */
#define DT_CODE_PARTITION_OFFSET                    49152
#define DT_CODE_PARTITION_SIZE                      421888

/* Flash partition at /soc/flash-controller@4001e000/flash@0/partitions/partition@0 */
#define DT_FLASH_AREA_MCUBOOT_ID                    0
#define DT_FLASH_AREA_MCUBOOT_READ_ONLY             0
#define DT_FLASH_AREA_MCUBOOT_OFFSET_0              0
#define DT_FLASH_AREA_MCUBOOT_OFFSET                DT_FLASH_AREA_MCUBOOT_OFFSET_0
#define DT_FLASH_AREA_MCUBOOT_SIZE_0                49152
#define DT_FLASH_AREA_MCUBOOT_SIZE                  DT_FLASH_AREA_MCUBOOT_SIZE_0
#define DT_FLASH_AREA_MCUBOOT_DEV                   "NRF_FLASH_DRV_NAME"
#define DT_FLASH_AREA_0_ID                          0
#define DT_FLASH_AREA_0_READ_ONLY                   0
#define DT_FLASH_AREA_0_OFFSET_0                    0
#define DT_FLASH_AREA_0_OFFSET                      DT_FLASH_AREA_0_OFFSET_0
#define DT_FLASH_AREA_0_SIZE_0                      49152
#define DT_FLASH_AREA_0_SIZE                        DT_FLASH_AREA_0_SIZE_0
#define DT_FLASH_AREA_0_DEV                         "NRF_FLASH_DRV_NAME"

/* Flash partition at /soc/flash-controller@4001e000/flash@0/partitions/partition@c000 */
#define DT_FLASH_AREA_IMAGE_0_ID                    1
#define DT_FLASH_AREA_IMAGE_0_READ_ONLY             0
#define DT_FLASH_AREA_IMAGE_0_OFFSET_0              49152
#define DT_FLASH_AREA_IMAGE_0_OFFSET                DT_FLASH_AREA_IMAGE_0_OFFSET_0
#define DT_FLASH_AREA_IMAGE_0_SIZE_0                421888
#define DT_FLASH_AREA_IMAGE_0_SIZE                  DT_FLASH_AREA_IMAGE_0_SIZE_0
#define DT_FLASH_AREA_IMAGE_0_DEV                   "NRF_FLASH_DRV_NAME"
#define DT_FLASH_AREA_1_ID                          1
#define DT_FLASH_AREA_1_READ_ONLY                   0
#define DT_FLASH_AREA_1_OFFSET_0                    49152
#define DT_FLASH_AREA_1_OFFSET                      DT_FLASH_AREA_1_OFFSET_0
#define DT_FLASH_AREA_1_SIZE_0                      421888
#define DT_FLASH_AREA_1_SIZE                        DT_FLASH_AREA_1_SIZE_0
#define DT_FLASH_AREA_1_DEV                         "NRF_FLASH_DRV_NAME"

/* Flash partition at /soc/flash-controller@4001e000/flash@0/partitions/partition@73000 */
#define DT_FLASH_AREA_IMAGE_1_ID                    2
#define DT_FLASH_AREA_IMAGE_1_READ_ONLY             0
#define DT_FLASH_AREA_IMAGE_1_OFFSET_0              471040
#define DT_FLASH_AREA_IMAGE_1_OFFSET                DT_FLASH_AREA_IMAGE_1_OFFSET_0
#define DT_FLASH_AREA_IMAGE_1_SIZE_0                421888
#define DT_FLASH_AREA_IMAGE_1_SIZE                  DT_FLASH_AREA_IMAGE_1_SIZE_0
#define DT_FLASH_AREA_IMAGE_1_DEV                   "NRF_FLASH_DRV_NAME"
#define DT_FLASH_AREA_2_ID                          2
#define DT_FLASH_AREA_2_READ_ONLY                   0
#define DT_FLASH_AREA_2_OFFSET_0                    471040
#define DT_FLASH_AREA_2_OFFSET                      DT_FLASH_AREA_2_OFFSET_0
#define DT_FLASH_AREA_2_SIZE_0                      421888
#define DT_FLASH_AREA_2_SIZE                        DT_FLASH_AREA_2_SIZE_0
#define DT_FLASH_AREA_2_DEV                         "NRF_FLASH_DRV_NAME"

/* Flash partition at /soc/flash-controller@4001e000/flash@0/partitions/partition@da000 */
#define DT_FLASH_AREA_IMAGE_SCRATCH_ID              3
#define DT_FLASH_AREA_IMAGE_SCRATCH_READ_ONLY       0
#define DT_FLASH_AREA_IMAGE_SCRATCH_OFFSET_0        892928
#define DT_FLASH_AREA_IMAGE_SCRATCH_OFFSET          DT_FLASH_AREA_IMAGE_SCRATCH_OFFSET_0
#define DT_FLASH_AREA_IMAGE_SCRATCH_SIZE_0          122880
#define DT_FLASH_AREA_IMAGE_SCRATCH_SIZE            DT_FLASH_AREA_IMAGE_SCRATCH_SIZE_0
#define DT_FLASH_AREA_IMAGE_SCRATCH_DEV             "NRF_FLASH_DRV_NAME"
#define DT_FLASH_AREA_3_ID                          3
#define DT_FLASH_AREA_3_READ_ONLY                   0
#define DT_FLASH_AREA_3_OFFSET_0                    892928
#define DT_FLASH_AREA_3_OFFSET                      DT_FLASH_AREA_3_OFFSET_0
#define DT_FLASH_AREA_3_SIZE_0                      122880
#define DT_FLASH_AREA_3_SIZE                        DT_FLASH_AREA_3_SIZE_0
#define DT_FLASH_AREA_3_DEV                         "NRF_FLASH_DRV_NAME"

/* Flash partition at /soc/flash-controller@4001e000/flash@0/partitions/partition@f8000 */
#define DT_FLASH_AREA_STORAGE_ID                    4
#define DT_FLASH_AREA_STORAGE_READ_ONLY             0
#define DT_FLASH_AREA_STORAGE_OFFSET_0              1015808
#define DT_FLASH_AREA_STORAGE_OFFSET                DT_FLASH_AREA_STORAGE_OFFSET_0
#define DT_FLASH_AREA_STORAGE_SIZE_0                32768
#define DT_FLASH_AREA_STORAGE_SIZE                  DT_FLASH_AREA_STORAGE_SIZE_0
#define DT_FLASH_AREA_STORAGE_DEV                   "NRF_FLASH_DRV_NAME"
#define DT_FLASH_AREA_4_ID                          4
#define DT_FLASH_AREA_4_READ_ONLY                   0
#define DT_FLASH_AREA_4_OFFSET_0                    1015808
#define DT_FLASH_AREA_4_OFFSET                      DT_FLASH_AREA_4_OFFSET_0
#define DT_FLASH_AREA_4_SIZE_0                      32768
#define DT_FLASH_AREA_4_SIZE                        DT_FLASH_AREA_4_SIZE_0
#define DT_FLASH_AREA_4_DEV                         "NRF_FLASH_DRV_NAME"

/* Number of flash partitions */
#define DT_FLASH_AREA_NUM                           5
