/*
 * Generated by gen_defines.py
 *
 * DTS input file:
 *   nrf52840dk_nrf52840.dts.pre.tmp
 *
 * Directories with bindings:
 *   C:/NCS/v1.6.1/nrf/dts/bindings, $ZEPHYR_BASE\dts\bindings
 *
 * Node dependency ordering (ordinal and path):
 *   0   /
 *   1   /aliases
 *   2   /analog-connector
 *   3   /chosen
 *   4   /connector
 *   5   /soc
 *   6   /soc/interrupt-controller@e000e100
 *   7   /soc/timer@4000a000
 *   8   /sw-pwm
 *   9   /buttons
 *   10  /soc/gpio@50000000
 *   11  /buttons/button_0
 *   12  /buttons/button_1
 *   13  /buttons/button_2
 *   14  /buttons/button_3
 *   15  /cpus
 *   16  /cpus/cpu@0
 *   17  /leds
 *   18  /leds/led_0
 *   19  /leds/led_1
 *   20  /leds/led_2
 *   21  /leds/led_3
 *   22  /pwmleds
 *   23  /soc/pwm@4001c000
 *   24  /pwmleds/pwm_led_0
 *   25  /soc/adc@40007000
 *   26  /soc/clock@40000000
 *   27  /soc/ecb@4000e000
 *   28  /soc/ficr@10000000
 *   29  /soc/gpiote@40006000
 *   30  /soc/i2c@40003000
 *   31  /soc/i2c@40004000
 *   32  /soc/memory@20000000
 *   33  /soc/pwm@40021000
 *   34  /soc/pwm@40022000
 *   35  /soc/pwm@4002d000
 *   36  /soc/qdec@40012000
 *   37  /soc/random@4000d000
 *   38  /soc/rtc@4000b000
 *   39  /soc/rtc@40011000
 *   40  /soc/rtc@40024000
 *   41  /soc/spi@40003000
 *   42  /soc/spi@40004000
 *   43  /soc/spi@40023000
 *   44  /soc/gpio@50000300
 *   45  /soc/spi@4002f000
 *   46  /soc/temp@4000c000
 *   47  /soc/timer@40008000
 *   48  /soc/timer@40009000
 *   49  /soc/timer@4001a000
 *   50  /soc/timer@4001b000
 *   51  /soc/timer@e000e010
 *   52  /soc/uart@40002000
 *   53  /soc/uart@40028000
 *   54  /soc/uicr@10001000
 *   55  /soc/usbd@40027000
 *   56  /soc/watchdog@40010000
 *   57  /soc/crypto@5002a000
 *   58  /soc/crypto@5002a000/crypto@5002b000
 *   59  /soc/flash-controller@4001e000
 *   60  /soc/flash-controller@4001e000/flash@0
 *   61  /soc/flash-controller@4001e000/flash@0/partitions
 *   62  /soc/flash-controller@4001e000/flash@0/partitions/partition@0
 *   63  /soc/flash-controller@4001e000/flash@0/partitions/partition@c000
 *   64  /soc/flash-controller@4001e000/flash@0/partitions/partition@73000
 *   65  /soc/flash-controller@4001e000/flash@0/partitions/partition@da000
 *   66  /soc/flash-controller@4001e000/flash@0/partitions/partition@f8000
 *   67  /soc/qspi@40029000
 *   68  /soc/qspi@40029000/mx25r6435f@0
 *
 * Definitions derived from these nodes in dependency order are next,
 * followed by /chosen nodes.
 */

/*
 * Devicetree node: /
 *
 * Node identifier: DT_N
 */

/* Node's full path: */
#define DT_N_PATH "/"

/* Node's name with unit-address: */
#define DT_N_FULL_NAME "/"
#define DT_N_FOREACH_CHILD(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_cpus) fn(DT_N_S_sw_pwm) fn(DT_N_S_leds) fn(DT_N_S_pwmleds) fn(DT_N_S_buttons) fn(DT_N_S_connector) fn(DT_N_S_analog_connector)
#define DT_N_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_cpus) fn(DT_N_S_leds) fn(DT_N_S_pwmleds) fn(DT_N_S_buttons) fn(DT_N_S_connector) fn(DT_N_S_analog_connector) 

/* Node's dependency ordinal: */
#define DT_N_ORD 0

/* Ordinals for what this node depends on directly: */
#define DT_N_REQUIRES_ORDS /* nothing */

/* Ordinals for what depends directly on this node: */
#define DT_N_SUPPORTS_ORDS \
	1, /* /aliases */ \
	2, /* /analog-connector */ \
	3, /* /chosen */ \
	4, /* /connector */ \
	5, /* /soc */ \
	8, /* /sw-pwm */ \
	9, /* /buttons */ \
	15, /* /cpus */ \
	17, /* /leds */ \
	22, /* /pwmleds */

/* Existence and alternate IDs: */
#define DT_N_EXISTS 1
#define DT_N_INST_0_nordic_nrf52840_dk_nrf52840 DT_N

/* Special property macros: */
#define DT_N_REG_NUM 0
#define DT_N_IRQ_NUM 0
#define DT_N_COMPAT_MATCHES_nordic_nrf52840_dk_nrf52840 1
#define DT_N_STATUS_okay 1

/* Generic property macros: */
#define DT_N_P_compatible {"nordic,nrf52840-dk-nrf52840"}
#define DT_N_P_compatible_IDX_0 "nordic,nrf52840-dk-nrf52840"
#define DT_N_P_compatible_IDX_0_EXISTS 1
#define DT_N_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N, compatible, 0)
#define DT_N_P_compatible_LEN 1
#define DT_N_P_compatible_EXISTS 1

/*
 * Devicetree node: /aliases
 *
 * Node identifier: DT_N_S_aliases
 */

/* Node's full path: */
#define DT_N_S_aliases_PATH "/aliases"

/* Node's name with unit-address: */
#define DT_N_S_aliases_FULL_NAME "aliases"

/* Node parent (/) identifier: */
#define DT_N_S_aliases_PARENT DT_N
#define DT_N_S_aliases_FOREACH_CHILD(fn) 
#define DT_N_S_aliases_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_aliases_ORD 1

/* Ordinals for what this node depends on directly: */
#define DT_N_S_aliases_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_aliases_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_aliases_EXISTS 1

/* Special property macros: */
#define DT_N_S_aliases_REG_NUM 0
#define DT_N_S_aliases_IRQ_NUM 0
#define DT_N_S_aliases_STATUS_okay 1

/* (No generic property macros) */

/*
 * Devicetree node: /analog-connector
 *
 * Node identifier: DT_N_S_analog_connector
 *
 * Binding (compatible = arduino,uno-adc):
 *   $ZEPHYR_BASE\dts\bindings\adc\arduino,uno-adc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_analog_connector_PATH "/analog-connector"

/* Node's name with unit-address: */
#define DT_N_S_analog_connector_FULL_NAME "analog-connector"

/* Node parent (/) identifier: */
#define DT_N_S_analog_connector_PARENT DT_N
#define DT_N_S_analog_connector_FOREACH_CHILD(fn) 
#define DT_N_S_analog_connector_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_analog_connector_ORD 2

/* Ordinals for what this node depends on directly: */
#define DT_N_S_analog_connector_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_analog_connector_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_analog_connector_EXISTS 1
#define DT_N_INST_0_arduino_uno_adc DT_N_S_analog_connector
#define DT_N_NODELABEL_arduino_adc  DT_N_S_analog_connector

/* Special property macros: */
#define DT_N_S_analog_connector_REG_NUM 0
#define DT_N_S_analog_connector_IRQ_NUM 0
#define DT_N_S_analog_connector_COMPAT_MATCHES_arduino_uno_adc 1
#define DT_N_S_analog_connector_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_analog_connector_P_compatible {"arduino,uno-adc"}
#define DT_N_S_analog_connector_P_compatible_IDX_0 "arduino,uno-adc"
#define DT_N_S_analog_connector_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_analog_connector_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_analog_connector, compatible, 0)
#define DT_N_S_analog_connector_P_compatible_LEN 1
#define DT_N_S_analog_connector_P_compatible_EXISTS 1

/*
 * Devicetree node: /chosen
 *
 * Node identifier: DT_N_S_chosen
 */

/* Node's full path: */
#define DT_N_S_chosen_PATH "/chosen"

/* Node's name with unit-address: */
#define DT_N_S_chosen_FULL_NAME "chosen"

/* Node parent (/) identifier: */
#define DT_N_S_chosen_PARENT DT_N
#define DT_N_S_chosen_FOREACH_CHILD(fn) 
#define DT_N_S_chosen_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_chosen_ORD 3

/* Ordinals for what this node depends on directly: */
#define DT_N_S_chosen_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_chosen_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_chosen_EXISTS 1

/* Special property macros: */
#define DT_N_S_chosen_REG_NUM 0
#define DT_N_S_chosen_IRQ_NUM 0
#define DT_N_S_chosen_STATUS_okay 1

/* (No generic property macros) */

/*
 * Devicetree node: /connector
 *
 * Node identifier: DT_N_S_connector
 *
 * Binding (compatible = arduino-header-r3):
 *   $ZEPHYR_BASE\dts\bindings\gpio\arduino-header-r3.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_connector_PATH "/connector"

/* Node's name with unit-address: */
#define DT_N_S_connector_FULL_NAME "connector"

/* Node parent (/) identifier: */
#define DT_N_S_connector_PARENT DT_N
#define DT_N_S_connector_FOREACH_CHILD(fn) 
#define DT_N_S_connector_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_connector_ORD 4

/* Ordinals for what this node depends on directly: */
#define DT_N_S_connector_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_connector_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_connector_EXISTS 1
#define DT_N_INST_0_arduino_header_r3 DT_N_S_connector
#define DT_N_NODELABEL_arduino_header DT_N_S_connector

/* Special property macros: */
#define DT_N_S_connector_REG_NUM 0
#define DT_N_S_connector_IRQ_NUM 0
#define DT_N_S_connector_COMPAT_MATCHES_arduino_header_r3 1
#define DT_N_S_connector_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_connector_P_compatible {"arduino-header-r3"}
#define DT_N_S_connector_P_compatible_IDX_0 "arduino-header-r3"
#define DT_N_S_connector_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_connector_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_connector, compatible, 0)
#define DT_N_S_connector_P_compatible_LEN 1
#define DT_N_S_connector_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc
 *
 * Node identifier: DT_N_S_soc
 */

/* Node's full path: */
#define DT_N_S_soc_PATH "/soc"

/* Node's name with unit-address: */
#define DT_N_S_soc_FULL_NAME "soc"

/* Node parent (/) identifier: */
#define DT_N_S_soc_PARENT DT_N
#define DT_N_S_soc_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_flash_controller_4001e000) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_adc_40007000) fn(DT_N_S_soc_S_clock_40000000) fn(DT_N_S_soc_S_ecb_4000e000) fn(DT_N_S_soc_S_uart_40002000) fn(DT_N_S_soc_S_uart_40028000) fn(DT_N_S_soc_S_gpiote_40006000) fn(DT_N_S_soc_S_gpio_50000000) fn(DT_N_S_soc_S_gpio_50000300) fn(DT_N_S_soc_S_i2c_40003000) fn(DT_N_S_soc_S_i2c_40004000) fn(DT_N_S_soc_S_pwm_4001c000) fn(DT_N_S_soc_S_pwm_40021000) fn(DT_N_S_soc_S_pwm_40022000) fn(DT_N_S_soc_S_pwm_4002d000) fn(DT_N_S_soc_S_qdec_40012000) fn(DT_N_S_soc_S_random_4000d000) fn(DT_N_S_soc_S_spi_40003000) fn(DT_N_S_soc_S_spi_40004000) fn(DT_N_S_soc_S_spi_40023000) fn(DT_N_S_soc_S_spi_4002f000) fn(DT_N_S_soc_S_qspi_40029000) fn(DT_N_S_soc_S_rtc_4000b000) fn(DT_N_S_soc_S_rtc_40011000) fn(DT_N_S_soc_S_rtc_40024000) fn(DT_N_S_soc_S_timer_40008000) fn(DT_N_S_soc_S_timer_40009000) fn(DT_N_S_soc_S_timer_4000a000) fn(DT_N_S_soc_S_timer_4001a000) fn(DT_N_S_soc_S_timer_4001b000) fn(DT_N_S_soc_S_temp_4000c000) fn(DT_N_S_soc_S_usbd_40027000) fn(DT_N_S_soc_S_watchdog_40010000) fn(DT_N_S_soc_S_crypto_5002a000) fn(DT_N_S_soc_S_ficr_10000000) fn(DT_N_S_soc_S_uicr_10001000)
#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_flash_controller_4001e000) fn(DT_N_S_soc_S_memory_20000000) fn(DT_N_S_soc_S_adc_40007000) fn(DT_N_S_soc_S_clock_40000000) fn(DT_N_S_soc_S_ecb_4000e000) fn(DT_N_S_soc_S_uart_40002000) fn(DT_N_S_soc_S_uart_40028000) fn(DT_N_S_soc_S_gpiote_40006000) fn(DT_N_S_soc_S_gpio_50000000) fn(DT_N_S_soc_S_gpio_50000300) fn(DT_N_S_soc_S_i2c_40003000) fn(DT_N_S_soc_S_pwm_4001c000) fn(DT_N_S_soc_S_random_4000d000) fn(DT_N_S_soc_S_spi_40004000) fn(DT_N_S_soc_S_spi_4002f000) fn(DT_N_S_soc_S_qspi_40029000) fn(DT_N_S_soc_S_rtc_4000b000) fn(DT_N_S_soc_S_rtc_40011000) fn(DT_N_S_soc_S_rtc_40024000) fn(DT_N_S_soc_S_timer_40008000) fn(DT_N_S_soc_S_timer_40009000) fn(DT_N_S_soc_S_timer_4000a000) fn(DT_N_S_soc_S_timer_4001a000) fn(DT_N_S_soc_S_timer_4001b000) fn(DT_N_S_soc_S_temp_4000c000) fn(DT_N_S_soc_S_usbd_40027000) fn(DT_N_S_soc_S_watchdog_40010000) fn(DT_N_S_soc_S_crypto_5002a000) fn(DT_N_S_soc_S_ficr_10000000) fn(DT_N_S_soc_S_uicr_10001000) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_ORD 5

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_SUPPORTS_ORDS \
	6, /* /soc/interrupt-controller@e000e100 */ \
	7, /* /soc/timer@4000a000 */ \
	10, /* /soc/gpio@50000000 */ \
	23, /* /soc/pwm@4001c000 */ \
	25, /* /soc/adc@40007000 */ \
	26, /* /soc/clock@40000000 */ \
	27, /* /soc/ecb@4000e000 */ \
	28, /* /soc/ficr@10000000 */ \
	29, /* /soc/gpiote@40006000 */ \
	30, /* /soc/i2c@40003000 */ \
	31, /* /soc/i2c@40004000 */ \
	32, /* /soc/memory@20000000 */ \
	33, /* /soc/pwm@40021000 */ \
	34, /* /soc/pwm@40022000 */ \
	35, /* /soc/pwm@4002d000 */ \
	36, /* /soc/qdec@40012000 */ \
	37, /* /soc/random@4000d000 */ \
	38, /* /soc/rtc@4000b000 */ \
	39, /* /soc/rtc@40011000 */ \
	40, /* /soc/rtc@40024000 */ \
	41, /* /soc/spi@40003000 */ \
	42, /* /soc/spi@40004000 */ \
	43, /* /soc/spi@40023000 */ \
	44, /* /soc/gpio@50000300 */ \
	45, /* /soc/spi@4002f000 */ \
	46, /* /soc/temp@4000c000 */ \
	47, /* /soc/timer@40008000 */ \
	48, /* /soc/timer@40009000 */ \
	49, /* /soc/timer@4001a000 */ \
	50, /* /soc/timer@4001b000 */ \
	51, /* /soc/timer@e000e010 */ \
	52, /* /soc/uart@40002000 */ \
	53, /* /soc/uart@40028000 */ \
	54, /* /soc/uicr@10001000 */ \
	55, /* /soc/usbd@40027000 */ \
	56, /* /soc/watchdog@40010000 */ \
	57, /* /soc/crypto@5002a000 */ \
	59, /* /soc/flash-controller@4001e000 */ \
	67, /* /soc/qspi@40029000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_EXISTS 1
#define DT_N_INST_0_nordic_nrf52840_qiaa DT_N_S_soc
#define DT_N_INST_0_nordic_nrf52840      DT_N_S_soc
#define DT_N_INST_0_nordic_nrf52         DT_N_S_soc
#define DT_N_INST_0_simple_bus           DT_N_S_soc

/* Special property macros: */
#define DT_N_S_soc_REG_NUM 0
#define DT_N_S_soc_IRQ_NUM 0
#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf52840_qiaa 1
#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf52840 1
#define DT_N_S_soc_COMPAT_MATCHES_nordic_nrf52 1
#define DT_N_S_soc_COMPAT_MATCHES_simple_bus 1
#define DT_N_S_soc_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_P_compatible {"nordic,nRF52840-QIAA", "nordic,nRF52840", "nordic,nRF52", "simple-bus"}
#define DT_N_S_soc_P_compatible_IDX_0 "nordic,nRF52840-QIAA"
#define DT_N_S_soc_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_1 "nordic,nRF52840"
#define DT_N_S_soc_P_compatible_IDX_1_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_2 "nordic,nRF52"
#define DT_N_S_soc_P_compatible_IDX_2_EXISTS 1
#define DT_N_S_soc_P_compatible_IDX_3 "simple-bus"
#define DT_N_S_soc_P_compatible_IDX_3_EXISTS 1
#define DT_N_S_soc_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc, compatible, 0) \
	fn(DT_N_S_soc, compatible, 1) \
	fn(DT_N_S_soc, compatible, 2) \
	fn(DT_N_S_soc, compatible, 3)
#define DT_N_S_soc_P_compatible_LEN 4
#define DT_N_S_soc_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/interrupt-controller@e000e100
 *
 * Node identifier: DT_N_S_soc_S_interrupt_controller_e000e100
 *
 * Binding (compatible = arm,v7m-nvic):
 *   $ZEPHYR_BASE\dts\bindings\interrupt-controller\arm,v7m-nvic.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_PATH "/soc/interrupt-controller@e000e100"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_FULL_NAME "interrupt-controller@e000e100"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_PARENT DT_N_S_soc
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_interrupt_controller_e000e100_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_ORD 6

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_SUPPORTS_ORDS \
	7, /* /soc/timer@4000a000 */ \
	23, /* /soc/pwm@4001c000 */ \
	25, /* /soc/adc@40007000 */ \
	26, /* /soc/clock@40000000 */ \
	27, /* /soc/ecb@4000e000 */ \
	29, /* /soc/gpiote@40006000 */ \
	30, /* /soc/i2c@40003000 */ \
	31, /* /soc/i2c@40004000 */ \
	33, /* /soc/pwm@40021000 */ \
	34, /* /soc/pwm@40022000 */ \
	35, /* /soc/pwm@4002d000 */ \
	36, /* /soc/qdec@40012000 */ \
	37, /* /soc/random@4000d000 */ \
	38, /* /soc/rtc@4000b000 */ \
	39, /* /soc/rtc@40011000 */ \
	40, /* /soc/rtc@40024000 */ \
	41, /* /soc/spi@40003000 */ \
	42, /* /soc/spi@40004000 */ \
	43, /* /soc/spi@40023000 */ \
	45, /* /soc/spi@4002f000 */ \
	46, /* /soc/temp@4000c000 */ \
	47, /* /soc/timer@40008000 */ \
	48, /* /soc/timer@40009000 */ \
	49, /* /soc/timer@4001a000 */ \
	50, /* /soc/timer@4001b000 */ \
	52, /* /soc/uart@40002000 */ \
	53, /* /soc/uart@40028000 */ \
	55, /* /soc/usbd@40027000 */ \
	56, /* /soc/watchdog@40010000 */ \
	58, /* /soc/crypto@5002a000/crypto@5002b000 */ \
	67, /* /soc/qspi@40029000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_EXISTS 1
#define DT_N_INST_0_arm_v7m_nvic DT_N_S_soc_S_interrupt_controller_e000e100
#define DT_N_NODELABEL_nvic      DT_N_S_soc_S_interrupt_controller_e000e100

/* Special property macros: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_NUM 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_ADDRESS 3758153984 /* 0xe000e100 */
#define DT_N_S_soc_S_interrupt_controller_e000e100_REG_IDX_0_VAL_SIZE 3072 /* 0xc00 */
#define DT_N_S_soc_S_interrupt_controller_e000e100_IRQ_NUM 0
#define DT_N_S_soc_S_interrupt_controller_e000e100_COMPAT_MATCHES_arm_v7m_nvic 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg {3758153984 /* 0xe000e100 */, 3072 /* 0xc00 */}
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0 3758153984
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1 3072
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100, reg, 0) \
	fn(DT_N_S_soc_S_interrupt_controller_e000e100, reg, 1)
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_reg_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits 3
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_arm_num_irq_priority_bits_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_interrupt_controller_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible {"arm,v7m-nvic"}
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0 "arm,v7m-nvic"
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100, compatible, 0)
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_LEN 1
#define DT_N_S_soc_S_interrupt_controller_e000e100_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/timer@4000a000
 *
 * Node identifier: DT_N_S_soc_S_timer_4000a000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_4000a000_PATH "/soc/timer@4000a000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_4000a000_FULL_NAME "timer@4000a000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_4000a000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_timer_4000a000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_4000a000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_4000a000_ORD 7

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_4000a000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_4000a000_SUPPORTS_ORDS \
	8, /* /sw-pwm */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_4000a000_EXISTS 1
#define DT_N_INST_2_nordic_nrf_timer DT_N_S_soc_S_timer_4000a000
#define DT_N_NODELABEL_timer2        DT_N_S_soc_S_timer_4000a000

/* Special property macros: */
#define DT_N_S_soc_S_timer_4000a000_REG_NUM 1
#define DT_N_S_soc_S_timer_4000a000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_REG_IDX_0_VAL_ADDRESS 1073782784 /* 0x4000a000 */
#define DT_N_S_soc_S_timer_4000a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_4000a000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_irq 10
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_4000a000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_4000a000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_timer_4000a000_P_reg {1073782784 /* 0x4000a000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_0 1073782784
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_4000a000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4000a000, reg, 0) \
	fn(DT_N_S_soc_S_timer_4000a000, reg, 1)
#define DT_N_S_soc_S_timer_4000a000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_cc_num 4
#define DT_N_S_soc_S_timer_4000a000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts {10 /* 0xa */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_0 10
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4000a000, interrupts, 0) \
	fn(DT_N_S_soc_S_timer_4000a000, interrupts, 1)
#define DT_N_S_soc_S_timer_4000a000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_label "TIMER_2"
#define DT_N_S_soc_S_timer_4000a000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4000a000, label, 0) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 1) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 2) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 3) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 4) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 5) \
	fn(DT_N_S_soc_S_timer_4000a000, label, 6)
#define DT_N_S_soc_S_timer_4000a000_P_label_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_prescaler 0
#define DT_N_S_soc_S_timer_4000a000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_status "okay"
#define DT_N_S_soc_S_timer_4000a000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_timer_4000a000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_timer_4000a000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_4000a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4000a000, status, 0) \
	fn(DT_N_S_soc_S_timer_4000a000, status, 1) \
	fn(DT_N_S_soc_S_timer_4000a000, status, 2) \
	fn(DT_N_S_soc_S_timer_4000a000, status, 3)
#define DT_N_S_soc_S_timer_4000a000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_4000a000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_4000a000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4000a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4000a000, compatible, 0)
#define DT_N_S_soc_S_timer_4000a000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_4000a000_P_compatible_EXISTS 1

/*
 * Devicetree node: /sw-pwm
 *
 * Node identifier: DT_N_S_sw_pwm
 *
 * Binding (compatible = nordic,nrf-sw-pwm):
 *   $ZEPHYR_BASE\dts\bindings\pwm\nordic,nrf-sw-pwm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_sw_pwm_PATH "/sw-pwm"

/* Node's name with unit-address: */
#define DT_N_S_sw_pwm_FULL_NAME "sw-pwm"

/* Node parent (/) identifier: */
#define DT_N_S_sw_pwm_PARENT DT_N
#define DT_N_S_sw_pwm_FOREACH_CHILD(fn) 
#define DT_N_S_sw_pwm_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_sw_pwm_ORD 8

/* Ordinals for what this node depends on directly: */
#define DT_N_S_sw_pwm_REQUIRES_ORDS \
	0, /* / */ \
	7, /* /soc/timer@4000a000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_sw_pwm_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_sw_pwm_EXISTS 1
#define DT_N_INST_0_nordic_nrf_sw_pwm DT_N_S_sw_pwm
#define DT_N_NODELABEL_sw_pwm         DT_N_S_sw_pwm

/* Special property macros: */
#define DT_N_S_sw_pwm_REG_NUM 0
#define DT_N_S_sw_pwm_IRQ_NUM 0
#define DT_N_S_sw_pwm_COMPAT_MATCHES_nordic_nrf_sw_pwm 1
#define DT_N_S_sw_pwm_STATUS_disabled 1

/* Generic property macros: */
#define DT_N_S_sw_pwm_P_generator_IDX_0_PH DT_N_S_soc_S_timer_4000a000
#define DT_N_S_sw_pwm_P_generator_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_P_generator_LEN 1
#define DT_N_S_sw_pwm_P_generator_EXISTS 1
#define DT_N_S_sw_pwm_P_channel_count 3
#define DT_N_S_sw_pwm_P_channel_count_EXISTS 1
#define DT_N_S_sw_pwm_P_clock_prescaler 0
#define DT_N_S_sw_pwm_P_clock_prescaler_EXISTS 1
#define DT_N_S_sw_pwm_P_ppi_base 0
#define DT_N_S_sw_pwm_P_ppi_base_EXISTS 1
#define DT_N_S_sw_pwm_P_gpiote_base 0
#define DT_N_S_sw_pwm_P_gpiote_base_EXISTS 1
#define DT_N_S_sw_pwm_P_label "SW_PWM"
#define DT_N_S_sw_pwm_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, label, 0) \
	fn(DT_N_S_sw_pwm, label, 1) \
	fn(DT_N_S_sw_pwm, label, 2) \
	fn(DT_N_S_sw_pwm, label, 3) \
	fn(DT_N_S_sw_pwm, label, 4) \
	fn(DT_N_S_sw_pwm, label, 5)
#define DT_N_S_sw_pwm_P_label_EXISTS 1
#define DT_N_S_sw_pwm_P_status "disabled"
#define DT_N_S_sw_pwm_P_status_ENUM_IDX 2
#define DT_N_S_sw_pwm_P_status_ENUM_TOKEN disabled
#define DT_N_S_sw_pwm_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_sw_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, status, 0) \
	fn(DT_N_S_sw_pwm, status, 1) \
	fn(DT_N_S_sw_pwm, status, 2) \
	fn(DT_N_S_sw_pwm, status, 3) \
	fn(DT_N_S_sw_pwm, status, 4) \
	fn(DT_N_S_sw_pwm, status, 5) \
	fn(DT_N_S_sw_pwm, status, 6) \
	fn(DT_N_S_sw_pwm, status, 7)
#define DT_N_S_sw_pwm_P_status_EXISTS 1
#define DT_N_S_sw_pwm_P_compatible {"nordic,nrf-sw-pwm"}
#define DT_N_S_sw_pwm_P_compatible_IDX_0 "nordic,nrf-sw-pwm"
#define DT_N_S_sw_pwm_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_sw_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_sw_pwm, compatible, 0)
#define DT_N_S_sw_pwm_P_compatible_LEN 1
#define DT_N_S_sw_pwm_P_compatible_EXISTS 1

/*
 * Devicetree node: /buttons
 *
 * Node identifier: DT_N_S_buttons
 *
 * Binding (compatible = gpio-keys):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-keys.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_buttons_PATH "/buttons"

/* Node's name with unit-address: */
#define DT_N_S_buttons_FULL_NAME "buttons"

/* Node parent (/) identifier: */
#define DT_N_S_buttons_PARENT DT_N
#define DT_N_S_buttons_FOREACH_CHILD(fn) fn(DT_N_S_buttons_S_button_0) fn(DT_N_S_buttons_S_button_1) fn(DT_N_S_buttons_S_button_2) fn(DT_N_S_buttons_S_button_3)
#define DT_N_S_buttons_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_buttons_S_button_0) fn(DT_N_S_buttons_S_button_1) fn(DT_N_S_buttons_S_button_2) fn(DT_N_S_buttons_S_button_3) 

/* Node's dependency ordinal: */
#define DT_N_S_buttons_ORD 9

/* Ordinals for what this node depends on directly: */
#define DT_N_S_buttons_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_buttons_SUPPORTS_ORDS \
	11, /* /buttons/button_0 */ \
	12, /* /buttons/button_1 */ \
	13, /* /buttons/button_2 */ \
	14, /* /buttons/button_3 */

/* Existence and alternate IDs: */
#define DT_N_S_buttons_EXISTS 1
#define DT_N_INST_0_gpio_keys DT_N_S_buttons

/* Special property macros: */
#define DT_N_S_buttons_REG_NUM 0
#define DT_N_S_buttons_IRQ_NUM 0
#define DT_N_S_buttons_COMPAT_MATCHES_gpio_keys 1
#define DT_N_S_buttons_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_buttons_P_compatible {"gpio-keys"}
#define DT_N_S_buttons_P_compatible_IDX_0 "gpio-keys"
#define DT_N_S_buttons_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_buttons_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons, compatible, 0)
#define DT_N_S_buttons_P_compatible_LEN 1
#define DT_N_S_buttons_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/gpio@50000000
 *
 * Node identifier: DT_N_S_soc_S_gpio_50000000
 *
 * Binding (compatible = nordic,nrf-gpio):
 *   $ZEPHYR_BASE\dts\bindings\gpio\nordic,nrf-gpio.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_gpio_50000000_PATH "/soc/gpio@50000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_gpio_50000000_FULL_NAME "gpio@50000000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_gpio_50000000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_gpio_50000000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_gpio_50000000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_gpio_50000000_ORD 10

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_gpio_50000000_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_gpio_50000000_SUPPORTS_ORDS \
	11, /* /buttons/button_0 */ \
	12, /* /buttons/button_1 */ \
	13, /* /buttons/button_2 */ \
	14, /* /buttons/button_3 */ \
	18, /* /leds/led_0 */ \
	19, /* /leds/led_1 */ \
	20, /* /leds/led_2 */ \
	21, /* /leds/led_3 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_gpio_50000000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_gpio DT_N_S_soc_S_gpio_50000000
#define DT_N_NODELABEL_gpio0        DT_N_S_soc_S_gpio_50000000

/* Special property macros: */
#define DT_N_S_soc_S_gpio_50000000_REG_NUM 2
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_0_VAL_ADDRESS 1342177280 /* 0x50000000 */
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_0_VAL_SIZE 512 /* 0x200 */
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_1_VAL_ADDRESS 1342178560 /* 0x50000500 */
#define DT_N_S_soc_S_gpio_50000000_REG_IDX_1_VAL_SIZE 768 /* 0x300 */
#define DT_N_S_soc_S_gpio_50000000_IRQ_NUM 0
#define DT_N_S_soc_S_gpio_50000000_COMPAT_MATCHES_nordic_nrf_gpio 1
#define DT_N_S_soc_S_gpio_50000000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_gpio_50000000_P_reg {1342177280 /* 0x50000000 */, 512 /* 0x200 */, 1342178560 /* 0x50000500 */, 768 /* 0x300 */}
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_0 1342177280
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_1 512
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_2 1342178560
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_2_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_3 768
#define DT_N_S_soc_S_gpio_50000000_P_reg_IDX_3_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_50000000, reg, 0) \
	fn(DT_N_S_soc_S_gpio_50000000, reg, 1) \
	fn(DT_N_S_soc_S_gpio_50000000, reg, 2) \
	fn(DT_N_S_soc_S_gpio_50000000, reg, 3)
#define DT_N_S_soc_S_gpio_50000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_label "GPIO_0"
#define DT_N_S_soc_S_gpio_50000000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_50000000, label, 0) \
	fn(DT_N_S_soc_S_gpio_50000000, label, 1) \
	fn(DT_N_S_soc_S_gpio_50000000, label, 2) \
	fn(DT_N_S_soc_S_gpio_50000000, label, 3) \
	fn(DT_N_S_soc_S_gpio_50000000, label, 4) \
	fn(DT_N_S_soc_S_gpio_50000000, label, 5)
#define DT_N_S_soc_S_gpio_50000000_P_label_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_port 0
#define DT_N_S_soc_S_gpio_50000000_P_port_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_gpio_controller 1
#define DT_N_S_soc_S_gpio_50000000_P_gpio_controller_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_ngpios 32
#define DT_N_S_soc_S_gpio_50000000_P_ngpios_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_status "okay"
#define DT_N_S_soc_S_gpio_50000000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_gpio_50000000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_gpio_50000000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpio_50000000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_50000000, status, 0) \
	fn(DT_N_S_soc_S_gpio_50000000, status, 1) \
	fn(DT_N_S_soc_S_gpio_50000000, status, 2) \
	fn(DT_N_S_soc_S_gpio_50000000, status, 3)
#define DT_N_S_soc_S_gpio_50000000_P_status_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_compatible {"nordic,nrf-gpio"}
#define DT_N_S_soc_S_gpio_50000000_P_compatible_IDX_0 "nordic,nrf-gpio"
#define DT_N_S_soc_S_gpio_50000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_50000000, compatible, 0)
#define DT_N_S_soc_S_gpio_50000000_P_compatible_LEN 1
#define DT_N_S_soc_S_gpio_50000000_P_compatible_EXISTS 1

/*
 * Devicetree node: /buttons/button_0
 *
 * Node identifier: DT_N_S_buttons_S_button_0
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_buttons_S_button_0_PATH "/buttons/button_0"

/* Node's name with unit-address: */
#define DT_N_S_buttons_S_button_0_FULL_NAME "button_0"

/* Node parent (/buttons) identifier: */
#define DT_N_S_buttons_S_button_0_PARENT DT_N_S_buttons
#define DT_N_S_buttons_S_button_0_FOREACH_CHILD(fn) 
#define DT_N_S_buttons_S_button_0_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_buttons_S_button_0_ORD 11

/* Ordinals for what this node depends on directly: */
#define DT_N_S_buttons_S_button_0_REQUIRES_ORDS \
	9, /* /buttons */ \
	10, /* /soc/gpio@50000000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_buttons_S_button_0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_buttons_S_button_0_EXISTS 1
#define DT_N_ALIAS_sw0         DT_N_S_buttons_S_button_0
#define DT_N_NODELABEL_button0 DT_N_S_buttons_S_button_0

/* Special property macros: */
#define DT_N_S_buttons_S_button_0_REG_NUM 0
#define DT_N_S_buttons_S_button_0_IRQ_NUM 0
#define DT_N_S_buttons_S_button_0_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_EXISTS 1
#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000000
#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_VAL_pin 11
#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_VAL_flags 17
#define DT_N_S_buttons_S_button_0_P_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_buttons_S_button_0_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_0, gpios, 0)
#define DT_N_S_buttons_S_button_0_P_gpios_LEN 1
#define DT_N_S_buttons_S_button_0_P_gpios_EXISTS 1
#define DT_N_S_buttons_S_button_0_P_label "Push button switch 0"
#define DT_N_S_buttons_S_button_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_0, label, 0) \
	fn(DT_N_S_buttons_S_button_0, label, 1) \
	fn(DT_N_S_buttons_S_button_0, label, 2) \
	fn(DT_N_S_buttons_S_button_0, label, 3) \
	fn(DT_N_S_buttons_S_button_0, label, 4) \
	fn(DT_N_S_buttons_S_button_0, label, 5) \
	fn(DT_N_S_buttons_S_button_0, label, 6) \
	fn(DT_N_S_buttons_S_button_0, label, 7) \
	fn(DT_N_S_buttons_S_button_0, label, 8) \
	fn(DT_N_S_buttons_S_button_0, label, 9) \
	fn(DT_N_S_buttons_S_button_0, label, 10) \
	fn(DT_N_S_buttons_S_button_0, label, 11) \
	fn(DT_N_S_buttons_S_button_0, label, 12) \
	fn(DT_N_S_buttons_S_button_0, label, 13) \
	fn(DT_N_S_buttons_S_button_0, label, 14) \
	fn(DT_N_S_buttons_S_button_0, label, 15) \
	fn(DT_N_S_buttons_S_button_0, label, 16) \
	fn(DT_N_S_buttons_S_button_0, label, 17) \
	fn(DT_N_S_buttons_S_button_0, label, 18) \
	fn(DT_N_S_buttons_S_button_0, label, 19)
#define DT_N_S_buttons_S_button_0_P_label_EXISTS 1

/*
 * Devicetree node: /buttons/button_1
 *
 * Node identifier: DT_N_S_buttons_S_button_1
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_buttons_S_button_1_PATH "/buttons/button_1"

/* Node's name with unit-address: */
#define DT_N_S_buttons_S_button_1_FULL_NAME "button_1"

/* Node parent (/buttons) identifier: */
#define DT_N_S_buttons_S_button_1_PARENT DT_N_S_buttons
#define DT_N_S_buttons_S_button_1_FOREACH_CHILD(fn) 
#define DT_N_S_buttons_S_button_1_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_buttons_S_button_1_ORD 12

/* Ordinals for what this node depends on directly: */
#define DT_N_S_buttons_S_button_1_REQUIRES_ORDS \
	9, /* /buttons */ \
	10, /* /soc/gpio@50000000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_buttons_S_button_1_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_buttons_S_button_1_EXISTS 1
#define DT_N_ALIAS_sw1         DT_N_S_buttons_S_button_1
#define DT_N_NODELABEL_button1 DT_N_S_buttons_S_button_1

/* Special property macros: */
#define DT_N_S_buttons_S_button_1_REG_NUM 0
#define DT_N_S_buttons_S_button_1_IRQ_NUM 0
#define DT_N_S_buttons_S_button_1_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_buttons_S_button_1_P_gpios_IDX_0_EXISTS 1
#define DT_N_S_buttons_S_button_1_P_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000000
#define DT_N_S_buttons_S_button_1_P_gpios_IDX_0_VAL_pin 12
#define DT_N_S_buttons_S_button_1_P_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_buttons_S_button_1_P_gpios_IDX_0_VAL_flags 17
#define DT_N_S_buttons_S_button_1_P_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_buttons_S_button_1_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_1, gpios, 0)
#define DT_N_S_buttons_S_button_1_P_gpios_LEN 1
#define DT_N_S_buttons_S_button_1_P_gpios_EXISTS 1
#define DT_N_S_buttons_S_button_1_P_label "Push button switch 1"
#define DT_N_S_buttons_S_button_1_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_1, label, 0) \
	fn(DT_N_S_buttons_S_button_1, label, 1) \
	fn(DT_N_S_buttons_S_button_1, label, 2) \
	fn(DT_N_S_buttons_S_button_1, label, 3) \
	fn(DT_N_S_buttons_S_button_1, label, 4) \
	fn(DT_N_S_buttons_S_button_1, label, 5) \
	fn(DT_N_S_buttons_S_button_1, label, 6) \
	fn(DT_N_S_buttons_S_button_1, label, 7) \
	fn(DT_N_S_buttons_S_button_1, label, 8) \
	fn(DT_N_S_buttons_S_button_1, label, 9) \
	fn(DT_N_S_buttons_S_button_1, label, 10) \
	fn(DT_N_S_buttons_S_button_1, label, 11) \
	fn(DT_N_S_buttons_S_button_1, label, 12) \
	fn(DT_N_S_buttons_S_button_1, label, 13) \
	fn(DT_N_S_buttons_S_button_1, label, 14) \
	fn(DT_N_S_buttons_S_button_1, label, 15) \
	fn(DT_N_S_buttons_S_button_1, label, 16) \
	fn(DT_N_S_buttons_S_button_1, label, 17) \
	fn(DT_N_S_buttons_S_button_1, label, 18) \
	fn(DT_N_S_buttons_S_button_1, label, 19)
#define DT_N_S_buttons_S_button_1_P_label_EXISTS 1

/*
 * Devicetree node: /buttons/button_2
 *
 * Node identifier: DT_N_S_buttons_S_button_2
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_buttons_S_button_2_PATH "/buttons/button_2"

/* Node's name with unit-address: */
#define DT_N_S_buttons_S_button_2_FULL_NAME "button_2"

/* Node parent (/buttons) identifier: */
#define DT_N_S_buttons_S_button_2_PARENT DT_N_S_buttons
#define DT_N_S_buttons_S_button_2_FOREACH_CHILD(fn) 
#define DT_N_S_buttons_S_button_2_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_buttons_S_button_2_ORD 13

/* Ordinals for what this node depends on directly: */
#define DT_N_S_buttons_S_button_2_REQUIRES_ORDS \
	9, /* /buttons */ \
	10, /* /soc/gpio@50000000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_buttons_S_button_2_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_buttons_S_button_2_EXISTS 1
#define DT_N_ALIAS_sw2         DT_N_S_buttons_S_button_2
#define DT_N_NODELABEL_button2 DT_N_S_buttons_S_button_2

/* Special property macros: */
#define DT_N_S_buttons_S_button_2_REG_NUM 0
#define DT_N_S_buttons_S_button_2_IRQ_NUM 0
#define DT_N_S_buttons_S_button_2_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_buttons_S_button_2_P_gpios_IDX_0_EXISTS 1
#define DT_N_S_buttons_S_button_2_P_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000000
#define DT_N_S_buttons_S_button_2_P_gpios_IDX_0_VAL_pin 24
#define DT_N_S_buttons_S_button_2_P_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_buttons_S_button_2_P_gpios_IDX_0_VAL_flags 17
#define DT_N_S_buttons_S_button_2_P_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_buttons_S_button_2_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_2, gpios, 0)
#define DT_N_S_buttons_S_button_2_P_gpios_LEN 1
#define DT_N_S_buttons_S_button_2_P_gpios_EXISTS 1
#define DT_N_S_buttons_S_button_2_P_label "Push button switch 2"
#define DT_N_S_buttons_S_button_2_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_2, label, 0) \
	fn(DT_N_S_buttons_S_button_2, label, 1) \
	fn(DT_N_S_buttons_S_button_2, label, 2) \
	fn(DT_N_S_buttons_S_button_2, label, 3) \
	fn(DT_N_S_buttons_S_button_2, label, 4) \
	fn(DT_N_S_buttons_S_button_2, label, 5) \
	fn(DT_N_S_buttons_S_button_2, label, 6) \
	fn(DT_N_S_buttons_S_button_2, label, 7) \
	fn(DT_N_S_buttons_S_button_2, label, 8) \
	fn(DT_N_S_buttons_S_button_2, label, 9) \
	fn(DT_N_S_buttons_S_button_2, label, 10) \
	fn(DT_N_S_buttons_S_button_2, label, 11) \
	fn(DT_N_S_buttons_S_button_2, label, 12) \
	fn(DT_N_S_buttons_S_button_2, label, 13) \
	fn(DT_N_S_buttons_S_button_2, label, 14) \
	fn(DT_N_S_buttons_S_button_2, label, 15) \
	fn(DT_N_S_buttons_S_button_2, label, 16) \
	fn(DT_N_S_buttons_S_button_2, label, 17) \
	fn(DT_N_S_buttons_S_button_2, label, 18) \
	fn(DT_N_S_buttons_S_button_2, label, 19)
#define DT_N_S_buttons_S_button_2_P_label_EXISTS 1

/*
 * Devicetree node: /buttons/button_3
 *
 * Node identifier: DT_N_S_buttons_S_button_3
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_buttons_S_button_3_PATH "/buttons/button_3"

/* Node's name with unit-address: */
#define DT_N_S_buttons_S_button_3_FULL_NAME "button_3"

/* Node parent (/buttons) identifier: */
#define DT_N_S_buttons_S_button_3_PARENT DT_N_S_buttons
#define DT_N_S_buttons_S_button_3_FOREACH_CHILD(fn) 
#define DT_N_S_buttons_S_button_3_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_buttons_S_button_3_ORD 14

/* Ordinals for what this node depends on directly: */
#define DT_N_S_buttons_S_button_3_REQUIRES_ORDS \
	9, /* /buttons */ \
	10, /* /soc/gpio@50000000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_buttons_S_button_3_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_buttons_S_button_3_EXISTS 1
#define DT_N_ALIAS_sw3         DT_N_S_buttons_S_button_3
#define DT_N_NODELABEL_button3 DT_N_S_buttons_S_button_3

/* Special property macros: */
#define DT_N_S_buttons_S_button_3_REG_NUM 0
#define DT_N_S_buttons_S_button_3_IRQ_NUM 0
#define DT_N_S_buttons_S_button_3_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_buttons_S_button_3_P_gpios_IDX_0_EXISTS 1
#define DT_N_S_buttons_S_button_3_P_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000000
#define DT_N_S_buttons_S_button_3_P_gpios_IDX_0_VAL_pin 25
#define DT_N_S_buttons_S_button_3_P_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_buttons_S_button_3_P_gpios_IDX_0_VAL_flags 17
#define DT_N_S_buttons_S_button_3_P_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_buttons_S_button_3_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_3, gpios, 0)
#define DT_N_S_buttons_S_button_3_P_gpios_LEN 1
#define DT_N_S_buttons_S_button_3_P_gpios_EXISTS 1
#define DT_N_S_buttons_S_button_3_P_label "Push button switch 3"
#define DT_N_S_buttons_S_button_3_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_buttons_S_button_3, label, 0) \
	fn(DT_N_S_buttons_S_button_3, label, 1) \
	fn(DT_N_S_buttons_S_button_3, label, 2) \
	fn(DT_N_S_buttons_S_button_3, label, 3) \
	fn(DT_N_S_buttons_S_button_3, label, 4) \
	fn(DT_N_S_buttons_S_button_3, label, 5) \
	fn(DT_N_S_buttons_S_button_3, label, 6) \
	fn(DT_N_S_buttons_S_button_3, label, 7) \
	fn(DT_N_S_buttons_S_button_3, label, 8) \
	fn(DT_N_S_buttons_S_button_3, label, 9) \
	fn(DT_N_S_buttons_S_button_3, label, 10) \
	fn(DT_N_S_buttons_S_button_3, label, 11) \
	fn(DT_N_S_buttons_S_button_3, label, 12) \
	fn(DT_N_S_buttons_S_button_3, label, 13) \
	fn(DT_N_S_buttons_S_button_3, label, 14) \
	fn(DT_N_S_buttons_S_button_3, label, 15) \
	fn(DT_N_S_buttons_S_button_3, label, 16) \
	fn(DT_N_S_buttons_S_button_3, label, 17) \
	fn(DT_N_S_buttons_S_button_3, label, 18) \
	fn(DT_N_S_buttons_S_button_3, label, 19)
#define DT_N_S_buttons_S_button_3_P_label_EXISTS 1

/*
 * Devicetree node: /cpus
 *
 * Node identifier: DT_N_S_cpus
 */

/* Node's full path: */
#define DT_N_S_cpus_PATH "/cpus"

/* Node's name with unit-address: */
#define DT_N_S_cpus_FULL_NAME "cpus"

/* Node parent (/) identifier: */
#define DT_N_S_cpus_PARENT DT_N
#define DT_N_S_cpus_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_0)
#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_cpu_0) 

/* Node's dependency ordinal: */
#define DT_N_S_cpus_ORD 15

/* Ordinals for what this node depends on directly: */
#define DT_N_S_cpus_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_cpus_SUPPORTS_ORDS \
	16, /* /cpus/cpu@0 */

/* Existence and alternate IDs: */
#define DT_N_S_cpus_EXISTS 1

/* Special property macros: */
#define DT_N_S_cpus_REG_NUM 0
#define DT_N_S_cpus_IRQ_NUM 0
#define DT_N_S_cpus_STATUS_okay 1

/* (No generic property macros) */

/*
 * Devicetree node: /cpus/cpu@0
 *
 * Node identifier: DT_N_S_cpus_S_cpu_0
 *
 * Binding (compatible = arm,cortex-m4f):
 *   $ZEPHYR_BASE\dts\bindings\cpu\arm,cortex-m4f.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_cpus_S_cpu_0_PATH "/cpus/cpu@0"

/* Node's name with unit-address: */
#define DT_N_S_cpus_S_cpu_0_FULL_NAME "cpu@0"

/* Node parent (/cpus) identifier: */
#define DT_N_S_cpus_S_cpu_0_PARENT DT_N_S_cpus
#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD(fn) 
#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_cpus_S_cpu_0_ORD 16

/* Ordinals for what this node depends on directly: */
#define DT_N_S_cpus_S_cpu_0_REQUIRES_ORDS \
	15, /* /cpus */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_cpus_S_cpu_0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_cpus_S_cpu_0_EXISTS 1
#define DT_N_INST_0_arm_cortex_m4f DT_N_S_cpus_S_cpu_0

/* Special property macros: */
#define DT_N_S_cpus_S_cpu_0_REG_NUM 1
#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
#define DT_N_S_cpus_S_cpu_0_IRQ_NUM 0
#define DT_N_S_cpus_S_cpu_0_COMPAT_MATCHES_arm_cortex_m4f 1
#define DT_N_S_cpus_S_cpu_0_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_cpus_S_cpu_0_P_swo_ref_frequency 32000000
#define DT_N_S_cpus_S_cpu_0_P_swo_ref_frequency_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_compatible {"arm,cortex-m4f"}
#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0 "arm,cortex-m4f"
#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0, compatible, 0)
#define DT_N_S_cpus_S_cpu_0_P_compatible_LEN 1
#define DT_N_S_cpus_S_cpu_0_P_compatible_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_reg {0 /* 0x0 */}
#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0 0
#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0_EXISTS 1
#define DT_N_S_cpus_S_cpu_0_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0, reg, 0)
#define DT_N_S_cpus_S_cpu_0_P_reg_EXISTS 1

/*
 * Devicetree node: /leds
 *
 * Node identifier: DT_N_S_leds
 *
 * Binding (compatible = gpio-leds):
 *   $ZEPHYR_BASE\dts\bindings\gpio\gpio-leds.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_leds_PATH "/leds"

/* Node's name with unit-address: */
#define DT_N_S_leds_FULL_NAME "leds"

/* Node parent (/) identifier: */
#define DT_N_S_leds_PARENT DT_N
#define DT_N_S_leds_FOREACH_CHILD(fn) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) fn(DT_N_S_leds_S_led_3)
#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) fn(DT_N_S_leds_S_led_3) 

/* Node's dependency ordinal: */
#define DT_N_S_leds_ORD 17

/* Ordinals for what this node depends on directly: */
#define DT_N_S_leds_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_leds_SUPPORTS_ORDS \
	18, /* /leds/led_0 */ \
	19, /* /leds/led_1 */ \
	20, /* /leds/led_2 */ \
	21, /* /leds/led_3 */

/* Existence and alternate IDs: */
#define DT_N_S_leds_EXISTS 1
#define DT_N_INST_0_gpio_leds DT_N_S_leds

/* Special property macros: */
#define DT_N_S_leds_REG_NUM 0
#define DT_N_S_leds_IRQ_NUM 0
#define DT_N_S_leds_COMPAT_MATCHES_gpio_leds 1
#define DT_N_S_leds_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_leds_P_compatible {"gpio-leds"}
#define DT_N_S_leds_P_compatible_IDX_0 "gpio-leds"
#define DT_N_S_leds_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds, compatible, 0)
#define DT_N_S_leds_P_compatible_LEN 1
#define DT_N_S_leds_P_compatible_EXISTS 1

/*
 * Devicetree node: /leds/led_0
 *
 * Node identifier: DT_N_S_leds_S_led_0
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_leds_S_led_0_PATH "/leds/led_0"

/* Node's name with unit-address: */
#define DT_N_S_leds_S_led_0_FULL_NAME "led_0"

/* Node parent (/leds) identifier: */
#define DT_N_S_leds_S_led_0_PARENT DT_N_S_leds
#define DT_N_S_leds_S_led_0_FOREACH_CHILD(fn) 
#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_leds_S_led_0_ORD 18

/* Ordinals for what this node depends on directly: */
#define DT_N_S_leds_S_led_0_REQUIRES_ORDS \
	10, /* /soc/gpio@50000000 */ \
	17, /* /leds */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_leds_S_led_0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_leds_S_led_0_EXISTS 1
#define DT_N_ALIAS_led0            DT_N_S_leds_S_led_0
#define DT_N_ALIAS_bootloader_led0 DT_N_S_leds_S_led_0
#define DT_N_NODELABEL_led0        DT_N_S_leds_S_led_0

/* Special property macros: */
#define DT_N_S_leds_S_led_0_REG_NUM 0
#define DT_N_S_leds_S_led_0_IRQ_NUM 0
#define DT_N_S_leds_S_led_0_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_EXISTS 1
#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000000
#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_pin 13
#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_flags 1
#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_0, gpios, 0)
#define DT_N_S_leds_S_led_0_P_gpios_LEN 1
#define DT_N_S_leds_S_led_0_P_gpios_EXISTS 1
#define DT_N_S_leds_S_led_0_P_label "Green LED 0"
#define DT_N_S_leds_S_led_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_0, label, 0) \
	fn(DT_N_S_leds_S_led_0, label, 1) \
	fn(DT_N_S_leds_S_led_0, label, 2) \
	fn(DT_N_S_leds_S_led_0, label, 3) \
	fn(DT_N_S_leds_S_led_0, label, 4) \
	fn(DT_N_S_leds_S_led_0, label, 5) \
	fn(DT_N_S_leds_S_led_0, label, 6) \
	fn(DT_N_S_leds_S_led_0, label, 7) \
	fn(DT_N_S_leds_S_led_0, label, 8) \
	fn(DT_N_S_leds_S_led_0, label, 9) \
	fn(DT_N_S_leds_S_led_0, label, 10)
#define DT_N_S_leds_S_led_0_P_label_EXISTS 1

/*
 * Devicetree node: /leds/led_1
 *
 * Node identifier: DT_N_S_leds_S_led_1
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_leds_S_led_1_PATH "/leds/led_1"

/* Node's name with unit-address: */
#define DT_N_S_leds_S_led_1_FULL_NAME "led_1"

/* Node parent (/leds) identifier: */
#define DT_N_S_leds_S_led_1_PARENT DT_N_S_leds
#define DT_N_S_leds_S_led_1_FOREACH_CHILD(fn) 
#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_leds_S_led_1_ORD 19

/* Ordinals for what this node depends on directly: */
#define DT_N_S_leds_S_led_1_REQUIRES_ORDS \
	10, /* /soc/gpio@50000000 */ \
	17, /* /leds */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_leds_S_led_1_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_leds_S_led_1_EXISTS 1
#define DT_N_ALIAS_led1     DT_N_S_leds_S_led_1
#define DT_N_NODELABEL_led1 DT_N_S_leds_S_led_1

/* Special property macros: */
#define DT_N_S_leds_S_led_1_REG_NUM 0
#define DT_N_S_leds_S_led_1_IRQ_NUM 0
#define DT_N_S_leds_S_led_1_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_EXISTS 1
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000000
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_pin 14
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_flags 1
#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_1, gpios, 0)
#define DT_N_S_leds_S_led_1_P_gpios_LEN 1
#define DT_N_S_leds_S_led_1_P_gpios_EXISTS 1
#define DT_N_S_leds_S_led_1_P_label "Green LED 1"
#define DT_N_S_leds_S_led_1_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_1, label, 0) \
	fn(DT_N_S_leds_S_led_1, label, 1) \
	fn(DT_N_S_leds_S_led_1, label, 2) \
	fn(DT_N_S_leds_S_led_1, label, 3) \
	fn(DT_N_S_leds_S_led_1, label, 4) \
	fn(DT_N_S_leds_S_led_1, label, 5) \
	fn(DT_N_S_leds_S_led_1, label, 6) \
	fn(DT_N_S_leds_S_led_1, label, 7) \
	fn(DT_N_S_leds_S_led_1, label, 8) \
	fn(DT_N_S_leds_S_led_1, label, 9) \
	fn(DT_N_S_leds_S_led_1, label, 10)
#define DT_N_S_leds_S_led_1_P_label_EXISTS 1

/*
 * Devicetree node: /leds/led_2
 *
 * Node identifier: DT_N_S_leds_S_led_2
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_leds_S_led_2_PATH "/leds/led_2"

/* Node's name with unit-address: */
#define DT_N_S_leds_S_led_2_FULL_NAME "led_2"

/* Node parent (/leds) identifier: */
#define DT_N_S_leds_S_led_2_PARENT DT_N_S_leds
#define DT_N_S_leds_S_led_2_FOREACH_CHILD(fn) 
#define DT_N_S_leds_S_led_2_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_leds_S_led_2_ORD 20

/* Ordinals for what this node depends on directly: */
#define DT_N_S_leds_S_led_2_REQUIRES_ORDS \
	10, /* /soc/gpio@50000000 */ \
	17, /* /leds */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_leds_S_led_2_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_leds_S_led_2_EXISTS 1
#define DT_N_ALIAS_led2     DT_N_S_leds_S_led_2
#define DT_N_NODELABEL_led2 DT_N_S_leds_S_led_2

/* Special property macros: */
#define DT_N_S_leds_S_led_2_REG_NUM 0
#define DT_N_S_leds_S_led_2_IRQ_NUM 0
#define DT_N_S_leds_S_led_2_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_EXISTS 1
#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000000
#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_pin 15
#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_flags 1
#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_leds_S_led_2_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_2, gpios, 0)
#define DT_N_S_leds_S_led_2_P_gpios_LEN 1
#define DT_N_S_leds_S_led_2_P_gpios_EXISTS 1
#define DT_N_S_leds_S_led_2_P_label "Green LED 2"
#define DT_N_S_leds_S_led_2_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_2, label, 0) \
	fn(DT_N_S_leds_S_led_2, label, 1) \
	fn(DT_N_S_leds_S_led_2, label, 2) \
	fn(DT_N_S_leds_S_led_2, label, 3) \
	fn(DT_N_S_leds_S_led_2, label, 4) \
	fn(DT_N_S_leds_S_led_2, label, 5) \
	fn(DT_N_S_leds_S_led_2, label, 6) \
	fn(DT_N_S_leds_S_led_2, label, 7) \
	fn(DT_N_S_leds_S_led_2, label, 8) \
	fn(DT_N_S_leds_S_led_2, label, 9) \
	fn(DT_N_S_leds_S_led_2, label, 10)
#define DT_N_S_leds_S_led_2_P_label_EXISTS 1

/*
 * Devicetree node: /leds/led_3
 *
 * Node identifier: DT_N_S_leds_S_led_3
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_leds_S_led_3_PATH "/leds/led_3"

/* Node's name with unit-address: */
#define DT_N_S_leds_S_led_3_FULL_NAME "led_3"

/* Node parent (/leds) identifier: */
#define DT_N_S_leds_S_led_3_PARENT DT_N_S_leds
#define DT_N_S_leds_S_led_3_FOREACH_CHILD(fn) 
#define DT_N_S_leds_S_led_3_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_leds_S_led_3_ORD 21

/* Ordinals for what this node depends on directly: */
#define DT_N_S_leds_S_led_3_REQUIRES_ORDS \
	10, /* /soc/gpio@50000000 */ \
	17, /* /leds */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_leds_S_led_3_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_leds_S_led_3_EXISTS 1
#define DT_N_ALIAS_led3     DT_N_S_leds_S_led_3
#define DT_N_NODELABEL_led3 DT_N_S_leds_S_led_3

/* Special property macros: */
#define DT_N_S_leds_S_led_3_REG_NUM 0
#define DT_N_S_leds_S_led_3_IRQ_NUM 0
#define DT_N_S_leds_S_led_3_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_leds_S_led_3_P_gpios_IDX_0_EXISTS 1
#define DT_N_S_leds_S_led_3_P_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000000
#define DT_N_S_leds_S_led_3_P_gpios_IDX_0_VAL_pin 16
#define DT_N_S_leds_S_led_3_P_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_leds_S_led_3_P_gpios_IDX_0_VAL_flags 1
#define DT_N_S_leds_S_led_3_P_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_leds_S_led_3_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_3, gpios, 0)
#define DT_N_S_leds_S_led_3_P_gpios_LEN 1
#define DT_N_S_leds_S_led_3_P_gpios_EXISTS 1
#define DT_N_S_leds_S_led_3_P_label "Green LED 3"
#define DT_N_S_leds_S_led_3_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_3, label, 0) \
	fn(DT_N_S_leds_S_led_3, label, 1) \
	fn(DT_N_S_leds_S_led_3, label, 2) \
	fn(DT_N_S_leds_S_led_3, label, 3) \
	fn(DT_N_S_leds_S_led_3, label, 4) \
	fn(DT_N_S_leds_S_led_3, label, 5) \
	fn(DT_N_S_leds_S_led_3, label, 6) \
	fn(DT_N_S_leds_S_led_3, label, 7) \
	fn(DT_N_S_leds_S_led_3, label, 8) \
	fn(DT_N_S_leds_S_led_3, label, 9) \
	fn(DT_N_S_leds_S_led_3, label, 10)
#define DT_N_S_leds_S_led_3_P_label_EXISTS 1

/*
 * Devicetree node: /pwmleds
 *
 * Node identifier: DT_N_S_pwmleds
 *
 * Binding (compatible = pwm-leds):
 *   $ZEPHYR_BASE\dts\bindings\led\pwm-leds.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_pwmleds_PATH "/pwmleds"

/* Node's name with unit-address: */
#define DT_N_S_pwmleds_FULL_NAME "pwmleds"

/* Node parent (/) identifier: */
#define DT_N_S_pwmleds_PARENT DT_N
#define DT_N_S_pwmleds_FOREACH_CHILD(fn) fn(DT_N_S_pwmleds_S_pwm_led_0)
#define DT_N_S_pwmleds_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_pwmleds_S_pwm_led_0) 

/* Node's dependency ordinal: */
#define DT_N_S_pwmleds_ORD 22

/* Ordinals for what this node depends on directly: */
#define DT_N_S_pwmleds_REQUIRES_ORDS \
	0, /* / */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_pwmleds_SUPPORTS_ORDS \
	24, /* /pwmleds/pwm_led_0 */

/* Existence and alternate IDs: */
#define DT_N_S_pwmleds_EXISTS 1
#define DT_N_INST_0_pwm_leds DT_N_S_pwmleds

/* Special property macros: */
#define DT_N_S_pwmleds_REG_NUM 0
#define DT_N_S_pwmleds_IRQ_NUM 0
#define DT_N_S_pwmleds_COMPAT_MATCHES_pwm_leds 1
#define DT_N_S_pwmleds_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_pwmleds_P_compatible {"pwm-leds"}
#define DT_N_S_pwmleds_P_compatible_IDX_0 "pwm-leds"
#define DT_N_S_pwmleds_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_pwmleds_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pwmleds, compatible, 0)
#define DT_N_S_pwmleds_P_compatible_LEN 1
#define DT_N_S_pwmleds_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/pwm@4001c000
 *
 * Node identifier: DT_N_S_soc_S_pwm_4001c000
 *
 * Binding (compatible = nordic,nrf-pwm):
 *   $ZEPHYR_BASE\dts\bindings\pwm\nordic,nrf-pwm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_pwm_4001c000_PATH "/soc/pwm@4001c000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_pwm_4001c000_FULL_NAME "pwm@4001c000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_pwm_4001c000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_pwm_4001c000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_pwm_4001c000_ORD 23

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_pwm_4001c000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_pwm_4001c000_SUPPORTS_ORDS \
	24, /* /pwmleds/pwm_led_0 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_pwm_4001c000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_pwm DT_N_S_soc_S_pwm_4001c000
#define DT_N_NODELABEL_pwm0        DT_N_S_soc_S_pwm_4001c000

/* Special property macros: */
#define DT_N_S_soc_S_pwm_4001c000_REG_NUM 1
#define DT_N_S_soc_S_pwm_4001c000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_REG_IDX_0_VAL_ADDRESS 1073856512 /* 0x4001c000 */
#define DT_N_S_soc_S_pwm_4001c000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_pwm_4001c000_IRQ_NUM 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_VAL_irq 28
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_pwm_4001c000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_COMPAT_MATCHES_nordic_nrf_pwm 1
#define DT_N_S_soc_S_pwm_4001c000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_pwm_4001c000_P_reg {1073856512 /* 0x4001c000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_pwm_4001c000_P_reg_IDX_0 1073856512
#define DT_N_S_soc_S_pwm_4001c000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_pwm_4001c000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4001c000, reg, 0) \
	fn(DT_N_S_soc_S_pwm_4001c000, reg, 1)
#define DT_N_S_soc_S_pwm_4001c000_P_reg_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_center_aligned 0
#define DT_N_S_soc_S_pwm_4001c000_P_center_aligned_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_ch0_pin 13
#define DT_N_S_soc_S_pwm_4001c000_P_ch0_pin_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_ch0_inverted 1
#define DT_N_S_soc_S_pwm_4001c000_P_ch0_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_ch1_inverted 0
#define DT_N_S_soc_S_pwm_4001c000_P_ch1_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_ch2_inverted 0
#define DT_N_S_soc_S_pwm_4001c000_P_ch2_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_ch3_inverted 0
#define DT_N_S_soc_S_pwm_4001c000_P_ch3_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_label "PWM_0"
#define DT_N_S_soc_S_pwm_4001c000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4001c000, label, 0) \
	fn(DT_N_S_soc_S_pwm_4001c000, label, 1) \
	fn(DT_N_S_soc_S_pwm_4001c000, label, 2) \
	fn(DT_N_S_soc_S_pwm_4001c000, label, 3) \
	fn(DT_N_S_soc_S_pwm_4001c000, label, 4)
#define DT_N_S_soc_S_pwm_4001c000_P_label_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_status "okay"
#define DT_N_S_soc_S_pwm_4001c000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_pwm_4001c000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_pwm_4001c000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_pwm_4001c000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4001c000, status, 0) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 1) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 2) \
	fn(DT_N_S_soc_S_pwm_4001c000, status, 3)
#define DT_N_S_soc_S_pwm_4001c000_P_status_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_compatible {"nordic,nrf-pwm"}
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_IDX_0 "nordic,nrf-pwm"
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4001c000, compatible, 0)
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_LEN 1
#define DT_N_S_soc_S_pwm_4001c000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts {28 /* 0x1c */, 1 /* 0x1 */}
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_IDX_0 28
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4001c000, interrupts, 0) \
	fn(DT_N_S_soc_S_pwm_4001c000, interrupts, 1)
#define DT_N_S_soc_S_pwm_4001c000_P_interrupts_EXISTS 1

/*
 * Devicetree node: /pwmleds/pwm_led_0
 *
 * Node identifier: DT_N_S_pwmleds_S_pwm_led_0
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_pwmleds_S_pwm_led_0_PATH "/pwmleds/pwm_led_0"

/* Node's name with unit-address: */
#define DT_N_S_pwmleds_S_pwm_led_0_FULL_NAME "pwm_led_0"

/* Node parent (/pwmleds) identifier: */
#define DT_N_S_pwmleds_S_pwm_led_0_PARENT DT_N_S_pwmleds
#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD(fn) 
#define DT_N_S_pwmleds_S_pwm_led_0_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_pwmleds_S_pwm_led_0_ORD 24

/* Ordinals for what this node depends on directly: */
#define DT_N_S_pwmleds_S_pwm_led_0_REQUIRES_ORDS \
	22, /* /pwmleds */ \
	23, /* /soc/pwm@4001c000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_pwmleds_S_pwm_led_0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_pwmleds_S_pwm_led_0_EXISTS 1
#define DT_N_ALIAS_pwm_led0     DT_N_S_pwmleds_S_pwm_led_0
#define DT_N_NODELABEL_pwm_led0 DT_N_S_pwmleds_S_pwm_led_0

/* Special property macros: */
#define DT_N_S_pwmleds_S_pwm_led_0_REG_NUM 0
#define DT_N_S_pwmleds_S_pwm_led_0_IRQ_NUM 0
#define DT_N_S_pwmleds_S_pwm_led_0_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_EXISTS 1
#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_PH DT_N_S_soc_S_pwm_4001c000
#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_channel 13
#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_IDX_0_VAL_channel_EXISTS 1
#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_FOREACH_PROP_ELEM(fn) fn(DT_N_S_pwmleds_S_pwm_led_0, pwms, 0)
#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_LEN 1
#define DT_N_S_pwmleds_S_pwm_led_0_P_pwms_EXISTS 1

/*
 * Devicetree node: /soc/adc@40007000
 *
 * Node identifier: DT_N_S_soc_S_adc_40007000
 *
 * Binding (compatible = nordic,nrf-saadc):
 *   $ZEPHYR_BASE\dts\bindings\adc\nordic,nrf-saadc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_adc_40007000_PATH "/soc/adc@40007000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_adc_40007000_FULL_NAME "adc@40007000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_adc_40007000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_adc_40007000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_adc_40007000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_adc_40007000_ORD 25

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_adc_40007000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_adc_40007000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_adc_40007000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_saadc DT_N_S_soc_S_adc_40007000
#define DT_N_NODELABEL_adc           DT_N_S_soc_S_adc_40007000

/* Special property macros: */
#define DT_N_S_soc_S_adc_40007000_REG_NUM 1
#define DT_N_S_soc_S_adc_40007000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_REG_IDX_0_VAL_ADDRESS 1073770496 /* 0x40007000 */
#define DT_N_S_soc_S_adc_40007000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_adc_40007000_IRQ_NUM 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_irq 7
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_adc_40007000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_COMPAT_MATCHES_nordic_nrf_saadc 1
#define DT_N_S_soc_S_adc_40007000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_adc_40007000_P_reg {1073770496 /* 0x40007000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_0 1073770496
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_adc_40007000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40007000, reg, 0) \
	fn(DT_N_S_soc_S_adc_40007000, reg, 1)
#define DT_N_S_soc_S_adc_40007000_P_reg_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts {7 /* 0x7 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_0 7
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40007000, interrupts, 0) \
	fn(DT_N_S_soc_S_adc_40007000, interrupts, 1)
#define DT_N_S_soc_S_adc_40007000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_label "ADC_0"
#define DT_N_S_soc_S_adc_40007000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40007000, label, 0) \
	fn(DT_N_S_soc_S_adc_40007000, label, 1) \
	fn(DT_N_S_soc_S_adc_40007000, label, 2) \
	fn(DT_N_S_soc_S_adc_40007000, label, 3) \
	fn(DT_N_S_soc_S_adc_40007000, label, 4)
#define DT_N_S_soc_S_adc_40007000_P_label_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_status "okay"
#define DT_N_S_soc_S_adc_40007000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_adc_40007000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_adc_40007000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_adc_40007000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40007000, status, 0) \
	fn(DT_N_S_soc_S_adc_40007000, status, 1) \
	fn(DT_N_S_soc_S_adc_40007000, status, 2) \
	fn(DT_N_S_soc_S_adc_40007000, status, 3)
#define DT_N_S_soc_S_adc_40007000_P_status_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_compatible {"nordic,nrf-saadc"}
#define DT_N_S_soc_S_adc_40007000_P_compatible_IDX_0 "nordic,nrf-saadc"
#define DT_N_S_soc_S_adc_40007000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_adc_40007000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40007000, compatible, 0)
#define DT_N_S_soc_S_adc_40007000_P_compatible_LEN 1
#define DT_N_S_soc_S_adc_40007000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/clock@40000000
 *
 * Node identifier: DT_N_S_soc_S_clock_40000000
 *
 * Binding (compatible = nordic,nrf-clock):
 *   $ZEPHYR_BASE\dts\bindings\clock\nordic,nrf-clock.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_clock_40000000_PATH "/soc/clock@40000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_clock_40000000_FULL_NAME "clock@40000000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_clock_40000000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_clock_40000000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_clock_40000000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_clock_40000000_ORD 26

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_clock_40000000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_clock_40000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_clock_40000000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_clock DT_N_S_soc_S_clock_40000000
#define DT_N_NODELABEL_clock         DT_N_S_soc_S_clock_40000000

/* Special property macros: */
#define DT_N_S_soc_S_clock_40000000_REG_NUM 1
#define DT_N_S_soc_S_clock_40000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_REG_IDX_0_VAL_ADDRESS 1073741824 /* 0x40000000 */
#define DT_N_S_soc_S_clock_40000000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_clock_40000000_IRQ_NUM 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_irq 0
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_clock_40000000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_COMPAT_MATCHES_nordic_nrf_clock 1
#define DT_N_S_soc_S_clock_40000000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_clock_40000000_P_label "CLOCK"
#define DT_N_S_soc_S_clock_40000000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_clock_40000000, label, 0) \
	fn(DT_N_S_soc_S_clock_40000000, label, 1) \
	fn(DT_N_S_soc_S_clock_40000000, label, 2) \
	fn(DT_N_S_soc_S_clock_40000000, label, 3) \
	fn(DT_N_S_soc_S_clock_40000000, label, 4)
#define DT_N_S_soc_S_clock_40000000_P_label_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_reg {1073741824 /* 0x40000000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_0 1073741824
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_clock_40000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_clock_40000000, reg, 0) \
	fn(DT_N_S_soc_S_clock_40000000, reg, 1)
#define DT_N_S_soc_S_clock_40000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts {0 /* 0x0 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_0 0
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_clock_40000000, interrupts, 0) \
	fn(DT_N_S_soc_S_clock_40000000, interrupts, 1)
#define DT_N_S_soc_S_clock_40000000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_status "okay"
#define DT_N_S_soc_S_clock_40000000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_clock_40000000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_clock_40000000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_clock_40000000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_clock_40000000, status, 0) \
	fn(DT_N_S_soc_S_clock_40000000, status, 1) \
	fn(DT_N_S_soc_S_clock_40000000, status, 2) \
	fn(DT_N_S_soc_S_clock_40000000, status, 3)
#define DT_N_S_soc_S_clock_40000000_P_status_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_compatible {"nordic,nrf-clock"}
#define DT_N_S_soc_S_clock_40000000_P_compatible_IDX_0 "nordic,nrf-clock"
#define DT_N_S_soc_S_clock_40000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_clock_40000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_clock_40000000, compatible, 0)
#define DT_N_S_soc_S_clock_40000000_P_compatible_LEN 1
#define DT_N_S_soc_S_clock_40000000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/ecb@4000e000
 *
 * Node identifier: DT_N_S_soc_S_ecb_4000e000
 *
 * Binding (compatible = nordic,nrf-ecb):
 *   $ZEPHYR_BASE\dts\bindings\crypto\nordic,nrf-ecb.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_ecb_4000e000_PATH "/soc/ecb@4000e000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_ecb_4000e000_FULL_NAME "ecb@4000e000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_ecb_4000e000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_ecb_4000e000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_ecb_4000e000_ORD 27

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_ecb_4000e000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_ecb_4000e000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_ecb_4000e000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_ecb DT_N_S_soc_S_ecb_4000e000
#define DT_N_NODELABEL_ecb         DT_N_S_soc_S_ecb_4000e000

/* Special property macros: */
#define DT_N_S_soc_S_ecb_4000e000_REG_NUM 1
#define DT_N_S_soc_S_ecb_4000e000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_REG_IDX_0_VAL_ADDRESS 1073799168 /* 0x4000e000 */
#define DT_N_S_soc_S_ecb_4000e000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_ecb_4000e000_IRQ_NUM 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_irq 14
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_ecb_4000e000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_COMPAT_MATCHES_nordic_nrf_ecb 1
#define DT_N_S_soc_S_ecb_4000e000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_ecb_4000e000_P_reg {1073799168 /* 0x4000e000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_0 1073799168
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_ecb_4000e000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ecb_4000e000, reg, 0) \
	fn(DT_N_S_soc_S_ecb_4000e000, reg, 1)
#define DT_N_S_soc_S_ecb_4000e000_P_reg_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts {14 /* 0xe */, 1 /* 0x1 */}
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_0 14
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ecb_4000e000, interrupts, 0) \
	fn(DT_N_S_soc_S_ecb_4000e000, interrupts, 1)
#define DT_N_S_soc_S_ecb_4000e000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_status "okay"
#define DT_N_S_soc_S_ecb_4000e000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_ecb_4000e000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_ecb_4000e000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ecb_4000e000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ecb_4000e000, status, 0) \
	fn(DT_N_S_soc_S_ecb_4000e000, status, 1) \
	fn(DT_N_S_soc_S_ecb_4000e000, status, 2) \
	fn(DT_N_S_soc_S_ecb_4000e000, status, 3)
#define DT_N_S_soc_S_ecb_4000e000_P_status_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_compatible {"nordic,nrf-ecb"}
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_IDX_0 "nordic,nrf-ecb"
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ecb_4000e000, compatible, 0)
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_LEN 1
#define DT_N_S_soc_S_ecb_4000e000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_ecb_4000e000_P_label "ECB"
#define DT_N_S_soc_S_ecb_4000e000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ecb_4000e000, label, 0) \
	fn(DT_N_S_soc_S_ecb_4000e000, label, 1) \
	fn(DT_N_S_soc_S_ecb_4000e000, label, 2)
#define DT_N_S_soc_S_ecb_4000e000_P_label_EXISTS 1

/*
 * Devicetree node: /soc/ficr@10000000
 *
 * Node identifier: DT_N_S_soc_S_ficr_10000000
 *
 * Binding (compatible = nordic,nrf-ficr):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-ficr.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_ficr_10000000_PATH "/soc/ficr@10000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_ficr_10000000_FULL_NAME "ficr@10000000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_ficr_10000000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_ficr_10000000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_ficr_10000000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_ficr_10000000_ORD 28

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_ficr_10000000_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_ficr_10000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_ficr_10000000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_ficr DT_N_S_soc_S_ficr_10000000
#define DT_N_NODELABEL_ficr         DT_N_S_soc_S_ficr_10000000

/* Special property macros: */
#define DT_N_S_soc_S_ficr_10000000_REG_NUM 1
#define DT_N_S_soc_S_ficr_10000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_REG_IDX_0_VAL_ADDRESS 268435456 /* 0x10000000 */
#define DT_N_S_soc_S_ficr_10000000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_ficr_10000000_IRQ_NUM 0
#define DT_N_S_soc_S_ficr_10000000_COMPAT_MATCHES_nordic_nrf_ficr 1
#define DT_N_S_soc_S_ficr_10000000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_ficr_10000000_P_reg {268435456 /* 0x10000000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_ficr_10000000_P_reg_IDX_0 268435456
#define DT_N_S_soc_S_ficr_10000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_ficr_10000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ficr_10000000, reg, 0) \
	fn(DT_N_S_soc_S_ficr_10000000, reg, 1)
#define DT_N_S_soc_S_ficr_10000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_status "okay"
#define DT_N_S_soc_S_ficr_10000000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_ficr_10000000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_ficr_10000000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_ficr_10000000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ficr_10000000, status, 0) \
	fn(DT_N_S_soc_S_ficr_10000000, status, 1) \
	fn(DT_N_S_soc_S_ficr_10000000, status, 2) \
	fn(DT_N_S_soc_S_ficr_10000000, status, 3)
#define DT_N_S_soc_S_ficr_10000000_P_status_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_compatible {"nordic,nrf-ficr"}
#define DT_N_S_soc_S_ficr_10000000_P_compatible_IDX_0 "nordic,nrf-ficr"
#define DT_N_S_soc_S_ficr_10000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_ficr_10000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_ficr_10000000, compatible, 0)
#define DT_N_S_soc_S_ficr_10000000_P_compatible_LEN 1
#define DT_N_S_soc_S_ficr_10000000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/gpiote@40006000
 *
 * Node identifier: DT_N_S_soc_S_gpiote_40006000
 *
 * Binding (compatible = nordic,nrf-gpiote):
 *   $ZEPHYR_BASE\dts\bindings\gpio\nordic,nrf-gpiote.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_gpiote_40006000_PATH "/soc/gpiote@40006000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_gpiote_40006000_FULL_NAME "gpiote@40006000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_gpiote_40006000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_gpiote_40006000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_gpiote_40006000_ORD 29

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_gpiote_40006000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_gpiote_40006000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_gpiote_40006000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_gpiote DT_N_S_soc_S_gpiote_40006000
#define DT_N_NODELABEL_gpiote         DT_N_S_soc_S_gpiote_40006000

/* Special property macros: */
#define DT_N_S_soc_S_gpiote_40006000_REG_NUM 1
#define DT_N_S_soc_S_gpiote_40006000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_REG_IDX_0_VAL_ADDRESS 1073766400 /* 0x40006000 */
#define DT_N_S_soc_S_gpiote_40006000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_gpiote_40006000_IRQ_NUM 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_irq 6
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_priority 5
#define DT_N_S_soc_S_gpiote_40006000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_COMPAT_MATCHES_nordic_nrf_gpiote 1
#define DT_N_S_soc_S_gpiote_40006000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_gpiote_40006000_P_reg {1073766400 /* 0x40006000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_0 1073766400
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_gpiote_40006000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40006000, reg, 0) \
	fn(DT_N_S_soc_S_gpiote_40006000, reg, 1)
#define DT_N_S_soc_S_gpiote_40006000_P_reg_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts {6 /* 0x6 */, 5 /* 0x5 */}
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_0 6
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_1 5
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40006000, interrupts, 0) \
	fn(DT_N_S_soc_S_gpiote_40006000, interrupts, 1)
#define DT_N_S_soc_S_gpiote_40006000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_label "GPIOTE_0"
#define DT_N_S_soc_S_gpiote_40006000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40006000, label, 0) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 1) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 2) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 3) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 4) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 5) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 6) \
	fn(DT_N_S_soc_S_gpiote_40006000, label, 7)
#define DT_N_S_soc_S_gpiote_40006000_P_label_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_status "okay"
#define DT_N_S_soc_S_gpiote_40006000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_gpiote_40006000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_gpiote_40006000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpiote_40006000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40006000, status, 0) \
	fn(DT_N_S_soc_S_gpiote_40006000, status, 1) \
	fn(DT_N_S_soc_S_gpiote_40006000, status, 2) \
	fn(DT_N_S_soc_S_gpiote_40006000, status, 3)
#define DT_N_S_soc_S_gpiote_40006000_P_status_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_compatible {"nordic,nrf-gpiote"}
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_IDX_0 "nordic,nrf-gpiote"
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpiote_40006000, compatible, 0)
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_LEN 1
#define DT_N_S_soc_S_gpiote_40006000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/i2c@40003000
 *
 * Node identifier: DT_N_S_soc_S_i2c_40003000
 *
 * Binding (compatible = nordic,nrf-twi):
 *   $ZEPHYR_BASE\dts\bindings\i2c\nordic,nrf-twi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_i2c_40003000_PATH "/soc/i2c@40003000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_i2c_40003000_FULL_NAME "i2c@40003000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_i2c_40003000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_i2c_40003000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_i2c_40003000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_i2c_40003000_ORD 30

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_i2c_40003000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_i2c_40003000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_i2c_40003000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_twi DT_N_S_soc_S_i2c_40003000
#define DT_N_NODELABEL_i2c0        DT_N_S_soc_S_i2c_40003000
#define DT_N_NODELABEL_arduino_i2c DT_N_S_soc_S_i2c_40003000

/* Special property macros: */
#define DT_N_S_soc_S_i2c_40003000_REG_NUM 1
#define DT_N_S_soc_S_i2c_40003000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_REG_IDX_0_VAL_ADDRESS 1073754112 /* 0x40003000 */
#define DT_N_S_soc_S_i2c_40003000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_i2c_40003000_IRQ_NUM 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_irq 3
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_i2c_40003000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_COMPAT_MATCHES_nordic_nrf_twi 1
#define DT_N_S_soc_S_i2c_40003000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_i2c_40003000_P_reg {1073754112 /* 0x40003000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_0 1073754112
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_i2c_40003000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000, reg, 0) \
	fn(DT_N_S_soc_S_i2c_40003000, reg, 1)
#define DT_N_S_soc_S_i2c_40003000_P_reg_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts {3 /* 0x3 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_0 3
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000, interrupts, 0) \
	fn(DT_N_S_soc_S_i2c_40003000, interrupts, 1)
#define DT_N_S_soc_S_i2c_40003000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_sda_pin 26
#define DT_N_S_soc_S_i2c_40003000_P_sda_pin_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_scl_pin 27
#define DT_N_S_soc_S_i2c_40003000_P_scl_pin_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_clock_frequency 100000
#define DT_N_S_soc_S_i2c_40003000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_label "I2C_0"
#define DT_N_S_soc_S_i2c_40003000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000, label, 0) \
	fn(DT_N_S_soc_S_i2c_40003000, label, 1) \
	fn(DT_N_S_soc_S_i2c_40003000, label, 2) \
	fn(DT_N_S_soc_S_i2c_40003000, label, 3) \
	fn(DT_N_S_soc_S_i2c_40003000, label, 4)
#define DT_N_S_soc_S_i2c_40003000_P_label_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_status "okay"
#define DT_N_S_soc_S_i2c_40003000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_i2c_40003000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_i2c_40003000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_i2c_40003000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000, status, 0) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 1) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 2) \
	fn(DT_N_S_soc_S_i2c_40003000, status, 3)
#define DT_N_S_soc_S_i2c_40003000_P_status_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_compatible {"nordic,nrf-twi"}
#define DT_N_S_soc_S_i2c_40003000_P_compatible_IDX_0 "nordic,nrf-twi"
#define DT_N_S_soc_S_i2c_40003000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40003000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40003000, compatible, 0)
#define DT_N_S_soc_S_i2c_40003000_P_compatible_LEN 1
#define DT_N_S_soc_S_i2c_40003000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/i2c@40004000
 *
 * Node identifier: DT_N_S_soc_S_i2c_40004000
 *
 * Binding (compatible = nordic,nrf-twi):
 *   $ZEPHYR_BASE\dts\bindings\i2c\nordic,nrf-twi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_i2c_40004000_PATH "/soc/i2c@40004000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_i2c_40004000_FULL_NAME "i2c@40004000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_i2c_40004000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_i2c_40004000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_i2c_40004000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_i2c_40004000_ORD 31

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_i2c_40004000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_i2c_40004000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_i2c_40004000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_twi DT_N_S_soc_S_i2c_40004000
#define DT_N_NODELABEL_i2c1        DT_N_S_soc_S_i2c_40004000

/* Special property macros: */
#define DT_N_S_soc_S_i2c_40004000_REG_NUM 1
#define DT_N_S_soc_S_i2c_40004000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_REG_IDX_0_VAL_ADDRESS 1073758208 /* 0x40004000 */
#define DT_N_S_soc_S_i2c_40004000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_i2c_40004000_IRQ_NUM 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_VAL_irq 4
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_i2c_40004000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_COMPAT_MATCHES_nordic_nrf_twi 1
#define DT_N_S_soc_S_i2c_40004000_STATUS_disabled 1

/* Generic property macros: */
#define DT_N_S_soc_S_i2c_40004000_P_reg {1073758208 /* 0x40004000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_i2c_40004000_P_reg_IDX_0 1073758208
#define DT_N_S_soc_S_i2c_40004000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_i2c_40004000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40004000, reg, 0) \
	fn(DT_N_S_soc_S_i2c_40004000, reg, 1)
#define DT_N_S_soc_S_i2c_40004000_P_reg_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_interrupts {4 /* 0x4 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_IDX_0 4
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40004000, interrupts, 0) \
	fn(DT_N_S_soc_S_i2c_40004000, interrupts, 1)
#define DT_N_S_soc_S_i2c_40004000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_sda_pin 30
#define DT_N_S_soc_S_i2c_40004000_P_sda_pin_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_scl_pin 31
#define DT_N_S_soc_S_i2c_40004000_P_scl_pin_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_clock_frequency 100000
#define DT_N_S_soc_S_i2c_40004000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_label "I2C_1"
#define DT_N_S_soc_S_i2c_40004000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40004000, label, 0) \
	fn(DT_N_S_soc_S_i2c_40004000, label, 1) \
	fn(DT_N_S_soc_S_i2c_40004000, label, 2) \
	fn(DT_N_S_soc_S_i2c_40004000, label, 3) \
	fn(DT_N_S_soc_S_i2c_40004000, label, 4)
#define DT_N_S_soc_S_i2c_40004000_P_label_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_status "disabled"
#define DT_N_S_soc_S_i2c_40004000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_i2c_40004000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_i2c_40004000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_i2c_40004000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40004000, status, 0) \
	fn(DT_N_S_soc_S_i2c_40004000, status, 1) \
	fn(DT_N_S_soc_S_i2c_40004000, status, 2) \
	fn(DT_N_S_soc_S_i2c_40004000, status, 3) \
	fn(DT_N_S_soc_S_i2c_40004000, status, 4) \
	fn(DT_N_S_soc_S_i2c_40004000, status, 5) \
	fn(DT_N_S_soc_S_i2c_40004000, status, 6) \
	fn(DT_N_S_soc_S_i2c_40004000, status, 7)
#define DT_N_S_soc_S_i2c_40004000_P_status_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_compatible {"nordic,nrf-twi"}
#define DT_N_S_soc_S_i2c_40004000_P_compatible_IDX_0 "nordic,nrf-twi"
#define DT_N_S_soc_S_i2c_40004000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_i2c_40004000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40004000, compatible, 0)
#define DT_N_S_soc_S_i2c_40004000_P_compatible_LEN 1
#define DT_N_S_soc_S_i2c_40004000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/memory@20000000
 *
 * Node identifier: DT_N_S_soc_S_memory_20000000
 *
 * Binding (compatible = mmio-sram):
 *   $ZEPHYR_BASE\dts\bindings\sram\mmio-sram.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_memory_20000000_PATH "/soc/memory@20000000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_memory_20000000_FULL_NAME "memory@20000000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_memory_20000000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_memory_20000000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_memory_20000000_ORD 32

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_memory_20000000_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_memory_20000000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_memory_20000000_EXISTS 1
#define DT_N_INST_0_mmio_sram DT_N_S_soc_S_memory_20000000
#define DT_N_NODELABEL_sram0  DT_N_S_soc_S_memory_20000000

/* Special property macros: */
#define DT_N_S_soc_S_memory_20000000_REG_NUM 1
#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_VAL_ADDRESS 536870912 /* 0x20000000 */
#define DT_N_S_soc_S_memory_20000000_REG_IDX_0_VAL_SIZE 262144 /* 0x40000 */
#define DT_N_S_soc_S_memory_20000000_IRQ_NUM 0
#define DT_N_S_soc_S_memory_20000000_COMPAT_MATCHES_mmio_sram 1
#define DT_N_S_soc_S_memory_20000000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_memory_20000000_P_reg {536870912 /* 0x20000000 */, 262144 /* 0x40000 */}
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_0 536870912
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_1 262144
#define DT_N_S_soc_S_memory_20000000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_20000000, reg, 0) \
	fn(DT_N_S_soc_S_memory_20000000, reg, 1)
#define DT_N_S_soc_S_memory_20000000_P_reg_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_compatible {"mmio-sram"}
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0 "mmio-sram"
#define DT_N_S_soc_S_memory_20000000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_memory_20000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_20000000, compatible, 0)
#define DT_N_S_soc_S_memory_20000000_P_compatible_LEN 1
#define DT_N_S_soc_S_memory_20000000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/pwm@40021000
 *
 * Node identifier: DT_N_S_soc_S_pwm_40021000
 *
 * Binding (compatible = nordic,nrf-pwm):
 *   $ZEPHYR_BASE\dts\bindings\pwm\nordic,nrf-pwm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_pwm_40021000_PATH "/soc/pwm@40021000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_pwm_40021000_FULL_NAME "pwm@40021000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_pwm_40021000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_pwm_40021000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_pwm_40021000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_pwm_40021000_ORD 33

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_pwm_40021000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_pwm_40021000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_pwm_40021000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_pwm DT_N_S_soc_S_pwm_40021000
#define DT_N_NODELABEL_pwm1        DT_N_S_soc_S_pwm_40021000

/* Special property macros: */
#define DT_N_S_soc_S_pwm_40021000_REG_NUM 1
#define DT_N_S_soc_S_pwm_40021000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_REG_IDX_0_VAL_ADDRESS 1073876992 /* 0x40021000 */
#define DT_N_S_soc_S_pwm_40021000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_pwm_40021000_IRQ_NUM 1
#define DT_N_S_soc_S_pwm_40021000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_IRQ_IDX_0_VAL_irq 33
#define DT_N_S_soc_S_pwm_40021000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_pwm_40021000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_COMPAT_MATCHES_nordic_nrf_pwm 1
#define DT_N_S_soc_S_pwm_40021000_STATUS_disabled 1

/* Generic property macros: */
#define DT_N_S_soc_S_pwm_40021000_P_reg {1073876992 /* 0x40021000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_pwm_40021000_P_reg_IDX_0 1073876992
#define DT_N_S_soc_S_pwm_40021000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_pwm_40021000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_40021000, reg, 0) \
	fn(DT_N_S_soc_S_pwm_40021000, reg, 1)
#define DT_N_S_soc_S_pwm_40021000_P_reg_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_center_aligned 0
#define DT_N_S_soc_S_pwm_40021000_P_center_aligned_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_ch0_inverted 0
#define DT_N_S_soc_S_pwm_40021000_P_ch0_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_ch1_inverted 0
#define DT_N_S_soc_S_pwm_40021000_P_ch1_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_ch2_inverted 0
#define DT_N_S_soc_S_pwm_40021000_P_ch2_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_ch3_inverted 0
#define DT_N_S_soc_S_pwm_40021000_P_ch3_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_label "PWM_1"
#define DT_N_S_soc_S_pwm_40021000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_40021000, label, 0) \
	fn(DT_N_S_soc_S_pwm_40021000, label, 1) \
	fn(DT_N_S_soc_S_pwm_40021000, label, 2) \
	fn(DT_N_S_soc_S_pwm_40021000, label, 3) \
	fn(DT_N_S_soc_S_pwm_40021000, label, 4)
#define DT_N_S_soc_S_pwm_40021000_P_label_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_status "disabled"
#define DT_N_S_soc_S_pwm_40021000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_pwm_40021000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_pwm_40021000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_pwm_40021000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_40021000, status, 0) \
	fn(DT_N_S_soc_S_pwm_40021000, status, 1) \
	fn(DT_N_S_soc_S_pwm_40021000, status, 2) \
	fn(DT_N_S_soc_S_pwm_40021000, status, 3) \
	fn(DT_N_S_soc_S_pwm_40021000, status, 4) \
	fn(DT_N_S_soc_S_pwm_40021000, status, 5) \
	fn(DT_N_S_soc_S_pwm_40021000, status, 6) \
	fn(DT_N_S_soc_S_pwm_40021000, status, 7)
#define DT_N_S_soc_S_pwm_40021000_P_status_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_compatible {"nordic,nrf-pwm"}
#define DT_N_S_soc_S_pwm_40021000_P_compatible_IDX_0 "nordic,nrf-pwm"
#define DT_N_S_soc_S_pwm_40021000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_40021000, compatible, 0)
#define DT_N_S_soc_S_pwm_40021000_P_compatible_LEN 1
#define DT_N_S_soc_S_pwm_40021000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_interrupts {33 /* 0x21 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_pwm_40021000_P_interrupts_IDX_0 33
#define DT_N_S_soc_S_pwm_40021000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_pwm_40021000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_40021000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_40021000, interrupts, 0) \
	fn(DT_N_S_soc_S_pwm_40021000, interrupts, 1)
#define DT_N_S_soc_S_pwm_40021000_P_interrupts_EXISTS 1

/*
 * Devicetree node: /soc/pwm@40022000
 *
 * Node identifier: DT_N_S_soc_S_pwm_40022000
 *
 * Binding (compatible = nordic,nrf-pwm):
 *   $ZEPHYR_BASE\dts\bindings\pwm\nordic,nrf-pwm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_pwm_40022000_PATH "/soc/pwm@40022000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_pwm_40022000_FULL_NAME "pwm@40022000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_pwm_40022000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_pwm_40022000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_pwm_40022000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_pwm_40022000_ORD 34

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_pwm_40022000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_pwm_40022000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_pwm_40022000_EXISTS 1
#define DT_N_INST_2_nordic_nrf_pwm DT_N_S_soc_S_pwm_40022000
#define DT_N_NODELABEL_pwm2        DT_N_S_soc_S_pwm_40022000

/* Special property macros: */
#define DT_N_S_soc_S_pwm_40022000_REG_NUM 1
#define DT_N_S_soc_S_pwm_40022000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_REG_IDX_0_VAL_ADDRESS 1073881088 /* 0x40022000 */
#define DT_N_S_soc_S_pwm_40022000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_pwm_40022000_IRQ_NUM 1
#define DT_N_S_soc_S_pwm_40022000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_IRQ_IDX_0_VAL_irq 34
#define DT_N_S_soc_S_pwm_40022000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_pwm_40022000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_COMPAT_MATCHES_nordic_nrf_pwm 1
#define DT_N_S_soc_S_pwm_40022000_STATUS_disabled 1

/* Generic property macros: */
#define DT_N_S_soc_S_pwm_40022000_P_reg {1073881088 /* 0x40022000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_pwm_40022000_P_reg_IDX_0 1073881088
#define DT_N_S_soc_S_pwm_40022000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_pwm_40022000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_40022000, reg, 0) \
	fn(DT_N_S_soc_S_pwm_40022000, reg, 1)
#define DT_N_S_soc_S_pwm_40022000_P_reg_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_center_aligned 0
#define DT_N_S_soc_S_pwm_40022000_P_center_aligned_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_ch0_inverted 0
#define DT_N_S_soc_S_pwm_40022000_P_ch0_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_ch1_inverted 0
#define DT_N_S_soc_S_pwm_40022000_P_ch1_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_ch2_inverted 0
#define DT_N_S_soc_S_pwm_40022000_P_ch2_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_ch3_inverted 0
#define DT_N_S_soc_S_pwm_40022000_P_ch3_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_label "PWM_2"
#define DT_N_S_soc_S_pwm_40022000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_40022000, label, 0) \
	fn(DT_N_S_soc_S_pwm_40022000, label, 1) \
	fn(DT_N_S_soc_S_pwm_40022000, label, 2) \
	fn(DT_N_S_soc_S_pwm_40022000, label, 3) \
	fn(DT_N_S_soc_S_pwm_40022000, label, 4)
#define DT_N_S_soc_S_pwm_40022000_P_label_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_status "disabled"
#define DT_N_S_soc_S_pwm_40022000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_pwm_40022000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_pwm_40022000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_pwm_40022000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_40022000, status, 0) \
	fn(DT_N_S_soc_S_pwm_40022000, status, 1) \
	fn(DT_N_S_soc_S_pwm_40022000, status, 2) \
	fn(DT_N_S_soc_S_pwm_40022000, status, 3) \
	fn(DT_N_S_soc_S_pwm_40022000, status, 4) \
	fn(DT_N_S_soc_S_pwm_40022000, status, 5) \
	fn(DT_N_S_soc_S_pwm_40022000, status, 6) \
	fn(DT_N_S_soc_S_pwm_40022000, status, 7)
#define DT_N_S_soc_S_pwm_40022000_P_status_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_compatible {"nordic,nrf-pwm"}
#define DT_N_S_soc_S_pwm_40022000_P_compatible_IDX_0 "nordic,nrf-pwm"
#define DT_N_S_soc_S_pwm_40022000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_40022000, compatible, 0)
#define DT_N_S_soc_S_pwm_40022000_P_compatible_LEN 1
#define DT_N_S_soc_S_pwm_40022000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_interrupts {34 /* 0x22 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_pwm_40022000_P_interrupts_IDX_0 34
#define DT_N_S_soc_S_pwm_40022000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_pwm_40022000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_40022000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_40022000, interrupts, 0) \
	fn(DT_N_S_soc_S_pwm_40022000, interrupts, 1)
#define DT_N_S_soc_S_pwm_40022000_P_interrupts_EXISTS 1

/*
 * Devicetree node: /soc/pwm@4002d000
 *
 * Node identifier: DT_N_S_soc_S_pwm_4002d000
 *
 * Binding (compatible = nordic,nrf-pwm):
 *   $ZEPHYR_BASE\dts\bindings\pwm\nordic,nrf-pwm.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_pwm_4002d000_PATH "/soc/pwm@4002d000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_pwm_4002d000_FULL_NAME "pwm@4002d000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_pwm_4002d000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_pwm_4002d000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_pwm_4002d000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_pwm_4002d000_ORD 35

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_pwm_4002d000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_pwm_4002d000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_pwm_4002d000_EXISTS 1
#define DT_N_INST_3_nordic_nrf_pwm DT_N_S_soc_S_pwm_4002d000
#define DT_N_NODELABEL_pwm3        DT_N_S_soc_S_pwm_4002d000

/* Special property macros: */
#define DT_N_S_soc_S_pwm_4002d000_REG_NUM 1
#define DT_N_S_soc_S_pwm_4002d000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_REG_IDX_0_VAL_ADDRESS 1073926144 /* 0x4002d000 */
#define DT_N_S_soc_S_pwm_4002d000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_pwm_4002d000_IRQ_NUM 1
#define DT_N_S_soc_S_pwm_4002d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_IRQ_IDX_0_VAL_irq 45
#define DT_N_S_soc_S_pwm_4002d000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_pwm_4002d000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_COMPAT_MATCHES_nordic_nrf_pwm 1
#define DT_N_S_soc_S_pwm_4002d000_STATUS_disabled 1

/* Generic property macros: */
#define DT_N_S_soc_S_pwm_4002d000_P_reg {1073926144 /* 0x4002d000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_pwm_4002d000_P_reg_IDX_0 1073926144
#define DT_N_S_soc_S_pwm_4002d000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_pwm_4002d000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4002d000, reg, 0) \
	fn(DT_N_S_soc_S_pwm_4002d000, reg, 1)
#define DT_N_S_soc_S_pwm_4002d000_P_reg_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_P_center_aligned 0
#define DT_N_S_soc_S_pwm_4002d000_P_center_aligned_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_P_ch0_inverted 0
#define DT_N_S_soc_S_pwm_4002d000_P_ch0_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_P_ch1_inverted 0
#define DT_N_S_soc_S_pwm_4002d000_P_ch1_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_P_ch2_inverted 0
#define DT_N_S_soc_S_pwm_4002d000_P_ch2_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_P_ch3_inverted 0
#define DT_N_S_soc_S_pwm_4002d000_P_ch3_inverted_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_P_label "PWM_3"
#define DT_N_S_soc_S_pwm_4002d000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4002d000, label, 0) \
	fn(DT_N_S_soc_S_pwm_4002d000, label, 1) \
	fn(DT_N_S_soc_S_pwm_4002d000, label, 2) \
	fn(DT_N_S_soc_S_pwm_4002d000, label, 3) \
	fn(DT_N_S_soc_S_pwm_4002d000, label, 4)
#define DT_N_S_soc_S_pwm_4002d000_P_label_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_P_status "disabled"
#define DT_N_S_soc_S_pwm_4002d000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_pwm_4002d000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_pwm_4002d000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_pwm_4002d000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4002d000, status, 0) \
	fn(DT_N_S_soc_S_pwm_4002d000, status, 1) \
	fn(DT_N_S_soc_S_pwm_4002d000, status, 2) \
	fn(DT_N_S_soc_S_pwm_4002d000, status, 3) \
	fn(DT_N_S_soc_S_pwm_4002d000, status, 4) \
	fn(DT_N_S_soc_S_pwm_4002d000, status, 5) \
	fn(DT_N_S_soc_S_pwm_4002d000, status, 6) \
	fn(DT_N_S_soc_S_pwm_4002d000, status, 7)
#define DT_N_S_soc_S_pwm_4002d000_P_status_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_P_compatible {"nordic,nrf-pwm"}
#define DT_N_S_soc_S_pwm_4002d000_P_compatible_IDX_0 "nordic,nrf-pwm"
#define DT_N_S_soc_S_pwm_4002d000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4002d000, compatible, 0)
#define DT_N_S_soc_S_pwm_4002d000_P_compatible_LEN 1
#define DT_N_S_soc_S_pwm_4002d000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_P_interrupts {45 /* 0x2d */, 1 /* 0x1 */}
#define DT_N_S_soc_S_pwm_4002d000_P_interrupts_IDX_0 45
#define DT_N_S_soc_S_pwm_4002d000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_pwm_4002d000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_pwm_4002d000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pwm_4002d000, interrupts, 0) \
	fn(DT_N_S_soc_S_pwm_4002d000, interrupts, 1)
#define DT_N_S_soc_S_pwm_4002d000_P_interrupts_EXISTS 1

/*
 * Devicetree node: /soc/qdec@40012000
 *
 * Node identifier: DT_N_S_soc_S_qdec_40012000
 *
 * Binding (compatible = nordic,nrf-qdec):
 *   $ZEPHYR_BASE\dts\bindings\sensor\nordic,nrf-qdec.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_qdec_40012000_PATH "/soc/qdec@40012000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_qdec_40012000_FULL_NAME "qdec@40012000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_qdec_40012000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_qdec_40012000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_qdec_40012000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_qdec_40012000_ORD 36

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_qdec_40012000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_qdec_40012000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_qdec_40012000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_qdec DT_N_S_soc_S_qdec_40012000
#define DT_N_NODELABEL_qdec         DT_N_S_soc_S_qdec_40012000

/* Special property macros: */
#define DT_N_S_soc_S_qdec_40012000_REG_NUM 1
#define DT_N_S_soc_S_qdec_40012000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_REG_IDX_0_VAL_ADDRESS 1073815552 /* 0x40012000 */
#define DT_N_S_soc_S_qdec_40012000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_qdec_40012000_IRQ_NUM 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_irq 18
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_qdec_40012000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_COMPAT_MATCHES_nordic_nrf_qdec 1
#define DT_N_S_soc_S_qdec_40012000_STATUS_disabled 1

/* Generic property macros: */
#define DT_N_S_soc_S_qdec_40012000_P_reg {1073815552 /* 0x40012000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_0 1073815552
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_qdec_40012000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qdec_40012000, reg, 0) \
	fn(DT_N_S_soc_S_qdec_40012000, reg, 1)
#define DT_N_S_soc_S_qdec_40012000_P_reg_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts {18 /* 0x12 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_0 18
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qdec_40012000, interrupts, 0) \
	fn(DT_N_S_soc_S_qdec_40012000, interrupts, 1)
#define DT_N_S_soc_S_qdec_40012000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_label "QDEC"
#define DT_N_S_soc_S_qdec_40012000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qdec_40012000, label, 0) \
	fn(DT_N_S_soc_S_qdec_40012000, label, 1) \
	fn(DT_N_S_soc_S_qdec_40012000, label, 2) \
	fn(DT_N_S_soc_S_qdec_40012000, label, 3)
#define DT_N_S_soc_S_qdec_40012000_P_label_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_status "disabled"
#define DT_N_S_soc_S_qdec_40012000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_qdec_40012000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_qdec_40012000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_qdec_40012000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qdec_40012000, status, 0) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 1) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 2) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 3) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 4) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 5) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 6) \
	fn(DT_N_S_soc_S_qdec_40012000, status, 7)
#define DT_N_S_soc_S_qdec_40012000_P_status_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_compatible {"nordic,nrf-qdec"}
#define DT_N_S_soc_S_qdec_40012000_P_compatible_IDX_0 "nordic,nrf-qdec"
#define DT_N_S_soc_S_qdec_40012000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qdec_40012000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qdec_40012000, compatible, 0)
#define DT_N_S_soc_S_qdec_40012000_P_compatible_LEN 1
#define DT_N_S_soc_S_qdec_40012000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/random@4000d000
 *
 * Node identifier: DT_N_S_soc_S_random_4000d000
 *
 * Binding (compatible = nordic,nrf-rng):
 *   $ZEPHYR_BASE\dts\bindings\rng\nordic,nrf-rng.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_random_4000d000_PATH "/soc/random@4000d000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_random_4000d000_FULL_NAME "random@4000d000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_random_4000d000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_random_4000d000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_random_4000d000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_random_4000d000_ORD 37

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_random_4000d000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_random_4000d000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_random_4000d000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_rng DT_N_S_soc_S_random_4000d000
#define DT_N_NODELABEL_rng         DT_N_S_soc_S_random_4000d000

/* Special property macros: */
#define DT_N_S_soc_S_random_4000d000_REG_NUM 1
#define DT_N_S_soc_S_random_4000d000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_REG_IDX_0_VAL_ADDRESS 1073795072 /* 0x4000d000 */
#define DT_N_S_soc_S_random_4000d000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_random_4000d000_IRQ_NUM 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_irq 13
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_random_4000d000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_COMPAT_MATCHES_nordic_nrf_rng 1
#define DT_N_S_soc_S_random_4000d000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_random_4000d000_P_reg {1073795072 /* 0x4000d000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_0 1073795072
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_random_4000d000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_random_4000d000, reg, 0) \
	fn(DT_N_S_soc_S_random_4000d000, reg, 1)
#define DT_N_S_soc_S_random_4000d000_P_reg_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts {13 /* 0xd */, 1 /* 0x1 */}
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_0 13
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_random_4000d000, interrupts, 0) \
	fn(DT_N_S_soc_S_random_4000d000, interrupts, 1)
#define DT_N_S_soc_S_random_4000d000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_status "okay"
#define DT_N_S_soc_S_random_4000d000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_random_4000d000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_random_4000d000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_random_4000d000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_random_4000d000, status, 0) \
	fn(DT_N_S_soc_S_random_4000d000, status, 1) \
	fn(DT_N_S_soc_S_random_4000d000, status, 2) \
	fn(DT_N_S_soc_S_random_4000d000, status, 3)
#define DT_N_S_soc_S_random_4000d000_P_status_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_compatible {"nordic,nrf-rng"}
#define DT_N_S_soc_S_random_4000d000_P_compatible_IDX_0 "nordic,nrf-rng"
#define DT_N_S_soc_S_random_4000d000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_random_4000d000, compatible, 0)
#define DT_N_S_soc_S_random_4000d000_P_compatible_LEN 1
#define DT_N_S_soc_S_random_4000d000_P_compatible_EXISTS 1
#define DT_N_S_soc_S_random_4000d000_P_label "RNG"
#define DT_N_S_soc_S_random_4000d000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_random_4000d000, label, 0) \
	fn(DT_N_S_soc_S_random_4000d000, label, 1) \
	fn(DT_N_S_soc_S_random_4000d000, label, 2)
#define DT_N_S_soc_S_random_4000d000_P_label_EXISTS 1

/*
 * Devicetree node: /soc/rtc@4000b000
 *
 * Node identifier: DT_N_S_soc_S_rtc_4000b000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   $ZEPHYR_BASE\dts\bindings\rtc\nordic,nrf-rtc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_rtc_4000b000_PATH "/soc/rtc@4000b000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_rtc_4000b000_FULL_NAME "rtc@4000b000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_rtc_4000b000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_rtc_4000b000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_rtc_4000b000_ORD 38

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_rtc_4000b000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_rtc_4000b000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_rtc_4000b000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_rtc DT_N_S_soc_S_rtc_4000b000
#define DT_N_NODELABEL_rtc0        DT_N_S_soc_S_rtc_4000b000

/* Special property macros: */
#define DT_N_S_soc_S_rtc_4000b000_REG_NUM 1
#define DT_N_S_soc_S_rtc_4000b000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_REG_IDX_0_VAL_ADDRESS 1073786880 /* 0x4000b000 */
#define DT_N_S_soc_S_rtc_4000b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_rtc_4000b000_IRQ_NUM 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_irq 11
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_rtc_4000b000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_COMPAT_MATCHES_nordic_nrf_rtc 1
#define DT_N_S_soc_S_rtc_4000b000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_rtc_4000b000_P_reg {1073786880 /* 0x4000b000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_0 1073786880
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_rtc_4000b000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_4000b000, reg, 0) \
	fn(DT_N_S_soc_S_rtc_4000b000, reg, 1)
#define DT_N_S_soc_S_rtc_4000b000_P_reg_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_cc_num 3
#define DT_N_S_soc_S_rtc_4000b000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_ppi_wrap 0
#define DT_N_S_soc_S_rtc_4000b000_P_ppi_wrap_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_fixed_top 0
#define DT_N_S_soc_S_rtc_4000b000_P_fixed_top_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_clock_frequency 32768
#define DT_N_S_soc_S_rtc_4000b000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_label "RTC_0"
#define DT_N_S_soc_S_rtc_4000b000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_4000b000, label, 0) \
	fn(DT_N_S_soc_S_rtc_4000b000, label, 1) \
	fn(DT_N_S_soc_S_rtc_4000b000, label, 2) \
	fn(DT_N_S_soc_S_rtc_4000b000, label, 3) \
	fn(DT_N_S_soc_S_rtc_4000b000, label, 4)
#define DT_N_S_soc_S_rtc_4000b000_P_label_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts {11 /* 0xb */, 1 /* 0x1 */}
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_0 11
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_4000b000, interrupts, 0) \
	fn(DT_N_S_soc_S_rtc_4000b000, interrupts, 1)
#define DT_N_S_soc_S_rtc_4000b000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_prescaler 1
#define DT_N_S_soc_S_rtc_4000b000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_status "okay"
#define DT_N_S_soc_S_rtc_4000b000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_rtc_4000b000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_rtc_4000b000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_rtc_4000b000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_4000b000, status, 0) \
	fn(DT_N_S_soc_S_rtc_4000b000, status, 1) \
	fn(DT_N_S_soc_S_rtc_4000b000, status, 2) \
	fn(DT_N_S_soc_S_rtc_4000b000, status, 3)
#define DT_N_S_soc_S_rtc_4000b000_P_status_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_compatible {"nordic,nrf-rtc"}
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_IDX_0 "nordic,nrf-rtc"
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_4000b000, compatible, 0)
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_LEN 1
#define DT_N_S_soc_S_rtc_4000b000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/rtc@40011000
 *
 * Node identifier: DT_N_S_soc_S_rtc_40011000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   $ZEPHYR_BASE\dts\bindings\rtc\nordic,nrf-rtc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_rtc_40011000_PATH "/soc/rtc@40011000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_rtc_40011000_FULL_NAME "rtc@40011000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_rtc_40011000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_rtc_40011000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_rtc_40011000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_rtc_40011000_ORD 39

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_rtc_40011000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_rtc_40011000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_rtc_40011000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_rtc DT_N_S_soc_S_rtc_40011000
#define DT_N_NODELABEL_rtc1        DT_N_S_soc_S_rtc_40011000

/* Special property macros: */
#define DT_N_S_soc_S_rtc_40011000_REG_NUM 1
#define DT_N_S_soc_S_rtc_40011000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_REG_IDX_0_VAL_ADDRESS 1073811456 /* 0x40011000 */
#define DT_N_S_soc_S_rtc_40011000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_rtc_40011000_IRQ_NUM 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_irq 17
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_rtc_40011000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_COMPAT_MATCHES_nordic_nrf_rtc 1
#define DT_N_S_soc_S_rtc_40011000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_rtc_40011000_P_reg {1073811456 /* 0x40011000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_0 1073811456
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_rtc_40011000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40011000, reg, 0) \
	fn(DT_N_S_soc_S_rtc_40011000, reg, 1)
#define DT_N_S_soc_S_rtc_40011000_P_reg_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_cc_num 4
#define DT_N_S_soc_S_rtc_40011000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_ppi_wrap 0
#define DT_N_S_soc_S_rtc_40011000_P_ppi_wrap_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_fixed_top 0
#define DT_N_S_soc_S_rtc_40011000_P_fixed_top_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_clock_frequency 32768
#define DT_N_S_soc_S_rtc_40011000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_label "RTC_1"
#define DT_N_S_soc_S_rtc_40011000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40011000, label, 0) \
	fn(DT_N_S_soc_S_rtc_40011000, label, 1) \
	fn(DT_N_S_soc_S_rtc_40011000, label, 2) \
	fn(DT_N_S_soc_S_rtc_40011000, label, 3) \
	fn(DT_N_S_soc_S_rtc_40011000, label, 4)
#define DT_N_S_soc_S_rtc_40011000_P_label_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts {17 /* 0x11 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_0 17
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40011000, interrupts, 0) \
	fn(DT_N_S_soc_S_rtc_40011000, interrupts, 1)
#define DT_N_S_soc_S_rtc_40011000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_prescaler 1
#define DT_N_S_soc_S_rtc_40011000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_status "okay"
#define DT_N_S_soc_S_rtc_40011000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_rtc_40011000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_rtc_40011000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_rtc_40011000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40011000, status, 0) \
	fn(DT_N_S_soc_S_rtc_40011000, status, 1) \
	fn(DT_N_S_soc_S_rtc_40011000, status, 2) \
	fn(DT_N_S_soc_S_rtc_40011000, status, 3)
#define DT_N_S_soc_S_rtc_40011000_P_status_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_compatible {"nordic,nrf-rtc"}
#define DT_N_S_soc_S_rtc_40011000_P_compatible_IDX_0 "nordic,nrf-rtc"
#define DT_N_S_soc_S_rtc_40011000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40011000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40011000, compatible, 0)
#define DT_N_S_soc_S_rtc_40011000_P_compatible_LEN 1
#define DT_N_S_soc_S_rtc_40011000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/rtc@40024000
 *
 * Node identifier: DT_N_S_soc_S_rtc_40024000
 *
 * Binding (compatible = nordic,nrf-rtc):
 *   $ZEPHYR_BASE\dts\bindings\rtc\nordic,nrf-rtc.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_rtc_40024000_PATH "/soc/rtc@40024000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_rtc_40024000_FULL_NAME "rtc@40024000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_rtc_40024000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_rtc_40024000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_rtc_40024000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_rtc_40024000_ORD 40

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_rtc_40024000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_rtc_40024000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_rtc_40024000_EXISTS 1
#define DT_N_INST_2_nordic_nrf_rtc DT_N_S_soc_S_rtc_40024000
#define DT_N_NODELABEL_rtc2        DT_N_S_soc_S_rtc_40024000

/* Special property macros: */
#define DT_N_S_soc_S_rtc_40024000_REG_NUM 1
#define DT_N_S_soc_S_rtc_40024000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_REG_IDX_0_VAL_ADDRESS 1073889280 /* 0x40024000 */
#define DT_N_S_soc_S_rtc_40024000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_rtc_40024000_IRQ_NUM 1
#define DT_N_S_soc_S_rtc_40024000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_IRQ_IDX_0_VAL_irq 36
#define DT_N_S_soc_S_rtc_40024000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_rtc_40024000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_COMPAT_MATCHES_nordic_nrf_rtc 1
#define DT_N_S_soc_S_rtc_40024000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_rtc_40024000_P_reg {1073889280 /* 0x40024000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_rtc_40024000_P_reg_IDX_0 1073889280
#define DT_N_S_soc_S_rtc_40024000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_rtc_40024000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40024000, reg, 0) \
	fn(DT_N_S_soc_S_rtc_40024000, reg, 1)
#define DT_N_S_soc_S_rtc_40024000_P_reg_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_cc_num 4
#define DT_N_S_soc_S_rtc_40024000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_ppi_wrap 0
#define DT_N_S_soc_S_rtc_40024000_P_ppi_wrap_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_fixed_top 0
#define DT_N_S_soc_S_rtc_40024000_P_fixed_top_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_clock_frequency 32768
#define DT_N_S_soc_S_rtc_40024000_P_clock_frequency_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_label "RTC_2"
#define DT_N_S_soc_S_rtc_40024000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40024000, label, 0) \
	fn(DT_N_S_soc_S_rtc_40024000, label, 1) \
	fn(DT_N_S_soc_S_rtc_40024000, label, 2) \
	fn(DT_N_S_soc_S_rtc_40024000, label, 3) \
	fn(DT_N_S_soc_S_rtc_40024000, label, 4)
#define DT_N_S_soc_S_rtc_40024000_P_label_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_interrupts {36 /* 0x24 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_rtc_40024000_P_interrupts_IDX_0 36
#define DT_N_S_soc_S_rtc_40024000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_rtc_40024000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40024000, interrupts, 0) \
	fn(DT_N_S_soc_S_rtc_40024000, interrupts, 1)
#define DT_N_S_soc_S_rtc_40024000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_prescaler 1
#define DT_N_S_soc_S_rtc_40024000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_status "okay"
#define DT_N_S_soc_S_rtc_40024000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_rtc_40024000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_rtc_40024000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_rtc_40024000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40024000, status, 0) \
	fn(DT_N_S_soc_S_rtc_40024000, status, 1) \
	fn(DT_N_S_soc_S_rtc_40024000, status, 2) \
	fn(DT_N_S_soc_S_rtc_40024000, status, 3)
#define DT_N_S_soc_S_rtc_40024000_P_status_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_compatible {"nordic,nrf-rtc"}
#define DT_N_S_soc_S_rtc_40024000_P_compatible_IDX_0 "nordic,nrf-rtc"
#define DT_N_S_soc_S_rtc_40024000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_rtc_40024000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rtc_40024000, compatible, 0)
#define DT_N_S_soc_S_rtc_40024000_P_compatible_LEN 1
#define DT_N_S_soc_S_rtc_40024000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/spi@40003000
 *
 * Node identifier: DT_N_S_soc_S_spi_40003000
 *
 * Binding (compatible = nordic,nrf-spi):
 *   $ZEPHYR_BASE\dts\bindings\spi\nordic,nrf-spi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_spi_40003000_PATH "/soc/spi@40003000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_spi_40003000_FULL_NAME "spi@40003000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_spi_40003000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_spi_40003000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_spi_40003000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_spi_40003000_ORD 41

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_spi_40003000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_spi_40003000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_spi_40003000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_spi DT_N_S_soc_S_spi_40003000
#define DT_N_NODELABEL_spi0        DT_N_S_soc_S_spi_40003000

/* Special property macros: */
#define DT_N_S_soc_S_spi_40003000_REG_NUM 1
#define DT_N_S_soc_S_spi_40003000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_REG_IDX_0_VAL_ADDRESS 1073754112 /* 0x40003000 */
#define DT_N_S_soc_S_spi_40003000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_spi_40003000_IRQ_NUM 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_irq 3
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_spi_40003000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_COMPAT_MATCHES_nordic_nrf_spi 1
#define DT_N_S_soc_S_spi_40003000_STATUS_disabled 1

/* Generic property macros: */
#define DT_N_S_soc_S_spi_40003000_P_miso_pull_up 0
#define DT_N_S_soc_S_spi_40003000_P_miso_pull_up_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_miso_pull_down 0
#define DT_N_S_soc_S_spi_40003000_P_miso_pull_down_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_reg {1073754112 /* 0x40003000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_0 1073754112
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_spi_40003000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003000, reg, 0) \
	fn(DT_N_S_soc_S_spi_40003000, reg, 1)
#define DT_N_S_soc_S_spi_40003000_P_reg_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts {3 /* 0x3 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_0 3
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003000, interrupts, 0) \
	fn(DT_N_S_soc_S_spi_40003000, interrupts, 1)
#define DT_N_S_soc_S_spi_40003000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_sck_pin 27
#define DT_N_S_soc_S_spi_40003000_P_sck_pin_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_mosi_pin 26
#define DT_N_S_soc_S_spi_40003000_P_mosi_pin_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_miso_pin 29
#define DT_N_S_soc_S_spi_40003000_P_miso_pin_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_label "SPI_0"
#define DT_N_S_soc_S_spi_40003000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003000, label, 0) \
	fn(DT_N_S_soc_S_spi_40003000, label, 1) \
	fn(DT_N_S_soc_S_spi_40003000, label, 2) \
	fn(DT_N_S_soc_S_spi_40003000, label, 3) \
	fn(DT_N_S_soc_S_spi_40003000, label, 4)
#define DT_N_S_soc_S_spi_40003000_P_label_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_status "disabled"
#define DT_N_S_soc_S_spi_40003000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_spi_40003000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_spi_40003000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_spi_40003000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003000, status, 0) \
	fn(DT_N_S_soc_S_spi_40003000, status, 1) \
	fn(DT_N_S_soc_S_spi_40003000, status, 2) \
	fn(DT_N_S_soc_S_spi_40003000, status, 3) \
	fn(DT_N_S_soc_S_spi_40003000, status, 4) \
	fn(DT_N_S_soc_S_spi_40003000, status, 5) \
	fn(DT_N_S_soc_S_spi_40003000, status, 6) \
	fn(DT_N_S_soc_S_spi_40003000, status, 7)
#define DT_N_S_soc_S_spi_40003000_P_status_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_compatible {"nordic,nrf-spi"}
#define DT_N_S_soc_S_spi_40003000_P_compatible_IDX_0 "nordic,nrf-spi"
#define DT_N_S_soc_S_spi_40003000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40003000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003000, compatible, 0)
#define DT_N_S_soc_S_spi_40003000_P_compatible_LEN 1
#define DT_N_S_soc_S_spi_40003000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/spi@40004000
 *
 * Node identifier: DT_N_S_soc_S_spi_40004000
 *
 * Binding (compatible = nordic,nrf-spi):
 *   $ZEPHYR_BASE\dts\bindings\spi\nordic,nrf-spi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_spi_40004000_PATH "/soc/spi@40004000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_spi_40004000_FULL_NAME "spi@40004000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_spi_40004000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_spi_40004000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_spi_40004000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_spi_40004000_ORD 42

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_spi_40004000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_spi_40004000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_spi_40004000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_spi DT_N_S_soc_S_spi_40004000
#define DT_N_NODELABEL_spi1        DT_N_S_soc_S_spi_40004000

/* Special property macros: */
#define DT_N_S_soc_S_spi_40004000_REG_NUM 1
#define DT_N_S_soc_S_spi_40004000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_REG_IDX_0_VAL_ADDRESS 1073758208 /* 0x40004000 */
#define DT_N_S_soc_S_spi_40004000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_spi_40004000_IRQ_NUM 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_irq 4
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_spi_40004000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_COMPAT_MATCHES_nordic_nrf_spi 1
#define DT_N_S_soc_S_spi_40004000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_spi_40004000_P_miso_pull_up 0
#define DT_N_S_soc_S_spi_40004000_P_miso_pull_up_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_miso_pull_down 0
#define DT_N_S_soc_S_spi_40004000_P_miso_pull_down_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_reg {1073758208 /* 0x40004000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_0 1073758208
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_spi_40004000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40004000, reg, 0) \
	fn(DT_N_S_soc_S_spi_40004000, reg, 1)
#define DT_N_S_soc_S_spi_40004000_P_reg_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts {4 /* 0x4 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_0 4
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40004000, interrupts, 0) \
	fn(DT_N_S_soc_S_spi_40004000, interrupts, 1)
#define DT_N_S_soc_S_spi_40004000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_sck_pin 31
#define DT_N_S_soc_S_spi_40004000_P_sck_pin_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_mosi_pin 30
#define DT_N_S_soc_S_spi_40004000_P_mosi_pin_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_miso_pin 40
#define DT_N_S_soc_S_spi_40004000_P_miso_pin_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_label "SPI_1"
#define DT_N_S_soc_S_spi_40004000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40004000, label, 0) \
	fn(DT_N_S_soc_S_spi_40004000, label, 1) \
	fn(DT_N_S_soc_S_spi_40004000, label, 2) \
	fn(DT_N_S_soc_S_spi_40004000, label, 3) \
	fn(DT_N_S_soc_S_spi_40004000, label, 4)
#define DT_N_S_soc_S_spi_40004000_P_label_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_status "okay"
#define DT_N_S_soc_S_spi_40004000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_spi_40004000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_spi_40004000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_spi_40004000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40004000, status, 0) \
	fn(DT_N_S_soc_S_spi_40004000, status, 1) \
	fn(DT_N_S_soc_S_spi_40004000, status, 2) \
	fn(DT_N_S_soc_S_spi_40004000, status, 3)
#define DT_N_S_soc_S_spi_40004000_P_status_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_compatible {"nordic,nrf-spi"}
#define DT_N_S_soc_S_spi_40004000_P_compatible_IDX_0 "nordic,nrf-spi"
#define DT_N_S_soc_S_spi_40004000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40004000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40004000, compatible, 0)
#define DT_N_S_soc_S_spi_40004000_P_compatible_LEN 1
#define DT_N_S_soc_S_spi_40004000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/spi@40023000
 *
 * Node identifier: DT_N_S_soc_S_spi_40023000
 *
 * Binding (compatible = nordic,nrf-spi):
 *   $ZEPHYR_BASE\dts\bindings\spi\nordic,nrf-spi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_spi_40023000_PATH "/soc/spi@40023000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_spi_40023000_FULL_NAME "spi@40023000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_spi_40023000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_spi_40023000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_spi_40023000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_spi_40023000_ORD 43

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_spi_40023000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_spi_40023000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_spi_40023000_EXISTS 1
#define DT_N_INST_2_nordic_nrf_spi DT_N_S_soc_S_spi_40023000
#define DT_N_NODELABEL_spi2        DT_N_S_soc_S_spi_40023000

/* Special property macros: */
#define DT_N_S_soc_S_spi_40023000_REG_NUM 1
#define DT_N_S_soc_S_spi_40023000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_REG_IDX_0_VAL_ADDRESS 1073885184 /* 0x40023000 */
#define DT_N_S_soc_S_spi_40023000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_spi_40023000_IRQ_NUM 1
#define DT_N_S_soc_S_spi_40023000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_IRQ_IDX_0_VAL_irq 35
#define DT_N_S_soc_S_spi_40023000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_spi_40023000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_COMPAT_MATCHES_nordic_nrf_spi 1
#define DT_N_S_soc_S_spi_40023000_STATUS_disabled 1

/* Generic property macros: */
#define DT_N_S_soc_S_spi_40023000_P_miso_pull_up 0
#define DT_N_S_soc_S_spi_40023000_P_miso_pull_up_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_miso_pull_down 0
#define DT_N_S_soc_S_spi_40023000_P_miso_pull_down_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_reg {1073885184 /* 0x40023000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_spi_40023000_P_reg_IDX_0 1073885184
#define DT_N_S_soc_S_spi_40023000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_spi_40023000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40023000, reg, 0) \
	fn(DT_N_S_soc_S_spi_40023000, reg, 1)
#define DT_N_S_soc_S_spi_40023000_P_reg_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_interrupts {35 /* 0x23 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_spi_40023000_P_interrupts_IDX_0 35
#define DT_N_S_soc_S_spi_40023000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_spi_40023000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40023000, interrupts, 0) \
	fn(DT_N_S_soc_S_spi_40023000, interrupts, 1)
#define DT_N_S_soc_S_spi_40023000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_sck_pin 19
#define DT_N_S_soc_S_spi_40023000_P_sck_pin_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_mosi_pin 20
#define DT_N_S_soc_S_spi_40023000_P_mosi_pin_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_miso_pin 21
#define DT_N_S_soc_S_spi_40023000_P_miso_pin_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_label "SPI_2"
#define DT_N_S_soc_S_spi_40023000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40023000, label, 0) \
	fn(DT_N_S_soc_S_spi_40023000, label, 1) \
	fn(DT_N_S_soc_S_spi_40023000, label, 2) \
	fn(DT_N_S_soc_S_spi_40023000, label, 3) \
	fn(DT_N_S_soc_S_spi_40023000, label, 4)
#define DT_N_S_soc_S_spi_40023000_P_label_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_status "disabled"
#define DT_N_S_soc_S_spi_40023000_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_spi_40023000_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_spi_40023000_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_spi_40023000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40023000, status, 0) \
	fn(DT_N_S_soc_S_spi_40023000, status, 1) \
	fn(DT_N_S_soc_S_spi_40023000, status, 2) \
	fn(DT_N_S_soc_S_spi_40023000, status, 3) \
	fn(DT_N_S_soc_S_spi_40023000, status, 4) \
	fn(DT_N_S_soc_S_spi_40023000, status, 5) \
	fn(DT_N_S_soc_S_spi_40023000, status, 6) \
	fn(DT_N_S_soc_S_spi_40023000, status, 7)
#define DT_N_S_soc_S_spi_40023000_P_status_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_compatible {"nordic,nrf-spi"}
#define DT_N_S_soc_S_spi_40023000_P_compatible_IDX_0 "nordic,nrf-spi"
#define DT_N_S_soc_S_spi_40023000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_40023000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40023000, compatible, 0)
#define DT_N_S_soc_S_spi_40023000_P_compatible_LEN 1
#define DT_N_S_soc_S_spi_40023000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/gpio@50000300
 *
 * Node identifier: DT_N_S_soc_S_gpio_50000300
 *
 * Binding (compatible = nordic,nrf-gpio):
 *   $ZEPHYR_BASE\dts\bindings\gpio\nordic,nrf-gpio.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_gpio_50000300_PATH "/soc/gpio@50000300"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_gpio_50000300_FULL_NAME "gpio@50000300"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_gpio_50000300_PARENT DT_N_S_soc
#define DT_N_S_soc_S_gpio_50000300_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_gpio_50000300_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_gpio_50000300_ORD 44

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_gpio_50000300_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_gpio_50000300_SUPPORTS_ORDS \
	45, /* /soc/spi@4002f000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_gpio_50000300_EXISTS 1
#define DT_N_INST_1_nordic_nrf_gpio DT_N_S_soc_S_gpio_50000300
#define DT_N_NODELABEL_gpio1        DT_N_S_soc_S_gpio_50000300

/* Special property macros: */
#define DT_N_S_soc_S_gpio_50000300_REG_NUM 2
#define DT_N_S_soc_S_gpio_50000300_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000300_REG_IDX_0_VAL_ADDRESS 1342178048 /* 0x50000300 */
#define DT_N_S_soc_S_gpio_50000300_REG_IDX_0_VAL_SIZE 512 /* 0x200 */
#define DT_N_S_soc_S_gpio_50000300_REG_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpio_50000300_REG_IDX_1_VAL_ADDRESS 1342179328 /* 0x50000800 */
#define DT_N_S_soc_S_gpio_50000300_REG_IDX_1_VAL_SIZE 768 /* 0x300 */
#define DT_N_S_soc_S_gpio_50000300_IRQ_NUM 0
#define DT_N_S_soc_S_gpio_50000300_COMPAT_MATCHES_nordic_nrf_gpio 1
#define DT_N_S_soc_S_gpio_50000300_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_gpio_50000300_P_reg {1342178048 /* 0x50000300 */, 512 /* 0x200 */, 1342179328 /* 0x50000800 */, 768 /* 0x300 */}
#define DT_N_S_soc_S_gpio_50000300_P_reg_IDX_0 1342178048
#define DT_N_S_soc_S_gpio_50000300_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000300_P_reg_IDX_1 512
#define DT_N_S_soc_S_gpio_50000300_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_gpio_50000300_P_reg_IDX_2 1342179328
#define DT_N_S_soc_S_gpio_50000300_P_reg_IDX_2_EXISTS 1
#define DT_N_S_soc_S_gpio_50000300_P_reg_IDX_3 768
#define DT_N_S_soc_S_gpio_50000300_P_reg_IDX_3_EXISTS 1
#define DT_N_S_soc_S_gpio_50000300_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_50000300, reg, 0) \
	fn(DT_N_S_soc_S_gpio_50000300, reg, 1) \
	fn(DT_N_S_soc_S_gpio_50000300, reg, 2) \
	fn(DT_N_S_soc_S_gpio_50000300, reg, 3)
#define DT_N_S_soc_S_gpio_50000300_P_reg_EXISTS 1
#define DT_N_S_soc_S_gpio_50000300_P_label "GPIO_1"
#define DT_N_S_soc_S_gpio_50000300_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_50000300, label, 0) \
	fn(DT_N_S_soc_S_gpio_50000300, label, 1) \
	fn(DT_N_S_soc_S_gpio_50000300, label, 2) \
	fn(DT_N_S_soc_S_gpio_50000300, label, 3) \
	fn(DT_N_S_soc_S_gpio_50000300, label, 4) \
	fn(DT_N_S_soc_S_gpio_50000300, label, 5)
#define DT_N_S_soc_S_gpio_50000300_P_label_EXISTS 1
#define DT_N_S_soc_S_gpio_50000300_P_port 1
#define DT_N_S_soc_S_gpio_50000300_P_port_EXISTS 1
#define DT_N_S_soc_S_gpio_50000300_P_gpio_controller 1
#define DT_N_S_soc_S_gpio_50000300_P_gpio_controller_EXISTS 1
#define DT_N_S_soc_S_gpio_50000300_P_ngpios 16
#define DT_N_S_soc_S_gpio_50000300_P_ngpios_EXISTS 1
#define DT_N_S_soc_S_gpio_50000300_P_status "okay"
#define DT_N_S_soc_S_gpio_50000300_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_gpio_50000300_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_gpio_50000300_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_gpio_50000300_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_50000300, status, 0) \
	fn(DT_N_S_soc_S_gpio_50000300, status, 1) \
	fn(DT_N_S_soc_S_gpio_50000300, status, 2) \
	fn(DT_N_S_soc_S_gpio_50000300, status, 3)
#define DT_N_S_soc_S_gpio_50000300_P_status_EXISTS 1
#define DT_N_S_soc_S_gpio_50000300_P_compatible {"nordic,nrf-gpio"}
#define DT_N_S_soc_S_gpio_50000300_P_compatible_IDX_0 "nordic,nrf-gpio"
#define DT_N_S_soc_S_gpio_50000300_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_gpio_50000300_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_gpio_50000300, compatible, 0)
#define DT_N_S_soc_S_gpio_50000300_P_compatible_LEN 1
#define DT_N_S_soc_S_gpio_50000300_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/spi@4002f000
 *
 * Node identifier: DT_N_S_soc_S_spi_4002f000
 *
 * Binding (compatible = nordic,nrf-spim):
 *   $ZEPHYR_BASE\dts\bindings\spi\nordic,nrf-spim.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_spi_4002f000_PATH "/soc/spi@4002f000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_spi_4002f000_FULL_NAME "spi@4002f000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_spi_4002f000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_spi_4002f000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_spi_4002f000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_spi_4002f000_ORD 45

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_spi_4002f000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */ \
	44, /* /soc/gpio@50000300 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_spi_4002f000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_spi_4002f000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_spim DT_N_S_soc_S_spi_4002f000
#define DT_N_NODELABEL_spi3         DT_N_S_soc_S_spi_4002f000
#define DT_N_NODELABEL_arduino_spi  DT_N_S_soc_S_spi_4002f000

/* Special property macros: */
#define DT_N_S_soc_S_spi_4002f000_REG_NUM 1
#define DT_N_S_soc_S_spi_4002f000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_REG_IDX_0_VAL_ADDRESS 1073934336 /* 0x4002f000 */
#define DT_N_S_soc_S_spi_4002f000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_spi_4002f000_IRQ_NUM 1
#define DT_N_S_soc_S_spi_4002f000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_IRQ_IDX_0_VAL_irq 47
#define DT_N_S_soc_S_spi_4002f000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_spi_4002f000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_COMPAT_MATCHES_nordic_nrf_spim 1
#define DT_N_S_soc_S_spi_4002f000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_spi_4002f000_P_miso_pull_up 0
#define DT_N_S_soc_S_spi_4002f000_P_miso_pull_up_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_miso_pull_down 0
#define DT_N_S_soc_S_spi_4002f000_P_miso_pull_down_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_reg {1073934336 /* 0x4002f000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_spi_4002f000_P_reg_IDX_0 1073934336
#define DT_N_S_soc_S_spi_4002f000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_spi_4002f000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_4002f000, reg, 0) \
	fn(DT_N_S_soc_S_spi_4002f000, reg, 1)
#define DT_N_S_soc_S_spi_4002f000_P_reg_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_interrupts {47 /* 0x2f */, 1 /* 0x1 */}
#define DT_N_S_soc_S_spi_4002f000_P_interrupts_IDX_0 47
#define DT_N_S_soc_S_spi_4002f000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_spi_4002f000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_4002f000, interrupts, 0) \
	fn(DT_N_S_soc_S_spi_4002f000, interrupts, 1)
#define DT_N_S_soc_S_spi_4002f000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_sck_pin 47
#define DT_N_S_soc_S_spi_4002f000_P_sck_pin_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_mosi_pin 45
#define DT_N_S_soc_S_spi_4002f000_P_mosi_pin_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_miso_pin 46
#define DT_N_S_soc_S_spi_4002f000_P_miso_pin_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_label "SPI_3"
#define DT_N_S_soc_S_spi_4002f000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_4002f000, label, 0) \
	fn(DT_N_S_soc_S_spi_4002f000, label, 1) \
	fn(DT_N_S_soc_S_spi_4002f000, label, 2) \
	fn(DT_N_S_soc_S_spi_4002f000, label, 3) \
	fn(DT_N_S_soc_S_spi_4002f000, label, 4)
#define DT_N_S_soc_S_spi_4002f000_P_label_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_cs_gpios_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_cs_gpios_IDX_0_PH DT_N_S_soc_S_gpio_50000300
#define DT_N_S_soc_S_spi_4002f000_P_cs_gpios_IDX_0_VAL_pin 12
#define DT_N_S_soc_S_spi_4002f000_P_cs_gpios_IDX_0_VAL_pin_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_cs_gpios_IDX_0_VAL_flags 1
#define DT_N_S_soc_S_spi_4002f000_P_cs_gpios_IDX_0_VAL_flags_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_cs_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_4002f000, cs_gpios, 0)
#define DT_N_S_soc_S_spi_4002f000_P_cs_gpios_LEN 1
#define DT_N_S_soc_S_spi_4002f000_P_cs_gpios_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_status "okay"
#define DT_N_S_soc_S_spi_4002f000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_spi_4002f000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_spi_4002f000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_spi_4002f000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_4002f000, status, 0) \
	fn(DT_N_S_soc_S_spi_4002f000, status, 1) \
	fn(DT_N_S_soc_S_spi_4002f000, status, 2) \
	fn(DT_N_S_soc_S_spi_4002f000, status, 3)
#define DT_N_S_soc_S_spi_4002f000_P_status_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_compatible {"nordic,nrf-spim"}
#define DT_N_S_soc_S_spi_4002f000_P_compatible_IDX_0 "nordic,nrf-spim"
#define DT_N_S_soc_S_spi_4002f000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_spi_4002f000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_4002f000, compatible, 0)
#define DT_N_S_soc_S_spi_4002f000_P_compatible_LEN 1
#define DT_N_S_soc_S_spi_4002f000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/temp@4000c000
 *
 * Node identifier: DT_N_S_soc_S_temp_4000c000
 *
 * Binding (compatible = nordic,nrf-temp):
 *   $ZEPHYR_BASE\dts\bindings\sensor\nordic,nrf-temp.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_temp_4000c000_PATH "/soc/temp@4000c000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_temp_4000c000_FULL_NAME "temp@4000c000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_temp_4000c000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_temp_4000c000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_temp_4000c000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_temp_4000c000_ORD 46

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_temp_4000c000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_temp_4000c000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_temp_4000c000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_temp DT_N_S_soc_S_temp_4000c000
#define DT_N_NODELABEL_temp         DT_N_S_soc_S_temp_4000c000

/* Special property macros: */
#define DT_N_S_soc_S_temp_4000c000_REG_NUM 1
#define DT_N_S_soc_S_temp_4000c000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_REG_IDX_0_VAL_ADDRESS 1073790976 /* 0x4000c000 */
#define DT_N_S_soc_S_temp_4000c000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_temp_4000c000_IRQ_NUM 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_irq 12
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_temp_4000c000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_COMPAT_MATCHES_nordic_nrf_temp 1
#define DT_N_S_soc_S_temp_4000c000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_temp_4000c000_P_reg {1073790976 /* 0x4000c000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_0 1073790976
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_temp_4000c000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_temp_4000c000, reg, 0) \
	fn(DT_N_S_soc_S_temp_4000c000, reg, 1)
#define DT_N_S_soc_S_temp_4000c000_P_reg_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts {12 /* 0xc */, 1 /* 0x1 */}
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_0 12
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_temp_4000c000, interrupts, 0) \
	fn(DT_N_S_soc_S_temp_4000c000, interrupts, 1)
#define DT_N_S_soc_S_temp_4000c000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_label "TEMP_0"
#define DT_N_S_soc_S_temp_4000c000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_temp_4000c000, label, 0) \
	fn(DT_N_S_soc_S_temp_4000c000, label, 1) \
	fn(DT_N_S_soc_S_temp_4000c000, label, 2) \
	fn(DT_N_S_soc_S_temp_4000c000, label, 3) \
	fn(DT_N_S_soc_S_temp_4000c000, label, 4) \
	fn(DT_N_S_soc_S_temp_4000c000, label, 5)
#define DT_N_S_soc_S_temp_4000c000_P_label_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_status "okay"
#define DT_N_S_soc_S_temp_4000c000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_temp_4000c000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_temp_4000c000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_temp_4000c000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_temp_4000c000, status, 0) \
	fn(DT_N_S_soc_S_temp_4000c000, status, 1) \
	fn(DT_N_S_soc_S_temp_4000c000, status, 2) \
	fn(DT_N_S_soc_S_temp_4000c000, status, 3)
#define DT_N_S_soc_S_temp_4000c000_P_status_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_compatible {"nordic,nrf-temp"}
#define DT_N_S_soc_S_temp_4000c000_P_compatible_IDX_0 "nordic,nrf-temp"
#define DT_N_S_soc_S_temp_4000c000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_temp_4000c000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_temp_4000c000, compatible, 0)
#define DT_N_S_soc_S_temp_4000c000_P_compatible_LEN 1
#define DT_N_S_soc_S_temp_4000c000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/timer@40008000
 *
 * Node identifier: DT_N_S_soc_S_timer_40008000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_40008000_PATH "/soc/timer@40008000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_40008000_FULL_NAME "timer@40008000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_40008000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_timer_40008000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_40008000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_40008000_ORD 47

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_40008000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_40008000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_40008000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_timer DT_N_S_soc_S_timer_40008000
#define DT_N_NODELABEL_timer0        DT_N_S_soc_S_timer_40008000

/* Special property macros: */
#define DT_N_S_soc_S_timer_40008000_REG_NUM 1
#define DT_N_S_soc_S_timer_40008000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_REG_IDX_0_VAL_ADDRESS 1073774592 /* 0x40008000 */
#define DT_N_S_soc_S_timer_40008000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_40008000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_irq 8
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_40008000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_40008000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_timer_40008000_P_reg {1073774592 /* 0x40008000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_0 1073774592
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_40008000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40008000, reg, 0) \
	fn(DT_N_S_soc_S_timer_40008000, reg, 1)
#define DT_N_S_soc_S_timer_40008000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_cc_num 4
#define DT_N_S_soc_S_timer_40008000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts {8 /* 0x8 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_0 8
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40008000, interrupts, 0) \
	fn(DT_N_S_soc_S_timer_40008000, interrupts, 1)
#define DT_N_S_soc_S_timer_40008000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_label "TIMER_0"
#define DT_N_S_soc_S_timer_40008000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40008000, label, 0) \
	fn(DT_N_S_soc_S_timer_40008000, label, 1) \
	fn(DT_N_S_soc_S_timer_40008000, label, 2) \
	fn(DT_N_S_soc_S_timer_40008000, label, 3) \
	fn(DT_N_S_soc_S_timer_40008000, label, 4) \
	fn(DT_N_S_soc_S_timer_40008000, label, 5) \
	fn(DT_N_S_soc_S_timer_40008000, label, 6)
#define DT_N_S_soc_S_timer_40008000_P_label_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_prescaler 0
#define DT_N_S_soc_S_timer_40008000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_status "okay"
#define DT_N_S_soc_S_timer_40008000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_timer_40008000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_timer_40008000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_40008000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40008000, status, 0) \
	fn(DT_N_S_soc_S_timer_40008000, status, 1) \
	fn(DT_N_S_soc_S_timer_40008000, status, 2) \
	fn(DT_N_S_soc_S_timer_40008000, status, 3)
#define DT_N_S_soc_S_timer_40008000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_40008000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_40008000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40008000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40008000, compatible, 0)
#define DT_N_S_soc_S_timer_40008000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_40008000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/timer@40009000
 *
 * Node identifier: DT_N_S_soc_S_timer_40009000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_40009000_PATH "/soc/timer@40009000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_40009000_FULL_NAME "timer@40009000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_40009000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_timer_40009000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_40009000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_40009000_ORD 48

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_40009000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_40009000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_40009000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_timer DT_N_S_soc_S_timer_40009000
#define DT_N_NODELABEL_timer1        DT_N_S_soc_S_timer_40009000

/* Special property macros: */
#define DT_N_S_soc_S_timer_40009000_REG_NUM 1
#define DT_N_S_soc_S_timer_40009000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_REG_IDX_0_VAL_ADDRESS 1073778688 /* 0x40009000 */
#define DT_N_S_soc_S_timer_40009000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_40009000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_irq 9
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_40009000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_40009000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_timer_40009000_P_reg {1073778688 /* 0x40009000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_0 1073778688
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_40009000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40009000, reg, 0) \
	fn(DT_N_S_soc_S_timer_40009000, reg, 1)
#define DT_N_S_soc_S_timer_40009000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_cc_num 4
#define DT_N_S_soc_S_timer_40009000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts {9 /* 0x9 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_0 9
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40009000, interrupts, 0) \
	fn(DT_N_S_soc_S_timer_40009000, interrupts, 1)
#define DT_N_S_soc_S_timer_40009000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_label "TIMER_1"
#define DT_N_S_soc_S_timer_40009000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40009000, label, 0) \
	fn(DT_N_S_soc_S_timer_40009000, label, 1) \
	fn(DT_N_S_soc_S_timer_40009000, label, 2) \
	fn(DT_N_S_soc_S_timer_40009000, label, 3) \
	fn(DT_N_S_soc_S_timer_40009000, label, 4) \
	fn(DT_N_S_soc_S_timer_40009000, label, 5) \
	fn(DT_N_S_soc_S_timer_40009000, label, 6)
#define DT_N_S_soc_S_timer_40009000_P_label_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_prescaler 0
#define DT_N_S_soc_S_timer_40009000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_status "okay"
#define DT_N_S_soc_S_timer_40009000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_timer_40009000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_timer_40009000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_40009000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40009000, status, 0) \
	fn(DT_N_S_soc_S_timer_40009000, status, 1) \
	fn(DT_N_S_soc_S_timer_40009000, status, 2) \
	fn(DT_N_S_soc_S_timer_40009000, status, 3)
#define DT_N_S_soc_S_timer_40009000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_40009000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_40009000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_40009000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_40009000, compatible, 0)
#define DT_N_S_soc_S_timer_40009000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_40009000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/timer@4001a000
 *
 * Node identifier: DT_N_S_soc_S_timer_4001a000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_4001a000_PATH "/soc/timer@4001a000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_4001a000_FULL_NAME "timer@4001a000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_4001a000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_timer_4001a000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_4001a000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_4001a000_ORD 49

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_4001a000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_4001a000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_4001a000_EXISTS 1
#define DT_N_INST_3_nordic_nrf_timer DT_N_S_soc_S_timer_4001a000
#define DT_N_NODELABEL_timer3        DT_N_S_soc_S_timer_4001a000

/* Special property macros: */
#define DT_N_S_soc_S_timer_4001a000_REG_NUM 1
#define DT_N_S_soc_S_timer_4001a000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_REG_IDX_0_VAL_ADDRESS 1073848320 /* 0x4001a000 */
#define DT_N_S_soc_S_timer_4001a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_4001a000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_4001a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_IRQ_IDX_0_VAL_irq 26
#define DT_N_S_soc_S_timer_4001a000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_4001a000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_4001a000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_timer_4001a000_P_reg {1073848320 /* 0x4001a000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_4001a000_P_reg_IDX_0 1073848320
#define DT_N_S_soc_S_timer_4001a000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_4001a000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4001a000, reg, 0) \
	fn(DT_N_S_soc_S_timer_4001a000, reg, 1)
#define DT_N_S_soc_S_timer_4001a000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_cc_num 6
#define DT_N_S_soc_S_timer_4001a000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_interrupts {26 /* 0x1a */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_4001a000_P_interrupts_IDX_0 26
#define DT_N_S_soc_S_timer_4001a000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_4001a000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4001a000, interrupts, 0) \
	fn(DT_N_S_soc_S_timer_4001a000, interrupts, 1)
#define DT_N_S_soc_S_timer_4001a000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_label "TIMER_3"
#define DT_N_S_soc_S_timer_4001a000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4001a000, label, 0) \
	fn(DT_N_S_soc_S_timer_4001a000, label, 1) \
	fn(DT_N_S_soc_S_timer_4001a000, label, 2) \
	fn(DT_N_S_soc_S_timer_4001a000, label, 3) \
	fn(DT_N_S_soc_S_timer_4001a000, label, 4) \
	fn(DT_N_S_soc_S_timer_4001a000, label, 5) \
	fn(DT_N_S_soc_S_timer_4001a000, label, 6)
#define DT_N_S_soc_S_timer_4001a000_P_label_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_prescaler 0
#define DT_N_S_soc_S_timer_4001a000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_status "okay"
#define DT_N_S_soc_S_timer_4001a000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_timer_4001a000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_timer_4001a000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_4001a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4001a000, status, 0) \
	fn(DT_N_S_soc_S_timer_4001a000, status, 1) \
	fn(DT_N_S_soc_S_timer_4001a000, status, 2) \
	fn(DT_N_S_soc_S_timer_4001a000, status, 3)
#define DT_N_S_soc_S_timer_4001a000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_4001a000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_4001a000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4001a000, compatible, 0)
#define DT_N_S_soc_S_timer_4001a000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_4001a000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/timer@4001b000
 *
 * Node identifier: DT_N_S_soc_S_timer_4001b000
 *
 * Binding (compatible = nordic,nrf-timer):
 *   $ZEPHYR_BASE\dts\bindings\timer\nordic,nrf-timer.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_4001b000_PATH "/soc/timer@4001b000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_4001b000_FULL_NAME "timer@4001b000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_4001b000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_timer_4001b000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_4001b000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_4001b000_ORD 50

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_4001b000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_4001b000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_4001b000_EXISTS 1
#define DT_N_INST_4_nordic_nrf_timer DT_N_S_soc_S_timer_4001b000
#define DT_N_NODELABEL_timer4        DT_N_S_soc_S_timer_4001b000

/* Special property macros: */
#define DT_N_S_soc_S_timer_4001b000_REG_NUM 1
#define DT_N_S_soc_S_timer_4001b000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_REG_IDX_0_VAL_ADDRESS 1073852416 /* 0x4001b000 */
#define DT_N_S_soc_S_timer_4001b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_timer_4001b000_IRQ_NUM 1
#define DT_N_S_soc_S_timer_4001b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_IRQ_IDX_0_VAL_irq 27
#define DT_N_S_soc_S_timer_4001b000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_timer_4001b000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_COMPAT_MATCHES_nordic_nrf_timer 1
#define DT_N_S_soc_S_timer_4001b000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_timer_4001b000_P_reg {1073852416 /* 0x4001b000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_timer_4001b000_P_reg_IDX_0 1073852416
#define DT_N_S_soc_S_timer_4001b000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_timer_4001b000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4001b000, reg, 0) \
	fn(DT_N_S_soc_S_timer_4001b000, reg, 1)
#define DT_N_S_soc_S_timer_4001b000_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_cc_num 6
#define DT_N_S_soc_S_timer_4001b000_P_cc_num_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_interrupts {27 /* 0x1b */, 1 /* 0x1 */}
#define DT_N_S_soc_S_timer_4001b000_P_interrupts_IDX_0 27
#define DT_N_S_soc_S_timer_4001b000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_timer_4001b000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4001b000, interrupts, 0) \
	fn(DT_N_S_soc_S_timer_4001b000, interrupts, 1)
#define DT_N_S_soc_S_timer_4001b000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_label "TIMER_4"
#define DT_N_S_soc_S_timer_4001b000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4001b000, label, 0) \
	fn(DT_N_S_soc_S_timer_4001b000, label, 1) \
	fn(DT_N_S_soc_S_timer_4001b000, label, 2) \
	fn(DT_N_S_soc_S_timer_4001b000, label, 3) \
	fn(DT_N_S_soc_S_timer_4001b000, label, 4) \
	fn(DT_N_S_soc_S_timer_4001b000, label, 5) \
	fn(DT_N_S_soc_S_timer_4001b000, label, 6)
#define DT_N_S_soc_S_timer_4001b000_P_label_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_prescaler 0
#define DT_N_S_soc_S_timer_4001b000_P_prescaler_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_status "okay"
#define DT_N_S_soc_S_timer_4001b000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_timer_4001b000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_timer_4001b000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_timer_4001b000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4001b000, status, 0) \
	fn(DT_N_S_soc_S_timer_4001b000, status, 1) \
	fn(DT_N_S_soc_S_timer_4001b000, status, 2) \
	fn(DT_N_S_soc_S_timer_4001b000, status, 3)
#define DT_N_S_soc_S_timer_4001b000_P_status_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_compatible {"nordic,nrf-timer"}
#define DT_N_S_soc_S_timer_4001b000_P_compatible_IDX_0 "nordic,nrf-timer"
#define DT_N_S_soc_S_timer_4001b000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_4001b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_4001b000, compatible, 0)
#define DT_N_S_soc_S_timer_4001b000_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_4001b000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/timer@e000e010
 *
 * Node identifier: DT_N_S_soc_S_timer_e000e010
 */

/* Node's full path: */
#define DT_N_S_soc_S_timer_e000e010_PATH "/soc/timer@e000e010"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_timer_e000e010_FULL_NAME "timer@e000e010"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_timer_e000e010_PARENT DT_N_S_soc
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_timer_e000e010_ORD 51

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_timer_e000e010_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_timer_e000e010_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_timer_e000e010_EXISTS 1
#define DT_N_INST_0_arm_armv7m_systick DT_N_S_soc_S_timer_e000e010
#define DT_N_NODELABEL_systick         DT_N_S_soc_S_timer_e000e010

/* Special property macros: */
#define DT_N_S_soc_S_timer_e000e010_REG_NUM 1
#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_ADDRESS 3758153744 /* 0xe000e010 */
#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_SIZE 16 /* 0x10 */
#define DT_N_S_soc_S_timer_e000e010_IRQ_NUM 0
#define DT_N_S_soc_S_timer_e000e010_COMPAT_MATCHES_arm_armv7m_systick 1
#define DT_N_S_soc_S_timer_e000e010_STATUS_disabled 1

/* Generic property macros: */
#define DT_N_S_soc_S_timer_e000e010_P_compatible {"arm,armv7m-systick"}
#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0 "arm,armv7m-systick"
#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0)
#define DT_N_S_soc_S_timer_e000e010_P_compatible_LEN 1
#define DT_N_S_soc_S_timer_e000e010_P_compatible_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_reg {3758153744 /* 0xe000e010 */, 16 /* 0x10 */}
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0 3758153744
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1 16
#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, reg, 0) \
	fn(DT_N_S_soc_S_timer_e000e010, reg, 1)
#define DT_N_S_soc_S_timer_e000e010_P_reg_EXISTS 1
#define DT_N_S_soc_S_timer_e000e010_P_status "disabled"
#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_IDX 2
#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_TOKEN disabled
#define DT_N_S_soc_S_timer_e000e010_P_status_ENUM_UPPER_TOKEN DISABLED
#define DT_N_S_soc_S_timer_e000e010_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, status, 0) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 1) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 2) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 3) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 4) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 5) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 6) \
	fn(DT_N_S_soc_S_timer_e000e010, status, 7)
#define DT_N_S_soc_S_timer_e000e010_P_status_EXISTS 1

/*
 * Devicetree node: /soc/uart@40002000
 *
 * Node identifier: DT_N_S_soc_S_uart_40002000
 *
 * Binding (compatible = nordic,nrf-uarte):
 *   $ZEPHYR_BASE\dts\bindings\serial\nordic,nrf-uarte.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_uart_40002000_PATH "/soc/uart@40002000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_uart_40002000_FULL_NAME "uart@40002000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_uart_40002000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_uart_40002000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_uart_40002000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_uart_40002000_ORD 52

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_uart_40002000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_uart_40002000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_uart_40002000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_uarte DT_N_S_soc_S_uart_40002000
#define DT_N_NODELABEL_uart0         DT_N_S_soc_S_uart_40002000

/* Special property macros: */
#define DT_N_S_soc_S_uart_40002000_REG_NUM 1
#define DT_N_S_soc_S_uart_40002000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_REG_IDX_0_VAL_ADDRESS 1073750016 /* 0x40002000 */
#define DT_N_S_soc_S_uart_40002000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_uart_40002000_IRQ_NUM 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_irq 2
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_uart_40002000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_COMPAT_MATCHES_nordic_nrf_uarte 1
#define DT_N_S_soc_S_uart_40002000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_uart_40002000_P_reg {1073750016 /* 0x40002000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_0 1073750016
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_uart_40002000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40002000, reg, 0) \
	fn(DT_N_S_soc_S_uart_40002000, reg, 1)
#define DT_N_S_soc_S_uart_40002000_P_reg_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts {2 /* 0x2 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_0 2
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40002000, interrupts, 0) \
	fn(DT_N_S_soc_S_uart_40002000, interrupts, 1)
#define DT_N_S_soc_S_uart_40002000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_tx_pin 6
#define DT_N_S_soc_S_uart_40002000_P_tx_pin_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_rx_pin 8
#define DT_N_S_soc_S_uart_40002000_P_rx_pin_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_rts_pin 5
#define DT_N_S_soc_S_uart_40002000_P_rts_pin_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_cts_pin 7
#define DT_N_S_soc_S_uart_40002000_P_cts_pin_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_current_speed 115200
#define DT_N_S_soc_S_uart_40002000_P_current_speed_ENUM_IDX 12
#define DT_N_S_soc_S_uart_40002000_P_current_speed_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_label "UART_0"
#define DT_N_S_soc_S_uart_40002000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40002000, label, 0) \
	fn(DT_N_S_soc_S_uart_40002000, label, 1) \
	fn(DT_N_S_soc_S_uart_40002000, label, 2) \
	fn(DT_N_S_soc_S_uart_40002000, label, 3) \
	fn(DT_N_S_soc_S_uart_40002000, label, 4) \
	fn(DT_N_S_soc_S_uart_40002000, label, 5)
#define DT_N_S_soc_S_uart_40002000_P_label_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_hw_flow_control 0
#define DT_N_S_soc_S_uart_40002000_P_hw_flow_control_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_status "okay"
#define DT_N_S_soc_S_uart_40002000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_uart_40002000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_uart_40002000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_uart_40002000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40002000, status, 0) \
	fn(DT_N_S_soc_S_uart_40002000, status, 1) \
	fn(DT_N_S_soc_S_uart_40002000, status, 2) \
	fn(DT_N_S_soc_S_uart_40002000, status, 3)
#define DT_N_S_soc_S_uart_40002000_P_status_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_compatible {"nordic,nrf-uarte"}
#define DT_N_S_soc_S_uart_40002000_P_compatible_IDX_0 "nordic,nrf-uarte"
#define DT_N_S_soc_S_uart_40002000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40002000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40002000, compatible, 0)
#define DT_N_S_soc_S_uart_40002000_P_compatible_LEN 1
#define DT_N_S_soc_S_uart_40002000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/uart@40028000
 *
 * Node identifier: DT_N_S_soc_S_uart_40028000
 *
 * Binding (compatible = nordic,nrf-uarte):
 *   $ZEPHYR_BASE\dts\bindings\serial\nordic,nrf-uarte.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_uart_40028000_PATH "/soc/uart@40028000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_uart_40028000_FULL_NAME "uart@40028000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_uart_40028000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_uart_40028000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_uart_40028000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_uart_40028000_ORD 53

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_uart_40028000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_uart_40028000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_uart_40028000_EXISTS 1
#define DT_N_INST_1_nordic_nrf_uarte  DT_N_S_soc_S_uart_40028000
#define DT_N_NODELABEL_uart1          DT_N_S_soc_S_uart_40028000
#define DT_N_NODELABEL_arduino_serial DT_N_S_soc_S_uart_40028000

/* Special property macros: */
#define DT_N_S_soc_S_uart_40028000_REG_NUM 1
#define DT_N_S_soc_S_uart_40028000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_REG_IDX_0_VAL_ADDRESS 1073905664 /* 0x40028000 */
#define DT_N_S_soc_S_uart_40028000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_uart_40028000_IRQ_NUM 1
#define DT_N_S_soc_S_uart_40028000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_IRQ_IDX_0_VAL_irq 40
#define DT_N_S_soc_S_uart_40028000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_uart_40028000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_COMPAT_MATCHES_nordic_nrf_uarte 1
#define DT_N_S_soc_S_uart_40028000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_uart_40028000_P_reg {1073905664 /* 0x40028000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_uart_40028000_P_reg_IDX_0 1073905664
#define DT_N_S_soc_S_uart_40028000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_uart_40028000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40028000, reg, 0) \
	fn(DT_N_S_soc_S_uart_40028000, reg, 1)
#define DT_N_S_soc_S_uart_40028000_P_reg_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_P_interrupts {40 /* 0x28 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_uart_40028000_P_interrupts_IDX_0 40
#define DT_N_S_soc_S_uart_40028000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_uart_40028000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40028000, interrupts, 0) \
	fn(DT_N_S_soc_S_uart_40028000, interrupts, 1)
#define DT_N_S_soc_S_uart_40028000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_P_tx_pin 34
#define DT_N_S_soc_S_uart_40028000_P_tx_pin_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_P_rx_pin 33
#define DT_N_S_soc_S_uart_40028000_P_rx_pin_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_P_current_speed 115200
#define DT_N_S_soc_S_uart_40028000_P_current_speed_ENUM_IDX 12
#define DT_N_S_soc_S_uart_40028000_P_current_speed_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_P_label "UART_1"
#define DT_N_S_soc_S_uart_40028000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40028000, label, 0) \
	fn(DT_N_S_soc_S_uart_40028000, label, 1) \
	fn(DT_N_S_soc_S_uart_40028000, label, 2) \
	fn(DT_N_S_soc_S_uart_40028000, label, 3) \
	fn(DT_N_S_soc_S_uart_40028000, label, 4) \
	fn(DT_N_S_soc_S_uart_40028000, label, 5)
#define DT_N_S_soc_S_uart_40028000_P_label_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_P_hw_flow_control 0
#define DT_N_S_soc_S_uart_40028000_P_hw_flow_control_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_P_status "okay"
#define DT_N_S_soc_S_uart_40028000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_uart_40028000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_uart_40028000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_uart_40028000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40028000, status, 0) \
	fn(DT_N_S_soc_S_uart_40028000, status, 1) \
	fn(DT_N_S_soc_S_uart_40028000, status, 2) \
	fn(DT_N_S_soc_S_uart_40028000, status, 3)
#define DT_N_S_soc_S_uart_40028000_P_status_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_P_compatible {"nordic,nrf-uarte"}
#define DT_N_S_soc_S_uart_40028000_P_compatible_IDX_0 "nordic,nrf-uarte"
#define DT_N_S_soc_S_uart_40028000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uart_40028000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uart_40028000, compatible, 0)
#define DT_N_S_soc_S_uart_40028000_P_compatible_LEN 1
#define DT_N_S_soc_S_uart_40028000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/uicr@10001000
 *
 * Node identifier: DT_N_S_soc_S_uicr_10001000
 *
 * Binding (compatible = nordic,nrf-uicr):
 *   $ZEPHYR_BASE\dts\bindings\arm\nordic,nrf-uicr.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_uicr_10001000_PATH "/soc/uicr@10001000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_uicr_10001000_FULL_NAME "uicr@10001000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_uicr_10001000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_uicr_10001000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_uicr_10001000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_uicr_10001000_ORD 54

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_uicr_10001000_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_uicr_10001000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_uicr_10001000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_uicr DT_N_S_soc_S_uicr_10001000
#define DT_N_NODELABEL_uicr         DT_N_S_soc_S_uicr_10001000

/* Special property macros: */
#define DT_N_S_soc_S_uicr_10001000_REG_NUM 1
#define DT_N_S_soc_S_uicr_10001000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_REG_IDX_0_VAL_ADDRESS 268439552 /* 0x10001000 */
#define DT_N_S_soc_S_uicr_10001000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_uicr_10001000_IRQ_NUM 0
#define DT_N_S_soc_S_uicr_10001000_COMPAT_MATCHES_nordic_nrf_uicr 1
#define DT_N_S_soc_S_uicr_10001000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_uicr_10001000_P_reg {268439552 /* 0x10001000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_uicr_10001000_P_reg_IDX_0 268439552
#define DT_N_S_soc_S_uicr_10001000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_uicr_10001000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uicr_10001000, reg, 0) \
	fn(DT_N_S_soc_S_uicr_10001000, reg, 1)
#define DT_N_S_soc_S_uicr_10001000_P_reg_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_status "okay"
#define DT_N_S_soc_S_uicr_10001000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_uicr_10001000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_uicr_10001000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_uicr_10001000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uicr_10001000, status, 0) \
	fn(DT_N_S_soc_S_uicr_10001000, status, 1) \
	fn(DT_N_S_soc_S_uicr_10001000, status, 2) \
	fn(DT_N_S_soc_S_uicr_10001000, status, 3)
#define DT_N_S_soc_S_uicr_10001000_P_status_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_compatible {"nordic,nrf-uicr"}
#define DT_N_S_soc_S_uicr_10001000_P_compatible_IDX_0 "nordic,nrf-uicr"
#define DT_N_S_soc_S_uicr_10001000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_uicr_10001000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_uicr_10001000, compatible, 0)
#define DT_N_S_soc_S_uicr_10001000_P_compatible_LEN 1
#define DT_N_S_soc_S_uicr_10001000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/usbd@40027000
 *
 * Node identifier: DT_N_S_soc_S_usbd_40027000
 *
 * Binding (compatible = nordic,nrf-usbd):
 *   $ZEPHYR_BASE\dts\bindings\usb\nordic,nrf-usbd.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_usbd_40027000_PATH "/soc/usbd@40027000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_usbd_40027000_FULL_NAME "usbd@40027000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_usbd_40027000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_usbd_40027000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_usbd_40027000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_usbd_40027000_ORD 55

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_usbd_40027000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_usbd_40027000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_usbd_40027000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_usbd DT_N_S_soc_S_usbd_40027000
#define DT_N_NODELABEL_usbd         DT_N_S_soc_S_usbd_40027000

/* Special property macros: */
#define DT_N_S_soc_S_usbd_40027000_REG_NUM 1
#define DT_N_S_soc_S_usbd_40027000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_REG_IDX_0_VAL_ADDRESS 1073901568 /* 0x40027000 */
#define DT_N_S_soc_S_usbd_40027000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_usbd_40027000_IRQ_NUM 1
#define DT_N_S_soc_S_usbd_40027000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_IRQ_IDX_0_VAL_irq 39
#define DT_N_S_soc_S_usbd_40027000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_usbd_40027000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_COMPAT_MATCHES_nordic_nrf_usbd 1
#define DT_N_S_soc_S_usbd_40027000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_usbd_40027000_P_reg {1073901568 /* 0x40027000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_usbd_40027000_P_reg_IDX_0 1073901568
#define DT_N_S_soc_S_usbd_40027000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_usbd_40027000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usbd_40027000, reg, 0) \
	fn(DT_N_S_soc_S_usbd_40027000, reg, 1)
#define DT_N_S_soc_S_usbd_40027000_P_reg_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_P_interrupts {39 /* 0x27 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_usbd_40027000_P_interrupts_IDX_0 39
#define DT_N_S_soc_S_usbd_40027000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_usbd_40027000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usbd_40027000, interrupts, 0) \
	fn(DT_N_S_soc_S_usbd_40027000, interrupts, 1)
#define DT_N_S_soc_S_usbd_40027000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_P_num_isoin_endpoints 1
#define DT_N_S_soc_S_usbd_40027000_P_num_isoin_endpoints_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_P_num_isoout_endpoints 1
#define DT_N_S_soc_S_usbd_40027000_P_num_isoout_endpoints_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_P_num_bidir_endpoints 1
#define DT_N_S_soc_S_usbd_40027000_P_num_bidir_endpoints_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_P_num_in_endpoints 7
#define DT_N_S_soc_S_usbd_40027000_P_num_in_endpoints_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_P_num_out_endpoints 7
#define DT_N_S_soc_S_usbd_40027000_P_num_out_endpoints_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_P_label "USBD"
#define DT_N_S_soc_S_usbd_40027000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usbd_40027000, label, 0) \
	fn(DT_N_S_soc_S_usbd_40027000, label, 1) \
	fn(DT_N_S_soc_S_usbd_40027000, label, 2) \
	fn(DT_N_S_soc_S_usbd_40027000, label, 3)
#define DT_N_S_soc_S_usbd_40027000_P_label_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_P_status "okay"
#define DT_N_S_soc_S_usbd_40027000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_usbd_40027000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_usbd_40027000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_usbd_40027000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usbd_40027000, status, 0) \
	fn(DT_N_S_soc_S_usbd_40027000, status, 1) \
	fn(DT_N_S_soc_S_usbd_40027000, status, 2) \
	fn(DT_N_S_soc_S_usbd_40027000, status, 3)
#define DT_N_S_soc_S_usbd_40027000_P_status_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_P_compatible {"nordic,nrf-usbd"}
#define DT_N_S_soc_S_usbd_40027000_P_compatible_IDX_0 "nordic,nrf-usbd"
#define DT_N_S_soc_S_usbd_40027000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_usbd_40027000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usbd_40027000, compatible, 0)
#define DT_N_S_soc_S_usbd_40027000_P_compatible_LEN 1
#define DT_N_S_soc_S_usbd_40027000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/watchdog@40010000
 *
 * Node identifier: DT_N_S_soc_S_watchdog_40010000
 *
 * Binding (compatible = nordic,nrf-watchdog):
 *   $ZEPHYR_BASE\dts\bindings\watchdog\nordic,nrf-watchdog.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_watchdog_40010000_PATH "/soc/watchdog@40010000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_watchdog_40010000_FULL_NAME "watchdog@40010000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_watchdog_40010000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_watchdog_40010000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_watchdog_40010000_ORD 56

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_watchdog_40010000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_watchdog_40010000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_watchdog_40010000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_watchdog DT_N_S_soc_S_watchdog_40010000
#define DT_N_NODELABEL_wdt              DT_N_S_soc_S_watchdog_40010000
#define DT_N_NODELABEL_wdt0             DT_N_S_soc_S_watchdog_40010000

/* Special property macros: */
#define DT_N_S_soc_S_watchdog_40010000_REG_NUM 1
#define DT_N_S_soc_S_watchdog_40010000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_REG_IDX_0_VAL_ADDRESS 1073807360 /* 0x40010000 */
#define DT_N_S_soc_S_watchdog_40010000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_watchdog_40010000_IRQ_NUM 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_irq 16
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_watchdog_40010000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_COMPAT_MATCHES_nordic_nrf_watchdog 1
#define DT_N_S_soc_S_watchdog_40010000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_watchdog_40010000_P_reg {1073807360 /* 0x40010000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_0 1073807360
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_watchdog_40010000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40010000, reg, 0) \
	fn(DT_N_S_soc_S_watchdog_40010000, reg, 1)
#define DT_N_S_soc_S_watchdog_40010000_P_reg_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_label "WDT"
#define DT_N_S_soc_S_watchdog_40010000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40010000, label, 0) \
	fn(DT_N_S_soc_S_watchdog_40010000, label, 1) \
	fn(DT_N_S_soc_S_watchdog_40010000, label, 2)
#define DT_N_S_soc_S_watchdog_40010000_P_label_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts {16 /* 0x10 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_0 16
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40010000, interrupts, 0) \
	fn(DT_N_S_soc_S_watchdog_40010000, interrupts, 1)
#define DT_N_S_soc_S_watchdog_40010000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_status "okay"
#define DT_N_S_soc_S_watchdog_40010000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_watchdog_40010000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_watchdog_40010000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_watchdog_40010000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40010000, status, 0) \
	fn(DT_N_S_soc_S_watchdog_40010000, status, 1) \
	fn(DT_N_S_soc_S_watchdog_40010000, status, 2) \
	fn(DT_N_S_soc_S_watchdog_40010000, status, 3)
#define DT_N_S_soc_S_watchdog_40010000_P_status_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_compatible {"nordic,nrf-watchdog"}
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_IDX_0 "nordic,nrf-watchdog"
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_40010000, compatible, 0)
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_LEN 1
#define DT_N_S_soc_S_watchdog_40010000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/crypto@5002a000
 *
 * Node identifier: DT_N_S_soc_S_crypto_5002a000
 *
 * Binding (compatible = nordic,nrf-cc310):
 *   $ZEPHYR_BASE\dts\bindings\crypto\nordic,nrf-cc310.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_crypto_5002a000_PATH "/soc/crypto@5002a000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_crypto_5002a000_FULL_NAME "crypto@5002a000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_crypto_5002a000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_crypto_5002a000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000)
#define DT_N_S_soc_S_crypto_5002a000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_crypto_5002a000_ORD 57

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_crypto_5002a000_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_crypto_5002a000_SUPPORTS_ORDS \
	58, /* /soc/crypto@5002a000/crypto@5002b000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_crypto_5002a000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_cc310 DT_N_S_soc_S_crypto_5002a000
#define DT_N_NODELABEL_cryptocell    DT_N_S_soc_S_crypto_5002a000

/* Special property macros: */
#define DT_N_S_soc_S_crypto_5002a000_REG_NUM 1
#define DT_N_S_soc_S_crypto_5002a000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_REG_IDX_0_VAL_ADDRESS 1342349312 /* 0x5002a000 */
#define DT_N_S_soc_S_crypto_5002a000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_crypto_5002a000_IRQ_NUM 0
#define DT_N_S_soc_S_crypto_5002a000_COMPAT_MATCHES_nordic_nrf_cc310 1
#define DT_N_S_soc_S_crypto_5002a000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_crypto_5002a000_P_reg {1342349312 /* 0x5002a000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_crypto_5002a000_P_reg_IDX_0 1342349312
#define DT_N_S_soc_S_crypto_5002a000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_crypto_5002a000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crypto_5002a000, reg, 0) \
	fn(DT_N_S_soc_S_crypto_5002a000, reg, 1)
#define DT_N_S_soc_S_crypto_5002a000_P_reg_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_P_label "CRYPTOCELL"
#define DT_N_S_soc_S_crypto_5002a000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crypto_5002a000, label, 0) \
	fn(DT_N_S_soc_S_crypto_5002a000, label, 1) \
	fn(DT_N_S_soc_S_crypto_5002a000, label, 2) \
	fn(DT_N_S_soc_S_crypto_5002a000, label, 3) \
	fn(DT_N_S_soc_S_crypto_5002a000, label, 4) \
	fn(DT_N_S_soc_S_crypto_5002a000, label, 5) \
	fn(DT_N_S_soc_S_crypto_5002a000, label, 6) \
	fn(DT_N_S_soc_S_crypto_5002a000, label, 7) \
	fn(DT_N_S_soc_S_crypto_5002a000, label, 8) \
	fn(DT_N_S_soc_S_crypto_5002a000, label, 9)
#define DT_N_S_soc_S_crypto_5002a000_P_label_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_P_status "okay"
#define DT_N_S_soc_S_crypto_5002a000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_crypto_5002a000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_crypto_5002a000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_crypto_5002a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crypto_5002a000, status, 0) \
	fn(DT_N_S_soc_S_crypto_5002a000, status, 1) \
	fn(DT_N_S_soc_S_crypto_5002a000, status, 2) \
	fn(DT_N_S_soc_S_crypto_5002a000, status, 3)
#define DT_N_S_soc_S_crypto_5002a000_P_status_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_P_compatible {"nordic,nrf-cc310"}
#define DT_N_S_soc_S_crypto_5002a000_P_compatible_IDX_0 "nordic,nrf-cc310"
#define DT_N_S_soc_S_crypto_5002a000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crypto_5002a000, compatible, 0)
#define DT_N_S_soc_S_crypto_5002a000_P_compatible_LEN 1
#define DT_N_S_soc_S_crypto_5002a000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/crypto@5002a000/crypto@5002b000
 *
 * Node identifier: DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000
 *
 * Binding (compatible = arm,cryptocell-310):
 *   $ZEPHYR_BASE\dts\bindings\crypto\arm,cryptocell-310.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_PATH "/soc/crypto@5002a000/crypto@5002b000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_FULL_NAME "crypto@5002b000"

/* Node parent (/soc/crypto@5002a000) identifier: */
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_PARENT DT_N_S_soc_S_crypto_5002a000
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_ORD 58

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_REQUIRES_ORDS \
	6, /* /soc/interrupt-controller@e000e100 */ \
	57, /* /soc/crypto@5002a000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_EXISTS 1
#define DT_N_INST_0_arm_cryptocell_310 DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000
#define DT_N_NODELABEL_cryptocell310   DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000

/* Special property macros: */
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_REG_NUM 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_REG_IDX_0_VAL_ADDRESS 1342353408 /* 0x5002b000 */
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_IRQ_NUM 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_IRQ_IDX_0_VAL_irq 42
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_COMPAT_MATCHES_arm_cryptocell_310 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_reg {1342353408 /* 0x5002b000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_reg_IDX_0 1342353408
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, reg, 0) \
	fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, reg, 1)
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_reg_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_label "CRYPTOCELL310"
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, label, 0) \
	fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, label, 1) \
	fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, label, 2) \
	fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, label, 3) \
	fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, label, 4) \
	fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, label, 5) \
	fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, label, 6) \
	fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, label, 7) \
	fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, label, 8) \
	fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, label, 9) \
	fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, label, 10) \
	fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, label, 11) \
	fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, label, 12)
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_label_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_interrupts {42 /* 0x2a */, 1 /* 0x1 */}
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_interrupts_IDX_0 42
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, interrupts, 0) \
	fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, interrupts, 1)
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_compatible {"arm,cryptocell-310"}
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_compatible_IDX_0 "arm,cryptocell-310"
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000, compatible, 0)
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_compatible_LEN 1
#define DT_N_S_soc_S_crypto_5002a000_S_crypto_5002b000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000
 *
 * Binding (compatible = nordic,nrf52-flash-controller):
 *   $ZEPHYR_BASE\dts\bindings\flash_controller\nordic,nrf52-flash-controller.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_PATH "/soc/flash-controller@4001e000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_FULL_NAME "flash-controller@4001e000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0)
#define DT_N_S_soc_S_flash_controller_4001e000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_ORD 59

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_REQUIRES_ORDS \
	5, /* /soc */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_SUPPORTS_ORDS \
	60, /* /soc/flash-controller@4001e000/flash@0 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_EXISTS 1
#define DT_N_INST_0_nordic_nrf52_flash_controller DT_N_S_soc_S_flash_controller_4001e000
#define DT_N_NODELABEL_flash_controller           DT_N_S_soc_S_flash_controller_4001e000

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_REG_IDX_0_VAL_ADDRESS 1073864704 /* 0x4001e000 */
#define DT_N_S_soc_S_flash_controller_4001e000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_flash_controller_4001e000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_COMPAT_MATCHES_nordic_nrf52_flash_controller 1
#define DT_N_S_soc_S_flash_controller_4001e000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_P_label "NRF_FLASH_DRV_NAME"
#define DT_N_S_soc_S_flash_controller_4001e000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000, label, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 1) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 2) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 3) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 4) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 5) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 6) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 7) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 8) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 9) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 10) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 11) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 12) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 13) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 14) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 15) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 16) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, label, 17)
#define DT_N_S_soc_S_flash_controller_4001e000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg {1073864704 /* 0x4001e000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_0 1073864704
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000, reg, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000, reg, 1)
#define DT_N_S_soc_S_flash_controller_4001e000_P_reg_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible {"nordic,nrf52-flash-controller"}
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_IDX_0 "nordic,nrf52-flash-controller"
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000, compatible, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_LEN 1
#define DT_N_S_soc_S_flash_controller_4001e000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0
 *
 * Binding (compatible = soc-nv-flash):
 *   $ZEPHYR_BASE\dts\bindings\mtd\soc-nv-flash.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_PATH "/soc/flash-controller@4001e000/flash@0"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FULL_NAME "flash@0"

/* Node parent (/soc/flash-controller@4001e000) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_PARENT DT_N_S_soc_S_flash_controller_4001e000
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_ORD 60

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REQUIRES_ORDS \
	59, /* /soc/flash-controller@4001e000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_SUPPORTS_ORDS \
	61, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_EXISTS 1
#define DT_N_INST_0_soc_nv_flash DT_N_S_soc_S_flash_controller_4001e000_S_flash_0
#define DT_N_NODELABEL_flash0    DT_N_S_soc_S_flash_controller_4001e000_S_flash_0

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_REG_IDX_0_VAL_SIZE 1048576 /* 0x100000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_COMPAT_MATCHES_soc_nv_flash 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_label "NRF_FLASH"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 1) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 2) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 3) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 4) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 5) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 6) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 7) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, label, 8)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_erase_block_size 4096
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_erase_block_size_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_write_block_size 4
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_write_block_size_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible {"soc-nv-flash"}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_IDX_0 "soc-nv-flash"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, compatible, 0)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_LEN 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_compatible_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg {0 /* 0x0 */, 1048576 /* 0x100000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_0 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_1 1048576
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, reg, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0, reg, 1)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
 *
 * Binding (compatible = fixed-partitions):
 *   $ZEPHYR_BASE\dts\bindings\mtd\partition.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_PATH "/soc/flash-controller@4001e000/flash@0/partitions"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FULL_NAME "partitions"

/* Node parent (/soc/flash-controller@4001e000/flash@0) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_ORD 61

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_REQUIRES_ORDS \
	60, /* /soc/flash-controller@4001e000/flash@0 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_SUPPORTS_ORDS \
	62, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@0 */ \
	63, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@c000 */ \
	64, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@73000 */ \
	65, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@da000 */ \
	66, /* /soc/flash-controller@4001e000/flash@0/partitions/partition@f8000 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_EXISTS 1
#define DT_N_INST_0_fixed_partitions DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_REG_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_COMPAT_MATCHES_fixed_partitions 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_STATUS_okay 1

/* (No generic property macros) */

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@0
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@0"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FULL_NAME "partition@0"

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_ORD 62

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REQUIRES_ORDS \
	61, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_EXISTS 1
#define DT_N_NODELABEL_boot_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_REG_IDX_0_VAL_SIZE 49152 /* 0xc000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_STATUS_okay 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_PARTITION_ID 0

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label "mcuboot"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 1) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 2) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 3) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 4) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 5) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, label, 6)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg {0 /* 0x0 */, 49152 /* 0xc000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_0 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_1 49152
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, reg, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0, reg, 1)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@c000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@c000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FULL_NAME "partition@c000"

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_ORD 63

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_REQUIRES_ORDS \
	61, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_EXISTS 1
#define DT_N_NODELABEL_slot0_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_REG_IDX_0_VAL_ADDRESS 49152 /* 0xc000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_REG_IDX_0_VAL_SIZE 421888 /* 0x67000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_STATUS_okay 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_PARTITION_ID 1

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label "image-0"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 1) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 2) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 3) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 4) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 5) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, label, 6)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg {49152 /* 0xc000 */, 421888 /* 0x67000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_IDX_0 49152
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_IDX_1 421888
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, reg, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000, reg, 1)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@73000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@73000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_FULL_NAME "partition@73000"

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_ORD 64

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_REQUIRES_ORDS \
	61, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_EXISTS 1
#define DT_N_NODELABEL_slot1_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_REG_IDX_0_VAL_ADDRESS 471040 /* 0x73000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_REG_IDX_0_VAL_SIZE 421888 /* 0x67000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_STATUS_okay 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_PARTITION_ID 2

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_P_label "image-1"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000, label, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000, label, 1) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000, label, 2) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000, label, 3) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000, label, 4) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000, label, 5) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000, label, 6)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_P_reg {471040 /* 0x73000 */, 421888 /* 0x67000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_P_reg_IDX_0 471040
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_P_reg_IDX_1 421888
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000, reg, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000, reg, 1)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@da000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@da000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_FULL_NAME "partition@da000"

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_ORD 65

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_REQUIRES_ORDS \
	61, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_EXISTS 1
#define DT_N_NODELABEL_scratch_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_REG_IDX_0_VAL_ADDRESS 892928 /* 0xda000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_REG_IDX_0_VAL_SIZE 122880 /* 0x1e000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_STATUS_okay 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_PARTITION_ID 3

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_P_label "image-scratch"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000, label, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000, label, 1) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000, label, 2) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000, label, 3) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000, label, 4) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000, label, 5) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000, label, 6) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000, label, 7) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000, label, 8) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000, label, 9) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000, label, 10) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000, label, 11) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000, label, 12)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_P_reg {892928 /* 0xda000 */, 122880 /* 0x1e000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_P_reg_IDX_0 892928
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_P_reg_IDX_1 122880
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000, reg, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000, reg, 1)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/flash-controller@4001e000/flash@0/partitions/partition@f8000
 *
 * Node identifier: DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_PATH "/soc/flash-controller@4001e000/flash@0/partitions/partition@f8000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_FULL_NAME "partition@f8000"

/* Node parent (/soc/flash-controller@4001e000/flash@0/partitions) identifier: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_PARENT DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_ORD 66

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_REQUIRES_ORDS \
	61, /* /soc/flash-controller@4001e000/flash@0/partitions */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_EXISTS 1
#define DT_N_NODELABEL_storage_partition DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000

/* Special property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_REG_NUM 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_REG_IDX_0_VAL_ADDRESS 1015808 /* 0xf8000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_REG_IDX_0_VAL_SIZE 32768 /* 0x8000 */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_IRQ_NUM 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_STATUS_okay 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_PARTITION_ID 4

/* Generic property macros: */
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_P_label "storage"
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000, label, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000, label, 1) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000, label, 2) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000, label, 3) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000, label, 4) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000, label, 5) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000, label, 6)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_P_label_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_P_read_only 0
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_P_read_only_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_P_reg {1015808 /* 0xf8000 */, 32768 /* 0x8000 */}
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_P_reg_IDX_0 1015808
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_P_reg_IDX_1 32768
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000, reg, 0) \
	fn(DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000, reg, 1)
#define DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000_P_reg_EXISTS 1

/*
 * Devicetree node: /soc/qspi@40029000
 *
 * Node identifier: DT_N_S_soc_S_qspi_40029000
 *
 * Binding (compatible = nordic,nrf-qspi):
 *   $ZEPHYR_BASE\dts\bindings\flash_controller\nordic,nrf-qspi.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_qspi_40029000_PATH "/soc/qspi@40029000"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_qspi_40029000_FULL_NAME "qspi@40029000"

/* Node parent (/soc) identifier: */
#define DT_N_S_soc_S_qspi_40029000_PARENT DT_N_S_soc
#define DT_N_S_soc_S_qspi_40029000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0)
#define DT_N_S_soc_S_qspi_40029000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_qspi_40029000_ORD 67

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_qspi_40029000_REQUIRES_ORDS \
	5, /* /soc */ \
	6, /* /soc/interrupt-controller@e000e100 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_qspi_40029000_SUPPORTS_ORDS \
	68, /* /soc/qspi@40029000/mx25r6435f@0 */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_qspi_40029000_EXISTS 1
#define DT_N_INST_0_nordic_nrf_qspi DT_N_S_soc_S_qspi_40029000
#define DT_N_NODELABEL_qspi         DT_N_S_soc_S_qspi_40029000

/* Special property macros: */
#define DT_N_S_soc_S_qspi_40029000_REG_NUM 1
#define DT_N_S_soc_S_qspi_40029000_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_REG_IDX_0_VAL_ADDRESS 1073909760 /* 0x40029000 */
#define DT_N_S_soc_S_qspi_40029000_REG_IDX_0_VAL_SIZE 4096 /* 0x1000 */
#define DT_N_S_soc_S_qspi_40029000_IRQ_NUM 1
#define DT_N_S_soc_S_qspi_40029000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_IRQ_IDX_0_VAL_irq 41
#define DT_N_S_soc_S_qspi_40029000_IRQ_IDX_0_VAL_irq_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_IRQ_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_IRQ_IDX_0_VAL_priority 1
#define DT_N_S_soc_S_qspi_40029000_IRQ_IDX_0_VAL_priority_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_COMPAT_MATCHES_nordic_nrf_qspi 1
#define DT_N_S_soc_S_qspi_40029000_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_qspi_40029000_P_interrupts {41 /* 0x29 */, 1 /* 0x1 */}
#define DT_N_S_soc_S_qspi_40029000_P_interrupts_IDX_0 41
#define DT_N_S_soc_S_qspi_40029000_P_interrupts_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_interrupts_IDX_1 1
#define DT_N_S_soc_S_qspi_40029000_P_interrupts_IDX_1_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_interrupts_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qspi_40029000, interrupts, 0) \
	fn(DT_N_S_soc_S_qspi_40029000, interrupts, 1)
#define DT_N_S_soc_S_qspi_40029000_P_interrupts_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_sck_pin 19
#define DT_N_S_soc_S_qspi_40029000_P_sck_pin_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_io_pins {20 /* 0x14 */, 21 /* 0x15 */, 22 /* 0x16 */, 23 /* 0x17 */}
#define DT_N_S_soc_S_qspi_40029000_P_io_pins_IDX_0 20
#define DT_N_S_soc_S_qspi_40029000_P_io_pins_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_io_pins_IDX_1 21
#define DT_N_S_soc_S_qspi_40029000_P_io_pins_IDX_1_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_io_pins_IDX_2 22
#define DT_N_S_soc_S_qspi_40029000_P_io_pins_IDX_2_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_io_pins_IDX_3 23
#define DT_N_S_soc_S_qspi_40029000_P_io_pins_IDX_3_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_io_pins_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qspi_40029000, io_pins, 0) \
	fn(DT_N_S_soc_S_qspi_40029000, io_pins, 1) \
	fn(DT_N_S_soc_S_qspi_40029000, io_pins, 2) \
	fn(DT_N_S_soc_S_qspi_40029000, io_pins, 3)
#define DT_N_S_soc_S_qspi_40029000_P_io_pins_LEN 4
#define DT_N_S_soc_S_qspi_40029000_P_io_pins_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_csn_pins {17 /* 0x11 */}
#define DT_N_S_soc_S_qspi_40029000_P_csn_pins_IDX_0 17
#define DT_N_S_soc_S_qspi_40029000_P_csn_pins_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_csn_pins_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qspi_40029000, csn_pins, 0)
#define DT_N_S_soc_S_qspi_40029000_P_csn_pins_LEN 1
#define DT_N_S_soc_S_qspi_40029000_P_csn_pins_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_label "QSPI"
#define DT_N_S_soc_S_qspi_40029000_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qspi_40029000, label, 0) \
	fn(DT_N_S_soc_S_qspi_40029000, label, 1) \
	fn(DT_N_S_soc_S_qspi_40029000, label, 2) \
	fn(DT_N_S_soc_S_qspi_40029000, label, 3)
#define DT_N_S_soc_S_qspi_40029000_P_label_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_reg {1073909760 /* 0x40029000 */, 4096 /* 0x1000 */}
#define DT_N_S_soc_S_qspi_40029000_P_reg_IDX_0 1073909760
#define DT_N_S_soc_S_qspi_40029000_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_reg_IDX_1 4096
#define DT_N_S_soc_S_qspi_40029000_P_reg_IDX_1_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qspi_40029000, reg, 0) \
	fn(DT_N_S_soc_S_qspi_40029000, reg, 1)
#define DT_N_S_soc_S_qspi_40029000_P_reg_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_status "okay"
#define DT_N_S_soc_S_qspi_40029000_P_status_ENUM_IDX 1
#define DT_N_S_soc_S_qspi_40029000_P_status_ENUM_TOKEN okay
#define DT_N_S_soc_S_qspi_40029000_P_status_ENUM_UPPER_TOKEN OKAY
#define DT_N_S_soc_S_qspi_40029000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qspi_40029000, status, 0) \
	fn(DT_N_S_soc_S_qspi_40029000, status, 1) \
	fn(DT_N_S_soc_S_qspi_40029000, status, 2) \
	fn(DT_N_S_soc_S_qspi_40029000, status, 3)
#define DT_N_S_soc_S_qspi_40029000_P_status_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_compatible {"nordic,nrf-qspi"}
#define DT_N_S_soc_S_qspi_40029000_P_compatible_IDX_0 "nordic,nrf-qspi"
#define DT_N_S_soc_S_qspi_40029000_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qspi_40029000, compatible, 0)
#define DT_N_S_soc_S_qspi_40029000_P_compatible_LEN 1
#define DT_N_S_soc_S_qspi_40029000_P_compatible_EXISTS 1

/*
 * Devicetree node: /soc/qspi@40029000/mx25r6435f@0
 *
 * Node identifier: DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0
 *
 * Binding (compatible = nordic,qspi-nor):
 *   $ZEPHYR_BASE\dts\bindings\mtd\nordic,qspi-nor.yaml
 *
 * (Descriptions have moved to the Devicetree Bindings Index
 * in the documentation.)
 */

/* Node's full path: */
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_PATH "/soc/qspi@40029000/mx25r6435f@0"

/* Node's name with unit-address: */
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_FULL_NAME "mx25r6435f@0"

/* Node parent (/soc/qspi@40029000) identifier: */
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_PARENT DT_N_S_soc_S_qspi_40029000
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_FOREACH_CHILD(fn) 
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_FOREACH_CHILD_STATUS_OKAY(fn) 

/* Node's dependency ordinal: */
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_ORD 68

/* Ordinals for what this node depends on directly: */
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_REQUIRES_ORDS \
	67, /* /soc/qspi@40029000 */

/* Ordinals for what depends directly on this node: */
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_SUPPORTS_ORDS /* nothing */

/* Existence and alternate IDs: */
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_EXISTS 1
#define DT_N_INST_0_nordic_qspi_nor DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0
#define DT_N_NODELABEL_mx25r64      DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0

/* Bus info (controller: '/soc/qspi@40029000', type: 'qspi') */
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_BUS_qspi 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_BUS DT_N_S_soc_S_qspi_40029000

/* Special property macros: */
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_REG_NUM 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_REG_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_REG_IDX_0_VAL_ADDRESS 0 /* 0x0 */
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_IRQ_NUM 0
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_COMPAT_MATCHES_nordic_qspi_nor 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_STATUS_okay 1

/* Generic property macros: */
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_reg {0 /* 0x0 */}
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_reg_IDX_0 0
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_reg_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_reg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, reg, 0)
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_reg_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_label "MX25R64"
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_label_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, label, 0) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, label, 1) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, label, 2) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, label, 3) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, label, 4) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, label, 5) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, label, 6)
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_label_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_jedec_id {194 /* 0xc2 */, 40 /* 0x28 */, 23 /* 0x17 */}
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_jedec_id_IDX_0 194
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_jedec_id_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_jedec_id_IDX_1 40
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_jedec_id_IDX_1_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_jedec_id_IDX_2 23
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_jedec_id_IDX_2_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_jedec_id_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, jedec_id, 0) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, jedec_id, 1) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, jedec_id, 2)
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_jedec_id_LEN 3
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_jedec_id_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_size 67108864
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_size_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_quad_enable_requirements "S1B6"
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_quad_enable_requirements_ENUM_IDX 2
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_quad_enable_requirements_ENUM_TOKEN S1B6
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_quad_enable_requirements_ENUM_UPPER_TOKEN S1B6
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_quad_enable_requirements_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, quad_enable_requirements, 0) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, quad_enable_requirements, 1) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, quad_enable_requirements, 2) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, quad_enable_requirements, 3)
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_quad_enable_requirements_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_readoc "read4io"
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_readoc_ENUM_IDX 4
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_readoc_ENUM_TOKEN read4io
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_readoc_ENUM_UPPER_TOKEN READ4IO
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_readoc_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, readoc, 0) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, readoc, 1) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, readoc, 2) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, readoc, 3) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, readoc, 4) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, readoc, 5) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, readoc, 6)
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_readoc_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_writeoc "pp4io"
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_writeoc_ENUM_IDX 3
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_writeoc_ENUM_TOKEN pp4io
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_writeoc_ENUM_UPPER_TOKEN PP4IO
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_writeoc_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, writeoc, 0) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, writeoc, 1) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, writeoc, 2) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, writeoc, 3) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, writeoc, 4)
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_writeoc_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_address_size_32 0
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_address_size_32_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_ppsize_512 0
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_ppsize_512_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sck_delay 0
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sck_delay_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_cpha 0
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_cpha_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_cpol 0
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_cpol_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sck_frequency 8000000
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sck_frequency_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_compatible {"nordic,qspi-nor"}
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_compatible_IDX_0 "nordic,qspi-nor"
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_compatible_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, compatible, 0)
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_compatible_LEN 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_compatible_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_requires_ulbpr 0
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_requires_ulbpr_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_has_dpd 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_has_dpd_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_t_enter_dpd 10000
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_t_enter_dpd_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_t_exit_dpd 35000
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_t_exit_dpd_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp {229 /* 0xe5 */, 32 /* 0x20 */, 241 /* 0xf1 */, 255 /* 0xff */, 255 /* 0xff */, 255 /* 0xff */, 255 /* 0xff */, 3 /* 0x3 */, 68 /* 0x44 */, 235 /* 0xeb */, 8 /* 0x8 */, 107 /* 0x6b */, 8 /* 0x8 */, 59 /* 0x3b */, 4 /* 0x4 */, 187 /* 0xbb */, 238 /* 0xee */, 255 /* 0xff */, 255 /* 0xff */, 255 /* 0xff */, 255 /* 0xff */, 255 /* 0xff */, 0 /* 0x0 */, 255 /* 0xff */, 255 /* 0xff */, 255 /* 0xff */, 0 /* 0x0 */, 255 /* 0xff */, 12 /* 0xc */, 32 /* 0x20 */, 15 /* 0xf */, 82 /* 0x52 */, 16 /* 0x10 */, 216 /* 0xd8 */, 0 /* 0x0 */, 255 /* 0xff */, 35 /* 0x23 */, 114 /* 0x72 */, 245 /* 0xf5 */, 0 /* 0x0 */, 130 /* 0x82 */, 237 /* 0xed */, 4 /* 0x4 */, 204 /* 0xcc */, 68 /* 0x44 */, 131 /* 0x83 */, 104 /* 0x68 */, 68 /* 0x44 */, 48 /* 0x30 */, 176 /* 0xb0 */, 48 /* 0x30 */, 176 /* 0xb0 */, 247 /* 0xf7 */, 196 /* 0xc4 */, 213 /* 0xd5 */, 92 /* 0x5c */, 0 /* 0x0 */, 190 /* 0xbe */, 41 /* 0x29 */, 255 /* 0xff */, 240 /* 0xf0 */, 208 /* 0xd0 */, 255 /* 0xff */, 255 /* 0xff */}
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_0 229
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_0_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_1 32
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_1_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_2 241
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_2_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_3 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_3_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_4 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_4_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_5 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_5_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_6 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_6_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_7 3
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_7_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_8 68
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_8_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_9 235
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_9_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_10 8
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_10_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_11 107
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_11_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_12 8
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_12_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_13 59
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_13_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_14 4
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_14_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_15 187
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_15_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_16 238
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_16_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_17 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_17_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_18 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_18_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_19 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_19_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_20 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_20_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_21 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_21_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_22 0
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_22_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_23 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_23_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_24 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_24_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_25 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_25_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_26 0
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_26_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_27 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_27_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_28 12
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_28_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_29 32
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_29_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_30 15
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_30_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_31 82
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_31_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_32 16
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_32_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_33 216
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_33_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_34 0
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_34_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_35 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_35_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_36 35
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_36_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_37 114
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_37_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_38 245
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_38_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_39 0
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_39_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_40 130
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_40_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_41 237
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_41_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_42 4
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_42_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_43 204
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_43_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_44 68
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_44_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_45 131
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_45_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_46 104
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_46_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_47 68
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_47_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_48 48
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_48_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_49 176
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_49_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_50 48
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_50_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_51 176
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_51_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_52 247
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_52_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_53 196
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_53_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_54 213
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_54_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_55 92
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_55_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_56 0
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_56_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_57 190
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_57_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_58 41
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_58_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_59 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_59_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_60 240
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_60_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_61 208
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_61_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_62 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_62_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_63 255
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_IDX_63_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 0) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 1) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 2) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 3) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 4) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 5) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 6) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 7) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 8) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 9) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 10) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 11) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 12) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 13) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 14) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 15) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 16) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 17) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 18) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 19) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 20) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 21) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 22) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 23) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 24) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 25) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 26) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 27) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 28) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 29) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 30) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 31) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 32) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 33) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 34) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 35) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 36) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 37) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 38) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 39) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 40) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 41) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 42) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 43) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 44) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 45) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 46) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 47) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 48) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 49) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 50) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 51) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 52) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 53) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 54) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 55) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 56) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 57) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 58) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 59) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 60) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 61) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 62) \
	fn(DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0, sfdp_bfp, 63)
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_LEN 64
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_sfdp_bfp_EXISTS 1
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_has_be32k 0
#define DT_N_S_soc_S_qspi_40029000_S_mx25r6435f_0_P_has_be32k_EXISTS 1

/*
 * Chosen nodes
 */
#define DT_CHOSEN_zephyr_entropy                 DT_N_S_soc_S_crypto_5002a000
#define DT_CHOSEN_zephyr_entropy_EXISTS          1
#define DT_CHOSEN_zephyr_flash_controller        DT_N_S_soc_S_flash_controller_4001e000
#define DT_CHOSEN_zephyr_flash_controller_EXISTS 1
#define DT_CHOSEN_zephyr_console                 DT_N_S_soc_S_uart_40002000
#define DT_CHOSEN_zephyr_console_EXISTS          1
#define DT_CHOSEN_zephyr_shell_uart              DT_N_S_soc_S_uart_40002000
#define DT_CHOSEN_zephyr_shell_uart_EXISTS       1
#define DT_CHOSEN_zephyr_uart_mcumgr             DT_N_S_soc_S_uart_40002000
#define DT_CHOSEN_zephyr_uart_mcumgr_EXISTS      1
#define DT_CHOSEN_zephyr_bt_mon_uart             DT_N_S_soc_S_uart_40002000
#define DT_CHOSEN_zephyr_bt_mon_uart_EXISTS      1
#define DT_CHOSEN_zephyr_bt_c2h_uart             DT_N_S_soc_S_uart_40002000
#define DT_CHOSEN_zephyr_bt_c2h_uart_EXISTS      1
#define DT_CHOSEN_zephyr_sram                    DT_N_S_soc_S_memory_20000000
#define DT_CHOSEN_zephyr_sram_EXISTS             1
#define DT_CHOSEN_zephyr_flash                   DT_N_S_soc_S_flash_controller_4001e000_S_flash_0
#define DT_CHOSEN_zephyr_flash_EXISTS            1
#define DT_CHOSEN_zephyr_code_partition          DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000
#define DT_CHOSEN_zephyr_code_partition_EXISTS   1
#define DT_COMPAT_fixed_partitions_LABEL_mcuboot DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_0
#define DT_COMPAT_fixed_partitions_LABEL_mcuboot_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_image_0 DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_c000
#define DT_COMPAT_fixed_partitions_LABEL_image_0_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_image_1 DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_73000
#define DT_COMPAT_fixed_partitions_LABEL_image_1_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_image_scratch DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_da000
#define DT_COMPAT_fixed_partitions_LABEL_image_scratch_EXISTS 1
#define DT_COMPAT_fixed_partitions_LABEL_storage DT_N_S_soc_S_flash_controller_4001e000_S_flash_0_S_partitions_S_partition_f8000
#define DT_COMPAT_fixed_partitions_LABEL_storage_EXISTS 1

/*
 * Macros for compatibles with status "okay" nodes
 */
#define DT_COMPAT_HAS_OKAY_nordic_nrf52840_dk_nrf52840 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf52840_qiaa 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf52840 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf52 1
#define DT_COMPAT_HAS_OKAY_simple_bus 1
#define DT_COMPAT_HAS_OKAY_arm_v7m_nvic 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf52_flash_controller 1
#define DT_COMPAT_HAS_OKAY_soc_nv_flash 1
#define DT_COMPAT_HAS_OKAY_fixed_partitions 1
#define DT_COMPAT_HAS_OKAY_mmio_sram 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_saadc 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_clock 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_ecb 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_uarte 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpiote 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_gpio 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_twi 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_pwm 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_rng 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_spi 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_spim 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_qspi 1
#define DT_COMPAT_HAS_OKAY_nordic_qspi_nor 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_rtc 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_timer 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_temp 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_usbd 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_watchdog 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_cc310 1
#define DT_COMPAT_HAS_OKAY_arm_cryptocell_310 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_ficr 1
#define DT_COMPAT_HAS_OKAY_nordic_nrf_uicr 1
#define DT_COMPAT_HAS_OKAY_arm_cortex_m4f 1
#define DT_COMPAT_HAS_OKAY_gpio_leds 1
#define DT_COMPAT_HAS_OKAY_pwm_leds 1
#define DT_COMPAT_HAS_OKAY_gpio_keys 1
#define DT_COMPAT_HAS_OKAY_arduino_header_r3 1
#define DT_COMPAT_HAS_OKAY_arduino_uno_adc 1

/*
 * Macros for status "okay" instances of each compatible
 */
#define DT_N_INST_nordic_nrf52840_dk_nrf52840_NUM_OKAY 1
#define DT_N_INST_nordic_nrf52840_qiaa_NUM_OKAY 1
#define DT_N_INST_nordic_nrf52840_NUM_OKAY 1
#define DT_N_INST_nordic_nrf52_NUM_OKAY 1
#define DT_N_INST_simple_bus_NUM_OKAY 1
#define DT_N_INST_arm_v7m_nvic_NUM_OKAY 1
#define DT_N_INST_nordic_nrf52_flash_controller_NUM_OKAY 1
#define DT_N_INST_soc_nv_flash_NUM_OKAY 1
#define DT_N_INST_fixed_partitions_NUM_OKAY 1
#define DT_N_INST_mmio_sram_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_saadc_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_clock_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_ecb_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_uarte_NUM_OKAY 2
#define DT_N_INST_nordic_nrf_gpiote_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_gpio_NUM_OKAY 2
#define DT_N_INST_nordic_nrf_twi_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_pwm_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_rng_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_spi_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_spim_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_qspi_NUM_OKAY 1
#define DT_N_INST_nordic_qspi_nor_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_rtc_NUM_OKAY 3
#define DT_N_INST_nordic_nrf_timer_NUM_OKAY 5
#define DT_N_INST_nordic_nrf_temp_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_usbd_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_watchdog_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_cc310_NUM_OKAY 1
#define DT_N_INST_arm_cryptocell_310_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_ficr_NUM_OKAY 1
#define DT_N_INST_nordic_nrf_uicr_NUM_OKAY 1
#define DT_N_INST_arm_cortex_m4f_NUM_OKAY 1
#define DT_N_INST_gpio_leds_NUM_OKAY 1
#define DT_N_INST_pwm_leds_NUM_OKAY 1
#define DT_N_INST_gpio_keys_NUM_OKAY 1
#define DT_N_INST_arduino_header_r3_NUM_OKAY 1
#define DT_N_INST_arduino_uno_adc_NUM_OKAY 1
#define DT_FOREACH_OKAY_INST_nordic_nrf52840_dk_nrf52840(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf52840_qiaa(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf52840(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf52(fn) fn(0)
#define DT_FOREACH_OKAY_INST_simple_bus(fn) fn(0)
#define DT_FOREACH_OKAY_INST_arm_v7m_nvic(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf52_flash_controller(fn) fn(0)
#define DT_FOREACH_OKAY_INST_soc_nv_flash(fn) fn(0)
#define DT_FOREACH_OKAY_INST_fixed_partitions(fn) fn(0)
#define DT_FOREACH_OKAY_INST_mmio_sram(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_saadc(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_clock(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_ecb(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_uarte(fn) fn(0) fn(1)
#define DT_FOREACH_OKAY_INST_nordic_nrf_gpiote(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_gpio(fn) fn(0) fn(1)
#define DT_FOREACH_OKAY_INST_nordic_nrf_twi(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_pwm(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_rng(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_spi(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_spim(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_qspi(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_qspi_nor(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_rtc(fn) fn(0) fn(1) fn(2)
#define DT_FOREACH_OKAY_INST_nordic_nrf_timer(fn) fn(0) fn(1) fn(2) fn(3) fn(4)
#define DT_FOREACH_OKAY_INST_nordic_nrf_temp(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_usbd(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_watchdog(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_cc310(fn) fn(0)
#define DT_FOREACH_OKAY_INST_arm_cryptocell_310(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_ficr(fn) fn(0)
#define DT_FOREACH_OKAY_INST_nordic_nrf_uicr(fn) fn(0)
#define DT_FOREACH_OKAY_INST_arm_cortex_m4f(fn) fn(0)
#define DT_FOREACH_OKAY_INST_gpio_leds(fn) fn(0)
#define DT_FOREACH_OKAY_INST_pwm_leds(fn) fn(0)
#define DT_FOREACH_OKAY_INST_gpio_keys(fn) fn(0)
#define DT_FOREACH_OKAY_INST_arduino_header_r3(fn) fn(0)
#define DT_FOREACH_OKAY_INST_arduino_uno_adc(fn) fn(0)

/*
 * Bus information for status "okay" nodes of each compatible
 */
#define DT_COMPAT_nordic_qspi_nor_BUS_qspi 1
