/dts-v1/;
#include <nordic/nrf52832_qfaa.dtsi>
#include "My_custom_board-pinctrl.dtsi"

/ {
	model = "Custom Board auto generated by nRF Connect for VS Code";
	compatible = "embel_technologies,My-custom-board";

	chosen {
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,code-partition = &slot0_partition;
	};
};

&flash0 {
	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		boot_partition: partition@0 {
			label = "mcuboot";
			reg = <0x00000000 DT_SIZE_K(48)>;
		};

		slot0_partition: partition@c000 {
			label = "image-0";
			reg = <0x0000c000 DT_SIZE_K(220)>;
		};

		slot1_partition: partition@43000 {
			label = "image-1";
			reg = <0x00043000 DT_SIZE_K(220)>;
		};

		storage_partition: partition@7a000 {
			label = "storage";
			reg = <0x0007a000 DT_SIZE_K(24)>;
		};
	};
};

&spi1 {
    compatible = "nordic,nrf-spi";
    status = "okay";
    cs-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;  // CS on P0.26

    pinctrl-0 = <&spi1_default>;
    pinctrl-1 = <&spi1_sleep>;
    pinctrl-names = "default", "sleep";
};
&pinctrl {
	spi1_default: spi1_default {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 0, 30)>,
				<NRF_PSEL(SPIM_MOSI, 0, 29)>,
				<NRF_PSEL(SPIM_MISO, 0, 27)>;
		};
	};

	spi1_sleep: spi1_sleep {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 0, 30)>,
				<NRF_PSEL(SPIM_MOSI, 0, 29)>,
				<NRF_PSEL(SPIM_MISO, 0, 27)>;
			low-power-enable;
		};
	};
};&gpiote {
    status = "okay";
};

&gpio0 {
    status = "okay";
    gpiote-instance = <&gpiote>;
};