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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF5340: Debugging SPI + Implementing SPI + PPI</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/100197/nrf5340-debugging-spi-implementing-spi-ppi</link><description>Hello, 
 I have a question regarding 1. debugging SPI and 2. implementing SPI + PPI + FORK. It would be really appreciated if anyone could help me with this. 
 
 Debugging SPI 
 In order to connect SPI and PPI, I need to use nrfx library. I have a working</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 02 Jun 2023 12:23:34 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/100197/nrf5340-debugging-spi-implementing-spi-ppi" /><item><title>RE: nRF5340: Debugging SPI + Implementing SPI + PPI + FORK</title><link>https://devzone.nordicsemi.com/thread/429003?ContentTypeID=1</link><pubDate>Fri, 02 Jun 2023 12:23:34 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3d18bd92-0b97-4590-a608-3b7d61a6ef07</guid><dc:creator>J&amp;#248;rgen Holmefjord</dc:creator><description>[quote user="skim"]--I cannot recall where I found, but here is the original zip file: &lt;a href="https://devzone.nordicsemi.com/cfs-file/__key/communityserver-discussions-components-files/4/3716.nrfx_5F00_spi_5F00_master.zip"&gt;6136.nrfx_spi_master.zip&lt;/a&gt;[/quote]
&lt;p&gt;I think this might come from &lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/70105/how-to-use-spi-interface-in-a-zephyr-sample-example/288587"&gt;this post&lt;/a&gt;.&lt;/p&gt;
[quote user="skim"]-- Yes. I&amp;nbsp;tested and SCK, MOSI, MISO, CS pins are called correctly. But I still don&amp;#39;t see &lt;em&gt;m_rx_buf&amp;nbsp;&lt;/em&gt;getting filled with correct data.&amp;nbsp;Do you have any idea in this case?[/quote]
&lt;p&gt;If MISO toggles as expected externally, I suspect that the GPIO assigned to MISO in the nRF chip is also used for something else. Can you upload the compiled dts file for your build? (Found in&amp;nbsp;build\zephyr\zephyr.dts).&lt;/p&gt;
[quote user="skim"]Q: Is it not possible to use nrfx&amp;#39;s SPIM and zephyr&amp;#39;s I2C in the same project? It seems like once I call &amp;quot;&lt;em&gt;nrfx_spim_init()&lt;/em&gt;&amp;quot;, call for &amp;quot;&lt;em&gt;i2c_burst_read()&lt;/em&gt;&amp;quot; always returns an error.&amp;nbsp;[/quote]
&lt;p&gt;I do think this should be possible, but note that &lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf5340/chapters/memory/appmem.html#instantiation"&gt;most of the SPIM and TWIM instances share base address&lt;/a&gt;, meaning you can only enable one protocol for each instance (e.g. either TWIM0&amp;nbsp;&lt;em&gt;or&amp;nbsp;&lt;/em&gt;SPIM0) at a time (can be reconfigured at runtime if using nrfx drivers).&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340: Debugging SPI + Implementing SPI + PPI + FORK</title><link>https://devzone.nordicsemi.com/thread/428290?ContentTypeID=1</link><pubDate>Tue, 30 May 2023 23:34:00 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:de977d68-92d9-4263-85f9-cb132c284ebb</guid><dc:creator>skim</dc:creator><description>[quote userid="14926" url="~/f/nordic-q-a/100197/nrf5340-debugging-spi-implementing-spi-ppi-fork/428149"]Can you post a link to the sample for reference?[/quote]
&lt;p&gt;--I cannot recall where I found, but here is the original zip file: &lt;a href="https://devzone.nordicsemi.com/cfs-file/__key/communityserver-discussions-components-files/4/6136.nrfx_5F00_spi_5F00_master.zip"&gt;devzone.nordicsemi.com/.../6136.nrfx_5F00_spi_5F00_master.zip&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
[quote userid="14926" url="~/f/nordic-q-a/100197/nrf5340-debugging-spi-implementing-spi-ppi-fork/428149"]It is possible that&lt;span&gt;&amp;nbsp;&lt;/span&gt;some of the&lt;span&gt;&amp;nbsp;&lt;/span&gt;pins you have assigned to SPIM peripheral is also assigned to another peripheral in the application, preventing the slave to output the correct data. Have you checked the SPIM pins with a logic analyzer/scope, to see if there is activity on the lines as expected?[/quote]
&lt;p&gt;-- Yes. I&amp;nbsp;tested and SCK, MOSI, MISO, CS pins are called correctly. But I still don&amp;#39;t see &lt;em&gt;m_rx_buf&amp;nbsp;&lt;/em&gt;getting filled with correct data.&amp;nbsp;Do you have any idea in this case?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Here is another question,&lt;/p&gt;
&lt;p&gt;Q: Is it not possible to use nrfx&amp;#39;s SPIM and zephyr&amp;#39;s I2C in the same project? It seems like once I call &amp;quot;&lt;em&gt;nrfx_spim_init()&lt;/em&gt;&amp;quot;, call for &amp;quot;&lt;em&gt;i2c_burst_read()&lt;/em&gt;&amp;quot; always returns an error.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Thank you,&lt;/p&gt;
&lt;p&gt;Skim.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340: Debugging SPI + Implementing SPI + PPI + FORK</title><link>https://devzone.nordicsemi.com/thread/428149?ContentTypeID=1</link><pubDate>Tue, 30 May 2023 11:38:31 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:58b4a628-b672-4d05-81d9-4b3655c12005</guid><dc:creator>J&amp;#248;rgen Holmefjord</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
[quote user=""]There is a sample from devZone that is using&amp;nbsp;nrfx library.[/quote]
&lt;p&gt;Can you post a link to the sample for reference?&lt;/p&gt;
[quote user=""]&lt;span&gt;-- In zephyr +overlay version, I could set those pins to &amp;quot;&lt;/span&gt;gpio1&amp;quot; and pin 4,5,6,7 in overlay. But in nrfx version, I could only set pin numbers to 4,5,6,7. Is there any way I could set it to gpio1 specifically?[/quote]
&lt;p&gt;The port is set as the 5th bit in the&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;a href="https://infocenter.nordicsemi.com/topic/ps_nrf5340/spim.html#register.PSEL.SCK"&gt;PSEL registers&lt;/a&gt;&lt;span&gt;&amp;nbsp;&lt;/span&gt;of the peripheral, which corresponds to adding 32 to the pin number to assign a pin on port1. You can use the macro&amp;nbsp;&lt;a href="https://developer.nordicsemi.com/nRF_Connect_SDK/doc/2.3.0/nrfx/drivers/gpio/hal.html#c.NRF_GPIO_PIN_MAP"&gt;&lt;span&gt;&lt;span&gt;&lt;span&gt;NRF_GPIO_PIN_MAP&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;&lt;span&gt;port&lt;/span&gt;&lt;/span&gt;&lt;span&gt;,&amp;nbsp;&lt;/span&gt;&lt;span&gt;&lt;span&gt;pin&lt;/span&gt;&lt;/span&gt;&lt;/a&gt;&lt;span&gt;&lt;a href="https://developer.nordicsemi.com/nRF_Connect_SDK/doc/2.3.0/nrfx/drivers/gpio/hal.html#c.NRF_GPIO_PIN_MAP"&gt;)&lt;/a&gt;&lt;span&gt;&amp;nbsp;&lt;/span&gt;when defining the pins in your application.&lt;/span&gt;&lt;/p&gt;
[quote user=""]&lt;span&gt;-- Since I would like to do &amp;quot;read&amp;quot; operation, I am checking &amp;quot;&lt;/span&gt;&lt;span&gt;m_rx_buf&amp;quot;&amp;nbsp;&lt;/span&gt;in nrfx version. But&amp;nbsp;the buffer is&amp;nbsp;always filled with 0. With zephyr version, I can read the number I expect.[/quote]
&lt;p&gt;It is possible that&lt;span&gt;&amp;nbsp;&lt;/span&gt;some of the&lt;span&gt;&amp;nbsp;&lt;/span&gt;pins you have assigned to SPIM peripheral is also assigned to another peripheral in the application, preventing the slave to output the correct data. Have you checked the SPIM pins with a logic analyzer/scope, to see if there is activity on the lines as expected?&lt;/p&gt;
[quote user=""]I found in order to connect SPI and PPI, I need to set&amp;nbsp;&lt;a href="https://developer.nordicsemi.com/nRF_Connect_SDK/doc/1.9.1/nrfx/drivers/spim/driver.html#group__nrfx__spim_1gaff6489390a782991804a0da7215385c4"&gt;&lt;span&gt;NRFX_SPIM_FLAG_HOLD_XFER&lt;/span&gt;&lt;/a&gt;&amp;nbsp;flag for SPI and configure&amp;nbsp;CS to&amp;nbsp;&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;a href="https://developer.nordicsemi.com/nRF_Connect_SDK/doc/1.9.1/nrfx/drivers/spim/driver.html#group__nrfx__spim_1ga5294e56c58c298b1610d19035b249f75"&gt;&lt;span&gt;NRFX_SPIM_PIN_NOT_USED&lt;/span&gt;&lt;/a&gt;&amp;nbsp;and manage it outside the driver.&amp;nbsp;&lt;a title="How to properly configure periodic SPI transfers with PPI and TIMER?" href="https://devzone.nordicsemi.com/f/nordic-q-a/88962/how-to-properly-configure-periodic-spi-transfers-with-ppi-and-timer"&gt;This&lt;/a&gt;&amp;nbsp;suggests using fork.&amp;nbsp;Is there any example code I can follow for this?&amp;nbsp;[/quote]
&lt;p&gt;&lt;span&gt;We do not have any example code showing how to do automatic control of SPI CS pin through PPI and TIMER. Have you tried to implement this yourself? Do you have any specific issues?&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Best regards,&lt;br /&gt;Jørgen&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>