NFC impedance interface

RE: NFC impedance interface

Einar Thorsrud — Fri, 06 Nov 2015 08:28:08 GMT

The main factor for designing the antenna coil should be that the size fits in your product. The NFC circuitry is only active when communicating over NFC, so power consumption is normally not a issue. The rest of the time, only the wake-on-field circuitry is active, which only draws 100 nA.

RE: NFC impedance interface

Rohit — Thu, 05 Nov 2015 15:35:01 GMT

Thanks Einar for your the explanation. A follow-up question. What would be better approach: To design the NFC coil and equivalent circuit (with shunt capacitors) in such a way that there is large variation in parallel resistance (that includes Rin and R_ant) to get optimum voltage swing or small variation in parallel resistance to get optimum voltage swing, so that power consumption is minimized.

RE: NFC impedance interface

Einar Thorsrud — Thu, 05 Nov 2015 12:35:47 GMT

The NFC antenna can be viewed as a parallel resonant tank. At 13.56 MHz we would like the antenna to have its parallel resonant frequency, and this is adjusted by the capacitors to ground. The Q value/ parallel resistance of the antenna is internally adjusted automatically to get optimum voltage swing for NFC operation. The two capacitors are sufficient to position the parallel resonance for the antenna.