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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Last byte of SPI transfer sometimes ends up in next transfer</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/102170/last-byte-of-spi-transfer-sometimes-ends-up-in-next-transfer</link><description>Currently I&amp;#39;m working on the implementation of a driver for a SPI sensor using nRF Connect SDK v2.4.0. 
 The sensor uses an interrupt line to signal a measurement is ready at about 1 KHz. At this frequency 4 registers of the sensors are read and printed</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Sat, 29 Jul 2023 01:47:53 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/102170/last-byte-of-spi-transfer-sometimes-ends-up-in-next-transfer" /><item><title>RE: Last byte of SPI transfer sometimes ends up in next transfer</title><link>https://devzone.nordicsemi.com/thread/438839?ContentTypeID=1</link><pubDate>Sat, 29 Jul 2023 01:47:53 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:017b5615-a448-4fd4-8555-df7696d00312</guid><dc:creator>hmolesworth</dc:creator><description>&lt;p&gt;If the sensor is something like the AD7785 AFE which uses single byte transfers note it can be used in multi-byte multiple register transfer mode; see this&amp;nbsp;post which I gave an example on&amp;nbsp;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/100324/nrf52832-errata-58-spim-fix"&gt;nrf52832-errata-58-spim-fix&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Last byte of SPI transfer sometimes ends up in next transfer</title><link>https://devzone.nordicsemi.com/thread/438310?ContentTypeID=1</link><pubDate>Wed, 26 Jul 2023 13:36:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4fa5f35c-8277-49e7-bf8a-292258851280</guid><dc:creator>swo_w</dc:creator><description>&lt;p&gt;I wish I could use a single transaction, the used sensor does not allow this. &lt;/p&gt;
&lt;p&gt;For some reason I missed this post &amp;nbsp;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/98800/nrf52840-spim3-output-wrong-data"&gt;NRF52840 SPIM3 output wrong data&lt;/a&gt; with a very similar problem. My query was probably too specific. I yet have to find out how to use the work-arounds in Zephyr, but I&amp;#39;ll look into that. It probably does explain why using global or static buffers &amp;quot;fixed&amp;quot; my issue. I&amp;#39;ll try the workaround for SPIM3 or move to another SPIM.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Last byte of SPI transfer sometimes ends up in next transfer</title><link>https://devzone.nordicsemi.com/thread/438221?ContentTypeID=1</link><pubDate>Wed, 26 Jul 2023 10:46:40 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:13050115-9b8f-4045-8056-0db59f50347f</guid><dc:creator>hmolesworth</dc:creator><description>&lt;p&gt;For (mostly) adjacent registers I would recommend a single block SPI transaction to read all registers at once instead of multiple single-byte transactions even if that requires a couple of extra&amp;nbsp;bytes as the status register is not adjacent to xyz; this reduces significantly the software overhead. Running SPIM3 at 32MHz is always a challenge, as SPIM3 has the lowest priority of all the peripheral devices (I kid you not) and latencies begin to be significant. You might find my comments towards the end of this post helpful:&amp;nbsp;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/101279/spim3-peripheral-not-reliable"&gt;spim3-peripheral-not-reliable&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Last byte of SPI transfer sometimes ends up in next transfer</title><link>https://devzone.nordicsemi.com/thread/438097?ContentTypeID=1</link><pubDate>Tue, 25 Jul 2023 13:40:01 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d4068ec2-b4d8-4dfb-8237-6966c0bf98ed</guid><dc:creator>Simonr</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;Due to the summer vacation period we are currently understaffed, so delayed replies must be expected. I am sorry about any inconvenience this might cause.&lt;/p&gt;
&lt;p&gt;One of my colleagues will get back to you (hopefully shortly). Thank you for your patience.&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>