I2S MLCK Clock problem on nrf5340

RE: I2S MLCK Clock problem on nrf5340

Sigurd — Tue, 19 Mar 2024 08:36:27 GMT

The reason for why there was no clock, was because the code was crashing due to zero division. Reported here: https://github.com/zephyrproject-rtos/zephyr/issues/70316

RE: I2S MLCK Clock problem on nrf5340

nrf5340_nrf5340 — Tue, 15 Aug 2023 07:47:30 GMT

drivers/i2s/echo

RE: I2S MLCK Clock problem on nrf5340

Sigurd — Mon, 14 Aug 2023 15:49:58 GMT

Hi,

I can try to reproduce it here. What sample did you use to reproduce this?

RE: I2S MLCK Clock problem on nrf5340

nrf5340_nrf5340 — Thu, 10 Aug 2023 09:32:20 GMT

Hi. Thanks for the replay. Initialy clock was present when all ratios were present but the problem is MCLK and SClK are both 1.4 MHz. I need 11.286 Mhz for MCK, and since sample rate is 44.1 kHz SCLK frequency needs to stay at 1.4MHz. So, because I wanted to have MCLK that oscilates at different radio than SCLK, I figured that I can comment elements of array. If I comment all elements but let's say 64x, I will get 2.8 Mhz MCLK clock and SCLK will be 1.4MHz. If I comment all elements but 128x I will get 5.6Mhz MCLK clock and 1.4 SCLK. But when I commented all elements but 256X MHz clocks were not present.

RE: I2S MLCK Clock problem on nrf5340

Sigurd — Wed, 09 Aug 2023 17:26:04 GMT

Hi,

[quote user=""]But when I meassured clock pin, clock was not present[/quote][quote user=""]When I reduced to ratio to 128 and 64, I successfully got 2.8 MHz and 5.6 MHz clocks[/quote]

I'm a bit confused here. The clock was not present, you then started commenting out values in ratios[], and after that you suddenly got a clock output ?