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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Does all SPI pins need to be in same GPIO port on ncs v2.4.2?</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/103874/does-all-spi-pins-need-to-be-in-same-gpio-port-on-ncs-v2-4-2</link><description>There are two GPIO pots on nRF5340 device. Does all SPI pins (cs, clock, mosi, and miso) need to belong to same port?</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 18 Sep 2023 20:41:37 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/103874/does-all-spi-pins-need-to-be-in-same-gpio-port-on-ncs-v2-4-2" /><item><title>RE: Does all SPI pins need to be in same GPIO port on ncs v2.4.2?</title><link>https://devzone.nordicsemi.com/thread/446529?ContentTypeID=1</link><pubDate>Mon, 18 Sep 2023 20:41:37 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:1488c321-c882-4ff8-8535-f1930b26781b</guid><dc:creator>Eyitope IO</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;I&amp;#39;m guessing something you read in the technical documentation wasn&amp;#39;t clear. For example, Figure 201 in nrF5340_PS_v1.3.pdf shows pins connected to `SPI slave transceiver`, as though they were dedicated pins.&lt;/p&gt;
&lt;p&gt;All GPIO pins can be individually mapped to different interface blocks. In your case, the interface block is SPI. If you&amp;#39;re using the libraries, then when you configure the SPI with the C code (let me know if you need code references) the GPIO pin you specify will be internally connected to the SPI circuitry.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;In short, all SPI pins do not need to be in the same GPIO port because each GPIO pin can be individually assigned for SPI.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;If you want more info, look at the PSEL.n register in the docs. You will see there that you can specify both a port and a pin.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>