https://devzone.nordicsemi.com/f/nordic-q-a/103915/behaviour-of-reset-pinHi, According to the PS (v1.3), the Reset Pin is only available to an output pin if the register below is set, but the reset value of this register is &quot;Disconnected&quot;. Is my understanding correct to think that before boot (when power is off), ifen-USTelligent Community 13Tue, 19 Sep 2023 11:37:04 GMThttps://devzone.nordicsemi.com/thread/446637?ContentTypeID=1Tue, 19 Sep 2023 11:37:04 GMT137ad170-7792-4731-bb38-c0d22fbe4515:86f5409a-c1d9-4763-83e2-136ded6ac1a7Jared<p>Hi,</p> <p>By default as you say, GPIO pin 18 will not be allocated to the RESET circuitry. This means that if initially P0.18 is held low and VCC goes high, the chip will boot, since P0.18 will have no effect. BUT, most if not all of our examples have the RESET pin enabled by default. This means that if the chip has already been flashed with such an example, the reset circuitry will have the sole access to the P0.18, and thus it will act as a reset pin.&nbsp;</p> <p>Also the only way of removing reset pin feature once it has been enabled is to erase the memory.</p> <p>regards</p> <p>Jared&nbsp;</p><div style="clear:both;"></div>