How can i control a rssi of the BL600 series ?

RE: How can i control a rssi of the BL600 series ?

Takayuki Yoshinaka — Fri, 27 Nov 2015 01:05:36 GMT

Thanks for a comment and sample codes.
Awesome ! I did it.

You've been very helpful.

RE: How can i control a rssi of the BL600 series ?

Ole Bauck — Thu, 26 Nov 2015 12:27:02 GMT

Try this instead:

nrf_gpio_cfg_output(20);
nrf_gpio_pin_clear(20);

which should be equal to this:

NRF_GPIO->PIN_CNF[20] = (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_GPIO->OUTCLR = (GPIO_OUTCLR_PIN20_Low << GPIO_OUTCLR_PIN20_Pos);

RE: How can i control a rssi of the BL600 series ?

Takayuki Yoshinaka — Thu, 26 Nov 2015 12:00:02 GMT

My develop environments:

nRF51 DK
nRF51822
nRF51 SDK 9.0.0
Using SoftDevice : s130

Thanks.

RE: How can i control a rssi of the BL600 series ?

Takayuki Yoshinaka — Thu, 26 Nov 2015 11:53:25 GMT

Sorry, i can't work it well.
My configuration of P0.20 is following:

NRF_GPIO->PIN_CNF[20] = (GPIO_PIN_CNF_SENSE_High << GPIO_PIN_CNF_SENSE_Pos)
                                        | (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos)
                                        | (NRF_GPIO_PIN_NOPULL << GPIO_PIN_CNF_PULL_Pos)
                                        | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
                                        | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);

I add this code into the 'uart_init' method and build it.
But, a rssi on the bl600 was not changed to the stronger value.
It was shown same rssi before my code was changed.

How do i configure pin P0.20 ?

RE: How can i control a rssi of the BL600 series ?

Takayuki Yoshinaka — Thu, 26 Nov 2015 06:46:33 GMT

Thanks for a comment ! I will try it. And i will report its results.

RE: How can i control a rssi of the BL600 series ?

Ole Bauck — Wed, 25 Nov 2015 12:49:21 GMT

Hi Yoshi

In the Laird BL600 module you can control if the VDD_PA pin is connected to the antenna circuit, this is done with a transistor and controlled through pin P0.20. Configure P0.20 as an output and set it low to connect the VDD_PA pin. If the VDD_PA is not connected the output power will be dramatically reduced (approx. 40dbm).