https://devzone.nordicsemi.com/f/nordic-q-a/105299/mcuboot-smp-external-flash-image-is-flashed-to-the-external-flash-but-fails-to-bootI am working on using MCUBOOT with external flash (MX25V16066M2I02) using SMP server sample https://developer.nordicsemi.com/nRF_Connect_SDK/doc/2.4.0/zephyr/samples/subsys/mgmt/mcumgr/smp_svr/README.html . I have tested the external flash by using iten-USTelligent Community 13Wed, 08 Nov 2023 12:38:03 GMThttps://devzone.nordicsemi.com/thread/454665?ContentTypeID=1Wed, 08 Nov 2023 12:38:03 GMT137ad170-7792-4731-bb38-c0d22fbe4515:428532f7-c905-48cd-b506-fe2e6da0a0fdAbdullah Al Abri<p>Hello,<br /><br />Thank you very much for the help. It worked, I moved the overlay file according to what you said. I have tried too put child image configuration file in /child_image/mcuboot/ folder but it didn&#39;t work at first, then I moved it file to /child_image/ folder and it worked.<br /><br />Regards,<br />Abdullah Al Abri</p><div style="clear:both;"></div>https://devzone.nordicsemi.com/thread/454438?ContentTypeID=1Tue, 07 Nov 2023 12:14:04 GMT137ad170-7792-4731-bb38-c0d22fbe4515:806d4ad9-3ff3-48d2-9712-65f84e97ec84Vidar Berg<p>Hello,</p> <p>It should work if you move the &#39;boards&#39; directory from /child_image/boards to /child_image/mcuboot/boards. The overlay will then be applied to the mcuboot build (remember to do a pristine build to ensure the build system detects this change)</p> <p><a href="https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrf/config_and_build/multi_image.html#permanent-configuration-changes-to-child-images">https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrf/config_and_build/multi_image.html#permanent-configuration-changes-to-child-images</a></p> <p>Best regards,</p> <p>Vidar</p><div style="clear:both;"></div>https://devzone.nordicsemi.com/thread/454084?ContentTypeID=1Sun, 05 Nov 2023 08:28:59 GMT137ad170-7792-4731-bb38-c0d22fbe4515:89f6f64b-789a-48ff-a886-dfaafbc35799Abdullah Al Abri<p>Hello again,<br /><br />This is the full sample file just in case.<br /><br />Regards, <br />Abdullah Al Abri</p> <p><a href="https://devzone.nordicsemi.com/cfs-file/__key/communityserver-discussions-components-files/4/6813.smp_5F00_svr.rar">devzone.nordicsemi.com/.../6813.smp_5F00_svr.rar</a></p><div style="clear:both;"></div>https://devzone.nordicsemi.com/thread/454079?ContentTypeID=1Sun, 05 Nov 2023 06:56:37 GMT137ad170-7792-4731-bb38-c0d22fbe4515:4062e1e2-c205-4467-ab1d-9d8ddbb0448dAbdullah Al Abri<p>Hello,<br />Firstly Thank you very much for your effort and response.<br /><br />I have checked the file it seems the overlay is not applied to the MCUBoot child image. However I am not sure how to solve this!<br /><br /><pre class="ui-code" data-mode="text"> chosen { zephyr,entropy = &amp;cryptocell; zephyr,flash-controller = &amp;flash_controller; zephyr,console = &amp;uart0; zephyr,shell-uart = &amp;uart0; zephyr,uart-mcumgr = &amp;uart0; zephyr,bt-mon-uart = &amp;uart0; zephyr,bt-c2h-uart = &amp;uart0; zephyr,sram = &amp;sram0; zephyr,flash = &amp;flash0; zephyr,code-partition = &amp;slot0_partition; zephyr,ieee802154 = &amp;ieee802154; };</pre></p> <p>This is chosen snippet from the&nbsp;<span>/mcuboot/zephyr/zephyr.dts file.<br /><br /><pre class="ui-code" data-mode="text">/dts-v1/; / { #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x1 &gt;; model = &quot;Nordic nRF52840 DK NRF52840&quot;; compatible = &quot;nordic,nrf52840-dk-nrf52840&quot;; chosen { zephyr,entropy = &amp;cryptocell; zephyr,flash-controller = &amp;flash_controller; zephyr,console = &amp;uart0; zephyr,shell-uart = &amp;uart0; zephyr,uart-mcumgr = &amp;uart0; zephyr,bt-mon-uart = &amp;uart0; zephyr,bt-c2h-uart = &amp;uart0; zephyr,sram = &amp;sram0; zephyr,flash = &amp;flash0; zephyr,code-partition = &amp;slot0_partition; zephyr,ieee802154 = &amp;ieee802154; }; aliases { led0 = &amp;led0; led1 = &amp;led1; led2 = &amp;led2; led3 = &amp;led3; pwm-led0 = &amp;pwm_led0; sw0 = &amp;button0; sw1 = &amp;button1; sw2 = &amp;button2; sw3 = &amp;button3; bootloader-led0 = &amp;led0; mcuboot-button0 = &amp;button0; mcuboot-led0 = &amp;led0; watchdog0 = &amp;wdt0; spi-flash0 = &amp;mx25r64; }; soc { #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x1 &gt;; compatible = &quot;nordic,nRF52840-QIAA&quot;, &quot;nordic,nRF52840&quot;, &quot;nordic,nRF52&quot;, &quot;simple-bus&quot;; interrupt-parent = &lt; &amp;nvic &gt;; ranges; nvic: interrupt-controller@e000e100 { #address-cells = &lt; 0x1 &gt;; compatible = &quot;arm,v7m-nvic&quot;; reg = &lt; 0xe000e100 0xc00 &gt;; interrupt-controller; #interrupt-cells = &lt; 0x2 &gt;; arm,num-irq-priority-bits = &lt; 0x3 &gt;; phandle = &lt; 0x1 &gt;; }; systick: timer@e000e010 { compatible = &quot;arm,armv7m-systick&quot;; reg = &lt; 0xe000e010 0x10 &gt;; status = &quot;disabled&quot;; }; ficr: ficr@10000000 { compatible = &quot;nordic,nrf-ficr&quot;; reg = &lt; 0x10000000 0x1000 &gt;; status = &quot;okay&quot;; }; uicr: uicr@10001000 { compatible = &quot;nordic,nrf-uicr&quot;; reg = &lt; 0x10001000 0x1000 &gt;; status = &quot;okay&quot;; }; sram0: memory@20000000 { compatible = &quot;mmio-sram&quot;; reg = &lt; 0x20000000 0x40000 &gt;; }; clock: clock@40000000 { compatible = &quot;nordic,nrf-clock&quot;; reg = &lt; 0x40000000 0x1000 &gt;; interrupts = &lt; 0x0 0x1 &gt;; status = &quot;okay&quot;; }; power: power@40000000 { compatible = &quot;nordic,nrf-power&quot;; reg = &lt; 0x40000000 0x1000 &gt;; interrupts = &lt; 0x0 0x1 &gt;; status = &quot;okay&quot;; #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x1 &gt;; gpregret1: gpregret1@4000051c { compatible = &quot;nordic,nrf-gpregret&quot;; reg = &lt; 0x4000051c 0x1 &gt;; status = &quot;okay&quot;; }; gpregret2: gpregret2@40000520 { compatible = &quot;nordic,nrf-gpregret&quot;; reg = &lt; 0x40000520 0x1 &gt;; status = &quot;okay&quot;; }; }; radio: radio@40001000 { compatible = &quot;nordic,nrf-radio&quot;; reg = &lt; 0x40001000 0x1000 &gt;; interrupts = &lt; 0x1 0x1 &gt;; status = &quot;okay&quot;; ieee802154-supported; ble-2mbps-supported; ble-coded-phy-supported; tx-high-power-supported; ieee802154: ieee802154 { compatible = &quot;nordic,nrf-ieee802154&quot;; status = &quot;okay&quot;; }; }; uart0: uart@40002000 { compatible = &quot;nordic,nrf-uarte&quot;; reg = &lt; 0x40002000 0x1000 &gt;; interrupts = &lt; 0x2 0x1 &gt;; status = &quot;okay&quot;; current-speed = &lt; 0x1c200 &gt;; pinctrl-0 = &lt; &amp;uart0_default &gt;; pinctrl-1 = &lt; &amp;uart0_sleep &gt;; pinctrl-names = &quot;default&quot;, &quot;sleep&quot;; }; i2c0: arduino_i2c: i2c@40003000 { compatible = &quot;nordic,nrf-twi&quot;; #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x0 &gt;; reg = &lt; 0x40003000 0x1000 &gt;; clock-frequency = &lt; 0x186a0 &gt;; interrupts = &lt; 0x3 0x1 &gt;; status = &quot;okay&quot;; pinctrl-0 = &lt; &amp;i2c0_default &gt;; pinctrl-1 = &lt; &amp;i2c0_sleep &gt;; pinctrl-names = &quot;default&quot;, &quot;sleep&quot;; }; spi0: spi@40003000 { compatible = &quot;nordic,nrf-spi&quot;; #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x0 &gt;; reg = &lt; 0x40003000 0x1000 &gt;; interrupts = &lt; 0x3 0x1 &gt;; max-frequency = &lt; 0x7a1200 &gt;; easydma-maxcnt-bits = &lt; 0x10 &gt;; status = &quot;disabled&quot;; pinctrl-0 = &lt; &amp;spi0_default &gt;; pinctrl-1 = &lt; &amp;spi0_sleep &gt;; pinctrl-names = &quot;default&quot;, &quot;sleep&quot;; }; i2c1: i2c@40004000 { compatible = &quot;nordic,nrf-twi&quot;; #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x0 &gt;; reg = &lt; 0x40004000 0x1000 &gt;; clock-frequency = &lt; 0x186a0 &gt;; interrupts = &lt; 0x4 0x1 &gt;; status = &quot;disabled&quot;; pinctrl-0 = &lt; &amp;i2c1_default &gt;; pinctrl-1 = &lt; &amp;i2c1_sleep &gt;; pinctrl-names = &quot;default&quot;, &quot;sleep&quot;; }; spi1: spi@40004000 { compatible = &quot;nordic,nrf-spi&quot;; #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x0 &gt;; reg = &lt; 0x40004000 0x1000 &gt;; interrupts = &lt; 0x4 0x1 &gt;; max-frequency = &lt; 0x7a1200 &gt;; easydma-maxcnt-bits = &lt; 0x10 &gt;; status = &quot;okay&quot;; pinctrl-0 = &lt; &amp;spi1_default &gt;; pinctrl-1 = &lt; &amp;spi1_sleep &gt;; pinctrl-names = &quot;default&quot;, &quot;sleep&quot;; }; nfct: nfct@40005000 { compatible = &quot;nordic,nrf-nfct&quot;; reg = &lt; 0x40005000 0x1000 &gt;; interrupts = &lt; 0x5 0x1 &gt;; status = &quot;okay&quot;; }; gpiote: gpiote@40006000 { compatible = &quot;nordic,nrf-gpiote&quot;; reg = &lt; 0x40006000 0x1000 &gt;; interrupts = &lt; 0x6 0x5 &gt;; status = &quot;okay&quot;; }; adc: adc@40007000 { compatible = &quot;nordic,nrf-saadc&quot;; reg = &lt; 0x40007000 0x1000 &gt;; interrupts = &lt; 0x7 0x1 &gt;; status = &quot;okay&quot;; #io-channel-cells = &lt; 0x1 &gt;; phandle = &lt; 0x1b &gt;; }; timer0: timer@40008000 { compatible = &quot;nordic,nrf-timer&quot;; status = &quot;disabled&quot;; reg = &lt; 0x40008000 0x1000 &gt;; cc-num = &lt; 0x4 &gt;; max-bit-width = &lt; 0x20 &gt;; interrupts = &lt; 0x8 0x1 &gt;; prescaler = &lt; 0x0 &gt;; }; timer1: timer@40009000 { compatible = &quot;nordic,nrf-timer&quot;; status = &quot;disabled&quot;; reg = &lt; 0x40009000 0x1000 &gt;; cc-num = &lt; 0x4 &gt;; max-bit-width = &lt; 0x20 &gt;; interrupts = &lt; 0x9 0x1 &gt;; prescaler = &lt; 0x0 &gt;; }; timer2: timer@4000a000 { compatible = &quot;nordic,nrf-timer&quot;; status = &quot;disabled&quot;; reg = &lt; 0x4000a000 0x1000 &gt;; cc-num = &lt; 0x4 &gt;; max-bit-width = &lt; 0x20 &gt;; interrupts = &lt; 0xa 0x1 &gt;; prescaler = &lt; 0x0 &gt;; phandle = &lt; 0x17 &gt;; }; rtc0: rtc@4000b000 { compatible = &quot;nordic,nrf-rtc&quot;; reg = &lt; 0x4000b000 0x1000 &gt;; cc-num = &lt; 0x3 &gt;; interrupts = &lt; 0xb 0x1 &gt;; status = &quot;disabled&quot;; clock-frequency = &lt; 0x8000 &gt;; prescaler = &lt; 0x1 &gt;; }; temp: temp@4000c000 { compatible = &quot;nordic,nrf-temp&quot;; reg = &lt; 0x4000c000 0x1000 &gt;; interrupts = &lt; 0xc 0x1 &gt;; status = &quot;okay&quot;; }; rng: random@4000d000 { compatible = &quot;nordic,nrf-rng&quot;; reg = &lt; 0x4000d000 0x1000 &gt;; interrupts = &lt; 0xd 0x1 &gt;; status = &quot;okay&quot;; }; ecb: ecb@4000e000 { compatible = &quot;nordic,nrf-ecb&quot;; reg = &lt; 0x4000e000 0x1000 &gt;; interrupts = &lt; 0xe 0x1 &gt;; status = &quot;okay&quot;; }; ccm: ccm@4000f000 { compatible = &quot;nordic,nrf-ccm&quot;; reg = &lt; 0x4000f000 0x1000 &gt;; interrupts = &lt; 0xf 0x1 &gt;; length-field-length-8-bits; status = &quot;okay&quot;; }; wdt: wdt0: watchdog@40010000 { compatible = &quot;nordic,nrf-wdt&quot;; reg = &lt; 0x40010000 0x1000 &gt;; interrupts = &lt; 0x10 0x1 &gt;; status = &quot;okay&quot;; }; rtc1: rtc@40011000 { compatible = &quot;nordic,nrf-rtc&quot;; reg = &lt; 0x40011000 0x1000 &gt;; cc-num = &lt; 0x4 &gt;; interrupts = &lt; 0x11 0x1 &gt;; status = &quot;disabled&quot;; clock-frequency = &lt; 0x8000 &gt;; prescaler = &lt; 0x1 &gt;; }; qdec: qdec0: qdec@40012000 { compatible = &quot;nordic,nrf-qdec&quot;; reg = &lt; 0x40012000 0x1000 &gt;; interrupts = &lt; 0x12 0x1 &gt;; status = &quot;disabled&quot;; }; comp: comparator@40013000 { compatible = &quot;nordic,nrf-comp&quot;; reg = &lt; 0x40013000 0x1000 &gt;; interrupts = &lt; 0x13 0x1 &gt;; status = &quot;disabled&quot;; #io-channel-cells = &lt; 0x1 &gt;; }; egu0: swi0: egu@40014000 { compatible = &quot;nordic,nrf-egu&quot;, &quot;nordic,nrf-swi&quot;; reg = &lt; 0x40014000 0x1000 &gt;; interrupts = &lt; 0x14 0x1 &gt;; status = &quot;okay&quot;; }; egu1: swi1: egu@40015000 { compatible = &quot;nordic,nrf-egu&quot;, &quot;nordic,nrf-swi&quot;; reg = &lt; 0x40015000 0x1000 &gt;; interrupts = &lt; 0x15 0x1 &gt;; status = &quot;okay&quot;; }; egu2: swi2: egu@40016000 { compatible = &quot;nordic,nrf-egu&quot;, &quot;nordic,nrf-swi&quot;; reg = &lt; 0x40016000 0x1000 &gt;; interrupts = &lt; 0x16 0x1 &gt;; status = &quot;okay&quot;; }; egu3: swi3: egu@40017000 { compatible = &quot;nordic,nrf-egu&quot;, &quot;nordic,nrf-swi&quot;; reg = &lt; 0x40017000 0x1000 &gt;; interrupts = &lt; 0x17 0x1 &gt;; status = &quot;okay&quot;; }; egu4: swi4: egu@40018000 { compatible = &quot;nordic,nrf-egu&quot;, &quot;nordic,nrf-swi&quot;; reg = &lt; 0x40018000 0x1000 &gt;; interrupts = &lt; 0x18 0x1 &gt;; status = &quot;okay&quot;; }; egu5: swi5: egu@40019000 { compatible = &quot;nordic,nrf-egu&quot;, &quot;nordic,nrf-swi&quot;; reg = &lt; 0x40019000 0x1000 &gt;; interrupts = &lt; 0x19 0x1 &gt;; status = &quot;okay&quot;; }; timer3: timer@4001a000 { compatible = &quot;nordic,nrf-timer&quot;; status = &quot;disabled&quot;; reg = &lt; 0x4001a000 0x1000 &gt;; cc-num = &lt; 0x6 &gt;; max-bit-width = &lt; 0x20 &gt;; interrupts = &lt; 0x1a 0x1 &gt;; prescaler = &lt; 0x0 &gt;; }; timer4: timer@4001b000 { compatible = &quot;nordic,nrf-timer&quot;; status = &quot;disabled&quot;; reg = &lt; 0x4001b000 0x1000 &gt;; cc-num = &lt; 0x6 &gt;; max-bit-width = &lt; 0x20 &gt;; interrupts = &lt; 0x1b 0x1 &gt;; prescaler = &lt; 0x0 &gt;; }; pwm0: pwm@4001c000 { compatible = &quot;nordic,nrf-pwm&quot;; reg = &lt; 0x4001c000 0x1000 &gt;; interrupts = &lt; 0x1c 0x1 &gt;; status = &quot;okay&quot;; #pwm-cells = &lt; 0x3 &gt;; pinctrl-0 = &lt; &amp;pwm0_default &gt;; pinctrl-1 = &lt; &amp;pwm0_sleep &gt;; pinctrl-names = &quot;default&quot;, &quot;sleep&quot;; phandle = &lt; 0x19 &gt;; }; pdm0: pdm@4001d000 { compatible = &quot;nordic,nrf-pdm&quot;; reg = &lt; 0x4001d000 0x1000 &gt;; interrupts = &lt; 0x1d 0x1 &gt;; status = &quot;disabled&quot;; }; acl: acl@4001e000 { compatible = &quot;nordic,nrf-acl&quot;; reg = &lt; 0x4001e000 0x1000 &gt;; status = &quot;okay&quot;; }; flash_controller: flash-controller@4001e000 { compatible = &quot;nordic,nrf52-flash-controller&quot;; reg = &lt; 0x4001e000 0x1000 &gt;; partial-erase; #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x1 &gt;; flash0: flash@0 { compatible = &quot;soc-nv-flash&quot;; erase-block-size = &lt; 0x1000 &gt;; write-block-size = &lt; 0x4 &gt;; reg = &lt; 0x0 0x100000 &gt;; partitions { compatible = &quot;fixed-partitions&quot;; #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x1 &gt;; boot_partition: partition@0 { label = &quot;mcuboot&quot;; reg = &lt; 0x0 0xc000 &gt;; }; slot0_partition: partition@c000 { label = &quot;image-0&quot;; reg = &lt; 0xc000 0x76000 &gt;; }; slot1_partition: partition@82000 { label = &quot;image-1&quot;; reg = &lt; 0x82000 0x76000 &gt;; }; storage_partition: partition@f8000 { label = &quot;storage&quot;; reg = &lt; 0xf8000 0x8000 &gt;; }; }; }; }; ppi: ppi@4001f000 { compatible = &quot;nordic,nrf-ppi&quot;; reg = &lt; 0x4001f000 0x1000 &gt;; status = &quot;okay&quot;; }; mwu: mwu@40020000 { compatible = &quot;nordic,nrf-mwu&quot;; reg = &lt; 0x40020000 0x1000 &gt;; status = &quot;okay&quot;; }; pwm1: pwm@40021000 { compatible = &quot;nordic,nrf-pwm&quot;; reg = &lt; 0x40021000 0x1000 &gt;; interrupts = &lt; 0x21 0x1 &gt;; status = &quot;disabled&quot;; #pwm-cells = &lt; 0x3 &gt;; }; pwm2: pwm@40022000 { compatible = &quot;nordic,nrf-pwm&quot;; reg = &lt; 0x40022000 0x1000 &gt;; interrupts = &lt; 0x22 0x1 &gt;; status = &quot;disabled&quot;; #pwm-cells = &lt; 0x3 &gt;; }; spi2: spi@40023000 { compatible = &quot;nordic,nrf-spi&quot;; #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x0 &gt;; reg = &lt; 0x40023000 0x1000 &gt;; interrupts = &lt; 0x23 0x1 &gt;; max-frequency = &lt; 0x7a1200 &gt;; easydma-maxcnt-bits = &lt; 0x10 &gt;; status = &quot;disabled&quot;; pinctrl-0 = &lt; &amp;spi2_default &gt;; pinctrl-1 = &lt; &amp;spi2_sleep &gt;; pinctrl-names = &quot;default&quot;, &quot;sleep&quot;; }; rtc2: rtc@40024000 { compatible = &quot;nordic,nrf-rtc&quot;; reg = &lt; 0x40024000 0x1000 &gt;; cc-num = &lt; 0x4 &gt;; interrupts = &lt; 0x24 0x1 &gt;; status = &quot;disabled&quot;; clock-frequency = &lt; 0x8000 &gt;; prescaler = &lt; 0x1 &gt;; }; i2s0: i2s@40025000 { compatible = &quot;nordic,nrf-i2s&quot;; #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x0 &gt;; reg = &lt; 0x40025000 0x1000 &gt;; interrupts = &lt; 0x25 0x1 &gt;; status = &quot;disabled&quot;; }; usbd: zephyr_udc0: usbd@40027000 { compatible = &quot;nordic,nrf-usbd&quot;; reg = &lt; 0x40027000 0x1000 &gt;; interrupts = &lt; 0x27 0x1 &gt;; num-bidir-endpoints = &lt; 0x1 &gt;; num-in-endpoints = &lt; 0x7 &gt;; num-out-endpoints = &lt; 0x7 &gt;; num-isoin-endpoints = &lt; 0x1 &gt;; num-isoout-endpoints = &lt; 0x1 &gt;; status = &quot;okay&quot;; cdc_acm_uart0: cdc_acm_uart0 { compatible = &quot;zephyr,cdc-acm-uart&quot;; }; }; uart1: arduino_serial: uart@40028000 { compatible = &quot;nordic,nrf-uarte&quot;; reg = &lt; 0x40028000 0x1000 &gt;; interrupts = &lt; 0x28 0x1 &gt;; status = &quot;disabled&quot;; current-speed = &lt; 0x1c200 &gt;; pinctrl-0 = &lt; &amp;uart1_default &gt;; pinctrl-1 = &lt; &amp;uart1_sleep &gt;; pinctrl-names = &quot;default&quot;, &quot;sleep&quot;; }; qspi: qspi@40029000 { compatible = &quot;nordic,nrf-qspi&quot;; #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x0 &gt;; reg = &lt; 0x40029000 0x1000 &gt;, &lt; 0x12000000 0x8000000 &gt;; reg-names = &quot;qspi&quot;, &quot;qspi_mm&quot;; interrupts = &lt; 0x29 0x1 &gt;; status = &quot;okay&quot;; pinctrl-0 = &lt; &amp;qspi_default &gt;; pinctrl-1 = &lt; &amp;qspi_sleep &gt;; pinctrl-names = &quot;default&quot;, &quot;sleep&quot;; mx25r64: mx25r6435f@0 { compatible = &quot;nordic,qspi-nor&quot;; reg = &lt; 0x0 &gt;; writeoc = &quot;pp4io&quot;; readoc = &quot;read4io&quot;; sck-frequency = &lt; 0x7a1200 &gt;; jedec-id = [ C2 28 17 ]; sfdp-bfp = [ E5 20 F1 FF FF FF FF 03 44 EB 08 6B 08 3B 04 BB EE FF FF FF FF FF 00 FF FF FF 00 FF 0C 20 0F 52 10 D8 00 FF 23 72 F5 00 82 ED 04 CC 44 83 68 44 30 B0 30 B0 F7 C4 D5 5C 00 BE 29 FF F0 D0 FF FF ]; size = &lt; 0x4000000 &gt;; has-dpd; t-enter-dpd = &lt; 0x2710 &gt;; t-exit-dpd = &lt; 0x88b8 &gt;; }; }; pwm3: pwm@4002d000 { compatible = &quot;nordic,nrf-pwm&quot;; reg = &lt; 0x4002d000 0x1000 &gt;; interrupts = &lt; 0x2d 0x1 &gt;; status = &quot;disabled&quot;; #pwm-cells = &lt; 0x3 &gt;; }; spi3: arduino_spi: spi@4002f000 { compatible = &quot;nordic,nrf-spim&quot;; #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x0 &gt;; reg = &lt; 0x4002f000 0x1000 &gt;; interrupts = &lt; 0x2f 0x1 &gt;; max-frequency = &lt; 0x1e84800 &gt;; easydma-maxcnt-bits = &lt; 0x10 &gt;; rx-delay-supported; rx-delay = &lt; 0x2 &gt;; status = &quot;okay&quot;; cs-gpios = &lt; &amp;arduino_header 0x10 0x1 &gt;; pinctrl-0 = &lt; &amp;spi3_default &gt;; pinctrl-1 = &lt; &amp;spi3_sleep &gt;; pinctrl-names = &quot;default&quot;, &quot;sleep&quot;; }; gpio0: gpio@50000000 { compatible = &quot;nordic,nrf-gpio&quot;; gpio-controller; reg = &lt; 0x50000000 0x200 0x50000500 0x300 &gt;; #gpio-cells = &lt; 0x2 &gt;; status = &quot;okay&quot;; port = &lt; 0x0 &gt;; phandle = &lt; 0x18 &gt;; }; gpio1: gpio@50000300 { compatible = &quot;nordic,nrf-gpio&quot;; gpio-controller; reg = &lt; 0x50000300 0x200 0x50000800 0x300 &gt;; #gpio-cells = &lt; 0x2 &gt;; ngpios = &lt; 0x10 &gt;; status = &quot;okay&quot;; port = &lt; 0x1 &gt;; phandle = &lt; 0x1a &gt;; }; cryptocell: crypto@5002a000 { compatible = &quot;nordic,nrf-cc310&quot;; reg = &lt; 0x5002a000 0x1000 &gt;; status = &quot;okay&quot;; #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x1 &gt;; cryptocell310: crypto@5002b000 { compatible = &quot;arm,cryptocell-310&quot;; reg = &lt; 0x5002b000 0x1000 &gt;; interrupts = &lt; 0x2a 0x1 &gt;; }; }; }; pinctrl: pin-controller { compatible = &quot;nordic,nrf-pinctrl&quot;; uart0_default: uart0_default { phandle = &lt; 0x2 &gt;; group1 { psels = &lt; 0x6 &gt;, &lt; 0x20005 &gt;; }; group2 { psels = &lt; 0x10008 &gt;, &lt; 0x30007 &gt;; bias-pull-up; }; }; uart0_sleep: uart0_sleep { phandle = &lt; 0x3 &gt;; group1 { psels = &lt; 0x6 &gt;, &lt; 0x10008 &gt;, &lt; 0x20005 &gt;, &lt; 0x30007 &gt;; low-power-enable; }; }; uart1_default: uart1_default { phandle = &lt; 0x10 &gt;; group1 { psels = &lt; 0x10021 &gt;; bias-pull-up; }; group2 { psels = &lt; 0x22 &gt;; }; }; uart1_sleep: uart1_sleep { phandle = &lt; 0x11 &gt;; group1 { psels = &lt; 0x10021 &gt;, &lt; 0x22 &gt;; low-power-enable; }; }; i2c0_default: i2c0_default { phandle = &lt; 0x4 &gt;; group1 { psels = &lt; 0xc001a &gt;, &lt; 0xb001b &gt;; }; }; i2c0_sleep: i2c0_sleep { phandle = &lt; 0x5 &gt;; group1 { psels = &lt; 0xc001a &gt;, &lt; 0xb001b &gt;; low-power-enable; }; }; i2c1_default: i2c1_default { phandle = &lt; 0x8 &gt;; group1 { psels = &lt; 0xc001e &gt;, &lt; 0xb001f &gt;; }; }; i2c1_sleep: i2c1_sleep { phandle = &lt; 0x9 &gt;; group1 { psels = &lt; 0xc001e &gt;, &lt; 0xb001f &gt;; low-power-enable; }; }; pwm0_default: pwm0_default { phandle = &lt; 0xc &gt;; group1 { psels = &lt; 0x16000d &gt;; nordic,invert; }; }; pwm0_sleep: pwm0_sleep { phandle = &lt; 0xd &gt;; group1 { psels = &lt; 0x16000d &gt;; low-power-enable; }; }; spi0_default: spi0_default { phandle = &lt; 0x6 &gt;; group1 { psels = &lt; 0x4001b &gt;, &lt; 0x5001a &gt;, &lt; 0x6001d &gt;; }; }; spi0_sleep: spi0_sleep { phandle = &lt; 0x7 &gt;; group1 { psels = &lt; 0x4001b &gt;, &lt; 0x5001a &gt;, &lt; 0x6001d &gt;; low-power-enable; }; }; spi1_default: spi1_default { phandle = &lt; 0xa &gt;; group1 { psels = &lt; 0x4001f &gt;, &lt; 0x5001e &gt;, &lt; 0x60028 &gt;; }; }; spi1_sleep: spi1_sleep { phandle = &lt; 0xb &gt;; group1 { psels = &lt; 0x4001f &gt;, &lt; 0x5001e &gt;, &lt; 0x60028 &gt;; low-power-enable; }; }; spi2_default: spi2_default { phandle = &lt; 0xe &gt;; group1 { psels = &lt; 0x40013 &gt;, &lt; 0x50014 &gt;, &lt; 0x60015 &gt;; }; }; spi2_sleep: spi2_sleep { phandle = &lt; 0xf &gt;; group1 { psels = &lt; 0x40013 &gt;, &lt; 0x50014 &gt;, &lt; 0x60015 &gt;; low-power-enable; }; }; qspi_default: qspi_default { phandle = &lt; 0x12 &gt;; group1 { psels = &lt; 0x1d0013 &gt;, &lt; 0x1f0014 &gt;, &lt; 0x200015 &gt;, &lt; 0x210016 &gt;, &lt; 0x220017 &gt;, &lt; 0x1e0011 &gt;; nordic,drive-mode = &lt; 0x3 &gt;; }; }; qspi_sleep: qspi_sleep { phandle = &lt; 0x13 &gt;; group1 { psels = &lt; 0x1d0013 &gt;, &lt; 0x1f0014 &gt;, &lt; 0x200015 &gt;, &lt; 0x210016 &gt;, &lt; 0x220017 &gt;; low-power-enable; }; group2 { psels = &lt; 0x1e0011 &gt;; low-power-enable; bias-pull-up; }; }; spi3_default: spi3_default { phandle = &lt; 0x15 &gt;; group1 { psels = &lt; 0x4002f &gt;, &lt; 0x6002e &gt;, &lt; 0x5002d &gt;; }; }; spi3_sleep: spi3_sleep { phandle = &lt; 0x16 &gt;; group1 { psels = &lt; 0x4002f &gt;, &lt; 0x6002e &gt;, &lt; 0x5002d &gt;; low-power-enable; }; }; }; rng_hci: entropy_bt_hci { compatible = &quot;zephyr,bt-hci-entropy&quot;; status = &quot;okay&quot;; }; cpus { #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x0 &gt;; cpu@0 { device_type = &quot;cpu&quot;; compatible = &quot;arm,cortex-m4f&quot;; reg = &lt; 0x0 &gt;; #address-cells = &lt; 0x1 &gt;; #size-cells = &lt; 0x1 &gt;; itm: itm@e0000000 { compatible = &quot;arm,armv7m-itm&quot;; reg = &lt; 0xe0000000 0x1000 &gt;; swo-ref-frequency = &lt; 0x1e84800 &gt;; }; }; }; sw_pwm: sw-pwm { compatible = &quot;nordic,nrf-sw-pwm&quot;; status = &quot;disabled&quot;; generator = &lt; &amp;timer2 &gt;; clock-prescaler = &lt; 0x0 &gt;; #pwm-cells = &lt; 0x3 &gt;; }; leds { compatible = &quot;gpio-leds&quot;; led0: led_0 { gpios = &lt; &amp;gpio0 0xd 0x1 &gt;; label = &quot;Green LED 0&quot;; }; led1: led_1 { gpios = &lt; &amp;gpio0 0xe 0x1 &gt;; label = &quot;Green LED 1&quot;; }; led2: led_2 { gpios = &lt; &amp;gpio0 0xf 0x1 &gt;; label = &quot;Green LED 2&quot;; }; led3: led_3 { gpios = &lt; &amp;gpio0 0x10 0x1 &gt;; label = &quot;Green LED 3&quot;; }; }; pwmleds { compatible = &quot;pwm-leds&quot;; pwm_led0: pwm_led_0 { pwms = &lt; &amp;pwm0 0x0 0x1312d00 0x1 &gt;; }; }; buttons { compatible = &quot;gpio-keys&quot;; button0: button_0 { gpios = &lt; &amp;gpio0 0xb 0x11 &gt;; label = &quot;Push button switch 0&quot;; }; button1: button_1 { gpios = &lt; &amp;gpio0 0xc 0x11 &gt;; label = &quot;Push button switch 1&quot;; }; button2: button_2 { gpios = &lt; &amp;gpio0 0x18 0x11 &gt;; label = &quot;Push button switch 2&quot;; }; button3: button_3 { gpios = &lt; &amp;gpio0 0x19 0x11 &gt;; label = &quot;Push button switch 3&quot;; }; }; arduino_header: connector { compatible = &quot;arduino-header-r3&quot;; #gpio-cells = &lt; 0x2 &gt;; gpio-map-mask = &lt; 0xffffffff 0xffffffc0 &gt;; gpio-map-pass-thru = &lt; 0x0 0x3f &gt;; gpio-map = &lt; 0x0 0x0 &amp;gpio0 0x3 0x0 &gt;, &lt; 0x1 0x0 &amp;gpio0 0x4 0x0 &gt;, &lt; 0x2 0x0 &amp;gpio0 0x1c 0x0 &gt;, &lt; 0x3 0x0 &amp;gpio0 0x1d 0x0 &gt;, &lt; 0x4 0x0 &amp;gpio0 0x1e 0x0 &gt;, &lt; 0x5 0x0 &amp;gpio0 0x1f 0x0 &gt;, &lt; 0x6 0x0 &amp;gpio1 0x1 0x0 &gt;, &lt; 0x7 0x0 &amp;gpio1 0x2 0x0 &gt;, &lt; 0x8 0x0 &amp;gpio1 0x3 0x0 &gt;, &lt; 0x9 0x0 &amp;gpio1 0x4 0x0 &gt;, &lt; 0xa 0x0 &amp;gpio1 0x5 0x0 &gt;, &lt; 0xb 0x0 &amp;gpio1 0x6 0x0 &gt;, &lt; 0xc 0x0 &amp;gpio1 0x7 0x0 &gt;, &lt; 0xd 0x0 &amp;gpio1 0x8 0x0 &gt;, &lt; 0xe 0x0 &amp;gpio1 0xa 0x0 &gt;, &lt; 0xf 0x0 &amp;gpio1 0xb 0x0 &gt;, &lt; 0x10 0x0 &amp;gpio1 0xc 0x0 &gt;, &lt; 0x11 0x0 &amp;gpio1 0xd 0x0 &gt;, &lt; 0x12 0x0 &amp;gpio1 0xe 0x0 &gt;, &lt; 0x13 0x0 &amp;gpio1 0xf 0x0 &gt;, &lt; 0x14 0x0 &amp;gpio0 0x1a 0x0 &gt;, &lt; 0x15 0x0 &amp;gpio0 0x1b 0x0 &gt;; phandle = &lt; 0x14 &gt;; }; arduino_adc: analog-connector { compatible = &quot;arduino,uno-adc&quot;; #io-channel-cells = &lt; 0x1 &gt;; io-channel-map = &lt; 0x0 &amp;adc 0x1 &gt;, &lt; 0x1 &amp;adc 0x2 &gt;, &lt; 0x2 &amp;adc 0x4 &gt;, &lt; 0x3 &amp;adc 0x5 &gt;, &lt; 0x4 &amp;adc 0x6 &gt;, &lt; 0x5 &amp;adc 0x7 &gt;; }; }; </pre><br /></span></p> <p><span>Full&nbsp;/mcuboot/zephyr/zephyr.dts file.</span></p><div style="clear:both;"></div>https://devzone.nordicsemi.com/thread/453806?ContentTypeID=1Thu, 02 Nov 2023 15:32:35 GMT137ad170-7792-4731-bb38-c0d22fbe4515:2528b9a4-6a9b-45c6-810c-f854c5ab5a70Vidar Berg<p>Hello,</p> <p>Please confirm that the overlay file has also been applied to the MCUBoot child image, and not just the application. You can do this by inspecting the generated &lt;build dir&gt;/mcuboot/zephyr/zephyr.dts file.</p> <p>Best regards,</p> <p>Vidar</p><div style="clear:both;"></div>