Hi,Nordic:
nrf5340 gpio pins have clamping diode?Is there a section in the specification that is introduced first,
Thanks!
Hi,Nordic:
Thanks!
This is rarely given by any manufacturer, I see it asked quite a lot in Microchip forums.
If I understand it the ESD is actually a byproduct of using a PMOS high switch but I could have that wrong. Roughly they start conducting at 0.3V but that still doesn't mean you can go above Vdd on the pins. Generally we're talking uA through it. You might get a mA or even a few but for how long nobody knows as ambient temperature and manufacturing tolerances come into play.
The best advice I've found is a) don't use the 'feature' unless you have to and b) if you do use it on occasion then go large on the resistance.
As an example I have a 32V AC signal and I capture it using GPIOTE using a 732k/732k divider. That's 16V through each one, Vdd is 3.6V, so 12.4V/732k = 1.69mA peak. It works and has done long term but even this I think is high and the next PCB revision will go to 1Meg.
This is rarely given by any manufacturer, I see it asked quite a lot in Microchip forums.
If I understand it the ESD is actually a byproduct of using a PMOS high switch but I could have that wrong. Roughly they start conducting at 0.3V but that still doesn't mean you can go above Vdd on the pins. Generally we're talking uA through it. You might get a mA or even a few but for how long nobody knows as ambient temperature and manufacturing tolerances come into play.
The best advice I've found is a) don't use the 'feature' unless you have to and b) if you do use it on occasion then go large on the resistance.
As an example I have a 32V AC signal and I capture it using GPIOTE using a 732k/732k divider. That's 16V through each one, Vdd is 3.6V, so 12.4V/732k = 1.69mA peak. It works and has done long term but even this I think is high and the next PCB revision will go to 1Meg.