Comparator unusable in DCDC mode

RE: Comparator unusable in DCDC mode

snoopy20 — Tue, 12 Dec 2023 21:56:15 GMT

Hi Simon,

I've actually been playing with this again today, I'll report back any findings.

RE: Comparator unusable in DCDC mode

Simonr — Mon, 11 Dec 2023 12:01:26 GMT

I talked to our experts on the matter about this, and they find it a bit strange that the DCDC is coming in on the COMP. The DCDC powers the 1.26V net and the COMP on VDD only. Their suggestion is to turn on the SAADC and set TACQ = 5µs to force the DCDC not to go into its refresh mode.

Best regards,

Simon

RE: Comparator unusable in DCDC mode

snoopy20 — Thu, 07 Dec 2023 14:03:53 GMT

It's difficult to say because the noise is internal and I'm using minimal hysteresis. What I'm doing is taking a 5V down through a divider. I'm then using it as an UVLO where it controls three external systems responsible for causing the UVLO, and shut them down until it corrects.

I expect the DCDC is effecting the reference ever so slightly, but that's all it will take. I switched to 2V4 and it does seem better, not sure if it's stable enough but to be honest it's easier just to use the LDO.

It's also to be expected really, DCDC causes noise.

/* (using 100/320k resistor ratio)
  5.25v , 1.641
  4.9v, 1.531 
  4.8v, 1.5
  4.7v, 1.469
  4.65v, 1.453
  4.6v, 1.437 
  4.5v , 1.406
*/

#define UVLO_REFERENCE COMP_REFSEL_REFSEL_Int2V4
#define UVLO_HYSTERESIS_UP (UVLO_HYSTERESIS_DOWN+2)
#define UVLO_HYSTERESIS_DOWN 37 // 1.437/2.4 * 63

RE: Comparator unusable in DCDC mode

Simonr — Thu, 07 Dec 2023 12:40:32 GMT

Hi Andrew

I have reported your errata suggestion internally and we're now reviewing it.

Back to the original issue. So it is the reference voltage you see this noise on, correct? How much noise are we talking about here, or how much are the measured voltages off compared to the expected values? Does increasing the ref. voltage from 1.8 to 2.4 help and make the readings usable, or are they still not sufficiently accurate? Please provide any further information you think might be useful, as the expert that would know more about this is OoO until next week.

Best regards,

Simon

RE: Comparator unusable in DCDC mode

snoopy20 — Tue, 05 Dec 2023 14:11:20 GMT

Hi Simon, it's separate to the issue sorry, but related to the COMP.

Worth reporting as it definitely exists, and the workaround works.

SOC is 810v2, SDK doesn't apply, I use the registers directly as provided by nrf52810.h.

The original issue I wouldn't think is errata per say, I'd sort of expect the DC-DC to induce additional noise in the reference voltages. I have also switched from the 1.8v to the 2.4v and it appears to be better in this regard.

Regards,

Andrew

RE: Comparator unusable in DCDC mode

Simonr — Tue, 05 Dec 2023 14:04:59 GMT

Hi Andrew

Is this a workaround to you initial problem as well or a workaround to a new issue you found? If you want me to report it internally so we can log it as a known error (errata), please provide the SoC revision and SDK you're using for developing here.

If you need any further assistance or not, please let me know.

Best regards,

Simon

RE: Comparator unusable in DCDC mode

snoopy20 — Mon, 04 Dec 2023 15:50:27 GMT

Hi Simon,

It's not as bad as I first thought but still not useable. It doesn't help that I have the limits so close together I think.

I can't add a capacitor, that would be a RC and reduce the reaction time, which must be quick as it's fed to two output pins and shuts down hardware causing the uvlo condition.

I have also found new errata and a workaround.

If the EVENT_DOWN and EVENT_UP are wired though PPI to GPIOTE_TASK_SET and CLR then eventually at some point a PPI will skip and the output will be inverted.

The solution is to use EVENT_CROSS wired through PPI to GPIOTE_TASK_OUT with polarity set to toggle. One must first ensure the output and comparator are in sync using EVENT_SAMPLE and then starting GPIOTE with default output to match, but then it works great and no skip is observed.

This is with the comparator in High/Fast mode and a signal around about the 1MHz region.

Regards,

Andrew

RE: Comparator unusable in DCDC mode

Simonr — Mon, 04 Dec 2023 12:39:30 GMT

Hi Andrew

We can't remember to have seen something like this before here in tech support at least, and I didn't see an errata mentioning this either. Can you provide some more information on your issue. Is it the reference voltage or the signal itself that you experience noise on? What pins are you using for the comparator here exactly? Are the pin(s) or line physically close to the DCDC components that might explain why you see this interference.

I might be misunderstanding, but if the noise is on the GPIOs maybe you could put a capacitor on the input to avoid this?

Best regards,

Simon