Reset pin behaviour

RE: Reset pin behaviour

David McIntosh — Tue, 18 Jun 2019 23:04:12 GMT

To clarify: For the nRF52840:

1. The firmware doesn't have to enable internal pull-up when the pin reset is configured

2. The off-chip HW does not need to include a pull-up resistor. (Note: For improved noise immunity some may choose to lower the pull-up resistance)

3. The pull-up resistance is about 13kOhm (same pull-up HW as all other GPIO). nRF52840 PS 1.1 doesn't have this note about 5 time constants (5xtau).

RE: Reset pin behaviour

Dajgoro Labinac — Fri, 16 Jun 2017 17:00:51 GMT

I've been looking for the same info for a good 20 mins in the docu and could not find it anywhere. Good thing this post is still around.

RE: Reset pin behaviour

Fennec — Mon, 14 Dec 2015 21:47:59 GMT

Thanks for your answer. :)

And thank you for offering to improve the docs (which are otherwise excellent) on this subject!

RE: Reset pin behaviour

Fennec — Mon, 14 Dec 2015 21:47:09 GMT

Thanks for your answer. :)

RE: Reset pin behaviour

Hung Bui — Mon, 14 Dec 2015 14:54:26 GMT

Hi Fennec and Atune,

I agree that information about the reset pin is a little bit obscure. But yes, the pin is active low and internal pull up will be enabled if the pin is configured as reset pin (a reset needed after you have configured PSELRESET registers). We will try to improve the documentation.

For the nRF51, information about the internal pull up for the reset pin can be found at section 11.1 in the nRF51 Reference Manual.

RE: Reset pin behaviour

atune — Mon, 14 Dec 2015 08:59:54 GMT

Yes it's active low. In addition the internal pull-up should be enabled when a pin is configured as a reset pin. (disclaimer: idk about nrf51 earlier revisions)

It's funny that it's not explicitly stated anywhere. The only real reference (at least in 52's case) to the fact is in p.100 of the nRF52 OPS

which implies that a) pulling the pin down resets the chip and b) the internal pullup is enabled (R = 13kOhm).