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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>How to configure the NCS sample to support nRF52840 QFAA QFN48</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/108402/how-to-configure-the-ncs-sample-to-support-nrf52840-qfaa-qfn48</link><description>Dear Support Team 
 We use the nRF52840 QFAA QFN48 and the reference circuitry as the screenshot below for our board, but the board could not run after we programmed the hello_world or peripheral_uart sample into the chip. 
 
 We found that the sample</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 19 Feb 2024 13:02:24 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/108402/how-to-configure-the-ncs-sample-to-support-nrf52840-qfaa-qfn48" /><item><title>RE: How to configure the NCS sample to support nRF52840 QFAA QFN48</title><link>https://devzone.nordicsemi.com/thread/469516?ContentTypeID=1</link><pubDate>Mon, 19 Feb 2024 13:02:24 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:7cd8d367-40ef-4890-b9dc-f22e2b51634c</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi Tom,&lt;/p&gt;
[quote user=""]We found that the sample was configured for the &lt;span&gt;nRF52840&amp;nbsp;&amp;nbsp;&lt;/span&gt;QIAA by default after we selected the board of nrf52840dk_nrf52840 on the Add Build Configuration like the screenshot below.[/quote]
&lt;p&gt;This does not have a great impact on the firmware complication itself. QIAA and QFAA has the same amount of peripherals etc, but the QFN48 package has less features routed due to the package being smaller/less pins are routed.&lt;/p&gt;
[quote user=""]&lt;span&gt;but the default configuration has the&amp;nbsp;&lt;/span&gt;&lt;span&gt;CONFIG_BOARD_ENABLE_DCDC_HV&lt;/span&gt;&lt;span&gt;=y and the&amp;nbsp;&lt;/span&gt;&lt;span&gt;CONFIG_SOC_DCDC_NRF52X_HV&lt;/span&gt;&lt;span&gt;=y in the .conf file like the screenshot below. We were not sure this is the reason of the chip could not run normal.&lt;/span&gt;[/quote]
&lt;p&gt;You should explicitly set CONFIG_BOARD_ENABLE_DCDC_HV=n when using this design.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Do you have an external 32k LFCLK? If not, you should also set this:&lt;/p&gt;
&lt;p&gt;CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>