NRF52832 SPI issue

RE: NRF52832 SPI issue

rsf — Wed, 06 Mar 2024 12:15:58 GMT

t's not really the described behavior, but as we got wrong values and read that data from DMA might be corrupted, we disabled dma

https://infocenter.nordicsemi.com/index.jsp?topic=%2Ferrata_nRF52832_Rev3%2FERR%2FnRF52832%2FRev3%2Flatest%2Ferr_832.html

RE: NRF52832 SPI issue

hmolesworth — Wed, 28 Feb 2024 15:55:07 GMT

Good news! Which errata? Not familiar with this one, though I only use SPIM not SPI.

RE: NRF52832 SPI issue

rsf — Wed, 28 Feb 2024 13:28:56 GMT

seems like everything is working now

#if defined(SPI0_ENABLED) && (SPI0_ENABLED)
#define SPI_INSTANCE  0
static const nrf_drv_spi_t spi = NRF_DRV_SPI_INSTANCE(SPI_INSTANCE);
#if defined(NRF52832_XXAA) && defined(SPI0_USE_EASY_DMA) && (SPI0_USE_EASY_DMA)
#error Disable SPI0_USE_EASY_DMA
#endif
#endif

we had to ensure that DMA is disabled. we found some entry in the errata.

RE: NRF52832 SPI issue

rsf — Wed, 28 Feb 2024 07:37:21 GMT

mode 0 and mode 3 return the same values.
i'll try to read into a buffer, but i think that will not change the values.

the only alternatives coming to my mind would be to implement spi by software. do you think that has some disadvantages except speed?

RE: NRF52832 SPI issue

hmolesworth — Tue, 27 Feb 2024 20:11:30 GMT

Little uncertain why you would use a 1-byte spi transfer when reading 24-bits, but if it works on the nRF52811 I wonder if there is something in all the redirection macros which doesn't handle the 2 devices the same way. Maybe try Mode 3 to see if it helps, Mode 3 SPI might be slightly better than Mode 0 if the macros don't mess things up .. "In SPI Mode (1,1), the SDO pin stays in the last state (LSB of previous data) after a complete reading, which also allows seamless Continuous Read mode"

RE: NRF52832 SPI issue

rsf — Tue, 27 Feb 2024 19:14:41 GMT

We're using sdk version 17.1.0

yes exactly i'm setting ss low, transmit some bytes according to the documentation of the chip with the spi interface.

   //read configuration
   nrf_gpio_pin_clear(SPI_SS_PIN);
   MCP391X_sendCommand(MCP391X_GAIN, MCP391X_READ);
   gainRead = MCP391X_readRegister();
   statuscomRead = MCP391X_readRegister();
   config0Read = MCP391X_readRegister();
   config1Read = MCP391X_readRegister();
   nrf_gpio_pin_set(SPI_SS_PIN);

so read register and send Command are basically just calling spi_transfer according to the documentation of the adc.

i think it actually uses spim underneath. if i debug into the spi libraries i can see that there's a flag that enables spim i think

RE: NRF52832 SPI issue

hmolesworth — Tue, 27 Feb 2024 17:12:04 GMT

Just realised you are using SPI and not SPIM; SPI is not used generally, though it still works I think. What SDK version is this, pre 15.3 or later 17.x? If the later version SPI may not function as well, not sure. Are you setting CS low then doing multiple single spi_transfer() calls before raising? nrf_drv_spi_transfer() is SDK15, not SDK17 ..

SPIM is so much more efficient if you could switch to that.

Edit: I have BMD-350 boards, if you send the transfer function I could look at it here though I won't have the same SPI slave device

RE: NRF52832 SPI issue

rsf — Tue, 27 Feb 2024 13:16:11 GMT

1: i'm using instance 0, i've changed it according to your recommendation.

#if defined(SPI0_ENABLED) && (SPI0_ENABLED)
#warning SPI0_ENABLED
#define SPI_INSTANCE  0
static const nrf_drv_spi_t spi = NRF_DRV_SPI_INSTANCE(SPI_INSTANCE);
#endif

#if defined(SPI1_ENABLED) && (SPI1_ENABLED)
#warning SPI1_ENABLED
#define SPI_INSTANCE  1
static const nrf_drv_spi_t spi = NRF_DRV_SPI_INSTANCE(SPI_INSTANCE);
#endif

#if defined(SPI2_ENABLED) && (SPI2_ENABLED)
#warning SPI2_ENABLED
#define SPI_INSTANCE  2
static const nrf_drv_spi_t spi = NRF_DRV_SPI_INSTANCE(SPI_INSTANCE);
#endif

#if defined(NRF52832_XXAA)
STATIC_ASSERT ((uint32_t)NRF_TWIM0 == (uint32_t)NRF_SPI0, "NRF_TWIM0 differs from NRF_SPI0");
STATIC_ASSERT ((uint32_t)NRF_TWIM1 == (uint32_t)NRF_SPI1, "NRF_TWIM1 differs from NRF_SPI1");
#elif defined (NRF52811_XXAA)
STATIC_ASSERT ((uint32_t)NRF_TWIM0 == (uint32_t)NRF_SPI1, "NRF_TWIM0 differs from NRF_SPI1");
#endif

that didn't change the behavior yet

2: i went through the sdkconfig these are all my defines for spi and twi (i hope i got all of them)

#define SPI_SCK_PIN 16

#define SPI_MISO_PIN 15

#define SPI_MOSI_PIN 13

#define SPI_SS_PIN 17

#define SPI_IRQ_PRIORITY 6

----------------------------

#define NRFX_SPIM_ENABLED 1

#define NRFX_SPIM0_ENABLED 0

#define NRFX_SPIM1_ENABLED 0

#define NRFX_SPIM2_ENABLED 0

----------------------------

#define NRFX_SPIS_ENABLED 0

#define NRFX_SPIS0_ENABLED 0

#define NRFX_SPIS1_ENABLED 0

#define NRFX_SPIS2_ENABLED 0

----------------------------

#define NRFX_SPI_ENABLED 1

#define NRFX_SPI0_ENABLED 0

#define NRFX_SPI1_ENABLED 0

#define NRFX_SPI2_ENABLED 0

----------------------------

#define NRFX_TWIM_ENABLED 0

#define NRFX_TWIM0_ENABLED 0

#define NRFX_TWIM1_ENABLED 0

----------------------------

#define NRFX_TWIS_ENABLED 0

#define NRFX_TWIS0_ENABLED 0

#define NRFX_TWIS1_ENABLED 0

----------------------------

#define NRFX_TWI_ENABLED 0

#define NRFX_TWI0_ENABLED 0

#define NRFX_TWI1_ENABLED 0

----------------------------

#define SPIS_ENABLED 0

#define SPIS0_ENABLED 0

#define SPIS1_ENABLED 0

#define SPIS2_ENABLED 0

---------------------------

#define SPI_ENABLED 1

#define SPI0_ENABLED 1

#define SPI0_USE_EASY_DMA 1

#define SPI1_ENABLED 0

#define SPI1_USE_EASY_DMA 1

#define SPI2_ENABLED 0

#define SPI2_USE_EASY_DMA 1

----------------------------

#define TWIS_ENABLED 0

#define TWIS0_ENABLED 0

#define TWIS1_ENABLED 0

#define TWI_ENABLED 0

#define TWI0_ENABLED 0

#define TWI0_USE_EASY_DMA 0

#define TWI1_ENABLED 0

#define TWI1_USE_EASY_DMA 0

3: the static assert instruction seems to pass through as supposed

this is the spi part in my library:

//spi event handler.
void spi_event_handler(nrf_drv_spi_evt_t const * p_event, void * p_context)
{
    spi_xfer_done = true;
}

//spi transfer.
uint8_t spi_transfer(uint8_t data)
{
  uint8_t result;

  spi_xfer_done = false;
  APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &data, 1, &result, 1));
    
  while (!spi_xfer_done)
  {
    __WFE();
  }
    
  return result;
}

//initialize spi.
void spi_init()
{
  //spi config / CS - manually / spi mode 00 / max 20 Mhz clock / msb first
  nrf_drv_spi_config_t spi_config = NRF_DRV_SPI_DEFAULT_CONFIG;
  spi_config.ss_pin   = NRF_DRV_SPI_PIN_NOT_USED;
  spi_config.miso_pin = SPI_MISO_PIN;
  spi_config.mosi_pin = SPI_MOSI_PIN;
  spi_config.sck_pin  = SPI_SCK_PIN;
  spi_config.irq_priority  = SPI_DEFAULT_CONFIG_IRQ_PRIORITY;
  spi_config.frequency  = NRF_SPI_FREQ_8M;
  spi_config.mode  = NRF_DRV_SPI_MODE_0;
  spi_config.bit_order  = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST;
    
  //initialize spi
  uint32_t err_code;
  err_code = nrf_drv_spi_init(&spi, &spi_config, spi_event_handler, NULL);
  APP_ERROR_CHECK(err_code);

  //define SS as output
  //nrf_gpio_cfg_output(SPI_SS_PIN);
  //nrf_gpio_pin_set(SPI_SS_PIN);

  nrf_gpio_cfg(SPI_MOSI_PIN, NRF_GPIO_PIN_DIR_OUTPUT, NRF_GPIO_PIN_INPUT_DISCONNECT, NRF_GPIO_PIN_NOPULL, NRF_GPIO_PIN_H0H1, NRF_GPIO_PIN_NOSENSE);
  nrf_gpio_cfg(SPI_SCK_PIN,  NRF_GPIO_PIN_DIR_OUTPUT, NRF_GPIO_PIN_INPUT_DISCONNECT, NRF_GPIO_PIN_NOPULL, NRF_GPIO_PIN_H0H1, NRF_GPIO_PIN_NOSENSE);
  nrf_gpio_cfg(SPI_SS_PIN,   NRF_GPIO_PIN_DIR_OUTPUT, NRF_GPIO_PIN_INPUT_DISCONNECT, NRF_GPIO_PIN_NOPULL, NRF_GPIO_PIN_H0H1, NRF_GPIO_PIN_NOSENSE);
}

that's what it looks like in the debugger. i always get values so i think the clock is fine and data is pushed through. but the values do not fit the expected values.

RE: NRF52832 SPI issue

hmolesworth — Tue, 27 Feb 2024 12:18:36 GMT

Which spi, a definition something like this

#define SPI_INSTANCE  0   // SPI instance index
or maybe
#define SPI_INSTANCE  1  // SPI instance index

Which spi are you really using? ie what is the definition for "spi" in the init:

  err_code = nrf_drv_spi_init(&spi, &spi_config, spi_event_handler, NULL);

I would suggest something like this (spi2 used here)

#if defined(SPI2_ENABLED) && (SPI2_ENABLED)
#warning SPI2_ENABLED
#define SPI_INSTANCE  2   // SPI instance index
static const nrf_drv_spi_t spi = NRF_DRV_SPI_INSTANCE(SPI_INSTANCE);
#endif

In sdk_config.h what are all the SPI settings? There are dozens of these, so tedious to locate them all

stuff like this:

#define TWI0_ENABLED 1
#define TWIM0_ENABLED 1

#define SPI0_ENABLED 1
#define SPIM1_ENABLED 1
#define SPIS1_ENABLED 1
#define SPIM0_ENABLED 1
#define SPIS1_ENABLED 1
  SPI0  0,1,2
  SPIM0 0,1,2

What results do these lines return on both builds:

// Normal nRF52832
STATIC_ASSERT ((uint32_t)NRF_TWIM0 == (uint32_t)NRF_SPI0, "NRF_TWIM0 differs from NRF_SPI0");
STATIC_ASSERT ((uint32_t)NRF_TWIM1 == (uint32_t)NRF_SPI1, "NRF_TWIM1 differs from NRF_SPI1");
// Normal nRF52811
STATIC_ASSERT ((uint32_t)NRF_TWIM0 == (uint32_t)NRF_SPI1, "NRF_TWIM0 differs from NRF_SPI1");

RE: NRF52832 SPI issue

rsf — Tue, 27 Feb 2024 08:02:26 GMT

Thanks for the reply.

1 - ok
what does that mean for my firmware or how do i change that? is that something i have to change in the sdk_config.h?
the only module enabled is the SPI
i guess it has something to do with the ppi. my hw/fw system doesn't use twi or similar.

2 - didn't change anything, but thanks for the hint

i have a demo board for the bmd360 and the bmd350 and a shield for the board. so i can switch the same chip from one to the other with the same pins. in the spi fw i simply try to read some register.

on the bmd360 i receive:
config0 - 0x0039e05c

on the bmd350 i receive:
config0 - 0x000f09ff

i've tried to use other pins but got the same result. and i tried to change the spi frequency but also got the same result. that's really strange to me. it looks like there's something going on on the bus. i've checked sck, miso, mosi and ss with the oscilloscope. i can see activity there. i don't have a logic analyzer here at the moment so what is going on there is hard to tell, but i thought it should behave the same since i have the same spi config as on the other controller.

RE: NRF52832 SPI issue

hmolesworth — Mon, 26 Feb 2024 18:45:59 GMT

Two issues maybe:

! Shared Ids are different; on the nRF52811 TWIM0 is different from SPIM0 so both can be used together, but on the nRF52832 they are the same instance (same hardware address) so cannot; use instead TWIM0 and SPIM1:

Shared Id nRF52811
3 0x40003000 TWI TWI0 Two-wire interface master Deprecated
3 0x40003000 TWIM TWIM0 Two-wire interface master
3 0x40003000 TWIS TWIS0 Two-wire interface slave
4 0x40004000 SPI SPI0 SPI master Deprecated
4 0x40004000 SPIM SPIM0 SPI master
4 0x40004000 SPIS SPIS0 SPI slave

Shared Id nRF52832
ID 3 (0x40003000) SPIM SPIS SPI TWIM TWIS TWI
ID 4 (0x40004000) SPIM SPIS SPI TWIM TWIS TWI
ID 35 (0x40023000) SPIM SPIS SPI

2 At 8MHz reliable operation requires /CS, MOSI, and SCLK to be set as H0H1 (high-drive), not the default S0S1 (feeble drive)