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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Multiple SPI transfers, PPI, EasyDMA ArrayList, GPIOTE</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/108842/multiple-spi-transfers-ppi-easydma-arraylist-gpiote</link><description>Hello, 
 I have a three sensors on the same SPI bus and I need to read data from them with 1 kHz frequency. Is there any approach to all polling sensors using PPI to wakeup CPU only when all sensors data got? Or at least reduce CPU actions in interrupts</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 01 Mar 2024 09:14:02 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/108842/multiple-spi-transfers-ppi-easydma-arraylist-gpiote" /><item><title>RE: Multiple SPI transfers, PPI, EasyDMA ArrayList, GPIOTE</title><link>https://devzone.nordicsemi.com/thread/471722?ContentTypeID=1</link><pubDate>Fri, 01 Mar 2024 09:14:02 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:66903516-3bfa-49d2-8bff-7d26ec841697</guid><dc:creator>Torsten Robitzki</dc:creator><description>&lt;p&gt;In the SPIM peripheral, there is an additional register, named LIST, where you can enable the feature. My understanding (of the still very vague description of the feature) is, that basically, the TXD.PTR and RXD.PTR are incremented by MAXCNT at the end of a transfer.&lt;/p&gt;
&lt;p&gt;Basically, you can draw a timeline with all your required SPI transfers and assign a PPI channel for every point in time, where something interesting should happen. This would probably 3 times, the start of the SPI transfer (SPIM.TASKS_START), assertion of CS1, deassertion of CS1,&amp;nbsp;&lt;span&gt;assertion of CS2, deassertion of CS3,&amp;nbsp;assertion of CS3, deassertion of CS3 and resetting the timer to. This are 10 points in time, which would require 10 capture / compare registers, which you do not have in any timer, so you need to use 2 timers. And then, you probably also need a 3rd timer to switch read buffers and to interrupt the CPU to do something with the collected data.&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Multiple SPI transfers, PPI, EasyDMA ArrayList, GPIOTE</title><link>https://devzone.nordicsemi.com/thread/471715?ContentTypeID=1</link><pubDate>Fri, 01 Mar 2024 08:44:54 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:285ece1b-458d-43ce-b275-94715adcbac1</guid><dc:creator>Ars Morozov</dc:creator><description>&lt;p&gt;Hi, thanks for answer.&lt;br /&gt;Actually we have different sizes of buffer, but we can use for example maximum for all transfers. The question is how to use List feature? Is it in using flag for post increment of the buffer?&lt;br /&gt;&lt;br /&gt;Regarding cs signal.For me it&amp;#39;s clear how to use GPIOTE and timer for one transfer with one device. But if I have few devices, how we can configure system to automaticaly manages CS signals without CPU?&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Multiple SPI transfers, PPI, EasyDMA ArrayList, GPIOTE</title><link>https://devzone.nordicsemi.com/thread/471696?ContentTypeID=1</link><pubDate>Fri, 01 Mar 2024 08:14:48 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5a40c06c-4d84-48fd-a1e3-bf9d0bca6dfc</guid><dc:creator>Torsten Robitzki</dc:creator><description>&lt;p&gt;I&amp;#39;m working on something similar. Basically, I use a timer to create the necessary timings to trigger the start of the SPI transfer. If you have similar sizes for the buffers, that needs to be transferred, you could use the LIST feature of EasyDMA.&lt;/p&gt;
&lt;p&gt;For the CS signal, you could use the GPIOTE peripheral and the timer to assert and deassert the CS signal. In case, you need to update some registers, you could use the EGU peripherals to generate interrupts with relative high priority to do that. If you have more points in time, than capture compare registers, you could use an other timer and synchronize&amp;nbsp;them.&lt;/p&gt;
&lt;p&gt;EGU also comes handy, if you need to duplicate events or to combine (OR) events.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>