SPIM Recevie data is allways 1bit shift

RE: SPIM Recevie data is allways 1bit shift

PedroR — Mon, 28 Apr 2025 05:58:05 GMT

I have the same problem. How did you fix it?

RE: SPIM Recevie data is allways 1bit shift

lammobile — Tue, 02 Apr 2024 04:31:50 GMT

Hi Jørgen Holmefjord,

Thank you so much, finally I had to write a soft SPI to implement this function. I will send you the sample application once I optimize this feature. Thank you very much.

RE: SPIM Recevie data is allways 1bit shift

Jørgen Holmefjord — Tue, 19 Mar 2024 08:59:01 GMT

Hi,

Can you provide a sample application that can be used to reproduce this behavior?

It is unclear to me if the pin levels is caused by the SPIM peripheral or by some GPIO config in the application.

[quote user=""]Is there a way to keep the clock signal at the low level by default after powering on the system?[/quote]

From a HW perspective, the GPIOs are set as inputs, with input buffer disconnected and no pull by default. This should not drive the signals high, but since they are floating, the level might be interpreted as high or low by the sensor.

[quote user=""]Or perhaps, is there a method to reset the receiver MISO counter or buffer?[/quote]

There is no way to do that apart from stopping the transfer and starting a new one. You could also read one additional byte and do the shifting in your application (it this does not mess up the state of the sensor).

Best regards,
Jørgen