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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SPI can&amp;#39;t read write sensor registers (USE Academy&amp;#39;s sample code)</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/109882/spi-can-t-read-write-sensor-registers-use-academy-s-sample-code</link><description>Hi supporter 
 I use the sample &amp;quot;interfacing with a sensor over SPI&amp;quot;( academy.nordicsemi.com/.../) , modified as BMP280 and ST-lis2hh12 sensor.I use vscode build environment, board:nRF7002_DK, SDK:v2.5.2.For SPI resource I use spi4 (CS:P0.11, SCK:P0.08</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 18 Apr 2024 07:56:56 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/109882/spi-can-t-read-write-sensor-registers-use-academy-s-sample-code" /><item><title>RE: SPI can't read write sensor registers (USE Academy's sample code)</title><link>https://devzone.nordicsemi.com/thread/479345?ContentTypeID=1</link><pubDate>Thu, 18 Apr 2024 07:56:56 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:38e9c6e9-4c97-4d4a-a324-e5c52a51f3e8</guid><dc:creator>ovrebekk</dc:creator><description>&lt;p&gt;Hi Tina&lt;/p&gt;
&lt;p&gt;1) As far as I can tell you have enabled SPI mode 3 the correct way, yes. Did you verify on the scope if the clock and MOSI lines are updated as expected?&amp;nbsp;&lt;/p&gt;
&lt;p&gt;2) The Zephyr kernel will run under the hood, yes.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The SPI timing is mostly affected by the efficiency of the driver, more than the use of Zephyr itself. 16us between bytes does seem a bit high.&lt;/p&gt;
&lt;p&gt;Do you know&amp;nbsp;which part of the driver code handles this transaction?&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Longer SPI transactions are much more efficient as they allow the SPI peripheral to send bytes back to back, while if you only send single bytes from the driver side there will be some gap between them in order to handle peripheral interrupts etc.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;3) One of my colleagues discussed the issue of too long delay between CSN going low and the data being output in &lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/90197/how-to-reduce-spi-chipselect-to-sclk-delay"&gt;this case&lt;/a&gt;.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Essentially possible workarounds is to either switch to spi4, and/or use the nrfx_spim driver for more direct control of the SPIM peripheral. Please note that using nrfx directly means you would not be able to use higher level sensor drivers, so this might not be a good option in your case.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Using high drive might reduce fall/rise times of your signals, but won&amp;#39;t speed up the timing overall.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards&lt;br /&gt;Torbjørn&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI can't read write sensor registers (USE Academy's sample code)</title><link>https://devzone.nordicsemi.com/thread/478846?ContentTypeID=1</link><pubDate>Tue, 16 Apr 2024 02:34:03 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:83974884-00e7-408b-8613-17c611ef70e0</guid><dc:creator>yithwe</dc:creator><description>&lt;p&gt;Hi Ovrebekk&lt;/p&gt;
&lt;p&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;Thanks for your reply.&lt;/p&gt;
&lt;p&gt;&lt;em&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;Regarding P0.08 and P0.11 these pins are used for the external memory interface, as described&amp;nbsp;&lt;a href="https://infocenter.nordicsemi.com/topic/ug_nrf7002_dk/UG/nrf7002_DK/hw_external_memory.html?cp=3_0_4_4_5"&gt;here&lt;/a&gt;. I expect this is the reason you can&amp;#39;t properly enable them.&amp;nbsp;&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;For this external memory issue, I try to short SB11~SB14 and remove external memory IC from nRF7002-Dk board, frequency set as 8MHz and use SPI mode 3. For ST Lis2HH122 sensor read result is 0x00 or 0xFF，no any write result.&lt;/p&gt;
&lt;p&gt;But For BME280 sensor can read chip ID, but the read result is fault(it&amp;#39;s mismatch with data sheet value), write result is not stable.&lt;/p&gt;
&lt;p&gt;I use &lt;a href="https://academy.nordicsemi.com/courses/nrf-connect-sdk-intermediate/lessons/lesson-5-serial-peripheral-interface-spi/topic/exercise-1-10/"&gt;Exercise1&lt;/a&gt;&amp;nbsp;for this issue.&lt;/p&gt;
&lt;p&gt;&lt;em&gt;Have you tried to use SPI1 instead, which is assigned to the Arduino SPI pins (P1.12-P1.15) ?&amp;nbsp;&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;I try to use P0.06 P0.07 P0.25 P0.26 for SPI mode3，the result is same as upper for BME280 and&amp;nbsp;&lt;span&gt;ST Lis2HH122 sensor.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;span style="font-size:150%;"&gt;Another question (1)&lt;/span&gt; is I want to use SPI mode 3&amp;nbsp;(CPOL=1,CPHA=1) for this exercise.can I use below setting for spi operation as below?&lt;/span&gt;&lt;/p&gt;
&lt;div&gt;
&lt;div&gt;&lt;span&gt;#define&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;SPIOP&lt;/span&gt;&lt;span&gt; &amp;nbsp; &lt;/span&gt;&lt;span&gt;SPI_WORD_SET&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;8&lt;/span&gt;&lt;span&gt;) &lt;/span&gt;&lt;span&gt;|&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;SPI_TRANSFER_MSB&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span style="color:#ff0000;"&gt;| SPI_MODE_CPOL | SPI_MODE_CPHA&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span style="color:#ff0000;"&gt;&amp;nbsp;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span style="color:#000000;"&gt;&lt;span&gt;&lt;span style="font-size:150%;"&gt;Another question (2)&lt;/span&gt;&amp;nbsp;&lt;/span&gt;zephyr RTOS need for nRF7002-DK, isn&amp;#39;t it? Is RTOS scheduling effect for&amp;nbsp;SPI read write respone time?&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;Below attached picture have two issue will effect for read&amp;nbsp;respone time&amp;nbsp;&lt;/div&gt;
&lt;div&gt;1.After cs active low(yellow line) it need 6us wait and the first spi clock start(blue line)&amp;nbsp;&lt;/div&gt;
&lt;div&gt;2.Read sensor BME280 register over the spi with frequency 8MHz, SPI mode 3 (CPOL=1,CPHA=1), the respone time is over 16us&lt;/div&gt;
&lt;div&gt;For this two issue do you have any suggestion for decrease respone time?&lt;/div&gt;
&lt;div&gt;&lt;/div&gt;
&lt;div&gt;&lt;span style="font-size:150%;"&gt;4/17 Another question(3)&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;Setting SPI pin duration time and GPIO pin setting as high drive can solve this problem?&lt;/div&gt;
&lt;div&gt;How to setting duration time for SPI pin when use zephyr driver?&lt;/div&gt;
&lt;div&gt;We need transmit data high bit for long time(with limit delay time), so this issue will be buttolneck for our application. If any we need to precaution, please don&amp;#39;t hestiate for give advice, many thank.&lt;/div&gt;
&lt;div&gt;&lt;/div&gt;
&lt;div&gt;&lt;img style="max-height:240px;max-width:320px;" alt=" " src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/150224_5F00_0.jpg" /&gt;&amp;nbsp;&lt;/div&gt;
&lt;/div&gt;
&lt;p&gt;&lt;span&gt;&amp;nbsp;Best Regards&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;Tina&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI can't read write sensor registers (USE Academy's sample code)</title><link>https://devzone.nordicsemi.com/thread/478806?ContentTypeID=1</link><pubDate>Mon, 15 Apr 2024 13:57:02 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c70f031e-8e8d-40c5-a90f-4a719a6ac830</guid><dc:creator>ovrebekk</dc:creator><description>&lt;p&gt;Hi Tina&lt;/p&gt;
&lt;p&gt;Sorry for the slow response, I was on travel last week.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Regarding P0.08 and P0.11 these pins are used for the external memory interface, as described &lt;a href="https://infocenter.nordicsemi.com/topic/ug_nrf7002_dk/UG/nrf7002_DK/hw_external_memory.html?cp=3_0_4_4_5"&gt;here&lt;/a&gt;. I expect this is the reason you can&amp;#39;t properly enable them.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Have you tried to use SPI1 instead, which is assigned to the Arduino SPI pins (P1.12-P1.15) ?&amp;nbsp;&lt;/p&gt;
[quote user="yithwe"]another question is I create *.yaml(zephyr\dts\bindings\sensor)filefor ST-LIS2HH12 sensor, for bmp280 is only create for&amp;nbsp;bosch,bmp280-spi.yaml, but for ST sensor isn&amp;#39;t need two yaml?[/quote]
&lt;p&gt;If you want the same sensor driver to support both I2C and SPI, selected directly from the device tree, you need separate binding files for this. If you are making your own driver I would suggest just making a single binding, depending on which interface you are planning to use (SPI or I2C).&amp;nbsp;&lt;/p&gt;
[quote user="yithwe"]Is this clock and power collides issue reason for no SPI(master) SCLK waveforms?[/quote]
&lt;p&gt;No, I don&amp;#39;t think this is the issue. There should be no need to modify the power or clock nodes in the device tree to use SPI.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards&lt;br /&gt;Torbjørn&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI can't read write sensor registers (USE Academy's sample code)</title><link>https://devzone.nordicsemi.com/thread/477440?ContentTypeID=1</link><pubDate>Mon, 08 Apr 2024 03:26:51 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:1431da76-ece9-4bea-8511-f89543713aad</guid><dc:creator>yithwe</dc:creator><description>&lt;p&gt;Hi Ovrebekk&lt;/p&gt;
&lt;p&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; I use logic analyzer and Oscilloscope to see the p0.08(SCLK) and p0.11(CS), the result is CS has waveforms and SCLK no any waveforms.The attached file is my overlay and prj.conf for this case, please give any suggestion,Thanks.&lt;/p&gt;
&lt;p&gt;another question is I create *.yaml(zephyr\dts\bindings\sensor)filefor ST-LIS2HH12 sensor, for bmp280 is only create for&amp;nbsp;bosch,bmp280-spi.yaml, but for ST sensor isn&amp;#39;t need two yaml?As below ST-LIS2DW example, it need for common and spi two file.&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:240px;max-width:320px;" alt=" " src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/common.GIF" /&gt;&lt;/p&gt;
&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/cfs-file/__key/communityserver-discussions-components-files/4/8255.nrf7002dk_5F00_nrf5340_5F00_cpuapp.overlay"&gt;devzone.nordicsemi.com/.../8255.nrf7002dk_5F00_nrf5340_5F00_cpuapp.overlay&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/cfs-file/__key/communityserver-discussions-components-files/4/0763.prj.conf"&gt;devzone.nordicsemi.com/.../0763.prj.conf&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;Is this clock and power collides issue reason for no SPI(master) SCLK waveforms?&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:240px;max-width:320px;" alt=" " src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1712547708357v3.png" /&gt;&lt;/p&gt;
&lt;p&gt;For upper collides problem I try to reconfig for &amp;quot;nrf5340_cpuapp_peripherals.dtsi&amp;quot; file.For this file at starting(power collides with clock), (kmu collides with&amp;nbsp;flash-controller) I modified as attached file, after modified the build result failed as below, how to modify for these resource address not collides at the same time build success and work?&lt;/p&gt;
&lt;p&gt;&lt;em&gt;[93/150] Building C object zephyr/CMakeFiles/zephyr.dir/soc/arm/nordic_nrf/validate_base_addresses.c.obj&lt;/em&gt;&lt;br /&gt;&lt;em&gt;FAILED: zephyr/CMakeFiles/zephyr.dir/soc/arm/nordic_nrf/validate_base_addresses.c.obj &lt;/em&gt;&lt;br /&gt;&lt;em&gt;C:\ncs\toolchains\c57af46cb7\opt\zephyr-sdk\arm-zephyr-eabi\bin\arm-zephyr-eabi-gcc.exe -DKERNEL -DNRF5340_XXAA_APPLICATION -DNRF_SKIP_FICR_NS_COPY_TO_RAM -DPICOLIBC_DOUBLE_PRINTF_SCANF -D_FORTIFY_SOURCE=1 -D_POSIX_C_SOURCE=200809 -D__LINUX_ERRNO_EXTENSIONS__ -D__PROGRAM_START -D__ZEPHYR__=1 -IC:/ncs/v2.5.2/zephyr/kernel/include -IC:/ncs/v2.5.2/zephyr/arch/arm/include -IC:/ncs/v2.5.2/zephyr/include -Izephyr/include/generated -IC:/ncs/v2.5.2/zephyr/soc/arm/nordic_nrf/nrf53 -IC:/ncs/v2.5.2/zephyr/soc/arm/nordic_nrf/common/. -IC:/ncs/v2.5.2/nrf/include -IC:/ncs/v2.5.2/nrf/tests/include -IC:/ncs/v2.5.2/modules/hal/cmsis/CMSIS/Core/Include -IC:/ncs/v2.5.2/zephyr/modules/cmsis/. -IC:/ncs/v2.5.2/modules/hal/nordic/nrfx -IC:/ncs/v2.5.2/modules/hal/nordic/nrfx/drivers/include -IC:/ncs/v2.5.2/modules/hal/nordic/nrfx/mdk -IC:/ncs/v2.5.2/zephyr/modules/hal_nordic/nrfx/. -isystem C:/ncs/v2.5.2/nrfxlib/crypto/nrf_cc312_platform/include -fno-strict-aliasing -Os -imacros C:/ncs/ncs-inter/JMEX_SPI_STM_LIS2HH12/build_SPI_STM_LIS2HH12/zephyr/include/generated/autoconf.h -fno-common -g -gdwarf-4 -fdiagnostics-color=always -mcpu=cortex-m33 -mthumb -mabi=aapcs -mfp16-format=ieee --sysroot=C:/ncs/toolchains/c57af46cb7/opt/zephyr-sdk/arm-zephyr-eabi/arm-zephyr-eabi -imacros C:/ncs/v2.5.2/zephyr/include/zephyr/toolchain/zephyr_stdint.h -Wall -Wformat -Wformat-security -Wno-format-zero-length -Wno-pointer-sign -Wpointer-arith -Wexpansion-to-defined -Wno-unused-but-set-variable -Werror=implicit-int -fno-pic -fno-pie -fno-asynchronous-unwind-tables -ftls-model=local-exec -fno-reorder-functions --param=min-pagesize=0 -fno-defer-pop -fmacro-prefix-map=C:/ncs/ncs-inter/JMEX_SPI_STM_LIS2HH12=CMAKE_SOURCE_DIR -fmacro-prefix-map=C:/ncs/v2.5.2/zephyr=ZEPHYR_BASE -fmacro-prefix-map=C:/ncs/v2.5.2=WEST_TOPDIR -ffunction-sections -fdata-sections --specs=picolibc.specs -std=c99 -MD -MT zephyr/CMakeFiles/zephyr.dir/soc/arm/nordic_nrf/validate_base_addresses.c.obj -MF zephyr\CMakeFiles\zephyr.dir\soc\arm\nordic_nrf\validate_base_addresses.c.obj.d -o zephyr/CMakeFiles/zephyr.dir/soc/arm/nordic_nrf/validate_base_addresses.c.obj -c C:/ncs/v2.5.2/zephyr/soc/arm/nordic_nrf/validate_base_addresses.c&lt;/em&gt;&lt;br /&gt;&lt;em&gt;In file included from C:/ncs/v2.5.2/zephyr/include/zephyr/toolchain.h:50,&lt;/em&gt;&lt;br /&gt;&lt;em&gt; from C:/ncs/v2.5.2/zephyr/include/zephyr/kernel_includes.h:19,&lt;/em&gt;&lt;br /&gt;&lt;em&gt; from C:/ncs/v2.5.2/zephyr/include/zephyr/kernel.h:17,&lt;/em&gt;&lt;br /&gt;&lt;em&gt; from C:/ncs/v2.5.2/zephyr/soc/arm/nordic_nrf/validate_base_addresses.c:7:&lt;/em&gt;&lt;br /&gt;&lt;em&gt;C:/ncs/v2.5.2/zephyr/include/zephyr/toolchain/gcc.h:81:36: error: static assertion failed: &amp;quot;&amp;quot;&lt;/em&gt;&lt;br /&gt;&lt;em&gt; 81 | #define BUILD_ASSERT(EXPR, MSG...) _Static_assert(EXPR, &amp;quot;&amp;quot; MSG)&lt;/em&gt;&lt;br /&gt;&lt;em&gt; | ^~~~~~~~~~~~~~&lt;/em&gt;&lt;br /&gt;&lt;em&gt;C:/ncs/v2.5.2/zephyr/soc/arm/nordic_nrf/validate_base_addresses.c:87:9: note: in expansion of macro &amp;#39;BUILD_ASSERT&amp;#39;&lt;/em&gt;&lt;br /&gt;&lt;em&gt; 87 | BUILD_ASSERT( \&lt;/em&gt;&lt;br /&gt;&lt;em&gt; | ^~~~~~~~~~~~&lt;/em&gt;&lt;br /&gt;&lt;em&gt;C:/ncs/v2.5.2/zephyr/soc/arm/nordic_nrf/validate_base_addresses.c:140:1: note: in expansion of macro &amp;#39;CHECK_DT_REG&amp;#39;&lt;/em&gt;&lt;br /&gt;&lt;em&gt; 140 | CHECK_DT_REG(flash_controller, NRF_NVMC);&lt;/em&gt;&lt;br /&gt;&lt;em&gt; | ^~~~~~~~~~~~&lt;/em&gt;&lt;br /&gt;&lt;em&gt;C:/ncs/v2.5.2/zephyr/include/zephyr/toolchain/gcc.h:81:36: error: static assertion failed: &amp;quot;&amp;quot;&lt;/em&gt;&lt;br /&gt;&lt;em&gt; 81 | #define BUILD_ASSERT(EXPR, MSG...) _Static_assert(EXPR, &amp;quot;&amp;quot; MSG)&lt;/em&gt;&lt;br /&gt;&lt;em&gt; | ^~~~~~~~~~~~~~&lt;/em&gt;&lt;br /&gt;&lt;em&gt;C:/ncs/v2.5.2/zephyr/soc/arm/nordic_nrf/validate_base_addresses.c:87:9: note: in expansion of macro &amp;#39;BUILD_ASSERT&amp;#39;&lt;/em&gt;&lt;br /&gt;&lt;em&gt; 87 | BUILD_ASSERT( \&lt;/em&gt;&lt;br /&gt;&lt;em&gt; | ^~~~~~~~~~~~&lt;/em&gt;&lt;br /&gt;&lt;em&gt;C:/ncs/v2.5.2/zephyr/soc/arm/nordic_nrf/validate_base_addresses.c:157:1: note: in expansion of macro &amp;#39;CHECK_DT_REG&amp;#39;&lt;/em&gt;&lt;br /&gt;&lt;em&gt; 157 | CHECK_DT_REG(power, NRF_POWER);&lt;/em&gt;&lt;br /&gt;&lt;em&gt; | ^~~~~~~~~~~~&lt;/em&gt;&lt;br /&gt;&lt;em&gt;C:/ncs/v2.5.2/zephyr/include/zephyr/toolchain/gcc.h:81:36: error: static assertion failed: &amp;quot;&amp;quot;&lt;/em&gt;&lt;br /&gt;&lt;em&gt; 81 | #define BUILD_ASSERT(EXPR, MSG...) _Static_assert(EXPR, &amp;quot;&amp;quot; MSG)&lt;/em&gt;&lt;br /&gt;&lt;em&gt; | ^~~~~~~~~~~~~~&lt;/em&gt;&lt;br /&gt;&lt;em&gt;C:/ncs/v2.5.2/zephyr/soc/arm/nordic_nrf/validate_base_addresses.c:87:9: note: in expansion of macro &amp;#39;BUILD_ASSERT&amp;#39;&lt;/em&gt;&lt;br /&gt;&lt;em&gt; 87 | BUILD_ASSERT( \&lt;/em&gt;&lt;br /&gt;&lt;em&gt; | ^~~~~~~~~~~~&lt;/em&gt;&lt;br /&gt;&lt;em&gt;C:/ncs/v2.5.2/zephyr/soc/arm/nordic_nrf/validate_base_addresses.c:168:1: note: in expansion of macro &amp;#39;CHECK_DT_REG&amp;#39;&lt;/em&gt;&lt;br /&gt;&lt;em&gt; 168 | CHECK_DT_REG(reset, NRF_RESET);&lt;/em&gt;&lt;br /&gt;&lt;em&gt; | ^~~~~~~~~~~~&lt;/em&gt;&lt;br /&gt;&lt;em&gt;[102/150] Building C object zephyr/drivers/spi/CMakeFiles/drivers__spi.dir/spi_nrfx_spim.c.obj&lt;/em&gt;&lt;br /&gt;&lt;em&gt;ninja: build stopped: subcommand failed.&lt;/em&gt;&lt;br /&gt;&lt;em&gt;FATAL ERROR: command exited with status 1: &amp;#39;C:\ncs\toolchains\c57af46cb7\opt\bin\cmake.EXE&amp;#39; --build &amp;#39;c:\ncs\ncs-inter\JMEX_SPI_STM_LIS2HH12\build_SPI_STM_LIS2HH12&amp;#39;&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;&lt;em&gt;* The terminal process terminated with exit code: 1. &lt;/em&gt;&lt;br /&gt;&lt;em&gt; * Terminal will be reused by tasks, press any key to close it.&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/cfs-file/__key/communityserver-discussions-components-files/4/4478.nrf5340_5F00_cpuapp_5F00_peripherals.dtsi"&gt;devzone.nordicsemi.com/.../4478.nrf5340_5F00_cpuapp_5F00_peripherals.dtsi&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Best Regards&lt;/p&gt;
&lt;p&gt;&amp;nbsp; &amp;nbsp;Tina&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI can't read write sensor registers (USE Academy's sample code)</title><link>https://devzone.nordicsemi.com/thread/476934?ContentTypeID=1</link><pubDate>Wed, 03 Apr 2024 14:15:47 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:be711d34-51d3-498a-9585-85e493e58344</guid><dc:creator>ovrebekk</dc:creator><description>&lt;p&gt;Hi&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Have you tried to measure the SPI signals on a scope or logic analyzer to see if you get output as expected?&amp;nbsp;&lt;/p&gt;
&lt;p&gt;In particular look for the presence of the chip select and clock signals.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;If you just read out 0 it is typically a sign that something is wrong with the pin configuration or the connection between the DK and the sensor.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards&lt;br /&gt;Torbjørn&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>