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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SPI Master Example Code: Clk &amp;amp; MOSI Signal Error</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/10993/spi-master-example-code-clk-mosi-signal-error</link><description>Hi, 
 I am trying to set up an SPI communication between nordic nrf52 (as a master) and another slave peripheral. I&amp;#39;m using nrf52 sdks 0.9.2. I tried spi master loopback example and spi master with slave example, and both seemed to be working, with the</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 23 Dec 2015 09:45:59 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/10993/spi-master-example-code-clk-mosi-signal-error" /><item><title>RE: SPI Master Example Code: Clk &amp; MOSI Signal Error</title><link>https://devzone.nordicsemi.com/thread/41110?ContentTypeID=1</link><pubDate>Wed, 23 Dec 2015 09:45:59 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:22b76bd2-78c7-460f-adcc-c69ab32a72ef</guid><dc:creator>jiamin</dc:creator><description>&lt;p&gt;I see... Yes you are right.&lt;br /&gt;
The signals look alright after changing the ORDER config setting to MsbFirst.&lt;/p&gt;
&lt;p&gt;Thanks a lot for your help:)&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI Master Example Code: Clk &amp; MOSI Signal Error</title><link>https://devzone.nordicsemi.com/thread/41109?ContentTypeID=1</link><pubDate>Tue, 22 Dec 2015 12:30:52 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:06b707a6-6a39-4118-8a73-f46dfb6da885</guid><dc:creator>RK</dc:creator><description>&lt;p&gt;What is in your SPI CONFIG register? It looks to me that you&amp;#39;re shifting out the least significant bit first, instead of the most significant bit. If you are doing that, all those traces are perfect, it&amp;#39;s not 7 bits of lag, it&amp;#39;s the 7 lowest 0s first followed by the 1&lt;/p&gt;
&lt;p&gt;I&amp;#39;d say you have the ORDER field in CONFIG set to &amp;#39;1&amp;#39; == LsbFirst&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>