<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>GPIO conflict</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/110574/gpio-conflict</link><description>I have a nRF9160DK board that is used for development of a custom nRF9160 board. The hardware designers have assigned GPIO P0.27 to be a general purpose output pin. This pin is also used as uart0_cts. when I try to toggle this pin with a simple test it</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 01 Jul 2024 21:27:36 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/110574/gpio-conflict" /><item><title>RE: GPIO conflict</title><link>https://devzone.nordicsemi.com/thread/491695?ContentTypeID=1</link><pubDate>Mon, 01 Jul 2024 21:27:36 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e79d2c6d-5712-49ca-9a2d-6d48a7f61c58</guid><dc:creator>Edvin</dc:creator><description>&lt;p&gt;I am glad to hear. Closing the ticket. I will be out of office for a couple of weeks soon. If anything related pops up, please open a new ticket, and someone will be able to handle it before I come back.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Edvin&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO conflict</title><link>https://devzone.nordicsemi.com/thread/491655?ContentTypeID=1</link><pubDate>Mon, 01 Jul 2024 16:06:38 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3a289674-7b23-4836-a01e-ea374371c68c</guid><dc:creator>Timothy</dc:creator><description>&lt;p&gt;Edvin&lt;/p&gt;
&lt;p&gt;this is working nicely. This can be closed. Thank you for your support.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO conflict</title><link>https://devzone.nordicsemi.com/thread/491141?ContentTypeID=1</link><pubDate>Thu, 27 Jun 2024 13:49:33 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ebdec828-f31e-4ae0-a95a-eb1b043a264d</guid><dc:creator>Timothy</dc:creator><description>&lt;p&gt;Edvin&lt;/p&gt;
&lt;p&gt;I removed all other references to uart0 in prj.conf. The only reference to uart0 is the pinctrl above and an alias. The change worked perfectly. There are no changes to any V2.5.0 file now. Thank you for your help. I will test for a few days before we close it, but all should be OK. Pin 23/26 are defined but not used on the custom board.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO conflict</title><link>https://devzone.nordicsemi.com/thread/491069?ContentTypeID=1</link><pubDate>Thu, 27 Jun 2024 10:43:33 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:15b06b58-41f5-452d-ad05-a4eee101e5cd</guid><dc:creator>Edvin</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;I agree that it is preferable not to change any of the SDK files.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The simple workaround is to do the change that you just did, but do it in the overlay file instead. Add something like this to your own overlay file:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;pinctrl {
	uart0_default: uart0_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_TX, 0, 29)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RTS, 0, 23)&amp;gt;;
		};
		group2 {
			psels = &amp;lt;NRF_PSEL(UART_RX, 0, 28)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_CTS, 0, 26)&amp;gt;;
			bias-pull-up;
		};
	};

	uart0_sleep: uart0_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_TX, 0, 29)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RX, 0, 28)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RTS, 0, 23)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_CTS, 0, 26)&amp;gt;;
			low-power-enable;
		};
	};
};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I see that you tried to delete the node uart0 in your overlay file, but later in the same file, you state:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;/ {
	chosen {
		zephyr,bt-uart=&amp;amp;lpuart;
        nordic,nus-uart=&amp;amp;uart0;
	};
};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;So without building and looking into your application, it is a bit difficult to say how this would behave.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;If you upload the entire project as a zipped folder, I can have a look. If that is not possible, can you please try to do that pin change in yoru prj.conf?&lt;/p&gt;
&lt;p&gt;Best regars,&lt;/p&gt;
&lt;p&gt;Edvin&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO conflict</title><link>https://devzone.nordicsemi.com/thread/490943?ContentTypeID=1</link><pubDate>Wed, 26 Jun 2024 16:37:25 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:060b41bb-5877-4d0c-b983-25825a33b129</guid><dc:creator>Timothy</dc:creator><description>&lt;p&gt;Edvin&lt;/p&gt;
&lt;p&gt;I have it working as shown below. I changed Pin 27 to Pin 23 (an unused pin on custom board) in the file&amp;nbsp;C:\Nordic1\v2.5.0\zephyr\boards\arm\nrf9160dk_nrf9160\nrf9160dk_nrf9160_common-pinctrl.dtsi.&lt;/p&gt;
&lt;p&gt;so it definitely is uart0 messing up pin 27. any idea what is going on?&lt;/p&gt;
&lt;p&gt;I should have taken care of this in my overlay file. It does remove uart0 and redefine it without Pin 26/27.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I can live with this change if I have to but I really did not want to alter any V2.5.0 files at all.&lt;/p&gt;
&lt;div&gt;&amp;gt; batmon 0&lt;/div&gt;
&lt;div&gt;batmon 0&lt;/div&gt;
&lt;div&gt;Battery Monitor: 0 Disabled&lt;/div&gt;
&lt;div&gt;&amp;gt; adc&lt;/div&gt;
&lt;div&gt;adc&lt;/div&gt;
&lt;div&gt;&lt;span style="color:#cd232c;"&gt;BAT: 0.12 V ADC: 2.85 V&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&amp;gt; batmon 1&lt;/div&gt;
&lt;div&gt;batmon 1&lt;/div&gt;
&lt;div&gt;Battery Monitor: 1 Enabled&lt;/div&gt;
&lt;div&gt;&amp;gt; adc&lt;/div&gt;
&lt;div&gt;adc&lt;/div&gt;
&lt;div&gt;&lt;span style="color:#cd232c;"&gt;BAT: 3.31 V ADC: 2.84 V&lt;/span&gt;&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO conflict</title><link>https://devzone.nordicsemi.com/thread/490942?ContentTypeID=1</link><pubDate>Wed, 26 Jun 2024 16:31:03 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:2b1f6496-c60b-4a2c-82b6-93e6053e263e</guid><dc:creator>Timothy</dc:creator><description>&lt;p&gt;Edvin&lt;/p&gt;
&lt;p&gt;this is my setup for output GPIOs. all others work just a problem with BAT_MON_EN. The overlay file was given earlier.&lt;/p&gt;
&lt;div&gt;
&lt;div&gt;&lt;span&gt;/* outputs */&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;#define&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;SW2CTRL_DEV_NODE&lt;/span&gt;&lt;span&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/span&gt;&lt;span&gt;DT_GPIO_CTLR&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;DT_ALIAS&lt;/span&gt;&lt;span&gt;(sw2ctrl), gpios)&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;#define&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;SW2CTRL_DEV_PIN&lt;/span&gt;&lt;span&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;DT_GPIO_PIN&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;DT_ALIAS&lt;/span&gt;&lt;span&gt;(sw2ctrl), gpios)&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;#define&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;SW2CTRL_DEV_PIN_DTS_FLAGS&lt;/span&gt;&lt;span&gt; &amp;nbsp; &lt;/span&gt;&lt;span&gt;DT_GPIO_FLAGS&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;DT_ALIAS&lt;/span&gt;&lt;span&gt;(sw2ctrl), gpios)&lt;/span&gt;&lt;/div&gt;
&lt;br /&gt;
&lt;div&gt;&lt;span&gt;#define&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;CS2N_DEV_NODE&lt;/span&gt;&lt;span&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/span&gt;&lt;span&gt;DT_GPIO_CTLR&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;DT_ALIAS&lt;/span&gt;&lt;span&gt;(spi_cs2n), gpios)&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;#define&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;CS2N_DEV_PIN&lt;/span&gt;&lt;span&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;DT_GPIO_PIN&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;DT_ALIAS&lt;/span&gt;&lt;span&gt;(spi_cs2n), gpios)&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;#define&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;CS2N_DEV_PIN_DTS_FLAGS&lt;/span&gt;&lt;span&gt; &amp;nbsp; &lt;/span&gt;&lt;span&gt;DT_GPIO_FLAGS&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;DT_ALIAS&lt;/span&gt;&lt;span&gt;(spi_cs2n), gpios)&lt;/span&gt;&lt;/div&gt;
&lt;br /&gt;
&lt;div&gt;&lt;span&gt;#define&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;CS3N_DEV_NODE&lt;/span&gt;&lt;span&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/span&gt;&lt;span&gt;DT_GPIO_CTLR&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;DT_ALIAS&lt;/span&gt;&lt;span&gt;(spi_cs3n), gpios)&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;#define&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;CS3N_DEV_PIN&lt;/span&gt;&lt;span&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;DT_GPIO_PIN&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;DT_ALIAS&lt;/span&gt;&lt;span&gt;(spi_cs3n), gpios)&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;#define&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;CS3N_DEV_PIN_DTS_FLAGS&lt;/span&gt;&lt;span&gt; &amp;nbsp; &lt;/span&gt;&lt;span&gt;DT_GPIO_FLAGS&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;DT_ALIAS&lt;/span&gt;&lt;span&gt;(spi_cs3n), gpios)&lt;/span&gt;&lt;/div&gt;
&lt;br /&gt;
&lt;div&gt;&lt;span&gt;#define&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;BAT_MON_EN_DEV_NODE&lt;/span&gt;&lt;span&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/span&gt;&lt;span&gt;DT_GPIO_CTLR&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;DT_ALIAS&lt;/span&gt;&lt;span&gt;(batmonen), gpios)&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;#define&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;BAT_MON_EN_DEV_PIN&lt;/span&gt;&lt;span&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;DT_GPIO_PIN&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;DT_ALIAS&lt;/span&gt;&lt;span&gt;(batmonen), gpios)&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;#define&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;BAT_MON_EN_DEV_PIN_DTS_FLAGS&lt;/span&gt;&lt;span&gt; &amp;nbsp; &lt;/span&gt;&lt;span&gt;DT_GPIO_FLAGS&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;DT_ALIAS&lt;/span&gt;&lt;span&gt;(batmonen), gpios)&lt;/span&gt;&lt;/div&gt;
&lt;br /&gt;
&lt;div&gt;&lt;span&gt;const&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;struct&lt;/span&gt;&lt;span&gt; device &lt;/span&gt;&lt;span&gt;*&lt;/span&gt;&lt;span&gt;sw2ctrl_dev &lt;/span&gt;&lt;span&gt;=&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;DEVICE_DT_GET&lt;/span&gt;&lt;span&gt;(SW2CTRL_DEV_NODE);&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;const&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;struct&lt;/span&gt;&lt;span&gt; device &lt;/span&gt;&lt;span&gt;*&lt;/span&gt;&lt;span&gt;spi2_csn_dev &lt;/span&gt;&lt;span&gt;=&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;DEVICE_DT_GET&lt;/span&gt;&lt;span&gt;(CS2N_DEV_NODE);&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;const&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;struct&lt;/span&gt;&lt;span&gt; device &lt;/span&gt;&lt;span&gt;*&lt;/span&gt;&lt;span&gt;spi3_csn_dev &lt;/span&gt;&lt;span&gt;=&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;DEVICE_DT_GET&lt;/span&gt;&lt;span&gt;(CS3N_DEV_NODE);&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;const&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;struct&lt;/span&gt;&lt;span&gt; device &lt;/span&gt;&lt;span&gt;*&lt;/span&gt;&lt;span&gt;bat_mon_en_dev &lt;/span&gt;&lt;span&gt;=&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;DEVICE_DT_GET&lt;/span&gt;&lt;span&gt;(BAT_MON_EN_DEV_NODE);&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;
&lt;div&gt;&lt;br /&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; /* set up BAT_MON_EN as output/pullup */&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;if&lt;/span&gt;&lt;span&gt; (&lt;/span&gt;&lt;span&gt;!&lt;/span&gt;&lt;span&gt;device_is_ready&lt;/span&gt;&lt;span&gt;(bat_mon_en_dev)) &lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; {&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;myPrintfW&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;&amp;quot;BAT MON EN device is not ready&lt;/span&gt;&lt;span&gt;\r\n&lt;/span&gt;&lt;span&gt;&amp;quot;&lt;/span&gt;&lt;span&gt;);&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; }&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;else&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;myPrintfS&lt;/span&gt;&lt;span&gt;(&lt;/span&gt;&lt;span&gt;&amp;quot;BAT MON EN device is ready&lt;/span&gt;&lt;span&gt;\r\n&lt;/span&gt;&lt;span&gt;&amp;quot;&lt;/span&gt;&lt;span&gt;);&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;gpio_pin_configure&lt;/span&gt;&lt;span&gt;(bat_mon_en_dev, BAT_MON_EN_DEV_PIN, GPIO_OUTPUT &lt;/span&gt;&lt;span&gt;|&lt;/span&gt;&lt;span&gt; GPIO_PULL_UP);&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;gpio_pin_set&lt;/span&gt;&lt;span&gt;(bat_mon_en_dev, BAT_MON_EN_DEV_PIN, &lt;/span&gt;&lt;span&gt;1&lt;/span&gt;&lt;span&gt;);&lt;/span&gt;&lt;/div&gt;
&lt;/div&gt;
&lt;/div&gt;
&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO conflict</title><link>https://devzone.nordicsemi.com/thread/490824?ContentTypeID=1</link><pubDate>Wed, 26 Jun 2024 09:41:19 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:faf13a50-9551-4e7b-bb38-548bb4958717</guid><dc:creator>Edvin</dc:creator><description>[quote user="tjm1"]all the other GPIO pins work properly[/quote]
&lt;p&gt;All others?&lt;/p&gt;
&lt;p&gt;What about the other GPIOs originally used by the uart0? Have you tried to change the GPIOs of uart0 directly in the .dts file? Just for debugging purposes? This will tell you whether it is the uart that is still holding the gpio, or if it is being set somewhere else.&lt;/p&gt;
&lt;p&gt;Also, try to debug, and look at the GPIOs config register. What does it say? We can use this to determine whether the pin is set as an input or output. What does it say if you don&amp;#39;t try to use it? Perhaps that can give a hint of what the pin is used for.&lt;/p&gt;
&lt;p&gt;BR,&lt;br /&gt;Edvin&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO conflict</title><link>https://devzone.nordicsemi.com/thread/490634?ContentTypeID=1</link><pubDate>Tue, 25 Jun 2024 12:32:05 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c1067ad6-0469-4cfc-997e-fc01a8ca0891</guid><dc:creator>Timothy</dc:creator><description>&lt;p&gt;Edvin&lt;/p&gt;
&lt;p&gt;thanks for the quick response. If I gave you the project it would only work on our custom board. am I disabling the pins from UART0 and reenabling P0.27 to be used for our custom board properly in the overlay file? all the other GPIO pins work properly.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO conflict</title><link>https://devzone.nordicsemi.com/thread/490519?ContentTypeID=1</link><pubDate>Tue, 25 Jun 2024 08:37:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:711fa898-1672-4eec-8b79-f0f493cbec6d</guid><dc:creator>Edvin</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;Is it possible to upload the entire project, or a strip-down project that can replicate the issue that you are seeing? Then I can poke around and see if I can figure out why this pin is not controllable by the application.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Edvin&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO conflict</title><link>https://devzone.nordicsemi.com/thread/490344?ContentTypeID=1</link><pubDate>Mon, 24 Jun 2024 14:08:24 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:dbb8fb30-94c7-46d7-9b1e-cc2d9bca4aa7</guid><dc:creator>Timothy</dc:creator><description>&lt;p&gt;Edvin&lt;/p&gt;
&lt;p&gt;some more information. maybe this helps. I see a group2 for uart0. I do not know where that comes from. I only have group1 in the overlay. I have included both group1 and group2 info below. The uart0_sleep only has a group1. there is no group2.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1719237129133v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1719237174923v2.png" alt=" " /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO conflict</title><link>https://devzone.nordicsemi.com/thread/490321?ContentTypeID=1</link><pubDate>Mon, 24 Jun 2024 13:37:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:22da32e9-6127-4873-856f-02fff4865872</guid><dc:creator>Timothy</dc:creator><description>&lt;p&gt;Edvin&lt;/p&gt;
&lt;p&gt;I apologize for taking so long to get back to you. I have been working on testing the rest of the custom board. so far all seems to work fine but pin 27. I have attached the latest overlay file. In looking at the device tree I see that for BUSES UART0 P0.27 is gone but it still shows P0.26 as CTS. so I did not remove UART0 completely. I also see from looking at GPIO pins that P0.27 is assigned to bat_mon_en correctly. P0.27 is not toggling when I test it like I do with other GPIO output pins. This is a show stopper since I cannot read the battery voltage unless I can set this pin. The custom boards are created and in pre production testing so I cannot move to a different pin. any idea what I am doing wrong?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1719235776969v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1719235924852v2.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/cfs-file/__key/communityserver-discussions-components-files/4/3513.nrf9160dk_5F00_nrf9160_5F00_ns.overlay"&gt;devzone.nordicsemi.com/.../3513.nrf9160dk_5F00_nrf9160_5F00_ns.overlay&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO conflict</title><link>https://devzone.nordicsemi.com/thread/481076?ContentTypeID=1</link><pubDate>Mon, 29 Apr 2024 12:21:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:60f34850-73e2-4afa-bed6-2a74509017ee</guid><dc:creator>Edvin</dc:creator><description>&lt;p&gt;When doing this test, and the P0.27 doesn&amp;#39;t work, are you testing this on the nRF91DK, or your custom board?&lt;/p&gt;
&lt;p&gt;If it is on the DK, please have a look at the back of the DK, and you can see some diagrams of some of the GPIOs. You can see that the P0.27 is not routed out to the pin by default.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;In that case, try switching SW6 over to disconnect the InterFace MCU:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://infocenter.nordicsemi.com/topic/ug_nrf91_dk/UG/nrf91_DK/hw_figures.html?cp=2_1_4_3_0"&gt;https://infocenter.nordicsemi.com/topic/ug_nrf91_dk/UG/nrf91_DK/hw_figures.html?cp=2_1_4_3_0&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Edvin&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO conflict</title><link>https://devzone.nordicsemi.com/thread/480760?ContentTypeID=1</link><pubDate>Thu, 25 Apr 2024 16:17:42 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:54caf1e9-8413-47a4-ae4b-e9c9f35a6ab3</guid><dc:creator>Timothy</dc:creator><description>&lt;p&gt;I have attached my overlay file. The BAT_MON_EN (P0.27) does not work when I toggle with the code above. The other pins seem to work just fine. what am I doing wrong?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/cfs-file/__key/communityserver-discussions-components-files/4/6278.nrf9160dk_5F00_nrf9160_5F00_ns.overlay"&gt;devzone.nordicsemi.com/.../6278.nrf9160dk_5F00_nrf9160_5F00_ns.overlay&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO conflict</title><link>https://devzone.nordicsemi.com/thread/480708?ContentTypeID=1</link><pubDate>Thu, 25 Apr 2024 13:11:20 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ed7467a4-0d4f-4e52-9904-7d51d0c012d9</guid><dc:creator>Edvin</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;Did you do anything to disable the UART0 CTS pin before trying to use it as an output pin? If not, then the GPIO is probably controlled by the UART, and you will not be able to control it.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;If you look in the file nrf9160dk_nrf9160_common-pinctrl.dtsi, you will see the definition of uart0_default and uart0_sleep close to the top. Don&amp;#39;t change this file (you can for testing, but I don&amp;#39;t recommend doing so permanently), but copy the part about uart0:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;pinctrl {
	uart0_default: uart0_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_TX, 0, 29)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RTS, 0, 27)&amp;gt;;
		};
		group2 {
			psels = &amp;lt;NRF_PSEL(UART_RX, 0, 28)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_CTS, 0, 26)&amp;gt;;
			bias-pull-up;
		};
	};

	uart0_sleep: uart0_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_TX, 0, 29)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RX, 0, 28)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RTS, 0, 27)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_CTS, 0, 26)&amp;gt;;
			low-power-enable;
		};
	};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;And create a file called &amp;quot;nrf9160dk_nrf9160.overlay&amp;quot; in your application folder (same folder as your prj.conf). Then paste this snippet that you just copied, and add a final line with &amp;quot;};&amp;quot; at the end to close off the bracket. Then try to remove everything about UART_RTS and UART_CTS (make it look like the uart2 definition in the original nrf9160dk_nrf9160_common-pinctrl.dtsi file):&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;pinctrl {
	uart0_default: uart0_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_TX, 0, 29)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RX, 0, 28)&amp;gt;;
		};
	};

	uart0_sleep: uart0_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_TX, 0, 29)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RX, 0, 28)&amp;gt;;
			low-power-enable;
		};
	};
};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;save the file, and delete your build folder, and build from scratch. Does that allow you to toggle pin P0.27?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Edvin&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>