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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>What are the performance implications of using SPIM on the nRF52832 with anomaly-58-workaround?</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/112140/what-are-the-performance-implications-of-using-spim-on-the-nrf52832-with-anomaly-58-workaround</link><description>I am communicating with a sensor via SPIM. Without enabling `anomaly-58-workaround` I see numerous errors indicating 
 &amp;lt;wrn&amp;gt; spi_nrfx_spim: Transaction aborted since it would trigger nRF52832 PAN 58 
 All the read and write events happen with single buffers</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 21 Jun 2024 12:15:42 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/112140/what-are-the-performance-implications-of-using-spim-on-the-nrf52832-with-anomaly-58-workaround" /><item><title>RE: What are the performance implications of using SPIM on the nRF52832 with anomaly-58-workaround?</title><link>https://devzone.nordicsemi.com/thread/489957?ContentTypeID=1</link><pubDate>Fri, 21 Jun 2024 12:15:42 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3b956388-4730-4e12-94ce-d156cdae5903</guid><dc:creator>Anthony W</dc:creator><description>&lt;p&gt;Got it, thank you for the clarification!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: What are the performance implications of using SPIM on the nRF52832 with anomaly-58-workaround?</title><link>https://devzone.nordicsemi.com/thread/489919?ContentTypeID=1</link><pubDate>Fri, 21 Jun 2024 10:29:58 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:aae42cdf-bcc5-452b-b515-5dab1999735e</guid><dc:creator>Einar Thorsrud</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;The workaround does not work by using the SPI peripheral. Instead, it use GPIOTE via PPI to stop the SPI transaction by triggering the STOP task of the SPIM (you can see this in the implementation of&amp;nbsp;anomaly_58_workaround_setup() if you are interested in the details).&lt;/p&gt;
&lt;p&gt;If you have an available PPI and GPIOTE channel that is never used outside of this driver, the workaround shoudl be effective without significant side effects and this will be handled automatically as long as the workarond is enabled.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: What are the performance implications of using SPIM on the nRF52832 with anomaly-58-workaround?</title><link>https://devzone.nordicsemi.com/thread/489812?ContentTypeID=1</link><pubDate>Thu, 20 Jun 2024 17:44:03 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:6d00a30d-6f5f-4a89-95fa-e35c022cc5a6</guid><dc:creator>Anthony W</dc:creator><description>&lt;p&gt;Interesting, I didn&amp;#39;t think I had any single byte transactions, but after setting up SPI most of the communication is handled by the vendor&amp;#39;s driver library, so the must use single transactions for some part of it.&lt;/p&gt;
&lt;p&gt;Transactions happen frequently (up to 500Hz) but they are relatively small (around 4 - 40 bytes, depending on the packet type). So maybe DMA isn&amp;#39;t helping here anyway, I can investigate that (like I mentioned, I didn&amp;#39;t really notice any performance change).&lt;/p&gt;
&lt;p&gt;But one thing I wanted to clarify, just so I know, is specifically the behavior of the workaround. Is it correct that, for 1 byte messages, it will use SPI without EasyDMA, and for 2 or more bytes it will use DMA? So the main overhead is just a little bit of extra logic to check the message size? My use case may or may not benefit from the DMA (all incoming messages are 4+ bytes, but perhaps there are single byte messages being transmitted as well) but I can investigate that further if it becomes a problem.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: What are the performance implications of using SPIM on the nRF52832 with anomaly-58-workaround?</title><link>https://devzone.nordicsemi.com/thread/489099?ContentTypeID=1</link><pubDate>Mon, 17 Jun 2024 12:21:27 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4d63def0-b428-4731-8c61-ad75f90ae06d</guid><dc:creator>Einar Thorsrud</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
[quote user=""]From the description&amp;nbsp;&lt;a href="https://developer.nordicsemi.com/nRF_Connect_SDK/doc/2.6.99-cs2/kconfig/index.html#CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58"&gt;here&lt;/a&gt;&amp;nbsp;it sounded like it applied to read/write calls with a single byte, but it seems to apply to calls with a single buffer, which is what I am using.[/quote]
&lt;p&gt;The errata is only related to&amp;nbsp;transmitting a single byte with SPIM (which is using DMA). A single buffer is no problem. If you never need to&amp;nbsp;transmit a single byte you can ignore this. Transmitting more than 1 byte does not trigger the errata.&lt;/p&gt;
[quote user=""]So I&amp;#39;m wondering: is there any benefit to using SPIM in this case, or does the single buffer case just fall back to using SPI without EasyDMA?[/quote]
&lt;p&gt;If you have transactions more than 1 byte, using DMA is more efficient as the CPU is only involved in setting up the transaction (and checking evenets once it has completed). Usng the SPI peripheral without DMA means that the CPU is involved for every byte. Depending on how much else your application is doing and the priorities this may or may not be a problem.&lt;/p&gt;
[quote user=""]so I&amp;#39;m wondering if I&amp;#39;m actually just causing the MCU to work more rather than less by enabling SPIM. But I&amp;#39;m not sure exactly what the workaround does.[/quote]
&lt;p&gt;The workaround is only used when tramsitting a single byte, and it requiers some configuration on the users part when switching between single an multi byte transfers (I suggest reading the comments in spi_nrfx_spim.c for details). A central question here is how you use the SPI interface (number of transactions of different lengths). If you for instance never have 1 byte transactions, you can ignore this whole thing. If you mostly have short transactions, you don&amp;#39;t gain that much from DMA anyway. If the transactions can be both short (and signle byte) and long, it is less obvious which is most efficient in your case.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>