nrf52 SPIM easyDMA

RE: nrf52 SPIM easyDMA

yaron — Wed, 13 Jan 2016 13:49:25 GMT

you are right, my mistake. it is working.

RE: nrf52 SPIM easyDMA

RK — Wed, 13 Jan 2016 13:24:03 GMT

The manual tells you to write '1' to the TXD.LIST and RDX.LIST registers, not 3, and not 7. You do have to write '7' to the enable register in order to enable the SPIM as opposed to any other peripheral. I suggest reading the register assignments in the manual again very carefully and checking your work.

RE: nrf52 SPIM easyDMA

yaron — Wed, 13 Jan 2016 13:16:28 GMT

yes I did. But I have noticed that the LIST register shows the value "0x3", even though I wrote "0x7" to it (like the manual sais)

RE: nrf52 SPIM easyDMA

RK — Wed, 13 Jan 2016 13:13:16 GMT

did you set the thing into DMA list mode as opposed to DMA normal mode?

RE: nrf52 SPIM easyDMA

yaron — Wed, 13 Jan 2016 13:09:55 GMT

I did all that, but every time I START the SPI transaction it uses same the pointer, sending the same data.

RE: nrf52 SPIM easyDMA

RK — Tue, 12 Jan 2016 12:59:19 GMT

I haven't seen an example - but it looks pretty simple - you set it up for list mode, you set the size of a 'chunk' and the initial pointer. Every time you START the SPI transaction it moves to the next chunk, updating the pointer.

In what way couldn't you get it to work?

RE: nrf52 SPIM easyDMA

yaron — Tue, 12 Jan 2016 06:53:06 GMT

Thanks for your answer. I have tried using the EasyDMA List mode, but couldn't get it to work. (It should work as I have the second engineering revision). Is there an example for EasyDMA List mode usage? Thanks

RE: nrf52 SPIM easyDMA

RK — Tue, 12 Jan 2016 01:10:49 GMT

This seems to be exactly what EasyDMA List mode does. Check the manual and make sure you have the latest engineering revision of the chip because the first version's EasyDMA List mode wasn't functional.