RE: nrf5340 nReset Externall Driven 3.3V

Devin M — Thu, 11 Jul 2024 12:32:48 GMT

Thank you that answers my question. The PCIE Reset output can be controlled, but it can only be driven to High or Low, and not left floating, so I just wanted to make sure this would cause no problems with the Internal Pullup. I agree, due to the source of VDD and GND being the same. It would be better probably to have a Transistor Gate to allow the nReset pin to float, if PCIE Reset is High, but from the sounds of your answer that is unnecessary for a change of design.

Thanks!

RE: nrf5340 nReset Externall Driven 3.3V

Search — Thu, 11 Jul 2024 05:33:24 GMT

Through your description, I think you are expressing whether there is a problem if the nRF5340 nRESET pin is pulled high by the PCIE Reset Pin for a long time.
For this problem, I don't think it will matter much as long as the PCIE Reset Pin voltage is consistent with the nRF5340 VDD, although the PCIE Reset Pin usually needs to be kept high if the 5340 is to work properly.
If the product needs to have strict stability requirements, you can consider connecting the PCIE Reset Pin to the 5340 nReset Pin via a reverse drive, provided that the PCIE output cannot be changed.

Hope this answer can help you.