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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>PR2401</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/113283/pr2401</link><description>Hello : 
 Refer to your official schematic nRF52832-DCDC circuit, VDD has a total of 3 pins, 13/36/48 pins. We found that the default capacitors were different. 48pin was configured with 4.7uF, while the other two were configured with 100nF. Why the difference</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 23 Jul 2024 08:58:25 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/113283/pr2401" /><item><title>RE: PR2401</title><link>https://devzone.nordicsemi.com/thread/495161?ContentTypeID=1</link><pubDate>Tue, 23 Jul 2024 08:58:25 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d0bedfb5-8b42-4a9a-b701-1ee5ce8d91e4</guid><dc:creator>ketiljo</dc:creator><description>&lt;p&gt;The internal regulators are connected to this pin.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: PR2401</title><link>https://devzone.nordicsemi.com/thread/495108?ContentTypeID=1</link><pubDate>Tue, 23 Jul 2024 01:02:49 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:150d1be0-5bbf-475f-9e18-2078f8eb25ea</guid><dc:creator>HuiHuang</dc:creator><description>&lt;p&gt;&amp;ldquo;&lt;span&gt;Pin is the main connection&lt;/span&gt;&amp;rdquo;&lt;/p&gt;
&lt;p&gt;-----&lt;/p&gt;
&lt;p&gt;Which pin is it, and why is it primary?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: PR2401</title><link>https://devzone.nordicsemi.com/thread/495037?ContentTypeID=1</link><pubDate>Mon, 22 Jul 2024 13:28:47 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e84a94f0-0b66-4476-a6a2-ff7460698625</guid><dc:creator>ketiljo</dc:creator><description>&lt;p&gt;The VDD pins are internally connected but must be externally connected as well. Pin is the main connection so the 4.7 µF cap shall be placed here. The smaller caps are decoupling caps.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>