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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Nrf52 flash programming : &amp;#39;writes in a block between erase&amp;#39;</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/11357/nrf52-flash-programming-writes-in-a-block-between-erase</link><description>In the nrf52 OPS datasheet, for NVM and flash programming electrical specification (page 41) it has &amp;quot;Amount of writes in a block between erase&amp;quot; and Minimum for that is 181. 
 What does that actually mean? 
 For example, I know and understand &amp;quot;Write</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 03 Feb 2017 17:39:17 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/11357/nrf52-flash-programming-writes-in-a-block-between-erase" /><item><title>RE: Nrf52 flash programming : 'writes in a block between erase'</title><link>https://devzone.nordicsemi.com/thread/42776?ContentTypeID=1</link><pubDate>Fri, 03 Feb 2017 17:39:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:401a3d22-a7e6-4566-b7c7-0f69cec4902e</guid><dc:creator>Mahendra Tailor</dc:creator><description>&lt;p&gt;I asked and the definitive answer about how many times one can write to a dword is as per the following response I got ...&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&lt;em&gt;The real limitation is that you can write up to 8 times to the same address, as long as you don&amp;#39;t touch other 32-bit words inside the same 128-bit block. For simplicity we have stated in the product specification that the maximum is 2 writes for a 32-bit word.
The limitation should be considered hard as breaking it may result in bits being flipped.&lt;/em&gt;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;So I asked a follow on question about the address boundary of that 128 bit block and the answer was ...&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&lt;em&gt;I can confirm that the start addresses of the 128 bit blocks are those addresses which are divisible by 16.&lt;/em&gt;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;I think I can manage to develop I driver to atomically write a multidword object and still be able to detect an interruption on next power up.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Nrf52 flash programming : 'writes in a block between erase'</title><link>https://devzone.nordicsemi.com/thread/42774?ContentTypeID=1</link><pubDate>Thu, 26 Jan 2017 16:08:25 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f89168cc-a7b3-4663-ae07-bc914d6e1ca8</guid><dc:creator>Mason</dc:creator><description>&lt;p&gt;Section 8.2 in the v1.2 spec sheet states, &amp;quot;Each Page is divided into 8 blocks.&amp;quot; Taking that into account, It seems that you can safely write each word once in a page (128 words per block, 8 blocks per page), plus a bit more.&lt;/p&gt;
&lt;p&gt;The datasheet is a bit vague with this, and it would be nice to get some clarification from Nordic on this question.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Nrf52 flash programming : 'writes in a block between erase'</title><link>https://devzone.nordicsemi.com/thread/42775?ContentTypeID=1</link><pubDate>Mon, 23 Jan 2017 17:17:47 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:83d5dedc-6f9c-4364-984c-4e698d383306</guid><dc:creator>pytepaul</dc:creator><description>&lt;p&gt;Hi RK,&lt;/p&gt;
&lt;p&gt;Do you mean 181 writes at any address of the page or of the block ?
Spec says &amp;quot;Amount of writes allowed in a block between erase&amp;quot;, but I am confused about nordic&amp;#39;s use of page and block. Usually in NAND datasheet a block is made of page, this is reversed in NRF52 chip.
But on the block protection module a block is defined as a 4KB unit, which is the size of the page on the memory layout, while the block is 512B.&lt;/p&gt;
&lt;p&gt;I have some understanding doubts about this 181 write spec as a block is said as 512B while writing 181 times one word is 724B. So limitation appply for bit to bit writing only...&lt;/p&gt;
&lt;p&gt;So is it 181 write in the same block or in the whole page?&lt;/p&gt;
&lt;p&gt;Thanks,&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Nrf52 flash programming : 'writes in a block between erase'</title><link>https://devzone.nordicsemi.com/thread/42773?ContentTypeID=1</link><pubDate>Sun, 17 Jan 2016 12:11:30 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e4c1f7c9-88db-4748-a421-7a31c3ade9fd</guid><dc:creator>RK</dc:creator><description>&lt;p&gt;yeah I have one of those too - I keep state in a 32 bit word and drop a bit each time I move from one state to another, it&amp;#39;s very useful. That lets me mark blocks as allocated, then in-use, then dropped etc, kind of like a filesystem.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Nrf52 flash programming : 'writes in a block between erase'</title><link>https://devzone.nordicsemi.com/thread/42772?ContentTypeID=1</link><pubDate>Sun, 17 Jan 2016 12:09:27 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:090835db-ed64-47d9-b623-84c8fc613a50</guid><dc:creator>Mahendra Tailor</dc:creator><description>&lt;p&gt;Phew!! That is a relief. Thank you very much for explanation. I have developed a flash file system and it can result in writes often, potentially up to 32 times as I drop a bit to 0 for a mechanism to write atomically to a block of words multiple times&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Nrf52 flash programming : 'writes in a block between erase'</title><link>https://devzone.nordicsemi.com/thread/42771?ContentTypeID=1</link><pubDate>Sun, 17 Jan 2016 11:35:33 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9d4e0fad-9b4f-4555-a9bf-868580ed3086</guid><dc:creator>RK</dc:creator><description>&lt;p&gt;Section 10.1 &amp;quot;The same block address in the NVM can only be written nWRITE number of times before an erase must be performed using PAGEERASE , ERASEUICR, or ERASEALL.&amp;quot;&lt;/p&gt;
&lt;p&gt;nWrite is a minimum of 181. So you can write any address in the page 181 times at a minimum before you have to erase the page. Not that that would be very useful as you can only change it a maximum of 32 times before you have all bits set to zero.&lt;/p&gt;
&lt;p&gt;I assume the 181 times includes times you write it but don&amp;#39;t actually change anything, else it really &lt;em&gt;would&lt;/em&gt; be meaningless.&lt;/p&gt;
&lt;p&gt;Basically not much of a restriction.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>