RE: MAX30003-NRF52832 SPI Interface - No proper data read back from the Slave(MAX30003)

Turbo J — Fri, 16 Aug 2024 17:33:51 GMT

Waveform assignments are not correct in the scope. The readback on Register #0 is undefined according to datasheet.

SPI operation looks normal to me, ticket can be closed - nothing wr0ng on nordic side.

RE: MAX30003-NRF52832 SPI Interface - No proper data read back from the Slave(MAX30003)

Srinidhi — Fri, 16 Aug 2024 17:23:20 GMT

Hi Kenneth,

Appreciate your timely response. The SSEL is controlled by the NRFX_SPIM library and it does get driven to zero for each spim transaction. I already attached a pdf titled "MAX30003WING" which has the logic analyzer waveforms for looped write and read operation. I kindly request you to take a look at it.

1. From the Logic Analyzer waveforms, its inferred that Nordic sends out data correctly for each transaction but the slave(MAX30003WING) does not respond with the data. I have tried the same with new MAX30003WING board as well. Moreover, the MISO line gets a single pulse for every transaction that has a width lesser than the SCLK's high period.

2. As a debugging step, I established SPI Communication between two Nordic 52DK boards one being the slave and other being the master. The data is received successfully on both ends. But, again there are some additional pulses in the MISO line for no reason. I have attached the logic analyzer output for that as well. The MISO line in configured with NOPULL in nrf library. With that config, the MISO line was high by default. So, I configured it to PULLDOWN

3. I also tried to add a delay of 100ms after each SPI transaction to give MAX30003WING sufficient time to do its internal operations and spun a while loop to wait until each SPI transactions calls DONE EVENT. But, nothing seems to read back the registers of MAX30003 successfully.

Nordic-Nordic - NO MISO PULL

Nordic - Nordic - MISO PULL DOWN

Thanks,

Srinidhi

RE: MAX30003-NRF52832 SPI Interface - No proper data read back from the Slave(MAX30003)

Kenneth — Wed, 14 Aug 2024 11:25:50 GMT

Hello,

I would have connected a logic analyzer and looked at the 4 spi pins (clk, miso, mosi, and ssel (ssel must go active low during each transfer)), and also made sure vdd and gnd is properly connected between the boards. You could potentially disconnect the miso pin, just to check if it's possible something on the dk is forcing it low.

Kenneth