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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Pending async SPI read and from-slave write simultaneous</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/114261/pending-async-spi-read-and-from-slave-write-simultaneous</link><description>Hi, 
 We are using a NRF54L15 device as an SPI slave device communicating through an other SoC as SPI master. This SPI master device emits periodic SPI messages at indeterminate intervals which means we can&amp;#39;t have a spi_read call pending forever unless</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 03 Nov 2025 14:25:52 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/114261/pending-async-spi-read-and-from-slave-write-simultaneous" /><item><title>RE: Pending async SPI read and from-slave write simultaneous</title><link>https://devzone.nordicsemi.com/thread/553184?ContentTypeID=1</link><pubDate>Mon, 03 Nov 2025 14:25:52 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:744c9d77-1882-4953-8766-5b53d49de4be</guid><dc:creator>Christoffer Brask</dc:creator><description>&lt;p&gt;I don&amp;#39;t know if Kenneth are better to help me, but I have created a separate thread (private)&amp;nbsp;&lt;a id="i1" href="https://devzone.nordicsemi.com/support/353533"&gt;https://devzone.nordicsemi.com/support/353533&lt;/a&gt;&amp;nbsp;but we haven&amp;#39;t come up with a good solution yet.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Pending async SPI read and from-slave write simultaneous</title><link>https://devzone.nordicsemi.com/thread/553169?ContentTypeID=1</link><pubDate>Mon, 03 Nov 2025 13:27:56 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:6e5bdbdb-da72-4839-bf63-b81cebb684ea</guid><dc:creator>Einar Thorsrud</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;I do not have any specific advice but I am also not sure to what extent your case differ from the one in the original question. Can explain in detail what it is you want to do and in what way it is problematic?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Pending async SPI read and from-slave write simultaneous</title><link>https://devzone.nordicsemi.com/thread/553133?ContentTypeID=1</link><pubDate>Mon, 03 Nov 2025 10:04:20 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:113141f6-da96-4b27-8ae7-a2f88150af2a</guid><dc:creator>Christoffer Brask</dc:creator><description>&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/members/eith"&gt;Einar Thorsrud&lt;/a&gt;&amp;nbsp;Do you have any suggestions on how to accomplish this?&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Pending async SPI read and from-slave write simultaneous</title><link>https://devzone.nordicsemi.com/thread/553010?ContentTypeID=1</link><pubDate>Fri, 31 Oct 2025 12:36:29 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:010e6872-c372-41e8-a193-b626a4f1f64b</guid><dc:creator>Christoffer Brask</dc:creator><description>&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/members/david-demelier"&gt;David Demelier&lt;/a&gt;&amp;nbsp;Did you come up with a solution? I also a dedicated GPIO (DRDY pin) on my slave but using spi_read in one thread and calling spi_write from another, makes my spi_read return with non valid data and the SPI master does not receive the right data from spi_write&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Pending async SPI read and from-slave write simultaneous</title><link>https://devzone.nordicsemi.com/thread/500221?ContentTypeID=1</link><pubDate>Wed, 28 Aug 2024 12:59:10 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:23b7256c-3958-4f26-b517-dd35b3218e6a</guid><dc:creator>Einar Thorsrud</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
[quote user=""]The real issue is that we may need to send data to the master using a custom reversed logic based on a GPIO interrupt in which the master device will then read from the NRF54L15. This unusual scenario is at this time not possible to modify.[/quote]
&lt;p&gt;To me this seems like a quite common scenario, where the SPI slave (nRF in this case) asserts a GPIO when it has data to send, which can be an interrupt pin on the SPI master device. But as you write this is unusual I wonder if I misunderstood something? If so, can you elaborate?&lt;/p&gt;
[quote user=""]From what I&amp;#39;ve experimented through the zephyr SPI API, it&amp;#39;s impossible to have a pending spi_read nor spi_read_signal call and at the same time have a spi_write or spi_write_signal function, in that case it will spinlock until the previous transaction completed.[/quote]
&lt;p&gt;SPI transactions are by nature bidirectional,&amp;nbsp;but there are helper functions for only sendign or receiving. To do both, use&amp;nbsp;&lt;code&gt;spi_transceive()&lt;/code&gt;. But note that this means that read and write happens as part of the same transaction. You&amp;nbsp;have a separate read and write operation pending or ongoing at the same time.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>