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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Missing transactions on SPI slave</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/114441/missing-transactions-on-spi-slave</link><description>Hi, 
 We are using two nRF54l15-PDF to communicate as SPI, one is in master mode and one is in slave mode. The master device sends a simple array of bytes, the first one being incremented at each transaction. The other one simply receive the data using</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 04 Sep 2024 08:48:48 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/114441/missing-transactions-on-spi-slave" /><item><title>RE: Missing transactions on SPI slave</title><link>https://devzone.nordicsemi.com/thread/501102?ContentTypeID=1</link><pubDate>Wed, 04 Sep 2024 08:48:48 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:95c2f21a-e408-4573-be3d-e2fad58b78b5</guid><dc:creator>Hung Bui</dc:creator><description>&lt;p&gt;Hi David,&amp;nbsp;&lt;br /&gt;I&amp;#39;m glad that you find the issue.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;As far as I know the SPI hardware should support changing CPOL in CONFIG register. So either it&amp;#39;s not supported by current hardware or the must be a bug in the software to configure CPOL. I will report this. Let us know if you find out something.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Missing transactions on SPI slave</title><link>https://devzone.nordicsemi.com/thread/501084?ContentTypeID=1</link><pubDate>Wed, 04 Sep 2024 07:43:16 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d95fcd93-d9b4-4a03-8bab-95bea7541697</guid><dc:creator>David Demelier</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;Thank you for your quick answer. We have investigated the issue with also a master written in a separate framework (STM + Cube IDE) and we experienced the same issue. We then inspected through a dedicated SPI oscope plugged into the lines and saw the that the oscope did not interpreted the frames correctly. Even though both the master and the slave did have the exact same configuration the problem stayed.&lt;/p&gt;
&lt;p&gt;We fixed the issue by removing the &lt;strong&gt;SPI_MODE_CPOL&lt;/strong&gt; in both slave zephyr implementation, the master zephyr implementation, and also in the custom other master for STM + Cube.&lt;/p&gt;
&lt;p&gt;We are still trying to understand why removing the option fixes the issue while the configuration was equally set on both side.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Missing transactions on SPI slave</title><link>https://devzone.nordicsemi.com/thread/501030?ContentTypeID=1</link><pubDate>Tue, 03 Sep 2024 16:46:49 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3897624e-7881-412d-b56f-45fc566f220a</guid><dc:creator>hmolesworth</dc:creator><description>&lt;p&gt;Might not help, but I would recommend using at least high-drive on all output pins on both master and slave, including /CS. Also a &amp;#39;scope&amp;nbsp;may prove more useful&amp;nbsp;than a logic analyser, should there be one to hand.&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;			nordic,drive-mode = &amp;lt;NRF_DRIVE_H0H1&amp;gt;;
&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Missing transactions on SPI slave</title><link>https://devzone.nordicsemi.com/thread/500938?ContentTypeID=1</link><pubDate>Tue, 03 Sep 2024 11:06:34 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:23208602-3fac-4835-bb19-efeee9f1bb23</guid><dc:creator>Hung Bui</dc:creator><description>&lt;p&gt;Hi David,&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I&amp;nbsp;couldn&amp;#39;t find&amp;nbsp;any similar issue reported for nRF54L before. I think it&amp;#39;s not an issue with the experimental support of the chip.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;But I don&amp;#39;t see a problem with the code you provided.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;br /&gt;Could you check with a logic analyzer to see what exactly transmitted over the SPI lines ?&amp;nbsp;&lt;br /&gt;We need to check if the issue is on the SPIM transmitting or on SPIS receiving.&lt;/p&gt;
&lt;p&gt;Do you have 2 nRF52 DK to verify if it&amp;#39;s the issue on NRF54L or can also be reproduced on nRF52 ?&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>