RE: SPIM xfer delay

QuentinCisteme — Fri, 06 Sep 2024 13:29:28 GMT

Hello,

I tried this solution before but it didn't knew about this event test so the two SPI were colliding.

It works great, the delay between the two transmissions is reduced from 16 to 5us, thank you so much.

In my first program the first transfer was triggered by PPI and i had the same problem of collision. I will try with this test, to see the maximum frequency of the system.

Thank you so much,

Quentin.

RE: SPIM xfer delay

Vidar Berg — Fri, 06 Sep 2024 12:50:06 GMT

Hello,

The delay likely results from the time required to reach the spim_handler ISR (including interrupt latency and the processing of the interrupt handling code), as well as the configuration of the next transfer within the ISR. The transfer itself is performed without CPU involvement.

If this is really timing critical, you may be able to reduce the delay by starting setting up the subsequent transfer from the trigger_handler() ISR.

void trigger_handler(..) 
{
    nrfx_spim_tranfer(&spim_adc, &xfer_adc, NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER);

    while (!nrf_spim_event_check(&spim_adc, NRF_SPIM_EVENT_END))
    {}

    nrfx_spim_tranfer(&spim_adc, &xfer_ram, NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER);
}

Best regards,

Vidar