RE: GND PAD Handling Issues

emmovo — Fri, 20 Sep 2024 00:10:14 GMT

Good morning , Jonathan.

I envisage exactly the situation described in your attached picture.Thank you very much for your patient and professional reply, you have described in great detail the risks that my idea would entail and I have understood them, thanks.

RE: GND PAD Handling Issues

JONATHAN LL — Thu, 19 Sep 2024 11:54:21 GMT

Hi,

[quote user=""]Therefore, I would like to ask if I can slightly reduce the size of the GND PAD in the middle, so that the pin lines of the inner ring can go out from the pad and then through the via to other layers, and then use the overlay soldermask layer to make sure that the via and the GND PAD on the chip won't be short-circuited, and in this way, reduce the cost of processing because of the directly punched holes on the pads;[/quote]

It is not recommended to do it this way an will likely negatively effect the yield.

[quote user=""]What are the risks associated with this approach?[/quote]

Issues:
- solder mask will add some inconsistencies to the surface and can cause poor contact on areas for the SoC under pins or GND pad.
- shaving the GND area to make sure the TH vias is not in contact and tenting the vias will also be difficult an manufacturer might not be on board with the process, can cost more as well.
- the reduced area of contact can and will reduce the mechanical stability of the PCB whit the component.
- reducing the size will worsen the soldering
- separating up the GND pad area will likely also result in more movement and that can result in shorter lifespan as solder joints can experience more stress.

Also, there are things in the design that we strongly recommend you follow and one of these things are how some pins are connected to the center pad.

So you would like to do something like this above image? Then you would need to make sure that some pins still have GND pad connection.

In short, NOT recommended.

Regards,
Jonathan