<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Pin reset on nRF52805 and use of internal pullup</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/114763/pin-reset-on-nrf52805-and-use-of-internal-pullup</link><description>1) On p. 55 of nRF52805_PS_v1.4.pdf, section &amp;quot;5.3.8 Reset behavior&amp;quot; shows that a pin reset will reset GPIO, so will a pin reset active low also reset PSELRESET registers, so that the pin is no longer programmed as reset? If so, then holding pin reset</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 19 Sep 2024 09:52:59 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/114763/pin-reset-on-nrf52805-and-use-of-internal-pullup" /><item><title>RE: Pin reset on nRF52805 and use of internal pullup</title><link>https://devzone.nordicsemi.com/thread/503086?ContentTypeID=1</link><pubDate>Thu, 19 Sep 2024 09:52:59 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e8a8654a-bf15-4f4b-92ad-188de5e93293</guid><dc:creator>Simonr</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;It should be perfectly fine having a capacitor here to remove noise, and this shouldn&amp;#39;t delay the reset pin logic noticeably, so I think you&amp;#39;re worrying for no reason here.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Pin reset on nRF52805 and use of internal pullup</title><link>https://devzone.nordicsemi.com/thread/502978?ContentTypeID=1</link><pubDate>Wed, 18 Sep 2024 15:20:48 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:25990dab-e6f2-4b8c-b86d-82d3ceb326a8</guid><dc:creator>EngineerB</dc:creator><description>&lt;p&gt;Apparently PSELREST[n] are UICR registers which means they are non-volatile. What confused me was that in the Product Specification document it was shown to be set to all 1&amp;#39;s by Reset. However, is that &amp;quot;Reset&amp;quot; a flash erase function in this case rather than a device reset due to power-up or pin reset? If so, then I believe what you are saying is that once programmed, unless specifically erased in NVM, the PSELREST[n] registers remain programmed to the reset function even after a pin reset or power-up reset, is that correct?&lt;/p&gt;
&lt;p&gt;In our case we would like to drive the reset pin with open-drain (aka open-collector) drivers, so that multiple sources could pull the pin low without conflict. We also have a small capacitor from pin reset to ground to filter out noise. Thus we require a pull-up resistor to pull the pin high. If the internal pull-up resistor is automatically enabled when pin reset is enabled in the PSELREST[n] registers, then the next time the device goes through power-up reset . the capacitor will be charged by the internal pull-up resistor, and the rate of charging of the capacitor will delay emergence from reset until that capacitor charges to a logic 1 on the pin reset pin, is that correct?&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Pin reset on nRF52805 and use of internal pullup</title><link>https://devzone.nordicsemi.com/thread/502867?ContentTypeID=1</link><pubDate>Wed, 18 Sep 2024 07:07:34 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:08f2bf43-daab-4f3c-a956-330076ad1ad0</guid><dc:creator>Simonr</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;So after discussing with a colleague, the UICR and FICR register are used to change the default reset value for peripherals, so the reset value for P0.21 will be changed so that it never is set as a GPIO. Why are you asking exactly? What&amp;#39;s the use case you&amp;#39;re looking to implement this for?&lt;/p&gt;
[quote user=""]When pin reset is programmed onto P0.21 using the PSELRESET registers, does this also program an internal pullup resistor on that pin[/quote]
&lt;p&gt;Yes, it will also program an internal pullup on that pin.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Pin reset on nRF52805 and use of internal pullup</title><link>https://devzone.nordicsemi.com/thread/502785?ContentTypeID=1</link><pubDate>Tue, 17 Sep 2024 13:29:53 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d915f492-bfb4-4f3e-afbf-e8b7fe59df9d</guid><dc:creator>Simonr</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;I will need to get back to you tomorrow with a proper reply here, as I need to check internally what exactly happens to the PSELRESET register on a pin reset. But I agree with you on point 1, that from the specification it sounds like the PSELRESET register will be reset as soon as the reset is triggered and thus won&amp;#39;t work as a reset anymore. Please hang on while I discuss this with a few colleagues though.&lt;/p&gt;
&lt;p&gt;Thank you for your patience,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>