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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>How to reduce TWI delay</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/11478/how-to-reduce-twi-delay</link><description>I found using twi send byte delay.It is there anyway I can reduce delay.</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 25 Jan 2016 01:17:40 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/11478/how-to-reduce-twi-delay" /><item><title>RE: How to reduce TWI delay</title><link>https://devzone.nordicsemi.com/thread/43334?ContentTypeID=1</link><pubDate>Mon, 25 Jan 2016 01:17:40 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:88698832-618e-4e60-a1c3-7d773a20757e</guid><dc:creator>james</dc:creator><description>&lt;p&gt;Thanks RK.
I will try it with your suggestion.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to reduce TWI delay</title><link>https://devzone.nordicsemi.com/thread/43333?ContentTypeID=1</link><pubDate>Fri, 22 Jan 2016 13:32:36 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4aec87b7-281b-4184-bdbf-924768b15975</guid><dc:creator>RK</dc:creator><description>&lt;p&gt;I&amp;#39;m  a little surprised to see 40us gap there. The driver, if you look at it, does send one byte out per interrupt, then waits for another interrupt before it does the next one. I would have anticipated more like 10us between them however.&lt;/p&gt;
&lt;p&gt;This is usually more of an issue with SPI running at 2MHz or so, where it really makes a huge difference and you can fix that by changing the code to tight loop and keep stuffing bytes in, by the time you&amp;#39;ve written one and checked the register, it&amp;#39;s been clocked out and you can do the next one, if you ever do catch up, then you just wait for the next interrupt and do another batch. At 2 or 4 Mhz SPI, the CPU can&amp;#39;t keep up so the buffer is always ready.&lt;/p&gt;
&lt;p&gt;At 400KHz however that&amp;#39;s 20us a byte, so there will be some downtime between bytes. If full speed is really important, writing your own driver is probably the only way to go.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to reduce TWI delay</title><link>https://devzone.nordicsemi.com/thread/43330?ContentTypeID=1</link><pubDate>Fri, 22 Jan 2016 08:41:28 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:066ccbf9-6a53-4def-8569-109e9771fc21</guid><dc:creator>james</dc:creator><description>&lt;p&gt;I don&amp;#39;t think so. Because it don&amp;#39;t happen when I use hardware I2C of CC2541.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to reduce TWI delay</title><link>https://devzone.nordicsemi.com/thread/43329?ContentTypeID=1</link><pubDate>Fri, 22 Jan 2016 08:25:07 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:fed57fdb-5698-4a4c-9ef3-2d74d75052a2</guid><dc:creator>james</dc:creator><description>&lt;p&gt;speed is 400 khz.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to reduce TWI delay</title><link>https://devzone.nordicsemi.com/thread/43328?ContentTypeID=1</link><pubDate>Fri, 22 Jan 2016 08:15:02 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:515c7144-8a4e-4a12-8938-70e3d46a4725</guid><dc:creator>Alex</dc:creator><description>&lt;p&gt;Can it be slave holding clock line?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to reduce TWI delay</title><link>https://devzone.nordicsemi.com/thread/43332?ContentTypeID=1</link><pubDate>Fri, 22 Jan 2016 07:56:49 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e768a88f-e8b9-4cf9-b6a7-f475f9124553</guid><dc:creator>RK</dc:creator><description>&lt;p&gt;no you should most definitely use the hardware TWI peripheral, but the driver, if, as I said, it&amp;#39;s not changed, puts huge gaps between characters at higher speeds, so modify it to send more than one byte during the interrupt service routine if they&amp;#39;re going out fast enough.&lt;/p&gt;
&lt;p&gt;What speed you running at?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to reduce TWI delay</title><link>https://devzone.nordicsemi.com/thread/43327?ContentTypeID=1</link><pubDate>Fri, 22 Jan 2016 07:45:49 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b9a122f0-9e5b-4276-ad9e-cee60cc679c2</guid><dc:creator>james</dc:creator><description>&lt;p&gt;you mean that I shouldn&amp;#39;t use Hardware I2C&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to reduce TWI delay</title><link>https://devzone.nordicsemi.com/thread/43331?ContentTypeID=1</link><pubDate>Fri, 22 Jan 2016 06:25:36 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:bfdaca58-1675-4499-a084-4133a2903150</guid><dc:creator>RK</dc:creator><description>&lt;p&gt;you can write your own driver which sends out as many bytes as it can at each interrupt instead of the SDK one which, unless it&amp;#39;s changed, sends one byte only then waits for another interrupt before it does the next one.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>