Problems with QSPI device initialization

RE: Problems with QSPI device initialization

Stefano1984 — Mon, 21 Oct 2024 09:12:45 GMT

Thanks Simon, I solved it. All I had to do was set bit 6 of the CR1NV register to zero. Thanks.

RE: Problems with QSPI device initialization

Simonr — Mon, 14 Oct 2024 08:02:19 GMT

I agree with your description here, but I still mean that QSPI needs to be specifically supported by a flash memory, and that QPI support doesn't necessarily mean QSPI is supported and the other way around, so are you sure the S25FL064L supports QSPI? Since the error code refers to a timeout during init it seems to me like the nRF isn't able to communicate correctly with the flash device which I assume is because the flash doesn't recognize the instructions coming from the nRF52.

Best regards,

Simon

RE: Problems with QSPI device initialization

Stefano1984 — Fri, 11 Oct 2024 09:02:33 GMT

Hi Simon,

Are you sure of what you say?

I'm reporting a piece of text taken from the memory datasheet:

Single bit wide commands start with an instruction and may provide an address or data, all sent only on the SI signal. Data may be sent back to the host serially on the SO signal. This is referenced as a 1-1-1 command protocol for single bit width instruction, single bit width address and modifier, single bit data.
Dual-output or quad-output commands provide an address sent from the host as serial on SI (IO0) then followed by dummy cycles. Data is returned to the host as bit pairs on IO0 and IO1 or, four bit (nibble) groups on IO0, IO1, IO2, and IO3. This is referenced as 1-1-2 for Dual-O and 1-1-4 for Quad-O command protocols.
Dual or quad input / output (I/O) commands provide an address sent from the host as bit pairs on IO0 and IO1 or, four bit (nibble) groups on IO0, IO1, IO2, and IO3 then followed by dummy cycles. Data is returned to the host similarly as bit pairs on IO0 and IO1 or, four bit (nibble) groups on IO0, IO1, IO2, and IO3. This is referenced as 1-2-2 for dual I/O and 1-4-4 for quad I/O command protocols.
The FL-L family also supports a QPI mode in which all information is transferred in 4 bit width, including the instruction, address, modifier, and data. This is referenced as a 4-4-4 command protocol.

The 1-4-4 is a QSPI protocol.

Thanks for your time.

Stefano

RE: Problems with QSPI device initialization

Simonr — Fri, 11 Oct 2024 08:02:55 GMT

From what I can see looking at the S25FL064FL datasheet it doesn't support QSPI, but rather QPI which is not the same, so I think you need to use normal SPI to get the S25FL flash reading/writing correctly.

Best regards,

Simon