RE: nRF5340 LFCLK oscillator control clarification

Simonr — Thu, 17 Oct 2024 11:26:23 GMT

Hi Dustin

First off, I'm uploading this block diagram for reference:

Referring to the block diagram above you can see that there is one LFCLK RC oscillator, and one LF synthesized clock in the system. So true.
Any core can trigger the calibration task independently of the other, but a DONE event will be generated in both cores when complete. So true.
If two instances of the LFCLK control system request different LFCLK sources, the power and clock subsystem will secure that the most accurate of the requested LFCLK sources is selected. If one instance requests a particular source to stop when another LFCLK control instance requests the ame source to run, but at a lower accuracy, the power and clock subsystem will switch to the less accurate source. So true.
True, based on the previous paragraph.
This returns an indication of what LF clock source is running. This register value in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance.
Only if the RTC is enabled for the project/application this would be true. It's possible to not use the RTC at all.

Best regards,

Simon