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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>micro esb and ble on 130 v2 project</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/11568/micro-esb-and-ble-on-130-v2-project</link><description>Hi,
Because I didn&amp;#39;t want to keep with the last question when this is a tottaly new one, so created another question.
I&amp;#39;ve tried to get this project to work: 
 github.com/.../nrf51-ble-micro-esb-uart 
 It doesn&amp;#39;t compile from start.
I&amp;#39;m missing bsp</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 10 Feb 2016 12:51:43 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/11568/micro-esb-and-ble-on-130-v2-project" /><item><title>RE: micro esb and ble on 130 v2 project</title><link>https://devzone.nordicsemi.com/thread/43713?ContentTypeID=1</link><pubDate>Wed, 10 Feb 2016 12:51:43 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5a260291-c648-46b0-86c7-7d974bfb74a4</guid><dc:creator>T&amp;#252;ze</dc:creator><description>&lt;p&gt;What is the version marking of your chip that you are using? Could you try to use a different interrupt handler such s SWI3 instead of the QDEC?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: micro esb and ble on 130 v2 project</title><link>https://devzone.nordicsemi.com/thread/43712?ContentTypeID=1</link><pubDate>Wed, 10 Feb 2016 10:37:45 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:09f37cdd-45f6-4822-915d-a226f7dd0c7c</guid><dc:creator>ricardo_marinheiro</dc:creator><description>&lt;p&gt;Hi, thanks for the tips on the attributes,&lt;/p&gt;
&lt;p&gt;Unfortunatly that wasn&amp;#39;t it. I declared the assert function at main.c with &lt;strong&gt;attribute&lt;/strong&gt;((used)) but stil goes into hard fault.
The  UESB_CORE_MAX_PAYLOAD_LENGTH is 100 so, if the radio is on some sort of zombie state this won&amp;#39;t be the reason.
For now I&amp;#39;m making a direct call from inside the events_handler of uesb_timeslot it self, as for the moment fixes the issue., but still have no clue why using the quadrature interrupt as set on the code, doesn&amp;#39;t work.
Once again, thank you for the help, just afraid this issue will affect more people as they download this code.&lt;/p&gt;
&lt;p&gt;Regards&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: micro esb and ble on 130 v2 project</title><link>https://devzone.nordicsemi.com/thread/43711?ContentTypeID=1</link><pubDate>Wed, 10 Feb 2016 09:47:56 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5ca1f932-62f8-45bc-9ab8-dd83861311f0</guid><dc:creator>T&amp;#252;ze</dc:creator><description>&lt;p&gt;This sounds like you have a softdevice assertion, but it is not caught by your assertion handler. Looking at the project you attached, the assert_nrf_callback is unfortunately removed by the linker as &amp;quot;unused&amp;quot; when using armcc. If you add &lt;strong&gt;attribute&lt;/strong&gt;((used)) infront of the function definitition in main.c, the softdevice assertion should be reported.&lt;/p&gt;
&lt;p&gt;One reason to get a timeslot assertion right away is if the radio peripheral was left in an undefined state, so that it&amp;#39;s generating unexpected interrupts, and this can happen if you have increased the UESB_CORE_MAX_PAYLOAD_LENGTH beyond 243 in the application you have provided. Once the radio is in an undefined state, you should isolate it (turn off the peer), your application, and pin reset (or powercycle).&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: micro esb and ble on 130 v2 project</title><link>https://devzone.nordicsemi.com/thread/43710?ContentTypeID=1</link><pubDate>Mon, 08 Feb 2016 13:50:05 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:42251863-5c8e-416d-8743-6c8d0c960163</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Maybe you are getting an hard fault due to one of the reasons mentioned here: &lt;a href="https://devzone.nordicsemi.com/question/46893/softdevice-assert/"&gt;devzone.nordicsemi.com/.../&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;Are you getting hard fault right away, or does it happen when you communicate to another uESB device?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: micro esb and ble on 130 v2 project</title><link>https://devzone.nordicsemi.com/thread/43709?ContentTypeID=1</link><pubDate>Thu, 04 Feb 2016 14:30:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:eaf2c779-621e-4f02-8d90-f1d29b6fa1a4</guid><dc:creator>ricardo_marinheiro</dc:creator><description>&lt;p&gt;Right, So I&amp;#39;ve been around and around the disassemble and some tick counters and concluded that the end of time slot request was being done to late, or so it seems.
So, instead of using the end of slot interrupt setting and handler to end the time slot, I&amp;#39;ve called the end of time slot directly from the soft device timer0 interrupt signal, and this sorted the situation!&lt;/p&gt;
&lt;p&gt;Then piped the uesb rx data to the ble tx and the ble rx to the uesb tx and can now have 2 devices connected messaging  to each other through ble piped through uesb.&lt;/p&gt;
&lt;p&gt;I&amp;#39;m still trying to understand exactly if the hard fault was due to end of slot irq being happening after slot timeout or if there was something else going on...&lt;/p&gt;
&lt;p&gt;Any who, this is where I&amp;#39;m now. Please advise about calling the end of slot from inside the SD timer0  handler.&lt;/p&gt;
&lt;p&gt;Thank you&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: micro esb and ble on 130 v2 project</title><link>https://devzone.nordicsemi.com/thread/43708?ContentTypeID=1</link><pubDate>Thu, 04 Feb 2016 10:09:26 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9de44bfe-10f4-48a3-9d67-27ecc2a55528</guid><dc:creator>ricardo_marinheiro</dc:creator><description>&lt;p&gt;Hi, welll I was expecting to see the code just compiling and running without effort as it come os a zip file. Haven&amp;#39;t changed or modified anything at all, just compiled and run.
This is the code I&amp;#39;m referring to
&lt;a href="https://devzone.nordicsemi.com/attachment/7ff342e0aba602ed11cfc5d87f73e3e3"&gt;devzone.nordicsemi.com/.../7ff342e0aba602ed11cfc5d87f73e3e3&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;When entering hard fault it points the error being when&lt;/p&gt;
&lt;p&gt;oid TIMESLOT_END_IRQHandler(void)
{
uint32_t err_code;&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;// Timeslot is about to end: stop UESB

err_code = uesb_stop_rx();
if (err_code != UESB_SUCCESS)
{
    // Override
    NRF_RADIO-&amp;gt;INTENCLR      = 0xFFFFFFFF; &amp;lt;&amp;lt;--- JUMPS TO HARD FAULT
    NRF_RADIO-&amp;gt;TASKS_DISABLE = 1;
}

uesb_disable();

m_total_timeslot_length = 0;
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;}&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: micro esb and ble on 130 v2 project</title><link>https://devzone.nordicsemi.com/thread/43707?ContentTypeID=1</link><pubDate>Wed, 03 Feb 2016 12:10:56 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b02e9197-5882-4ea9-8ed3-c15c5be30296</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Hi, the QFACA1 build code is the latest 3rd revision of the nRF51-series, and the variant with the largest RAM size. So this should be good. A few things you might check: &lt;a href="https://devzone.nordicsemi.com/question/46893/softdevice-assert/"&gt;devzone.nordicsemi.com/.../&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: micro esb and ble on 130 v2 project</title><link>https://devzone.nordicsemi.com/thread/43706?ContentTypeID=1</link><pubDate>Mon, 01 Feb 2016 16:16:34 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:302bb077-9170-4737-ba44-fa1d82f0c85b</guid><dc:creator>ricardo_marinheiro</dc:creator><description>&lt;p&gt;Right, so I&amp;#39;ve found a complete project of the same link you guys gave me before,&lt;/p&gt;
&lt;p&gt;&lt;a href="https://devzone.nordicsemi.com/attachment/7ff342e0aba602ed11cfc5d87f73e3e3"&gt;devzone.nordicsemi.com/.../7ff342e0aba602ed11cfc5d87f73e3e3&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;This one compiles just fine and complains about nothing except it runs constantly into hardfault handler. More and more I think this has to do with the version of the radio it self as I&amp;#39;m using a PCA10028 V1 1.0
Any suggestion?&lt;/p&gt;
&lt;p&gt;Thank you&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: micro esb and ble on 130 v2 project</title><link>https://devzone.nordicsemi.com/thread/43705?ContentTypeID=1</link><pubDate>Wed, 27 Jan 2016 15:40:09 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e70987f1-79ab-4b17-b85b-de13126ad17f</guid><dc:creator>ricardo_marinheiro</dc:creator><description>&lt;p&gt;Just a Note,
I&amp;#39;m using nrf51 QFACA10, that might be important.
Also, in the part where I stated that changed a bit the app_timer_init and ignored the bsp.c.h include in order to have code working, the call stack points to the harf fault right after QDEC interrupt, might also be important to mention.&lt;/p&gt;
&lt;p&gt;Thank you&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>